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Commit ba0f00b9 authored by Ralf Baechle's avatar Ralf Baechle
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[MIPS] Malta: Enable tickless and highres timers.



Most Malta use an FPGA CPU card which rarely is good for more than 40MHz.
So the performance penalta of the regular timer interrupt, especially
for the VSMP kernel model is significant, even at a mere 100Hz.

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 5ef1b9a0
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