[MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores.
Following a strict interpretation the empty definition of irq_enable_hazard
has always been a bug - but an intentional one because it didn't bite.
This has now changed, for uniprocessor kernels mm/slab.c:do_drain()
[...]
on_each_cpu(do_drain, cachep, 1, 1);
check_irq_on();
[...]
may be compiled into a mtc0 c0_status; mfc0 c0_status sequence resulting
in a back-to-back hazard.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
parent
2e4dafd5
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