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Commit 116d0486 authored by Frank Myhr's avatar Frank Myhr Committed by Jean Delvare
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hwmon: (hwmon-vid) Add 6-bit vid codes for AMD NPT 0Fh cpus



AMD NPT 0Fh cpus use 6 bit VID codes. Successive codes with msb 0
describe 25mV decrements, while those with msb 1 describe 12.5mV
decrements. Existing hwmon-vid.c is correct only for codes with msb 0;
add support for the codes with msb 1.

Ref:
p 309, Table 71
AMD Publication 32559, BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf

Signed-off-by: default avatarFrank Myhr <fmyhr@fhmtech.com>
Signed-off-by: default avatarJean Delvare <khali@linux-fr.org>
parent 15872212
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