diff --git a/CREDITS b/CREDITS index e97bea06b59ff12bc827c0661fb57974a6eff4d6..c62dcb3b7e2621d918815a656f2682fda044afcb 100644 --- a/CREDITS +++ b/CREDITS @@ -317,6 +317,14 @@ S: 2322 37th Ave SW S: Seattle, Washington 98126-2010 S: USA +N: Muli Ben-Yehuda +E: mulix@mulix.org +E: muli@il.ibm.com +W: http://www.mulix.org +D: trident OSS sound driver, x86-64 dma-ops and Calgary IOMMU, +D: KVM and Xen bits and other misc. hackery. +S: Haifa, Israel + N: Johannes Berg E: johannes@sipsolutions.net W: http://johannes.sipsolutions.net/ @@ -3344,8 +3352,7 @@ S: Spain N: Linus Torvalds E: torvalds@linux-foundation.org D: Original kernel hacker -S: 12725 SW Millikan Way, Suite 400 -S: Beaverton, Oregon 97005 +S: Portland, Oregon 97005 S: USA N: Marcelo Tosatti diff --git a/Documentation/00-INDEX b/Documentation/00-INDEX index 1977fab386566e23f501bea233f8f487d16f5c38..6de71308a9060b1a81c27aedb5b91042ff0b668b 100644 --- a/Documentation/00-INDEX +++ b/Documentation/00-INDEX @@ -361,8 +361,6 @@ telephony/ - directory with info on telephony (e.g. voice over IP) support. time_interpolators.txt - info on time interpolators. -tipar.txt - - information about Parallel link cable for Texas Instruments handhelds. tty.txt - guide to the locking policies of the tty layer. uml/ diff --git a/Documentation/ABI/testing/sysfs-block b/Documentation/ABI/testing/sysfs-block index 4bd9ea539129036264b80dd926f156167bd51d6e..44f52a4f5903359eda2f2ffafff2d3341e437e62 100644 --- a/Documentation/ABI/testing/sysfs-block +++ b/Documentation/ABI/testing/sysfs-block @@ -26,3 +26,37 @@ Description: I/O statistics of partition . The format is the same as the above-written /sys/block//stat format. + + +What: /sys/block//integrity/format +Date: June 2008 +Contact: Martin K. Petersen +Description: + Metadata format for integrity capable block device. + E.g. T10-DIF-TYPE1-CRC. + + +What: /sys/block//integrity/read_verify +Date: June 2008 +Contact: Martin K. Petersen +Description: + Indicates whether the block layer should verify the + integrity of read requests serviced by devices that + support sending integrity metadata. + + +What: /sys/block//integrity/tag_size +Date: June 2008 +Contact: Martin K. Petersen +Description: + Number of bytes of integrity tag space available per + 512 bytes of data. + + +What: /sys/block//integrity/write_generate +Date: June 2008 +Contact: Martin K. Petersen +Description: + Indicates whether the block layer should automatically + generate checksums for write requests bound for + devices that support receiving integrity metadata. diff --git a/Documentation/ABI/testing/sysfs-bus-css b/Documentation/ABI/testing/sysfs-bus-css new file mode 100644 index 0000000000000000000000000000000000000000..b585ec258a08ecbe64a07156dd6e264c9e3d91ef --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-css @@ -0,0 +1,35 @@ +What: /sys/bus/css/devices/.../type +Date: March 2008 +Contact: Cornelia Huck + linux-s390@vger.kernel.org +Description: Contains the subchannel type, as reported by the hardware. + This attribute is present for all subchannel types. + +What: /sys/bus/css/devices/.../modalias +Date: March 2008 +Contact: Cornelia Huck + linux-s390@vger.kernel.org +Description: Contains the module alias as reported with uevents. + It is of the format css:t and present for all + subchannel types. + +What: /sys/bus/css/drivers/io_subchannel/.../chpids +Date: December 2002 +Contact: Cornelia Huck + linux-s390@vger.kernel.org +Description: Contains the ids of the channel paths used by this + subchannel, as reported by the channel subsystem + during subchannel recognition. + Note: This is an I/O-subchannel specific attribute. +Users: s390-tools, HAL + +What: /sys/bus/css/drivers/io_subchannel/.../pimpampom +Date: December 2002 +Contact: Cornelia Huck + linux-s390@vger.kernel.org +Description: Contains the PIM/PAM/POM values, as reported by the + channel subsystem when last queried by the common I/O + layer (this implies that this attribute is not neccessarily + in sync with the values current in the channel subsystem). + Note: This is an I/O-subchannel specific attribute. +Users: s390-tools, HAL diff --git a/Documentation/ABI/testing/sysfs-dev b/Documentation/ABI/testing/sysfs-dev new file mode 100644 index 0000000000000000000000000000000000000000..a9f2b8b0530fb193be12ccfb7d0a529bf0ba435d --- /dev/null +++ b/Documentation/ABI/testing/sysfs-dev @@ -0,0 +1,20 @@ +What: /sys/dev +Date: April 2008 +KernelVersion: 2.6.26 +Contact: Dan Williams +Description: The /sys/dev tree provides a method to look up the sysfs + path for a device using the information returned from + stat(2). There are two directories, 'block' and 'char', + beneath /sys/dev containing symbolic links with names of + the form ":". These links point to the + corresponding sysfs path for the given device. + + Example: + $ readlink /sys/dev/block/8:32 + ../../block/sdc + + Entries in /sys/dev/char and /sys/dev/block will be + dynamically created and destroyed as devices enter and + leave the system. + +Users: mdadm diff --git a/Documentation/ABI/testing/sysfs-devices-memory b/Documentation/ABI/testing/sysfs-devices-memory new file mode 100644 index 0000000000000000000000000000000000000000..7a16fe1e2270d8e7353b209bd0dad24a5ce9b69e --- /dev/null +++ b/Documentation/ABI/testing/sysfs-devices-memory @@ -0,0 +1,24 @@ +What: /sys/devices/system/memory +Date: June 2008 +Contact: Badari Pulavarty +Description: + The /sys/devices/system/memory contains a snapshot of the + internal state of the kernel memory blocks. Files could be + added or removed dynamically to represent hot-add/remove + operations. + +Users: hotplug memory add/remove tools + https://w3.opensource.ibm.com/projects/powerpc-utils/ + +What: /sys/devices/system/memory/memoryX/removable +Date: June 2008 +Contact: Badari Pulavarty +Description: + The file /sys/devices/system/memory/memoryX/removable + indicates whether this memory block is removable or not. + This is useful for a user-level agent to determine + identify removable sections of the memory before attempting + potentially expensive hot-remove memory operation + +Users: hotplug memory remove tools + https://w3.opensource.ibm.com/projects/powerpc-utils/ diff --git a/Documentation/ABI/testing/sysfs-firmware-acpi b/Documentation/ABI/testing/sysfs-firmware-acpi index 9470ed9afcc07238077440312c24af3d5ef88ad0..f27be7d1a49f4038951827c583734b1cf1be3125 100644 --- a/Documentation/ABI/testing/sysfs-firmware-acpi +++ b/Documentation/ABI/testing/sysfs-firmware-acpi @@ -29,46 +29,46 @@ Description: $ cd /sys/firmware/acpi/interrupts $ grep . * - error:0 - ff_gbl_lock:0 - ff_pmtimer:0 - ff_pwr_btn:0 - ff_rt_clk:0 - ff_slp_btn:0 - gpe00:0 - gpe01:0 - gpe02:0 - gpe03:0 - gpe04:0 - gpe05:0 - gpe06:0 - gpe07:0 - gpe08:0 - gpe09:174 - gpe0A:0 - gpe0B:0 - gpe0C:0 - gpe0D:0 - gpe0E:0 - gpe0F:0 - gpe10:0 - gpe11:60 - gpe12:0 - gpe13:0 - gpe14:0 - gpe15:0 - gpe16:0 - gpe17:0 - gpe18:0 - gpe19:7 - gpe1A:0 - gpe1B:0 - gpe1C:0 - gpe1D:0 - gpe1E:0 - gpe1F:0 - gpe_all:241 - sci:241 + error: 0 + ff_gbl_lock: 0 enable + ff_pmtimer: 0 invalid + ff_pwr_btn: 0 enable + ff_rt_clk: 2 disable + ff_slp_btn: 0 invalid + gpe00: 0 invalid + gpe01: 0 enable + gpe02: 108 enable + gpe03: 0 invalid + gpe04: 0 invalid + gpe05: 0 invalid + gpe06: 0 enable + gpe07: 0 enable + gpe08: 0 invalid + gpe09: 0 invalid + gpe0A: 0 invalid + gpe0B: 0 invalid + gpe0C: 0 invalid + gpe0D: 0 invalid + gpe0E: 0 invalid + gpe0F: 0 invalid + gpe10: 0 invalid + gpe11: 0 invalid + gpe12: 0 invalid + gpe13: 0 invalid + gpe14: 0 invalid + gpe15: 0 invalid + gpe16: 0 invalid + gpe17: 1084 enable + gpe18: 0 enable + gpe19: 0 invalid + gpe1A: 0 invalid + gpe1B: 0 invalid + gpe1C: 0 invalid + gpe1D: 0 invalid + gpe1E: 0 invalid + gpe1F: 0 invalid + gpe_all: 1192 + sci: 1194 sci - The total number of times the ACPI SCI has claimed an interrupt. @@ -89,6 +89,13 @@ Description: error - an interrupt that can't be accounted for above. + invalid: it's either a wakeup GPE or a GPE/Fixed Event that + doesn't have an event handler. + + disable: the GPE/Fixed Event is valid but disabled. + + enable: the GPE/Fixed Event is valid and enabled. + Root has permission to clear any of these counters. Eg. # echo 0 > gpe11 @@ -97,3 +104,43 @@ Description: None of these counters has an effect on the function of the system, they are simply statistics. + + Besides this, user can also write specific strings to these files + to enable/disable/clear ACPI interrupts in user space, which can be + used to debug some ACPI interrupt storm issues. + + Note that only writting to VALID GPE/Fixed Event is allowed, + i.e. user can only change the status of runtime GPE and + Fixed Event with event handler installed. + + Let's take power button fixed event for example, please kill acpid + and other user space applications so that the machine won't shutdown + when pressing the power button. + # cat ff_pwr_btn + 0 + # press the power button for 3 times; + # cat ff_pwr_btn + 3 + # echo disable > ff_pwr_btn + # cat ff_pwr_btn + disable + # press the power button for 3 times; + # cat ff_pwr_btn + disable + # echo enable > ff_pwr_btn + # cat ff_pwr_btn + 4 + /* + * this is because the status bit is set even if the enable bit is cleared, + * and it triggers an ACPI fixed event when the enable bit is set again + */ + # press the power button for 3 times; + # cat ff_pwr_btn + 7 + # echo disable > ff_pwr_btn + # press the power button for 3 times; + # echo clear > ff_pwr_btn /* clear the status bit */ + # echo disable > ff_pwr_btn + # cat ff_pwr_btn + 7 + diff --git a/Documentation/ABI/testing/sysfs-firmware-memmap b/Documentation/ABI/testing/sysfs-firmware-memmap new file mode 100644 index 0000000000000000000000000000000000000000..0d99ee6ae02ec786aef9ed6373bc91d1f5d1fb19 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-firmware-memmap @@ -0,0 +1,71 @@ +What: /sys/firmware/memmap/ +Date: June 2008 +Contact: Bernhard Walle +Description: + On all platforms, the firmware provides a memory map which the + kernel reads. The resources from that memory map are registered + in the kernel resource tree and exposed to userspace via + /proc/iomem (together with other resources). + + However, on most architectures that firmware-provided memory + map is modified afterwards by the kernel itself, either because + the kernel merges that memory map with other information or + just because the user overwrites that memory map via command + line. + + kexec needs the raw firmware-provided memory map to setup the + parameter segment of the kernel that should be booted with + kexec. Also, the raw memory map is useful for debugging. For + that reason, /sys/firmware/memmap is an interface that provides + the raw memory map to userspace. + + The structure is as follows: Under /sys/firmware/memmap there + are subdirectories with the number of the entry as their name: + + /sys/firmware/memmap/0 + /sys/firmware/memmap/1 + /sys/firmware/memmap/2 + /sys/firmware/memmap/3 + ... + + The maximum depends on the number of memory map entries provided + by the firmware. The order is just the order that the firmware + provides. + + Each directory contains three files: + + start : The start address (as hexadecimal number with the + '0x' prefix). + end : The end address, inclusive (regardless whether the + firmware provides inclusive or exclusive ranges). + type : Type of the entry as string. See below for a list of + valid types. + + So, for example: + + /sys/firmware/memmap/0/start + /sys/firmware/memmap/0/end + /sys/firmware/memmap/0/type + /sys/firmware/memmap/1/start + ... + + Currently following types exist: + + - System RAM + - ACPI Tables + - ACPI Non-volatile Storage + - reserved + + Following shell snippet can be used to display that memory + map in a human-readable format: + + -------------------- 8< ---------------------------------------- + #!/bin/bash + cd /sys/firmware/memmap + for dir in * ; do + start=$(cat $dir/start) + end=$(cat $dir/end) + type=$(cat $dir/type) + printf "%016x-%016x (%s)\n" $start $[ $end +1] "$type" + done + -------------------- >8 ---------------------------------------- diff --git a/Documentation/ABI/testing/sysfs-kernel-mm b/Documentation/ABI/testing/sysfs-kernel-mm new file mode 100644 index 0000000000000000000000000000000000000000..190d523ac159f64c97ae7355f230c46f564e5f6b --- /dev/null +++ b/Documentation/ABI/testing/sysfs-kernel-mm @@ -0,0 +1,6 @@ +What: /sys/kernel/mm +Date: July 2008 +Contact: Nishanth Aravamudan , VM maintainers +Description: + /sys/kernel/mm/ should contain any and all VM + related information in /sys/kernel/. diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-hugepages b/Documentation/ABI/testing/sysfs-kernel-mm-hugepages new file mode 100644 index 0000000000000000000000000000000000000000..e21c00571cf4f082b04f12b168e376c500bd845d --- /dev/null +++ b/Documentation/ABI/testing/sysfs-kernel-mm-hugepages @@ -0,0 +1,15 @@ +What: /sys/kernel/mm/hugepages/ +Date: June 2008 +Contact: Nishanth Aravamudan , hugetlb maintainers +Description: + /sys/kernel/mm/hugepages/ contains a number of subdirectories + of the form hugepages-kB, where is the page size + of the hugepages supported by the kernel/CPU combination. + + Under these directories are a number of files: + nr_hugepages + nr_overcommit_hugepages + free_hugepages + surplus_hugepages + resv_hugepages + See Documentation/vm/hugetlbpage.txt for details. diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle index 6caa146155788c8a67fc940c1879f2faf4fac1bb..1875e502f87205a1dcaf268d0af78127ee336144 100644 --- a/Documentation/CodingStyle +++ b/Documentation/CodingStyle @@ -474,25 +474,29 @@ make a good program). So, you can either get rid of GNU emacs, or change it to use saner values. To do the latter, you can stick the following in your .emacs file: -(defun linux-c-mode () - "C mode with adjusted defaults for use with the Linux kernel." - (interactive) - (c-mode) - (c-set-style "K&R") - (setq tab-width 8) - (setq indent-tabs-mode t) - (setq c-basic-offset 8)) - -This will define the M-x linux-c-mode command. When hacking on a -module, if you put the string -*- linux-c -*- somewhere on the first -two lines, this mode will be automatically invoked. Also, you may want -to add - -(setq auto-mode-alist (cons '("/usr/src/linux.*/.*\\.[ch]$" . linux-c-mode) - auto-mode-alist)) - -to your .emacs file if you want to have linux-c-mode switched on -automagically when you edit source files under /usr/src/linux. +(defun c-lineup-arglist-tabs-only (ignored) + "Line up argument lists by tabs, not spaces" + (let* ((anchor (c-langelem-pos c-syntactic-element)) + (column (c-langelem-2nd-pos c-syntactic-element)) + (offset (- (1+ column) anchor)) + (steps (floor offset c-basic-offset))) + (* (max steps 1) + c-basic-offset))) + +(add-hook 'c-mode-hook + (lambda () + (let ((filename (buffer-file-name))) + ;; Enable kernel mode for the appropriate files + (when (and filename + (string-match "~/src/linux-trees" filename)) + (setq indent-tabs-mode t) + (c-set-style "linux") + (c-set-offset 'arglist-cont-nonempty + '(c-lineup-gcc-asm-reg + c-lineup-arglist-tabs-only)))))) + +This will make emacs go better with the kernel coding style for C +files below ~/src/linux-trees. But even if you fail in getting emacs to do sane formatting, not everything is lost: use "indent". diff --git a/Documentation/DMA-API.txt b/Documentation/DMA-API.txt index 80d150458c80c5ac7f7f5f75b3e6ff8a602a19ca..d8b63d164e41193927af2c7fb41dcb0893f57878 100644 --- a/Documentation/DMA-API.txt +++ b/Documentation/DMA-API.txt @@ -298,10 +298,10 @@ recommended that you never use these unless you really know what the cache width is. int -dma_mapping_error(dma_addr_t dma_addr) +dma_mapping_error(struct device *dev, dma_addr_t dma_addr) int -pci_dma_mapping_error(dma_addr_t dma_addr) +pci_dma_mapping_error(struct pci_dev *hwdev, dma_addr_t dma_addr) In some circumstances dma_map_single and dma_map_page will fail to create a mapping. A driver can check for these errors by testing the returned diff --git a/Documentation/DMA-attributes.txt b/Documentation/DMA-attributes.txt index 6d772f84b477c9f5a4698e87d50fb63649af83d3..b768cc0e402b8e6f1cfa8ae0b0f23c4e1c50168a 100644 --- a/Documentation/DMA-attributes.txt +++ b/Documentation/DMA-attributes.txt @@ -22,3 +22,12 @@ ready and available in memory. The DMA of the "completion indication" could race with data DMA. Mapping the memory used for completion indications with DMA_ATTR_WRITE_BARRIER would prevent the race. +DMA_ATTR_WEAK_ORDERING +---------------------- + +DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping +may be weakly ordered, that is that reads and writes may pass each other. + +Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, +those that do not will simply ignore the attribute and exhibit default +behavior. diff --git a/Documentation/DocBook/gadget.tmpl b/Documentation/DocBook/gadget.tmpl index 5a8ffa761e09991bfc59dc97fa01a4deef94e9f7..ea3bc9565e6a7e7ae48a168841c222e07bfd0154 100644 --- a/Documentation/DocBook/gadget.tmpl +++ b/Documentation/DocBook/gadget.tmpl @@ -524,6 +524,44 @@ These utilities include endpoint autoconfiguration. +Composite Device Framework + +The core API is sufficient for writing drivers for composite +USB devices (with more than one function in a given configuration), +and also multi-configuration devices (also more than one function, +but not necessarily sharing a given configuration). +There is however an optional framework which makes it easier to +reuse and combine functions. + + +Devices using this framework provide a struct +usb_composite_driver, which in turn provides one or +more struct usb_configuration instances. +Each such configuration includes at least one +struct usb_function, which packages a user +visible role such as "network link" or "mass storage device". +Management functions may also exist, such as "Device Firmware +Upgrade". + + +!Iinclude/linux/usb/composite.h +!Edrivers/usb/gadget/composite.c + + + +Composite Device Functions + +At this writing, a few of the current gadget drivers have +been converted to this framework. +Near-term plans include converting all of them, except for "gadgetfs". + + +!Edrivers/usb/gadget/f_acm.c +!Edrivers/usb/gadget/f_serial.c + + + + Peripheral Controller Drivers diff --git a/Documentation/DocBook/kernel-locking.tmpl b/Documentation/DocBook/kernel-locking.tmpl index 2510763295d09dfbd893e288d1948c9b05feda4d..084f6ad7b7a0a4729b85aea3cc5c3e6eb6557689 100644 --- a/Documentation/DocBook/kernel-locking.tmpl +++ b/Documentation/DocBook/kernel-locking.tmpl @@ -219,10 +219,10 @@ - Three Main Types of Kernel Locks: Spinlocks, Mutexes and Semaphores + Two Main Types of Kernel Locks: Spinlocks and Mutexes - There are three main types of kernel locks. The fundamental type + There are two main types of kernel locks. The fundamental type is the spinlock (include/asm/spinlock.h), which is a very simple single-holder lock: if you can't get the @@ -239,14 +239,6 @@ can't sleep (see ), and so have to use a spinlock instead. - - The third type is a semaphore - (include/linux/semaphore.h): it - can have more than one holder at any time (the number decided at - initialization time), although it is most commonly used as a - single-holder lock (a mutex). If you can't get a semaphore, your - task will be suspended and later on woken up - just like for mutexes. - Neither type of lock is recursive: see . @@ -278,7 +270,7 @@ - Semaphores still exist, because they are required for + Mutexes still exist, because they are required for synchronization between user contexts, as we will see below. @@ -289,18 +281,17 @@ If you have a data structure which is only ever accessed from - user context, then you can use a simple semaphore - (linux/linux/semaphore.h) to protect it. This - is the most trivial case: you initialize the semaphore to the number - of resources available (usually 1), and call - down_interruptible() to grab the semaphore, and - up() to release it. There is also a - down(), which should be avoided, because it + user context, then you can use a simple mutex + (include/linux/mutex.h) to protect it. This + is the most trivial case: you initialize the mutex. Then you can + call mutex_lock_interruptible() to grab the mutex, + and mutex_unlock() to release it. There is also a + mutex_lock(), which should be avoided, because it will not return if a signal is received. - Example: linux/net/core/netfilter.c allows + Example: net/netfilter/nf_sockopt.c allows registration of new setsockopt() and getsockopt() calls, with nf_register_sockopt(). Registration and @@ -515,7 +506,7 @@ If you are in a process context (any syscall) and want to - lock other process out, use a semaphore. You can take a semaphore + lock other process out, use a mutex. You can take a mutex and sleep (copy_from_user*( or kmalloc(x,GFP_KERNEL)). @@ -662,7 +653,7 @@ SLBH SLBH SLBH -DI +MLI None @@ -692,8 +683,8 @@ spin_lock_bh -DI -down_interruptible +MLI +mutex_lock_interruptible @@ -1310,7 +1301,7 @@ as Alan Cox says, Lock data, not code. There is a coding bug where a piece of code tries to grab a spinlock twice: it will spin forever, waiting for the lock to - be released (spinlocks, rwlocks and semaphores are not + be released (spinlocks, rwlocks and mutexes are not recursive in Linux). This is trivial to diagnose: not a stay-up-five-nights-talk-to-fluffy-code-bunnies kind of problem. @@ -1335,7 +1326,7 @@ as Alan Cox says, Lock data, not code. This complete lockup is easy to diagnose: on SMP boxes the - watchdog timer or compiling with DEBUG_SPINLOCKS set + watchdog timer or compiling with DEBUG_SPINLOCK set (include/linux/spinlock.h) will show this up immediately when it happens. @@ -1558,7 +1549,7 @@ the amount of locking which needs to be done. Read/Write Lock Variants - Both spinlocks and semaphores have read/write variants: + Both spinlocks and mutexes have read/write variants: rwlock_t and struct rw_semaphore. These divide users into two classes: the readers and the writers. If you are only reading the data, you can get a read lock, but to write to @@ -1681,7 +1672,7 @@ the amount of locking which needs to be done. #include <linux/slab.h> #include <linux/string.h> +#include <linux/rcupdate.h> - #include <linux/semaphore.h> + #include <linux/mutex.h> #include <asm/errno.h> struct object @@ -1913,7 +1904,7 @@ machines due to caching. - put_user() + put_user() @@ -1927,13 +1918,13 @@ machines due to caching. - down_interruptible() and - down() + mutex_lock_interruptible() and + mutex_lock() - There is a down_trylock() which can be + There is a mutex_trylock() which can be used inside interrupt context, as it will not sleep. - up() will also never sleep. + mutex_unlock() will also never sleep. @@ -2023,7 +2014,7 @@ machines due to caching. Prior to 2.5, or when CONFIG_PREEMPT is unset, processes in user context inside the kernel would not - preempt each other (ie. you had that CPU until you have it up, + preempt each other (ie. you had that CPU until you gave it up, except for interrupts). With the addition of CONFIG_PREEMPT in 2.5.4, this changed: when in user context, higher priority tasks can "cut in": spinlocks diff --git a/Documentation/DocBook/procfs-guide.tmpl b/Documentation/DocBook/procfs-guide.tmpl index 1fd6a1ec7591d5f4179cdf2a641f1b055c1f486a..8a5dc6e021ffa8b16b6dc2f997e115e77b1aaf70 100644 --- a/Documentation/DocBook/procfs-guide.tmpl +++ b/Documentation/DocBook/procfs-guide.tmpl @@ -29,12 +29,12 @@ - 1.0  + 1.0 May 30, 2001 Initial revision posted to linux-kernel - 1.1  + 1.1 June 3, 2001 Revised after comments from linux-kernel diff --git a/Documentation/DocBook/uio-howto.tmpl b/Documentation/DocBook/uio-howto.tmpl index fdd7f4f887b75ba7bc96b7ab81b9abc7d3348d73..df87d1b93605ac54cf400bd7b8d44b0866d0789a 100644 --- a/Documentation/DocBook/uio-howto.tmpl +++ b/Documentation/DocBook/uio-howto.tmpl @@ -21,6 +21,18 @@ + + 2006-2008 + Hans-Jürgen Koch. + + + + +This documentation is Free Software licensed under the terms of the +GPL version 2. + + + 2006-12-11 @@ -29,6 +41,12 @@ + + 0.5 + 2008-05-22 + hjk + Added description of write() function. + 0.4 2007-11-26 @@ -57,20 +75,9 @@ - + About this document - - -Copyright and License - - Copyright (c) 2006 by Hans-Jürgen Koch. - -This documentation is Free Software licensed under the terms of the -GPL version 2. - - - Translations @@ -189,6 +196,30 @@ interested in translating it, please email me represents the total interrupt count. You can use this number to figure out if you missed some interrupts. + + For some hardware that has more than one interrupt source internally, + but not separate IRQ mask and status registers, there might be + situations where userspace cannot determine what the interrupt source + was if the kernel handler disables them by writing to the chip's IRQ + register. In such a case, the kernel has to disable the IRQ completely + to leave the chip's register untouched. Now the userspace part can + determine the cause of the interrupt, but it cannot re-enable + interrupts. Another cornercase is chips where re-enabling interrupts + is a read-modify-write operation to a combined IRQ status/acknowledge + register. This would be racy if a new interrupt occurred + simultaneously. + + + To address these problems, UIO also implements a write() function. It + is normally not used and can be ignored for hardware that has only a + single interrupt source or has separate IRQ mask and status registers. + If you need it, however, a write to /dev/uioX + will call the irqcontrol() function implemented + by the driver. You have to write a 32-bit value that is usually either + 0 or 1 to disable or enable interrupts. If a driver does not implement + irqcontrol(), write() will + return with -ENOSYS. + To handle interrupts properly, your custom kernel module can @@ -362,6 +393,14 @@ device is actually used. open(), you will probably also want a custom release() function. + + +int (*irqcontrol)(struct uio_info *info, s32 irq_on) +: Optional. If you need to be able to enable or disable +interrupts from userspace by writing to /dev/uioX, +you can implement this function. The parameter irq_on +will be 0 to disable interrupts and 1 to enable them. + diff --git a/Documentation/HOWTO b/Documentation/HOWTO index 619e8caf30db88508a3f2859d140f41ce363f552..c2371c5a98f99b5eaa785bd0affd6c40187e84e3 100644 --- a/Documentation/HOWTO +++ b/Documentation/HOWTO @@ -358,7 +358,7 @@ Here is a list of some of the different kernel trees available: - pcmcia, Dominik Brodowski git.kernel.org:/pub/scm/linux/kernel/git/brodo/pcmcia-2.6.git - - SCSI, James Bottomley + - SCSI, James Bottomley git.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6.git - x86, Ingo Molnar diff --git a/Documentation/IRQ-affinity.txt b/Documentation/IRQ-affinity.txt index 938d7dd054905edfae6d9bc76ca27ffdfbd42629..b4a615b78403a48f02252b90a41fabb1392fefe4 100644 --- a/Documentation/IRQ-affinity.txt +++ b/Documentation/IRQ-affinity.txt @@ -1,17 +1,26 @@ +ChangeLog: + Started by Ingo Molnar + Update by Max Krasnyansky -SMP IRQ affinity, started by Ingo Molnar - +SMP IRQ affinity /proc/irq/IRQ#/smp_affinity specifies which target CPUs are permitted for a given IRQ source. It's a bitmask of allowed CPUs. It's not allowed to turn off all CPUs, and if an IRQ controller does not support IRQ affinity then the value will not change from the default 0xffffffff. +/proc/irq/default_smp_affinity specifies default affinity mask that applies +to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask +will be set to the default mask. It can then be changed as described above. +Default mask is 0xffffffff. + Here is an example of restricting IRQ44 (eth1) to CPU0-3 then restricting -the IRQ to CPU4-7 (this is an 8-CPU SMP box): +it to CPU4-7 (this is an 8-CPU SMP box): +[root@moon 44]# cd /proc/irq/44 [root@moon 44]# cat smp_affinity ffffffff + [root@moon 44]# echo 0f > smp_affinity [root@moon 44]# cat smp_affinity 0000000f @@ -21,17 +30,27 @@ PING hell (195.4.7.3): 56 data bytes --- hell ping statistics --- 6029 packets transmitted, 6027 packets received, 0% packet loss round-trip min/avg/max = 0.1/0.1/0.4 ms -[root@moon 44]# cat /proc/interrupts | grep 44: - 44: 0 1785 1785 1783 1783 1 -1 0 IO-APIC-level eth1 +[root@moon 44]# cat /proc/interrupts | grep 'CPU\|44:' + CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 + 44: 1068 1785 1785 1783 0 0 0 0 IO-APIC-level eth1 + +As can be seen from the line above IRQ44 was delivered only to the first four +processors (0-3). +Now lets restrict that IRQ to CPU(4-7). + [root@moon 44]# echo f0 > smp_affinity +[root@moon 44]# cat smp_affinity +000000f0 [root@moon 44]# ping -f h PING hell (195.4.7.3): 56 data bytes .. --- hell ping statistics --- 2779 packets transmitted, 2777 packets received, 0% packet loss round-trip min/avg/max = 0.1/0.5/585.4 ms -[root@moon 44]# cat /proc/interrupts | grep 44: - 44: 1068 1785 1785 1784 1784 1069 1070 1069 IO-APIC-level eth1 -[root@moon 44]# +[root@moon 44]# cat /proc/interrupts | 'CPU\|44:' + CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7 + 44: 1068 1785 1785 1783 1784 1069 1070 1069 IO-APIC-level eth1 + +This time around IRQ44 was delivered only to the last four processors. +i.e counters for the CPU0-3 did not change. diff --git a/Documentation/Intel-IOMMU.txt b/Documentation/Intel-IOMMU.txt index c2321903aa09adea7f64c00d300814cc32229d1f..21bc416d887efdfabfe4c03b22639b225d72909c 100644 --- a/Documentation/Intel-IOMMU.txt +++ b/Documentation/Intel-IOMMU.txt @@ -48,7 +48,7 @@ IOVA generation is pretty generic. We used the same technique as vmalloc() but these are not global address spaces, but separate for each domain. Different DMA engines may support different number of domains. -We also allocate gaurd pages with each mapping, so we can attempt to catch +We also allocate guard pages with each mapping, so we can attempt to catch any overflow that might happen. @@ -112,4 +112,4 @@ TBD - For compatibility testing, could use unity map domain for all devices, just provide a 1-1 for all useful memory under a single domain for all devices. -- API for paravirt ops for abstracting functionlity for VMM folks. +- API for paravirt ops for abstracting functionality for VMM folks. diff --git a/Documentation/RCU/NMI-RCU.txt b/Documentation/RCU/NMI-RCU.txt index c64158ecde4371bd79b7fc9f43753fee50084546..a6d32e65d222bbea68cba1c133db87c459c99dec 100644 --- a/Documentation/RCU/NMI-RCU.txt +++ b/Documentation/RCU/NMI-RCU.txt @@ -93,6 +93,9 @@ Since NMI handlers disable preemption, synchronize_sched() is guaranteed not to return until all ongoing NMI handlers exit. It is therefore safe to free up the handler's data as soon as synchronize_sched() returns. +Important note: for this to work, the architecture in question must +invoke irq_enter() and irq_exit() on NMI entry and exit, respectively. + Answer to Quick Quiz diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt index 39ad8f56783a0faded737756afe6688bb6ae76be..9f711d2df91b00bd85f9d97debfa967c136924c5 100644 --- a/Documentation/RCU/RTFP.txt +++ b/Documentation/RCU/RTFP.txt @@ -52,6 +52,10 @@ of each iteration. Unfortunately, chaotic relaxation requires highly structured data, such as the matrices used in scientific programs, and is thus inapplicable to most data structures in operating-system kernels. +In 1992, Henry (now Alexia) Massalin completed a dissertation advising +parallel programmers to defer processing when feasible to simplify +synchronization. RCU makes extremely heavy use of this advice. + In 1993, Jacobson [Jacobson93] verbally described what is perhaps the simplest deferred-free technique: simply waiting a fixed amount of time before freeing blocks awaiting deferred free. Jacobson did not describe @@ -138,6 +142,13 @@ blocking in read-side critical sections appeared [PaulEMcKenney2006c], Robert Olsson described an RCU-protected trie-hash combination [RobertOlsson2006a]. +2007 saw the journal version of the award-winning RCU paper from 2006 +[ThomasEHart2007a], as well as a paper demonstrating use of Promela +and Spin to mechanically verify an optimization to Oleg Nesterov's +QRCU [PaulEMcKenney2007QRCUspin], a design document describing +preemptible RCU [PaulEMcKenney2007PreemptibleRCU], and the three-part +LWN "What is RCU?" series [PaulEMcKenney2007WhatIsRCUFundamentally, +PaulEMcKenney2008WhatIsRCUUsage, and PaulEMcKenney2008WhatIsRCUAPI]. Bibtex Entries @@ -202,6 +213,20 @@ Bibtex Entries ,Year="1991" } +@phdthesis{HMassalinPhD +,author="H. Massalin" +,title="Synthesis: An Efficient Implementation of Fundamental Operating +System Services" +,school="Columbia University" +,address="New York, NY" +,year="1992" +,annotation=" + Mondo optimizing compiler. + Wait-free stuff. + Good advice: defer work to avoid synchronization. +" +} + @unpublished{Jacobson93 ,author="Van Jacobson" ,title="Avoid Read-Side Locking Via Delayed Free" @@ -635,3 +660,86 @@ Revised: " } +@unpublished{PaulEMcKenney2007PreemptibleRCU +,Author="Paul E. McKenney" +,Title="The design of preemptible read-copy-update" +,month="October" +,day="8" +,year="2007" +,note="Available: +\url{http://lwn.net/Articles/253651/} +[Viewed October 25, 2007]" +,annotation=" + LWN article describing the design of preemptible RCU. +" +} + +######################################################################## +# +# "What is RCU?" LWN series. +# + +@unpublished{PaulEMcKenney2007WhatIsRCUFundamentally +,Author="Paul E. McKenney and Jonathan Walpole" +,Title="What is {RCU}, Fundamentally?" +,month="December" +,day="17" +,year="2007" +,note="Available: +\url{http://lwn.net/Articles/262464/} +[Viewed December 27, 2007]" +,annotation=" + Lays out the three basic components of RCU: (1) publish-subscribe, + (2) wait for pre-existing readers to complete, and (2) maintain + multiple versions. +" +} + +@unpublished{PaulEMcKenney2008WhatIsRCUUsage +,Author="Paul E. McKenney" +,Title="What is {RCU}? Part 2: Usage" +,month="January" +,day="4" +,year="2008" +,note="Available: +\url{http://lwn.net/Articles/263130/} +[Viewed January 4, 2008]" +,annotation=" + Lays out six uses of RCU: + 1. RCU is a Reader-Writer Lock Replacement + 2. RCU is a Restricted Reference-Counting Mechanism + 3. RCU is a Bulk Reference-Counting Mechanism + 4. RCU is a Poor Man's Garbage Collector + 5. RCU is a Way of Providing Existence Guarantees + 6. RCU is a Way of Waiting for Things to Finish +" +} + +@unpublished{PaulEMcKenney2008WhatIsRCUAPI +,Author="Paul E. McKenney" +,Title="{RCU} part 3: the {RCU} {API}" +,month="January" +,day="17" +,year="2008" +,note="Available: +\url{http://lwn.net/Articles/264090/} +[Viewed January 10, 2008]" +,annotation=" + Gives an overview of the Linux-kernel RCU API and a brief annotated RCU + bibliography. +" +} + +@article{DinakarGuniguntala2008IBMSysJ +,author="D. Guniguntala and P. E. McKenney and J. Triplett and J. Walpole" +,title="The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with {Linux}" +,Year="2008" +,Month="April" +,journal="IBM Systems Journal" +,volume="47" +,number="2" +,pages="@@-@@" +,annotation=" + RCU, realtime RCU, sleepable RCU, performance. +" +} diff --git a/Documentation/RCU/checklist.txt b/Documentation/RCU/checklist.txt index 42b01bc2e1b4f01f414b340a6204fb3ea1087953..cf5562cbe35642834f28d6fca3409dffebb5c0c4 100644 --- a/Documentation/RCU/checklist.txt +++ b/Documentation/RCU/checklist.txt @@ -13,10 +13,13 @@ over a rather long period of time, but improvements are always welcome! detailed performance measurements show that RCU is nonetheless the right tool for the job. - The other exception would be where performance is not an issue, - and RCU provides a simpler implementation. An example of this - situation is the dynamic NMI code in the Linux 2.6 kernel, - at least on architectures where NMIs are rare. + Another exception is where performance is not an issue, and RCU + provides a simpler implementation. An example of this situation + is the dynamic NMI code in the Linux 2.6 kernel, at least on + architectures where NMIs are rare. + + Yet another exception is where the low real-time latency of RCU's + read-side primitives is critically important. 1. Does the update code have proper mutual exclusion? @@ -39,9 +42,10 @@ over a rather long period of time, but improvements are always welcome! 2. Do the RCU read-side critical sections make proper use of rcu_read_lock() and friends? These primitives are needed - to suppress preemption (or bottom halves, in the case of - rcu_read_lock_bh()) in the read-side critical sections, - and are also an excellent aid to readability. + to prevent grace periods from ending prematurely, which + could result in data being unceremoniously freed out from + under your read-side code, which can greatly increase the + actuarial risk of your kernel. As a rough rule of thumb, any dereference of an RCU-protected pointer must be covered by rcu_read_lock() or rcu_read_lock_bh() @@ -54,15 +58,30 @@ over a rather long period of time, but improvements are always welcome! be running while updates are in progress. There are a number of ways to handle this concurrency, depending on the situation: - a. Make updates appear atomic to readers. For example, + a. Use the RCU variants of the list and hlist update + primitives to add, remove, and replace elements on an + RCU-protected list. Alternatively, use the RCU-protected + trees that have been added to the Linux kernel. + + This is almost always the best approach. + + b. Proceed as in (a) above, but also maintain per-element + locks (that are acquired by both readers and writers) + that guard per-element state. Of course, fields that + the readers refrain from accessing can be guarded by the + update-side lock. + + This works quite well, also. + + c. Make updates appear atomic to readers. For example, pointer updates to properly aligned fields will appear atomic, as will individual atomic primitives. Operations performed under a lock and sequences of multiple atomic primitives will -not- appear to be atomic. - This is almost always the best approach. + This can work, but is starting to get a bit tricky. - b. Carefully order the updates and the reads so that + d. Carefully order the updates and the reads so that readers see valid data at all phases of the update. This is often more difficult than it sounds, especially given modern CPUs' tendency to reorder memory references. @@ -123,18 +142,22 @@ over a rather long period of time, but improvements are always welcome! when publicizing a pointer to a structure that can be traversed by an RCU read-side critical section. -5. If call_rcu(), or a related primitive such as call_rcu_bh(), - is used, the callback function must be written to be called - from softirq context. In particular, it cannot block. +5. If call_rcu(), or a related primitive such as call_rcu_bh() or + call_rcu_sched(), is used, the callback function must be + written to be called from softirq context. In particular, + it cannot block. 6. Since synchronize_rcu() can block, it cannot be called from - any sort of irq context. + any sort of irq context. Ditto for synchronize_sched() and + synchronize_srcu(). 7. If the updater uses call_rcu(), then the corresponding readers must use rcu_read_lock() and rcu_read_unlock(). If the updater uses call_rcu_bh(), then the corresponding readers must use - rcu_read_lock_bh() and rcu_read_unlock_bh(). Mixing things up - will result in confusion and broken kernels. + rcu_read_lock_bh() and rcu_read_unlock_bh(). If the updater + uses call_rcu_sched(), then the corresponding readers must + disable preemption. Mixing things up will result in confusion + and broken kernels. One exception to this rule: rcu_read_lock() and rcu_read_unlock() may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh() @@ -143,9 +166,9 @@ over a rather long period of time, but improvements are always welcome! such cases is a must, of course! And the jury is still out on whether the increased speed is worth it. -8. Although synchronize_rcu() is a bit slower than is call_rcu(), - it usually results in simpler code. So, unless update - performance is critically important or the updaters cannot block, +8. Although synchronize_rcu() is slower than is call_rcu(), it + usually results in simpler code. So, unless update performance + is critically important or the updaters cannot block, synchronize_rcu() should be used in preference to call_rcu(). An especially important property of the synchronize_rcu() @@ -187,23 +210,23 @@ over a rather long period of time, but improvements are always welcome! number of updates per grace period. 9. All RCU list-traversal primitives, which include - list_for_each_rcu(), list_for_each_entry_rcu(), + rcu_dereference(), list_for_each_rcu(), list_for_each_entry_rcu(), list_for_each_continue_rcu(), and list_for_each_safe_rcu(), - must be within an RCU read-side critical section. RCU + must be either within an RCU read-side critical section or + must be protected by appropriate update-side locks. RCU read-side critical sections are delimited by rcu_read_lock() and rcu_read_unlock(), or by similar primitives such as rcu_read_lock_bh() and rcu_read_unlock_bh(). - Use of the _rcu() list-traversal primitives outside of an - RCU read-side critical section causes no harm other than - a slight performance degradation on Alpha CPUs. It can - also be quite helpful in reducing code bloat when common - code is shared between readers and updaters. + The reason that it is permissible to use RCU list-traversal + primitives when the update-side lock is held is that doing so + can be quite helpful in reducing code bloat when common code is + shared between readers and updaters. 10. Conversely, if you are in an RCU read-side critical section, - you -must- use the "_rcu()" variants of the list macros. - Failing to do so will break Alpha and confuse people reading - your code. + and you don't hold the appropriate update-side lock, you -must- + use the "_rcu()" variants of the list macros. Failing to do so + will break Alpha and confuse people reading your code. 11. Note that synchronize_rcu() -only- guarantees to wait until all currently executing rcu_read_lock()-protected RCU read-side @@ -230,6 +253,14 @@ over a rather long period of time, but improvements are always welcome! must use whatever locking or other synchronization is required to safely access and/or modify that data structure. + RCU callbacks are -usually- executed on the same CPU that executed + the corresponding call_rcu(), call_rcu_bh(), or call_rcu_sched(), + but are by -no- means guaranteed to be. For example, if a given + CPU goes offline while having an RCU callback pending, then that + RCU callback will execute on some surviving CPU. (If this was + not the case, a self-spawning RCU callback would prevent the + victim CPU from ever going offline.) + 14. SRCU (srcu_read_lock(), srcu_read_unlock(), and synchronize_srcu()) may only be invoked from process context. Unlike other forms of RCU, it -is- permissible to block in an SRCU read-side critical diff --git a/Documentation/RCU/torture.txt b/Documentation/RCU/torture.txt index 2967a65269d8af7702dbe76f4780e14d91dd9061..a342b6e1cc10e900dcc9453f65f193065fe8ef42 100644 --- a/Documentation/RCU/torture.txt +++ b/Documentation/RCU/torture.txt @@ -10,23 +10,30 @@ status messages via printk(), which can be examined via the dmesg command (perhaps grepping for "torture"). The test is started when the module is loaded, and stops when the module is unloaded. -However, actually setting this config option to "y" results in the system -running the test immediately upon boot, and ending only when the system -is taken down. Normally, one will instead want to build the system -with CONFIG_RCU_TORTURE_TEST=m and to use modprobe and rmmod to control -the test, perhaps using a script similar to the one shown at the end of -this document. Note that you will need CONFIG_MODULE_UNLOAD in order -to be able to end the test. +CONFIG_RCU_TORTURE_TEST_RUNNABLE + +It is also possible to specify CONFIG_RCU_TORTURE_TEST=y, which will +result in the tests being loaded into the base kernel. In this case, +the CONFIG_RCU_TORTURE_TEST_RUNNABLE config option is used to specify +whether the RCU torture tests are to be started immediately during +boot or whether the /proc/sys/kernel/rcutorture_runnable file is used +to enable them. This /proc file can be used to repeatedly pause and +restart the tests, regardless of the initial state specified by the +CONFIG_RCU_TORTURE_TEST_RUNNABLE config option. + +You will normally -not- want to start the RCU torture tests during boot +(and thus the default is CONFIG_RCU_TORTURE_TEST_RUNNABLE=n), but doing +this can sometimes be useful in finding boot-time bugs. MODULE PARAMETERS This module has the following parameters: -nreaders This is the number of RCU reading threads supported. - The default is twice the number of CPUs. Why twice? - To properly exercise RCU implementations with preemptible - read-side critical sections. +irqreaders Says to invoke RCU readers from irq level. This is currently + done via timers. Defaults to "1" for variants of RCU that + permit this. (Or, more accurately, variants of RCU that do + -not- permit this know to ignore this variable.) nfakewriters This is the number of RCU fake writer threads to run. Fake writer threads repeatedly use the synchronous "wait for @@ -37,6 +44,16 @@ nfakewriters This is the number of RCU fake writer threads to run. Fake to trigger special cases caused by multiple writers, such as the synchronize_srcu() early return optimization. +nreaders This is the number of RCU reading threads supported. + The default is twice the number of CPUs. Why twice? + To properly exercise RCU implementations with preemptible + read-side critical sections. + +shuffle_interval + The number of seconds to keep the test threads affinitied + to a particular subset of the CPUs, defaults to 3 seconds. + Used in conjunction with test_no_idle_hz. + stat_interval The number of seconds between output of torture statistics (via printk()). Regardless of the interval, statistics are printed when the module is unloaded. @@ -44,10 +61,11 @@ stat_interval The number of seconds between output of torture be printed -only- when the module is unloaded, and this is the default. -shuffle_interval - The number of seconds to keep the test threads affinitied - to a particular subset of the CPUs, defaults to 5 seconds. - Used in conjunction with test_no_idle_hz. +stutter The length of time to run the test before pausing for this + same period of time. Defaults to "stutter=5", so as + to run and pause for (roughly) five-second intervals. + Specifying "stutter=0" causes the test to run continuously + without pausing, which is the old default behavior. test_no_idle_hz Whether or not to test the ability of RCU to operate in a kernel that disables the scheduling-clock interrupt to diff --git a/Documentation/RCU/whatisRCU.txt b/Documentation/RCU/whatisRCU.txt index e0d6d99b8f9bb0dc17f647dbd8256aad1282dd2d..e04d643a9f57a802e59057165f719f36b5ebf5ab 100644 --- a/Documentation/RCU/whatisRCU.txt +++ b/Documentation/RCU/whatisRCU.txt @@ -1,3 +1,11 @@ +Please note that the "What is RCU?" LWN series is an excellent place +to start learning about RCU: + +1. What is RCU, Fundamentally? http://lwn.net/Articles/262464/ +2. What is RCU? Part 2: Usage http://lwn.net/Articles/263130/ +3. RCU part 3: the RCU API http://lwn.net/Articles/264090/ + + What is RCU? RCU is a synchronization mechanism that was added to the Linux kernel @@ -772,26 +780,18 @@ Linux-kernel source code, but it helps to have a full list of the APIs, since there does not appear to be a way to categorize them in docbook. Here is the list, by category. -Markers for RCU read-side critical sections: - - rcu_read_lock - rcu_read_unlock - rcu_read_lock_bh - rcu_read_unlock_bh - srcu_read_lock - srcu_read_unlock - RCU pointer/list traversal: rcu_dereference + list_for_each_entry_rcu + hlist_for_each_entry_rcu + list_for_each_rcu (to be deprecated in favor of list_for_each_entry_rcu) - list_for_each_entry_rcu list_for_each_continue_rcu (to be deprecated in favor of new list_for_each_entry_continue_rcu) - hlist_for_each_entry_rcu -RCU pointer update: +RCU pointer/list update: rcu_assign_pointer list_add_rcu @@ -799,16 +799,36 @@ RCU pointer update: list_del_rcu list_replace_rcu hlist_del_rcu + hlist_add_after_rcu + hlist_add_before_rcu hlist_add_head_rcu + hlist_replace_rcu + list_splice_init_rcu() -RCU grace period: +RCU: Critical sections Grace period Barrier + + rcu_read_lock synchronize_net rcu_barrier + rcu_read_unlock synchronize_rcu + call_rcu + + +bh: Critical sections Grace period Barrier + + rcu_read_lock_bh call_rcu_bh rcu_barrier_bh + rcu_read_unlock_bh + + +sched: Critical sections Grace period Barrier + + [preempt_disable] synchronize_sched rcu_barrier_sched + [and friends] call_rcu_sched + + +SRCU: Critical sections Grace period Barrier + + srcu_read_lock synchronize_srcu N/A + srcu_read_unlock - synchronize_net - synchronize_sched - synchronize_rcu - synchronize_srcu - call_rcu - call_rcu_bh See the comment headers in the source code (or the docbook generated from them) for more information. diff --git a/Documentation/SubmittingPatches b/Documentation/SubmittingPatches index 118ca6e9404f47ded06c7ee3a287003d00377e56..f79ad9ff6031aa4ee622d9f0be3e0c1604e2d14b 100644 --- a/Documentation/SubmittingPatches +++ b/Documentation/SubmittingPatches @@ -528,7 +528,33 @@ See more details on the proper patch format in the following references. +16) Sending "git pull" requests (from Linus emails) +Please write the git repo address and branch name alone on the same line +so that I can't even by mistake pull from the wrong branch, and so +that a triple-click just selects the whole thing. + +So the proper format is something along the lines of: + + "Please pull from + + git://jdelvare.pck.nerim.net/jdelvare-2.6 i2c-for-linus + + to get these changes:" + +so that I don't have to hunt-and-peck for the address and inevitably +get it wrong (actually, I've only gotten it wrong a few times, and +checking against the diffstat tells me when I get it wrong, but I'm +just a lot more comfortable when I don't have to "look for" the right +thing to pull, and double-check that I have the right branch-name). + + +Please use "git diff -M --stat --summary" to generate the diffstat: +the -M enables rename detection, and the summary enables a summary of +new/deleted or renamed files. + +With rename detection, the statistics are rather different [...] +because git will notice that a fair number of the changes are renames. ----------------------------------- SECTION 2 - HINTS, TIPS, AND TRICKS diff --git a/Documentation/accounting/delay-accounting.txt b/Documentation/accounting/delay-accounting.txt index 1443cd71d2631241f13286e544296ef286d91c90..8a12f0730c94da018615aebc8e657daf65eadd80 100644 --- a/Documentation/accounting/delay-accounting.txt +++ b/Documentation/accounting/delay-accounting.txt @@ -11,6 +11,7 @@ the delays experienced by a task while a) waiting for a CPU (while being runnable) b) completion of synchronous block I/O initiated by the task c) swapping in pages +d) memory reclaim and makes these statistics available to userspace through the taskstats interface. @@ -41,7 +42,7 @@ this structure. See include/linux/taskstats.h for a description of the fields pertaining to delay accounting. It will generally be in the form of counters returning the cumulative -delay seen for cpu, sync block I/O, swapin etc. +delay seen for cpu, sync block I/O, swapin, memory reclaim etc. Taking the difference of two successive readings of a given counter (say cpu_delay_total) for a task will give the delay @@ -94,7 +95,9 @@ CPU count real total virtual total delay total 7876 92005750 100000000 24001500 IO count delay total 0 0 -MEM count delay total +SWAP count delay total + 0 0 +RECLAIM count delay total 0 0 Get delays seen in executing a given simple command @@ -108,5 +111,7 @@ CPU count real total virtual total delay total 6 4000250 4000000 0 IO count delay total 0 0 -MEM count delay total +SWAP count delay total + 0 0 +RECLAIM count delay total 0 0 diff --git a/Documentation/accounting/getdelays.c b/Documentation/accounting/getdelays.c index 40121b5cca14cab3993000c53078ef2d8484f001..3f7755f3963f11fd31ba598a8f6199371c87202f 100644 --- a/Documentation/accounting/getdelays.c +++ b/Documentation/accounting/getdelays.c @@ -196,14 +196,18 @@ void print_delayacct(struct taskstats *t) " %15llu%15llu%15llu%15llu\n" "IO %15s%15s\n" " %15llu%15llu\n" - "MEM %15s%15s\n" + "SWAP %15s%15s\n" + " %15llu%15llu\n" + "RECLAIM %12s%15s\n" " %15llu%15llu\n", "count", "real total", "virtual total", "delay total", t->cpu_count, t->cpu_run_real_total, t->cpu_run_virtual_total, t->cpu_delay_total, "count", "delay total", t->blkio_count, t->blkio_delay_total, - "count", "delay total", t->swapin_count, t->swapin_delay_total); + "count", "delay total", t->swapin_count, t->swapin_delay_total, + "count", "delay total", + t->freepages_count, t->freepages_delay_total); } void task_context_switch_counts(struct taskstats *t) diff --git a/Documentation/accounting/taskstats-struct.txt b/Documentation/accounting/taskstats-struct.txt index cd784f46bf8abefb9ed24257aaf5fcf4df2ecb00..e7512c061c1572f5127b7bb861ded0f0515bc6af 100644 --- a/Documentation/accounting/taskstats-struct.txt +++ b/Documentation/accounting/taskstats-struct.txt @@ -6,7 +6,7 @@ This document contains an explanation of the struct taskstats fields. There are three different groups of fields in the struct taskstats: 1) Common and basic accounting fields - If CONFIG_TASKSTATS is set, the taskstats inteface is enabled and + If CONFIG_TASKSTATS is set, the taskstats interface is enabled and the common fields and basic accounting fields are collected for delivery at do_exit() of a task. 2) Delay accounting fields @@ -26,6 +26,8 @@ There are three different groups of fields in the struct taskstats: 5) Time accounting for SMT machines +6) Extended delay accounting fields for memory reclaim + Future extension should add fields to the end of the taskstats struct, and should not change the relative position of each field within the struct. @@ -170,4 +172,9 @@ struct taskstats { __u64 ac_utimescaled; /* utime scaled on frequency etc */ __u64 ac_stimescaled; /* stime scaled on frequency etc */ __u64 cpu_scaled_run_real_total; /* scaled cpu_run_real_total */ + +6) Extended delay accounting fields for memory reclaim + /* Delay waiting for memory reclaim */ + __u64 freepages_count; + __u64 freepages_delay_total; } diff --git a/Documentation/arm/Interrupts b/Documentation/arm/Interrupts index 0d3dbf1099bcc90cae1b364002ef32e15dcdc06a..c202ed35d7d610dd3c399b50fdb65796917f1544 100644 --- a/Documentation/arm/Interrupts +++ b/Documentation/arm/Interrupts @@ -138,14 +138,8 @@ So, what's changed? Set active the IRQ edge(s)/level. This replaces the SA1111 INTPOL manipulation, and the set_GPIO_IRQ_edge() - function. Type should be one of the following: - - #define IRQT_NOEDGE (0) - #define IRQT_RISING (__IRQT_RISEDGE) - #define IRQT_FALLING (__IRQT_FALEDGE) - #define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) - #define IRQT_LOW (__IRQT_LOWLVL) - #define IRQT_HIGH (__IRQT_HIGHLVL) + function. Type should be one of IRQ_TYPE_xxx defined in + 3. set_GPIO_IRQ_edge() is obsolete, and should be replaced by set_irq_type. diff --git a/Documentation/block/data-integrity.txt b/Documentation/block/data-integrity.txt new file mode 100644 index 0000000000000000000000000000000000000000..e9dc8d86adc7c51e4f1f06598a5a2c4b3eb5cabb --- /dev/null +++ b/Documentation/block/data-integrity.txt @@ -0,0 +1,327 @@ +---------------------------------------------------------------------- +1. INTRODUCTION + +Modern filesystems feature checksumming of data and metadata to +protect against data corruption. However, the detection of the +corruption is done at read time which could potentially be months +after the data was written. At that point the original data that the +application tried to write is most likely lost. + +The solution is to ensure that the disk is actually storing what the +application meant it to. Recent additions to both the SCSI family +protocols (SBC Data Integrity Field, SCC protection proposal) as well +as SATA/T13 (External Path Protection) try to remedy this by adding +support for appending integrity metadata to an I/O. The integrity +metadata (or protection information in SCSI terminology) includes a +checksum for each sector as well as an incrementing counter that +ensures the individual sectors are written in the right order. And +for some protection schemes also that the I/O is written to the right +place on disk. + +Current storage controllers and devices implement various protective +measures, for instance checksumming and scrubbing. But these +technologies are working in their own isolated domains or at best +between adjacent nodes in the I/O path. The interesting thing about +DIF and the other integrity extensions is that the protection format +is well defined and every node in the I/O path can verify the +integrity of the I/O and reject it if corruption is detected. This +allows not only corruption prevention but also isolation of the point +of failure. + +---------------------------------------------------------------------- +2. THE DATA INTEGRITY EXTENSIONS + +As written, the protocol extensions only protect the path between +controller and storage device. However, many controllers actually +allow the operating system to interact with the integrity metadata +(IMD). We have been working with several FC/SAS HBA vendors to enable +the protection information to be transferred to and from their +controllers. + +The SCSI Data Integrity Field works by appending 8 bytes of protection +information to each sector. The data + integrity metadata is stored +in 520 byte sectors on disk. Data + IMD are interleaved when +transferred between the controller and target. The T13 proposal is +similar. + +Because it is highly inconvenient for operating systems to deal with +520 (and 4104) byte sectors, we approached several HBA vendors and +encouraged them to allow separation of the data and integrity metadata +scatter-gather lists. + +The controller will interleave the buffers on write and split them on +read. This means that the Linux can DMA the data buffers to and from +host memory without changes to the page cache. + +Also, the 16-bit CRC checksum mandated by both the SCSI and SATA specs +is somewhat heavy to compute in software. Benchmarks found that +calculating this checksum had a significant impact on system +performance for a number of workloads. Some controllers allow a +lighter-weight checksum to be used when interfacing with the operating +system. Emulex, for instance, supports the TCP/IP checksum instead. +The IP checksum received from the OS is converted to the 16-bit CRC +when writing and vice versa. This allows the integrity metadata to be +generated by Linux or the application at very low cost (comparable to +software RAID5). + +The IP checksum is weaker than the CRC in terms of detecting bit +errors. However, the strength is really in the separation of the data +buffers and the integrity metadata. These two distinct buffers much +match up for an I/O to complete. + +The separation of the data and integrity metadata buffers as well as +the choice in checksums is referred to as the Data Integrity +Extensions. As these extensions are outside the scope of the protocol +bodies (T10, T13), Oracle and its partners are trying to standardize +them within the Storage Networking Industry Association. + +---------------------------------------------------------------------- +3. KERNEL CHANGES + +The data integrity framework in Linux enables protection information +to be pinned to I/Os and sent to/received from controllers that +support it. + +The advantage to the integrity extensions in SCSI and SATA is that +they enable us to protect the entire path from application to storage +device. However, at the same time this is also the biggest +disadvantage. It means that the protection information must be in a +format that can be understood by the disk. + +Generally Linux/POSIX applications are agnostic to the intricacies of +the storage devices they are accessing. The virtual filesystem switch +and the block layer make things like hardware sector size and +transport protocols completely transparent to the application. + +However, this level of detail is required when preparing the +protection information to send to a disk. Consequently, the very +concept of an end-to-end protection scheme is a layering violation. +It is completely unreasonable for an application to be aware whether +it is accessing a SCSI or SATA disk. + +The data integrity support implemented in Linux attempts to hide this +from the application. As far as the application (and to some extent +the kernel) is concerned, the integrity metadata is opaque information +that's attached to the I/O. + +The current implementation allows the block layer to automatically +generate the protection information for any I/O. Eventually the +intent is to move the integrity metadata calculation to userspace for +user data. Metadata and other I/O that originates within the kernel +will still use the automatic generation interface. + +Some storage devices allow each hardware sector to be tagged with a +16-bit value. The owner of this tag space is the owner of the block +device. I.e. the filesystem in most cases. The filesystem can use +this extra space to tag sectors as they see fit. Because the tag +space is limited, the block interface allows tagging bigger chunks by +way of interleaving. This way, 8*16 bits of information can be +attached to a typical 4KB filesystem block. + +This also means that applications such as fsck and mkfs will need +access to manipulate the tags from user space. A passthrough +interface for this is being worked on. + + +---------------------------------------------------------------------- +4. BLOCK LAYER IMPLEMENTATION DETAILS + +4.1 BIO + +The data integrity patches add a new field to struct bio when +CONFIG_BLK_DEV_INTEGRITY is enabled. bio->bi_integrity is a pointer +to a struct bip which contains the bio integrity payload. Essentially +a bip is a trimmed down struct bio which holds a bio_vec containing +the integrity metadata and the required housekeeping information (bvec +pool, vector count, etc.) + +A kernel subsystem can enable data integrity protection on a bio by +calling bio_integrity_alloc(bio). This will allocate and attach the +bip to the bio. + +Individual pages containing integrity metadata can subsequently be +attached using bio_integrity_add_page(). + +bio_free() will automatically free the bip. + + +4.2 BLOCK DEVICE + +Because the format of the protection data is tied to the physical +disk, each block device has been extended with a block integrity +profile (struct blk_integrity). This optional profile is registered +with the block layer using blk_integrity_register(). + +The profile contains callback functions for generating and verifying +the protection data, as well as getting and setting application tags. +The profile also contains a few constants to aid in completing, +merging and splitting the integrity metadata. + +Layered block devices will need to pick a profile that's appropriate +for all subdevices. blk_integrity_compare() can help with that. DM +and MD linear, RAID0 and RAID1 are currently supported. RAID4/5/6 +will require extra work due to the application tag. + + +---------------------------------------------------------------------- +5.0 BLOCK LAYER INTEGRITY API + +5.1 NORMAL FILESYSTEM + + The normal filesystem is unaware that the underlying block device + is capable of sending/receiving integrity metadata. The IMD will + be automatically generated by the block layer at submit_bio() time + in case of a WRITE. A READ request will cause the I/O integrity + to be verified upon completion. + + IMD generation and verification can be toggled using the + + /sys/block//integrity/write_generate + + and + + /sys/block//integrity/read_verify + + flags. + + +5.2 INTEGRITY-AWARE FILESYSTEM + + A filesystem that is integrity-aware can prepare I/Os with IMD + attached. It can also use the application tag space if this is + supported by the block device. + + + int bdev_integrity_enabled(block_device, int rw); + + bdev_integrity_enabled() will return 1 if the block device + supports integrity metadata transfer for the data direction + specified in 'rw'. + + bdev_integrity_enabled() honors the write_generate and + read_verify flags in sysfs and will respond accordingly. + + + int bio_integrity_prep(bio); + + To generate IMD for WRITE and to set up buffers for READ, the + filesystem must call bio_integrity_prep(bio). + + Prior to calling this function, the bio data direction and start + sector must be set, and the bio should have all data pages + added. It is up to the caller to ensure that the bio does not + change while I/O is in progress. + + bio_integrity_prep() should only be called if + bio_integrity_enabled() returned 1. + + + int bio_integrity_tag_size(bio); + + If the filesystem wants to use the application tag space it will + first have to find out how much storage space is available. + Because tag space is generally limited (usually 2 bytes per + sector regardless of sector size), the integrity framework + supports interleaving the information between the sectors in an + I/O. + + Filesystems can call bio_integrity_tag_size(bio) to find out how + many bytes of storage are available for that particular bio. + + Another option is bdev_get_tag_size(block_device) which will + return the number of available bytes per hardware sector. + + + int bio_integrity_set_tag(bio, void *tag_buf, len); + + After a successful return from bio_integrity_prep(), + bio_integrity_set_tag() can be used to attach an opaque tag + buffer to a bio. Obviously this only makes sense if the I/O is + a WRITE. + + + int bio_integrity_get_tag(bio, void *tag_buf, len); + + Similarly, at READ I/O completion time the filesystem can + retrieve the tag buffer using bio_integrity_get_tag(). + + +6.3 PASSING EXISTING INTEGRITY METADATA + + Filesystems that either generate their own integrity metadata or + are capable of transferring IMD from user space can use the + following calls: + + + struct bip * bio_integrity_alloc(bio, gfp_mask, nr_pages); + + Allocates the bio integrity payload and hangs it off of the bio. + nr_pages indicate how many pages of protection data need to be + stored in the integrity bio_vec list (similar to bio_alloc()). + + The integrity payload will be freed at bio_free() time. + + + int bio_integrity_add_page(bio, page, len, offset); + + Attaches a page containing integrity metadata to an existing + bio. The bio must have an existing bip, + i.e. bio_integrity_alloc() must have been called. For a WRITE, + the integrity metadata in the pages must be in a format + understood by the target device with the notable exception that + the sector numbers will be remapped as the request traverses the + I/O stack. This implies that the pages added using this call + will be modified during I/O! The first reference tag in the + integrity metadata must have a value of bip->bip_sector. + + Pages can be added using bio_integrity_add_page() as long as + there is room in the bip bio_vec array (nr_pages). + + Upon completion of a READ operation, the attached pages will + contain the integrity metadata received from the storage device. + It is up to the receiver to process them and verify data + integrity upon completion. + + +6.4 REGISTERING A BLOCK DEVICE AS CAPABLE OF EXCHANGING INTEGRITY + METADATA + + To enable integrity exchange on a block device the gendisk must be + registered as capable: + + int blk_integrity_register(gendisk, blk_integrity); + + The blk_integrity struct is a template and should contain the + following: + + static struct blk_integrity my_profile = { + .name = "STANDARDSBODY-TYPE-VARIANT-CSUM", + .generate_fn = my_generate_fn, + .verify_fn = my_verify_fn, + .get_tag_fn = my_get_tag_fn, + .set_tag_fn = my_set_tag_fn, + .tuple_size = sizeof(struct my_tuple_size), + .tag_size = , + }; + + 'name' is a text string which will be visible in sysfs. This is + part of the userland API so chose it carefully and never change + it. The format is standards body-type-variant. + E.g. T10-DIF-TYPE1-IP or T13-EPP-0-CRC. + + 'generate_fn' generates appropriate integrity metadata (for WRITE). + + 'verify_fn' verifies that the data buffer matches the integrity + metadata. + + 'tuple_size' must be set to match the size of the integrity + metadata per sector. I.e. 8 for DIF and EPP. + + 'tag_size' must be set to identify how many bytes of tag space + are available per hardware sector. For DIF this is either 2 or + 0 depending on the value of the Control Mode Page ATO bit. + + See 6.2 for a description of get_tag_fn and set_tag_fn. + +---------------------------------------------------------------------- +2007-12-24 Martin K. Petersen diff --git a/Documentation/bt8xxgpio.txt b/Documentation/bt8xxgpio.txt new file mode 100644 index 0000000000000000000000000000000000000000..d8297e4ebd265eb5dd273bad20162e51d369b25a --- /dev/null +++ b/Documentation/bt8xxgpio.txt @@ -0,0 +1,67 @@ +=============================================================== +== BT8XXGPIO driver == +== == +== A driver for a selfmade cheap BT8xx based PCI GPIO-card == +== == +== For advanced documentation, see == +== http://www.bu3sch.de/btgpio.php == +=============================================================== + + +A generic digital 24-port PCI GPIO card can be built out of an ordinary +Brooktree bt848, bt849, bt878 or bt879 based analog TV tuner card. The +Brooktree chip is used in old analog Hauppauge WinTV PCI cards. You can easily +find them used for low prices on the net. + +The bt8xx chip does have 24 digital GPIO ports. +These ports are accessible via 24 pins on the SMD chip package. + + +============================================== +== How to physically access the GPIO pins == +============================================== + +The are several ways to access these pins. One might unsolder the whole chip +and put it on a custom PCI board, or one might only unsolder each individual +GPIO pin and solder that to some tiny wire. As the chip package really is tiny +there are some advanced soldering skills needed in any case. + +The physical pinouts are drawn in the following ASCII art. +The GPIO pins are marked with G00-G23 + + G G G G G G G G G G G G G G G G G G + 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 + 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 + | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | + --------------------------------------------------------------------------- + --| ^ ^ |-- + --| pin 86 pin 67 |-- + --| |-- + --| pin 61 > |-- G18 + --| |-- G19 + --| |-- G20 + --| |-- G21 + --| |-- G22 + --| pin 56 > |-- G23 + --| |-- + --| Brooktree 878/879 |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| |-- + --| O |-- + --| |-- + --------------------------------------------------------------------------- + | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | + ^ + This is pin 1 + diff --git a/Documentation/controllers/memory.txt b/Documentation/controllers/memory.txt index 866b9cd9a9590d6b6b8c3d577038e8d51234082b..9b53d5827361fd647f3388212e648f502defc698 100644 --- a/Documentation/controllers/memory.txt +++ b/Documentation/controllers/memory.txt @@ -242,8 +242,7 @@ rmdir() if there are no tasks. 1. Add support for accounting huge pages (as a separate controller) 2. Make per-cgroup scanner reclaim not-shared pages first 3. Teach controller to account for shared-pages -4. Start reclamation when the limit is lowered -5. Start reclamation in the background when the limit is +4. Start reclamation in the background when the limit is not yet hit but the usage is getting closer Summary diff --git a/Documentation/cpu-freq/governors.txt b/Documentation/cpu-freq/governors.txt index dcec0564d04075a9751e462968f956385405f283..5b0cfa67aff9c89ebc6d0f9dd4d467e8be8ae71f 100644 --- a/Documentation/cpu-freq/governors.txt +++ b/Documentation/cpu-freq/governors.txt @@ -122,7 +122,7 @@ around '10000' or more. show_sampling_rate_(min|max): the minimum and maximum sampling rates available that you may set 'sampling_rate' to. -up_threshold: defines what the average CPU usaged between the samplings +up_threshold: defines what the average CPU usage between the samplings of 'sampling_rate' needs to be for the kernel to make a decision on whether it should increase the frequency. For example when it is set to its default value of '80' it means that between the checking diff --git a/Documentation/cputopology.txt b/Documentation/cputopology.txt index b61cb9564023b6dc878246fac760280c670d5ccf..bd699da246666a503195ed0d8240fb531b90f746 100644 --- a/Documentation/cputopology.txt +++ b/Documentation/cputopology.txt @@ -14,9 +14,8 @@ represent the thread siblings to cpu X in the same physical package; To implement it in an architecture-neutral way, a new source file, drivers/base/topology.c, is to export the 4 attributes. -If one architecture wants to support this feature, it just needs to -implement 4 defines, typically in file include/asm-XXX/topology.h. -The 4 defines are: +For an architecture to support this feature, it must define some of +these macros in include/asm-XXX/topology.h: #define topology_physical_package_id(cpu) #define topology_core_id(cpu) #define topology_thread_siblings(cpu) @@ -25,17 +24,10 @@ The 4 defines are: The type of **_id is int. The type of siblings is cpumask_t. -To be consistent on all architectures, the 4 attributes should have -default values if their values are unavailable. Below is the rule. -1) physical_package_id: If cpu has no physical package id, -1 is the -default value. -2) core_id: If cpu doesn't support multi-core, its core id is 0. -3) thread_siblings: Just include itself, if the cpu doesn't support -HT/multi-thread. -4) core_siblings: Just include itself, if the cpu doesn't support -multi-core and HT/Multi-thread. - -So be careful when declaring the 4 defines in include/asm-XXX/topology.h. - -If an attribute isn't defined on an architecture, it won't be exported. - +To be consistent on all architectures, include/linux/topology.h +provides default definitions for any of the above macros that are +not defined by include/asm-XXX/topology.h: +1) physical_package_id: -1 +2) core_id: 0 +3) thread_siblings: just the given CPU +4) core_siblings: just the given CPU diff --git a/Documentation/edac.txt b/Documentation/edac.txt index a5c36842ecef4ec103ff7f44b5499ed9963db0c2..8eda3fb664166726163bf59565c9d52c76af6c79 100644 --- a/Documentation/edac.txt +++ b/Documentation/edac.txt @@ -222,74 +222,9 @@ both csrow2 and csrow3 are populated, this indicates a dual ranked set of DIMMs for channels 0 and 1. -Within each of the 'mc','mcX' and 'csrowX' directories are several +Within each of the 'mcX' and 'csrowX' directories are several EDAC control and attribute files. - -============================================================================ -DIRECTORY 'mc' - -In directory 'mc' are EDAC system overall control and attribute files: - - -Panic on UE control file: - - 'edac_mc_panic_on_ue' - - An uncorrectable error will cause a machine panic. This is usually - desirable. It is a bad idea to continue when an uncorrectable error - occurs - it is indeterminate what was uncorrected and the operating - system context might be so mangled that continuing will lead to further - corruption. If the kernel has MCE configured, then EDAC will never - notice the UE. - - LOAD TIME: module/kernel parameter: panic_on_ue=[0|1] - - RUN TIME: echo "1" >/sys/devices/system/edac/mc/edac_mc_panic_on_ue - - -Log UE control file: - - 'edac_mc_log_ue' - - Generate kernel messages describing uncorrectable errors. These errors - are reported through the system message log system. UE statistics - will be accumulated even when UE logging is disabled. - - LOAD TIME: module/kernel parameter: log_ue=[0|1] - - RUN TIME: echo "1" >/sys/devices/system/edac/mc/edac_mc_log_ue - - -Log CE control file: - - 'edac_mc_log_ce' - - Generate kernel messages describing correctable errors. These - errors are reported through the system message log system. - CE statistics will be accumulated even when CE logging is disabled. - - LOAD TIME: module/kernel parameter: log_ce=[0|1] - - RUN TIME: echo "1" >/sys/devices/system/edac/mc/edac_mc_log_ce - - -Polling period control file: - - 'edac_mc_poll_msec' - - The time period, in milliseconds, for polling for error information. - Too small a value wastes resources. Too large a value might delay - necessary handling of errors and might loose valuable information for - locating the error. 1000 milliseconds (once each second) is the current - default. Systems which require all the bandwidth they can get, may - increase this. - - LOAD TIME: module/kernel parameter: poll_msec=[0|1] - - RUN TIME: echo "1000" >/sys/devices/system/edac/mc/edac_mc_poll_msec - - ============================================================================ 'mcX' DIRECTORIES @@ -392,7 +327,7 @@ Sdram memory scrubbing rate: 'sdram_scrub_rate' Read/Write attribute file that controls memory scrubbing. The scrubbing - rate is set by writing a minimum bandwith in bytes/sec to the attribute + rate is set by writing a minimum bandwidth in bytes/sec to the attribute file. The rate will be translated to an internal value that gives at least the specified rate. @@ -537,7 +472,6 @@ Channel 1 DIMM Label control file: motherboard specific and determination of this information must occur in userland at this time. - ============================================================================ SYSTEM LOGGING @@ -570,7 +504,6 @@ error type, a notice of "no info" and then an optional, driver-specific error message. - ============================================================================ PCI Bus Parity Detection @@ -604,6 +537,74 @@ Enable/Disable PCI Parity checking control file: echo "0" >/sys/devices/system/edac/pci/check_pci_parity +Parity Count: + + 'pci_parity_count' + + This attribute file will display the number of parity errors that + have been detected. + + +============================================================================ +MODULE PARAMETERS + +Panic on UE control file: + + 'edac_mc_panic_on_ue' + + An uncorrectable error will cause a machine panic. This is usually + desirable. It is a bad idea to continue when an uncorrectable error + occurs - it is indeterminate what was uncorrected and the operating + system context might be so mangled that continuing will lead to further + corruption. If the kernel has MCE configured, then EDAC will never + notice the UE. + + LOAD TIME: module/kernel parameter: edac_mc_panic_on_ue=[0|1] + + RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_panic_on_ue + + +Log UE control file: + + 'edac_mc_log_ue' + + Generate kernel messages describing uncorrectable errors. These errors + are reported through the system message log system. UE statistics + will be accumulated even when UE logging is disabled. + + LOAD TIME: module/kernel parameter: edac_mc_log_ue=[0|1] + + RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ue + + +Log CE control file: + + 'edac_mc_log_ce' + + Generate kernel messages describing correctable errors. These + errors are reported through the system message log system. + CE statistics will be accumulated even when CE logging is disabled. + + LOAD TIME: module/kernel parameter: edac_mc_log_ce=[0|1] + + RUN TIME: echo "1" > /sys/module/edac_core/parameters/edac_mc_log_ce + + +Polling period control file: + + 'edac_mc_poll_msec' + + The time period, in milliseconds, for polling for error information. + Too small a value wastes resources. Too large a value might delay + necessary handling of errors and might loose valuable information for + locating the error. 1000 milliseconds (once each second) is the current + default. Systems which require all the bandwidth they can get, may + increase this. + + LOAD TIME: module/kernel parameter: edac_mc_poll_msec=[0|1] + + RUN TIME: echo "1000" > /sys/module/edac_core/parameters/edac_mc_poll_msec + Panic on PCI PARITY Error: @@ -614,21 +615,13 @@ Panic on PCI PARITY Error: error has been detected. - module/kernel parameter: panic_on_pci_parity=[0|1] + module/kernel parameter: edac_panic_on_pci_pe=[0|1] Enable: - echo "1" >/sys/devices/system/edac/pci/panic_on_pci_parity + echo "1" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe Disable: - echo "0" >/sys/devices/system/edac/pci/panic_on_pci_parity - - -Parity Count: - - 'pci_parity_count' - - This attribute file will display the number of parity errors that - have been detected. + echo "0" > /sys/module/edac_core/parameters/edac_panic_on_pci_pe diff --git a/Documentation/fb/sh7760fb.txt b/Documentation/fb/sh7760fb.txt new file mode 100644 index 0000000000000000000000000000000000000000..c87bfe5c630a16893aed884a86f6e39506d94182 --- /dev/null +++ b/Documentation/fb/sh7760fb.txt @@ -0,0 +1,131 @@ +SH7760/SH7763 integrated LCDC Framebuffer driver +================================================ + +0. Overwiew +----------- +The SH7760/SH7763 have an integrated LCD Display controller (LCDC) which +supports (in theory) resolutions ranging from 1x1 to 1024x1024, +with color depths ranging from 1 to 16 bits, on STN, DSTN and TFT Panels. + +Caveats: +* Framebuffer memory must be a large chunk allocated at the top + of Area3 (HW requirement). Because of this requirement you should NOT + make the driver a module since at runtime it may become impossible to + get a large enough contiguous chunk of memory. + +* The driver does not support changing resolution while loaded + (displays aren't hotpluggable anyway) + +* Heavy flickering may be observed + a) if you're using 15/16bit color modes at >= 640x480 px resolutions, + b) during PCMCIA (or any other slow bus) activity. + +* Rotation works only 90degress clockwise, and only if horizontal + resolution is <= 320 pixels. + +files: drivers/video/sh7760fb.c + include/asm-sh/sh7760fb.h + Documentation/fb/sh7760fb.txt + +1. Platform setup +----------------- +SH7760: + Video data is fetched via the DMABRG DMA engine, so you have to + configure the SH DMAC for DMABRG mode (write 0x94808080 to the + DMARSRA register somewhere at boot). + + PFC registers PCCR and PCDR must be set to peripheral mode. + (write zeros to both). + +The driver does NOT do the above for you since board setup is, well, job +of the board setup code. + +2. Panel definitions +-------------------- +The LCDC must explicitly be told about the type of LCD panel +attached. Data must be wrapped in a "struct sh7760fb_platdata" and +passed to the driver as platform_data. + +Suggest you take a closer look at the SH7760 Manual, Section 30. +(http://documentation.renesas.com/eng/products/mpumcu/e602291_sh7760.pdf) + +The following code illustrates what needs to be done to +get the framebuffer working on a 640x480 TFT: + +====================== cut here ====================================== + +#include +#include + +/* + * NEC NL6440bc26-01 640x480 TFT + * dotclock 25175 kHz + * Xres 640 Yres 480 + * Htotal 800 Vtotal 525 + * HsynStart 656 VsynStart 490 + * HsynLenn 30 VsynLenn 2 + * + * The linux framebuffer layer does not use the syncstart/synclen + * values but right/left/upper/lower margin values. The comments + * for the x_margin explain how to calculate those from given + * panel sync timings. + */ +static struct fb_videomode nl6448bc26 = { + .name = "NL6448BC26", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = 39683, /* in picoseconds! */ + .hsync_len = 30, + .vsync_len = 2, + .left_margin = 114, /* HTOT - (HSYNSLEN + HSYNSTART) */ + .right_margin = 16, /* HSYNSTART - XRES */ + .upper_margin = 33, /* VTOT - (VSYNLEN + VSYNSTART) */ + .lower_margin = 10, /* VSYNSTART - YRES */ + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, +}; + +static struct sh7760fb_platdata sh7760fb_nl6448 = { + .def_mode = &nl6448bc26, + .ldmtr = LDMTR_TFT_COLOR_16, /* 16bit TFT panel */ + .lddfr = LDDFR_8BPP, /* we want 8bit output */ + .ldpmmr = 0x0070, + .ldpspr = 0x0500, + .ldaclnr = 0, + .ldickr = LDICKR_CLKSRC(LCDC_CLKSRC_EXTERNAL) | + LDICKR_CLKDIV(1), + .rotate = 0, + .novsync = 1, + .blank = NULL, +}; + +/* SH7760: + * 0xFE300800: 256 * 4byte xRGB palette ram + * 0xFE300C00: 42 bytes ctrl registers + */ +static struct resource sh7760_lcdc_res[] = { + [0] = { + .start = 0xFE300800, + .end = 0xFE300CFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 65, + .end = 65, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sh7760_lcdc_dev = { + .dev = { + .platform_data = &sh7760fb_nl6448, + }, + .name = "sh7760-lcdc", + .id = -1, + .resource = sh7760_lcdc_res, + .num_resources = ARRAY_SIZE(sh7760_lcdc_res), +}; + +====================== cut here ====================================== diff --git a/Documentation/fb/tridentfb.txt b/Documentation/fb/tridentfb.txt index 8a6c8a43e6a37803e4fcbd640f1b4578f5a611c6..45d9de5b13a3cb9f8143484d49737ae87254fdf7 100644 --- a/Documentation/fb/tridentfb.txt +++ b/Documentation/fb/tridentfb.txt @@ -3,11 +3,25 @@ Tridentfb is a framebuffer driver for some Trident chip based cards. The following list of chips is thought to be supported although not all are tested: -those from the Image series with Cyber in their names - accelerated -those with Blade in their names (Blade3D,CyberBlade...) - accelerated -the newer CyberBladeXP family - nonaccelerated - -Only PCI/AGP based cards are supported, none of the older Tridents. +those from the TGUI series 9440/96XX and with Cyber in their names +those from the Image series and with Cyber in their names +those with Blade in their names (Blade3D,CyberBlade...) +the newer CyberBladeXP family + +All families are accelerated. Only PCI/AGP based cards are supported, +none of the older Tridents. +The driver supports 8, 16 and 32 bits per pixel depths. +The TGUI family requires a line length to be power of 2 if acceleration +is enabled. This means that range of possible resolutions and bpp is +limited comparing to the range if acceleration is disabled (see list +of parameters below). + +Known bugs: +1. The driver randomly locks up on 3DImage975 chip with acceleration + enabled. The same happens in X11 (Xorg). +2. The ramdac speeds require some more fine tuning. It is possible to + switch resolution which the chip does not support at some depths for + older chips. How to use it? ============== @@ -17,12 +31,11 @@ video=tridentfb The parameters for tridentfb are concatenated with a ':' as in this example. -video=tridentfb:800x600,bpp=16,noaccel +video=tridentfb:800x600-16@75,noaccel The second level parameters that tridentfb understands are: noaccel - turns off acceleration (when it doesn't work for your card) -accel - force text acceleration (for boards which by default are noacceled) fp - use flat panel related stuff crt - assume monitor is present instead of fp @@ -31,21 +44,24 @@ center - for flat panels and resolutions smaller than native size center the image, otherwise use stretch -memsize - integer value in Kb, use if your card's memory size is misdetected. +memsize - integer value in KB, use if your card's memory size is misdetected. look at the driver output to see what it says when initializing. -memdiff - integer value in Kb,should be nonzero if your card reports - more memory than it actually has.For instance mine is 192K less than + +memdiff - integer value in KB, should be nonzero if your card reports + more memory than it actually has. For instance mine is 192K less than detection says in all three BIOS selectable situations 2M, 4M, 8M. Only use if your video memory is taken from main memory hence of - configurable size.Otherwise use memsize. - If in some modes which barely fit the memory you see garbage at the bottom - this might help by not letting change to that mode anymore. + configurable size. Otherwise use memsize. + If in some modes which barely fit the memory you see garbage + at the bottom this might help by not letting change to that mode + anymore. nativex - the width in pixels of the flat panel.If you know it (usually 1024 800 or 1280) and it is not what the driver seems to detect use it. -bpp - bits per pixel (8,16 or 32) -mode - a mode name like 800x600 (as described in Documentation/fb/modedb.txt) +bpp - bits per pixel (8,16 or 32) +mode - a mode name like 800x600-8@75 as described in + Documentation/fb/modedb.txt Using insane values for the above parameters will probably result in driver misbehaviour so take care(for instance memsize=12345678 or memdiff=23784 or diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-removal-schedule.txt index 46ece3fba6f94c2924c94d6f96b4402984705102..c23955404bf5d5056f7ddf448ea52415b6d3adfd 100644 --- a/Documentation/feature-removal-schedule.txt +++ b/Documentation/feature-removal-schedule.txt @@ -47,6 +47,30 @@ Who: Mauro Carvalho Chehab --------------------------- +What: old tuner-3036 i2c driver +When: 2.6.28 +Why: This driver is for VERY old i2c-over-parallel port teletext receiver + boxes. Rather then spending effort on converting this driver to V4L2, + and since it is extremely unlikely that anyone still uses one of these + devices, it was decided to drop it. +Who: Hans Verkuil + Mauro Carvalho Chehab + + --------------------------- + +What: V4L2 dpc7146 driver +When: 2.6.28 +Why: Old driver for the dpc7146 demonstration board that is no longer + relevant. The last time this was tested on actual hardware was + probably around 2002. Since this is a driver for a demonstration + board the decision was made to remove it rather than spending a + lot of effort continually updating this driver to stay in sync + with the latest internal V4L2 or I2C API. +Who: Hans Verkuil + Mauro Carvalho Chehab + +--------------------------- + What: PCMCIA control ioctl (needed for pcmcia-cs [cardmgr, cardctl]) When: November 2005 Files: drivers/pcmcia/: pcmcia_ioctl.c @@ -138,24 +162,6 @@ Who: Kay Sievers --------------------------- -What: find_task_by_pid -When: 2.6.26 -Why: With pid namespaces, calling this funciton will return the - wrong task when called from inside a namespace. - - The best way to save a task pid and find a task by this - pid later, is to find this task's struct pid pointer (or get - it directly from the task) and call pid_task() later. - - If someone really needs to get a task by its pid_t, then - he most likely needs the find_task_by_vpid() to get the - task from the same namespace as the current task is in, but - this may be not so in general. - -Who: Pavel Emelyanov - ---------------------------- - What: ACPI procfs interface When: July 2008 Why: ACPI sysfs conversion should be finished by January 2008. @@ -222,13 +228,6 @@ Who: Thomas Gleixner --------------------------- -What: i2c-i810, i2c-prosavage and i2c-savage4 -When: May 2008 -Why: These drivers are superseded by i810fb, intelfb and savagefb. -Who: Jean Delvare - ---------------------------- - What (Why): - include/linux/netfilter_ipv4/ipt_TOS.h ipt_tos.h header files (superseded by xt_TOS/xt_tos target & match) @@ -307,11 +306,15 @@ Who: ocfs2-devel@oss.oracle.com --------------------------- -What: asm/semaphore.h -When: 2.6.26 -Why: Implementation became generic; users should now include - linux/semaphore.h instead. -Who: Matthew Wilcox +What: SCTP_GET_PEER_ADDRS_NUM_OLD, SCTP_GET_PEER_ADDRS_OLD, + SCTP_GET_LOCAL_ADDRS_NUM_OLD, SCTP_GET_LOCAL_ADDRS_OLD +When: June 2009 +Why: A newer version of the options have been introduced in 2005 that + removes the limitions of the old API. The sctp library has been + converted to use these new options at the same time. Any user + space app that directly uses the old options should convert to using + the new options. +Who: Vlad Yasevich --------------------------- @@ -321,3 +324,23 @@ Why: This option was introduced just to allow older lm-sensors userspace to keep working over the upgrade to 2.6.26. At the scheduled time of removal fixed lm-sensors (2.x or 3.x) should be readily available. Who: Rene Herman + +--------------------------- + +What: Code that is now under CONFIG_WIRELESS_EXT_SYSFS + (in net/core/net-sysfs.c) +When: After the only user (hal) has seen a release with the patches + for enough time, probably some time in 2010. +Why: Over 1K .text/.data size reduction, data is available in other + ways (ioctls) +Who: Johannes Berg + +--------------------------- + +What: CONFIG_NF_CT_ACCT +When: 2.6.29 +Why: Accounting can now be enabled/disabled without kernel recompilation. + Currently used only to set a default value for a feature that is also + controlled by a kernel/module/sysfs/sysctl parameter. +Who: Krzysztof Piotr Oledzki + diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking index 8b22d7d8b99166b6db2e037644e9c5d7ff03695e..680fb566b9286bcc71a527c5f75d4b94fc9ac215 100644 --- a/Documentation/filesystems/Locking +++ b/Documentation/filesystems/Locking @@ -510,6 +510,7 @@ prototypes: void (*close)(struct vm_area_struct*); int (*fault)(struct vm_area_struct*, struct vm_fault *); int (*page_mkwrite)(struct vm_area_struct *, struct page *); + int (*access)(struct vm_area_struct *, unsigned long, void*, int, int); locking rules: BKL mmap_sem PageLocked(page) @@ -517,6 +518,7 @@ open: no yes close: no yes fault: no yes page_mkwrite: no yes no +access: no yes ->page_mkwrite() is called when a previously read-only page is about to become writeable. The file system is responsible for @@ -525,6 +527,11 @@ taking to lock out truncate, the page range should be verified to be within i_size. The page mapping should also be checked that it is not NULL. + ->access() is called when get_user_pages() fails in +acces_process_vm(), typically used to debug a process through +/proc/pid/mem or ptrace. This function is needed only for +VM_IO | VM_PFNMAP VMAs. + ================================================================================ Dubious stuff diff --git a/Documentation/filesystems/bfs.txt b/Documentation/filesystems/bfs.txt index ea825e178e797b3b8af53d8d6d5fa2c1f1974a0d..78043d5a8fc35f01c343ced6f956aadee03e1026 100644 --- a/Documentation/filesystems/bfs.txt +++ b/Documentation/filesystems/bfs.txt @@ -26,11 +26,11 @@ You can simplify mounting by just typing: this will allocate the first available loopback device (and load loop.o kernel module if necessary) automatically. If the loopback driver is not -loaded automatically, make sure that your kernel is compiled with kmod -support (CONFIG_KMOD) enabled. Beware that umount will not -deallocate /dev/loopN device if /etc/mtab file on your system is a -symbolic link to /proc/mounts. You will need to do it manually using -"-d" switch of losetup(8). Read losetup(8) manpage for more info. +loaded automatically, make sure that you have compiled the module and +that modprobe is functioning. Beware that umount will not deallocate +/dev/loopN device if /etc/mtab file on your system is a symbolic link to +/proc/mounts. You will need to do it manually using "-d" switch of +losetup(8). Read losetup(8) manpage for more info. To create the BFS image under UnixWare you need to find out first which slice contains it. The command prtvtoc(1M) is your friend: diff --git a/Documentation/filesystems/configfs/configfs_example.c b/Documentation/filesystems/configfs/configfs_example.c index 25151fd5c2c6f032a0cc95d57d213d7fa4fcdf18..039648791701f6e1b74a970d36f361cab695ab64 100644 --- a/Documentation/filesystems/configfs/configfs_example.c +++ b/Documentation/filesystems/configfs/configfs_example.c @@ -279,7 +279,7 @@ static struct config_item *simple_children_make_item(struct config_group *group, simple_child = kzalloc(sizeof(struct simple_child), GFP_KERNEL); if (!simple_child) - return NULL; + return ERR_PTR(-ENOMEM); config_item_init_type_name(&simple_child->item, name, @@ -366,7 +366,7 @@ static struct config_group *group_children_make_group(struct config_group *group simple_children = kzalloc(sizeof(struct simple_children), GFP_KERNEL); if (!simple_children) - return NULL; + return ERR_PTR(-ENOMEM); config_group_init_type_name(&simple_children->group, name, diff --git a/Documentation/filesystems/ext4.txt b/Documentation/filesystems/ext4.txt index 0c5086db835262828edd6b377bee4affb4b6da6f..80e193d82e2e10415cc828124cec296855398aeb 100644 --- a/Documentation/filesystems/ext4.txt +++ b/Documentation/filesystems/ext4.txt @@ -13,72 +13,93 @@ Mailing list: linux-ext4@vger.kernel.org 1. Quick usage instructions: =========================== - - Grab updated e2fsprogs from - ftp://ftp.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs-interim/ - This is a patchset on top of e2fsprogs-1.39, which can be found at + - Compile and install the latest version of e2fsprogs (as of this + writing version 1.41) from: + + http://sourceforge.net/project/showfiles.php?group_id=2406 + + or + ftp://ftp.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs/ - - It's still mke2fs -j /dev/hda1 + or grab the latest git repository from: + + git://git.kernel.org/pub/scm/fs/ext2/e2fsprogs.git + + - Create a new filesystem using the ext4dev filesystem type: + + # mke2fs -t ext4dev /dev/hda1 + + Or configure an existing ext3 filesystem to support extents and set + the test_fs flag to indicate that it's ok for an in-development + filesystem to touch this filesystem: - - mount /dev/hda1 /wherever -t ext4dev + # tune2fs -O extents -E test_fs /dev/hda1 - - To enable extents, + If the filesystem was created with 128 byte inodes, it can be + converted to use 256 byte for greater efficiency via: - mount /dev/hda1 /wherever -t ext4dev -o extents + # tune2fs -I 256 /dev/hda1 - - The filesystem is compatible with the ext3 driver until you add a file - which has extents (ie: `mount -o extents', then create a file). + (Note: we currently do not have tools to convert an ext4dev + filesystem back to ext3; so please do not do try this on production + filesystems.) - NOTE: The "extents" mount flag is temporary. It will soon go away and - extents will be enabled by the "-o extents" flag to mke2fs or tune2fs + - Mounting: + + # mount -t ext4dev /dev/hda1 /wherever - When comparing performance with other filesystems, remember that - ext3/4 by default offers higher data integrity guarantees than most. So - when comparing with a metadata-only journalling filesystem, use `mount -o - data=writeback'. And you might as well use `mount -o nobh' too along - with it. Making the journal larger than the mke2fs default often helps - performance with metadata-intensive workloads. + ext3/4 by default offers higher data integrity guarantees than most. + So when comparing with a metadata-only journalling filesystem, such + as ext3, use `mount -o data=writeback'. And you might as well use + `mount -o nobh' too along with it. Making the journal larger than + the mke2fs default often helps performance with metadata-intensive + workloads. 2. Features =========== 2.1 Currently available -* ability to use filesystems > 16TB +* ability to use filesystems > 16TB (e2fsprogs support not available yet) * extent format reduces metadata overhead (RAM, IO for access, transactions) * extent format more robust in face of on-disk corruption due to magics, * internal redunancy in tree - -2.1 Previously available, soon to be enabled by default by "mkefs.ext4": - -* dir_index and resize inode will be on by default -* large inodes will be used by default for fast EAs, nsec timestamps, etc +* improved file allocation (multi-block alloc) +* fix 32000 subdirectory limit +* nsec timestamps for mtime, atime, ctime, create time +* inode version field on disk (NFSv4, Lustre) +* reduced e2fsck time via uninit_bg feature +* journal checksumming for robustness, performance +* persistent file preallocation (e.g for streaming media, databases) +* ability to pack bitmaps and inode tables into larger virtual groups via the + flex_bg feature +* large file support +* Inode allocation using large virtual block groups via flex_bg +* delayed allocation +* large block (up to pagesize) support +* efficent new ordered mode in JBD2 and ext4(avoid using buffer head to force + the ordering) 2.2 Candidate features for future inclusion -There are several under discussion, whether they all make it in is -partly a function of how much time everyone has to work on them: +* Online defrag (patches available but not well tested) +* reduced mke2fs time via lazy itable initialization in conjuction with + the uninit_bg feature (capability to do this is available in e2fsprogs + but a kernel thread to do lazy zeroing of unused inode table blocks + after filesystem is first mounted is required for safety) -* improved file allocation (multi-block alloc, delayed alloc; basically done) -* fix 32000 subdirectory limit (patch exists, needs some e2fsck work) -* nsec timestamps for mtime, atime, ctime, create time (patch exists, - needs some e2fsck work) -* inode version field on disk (NFSv4, Lustre; prototype exists) -* reduced mke2fs/e2fsck time via uninitialized groups (prototype exists) -* journal checksumming for robustness, performance (prototype exists) -* persistent file preallocation (e.g for streaming media, databases) +There are several others under discussion, whether they all make it in is +partly a function of how much time everyone has to work on them. Features like +metadata checksumming have been discussed and planned for a bit but no patches +exist yet so I'm not sure they're in the near-term roadmap. -Features like metadata checksumming have been discussed and planned for -a bit but no patches exist yet so I'm not sure they're in the near-term -roadmap. +The big performance win will come with mballoc, delalloc and flex_bg +grouping of bitmaps and inode tables. Some test results available here: -The big performance win will come with mballoc and delalloc. CFS has -been using mballoc for a few years already with Lustre, and IBM + Bull -did a lot of benchmarking on it. The reason it isn't in the first set of -patches is partly a manageability issue, and partly because it doesn't -directly affect the on-disk format (outside of much better allocation) -so it isn't critical to get into the first round of changes. I believe -Alex is working on a new set of patches right now. + - http://www.bullopensource.org/ext4/20080530/ffsb-write-2.6.26-rc2.html + - http://www.bullopensource.org/ext4/20080530/ffsb-readwrite-2.6.26-rc2.html 3. Options ========== @@ -222,9 +243,11 @@ stripe=n Number of filesystem blocks that mballoc will try to use for allocation size and alignment. For RAID5/6 systems this should be the number of data disks * RAID chunk size in file system blocks. - +delalloc (*) Deferring block allocation until write-out time. +nodelalloc Disable delayed allocation. Blocks are allocation + when data is copied from user to page cache. Data Mode ---------- +========= There are 3 different data modes: * writeback mode @@ -236,10 +259,10 @@ typically provide the best ext4 performance. * ordered mode In data=ordered mode, ext4 only officially journals metadata, but it logically -groups metadata and data blocks into a single unit called a transaction. When -it's time to write the new metadata out to disk, the associated data blocks -are written first. In general, this mode performs slightly slower than -writeback but significantly faster than journal mode. +groups metadata information related to data changes with the data blocks into a +single unit called a transaction. When it's time to write the new metadata +out to disk, the associated data blocks are written first. In general, +this mode performs slightly slower than writeback but significantly faster than journal mode. * journal mode data=journal mode provides full data and metadata journaling. All new data is @@ -247,7 +270,8 @@ written to the journal first, and then to its final location. In the event of a crash, the journal can be replayed, bringing both data and metadata into a consistent state. This mode is the slowest except when data needs to be read from and written to disk at the same time where it -outperforms all others modes. +outperforms all others modes. Curently ext4 does not have delayed +allocation support if this data journalling mode is selected. References ========== @@ -256,7 +280,8 @@ kernel source: programs: http://e2fsprogs.sourceforge.net/ - http://ext2resize.sourceforge.net useful links: http://fedoraproject.org/wiki/ext3-devel http://www.bullopensource.org/ext4/ + http://ext4.wiki.kernel.org/index.php/Main_Page + http://fedoraproject.org/wiki/Features/Ext4 diff --git a/Documentation/filesystems/gfs2-glocks.txt b/Documentation/filesystems/gfs2-glocks.txt new file mode 100644 index 0000000000000000000000000000000000000000..4dae9a3840bf9953ed5f12be7aae10625d6a5b99 --- /dev/null +++ b/Documentation/filesystems/gfs2-glocks.txt @@ -0,0 +1,114 @@ + Glock internal locking rules + ------------------------------ + +This documents the basic principles of the glock state machine +internals. Each glock (struct gfs2_glock in fs/gfs2/incore.h) +has two main (internal) locks: + + 1. A spinlock (gl_spin) which protects the internal state such + as gl_state, gl_target and the list of holders (gl_holders) + 2. A non-blocking bit lock, GLF_LOCK, which is used to prevent other + threads from making calls to the DLM, etc. at the same time. If a + thread takes this lock, it must then call run_queue (usually via the + workqueue) when it releases it in order to ensure any pending tasks + are completed. + +The gl_holders list contains all the queued lock requests (not +just the holders) associated with the glock. If there are any +held locks, then they will be contiguous entries at the head +of the list. Locks are granted in strictly the order that they +are queued, except for those marked LM_FLAG_PRIORITY which are +used only during recovery, and even then only for journal locks. + +There are three lock states that users of the glock layer can request, +namely shared (SH), deferred (DF) and exclusive (EX). Those translate +to the following DLM lock modes: + +Glock mode | DLM lock mode +------------------------------ + UN | IV/NL Unlocked (no DLM lock associated with glock) or NL + SH | PR (Protected read) + DF | CW (Concurrent write) + EX | EX (Exclusive) + +Thus DF is basically a shared mode which is incompatible with the "normal" +shared lock mode, SH. In GFS2 the DF mode is used exclusively for direct I/O +operations. The glocks are basically a lock plus some routines which deal +with cache management. The following rules apply for the cache: + +Glock mode | Cache data | Cache Metadata | Dirty Data | Dirty Metadata +-------------------------------------------------------------------------- + UN | No | No | No | No + SH | Yes | Yes | No | No + DF | No | Yes | No | No + EX | Yes | Yes | Yes | Yes + +These rules are implemented using the various glock operations which +are defined for each type of glock. Not all types of glocks use +all the modes. Only inode glocks use the DF mode for example. + +Table of glock operations and per type constants: + +Field | Purpose +---------------------------------------------------------------------------- +go_xmote_th | Called before remote state change (e.g. to sync dirty data) +go_xmote_bh | Called after remote state change (e.g. to refill cache) +go_inval | Called if remote state change requires invalidating the cache +go_demote_ok | Returns boolean value of whether its ok to demote a glock + | (e.g. checks timeout, and that there is no cached data) +go_lock | Called for the first local holder of a lock +go_unlock | Called on the final local unlock of a lock +go_dump | Called to print content of object for debugfs file, or on + | error to dump glock to the log. +go_type; | The type of the glock, LM_TYPE_..... +go_min_hold_time | The minimum hold time + +The minimum hold time for each lock is the time after a remote lock +grant for which we ignore remote demote requests. This is in order to +prevent a situation where locks are being bounced around the cluster +from node to node with none of the nodes making any progress. This +tends to show up most with shared mmaped files which are being written +to by multiple nodes. By delaying the demotion in response to a +remote callback, that gives the userspace program time to make +some progress before the pages are unmapped. + +There is a plan to try and remove the go_lock and go_unlock callbacks +if possible, in order to try and speed up the fast path though the locking. +Also, eventually we hope to make the glock "EX" mode locally shared +such that any local locking will be done with the i_mutex as required +rather than via the glock. + +Locking rules for glock operations: + +Operation | GLF_LOCK bit lock held | gl_spin spinlock held +----------------------------------------------------------------- +go_xmote_th | Yes | No +go_xmote_bh | Yes | No +go_inval | Yes | No +go_demote_ok | Sometimes | Yes +go_lock | Yes | No +go_unlock | Yes | No +go_dump | Sometimes | Yes + +N.B. Operations must not drop either the bit lock or the spinlock +if its held on entry. go_dump and do_demote_ok must never block. +Note that go_dump will only be called if the glock's state +indicates that it is caching uptodate data. + +Glock locking order within GFS2: + + 1. i_mutex (if required) + 2. Rename glock (for rename only) + 3. Inode glock(s) + (Parents before children, inodes at "same level" with same parent in + lock number order) + 4. Rgrp glock(s) (for (de)allocation operations) + 5. Transaction glock (via gfs2_trans_begin) for non-read operations + 6. Page lock (always last, very important!) + +There are two glocks per inode. One deals with access to the inode +itself (locking order as above), and the other, known as the iopen +glock is used in conjunction with the i_nlink field in the inode to +determine the lifetime of the inode in question. Locking of inodes +is on a per-inode basis. Locking of rgrps is on a per rgrp basis. + diff --git a/Documentation/filesystems/nfs-rdma.txt b/Documentation/filesystems/nfs-rdma.txt index d0ec45ae4e7dfa4585fa74c0757be4d80dc02bf5..44bd766f2e5d2225488337681a948c160bd2a821 100644 --- a/Documentation/filesystems/nfs-rdma.txt +++ b/Documentation/filesystems/nfs-rdma.txt @@ -5,7 +5,7 @@ ################################################################################ Author: NetApp and Open Grid Computing - Date: April 15, 2008 + Date: May 29, 2008 Table of Contents ~~~~~~~~~~~~~~~~~ @@ -60,16 +60,18 @@ Installation The procedures described in this document have been tested with distributions from Red Hat's Fedora Project (http://fedora.redhat.com/). - - Install nfs-utils-1.1.1 or greater on the client + - Install nfs-utils-1.1.2 or greater on the client - An NFS/RDMA mount point can only be obtained by using the mount.nfs - command in nfs-utils-1.1.1 or greater. To see which version of mount.nfs - you are using, type: + An NFS/RDMA mount point can be obtained by using the mount.nfs command in + nfs-utils-1.1.2 or greater (nfs-utils-1.1.1 was the first nfs-utils + version with support for NFS/RDMA mounts, but for various reasons we + recommend using nfs-utils-1.1.2 or greater). To see which version of + mount.nfs you are using, type: - > /sbin/mount.nfs -V + $ /sbin/mount.nfs -V - If the version is less than 1.1.1 or the command does not exist, - then you will need to install the latest version of nfs-utils. + If the version is less than 1.1.2 or the command does not exist, + you should install the latest version of nfs-utils. Download the latest package from: @@ -77,22 +79,33 @@ Installation Uncompress the package and follow the installation instructions. - If you will not be using GSS and NFSv4, the installation process - can be simplified by disabling these features when running configure: + If you will not need the idmapper and gssd executables (you do not need + these to create an NFS/RDMA enabled mount command), the installation + process can be simplified by disabling these features when running + configure: - > ./configure --disable-gss --disable-nfsv4 + $ ./configure --disable-gss --disable-nfsv4 - For more information on this see the package's README and INSTALL files. + To build nfs-utils you will need the tcp_wrappers package installed. For + more information on this see the package's README and INSTALL files. After building the nfs-utils package, there will be a mount.nfs binary in the utils/mount directory. This binary can be used to initiate NFS v2, v3, - or v4 mounts. To initiate a v4 mount, the binary must be called mount.nfs4. - The standard technique is to create a symlink called mount.nfs4 to mount.nfs. + or v4 mounts. To initiate a v4 mount, the binary must be called + mount.nfs4. The standard technique is to create a symlink called + mount.nfs4 to mount.nfs. - NOTE: mount.nfs and therefore nfs-utils-1.1.1 or greater is only needed + This mount.nfs binary should be installed at /sbin/mount.nfs as follows: + + $ sudo cp utils/mount/mount.nfs /sbin/mount.nfs + + In this location, mount.nfs will be invoked automatically for NFS mounts + by the system mount commmand. + + NOTE: mount.nfs and therefore nfs-utils-1.1.2 or greater is only needed on the NFS client machine. You do not need this specific version of nfs-utils on the server. Furthermore, only the mount.nfs command from - nfs-utils-1.1.1 is needed on the client. + nfs-utils-1.1.2 is needed on the client. - Install a Linux kernel with NFS/RDMA @@ -156,8 +169,8 @@ Check RDMA and NFS Setup this time. For example, if you are using a Mellanox Tavor/Sinai/Arbel card: - > modprobe ib_mthca - > modprobe ib_ipoib + $ modprobe ib_mthca + $ modprobe ib_ipoib If you are using InfiniBand, make sure there is a Subnet Manager (SM) running on the network. If your IB switch has an embedded SM, you can @@ -166,7 +179,7 @@ Check RDMA and NFS Setup If an SM is running on your network, you should see the following: - > cat /sys/class/infiniband/driverX/ports/1/state + $ cat /sys/class/infiniband/driverX/ports/1/state 4: ACTIVE where driverX is mthca0, ipath5, ehca3, etc. @@ -174,10 +187,10 @@ Check RDMA and NFS Setup To further test the InfiniBand software stack, use IPoIB (this assumes you have two IB hosts named host1 and host2): - host1> ifconfig ib0 a.b.c.x - host2> ifconfig ib0 a.b.c.y - host1> ping a.b.c.y - host2> ping a.b.c.x + host1$ ifconfig ib0 a.b.c.x + host2$ ifconfig ib0 a.b.c.y + host1$ ping a.b.c.y + host2$ ping a.b.c.x For other device types, follow the appropriate procedures. @@ -202,11 +215,11 @@ NFS/RDMA Setup /vol0 192.168.0.47(fsid=0,rw,async,insecure,no_root_squash) /vol0 192.168.0.0/255.255.255.0(fsid=0,rw,async,insecure,no_root_squash) - The IP address(es) is(are) the client's IPoIB address for an InfiniBand HCA or the - cleint's iWARP address(es) for an RNIC. + The IP address(es) is(are) the client's IPoIB address for an InfiniBand + HCA or the cleint's iWARP address(es) for an RNIC. - NOTE: The "insecure" option must be used because the NFS/RDMA client does not - use a reserved port. + NOTE: The "insecure" option must be used because the NFS/RDMA client does + not use a reserved port. Each time a machine boots: @@ -214,43 +227,45 @@ NFS/RDMA Setup For InfiniBand using a Mellanox adapter: - > modprobe ib_mthca - > modprobe ib_ipoib - > ifconfig ib0 a.b.c.d + $ modprobe ib_mthca + $ modprobe ib_ipoib + $ ifconfig ib0 a.b.c.d NOTE: use unique addresses for the client and server - Start the NFS server - If the NFS/RDMA server was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in kernel config), - load the RDMA transport module: + If the NFS/RDMA server was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in + kernel config), load the RDMA transport module: - > modprobe svcrdma + $ modprobe svcrdma - Regardless of how the server was built (module or built-in), start the server: + Regardless of how the server was built (module or built-in), start the + server: - > /etc/init.d/nfs start + $ /etc/init.d/nfs start or - > service nfs start + $ service nfs start Instruct the server to listen on the RDMA transport: - > echo rdma 2050 > /proc/fs/nfsd/portlist + $ echo rdma 2050 > /proc/fs/nfsd/portlist - On the client system - If the NFS/RDMA client was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in kernel config), - load the RDMA client module: + If the NFS/RDMA client was built as a module (CONFIG_SUNRPC_XPRT_RDMA=m in + kernel config), load the RDMA client module: - > modprobe xprtrdma.ko + $ modprobe xprtrdma.ko - Regardless of how the client was built (module or built-in), issue the mount.nfs command: + Regardless of how the client was built (module or built-in), use this + command to mount the NFS/RDMA server: - > /path/to/your/mount.nfs :/ /mnt -i -o rdma,port=2050 + $ mount -o rdma,port=2050 :/ /mnt - To verify that the mount is using RDMA, run "cat /proc/mounts" and check the - "proto" field for the given mount. + To verify that the mount is using RDMA, run "cat /proc/mounts" and check + the "proto" field for the given mount. Congratulations! You're using NFS/RDMA! diff --git a/Documentation/filesystems/omfs.txt b/Documentation/filesystems/omfs.txt new file mode 100644 index 0000000000000000000000000000000000000000..1d0d41ff5c65cdc75454d958ad58b367a9e2464c --- /dev/null +++ b/Documentation/filesystems/omfs.txt @@ -0,0 +1,106 @@ +Optimized MPEG Filesystem (OMFS) + +Overview +======== + +OMFS is a filesystem created by SonicBlue for use in the ReplayTV DVR +and Rio Karma MP3 player. The filesystem is extent-based, utilizing +block sizes from 2k to 8k, with hash-based directories. This +filesystem driver may be used to read and write disks from these +devices. + +Note, it is not recommended that this FS be used in place of a general +filesystem for your own streaming media device. Native Linux filesystems +will likely perform better. + +More information is available at: + + http://linux-karma.sf.net/ + +Various utilities, including mkomfs and omfsck, are included with +omfsprogs, available at: + + http://bobcopeland.com/karma/ + +Instructions are included in its README. + +Options +======= + +OMFS supports the following mount-time options: + + uid=n - make all files owned by specified user + gid=n - make all files owned by specified group + umask=xxx - set permission umask to xxx + fmask=xxx - set umask to xxx for files + dmask=xxx - set umask to xxx for directories + +Disk format +=========== + +OMFS discriminates between "sysblocks" and normal data blocks. The sysblock +group consists of super block information, file metadata, directory structures, +and extents. Each sysblock has a header containing CRCs of the entire +sysblock, and may be mirrored in successive blocks on the disk. A sysblock may +have a smaller size than a data block, but since they are both addressed by the +same 64-bit block number, any remaining space in the smaller sysblock is +unused. + +Sysblock header information: + +struct omfs_header { + __be64 h_self; /* FS block where this is located */ + __be32 h_body_size; /* size of useful data after header */ + __be16 h_crc; /* crc-ccitt of body_size bytes */ + char h_fill1[2]; + u8 h_version; /* version, always 1 */ + char h_type; /* OMFS_INODE_X */ + u8 h_magic; /* OMFS_IMAGIC */ + u8 h_check_xor; /* XOR of header bytes before this */ + __be32 h_fill2; +}; + +Files and directories are both represented by omfs_inode: + +struct omfs_inode { + struct omfs_header i_head; /* header */ + __be64 i_parent; /* parent containing this inode */ + __be64 i_sibling; /* next inode in hash bucket */ + __be64 i_ctime; /* ctime, in milliseconds */ + char i_fill1[35]; + char i_type; /* OMFS_[DIR,FILE] */ + __be32 i_fill2; + char i_fill3[64]; + char i_name[OMFS_NAMELEN]; /* filename */ + __be64 i_size; /* size of file, in bytes */ +}; + +Directories in OMFS are implemented as a large hash table. Filenames are +hashed then prepended into the bucket list beginning at OMFS_DIR_START. +Lookup requires hashing the filename, then seeking across i_sibling pointers +until a match is found on i_name. Empty buckets are represented by block +pointers with all-1s (~0). + +A file is an omfs_inode structure followed by an extent table beginning at +OMFS_EXTENT_START: + +struct omfs_extent_entry { + __be64 e_cluster; /* start location of a set of blocks */ + __be64 e_blocks; /* number of blocks after e_cluster */ +}; + +struct omfs_extent { + __be64 e_next; /* next extent table location */ + __be32 e_extent_count; /* total # extents in this table */ + __be32 e_fill; + struct omfs_extent_entry e_entry; /* start of extent entries */ +}; + +Each extent holds the block offset followed by number of blocks allocated to +the extent. The final extent in each table is a terminator with e_cluster +being ~0 and e_blocks being ones'-complement of the total number of blocks +in the table. + +If this table overflows, a continuation inode is written and pointed to by +e_next. These have a header but lack the rest of the inode structure. + diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt index dbc3c6a3650f5c29b24000d69e1c9cb7973b4988..64557821ee5984f5babe336f701f172b8602a4dc 100644 --- a/Documentation/filesystems/proc.txt +++ b/Documentation/filesystems/proc.txt @@ -296,6 +296,7 @@ Table 1-4: Kernel info in /proc uptime System uptime version Kernel version video bttv info of video resources (2.4) + vmallocinfo Show vmalloced areas .............................................................................. You can, for example, check which interrupts are currently in use and what @@ -380,28 +381,35 @@ i386 and x86_64 platforms support the new IRQ vector displays. Of some interest is the introduction of the /proc/irq directory to 2.4. It could be used to set IRQ to CPU affinity, this means that you can "hook" an IRQ to only one CPU, or to exclude a CPU of handling IRQs. The contents of the -irq subdir is one subdir for each IRQ, and one file; prof_cpu_mask +irq subdir is one subdir for each IRQ, and two files; default_smp_affinity and +prof_cpu_mask. For example > ls /proc/irq/ 0 10 12 14 16 18 2 4 6 8 prof_cpu_mask - 1 11 13 15 17 19 3 5 7 9 + 1 11 13 15 17 19 3 5 7 9 default_smp_affinity > ls /proc/irq/0/ smp_affinity -The contents of the prof_cpu_mask file and each smp_affinity file for each IRQ -is the same by default: +smp_affinity is a bitmask, in which you can specify which CPUs can handle the +IRQ, you can set it by doing: - > cat /proc/irq/0/smp_affinity - ffffffff + > echo 1 > /proc/irq/10/smp_affinity + +This means that only the first CPU will handle the IRQ, but you can also echo +5 which means that only the first and fourth CPU can handle the IRQ. + +The contents of each smp_affinity file is the same by default: -It's a bitmask, in which you can specify which CPUs can handle the IRQ, you can -set it by doing: + > cat /proc/irq/0/smp_affinity + ffffffff - > echo 1 > /proc/irq/prof_cpu_mask +The default_smp_affinity mask applies to all non-active IRQs, which are the +IRQs which have not yet been allocated/activated, and hence which lack a +/proc/irq/[0-9]* directory. -This means that only the first CPU will handle the IRQ, but you can also echo 5 -which means that only the first and fourth CPU can handle the IRQ. +prof_cpu_mask specifies which CPUs are to be profiled by the system wide +profiler. Default value is ffffffff (all cpus). The way IRQs are routed is handled by the IO-APIC, and it's Round Robin between all the CPUs which are allowed to handle it. As usual the kernel has @@ -550,6 +558,49 @@ VmallocTotal: total size of vmalloc memory area VmallocUsed: amount of vmalloc area which is used VmallocChunk: largest contigious block of vmalloc area which is free +.............................................................................. + +vmallocinfo: + +Provides information about vmalloced/vmaped areas. One line per area, +containing the virtual address range of the area, size in bytes, +caller information of the creator, and optional information depending +on the kind of area : + + pages=nr number of pages + phys=addr if a physical address was specified + ioremap I/O mapping (ioremap() and friends) + vmalloc vmalloc() area + vmap vmap()ed pages + user VM_USERMAP area + vpages buffer for pages pointers was vmalloced (huge area) + N=nr (Only on NUMA kernels) + Number of pages allocated on memory node + +> cat /proc/vmallocinfo +0xffffc20000000000-0xffffc20000201000 2101248 alloc_large_system_hash+0x204 ... + /0x2c0 pages=512 vmalloc N0=128 N1=128 N2=128 N3=128 +0xffffc20000201000-0xffffc20000302000 1052672 alloc_large_system_hash+0x204 ... + /0x2c0 pages=256 vmalloc N0=64 N1=64 N2=64 N3=64 +0xffffc20000302000-0xffffc20000304000 8192 acpi_tb_verify_table+0x21/0x4f... + phys=7fee8000 ioremap +0xffffc20000304000-0xffffc20000307000 12288 acpi_tb_verify_table+0x21/0x4f... + phys=7fee7000 ioremap +0xffffc2000031d000-0xffffc2000031f000 8192 init_vdso_vars+0x112/0x210 +0xffffc2000031f000-0xffffc2000032b000 49152 cramfs_uncompress_init+0x2e ... + /0x80 pages=11 vmalloc N0=3 N1=3 N2=2 N3=3 +0xffffc2000033a000-0xffffc2000033d000 12288 sys_swapon+0x640/0xac0 ... + pages=2 vmalloc N1=2 +0xffffc20000347000-0xffffc2000034c000 20480 xt_alloc_table_info+0xfe ... + /0x130 [x_tables] pages=4 vmalloc N0=4 +0xffffffffa0000000-0xffffffffa000f000 61440 sys_init_module+0xc27/0x1d00 ... + pages=14 vmalloc N2=14 +0xffffffffa000f000-0xffffffffa0014000 20480 sys_init_module+0xc27/0x1d00 ... + pages=4 vmalloc N1=4 +0xffffffffa0014000-0xffffffffa0017000 12288 sys_init_module+0xc27/0x1d00 ... + pages=2 vmalloc N1=2 +0xffffffffa0017000-0xffffffffa0022000 45056 sys_init_module+0xc27/0x1d00 ... + pages=10 vmalloc N0=10 1.3 IDE devices in /proc/ide ---------------------------- @@ -880,7 +931,7 @@ group_prealloc max_to_scan mb_groups mb_history min_to_scan order2_req stats stream_req mb_groups: -This file gives the details of mutiblock allocator buddy cache of free blocks +This file gives the details of multiblock allocator buddy cache of free blocks mb_history: Multiblock allocation history. @@ -1423,7 +1474,7 @@ used because pages_free(1355) is smaller than watermark + protection[2] normal page requirement. If requirement is DMA zone(index=0), protection[0] (=0) is used. -zone[i]'s protection[j] is calculated by following exprssion. +zone[i]'s protection[j] is calculated by following expression. (i < j): zone[i]->protection[j] diff --git a/Documentation/filesystems/relay.txt b/Documentation/filesystems/relay.txt index 094f2d2f38b1a5571283ee745aa494c12b12808c..510b722667ac885cf7abed3732961941a5ad1c14 100644 --- a/Documentation/filesystems/relay.txt +++ b/Documentation/filesystems/relay.txt @@ -294,6 +294,16 @@ user-defined data with a channel, and is immediately available (including in create_buf_file()) via chan->private_data or buf->chan->private_data. +Buffer-only channels +-------------------- + +These channels have no files associated and can be created with +relay_open(NULL, NULL, ...). Such channels are useful in scenarios such +as when doing early tracing in the kernel, before the VFS is up. In these +cases, one may open a buffer-only channel and then call +relay_late_setup_files() when the kernel is ready to handle files, +to expose the buffered data to the userspace. + Channel 'modes' --------------- diff --git a/Documentation/filesystems/sysfs.txt b/Documentation/filesystems/sysfs.txt index 7f27b8f840d06210df1511db6ef603cedb8f0e58..9e9c348275a96fd362acf9916d2789be8a08c4c8 100644 --- a/Documentation/filesystems/sysfs.txt +++ b/Documentation/filesystems/sysfs.txt @@ -248,6 +248,7 @@ The top level sysfs directory looks like: block/ bus/ class/ +dev/ devices/ firmware/ net/ @@ -274,6 +275,11 @@ fs/ contains a directory for some filesystems. Currently each filesystem wanting to export attributes must create its own hierarchy below fs/ (see ./fuse.txt for an example). +dev/ contains two directories char/ and block/. Inside these two +directories there are symlinks named :. These symlinks +point to the sysfs directory for the given device. /sys/dev provides a +quick way to lookup the sysfs interface for a device from the result of +a stat(2) operation. More information can driver-model specific features can be found in Documentation/driver-model/. diff --git a/Documentation/filesystems/ubifs.txt b/Documentation/filesystems/ubifs.txt new file mode 100644 index 0000000000000000000000000000000000000000..540e9e7f59c53f083f105432a7a7be28f53eb2d3 --- /dev/null +++ b/Documentation/filesystems/ubifs.txt @@ -0,0 +1,164 @@ +Introduction +============= + +UBIFS file-system stands for UBI File System. UBI stands for "Unsorted +Block Images". UBIFS is a flash file system, which means it is designed +to work with flash devices. It is important to understand, that UBIFS +is completely different to any traditional file-system in Linux, like +Ext2, XFS, JFS, etc. UBIFS represents a separate class of file-systems +which work with MTD devices, not block devices. The other Linux +file-system of this class is JFFS2. + +To make it more clear, here is a small comparison of MTD devices and +block devices. + +1 MTD devices represent flash devices and they consist of eraseblocks of + rather large size, typically about 128KiB. Block devices consist of + small blocks, typically 512 bytes. +2 MTD devices support 3 main operations - read from some offset within an + eraseblock, write to some offset within an eraseblock, and erase a whole + eraseblock. Block devices support 2 main operations - read a whole + block and write a whole block. +3 The whole eraseblock has to be erased before it becomes possible to + re-write its contents. Blocks may be just re-written. +4 Eraseblocks become worn out after some number of erase cycles - + typically 100K-1G for SLC NAND and NOR flashes, and 1K-10K for MLC + NAND flashes. Blocks do not have the wear-out property. +5 Eraseblocks may become bad (only on NAND flashes) and software should + deal with this. Blocks on hard drives typically do not become bad, + because hardware has mechanisms to substitute bad blocks, at least in + modern LBA disks. + +It should be quite obvious why UBIFS is very different to traditional +file-systems. + +UBIFS works on top of UBI. UBI is a separate software layer which may be +found in drivers/mtd/ubi. UBI is basically a volume management and +wear-leveling layer. It provides so called UBI volumes which is a higher +level abstraction than a MTD device. The programming model of UBI devices +is very similar to MTD devices - they still consist of large eraseblocks, +they have read/write/erase operations, but UBI devices are devoid of +limitations like wear and bad blocks (items 4 and 5 in the above list). + +In a sense, UBIFS is a next generation of JFFS2 file-system, but it is +very different and incompatible to JFFS2. The following are the main +differences. + +* JFFS2 works on top of MTD devices, UBIFS depends on UBI and works on + top of UBI volumes. +* JFFS2 does not have on-media index and has to build it while mounting, + which requires full media scan. UBIFS maintains the FS indexing + information on the flash media and does not require full media scan, + so it mounts many times faster than JFFS2. +* JFFS2 is a write-through file-system, while UBIFS supports write-back, + which makes UBIFS much faster on writes. + +Similarly to JFFS2, UBIFS supports on-the-flight compression which makes +it possible to fit quite a lot of data to the flash. + +Similarly to JFFS2, UBIFS is tolerant of unclean reboots and power-cuts. +It does not need stuff like ckfs.ext2. UBIFS automatically replays its +journal and recovers from crashes, ensuring that the on-flash data +structures are consistent. + +UBIFS scales logarithmically (most of the data structures it uses are +trees), so the mount time and memory consumption do not linearly depend +on the flash size, like in case of JFFS2. This is because UBIFS +maintains the FS index on the flash media. However, UBIFS depends on +UBI, which scales linearly. So overall UBI/UBIFS stack scales linearly. +Nevertheless, UBI/UBIFS scales considerably better than JFFS2. + +The authors of UBIFS believe, that it is possible to develop UBI2 which +would scale logarithmically as well. UBI2 would support the same API as UBI, +but it would be binary incompatible to UBI. So UBIFS would not need to be +changed to use UBI2 + + +Mount options +============= + +(*) == default. + +norm_unmount (*) commit on unmount; the journal is committed + when the file-system is unmounted so that the + next mount does not have to replay the journal + and it becomes very fast; +fast_unmount do not commit on unmount; this option makes + unmount faster, but the next mount slower + because of the need to replay the journal. + + +Quick usage instructions +======================== + +The UBI volume to mount is specified using "ubiX_Y" or "ubiX:NAME" syntax, +where "X" is UBI device number, "Y" is UBI volume number, and "NAME" is +UBI volume name. + +Mount volume 0 on UBI device 0 to /mnt/ubifs: +$ mount -t ubifs ubi0_0 /mnt/ubifs + +Mount "rootfs" volume of UBI device 0 to /mnt/ubifs ("rootfs" is volume +name): +$ mount -t ubifs ubi0:rootfs /mnt/ubifs + +The following is an example of the kernel boot arguments to attach mtd0 +to UBI and mount volume "rootfs": +ubi.mtd=0 root=ubi0:rootfs rootfstype=ubifs + + +Module Parameters for Debugging +=============================== + +When UBIFS has been compiled with debugging enabled, there are 3 module +parameters that are available to control aspects of testing and debugging. +The parameters are unsigned integers where each bit controls an option. +The parameters are: + +debug_msgs Selects which debug messages to display, as follows: + + Message Type Flag value + + General messages 1 + Journal messages 2 + Mount messages 4 + Commit messages 8 + LEB search messages 16 + Budgeting messages 32 + Garbage collection messages 64 + Tree Node Cache (TNC) messages 128 + LEB properties (lprops) messages 256 + Input/output messages 512 + Log messages 1024 + Scan messages 2048 + Recovery messages 4096 + +debug_chks Selects extra checks that UBIFS can do while running: + + Check Flag value + + General checks 1 + Check Tree Node Cache (TNC) 2 + Check indexing tree size 4 + Check orphan area 8 + Check old indexing tree 16 + Check LEB properties (lprops) 32 + Check leaf nodes and inodes 64 + +debug_tsts Selects a mode of testing, as follows: + + Test mode Flag value + + Force in-the-gaps method 2 + Failure mode for recovery testing 4 + +For example, set debug_msgs to 5 to display General messages and Mount +messages. + + +References +========== + +UBIFS documentation and FAQ/HOWTO at the MTD web site: +http://www.linux-mtd.infradead.org/doc/ubifs.html +http://www.linux-mtd.infradead.org/faq/ubifs.html diff --git a/Documentation/filesystems/vfat.txt b/Documentation/filesystems/vfat.txt index 2d5e1e582e13272bfaef2fbc494a156d829cc289..bbac4f1d90567c3f7ea0f46a869c091160390076 100644 --- a/Documentation/filesystems/vfat.txt +++ b/Documentation/filesystems/vfat.txt @@ -96,6 +96,14 @@ shortname=lower|win95|winnt|mixed emulate the Windows 95 rule for create. Default setting is `lower'. +tz=UTC -- Interpret timestamps as UTC rather than local time. + This option disables the conversion of timestamps + between local time (as used by Windows on FAT) and UTC + (which Linux uses internally). This is particuluarly + useful when mounting devices (like digital cameras) + that are set to UTC in order to avoid the pitfalls of + local time. + : 0,1,yes,no,true,false TODO diff --git a/Documentation/filesystems/vfs.txt b/Documentation/filesystems/vfs.txt index b7522c6cbae3758f77cb12e22b78825e43a3796d..c4d348dabe9499454055ebff41fb88ef71346dda 100644 --- a/Documentation/filesystems/vfs.txt +++ b/Documentation/filesystems/vfs.txt @@ -143,7 +143,7 @@ struct file_system_type { The get_sb() method has the following arguments: - struct file_system_type *fs_type: decribes the filesystem, partly initialized + struct file_system_type *fs_type: describes the filesystem, partly initialized by the specific filesystem code int flags: mount flags @@ -895,9 +895,9 @@ struct dentry_operations { iput() yourself d_dname: called when the pathname of a dentry should be generated. - Usefull for some pseudo filesystems (sockfs, pipefs, ...) to delay + Useful for some pseudo filesystems (sockfs, pipefs, ...) to delay pathname generation. (Instead of doing it when dentry is created, - its done only when the path is needed.). Real filesystems probably + it's done only when the path is needed.). Real filesystems probably dont want to use it, because their dentries are present in global dcache hash, so their hash should be an invariant. As no lock is held, d_dname() should not try to modify the dentry itself, unless diff --git a/Documentation/ftrace.txt b/Documentation/ftrace.txt index 13e4bf054c383523fde7726ae4dafde4838cad93..f218f616ff6bbf79e6b6aa6987f64a41142df5f0 100644 --- a/Documentation/ftrace.txt +++ b/Documentation/ftrace.txt @@ -2,8 +2,12 @@ ======================== Copyright 2008 Red Hat Inc. -Author: Steven Rostedt + Author: Steven Rostedt + License: The GNU Free Documentation License, Version 1.2 +Reviewers: Elias Oltmanns, Randy Dunlap, Andrew Morton, + John Kacur, and David Teigland. +Written for: 2.6.27-rc1 Introduction ------------ @@ -15,10 +19,11 @@ issues that take place outside of user-space. Although ftrace is the function tracer, it also includes an infrastructure that allows for other types of tracing. Some of the -tracers that are currently in ftrace is a tracer to trace +tracers that are currently in ftrace include a tracer to trace context switches, the time it takes for a high priority task to run after it was woken up, the time interrupts are disabled, and -more. +more (ftrace allows for tracer plugins, which means that the list of +tracers can always grow). The File System @@ -32,6 +37,8 @@ To mount the debugfs system: # mkdir /debug # mount -t debugfs nodev /debug +(Note: it is more common to mount at /sys/kernel/debug, but for simplicity + this document will use /debug) That's it! (assuming that you have ftrace configured into your kernel) @@ -46,21 +53,20 @@ of ftrace. Here is a list of some of the key files: that is configured. available_tracers : This holds the different types of tracers that - has been compiled into the kernel. The tracers - listed here can be configured by echoing in their - name into current_tracer. + have been compiled into the kernel. The tracers + listed here can be configured by echoing their name + into current_tracer. tracing_enabled : This sets or displays whether the current_tracer is activated and tracing or not. Echo 0 into this - file to disable the tracer or 1 (or non-zero) to - enable it. + file to disable the tracer or 1 to enable it. trace : This file holds the output of the trace in a human readable - format. + format (described below). latency_trace : This file shows the same trace but the information is organized more to display possible latencies - in the system. + in the system (described below). trace_pipe : The output is the same as the "trace" file but this file is meant to be streamed with live tracing. @@ -72,7 +78,7 @@ of ftrace. Here is a list of some of the key files: file, it is consumed, and will not be read again with a sequential read. The "trace" and "latency_trace" files are static, and if the - tracer isn't adding more data, they will display + tracer is not adding more data, they will display the same information every time they are read. iter_ctrl : This file lets the user control the amount of data @@ -89,12 +95,14 @@ of ftrace. Here is a list of some of the key files: trace_entries : This sets or displays the number of trace entries each CPU buffer can hold. The tracer buffers - are the same size for each CPU, so care must be - taken when modifying the trace_entries. The number - of actually entries will be the number given - times the number of possible CPUS. The buffers - are saved as individual pages, and the actual entries - will always be rounded up to entries per page. + are the same size for each CPU. The displayed number + is the size of the CPU buffer and not total size. The + trace buffers are allocated in pages (blocks of memory + that the kernel uses for allocation, usually 4 KB in size). + Since each entry is smaller than a page, if the last + allocated page has room for more entries than were + requested, the rest of the page is used to allocate + entries. This can only be updated when the current_tracer is set to "none". @@ -107,20 +115,19 @@ of ftrace. Here is a list of some of the key files: on specified CPUS. The format is a hex string representing the CPUS. - set_ftrace_filter : When dynamic ftrace is configured in, the - code is dynamically modified to disable calling - of the function profiler (mcount). This lets - tracing be configured in with practically no overhead - in performance. This also has a side effect of - enabling or disabling specific functions to be - traced. Echoing in names of functions into this - file will limit the trace to only those files. - - set_ftrace_notrace: This has the opposite effect that - set_ftrace_filter has. Any function that is added - here will not be traced. If a function exists - in both set_ftrace_filter and set_ftrace_notrace - the function will _not_ bet traced. + set_ftrace_filter : When dynamic ftrace is configured in (see the + section below "dynamic ftrace"), the code is dynamically + modified (code text rewrite) to disable calling of the + function profiler (mcount). This lets tracing be configured + in with practically no overhead in performance. This also + has a side effect of enabling or disabling specific functions + to be traced. Echoing names of functions into this file + will limit the trace to only those functions. + + set_ftrace_notrace: This has an effect opposite to that of + set_ftrace_filter. Any function that is added here will not + be traced. If a function exists in both set_ftrace_filter + and set_ftrace_notrace, the function will _not_ be traced. available_filter_functions : When a function is encountered the first time by the dynamic tracer, it is recorded and @@ -128,32 +135,31 @@ of ftrace. Here is a list of some of the key files: lists the functions that have been recorded by the dynamic tracer and these functions can be used to set the ftrace filter by the above - "set_ftrace_filter" file. + "set_ftrace_filter" file. (See the section "dynamic ftrace" + below for more details). The Tracers ----------- -Here are the list of current tracers that can be configured. +Here is the list of current tracers that may be configured. ftrace - function tracer that uses mcount to trace all functions. - It is possible to filter out which functions that are - traced when dynamic ftrace is configured in. sched_switch - traces the context switches between tasks. - irqsoff - traces the areas that disable interrupts and saves off + irqsoff - traces the areas that disable interrupts and saves the trace with the longest max latency. See tracing_max_latency. When a new max is recorded, it replaces the old trace. It is best to view this - trace with the latency_trace file. + trace via the latency_trace file. - preemptoff - Similar to irqsoff but traces and records the time - preemption is disabled. + preemptoff - Similar to irqsoff but traces and records the amount of + time for which preemption is disabled. preemptirqsoff - Similar to irqsoff and preemptoff, but traces and - records the largest time irqs and/or preemption is - disabled. + records the largest time for which irqs and/or preemption + is disabled. wakeup - Traces and records the max latency that it takes for the highest priority task to get scheduled after @@ -166,13 +172,13 @@ Here are the list of current tracers that can be configured. Examples of using the tracer ---------------------------- -Here are typical examples of using the tracers with only controlling -them with the debugfs interface (without using any user-land utilities). +Here are typical examples of using the tracers when controlling them only +with the debugfs interface (without using any user-land utilities). Output format: -------------- -Here's an example of the output format of the file "trace" +Here is an example of the output format of the file "trace" -------- # tracer: ftrace @@ -184,14 +190,15 @@ Here's an example of the output format of the file "trace" bash-4251 [01] 10152.583855: _atomic_dec_and_lock <-dput -------- -A header is printed with the trace that is represented. In this case -the tracer is "ftrace". Then a header showing the format. Task name -"bash", the task PID "4251", the CPU that it was running on +A header is printed with the tracer name that is represented by the trace. +In this case the tracer is "ftrace". Then a header showing the format. Task +name "bash", the task PID "4251", the CPU that it was running on "01", the timestamp in . format, the function name that was traced "path_put" and the parent function that called this function -"path_walk". +"path_walk". The timestamp is the time at which the function was +entered. -The sched_switch tracer also includes tracing of task wake ups and +The sched_switch tracer also includes tracing of task wakeups and context switches. ksoftirqd/1-7 [01] 1453.070013: 7:115:R + 2916:115:S @@ -201,7 +208,7 @@ context switches. kondemand/1-2916 [01] 1453.070013: 2916:115:S ==> 7:115:R ksoftirqd/1-7 [01] 1453.070013: 7:115:S ==> 0:140:R -Wake ups are represented by a "+" and the context switches show +Wake ups are represented by a "+" and the context switches are shown as "==>". The format is: Context switches: @@ -216,7 +223,7 @@ Wake ups are represented by a "+" and the context switches show :: + :: -The prio is the internal kernel priority, which is inverse to the +The prio is the internal kernel priority, which is the inverse of the priority that is usually displayed by user-space tools. Zero represents the highest priority (99). Prio 100 starts the "nice" priorities with 100 being equal to nice -20 and 139 being nice 19. The prio "140" is @@ -227,7 +234,7 @@ Latency trace format -------------------- For traces that display latency times, the latency_trace file gives -a bit more information to see why a latency happened. Here's a typical +somewhat more information to see why a latency happened. Here is a typical trace. # tracer: irqsoff @@ -255,21 +262,20 @@ irqsoff latency trace v1.1.5 on 2.6.26-rc8 -0 0d.s1 98us : trace_hardirqs_on (do_softirq) -vim:ft=help - -This shows that the current tracer is "irqsoff" tracing the time -interrupts are disabled. It gives the trace version and the kernel -this was executed on (2.6.26-rc8). Then it displays the max latency -in microsecs (97 us). The number of trace entries displayed -by the total number recorded (both are three: #3/3). The type of +This shows that the current tracer is "irqsoff" tracing the time for which +interrupts were disabled. It gives the trace version and the version +of the kernel upon which this was executed on (2.6.26-rc8). Then it displays +the max latency in microsecs (97 us). The number of trace entries displayed +and the total number recorded (both are three: #3/3). The type of preemption that was used (PREEMPT). VP, KP, SP, and HP are always zero -and reserved for later use. #P is the number of online CPUS (#P:2). +and are reserved for later use. #P is the number of online CPUS (#P:2). -The task is the process that was running when the latency happened. +The task is the process that was running when the latency occurred. (swapper pid: 0). -The start and stop that caused the latencies: +The start and stop (the functions in which the interrupts were disabled and +enabled respectively) that caused the latencies: apic_timer_interrupt is where the interrupts were disabled. do_softirq is where they were enabled again. @@ -281,14 +287,14 @@ explains which is which. pid: The PID of that process. - CPU#: The CPU that the process was running on. + CPU#: The CPU which the process was running on. irqs-off: 'd' interrupts are disabled. '.' otherwise. need-resched: 'N' task need_resched is set, '.' otherwise. hardirq/softirq: - 'H' - hard irq happened inside a softirq. + 'H' - hard irq occurred inside a softirq. 'h' - hard irq is running 's' - soft irq is running '.' - normal context. @@ -297,13 +303,13 @@ explains which is which. The above is mostly meaningful for kernel developers. - time: This differs from the trace output where as the trace output - contained a absolute timestamp. This timestamp is relative - to the start of the first entry in the the trace. + time: This differs from the trace file output. The trace file output + includes an absolute timestamp. The timestamp used by the + latency_trace file is relative to the start of the trace. delay: This is just to help catch your eye a bit better. And needs to be fixed to be only relative to the same CPU. - The marks is determined by the difference between this + The marks are determined by the difference between this current trace and the next trace. '!' - greater than preempt_mark_thresh (default 100) '+' - greater than 1 microsecond @@ -322,13 +328,13 @@ output. To see what is available, simply cat the file: print-parent nosym-offset nosym-addr noverbose noraw nohex nobin \ noblock nostacktrace nosched-tree -To disable one of the options, echo in the option appended with "no". +To disable one of the options, echo in the option prepended with "no". echo noprint-parent > /debug/tracing/iter_ctrl To enable an option, leave off the "no". - echo sym-offest > /debug/tracing/iter_ctrl + echo sym-offset > /debug/tracing/iter_ctrl Here are the available options: @@ -344,7 +350,7 @@ Here are the available options: sym-offset - Display not only the function name, but also the offset in the function. For example, instead of seeing just - "ktime_get" you will see "ktime_get+0xb/0x20" + "ktime_get", you will see "ktime_get+0xb/0x20". sym-offset: bash-4000 [01] 1477.606694: simple_strtoul+0x6/0xa0 @@ -364,7 +370,7 @@ Here are the available options: user applications that can translate the raw numbers better than having it done in the kernel. - hex - similar to raw, but the numbers will be in a hexadecimal format. + hex - Similar to raw, but the numbers will be in a hexadecimal format. bin - This will print out the formats in raw binary. @@ -380,8 +386,8 @@ Here are the available options: sched_switch ------------ -This tracer simply records schedule switches. Here's an example -on how to implement it. +This tracer simply records schedule switches. Here is an example +of how to use it. # echo sched_switch > /debug/tracing/current_tracer # echo 1 > /debug/tracing/tracing_enabled @@ -416,8 +422,8 @@ the name of the trace and points to the options. The "FUNCTION" is a misnomer since here it represents the wake ups and context switches. -The sched_switch only lists the wake ups (represented with '+') -and context switches ('==>') with the previous task or current +The sched_switch file only lists the wake ups (represented with '+') +and context switches ('==>') with the previous task or current task first followed by the next task or task waking up. The format for both of these is PID:KERNEL-PRIO:TASK-STATE. Remember that the KERNEL-PRIO is the inverse of the actual priority with zero (0) being the highest @@ -432,7 +438,8 @@ The task states are: R - running : wants to run, may not actually be running S - sleep : process is waiting to be woken up (handles signals) - D - deep sleep : process must be woken up (ignores signals) + D - disk sleep (uninterruptible sleep) : process must be woken up + (ignores signals) T - stopped : process suspended t - traced : process is being traced (with something like gdb) Z - zombie : process waiting to be cleaned up @@ -442,8 +449,8 @@ The task states are: ftrace_enabled -------------- -The following tracers give different output depending on whether -or not the sysctl ftrace_enabled is set. To set ftrace_enabled, +The following tracers (listed below) give different output depending +on whether or not the sysctl ftrace_enabled is set. To set ftrace_enabled, one can either use the sysctl function or set it via the proc file system interface. @@ -470,13 +477,12 @@ interrupt from triggering or the mouse interrupt from letting the kernel know of a new mouse event. The result is a latency with the reaction time. -The irqsoff tracer tracks the time interrupts are disabled and when -they are re-enabled. When a new maximum latency is hit, it saves off -the trace so that it may be retrieved at a later time. Every time a -new maximum in reached, the old saved trace is discarded and the new -trace is saved. +The irqsoff tracer tracks the time for which interrupts are disabled. +When a new maximum latency is hit, the tracer saves the trace leading up +to that latency point so that every time a new maximum is reached, the old +saved trace is discarded and the new trace is saved. -To reset the maximum, echo 0 into tracing_max_latency. Here's an +To reset the maximum, echo 0 into tracing_max_latency. Here is an example: # echo irqsoff > /debug/tracing/current_tracer @@ -488,14 +494,14 @@ example: # cat /debug/tracing/latency_trace # tracer: irqsoff # -irqsoff latency trace v1.1.5 on 2.6.26-rc8 +irqsoff latency trace v1.1.5 on 2.6.26 -------------------------------------------------------------------- - latency: 6 us, #3/3, CPU#1 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:2) + latency: 12 us, #3/3, CPU#1 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:2) ----------------- - | task: bash-4269 (uid:0 nice:0 policy:0 rt_prio:0) + | task: bash-3730 (uid:0 nice:0 policy:0 rt_prio:0) ----------------- - => started at: copy_page_range - => ended at: copy_page_range + => started at: sys_setpgid + => ended at: sys_setpgid # _------=> CPU# # / _-----=> irqs-off @@ -506,21 +512,19 @@ irqsoff latency trace v1.1.5 on 2.6.26-rc8 # ||||| delay # cmd pid ||||| time | caller # \ / ||||| \ | / - bash-4269 1...1 0us+: _spin_lock (copy_page_range) - bash-4269 1...1 7us : _spin_unlock (copy_page_range) - bash-4269 1...2 7us : trace_preempt_on (copy_page_range) + bash-3730 1d... 0us : _write_lock_irq (sys_setpgid) + bash-3730 1d..1 1us+: _write_unlock_irq (sys_setpgid) + bash-3730 1d..2 14us : trace_hardirqs_on (sys_setpgid) -vim:ft=help +Here we see that that we had a latency of 12 microsecs (which is +very good). The _write_lock_irq in sys_setpgid disabled interrupts. +The difference between the 12 and the displayed timestamp 14us occurred +because the clock was incremented between the time of recording the max +latency and the time of recording the function that had that latency. -Here we see that that we had a latency of 6 microsecs (which is -very good). The spin_lock in copy_page_range disabled interrupts. -The difference between the 6 and the displayed timestamp 7us is -because the clock must have incremented between the time of recording -the max latency and recording the function that had that latency. - -Note the above had ftrace_enabled not set. If we set the ftrace_enabled -we get a much larger output: +Note the above example had ftrace_enabled not set. If we set the +ftrace_enabled, we get a much larger output: # tracer: irqsoff # @@ -566,27 +570,26 @@ irqsoff latency trace v1.1.5 on 2.6.26-rc8 ls-4339 0d..2 51us : trace_hardirqs_on (__alloc_pages_internal) -vim:ft=help - Here we traced a 50 microsecond latency. But we also see all the -functions that were called during that time. Note that enabling -function tracing we endure an added overhead. This overhead may -extend the latency times. But never the less, this trace has provided -some very helpful debugging. +functions that were called during that time. Note that by enabling +function tracing, we incur an added overhead. This overhead may +extend the latency times. But nevertheless, this trace has provided +some very helpful debugging information. preemptoff ---------- -When preemption is disabled we may be able to receive interrupts but -the task can not be preempted and a higher priority task must wait +When preemption is disabled, we may be able to receive interrupts but +the task cannot be preempted and a higher priority task must wait for preemption to be enabled again before it can preempt a lower priority task. -The preemptoff tracer traces the places that disables preemption. -Like the irqsoff, it records the maximum latency that preemption -was disabled. The control of preemptoff is much like the irqsoff. +The preemptoff tracer traces the places that disable preemption. +Like the irqsoff tracer, it records the maximum latency for which preemption +was disabled. The control of preemptoff tracer is much like the irqsoff +tracer. # echo preemptoff > /debug/tracing/current_tracer # echo 0 > /debug/tracing/tracing_max_latency @@ -620,8 +623,6 @@ preemptoff latency trace v1.1.5 on 2.6.26-rc8 sshd-4261 0d.s1 30us : trace_preempt_on (__do_softirq) -vim:ft=help - This has some more changes. Preemption was disabled when an interrupt came in (notice the 'h'), and was enabled while doing a softirq. (notice the 's'). But we also see that interrupts have been disabled @@ -689,16 +690,16 @@ The above is an example of the preemptoff trace with ftrace_enabled set. Here we see that interrupts were disabled the entire time. The irq_enter code lets us know that we entered an interrupt 'h'. Before that, the functions being traced still show that it is not -in an interrupt, but we can see by the functions themselves that +in an interrupt, but we can see from the functions themselves that this is not the case. -Notice that the __do_softirq when called doesn't have a preempt_count. -It may seem that we missed a preempt enabled. What really happened -is that the preempt count is held on the threads stack and we +Notice that __do_softirq when called does not have a preempt_count. +It may seem that we missed a preempt enabling. What really happened +is that the preempt count is held on the thread's stack and we switched to the softirq stack (4K stacks in effect). The code -does not copy the preempt count, but because interrupts are disabled -we don't need to worry about it. Having a tracer like this is good -to let people know what really happens inside the kernel. +does not copy the preempt count, but because interrupts are disabled, +we do not need to worry about it. Having a tracer like this is good +for letting people know what really happens inside the kernel. preemptirqsoff @@ -708,7 +709,7 @@ Knowing the locations that have interrupts disabled or preemption disabled for the longest times is helpful. But sometimes we would like to know when either preemption and/or interrupts are disabled. -The following code: +Consider the following code: local_irq_disable(); call_function_with_irqs_off(); @@ -732,7 +733,7 @@ To record this time, use the preemptirqsoff tracer. Again, using this trace is much like the irqsoff and preemptoff tracers. - # echo preemptoff > /debug/tracing/current_tracer + # echo preemptirqsoff > /debug/tracing/current_tracer # echo 0 > /debug/tracing/tracing_max_latency # echo 1 > /debug/tracing/tracing_enabled # ls -ltr @@ -764,12 +765,10 @@ preemptirqsoff latency trace v1.1.5 on 2.6.26-rc8 ls-4860 0d.s1 294us : trace_preempt_on (__do_softirq) -vim:ft=help - The trace_hardirqs_off_thunk is called from assembly on x86 when interrupts are disabled in the assembly code. Without the function -tracing, we don't know if interrupts were enabled within the preemption +tracing, we do not know if interrupts were enabled within the preemption points. We do see that it started with preemption enabled. Here is a trace with ftrace_enabled set: @@ -860,25 +859,25 @@ preemptirqsoff latency trace v1.1.5 on 2.6.26-rc8 This is a very interesting trace. It started with the preemption of the ls task. We see that the task had the "need_resched" bit set -with the 'N' in the trace. Interrupts are disabled in the spin_lock -and the trace started. We see that a schedule took place to run -sshd. When the interrupts were enabled we took an interrupt. -On return of the interrupt the softirq ran. We took another interrupt -while running the softirq as we see with the capital 'H'. +via the 'N' in the trace. Interrupts were disabled before the spin_lock +at the beginning of the trace. We see that a schedule took place to run +sshd. When the interrupts were enabled, we took an interrupt. +On return from the interrupt handler, the softirq ran. We took another +interrupt while running the softirq as we see from the capital 'H'. wakeup ------ -In Real-Time environment it is very important to know the wakeup -time it takes for the highest priority task that wakes up to the -time it executes. This is also known as "schedule latency". +In a Real-Time environment it is very important to know the wakeup +time it takes for the highest priority task that is woken up to the +time that it executes. This is also known as "schedule latency". I stress the point that this is about RT tasks. It is also important to know the scheduling latency of non-RT tasks, but the average schedule latency is better for non-RT tasks. Tools like -LatencyTop is more appropriate for such measurements. +LatencyTop are more appropriate for such measurements. -Real-Time environments is interested in the worst case latency. +Real-Time environments are interested in the worst case latency. That is the longest latency it takes for something to happen, and not the average. We can have a very fast scheduler that may only have a large latency once in a while, but that would not work well @@ -889,8 +888,8 @@ tasks that are unpredictable will overwrite the worst case latency of RT tasks. Since this tracer only deals with RT tasks, we will run this slightly -different than we did with the previous tracers. Instead of performing -an 'ls' we will run 'sleep 1' under 'chrt' which changes the +differently than we did with the previous tracers. Instead of performing +an 'ls', we will run 'sleep 1' under 'chrt' which changes the priority of the task. # echo wakeup > /debug/tracing/current_tracer @@ -921,12 +920,10 @@ wakeup latency trace v1.1.5 on 2.6.26-rc8 -0 1d..4 4us : schedule (cpu_idle) -vim:ft=help - -Running this on an idle system we see that it only took 4 microseconds +Running this on an idle system, we see that it only took 4 microseconds to perform the task switch. Note, since the trace marker in the -schedule is before the actual "switch" we stop the tracing when +schedule is before the actual "switch", we stop the tracing when the recorded task is about to schedule in. This may change if we add a new marker at the end of the scheduler. @@ -991,13 +988,16 @@ ksoftirq-7 1d..6 49us : sub_preempt_count (_spin_unlock) ksoftirq-7 1d..4 50us : schedule (__cond_resched) The interrupt went off while running ksoftirqd. This task runs at -SCHED_OTHER. Why didn't we see the 'N' set early? This may be -a harmless bug with x86_32 and 4K stacks. The need_reched() function -that tests if we need to reschedule looks on the actual stack. -Where as the setting of the NEED_RESCHED bit happens on the -task's stack. But because we are in a hard interrupt, the test -is with the interrupts stack which has that to be false. We don't -see the 'N' until we switch back to the task's stack. +SCHED_OTHER. Why did not we see the 'N' set early? This may be +a harmless bug with x86_32 and 4K stacks. On x86_32 with 4K stacks +configured, the interrupt and softirq run with their own stack. +Some information is held on the top of the task's stack (need_resched +and preempt_count are both stored there). The setting of the NEED_RESCHED +bit is done directly to the task's stack, but the reading of the +NEED_RESCHED is done by looking at the current stack, which in this case +is the stack for the hard interrupt. This hides the fact that NEED_RESCHED +has been set. We do not see the 'N' until we switch back to the task's +assigned stack. ftrace ------ @@ -1036,14 +1036,14 @@ this tracer is a nop. [...] -Note: It is sometimes better to enable or disable tracing directly from -a program, because the buffer may be overflowed by the echo commands -before you get to the point you want to trace. It is also easier to -stop the tracing at the point that you hit the part that you are -interested in. Since the ftrace buffer is a ring buffer with the -oldest data being overwritten, usually it is sufficient to start the -tracer with an echo command but have you code stop it. Something -like the following is usually appropriate for this. +Note: ftrace uses ring buffers to store the above entries. The newest data +may overwrite the oldest data. Sometimes using echo to stop the trace +is not sufficient because the tracing could have overwritten the data +that you wanted to record. For this reason, it is sometimes better to +disable tracing directly from a program. This allows you to stop the +tracing at the point that you hit the part that you are interested in. +To disable the tracing directly from a C program, something like following +code snippet can be used: int trace_fd; [...] @@ -1052,25 +1052,31 @@ int main(int argc, char *argv[]) { trace_fd = open("/debug/tracing/tracing_enabled", O_WRONLY); [...] if (condition_hit()) { - write(trace_fd, "0", 1); + write(trace_fd, "0", 1); } [...] } +Note: Here we hard coded the path name. The debugfs mount is not +guaranteed to be at /debug (and is more commonly at /sys/kernel/debug). +For simple one time traces, the above is sufficent. For anything else, +a search through /proc/mounts may be needed to find where the debugfs +file-system is mounted. dynamic ftrace -------------- -If CONFIG_DYNAMIC_FTRACE is set, then the system will run with +If CONFIG_DYNAMIC_FTRACE is set, the system will run with virtually no overhead when function tracing is disabled. The way this works is the mcount function call (placed at the start of every kernel function, produced by the -pg switch in gcc), starts -of pointing to a simple return. +of pointing to a simple return. (Enabling FTRACE will include the +-pg switch in the compiling of the kernel.) -When dynamic ftrace is initialized, it calls kstop_machine to make it -act like a uniprocessor so that it can freely modify code without -worrying about other processors executing that same code. At -initialization, the mcount calls are change to call a "record_ip" +When dynamic ftrace is initialized, it calls kstop_machine to make +the machine act like a uniprocessor so that it can freely modify code +without worrying about other processors executing that same code. At +initialization, the mcount calls are changed to call a "record_ip" function. After this, the first time a kernel function is called, it has the calling address saved in a hash table. @@ -1078,15 +1084,15 @@ Later on the ftraced kernel thread is awoken and will again call kstop_machine if new functions have been recorded. The ftraced thread will change all calls to mcount to "nop". Just calling mcount and having mcount return has shown a 10% overhead. By converting -it to a nop, there is no recordable overhead to the system. +it to a nop, there is no measurable overhead to the system. One special side-effect to the recording of the functions being -traced, is that we can now selectively choose which functions we -want to trace and which ones we want the mcount calls to remain as +traced is that we can now selectively choose which functions we +wish to trace and which ones we want the mcount calls to remain as nops. -Two files that contain to the enabling and disabling of recorded -functions are: +Two files are used, one for enabling and one for disabling the tracing +of specified functions. They are: set_ftrace_filter @@ -1094,7 +1100,7 @@ and set_ftrace_notrace -A list of available functions that you can add to this files is listed +A list of available functions that you can add to these files is listed in: available_filter_functions @@ -1108,7 +1114,7 @@ pick_next_task_fair mutex_lock [...] -If I'm only interested in sys_nanosleep and hrtimer_interrupt: +If I am only interested in sys_nanosleep and hrtimer_interrupt: # echo sys_nanosleep hrtimer_interrupt \ > /debug/tracing/set_ftrace_filter @@ -1125,21 +1131,21 @@ If I'm only interested in sys_nanosleep and hrtimer_interrupt: usleep-4134 [00] 1317.070111: sys_nanosleep <-syscall_call -0 [00] 1317.070115: hrtimer_interrupt <-smp_apic_timer_interrupt -To see what functions are being traced, you can cat the file: +To see which functions are being traced, you can cat the file: # cat /debug/tracing/set_ftrace_filter hrtimer_interrupt sys_nanosleep -Perhaps this isn't enough. The filters also allow simple wild cards. -Only the following is currently available +Perhaps this is not enough. The filters also allow simple wild cards. +Only the following are currently available - * - will match functions that begins with + * - will match functions that begin with * - will match functions that end with ** - will match functions that have in it -Thats all the wild cards that are allowed. +These are the only wild cards which are supported. * will not work. @@ -1187,7 +1193,7 @@ This is because the '>' and '>>' act just like they do in bash. To rewrite the filters, use '>' To append to the filters, use '>>' -To clear out a filter so that all functions will be recorded again. +To clear out a filter so that all functions will be recorded again: # echo > /debug/tracing/set_ftrace_filter # cat /debug/tracing/set_ftrace_filter @@ -1246,24 +1252,24 @@ ftraced As mentioned above, when dynamic ftrace is configured in, a kernel thread wakes up once a second and checks to see if there are mcount -calls that need to be converted into nops. If there is not, then -it simply goes back to sleep. But if there is, it will call +calls that need to be converted into nops. If there are not any, then +it simply goes back to sleep. But if there are some, it will call kstop_machine to convert the calls to nops. -There may be a case that you do not want this added latency. +There may be a case in which you do not want this added latency. Perhaps you are doing some audio recording and this activity might cause skips in the playback. There is an interface to disable -and enable the ftraced kernel thread. +and enable the "ftraced" kernel thread. # echo 0 > /debug/tracing/ftraced_enabled -This will disable the calling of the kstop_machine to update the -mcount calls to nops. Remember that there's a large overhead +This will disable the calling of kstop_machine to update the +mcount calls to nops. Remember that there is a large overhead to calling mcount. Without this kernel thread, that overhead will exist. -Any write to the ftraced_enabled file will cause the kstop_machine -to run if there are recorded calls to mcount. This means that a +If there are recorded calls to mcount, any write to the ftraced_enabled +file will cause the kstop_machine to run. This means that a user can manually perform the updates when they want to by simply echoing a '0' into the ftraced_enabled file. @@ -1274,8 +1280,8 @@ that uses ftrace function recording. trace_pipe ---------- -The trace_pipe outputs the same as trace, but the effect on the -tracing is different. Every read from trace_pipe is consumed. +The trace_pipe outputs the same content as the trace file, but the effect +on the tracing is different. Every read from trace_pipe is consumed. This means that subsequent reads will be different. The trace is live. @@ -1305,7 +1311,7 @@ is live. bash-4043 [00] 41.267111: select_task_rq_rt <-try_to_wake_up -Note, reading the trace_pipe will block until more input is added. +Note, reading the trace_pipe file will block until more input is added. By changing the tracer, trace_pipe will issue an EOF. We needed to set the ftrace tracer _before_ cating the trace_pipe file. @@ -1314,8 +1320,8 @@ trace entries ------------- Having too much or not enough data can be troublesome in diagnosing -some issue in the kernel. The file trace_entries is used to modify -the size of the internal trace buffers. The numbers listed +an issue in the kernel. The file trace_entries is used to modify +the size of the internal trace buffers. The number listed is the number of entries that can be recorded per CPU. To know the full size, multiply the number of possible CPUS with the number of entries. @@ -1323,8 +1329,9 @@ number of entries. # cat /debug/tracing/trace_entries 65620 -Note, to modify this you must have tracing fulling disabled. To do that, -echo "none" into the current_tracer. +Note, to modify this, you must have tracing completely disabled. To do that, +echo "none" into the current_tracer. If the current_tracer is not set +to "none", an EINVAL error will be returned. # echo none > /debug/tracing/current_tracer # echo 100000 > /debug/tracing/trace_entries @@ -1333,18 +1340,18 @@ echo "none" into the current_tracer. Notice that we echoed in 100,000 but the size is 100,045. The entries -are held by individual pages. It allocates the number of pages it takes +are held in individual pages. It allocates the number of pages it takes to fulfill the request. If more entries may fit on the last page -it will add them. +then they will be added. # echo 1 > /debug/tracing/trace_entries # cat /debug/tracing/trace_entries 85 -This shows us that 85 entries can fit on a single page. +This shows us that 85 entries can fit in a single page. -The number of pages that will be allocated is a percentage of available -memory. Allocating too much will produces an error. +The number of pages which will be allocated is limited to a percentage +of available memory. Allocating too much will produce an error. # echo 1000000000000 > /debug/tracing/trace_entries -bash: echo: write error: Cannot allocate memory diff --git a/Documentation/gpio.txt b/Documentation/gpio.txt index c35ca9e40d4ca8ae0cbf7c06c639d8531ae8d9dd..18022e249c53dc1ad991d74d160551fa32f32070 100644 --- a/Documentation/gpio.txt +++ b/Documentation/gpio.txt @@ -347,15 +347,12 @@ necessarily be nonportable. Dynamic definition of GPIOs is not currently standard; for example, as a side effect of configuring an add-on board with some GPIO expanders. -These calls are purely for kernel space, but a userspace API could be built -on top of them. - GPIO implementor's framework (OPTIONAL) ======================================= As noted earlier, there is an optional implementation framework making it easier for platforms to support different kinds of GPIO controller using -the same programming interface. +the same programming interface. This framework is called "gpiolib". As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file will be found there. That will list all the controllers registered through @@ -392,11 +389,21 @@ either NULL or the label associated with that GPIO when it was requested. Platform Support ---------------- -To support this framework, a platform's Kconfig will "select HAVE_GPIO_LIB" +To support this framework, a platform's Kconfig will "select" either +ARCH_REQUIRE_GPIOLIB or ARCH_WANT_OPTIONAL_GPIOLIB and arrange that its includes and defines three functions: gpio_get_value(), gpio_set_value(), and gpio_cansleep(). They may also want to provide a custom value for ARCH_NR_GPIOS. +ARCH_REQUIRE_GPIOLIB means that the gpio-lib code will always get compiled +into the kernel on that architecture. + +ARCH_WANT_OPTIONAL_GPIOLIB means the gpio-lib code defaults to off and the user +can enable it and build it into the kernel optionally. + +If neither of these options are selected, the platform does not support +GPIOs through GPIO-lib and the code cannot be enabled by the user. + Trivial implementations of those functions can directly use framework code, which always dispatches through the gpio_chip: @@ -439,4 +446,120 @@ becomes available. That may mean the device should not be registered until calls for that GPIO can work. One way to address such dependencies is for such gpio_chip controllers to provide setup() and teardown() callbacks to board specific code; those board specific callbacks would register devices -once all the necessary resources are available. +once all the necessary resources are available, and remove them later when +the GPIO controller device becomes unavailable. + + +Sysfs Interface for Userspace (OPTIONAL) +======================================== +Platforms which use the "gpiolib" implementors framework may choose to +configure a sysfs user interface to GPIOs. This is different from the +debugfs interface, since it provides control over GPIO direction and +value instead of just showing a gpio state summary. Plus, it could be +present on production systems without debugging support. + +Given approprate hardware documentation for the system, userspace could +know for example that GPIO #23 controls the write protect line used to +protect boot loader segments in flash memory. System upgrade procedures +may need to temporarily remove that protection, first importing a GPIO, +then changing its output state, then updating the code before re-enabling +the write protection. In normal use, GPIO #23 would never be touched, +and the kernel would have no need to know about it. + +Again depending on appropriate hardware documentation, on some systems +userspace GPIO can be used to determine system configuration data that +standard kernels won't know about. And for some tasks, simple userspace +GPIO drivers could be all that the system really needs. + +Note that standard kernel drivers exist for common "LEDs and Buttons" +GPIO tasks: "leds-gpio" and "gpio_keys", respectively. Use those +instead of talking directly to the GPIOs; they integrate with kernel +frameworks better than your userspace code could. + + +Paths in Sysfs +-------------- +There are three kinds of entry in /sys/class/gpio: + + - Control interfaces used to get userspace control over GPIOs; + + - GPIOs themselves; and + + - GPIO controllers ("gpio_chip" instances). + +That's in addition to standard files including the "device" symlink. + +The control interfaces are write-only: + + /sys/class/gpio/ + + "export" ... Userspace may ask the kernel to export control of + a GPIO to userspace by writing its number to this file. + + Example: "echo 19 > export" will create a "gpio19" node + for GPIO #19, if that's not requested by kernel code. + + "unexport" ... Reverses the effect of exporting to userspace. + + Example: "echo 19 > unexport" will remove a "gpio19" + node exported using the "export" file. + +GPIO signals have paths like /sys/class/gpio/gpio42/ (for GPIO #42) +and have the following read/write attributes: + + /sys/class/gpio/gpioN/ + + "direction" ... reads as either "in" or "out". This value may + normally be written. Writing as "out" defaults to + initializing the value as low. To ensure glitch free + operation, values "low" and "high" may be written to + configure the GPIO as an output with that initial value. + + Note that this attribute *will not exist* if the kernel + doesn't support changing the direction of a GPIO, or + it was exported by kernel code that didn't explicitly + allow userspace to reconfigure this GPIO's direction. + + "value" ... reads as either 0 (low) or 1 (high). If the GPIO + is configured as an output, this value may be written; + any nonzero value is treated as high. + +GPIO controllers have paths like /sys/class/gpio/chipchip42/ (for the +controller implementing GPIOs starting at #42) and have the following +read-only attributes: + + /sys/class/gpio/gpiochipN/ + + "base" ... same as N, the first GPIO managed by this chip + + "label" ... provided for diagnostics (not always unique) + + "ngpio" ... how many GPIOs this manges (N to N + ngpio - 1) + +Board documentation should in most cases cover what GPIOs are used for +what purposes. However, those numbers are not always stable; GPIOs on +a daughtercard might be different depending on the base board being used, +or other cards in the stack. In such cases, you may need to use the +gpiochip nodes (possibly in conjunction with schematics) to determine +the correct GPIO number to use for a given signal. + + +Exporting from Kernel code +-------------------------- +Kernel code can explicitly manage exports of GPIOs which have already been +requested using gpio_request(): + + /* export the GPIO to userspace */ + int gpio_export(unsigned gpio, bool direction_may_change); + + /* reverse gpio_export() */ + void gpio_unexport(); + +After a kernel driver requests a GPIO, it may only be made available in +the sysfs interface by gpio_export(). The driver can control whether the +signal direction may change. This helps drivers prevent userspace code +from accidentally clobbering important system state. + +This explicit exporting can help with debugging (by making some kinds +of experiments easier), or can provide an always-there interface that's +suitable for documenting as part of a board support package. diff --git a/Documentation/i2c/busses/i2c-i810 b/Documentation/i2c/busses/i2c-i810 deleted file mode 100644 index 778210ee158381f7219368af99311009d6a59e4f..0000000000000000000000000000000000000000 --- a/Documentation/i2c/busses/i2c-i810 +++ /dev/null @@ -1,47 +0,0 @@ -Kernel driver i2c-i810 - -Supported adapters: - * Intel 82810, 82810-DC100, 82810E, and 82815 (GMCH) - * Intel 82845G (GMCH) - -Authors: - Frodo Looijaard , - Philip Edelbrock , - Kyösti Mälkki , - Ralph Metzler , - Mark D. Studebaker - -Main contact: Mark Studebaker - -Description ------------ - -WARNING: If you have an '810' or '815' motherboard, your standard I2C -temperature sensors are most likely on the 801's I2C bus. You want the -i2c-i801 driver for those, not this driver. - -Now for the i2c-i810... - -The GMCH chip contains two I2C interfaces. - -The first interface is used for DDC (Data Display Channel) which is a -serial channel through the VGA monitor connector to a DDC-compliant -monitor. This interface is defined by the Video Electronics Standards -Association (VESA). The standards are available for purchase at -http://www.vesa.org . - -The second interface is a general-purpose I2C bus. It may be connected to a -TV-out chip such as the BT869 or possibly to a digital flat-panel display. - -Features --------- - -Both busses use the i2c-algo-bit driver for 'bit banging' -and support for specific transactions is provided by i2c-algo-bit. - -Issues ------- - -If you enable bus testing in i2c-algo-bit (insmod i2c-algo-bit bit_test=1), -the test may fail; if so, the i2c-i810 driver won't be inserted. However, -we think this has been fixed. diff --git a/Documentation/i2c/busses/i2c-prosavage b/Documentation/i2c/busses/i2c-prosavage deleted file mode 100644 index 7036879025110f8ee56ed91e6be911f89ca6ed1a..0000000000000000000000000000000000000000 --- a/Documentation/i2c/busses/i2c-prosavage +++ /dev/null @@ -1,23 +0,0 @@ -Kernel driver i2c-prosavage - -Supported adapters: - - S3/VIA KM266/VT8375 aka ProSavage8 - S3/VIA KM133/VT8365 aka Savage4 - -Author: Henk Vergonet - -Description ------------ - -The Savage4 chips contain two I2C interfaces (aka a I2C 'master' or -'host'). - -The first interface is used for DDC (Data Display Channel) which is a -serial channel through the VGA monitor connector to a DDC-compliant -monitor. This interface is defined by the Video Electronics Standards -Association (VESA). The standards are available for purchase at -http://www.vesa.org . The second interface is a general-purpose I2C bus. - -Usefull for gaining access to the TV Encoder chips. - diff --git a/Documentation/i2c/busses/i2c-savage4 b/Documentation/i2c/busses/i2c-savage4 deleted file mode 100644 index 6ecceab618d39730cae2e5653a77f2d6fa5ea282..0000000000000000000000000000000000000000 --- a/Documentation/i2c/busses/i2c-savage4 +++ /dev/null @@ -1,26 +0,0 @@ -Kernel driver i2c-savage4 - -Supported adapters: - * Savage4 - * Savage2000 - -Authors: - Alexander Wold , - Mark D. Studebaker - -Description ------------ - -The Savage4 chips contain two I2C interfaces (aka a I2C 'master' -or 'host'). - -The first interface is used for DDC (Data Display Channel) which is a -serial channel through the VGA monitor connector to a DDC-compliant -monitor. This interface is defined by the Video Electronics Standards -Association (VESA). The standards are available for purchase at -http://www.vesa.org . The DDC bus is not yet supported because its register -is not directly memory-mapped. - -The second interface is a general-purpose I2C bus. This is the only -interface supported by the driver at the moment. - diff --git a/Documentation/i2c/chips/max6875 b/Documentation/i2c/chips/max6875 index a0cd8af2f40806a53ac2dc1841be8530d4e59992..10ca43cd1a72aa9d2d5bafc77a1116c126d7d892 100644 --- a/Documentation/i2c/chips/max6875 +++ b/Documentation/i2c/chips/max6875 @@ -49,7 +49,7 @@ $ modprobe max6875 force=0,0x50 The MAX6874/MAX6875 ignores address bit 0, so this driver attaches to multiple addresses. For example, for address 0x50, it also reserves 0x51. -The even-address instance is called 'max6875', the odd one is 'max6875 subclient'. +The even-address instance is called 'max6875', the odd one is 'dummy'. Programming the chip using i2c-dev diff --git a/Documentation/i2c/chips/pca9539 b/Documentation/i2c/chips/pca9539 index 1d81c530c4a584f15e25ad85e31e57693acfff6f..6aff890088b15d74d08119ecf97f8e250fac9605 100644 --- a/Documentation/i2c/chips/pca9539 +++ b/Documentation/i2c/chips/pca9539 @@ -7,7 +7,7 @@ drivers/gpio/pca9539.c instead. Supported chips: * Philips PCA9539 Prefix: 'pca9539' - Addresses scanned: 0x74 - 0x77 + Addresses scanned: none Datasheet: http://www.semiconductors.philips.com/acrobat/datasheets/PCA9539_2.pdf @@ -23,6 +23,14 @@ The input sense can also be inverted. The 16 lines are split between two bytes. +Detection +--------- + +The PCA9539 is difficult to detect and not commonly found in PC machines, +so you have to pass the I2C bus and address of the installed PCA9539 +devices explicitly to the driver at load time via the force=... parameter. + + Sysfs entries ------------- diff --git a/Documentation/i2c/chips/pcf8574 b/Documentation/i2c/chips/pcf8574 index 5c1ad1376b62e5588d1b95b0f573211b39e70851..235815c075ff5c8172b4641f8c74283890fbc7b5 100644 --- a/Documentation/i2c/chips/pcf8574 +++ b/Documentation/i2c/chips/pcf8574 @@ -4,13 +4,13 @@ Kernel driver pcf8574 Supported chips: * Philips PCF8574 Prefix: 'pcf8574' - Addresses scanned: I2C 0x20 - 0x27 + Addresses scanned: none Datasheet: Publicly available at the Philips Semiconductors website http://www.semiconductors.philips.com/pip/PCF8574P.html * Philips PCF8574A Prefix: 'pcf8574a' - Addresses scanned: I2C 0x38 - 0x3f + Addresses scanned: none Datasheet: Publicly available at the Philips Semiconductors website http://www.semiconductors.philips.com/pip/PCF8574P.html @@ -38,12 +38,10 @@ For more informations see the datasheet. Accessing PCF8574(A) via /sys interface ------------------------------------- -! Be careful ! The PCF8574(A) is plainly impossible to detect ! Stupid chip. -So every chip with address in the interval [20..27] and [38..3f] are -detected as PCF8574(A). If you have other chips in this address -range, the workaround is to load this module after the one -for your others chips. +So, you have to pass the I2C bus and address of the installed PCF857A +and PCF8574A devices explicitly to the driver at load time via the +force=... parameter. On detection (i.e. insmod, modprobe et al.), directories are being created for each detected PCF8574(A): diff --git a/Documentation/i2c/chips/pcf8575 b/Documentation/i2c/chips/pcf8575 index 25f5698a61cf646ee5d78b24bcfdbc1b6e6154b1..40b268eb276fc3b514142f16958d6f660d79dc04 100644 --- a/Documentation/i2c/chips/pcf8575 +++ b/Documentation/i2c/chips/pcf8575 @@ -40,12 +40,9 @@ Detection --------- There is no method known to detect whether a chip on a given I2C address is -a PCF8575 or whether it is any other I2C device. So there are two alternatives -to let the driver find the installed PCF8575 devices: -- Load this driver after any other I2C driver for I2C devices with addresses - in the range 0x20 .. 0x27. -- Pass the I2C bus and address of the installed PCF8575 devices explicitly to - the driver at load time via the probe=... or force=... parameters. +a PCF8575 or whether it is any other I2C device, so you have to pass the I2C +bus and address of the installed PCF8575 devices explicitly to the driver at +load time via the force=... parameter. /sys interface -------------- diff --git a/Documentation/i2c/fault-codes b/Documentation/i2c/fault-codes new file mode 100644 index 0000000000000000000000000000000000000000..045765c0b9b595f910aa9e8cf753945de8cfedfb --- /dev/null +++ b/Documentation/i2c/fault-codes @@ -0,0 +1,127 @@ +This is a summary of the most important conventions for use of fault +codes in the I2C/SMBus stack. + + +A "Fault" is not always an "Error" +---------------------------------- +Not all fault reports imply errors; "page faults" should be a familiar +example. Software often retries idempotent operations after transient +faults. There may be fancier recovery schemes that are appropriate in +some cases, such as re-initializing (and maybe resetting). After such +recovery, triggered by a fault report, there is no error. + +In a similar way, sometimes a "fault" code just reports one defined +result for an operation ... it doesn't indicate that anything is wrong +at all, just that the outcome wasn't on the "golden path". + +In short, your I2C driver code may need to know these codes in order +to respond correctly. Other code may need to rely on YOUR code reporting +the right fault code, so that it can (in turn) behave correctly. + + +I2C and SMBus fault codes +------------------------- +These are returned as negative numbers from most calls, with zero or +some positive number indicating a non-fault return. The specific +numbers associated with these symbols differ between architectures, +though most Linux systems use numbering. + +Note that the descriptions here are not exhaustive. There are other +codes that may be returned, and other cases where these codes should +be returned. However, drivers should not return other codes for these +cases (unless the hardware doesn't provide unique fault reports). + +Also, codes returned by adapter probe methods follow rules which are +specific to their host bus (such as PCI, or the platform bus). + + +EAGAIN + Returned by I2C adapters when they lose arbitration in master + transmit mode: some other master was transmitting different + data at the same time. + + Also returned when trying to invoke an I2C operation in an + atomic context, when some task is already using that I2C bus + to execute some other operation. + +EBADMSG + Returned by SMBus logic when an invalid Packet Error Code byte + is received. This code is a CRC covering all bytes in the + transaction, and is sent before the terminating STOP. This + fault is only reported on read transactions; the SMBus slave + may have a way to report PEC mismatches on writes from the + host. Note that even if PECs are in use, you should not rely + on these as the only way to detect incorrect data transfers. + +EBUSY + Returned by SMBus adapters when the bus was busy for longer + than allowed. This usually indicates some device (maybe the + SMBus adapter) needs some fault recovery (such as resetting), + or that the reset was attempted but failed. + +EINVAL + This rather vague error means an invalid parameter has been + detected before any I/O operation was started. Use a more + specific fault code when you can. + + One example would be a driver trying an SMBus Block Write + with block size outside the range of 1-32 bytes. + +EIO + This rather vague error means something went wrong when + performing an I/O operation. Use a more specific fault + code when you can. + +ENODEV + Returned by driver probe() methods. This is a bit more + specific than ENXIO, implying the problem isn't with the + address, but with the device found there. Driver probes + may verify the device returns *correct* responses, and + return this as appropriate. (The driver core will warn + about probe faults other than ENXIO and ENODEV.) + +ENOMEM + Returned by any component that can't allocate memory when + it needs to do so. + +ENXIO + Returned by I2C adapters to indicate that the address phase + of a transfer didn't get an ACK. While it might just mean + an I2C device was temporarily not responding, usually it + means there's nothing listening at that address. + + Returned by driver probe() methods to indicate that they + found no device to bind to. (ENODEV may also be used.) + +EOPNOTSUPP + Returned by an adapter when asked to perform an operation + that it doesn't, or can't, support. + + For example, this would be returned when an adapter that + doesn't support SMBus block transfers is asked to execute + one. In that case, the driver making that request should + have verified that functionality was supported before it + made that block transfer request. + + Similarly, if an I2C adapter can't execute all legal I2C + messages, it should return this when asked to perform a + transaction it can't. (These limitations can't be seen in + the adapter's functionality mask, since the assumption is + that if an adapter supports I2C it supports all of I2C.) + +EPROTO + Returned when slave does not conform to the relevant I2C + or SMBus (or chip-specific) protocol specifications. One + case is when the length of an SMBus block data response + (from the SMBus slave) is outside the range 1-32 bytes. + +ETIMEDOUT + This is returned by drivers when an operation took too much + time, and was aborted before it completed. + + SMBus adapters may return it when an operation took more + time than allowed by the SMBus specification; for example, + when a slave stretches clocks too far. I2C has no such + timeouts, but it's normal for I2C adapters to impose some + arbitrary limits (much longer than SMBus!) too. + diff --git a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol index 03f08fb491ccca6edcbcc6ce6fd1e0dda6eae2ad..24bfb65da17dbe53db1d6f8c98562ff9c85ce5ea 100644 --- a/Documentation/i2c/smbus-protocol +++ b/Documentation/i2c/smbus-protocol @@ -42,8 +42,8 @@ Count (8 bits): A data byte containing the length of a block operation. [..]: Data sent by I2C device, as opposed to data sent by the host adapter. -SMBus Quick Command: i2c_smbus_write_quick() -============================================= +SMBus Quick Command +=================== This sends a single bit to the device, at the place of the Rd/Wr bit. diff --git a/Documentation/i2c/upgrading-clients b/Documentation/i2c/upgrading-clients new file mode 100644 index 0000000000000000000000000000000000000000..9a45f9bb6a255d421bd2903e69120c0a8e281017 --- /dev/null +++ b/Documentation/i2c/upgrading-clients @@ -0,0 +1,281 @@ +Upgrading I2C Drivers to the new 2.6 Driver Model +================================================= + +Ben Dooks + +Introduction +------------ + +This guide outlines how to alter existing Linux 2.6 client drivers from +the old to the new new binding methods. + + +Example old-style driver +------------------------ + + +struct example_state { + struct i2c_client client; + .... +}; + +static struct i2c_driver example_driver; + +static unsigned short ignore[] = { I2C_CLIENT_END }; +static unsigned short normal_addr[] = { OUR_ADDR, I2C_CLIENT_END }; + +I2C_CLIENT_INSMOD; + +static int example_attach(struct i2c_adapter *adap, int addr, int kind) +{ + struct example_state *state; + struct device *dev = &adap->dev; /* to use for dev_ reports */ + int ret; + + state = kzalloc(sizeof(struct example_state), GFP_KERNEL); + if (state == NULL) { + dev_err(dev, "failed to create our state\n"); + return -ENOMEM; + } + + example->client.addr = addr; + example->client.flags = 0; + example->client.adapter = adap; + + i2c_set_clientdata(&state->i2c_client, state); + strlcpy(client->i2c_client.name, "example", I2C_NAME_SIZE); + + ret = i2c_attach_client(&state->i2c_client); + if (ret < 0) { + dev_err(dev, "failed to attach client\n"); + kfree(state); + return ret; + } + + dev = &state->i2c_client.dev; + + /* rest of the initialisation goes here. */ + + dev_info(dev, "example client created\n"); + + return 0; +} + +static int __devexit example_detach(struct i2c_client *client) +{ + struct example_state *state = i2c_get_clientdata(client); + + i2c_detach_client(client); + kfree(state); + return 0; +} + +static int example_attach_adapter(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, example_attach); +} + +static struct i2c_driver example_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "example", + }, + .attach_adapter = example_attach_adapter, + .detach_client = __devexit_p(example_detach), + .suspend = example_suspend, + .resume = example_resume, +}; + + +Updating the client +------------------- + +The new style binding model will check against a list of supported +devices and their associated address supplied by the code registering +the busses. This means that the driver .attach_adapter and +.detach_adapter methods can be removed, along with the addr_data, +as follows: + +- static struct i2c_driver example_driver; + +- static unsigned short ignore[] = { I2C_CLIENT_END }; +- static unsigned short normal_addr[] = { OUR_ADDR, I2C_CLIENT_END }; + +- I2C_CLIENT_INSMOD; + +- static int example_attach_adapter(struct i2c_adapter *adap) +- { +- return i2c_probe(adap, &addr_data, example_attach); +- } + + static struct i2c_driver example_driver = { +- .attach_adapter = example_attach_adapter, +- .detach_client = __devexit_p(example_detach), + } + +Add the probe and remove methods to the i2c_driver, as so: + + static struct i2c_driver example_driver = { ++ .probe = example_probe, ++ .remove = __devexit_p(example_remove), + } + +Change the example_attach method to accept the new parameters +which include the i2c_client that it will be working with: + +- static int example_attach(struct i2c_adapter *adap, int addr, int kind) ++ static int example_probe(struct i2c_client *client, ++ const struct i2c_device_id *id) + +Change the name of example_attach to example_probe to align it with the +i2c_driver entry names. The rest of the probe routine will now need to be +changed as the i2c_client has already been setup for use. + +The necessary client fields have already been setup before +the probe function is called, so the following client setup +can be removed: + +- example->client.addr = addr; +- example->client.flags = 0; +- example->client.adapter = adap; +- +- strlcpy(client->i2c_client.name, "example", I2C_NAME_SIZE); + +The i2c_set_clientdata is now: + +- i2c_set_clientdata(&state->client, state); ++ i2c_set_clientdata(client, state); + +The call to i2c_attach_client is no longer needed, if the probe +routine exits successfully, then the driver will be automatically +attached by the core. Change the probe routine as so: + +- ret = i2c_attach_client(&state->i2c_client); +- if (ret < 0) { +- dev_err(dev, "failed to attach client\n"); +- kfree(state); +- return ret; +- } + + +Remove the storage of 'struct i2c_client' from the 'struct example_state' +as we are provided with the i2c_client in our example_probe. Instead we +store a pointer to it for when it is needed. + +struct example_state { +- struct i2c_client client; ++ struct i2c_client *client; + +the new i2c client as so: + +- struct device *dev = &adap->dev; /* to use for dev_ reports */ ++ struct device *dev = &i2c_client->dev; /* to use for dev_ reports */ + +And remove the change after our client is attached, as the driver no +longer needs to register a new client structure with the core: + +- dev = &state->i2c_client.dev; + +In the probe routine, ensure that the new state has the client stored +in it: + +static int example_probe(struct i2c_client *i2c_client, + const struct i2c_device_id *id) +{ + struct example_state *state; + struct device *dev = &i2c_client->dev; + int ret; + + state = kzalloc(sizeof(struct example_state), GFP_KERNEL); + if (state == NULL) { + dev_err(dev, "failed to create our state\n"); + return -ENOMEM; + } + ++ state->client = i2c_client; + +Update the detach method, by changing the name to _remove and +to delete the i2c_detach_client call. It is possible that you +can also remove the ret variable as it is not not needed for +any of the core functions. + +- static int __devexit example_detach(struct i2c_client *client) ++ static int __devexit example_remove(struct i2c_client *client) +{ + struct example_state *state = i2c_get_clientdata(client); + +- i2c_detach_client(client); + +And finally ensure that we have the correct ID table for the i2c-core +and other utilities: + ++ struct i2c_device_id example_idtable[] = { ++ { "example", 0 }, ++ { } ++}; ++ ++MODULE_DEVICE_TABLE(i2c, example_idtable); + +static struct i2c_driver example_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "example", + }, ++ .id_table = example_ids, + + +Our driver should now look like this: + +struct example_state { + struct i2c_client *client; + .... +}; + +static int example_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct example_state *state; + struct device *dev = &client->dev; + + state = kzalloc(sizeof(struct example_state), GFP_KERNEL); + if (state == NULL) { + dev_err(dev, "failed to create our state\n"); + return -ENOMEM; + } + + state->client = client; + i2c_set_clientdata(client, state); + + /* rest of the initialisation goes here. */ + + dev_info(dev, "example client created\n"); + + return 0; +} + +static int __devexit example_remove(struct i2c_client *client) +{ + struct example_state *state = i2c_get_clientdata(client); + + kfree(state); + return 0; +} + +static struct i2c_device_id example_idtable[] = { + { "example", 0 }, + { } +}; + +MODULE_DEVICE_TABLE(i2c, example_idtable); + +static struct i2c_driver example_driver = { + .driver = { + .owner = THIS_MODULE, + .name = "example", + }, + .id_table = example_idtable, + .probe = example_probe, + .remove = __devexit_p(example_remove), + .suspend = example_suspend, + .resume = example_resume, +}; diff --git a/Documentation/i2c/writing-clients b/Documentation/i2c/writing-clients index d4cd4126d1adeca025e76a2511b0881cd6d0c00c..6b61b3a2e90bee2b7cbed065160bd029db89ba08 100644 --- a/Documentation/i2c/writing-clients +++ b/Documentation/i2c/writing-clients @@ -44,6 +44,10 @@ static struct i2c_driver foo_driver = { .id_table = foo_ids, .probe = foo_probe, .remove = foo_remove, + /* if device autodetection is needed: */ + .class = I2C_CLASS_SOMETHING, + .detect = foo_detect, + .address_data = &addr_data, /* else, driver uses "legacy" binding model: */ .attach_adapter = foo_attach_adapter, @@ -217,6 +221,31 @@ in the I2C bus driver. You may want to save the returned i2c_client reference for later use. +Device Detection (Standard driver model) +---------------------------------------- + +Sometimes you do not know in advance which I2C devices are connected to +a given I2C bus. This is for example the case of hardware monitoring +devices on a PC's SMBus. In that case, you may want to let your driver +detect supported devices automatically. This is how the legacy model +was working, and is now available as an extension to the standard +driver model (so that we can finally get rid of the legacy model.) + +You simply have to define a detect callback which will attempt to +identify supported devices (returning 0 for supported ones and -ENODEV +for unsupported ones), a list of addresses to probe, and a device type +(or class) so that only I2C buses which may have that type of device +connected (and not otherwise enumerated) will be probed. The i2c +core will then call you back as needed and will instantiate a device +for you for every successful detection. + +Note that this mechanism is purely optional and not suitable for all +devices. You need some reliable way to identify the supported devices +(typically using device-specific, dedicated identification registers), +otherwise misdetections are likely to occur and things can get wrong +quickly. + + Device Deletion (Standard driver model) --------------------------------------- @@ -569,7 +598,6 @@ SMBus communication in terms of it. Never use this function directly! - extern s32 i2c_smbus_write_quick(struct i2c_client * client, u8 value); extern s32 i2c_smbus_read_byte(struct i2c_client * client); extern s32 i2c_smbus_write_byte(struct i2c_client * client, u8 value); extern s32 i2c_smbus_read_byte_data(struct i2c_client * client, u8 command); @@ -578,30 +606,31 @@ SMBus communication extern s32 i2c_smbus_read_word_data(struct i2c_client * client, u8 command); extern s32 i2c_smbus_write_word_data(struct i2c_client * client, u8 command, u16 value); + extern s32 i2c_smbus_read_block_data(struct i2c_client * client, + u8 command, u8 *values); extern s32 i2c_smbus_write_block_data(struct i2c_client * client, u8 command, u8 length, u8 *values); extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client, u8 command, u8 length, u8 *values); - -These ones were removed in Linux 2.6.10 because they had no users, but could -be added back later if needed: - - extern s32 i2c_smbus_read_block_data(struct i2c_client * client, - u8 command, u8 *values); extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client, u8 command, u8 length, u8 *values); + +These ones were removed from i2c-core because they had no users, but could +be added back later if needed: + + extern s32 i2c_smbus_write_quick(struct i2c_client * client, u8 value); extern s32 i2c_smbus_process_call(struct i2c_client * client, u8 command, u16 value); extern s32 i2c_smbus_block_process_call(struct i2c_client *client, u8 command, u8 length, u8 *values) -All these transactions return -1 on failure. The 'write' transactions -return 0 on success; the 'read' transactions return the read value, except -for read_block, which returns the number of values read. The block buffers -need not be longer than 32 bytes. +All these transactions return a negative errno value on failure. The 'write' +transactions return 0 on success; the 'read' transactions return the read +value, except for block transactions, which return the number of values +read. The block buffers need not be longer than 32 bytes. You can read the file `smbus-protocol' for more information about the actual SMBus protocol. diff --git a/Documentation/ia64/kvm.txt b/Documentation/ia64/kvm.txt index bec9d815da33a0495c7ea4d2eebecf7f4c1ab2fc..914d07f49268b728ab5c1d8a6e7b23b59cef0128 100644 --- a/Documentation/ia64/kvm.txt +++ b/Documentation/ia64/kvm.txt @@ -50,9 +50,9 @@ Note: For step 2, please make sure that host page size == TARGET_PAGE_SIZE of qe /usr/local/bin/qemu-system-ia64 -smp xx -m 512 -hda $your_image (xx is the number of virtual processors for the guest, now the maximum value is 4) -5. Known possibile issue on some platforms with old Firmware. +5. Known possible issue on some platforms with old Firmware. -If meet strange host crashe issues, try to solve it through either of the following ways: +In the event of strange host crash issues, try to solve it through either of the following ways: (1): Upgrade your Firmware to the latest one. @@ -65,8 +65,8 @@ index 0b53344..f02b0f7 100644 mov ar.pfs = loc1 mov rp = loc0 ;; -- srlz.d // seralize restoration of psr.l -+ srlz.i // seralize restoration of psr.l +- srlz.d // serialize restoration of psr.l ++ srlz.i // serialize restoration of psr.l + ;; br.ret.sptk.many b0 END(ia64_pal_call_static) diff --git a/Documentation/ia64/paravirt_ops.txt b/Documentation/ia64/paravirt_ops.txt new file mode 100644 index 0000000000000000000000000000000000000000..39ded02ec33fc8a06c3e09d34ad1760d9e417b08 --- /dev/null +++ b/Documentation/ia64/paravirt_ops.txt @@ -0,0 +1,137 @@ +Paravirt_ops on IA64 +==================== + 21 May 2008, Isaku Yamahata + + +Introduction +------------ +The aim of this documentation is to help with maintainability and/or to +encourage people to use paravirt_ops/IA64. + +paravirt_ops (pv_ops in short) is a way for virtualization support of +Linux kernel on x86. Several ways for virtualization support were +proposed, paravirt_ops is the winner. +On the other hand, now there are also several IA64 virtualization +technologies like kvm/IA64, xen/IA64 and many other academic IA64 +hypervisors so that it is good to add generic virtualization +infrastructure on Linux/IA64. + + +What is paravirt_ops? +--------------------- +It has been developed on x86 as virtualization support via API, not ABI. +It allows each hypervisor to override operations which are important for +hypervisors at API level. And it allows a single kernel binary to run on +all supported execution environments including native machine. +Essentially paravirt_ops is a set of function pointers which represent +operations corresponding to low level sensitive instructions and high +level functionalities in various area. But one significant difference +from usual function pointer table is that it allows optimization with +binary patch. It is because some of these operations are very +performance sensitive and indirect call overhead is not negligible. +With binary patch, indirect C function call can be transformed into +direct C function call or in-place execution to eliminate the overhead. + +Thus, operations of paravirt_ops are classified into three categories. +- simple indirect call + These operations correspond to high level functionality so that the + overhead of indirect call isn't very important. + +- indirect call which allows optimization with binary patch + Usually these operations correspond to low level instructions. They + are called frequently and performance critical. So the overhead is + very important. + +- a set of macros for hand written assembly code + Hand written assembly codes (.S files) also need paravirtualization + because they include sensitive instructions or some of code paths in + them are very performance critical. + + +The relation to the IA64 machine vector +--------------------------------------- +Linux/IA64 has the IA64 machine vector functionality which allows the +kernel to switch implementations (e.g. initialization, ipi, dma api...) +depending on executing platform. +We can replace some implementations very easily defining a new machine +vector. Thus another approach for virtualization support would be +enhancing the machine vector functionality. +But paravirt_ops approach was taken because +- virtualization support needs wider support than machine vector does. + e.g. low level instruction paravirtualization. It must be + initialized very early before platform detection. + +- virtualization support needs more functionality like binary patch. + Probably the calling overhead might not be very large compared to the + emulation overhead of virtualization. However in the native case, the + overhead should be eliminated completely. + A single kernel binary should run on each environment including native, + and the overhead of paravirt_ops on native environment should be as + small as possible. + +- for full virtualization technology, e.g. KVM/IA64 or + Xen/IA64 HVM domain, the result would be + (the emulated platform machine vector. probably dig) + (pv_ops). + This means that the virtualization support layer should be under + the machine vector layer. + +Possibly it might be better to move some function pointers from +paravirt_ops to machine vector. In fact, Xen domU case utilizes both +pv_ops and machine vector. + + +IA64 paravirt_ops +----------------- +In this section, the concrete paravirt_ops will be discussed. +Because of the architecture difference between ia64 and x86, the +resulting set of functions is very different from x86 pv_ops. + +- C function pointer tables +They are not very performance critical so that simple C indirect +function call is acceptable. The following structures are defined at +this moment. For details see linux/include/asm-ia64/paravirt.h + - struct pv_info + This structure describes the execution environment. + - struct pv_init_ops + This structure describes the various initialization hooks. + - struct pv_iosapic_ops + This structure describes hooks to iosapic operations. + - struct pv_irq_ops + This structure describes hooks to irq related operations + - struct pv_time_op + This structure describes hooks to steal time accounting. + +- a set of indirect calls which need optimization +Currently this class of functions correspond to a subset of IA64 +intrinsics. At this moment the optimization with binary patch isn't +implemented yet. +struct pv_cpu_op is defined. For details see +linux/include/asm-ia64/paravirt_privop.h +Mostly they correspond to ia64 intrinsics 1-to-1. +Caveat: Now they are defined as C indirect function pointers, but in +order to support binary patch optimization, they will be changed +using GCC extended inline assembly code. + +- a set of macros for hand written assembly code (.S files) +For maintenance purpose, the taken approach for .S files is single +source code and compile multiple times with different macros definitions. +Each pv_ops instance must define those macros to compile. +The important thing here is that sensitive, but non-privileged +instructions must be paravirtualized and that some privileged +instructions also need paravirtualization for reasonable performance. +Developers who modify .S files must be aware of that. At this moment +an easy checker is implemented to detect paravirtualization breakage. +But it doesn't cover all the cases. + +Sometimes this set of macros is called pv_cpu_asm_op. But there is no +corresponding structure in the source code. +Those macros mostly 1:1 correspond to a subset of privileged +instructions. See linux/include/asm-ia64/native/inst.h. +And some functions written in assembly also need to be overrided so +that each pv_ops instance have to define some macros. Again see +linux/include/asm-ia64/native/inst.h. + + +Those structures must be initialized very early before start_kernel. +Probably initialized in head.S using multi entry point or some other trick. +For native case implementation see linux/arch/ia64/kernel/paravirt.c. diff --git a/Documentation/input/cs461x.txt b/Documentation/input/cs461x.txt index afe0d6543e093fa5dfa4758bbb0cbec90ff0bce3..202e9dbacec39a96990c5722c4b1ab832b939b61 100644 --- a/Documentation/input/cs461x.txt +++ b/Documentation/input/cs461x.txt @@ -31,7 +31,7 @@ The driver works with ALSA drivers simultaneously. For example, the xracer uses joystick as input device and PCM device as sound output in one time. There are no sound or input collisions detected. The source code have comments about them; but I've found the joystick can be initialized -separately of ALSA modules. So, you canm use only one joystick driver +separately of ALSA modules. So, you can use only one joystick driver without ALSA drivers. The ALSA drivers are not needed to compile or run this driver. diff --git a/Documentation/input/gameport-programming.txt b/Documentation/input/gameport-programming.txt index 14e0a8b70225f5cce93c2cf8bdb85a0aa984b8ee..03a74fc3b49679c0326a59faa43b2e423751e0c5 100644 --- a/Documentation/input/gameport-programming.txt +++ b/Documentation/input/gameport-programming.txt @@ -1,5 +1,3 @@ -$Id: gameport-programming.txt,v 1.3 2001/04/24 13:51:37 vojtech Exp $ - Programming gameport drivers ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/input/input.txt b/Documentation/input/input.txt index ff8cea0225f90bdce6c28adc5b3af5816f9eea44..686ee9932dffd86fa78775859a97815ecc514be2 100644 --- a/Documentation/input/input.txt +++ b/Documentation/input/input.txt @@ -1,7 +1,6 @@ Linux Input drivers v1.0 (c) 1999-2001 Vojtech Pavlik Sponsored by SuSE - $Id: input.txt,v 1.8 2002/05/29 03:15:01 bradleym Exp $ ---------------------------------------------------------------------------- 0. Disclaimer diff --git a/Documentation/input/joystick-api.txt b/Documentation/input/joystick-api.txt index acbd32b88454dc5c48c7a10bb112757910d3c7e5..c507330740cd4fb14e37e617d01d95262057d129 100644 --- a/Documentation/input/joystick-api.txt +++ b/Documentation/input/joystick-api.txt @@ -5,8 +5,6 @@ 7 Aug 1998 - $Id: joystick-api.txt,v 1.2 2001/05/08 21:21:23 vojtech Exp $ - 1. Initialization ~~~~~~~~~~~~~~~~~ diff --git a/Documentation/input/joystick-parport.txt b/Documentation/input/joystick-parport.txt index ede5f33daad3dbc0f7346654a348fd4eb28d7387..1c856f32ff2c3bc880746533c149ec6cc146806f 100644 --- a/Documentation/input/joystick-parport.txt +++ b/Documentation/input/joystick-parport.txt @@ -2,7 +2,6 @@ (c) 1998-2000 Vojtech Pavlik (c) 1998 Andree Borrmann Sponsored by SuSE - $Id: joystick-parport.txt,v 1.6 2001/09/25 09:31:32 vojtech Exp $ ---------------------------------------------------------------------------- 0. Disclaimer diff --git a/Documentation/input/joystick.txt b/Documentation/input/joystick.txt index 389de9bd987894017bb25ddc95b911c98526bdcb..154d767b2acbc4be459044d78e7f63b975faa207 100644 --- a/Documentation/input/joystick.txt +++ b/Documentation/input/joystick.txt @@ -1,7 +1,6 @@ Linux Joystick driver v2.0.0 (c) 1996-2000 Vojtech Pavlik Sponsored by SuSE - $Id: joystick.txt,v 1.12 2002/03/03 12:13:07 jdeneux Exp $ ---------------------------------------------------------------------------- 0. Disclaimer diff --git a/Documentation/ioctl-number.txt b/Documentation/ioctl-number.txt index 240ce7a56c40c9edfd141468ef2f2f1cf40dfab5..3bb5f466a90db3e971b42fb26c60d716a30878ed 100644 --- a/Documentation/ioctl-number.txt +++ b/Documentation/ioctl-number.txt @@ -117,6 +117,7 @@ Code Seq# Include File Comments 'c' 00-7F linux/comstats.h conflict! 'c' 00-7F linux/coda.h conflict! +'c' 80-9F asm-s390/chsc.h 'd' 00-FF linux/char/drm/drm/h conflict! 'd' 00-DF linux/video_decoder.h conflict! 'd' F0-FF linux/digi1.h diff --git a/Documentation/ioctl/hdio.txt b/Documentation/ioctl/hdio.txt index c19efdeace2cd220a73554b66f5c0fbef1d81d0b..91a6ecbae0bb9601b7d50e084af1eeb96869f730 100644 --- a/Documentation/ioctl/hdio.txt +++ b/Documentation/ioctl/hdio.txt @@ -508,12 +508,13 @@ HDIO_DRIVE_RESET execute a device reset error returns: EACCES Access denied: requires CAP_SYS_ADMIN + ENXIO No such device: phy dead or ctl_addr == 0 + EIO I/O error: reset timed out or hardware error notes: - Abort any current command, prevent anything else from being - queued, execute a reset on the device, and issue BLKRRPART - ioctl on the block device. + Execute a reset on the device as soon as the current IO + operation has completed. Executes an ATAPI soft reset if applicable, otherwise executes an ATA soft reset on the controller. diff --git a/Documentation/ioctl/ioctl-decoding.txt b/Documentation/ioctl/ioctl-decoding.txt index bfdf7f3ee4f05e0f52e08c8aee1ad55c248b8af4..e35efb0cec2e64a99538d24c2c7c7b38846abc26 100644 --- a/Documentation/ioctl/ioctl-decoding.txt +++ b/Documentation/ioctl/ioctl-decoding.txt @@ -1,6 +1,6 @@ To decode a hex IOCTL code: -Most architecures use this generic format, but check +Most architectures use this generic format, but check include/ARCH/ioctl.h for specifics, e.g. powerpc uses 3 bits to encode read/write and 13 bits for size. @@ -18,7 +18,7 @@ uses 3 bits to encode read/write and 13 bits for size. 7-0 function # - So for example 0x82187201 is a read with arg length of 0x218, +So for example 0x82187201 is a read with arg length of 0x218, character 'r' function 1. Grepping the source reveals this is: #define VFAT_IOCTL_READDIR_BOTH _IOR('r', 1, struct dirent [2]) diff --git a/Documentation/iostats.txt b/Documentation/iostats.txt index 5925c3cd030d55884b3f962ed40ced5a20709cf4..59a69ec67c408a54ee724df4d4a64a69a8317f68 100644 --- a/Documentation/iostats.txt +++ b/Documentation/iostats.txt @@ -143,7 +143,7 @@ disk and partition statistics are consistent again. Since we still don't keep record of the partition-relative address, an operation is attributed to the partition which contains the first sector of the request after the eventual merges. As requests can be merged across partition, this could lead -to some (probably insignificant) innacuracy. +to some (probably insignificant) inaccuracy. Additional notes ---------------- diff --git a/Documentation/isdn/README.mISDN b/Documentation/isdn/README.mISDN new file mode 100644 index 0000000000000000000000000000000000000000..cd8bf920e77bcac0ec8d4068db18441bd28083d5 --- /dev/null +++ b/Documentation/isdn/README.mISDN @@ -0,0 +1,6 @@ +mISDN is a new modular ISDN driver, in the long term it should replace +the old I4L driver architecture for passiv ISDN cards. +It was designed to allow a broad range of applications and interfaces +but only have the basic function in kernel, the interface to the user +space is based on sockets with a own address family AF_ISDN. + diff --git a/Documentation/kdump/kdump.txt b/Documentation/kdump/kdump.txt index b8e52c0355d3bab81760adbf62d0c8a06a9ba52a..0705040531a534c2c153c1289fe0febf92926a61 100644 --- a/Documentation/kdump/kdump.txt +++ b/Documentation/kdump/kdump.txt @@ -65,26 +65,26 @@ Install kexec-tools 2) Download the kexec-tools user-space package from the following URL: -http://www.kernel.org/pub/linux/kernel/people/horms/kexec-tools/kexec-tools-testing.tar.gz +http://www.kernel.org/pub/linux/kernel/people/horms/kexec-tools/kexec-tools.tar.gz -This is a symlink to the latest version, which at the time of writing is -20061214, the only release of kexec-tools-testing so far. As other versions -are released, the older ones will remain available at -http://www.kernel.org/pub/linux/kernel/people/horms/kexec-tools/ +This is a symlink to the latest version. -Note: Latest kexec-tools-testing git tree is available at +The latest kexec-tools git tree is available at: -git://git.kernel.org/pub/scm/linux/kernel/git/horms/kexec-tools-testing.git +git://git.kernel.org/pub/scm/linux/kernel/git/horms/kexec-tools.git or -http://www.kernel.org/git/?p=linux/kernel/git/horms/kexec-tools-testing.git;a=summary +http://www.kernel.org/git/?p=linux/kernel/git/horms/kexec-tools.git + +More information about kexec-tools can be found at +http://www.kernel.org/pub/linux/kernel/people/horms/kexec-tools/README.html 3) Unpack the tarball with the tar command, as follows: - tar xvpzf kexec-tools-testing.tar.gz + tar xvpzf kexec-tools.tar.gz 4) Change to the kexec-tools directory, as follows: - cd kexec-tools-testing-VERSION + cd kexec-tools-VERSION 5) Configure the package, as follows: @@ -109,7 +109,7 @@ There are two possible methods of using Kdump. 2) Or use the system kernel binary itself as dump-capture kernel and there is no need to build a separate dump-capture kernel. This is possible only with the architecutres which support a relocatable kernel. As - of today i386 and ia64 architectures support relocatable kernel. + of today, i386, x86_64 and ia64 architectures support relocatable kernel. Building a relocatable kernel is advantageous from the point of view that one does not have to build a second kernel for capturing the dump. But diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index b52f47d588b40fea417bf4bca4ffdbfef4d02152..0f130a4f9ba3195ab21305a656df222990599c61 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -87,7 +87,8 @@ parameter is applicable: SH SuperH architecture is enabled. SMP The kernel is an SMP kernel. SPARC Sparc architecture is enabled. - SWSUSP Software suspend is enabled. + SWSUSP Software suspend (hibernation) is enabled. + SUSPEND System suspend states are enabled. TS Appropriate touchscreen support is enabled. USB USB support is enabled. USBHID USB Human Interface Device support is enabled. @@ -147,10 +148,16 @@ and is between 256 and 4096 characters. It is defined in the file default: 0 acpi_sleep= [HW,ACPI] Sleep options - Format: { s3_bios, s3_mode, s3_beep } + Format: { s3_bios, s3_mode, s3_beep, s4_nohwsig, old_ordering } See Documentation/power/video.txt for s3_bios and s3_mode. s3_beep is for debugging; it makes the PC's speaker beep as soon as the kernel's real-mode entry point is called. + s4_nohwsig prevents ACPI hardware signature from being + used during resume from hibernation. + old_ordering causes the ACPI 1.0 ordering of the _PTS + control method, wrt putting devices into low power + states, to be enforced (the ACPI 2.0 ordering of _PTS is + used by default). acpi_sci= [HW,ACPI] ACPI System Control Interrupt trigger mode Format: { level | edge | high | low } @@ -271,6 +278,17 @@ and is between 256 and 4096 characters. It is defined in the file aic79xx= [HW,SCSI] See Documentation/scsi/aic79xx.txt. + amd_iommu= [HW,X86-84] + Pass parameters to the AMD IOMMU driver in the system. + Possible values are: + isolate - enable device isolation (each device, as far + as possible, will get its own protection + domain) + amd_iommu_size= [HW,X86-64] + Define the size of the aperture for the AMD IOMMU + driver. Possible values are: + '32M', '64M' (default), '128M', '256M', '512M', '1G' + amijoy.map= [HW,JOY] Amiga joystick support Map of devices attached to JOY0DAT and JOY1DAT Format: , @@ -560,6 +578,8 @@ and is between 256 and 4096 characters. It is defined in the file debug_objects [KNL] Enable object debugging + debugpat [X86] Enable PAT debugging + decnet.addr= [HW,NET] Format: [,] See also Documentation/networking/decnet.txt. @@ -599,6 +619,29 @@ and is between 256 and 4096 characters. It is defined in the file See drivers/char/README.epca and Documentation/digiepca.txt. + disable_mtrr_cleanup [X86] + enable_mtrr_cleanup [X86] + The kernel tries to adjust MTRR layout from continuous + to discrete, to make X server driver able to add WB + entry later. This parameter enables/disables that. + + mtrr_chunk_size=nn[KMG] [X86] + used for mtrr cleanup. It is largest continous chunk + that could hold holes aka. UC entries. + + mtrr_gran_size=nn[KMG] [X86] + Used for mtrr cleanup. It is granularity of mtrr block. + Default is 1. + Large value could prevent small alignment from + using up MTRRs. + + mtrr_spare_reg_nr=n [X86] + Format: + Range: 0,7 : spare reg number + Default : 1 + Used for mtrr cleanup. It is spare mtrr entries number. + Set to 2 or more if your graphical card needs more. + disable_mtrr_trim [X86, Intel and AMD only] By default the kernel will trim any uncacheable memory out of your available memory pool based on @@ -722,9 +765,6 @@ and is between 256 and 4096 characters. It is defined in the file hd= [EIDE] (E)IDE hard drive subsystem geometry Format: ,, - hd?= [HW] (E)IDE subsystem - hd?lun= See Documentation/ide/ide.txt. - highmem=nn[KMG] [KNL,BOOT] forces the highmem zone to have an exact size of . This works even on boxes that have no highmem otherwise. This also works to reduce highmem @@ -737,8 +777,22 @@ and is between 256 and 4096 characters. It is defined in the file hisax= [HW,ISDN] See Documentation/isdn/README.HiSax. - hugepages= [HW,X86-32,IA-64] Maximal number of HugeTLB pages. - hugepagesz= [HW,IA-64,PPC] The size of the HugeTLB pages. + hugepages= [HW,X86-32,IA-64] HugeTLB pages to allocate at boot. + hugepagesz= [HW,IA-64,PPC,X86-64] The size of the HugeTLB pages. + On x86-64 and powerpc, this option can be specified + multiple times interleaved with hugepages= to reserve + huge pages of different sizes. Valid pages sizes on + x86-64 are 2M (when the CPU supports "pse") and 1G + (when the CPU supports the "pdpe1gb" cpuinfo flag) + Note that 1GB pages can only be allocated at boot time + using hugepages= and not freed afterwards. + default_hugepagesz= + [same as hugepagesz=] The size of the default + HugeTLB page size. This is the size represented by + the legacy /proc/ hugepages APIs, used for SHM, and + default size when mounting hugetlbfs filesystems. + Defaults to the default architecture's huge page size + if not specified. i8042.direct [HW] Put keyboard port into non-translated mode i8042.dumbkbd [HW] Pretend that controller can only read data from @@ -785,7 +839,7 @@ and is between 256 and 4096 characters. It is defined in the file See Documentation/ide/ide.txt. idle= [X86] - Format: idle=poll or idle=mwait + Format: idle=poll or idle=mwait, idle=halt, idle=nomwait Poll forces a polling idle loop that can slightly improves the performance of waking up a idle CPU, but will use a lot of power and make the system run hot. Not recommended. @@ -793,6 +847,9 @@ and is between 256 and 4096 characters. It is defined in the file to not use it because it doesn't save as much power as a normal idle loop use the MONITOR/MWAIT idle loop anyways. Performance should be the same as idle=poll. + idle=halt. Halt is forced to be used for CPU idle. + In such case C2/C3 won't be used again. + idle=nomwait. Disable mwait for CPU C-states ide-pci-generic.all-generic-ide [HW] (E)IDE subsystem Claim all unknown PCI IDE storage controllers. @@ -1166,7 +1223,7 @@ and is between 256 and 4096 characters. It is defined in the file or memmap=0x10000$0x18690000 - memtest= [KNL,X86_64] Enable memtest + memtest= [KNL,X86] Enable memtest Format: range: 0,4 : pattern number default : 0 @@ -1185,6 +1242,14 @@ and is between 256 and 4096 characters. It is defined in the file mga= [HW,DRM] + mminit_loglevel= + [KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this + parameter allows control of the logging verbosity for + the additional memory initialisation checks. A value + of 0 disables mminit logging and a level of 4 will + log everything. Information is printed at KERN_DEBUG + so loglevel=8 may also need to be specified. + mousedev.tap_time= [MOUSE] Maximum time between finger touching and leaving touchpad surface for touch to be considered @@ -1208,6 +1273,11 @@ and is between 256 and 4096 characters. It is defined in the file mtdparts= [MTD] See drivers/mtd/cmdlinepart.c. + mtdset= [ARM] + ARM/S3C2412 JIVE boot control + + See arch/arm/mach-s3c2412/mach-jive.c + mtouchusb.raw_coordinates= [HW] Make the MicroTouch USB driver use raw coordinates ('y', default) or cooked coordinates ('n') @@ -1234,6 +1304,13 @@ and is between 256 and 4096 characters. It is defined in the file This usage is only documented in each driver source file if at all. + nf_conntrack.acct= + [NETFILTER] Enable connection tracking flow accounting + 0 to disable accounting + 1 to enable accounting + Default value depends on CONFIG_NF_CT_ACCT that is + going to be removed in 2.6.29. + nfsaddrs= [NFS] See Documentation/filesystems/nfsroot.txt. @@ -1343,6 +1420,12 @@ and is between 256 and 4096 characters. It is defined in the file nolapic_timer [X86-32,APIC] Do not use the local APIC timer. + nox2apic [X86-64,APIC] Do not enable x2APIC mode. + + x2apic_phys [X86-64,APIC] Use x2apic physical mode instead of + default x2apic cluster mode on platforms + supporting x2apic. + noltlbs [PPC] Do not use large page/tlb entries for kernel lowmem mapping on PPC40x. @@ -1496,6 +1579,9 @@ and is between 256 and 4096 characters. It is defined in the file Use with caution as certain devices share address decoders between ROMs and other resources. + norom [X86-32,X86_64] Do not assign address space to + expansion ROMs that do not already have + BIOS assigned address ranges. irqmask=0xMMMM [X86-32] Set a bit mask of IRQs allowed to be assigned automatically to PCI devices. You can make the kernel exclude IRQs of your ISA cards @@ -1571,6 +1657,10 @@ and is between 256 and 4096 characters. It is defined in the file Format: { parport | timid | 0 } See also Documentation/parport.txt. + pmtmr= [X86] Manual setup of pmtmr I/O Port. + Override pmtimer IOPort with a hex value. + e.g. pmtmr=0x508 + pnpacpi= [ACPI] { off } @@ -1975,6 +2065,9 @@ and is between 256 and 4096 characters. It is defined in the file snd-ymfpci= [HW,ALSA] + softlockup_panic= + [KNL] Should the soft-lockup detector generate panics. + sonypi.*= [HW] Sony Programmable I/O Control Device driver See Documentation/sonypi.txt @@ -2039,6 +2132,12 @@ and is between 256 and 4096 characters. It is defined in the file tdfx= [HW,DRM] + test_suspend= [SUSPEND] + Specify "mem" (for Suspend-to-RAM) or "standby" (for + standby suspend) as the system sleep state to briefly + enter during system startup. The system is woken from + this state using a wakeup-capable RTC alarm. + thash_entries= [KNL,NET] Set number of hash buckets for TCP connection @@ -2066,13 +2165,6 @@ and is between 256 and 4096 characters. It is defined in the file : poll all this frequency 0: no polling (default) - tipar.timeout= [HW,PPT] - Set communications timeout in tenths of a second - (default 15). - - tipar.delay= [HW,PPT] - Set inter-bit delay in microseconds (default 10). - tmscsim= [HW,SCSI] See comment before function dc390_setup() in drivers/scsi/tmscsim.c. @@ -2106,6 +2198,10 @@ and is between 256 and 4096 characters. It is defined in the file Note that genuine overcurrent events won't be reported either. + unknown_nmi_panic + [X86-32,X86-64] + Set unknown_nmi_panic=1 early on boot. + usbcore.autosuspend= [USB] The autosuspend time delay (in seconds) used for newly-detected USB devices (default 2). This @@ -2116,6 +2212,9 @@ and is between 256 and 4096 characters. It is defined in the file usbhid.mousepoll= [USBHID] The interval which mice are to be polled at. + add_efi_memmap [EFI; x86-32,X86-64] Include EFI memory map in + kernel's map of available physical RAM. + vdso= [X86-32,SH,x86-64] vdso=2: enable compat VDSO (default with COMPAT_VDSO) vdso=1: enable VDSO (default) diff --git a/Documentation/keys.txt b/Documentation/keys.txt index d5c7a57d17007fa0f43558b270b0e4c302d5f8aa..b56aacc1fff864022dbdf67aac997d54f0d14f32 100644 --- a/Documentation/keys.txt +++ b/Documentation/keys.txt @@ -864,7 +864,7 @@ payload contents" for more information. request_key_with_auxdata() respectively. These two functions return with the key potentially still under - construction. To wait for contruction completion, the following should be + construction. To wait for construction completion, the following should be called: int wait_for_key_construction(struct key *key, bool intr); diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt index 6877e71871132b92d60a603fe444f93af53f0aa1..a79633d702bff23230bb0d76cb68565e078b4fb2 100644 --- a/Documentation/kprobes.txt +++ b/Documentation/kprobes.txt @@ -172,6 +172,7 @@ architectures: - ia64 (Does not support probes on instruction slot1.) - sparc64 (Return probes not yet implemented.) - arm +- ppc 3. Configuring Kprobes diff --git a/Documentation/laptops/acer-wmi.txt b/Documentation/laptops/acer-wmi.txt index 79b7dbd2214190ae9bf9bce988faa176491c5bce..69b5dd4e5a59bd74550397266122c465a8a12b5f 100644 --- a/Documentation/laptops/acer-wmi.txt +++ b/Documentation/laptops/acer-wmi.txt @@ -174,8 +174,6 @@ The LED is exposed through the LED subsystem, and can be found in: The mail LED is autodetected, so if you don't have one, the LED device won't be registered. -If you have a mail LED that is not green, please report this to me. - Backlight ********* diff --git a/Documentation/laptops/thinkpad-acpi.txt b/Documentation/laptops/thinkpad-acpi.txt index 64b3f146e4b09aa4d2cd312e97689f9eba503347..02dc748b76c4ac861549077392ef1deb3ca9c652 100644 --- a/Documentation/laptops/thinkpad-acpi.txt +++ b/Documentation/laptops/thinkpad-acpi.txt @@ -1,7 +1,7 @@ ThinkPad ACPI Extras Driver - Version 0.20 - April 09th, 2008 + Version 0.21 + May 29th, 2008 Borislav Deianov Henrique de Moraes Holschuh @@ -621,7 +621,8 @@ Bluetooth --------- procfs: /proc/acpi/ibm/bluetooth -sysfs device attribute: bluetooth_enable +sysfs device attribute: bluetooth_enable (deprecated) +sysfs rfkill class: switch "tpacpi_bluetooth_sw" This feature shows the presence and current state of a ThinkPad Bluetooth device in the internal ThinkPad CDC slot. @@ -643,8 +644,12 @@ Sysfs notes: 0: disables Bluetooth / Bluetooth is disabled 1: enables Bluetooth / Bluetooth is enabled. - Note: this interface will be probably be superseded by the - generic rfkill class, so it is NOT to be considered stable yet. + Note: this interface has been superseded by the generic rfkill + class. It has been deprecated, and it will be removed in year + 2010. + + rfkill controller switch "tpacpi_bluetooth_sw": refer to + Documentation/rfkill.txt for details. Video output control -- /proc/acpi/ibm/video -------------------------------------------- @@ -1374,7 +1379,8 @@ EXPERIMENTAL: WAN ----------------- procfs: /proc/acpi/ibm/wan -sysfs device attribute: wwan_enable +sysfs device attribute: wwan_enable (deprecated) +sysfs rfkill class: switch "tpacpi_wwan_sw" This feature is marked EXPERIMENTAL because the implementation directly accesses hardware registers and may not work as expected. USE @@ -1404,8 +1410,12 @@ Sysfs notes: 0: disables WWAN card / WWAN card is disabled 1: enables WWAN card / WWAN card is enabled. - Note: this interface will be probably be superseded by the - generic rfkill class, so it is NOT to be considered stable yet. + Note: this interface has been superseded by the generic rfkill + class. It has been deprecated, and it will be removed in year + 2010. + + rfkill controller switch "tpacpi_wwan_sw": refer to + Documentation/rfkill.txt for details. Multiple Commands, Module Parameters ------------------------------------ diff --git a/Documentation/leds-class.txt b/Documentation/leds-class.txt index 18860ad9935a7876746c00660f36b9fd90529499..6399557cdab3d6542a0feea0c0cd2c6b2af5ffad 100644 --- a/Documentation/leds-class.txt +++ b/Documentation/leds-class.txt @@ -59,7 +59,7 @@ Hardware accelerated blink of LEDs Some LEDs can be programmed to blink without any CPU interaction. To support this feature, a LED driver can optionally implement the -blink_set() function (see ). If implemeted, triggers can +blink_set() function (see ). If implemented, triggers can attempt to use it before falling back to software timers. The blink_set() function should return 0 if the blink setting is supported, or -EINVAL otherwise, which means that LED blinking will be handled by software. diff --git a/Documentation/lguest/lguest.c b/Documentation/lguest/lguest.c index 82fafe0429fed8dc441411059be52b33154dd8a8..b88b0ea54e90c597896aac6eb478e1b56bab8bd0 100644 --- a/Documentation/lguest/lguest.c +++ b/Documentation/lguest/lguest.c @@ -36,11 +36,13 @@ #include #include #include +#include #include "linux/lguest_launcher.h" #include "linux/virtio_config.h" #include "linux/virtio_net.h" #include "linux/virtio_blk.h" #include "linux/virtio_console.h" +#include "linux/virtio_rng.h" #include "linux/virtio_ring.h" #include "asm-x86/bootparam.h" /*L:110 We can ignore the 39 include files we need for this program, but I do @@ -64,8 +66,8 @@ typedef uint8_t u8; #endif /* We can have up to 256 pages for devices. */ #define DEVICE_PAGES 256 -/* This will occupy 2 pages: it must be a power of 2. */ -#define VIRTQUEUE_NUM 128 +/* This will occupy 3 pages: it must be a power of 2. */ +#define VIRTQUEUE_NUM 256 /*L:120 verbose is both a global flag and a macro. The C preprocessor allows * this, and although I wouldn't recommend it, it works quite nicely here. */ @@ -74,12 +76,19 @@ static bool verbose; do { if (verbose) printf(args); } while(0) /*:*/ -/* The pipe to send commands to the waker process */ -static int waker_fd; +/* File descriptors for the Waker. */ +struct { + int pipe[2]; + int lguest_fd; +} waker_fds; + /* The pointer to the start of guest memory. */ static void *guest_base; /* The maximum guest physical address allowed, and maximum possible. */ static unsigned long guest_limit, guest_max; +/* The pipe for signal hander to write to. */ +static int timeoutpipe[2]; +static unsigned int timeout_usec = 500; /* a per-cpu variable indicating whose vcpu is currently running */ static unsigned int __thread cpu_id; @@ -155,11 +164,14 @@ struct virtqueue /* Last available index we saw. */ u16 last_avail_idx; - /* The routine to call when the Guest pings us. */ - void (*handle_output)(int fd, struct virtqueue *me); + /* The routine to call when the Guest pings us, or timeout. */ + void (*handle_output)(int fd, struct virtqueue *me, bool timeout); /* Outstanding buffers */ unsigned int inflight; + + /* Is this blocked awaiting a timer? */ + bool blocked; }; /* Remember the arguments to the program so we can "reboot" */ @@ -190,6 +202,9 @@ static void *_convert(struct iovec *iov, size_t size, size_t align, return iov->iov_base; } +/* Wrapper for the last available index. Makes it easier to change. */ +#define lg_last_avail(vq) ((vq)->last_avail_idx) + /* The virtio configuration space is defined to be little-endian. x86 is * little-endian too, but it's nice to be explicit so we have these helpers. */ #define cpu_to_le16(v16) (v16) @@ -199,6 +214,33 @@ static void *_convert(struct iovec *iov, size_t size, size_t align, #define le32_to_cpu(v32) (v32) #define le64_to_cpu(v64) (v64) +/* Is this iovec empty? */ +static bool iov_empty(const struct iovec iov[], unsigned int num_iov) +{ + unsigned int i; + + for (i = 0; i < num_iov; i++) + if (iov[i].iov_len) + return false; + return true; +} + +/* Take len bytes from the front of this iovec. */ +static void iov_consume(struct iovec iov[], unsigned num_iov, unsigned len) +{ + unsigned int i; + + for (i = 0; i < num_iov; i++) { + unsigned int used; + + used = iov[i].iov_len < len ? iov[i].iov_len : len; + iov[i].iov_base += used; + iov[i].iov_len -= used; + len -= used; + } + assert(len == 0); +} + /* The device virtqueue descriptors are followed by feature bitmasks. */ static u8 *get_feature_bits(struct device *dev) { @@ -254,6 +296,7 @@ static void *map_zeroed_pages(unsigned int num) PROT_READ|PROT_WRITE|PROT_EXEC, MAP_PRIVATE, fd, 0); if (addr == MAP_FAILED) err(1, "Mmaping %u pages of /dev/zero", num); + close(fd); return addr; } @@ -540,69 +583,64 @@ static void add_device_fd(int fd) * watch, but handing a file descriptor mask through to the kernel is fairly * icky. * - * Instead, we fork off a process which watches the file descriptors and writes + * Instead, we clone off a thread which watches the file descriptors and writes * the LHREQ_BREAK command to the /dev/lguest file descriptor to tell the Host * stop running the Guest. This causes the Launcher to return from the * /dev/lguest read with -EAGAIN, where it will write to /dev/lguest to reset * the LHREQ_BREAK and wake us up again. * * This, of course, is merely a different *kind* of icky. + * + * Given my well-known antipathy to threads, I'd prefer to use processes. But + * it's easier to share Guest memory with threads, and trivial to share the + * devices.infds as the Launcher changes it. */ -static void wake_parent(int pipefd, int lguest_fd) +static int waker(void *unused) { - /* Add the pipe from the Launcher to the fdset in the device_list, so - * we watch it, too. */ - add_device_fd(pipefd); + /* Close the write end of the pipe: only the Launcher has it open. */ + close(waker_fds.pipe[1]); for (;;) { fd_set rfds = devices.infds; unsigned long args[] = { LHREQ_BREAK, 1 }; + unsigned int maxfd = devices.max_infd; + + /* We also listen to the pipe from the Launcher. */ + FD_SET(waker_fds.pipe[0], &rfds); + if (waker_fds.pipe[0] > maxfd) + maxfd = waker_fds.pipe[0]; /* Wait until input is ready from one of the devices. */ - select(devices.max_infd+1, &rfds, NULL, NULL, NULL); - /* Is it a message from the Launcher? */ - if (FD_ISSET(pipefd, &rfds)) { - int fd; - /* If read() returns 0, it means the Launcher has - * exited. We silently follow. */ - if (read(pipefd, &fd, sizeof(fd)) == 0) - exit(0); - /* Otherwise it's telling us to change what file - * descriptors we're to listen to. Positive means - * listen to a new one, negative means stop - * listening. */ - if (fd >= 0) - FD_SET(fd, &devices.infds); - else - FD_CLR(-fd - 1, &devices.infds); - } else /* Send LHREQ_BREAK command. */ - pwrite(lguest_fd, args, sizeof(args), cpu_id); + select(maxfd+1, &rfds, NULL, NULL, NULL); + + /* Message from Launcher? */ + if (FD_ISSET(waker_fds.pipe[0], &rfds)) { + char c; + /* If this fails, then assume Launcher has exited. + * Don't do anything on exit: we're just a thread! */ + if (read(waker_fds.pipe[0], &c, 1) != 1) + _exit(0); + continue; + } + + /* Send LHREQ_BREAK command to snap the Launcher out of it. */ + pwrite(waker_fds.lguest_fd, args, sizeof(args), cpu_id); } + return 0; } /* This routine just sets up a pipe to the Waker process. */ -static int setup_waker(int lguest_fd) -{ - int pipefd[2], child; - - /* We create a pipe to talk to the Waker, and also so it knows when the - * Launcher dies (and closes pipe). */ - pipe(pipefd); - child = fork(); - if (child == -1) - err(1, "forking"); - - if (child == 0) { - /* We are the Waker: close the "writing" end of our copy of the - * pipe and start waiting for input. */ - close(pipefd[1]); - wake_parent(pipefd[0], lguest_fd); - } - /* Close the reading end of our copy of the pipe. */ - close(pipefd[0]); +static void setup_waker(int lguest_fd) +{ + /* This pipe is closed when Launcher dies, telling Waker. */ + if (pipe(waker_fds.pipe) != 0) + err(1, "Creating pipe for Waker"); - /* Here is the fd used to talk to the waker. */ - return pipefd[1]; + /* Waker also needs to know the lguest fd */ + waker_fds.lguest_fd = lguest_fd; + + if (clone(waker, malloc(4096) + 4096, CLONE_VM | SIGCHLD, NULL) == -1) + err(1, "Creating Waker"); } /* @@ -661,19 +699,22 @@ static unsigned get_vq_desc(struct virtqueue *vq, unsigned int *out_num, unsigned int *in_num) { unsigned int i, head; + u16 last_avail; /* Check it isn't doing very strange things with descriptor numbers. */ - if ((u16)(vq->vring.avail->idx - vq->last_avail_idx) > vq->vring.num) + last_avail = lg_last_avail(vq); + if ((u16)(vq->vring.avail->idx - last_avail) > vq->vring.num) errx(1, "Guest moved used index from %u to %u", - vq->last_avail_idx, vq->vring.avail->idx); + last_avail, vq->vring.avail->idx); /* If there's nothing new since last we looked, return invalid. */ - if (vq->vring.avail->idx == vq->last_avail_idx) + if (vq->vring.avail->idx == last_avail) return vq->vring.num; /* Grab the next descriptor number they're advertising, and increment * the index we've seen. */ - head = vq->vring.avail->ring[vq->last_avail_idx++ % vq->vring.num]; + head = vq->vring.avail->ring[last_avail % vq->vring.num]; + lg_last_avail(vq)++; /* If their number is silly, that's a fatal mistake. */ if (head >= vq->vring.num) @@ -821,8 +862,8 @@ static bool handle_console_input(int fd, struct device *dev) unsigned long args[] = { LHREQ_BREAK, 0 }; /* Close the fd so Waker will know it has to * exit. */ - close(waker_fd); - /* Just in case waker is blocked in BREAK, send + close(waker_fds.pipe[1]); + /* Just in case Waker is blocked in BREAK, send * unbreak now. */ write(fd, args, sizeof(args)); exit(2); @@ -839,7 +880,7 @@ static bool handle_console_input(int fd, struct device *dev) /* Handling output for console is simple: we just get all the output buffers * and write them to stdout. */ -static void handle_console_output(int fd, struct virtqueue *vq) +static void handle_console_output(int fd, struct virtqueue *vq, bool timeout) { unsigned int head, out, in; int len; @@ -854,6 +895,21 @@ static void handle_console_output(int fd, struct virtqueue *vq) } } +static void block_vq(struct virtqueue *vq) +{ + struct itimerval itm; + + vq->vring.used->flags |= VRING_USED_F_NO_NOTIFY; + vq->blocked = true; + + itm.it_interval.tv_sec = 0; + itm.it_interval.tv_usec = 0; + itm.it_value.tv_sec = 0; + itm.it_value.tv_usec = timeout_usec; + + setitimer(ITIMER_REAL, &itm, NULL); +} + /* * The Network * @@ -861,22 +917,34 @@ static void handle_console_output(int fd, struct virtqueue *vq) * and write them (ignoring the first element) to this device's file descriptor * (/dev/net/tun). */ -static void handle_net_output(int fd, struct virtqueue *vq) +static void handle_net_output(int fd, struct virtqueue *vq, bool timeout) { - unsigned int head, out, in; + unsigned int head, out, in, num = 0; int len; struct iovec iov[vq->vring.num]; + static int last_timeout_num; /* Keep getting output buffers from the Guest until we run out. */ while ((head = get_vq_desc(vq, iov, &out, &in)) != vq->vring.num) { if (in) errx(1, "Input buffers in output queue?"); - /* Check header, but otherwise ignore it (we told the Guest we - * supported no features, so it shouldn't have anything - * interesting). */ - (void)convert(&iov[0], struct virtio_net_hdr); - len = writev(vq->dev->fd, iov+1, out-1); + len = writev(vq->dev->fd, iov, out); + if (len < 0) + err(1, "Writing network packet to tun"); add_used_and_trigger(fd, vq, head, len); + num++; + } + + /* Block further kicks and set up a timer if we saw anything. */ + if (!timeout && num) + block_vq(vq); + + if (timeout) { + if (num < last_timeout_num) + timeout_usec += 10; + else if (timeout_usec > 1) + timeout_usec--; + last_timeout_num = num; } } @@ -887,7 +955,6 @@ static bool handle_tun_input(int fd, struct device *dev) unsigned int head, in_num, out_num; int len; struct iovec iov[dev->vq->vring.num]; - struct virtio_net_hdr *hdr; /* First we need a network buffer from the Guests's recv virtqueue. */ head = get_vq_desc(dev->vq, iov, &out_num, &in_num); @@ -896,25 +963,23 @@ static bool handle_tun_input(int fd, struct device *dev) * early, the Guest won't be ready yet. Wait until the device * status says it's ready. */ /* FIXME: Actually want DRIVER_ACTIVE here. */ - if (dev->desc->status & VIRTIO_CONFIG_S_DRIVER_OK) - warn("network: no dma buffer!"); + + /* Now tell it we want to know if new things appear. */ + dev->vq->vring.used->flags &= ~VRING_USED_F_NO_NOTIFY; + wmb(); + /* We'll turn this back on if input buffers are registered. */ return false; } else if (out_num) errx(1, "Output buffers in network recv queue?"); - /* First element is the header: we set it to 0 (no features). */ - hdr = convert(&iov[0], struct virtio_net_hdr); - hdr->flags = 0; - hdr->gso_type = VIRTIO_NET_HDR_GSO_NONE; - /* Read the packet from the device directly into the Guest's buffer. */ - len = readv(dev->fd, iov+1, in_num-1); + len = readv(dev->fd, iov, in_num); if (len <= 0) err(1, "reading network"); /* Tell the Guest about the new packet. */ - add_used_and_trigger(fd, dev->vq, head, sizeof(*hdr) + len); + add_used_and_trigger(fd, dev->vq, head, len); verbose("tun input packet len %i [%02x %02x] (%s)\n", len, ((u8 *)iov[1].iov_base)[0], ((u8 *)iov[1].iov_base)[1], @@ -927,11 +992,18 @@ static bool handle_tun_input(int fd, struct device *dev) /*L:215 This is the callback attached to the network and console input * virtqueues: it ensures we try again, in case we stopped console or net * delivery because Guest didn't have any buffers. */ -static void enable_fd(int fd, struct virtqueue *vq) +static void enable_fd(int fd, struct virtqueue *vq, bool timeout) { add_device_fd(vq->dev->fd); - /* Tell waker to listen to it again */ - write(waker_fd, &vq->dev->fd, sizeof(vq->dev->fd)); + /* Snap the Waker out of its select loop. */ + write(waker_fds.pipe[1], "", 1); +} + +static void net_enable_fd(int fd, struct virtqueue *vq, bool timeout) +{ + /* We don't need to know again when Guest refills receive buffer. */ + vq->vring.used->flags |= VRING_USED_F_NO_NOTIFY; + enable_fd(fd, vq, timeout); } /* When the Guest tells us they updated the status field, we handle it. */ @@ -951,7 +1023,7 @@ static void update_device_status(struct device *dev) for (vq = dev->vq; vq; vq = vq->next) { memset(vq->vring.desc, 0, vring_size(vq->config.num, getpagesize())); - vq->last_avail_idx = 0; + lg_last_avail(vq) = 0; } } else if (dev->desc->status & VIRTIO_CONFIG_S_FAILED) { warnx("Device %s configuration FAILED", dev->name); @@ -960,10 +1032,10 @@ static void update_device_status(struct device *dev) verbose("Device %s OK: offered", dev->name); for (i = 0; i < dev->desc->feature_len; i++) - verbose(" %08x", get_feature_bits(dev)[i]); + verbose(" %02x", get_feature_bits(dev)[i]); verbose(", accepted"); for (i = 0; i < dev->desc->feature_len; i++) - verbose(" %08x", get_feature_bits(dev) + verbose(" %02x", get_feature_bits(dev) [dev->desc->feature_len+i]); if (dev->ready) @@ -1000,7 +1072,7 @@ static void handle_output(int fd, unsigned long addr) if (strcmp(vq->dev->name, "console") != 0) verbose("Output to %s\n", vq->dev->name); if (vq->handle_output) - vq->handle_output(fd, vq); + vq->handle_output(fd, vq, false); return; } } @@ -1014,6 +1086,29 @@ static void handle_output(int fd, unsigned long addr) strnlen(from_guest_phys(addr), guest_limit - addr)); } +static void handle_timeout(int fd) +{ + char buf[32]; + struct device *i; + struct virtqueue *vq; + + /* Clear the pipe */ + read(timeoutpipe[0], buf, sizeof(buf)); + + /* Check each device and virtqueue: flush blocked ones. */ + for (i = devices.dev; i; i = i->next) { + for (vq = i->vq; vq; vq = vq->next) { + if (!vq->blocked) + continue; + + vq->vring.used->flags &= ~VRING_USED_F_NO_NOTIFY; + vq->blocked = false; + if (vq->handle_output) + vq->handle_output(fd, vq, true); + } + } +} + /* This is called when the Waker wakes us up: check for incoming file * descriptors. */ static void handle_input(int fd) @@ -1024,16 +1119,20 @@ static void handle_input(int fd) for (;;) { struct device *i; fd_set fds = devices.infds; + int num; + num = select(devices.max_infd+1, &fds, NULL, NULL, &poll); + /* Could get interrupted */ + if (num < 0) + continue; /* If nothing is ready, we're done. */ - if (select(devices.max_infd+1, &fds, NULL, NULL, &poll) == 0) + if (num == 0) break; /* Otherwise, call the device(s) which have readable file * descriptors and a method of handling them. */ for (i = devices.dev; i; i = i->next) { if (i->handle_input && FD_ISSET(i->fd, &fds)) { - int dev_fd; if (i->handle_input(fd, i)) continue; @@ -1043,13 +1142,12 @@ static void handle_input(int fd) * buffers to deliver into. Console also uses * it when it discovers that stdin is closed. */ FD_CLR(i->fd, &devices.infds); - /* Tell waker to ignore it too, by sending a - * negative fd number (-1, since 0 is a valid - * FD number). */ - dev_fd = -i->fd - 1; - write(waker_fd, &dev_fd, sizeof(dev_fd)); } } + + /* Is this the timeout fd? */ + if (FD_ISSET(timeoutpipe[0], &fds)) + handle_timeout(fd); } } @@ -1098,7 +1196,7 @@ static struct lguest_device_desc *new_dev_desc(u16 type) /* Each device descriptor is followed by the description of its virtqueues. We * specify how many descriptors the virtqueue is to have. */ static void add_virtqueue(struct device *dev, unsigned int num_descs, - void (*handle_output)(int fd, struct virtqueue *me)) + void (*handle_output)(int, struct virtqueue *, bool)) { unsigned int pages; struct virtqueue **i, *vq = malloc(sizeof(*vq)); @@ -1114,6 +1212,7 @@ static void add_virtqueue(struct device *dev, unsigned int num_descs, vq->last_avail_idx = 0; vq->dev = dev; vq->inflight = 0; + vq->blocked = false; /* Initialize the configuration. */ vq->config.num = num_descs; @@ -1246,6 +1345,24 @@ static void setup_console(void) } /*:*/ +static void timeout_alarm(int sig) +{ + write(timeoutpipe[1], "", 1); +} + +static void setup_timeout(void) +{ + if (pipe(timeoutpipe) != 0) + err(1, "Creating timeout pipe"); + + if (fcntl(timeoutpipe[1], F_SETFL, + fcntl(timeoutpipe[1], F_GETFL) | O_NONBLOCK) != 0) + err(1, "Making timeout pipe nonblocking"); + + add_device_fd(timeoutpipe[0]); + signal(SIGALRM, timeout_alarm); +} + /*M:010 Inter-guest networking is an interesting area. Simplest is to have a * --sharenet= option which opens or creates a named pipe. This can be * used to send packets to another guest in a 1:1 manner. @@ -1264,10 +1381,25 @@ static void setup_console(void) static u32 str2ip(const char *ipaddr) { - unsigned int byte[4]; + unsigned int b[4]; - sscanf(ipaddr, "%u.%u.%u.%u", &byte[0], &byte[1], &byte[2], &byte[3]); - return (byte[0] << 24) | (byte[1] << 16) | (byte[2] << 8) | byte[3]; + if (sscanf(ipaddr, "%u.%u.%u.%u", &b[0], &b[1], &b[2], &b[3]) != 4) + errx(1, "Failed to parse IP address '%s'", ipaddr); + return (b[0] << 24) | (b[1] << 16) | (b[2] << 8) | b[3]; +} + +static void str2mac(const char *macaddr, unsigned char mac[6]) +{ + unsigned int m[6]; + if (sscanf(macaddr, "%02x:%02x:%02x:%02x:%02x:%02x", + &m[0], &m[1], &m[2], &m[3], &m[4], &m[5]) != 6) + errx(1, "Failed to parse mac address '%s'", macaddr); + mac[0] = m[0]; + mac[1] = m[1]; + mac[2] = m[2]; + mac[3] = m[3]; + mac[4] = m[4]; + mac[5] = m[5]; } /* This code is "adapted" from libbridge: it attaches the Host end of the @@ -1288,6 +1420,7 @@ static void add_to_bridge(int fd, const char *if_name, const char *br_name) errx(1, "interface %s does not exist!", if_name); strncpy(ifr.ifr_name, br_name, IFNAMSIZ); + ifr.ifr_name[IFNAMSIZ-1] = '\0'; ifr.ifr_ifindex = ifidx; if (ioctl(fd, SIOCBRADDIF, &ifr) < 0) err(1, "can't add %s to bridge %s", if_name, br_name); @@ -1296,64 +1429,90 @@ static void add_to_bridge(int fd, const char *if_name, const char *br_name) /* This sets up the Host end of the network device with an IP address, brings * it up so packets will flow, the copies the MAC address into the hwaddr * pointer. */ -static void configure_device(int fd, const char *devname, u32 ipaddr, - unsigned char hwaddr[6]) +static void configure_device(int fd, const char *tapif, u32 ipaddr) { struct ifreq ifr; struct sockaddr_in *sin = (struct sockaddr_in *)&ifr.ifr_addr; - /* Don't read these incantations. Just cut & paste them like I did! */ memset(&ifr, 0, sizeof(ifr)); - strcpy(ifr.ifr_name, devname); + strcpy(ifr.ifr_name, tapif); + + /* Don't read these incantations. Just cut & paste them like I did! */ sin->sin_family = AF_INET; sin->sin_addr.s_addr = htonl(ipaddr); if (ioctl(fd, SIOCSIFADDR, &ifr) != 0) - err(1, "Setting %s interface address", devname); + err(1, "Setting %s interface address", tapif); ifr.ifr_flags = IFF_UP; if (ioctl(fd, SIOCSIFFLAGS, &ifr) != 0) - err(1, "Bringing interface %s up", devname); + err(1, "Bringing interface %s up", tapif); +} + +static void get_mac(int fd, const char *tapif, unsigned char hwaddr[6]) +{ + struct ifreq ifr; + + memset(&ifr, 0, sizeof(ifr)); + strcpy(ifr.ifr_name, tapif); /* SIOC stands for Socket I/O Control. G means Get (vs S for Set * above). IF means Interface, and HWADDR is hardware address. * Simple! */ if (ioctl(fd, SIOCGIFHWADDR, &ifr) != 0) - err(1, "getting hw address for %s", devname); + err(1, "getting hw address for %s", tapif); memcpy(hwaddr, ifr.ifr_hwaddr.sa_data, 6); } -/*L:195 Our network is a Host<->Guest network. This can either use bridging or - * routing, but the principle is the same: it uses the "tun" device to inject - * packets into the Host as if they came in from a normal network card. We - * just shunt packets between the Guest and the tun device. */ -static void setup_tun_net(const char *arg) +static int get_tun_device(char tapif[IFNAMSIZ]) { - struct device *dev; struct ifreq ifr; - int netfd, ipfd; - u32 ip; - const char *br_name = NULL; - struct virtio_net_config conf; + int netfd; + + /* Start with this zeroed. Messy but sure. */ + memset(&ifr, 0, sizeof(ifr)); /* We open the /dev/net/tun device and tell it we want a tap device. A * tap device is like a tun device, only somehow different. To tell * the truth, I completely blundered my way through this code, but it * works now! */ netfd = open_or_die("/dev/net/tun", O_RDWR); - memset(&ifr, 0, sizeof(ifr)); - ifr.ifr_flags = IFF_TAP | IFF_NO_PI; + ifr.ifr_flags = IFF_TAP | IFF_NO_PI | IFF_VNET_HDR; strcpy(ifr.ifr_name, "tap%d"); if (ioctl(netfd, TUNSETIFF, &ifr) != 0) err(1, "configuring /dev/net/tun"); + + if (ioctl(netfd, TUNSETOFFLOAD, + TUN_F_CSUM|TUN_F_TSO4|TUN_F_TSO6|TUN_F_TSO_ECN) != 0) + err(1, "Could not set features for tun device"); + /* We don't need checksums calculated for packets coming in this * device: trust us! */ ioctl(netfd, TUNSETNOCSUM, 1); + memcpy(tapif, ifr.ifr_name, IFNAMSIZ); + return netfd; +} + +/*L:195 Our network is a Host<->Guest network. This can either use bridging or + * routing, but the principle is the same: it uses the "tun" device to inject + * packets into the Host as if they came in from a normal network card. We + * just shunt packets between the Guest and the tun device. */ +static void setup_tun_net(char *arg) +{ + struct device *dev; + int netfd, ipfd; + u32 ip = INADDR_ANY; + bool bridging = false; + char tapif[IFNAMSIZ], *p; + struct virtio_net_config conf; + + netfd = get_tun_device(tapif); + /* First we create a new network device. */ dev = new_device("net", VIRTIO_ID_NET, netfd, handle_tun_input); /* Network devices need a receive and a send queue, just like * console. */ - add_virtqueue(dev, VIRTQUEUE_NUM, enable_fd); + add_virtqueue(dev, VIRTQUEUE_NUM, net_enable_fd); add_virtqueue(dev, VIRTQUEUE_NUM, handle_net_output); /* We need a socket to perform the magic network ioctls to bring up the @@ -1364,28 +1523,56 @@ static void setup_tun_net(const char *arg) /* If the command line was --tunnet=bridge: do bridging. */ if (!strncmp(BRIDGE_PFX, arg, strlen(BRIDGE_PFX))) { - ip = INADDR_ANY; - br_name = arg + strlen(BRIDGE_PFX); - add_to_bridge(ipfd, ifr.ifr_name, br_name); - } else /* It is an IP address to set up the device with */ + arg += strlen(BRIDGE_PFX); + bridging = true; + } + + /* A mac address may follow the bridge name or IP address */ + p = strchr(arg, ':'); + if (p) { + str2mac(p+1, conf.mac); + *p = '\0'; + } else { + p = arg + strlen(arg); + /* None supplied; query the randomly assigned mac. */ + get_mac(ipfd, tapif, conf.mac); + } + + /* arg is now either an IP address or a bridge name */ + if (bridging) + add_to_bridge(ipfd, tapif, arg); + else ip = str2ip(arg); - /* Set up the tun device, and get the mac address for the interface. */ - configure_device(ipfd, ifr.ifr_name, ip, conf.mac); + /* Set up the tun device. */ + configure_device(ipfd, tapif, ip); /* Tell Guest what MAC address to use. */ add_feature(dev, VIRTIO_NET_F_MAC); add_feature(dev, VIRTIO_F_NOTIFY_ON_EMPTY); + /* Expect Guest to handle everything except UFO */ + add_feature(dev, VIRTIO_NET_F_CSUM); + add_feature(dev, VIRTIO_NET_F_GUEST_CSUM); + add_feature(dev, VIRTIO_NET_F_MAC); + add_feature(dev, VIRTIO_NET_F_GUEST_TSO4); + add_feature(dev, VIRTIO_NET_F_GUEST_TSO6); + add_feature(dev, VIRTIO_NET_F_GUEST_ECN); + add_feature(dev, VIRTIO_NET_F_HOST_TSO4); + add_feature(dev, VIRTIO_NET_F_HOST_TSO6); + add_feature(dev, VIRTIO_NET_F_HOST_ECN); set_config(dev, sizeof(conf), &conf); /* We don't need the socket any more; setup is done. */ close(ipfd); - verbose("device %u: tun net %u.%u.%u.%u\n", - devices.device_num++, - (u8)(ip>>24),(u8)(ip>>16),(u8)(ip>>8),(u8)ip); - if (br_name) - verbose("attached to bridge: %s\n", br_name); + devices.device_num++; + + if (bridging) + verbose("device %u: tun %s attached to bridge: %s\n", + devices.device_num, tapif, arg); + else + verbose("device %u: tun %s: %s\n", + devices.device_num, tapif, arg); } /* Our block (disk) device should be really simple: the Guest asks for a block @@ -1550,7 +1737,7 @@ static bool handle_io_finish(int fd, struct device *dev) } /* When the Guest submits some I/O, we just need to wake the I/O thread. */ -static void handle_virtblk_output(int fd, struct virtqueue *vq) +static void handle_virtblk_output(int fd, struct virtqueue *vq, bool timeout) { struct vblk_info *vblk = vq->dev->priv; char c = 0; @@ -1621,6 +1808,64 @@ static void setup_block_file(const char *filename) verbose("device %u: virtblock %llu sectors\n", devices.device_num, le64_to_cpu(conf.capacity)); } + +/* Our random number generator device reads from /dev/random into the Guest's + * input buffers. The usual case is that the Guest doesn't want random numbers + * and so has no buffers although /dev/random is still readable, whereas + * console is the reverse. + * + * The same logic applies, however. */ +static bool handle_rng_input(int fd, struct device *dev) +{ + int len; + unsigned int head, in_num, out_num, totlen = 0; + struct iovec iov[dev->vq->vring.num]; + + /* First we need a buffer from the Guests's virtqueue. */ + head = get_vq_desc(dev->vq, iov, &out_num, &in_num); + + /* If they're not ready for input, stop listening to this file + * descriptor. We'll start again once they add an input buffer. */ + if (head == dev->vq->vring.num) + return false; + + if (out_num) + errx(1, "Output buffers in rng?"); + + /* This is why we convert to iovecs: the readv() call uses them, and so + * it reads straight into the Guest's buffer. We loop to make sure we + * fill it. */ + while (!iov_empty(iov, in_num)) { + len = readv(dev->fd, iov, in_num); + if (len <= 0) + err(1, "Read from /dev/random gave %i", len); + iov_consume(iov, in_num, len); + totlen += len; + } + + /* Tell the Guest about the new input. */ + add_used_and_trigger(fd, dev->vq, head, totlen); + + /* Everything went OK! */ + return true; +} + +/* And this creates a "hardware" random number device for the Guest. */ +static void setup_rng(void) +{ + struct device *dev; + int fd; + + fd = open_or_die("/dev/random", O_RDONLY); + + /* The device responds to return from I/O thread. */ + dev = new_device("rng", VIRTIO_ID_RNG, fd, handle_rng_input); + + /* The device has one virtqueue, where the Guest places inbufs. */ + add_virtqueue(dev, VIRTQUEUE_NUM, enable_fd); + + verbose("device %u: rng\n", devices.device_num++); +} /* That's the end of device setup. */ /*L:230 Reboot is pretty easy: clean up and exec() the Launcher afresh. */ @@ -1628,11 +1873,12 @@ static void __attribute__((noreturn)) restart_guest(void) { unsigned int i; - /* Closing pipes causes the Waker thread and io_threads to die, and - * closing /dev/lguest cleans up the Guest. Since we don't track all - * open fds, we simply close everything beyond stderr. */ + /* Since we don't track all open fds, we simply close everything beyond + * stderr. */ for (i = 3; i < FD_SETSIZE; i++) close(i); + + /* The exec automatically gets rid of the I/O and Waker threads. */ execv(main_args[0], main_args); err(1, "Could not exec %s", main_args[0]); } @@ -1663,7 +1909,7 @@ static void __attribute__((noreturn)) run_guest(int lguest_fd) /* ERESTART means that we need to reboot the guest */ } else if (errno == ERESTART) { restart_guest(); - /* EAGAIN means the Waker wanted us to look at some input. + /* EAGAIN means a signal (timeout). * Anything else means a bug or incompatible change. */ } else if (errno != EAGAIN) err(1, "Running guest failed"); @@ -1691,13 +1937,14 @@ static struct option opts[] = { { "verbose", 0, NULL, 'v' }, { "tunnet", 1, NULL, 't' }, { "block", 1, NULL, 'b' }, + { "rng", 0, NULL, 'r' }, { "initrd", 1, NULL, 'i' }, { NULL }, }; static void usage(void) { errx(1, "Usage: lguest [--verbose] " - "[--tunnet=(|bridge:)\n" + "[--tunnet=(:|bridge::)\n" "|--block=|--initrd=]...\n" " vmlinux [args...]"); } @@ -1765,6 +2012,9 @@ int main(int argc, char *argv[]) case 'b': setup_block_file(optarg); break; + case 'r': + setup_rng(); + break; case 'i': initrd_name = optarg; break; @@ -1783,6 +2033,9 @@ int main(int argc, char *argv[]) /* We always have a console device */ setup_console(); + /* We can timeout waiting for Guest network transmit. */ + setup_timeout(); + /* Now we load the kernel */ start = load_kernel(open_or_die(argv[optind+1], O_RDONLY)); @@ -1826,10 +2079,10 @@ int main(int argc, char *argv[]) * /dev/lguest file descriptor. */ lguest_fd = tell_kernel(pgdir, start); - /* We fork off a child process, which wakes the Launcher whenever one - * of the input file descriptors needs attention. We call this the - * Waker, and we'll cover it in a moment. */ - waker_fd = setup_waker(lguest_fd); + /* We clone off a thread, which wakes the Launcher whenever one of the + * input file descriptors needs attention. We call this the Waker, and + * we'll cover it in a moment. */ + setup_waker(lguest_fd); /* Finally, run the Guest. This doesn't return. */ run_guest(lguest_fd); diff --git a/Documentation/local_ops.txt b/Documentation/local_ops.txt index 4269a1105b378fafcc689435a2531b9d9d4287db..f4f8b1c6c8ba45ba6ec351aa92c40e798024983c 100644 --- a/Documentation/local_ops.txt +++ b/Documentation/local_ops.txt @@ -36,7 +36,7 @@ It can be done by slightly modifying the standard atomic operations : only their UP variant must be kept. It typically means removing LOCK prefix (on i386 and x86_64) and any SMP sychronization barrier. If the architecture does not have a different behavior between SMP and UP, including asm-generic/local.h -in your archtecture's local.h is sufficient. +in your architecture's local.h is sufficient. The local_t type is defined as an opaque signed long by embedding an atomic_long_t inside a structure. This is made so a cast from this type to a diff --git a/Documentation/md.txt b/Documentation/md.txt index a8b430627473aa243995ab6f6e173b9cf1ff819e..1da9d1b1793f3436b3561a48de7fbcd8c893e74e 100644 --- a/Documentation/md.txt +++ b/Documentation/md.txt @@ -236,6 +236,11 @@ All md devices contain: writing the word for the desired state, however some states cannot be explicitly set, and some transitions are not allowed. + Select/poll works on this file. All changes except between + active_idle and active (which can be frequent and are not + very interesting) are notified. active->active_idle is + reported if the metadata is externally managed. + clear No devices, no size, no level Writing is equivalent to STOP_ARRAY ioctl @@ -292,6 +297,10 @@ Each directory contains: writemostly - device will only be subject to read requests if there are no other options. This applies only to raid1 arrays. + blocked - device has failed, metadata is "external", + and the failure hasn't been acknowledged yet. + Writes that would write to this device if + it were not faulty are blocked. spare - device is working, but not a full member. This includes spares that are in the process of being recovered to @@ -301,6 +310,12 @@ Each directory contains: Writing "remove" removes the device from the array. Writing "writemostly" sets the writemostly flag. Writing "-writemostly" clears the writemostly flag. + Writing "blocked" sets the "blocked" flag. + Writing "-blocked" clear the "blocked" flag and allows writes + to complete. + + This file responds to select/poll. Any change to 'faulty' + or 'blocked' causes an event. errors An approximate count of read errors that have been detected on @@ -332,7 +347,7 @@ Each directory contains: for storage of data. This will normally be the same as the component_size. This can be written while assembling an array. If a value less than the current component_size is - written, component_size will be reduced to this value. + written, it will be rejected. An active md device will also contain and entry for each active device @@ -381,6 +396,19 @@ also have 'check' and 'repair' will start the appropriate process providing the current state is 'idle'. + This file responds to select/poll. Any important change in the value + triggers a poll event. Sometimes the value will briefly be + "recover" if a recovery seems to be needed, but cannot be + achieved. In that case, the transition to "recover" isn't + notified, but the transition away is. + + degraded + This contains a count of the number of devices by which the + arrays is degraded. So an optimal array with show '0'. A + single failed/missing drive will show '1', etc. + This file responds to select/poll, any increase or decrease + in the count of missing devices will trigger an event. + mismatch_count When performing 'check' and 'repair', and possibly when performing 'resync', md will count the number of errors that are diff --git a/Documentation/moxa-smartio b/Documentation/moxa-smartio index fe24ecc6372e6b3482c3f39972ab9f70077d7b70..5337e80a5b96c6341e523394be6fedc58b87f6ed 100644 --- a/Documentation/moxa-smartio +++ b/Documentation/moxa-smartio @@ -1,14 +1,22 @@ ============================================================================= - - MOXA Smartio Family Device Driver Ver 1.1 Installation Guide - for Linux Kernel 2.2.x and 2.0.3x - Copyright (C) 1999, Moxa Technologies Co, Ltd. + MOXA Smartio/Industio Family Device Driver Installation Guide + for Linux Kernel 2.4.x, 2.6.x + Copyright (C) 2008, Moxa Inc. ============================================================================= +Date: 01/21/2008 + Content 1. Introduction 2. System Requirement 3. Installation + 3.1 Hardware installation + 3.2 Driver files + 3.3 Device naming convention + 3.4 Module driver configuration + 3.5 Static driver configuration for Linux kernel 2.4.x and 2.6.x. + 3.6 Custom configuration + 3.7 Verify driver installation 4. Utilities 5. Setserial 6. Troubleshooting @@ -16,27 +24,48 @@ Content ----------------------------------------------------------------------------- 1. Introduction - The Smartio family Linux driver, Ver. 1.1, supports following multiport + The Smartio/Industio/UPCI family Linux driver supports following multiport boards. - -C104P/H/HS, C104H/PCI, C104HS/PCI, CI-104J 4 port multiport board. - -C168P/H/HS, C168H/PCI 8 port multiport board. - - This driver has been modified a little and cleaned up from the Moxa - contributed driver code and merged into Linux 2.2.14pre. In particular - official major/minor numbers have been assigned which are different to - those the original Moxa supplied driver used. + - 2 ports multiport board + CP-102U, CP-102UL, CP-102UF + CP-132U-I, CP-132UL, + CP-132, CP-132I, CP132S, CP-132IS, + CI-132, CI-132I, CI-132IS, + (C102H, C102HI, C102HIS, C102P, CP-102, CP-102S) + + - 4 ports multiport board + CP-104EL, + CP-104UL, CP-104JU, + CP-134U, CP-134U-I, + C104H/PCI, C104HS/PCI, + CP-114, CP-114I, CP-114S, CP-114IS, CP-114UL, + C104H, C104HS, + CI-104J, CI-104JS, + CI-134, CI-134I, CI-134IS, + (C114HI, CT-114I, C104P) + POS-104UL, + CB-114, + CB-134I + + - 8 ports multiport board + CP-118EL, CP-168EL, + CP-118U, CP-168U, + C168H/PCI, + C168H, C168HS, + (C168P), + CB-108 This driver and installation procedure have been developed upon Linux Kernel - 2.2.5 and backward compatible to 2.0.3x. This driver supports Intel x86 and - Alpha hardware platform. In order to maintain compatibility, this version - has also been properly tested with RedHat, OpenLinux, TurboLinux and - S.u.S.E Linux. However, if compatibility problem occurs, please contact - Moxa at support@moxa.com.tw. + 2.4.x and 2.6.x. This driver supports Intel x86 hardware platform. In order + to maintain compatibility, this version has also been properly tested with + RedHat, Mandrake, Fedora and S.u.S.E Linux. However, if compatibility problem + occurs, please contact Moxa at support@moxa.com.tw. In addition to device driver, useful utilities are also provided in this version. They are - - msdiag Diagnostic program for detecting installed Moxa Smartio boards. + - msdiag Diagnostic program for displaying installed Moxa + Smartio/Industio boards. - msmon Monitor program to observe data count and line status signals. - msterm A simple terminal program which is useful in testing serial ports. @@ -47,8 +76,7 @@ Content GNU General Public License in this version. Please refer to GNU General Public License announcement in each source code file for more detail. - In Moxa's ftp sites, you may always find latest driver at - ftp://ftp.moxa.com or ftp://ftp.moxa.com.tw. + In Moxa's Web sites, you may always find latest driver at http://web.moxa.com. This version of driver can be installed as Loadable Module (Module driver) or built-in into kernel (Static driver). You may refer to following @@ -61,18 +89,27 @@ Content ----------------------------------------------------------------------------- 2. System Requirement - - Hardware platform: Intel x86 or Alpha machine - - Kernel version: 2.0.3x or 2.2.x + - Hardware platform: Intel x86 machine + - Kernel version: 2.4.x or 2.6.x - gcc version 2.72 or later - Maximum 4 boards can be installed in combination ----------------------------------------------------------------------------- 3. Installation + 3.1 Hardware installation + 3.2 Driver files + 3.3 Device naming convention + 3.4 Module driver configuration + 3.5 Static driver configuration for Linux kernel 2.4.x, 2.6.x. + 3.6 Custom configuration + 3.7 Verify driver installation + + 3.1 Hardware installation - There are two types of buses, ISA and PCI, for Smartio family multiport - board. + There are two types of buses, ISA and PCI, for Smartio/Industio + family multiport board. ISA board --------- @@ -81,47 +118,57 @@ Content installation procedure in User's Manual before proceed any further. Please make sure the JP1 is open after the ISA board is set properly. - PCI board - --------- + PCI/UPCI board + -------------- You may need to adjust IRQ usage in BIOS to avoid from IRQ conflict with other ISA devices. Please refer to hardware installation procedure in User's Manual in advance. - IRQ Sharing + PCI IRQ Sharing ----------- Each port within the same multiport board shares the same IRQ. Up to - 4 Moxa Smartio Family multiport boards can be installed together on - one system and they can share the same IRQ. + 4 Moxa Smartio/Industio PCI Family multiport boards can be installed + together on one system and they can share the same IRQ. + - 3.2 Driver files and device naming convention + 3.2 Driver files The driver file may be obtained from ftp, CD-ROM or floppy disk. The first step, anyway, is to copy driver file "mxser.tgz" into specified directory. e.g. /moxa. The execute commands as below. + # cd / + # mkdir moxa # cd /moxa - # tar xvf /dev/fd0 + # tar xvf /dev/fd0 + or + + # cd / + # mkdir moxa # cd /moxa # cp /mnt/cdrom//mxser.tgz . # tar xvfz mxser.tgz + + 3.3 Device naming convention + You may find all the driver and utilities files in /moxa/mxser. Following installation procedure depends on the model you'd like to - run the driver. If you prefer module driver, please refer to 3.3. - If static driver is required, please refer to 3.4. + run the driver. If you prefer module driver, please refer to 3.4. + If static driver is required, please refer to 3.5. Dialin and callout port ----------------------- - This driver remains traditional serial device properties. There're + This driver remains traditional serial device properties. There are two special file name for each serial port. One is dial-in port which is named "ttyMxx". For callout port, the naming convention is "cumxx". Device naming when more than 2 boards installed ----------------------------------------------- - Naming convention for each Smartio multiport board is pre-defined - as below. + Naming convention for each Smartio/Industio multiport board is + pre-defined as below. Board Num. Dial-in Port Callout port 1st board ttyM0 - ttyM7 cum0 - cum7 @@ -129,6 +176,12 @@ Content 3rd board ttyM16 - ttyM23 cum16 - cum23 4th board ttyM24 - ttym31 cum24 - cum31 + + !!!!!!!!!!!!!!!!!!!! NOTE !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! + Under Kernel 2.6 the cum Device is Obsolete. So use ttyM* + device instead. + !!!!!!!!!!!!!!!!!!!! NOTE !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! + Board sequence -------------- This driver will activate ISA boards according to the parameter set @@ -138,69 +191,131 @@ Content For PCI boards, their sequence will be after ISA boards and C168H/PCI has higher priority than C104H/PCI boards. - 3.3 Module driver configuration + 3.4 Module driver configuration Module driver is easiest way to install. If you prefer static driver installation, please skip this paragraph. - 1. Find "Makefile" in /moxa/mxser, then run - # make install + + ------------- Prepare to use the MOXA driver-------------------- + 3.4.1 Create tty device with correct major number + Before using MOXA driver, your system must have the tty devices + which are created with driver's major number. We offer one shell + script "msmknod" to simplify the procedure. + This step is only needed to be executed once. But you still + need to do this procedure when: + a. You change the driver's major number. Please refer the "3.7" + section. + b. Your total installed MOXA boards number is changed. Maybe you + add/delete one MOXA board. + c. You want to change the tty name. This needs to modify the + shell script "msmknod" + + The procedure is: + # cd /moxa/mxser/driver + # ./msmknod + + This shell script will require the major number for dial-in + device and callout device to create tty device. You also need + to specify the total installed MOXA board number. Default major + numbers for dial-in device and callout device are 30, 35. If + you need to change to other number, please refer section "3.7" + for more detailed procedure. + Msmknod will delete any special files occupying the same device + naming. + + 3.4.2 Build the MOXA driver and utilities + Before using the MOXA driver and utilities, you need compile the + all the source code. This step is only need to be executed once. + But you still re-compile the source code if you modify the source + code. For example, if you change the driver's major number (see + "3.7" section), then you need to do this step again. + + Find "Makefile" in /moxa/mxser, then run + + # make clean; make install + + !!!!!!!!!! NOTE !!!!!!!!!!!!!!!!! + For Red Hat 9, Red Hat Enterprise Linux AS3/ES3/WS3 & Fedora Core1: + # make clean; make installsp1 + + For Red Hat Enterprise Linux AS4/ES4/WS4: + # make clean; make installsp2 + !!!!!!!!!! NOTE !!!!!!!!!!!!!!!!! The driver files "mxser.o" and utilities will be properly compiled - and copied to system directories respectively.Then run + and copied to system directories respectively. - # insmod mxser + ------------- Load MOXA driver-------------------- + 3.4.3 Load the MOXA driver - to activate the modular driver. You may run "lsmod" to check - if "mxser.o" is activated. + # modprobe mxser - 2. Create special files by executing "msmknod". - # cd /moxa/mxser/driver - # ./msmknod + will activate the module driver. You may run "lsmod" to check + if "mxser" is activated. If the MOXA board is ISA board, the + is needed. Please refer to section "3.4.5" for more + information. + + + ------------- Load MOXA driver on boot -------------------- + 3.4.4 For the above description, you may manually execute + "modprobe mxser" to activate this driver and run + "rmmod mxser" to remove it. + However, it's better to have a boot time configuration to + eliminate manual operation. Boot time configuration can be + achieved by rc file. We offer one "rc.mxser" file to simplify + the procedure under "moxa/mxser/driver". - Default major numbers for dial-in device and callout device are - 174, 175. Msmknod will delete any special files occupying the same - device naming. + But if you use ISA board, please modify the "modprobe ..." command + to add the argument (see "3.4.5" section). After modifying the + rc.mxser, please try to execute "/moxa/mxser/driver/rc.mxser" + manually to make sure the modification is ok. If any error + encountered, please try to modify again. If the modification is + completed, follow the below step. - 3. Up to now, you may manually execute "insmod mxser" to activate - this driver and run "rmmod mxser" to remove it. However, it's - better to have a boot time configuration to eliminate manual - operation. - Boot time configuration can be achieved by rc file. Run following - command for setting rc files. + Run following command for setting rc files. # cd /moxa/mxser/driver # cp ./rc.mxser /etc/rc.d # cd /etc/rc.d - You may have to modify part of the content in rc.mxser to specify - parameters for ISA board. Please refer to rc.mxser for more detail. - Find "rc.serial". If "rc.serial" doesn't exist, create it by vi. - Add "rc.mxser" in last line. Next, open rc.local by vi - and append following content. + Check "rc.serial" is existed or not. If "rc.serial" doesn't exist, + create it by vi, run "chmod 755 rc.serial" to change the permission. + Add "/etc/rc.d/rc.mxser" in last line, - if [ -f /etc/rc.d/rc.serial ]; then - sh /etc/rc.d/rc.serial - fi + Reboot and check if moxa.o activated by "lsmod" command. - 4. Reboot and check if mxser.o activated by "lsmod" command. - 5. If you'd like to drive Smartio ISA boards in the system, you'll - have to add parameter to specify CAP address of given board while - activating "mxser.o". The format for parameters are as follows. + 3.4.5. If you'd like to drive Smartio/Industio ISA boards in the system, + you'll have to add parameter to specify CAP address of given + board while activating "mxser.o". The format for parameters are + as follows. - insmod mxser ioaddr=0x???,0x???,0x???,0x??? + modprobe mxser ioaddr=0x???,0x???,0x???,0x??? | | | | | | | +- 4th ISA board | | +------ 3rd ISA board | +------------ 2nd ISA board +------------------- 1st ISA board - 3.4 Static driver configuration + 3.5 Static driver configuration for Linux kernel 2.4.x and 2.6.x + + Note: To use static driver, you must install the linux kernel + source package. + + 3.5.1 Backup the built-in driver in the kernel. + # cd /usr/src/linux/drivers/char + # mv mxser.c mxser.c.old + + For Red Hat 7.x user, you need to create link: + # cd /usr/src + # ln -s linux-2.4 linux - 1. Create link + 3.5.2 Create link # cd /usr/src/linux/drivers/char # ln -s /moxa/mxser/driver/mxser.c mxser.c - 2. Add CAP address list for ISA boards + 3.5.3 Add CAP address list for ISA boards. For PCI boards user, + please skip this step. + In module mode, the CAP address for ISA board is given by parameter. In static driver configuration, you'll have to assign it within driver's source code. If you will not @@ -222,73 +337,55 @@ Content static int mxserBoardCAP[] = {0x280, 0x180, 0x00, 0x00}; - 3. Modify tty_io.c - # cd /usr/src/linux/drivers/char/ - # vi tty_io.c - Find pty_init(), insert "mxser_init()" as + 3.5.4 Setup kernel configuration - pty_init(); - mxser_init(); + Configure the kernel: - 4. Modify tty.h - # cd /usr/src/linux/include/linux - # vi tty.h - Find extern int tty_init(void), insert "mxser_init()" as + # cd /usr/src/linux + # make menuconfig - extern int tty_init(void); - extern int mxser_init(void); - - 5. Modify Makefile - # cd /usr/src/linux/drivers/char - # vi Makefile - Find L_OBJS := tty_io.o ...... random.o, add - "mxser.o" at last of this line as - L_OBJS := tty_io.o ....... mxser.o + You will go into a menu-driven system. Please select [Character + devices][Non-standard serial port support], enable the [Moxa + SmartIO support] driver with "[*]" for built-in (not "[M]"), then + select [Exit] to exit this program. - 6. Rebuild kernel - The following are for Linux kernel rebuilding,for your reference only. + 3.5.5 Rebuild kernel + The following are for Linux kernel rebuilding, for your + reference only. For appropriate details, please refer to the Linux document. - If 'lilo' utility is installed, please use 'make zlilo' to rebuild - kernel. If 'lilo' is not installed, please follow the following steps. - a. cd /usr/src/linux - b. make clean /* take a few minutes */ - c. make bzImage /* take probably 10-20 minutes */ - d. Backup original boot kernel. /* optional step */ - e. cp /usr/src/linux/arch/i386/boot/bzImage /boot/vmlinuz + b. make clean /* take a few minutes */ + c. make dep /* take a few minutes */ + d. make bzImage /* take probably 10-20 minutes */ + e. make install /* copy boot image to correct position */ f. Please make sure the boot kernel (vmlinuz) is in the - correct position. If you use 'lilo' utility, you should - check /etc/lilo.conf 'image' item specified the path - which is the 'vmlinuz' path, or you will load wrong - (or old) boot kernel image (vmlinuz). - g. chmod 400 /vmlinuz - h. lilo - i. rdev -R /vmlinuz 1 - j. sync - - Note that if the result of "make zImage" is ERROR, then you have to - go back to Linux configuration Setup. Type "make config" in directory - /usr/src/linux or "setup". - - Since system include file, /usr/src/linux/include/linux/interrupt.h, - is modified each time the MOXA driver is installed, kernel rebuilding - is inevitable. And it takes about 10 to 20 minutes depends on the - machine. - - 7. Make utility - # cd /moxa/mxser/utility - # make install - - 8. Make special file + correct position. + g. If you use 'lilo' utility, you should check /etc/lilo.conf + 'image' item specified the path which is the 'vmlinuz' path, + or you will load wrong (or old) boot kernel image (vmlinuz). + After checking /etc/lilo.conf, please run "lilo". + + Note that if the result of "make bzImage" is ERROR, then you have to + go back to Linux configuration Setup. Type "make menuconfig" in + directory /usr/src/linux. + + + 3.5.6 Make tty device and special file # cd /moxa/mxser/driver # ./msmknod - 9. Reboot + 3.5.7 Make utility + # cd /moxa/mxser/utility + # make clean; make install + + 3.5.8 Reboot - 3.5 Custom configuration + + + 3.6 Custom configuration Although this driver already provides you default configuration, you - still can change the device name and major number.The instruction to + still can change the device name and major number. The instruction to change these parameters are shown as below. Change Device name @@ -306,33 +403,37 @@ Content 2 free major numbers for this driver. There are 3 steps to change major numbers. - 1. Find free major numbers + 3.6.1 Find free major numbers In /proc/devices, you may find all the major numbers occupied in the system. Please select 2 major numbers that are available. e.g. 40, 45. - 2. Create special files + 3.6.2 Create special files Run /moxa/mxser/driver/msmknod to create special files with specified major numbers. - 3. Modify driver with new major number + 3.6.3 Modify driver with new major number Run vi to open /moxa/mxser/driver/mxser.c. Locate the line contains "MXSERMAJOR". Change the content as below. #define MXSERMAJOR 40 #define MXSERCUMAJOR 45 - 4. Run # make install in /moxa/mxser/driver. + 3.6.4 Run "make clean; make install" in /moxa/mxser/driver. - 3.6 Verify driver installation + 3.7 Verify driver installation You may refer to /var/log/messages to check the latest status log reported by this driver whenever it's activated. + ----------------------------------------------------------------------------- 4. Utilities There are 3 utilities contained in this driver. They are msdiag, msmon and msterm. These 3 utilities are released in form of source code. They should be compiled into executable file and copied into /usr/bin. + Before using these utilities, please load driver (refer 3.4 & 3.5) and + make sure you had run the "msmknod" utility. + msdiag - Diagnostic -------------------- - This utility provides the function to detect what Moxa Smartio multiport - board exists in the system. + This utility provides the function to display what Moxa Smartio/Industio + board found by driver in the system. msmon - Port Monitoring ----------------------- @@ -353,12 +454,13 @@ Content application, for example, sending AT command to a modem connected to the port or used as a terminal for login purpose. Note that this is only a dumb terminal emulation without handling full screen operation. + ----------------------------------------------------------------------------- 5. Setserial Supported Setserial parameters are listed as below. - uart set UART type(16450-->disable FIFO, 16550A-->enable FIFO) + uart set UART type(16450-->disable FIFO, 16550A-->enable FIFO) close_delay set the amount of time(in 1/100 of a second) that DTR should be kept low while being closed. closing_wait set the amount of time(in 1/100 of a second) that the @@ -366,7 +468,13 @@ Content being closed, before the receiver is disable. spd_hi Use 57.6kb when the application requests 38.4kb. spd_vhi Use 115.2kb when the application requests 38.4kb. + spd_shi Use 230.4kb when the application requests 38.4kb. + spd_warp Use 460.8kb when the application requests 38.4kb. spd_normal Use 38.4kb when the application requests 38.4kb. + spd_cust Use the custom divisor to set the speed when the + application requests 38.4kb. + divisor This option set the custom divison. + baud_base This option set the base baud rate. ----------------------------------------------------------------------------- 6. Troubleshooting @@ -375,8 +483,9 @@ Content possible. If all the possible solutions fail, please contact our technical support team to get more help. - Error msg: More than 4 Moxa Smartio family boards found. Fifth board and - after are ignored. + + Error msg: More than 4 Moxa Smartio/Industio family boards found. Fifth board + and after are ignored. Solution: To avoid this problem, please unplug fifth and after board, because Moxa driver supports up to 4 boards. @@ -384,7 +493,7 @@ Content Error msg: Request_irq fail, IRQ(?) may be conflict with another device. Solution: Other PCI or ISA devices occupy the assigned IRQ. If you are not sure - which device causes the situation,please check /proc/interrupts to find + which device causes the situation, please check /proc/interrupts to find free IRQ and simply change another free IRQ for Moxa board. Error msg: Board #: C1xx Series(CAP=xxx) interrupt number invalid. @@ -397,15 +506,18 @@ Content Moxa ISA board needs an interrupt vector.Please refer to user's manual "Hardware Installation" chapter to set interrupt vector. - Error msg: Couldn't install MOXA Smartio family driver! + Error msg: Couldn't install MOXA Smartio/Industio family driver! Solution: Load Moxa driver fail, the major number may conflict with other devices. - Please refer to previous section 3.5 to change a free major number for + Please refer to previous section 3.7 to change a free major number for Moxa driver. - Error msg: Couldn't install MOXA Smartio family callout driver! + Error msg: Couldn't install MOXA Smartio/Industio family callout driver! Solution: Load Moxa callout driver fail, the callout device major number may - conflict with other devices. Please refer to previous section 3.5 to + conflict with other devices. Please refer to previous section 3.7 to change a free callout device major number for Moxa driver. + + ----------------------------------------------------------------------------- + diff --git a/Documentation/networking/bonding.txt b/Documentation/networking/bonding.txt index a0cda062bc33b6e1de3dd2bb60d5ff62bdf97cd4..688dfe1e6b70f75a36d84f30dda2234c53664be0 100644 --- a/Documentation/networking/bonding.txt +++ b/Documentation/networking/bonding.txt @@ -289,35 +289,73 @@ downdelay fail_over_mac Specifies whether active-backup mode should set all slaves to - the same MAC address (the traditional behavior), or, when - enabled, change the bond's MAC address when changing the - active interface (i.e., fail over the MAC address itself). - - Fail over MAC is useful for devices that cannot ever alter - their MAC address, or for devices that refuse incoming - broadcasts with their own source MAC (which interferes with - the ARP monitor). - - The down side of fail over MAC is that every device on the - network must be updated via gratuitous ARP, vs. just updating - a switch or set of switches (which often takes place for any - traffic, not just ARP traffic, if the switch snoops incoming - traffic to update its tables) for the traditional method. If - the gratuitous ARP is lost, communication may be disrupted. - - When fail over MAC is used in conjuction with the mii monitor, - devices which assert link up prior to being able to actually - transmit and receive are particularly susecptible to loss of - the gratuitous ARP, and an appropriate updelay setting may be - required. - - A value of 0 disables fail over MAC, and is the default. A - value of 1 enables fail over MAC. This option is enabled - automatically if the first slave added cannot change its MAC - address. This option may be modified via sysfs only when no - slaves are present in the bond. - - This option was added in bonding version 3.2.0. + the same MAC address at enslavement (the traditional + behavior), or, when enabled, perform special handling of the + bond's MAC address in accordance with the selected policy. + + Possible values are: + + none or 0 + + This setting disables fail_over_mac, and causes + bonding to set all slaves of an active-backup bond to + the same MAC address at enslavement time. This is the + default. + + active or 1 + + The "active" fail_over_mac policy indicates that the + MAC address of the bond should always be the MAC + address of the currently active slave. The MAC + address of the slaves is not changed; instead, the MAC + address of the bond changes during a failover. + + This policy is useful for devices that cannot ever + alter their MAC address, or for devices that refuse + incoming broadcasts with their own source MAC (which + interferes with the ARP monitor). + + The down side of this policy is that every device on + the network must be updated via gratuitous ARP, + vs. just updating a switch or set of switches (which + often takes place for any traffic, not just ARP + traffic, if the switch snoops incoming traffic to + update its tables) for the traditional method. If the + gratuitous ARP is lost, communication may be + disrupted. + + When this policy is used in conjuction with the mii + monitor, devices which assert link up prior to being + able to actually transmit and receive are particularly + susecptible to loss of the gratuitous ARP, and an + appropriate updelay setting may be required. + + follow or 2 + + The "follow" fail_over_mac policy causes the MAC + address of the bond to be selected normally (normally + the MAC address of the first slave added to the bond). + However, the second and subsequent slaves are not set + to this MAC address while they are in a backup role; a + slave is programmed with the bond's MAC address at + failover time (and the formerly active slave receives + the newly active slave's MAC address). + + This policy is useful for multiport devices that + either become confused or incur a performance penalty + when multiple ports are programmed with the same MAC + address. + + + The default policy is none, unless the first slave cannot + change its MAC address, in which case the active policy is + selected by default. + + This option may be modified via sysfs only when no slaves are + present in the bond. + + This option was added in bonding version 3.2.0. The "follow" + policy was added in bonding version 3.3.0. lacp_rate @@ -338,7 +376,8 @@ max_bonds Specifies the number of bonding devices to create for this instance of the bonding driver. E.g., if max_bonds is 3, and the bonding driver is not already loaded, then bond0, bond1 - and bond2 will be created. The default value is 1. + and bond2 will be created. The default value is 1. Specifying + a value of 0 will load bonding, but will not create any devices. miimon @@ -501,6 +540,17 @@ mode swapped with the new curr_active_slave that was chosen. +num_grat_arp + + Specifies the number of gratuitous ARPs to be issued after a + failover event. One gratuitous ARP is issued immediately after + the failover, subsequent ARPs are sent at a rate of one per link + monitor interval (arp_interval or miimon, whichever is active). + + The valid range is 0 - 255; the default value is 1. This option + affects only the active-backup mode. This option was added for + bonding version 3.3.0. + primary A string (eth0, eth2, etc) specifying which slave is the @@ -581,7 +631,7 @@ xmit_hash_policy in environments where a layer3 gateway device is required to reach most destinations. - This algorithm is 802.3ad complient. + This algorithm is 802.3ad compliant. layer3+4 diff --git a/Documentation/networking/can.txt b/Documentation/networking/can.txt index 641d2afacffa33094a5ee7a52e6646ec7c089220..297ba7b1ccaf953ff85e486baa0a7547450db31c 100644 --- a/Documentation/networking/can.txt +++ b/Documentation/networking/can.txt @@ -186,7 +186,7 @@ solution for a couple of reasons: The Linux network devices (by default) just can handle the transmission and reception of media dependent frames. Due to the - arbritration on the CAN bus the transmission of a low prio CAN-ID + arbitration on the CAN bus the transmission of a low prio CAN-ID may be delayed by the reception of a high prio CAN frame. To reflect the correct* traffic on the node the loopback of the sent data has to be performed right after a successful transmission. If @@ -481,7 +481,7 @@ solution for a couple of reasons: - stats_timer: To calculate the Socket CAN core statistics (e.g. current/maximum frames per second) this 1 second timer is invoked at can.ko module start time by default. This timer can be - disabled by using stattimer=0 on the module comandline. + disabled by using stattimer=0 on the module commandline. - debug: (removed since SocketCAN SVN r546) diff --git a/Documentation/networking/dm9000.txt b/Documentation/networking/dm9000.txt new file mode 100644 index 0000000000000000000000000000000000000000..65df3dea55613bd581dd787305054b7062657507 --- /dev/null +++ b/Documentation/networking/dm9000.txt @@ -0,0 +1,167 @@ +DM9000 Network driver +===================== + +Copyright 2008 Simtec Electronics, + Ben Dooks + + +Introduction +------------ + +This file describes how to use the DM9000 platform-device based network driver +that is contained in the files drivers/net/dm9000.c and drivers/net/dm9000.h. + +The driver supports three DM9000 variants, the DM9000E which is the first chip +supported as well as the newer DM9000A and DM9000B devices. It is currently +maintained and tested by Ben Dooks, who should be CC: to any patches for this +driver. + + +Defining the platform device +---------------------------- + +The minimum set of resources attached to the platform device are as follows: + + 1) The physical address of the address register + 2) The physical address of the data register + 3) The IRQ line the device's interrupt pin is connected to. + +These resources should be specified in that order, as the ordering of the +two address regions is important (the driver expects these to be address +and then data). + +An example from arch/arm/mach-s3c2410/mach-bast.c is: + +static struct resource bast_dm9k_resource[] = { + [0] = { + .start = S3C2410_CS5 + BAST_PA_DM9000, + .end = S3C2410_CS5 + BAST_PA_DM9000 + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = S3C2410_CS5 + BAST_PA_DM9000 + 0x40, + .end = S3C2410_CS5 + BAST_PA_DM9000 + 0x40 + 0x3f, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = IRQ_DM9000, + .end = IRQ_DM9000, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, + } +}; + +static struct platform_device bast_device_dm9k = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(bast_dm9k_resource), + .resource = bast_dm9k_resource, +}; + +Note the setting of the IRQ trigger flag in bast_dm9k_resource[2].flags, +as this will generate a warning if it is not present. The trigger from +the flags field will be passed to request_irq() when registering the IRQ +handler to ensure that the IRQ is setup correctly. + +This shows a typical platform device, without the optional configuration +platform data supplied. The next example uses the same resources, but adds +the optional platform data to pass extra configuration data: + +static struct dm9000_plat_data bast_dm9k_platdata = { + .flags = DM9000_PLATF_16BITONLY, +}; + +static struct platform_device bast_device_dm9k = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(bast_dm9k_resource), + .resource = bast_dm9k_resource, + .dev = { + .platform_data = &bast_dm9k_platdata, + } +}; + +The platform data is defined in include/linux/dm9000.h and described below. + + +Platform data +------------- + +Extra platform data for the DM9000 can describe the IO bus width to the +device, whether or not an external PHY is attached to the device and +the availability of an external configuration EEPROM. + +The flags for the platform data .flags field are as follows: + +DM9000_PLATF_8BITONLY + + The IO should be done with 8bit operations. + +DM9000_PLATF_16BITONLY + + The IO should be done with 16bit operations. + +DM9000_PLATF_32BITONLY + + The IO should be done with 32bit operations. + +DM9000_PLATF_EXT_PHY + + The chip is connected to an external PHY. + +DM9000_PLATF_NO_EEPROM + + This can be used to signify that the board does not have an + EEPROM, or that the EEPROM should be hidden from the user. + +DM9000_PLATF_SIMPLE_PHY + + Switch to using the simpler PHY polling method which does not + try and read the MII PHY state regularly. This is only available + when using the internal PHY. See the section on link state polling + for more information. + + The config symbol DM9000_FORCE_SIMPLE_PHY_POLL, Kconfig entry + "Force simple NSR based PHY polling" allows this flag to be + forced on at build time. + + +PHY Link state polling +---------------------- + +The driver keeps track of the link state and informs the network core +about link (carrier) availablilty. This is managed by several methods +depending on the version of the chip and on which PHY is being used. + +For the internal PHY, the original (and currently default) method is +to read the MII state, either when the status changes if we have the +necessary interrupt support in the chip or every two seconds via a +periodic timer. + +To reduce the overhead for the internal PHY, there is now the option +of using the DM9000_FORCE_SIMPLE_PHY_POLL config, or DM9000_PLATF_SIMPLE_PHY +platform data option to read the summary information without the +expensive MII accesses. This method is faster, but does not print +as much information. + +When using an external PHY, the driver currently has to poll the MII +link status as there is no method for getting an interrupt on link change. + + +DM9000A / DM9000B +----------------- + +These chips are functionally similar to the DM9000E and are supported easily +by the same driver. The features are: + + 1) Interrupt on internal PHY state change. This means that the periodic + polling of the PHY status may be disabled on these devices when using + the internal PHY. + + 2) TCP/UDP checksum offloading, which the driver does not currently support. + + +ethtool +------- + +The driver supports the ethtool interface for access to the driver +state information, the PHY state and the EEPROM. diff --git a/Documentation/networking/e1000.txt b/Documentation/networking/e1000.txt index 61b171cf5313c9b94c3e4fe185a9ff9edf9b5cbc..2df71861e578b6ebcb2b94371d4a32fbdf7fca61 100644 --- a/Documentation/networking/e1000.txt +++ b/Documentation/networking/e1000.txt @@ -513,21 +513,11 @@ Additional Configurations Intel(R) PRO/1000 PT Dual Port Server Connection Intel(R) PRO/1000 PT Dual Port Server Adapter Intel(R) PRO/1000 PF Dual Port Server Adapter - Intel(R) PRO/1000 PT Quad Port Server Adapter + Intel(R) PRO/1000 PT Quad Port Server Adapter NAPI ---- - NAPI (Rx polling mode) is supported in the e1000 driver. NAPI is enabled - or disabled based on the configuration of the kernel. To override - the default, use the following compile-time flags. - - To enable NAPI, compile the driver module, passing in a configuration option: - - make CFLAGS_EXTRA=-DE1000_NAPI install - - To disable NAPI, compile the driver module, passing in a configuration option: - - make CFLAGS_EXTRA=-DE1000_NO_NAPI install + NAPI (Rx polling mode) is enabled in the e1000 driver. See www.cyberus.ca/~hadi/usenix-paper.tgz for more information on NAPI. diff --git a/Documentation/networking/ip-sysctl.txt b/Documentation/networking/ip-sysctl.txt index 946b66e1b65214f4becc5d2563f73180fe331837..d84932650fd3e926cc11d5fa0bcaee6cc8a8cd33 100644 --- a/Documentation/networking/ip-sysctl.txt +++ b/Documentation/networking/ip-sysctl.txt @@ -551,8 +551,9 @@ icmp_echo_ignore_broadcasts - BOOLEAN icmp_ratelimit - INTEGER Limit the maximal rates for sending ICMP packets whose type matches icmp_ratemask (see below) to specific targets. - 0 to disable any limiting, otherwise the maximal rate in jiffies(1) - Default: 100 + 0 to disable any limiting, + otherwise the minimal space between responses in milliseconds. + Default: 1000 icmp_ratemask - INTEGER Mask made of ICMP types for which rates are being limited. @@ -1023,11 +1024,23 @@ max_addresses - INTEGER autoconfigured addresses. Default: 16 +disable_ipv6 - BOOLEAN + Disable IPv6 operation. + Default: FALSE (enable IPv6 operation) + +accept_dad - INTEGER + Whether to accept DAD (Duplicate Address Detection). + 0: Disable DAD + 1: Enable DAD (default) + 2: Enable DAD, and disable IPv6 operation if MAC-based duplicate + link-local address has been found. + icmp/*: ratelimit - INTEGER Limit the maximal rates for sending ICMPv6 packets. - 0 to disable any limiting, otherwise the maximal rate in jiffies(1) - Default: 100 + 0 to disable any limiting, + otherwise the minimal space between responses in milliseconds. + Default: 1000 IPv6 Update by: diff --git a/Documentation/networking/ixgb.txt b/Documentation/networking/ixgb.txt index 7c98277777ebcc14ee7c30991873cc6c92296d28..a0d0ffb5e584c1ae1b24a49552bfaef4c3b4684a 100644 --- a/Documentation/networking/ixgb.txt +++ b/Documentation/networking/ixgb.txt @@ -1,7 +1,7 @@ -Linux* Base Driver for the Intel(R) PRO/10GbE Family of Adapters -================================================================ +Linux Base Driver for 10 Gigabit Intel(R) Network Connection +============================================================= -November 17, 2004 +October 9, 2007 Contents @@ -9,94 +9,151 @@ Contents - In This Release - Identifying Your Adapter +- Building and Installation - Command Line Parameters - Improving Performance +- Additional Configurations +- Known Issues/Troubleshooting - Support + In This Release =============== -This file describes the Linux* Base Driver for the Intel(R) PRO/10GbE Family -of Adapters, version 1.0.x. +This file describes the ixgb Linux Base Driver for the 10 Gigabit Intel(R) +Network Connection. This driver includes support for Itanium(R)2-based +systems. + +For questions related to hardware requirements, refer to the documentation +supplied with your 10 Gigabit adapter. All hardware requirements listed apply +to use with Linux. + +The following features are available in this kernel: + - Native VLANs + - Channel Bonding (teaming) + - SNMP + +Channel Bonding documentation can be found in the Linux kernel source: +/Documentation/networking/bonding.txt + +The driver information previously displayed in the /proc filesystem is not +supported in this release. Alternatively, you can use ethtool (version 1.6 +or later), lspci, and ifconfig to obtain the same information. + +Instructions on updating ethtool can be found in the section "Additional +Configurations" later in this document. -For questions related to hardware requirements, refer to the documentation -supplied with your Intel PRO/10GbE adapter. All hardware requirements listed -apply to use with Linux. Identifying Your Adapter ======================== -To verify your Intel adapter is supported, find the board ID number on the -adapter. Look for a label that has a barcode and a number in the format -A12345-001. +The following Intel network adapters are compatible with the drivers in this +release: + +Controller Adapter Name Physical Layer +---------- ------------ -------------- +82597EX Intel(R) PRO/10GbE LR/SR/CX4 10G Base-LR (1310 nm optical fiber) + Server Adapters 10G Base-SR (850 nm optical fiber) + 10G Base-CX4(twin-axial copper cabling) + +For more information on how to identify your adapter, go to the Adapter & +Driver ID Guide at: + + http://support.intel.com/support/network/sb/CS-012904.htm + + +Building and Installation +========================= + +select m for "Intel(R) PRO/10GbE support" located at: + Location: + -> Device Drivers + -> Network device support (NETDEVICES [=y]) + -> Ethernet (10000 Mbit) (NETDEV_10000 [=y]) +1. make modules && make modules_install + +2. Load the module: + +    modprobe ixgb = + + The insmod command can be used if the full + path to the driver module is specified. For example: + + insmod /lib/modules//kernel/drivers/net/ixgb/ixgb.ko + + With 2.6 based kernels also make sure that older ixgb drivers are + removed from the kernel, before loading the new module: -Use the above information and the Adapter & Driver ID Guide at: + rmmod ixgb; modprobe ixgb - http://support.intel.com/support/network/adapter/pro100/21397.htm +3. Assign an IP address to the interface by entering the following, where + x is the interface number: -For the latest Intel network drivers for Linux, go to: + ifconfig ethx + +4. Verify that the interface works. Enter the following, where + is the IP address for another machine on the same subnet as the interface + that is being tested: + + ping - http://downloadfinder.intel.com/scripts-df/support_intel.asp Command Line Parameters ======================= -If the driver is built as a module, the following optional parameters are -used by entering them on the command line with the modprobe or insmod command -using this syntax: +If the driver is built as a module, the following optional parameters are +used by entering them on the command line with the modprobe command using +this syntax: modprobe ixgb [ where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - phy-handle : The phandle for the PHY connected to this ethernet - controller. - - fixed-link : where a is emulated phy id - choose any, - but unique to the all specified fixed-links, b is duplex - 0 half, - 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no - pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause. - - Recommended properties: - - - phy-connection-type : a string naming the controller/PHY interface type, - i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii", - "tbi", or "rtbi". This property is only really needed if the connection - is of type "rgmii-id", as all other connection types are detected by - hardware. - - - Example: - - ethernet@24000 { - #size-cells = <0>; - device_type = "network"; - model = "TSEC"; - compatible = "gianfar"; - reg = <24000 1000>; - mac-address = [ 00 E0 0C 00 73 00 ]; - interrupts = ; - interrupt-parent = <40000>; - phy-handle = <2452000> - }; - - - - c) PHY nodes + a) PHY nodes Required properties: @@ -1347,7 +1278,7 @@ platforms are moved over to use the flattened-device-tree model. }; - d) Interrupt controllers + b) Interrupt controllers Some SOC devices contain interrupt controllers that are different from the standard Open PIC specification. The SOC device nodes for @@ -1360,491 +1291,14 @@ platforms are moved over to use the flattened-device-tree model. pic@40000 { linux,phandle = <40000>; - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; reg = <40000 40000>; - built-in; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; - - e) I2C - - Required properties : - - - device_type : Should be "i2c" - - reg : Offset and length of the register set for the device - - Recommended properties : - - - compatible : Should be "fsl-i2c" for parts compatible with - Freescale I2C specifications. - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - dfsrr : boolean; if defined, indicates that this I2C device has - a digital filter sampling rate register - - fsl5200-clocking : boolean; if defined, indicated that this device - uses the FSL 5200 clocking mechanism. - - Example : - - i2c@3000 { - interrupt-parent = <40000>; - interrupts = <1b 3>; - reg = <3000 18>; - device_type = "i2c"; - compatible = "fsl-i2c"; - dfsrr; - }; - - - f) Freescale SOC USB controllers - - The device node for a USB controller that is part of a Freescale - SOC is as described in the document "Open Firmware Recommended - Practice : Universal Serial Bus" with the following modifications - and additions : - - Required properties : - - compatible : Should be "fsl-usb2-mph" for multi port host USB - controllers, or "fsl-usb2-dr" for dual role USB controllers - - phy_type : For multi port host USB controllers, should be one of - "ulpi", or "serial". For dual role USB controllers, should be - one of "ulpi", "utmi", "utmi_wide", or "serial". - - reg : Offset and length of the register set for the device - - port0 : boolean; if defined, indicates port0 is connected for - fsl-usb2-mph compatible controllers. Either this property or - "port1" (or both) must be defined for "fsl-usb2-mph" compatible - controllers. - - port1 : boolean; if defined, indicates port1 is connected for - fsl-usb2-mph compatible controllers. Either this property or - "port0" (or both) must be defined for "fsl-usb2-mph" compatible - controllers. - - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible - controllers. Can be "host", "peripheral", or "otg". Default to - "host" if not defined for backward compatibility. - - Recommended properties : - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - Example multi port host USB controller device node : - usb@22000 { - compatible = "fsl-usb2-mph"; - reg = <22000 1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <27 1>; - phy_type = "ulpi"; - port0; - port1; - }; - - Example dual role USB controller device node : - usb@23000 { - compatible = "fsl-usb2-dr"; - reg = <23000 1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <700>; - interrupts = <26 1>; - dr_mode = "otg"; - phy = "ulpi"; - }; - - - g) Freescale SOC SEC Security Engines - - Required properties: - - - device_type : Should be "crypto" - - model : Model of the device. Should be "SEC1" or "SEC2" - - compatible : Should be "talitos" - - reg : Offset and length of the register set for the device - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - num-channels : An integer representing the number of channels - available. - - channel-fifo-len : An integer representing the number of - descriptor pointers each channel fetch fifo can hold. - - exec-units-mask : The bitmask representing what execution units - (EUs) are available. It's a single 32-bit cell. EU information - should be encoded following the SEC's Descriptor Header Dword - EU_SEL0 field documentation, i.e. as follows: - - bit 0 = reserved - should be 0 - bit 1 = set if SEC has the ARC4 EU (AFEU) - bit 2 = set if SEC has the DES/3DES EU (DEU) - bit 3 = set if SEC has the message digest EU (MDEU) - bit 4 = set if SEC has the random number generator EU (RNG) - bit 5 = set if SEC has the public key EU (PKEU) - bit 6 = set if SEC has the AES EU (AESU) - bit 7 = set if SEC has the Kasumi EU (KEU) - - bits 8 through 31 are reserved for future SEC EUs. - - - descriptor-types-mask : The bitmask representing what descriptors - are available. It's a single 32-bit cell. Descriptor type - information should be encoded following the SEC's Descriptor - Header Dword DESC_TYPE field documentation, i.e. as follows: - - bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type - bit 1 = set if SEC supports the ipsec_esp descriptor type - bit 2 = set if SEC supports the common_nonsnoop desc. type - bit 3 = set if SEC supports the 802.11i AES ccmp desc. type - bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type - bit 5 = set if SEC supports the srtp descriptor type - bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type - bit 7 = set if SEC supports the pkeu_assemble descriptor type - bit 8 = set if SEC supports the aesu_key_expand_output desc.type - bit 9 = set if SEC supports the pkeu_ptmul descriptor type - bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type - bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type - - ..and so on and so forth. - - Example: - - /* MPC8548E */ - crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <30000 10000>; - interrupts = <1d 3>; - interrupt-parent = <40000>; - num-channels = <4>; - channel-fifo-len = <18>; - exec-units-mask = <000000fe>; - descriptor-types-mask = <012b0ebf>; - }; - - h) Board Control and Status (BCSR) - - Required properties: - - - device_type : Should be "board-control" - - reg : Offset and length of the register set for the device - - Example: - - bcsr@f8000000 { - device_type = "board-control"; - reg = ; - }; - - i) Freescale QUICC Engine module (QE) - This represents qe module that is installed on PowerQUICC II Pro. - - NOTE: This is an interim binding; it should be updated to fit - in with the CPM binding later in this document. - - Basically, it is a bus of devices, that could act more or less - as a complete entity (UCC, USB etc ). All of them should be siblings on - the "root" qe node, using the common properties from there. - The description below applies to the qe of MPC8360 and - more nodes and properties would be extended in the future. - - i) Root QE device - - Required properties: - - compatible : should be "fsl,qe"; - - model : precise model of the QE, Can be "QE", "CPM", or "CPM2" - - reg : offset and length of the device registers. - - bus-frequency : the clock frequency for QUICC Engine. - - Recommended properties - - brg-frequency : the internal clock source frequency for baud-rate - generators in Hz. - - Example: - qe@e0100000 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,qe"; - ranges = <0 e0100000 00100000>; - reg = ; - brg-frequency = <0>; - bus-frequency = <179A7B00>; - } - - - ii) SPI (Serial Peripheral Interface) - - Required properties: - - cell-index : SPI controller index. - - compatible : should be "fsl,spi". - - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". - - reg : Offset and length of the register set for the device - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - Example: - spi@4c0 { - cell-index = <0>; - compatible = "fsl,spi"; - reg = <4c0 40>; - interrupts = <82 0>; - interrupt-parent = <700>; - mode = "cpu"; - }; - - - iii) USB (Universal Serial Bus Controller) - - Required properties: - - compatible : could be "qe_udc" or "fhci-hcd". - - mode : the could be "host" or "slave". - - reg : Offset and length of the register set for the device - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - Example(slave): - usb@6c0 { - compatible = "qe_udc"; - reg = <6c0 40>; - interrupts = <8b 0>; - interrupt-parent = <700>; - mode = "slave"; - }; - - - iv) UCC (Unified Communications Controllers) - - Required properties: - - device_type : should be "network", "hldc", "uart", "transparent" - "bisync", "atm", or "serial". - - compatible : could be "ucc_geth" or "fsl_atm" and so on. - - cell-index : the ucc number(1-8), corresponding to UCCx in UM. - - reg : Offset and length of the register set for the device - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and level - information for the interrupt. This should be encoded based on - the information in section 2) depending on the type of interrupt - controller you have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - pio-handle : The phandle for the Parallel I/O port configuration. - - port-number : for UART drivers, the port number to use, between 0 and 3. - This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0. - The port number is added to the minor number of the device. Unlike the - CPM UART driver, the port-number is required for the QE UART driver. - - soft-uart : for UART drivers, if specified this means the QE UART device - driver should use "Soft-UART" mode, which is needed on some SOCs that have - broken UART hardware. Soft-UART is provided via a microcode upload. - - rx-clock-name: the UCC receive clock source - "none": clock source is disabled - "brg1" through "brg16": clock source is BRG1-BRG16, respectively - "clk1" through "clk24": clock source is CLK1-CLK24, respectively - - tx-clock-name: the UCC transmit clock source - "none": clock source is disabled - "brg1" through "brg16": clock source is BRG1-BRG16, respectively - "clk1" through "clk24": clock source is CLK1-CLK24, respectively - The following two properties are deprecated. rx-clock has been replaced - with rx-clock-name, and tx-clock has been replaced with tx-clock-name. - Drivers that currently use the deprecated properties should continue to - do so, in order to support older device trees, but they should be updated - to check for the new properties first. - - rx-clock : represents the UCC receive clock source. - 0x00 : clock source is disabled; - 0x1~0x10 : clock source is BRG1~BRG16 respectively; - 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. - - tx-clock: represents the UCC transmit clock source; - 0x00 : clock source is disabled; - 0x1~0x10 : clock source is BRG1~BRG16 respectively; - 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. - - Required properties for network device_type: - - mac-address : list of bytes representing the ethernet address. - - phy-handle : The phandle for the PHY connected to this controller. - - Recommended properties: - - phy-connection-type : a string naming the controller/PHY interface type, - i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal - Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only), - "tbi", or "rtbi". - - Example: - ucc@2000 { - device_type = "network"; - compatible = "ucc_geth"; - cell-index = <1>; - reg = <2000 200>; - interrupts = ; - interrupt-parent = <700>; - mac-address = [ 00 04 9f 00 23 23 ]; - rx-clock = "none"; - tx-clock = "clk9"; - phy-handle = <212000>; - phy-connection-type = "gmii"; - pio-handle = <140001>; - }; - - - v) Parallel I/O Ports - - This node configures Parallel I/O ports for CPUs with QE support. - The node should reside in the "soc" node of the tree. For each - device that using parallel I/O ports, a child node should be created. - See the definition of the Pin configuration nodes below for more - information. - - Required properties: - - device_type : should be "par_io". - - reg : offset to the register set and its length. - - num-ports : number of Parallel I/O ports - - Example: - par_io@1400 { - reg = <1400 100>; - #address-cells = <1>; - #size-cells = <0>; - device_type = "par_io"; - num-ports = <7>; - ucc_pin@01 { - ...... - }; - - - vi) Pin configuration nodes - - Required properties: - - linux,phandle : phandle of this node; likely referenced by a QE - device. - - pio-map : array of pin configurations. Each pin is defined by 6 - integers. The six numbers are respectively: port, pin, dir, - open_drain, assignment, has_irq. - - port : port number of the pin; 0-6 represent port A-G in UM. - - pin : pin number in the port. - - dir : direction of the pin, should encode as follows: - - 0 = The pin is disabled - 1 = The pin is an output - 2 = The pin is an input - 3 = The pin is I/O - - - open_drain : indicates the pin is normal or wired-OR: - - 0 = The pin is actively driven as an output - 1 = The pin is an open-drain driver. As an output, the pin is - driven active-low, otherwise it is three-stated. - - - assignment : function number of the pin according to the Pin Assignment - tables in User Manual. Each pin can have up to 4 possible functions in - QE and two options for CPM. - - has_irq : indicates if the pin is used as source of external - interrupts. - - Example: - ucc_pin@01 { - linux,phandle = <140001>; - pio-map = < - /* port pin dir open_drain assignment has_irq */ - 0 3 1 0 1 0 /* TxD0 */ - 0 4 1 0 1 0 /* TxD1 */ - 0 5 1 0 1 0 /* TxD2 */ - 0 6 1 0 1 0 /* TxD3 */ - 1 6 1 0 3 0 /* TxD4 */ - 1 7 1 0 1 0 /* TxD5 */ - 1 9 1 0 2 0 /* TxD6 */ - 1 a 1 0 2 0 /* TxD7 */ - 0 9 2 0 1 0 /* RxD0 */ - 0 a 2 0 1 0 /* RxD1 */ - 0 b 2 0 1 0 /* RxD2 */ - 0 c 2 0 1 0 /* RxD3 */ - 0 d 2 0 1 0 /* RxD4 */ - 1 1 2 0 2 0 /* RxD5 */ - 1 0 2 0 2 0 /* RxD6 */ - 1 4 2 0 2 0 /* RxD7 */ - 0 7 1 0 1 0 /* TX_EN */ - 0 8 1 0 1 0 /* TX_ER */ - 0 f 2 0 1 0 /* RX_DV */ - 0 10 2 0 1 0 /* RX_ER */ - 0 0 2 0 1 0 /* RX_CLK */ - 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ - 2 8 2 0 1 0>; /* GTX125 - CLK9 */ - }; - - vii) Multi-User RAM (MURAM) - - Required properties: - - compatible : should be "fsl,qe-muram", "fsl,cpm-muram". - - mode : the could be "host" or "slave". - - ranges : Should be defined as specified in 1) to describe the - translation of MURAM addresses. - - data-only : sub-node which defines the address area under MURAM - bus that can be allocated as data/parameter - - Example: - - muram@10000 { - compatible = "fsl,qe-muram", "fsl,cpm-muram"; - ranges = <0 00010000 0000c000>; - - data-only@0{ - compatible = "fsl,qe-muram-data", - "fsl,cpm-muram-data"; - reg = <0 c000>; - }; - }; - - viii) Uploaded QE firmware - - If a new firwmare has been uploaded to the QE (usually by the - boot loader), then a 'firmware' child node should be added to the QE - node. This node provides information on the uploaded firmware that - device drivers may need. - - Required properties: - - id: The string name of the firmware. This is taken from the 'id' - member of the qe_firmware structure of the uploaded firmware. - Device drivers can search this string to determine if the - firmware they want is already present. - - extended-modes: The Extended Modes bitfield, taken from the - firmware binary. It is a 64-bit number represented - as an array of two 32-bit numbers. - - virtual-traps: The virtual traps, taken from the firmware binary. - It is an array of 8 32-bit numbers. - - Example: - - firmware { - id = "Soft-UART"; - extended-modes = <0 0>; - virtual-traps = <0 0 0 0 0 0 0 0>; - } - - j) CFI or JEDEC memory-mapped NOR flash + c) CFI or JEDEC memory-mapped NOR flash Flash chips (Memory Technology Devices) are often used for solid state file systems on embedded devices. @@ -1908,268 +1362,7 @@ platforms are moved over to use the flattened-device-tree model. }; }; - k) Global Utilities Block - - The global utilities block controls power management, I/O device - enabling, power-on-reset configuration monitoring, general-purpose - I/O signal configuration, alternate function selection for multiplexed - signals, and clock control. - - Required properties: - - - compatible : Should define the compatible device type for - global-utilities. - - reg : Offset and length of the register set for the device. - - Recommended properties: - - - fsl,has-rstcr : Indicates that the global utilities register set - contains a functioning "reset control register" (i.e. the board - is wired to reset upon setting the HRESET_REQ bit in this register). - - Example: - - global-utilities@e0000 { /* global utilities block */ - compatible = "fsl,mpc8548-guts"; - reg = ; - fsl,has-rstcr; - }; - - l) Freescale Communications Processor Module - - NOTE: This is an interim binding, and will likely change slightly, - as more devices are supported. The QE bindings especially are - incomplete. - - i) Root CPM node - - Properties: - - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". - - reg : A 48-byte region beginning with CPCR. - - Example: - cpm@119c0 { - #address-cells = <1>; - #size-cells = <1>; - #interrupt-cells = <2>; - compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; - reg = <119c0 30>; - } - - ii) Properties common to mulitple CPM/QE devices - - - fsl,cpm-command : This value is ORed with the opcode and command flag - to specify the device on which a CPM command operates. - - - fsl,cpm-brg : Indicates which baud rate generator the device - is associated with. If absent, an unused BRG - should be dynamically allocated. If zero, the - device uses an external clock rather than a BRG. - - - reg : Unless otherwise specified, the first resource represents the - scc/fcc/ucc registers, and the second represents the device's - parameter RAM region (if it has one). - - iii) Serial - - Currently defined compatibles: - - fsl,cpm1-smc-uart - - fsl,cpm2-smc-uart - - fsl,cpm1-scc-uart - - fsl,cpm2-scc-uart - - fsl,qe-uart - - Example: - - serial@11a00 { - device_type = "serial"; - compatible = "fsl,mpc8272-scc-uart", - "fsl,cpm2-scc-uart"; - reg = <11a00 20 8000 100>; - interrupts = <28 8>; - interrupt-parent = <&PIC>; - fsl,cpm-brg = <1>; - fsl,cpm-command = <00800000>; - }; - - iii) Network - - Currently defined compatibles: - - fsl,cpm1-scc-enet - - fsl,cpm2-scc-enet - - fsl,cpm1-fec-enet - - fsl,cpm2-fcc-enet (third resource is GFEMR) - - fsl,qe-enet - - Example: - - ethernet@11300 { - device_type = "network"; - compatible = "fsl,mpc8272-fcc-enet", - "fsl,cpm2-fcc-enet"; - reg = <11300 20 8400 100 11390 1>; - local-mac-address = [ 00 00 00 00 00 00 ]; - interrupts = <20 8>; - interrupt-parent = <&PIC>; - phy-handle = <&PHY0>; - fsl,cpm-command = <12000300>; - }; - - iv) MDIO - - Currently defined compatibles: - fsl,pq1-fec-mdio (reg is same as first resource of FEC device) - fsl,cpm2-mdio-bitbang (reg is port C registers) - - Properties for fsl,cpm2-mdio-bitbang: - fsl,mdio-pin : pin of port C controlling mdio data - fsl,mdc-pin : pin of port C controlling mdio clock - - Example: - - mdio@10d40 { - device_type = "mdio"; - compatible = "fsl,mpc8272ads-mdio-bitbang", - "fsl,mpc8272-mdio-bitbang", - "fsl,cpm2-mdio-bitbang"; - reg = <10d40 14>; - #address-cells = <1>; - #size-cells = <0>; - fsl,mdio-pin = <12>; - fsl,mdc-pin = <13>; - }; - - v) Baud Rate Generators - - Currently defined compatibles: - fsl,cpm-brg - fsl,cpm1-brg - fsl,cpm2-brg - - Properties: - - reg : There may be an arbitrary number of reg resources; BRG - numbers are assigned to these in order. - - clock-frequency : Specifies the base frequency driving - the BRG. - - Example: - - brg@119f0 { - compatible = "fsl,mpc8272-brg", - "fsl,cpm2-brg", - "fsl,cpm-brg"; - reg = <119f0 10 115f0 10>; - clock-frequency = ; - }; - - vi) Interrupt Controllers - - Currently defined compatibles: - - fsl,cpm1-pic - - only one interrupt cell - - fsl,pq1-pic - - fsl,cpm2-pic - - second interrupt cell is level/sense: - - 2 is falling edge - - 8 is active low - - Example: - - interrupt-controller@10c00 { - #interrupt-cells = <2>; - interrupt-controller; - reg = <10c00 80>; - compatible = "mpc8272-pic", "fsl,cpm2-pic"; - }; - - vii) USB (Universal Serial Bus Controller) - - Properties: - - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb" - - Example: - usb@11bc0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,cpm2-usb"; - reg = <11b60 18 8b00 100>; - interrupts = ; - interrupt-parent = <&PIC>; - fsl,cpm-command = <2e600000>; - }; - - viii) Multi-User RAM (MURAM) - - The multi-user/dual-ported RAM is expressed as a bus under the CPM node. - - Ranges must be set up subject to the following restrictions: - - - Children's reg nodes must be offsets from the start of all muram, even - if the user-data area does not begin at zero. - - If multiple range entries are used, the difference between the parent - address and the child address must be the same in all, so that a single - mapping can cover them all while maintaining the ability to determine - CPM-side offsets with pointer subtraction. It is recommended that - multiple range entries not be used. - - A child address of zero must be translatable, even if no reg resources - contain it. - - A child "data" node must exist, compatible with "fsl,cpm-muram-data", to - indicate the portion of muram that is usable by the OS for arbitrary - purposes. The data node may have an arbitrary number of reg resources, - all of which contribute to the allocatable muram pool. - - Example, based on mpc8272: - - muram@0 { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 10000>; - - data@0 { - compatible = "fsl,cpm-muram-data"; - reg = <0 2000 9800 800>; - }; - }; - - m) Chipselect/Local Bus - - Properties: - - name : Should be localbus - - #address-cells : Should be either two or three. The first cell is the - chipselect number, and the remaining cells are the - offset into the chipselect. - - #size-cells : Either one or two, depending on how large each chipselect - can be. - - ranges : Each range corresponds to a single chipselect, and cover - the entire access window as configured. - - Example: - localbus@f0010100 { - compatible = "fsl,mpc8272-localbus", - "fsl,pq2-localbus"; - #address-cells = <2>; - #size-cells = <1>; - reg = ; - - ranges = <0 0 fe000000 02000000 - 1 0 f4500000 00008000>; - - flash@0,0 { - compatible = "jedec-flash"; - reg = <0 0 2000000>; - bank-width = <4>; - device-width = <1>; - }; - - board-control@1,0 { - reg = <1 0 20>; - compatible = "fsl,mpc8272ads-bcsr"; - }; - }; - - - n) 4xx/Axon EMAC ethernet nodes + d) 4xx/Axon EMAC ethernet nodes The EMAC ethernet controller in IBM and AMCC 4xx chips, and also the Axon bridge. To operate this needs to interact with a ths @@ -2317,7 +1510,7 @@ platforms are moved over to use the flattened-device-tree model. available. For Axon: 0x0000012a - o) Xilinx IP cores + e) Xilinx IP cores The Xilinx EDK toolchain ships with a set of IP cores (devices) for use in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range @@ -2584,7 +1777,7 @@ platforms are moved over to use the flattened-device-tree model. Xilinx uartlite devices are simple fixed speed serial ports. - Requred properties: + Required properties: - current-speed : Baud rate of uartlite v) Xilinx hwicap @@ -2606,211 +1799,12 @@ platforms are moved over to use the flattened-device-tree model. Xilinx UART 16550 devices are very similar to the NS16550 but with different register spacing and an offset from the base address. - Requred properties: + Required properties: - clock-frequency : Frequency of the clock input - reg-offset : A value of 3 is required - reg-shift : A value of 2 is required - - p) Freescale Synchronous Serial Interface - - The SSI is a serial device that communicates with audio codecs. It can - be programmed in AC97, I2S, left-justified, or right-justified modes. - - Required properties: - - compatible : compatible list, containing "fsl,ssi" - - cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on - - reg : offset and length of the register set for the device - - interrupts : where a is the interrupt number and b is a - field that represents an encoding of the sense and - level information for the interrupt. This should be - encoded based on the information in section 2) - depending on the type of interrupt controller you - have. - - interrupt-parent : the phandle for the interrupt controller that - services interrupts for this device. - - fsl,mode : the operating mode for the SSI interface - "i2s-slave" - I2S mode, SSI is clock slave - "i2s-master" - I2S mode, SSI is clock master - "lj-slave" - left-justified mode, SSI is clock slave - "lj-master" - l.j. mode, SSI is clock master - "rj-slave" - right-justified mode, SSI is clock slave - "rj-master" - r.j., SSI is clock master - "ac97-slave" - AC97 mode, SSI is clock slave - "ac97-master" - AC97 mode, SSI is clock master - - Optional properties: - - codec-handle : phandle to a 'codec' node that defines an audio - codec connected to this SSI. This node is typically - a child of an I2C or other control node. - - Child 'codec' node required properties: - - compatible : compatible list, contains the name of the codec - - Child 'codec' node optional properties: - - clock-frequency : The frequency of the input clock, which typically - comes from an on-board dedicated oscillator. - - * Freescale 83xx DMA Controller - - Freescale PowerPC 83xx have on chip general purpose DMA controllers. - - Required properties: - - - compatible : compatible list, contains 2 entries, first is - "fsl,CHIP-dma", where CHIP is the processor - (mpc8349, mpc8360, etc.) and the second is - "fsl,elo-dma" - - reg : - - ranges : Should be defined as specified in 1) to describe the - DMA controller channels. - - cell-index : controller index. 0 for controller @ 0x8100 - - interrupts : - - interrupt-parent : optional, if needed for interrupt mapping - - - - DMA channel nodes: - - compatible : compatible list, contains 2 entries, first is - "fsl,CHIP-dma-channel", where CHIP is the processor - (mpc8349, mpc8350, etc.) and the second is - "fsl,elo-dma-channel" - - reg : - - cell-index : dma channel index starts at 0. - - Optional properties: - - interrupts : - (on 83xx this is expected to be identical to - the interrupts property of the parent node) - - interrupt-parent : optional, if needed for interrupt mapping - - Example: - dma@82a8 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; - reg = <82a8 4>; - ranges = <0 8100 1a4>; - interrupt-parent = <&ipic>; - interrupts = <47 8>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <0>; - reg = <0 80>; - }; - dma-channel@80 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <1>; - reg = <80 80>; - }; - dma-channel@100 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <2>; - reg = <100 80>; - }; - dma-channel@180 { - compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; - cell-index = <3>; - reg = <180 80>; - }; - }; - - * Freescale 85xx/86xx DMA Controller - - Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. - - Required properties: - - - compatible : compatible list, contains 2 entries, first is - "fsl,CHIP-dma", where CHIP is the processor - (mpc8540, mpc8540, etc.) and the second is - "fsl,eloplus-dma" - - reg : - - cell-index : controller index. 0 for controller @ 0x21000, - 1 for controller @ 0xc000 - - ranges : Should be defined as specified in 1) to describe the - DMA controller channels. - - - DMA channel nodes: - - compatible : compatible list, contains 2 entries, first is - "fsl,CHIP-dma-channel", where CHIP is the processor - (mpc8540, mpc8560, etc.) and the second is - "fsl,eloplus-dma-channel" - - cell-index : dma channel index starts at 0. - - reg : - - interrupts : - - interrupt-parent : optional, if needed for interrupt mapping - - Example: - dma@21300 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; - reg = <21300 4>; - ranges = <0 21100 200>; - cell-index = <0>; - dma-channel@0 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <0 80>; - cell-index = <0>; - interrupt-parent = <&mpic>; - interrupts = <14 2>; - }; - dma-channel@80 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <80 80>; - cell-index = <1>; - interrupt-parent = <&mpic>; - interrupts = <15 2>; - }; - dma-channel@100 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <100 80>; - cell-index = <2>; - interrupt-parent = <&mpic>; - interrupts = <16 2>; - }; - dma-channel@180 { - compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; - reg = <180 80>; - cell-index = <3>; - interrupt-parent = <&mpic>; - interrupts = <17 2>; - }; - }; - - * Freescale 8xxx/3.0 Gb/s SATA nodes - - SATA nodes are defined to describe on-chip Serial ATA controllers. - Each SATA port should have its own node. - - Required properties: - - compatible : compatible list, contains 2 entries, first is - "fsl,CHIP-sata", where CHIP is the processor - (mpc8315, mpc8379, etc.) and the second is - "fsl,pq-sata" - - interrupts : - - cell-index : controller index. - 1 for controller @ 0x18000 - 2 for controller @ 0x19000 - 3 for controller @ 0x1a000 - 4 for controller @ 0x1b000 - - Optional properties: - - interrupt-parent : optional, if needed for interrupt mapping - - reg : - - Example: - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - cell-index = <1>; - interrupts = <2c 8>; - interrupt-parent = < &ipic >; - }; - - q) USB EHCI controllers + f) USB EHCI controllers Required properties: - compatible : should be "usb-ehci". @@ -2870,6 +1864,82 @@ platforms are moved over to use the flattened-device-tree model. reg = <0xe8000000 32>; }; + r) MDIO on GPIOs + + Currently defined compatibles: + - virtual,gpio-mdio + + MDC and MDIO lines connected to GPIO controllers are listed in the + gpios property as described in section VIII.1 in the following order: + + MDC, MDIO. + + Example: + + mdio { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&qe_pio_a 11 + &qe_pio_c 6>; + }; + + s) SPI (Serial Peripheral Interface) busses + + SPI busses can be described with a node for the SPI master device + and a set of child nodes for each SPI slave on the bus. For this + discussion, it is assumed that the system's SPI controller is in + SPI master mode. This binding does not describe SPI controllers + in slave mode. + + The SPI master node requires the following properties: + - #address-cells - number of cells required to define a chip select + address on the SPI bus. + - #size-cells - should be zero. + - compatible - name of SPI bus controller following generic names + recommended practice. + No other properties are required in the SPI bus node. It is assumed + that a driver for an SPI bus device will understand that it is an SPI bus. + However, the binding does not attempt to define the specific method for + assigning chip select numbers. Since SPI chip select configuration is + flexible and non-standardized, it is left out of this binding with the + assumption that board specific platform code will be used to manage + chip selects. Individual drivers can define additional properties to + support describing the chip select layout. + + SPI slave nodes must be children of the SPI master node and can + contain the following properties. + - reg - (required) chip select address of device. + - compatible - (required) name of SPI device following generic names + recommended practice + - spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz + - spi-cpol - (optional) Empty property indicating device requires + inverse clock polarity (CPOL) mode + - spi-cpha - (optional) Empty property indicating device requires + shifted clock phase (CPHA) mode + + SPI example for an MPC5200 SPI bus: + spi@f00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; + reg = <0xf00 0x20>; + interrupts = <2 13 0 2 14 0>; + interrupt-parent = <&mpc5200_pic>; + + ethernet-switch@0 { + compatible = "micrel,ks8995m"; + spi-max-frequency = <1000000>; + reg = <0>; + }; + + codec@1 { + compatible = "ti,tlv320aic26"; + spi-max-frequency = <100000>; + reg = <1>; + }; + }; + VII - Marvell Discovery mv64[345]6x System Controller chips =========================================================== @@ -2883,7 +1953,7 @@ prefixed with the string "marvell,", for Marvell Technology Group Ltd. 1) The /system-controller node This node is used to represent the system-controller and must be - present when the system uses a system contller chip. The top-level + present when the system uses a system controller chip. The top-level system-controller node contains information that is global to all devices within the system controller chip. The node name begins with "system-controller" followed by the unit address, which is @@ -3477,8 +2547,8 @@ encodings listed below: 2 = high to low edge sensitive type enabled 3 = low to high edge sensitive type enabled -VIII - Specifying GPIO information for devices -============================================== +IX - Specifying GPIO information for devices +============================================ 1) gpios property ----------------- @@ -3526,119 +2596,151 @@ Example of two SOC GPIO banks defined as gpio-controller nodes: gpio-controller; }; +X - Specifying Device Power Management Information (sleep property) +=================================================================== + +Devices on SOCs often have mechanisms for placing devices into low-power +states that are decoupled from the devices' own register blocks. Sometimes, +this information is more complicated than a cell-index property can +reasonably describe. Thus, each device controlled in such a manner +may contain a "sleep" property which describes these connections. + +The sleep property consists of one or more sleep resources, each of +which consists of a phandle to a sleep controller, followed by a +controller-specific sleep specifier of zero or more cells. + +The semantics of what type of low power modes are possible are defined +by the sleep controller. Some examples of the types of low power modes +that may be supported are: + + - Dynamic: The device may be disabled or enabled at any time. + - System Suspend: The device may request to be disabled or remain + awake during system suspend, but will not be disabled until then. + - Permanent: The device is disabled permanently (until the next hard + reset). + +Some devices may share a clock domain with each other, such that they should +only be suspended when none of the devices are in use. Where reasonable, +such nodes should be placed on a virtual bus, where the bus has the sleep +property. If the clock domain is shared among devices that cannot be +reasonably grouped in this manner, then create a virtual sleep controller +(similar to an interrupt nexus, except that defining a standardized +sleep-map should wait until its necessity is demonstrated). + Appendix A - Sample SOC node for MPC8540 ======================================== -Note that the #address-cells and #size-cells for the SoC node -in this example have been explicitly listed; these are likely -not necessary as they are usually the same as the root node. - - soc8540@e0000000 { + soc@e0000000 { #address-cells = <1>; #size-cells = <1>; - #interrupt-cells = <2>; + compatible = "fsl,mpc8540-ccsr", "simple-bus"; device_type = "soc"; - ranges = <00000000 e0000000 00100000> - reg = ; + ranges = <0x00000000 0xe0000000 0x00100000> bus-frequency = <0>; - - mdio@24520 { - reg = <24520 20>; - device_type = "mdio"; - compatible = "gianfar"; - - ethernet-phy@0 { - linux,phandle = <2452000> - interrupt-parent = <40000>; - interrupts = <35 1>; - reg = <0>; - device_type = "ethernet-phy"; - }; - - ethernet-phy@1 { - linux,phandle = <2452001> - interrupt-parent = <40000>; - interrupts = <35 1>; - reg = <1>; - device_type = "ethernet-phy"; - }; - - ethernet-phy@3 { - linux,phandle = <2452002> - interrupt-parent = <40000>; - interrupts = <35 1>; - reg = <3>; - device_type = "ethernet-phy"; - }; - - }; + interrupt-parent = <&pic>; ethernet@24000 { - #size-cells = <0>; + #address-cells = <1>; + #size-cells = <1>; device_type = "network"; model = "TSEC"; - compatible = "gianfar"; - reg = <24000 1000>; - mac-address = [ 00 E0 0C 00 73 00 ]; - interrupts = ; - interrupt-parent = <40000>; - phy-handle = <2452000>; + compatible = "gianfar", "simple-bus"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 E0 0C 00 73 00 ]; + interrupts = <29 2 30 2 34 2>; + phy-handle = <&phy0>; + sleep = <&pmc 00000080>; + ranges; + + mdio@24520 { + reg = <0x24520 0x20>; + compatible = "fsl,gianfar-mdio"; + + phy0: ethernet-phy@0 { + interrupts = <5 1>; + reg = <0>; + device_type = "ethernet-phy"; + }; + + phy1: ethernet-phy@1 { + interrupts = <5 1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + + phy3: ethernet-phy@3 { + interrupts = <7 1>; + reg = <3>; + device_type = "ethernet-phy"; + }; + }; }; ethernet@25000 { - #address-cells = <1>; - #size-cells = <0>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; - reg = <25000 1000>; - mac-address = [ 00 E0 0C 00 73 01 ]; - interrupts = <13 3 14 3 18 3>; - interrupt-parent = <40000>; - phy-handle = <2452001>; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 E0 0C 00 73 01 ]; + interrupts = <13 2 14 2 18 2>; + phy-handle = <&phy1>; + sleep = <&pmc 00000040>; }; ethernet@26000 { - #address-cells = <1>; - #size-cells = <0>; device_type = "network"; model = "FEC"; compatible = "gianfar"; - reg = <26000 1000>; - mac-address = [ 00 E0 0C 00 73 02 ]; - interrupts = <19 3>; - interrupt-parent = <40000>; - phy-handle = <2452002>; + reg = <0x26000 0x1000>; + local-mac-address = [ 00 E0 0C 00 73 02 ]; + interrupts = <41 2>; + phy-handle = <&phy3>; + sleep = <&pmc 00000020>; }; serial@4500 { - device_type = "serial"; - compatible = "ns16550"; - reg = <4500 100>; - clock-frequency = <0>; - interrupts = <1a 3>; - interrupt-parent = <40000>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-duart", "simple-bus"; + sleep = <&pmc 00000002>; + ranges; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 2>; + }; }; - pic@40000 { - linux,phandle = <40000>; - clock-frequency = <0>; + pic: pic@40000 { interrupt-controller; #address-cells = <0>; - reg = <40000 40000>; - built-in; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; i2c@3000 { - interrupt-parent = <40000>; - interrupts = <1b 3>; - reg = <3000 18>; - device_type = "i2c"; + interrupts = <43 2>; + reg = <0x3000 0x100>; compatible = "fsl-i2c"; dfsrr; + sleep = <&pmc 00000004>; }; + pmc: power@e0070 { + compatible = "fsl,mpc8540-pmc", "fsl,mpc8548-pmc"; + reg = <0xe0070 0x20>; + }; }; diff --git a/Documentation/powerpc/bootwrapper.txt b/Documentation/powerpc/bootwrapper.txt new file mode 100644 index 0000000000000000000000000000000000000000..d60fced5e1cc69169d9bbf1b49faacb41ef8db9c --- /dev/null +++ b/Documentation/powerpc/bootwrapper.txt @@ -0,0 +1,141 @@ +The PowerPC boot wrapper +------------------------ +Copyright (C) Secret Lab Technologies Ltd. + +PowerPC image targets compresses and wraps the kernel image (vmlinux) with +a boot wrapper to make it usable by the system firmware. There is no +standard PowerPC firmware interface, so the boot wrapper is designed to +be adaptable for each kind of image that needs to be built. + +The boot wrapper can be found in the arch/powerpc/boot/ directory. The +Makefile in that directory has targets for all the available image types. +The different image types are used to support all of the various firmware +interfaces found on PowerPC platforms. OpenFirmware is the most commonly +used firmware type on general purpose PowerPC systems from Apple, IBM and +others. U-Boot is typically found on embedded PowerPC hardware, but there +are a handful of other firmware implementations which are also popular. Each +firmware interface requires a different image format. + +The boot wrapper is built from the makefile in arch/powerpc/boot/Makefile and +it uses the wrapper script (arch/powerpc/boot/wrapper) to generate target +image. The details of the build system is discussed in the next section. +Currently, the following image format targets exist: + + cuImage.%: Backwards compatible uImage for older version of + U-Boot (for versions that don't understand the device + tree). This image embeds a device tree blob inside + the image. The boot wrapper, kernel and device tree + are all embedded inside the U-Boot uImage file format + with boot wrapper code that extracts data from the old + bd_info structure and loads the data into the device + tree before jumping into the kernel. + Because of the series of #ifdefs found in the + bd_info structure used in the old U-Boot interfaces, + cuImages are platform specific. Each specific + U-Boot platform has a different platform init file + which populates the embedded device tree with data + from the platform specific bd_info file. The platform + specific cuImage platform init code can be found in + arch/powerpc/boot/cuboot.*.c. Selection of the correct + cuImage init code for a specific board can be found in + the wrapper structure. + dtbImage.%: Similar to zImage, except device tree blob is embedded + inside the image instead of provided by firmware. The + output image file can be either an elf file or a flat + binary depending on the platform. + dtbImages are used on systems which do not have an + interface for passing a device tree directly. + dtbImages are similar to simpleImages except that + dtbImages have platform specific code for extracting + data from the board firmware, but simpleImages do not + talk to the firmware at all. + PlayStation 3 support uses dtbImage. So do Embedded + Planet boards using the PlanetCore firmware. Board + specific initialization code is typically found in a + file named arch/powerpc/boot/.c; but this + can be overridden by the wrapper script. + simpleImage.%: Firmware independent compressed image that does not + depend on any particular firmware interface and embeds + a device tree blob. This image is a flat binary that + can be loaded to any location in RAM and jumped to. + Firmware cannot pass any configuration data to the + kernel with this image type and it depends entirely on + the embedded device tree for all information. + The simpleImage is useful for booting systems with + an unknown firmware interface or for booting from + a debugger when no firmware is present (such as on + the Xilinx Virtex platform). The only assumption that + simpleImage makes is that RAM is correctly initialized + and that the MMU is either off or has RAM mapped to + base address 0. + simpleImage also supports inserting special platform + specific initialization code to the start of the bootup + sequence. The virtex405 platform uses this feature to + ensure that the cache is invalidated before caching + is enabled. Platform specific initialization code is + added as part of the wrapper script and is keyed on + the image target name. For example, all + simpleImage.virtex405-* targets will add the + virtex405-head.S initialization code (This also means + that the dts file for virtex405 targets should be + named (virtex405-.dts). Search the wrapper + script for 'virtex405' and see the file + arch/powerpc/boot/virtex405-head.S for details. + treeImage.%; Image format for used with OpenBIOS firmware found + on some ppc4xx hardware. This image embeds a device + tree blob inside the image. + uImage: Native image format used by U-Boot. The uImage target + does not add any boot code. It just wraps a compressed + vmlinux in the uImage data structure. This image + requires a version of U-Boot that is able to pass + a device tree to the kernel at boot. If using an older + version of U-Boot, then you need to use a cuImage + instead. + zImage.%: Image format which does not embed a device tree. + Used by OpenFirmware and other firmware interfaces + which are able to supply a device tree. This image + expects firmware to provide the device tree at boot. + Typically, if you have general purpose PowerPC + hardware then you want this image format. + +Image types which embed a device tree blob (simpleImage, dtbImage, treeImage, +and cuImage) all generate the device tree blob from a file in the +arch/powerpc/boot/dts/ directory. The Makefile selects the correct device +tree source based on the name of the target. Therefore, if the kernel is +built with 'make treeImage.walnut simpleImage.virtex405-ml403', then the +build system will use arch/powerpc/boot/dts/walnut.dts to build +treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build +the simpleImage.virtex405-ml403. + +Two special targets called 'zImage' and 'zImage.initrd' also exist. These +targets build all the default images as selected by the kernel configuration. +Default images are selected by the boot wrapper Makefile +(arch/powerpc/boot/Makefile) by adding targets to the $image-y variable. Look +at the Makefile to see which default image targets are available. + +How it is built +--------------- +arch/powerpc is designed to support multiplatform kernels, which means +that a single vmlinux image can be booted on many different target boards. +It also means that the boot wrapper must be able to wrap for many kinds of +images on a single build. The design decision was made to not use any +conditional compilation code (#ifdef, etc) in the boot wrapper source code. +All of the boot wrapper pieces are buildable at any time regardless of the +kernel configuration. Building all the wrapper bits on every kernel build +also ensures that obscure parts of the wrapper are at the very least compile +tested in a large variety of environments. + +The wrapper is adapted for different image types at link time by linking in +just the wrapper bits that are appropriate for the image type. The 'wrapper +script' (found in arch/powerpc/boot/wrapper) is called by the Makefile and +is responsible for selecting the correct wrapper bits for the image type. +The arguments are well documented in the script's comment block, so they +are not repeated here. However, it is worth mentioning that the script +uses the -p (platform) argument as the main method of deciding which wrapper +bits to compile in. Look for the large 'case "$platform" in' block in the +middle of the script. This is also the place where platform specific fixups +can be selected by changing the link order. + +In particular, care should be taken when working with cuImages. cuImage +wrapper bits are very board specific and care should be taken to make sure +the target you are trying to build is supported by the wrapper bits. diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt new file mode 100644 index 0000000000000000000000000000000000000000..74ae6f1cd2d6e3cdb313295f9d0fc55124583ec2 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/board.txt @@ -0,0 +1,29 @@ +* Board Control and Status (BCSR) + +Required properties: + + - device_type : Should be "board-control" + - reg : Offset and length of the register set for the device + +Example: + + bcsr@f8000000 { + device_type = "board-control"; + reg = ; + }; + +* Freescale on board FPGA + +This is the memory-mapped registers for on board FPGA. + +Required properities: +- compatible : should be "fsl,fpga-pixis". +- reg : should contain the address and the lenght of the FPPGA register + set. + +Example (MPC8610HPCD): + + board-control@e8000000 { + compatible = "fsl,fpga-pixis"; + reg = <0xe8000000 32>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt new file mode 100644 index 0000000000000000000000000000000000000000..088fc471e03a7eb9bc64b9943170df5125634559 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt @@ -0,0 +1,67 @@ +* Freescale Communications Processor Module + +NOTE: This is an interim binding, and will likely change slightly, +as more devices are supported. The QE bindings especially are +incomplete. + +* Root CPM node + +Properties: +- compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". +- reg : A 48-byte region beginning with CPCR. + +Example: + cpm@119c0 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; + reg = <119c0 30>; + } + +* Properties common to mulitple CPM/QE devices + +- fsl,cpm-command : This value is ORed with the opcode and command flag + to specify the device on which a CPM command operates. + +- fsl,cpm-brg : Indicates which baud rate generator the device + is associated with. If absent, an unused BRG + should be dynamically allocated. If zero, the + device uses an external clock rather than a BRG. + +- reg : Unless otherwise specified, the first resource represents the + scc/fcc/ucc registers, and the second represents the device's + parameter RAM region (if it has one). + +* Multi-User RAM (MURAM) + +The multi-user/dual-ported RAM is expressed as a bus under the CPM node. + +Ranges must be set up subject to the following restrictions: + +- Children's reg nodes must be offsets from the start of all muram, even + if the user-data area does not begin at zero. +- If multiple range entries are used, the difference between the parent + address and the child address must be the same in all, so that a single + mapping can cover them all while maintaining the ability to determine + CPM-side offsets with pointer subtraction. It is recommended that + multiple range entries not be used. +- A child address of zero must be translatable, even if no reg resources + contain it. + +A child "data" node must exist, compatible with "fsl,cpm-muram-data", to +indicate the portion of muram that is usable by the OS for arbitrary +purposes. The data node may have an arbitrary number of reg resources, +all of which contribute to the allocatable muram pool. + +Example, based on mpc8272: + muram@0 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 10000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0 2000 9800 800>; + }; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt new file mode 100644 index 0000000000000000000000000000000000000000..4c7d45eaf0253fc67131890d74edce90a4840b7e --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt @@ -0,0 +1,21 @@ +* Baud Rate Generators + +Currently defined compatibles: +fsl,cpm-brg +fsl,cpm1-brg +fsl,cpm2-brg + +Properties: +- reg : There may be an arbitrary number of reg resources; BRG + numbers are assigned to these in order. +- clock-frequency : Specifies the base frequency driving + the BRG. + +Example: + brg@119f0 { + compatible = "fsl,mpc8272-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <119f0 10 115f0 10>; + clock-frequency = ; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt new file mode 100644 index 0000000000000000000000000000000000000000..87bc6048667ee36b9e69f9e5332ce6a852fa90be --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt @@ -0,0 +1,41 @@ +* I2C + +The I2C controller is expressed as a bus under the CPM node. + +Properties: +- compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c" +- reg : On CPM2 devices, the second resource doesn't specify the I2C + Parameter RAM itself, but the I2C_BASE field of the CPM2 Parameter RAM + (typically 0x8afc 0x2). +- #address-cells : Should be one. The cell is the i2c device address with + the r/w bit set to zero. +- #size-cells : Should be zero. +- clock-frequency : Can be used to set the i2c clock frequency. If + unspecified, a default frequency of 60kHz is being used. +The following two properties are deprecated. They are only used by legacy +i2c drivers to find the bus to probe: +- linux,i2c-index : Can be used to hard code an i2c bus number. By default, + the bus number is dynamically assigned by the i2c core. +- linux,i2c-class : Can be used to override the i2c class. The class is used + by legacy i2c device drivers to find a bus in a specific context like + system management, video or sound. By default, I2C_CLASS_HWMON (1) is + being used. The definition of the classes can be found in + include/i2c/i2c.h + +Example, based on mpc823: + + i2c@860 { + compatible = "fsl,mpc823-i2c", + "fsl,cpm1-i2c"; + reg = <0x860 0x20 0x3c80 0x30>; + interrupts = <16>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-command = <0x10>; + #address-cells = <1>; + #size-cells = <0>; + + rtc@68 { + compatible = "dallas,ds1307"; + reg = <0x68>; + }; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt new file mode 100644 index 0000000000000000000000000000000000000000..8e3ee1681618742b6ac007ca92c8f2283060b504 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt @@ -0,0 +1,18 @@ +* Interrupt Controllers + +Currently defined compatibles: +- fsl,cpm1-pic + - only one interrupt cell +- fsl,pq1-pic +- fsl,cpm2-pic + - second interrupt cell is level/sense: + - 2 is falling edge + - 8 is active low + +Example: + interrupt-controller@10c00 { + #interrupt-cells = <2>; + interrupt-controller; + reg = <10c00 80>; + compatible = "mpc8272-pic", "fsl,cpm2-pic"; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt new file mode 100644 index 0000000000000000000000000000000000000000..74bfda4bb8243e5d79cc88caa9b57a0d9aa59423 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt @@ -0,0 +1,15 @@ +* USB (Universal Serial Bus Controller) + +Properties: +- compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb" + +Example: + usb@11bc0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,cpm2-usb"; + reg = <11b60 18 8b00 100>; + interrupts = ; + interrupt-parent = <&PIC>; + fsl,cpm-command = <2e600000>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/gpio.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/gpio.txt new file mode 100644 index 0000000000000000000000000000000000000000..1815dfede1bc8b201f46c6b989b0a868236a3aed --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/gpio.txt @@ -0,0 +1,38 @@ +Every GPIO controller node must have #gpio-cells property defined, +this information will be used to translate gpio-specifiers. + +On CPM1 devices, all ports are using slightly different register layouts. +Ports A, C and D are 16bit ports and Ports B and E are 32bit ports. + +On CPM2 devices, all ports are 32bit ports and use a common register layout. + +Required properties: +- compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b", + "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d", + "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank" +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional paramters (currently unused). +- gpio-controller : Marks the port as GPIO controller. + +Example of three SOC GPIO banks defined as gpio-controller nodes: + + CPM1_PIO_A: gpio-controller@950 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-a"; + reg = <0x950 0x10>; + gpio-controller; + }; + + CPM1_PIO_B: gpio-controller@ab8 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-b"; + reg = <0xab8 0x10>; + gpio-controller; + }; + + CPM1_PIO_E: gpio-controller@ac8 { + #gpio-cells = <2>; + compatible = "fsl,cpm1-pario-bank-e"; + reg = <0xac8 0x18>; + gpio-controller; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt new file mode 100644 index 0000000000000000000000000000000000000000..0e42694465803c4b535c1597d81847ea4aee01b0 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt @@ -0,0 +1,45 @@ +* Network + +Currently defined compatibles: +- fsl,cpm1-scc-enet +- fsl,cpm2-scc-enet +- fsl,cpm1-fec-enet +- fsl,cpm2-fcc-enet (third resource is GFEMR) +- fsl,qe-enet + +Example: + + ethernet@11300 { + device_type = "network"; + compatible = "fsl,mpc8272-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <11300 20 8400 100 11390 1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <20 8>; + interrupt-parent = <&PIC>; + phy-handle = <&PHY0>; + fsl,cpm-command = <12000300>; + }; + +* MDIO + +Currently defined compatibles: +fsl,pq1-fec-mdio (reg is same as first resource of FEC device) +fsl,cpm2-mdio-bitbang (reg is port C registers) + +Properties for fsl,cpm2-mdio-bitbang: +fsl,mdio-pin : pin of port C controlling mdio data +fsl,mdc-pin : pin of port C controlling mdio clock + +Example: + mdio@10d40 { + device_type = "mdio"; + compatible = "fsl,mpc8272ads-mdio-bitbang", + "fsl,mpc8272-mdio-bitbang", + "fsl,cpm2-mdio-bitbang"; + reg = <10d40 14>; + #address-cells = <1>; + #size-cells = <0>; + fsl,mdio-pin = <12>; + fsl,mdc-pin = <13>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt new file mode 100644 index 0000000000000000000000000000000000000000..78790d58dc2cb19ec93a290c4201fa94ce3bf6cf --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt @@ -0,0 +1,58 @@ +* Freescale QUICC Engine module (QE) +This represents qe module that is installed on PowerQUICC II Pro. + +NOTE: This is an interim binding; it should be updated to fit +in with the CPM binding later in this document. + +Basically, it is a bus of devices, that could act more or less +as a complete entity (UCC, USB etc ). All of them should be siblings on +the "root" qe node, using the common properties from there. +The description below applies to the qe of MPC8360 and +more nodes and properties would be extended in the future. + +i) Root QE device + +Required properties: +- compatible : should be "fsl,qe"; +- model : precise model of the QE, Can be "QE", "CPM", or "CPM2" +- reg : offset and length of the device registers. +- bus-frequency : the clock frequency for QUICC Engine. + +Recommended properties +- brg-frequency : the internal clock source frequency for baud-rate + generators in Hz. + +Example: + qe@e0100000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + compatible = "fsl,qe"; + ranges = <0 e0100000 00100000>; + reg = ; + brg-frequency = <0>; + bus-frequency = <179A7B00>; + } + +* Multi-User RAM (MURAM) + +Required properties: +- compatible : should be "fsl,qe-muram", "fsl,cpm-muram". +- mode : the could be "host" or "slave". +- ranges : Should be defined as specified in 1) to describe the + translation of MURAM addresses. +- data-only : sub-node which defines the address area under MURAM + bus that can be allocated as data/parameter + +Example: + + muram@10000 { + compatible = "fsl,qe-muram", "fsl,cpm-muram"; + ranges = <0 00010000 0000c000>; + + data-only@0{ + compatible = "fsl,qe-muram-data", + "fsl,cpm-muram-data"; + reg = <0 c000>; + }; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt new file mode 100644 index 0000000000000000000000000000000000000000..6c238f59b2a94f589cc5c7e3d4d451e8714f825f --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt @@ -0,0 +1,24 @@ +* Uploaded QE firmware + + If a new firwmare has been uploaded to the QE (usually by the + boot loader), then a 'firmware' child node should be added to the QE + node. This node provides information on the uploaded firmware that + device drivers may need. + + Required properties: + - id: The string name of the firmware. This is taken from the 'id' + member of the qe_firmware structure of the uploaded firmware. + Device drivers can search this string to determine if the + firmware they want is already present. + - extended-modes: The Extended Modes bitfield, taken from the + firmware binary. It is a 64-bit number represented + as an array of two 32-bit numbers. + - virtual-traps: The virtual traps, taken from the firmware binary. + It is an array of 8 32-bit numbers. + +Example: + firmware { + id = "Soft-UART"; + extended-modes = <0 0>; + virtual-traps = <0 0 0 0 0 0 0 0>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt new file mode 100644 index 0000000000000000000000000000000000000000..60984260207b19545e661f2f1f57f8000c6cfbdf --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt @@ -0,0 +1,51 @@ +* Parallel I/O Ports + +This node configures Parallel I/O ports for CPUs with QE support. +The node should reside in the "soc" node of the tree. For each +device that using parallel I/O ports, a child node should be created. +See the definition of the Pin configuration nodes below for more +information. + +Required properties: +- device_type : should be "par_io". +- reg : offset to the register set and its length. +- num-ports : number of Parallel I/O ports + +Example: +par_io@1400 { + reg = <1400 100>; + #address-cells = <1>; + #size-cells = <0>; + device_type = "par_io"; + num-ports = <7>; + ucc_pin@01 { + ...... + }; + +Note that "par_io" nodes are obsolete, and should not be used for +the new device trees. Instead, each Par I/O bank should be represented +via its own gpio-controller node: + +Required properties: +- #gpio-cells : should be "2". +- compatible : should be "fsl,-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank". +- reg : offset to the register set and its length. +- gpio-controller : node to identify gpio controllers. + +Example: + qe_pio_a: gpio-controller@1400 { + #gpio-cells = <2>; + compatible = "fsl,mpc8360-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank"; + reg = <0x1400 0x18>; + gpio-controller; + }; + + qe_pio_e: gpio-controller@1460 { + #gpio-cells = <2>; + compatible = "fsl,mpc8360-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank"; + reg = <0x1460 0x18>; + gpio-controller; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt new file mode 100644 index 0000000000000000000000000000000000000000..c5b43061db3afe39d970a761f644caaf93bb3dee --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt @@ -0,0 +1,60 @@ +* Pin configuration nodes + +Required properties: +- linux,phandle : phandle of this node; likely referenced by a QE + device. +- pio-map : array of pin configurations. Each pin is defined by 6 + integers. The six numbers are respectively: port, pin, dir, + open_drain, assignment, has_irq. + - port : port number of the pin; 0-6 represent port A-G in UM. + - pin : pin number in the port. + - dir : direction of the pin, should encode as follows: + + 0 = The pin is disabled + 1 = The pin is an output + 2 = The pin is an input + 3 = The pin is I/O + + - open_drain : indicates the pin is normal or wired-OR: + + 0 = The pin is actively driven as an output + 1 = The pin is an open-drain driver. As an output, the pin is + driven active-low, otherwise it is three-stated. + + - assignment : function number of the pin according to the Pin Assignment + tables in User Manual. Each pin can have up to 4 possible functions in + QE and two options for CPM. + - has_irq : indicates if the pin is used as source of external + interrupts. + +Example: + ucc_pin@01 { + linux,phandle = <140001>; + pio-map = < + /* port pin dir open_drain assignment has_irq */ + 0 3 1 0 1 0 /* TxD0 */ + 0 4 1 0 1 0 /* TxD1 */ + 0 5 1 0 1 0 /* TxD2 */ + 0 6 1 0 1 0 /* TxD3 */ + 1 6 1 0 3 0 /* TxD4 */ + 1 7 1 0 1 0 /* TxD5 */ + 1 9 1 0 2 0 /* TxD6 */ + 1 a 1 0 2 0 /* TxD7 */ + 0 9 2 0 1 0 /* RxD0 */ + 0 a 2 0 1 0 /* RxD1 */ + 0 b 2 0 1 0 /* RxD2 */ + 0 c 2 0 1 0 /* RxD3 */ + 0 d 2 0 1 0 /* RxD4 */ + 1 1 2 0 2 0 /* RxD5 */ + 1 0 2 0 2 0 /* RxD6 */ + 1 4 2 0 2 0 /* RxD7 */ + 0 7 1 0 1 0 /* TX_EN */ + 0 8 1 0 1 0 /* TX_ER */ + 0 f 2 0 1 0 /* RX_DV */ + 0 10 2 0 1 0 /* RX_ER */ + 0 0 2 0 1 0 /* RX_CLK */ + 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ + 2 8 2 0 1 0>; /* GTX125 - CLK9 */ + }; + + diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt new file mode 100644 index 0000000000000000000000000000000000000000..e47734bee3f078ead4ebdbf71a699809860b4be6 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt @@ -0,0 +1,70 @@ +* UCC (Unified Communications Controllers) + +Required properties: +- device_type : should be "network", "hldc", "uart", "transparent" + "bisync", "atm", or "serial". +- compatible : could be "ucc_geth" or "fsl_atm" and so on. +- cell-index : the ucc number(1-8), corresponding to UCCx in UM. +- reg : Offset and length of the register set for the device +- interrupts : where a is the interrupt number and b is a + field that represents an encoding of the sense and level + information for the interrupt. This should be encoded based on + the information in section 2) depending on the type of interrupt + controller you have. +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. +- pio-handle : The phandle for the Parallel I/O port configuration. +- port-number : for UART drivers, the port number to use, between 0 and 3. + This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0. + The port number is added to the minor number of the device. Unlike the + CPM UART driver, the port-number is required for the QE UART driver. +- soft-uart : for UART drivers, if specified this means the QE UART device + driver should use "Soft-UART" mode, which is needed on some SOCs that have + broken UART hardware. Soft-UART is provided via a microcode upload. +- rx-clock-name: the UCC receive clock source + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +- tx-clock-name: the UCC transmit clock source + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +The following two properties are deprecated. rx-clock has been replaced +with rx-clock-name, and tx-clock has been replaced with tx-clock-name. +Drivers that currently use the deprecated properties should continue to +do so, in order to support older device trees, but they should be updated +to check for the new properties first. +- rx-clock : represents the UCC receive clock source. + 0x00 : clock source is disabled; + 0x1~0x10 : clock source is BRG1~BRG16 respectively; + 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. +- tx-clock: represents the UCC transmit clock source; + 0x00 : clock source is disabled; + 0x1~0x10 : clock source is BRG1~BRG16 respectively; + 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. + +Required properties for network device_type: +- mac-address : list of bytes representing the ethernet address. +- phy-handle : The phandle for the PHY connected to this controller. + +Recommended properties: +- phy-connection-type : a string naming the controller/PHY interface type, + i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal + Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only), + "tbi", or "rtbi". + +Example: + ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + cell-index = <1>; + reg = <2000 200>; + interrupts = ; + interrupt-parent = <700>; + mac-address = [ 00 04 9f 00 23 23 ]; + rx-clock = "none"; + tx-clock = "clk9"; + phy-handle = <212000>; + phy-connection-type = "gmii"; + pio-handle = <140001>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt new file mode 100644 index 0000000000000000000000000000000000000000..9ccd5f30405b7828715186d2185d3636e3629207 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt @@ -0,0 +1,37 @@ +Freescale QUICC Engine USB Controller + +Required properties: +- compatible : should be "fsl,-qe-usb", "fsl,mpc8323-qe-usb". +- reg : the first two cells should contain usb registers location and + length, the next two two cells should contain PRAM location and + length. +- interrupts : should contain USB interrupt. +- interrupt-parent : interrupt source phandle. +- fsl,fullspeed-clock : specifies the full speed USB clock source: + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +- fsl,lowspeed-clock : specifies the low speed USB clock source: + "none": clock source is disabled + "brg1" through "brg16": clock source is BRG1-BRG16, respectively + "clk1" through "clk24": clock source is CLK1-CLK24, respectively +- hub-power-budget : USB power budget for the root hub, in mA. +- gpios : should specify GPIOs in this order: USBOE, USBTP, USBTN, USBRP, + USBRN, SPEED (optional), and POWER (optional). + +Example: + +usb@6c0 { + compatible = "fsl,mpc8360-qe-usb", "fsl,mpc8323-qe-usb"; + reg = <0x6c0 0x40 0x8b00 0x100>; + interrupts = <11>; + interrupt-parent = <&qeic>; + fsl,fullspeed-clock = "clk21"; + gpios = <&qe_pio_b 2 0 /* USBOE */ + &qe_pio_b 3 0 /* USBTP */ + &qe_pio_b 8 0 /* USBTN */ + &qe_pio_b 9 0 /* USBRP */ + &qe_pio_b 11 0 /* USBRN */ + &qe_pio_e 20 0 /* SPEED */ + &qe_pio_e 21 0 /* POWER */>; +}; diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt new file mode 100644 index 0000000000000000000000000000000000000000..b35f3482e3e4dc73574ae0dd7f3ec9474aec8f9a --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt @@ -0,0 +1,21 @@ +* Serial + +Currently defined compatibles: +- fsl,cpm1-smc-uart +- fsl,cpm2-smc-uart +- fsl,cpm1-scc-uart +- fsl,cpm2-scc-uart +- fsl,qe-uart + +Example: + + serial@11a00 { + device_type = "serial"; + compatible = "fsl,mpc8272-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <11a00 20 8000 100>; + interrupts = <28 8>; + interrupt-parent = <&PIC>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <00800000>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt new file mode 100644 index 0000000000000000000000000000000000000000..deb35de709886085594e35e142c627d2942366b7 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt @@ -0,0 +1,18 @@ +* Freescale Display Interface Unit + +The Freescale DIU is a LCD controller, with proper hardware, it can also +drive DVI monitors. + +Required properties: +- compatible : should be "fsl-diu". +- reg : should contain at least address and length of the DIU register + set. +- Interrupts : one DIU interrupt should be describe here. + +Example (MPC8610HPCD): + display@2c000 { + compatible = "fsl,diu"; + reg = <0x2c000 100>; + interrupts = <72 2>; + interrupt-parent = <&mpic>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt new file mode 100644 index 0000000000000000000000000000000000000000..86826df00e64ea66085c387d7fd68db46211963c --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt @@ -0,0 +1,127 @@ +* Freescale 83xx DMA Controller + +Freescale PowerPC 83xx have on chip general purpose DMA controllers. + +Required properties: + +- compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma", where CHIP is the processor + (mpc8349, mpc8360, etc.) and the second is + "fsl,elo-dma" +- reg : +- ranges : Should be defined as specified in 1) to describe the + DMA controller channels. +- cell-index : controller index. 0 for controller @ 0x8100 +- interrupts : +- interrupt-parent : optional, if needed for interrupt mapping + + +- DMA channel nodes: + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma-channel", where CHIP is the processor + (mpc8349, mpc8350, etc.) and the second is + "fsl,elo-dma-channel" + - reg : + - cell-index : dma channel index starts at 0. + +Optional properties: + - interrupts : + (on 83xx this is expected to be identical to + the interrupts property of the parent node) + - interrupt-parent : optional, if needed for interrupt mapping + +Example: + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <82a8 4>; + ranges = <0 8100 1a4>; + interrupt-parent = <&ipic>; + interrupts = <47 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <0>; + reg = <0 80>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <1>; + reg = <80 80>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <2>; + reg = <100 80>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + cell-index = <3>; + reg = <180 80>; + }; + }; + +* Freescale 85xx/86xx DMA Controller + +Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. + +Required properties: + +- compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma", where CHIP is the processor + (mpc8540, mpc8540, etc.) and the second is + "fsl,eloplus-dma" +- reg : +- cell-index : controller index. 0 for controller @ 0x21000, + 1 for controller @ 0xc000 +- ranges : Should be defined as specified in 1) to describe the + DMA controller channels. + +- DMA channel nodes: + - compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-dma-channel", where CHIP is the processor + (mpc8540, mpc8560, etc.) and the second is + "fsl,eloplus-dma-channel" + - cell-index : dma channel index starts at 0. + - reg : + - interrupts : + - interrupt-parent : optional, if needed for interrupt mapping + +Example: + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <21300 4>; + ranges = <0 21100 200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <0 80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <14 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <80 80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <15 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <100 80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel"; + reg = <180 80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <17 2>; + }; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/gtm.txt b/Documentation/powerpc/dts-bindings/fsl/gtm.txt new file mode 100644 index 0000000000000000000000000000000000000000..9a33efded4bc9a033a133a3ffc2bc436f1c909c5 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/gtm.txt @@ -0,0 +1,31 @@ +* Freescale General-purpose Timers Module + +Required properties: + - compatible : should be + "fsl,-gtm", "fsl,gtm" for SOC GTMs + "fsl,-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs + "fsl,-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs + - reg : should contain gtm registers location and length (0x40). + - interrupts : should contain four interrupts. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies the frequency driving the timer. + +Example: + +timer@500 { + compatible = "fsl,mpc8360-gtm", "fsl,gtm"; + reg = <0x500 0x40>; + interrupts = <90 8 78 8 84 8 72 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; + +timer@440 { + compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm"; + reg = <0x440 0x40>; + interrupts = <12 13 14 15>; + interrupt-parent = <&qeic>; + /* filled by u-boot */ + clock-frequency = <0>; +}; diff --git a/Documentation/powerpc/dts-bindings/fsl/guts.txt b/Documentation/powerpc/dts-bindings/fsl/guts.txt new file mode 100644 index 0000000000000000000000000000000000000000..9e7a2417dac5cf8be2b13040db6dc30153febc2d --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/guts.txt @@ -0,0 +1,25 @@ +* Global Utilities Block + +The global utilities block controls power management, I/O device +enabling, power-on-reset configuration monitoring, general-purpose +I/O signal configuration, alternate function selection for multiplexed +signals, and clock control. + +Required properties: + + - compatible : Should define the compatible device type for + global-utilities. + - reg : Offset and length of the register set for the device. + +Recommended properties: + + - fsl,has-rstcr : Indicates that the global utilities register set + contains a functioning "reset control register" (i.e. the board + is wired to reset upon setting the HRESET_REQ bit in this register). + +Example: + global-utilities@e0000 { /* global utilities block */ + compatible = "fsl,mpc8548-guts"; + reg = ; + fsl,has-rstcr; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/i2c.txt new file mode 100644 index 0000000000000000000000000000000000000000..d0ab33e21fe6a5c918f77d251025e335010700aa --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt @@ -0,0 +1,32 @@ +* I2C + +Required properties : + + - device_type : Should be "i2c" + - reg : Offset and length of the register set for the device + +Recommended properties : + + - compatible : Should be "fsl-i2c" for parts compatible with + Freescale I2C specifications. + - interrupts : where a is the interrupt number and b is a + field that represents an encoding of the sense and level + information for the interrupt. This should be encoded based on + the information in section 2) depending on the type of interrupt + controller you have. + - interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + - dfsrr : boolean; if defined, indicates that this I2C device has + a digital filter sampling rate register + - fsl5200-clocking : boolean; if defined, indicated that this device + uses the FSL 5200 clocking mechanism. + +Example : + i2c@3000 { + interrupt-parent = <40000>; + interrupts = <1b 3>; + reg = <3000 18>; + device_type = "i2c"; + compatible = "fsl-i2c"; + dfsrr; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/lbc.txt b/Documentation/powerpc/dts-bindings/fsl/lbc.txt new file mode 100644 index 0000000000000000000000000000000000000000..3300fec501c540288663e93949faf2722f4fd730 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/lbc.txt @@ -0,0 +1,35 @@ +* Chipselect/Local Bus + +Properties: +- name : Should be localbus +- #address-cells : Should be either two or three. The first cell is the + chipselect number, and the remaining cells are the + offset into the chipselect. +- #size-cells : Either one or two, depending on how large each chipselect + can be. +- ranges : Each range corresponds to a single chipselect, and cover + the entire access window as configured. + +Example: + localbus@f0010100 { + compatible = "fsl,mpc8272-localbus", + "fsl,pq2-localbus"; + #address-cells = <2>; + #size-cells = <1>; + reg = ; + + ranges = <0 0 fe000000 02000000 + 1 0 f4500000 00008000>; + + flash@0,0 { + compatible = "jedec-flash"; + reg = <0 0 2000000>; + bank-width = <4>; + device-width = <1>; + }; + + board-control@1,0 { + reg = <1 0 20>; + compatible = "fsl,mpc8272ads-bcsr"; + }; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt b/Documentation/powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt new file mode 100644 index 0000000000000000000000000000000000000000..0f766333b6ebd61298010a08db851a2244edd0bd --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/mcu-mpc8349emitx.txt @@ -0,0 +1,17 @@ +Freescale MPC8349E-mITX-compatible Power Management Micro Controller Unit (MCU) + +Required properties: +- compatible : "fsl,-", "fsl,mcu-mpc8349emitx". +- reg : should specify I2C address (0x0a). +- #gpio-cells : should be 2. +- gpio-controller : should be present. + +Example: + +mcu@0a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8349emitx", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; +}; diff --git a/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt b/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt new file mode 100644 index 0000000000000000000000000000000000000000..b26b91992c5589cd3c6e289d8b616f87ceeb3dce --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt @@ -0,0 +1,36 @@ +* Freescale MSI interrupt controller + +Reguired properities: +- compatible : compatible list, contains 2 entries, + first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572, + etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on + the parent type. +- reg : should contain the address and the length of the shared message + interrupt register set. +- msi-available-ranges: use style section to define which + msi interrupt can be used in the 256 msi interrupts. This property is + optional, without this, all the 256 MSI interrupts can be used. +- interrupts : each one of the interrupts here is one entry per 32 MSIs, + and routed to the host interrupt controller. the interrupts should + be set as edge sensitive. +- interrupt-parent: the phandle for the interrupt controller + that services interrupts for this device. for 83xx cpu, the interrupts + are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed + to MPIC. + +Example: + msi@41600 { + compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/pmc.txt b/Documentation/powerpc/dts-bindings/fsl/pmc.txt new file mode 100644 index 0000000000000000000000000000000000000000..02f6f43ee1b7f0c24a3ea39e0d87ee170ddf7ba0 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/pmc.txt @@ -0,0 +1,63 @@ +* Power Management Controller + +Properties: +- compatible: "fsl,-pmc". + + "fsl,mpc8349-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8313-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8548-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8536-pmc" should also be listed for any chip + whose PMC is compatible, and implies deep-sleep capability. + + "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is + compatible; all statements below that apply to "fsl,mpc8548-pmc" also + apply to "fsl,mpc8641d-pmc". + + Compatibility does not include bit assigments in SCCR/PMCDR/DEVDISR; these + bit assigments are indicated via the sleep specifier in each device's + sleep property. + +- reg: For devices compatible with "fsl,mpc8349-pmc", the first resource + is the PMC block, and the second resource is the Clock Configuration + block. + + For devices compatible with "fsl,mpc8548-pmc", the first resource + is a 32-byte block beginning with DEVDISR. + +- interrupts: For "fsl,mpc8349-pmc"-compatible devices, the first + resource is the PMC block interrupt. + +- fsl,mpc8313-wakeup-timer: For "fsl,mpc8313-pmc"-compatible devices, + this is a phandle to an "fsl,gtm" node on which timer 4 can be used as + a wakeup source from deep sleep. + +Sleep specifiers: + + fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit + that is set in the cell, the corresponding bit in SCCR will be saved + and cleared on suspend, and restored on resume. This sleep controller + supports disabling and resuming devices at any time. + + fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of + which will be ORed into PMCDR upon suspend, and cleared from PMCDR + upon resume. The first two cells are as described for fsl,mpc8578-pmc. + This sleep controller only supports disabling devices during system + sleep, or permanently. + + fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the + first of which will be ORed into DEVDISR (and the second into + DEVDISR2, if present -- this cell should be zero or absent if the + hardware does not have DEVDISR2) upon a request for permanent device + disabling. This sleep controller does not support configuring devices + to disable during system sleep (unless supported by another compatible + match), or dynamically. + +Example: + + power@b00 { + compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; + interrupts = <80 8>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/sata.txt b/Documentation/powerpc/dts-bindings/fsl/sata.txt new file mode 100644 index 0000000000000000000000000000000000000000..b46bcf46c3d83e3422058138f96b3c7915ac3711 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/sata.txt @@ -0,0 +1,29 @@ +* Freescale 8xxx/3.0 Gb/s SATA nodes + +SATA nodes are defined to describe on-chip Serial ATA controllers. +Each SATA port should have its own node. + +Required properties: +- compatible : compatible list, contains 2 entries, first is + "fsl,CHIP-sata", where CHIP is the processor + (mpc8315, mpc8379, etc.) and the second is + "fsl,pq-sata" +- interrupts : +- cell-index : controller index. + 1 for controller @ 0x18000 + 2 for controller @ 0x19000 + 3 for controller @ 0x1a000 + 4 for controller @ 0x1b000 + +Optional properties: +- interrupt-parent : optional, if needed for interrupt mapping +- reg : + +Example: + sata@18000 { + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; + reg = <0x18000 0x1000>; + cell-index = <1>; + interrupts = <2c 8>; + interrupt-parent = < &ipic >; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/sec.txt b/Documentation/powerpc/dts-bindings/fsl/sec.txt new file mode 100644 index 0000000000000000000000000000000000000000..2b6f2d45c45aa2846113eb23c310e5d46da6e166 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/sec.txt @@ -0,0 +1,68 @@ +Freescale SoC SEC Security Engines + +Required properties: + +- compatible : Should contain entries for this and backward compatible + SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0" +- reg : Offset and length of the register set for the device +- interrupts : the SEC's interrupt number +- fsl,num-channels : An integer representing the number of channels + available. +- fsl,channel-fifo-len : An integer representing the number of + descriptor pointers each channel fetch fifo can hold. +- fsl,exec-units-mask : The bitmask representing what execution units + (EUs) are available. It's a single 32-bit cell. EU information + should be encoded following the SEC's Descriptor Header Dword + EU_SEL0 field documentation, i.e. as follows: + + bit 0 = reserved - should be 0 + bit 1 = set if SEC has the ARC4 EU (AFEU) + bit 2 = set if SEC has the DES/3DES EU (DEU) + bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A) + bit 4 = set if SEC has the random number generator EU (RNG) + bit 5 = set if SEC has the public key EU (PKEU) + bit 6 = set if SEC has the AES EU (AESU) + bit 7 = set if SEC has the Kasumi EU (KEU) + bit 8 = set if SEC has the CRC EU (CRCU) + bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B) + +remaining bits are reserved for future SEC EUs. + +- fsl,descriptor-types-mask : The bitmask representing what descriptors + are available. It's a single 32-bit cell. Descriptor type information + should be encoded following the SEC's Descriptor Header Dword DESC_TYPE + field documentation, i.e. as follows: + + bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type + bit 1 = set if SEC supports the ipsec_esp descriptor type + bit 2 = set if SEC supports the common_nonsnoop desc. type + bit 3 = set if SEC supports the 802.11i AES ccmp desc. type + bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type + bit 5 = set if SEC supports the srtp descriptor type + bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type + bit 7 = set if SEC supports the pkeu_assemble descriptor type + bit 8 = set if SEC supports the aesu_key_expand_output desc.type + bit 9 = set if SEC supports the pkeu_ptmul descriptor type + bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type + bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type + + ..and so on and so forth. + +Optional properties: + +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + +Example: + + /* MPC8548E */ + crypto@30000 { + compatible = "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <29 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xfe>; + fsl,descriptor-types-mask = <0x12b0ebf>; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/spi.txt b/Documentation/powerpc/dts-bindings/fsl/spi.txt new file mode 100644 index 0000000000000000000000000000000000000000..e7d9a344c4f450fda0e50d2b96d6ef30ecc3458a --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/spi.txt @@ -0,0 +1,24 @@ +* SPI (Serial Peripheral Interface) + +Required properties: +- cell-index : SPI controller index. +- compatible : should be "fsl,spi". +- mode : the SPI operation mode, it can be "cpu" or "cpu-qe". +- reg : Offset and length of the register set for the device +- interrupts : where a is the interrupt number and b is a + field that represents an encoding of the sense and level + information for the interrupt. This should be encoded based on + the information in section 2) depending on the type of interrupt + controller you have. +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + +Example: + spi@4c0 { + cell-index = <0>; + compatible = "fsl,spi"; + reg = <4c0 40>; + interrupts = <82 0>; + interrupt-parent = <700>; + mode = "cpu"; + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt new file mode 100644 index 0000000000000000000000000000000000000000..d100555d488a32e722cf4ae3f6640159018e9a83 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt @@ -0,0 +1,38 @@ +Freescale Synchronous Serial Interface + +The SSI is a serial device that communicates with audio codecs. It can +be programmed in AC97, I2S, left-justified, or right-justified modes. + +Required properties: +- compatible : compatible list, containing "fsl,ssi" +- cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on +- reg : offset and length of the register set for the device +- interrupts : where a is the interrupt number and b is a + field that represents an encoding of the sense and + level information for the interrupt. This should be + encoded based on the information in section 2) + depending on the type of interrupt controller you + have. +- interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. +- fsl,mode : the operating mode for the SSI interface + "i2s-slave" - I2S mode, SSI is clock slave + "i2s-master" - I2S mode, SSI is clock master + "lj-slave" - left-justified mode, SSI is clock slave + "lj-master" - l.j. mode, SSI is clock master + "rj-slave" - right-justified mode, SSI is clock slave + "rj-master" - r.j., SSI is clock master + "ac97-slave" - AC97 mode, SSI is clock slave + "ac97-master" - AC97 mode, SSI is clock master + +Optional properties: +- codec-handle : phandle to a 'codec' node that defines an audio + codec connected to this SSI. This node is typically + a child of an I2C or other control node. + +Child 'codec' node required properties: +- compatible : compatible list, contains the name of the codec + +Child 'codec' node optional properties: +- clock-frequency : The frequency of the input clock, which typically + comes from an on-board dedicated oscillator. diff --git a/Documentation/powerpc/dts-bindings/fsl/tsec.txt b/Documentation/powerpc/dts-bindings/fsl/tsec.txt new file mode 100644 index 0000000000000000000000000000000000000000..cf55fa4112d2736de01e0989c5f11d417346326a --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/tsec.txt @@ -0,0 +1,62 @@ +* MDIO IO device + +The MDIO is a bus to which the PHY devices are connected. For each +device that exists on this bus, a child node should be created. See +the definition of the PHY node below for an example of how to define +a PHY. + +Required properties: + - reg : Offset and length of the register set for the device + - compatible : Should define the compatible device type for the + mdio. Currently, this is most likely to be "fsl,gianfar-mdio" + +Example: + + mdio@24520 { + reg = <24520 20>; + compatible = "fsl,gianfar-mdio"; + + ethernet-phy@0 { + ...... + }; + }; + + +* Gianfar-compatible ethernet nodes + +Properties: + + - device_type : Should be "network" + - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" + - compatible : Should be "gianfar" + - reg : Offset and length of the register set for the device + - local-mac-address : List of bytes representing the ethernet address of + this controller + - interrupts : For FEC devices, the first interrupt is the device's + interrupt. For TSEC and eTSEC devices, the first interrupt is + transmit, the second is receive, and the third is error. + - phy-handle : The phandle for the PHY connected to this ethernet + controller. + - fixed-link : where a is emulated phy id - choose any, + but unique to the all specified fixed-links, b is duplex - 0 half, + 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no + pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause. + - phy-connection-type : a string naming the controller/PHY interface type, + i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii", + "tbi", or "rtbi". This property is only really needed if the connection + is of type "rgmii-id", as all other connection types are detected by + hardware. + - fsl,magic-packet : If present, indicates that the hardware supports + waking up via magic packet. + +Example: + ethernet@24000 { + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 E0 0C 00 73 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0> + }; diff --git a/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt b/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt new file mode 100644 index 0000000000000000000000000000000000000000..84a04d5eb8e6d76c188e44378b705c5d19604568 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/upm-nand.txt @@ -0,0 +1,28 @@ +Freescale Localbus UPM programmed to work with NAND flash + +Required properties: +- compatible : "fsl,upm-nand". +- reg : should specify localbus chip select and size used for the chip. +- fsl,upm-addr-offset : UPM pattern offset for the address latch. +- fsl,upm-cmd-offset : UPM pattern offset for the command latch. +- gpios : may specify optional GPIO connected to the Ready-Not-Busy pin. + +Example: + +upm@1,0 { + compatible = "fsl,upm-nand"; + reg = <1 0 1>; + fsl,upm-addr-offset = <16>; + fsl,upm-cmd-offset = <8>; + gpios = <&qe_pio_e 18 0>; + + flash { + #address-cells = <1>; + #size-cells = <1>; + compatible = "..."; + + partition@0 { + ... + }; + }; +}; diff --git a/Documentation/powerpc/dts-bindings/fsl/usb.txt b/Documentation/powerpc/dts-bindings/fsl/usb.txt new file mode 100644 index 0000000000000000000000000000000000000000..b001524026943ce0e0cea217767da69d0c6d60c9 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/fsl/usb.txt @@ -0,0 +1,59 @@ +Freescale SOC USB controllers + +The device node for a USB controller that is part of a Freescale +SOC is as described in the document "Open Firmware Recommended +Practice : Universal Serial Bus" with the following modifications +and additions : + +Required properties : + - compatible : Should be "fsl-usb2-mph" for multi port host USB + controllers, or "fsl-usb2-dr" for dual role USB controllers + - phy_type : For multi port host USB controllers, should be one of + "ulpi", or "serial". For dual role USB controllers, should be + one of "ulpi", "utmi", "utmi_wide", or "serial". + - reg : Offset and length of the register set for the device + - port0 : boolean; if defined, indicates port0 is connected for + fsl-usb2-mph compatible controllers. Either this property or + "port1" (or both) must be defined for "fsl-usb2-mph" compatible + controllers. + - port1 : boolean; if defined, indicates port1 is connected for + fsl-usb2-mph compatible controllers. Either this property or + "port0" (or both) must be defined for "fsl-usb2-mph" compatible + controllers. + - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible + controllers. Can be "host", "peripheral", or "otg". Default to + "host" if not defined for backward compatibility. + +Recommended properties : + - interrupts : where a is the interrupt number and b is a + field that represents an encoding of the sense and level + information for the interrupt. This should be encoded based on + the information in section 2) depending on the type of interrupt + controller you have. + - interrupt-parent : the phandle for the interrupt controller that + services interrupts for this device. + +Example multi port host USB controller device node : + usb@22000 { + compatible = "fsl-usb2-mph"; + reg = <22000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <700>; + interrupts = <27 1>; + phy_type = "ulpi"; + port0; + port1; + }; + +Example dual role USB controller device node : + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <700>; + interrupts = <26 1>; + dr_mode = "otg"; + phy = "ulpi"; + }; diff --git a/Documentation/powerpc/dts-bindings/gpio/led.txt b/Documentation/powerpc/dts-bindings/gpio/led.txt new file mode 100644 index 0000000000000000000000000000000000000000..ff51f4c0fa9d19bbc23c05773a229acbb18a1b78 --- /dev/null +++ b/Documentation/powerpc/dts-bindings/gpio/led.txt @@ -0,0 +1,15 @@ +LED connected to GPIO + +Required properties: +- compatible : should be "gpio-led". +- label : (optional) the label for this LED. If omitted, the label is + taken from the node name (excluding the unit address). +- gpios : should specify LED GPIO. + +Example: + +led@0 { + compatible = "gpio-led"; + label = "hdd"; + gpios = <&mcu_pio 0 1>; +}; diff --git a/Documentation/powerpc/qe_firmware.txt b/Documentation/powerpc/qe_firmware.txt index 896266432d3363e23ce874600293504e6c396f6a..06da4d4b44f9c0d3f81bcbddb01ccc5c76ae01d8 100644 --- a/Documentation/powerpc/qe_firmware.txt +++ b/Documentation/powerpc/qe_firmware.txt @@ -217,7 +217,7 @@ Although it is not recommended, you can specify '0' in the soc.model field to skip matching SOCs altogether. The 'model' field is a 16-bit number that matches the actual SOC. The -'major' and 'minor' fields are the major and minor revision numbrs, +'major' and 'minor' fields are the major and minor revision numbers, respectively, of the SOC. For example, to match the 8323, revision 1.0: diff --git a/Documentation/rfkill.txt b/Documentation/rfkill.txt index a83ff23cd68cea84d4476a43df7b9e9e91f10cf8..0843ed0163a5810fc564844b1929cf4fbe7673eb 100644 --- a/Documentation/rfkill.txt +++ b/Documentation/rfkill.txt @@ -1,89 +1,528 @@ rfkill - RF switch subsystem support ==================================== -1 Implementation details -2 Driver support -3 Userspace support +1 Introduction +2 Implementation details +3 Kernel driver guidelines +3.1 wireless device drivers +3.2 platform/switch drivers +3.3 input device drivers +4 Kernel API +5 Userspace support -=============================================================================== -1: Implementation details -The rfkill switch subsystem offers support for keys often found on laptops -to enable wireless devices like WiFi and Bluetooth. +1. Introduction: + +The rfkill switch subsystem exists to add a generic interface to circuitry that +can enable or disable the signal output of a wireless *transmitter* of any +type. By far, the most common use is to disable radio-frequency transmitters. -This is done by providing the user 3 possibilities: - 1 - The rfkill system handles all events; userspace is not aware of events. - 2 - The rfkill system handles all events; userspace is informed about the events. - 3 - The rfkill system does not handle events; userspace handles all events. +Note that disabling the signal output means that the the transmitter is to be +made to not emit any energy when "blocked". rfkill is not about blocking data +transmissions, it is about blocking energy emission. -The buttons to enable and disable the wireless radios are important in +The rfkill subsystem offers support for keys and switches often found on +laptops to enable wireless devices like WiFi and Bluetooth, so that these keys +and switches actually perform an action in all wireless devices of a given type +attached to the system. + +The buttons to enable and disable the wireless transmitters are important in situations where the user is for example using his laptop on a location where -wireless radios _must_ be disabled (e.g. airplanes). -Because of this requirement, userspace support for the keys should not be -made mandatory. Because userspace might want to perform some additional smarter -tasks when the key is pressed, rfkill still provides userspace the possibility -to take over the task to handle the key events. +radio-frequency transmitters _must_ be disabled (e.g. airplanes). + +Because of this requirement, userspace support for the keys should not be made +mandatory. Because userspace might want to perform some additional smarter +tasks when the key is pressed, rfkill provides userspace the possibility to +take over the task to handle the key events. + +=============================================================================== +2: Implementation details + +The rfkill subsystem is composed of various components: the rfkill class, the +rfkill-input module (an input layer handler), and some specific input layer +events. + +The rfkill class provides kernel drivers with an interface that allows them to +know when they should enable or disable a wireless network device transmitter. +This is enabled by the CONFIG_RFKILL Kconfig option. + +The rfkill class support makes sure userspace will be notified of all state +changes on rfkill devices through uevents. It provides a notification chain +for interested parties in the kernel to also get notified of rfkill state +changes in other drivers. It creates several sysfs entries which can be used +by userspace. See section "Userspace support". + +The rfkill-input module provides the kernel with the ability to implement a +basic response when the user presses a key or button (or toggles a switch) +related to rfkill functionality. It is an in-kernel implementation of default +policy of reacting to rfkill-related input events and neither mandatory nor +required for wireless drivers to operate. It is enabled by the +CONFIG_RFKILL_INPUT Kconfig option. + +rfkill-input is a rfkill-related events input layer handler. This handler will +listen to all rfkill key events and will change the rfkill state of the +wireless devices accordingly. With this option enabled userspace could either +do nothing or simply perform monitoring tasks. + +The rfkill-input module also provides EPO (emergency power-off) functionality +for all wireless transmitters. This function cannot be overridden, and it is +always active. rfkill EPO is related to *_RFKILL_ALL input layer events. + + +Important terms for the rfkill subsystem: + +In order to avoid confusion, we avoid the term "switch" in rfkill when it is +referring to an electronic control circuit that enables or disables a +transmitter. We reserve it for the physical device a human manipulates +(which is an input device, by the way): + +rfkill switch: + + A physical device a human manipulates. Its state can be perceived by + the kernel either directly (through a GPIO pin, ACPI GPE) or by its + effect on a rfkill line of a wireless device. + +rfkill controller: + + A hardware circuit that controls the state of a rfkill line, which a + kernel driver can interact with *to modify* that state (i.e. it has + either write-only or read/write access). + +rfkill line: + + An input channel (hardware or software) of a wireless device, which + causes a wireless transmitter to stop emitting energy (BLOCK) when it + is active. Point of view is extremely important here: rfkill lines are + always seen from the PoV of a wireless device (and its driver). + +soft rfkill line/software rfkill line: + + A rfkill line the wireless device driver can directly change the state + of. Related to rfkill_state RFKILL_STATE_SOFT_BLOCKED. + +hard rfkill line/hardware rfkill line: + + A rfkill line that works fully in hardware or firmware, and that cannot + be overridden by the kernel driver. The hardware device or the + firmware just exports its status to the driver, but it is read-only. + Related to rfkill_state RFKILL_STATE_HARD_BLOCKED. + +The enum rfkill_state describes the rfkill state of a transmitter: + +When a rfkill line or rfkill controller is in the RFKILL_STATE_UNBLOCKED state, +the wireless transmitter (radio TX circuit for example) is *enabled*. When the +it is in the RFKILL_STATE_SOFT_BLOCKED or RFKILL_STATE_HARD_BLOCKED, the +wireless transmitter is to be *blocked* from operating. + +RFKILL_STATE_SOFT_BLOCKED indicates that a call to toggle_radio() can change +that state. RFKILL_STATE_HARD_BLOCKED indicates that a call to toggle_radio() +will not be able to change the state and will return with a suitable error if +attempts are made to set the state to RFKILL_STATE_UNBLOCKED. + +RFKILL_STATE_HARD_BLOCKED is used by drivers to signal that the device is +locked in the BLOCKED state by a hardwire rfkill line (typically an input pin +that, when active, forces the transmitter to be disabled) which the driver +CANNOT override. + +Full rfkill functionality requires two different subsystems to cooperate: the +input layer and the rfkill class. The input layer issues *commands* to the +entire system requesting that devices registered to the rfkill class change +state. The way this interaction happens is not complex, but it is not obvious +either: + +Kernel Input layer: + + * Generates KEY_WWAN, KEY_WLAN, KEY_BLUETOOTH, SW_RFKILL_ALL, and + other such events when the user presses certain keys, buttons, or + toggles certain physical switches. + + THE INPUT LAYER IS NEVER USED TO PROPAGATE STATUS, NOTIFICATIONS OR THE + KIND OF STUFF AN ON-SCREEN-DISPLAY APPLICATION WOULD REPORT. It is + used to issue *commands* for the system to change behaviour, and these + commands may or may not be carried out by some kernel driver or + userspace application. It follows that doing user feedback based only + on input events is broken, as there is no guarantee that an input event + will be acted upon. + + Most wireless communication device drivers implementing rfkill + functionality MUST NOT generate these events, and have no reason to + register themselves with the input layer. Doing otherwise is a common + misconception. There is an API to propagate rfkill status change + information, and it is NOT the input layer. + +rfkill class: + + * Calls a hook in a driver to effectively change the wireless + transmitter state; + * Keeps track of the wireless transmitter state (with help from + the driver); + * Generates userspace notifications (uevents) and a call to a + notification chain (kernel) when there is a wireless transmitter + state change; + * Connects a wireless communications driver with the common rfkill + control system, which, for example, allows actions such as + "switch all bluetooth devices offline" to be carried out by + userspace or by rfkill-input. + + THE RFKILL CLASS NEVER ISSUES INPUT EVENTS. THE RFKILL CLASS DOES + NOT LISTEN TO INPUT EVENTS. NO DRIVER USING THE RFKILL CLASS SHALL + EVER LISTEN TO, OR ACT ON RFKILL INPUT EVENTS. Doing otherwise is + a layering violation. + + Most wireless data communication drivers in the kernel have just to + implement the rfkill class API to work properly. Interfacing to the + input layer is not often required (and is very often a *bug*) on + wireless drivers. + + Platform drivers often have to attach to the input layer to *issue* + (but never to listen to) rfkill events for rfkill switches, and also to + the rfkill class to export a control interface for the platform rfkill + controllers to the rfkill subsystem. This does NOT mean the rfkill + switch is attached to a rfkill class (doing so is almost always wrong). + It just means the same kernel module is the driver for different + devices (rfkill switches and rfkill controllers). + + +Userspace input handlers (uevents) or kernel input handlers (rfkill-input): + + * Implements the policy of what should happen when one of the input + layer events related to rfkill operation is received. + * Uses the sysfs interface (userspace) or private rfkill API calls + to tell the devices registered with the rfkill class to change + their state (i.e. translates the input layer event into real + action). + * rfkill-input implements EPO by handling EV_SW SW_RFKILL_ALL 0 + (power off all transmitters) in a special way: it ignores any + overrides and local state cache and forces all transmitters to the + RFKILL_STATE_SOFT_BLOCKED state (including those which are already + supposed to be BLOCKED). Note that the opposite event (power on all + transmitters) is handled normally. + +Userspace uevent handler or kernel platform-specific drivers hooked to the +rfkill notifier chain: + + * Taps into the rfkill notifier chain or to KOBJ_CHANGE uevents, + in order to know when a device that is registered with the rfkill + class changes state; + * Issues feedback notifications to the user; + * In the rare platforms where this is required, synthesizes an input + event to command all *OTHER* rfkill devices to also change their + statues when a specific rfkill device changes state. + + +=============================================================================== +3: Kernel driver guidelines + +Remember: point-of-view is everything for a driver that connects to the rfkill +subsystem. All the details below must be measured/perceived from the point of +view of the specific driver being modified. + +The first thing one needs to know is whether his driver should be talking to +the rfkill class or to the input layer. In rare cases (platform drivers), it +could happen that you need to do both, as platform drivers often handle a +variety of devices in the same driver. + +Do not mistake input devices for rfkill controllers. The only type of "rfkill +switch" device that is to be registered with the rfkill class are those +directly controlling the circuits that cause a wireless transmitter to stop +working (or the software equivalent of them), i.e. what we call a rfkill +controller. Every other kind of "rfkill switch" is just an input device and +MUST NOT be registered with the rfkill class. + +A driver should register a device with the rfkill class when ALL of the +following conditions are met (they define a rfkill controller): + +1. The device is/controls a data communications wireless transmitter; + +2. The kernel can interact with the hardware/firmware to CHANGE the wireless + transmitter state (block/unblock TX operation); + +3. The transmitter can be made to not emit any energy when "blocked": + rfkill is not about blocking data transmissions, it is about blocking + energy emission; + +A driver should register a device with the input subsystem to issue +rfkill-related events (KEY_WLAN, KEY_BLUETOOTH, KEY_WWAN, KEY_WIMAX, +SW_RFKILL_ALL, etc) when ALL of the folowing conditions are met: + +1. It is directly related to some physical device the user interacts with, to + command the O.S./firmware/hardware to enable/disable a data communications + wireless transmitter. + + Examples of the physical device are: buttons, keys and switches the user + will press/touch/slide/switch to enable or disable the wireless + communication device. + +2. It is NOT slaved to another device, i.e. there is no other device that + issues rfkill-related input events in preference to this one. -The system inside the kernel has been split into 2 separate sections: - 1 - RFKILL - 2 - RFKILL_INPUT + Please refer to the corner cases and examples section for more details. -The first option enables rfkill support and will make sure userspace will -be notified of any events through the input device. It also creates several -sysfs entries which can be used by userspace. See section "Userspace support". +When in doubt, do not issue input events. For drivers that should generate +input events in some platforms, but not in others (e.g. b43), the best solution +is to NEVER generate input events in the first place. That work should be +deferred to a platform-specific kernel module (which will know when to generate +events through the rfkill notifier chain) or to userspace. This avoids the +usual maintenance problems with DMI whitelisting. -The second option provides an rfkill input handler. This handler will -listen to all rfkill key events and will toggle the radio accordingly. -With this option enabled userspace could either do nothing or simply -perform monitoring tasks. +Corner cases and examples: ==================================== -2: Driver support -To build a driver with rfkill subsystem support, the driver should -depend on the Kconfig symbol RFKILL; it should _not_ depend on -RKFILL_INPUT. +1. If the device is an input device that, because of hardware or firmware, +causes wireless transmitters to be blocked regardless of the kernel's will, it +is still just an input device, and NOT to be registered with the rfkill class. -Unless key events trigger an interrupt to which the driver listens, polling -will be required to determine the key state changes. For this the input -layer providers the input-polldev handler. +2. If the wireless transmitter switch control is read-only, it is an input +device and not to be registered with the rfkill class (and maybe not to be made +an input layer event source either, see below). -A driver should implement a few steps to correctly make use of the -rfkill subsystem. First for non-polling drivers: +3. If there is some other device driver *closer* to the actual hardware the +user interacted with (the button/switch/key) to issue an input event, THAT is +the device driver that should be issuing input events. - - rfkill_allocate() - - input_allocate_device() - - rfkill_register() - - input_register_device() +E.g: + [RFKILL slider switch] -- [GPIO hardware] -- [WLAN card rf-kill input] + (platform driver) (wireless card driver) + +The user is closer to the RFKILL slide switch plaform driver, so the driver +which must issue input events is the platform driver looking at the GPIO +hardware, and NEVER the wireless card driver (which is just a slave). It is +very likely that there are other leaves than just the WLAN card rf-kill input +(e.g. a bluetooth card, etc)... + +On the other hand, some embedded devices do this: + + [RFKILL slider switch] -- [WLAN card rf-kill input] + (wireless card driver) + +In this situation, the wireless card driver *could* register itself as an input +device and issue rf-kill related input events... but in order to AVOID the need +for DMI whitelisting, the wireless card driver does NOT do it. Userspace (HAL) +or a platform driver (that exists only on these embedded devices) will do the +dirty job of issuing the input events. + + +COMMON MISTAKES in kernel drivers, related to rfkill: +==================================== + +1. NEVER confuse input device keys and buttons with input device switches. + + 1a. Switches are always set or reset. They report the current state + (on position or off position). + + 1b. Keys and buttons are either in the pressed or not-pressed state, and + that's it. A "button" that latches down when you press it, and + unlatches when you press it again is in fact a switch as far as input + devices go. + +Add the SW_* events you need for switches, do NOT try to emulate a button using +KEY_* events just because there is no such SW_* event yet. Do NOT try to use, +for example, KEY_BLUETOOTH when you should be using SW_BLUETOOTH instead. + +2. Input device switches (sources of EV_SW events) DO store their current state +(so you *must* initialize it by issuing a gratuitous input layer event on +driver start-up and also when resuming from sleep), and that state CAN be +queried from userspace through IOCTLs. There is no sysfs interface for this, +but that doesn't mean you should break things trying to hook it to the rfkill +class to get a sysfs interface :-) + +3. Do not issue *_RFKILL_ALL events by default, unless you are sure it is the +correct event for your switch/button. These events are emergency power-off +events when they are trying to turn the transmitters off. An example of an +input device which SHOULD generate *_RFKILL_ALL events is the wireless-kill +switch in a laptop which is NOT a hotkey, but a real switch that kills radios +in hardware, even if the O.S. has gone to lunch. An example of an input device +which SHOULD NOT generate *_RFKILL_ALL events by default, is any sort of hot +key that does nothing by itself, as well as any hot key that is type-specific +(e.g. the one for WLAN). + + +3.1 Guidelines for wireless device drivers +------------------------------------------ + +1. Each independent transmitter in a wireless device (usually there is only one +transmitter per device) should have a SINGLE rfkill class attached to it. + +2. If the device does not have any sort of hardware assistance to allow the +driver to rfkill the device, the driver should emulate it by taking all actions +required to silence the transmitter. + +3. If it is impossible to silence the transmitter (i.e. it still emits energy, +even if it is just in brief pulses, when there is no data to transmit and there +is no hardware support to turn it off) do NOT lie to the users. Do not attach +it to a rfkill class. The rfkill subsystem does not deal with data +transmission, it deals with energy emission. If the transmitter is emitting +energy, it is not blocked in rfkill terms. + +4. It doesn't matter if the device has multiple rfkill input lines affecting +the same transmitter, their combined state is to be exported as a single state +per transmitter (see rule 1). + +This rule exists because users of the rfkill subsystem expect to get (and set, +when possible) the overall transmitter rfkill state, not of a particular rfkill +line. + +Example of a WLAN wireless driver connected to the rfkill subsystem: +-------------------------------------------------------------------- + +A certain WLAN card has one input pin that causes it to block the transmitter +and makes the status of that input pin available (only for reading!) to the +kernel driver. This is a hard rfkill input line (it cannot be overridden by +the kernel driver). + +The card also has one PCI register that, if manipulated by the driver, causes +it to block the transmitter. This is a soft rfkill input line. + +It has also a thermal protection circuitry that shuts down its transmitter if +the card overheats, and makes the status of that protection available (only for +reading!) to the kernel driver. This is also a hard rfkill input line. + +If either one of these rfkill lines are active, the transmitter is blocked by +the hardware and forced offline. + +The driver should allocate and attach to its struct device *ONE* instance of +the rfkill class (there is only one transmitter). + +It can implement the get_state() hook, and return RFKILL_STATE_HARD_BLOCKED if +either one of its two hard rfkill input lines are active. If the two hard +rfkill lines are inactive, it must return RFKILL_STATE_SOFT_BLOCKED if its soft +rfkill input line is active. Only if none of the rfkill input lines are +active, will it return RFKILL_STATE_UNBLOCKED. -For polling drivers: +If it doesn't implement the get_state() hook, it must make sure that its calls +to rfkill_force_state() are enough to keep the status always up-to-date, and it +must do a rfkill_force_state() on resume from sleep. +Every time the driver gets a notification from the card that one of its rfkill +lines changed state (polling might be needed on badly designed cards that don't +generate interrupts for such events), it recomputes the rfkill state as per +above, and calls rfkill_force_state() to update it. + +The driver should implement the toggle_radio() hook, that: + +1. Returns an error if one of the hardware rfkill lines are active, and the +caller asked for RFKILL_STATE_UNBLOCKED. + +2. Activates the soft rfkill line if the caller asked for state +RFKILL_STATE_SOFT_BLOCKED. It should do this even if one of the hard rfkill +lines are active, effectively double-blocking the transmitter. + +3. Deactivates the soft rfkill line if none of the hardware rfkill lines are +active and the caller asked for RFKILL_STATE_UNBLOCKED. + +=============================================================================== +4: Kernel API + +To build a driver with rfkill subsystem support, the driver should depend on +(or select) the Kconfig symbol RFKILL; it should _not_ depend on RKFILL_INPUT. + +The hardware the driver talks to may be write-only (where the current state +of the hardware is unknown), or read-write (where the hardware can be queried +about its current state). + +The rfkill class will call the get_state hook of a device every time it needs +to know the *real* current state of the hardware. This can happen often. + +Some hardware provides events when its status changes. In these cases, it is +best for the driver to not provide a get_state hook, and instead register the +rfkill class *already* with the correct status, and keep it updated using +rfkill_force_state() when it gets an event from the hardware. + +There is no provision for a statically-allocated rfkill struct. You must +use rfkill_allocate() to allocate one. + +You should: - rfkill_allocate() - - input_allocate_polled_device() + - modify rfkill fields (flags, name) + - modify state to the current hardware state (THIS IS THE ONLY TIME + YOU CAN ACCESS state DIRECTLY) - rfkill_register() - - input_register_polled_device() -When a key event has been detected, the correct event should be -sent over the input device which has been registered by the driver. +The only way to set a device to the RFKILL_STATE_HARD_BLOCKED state is through +a suitable return of get_state() or through rfkill_force_state(). -==================================== -3: Userspace support +When a device is in the RFKILL_STATE_HARD_BLOCKED state, the only way to switch +it to a different state is through a suitable return of get_state() or through +rfkill_force_state(). + +If toggle_radio() is called to set a device to state RFKILL_STATE_SOFT_BLOCKED +when that device is already at the RFKILL_STATE_HARD_BLOCKED state, it should +not return an error. Instead, it should try to double-block the transmitter, +so that its state will change from RFKILL_STATE_HARD_BLOCKED to +RFKILL_STATE_SOFT_BLOCKED should the hardware blocking cease. -For each key an input device will be created which will send out the correct -key event when the rfkill key has been pressed. +Please refer to the source for more documentation. + +=============================================================================== +5: Userspace support + +rfkill devices issue uevents (with an action of "change"), with the following +environment variables set: + +RFKILL_NAME +RFKILL_STATE +RFKILL_TYPE + +The ABI for these variables is defined by the sysfs attributes. It is best +to take a quick look at the source to make sure of the possible values. + +It is expected that HAL will trap those, and bridge them to DBUS, etc. These +events CAN and SHOULD be used to give feedback to the user about the rfkill +status of the system. + +Input devices may issue events that are related to rfkill. These are the +various KEY_* events and SW_* events supported by rfkill-input.c. + +******IMPORTANT****** +When rfkill-input is ACTIVE, userspace is NOT TO CHANGE THE STATE OF AN RFKILL +SWITCH IN RESPONSE TO AN INPUT EVENT also handled by rfkill-input, unless it +has set to true the user_claim attribute for that particular switch. This rule +is *absolute*; do NOT violate it. +******IMPORTANT****** + +Userspace must not assume it is the only source of control for rfkill switches. +Their state CAN and WILL change due to firmware actions, direct user actions, +and the rfkill-input EPO override for *_RFKILL_ALL. + +When rfkill-input is not active, userspace must initiate a rfkill status +change by writing to the "state" attribute in order for anything to happen. + +Take particular care to implement EV_SW SW_RFKILL_ALL properly. When that +switch is set to OFF, *every* rfkill device *MUST* be immediately put into the +RFKILL_STATE_SOFT_BLOCKED state, no questions asked. The following sysfs entries will be created: name: Name assigned by driver to this key (interface or driver name). type: Name of the key type ("wlan", "bluetooth", etc). - state: Current state of the key. 1: On, 0: Off. + state: Current state of the transmitter + 0: RFKILL_STATE_SOFT_BLOCKED + transmitter is forced off, but one can override it + by a write to the state attribute; + 1: RFKILL_STATE_UNBLOCKED + transmiter is NOT forced off, and may operate if + all other conditions for such operation are met + (such as interface is up and configured, etc); + 2: RFKILL_STATE_HARD_BLOCKED + transmitter is forced off by something outside of + the driver's control. One cannot set a device to + this state through writes to the state attribute; claim: 1: Userspace handles events, 0: Kernel handles events Both the "state" and "claim" entries are also writable. For the "state" entry -this means that when 1 or 0 is written all radios, not yet in the requested -state, will be will be toggled accordingly. +this means that when 1 or 0 is written, the device rfkill state (if not yet in +the requested state), will be will be toggled accordingly. + For the "claim" entry writing 1 to it means that the kernel no longer handles key events even though RFKILL_INPUT input was enabled. When "claim" has been set to 0, userspace should make sure that it listens for the input events or -check the sysfs "state" entry regularly to correctly perform the required -tasks when the rkfill key is pressed. +check the sysfs "state" entry regularly to correctly perform the required tasks +when the rkfill key is pressed. + +A note about input devices and EV_SW events: + +In order to know the current state of an input device switch (like +SW_RFKILL_ALL), you will need to use an IOCTL. That information is not +available through sysfs in a generic way at this time, and it is not available +through the rfkill class AT ALL. diff --git a/Documentation/s390/driver-model.txt b/Documentation/s390/driver-model.txt index e938c442277dc0ecd1b05002ba9167abbedd914c..bde473df748dc95ca903bcadd2155a7def8ed4c4 100644 --- a/Documentation/s390/driver-model.txt +++ b/Documentation/s390/driver-model.txt @@ -25,7 +25,7 @@ device 4711 via subchannel 1 in subchannel set 0, and subchannel 2 is a non-I/O subchannel. Device 1234 is accessed via subchannel 0 in subchannel set 1. The subchannel named 'defunct' does not represent any real subchannel on the -system; it is a pseudo subchannel where disconnnected ccw devices are moved to +system; it is a pseudo subchannel where disconnected ccw devices are moved to if they are displaced by another ccw device becoming operational on their former subchannel. The ccw devices will be moved again to a proper subchannel if they become operational again on that subchannel. diff --git a/Documentation/scheduler/sched-domains.txt b/Documentation/scheduler/sched-domains.txt index a9e990ab980fa1cedfd480866645226c4c0055c2..373ceacc367eb9a98cb6bbcad6f7ea4e83c21982 100644 --- a/Documentation/scheduler/sched-domains.txt +++ b/Documentation/scheduler/sched-domains.txt @@ -61,10 +61,7 @@ builder by #define'ing ARCH_HASH_SCHED_DOMAIN, and exporting your arch_init_sched_domains function. This function will attach domains to all CPUs using cpu_attach_domain. -Implementors should change the line -#undef SCHED_DOMAIN_DEBUG -to -#define SCHED_DOMAIN_DEBUG -in kernel/sched.c as this enables an error checking parse of the sched domains +The sched-domains debugging infrastructure can be enabled by enabling +CONFIG_SCHED_DEBUG. This enables an error checking parse of the sched domains which should catch most possible errors (described above). It also prints out the domain structure in a visual format. diff --git a/Documentation/scheduler/sched-rt-group.txt b/Documentation/scheduler/sched-rt-group.txt index 14f901f639ee3df948a5d4cf9b10b802c7e3f310..3ef339f491e09058e37659f0bf96c52022b5dec7 100644 --- a/Documentation/scheduler/sched-rt-group.txt +++ b/Documentation/scheduler/sched-rt-group.txt @@ -51,9 +51,9 @@ needs only about 3% CPU time to do so, it can do with a 0.03 * 0.005s = 0.00015s. So this group can be scheduled with a period of 0.005s and a run time of 0.00015s. -The remaining CPU time will be used for user input and other tass. Because +The remaining CPU time will be used for user input and other tasks. Because realtime tasks have explicitly allocated the CPU time they need to perform -their tasks, buffer underruns in the graphocs or audio can be eliminated. +their tasks, buffer underruns in the graphics or audio can be eliminated. NOTE: the above example is not fully implemented as of yet (2.6.25). We still lack an EDF scheduler to make non-uniform periods usable. diff --git a/Documentation/scsi/aacraid.txt b/Documentation/scsi/aacraid.txt index d16011a8618eab462e1a05dbd37a5ee7a141b1c6..709ca991a451a61cef85ac519805f3e864a453cb 100644 --- a/Documentation/scsi/aacraid.txt +++ b/Documentation/scsi/aacraid.txt @@ -56,19 +56,33 @@ Supported Cards/Chipsets 9005:0285:9005:02d1 Adaptec 5405 (Voodoo40) 9005:0285:15d9:02d2 SMC AOC-USAS-S8i-LP 9005:0285:15d9:02d3 SMC AOC-USAS-S8iR-LP - 9005:0285:9005:02d4 Adaptec 2045 (Voodoo04 Lite) - 9005:0285:9005:02d5 Adaptec 2405 (Voodoo40 Lite) - 9005:0285:9005:02d6 Adaptec 2445 (Voodoo44 Lite) - 9005:0285:9005:02d7 Adaptec 2805 (Voodoo80 Lite) + 9005:0285:9005:02d4 Adaptec ASR-2045 (Voodoo04 Lite) + 9005:0285:9005:02d5 Adaptec ASR-2405 (Voodoo40 Lite) + 9005:0285:9005:02d6 Adaptec ASR-2445 (Voodoo44 Lite) + 9005:0285:9005:02d7 Adaptec ASR-2805 (Voodoo80 Lite) + 9005:0285:9005:02d8 Adaptec 5405G (Voodoo40 PM) + 9005:0285:9005:02d9 Adaptec 5445G (Voodoo44 PM) + 9005:0285:9005:02da Adaptec 5805G (Voodoo80 PM) + 9005:0285:9005:02db Adaptec 5085G (Voodoo08 PM) + 9005:0285:9005:02dc Adaptec 51245G (Voodoo124 PM) + 9005:0285:9005:02dd Adaptec 51645G (Voodoo164 PM) + 9005:0285:9005:02de Adaptec 52445G (Voodoo244 PM) + 9005:0285:9005:02df Adaptec ASR-2045G (Voodoo04 Lite PM) + 9005:0285:9005:02e0 Adaptec ASR-2405G (Voodoo40 Lite PM) + 9005:0285:9005:02e1 Adaptec ASR-2445G (Voodoo44 Lite PM) + 9005:0285:9005:02e2 Adaptec ASR-2805G (Voodoo80 Lite PM) 1011:0046:9005:0364 Adaptec 5400S (Mustang) + 1011:0046:9005:0365 Adaptec 5400S (Mustang) 9005:0287:9005:0800 Adaptec Themisto (Jupiter) 9005:0200:9005:0200 Adaptec Themisto (Jupiter) 9005:0286:9005:0800 Adaptec Callisto (Jupiter) 1011:0046:9005:1364 Dell PERC 2/QC (Quad Channel, Mustang) + 1011:0046:9005:1365 Dell PERC 2/QC (Quad Channel, Mustang) 1028:0001:1028:0001 Dell PERC 2/Si (Iguana) 1028:0003:1028:0003 Dell PERC 3/Si (SlimFast) 1028:0002:1028:0002 Dell PERC 3/Di (Opal) - 1028:0004:1028:0004 Dell PERC 3/DiF (Iguana) + 1028:0004:1028:0004 Dell PERC 3/SiF (Iguana) + 1028:0004:1028:00d0 Dell PERC 3/DiF (Iguana) 1028:0002:1028:00d1 Dell PERC 3/DiV (Viper) 1028:0002:1028:00d9 Dell PERC 3/DiL (Lexus) 1028:000a:1028:0106 Dell PERC 3/DiJ (Jaguar) diff --git a/Documentation/scsi/ibmmca.txt b/Documentation/scsi/ibmmca.txt index a810421f1fb3dfab2e256bcb097db6b1fbc484d9..3920f28710c4fcd224fee28bc6959dc192346829 100644 --- a/Documentation/scsi/ibmmca.txt +++ b/Documentation/scsi/ibmmca.txt @@ -524,7 +524,7 @@ - Michael Lang June 25 1997: (v1.8b) - 1) Some cosmetical changes for the handling of SCSI-device-types. + 1) Some cosmetic changes for the handling of SCSI-device-types. Now, also CD-Burners / WORMs and SCSI-scanners should work. For MO-drives I have no experience, therefore not yet supported. In logical_devices I changed from different type-variables to one @@ -914,7 +914,7 @@ in version 4.0. This was never really necessary, as all troubles were based on non-command related reasons up to now, so bypassing commands did not help to avoid any bugs. It is kept in 3.2X for debugging reasons. - 5) Dynamical reassignment of ldns was again verified and analyzed to be + 5) Dynamic reassignment of ldns was again verified and analyzed to be completely inoperational. This is corrected and should work now. 6) All commands that get sent to the SCSI adapter were verified and completed in such a way, that they are now completely conform to the @@ -1386,7 +1386,7 @@ concerning the Linux-kernel in special, this SCSI-driver comes without any warranty. Its functionality is tested as good as possible on certain machines and combinations of computer hardware, which does not exclude, - that dataloss or severe damage of hardware is possible while using this + that data loss or severe damage of hardware is possible while using this part of software on some arbitrary computer hardware or in combination with other software packages. It is highly recommended to make backup copies of your data before using this software. Furthermore, personal diff --git a/Documentation/scsi/lpfc.txt b/Documentation/scsi/lpfc.txt index 4dbe41370a6d6056657da648d20dd7d18576d15d..5741ea8aa88a9e23b495819249fddad5e6c3def0 100644 --- a/Documentation/scsi/lpfc.txt +++ b/Documentation/scsi/lpfc.txt @@ -36,7 +36,7 @@ Cable pull and temporary device Loss: being removed, a switch rebooting, or a device reboot), the driver could hide the disappearance of the device from the midlayer. I/O's issued to the LLDD would simply be queued for a short duration, allowing the device - to reappear or link come back alive, with no inadvertant side effects + to reappear or link come back alive, with no inadvertent side effects to the system. If the driver did not hide these conditions, i/o would be errored by the driver, the mid-layer would exhaust its retries, and the device would be taken offline. Manual intervention would be required to diff --git a/Documentation/scsi/scsi_fc_transport.txt b/Documentation/scsi/scsi_fc_transport.txt index d403e46d8463e14fecfd6fc105a119608692d207..75143f0c23b685f95292c2764172350adacafcc8 100644 --- a/Documentation/scsi/scsi_fc_transport.txt +++ b/Documentation/scsi/scsi_fc_transport.txt @@ -65,7 +65,7 @@ Overview: discussion will concentrate on NPIV. Note: World Wide Name assignment (and uniqueness guarantees) are left - up to an administrative entity controling the vport. For example, + up to an administrative entity controlling the vport. For example, if vports are to be associated with virtual machines, a XEN mgmt utility would be responsible for creating wwpn/wwnn's for the vport, using it's own naming authority and OUI. (Note: it already does this @@ -91,7 +91,7 @@ Device Trees and Vport Objects: Here's what to expect in the device tree : The typical Physical Port's Scsi_Host: /sys/devices/.../host17/ - and it has the typical decendent tree: + and it has the typical descendant tree: /sys/devices/.../host17/rport-17:0-0/target17:0:0/17:0:0:0: and then the vport is created on the Physical Port: /sys/devices/.../host17/vport-17:0-0 @@ -192,7 +192,7 @@ Vport States: independent of the adapter's link state. - Instantiation of the vport on the FC link via ELS traffic, etc. This is equivalent to a "link up" and successfull link initialization. - Futher information can be found in the interfaces section below for + Further information can be found in the interfaces section below for Vport Creation. Once a vport has been instantiated with the kernel/LLDD, a vport state diff --git a/Documentation/serial/driver b/Documentation/serial/driver index 88ad615dd338d75e2b282422c8f2d6f7f3af80b7..77ba0afbe4db2c227650441af43ab3c57f2e5a6f 100644 --- a/Documentation/serial/driver +++ b/Documentation/serial/driver @@ -186,6 +186,17 @@ hardware. Locking: port_sem taken. Interrupts: caller dependent. + flush_buffer(port) + Flush any write buffers, reset any DMA state and stop any + ongoing DMA transfers. + + This will be called whenever the port->info->xmit circular + buffer is cleared. + + Locking: port->lock taken. + Interrupts: locally disabled. + This call must not sleep + set_termios(port,termios,oldtermios) Change the port parameters, including word length, parity, stop bits. Update read_status_mask and ignore_status_mask to indicate diff --git a/Documentation/sh/clk.txt b/Documentation/sh/clk.txt index 9aef710e9a4b5aa881fa6574ee3fcf9c2406c79f..114b595cfa978a2d17c1cced940043732d7fe333 100644 --- a/Documentation/sh/clk.txt +++ b/Documentation/sh/clk.txt @@ -12,7 +12,7 @@ means no changes to adjanced clock Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method, if it is present in ops structure. The method should set the clock rate and adjust all needed clocks according to the passed algo_id. -Exact values for algo_id are machine-dependend. For the sh7722, the following +Exact values for algo_id are machine-dependent. For the sh7722, the following values are defined: NO_CHANGE = 0, diff --git a/Documentation/sound/alsa/ALSA-Configuration.txt b/Documentation/sound/alsa/ALSA-Configuration.txt index 0bbee38acd263f6e88605ac71e3bd12c8ca3bf70..6f6d117ac7e22cd2d9fc981f0fc8542d824d1db8 100644 --- a/Documentation/sound/alsa/ALSA-Configuration.txt +++ b/Documentation/sound/alsa/ALSA-Configuration.txt @@ -753,8 +753,11 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. [Multiple options for each card instance] model - force the model name - position_fix - Fix DMA pointer (0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size) + position_fix - Fix DMA pointer (0 = auto, 1 = use LPIB, 2 = POSBUF) probe_mask - Bitmask to probe codecs (default = -1, meaning all slots) + bdl_pos_adj - Specifies the DMA IRQ timing delay in samples. + Passing -1 will make the driver to choose the appropriate + value based on the controller chip. [Single (global) options] single_cmd - Use single immediate commands to communicate with @@ -845,7 +848,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. ALC269 basic Basic preset - ALC662 + ALC662/663 3stack-dig 3-stack (2-channel) with SPDIF 3stack-6ch 3-stack (6-channel) 3stack-6ch-dig 3-stack (6-channel) with SPDIF @@ -853,6 +856,10 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. lenovo-101e Lenovo laptop eeepc-p701 ASUS Eeepc P701 eeepc-ep20 ASUS Eeepc EP20 + m51va ASUS M51VA + g71v ASUS G71V + h13 ASUS H13 + g50v ASUS G50V auto auto-config reading BIOS (default) ALC882/885 @@ -1017,6 +1024,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. intel-mac-v3 Intel Mac Type 3 intel-mac-v4 Intel Mac Type 4 intel-mac-v5 Intel Mac Type 5 + intel-mac-auto Intel Mac (detect type according to subsystem id) macmini Intel Mac Mini (equivalent with type 3) macbook Intel Mac Book (eq. type 5) macbook-pro-v1 Intel Mac Book Pro 1st generation (eq. type 3) @@ -1091,7 +1099,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. This occurs when the access to non-existing or non-working codec slot (likely a modem one) causes a stall of the communication via HD-audio bus. You can see which codec slots are probed by enabling - CONFIG_SND_DEBUG_DETECT, or simply from the file name of the codec + CONFIG_SND_DEBUG_VERBOSE, or simply from the file name of the codec proc files. Then limit the slots to probe by probe_mask option. For example, probe_mask=1 means to probe only the first slot, and probe_mask=4 means only the third slot. @@ -2267,6 +2275,10 @@ case above again, the first two slots are already reserved. If any other driver (e.g. snd-usb-audio) is loaded before snd-interwave or snd-ens1371, it will be assigned to the third or later slot. +When a module name is given with '!', the slot will be given for any +modules but that name. For example, "slots=!snd-pcsp" will reserve +the first slot for any modules but snd-pcsp. + ALSA PCM devices to OSS devices mapping ======================================= diff --git a/Documentation/sound/alsa/Audiophile-Usb.txt b/Documentation/sound/alsa/Audiophile-Usb.txt index 2ad5e6306c445bd369bb5346bf18da6156382bca..a4c53d8961e1ca1c57686ac9560bece125fed03a 100644 --- a/Documentation/sound/alsa/Audiophile-Usb.txt +++ b/Documentation/sound/alsa/Audiophile-Usb.txt @@ -236,15 +236,15 @@ The parameter can be given: alias snd-card-1 snd-usb-audio options snd-usb-audio index=1 device_setup=0x09 -CAUTION when initializaing the device +CAUTION when initializing the device ------------------------------------- * Correct initialization on the device requires that device_setup is given to the module BEFORE the device is turned on. So, if you use the "manual probing" method described above, take care to power-on the device AFTER this initialization. - * Failing to respect this will lead in a misconfiguration of the device. In this case - turn off the device, unproble the snd-usb-audio module, then probe it again with + * Failing to respect this will lead to a misconfiguration of the device. In this case + turn off the device, unprobe the snd-usb-audio module, then probe it again with correct device_setup parameter and then (and only then) turn on the device again. * If you've correctly initialized the device in a valid mode and then want to switch @@ -388,9 +388,9 @@ There are 2 main potential issues when using Jackd with the device: Jack supports big endian devices only in recent versions (thanks to Andreas Steinmetz for his first big-endian patch). I can't remember -extacly when this support was released into jackd, let's just say that +exactly when this support was released into jackd, let's just say that with jackd version 0.103.0 it's almost ok (just a small bug is affecting -16bits Big-Endian devices, but since you've read carefully the above +16bits Big-Endian devices, but since you've read carefully the above paragraphs, you're now using kernel >= 2.6.23 and your 16bits devices are now Little Endians ;-) ). diff --git a/Documentation/sound/alsa/DocBook/alsa-driver-api.tmpl b/Documentation/sound/alsa/DocBook/alsa-driver-api.tmpl index c4d2e3507af9187adb6a941f859fea9acff3ce61..9d644f7e241e43a0df46189ce3d5a678c0addcb0 100644 --- a/Documentation/sound/alsa/DocBook/alsa-driver-api.tmpl +++ b/Documentation/sound/alsa/DocBook/alsa-driver-api.tmpl @@ -42,7 +42,7 @@ Device Components !Esound/core/device.c - KMOD and Device File Entries + Module requests and Device File Entries !Esound/core/sound.c Memory Management Helpers diff --git a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl index b03df4d4795c6767b79bed4125b07bbdf64fc823..e13c4e67029f497899d4cbc545f67fd073d36e1f 100644 --- a/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl +++ b/Documentation/sound/alsa/DocBook/writing-an-alsa-driver.tmpl @@ -6127,8 +6127,8 @@ struct _snd_pcm_runtime { snd_printdd() is compiled in only when - CONFIG_SND_DEBUG_DETECT is set. Please note - that DEBUG_DETECT is not set as default + CONFIG_SND_DEBUG_VERBOSE is set. Please note + that CONFIG_SND_DEBUG_VERBOSE is not set as default even if you configure the alsa-driver with option. You need to give explicitly option instead. diff --git a/Documentation/sound/alsa/hda_codec.txt b/Documentation/sound/alsa/hda_codec.txt index 8e1b02526698c55da2c8da8964f480a108a53cb2..34e87ec1379c8e6af81d90608125628535ad107a 100644 --- a/Documentation/sound/alsa/hda_codec.txt +++ b/Documentation/sound/alsa/hda_codec.txt @@ -67,7 +67,7 @@ CONFIG_SND_HDA_POWER_SAVE kconfig. It's called when the codec needs to power up or may power down. The controller should check the all belonging codecs on the bus whether they are actually powered off (check codec->power_on), and optionally the driver may power down the -contoller side, too. +controller side, too. The bus instance is created via snd_hda_bus_new(). You need to pass the card instance, the template, and the pointer to store the diff --git a/Documentation/sound/alsa/soc/dapm.txt b/Documentation/sound/alsa/soc/dapm.txt index c784a18b94dce93bdcb064b2ef6670d450846bd5..b2ed6983f40d21483cfcbbd1e634533ca64e4115 100644 --- a/Documentation/sound/alsa/soc/dapm.txt +++ b/Documentation/sound/alsa/soc/dapm.txt @@ -68,7 +68,7 @@ Audio DAPM widgets fall into a number of types:- (Widgets are defined in include/sound/soc-dapm.h) Widgets are usually added in the codec driver and the machine driver. There are -convience macros defined in soc-dapm.h that can be used to quickly build a +convenience macros defined in soc-dapm.h that can be used to quickly build a list of widgets of the codecs and machines DAPM widgets. Most widgets have a name, register, shift and invert. Some widgets have extra diff --git a/Documentation/sparse.txt b/Documentation/sparse.txt index 1a3bdc27d95e98ce49c07791b02515e38ef678a5..42f43fa59f24c75c1f553dc5078f88b949302fd9 100644 --- a/Documentation/sparse.txt +++ b/Documentation/sparse.txt @@ -73,10 +73,10 @@ recompiled, or use "make C=2" to run sparse on the files whether they need to be recompiled or not. The latter is a fast way to check the whole tree if you have already built it. -The optional make variable CHECKFLAGS can be used to pass arguments to sparse. -The build system passes -Wbitwise to sparse automatically. To perform -endianness checks, you may define __CHECK_ENDIAN__: +The optional make variable CF can be used to pass arguments to sparse. The +build system passes -Wbitwise to sparse automatically. To perform endianness +checks, you may define __CHECK_ENDIAN__: - make C=2 CHECKFLAGS="-D__CHECK_ENDIAN__" + make C=2 CF="-D__CHECK_ENDIAN__" These checks are disabled by default as they generate a host of warnings. diff --git a/Documentation/specialix.txt b/Documentation/specialix.txt index 4a4b428ce8f67839cf3dd407c975d080f2c655f0..6eb6f3a3331c2656b69156b3c308308500b58d98 100644 --- a/Documentation/specialix.txt +++ b/Documentation/specialix.txt @@ -270,8 +270,8 @@ The pinout of the connectors on the IO8+ is: Hardware handshaking issues. ============================ -The driver can be compiled in two different ways. The default -("Specialix DTR/RTS pin is RTS" is off) the pin behaves as DTR when +The driver can be told to operate in two different ways. The default +behaviour is specialix.sx_rtscts = 0 where the pin behaves as DTR when hardware handshaking is off. It behaves as the RTS hardware handshaking signal when hardware handshaking is selected. @@ -280,7 +280,7 @@ cable will either be compatible with hardware handshaking or with software handshaking. So switching on the fly is not really an option. -I actually prefer to use the "Specialix DTR/RTS pin is RTS" option. +I actually prefer to use the "specialix.sx_rtscts=1" option. This makes the DTR/RTS pin always an RTS pin, and ioctls to change DTR are always ignored. I have a cable that is configured for this. @@ -379,7 +379,5 @@ it doesn't fit in your computer, bring back the card. You have to WRITE to the address register to even read-probe a CD186x register. Disable autodetection? -- Specialix: any suggestions? - - Arbitrary baud rates are not implemented yet. - If you need this, bug me about it. diff --git a/Documentation/sysctl/vm.txt b/Documentation/sysctl/vm.txt index 8a4863c4edd4c2463ac7fe5a5a492ac5156c9932..d79eeda7a699cbeb72ad0a03332388f8d8a68eeb 100644 --- a/Documentation/sysctl/vm.txt +++ b/Documentation/sysctl/vm.txt @@ -116,7 +116,7 @@ of kilobytes free. The VM uses this number to compute a pages_min value for each lowmem zone in the system. Each lowmem zone gets a number of reserved free pages based proportionally on its size. -Some minimal ammount of memory is needed to satisfy PF_MEMALLOC +Some minimal amount of memory is needed to satisfy PF_MEMALLOC allocations; if you set this to lower than 1024KB, your system will become subtly broken, and prone to deadlock under high loads. diff --git a/Documentation/sysfs-rules.txt b/Documentation/sysfs-rules.txt index 80ef562160bba8697c5623ee3b5fa9b4c163ab4a..6049a2a84dda2111b9c35c628665566e0153b254 100644 --- a/Documentation/sysfs-rules.txt +++ b/Documentation/sysfs-rules.txt @@ -3,9 +3,8 @@ Rules on how to access information in the Linux kernel sysfs The kernel-exported sysfs exports internal kernel implementation details and depends on internal kernel structures and layout. It is agreed upon by the kernel developers that the Linux kernel does not provide a stable -internal API. As sysfs is a direct export of kernel internal -structures, the sysfs interface cannot provide a stable interface either; -it may always change along with internal kernel changes. +internal API. Therefore, there are aspects of the sysfs interface that +may not be stable across kernel releases. To minimize the risk of breaking users of sysfs, which are in most cases low-level userspace applications, with a new kernel release, the users diff --git a/Documentation/telephony/ixj.txt b/Documentation/telephony/ixj.txt index 621024fd3a18e83d26b225a6b47ff2233c628ced..44d124005bad403bc22d4e09bb764393cd407beb 100644 --- a/Documentation/telephony/ixj.txt +++ b/Documentation/telephony/ixj.txt @@ -305,21 +305,14 @@ driver, like this: which will result in the needed drivers getting loaded automatically. - g. if you are planning on using kerneld to automatically load the -module for you, then you need to edit /etc/conf.modules and add the + g. if you are planning on having the kernel automatically request +the module for you, then you need to edit /etc/conf.modules and add the following lines: options ixj dspio=0x340 xio=0x330 ixjdebug=0 If you do this, then when you execute an application that uses the -module kerneld will load the module for you. Note that to do this, -you need to have your kernel set to support kerneld. You can check -for this by looking at /usr/src/linux/.config and you should see this: - - # Loadable module support - # - - CONFIG_KMOD=y +module the kernel will request that it is loaded. h. if you want non-root users to be able to read and write to the ixj devices (this is a good idea!) you should do the following: diff --git a/Documentation/timers/highres.txt b/Documentation/timers/highres.txt index a73ecf5b4bdb80c6b9977332d89b3eebc479e5c0..21332233cef16a157b95519640e356beadf2eeee 100644 --- a/Documentation/timers/highres.txt +++ b/Documentation/timers/highres.txt @@ -125,7 +125,7 @@ increase of flexibility and the avoidance of duplicated code across architectures justifies the slight increase of the binary size. The conversion of an architecture has no functional impact, but allows to -utilize the high resolution and dynamic tick functionalites without any change +utilize the high resolution and dynamic tick functionalities without any change to the clock event device and timer interrupt code. After the conversion the enabling of high resolution timers and dynamic ticks is simply provided by adding the kernel/time/Kconfig file to the architecture specific Kconfig and diff --git a/Documentation/tracers/mmiotrace.txt b/Documentation/tracers/mmiotrace.txt new file mode 100644 index 0000000000000000000000000000000000000000..a4afb560a45bfa9c7429f18d54d0f8b4c194b116 --- /dev/null +++ b/Documentation/tracers/mmiotrace.txt @@ -0,0 +1,164 @@ + In-kernel memory-mapped I/O tracing + + +Home page and links to optional user space tools: + + http://nouveau.freedesktop.org/wiki/MmioTrace + +MMIO tracing was originally developed by Intel around 2003 for their Fault +Injection Test Harness. In Dec 2006 - Jan 2007, using the code from Intel, +Jeff Muizelaar created a tool for tracing MMIO accesses with the Nouveau +project in mind. Since then many people have contributed. + +Mmiotrace was built for reverse engineering any memory-mapped IO device with +the Nouveau project as the first real user. Only x86 and x86_64 architectures +are supported. + +Out-of-tree mmiotrace was originally modified for mainline inclusion and +ftrace framework by Pekka Paalanen . + + +Preparation +----------- + +Mmiotrace feature is compiled in by the CONFIG_MMIOTRACE option. Tracing is +disabled by default, so it is safe to have this set to yes. SMP systems are +supported, but tracing is unreliable and may miss events if more than one CPU +is on-line, therefore mmiotrace takes all but one CPU off-line during run-time +activation. You can re-enable CPUs by hand, but you have been warned, there +is no way to automatically detect if you are losing events due to CPUs racing. + + +Usage Quick Reference +--------------------- + +$ mount -t debugfs debugfs /debug +$ echo mmiotrace > /debug/tracing/current_tracer +$ cat /debug/tracing/trace_pipe > mydump.txt & +Start X or whatever. +$ echo "X is up" > /debug/tracing/marker +$ echo none > /debug/tracing/current_tracer +Check for lost events. + + +Usage +----- + +Make sure debugfs is mounted to /debug. If not, (requires root privileges) +$ mount -t debugfs debugfs /debug + +Check that the driver you are about to trace is not loaded. + +Activate mmiotrace (requires root privileges): +$ echo mmiotrace > /debug/tracing/current_tracer + +Start storing the trace: +$ cat /debug/tracing/trace_pipe > mydump.txt & +The 'cat' process should stay running (sleeping) in the background. + +Load the driver you want to trace and use it. Mmiotrace will only catch MMIO +accesses to areas that are ioremapped while mmiotrace is active. + +[Unimplemented feature:] +During tracing you can place comments (markers) into the trace by +$ echo "X is up" > /debug/tracing/marker +This makes it easier to see which part of the (huge) trace corresponds to +which action. It is recommended to place descriptive markers about what you +do. + +Shut down mmiotrace (requires root privileges): +$ echo none > /debug/tracing/current_tracer +The 'cat' process exits. If it does not, kill it by issuing 'fg' command and +pressing ctrl+c. + +Check that mmiotrace did not lose events due to a buffer filling up. Either +$ grep -i lost mydump.txt +which tells you exactly how many events were lost, or use +$ dmesg +to view your kernel log and look for "mmiotrace has lost events" warning. If +events were lost, the trace is incomplete. You should enlarge the buffers and +try again. Buffers are enlarged by first seeing how large the current buffers +are: +$ cat /debug/tracing/trace_entries +gives you a number. Approximately double this number and write it back, for +instance: +$ echo 128000 > /debug/tracing/trace_entries +Then start again from the top. + +If you are doing a trace for a driver project, e.g. Nouveau, you should also +do the following before sending your results: +$ lspci -vvv > lspci.txt +$ dmesg > dmesg.txt +$ tar zcf pciid-nick-mmiotrace.tar.gz mydump.txt lspci.txt dmesg.txt +and then send the .tar.gz file. The trace compresses considerably. Replace +"pciid" and "nick" with the PCI ID or model name of your piece of hardware +under investigation and your nick name. + + +How Mmiotrace Works +------------------- + +Access to hardware IO-memory is gained by mapping addresses from PCI bus by +calling one of the ioremap_*() functions. Mmiotrace is hooked into the +__ioremap() function and gets called whenever a mapping is created. Mapping is +an event that is recorded into the trace log. Note, that ISA range mappings +are not caught, since the mapping always exists and is returned directly. + +MMIO accesses are recorded via page faults. Just before __ioremap() returns, +the mapped pages are marked as not present. Any access to the pages causes a +fault. The page fault handler calls mmiotrace to handle the fault. Mmiotrace +marks the page present, sets TF flag to achieve single stepping and exits the +fault handler. The instruction that faulted is executed and debug trap is +entered. Here mmiotrace again marks the page as not present. The instruction +is decoded to get the type of operation (read/write), data width and the value +read or written. These are stored to the trace log. + +Setting the page present in the page fault handler has a race condition on SMP +machines. During the single stepping other CPUs may run freely on that page +and events can be missed without a notice. Re-enabling other CPUs during +tracing is discouraged. + + +Trace Log Format +---------------- + +The raw log is text and easily filtered with e.g. grep and awk. One record is +one line in the log. A record starts with a keyword, followed by keyword +dependant arguments. Arguments are separated by a space, or continue until the +end of line. The format for version 20070824 is as follows: + +Explanation Keyword Space separated arguments +--------------------------------------------------------------------------- + +read event R width, timestamp, map id, physical, value, PC, PID +write event W width, timestamp, map id, physical, value, PC, PID +ioremap event MAP timestamp, map id, physical, virtual, length, PC, PID +iounmap event UNMAP timestamp, map id, PC, PID +marker MARK timestamp, text +version VERSION the string "20070824" +info for reader LSPCI one line from lspci -v +PCI address map PCIDEV space separated /proc/bus/pci/devices data +unk. opcode UNKNOWN timestamp, map id, physical, data, PC, PID + +Timestamp is in seconds with decimals. Physical is a PCI bus address, virtual +is a kernel virtual address. Width is the data width in bytes and value is the +data value. Map id is an arbitrary id number identifying the mapping that was +used in an operation. PC is the program counter and PID is process id. PC is +zero if it is not recorded. PID is always zero as tracing MMIO accesses +originating in user space memory is not yet supported. + +For instance, the following awk filter will pass all 32-bit writes that target +physical addresses in the range [0xfb73ce40, 0xfb800000[ + +$ awk '/W 4 / { adr=strtonum($5); if (adr >= 0xfb73ce40 && +adr < 0xfb800000) print; }' + + +Tools for Developers +-------------------- + +The user space tools include utilities for: +- replacing numeric addresses and values with hardware register names +- replaying MMIO logs, i.e., re-executing the recorded writes + + diff --git a/Documentation/unaligned-memory-access.txt b/Documentation/unaligned-memory-access.txt index b0472ac5226a38ff2f740c185dcfdd5676dbcf97..f866c72291bf4ce2e29a9a6ffd1c40ac740d4bb7 100644 --- a/Documentation/unaligned-memory-access.txt +++ b/Documentation/unaligned-memory-access.txt @@ -218,9 +218,35 @@ If use of such macros is not convenient, another option is to use memcpy(), where the source or destination (or both) are of type u8* or unsigned char*. Due to the byte-wise nature of this operation, unaligned accesses are avoided. + +Alignment vs. Networking +======================== + +On architectures that require aligned loads, networking requires that the IP +header is aligned on a four-byte boundary to optimise the IP stack. For +regular ethernet hardware, the constant NET_IP_ALIGN is used. On most +architectures this constant has the value 2 because the normal ethernet +header is 14 bytes long, so in order to get proper alignment one needs to +DMA to an address which can be expressed as 4*n + 2. One notable exception +here is powerpc which defines NET_IP_ALIGN to 0 because DMA to unaligned +addresses can be very expensive and dwarf the cost of unaligned loads. + +For some ethernet hardware that cannot DMA to unaligned addresses like +4*n+2 or non-ethernet hardware, this can be a problem, and it is then +required to copy the incoming frame into an aligned buffer. Because this is +unnecessary on architectures that can do unaligned accesses, the code can be +made dependent on CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS like so: + +#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS + skb = original skb +#else + skb = copy skb +#endif + -- -Author: Daniel Drake +Authors: Daniel Drake , + Johannes Berg With help from: Alan Cox, Avuton Olrich, Heikki Orsila, Jan Engelhardt, -Johannes Berg, Kyle McMartin, Kyle Moffett, Randy Dunlap, Robert Hancock, -Uli Kunitz, Vadim Lobanov +Kyle McMartin, Kyle Moffett, Randy Dunlap, Robert Hancock, Uli Kunitz, +Vadim Lobanov diff --git a/Documentation/usb/authorization.txt b/Documentation/usb/authorization.txt index 2af400609498d7c3d4bb33ad7c4a253973af3a4a..381b22ee7834bd2d7b0485570ea9a6caa0a5c587 100644 --- a/Documentation/usb/authorization.txt +++ b/Documentation/usb/authorization.txt @@ -8,7 +8,7 @@ not) in a system. This feature will allow you to implement a lock-down of USB devices, fully controlled by user space. As of now, when a USB device is connected it is configured and -it's interfaces inmediately made available to the users. With this +its interfaces are immediately made available to the users. With this modification, only if root authorizes the device to be configured will then it be possible to use it. diff --git a/Documentation/usb/gadget_serial.txt b/Documentation/usb/gadget_serial.txt index 815f5c2301ffa8599ce35dd3d684bf66afbfcc02..9b22bd14c3481789ac126c34842002ef7093a72a 100644 --- a/Documentation/usb/gadget_serial.txt +++ b/Documentation/usb/gadget_serial.txt @@ -1,6 +1,7 @@ Linux Gadget Serial Driver v2.0 11/20/2004 + (updated 8-May-2008 for v2.3) License and Disclaimer @@ -31,7 +32,7 @@ Prerequisites ------------- Versions of the gadget serial driver are available for the 2.4 Linux kernels, but this document assumes you are using -version 2.0 or later of the gadget serial driver in a 2.6 +version 2.3 or later of the gadget serial driver in a 2.6 Linux kernel. This document assumes that you are familiar with Linux and @@ -40,6 +41,12 @@ standard utilities, use minicom and HyperTerminal, and work with USB and serial devices. It also assumes you configure the Linux gadget and usb drivers as modules. +With version 2.3 of the driver, major and minor device nodes are +no longer statically defined. Your Linux based system should mount +sysfs in /sys, and use "mdev" (in Busybox) or "udev" to make the +/dev nodes matching the sysfs /sys/class/tty files. + + Overview -------- @@ -104,15 +111,8 @@ driver. All this are listed under "USB Gadget Support" when configuring the kernel. Then rebuild and install the kernel or modules. -The gadget serial driver uses major number 127, for now. So you -will need to create a device node for it, like this: - - mknod /dev/ttygserial c 127 0 - -You only need to do this once. - Then you must load the gadget serial driver. To load it as an -ACM device, do this: +ACM device (recommended for interoperability), do this: modprobe g_serial use_acm=1 @@ -125,6 +125,23 @@ controller driver. This must be done each time you reboot the gadget side Linux system. You can add this to the start up scripts, if desired. +Your system should use mdev (from busybox) or udev to make the +device nodes. After this gadget driver has been set up you should +then see a /dev/ttyGS0 node: + + # ls -l /dev/ttyGS0 | cat + crw-rw---- 1 root root 253, 0 May 8 14:10 /dev/ttyGS0 + # + +Note that the major number (253, above) is system-specific. If +you need to create /dev nodes by hand, the right numbers to use +will be in the /sys/class/tty/ttyGS0/dev file. + +When you link this gadget driver early, perhaps even statically, +you may want to set up an /etc/inittab entry to run "getty" on it. +The /dev/ttyGS0 line should work like most any other serial port. + + If gadget serial is loaded as an ACM device you will want to use either the Windows or Linux ACM driver on the host side. If gadget serial is loaded as a bulk in/out device, you will want to use the diff --git a/Documentation/usb/persist.txt b/Documentation/usb/persist.txt index d56cb1a1155073987fc2ca108c766f03100d35cf..074b159b77c20344aaa0a4abf7becc8603a2a065 100644 --- a/Documentation/usb/persist.txt +++ b/Documentation/usb/persist.txt @@ -81,8 +81,11 @@ re-enumeration shows that the device now attached to that port has the same descriptors as before, including the Vendor and Product IDs, then the kernel continues to use the same device structure. In effect, the kernel treats the device as though it had merely been reset instead of -unplugged. The same thing happens if the host controller is in the -expected state but a USB device was unplugged and then replugged. +unplugged. + +The same thing happens if the host controller is in the expected state +but a USB device was unplugged and then replugged, or if a USB device +fails to carry out a normal resume. If no device is now attached to the port, or if the descriptors are different from what the kernel remembers, then the treatment is what diff --git a/Documentation/usb/uhci.txt b/Documentation/usb/uhci.txt deleted file mode 100644 index 2f25952c86c6cc2e8ee3bc4c4a237798481cba1e..0000000000000000000000000000000000000000 --- a/Documentation/usb/uhci.txt +++ /dev/null @@ -1,165 +0,0 @@ -Specification and Internals for the New UHCI Driver (Whitepaper...) - - brought to you by - - Georg Acher, acher@in.tum.de (executive slave) (base guitar) - Deti Fliegl, deti@fliegl.de (executive slave) (lead voice) - Thomas Sailer, sailer@ife.ee.ethz.ch (chief consultant) (cheer leader) - - $Id: README.uhci,v 1.1 1999/12/14 14:03:02 fliegl Exp $ - -This document and the new uhci sources can be found on - http://hotswap.in.tum.de/usb - -1. General issues - -1.1 Why a new UHCI driver, we already have one?!? - -Correct, but its internal structure got more and more mixed up by the (still -ongoing) efforts to get isochronous transfers (ISO) to work. -Since there is an increasing need for reliable ISO-transfers (especially -for USB-audio needed by TS and for a DAB-USB-Receiver build by GA and DF), -this state was a bit unsatisfying in our opinion, so we've decided (based -on knowledge and experiences with the old UHCI driver) to start -from scratch with a new approach, much simpler but at the same time more -powerful. -It is inspired by the way Win98/Win2000 handles USB requests via URBs, -but it's definitely 100% free of MS-code and doesn't crash while -unplugging an used ISO-device like Win98 ;-) -Some code for HW setup and root hub management was taken from the -original UHCI driver, but heavily modified to fit into the new code. -The invention of the basic concept, and major coding were completed in two -days (and nights) on the 16th and 17th of October 1999, now known as the -great USB-October-Revolution started by GA, DF, and TS ;-) - -Since the concept is in no way UHCI dependent, we hope that it will also be -transferred to the OHCI-driver, so both drivers share a common API. - -1.2. Advantages and disadvantages - -+ All USB transfer types work now! -+ Asynchronous operation -+ Simple, but powerful interface (only two calls for start and cancel) -+ Easy migration to the new API, simplified by a compatibility API -+ Simple usage of ISO transfers -+ Automatic linking of requests -+ ISO transfers allow variable length for each frame and striping -+ No CPU dependent and non-portable atomic memory access, no asm()-inlines -+ Tested on x86 and Alpha - -- Rewriting for ISO transfers needed - -1.3. Is there some compatibility to the old API? - -Yes, but only for control, bulk and interrupt transfers. We've implemented -some wrapper calls for these transfer types. The usbcore works fine with -these wrappers. For ISO there's no compatibility, because the old ISO-API -and its semantics were unnecessary complicated in our opinion. - -1.4. What's really working? - -As said above, CTRL and BULK already work fine even with the wrappers, -so legacy code wouldn't notice the change. -Regarding to Thomas, ISO transfers now run stable with USB audio. -INT transfers (e.g. mouse driver) work fine, too. - -1.5. Are there any bugs? - -No ;-) -Hm... -Well, of course this implementation needs extensive testing on all available -hardware, but we believe that any fixes shouldn't harm the overall concept. - -1.6. What should be done next? - -A large part of the request handling seems to be identical for UHCI and -OHCI, so it would be a good idea to extract the common parts and have only -the HW specific stuff in uhci.c. Furthermore, all other USB device drivers -should need URBification, if they use isochronous or interrupt transfers. -One thing missing in the current implementation (and the old UHCI driver) -is fair queueing for BULK transfers. Since this would need (in principle) -the alteration of already constructed TD chains (to switch from depth to -breadth execution), another way has to be found. Maybe some simple -heuristics work with the same effect. - ---------------------------------------------------------------------------- - -2. Internal structure and mechanisms - -To get quickly familiar with the internal structures, here's a short -description how the new UHCI driver works. However, the ultimate source of -truth is only uhci.c! - -2.1. Descriptor structure (QHs and TDs) - -During initialization, the following skeleton is allocated in init_skel: - - framespecific | common chain - -framelist[] -[ 0 ]-----> TD --> TD -------\ -[ 1 ]-----> TD --> TD --------> TD ----> QH -------> QH -------> QH ---> NULL - ... TD --> TD -------/ -[1023]-----> TD --> TD ------/ - - ^^ ^^ ^^ ^^ ^^ ^^ - 1024 TDs for 7 TDs for 1 TD for Start of Start of End Chain - ISO INT (2-128ms) 1ms-INT CTRL Chain BULK Chain - -For each CTRL or BULK transfer a new QH is allocated and the containing data -transfers are appended as (vertical) TDs. After building the whole QH with its -dangling TDs, the QH is inserted before the BULK Chain QH (for CTRL) or -before the End Chain QH (for BULK). Since only the QH->next pointers are -affected, no atomic memory operation is required. The three QHs in the -common chain are never equipped with TDs! - -For ISO or INT, the TD for each frame is simply inserted into the appropriate -ISO/INT-TD-chain for the desired frame. The 7 skeleton INT-TDs are scattered -among the 1024 frames similar to the old UHCI driver. - -For CTRL/BULK/ISO, the last TD in the transfer has the IOC-bit set. For INT, -every TD (there is only one...) has the IOC-bit set. - -Besides the data for the UHCI controller (2 or 4 32bit words), the descriptors -are double-linked through the .vertical and .horizontal elements in the -SW data of the descriptor (using the double-linked list structures and -operations), but SW-linking occurs only in closed domains, i.e. for each of -the 1024 ISO-chains and the 8 INT-chains there is a closed cycle. This -simplifies all insertions and unlinking operations and avoids costly -bus_to_virt()-calls. - -2.2. URB structure and linking to QH/TDs - -During assembly of the QH and TDs of the requested action, these descriptors -are stored in urb->urb_list, so the allocated QH/TD descriptors are bound to -this URB. -If the assembly was successful and the descriptors were added to the HW chain, -the corresponding URB is inserted into a global URB list for this controller. -This list stores all pending URBs. - -2.3. Interrupt processing - -Since UHCI provides no means to directly detect completed transactions, the -following is done in each UHCI interrupt (uhci_interrupt()): - -For each URB in the pending queue (process_urb()), the ACTIVE-flag of the -associated TDs are processed (depending on the transfer type -process_{transfer|interrupt|iso}()). If the TDs are not active anymore, -they indicate the completion of the transaction and the status is calculated. -Inactive QH/TDs are removed from the HW chain (since the host controller -already removed the TDs from the QH, no atomic access is needed) and -eventually the URB is marked as completed (OK or errors) and removed from the -pending queue. Then the next linked URB is submitted. After (or immediately -before) that, the completion handler is called. - -2.4. Unlinking URBs - -First, all QH/TDs stored in the URB are unlinked from the HW chain. -To ensure that the host controller really left a vertical TD chain, we -wait for one frame. After that, the TDs are physically destroyed. - -2.5. URB linking and the consequences - -Since URBs can be linked and the corresponding submit_urb is called in -the UHCI-interrupt, all work associated with URB/QH/TD assembly has to be -interrupt save. This forces kmalloc to use GFP_ATOMIC in the interrupt. diff --git a/Documentation/video4linux/CARDLIST.au0828 b/Documentation/video4linux/CARDLIST.au0828 index 86d1c8e7b18f3c31b39dca8176acc3e9bdfdf96a..eedc399e8debd741fc8fb33e25f5a0d55393030f 100644 --- a/Documentation/video4linux/CARDLIST.au0828 +++ b/Documentation/video4linux/CARDLIST.au0828 @@ -2,3 +2,4 @@ 1 -> Hauppauge HVR950Q (au0828) [2040:7200,2040:7210,2040:7217,2040:721b,2040:721f,2040:7280,0fd9:0008] 2 -> Hauppauge HVR850 (au0828) [2040:7240] 3 -> DViCO FusionHDTV USB (au0828) [0fe9:d620] + 4 -> Hauppauge HVR950Q rev xxF8 (au0828) [2040:7201,2040:7211,2040:7281] diff --git a/Documentation/video4linux/CARDLIST.cx23885 b/Documentation/video4linux/CARDLIST.cx23885 index 191194ea1e25ce694217259eb64fe0f583a33462..f0e613ba55b8bd2f1ed0f39b7e93699ec3b9d5bc 100644 --- a/Documentation/video4linux/CARDLIST.cx23885 +++ b/Documentation/video4linux/CARDLIST.cx23885 @@ -8,3 +8,4 @@ 7 -> Hauppauge WinTV-HVR1200 [0070:71d1,0070:71d3] 8 -> Hauppauge WinTV-HVR1700 [0070:8101] 9 -> Hauppauge WinTV-HVR1400 [0070:8010] + 10 -> DViCO FusionHDTV7 Dual Express [18ac:d618] diff --git a/Documentation/video4linux/CARDLIST.em28xx b/Documentation/video4linux/CARDLIST.em28xx index 1d6a245c828f45f7b9c9c6ea4de824feb1990520..89c7f32abf9f2d8a43f98dc892b8ca9b8bad9a24 100644 --- a/Documentation/video4linux/CARDLIST.em28xx +++ b/Documentation/video4linux/CARDLIST.em28xx @@ -1,17 +1,59 @@ 0 -> Unknown EM2800 video grabber (em2800) [eb1a:2800] - 1 -> Unknown EM2750/28xx video grabber (em2820/em2840) [eb1a:2750,eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2870,eb1a:2881,eb1a:2883] + 1 -> Unknown EM2750/28xx video grabber (em2820/em2840) [eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2870,eb1a:2881,eb1a:2883] 2 -> Terratec Cinergy 250 USB (em2820/em2840) [0ccd:0036] 3 -> Pinnacle PCTV USB 2 (em2820/em2840) [2304:0208] 4 -> Hauppauge WinTV USB 2 (em2820/em2840) [2040:4200,2040:4201] 5 -> MSI VOX USB 2.0 (em2820/em2840) 6 -> Terratec Cinergy 200 USB (em2800) - 7 -> Leadtek Winfast USB II (em2800) + 7 -> Leadtek Winfast USB II (em2800) [0413:6023] 8 -> Kworld USB2800 (em2800) 9 -> Pinnacle Dazzle DVC 90/DVC 100 (em2820/em2840) [2304:0207,2304:021a] - 10 -> Hauppauge WinTV HVR 900 (em2880) [2040:6500,2040:6502] + 10 -> Hauppauge WinTV HVR 900 (em2880) [2040:6500] 11 -> Terratec Hybrid XS (em2880) [0ccd:0042] 12 -> Kworld PVR TV 2800 RF (em2820/em2840) 13 -> Terratec Prodigy XS (em2880) [0ccd:0047] 14 -> Pixelview Prolink PlayTV USB 2.0 (em2820/em2840) 15 -> V-Gear PocketTV (em2800) - 16 -> Hauppauge WinTV HVR 950 (em2880) [2040:6513,2040:6517,2040:651b,2040:651f] + 16 -> Hauppauge WinTV HVR 950 (em2883) [2040:6513,2040:6517,2040:651b,2040:651f] + 17 -> Pinnacle PCTV HD Pro Stick (em2880) [2304:0227] + 18 -> Hauppauge WinTV HVR 900 (R2) (em2880) [2040:6502] + 19 -> PointNix Intra-Oral Camera (em2860) + 20 -> AMD ATI TV Wonder HD 600 (em2880) [0438:b002] + 21 -> eMPIA Technology, Inc. GrabBeeX+ Video Encoder (em2800) [eb1a:2801] + 22 -> Unknown EM2750/EM2751 webcam grabber (em2750) [eb1a:2750,eb1a:2751] + 23 -> Huaqi DLCW-130 (em2750) + 24 -> D-Link DUB-T210 TV Tuner (em2820/em2840) [2001:f112] + 25 -> Gadmei UTV310 (em2820/em2840) + 26 -> Hercules Smart TV USB 2.0 (em2820/em2840) + 27 -> Pinnacle PCTV USB 2 (Philips FM1216ME) (em2820/em2840) + 28 -> Leadtek Winfast USB II Deluxe (em2820/em2840) + 29 -> Pinnacle Dazzle DVC 100 (em2820/em2840) + 30 -> Videology 20K14XUSB USB2.0 (em2820/em2840) + 31 -> Usbgear VD204v9 (em2821) + 32 -> Supercomp USB 2.0 TV (em2821) + 33 -> SIIG AVTuner-PVR/Prolink PlayTV USB 2.0 (em2821) + 34 -> Terratec Cinergy A Hybrid XS (em2860) [0ccd:004f] + 35 -> Typhoon DVD Maker (em2860) + 36 -> NetGMBH Cam (em2860) + 37 -> Gadmei UTV330 (em2860) + 38 -> Yakumo MovieMixer (em2861) + 39 -> KWorld PVRTV 300U (em2861) [eb1a:e300] + 40 -> Plextor ConvertX PX-TV100U (em2861) [093b:a005] + 41 -> Kworld 350 U DVB-T (em2870) [eb1a:e350] + 42 -> Kworld 355 U DVB-T (em2870) [eb1a:e355,eb1a:e357] + 43 -> Terratec Cinergy T XS (em2870) [0ccd:0043] + 44 -> Terratec Cinergy T XS (MT2060) (em2870) + 45 -> Pinnacle PCTV DVB-T (em2870) + 46 -> Compro, VideoMate U3 (em2870) [185b:2870] + 47 -> KWorld DVB-T 305U (em2880) [eb1a:e305] + 48 -> KWorld DVB-T 310U (em2880) + 49 -> MSI DigiVox A/D (em2880) [eb1a:e310] + 50 -> MSI DigiVox A/D II (em2880) [eb1a:e320] + 51 -> Terratec Hybrid XS Secam (em2880) [0ccd:004c] + 52 -> DNT DA2 Hybrid (em2881) + 53 -> Pinnacle Hybrid Pro (em2881) + 54 -> Kworld VS-DVB-T 323UR (em2882) [eb1a:e323] + 55 -> Terratec Hybrid XS (em2882) (em2882) [0ccd:005e] + 56 -> Pinnacle Hybrid Pro (2) (em2882) [2304:0226] + 57 -> Kworld PlusTV HD Hybrid 330 (em2883) [eb1a:a316] + 58 -> Compro VideoMate ForYou/Stereo (em2820/em2840) [185b:2041] diff --git a/Documentation/video4linux/CARDLIST.saa7134 b/Documentation/video4linux/CARDLIST.saa7134 index 67937df1e974b0e787199c04d996ab084786844d..39868af9cf9fe665a6bbd991a4927e55061232d3 100644 --- a/Documentation/video4linux/CARDLIST.saa7134 +++ b/Documentation/video4linux/CARDLIST.saa7134 @@ -37,7 +37,7 @@ 36 -> UPMOST PURPLE TV [12ab:0800] 37 -> Items MuchTV Plus / IT-005 38 -> Terratec Cinergy 200 TV [153b:1152] - 39 -> LifeView FlyTV Platinum Mini [5168:0212,4e42:0212] + 39 -> LifeView FlyTV Platinum Mini [5168:0212,4e42:0212,5169:1502] 40 -> Compro VideoMate TV PVR/FM [185b:c100] 41 -> Compro VideoMate TV Gold+ [185b:c100] 42 -> Sabrent SBT-TVFM (saa7130) @@ -128,7 +128,7 @@ 127 -> Beholder BeholdTV 507 FM/RDS / BeholdTV 509 FM [0000:5071,0000:507B,5ace:5070,5ace:5090] 128 -> Beholder BeholdTV Columbus TVFM [0000:5201] 129 -> Beholder BeholdTV 607 / BeholdTV 609 [5ace:6070,5ace:6071,5ace:6072,5ace:6073,5ace:6090,5ace:6091,5ace:6092,5ace:6093] -130 -> Beholder BeholdTV M6 / BeholdTV M6 Extra [5ace:6190,5ace:6193,5ace:6191] +130 -> Beholder BeholdTV M6 [5ace:6190] 131 -> Twinhan Hybrid DTV-DVB 3056 PCI [1822:0022] 132 -> Genius TVGO AM11MCE 133 -> NXP Snake DVB-S reference design @@ -141,3 +141,7 @@ 140 -> Avermedia DVB-S Pro A700 [1461:a7a1] 141 -> Avermedia DVB-S Hybrid+FM A700 [1461:a7a2] 142 -> Beholder BeholdTV H6 [5ace:6290] +143 -> Beholder BeholdTV M63 [5ace:6191] +144 -> Beholder BeholdTV M6 Extra [5ace:6193] +145 -> AVerMedia MiniPCI DVB-T Hybrid M103 [1461:f636] +146 -> ASUSTeK P7131 Analog diff --git a/Documentation/video4linux/cx18.txt b/Documentation/video4linux/cx18.txt index 6842c262890f898561f537888ddf53b8bc39bda5..914cb7e734a20b773709cb067804e07576881097 100644 --- a/Documentation/video4linux/cx18.txt +++ b/Documentation/video4linux/cx18.txt @@ -1,36 +1,30 @@ Some notes regarding the cx18 driver for the Conexant CX23418 MPEG encoder chip: -1) The only hardware currently supported is the Hauppauge HVR-1600 - card and the Compro VideoMate H900 (note that this card only - supports analog input, it has no digital tuner!). +1) Currently supported are: -2) Some people have problems getting the i2c bus to work. Cause unknown. - The symptom is that the eeprom cannot be read and the card is - unusable. + - Hauppauge HVR-1600 + - Compro VideoMate H900 + - Yuan MPC718 + - Conexant Raptor PAL/SECAM devkit -3) The audio from the analog tuner is mono only. Probably caused by - incorrect audio register information in the datasheet. We are - waiting for updated information from Conexant. +2) Some people have problems getting the i2c bus to work. + The symptom is that the eeprom cannot be read and the card is + unusable. This is probably fixed, but if you have problems + then post to the video4linux or ivtv-users mailinglist. -4) VBI (raw or sliced) has not yet been implemented. +3) VBI (raw or sliced) has not yet been implemented. -5) MPEG indexing is not yet implemented. +4) MPEG indexing is not yet implemented. -6) The driver is still a bit rough around the edges, this should +5) The driver is still a bit rough around the edges, this should improve over time. Firmware: -The firmware needs to be extracted from the Windows Hauppauge HVR-1600 -driver, available here: - -http://hauppauge.lightpath.net/software/install_cd/hauppauge_cd_3.4d1.zip +You can obtain the firmware files here: -Unzip, then copy the following files to the firmware directory -and rename them as follows: +http://dl.ivtvdriver.org/ivtv/firmware/cx18-firmware.tar.gz -Drivers/Driver18/hcw18apu.rom -> v4l-cx23418-apu.fw -Drivers/Driver18/hcw18enc.rom -> v4l-cx23418-cpu.fw -Drivers/Driver18/hcw18mlC.rom -> v4l-cx23418-dig.fw +Untar and copy the .fw files to your firmware directory. diff --git a/Documentation/video4linux/gspca.txt b/Documentation/video4linux/gspca.txt new file mode 100644 index 0000000000000000000000000000000000000000..bcaf4ab383be001214f33d5abfbd2adbf954575a --- /dev/null +++ b/Documentation/video4linux/gspca.txt @@ -0,0 +1,243 @@ +List of the webcams known by gspca. + +The modules are: + gspca_main main driver + gspca_xxxx subdriver module with xxxx as follows + +xxxx vend:prod +---- +spca501 0000:0000 MystFromOri Unknow Camera +spca501 040a:0002 Kodak DVC-325 +spca500 040a:0300 Kodak EZ200 +zc3xx 041e:041e Creative WebCam Live! +spca500 041e:400a Creative PC-CAM 300 +sunplus 041e:400b Creative PC-CAM 600 +sunplus 041e:4012 PC-Cam350 +sunplus 041e:4013 Creative Pccam750 +zc3xx 041e:4017 Creative Webcam Mobile PD1090 +spca508 041e:4018 Creative Webcam Vista (PD1100) +spca561 041e:401a Creative Webcam Vista (PD1100) +zc3xx 041e:401c Creative NX +spca505 041e:401d Creative Webcam NX ULTRA +zc3xx 041e:401e Creative Nx Pro +zc3xx 041e:401f Creative Webcam Notebook PD1171 +pac207 041e:4028 Creative Webcam Vista Plus +zc3xx 041e:4029 Creative WebCam Vista Pro +zc3xx 041e:4034 Creative Instant P0620 +zc3xx 041e:4035 Creative Instant P0620D +zc3xx 041e:4036 Creative Live ! +zc3xx 041e:403a Creative Nx Pro 2 +spca561 041e:403b Creative Webcam Vista (VF0010) +zc3xx 041e:4051 Creative Live!Cam Notebook Pro (VF0250) +ov519 041e:4052 Creative Live! VISTA IM +zc3xx 041e:4053 Creative Live!Cam Video IM +ov519 041e:405f Creative Live! VISTA VF0330 +ov519 041e:4060 Creative Live! VISTA VF0350 +ov519 041e:4061 Creative Live! VISTA VF0400 +ov519 041e:4064 Creative Live! VISTA VF0420 +ov519 041e:4068 Creative Live! VISTA VF0470 +spca561 0458:7004 Genius VideoCAM Express V2 +sunplus 0458:7006 Genius Dsc 1.3 Smart +zc3xx 0458:7007 Genius VideoCam V2 +zc3xx 0458:700c Genius VideoCam V3 +zc3xx 0458:700f Genius VideoCam Web V2 +sonixj 0458:7025 Genius Eye 311Q +sonixj 045e:00f5 MicroSoft VX3000 +sonixj 045e:00f7 MicroSoft VX1000 +ov519 045e:028c Micro$oft xbox cam +spca508 0461:0815 Micro Innovation IC200 +sunplus 0461:0821 Fujifilm MV-1 +zc3xx 0461:0a00 MicroInnovation WebCam320 +spca500 046d:0890 Logitech QuickCam traveler +vc032x 046d:0892 Logitech Orbicam +vc032x 046d:0896 Logitech Orbicam +zc3xx 046d:08a0 Logitech QC IM +zc3xx 046d:08a1 Logitech QC IM 0x08A1 +sound +zc3xx 046d:08a2 Labtec Webcam Pro +zc3xx 046d:08a3 Logitech QC Chat +zc3xx 046d:08a6 Logitech QCim +zc3xx 046d:08a7 Logitech QuickCam Image +zc3xx 046d:08a9 Logitech Notebook Deluxe +zc3xx 046d:08aa Labtec Webcam Notebook +zc3xx 046d:08ac Logitech QuickCam Cool +zc3xx 046d:08ad Logitech QCCommunicate STX +zc3xx 046d:08ae Logitech QuickCam for Notebooks +zc3xx 046d:08af Logitech QuickCam Cool +zc3xx 046d:08b9 Logitech QC IM ??? +zc3xx 046d:08d7 Logitech QCam STX +zc3xx 046d:08d9 Logitech QuickCam IM/Connect +zc3xx 046d:08d8 Logitech Notebook Deluxe +zc3xx 046d:08da Logitech QuickCam Messenger +zc3xx 046d:08dd Logitech QuickCam for Notebooks +spca500 046d:0900 Logitech Inc. ClickSmart 310 +spca500 046d:0901 Logitech Inc. ClickSmart 510 +sunplus 046d:0905 Logitech ClickSmart 820 +tv8532 046d:0920 QC Express +tv8532 046d:0921 Labtec Webcam +spca561 046d:0928 Logitech QC Express Etch2 +spca561 046d:0929 Labtec Webcam Elch2 +spca561 046d:092a Logitech QC for Notebook +spca561 046d:092b Labtec Webcam Plus +spca561 046d:092c Logitech QC chat Elch2 +spca561 046d:092d Logitech QC Elch2 +spca561 046d:092e Logitech QC Elch2 +spca561 046d:092f Logitech QC Elch2 +sunplus 046d:0960 Logitech ClickSmart 420 +sunplus 0471:0322 Philips DMVC1300K +zc3xx 0471:0325 Philips SPC 200 NC +zc3xx 0471:0326 Philips SPC 300 NC +sonixj 0471:0327 Philips SPC 600 NC +sonixj 0471:0328 Philips SPC 700 NC +zc3xx 0471:032d Philips spc210nc +zc3xx 0471:032e Philips spc315nc +sonixj 0471:0330 Philips SPC 710NC +spca501 0497:c001 Smile International +sunplus 04a5:3003 Benq DC 1300 +sunplus 04a5:3008 Benq DC 1500 +sunplus 04a5:300a Benq DC3410 +spca500 04a5:300c Benq DC1016 +sunplus 04f1:1001 JVC GC A50 +spca561 04fc:0561 Flexcam 100 +sunplus 04fc:500c Sunplus CA500C +sunplus 04fc:504a Aiptek Mini PenCam 1.3 +sunplus 04fc:504b Maxell MaxPocket LE 1.3 +sunplus 04fc:5330 Digitrex 2110 +sunplus 04fc:5360 Sunplus Generic +spca500 04fc:7333 PalmPixDC85 +sunplus 04fc:ffff Pure DigitalDakota +spca501 0506:00df 3Com HomeConnect Lite +sunplus 052b:1513 Megapix V4 +tv8532 0545:808b Veo Stingray +tv8532 0545:8333 Veo Stingray +sunplus 0546:3155 Polaroid PDC3070 +sunplus 0546:3191 Polaroid Ion 80 +sunplus 0546:3273 Polaroid PDC2030 +ov519 054c:0154 Sonny toy4 +ov519 054c:0155 Sonny toy5 +zc3xx 055f:c005 Mustek Wcam300A +spca500 055f:c200 Mustek Gsmart 300 +sunplus 055f:c211 Kowa Bs888e Microcamera +spca500 055f:c220 Gsmart Mini +sunplus 055f:c230 Mustek Digicam 330K +sunplus 055f:c232 Mustek MDC3500 +sunplus 055f:c360 Mustek DV4000 Mpeg4 +sunplus 055f:c420 Mustek gSmart Mini 2 +sunplus 055f:c430 Mustek Gsmart LCD 2 +sunplus 055f:c440 Mustek DV 3000 +sunplus 055f:c520 Mustek gSmart Mini 3 +sunplus 055f:c530 Mustek Gsmart LCD 3 +sunplus 055f:c540 Gsmart D30 +sunplus 055f:c630 Mustek MDC4000 +sunplus 055f:c650 Mustek MDC5500Z +zc3xx 055f:d003 Mustek WCam300A +zc3xx 055f:d004 Mustek WCam300 AN +conex 0572:0041 Creative Notebook cx11646 +ov519 05a9:0519 OmniVision +ov519 05a9:0530 OmniVision +ov519 05a9:4519 OmniVision +ov519 05a9:8519 OmniVision +sunplus 05da:1018 Digital Dream Enigma 1.3 +stk014 05e1:0893 Syntek DV4000 +spca561 060b:a001 Maxell Compact Pc PM3 +zc3xx 0698:2003 CTX M730V built in +spca500 06bd:0404 Agfa CL20 +spca500 06be:0800 Optimedia +sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom +spca506 06e1:a190 ADS Instant VCD +spca508 0733:0110 ViewQuest VQ110 +spca508 0130:0130 Clone Digital Webcam 11043 +spca501 0733:0401 Intel Create and Share +spca501 0733:0402 ViewQuest M318B +spca505 0733:0430 Intel PC Camera Pro +sunplus 0733:1311 Digital Dream Epsilon 1.3 +sunplus 0733:1314 Mercury 2.1MEG Deluxe Classic Cam +sunplus 0733:2211 Jenoptik jdc 21 LCD +sunplus 0733:2221 Mercury Digital Pro 3.1p +sunplus 0733:3261 Concord 3045 spca536a +sunplus 0733:3281 Cyberpix S550V +spca506 0734:043b 3DeMon USB Capture aka +spca500 084d:0003 D-Link DSC-350 +spca500 08ca:0103 Aiptek PocketDV +sunplus 08ca:0104 Aiptek PocketDVII 1.3 +sunplus 08ca:0106 Aiptek Pocket DV3100+ +sunplus 08ca:2008 Aiptek Mini PenCam 2 M +sunplus 08ca:2010 Aiptek PocketCam 3M +sunplus 08ca:2016 Aiptek PocketCam 2 Mega +sunplus 08ca:2018 Aiptek Pencam SD 2M +sunplus 08ca:2020 Aiptek Slim 3000F +sunplus 08ca:2022 Aiptek Slim 3200 +sunplus 08ca:2024 Aiptek DV3500 Mpeg4 +sunplus 08ca:2028 Aiptek PocketCam4M +sunplus 08ca:2040 Aiptek PocketDV4100M +sunplus 08ca:2042 Aiptek PocketDV5100 +sunplus 08ca:2050 Medion MD 41437 +sunplus 08ca:2060 Aiptek PocketDV5300 +tv8532 0923:010f ICM532 cams +mars 093a:050f Mars-Semi Pc-Camera +pac207 093a:2460 PAC207 Qtec Webcam 100 +pac207 093a:2463 Philips spc200nc pac207 +pac207 093a:2464 Labtec Webcam 1200 +pac207 093a:2468 PAC207 +pac207 093a:2470 Genius GF112 +pac207 093a:2471 PAC207 Genius VideoCam ge111 +pac207 093a:2472 PAC207 Genius VideoCam ge110 +pac7311 093a:2600 PAC7311 Typhoon +pac7311 093a:2601 PAC7311 Phillips SPC610NC +pac7311 093a:2603 PAC7312 +pac7311 093a:2608 PAC7311 Trust WB-3300p +pac7311 093a:260e PAC7311 Gigaware VGA PC Camera, Trust WB-3350p, SIGMA cam 2350 +pac7311 093a:260f PAC7311 SnakeCam +pac7311 093a:2621 PAC731x +zc3xx 0ac8:0302 Z-star Vimicro zc0302 +vc032x 0ac8:0321 Vimicro generic vc0321 +vc032x 0ac8:0323 Vimicro Vc0323 +vc032x 0ac8:0328 A4Tech PK-130MG +zc3xx 0ac8:301b Z-Star zc301b +zc3xx 0ac8:303b Vimicro 0x303b +zc3xx 0ac8:305b Z-star Vimicro zc0305b +zc3xx 0ac8:307b Ldlc VC302+Ov7620 +vc032x 0ac8:c001 Sony embedded vimicro +vc032x 0ac8:c002 Sony embedded vimicro +spca508 0af9:0010 Hama USB Sightcam 100 +spca508 0af9:0011 Hama USB Sightcam 100 +sonixb 0c45:6001 Genius VideoCAM NB +sonixb 0c45:6005 Microdia Sweex Mini Webcam +sonixb 0c45:6007 Sonix sn9c101 + Tas5110D +sonixb 0c45:6009 spcaCam@120 +sonixb 0c45:600d spcaCam@120 +sonixb 0c45:6011 Microdia PC Camera (SN9C102) +sonixb 0c45:6019 Generic Sonix OV7630 +sonixb 0c45:6024 Generic Sonix Tas5130c +sonixb 0c45:6025 Xcam Shanga +sonixb 0c45:6028 Sonix Btc Pc380 +sonixb 0c45:6029 spcaCam@150 +sonixb 0c45:602c Generic Sonix OV7630 +sonixb 0c45:602d LIC-200 LG +sonixb 0c45:602e Genius VideoCam Messenger +sonixj 0c45:6040 Speed NVC 350K +sonixj 0c45:607c Sonix sn9c102p Hv7131R +sonixj 0c45:60c0 Sangha Sn535 +sonixj 0c45:60ec SN9C105+MO4000 +sonixj 0c45:60fb Surfer NoName +sonixj 0c45:60fc LG-LIC300 +sonixj 0c45:612a Avant Camera +sonixj 0c45:612c Typhoon Rasy Cam 1.3MPix +sonixj 0c45:6130 Sonix Pccam +sonixj 0c45:6138 Sn9c120 Mo4000 +sonixj 0c45:613b Surfer SN-206 +sonixj 0c45:613c Sonix Pccam168 +sunplus 0d64:0303 Sunplus FashionCam DXG +etoms 102c:6151 Qcam Sangha CIF +etoms 102c:6251 Qcam xxxxxx VGA +zc3xx 10fd:0128 Typhoon Webshot II USB 300k 0x0128 +spca561 10fd:7e50 FlyCam Usb 100 +zc3xx 10fd:8050 Typhoon Webshot II USB 300k +spca501 1776:501c Arowana 300K CMOS Camera +t613 17a1:0128 T613/TAS5130A +vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC +pac207 2001:f115 D-Link DSB-C120 +spca500 2899:012c Toptro Industrial +spca508 8086:0110 Intel Easy PC Camera +spca500 8086:0630 Intel Pocket PC Camera +spca506 99fa:8988 Grandtec V.cap +spca561 abcd:cdee Petcam diff --git a/Documentation/video4linux/sn9c102.txt b/Documentation/video4linux/sn9c102.txt index b26f5195af51f58db1d4a04f2826e044b29bc8a2..73de4050d63738dd15c4d3872e3ca49d5e5e089d 100644 --- a/Documentation/video4linux/sn9c102.txt +++ b/Documentation/video4linux/sn9c102.txt @@ -157,7 +157,7 @@ Loading can be done as shown below: [root@localhost home]# modprobe sn9c102 -Note that the module is called "sn9c102" for historic reasons, althought it +Note that the module is called "sn9c102" for historic reasons, although it does not just support the SN9C102. At this point all the devices supported by the driver and connected to the USB diff --git a/Documentation/video4linux/w9968cf.txt b/Documentation/video4linux/w9968cf.txt index e0bba8393c7780b96bd278a63d749fea23e88b35..05138e8aea07c7c3ca125072481c7b39dc0ea1a5 100644 --- a/Documentation/video4linux/w9968cf.txt +++ b/Documentation/video4linux/w9968cf.txt @@ -193,9 +193,6 @@ Description: Automatic 'ovcamchip' module loading: 0 disabled, 1 enabled. loads that module automatically. This action is performed as once soon as the 'w9968cf' module is loaded into memory. Default: 1 -Note: The kernel must be compiled with the CONFIG_KMOD option - enabled for the 'ovcamchip' module to be loaded and for - this parameter to be present. ------------------------------------------------------------------------------- Name: simcams Type: int diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt index 3102b81bef88d86b753449e86f1d65f6d04c7ea8..ea8714fcc3ad4882dba62d625d22e61ac0a3079f 100644 --- a/Documentation/vm/hugetlbpage.txt +++ b/Documentation/vm/hugetlbpage.txt @@ -77,7 +77,7 @@ memory that is preset in system at this time. System administrators may want to put this command in one of the local rc init files. This will enable the kernel to request huge pages early in the boot process (when the possibility of getting physical contiguous pages is still very high). In either -case, adminstrators will want to verify the number of hugepages actually +case, administrators will want to verify the number of hugepages actually allocated by checking the sysctl or meminfo. /proc/sys/vm/nr_overcommit_hugepages indicates how large the pool of @@ -95,6 +95,29 @@ this condition holds, however, no more surplus huge pages will be allowed on the system until one of the two sysctls are increased sufficiently, or the surplus huge pages go out of use and are freed. +With support for multiple hugepage pools at run-time available, much of +the hugepage userspace interface has been duplicated in sysfs. The above +information applies to the default hugepage size (which will be +controlled by the proc interfaces for backwards compatibility). The root +hugepage control directory is + + /sys/kernel/mm/hugepages + +For each hugepage size supported by the running kernel, a subdirectory +will exist, of the form + + hugepages-${size}kB + +Inside each of these directories, the same set of files will exist: + + nr_hugepages + nr_overcommit_hugepages + free_hugepages + resv_hugepages + surplus_hugepages + +which function as described above for the default hugepage-sized case. + If the user applications are going to request hugepages using mmap system call, then it is required that system administrator mount a file system of type hugetlbfs: diff --git a/Documentation/vm/numa_memory_policy.txt b/Documentation/vm/numa_memory_policy.txt index bad16d3f6a473afe913b0be76e783bcb946bc937..6aaaeb38730cf0ff1d5389cd73a6a8d2fb6bd413 100644 --- a/Documentation/vm/numa_memory_policy.txt +++ b/Documentation/vm/numa_memory_policy.txt @@ -58,7 +58,7 @@ most general to most specific: the policy at the time they were allocated. VMA Policy: A "VMA" or "Virtual Memory Area" refers to a range of a task's - virtual adddress space. A task may define a specific policy for a range + virtual address space. A task may define a specific policy for a range of its virtual address space. See the MEMORY POLICIES APIS section, below, for an overview of the mbind() system call used to set a VMA policy. @@ -353,7 +353,7 @@ follows: Because of this extra reference counting, and because we must lookup shared policies in a tree structure under spinlock, shared policies are - more expensive to use in the page allocation path. This is expecially + more expensive to use in the page allocation path. This is especially true for shared policies on shared memory regions shared by tasks running on different NUMA nodes. This extra overhead can be avoided by always falling back to task or system default policy for shared memory regions, diff --git a/Documentation/volatile-considered-harmful.txt b/Documentation/volatile-considered-harmful.txt index 10c2e411cca899558b998e8bed0d3239d4cc92a6..991c26a6ef64fcfdef0fc870d3ed404f55751407 100644 --- a/Documentation/volatile-considered-harmful.txt +++ b/Documentation/volatile-considered-harmful.txt @@ -114,6 +114,6 @@ CREDITS Original impetus and research by Randy Dunlap Written by Jonathan Corbet -Improvements via coments from Satyam Sharma, Johannes Stezenbach, Jesper +Improvements via comments from Satyam Sharma, Johannes Stezenbach, Jesper Juhl, Heikki Orsila, H. Peter Anvin, Philipp Hahn, and Stefan Richter. diff --git a/Documentation/i386/IO-APIC.txt b/Documentation/x86/i386/IO-APIC.txt similarity index 100% rename from Documentation/i386/IO-APIC.txt rename to Documentation/x86/i386/IO-APIC.txt diff --git a/Documentation/i386/boot.txt b/Documentation/x86/i386/boot.txt similarity index 96% rename from Documentation/i386/boot.txt rename to Documentation/x86/i386/boot.txt index 95ad15c3b01f3256b8f06efb6a1a5f3905d02952..147bfe511cdda0d923ca1094a27daac02225af53 100644 --- a/Documentation/i386/boot.txt +++ b/Documentation/x86/i386/boot.txt @@ -1,17 +1,14 @@ - THE LINUX/I386 BOOT PROTOCOL - ---------------------------- + THE LINUX/x86 BOOT PROTOCOL + --------------------------- - H. Peter Anvin - Last update 2007-05-23 - -On the i386 platform, the Linux kernel uses a rather complicated boot +On the x86 platform, the Linux kernel uses a rather complicated boot convention. This has evolved partially due to historical aspects, as well as the desire in the early days to have the kernel itself be a bootable image, the complicated PC memory model and due to changed expectations in the PC industry caused by the effective demise of real-mode DOS as a mainstream operating system. -Currently, the following versions of the Linux/i386 boot protocol exist. +Currently, the following versions of the Linux/x86 boot protocol exist. Old kernels: zImage/Image support only. Some very early kernels may not even support a command line. @@ -372,10 +369,17 @@ Protocol: 2.00+ - If 0, the protected-mode code is loaded at 0x10000. - If 1, the protected-mode code is loaded at 0x100000. + Bit 5 (write): QUIET_FLAG + - If 0, print early messages. + - If 1, suppress early messages. + This requests to the kernel (decompressor and early + kernel) to not write early messages that require + accessing the display hardware directly. + Bit 6 (write): KEEP_SEGMENTS Protocol: 2.07+ - - if 0, reload the segment registers in the 32bit entry point. - - if 1, do not reload the segment registers in the 32bit entry point. + - If 0, reload the segment registers in the 32bit entry point. + - If 1, do not reload the segment registers in the 32bit entry point. Assume that %cs %ds %ss %es are all set to flat segments with a base of 0 (or the equivalent for their environment). @@ -504,7 +508,7 @@ Protocol: 2.06+ maximum size was 255. Field name: hardware_subarch -Type: write +Type: write (optional, defaults to x86/PC) Offset/size: 0x23c/4 Protocol: 2.07+ @@ -520,11 +524,13 @@ Protocol: 2.07+ 0x00000002 Xen Field name: hardware_subarch_data -Type: write +Type: write (subarch-dependent) Offset/size: 0x240/8 Protocol: 2.07+ A pointer to data that is specific to hardware subarch + This field is currently unused for the default x86/PC environment, + do not modify. Field name: payload_offset Type: read @@ -545,6 +551,34 @@ Protocol: 2.08+ The length of the payload. +Field name: setup_data +Type: write (special) +Offset/size: 0x250/8 +Protocol: 2.09+ + + The 64-bit physical pointer to NULL terminated single linked list of + struct setup_data. This is used to define a more extensible boot + parameters passing mechanism. The definition of struct setup_data is + as follow: + + struct setup_data { + u64 next; + u32 type; + u32 len; + u8 data[0]; + }; + + Where, the next is a 64-bit physical pointer to the next node of + linked list, the next field of the last node is 0; the type is used + to identify the contents of data; the len is the length of data + field; the data holds the real payload. + + This list may be modified at a number of points during the bootup + process. Therefore, when modifying this list one should always make + sure to consider the case where the linked list already contains + entries. + + **** THE IMAGE CHECKSUM From boot protocol version 2.08 onwards the CRC-32 is calculated over @@ -553,6 +587,7 @@ initial remainder of 0xffffffff. The checksum is appended to the file; therefore the CRC of the file up to the limit specified in the syssize field of the header is always 0. + **** THE KERNEL COMMAND LINE The kernel command line has become an important way for the boot @@ -584,28 +619,6 @@ command line is entered using the following protocol: covered by setup_move_size, so you may need to adjust this field. -Field name: setup_data -Type: write (obligatory) -Offset/size: 0x250/8 -Protocol: 2.09+ - - The 64-bit physical pointer to NULL terminated single linked list of - struct setup_data. This is used to define a more extensible boot - parameters passing mechanism. The definition of struct setup_data is - as follow: - - struct setup_data { - u64 next; - u32 type; - u32 len; - u8 data[0]; - }; - - Where, the next is a 64-bit physical pointer to the next node of - linked list, the next field of the last node is 0; the type is used - to identify the contents of data; the len is the length of data - field; the data holds the real payload. - **** MEMORY LAYOUT OF THE REAL-MODE CODE diff --git a/Documentation/i386/usb-legacy-support.txt b/Documentation/x86/i386/usb-legacy-support.txt similarity index 100% rename from Documentation/i386/usb-legacy-support.txt rename to Documentation/x86/i386/usb-legacy-support.txt diff --git a/Documentation/i386/zero-page.txt b/Documentation/x86/i386/zero-page.txt similarity index 100% rename from Documentation/i386/zero-page.txt rename to Documentation/x86/i386/zero-page.txt diff --git a/Documentation/x86_64/00-INDEX b/Documentation/x86/x86_64/00-INDEX similarity index 100% rename from Documentation/x86_64/00-INDEX rename to Documentation/x86/x86_64/00-INDEX diff --git a/Documentation/x86_64/boot-options.txt b/Documentation/x86/x86_64/boot-options.txt similarity index 100% rename from Documentation/x86_64/boot-options.txt rename to Documentation/x86/x86_64/boot-options.txt diff --git a/Documentation/x86_64/cpu-hotplug-spec b/Documentation/x86/x86_64/cpu-hotplug-spec similarity index 100% rename from Documentation/x86_64/cpu-hotplug-spec rename to Documentation/x86/x86_64/cpu-hotplug-spec diff --git a/Documentation/x86_64/fake-numa-for-cpusets b/Documentation/x86/x86_64/fake-numa-for-cpusets similarity index 100% rename from Documentation/x86_64/fake-numa-for-cpusets rename to Documentation/x86/x86_64/fake-numa-for-cpusets diff --git a/Documentation/x86_64/kernel-stacks b/Documentation/x86/x86_64/kernel-stacks similarity index 100% rename from Documentation/x86_64/kernel-stacks rename to Documentation/x86/x86_64/kernel-stacks diff --git a/Documentation/x86_64/machinecheck b/Documentation/x86/x86_64/machinecheck similarity index 100% rename from Documentation/x86_64/machinecheck rename to Documentation/x86/x86_64/machinecheck diff --git a/Documentation/x86_64/mm.txt b/Documentation/x86/x86_64/mm.txt similarity index 87% rename from Documentation/x86_64/mm.txt rename to Documentation/x86/x86_64/mm.txt index b89b6d2bebfa7b355aeffacc5c7e60e91eb54a86..efce7509736911434e299d0fe63e344c70d7b1e3 100644 --- a/Documentation/x86_64/mm.txt +++ b/Documentation/x86/x86_64/mm.txt @@ -11,9 +11,8 @@ ffffc10000000000 - ffffc1ffffffffff (=40 bits) hole ffffc20000000000 - ffffe1ffffffffff (=45 bits) vmalloc/ioremap space ffffe20000000000 - ffffe2ffffffffff (=40 bits) virtual memory map (1TB) ... unused hole ... -ffffffff80000000 - ffffffff82800000 (=40 MB) kernel text mapping, from phys 0 -... unused hole ... -ffffffff88000000 - fffffffffff00000 (=1919 MB) module mapping space +ffffffff80000000 - ffffffffa0000000 (=512 MB) kernel text mapping, from phys 0 +ffffffffa0000000 - fffffffffff00000 (=1536 MB) module mapping space The direct mapping covers all memory in the system up to the highest memory address (this means in some cases it can also include PCI memory diff --git a/Documentation/x86_64/uefi.txt b/Documentation/x86/x86_64/uefi.txt similarity index 84% rename from Documentation/x86_64/uefi.txt rename to Documentation/x86/x86_64/uefi.txt index 7d77120a51841aea77164a6aab2f682f10ca1a2d..a5e2b4fdb17049106f396a4bbc9f0bbff426cae3 100644 --- a/Documentation/x86_64/uefi.txt +++ b/Documentation/x86/x86_64/uefi.txt @@ -36,3 +36,7 @@ Mechanics: services. noefi turn off all EFI runtime services reboot_type=k turn off EFI reboot runtime service +- If the EFI memory map has additional entries not in the E820 map, + you can include those entries in the kernels memory map of available + physical RAM by using the following kernel command line parameter. + add_efi_memmap include EFI memory map of available physical RAM diff --git a/Kbuild b/Kbuild index e750e9c3fe59862e377a568e0758ca838e11c6f1..f056b4feee519748ae6ef22fde3df1da532e177b 100644 --- a/Kbuild +++ b/Kbuild @@ -43,7 +43,7 @@ $(obj)/$(bounds-file): kernel/bounds.s Kbuild # 2) Generate asm-offsets.h # -offsets-file := include/asm-$(SRCARCH)/asm-offsets.h +offsets-file := include/asm/asm-offsets.h always += $(offsets-file) targets += $(offsets-file) @@ -81,7 +81,6 @@ arch/$(SRCARCH)/kernel/asm-offsets.s: arch/$(SRCARCH)/kernel/asm-offsets.c \ $(call if_changed_dep,cc_s_c) $(obj)/$(offsets-file): arch/$(SRCARCH)/kernel/asm-offsets.s Kbuild - $(Q)mkdir -p $(dir $@) $(call cmd,offsets) ##### diff --git a/MAINTAINERS b/MAINTAINERS index 56a2f678019e7c067e62ce7a95c1fb86ade5df2d..deedc0d827b534af5f9d660f47162449da4bdb4f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -216,8 +216,8 @@ W: http://code.google.com/p/aceracpi S: Maintained ACPI -P: Len Brown -M: len.brown@intel.com +P: Andi Kleen +M: ak@linux.intel.com M: lenb@kernel.org L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ @@ -239,8 +239,8 @@ W: http://www.lesswatts.org/projects/acpi/ S: Supported ACPI FAN DRIVER -P: Len Brown -M: len.brown@intel.com +P: Zhang Rui +M: rui.zhang@intel.com L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ S: Supported @@ -248,18 +248,18 @@ S: Supported ACPI PCI HOTPLUG DRIVER P: Kristen Carlson Accardi M: kristen.c.accardi@intel.com -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported ACPI THERMAL DRIVER -P: Len Brown -M: len.brown@intel.com +P: Zhang Rui +M: rui.zhang@intel.com L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ S: Supported ACPI VIDEO DRIVER -P: Rui Zhang +P: Zhang Rui M: rui.zhang@intel.com L: linux-acpi@vger.kernel.org W: http://www.lesswatts.org/projects/acpi/ @@ -348,7 +348,9 @@ W: http://www.linux-usb.org/SpeedTouch/ S: Maintained ALCHEMY AU1XX0 MMC DRIVER -S: Orphan +P: Manuel Lauss +M: manuel.lauss@gmail.com +S: Maintained ALI1563 I2C DRIVER P: Rudolf Marek @@ -376,6 +378,12 @@ L: linux-geode@lists.infradead.org (moderated for non-subscribers) W: http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html S: Supported +AMD IOMMU (AMD-VI) +P: Joerg Roedel +M: joerg.roedel@amd.com +L: iommu@lists.linux-foundation.org +S: Supported + AMS (Apple Motion Sensor) DRIVER P: Stelian Pop M: stelian@popies.net @@ -433,10 +441,7 @@ M: spyro@f2s.com S: Maintained ARM PRIMECELL MMCI PL180/1 DRIVER -P: Russell King -M: rmk@arm.linux.org.uk -L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -S: Maintained +S: Orphan ARM/ADI ROADRUNNER MACHINE SUPPORT P: Lennert Buytenhek @@ -475,11 +480,28 @@ M: kernel@wantstofly.org L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) S: Maintained +ARM/COMPULAB CM-X270/EM-X270 MACHINE SUPPORT +P: Mike Rapoport +M: mike@compulab.co.il +L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) +S: Maintained + ARM/CORGI MACHINE SUPPORT P: Richard Purdie M: rpurdie@rpsys.net S: Maintained +ARM/EZX SMARTPHONES (A780, A910, A1200, E680, ROKR E2 and ROKR E6) +P: Daniel Ribeiro +M: drwyrm@gmail.com +P: Stefan Schmidt +M: stefan@openezx.org +P: Harald Welte +M: laforge@openezx.org +L: openezx-devel@lists.openezx.org (subscribers-only) +W: http://www.openezx.org/ +S: Maintained + ARM/GLOMATION GESBC9312SX MACHINE SUPPORT P: Lennert Buytenhek M: kernel@wantstofly.org @@ -567,10 +589,18 @@ L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) S: Maintained ARM/TOSA MACHINE SUPPORT +P: Dmitry Baryshkov +M: dbaryshkov@gmail.com P: Dirk Opfer M: dirk@opfer-online.de S: Maintained +ARM/PALMTX SUPPORT +P: Marek Vasut +M: marek.vasut@gmail.com +W: http://hackndev.com +S: Maintained + ARM/PLEB SUPPORT P: Peter Chubb M: pleb@gelato.unsw.edu.au @@ -1013,6 +1043,12 @@ M: fujita.tomonori@lab.ntt.co.jp L: linux-scsi@vger.kernel.org S: Supported +BT8XXGPIO DRIVER +P: Michael Buesch +M: mb@bu3sch.de +W: http://bu3sch.de/btgpio.php +S: Maintained + BTTV VIDEO4LINUX DRIVER P: Mauro Carvalho Chehab M: mchehab@infradead.org @@ -1137,23 +1173,28 @@ COMPACTPCI HOTPLUG CORE P: Scott Murray M: scottm@somanetworks.com M: scott@spiteful.org -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported COMPACTPCI HOTPLUG ZIATECH ZT5550 DRIVER P: Scott Murray M: scottm@somanetworks.com M: scott@spiteful.org -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported COMPACTPCI HOTPLUG GENERIC DRIVER P: Scott Murray M: scottm@somanetworks.com M: scott@spiteful.org -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported +COMPAL LAPTOP SUPPORT +P: Cezary Jackiewicz +M: cezary.jackiewicz@gmail.com +S: Maintained + COMPUTONE INTELLIPORT MULTIPORT CARD P: Michael H. Warfield M: mhw@wittsend.com @@ -1680,6 +1721,13 @@ L: linuxppc-embedded@ozlabs.org L: linux-kernel@vger.kernel.org S: Maintained +FREESCALE I2C CPM DRIVER +P: Jochen Friedrich +M: jochen@scram.de +L: linuxppc-dev@ozlabs.org +L: i2c@lm-sensors.org +S: Maintained + FREESCALE SOC FS_ENET DRIVER P: Pantelis Antoniou M: pantelis.antoniou@gmail.com @@ -1764,11 +1812,22 @@ M: hch@infradead.org W: ftp://ftp.openlinux.org/pub/people/hch/vxfs S: Maintained +FTRACE +P: Steven Rostedt +M: srostedt@redhat.com +S: Maintained + FUJITSU FR-V (FRV) PORT P: David Howells M: dhowells@redhat.com S: Maintained +FUJITSU LAPTOP EXTRAS +P: Jonathan Woithe +M: jwoithe@physics.adelaide.edu.au +L: linux-acpi@vger.kernel.org +S: Maintained + FUSE: FILESYSTEM IN USERSPACE P: Miklos Szeredi M: miklos@szeredi.hu @@ -1931,7 +1990,7 @@ P: Carlos Corbacho M: carlos@strangeworlds.co.uk S: Odd Fixes -HPET: High Precision Event Timers driver (hpet.c) +HPET: High Precision Event Timers driver (drivers/char/hpet.c) P: Clemens Ladisch M: clemens@ladisch.de S: Maintained @@ -1957,6 +2016,12 @@ M: mikulas@artax.karlin.mff.cuni.cz W: http://artax.karlin.mff.cuni.cz/~mikulas/vyplody/hpfs/index-e.cgi S: Maintained +HTCPEN TOUCHSCREEN DRIVER +P: Pau Oliva Fora +M: pof@eslack.org +L: linux-input@vger.kernel.org +S: Maintained + HUGETLB FILESYSTEM P: William Irwin M: wli@holomorphy.com @@ -2158,6 +2223,8 @@ P: Jesse Brandeburg M: jesse.brandeburg@intel.com P: Bruce Allan M: bruce.w.allan@intel.com +P: PJ Waskiewicz +M: peter.p.waskiewicz.jr@intel.com P: John Ronciak M: john.ronciak@intel.com L: e1000-devel@lists.sourceforge.net @@ -2307,6 +2374,16 @@ L: linux-mtd@lists.infradead.org W: http://www.linux-mtd.infradead.org/doc/jffs2.html S: Maintained +UBI FILE SYSTEM (UBIFS) +P: Artem Bityutskiy +M: dedekind@infradead.org +P: Adrian Hunter +M: ext-adrian.hunter@nokia.com +L: linux-mtd@lists.infradead.org +T: git git://git.infradead.org/~dedekind/ubifs-2.6.git +W: http://www.linux-mtd.infradead.org/doc/ubifs.html +S: Maintained + JFS FILESYSTEM P: Dave Kleikamp M: shaggy@austin.ibm.com @@ -2503,13 +2580,11 @@ W: http://www.penguinppc.org/ L: linuxppc-dev@ozlabs.org S: Maintained -LINUX FOR POWERPC EMBEDDED MPC52XX +LINUX FOR POWERPC EMBEDDED MPC5XXX P: Sylvain Munaut M: tnt@246tNt.com P: Grant Likely M: grant.likely@secretlab.ca -W: http://www.246tNt.com/mpc52xx/ -W: http://www.penguinppc.org/ L: linuxppc-dev@ozlabs.org S: Maintained @@ -2686,12 +2761,10 @@ L: libertas-dev@lists.infradead.org S: Maintained MARVELL MV643XX ETHERNET DRIVER -P: Dale Farnsworth -M: dale@farnsworth.org -P: Manish Lachwani -M: mlachwani@mvista.com +P: Lennert Buytenhek +M: buytenh@marvell.com L: netdev@vger.kernel.org -S: Odd Fixes for 2.4; Maintained for 2.6. +S: Supported MATROX FRAMEBUFFER DRIVER P: Petr Vandrovec @@ -2870,8 +2943,6 @@ P: Faisal Latif M: flatif@neteffect.com P: Chien Tung M: ctung@neteffect.com -P: Glenn Streiff -M: gstreiff@neteffect.com L: general@lists.openfabrics.org W: http://www.neteffect.com S: Supported @@ -3052,6 +3123,12 @@ W: http://oss.oracle.com/projects/ocfs2/ T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfasheh/ocfs2.git S: Supported +OMFS FILESYSTEM +P: Bob Copeland +M: me@bobcopeland.com +L: linux-karma-devel@lists.sourceforge.net +S: Maintained + OMNIKEY CARDMAN 4000 DRIVER P: Harald Welte M: laforge@gnumonks.org @@ -3180,7 +3257,7 @@ S: Supported PCIE HOTPLUG DRIVER P: Kristen Carlson Accardi M: kristen.c.accardi@intel.com -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported PCMCIA SUBSYSTEM @@ -3235,14 +3312,6 @@ L: linux-kernel@vger.kernel.org T: git git.infradead.org/battery-2.6.git S: Maintained -POWERPC 4xx EMAC DRIVER -P: Eugene Surovegin -M: ebs@ebshome.net -W: http://kernel.ebshome.net/emac/ -L: linuxppc-dev@ozlabs.org -L: netdev@vger.kernel.org -S: Maintained - PNP SUPPORT P: Adam Belay M: ambx1@neo.rr.com @@ -3496,7 +3565,7 @@ S: Supported S390 NETWORK DRIVERS P: Ursula Braun -M: ubraun@linux.vnet.ibm.com +M: ursula.braun@de.ibm.com P: Frank Blaschka M: blaschka@linux.vnet.ibm.com M: linux390@de.ibm.com @@ -3516,12 +3585,19 @@ S: Supported S390 IUCV NETWORK LAYER P: Ursula Braun -M: ubraun@linux.vnet.ibm.com +M: ursula.braun@de.ibm.com M: linux390@de.ibm.com L: linux-s390@vger.kernel.org W: http://www.ibm.com/developerworks/linux/linux390/ S: Supported +S3C24XX SD/MMC Driver +P: Ben Dooks +M: ben-linux@fluff.org +L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) +L: linux-kernel@vger.kernel.org +S: Supported + SAA7146 VIDEO4LINUX-2 DRIVER P: Michael Hunold M: michael@mihu.de @@ -3594,6 +3670,12 @@ P: Jim Cromie M: jim.cromie@gmail.com S: Maintained +SDRICOH_CS MMC/SD HOST CONTROLLER INTERFACE DRIVER +P: Sascha Sommer +M: saschasommer@freenet.de +L: sdricohcs-devel@lists.sourceforge.net (subscribers-only) +S: Maintained + SECURITY CONTACT P: Security Officers M: security@kernel.org @@ -3714,6 +3796,12 @@ P: Ben Nizette M: bn@niasdigital.com S: Maintained +SOC-CAMERA V4L2 SUBSYSTEM +P: Guennadi Liakhovetski +M: g.liakhovetski@gmx.de +L: video4linux-list@redhat.com +S: Maintained + SOFTWARE RAID (Multiple Disks) SUPPORT P: Ingo Molnar M: mingo@redhat.com @@ -3813,7 +3901,7 @@ S: Maintained SHPC HOTPLUG DRIVER P: Kristen Carlson Accardi M: kristen.c.accardi@intel.com -L: pcihpd-discuss@lists.sourceforge.net +L: linux-pci@vger.kernel.org S: Supported SECURE DIGITAL HOST CONTROLLER INTERFACE DRIVER @@ -3997,9 +4085,10 @@ W: http://www.buzzard.org.uk/toshiba/ S: Maintained TPM DEVICE DRIVER -P: Debora Velarde -P: Rajiv Andrade -M: tpmdd-devel@lists.sourceforge.net +P: Debora Velarde +M: debora@linux.vnet.ibm.com +P: Rajiv Andrade +M: srajiv@linux.vnet.ibm.com W: http://tpmdd.sourceforge.net P: Marcel Selhorst M: tpm@selhorst.net @@ -4007,12 +4096,6 @@ W: http://www.prosec.rub.de/tpm/ L: tpmdd-devel@lists.sourceforge.net S: Maintained -TRIDENT 4DWAVE/SIS 7018 PCI AUDIO CORE -P: Muli Ben-Yehuda -M: mulix@mulix.org -L: linux-kernel@vger.kernel.org -S: Maintained - TRIVIAL PATCHES P: Jesper Juhl M: trivial@kernel.org @@ -4058,9 +4141,6 @@ W: http://www.uclinux.org/ L: uclinux-dev@uclinux.org (subscribers-only) S: Maintained -UCLINUX FOR NEC V850 -P: Miles Bader - UCLINUX FOR RENESAS H8/300 P: Yoshinori Sato M: ysato@users.sourceforge.jp diff --git a/Makefile b/Makefile index e3c5eb66ec52dee13127e3b2b83f84c3184bd8be..aa527a46c8070f77582671b71b6e5470c0f87aae 100644 --- a/Makefile +++ b/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 -SUBLEVEL = 26 -EXTRAVERSION = +SUBLEVEL = 27 +EXTRAVERSION = -rc1 NAME = Rotary Wombat # *DOCUMENTATION* @@ -205,6 +205,13 @@ ifeq ($(ARCH),x86_64) SRCARCH := x86 endif +# Where to locate arch specific headers +ifeq ($(ARCH),sparc64) + hdr-arch := sparc +else + hdr-arch := $(SRCARCH) +endif + KCONFIG_CONFIG ?= .config # SHELL used by kbuild @@ -326,7 +333,8 @@ AFLAGS_KERNEL = # Needed to be compatible with the O= option LINUXINCLUDE := -Iinclude \ $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \ - -include include/linux/autoconf.h + -I$(srctree)/arch/$(hdr-arch)/include \ + -include include/linux/autoconf.h KBUILD_CPPFLAGS := -D__KERNEL__ $(LINUXINCLUDE) @@ -450,7 +458,7 @@ scripts: scripts_basic include/config/auto.conf # Objects we will link into vmlinux / subdirs we need to visit init-y := init/ -drivers-y := drivers/ sound/ +drivers-y := drivers/ sound/ firmware/ net-y := net/ libs-y := lib/ core-y := usr/ @@ -507,6 +515,8 @@ else KBUILD_CFLAGS += -O2 endif +include $(srctree)/arch/$(SRCARCH)/Makefile + ifneq (CONFIG_FRAME_WARN,0) KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN}) endif @@ -515,8 +525,6 @@ endif # Arch Makefiles may override this setting KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector) -include $(srctree)/arch/$(SRCARCH)/Makefile - ifdef CONFIG_FRAME_POINTER KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls else @@ -528,6 +536,10 @@ KBUILD_CFLAGS += -g KBUILD_AFLAGS += -gdwarf-2 endif +ifdef CONFIG_FTRACE +KBUILD_CFLAGS += -pg +endif + # We trigger additional mismatches with less inlining ifdef CONFIG_DEBUG_SECTION_MISMATCH KBUILD_CFLAGS += $(call cc-option, -fno-inline-functions-called-once) @@ -918,7 +930,9 @@ ifneq ($(KBUILD_SRC),) /bin/false; \ fi; $(Q)if [ ! -d include2 ]; then mkdir -p include2; fi; - $(Q)ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm + $(Q)if [ -e $(srctree)/include/asm-$(SRCARCH)/system.h ]; then \ + ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm; \ + fi endif # prepare2 creates a makefile if using a separate output directory @@ -944,22 +958,34 @@ export CPPFLAGS_vmlinux.lds += -P -C -U$(ARCH) # The asm symlink changes when $(ARCH) changes. # Detect this and ask user to run make mrproper - -include/asm: FORCE - $(Q)set -e; asmlink=`readlink include/asm | cut -d '-' -f 2`; \ - if [ -L include/asm ]; then \ - if [ "$$asmlink" != "$(SRCARCH)" ]; then \ +define check-symlink + set -e; \ + if [ -L include/asm ]; then \ + asmlink=`readlink include/asm | cut -d '-' -f 2`; \ + if [ "$$asmlink" != "$(SRCARCH)" ]; then \ echo "ERROR: the symlink $@ points to asm-$$asmlink but asm-$(SRCARCH) was expected"; \ echo " set ARCH or save .config and run 'make mrproper' to fix it"; \ - exit 1; \ - fi; \ - else \ - echo ' SYMLINK $@ -> include/asm-$(SRCARCH)'; \ - if [ ! -d include ]; then \ - mkdir -p include; \ - fi; \ - ln -fsn asm-$(SRCARCH) $@; \ + exit 1; \ + fi; \ fi +endef + +# We create the target directory of the symlink if it does +# not exist so the test in chack-symlink works and we have a +# directory for generated filesas used by some architectures. +define create-symlink + if [ ! -L include/asm ]; then \ + echo ' SYMLINK $@ -> include/asm-$(SRCARCH)'; \ + if [ ! -d include/asm-$(SRCARCH) ]; then \ + mkdir -p include/asm-$(SRCARCH); \ + fi; \ + ln -fsn asm-$(SRCARCH) $@; \ + fi +endef + +include/asm: FORCE + $(Q)$(check-symlink) + $(Q)$(create-symlink) # Generate some files # --------------------------------------------------------------------------- @@ -994,38 +1020,55 @@ PHONY += depend dep depend dep: @echo '*** Warning: make $@ is unnecessary now.' +# --------------------------------------------------------------------------- +# Firmware install +INSTALL_FW_PATH=$(INSTALL_MOD_PATH)/lib/firmware +export INSTALL_FW_PATH + +PHONY += firmware_install +firmware_install: FORCE + @mkdir -p $(objtree)/firmware + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_install + # --------------------------------------------------------------------------- # Kernel headers -INSTALL_HDR_PATH=$(objtree)/usr -export INSTALL_HDR_PATH -HDRFILTER=generic i386 x86_64 -HDRARCHES=$(filter-out $(HDRFILTER),$(patsubst $(srctree)/include/asm-%/Kbuild,%,$(wildcard $(srctree)/include/asm-*/Kbuild))) +#Default location for installed headers +export INSTALL_HDR_PATH = $(objtree)/usr -PHONY += headers_install_all -headers_install_all: include/linux/version.h scripts_basic FORCE +hdr-inst := -rR -f $(srctree)/scripts/Makefile.headersinst obj +# Find out where the Kbuild file is located to support +# arch/$(ARCH)/include/asm +hdr-dir = $(strip \ + $(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/asm/Kbuild), \ + arch/$(hdr-arch)/include/asm, include/asm-$(hdr-arch))) + +# If we do an all arch process set dst to asm-$(hdr-arch) +hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm) + +PHONY += __headers +__headers: include/linux/version.h scripts_basic FORCE $(Q)$(MAKE) $(build)=scripts scripts/unifdef - $(Q)for arch in $(HDRARCHES); do \ - $(MAKE) ARCH=$$arch -f $(srctree)/scripts/Makefile.headersinst obj=include BIASMDIR=-bi-$$arch ;\ - done + +PHONY += headers_install_all +headers_install_all: + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/headers.sh install PHONY += headers_install -headers_install: include/linux/version.h scripts_basic FORCE - @if [ ! -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \ - echo '*** Error: Headers not exportable for this architecture ($(SRCARCH))'; \ - exit 1 ; fi - $(Q)$(MAKE) $(build)=scripts scripts/unifdef - $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst ARCH=$(SRCARCH) obj=include +headers_install: __headers + $(if $(wildcard $(srctree)/$(hdr-dir)/Kbuild),, \ + $(error Headers not exportable for the $(SRCARCH) architecture)) + $(Q)$(MAKE) $(hdr-inst)=include + $(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst) PHONY += headers_check_all headers_check_all: headers_install_all - $(Q)for arch in $(HDRARCHES); do \ - $(MAKE) ARCH=$$arch -f $(srctree)/scripts/Makefile.headersinst obj=include BIASMDIR=-bi-$$arch HDRCHECK=1 ;\ - done + $(Q)$(CONFIG_SHELL) $(srctree)/scripts/headers.sh check PHONY += headers_check headers_check: headers_install - $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.headersinst ARCH=$(SRCARCH) obj=include HDRCHECK=1 + $(Q)$(MAKE) $(hdr-inst)=include HDRCHECK=1 + $(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst) HDRCHECK=1 # --------------------------------------------------------------------------- # Modules @@ -1047,6 +1090,7 @@ modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order @echo ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild # Target to prepare building external modules @@ -1080,6 +1124,7 @@ _modinst_: # boot script depmod is the master version. PHONY += _modinst_post _modinst_post: _modinst_ + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modinst $(call cmd,depmod) else # CONFIG_MODULES @@ -1115,7 +1160,7 @@ MRPROPER_FILES += .config .config.old include/asm .version .old_version \ include/linux/autoconf.h include/linux/version.h \ include/linux/utsrelease.h \ include/linux/bounds.h include/asm*/asm-offsets.h \ - Module.symvers tags TAGS cscope* + Module.symvers Module.markers tags TAGS cscope* # clean - Delete most, but leave enough to build external modules # @@ -1133,7 +1178,8 @@ clean: archclean $(clean-dirs) @find . $(RCS_FIND_IGNORE) \ \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \ -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ - -o -name '*.symtypes' -o -name 'modules.order' \) \ + -o -name '*.symtypes' -o -name 'modules.order' \ + -o -name 'Module.markers' -o -name '.tmp_*.o.*' \) \ -type f -print | xargs rm -f # mrproper - Delete all generated files, including .config @@ -1197,6 +1243,8 @@ help: @echo '* vmlinux - Build the bare kernel' @echo '* modules - Build all modules' @echo ' modules_install - Install all modules to INSTALL_MOD_PATH (default: /)' + @echo ' firmware_install- Install all firmware to INSTALL_FW_PATH' + @echo ' (default: $$(INSTALL_MOD_PATH)/lib/firmware)' @echo ' dir/ - Build all files in dir and below' @echo ' dir/file.[ois] - Build specified target only' @echo ' dir/file.ko - Build module including final link' @@ -1205,21 +1253,17 @@ help: @echo ' cscope - Generate cscope index' @echo ' kernelrelease - Output the release version string' @echo ' kernelversion - Output the version stored in Makefile' - @if [ -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \ - echo ' headers_install - Install sanitised kernel headers to INSTALL_HDR_PATH'; \ + @echo ' headers_install - Install sanitised kernel headers to INSTALL_HDR_PATH'; \ echo ' (default: $(INSTALL_HDR_PATH))'; \ - fi - @echo '' + echo '' @echo 'Static analysers' @echo ' checkstack - Generate a list of stack hogs' @echo ' namespacecheck - Name space analysis on compiled kernel' @echo ' versioncheck - Sanity check on version.h usage' @echo ' includecheck - Check for duplicate included header files' @echo ' export_report - List the usages of all exported symbols' - @if [ -r $(srctree)/include/asm-$(SRCARCH)/Kbuild ]; then \ - echo ' headers_check - Sanity check on exported headers'; \ - fi - @echo '' + @echo ' headers_check - Sanity check on exported headers'; \ + echo '' @echo 'Kernel packaging:' @$(MAKE) $(build)=$(package-dir) help @echo '' @@ -1392,7 +1436,11 @@ define find-sources \( -name config -o -name 'asm-*' \) -prune \ -o -name $1 -print; \ for arch in $(ALLINCLUDE_ARCHS) ; do \ - find $(__srctree)include/asm-$${arch} $(RCS_FIND_IGNORE) \ + test -e $(__srctree)include/asm-$${arch} && \ + find $(__srctree)include/asm-$${arch} $(RCS_FIND_IGNORE) \ + -name $1 -print; \ + test -e $(__srctree)arch/$${arch}/include/asm && \ + find $(__srctree)arch/$${arch}/include/asm $(RCS_FIND_IGNORE) \ -name $1 -print; \ done ; \ find $(__srctree)include/asm-generic $(RCS_FIND_IGNORE) \ diff --git a/arch/Kconfig b/arch/Kconfig index 3ea332b009e511f785349c725e716052d42877ef..364c6dadde0a6b6ed988f15294f799240b292a68 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -27,15 +27,65 @@ config KPROBES for kernel debugging, non-intrusive instrumentation and testing. If in doubt, say "N". +config HAVE_EFFICIENT_UNALIGNED_ACCESS + def_bool n + help + Some architectures are unable to perform unaligned accesses + without the use of get_unaligned/put_unaligned. Others are + unable to perform such accesses efficiently (e.g. trap on + unaligned access and require fixing it up in the exception + handler.) + + This symbol should be selected by an architecture if it can + perform unaligned accesses efficiently to allow different + code paths to be selected for these cases. Some network + drivers, for example, could opt to not fix up alignment + problems with received packets if doing so would not help + much. + + See Documentation/unaligned-memory-access.txt for more + information on the topic of unaligned memory accesses. + config KRETPROBES def_bool y depends on KPROBES && HAVE_KRETPROBES +config HAVE_IOREMAP_PROT + def_bool n + config HAVE_KPROBES def_bool n config HAVE_KRETPROBES def_bool n +# +# An arch should select this if it provides all these things: +# +# task_pt_regs() in asm/processor.h or asm/ptrace.h +# arch_has_single_step() if there is hardware single-step support +# arch_has_block_step() if there is hardware block-step support +# arch_ptrace() and not #define __ARCH_SYS_PTRACE +# compat_arch_ptrace() and #define __ARCH_WANT_COMPAT_SYS_PTRACE +# asm/syscall.h supplying asm-generic/syscall.h interface +# linux/regset.h user_regset interfaces +# CORE_DUMP_USE_REGSET #define'd in linux/elf.h +# TIF_SYSCALL_TRACE calls tracehook_report_syscall_{entry,exit} +# TIF_NOTIFY_RESUME calls tracehook_notify_resume() +# signal delivery calls tracehook_signal_handler() +# +config HAVE_ARCH_TRACEHOOK + def_bool n + config HAVE_DMA_ATTRS def_bool n + +config USE_GENERIC_SMP_HELPERS + def_bool n + +config HAVE_CLK + def_bool n + help + The calls support software clock gating and + thus are a key power management tool on many systems. + diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig index 729cdbdf8036203d99c1b59728aedf37d7a5349f..1bec55d63ef6241fb9451c821a09960657503acb 100644 --- a/arch/alpha/Kconfig +++ b/arch/alpha/Kconfig @@ -333,11 +333,6 @@ config PCI_SYSCALL config IOMMU_HELPER def_bool PCI -config ALPHA_CORE_AGP - bool - depends on ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL - default y - config ALPHA_NONAME bool depends on ALPHA_BOOK1 || ALPHA_NONAME_CH @@ -528,6 +523,7 @@ config ARCH_MAY_HAVE_PC_FDC config SMP bool "Symmetric multi-processing support" depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL + select USE_GENERIC_SMP_HELPERS ---help--- This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If diff --git a/arch/alpha/boot/misc.c b/arch/alpha/boot/misc.c index c00646b25f6e961862900c8e13bd69cb31a89823..3047a1b3a517160f4c016c032f30549e3c20ca19 100644 --- a/arch/alpha/boot/misc.c +++ b/arch/alpha/boot/misc.c @@ -78,8 +78,6 @@ static unsigned outcnt; /* bytes in output buffer */ static int fill_inbuf(void); static void flush_window(void); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); static char *input_data; static int input_data_size; @@ -88,51 +86,18 @@ static uch *output_data; static ulg output_ptr; static ulg bytes_out; -static void *malloc(int size); -static void free(void *where); static void error(char *m); static void gzip_mark(void **); static void gzip_release(void **); extern int end; static ulg free_mem_ptr; -static ulg free_mem_ptr_end; +static ulg free_mem_end_ptr; #define HEAP_SIZE 0x3000 #include "../../../lib/inflate.c" -static void *malloc(int size) -{ - void *p; - - if (size <0) error("Malloc error"); - if (free_mem_ptr <= 0) error("Memory error"); - - free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ - - p = (void *)free_mem_ptr; - free_mem_ptr += size; - - if (free_mem_ptr >= free_mem_ptr_end) - error("Out of memory"); - return p; -} - -static void free(void *where) -{ /* gzip_mark & gzip_release do the free */ -} - -static void gzip_mark(void **ptr) -{ - *ptr = (void *) free_mem_ptr; -} - -static void gzip_release(void **ptr) -{ - free_mem_ptr = (long) *ptr; -} - /* =========================================================================== * Fill the input buffer. This is called only when the buffer is empty * and at least one byte is really needed. @@ -193,7 +158,7 @@ decompress_kernel(void *output_start, /* FIXME FIXME FIXME */ free_mem_ptr = (ulg)output_start + ksize; - free_mem_ptr_end = (ulg)output_start + ksize + 0x200000; + free_mem_end_ptr = (ulg)output_start + ksize + 0x200000; /* FIXME FIXME FIXME */ /* put in temp area to reduce initial footprint */ diff --git a/arch/alpha/kernel/core_marvel.c b/arch/alpha/kernel/core_marvel.c index b04f1feb1dda80cd6c9868473b9c8789f1db4906..04dcc5e5d4c1c4954d8c80186ac3390d1a9074cc 100644 --- a/arch/alpha/kernel/core_marvel.c +++ b/arch/alpha/kernel/core_marvel.c @@ -660,9 +660,9 @@ __marvel_rtc_io(u8 b, unsigned long addr, int write) #ifdef CONFIG_SMP if (smp_processor_id() != boot_cpuid) - smp_call_function_on_cpu(__marvel_access_rtc, - &rtc_access, 1, 1, - cpumask_of_cpu(boot_cpuid)); + smp_call_function_single(boot_cpuid, + __marvel_access_rtc, + &rtc_access, 1); else __marvel_access_rtc(&rtc_access); #else diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c index facf82a5499a84ce83e72e4d4a70324d0ea224d5..c626a821cdcb9eacc089121b52d7afa6f3f5fe4f 100644 --- a/arch/alpha/kernel/irq.c +++ b/arch/alpha/kernel/irq.c @@ -42,8 +42,7 @@ void ack_bad_irq(unsigned int irq) #ifdef CONFIG_SMP static char irq_user_affinity[NR_IRQS]; -int -select_smp_affinity(unsigned int irq) +int irq_select_affinity(unsigned int irq) { static int last_cpu; int cpu = last_cpu + 1; @@ -51,7 +50,7 @@ select_smp_affinity(unsigned int irq) if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq]) return 1; - while (!cpu_possible(cpu)) + while (!cpu_possible(cpu) || !cpu_isset(cpu, irq_default_affinity)) cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); last_cpu = cpu; diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index 32ca1b9273078d7025466075e677a59e34938b33..6e943135f0e041346e63348a18fb33239113b9c1 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c @@ -253,15 +253,15 @@ do_osf_statfs(struct dentry * dentry, struct osf_statfs __user *buffer, } asmlinkage int -osf_statfs(char __user *path, struct osf_statfs __user *buffer, unsigned long bufsiz) +osf_statfs(char __user *pathname, struct osf_statfs __user *buffer, unsigned long bufsiz) { - struct nameidata nd; + struct path path; int retval; - retval = user_path_walk(path, &nd); + retval = user_path(pathname, &path); if (!retval) { - retval = do_osf_statfs(nd.path.dentry, buffer, bufsiz); - path_put(&nd.path); + retval = do_osf_statfs(path.dentry, buffer, bufsiz); + path_put(&path); } return retval; } diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index 96ed82fd9eef94b775de953ff41872cbdc266f3e..351407e07e71a715a654936b744e498f2cbfb2e0 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -160,7 +160,7 @@ common_shutdown(int mode, char *restart_cmd) struct halt_info args; args.mode = mode; args.restart_cmd = restart_cmd; - on_each_cpu(common_shutdown_1, &args, 1, 0); + on_each_cpu(common_shutdown_1, &args, 0); } void diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index 2525692db0abd2608f1acfc78ac351668a57c85e..83df541650fcec6171e919fca76d1c1acaa1009a 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c @@ -62,6 +62,7 @@ static struct { enum ipi_message_type { IPI_RESCHEDULE, IPI_CALL_FUNC, + IPI_CALL_FUNC_SINGLE, IPI_CPU_STOP, }; @@ -558,51 +559,6 @@ send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation) wripir(i); } -/* Structure and data for smp_call_function. This is designed to - minimize static memory requirements. Plus it looks cleaner. */ - -struct smp_call_struct { - void (*func) (void *info); - void *info; - long wait; - atomic_t unstarted_count; - atomic_t unfinished_count; -}; - -static struct smp_call_struct *smp_call_function_data; - -/* Atomicly drop data into a shared pointer. The pointer is free if - it is initially locked. If retry, spin until free. */ - -static int -pointer_lock (void *lock, void *data, int retry) -{ - void *old, *tmp; - - mb(); - again: - /* Compare and swap with zero. */ - asm volatile ( - "1: ldq_l %0,%1\n" - " mov %3,%2\n" - " bne %0,2f\n" - " stq_c %2,%1\n" - " beq %2,1b\n" - "2:" - : "=&r"(old), "=m"(*(void **)lock), "=&r"(tmp) - : "r"(data) - : "memory"); - - if (old == 0) - return 0; - if (! retry) - return -EBUSY; - - while (*(void **)lock) - barrier(); - goto again; -} - void handle_ipi(struct pt_regs *regs) { @@ -632,31 +588,12 @@ handle_ipi(struct pt_regs *regs) break; case IPI_CALL_FUNC: - { - struct smp_call_struct *data; - void (*func)(void *info); - void *info; - int wait; - - data = smp_call_function_data; - func = data->func; - info = data->info; - wait = data->wait; - - /* Notify the sending CPU that the data has been - received, and execution is about to begin. */ - mb(); - atomic_dec (&data->unstarted_count); - - /* At this point the structure may be gone unless - wait is true. */ - (*func)(info); - - /* Notify the sending CPU that the task is done. */ - mb(); - if (wait) atomic_dec (&data->unfinished_count); + generic_smp_call_function_interrupt(); + break; + + case IPI_CALL_FUNC_SINGLE: + generic_smp_call_function_single_interrupt(); break; - } case IPI_CPU_STOP: halt(); @@ -700,102 +637,15 @@ smp_send_stop(void) send_ipi_message(to_whom, IPI_CPU_STOP); } -/* - * Run a function on all other CPUs. - * The function to run. This must be fast and non-blocking. - * An arbitrary pointer to pass to the function. - * If true, keep retrying until ready. - * If true, wait until function has completed on other CPUs. - * [RETURNS] 0 on success, else a negative status code. - * - * Does not return until remote CPUs are nearly ready to execute - * or are or have executed. - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ - -int -smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry, - int wait, cpumask_t to_whom) +void arch_send_call_function_ipi(cpumask_t mask) { - struct smp_call_struct data; - unsigned long timeout; - int num_cpus_to_call; - - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - - data.func = func; - data.info = info; - data.wait = wait; - - cpu_clear(smp_processor_id(), to_whom); - num_cpus_to_call = cpus_weight(to_whom); - - atomic_set(&data.unstarted_count, num_cpus_to_call); - atomic_set(&data.unfinished_count, num_cpus_to_call); - - /* Acquire the smp_call_function_data mutex. */ - if (pointer_lock(&smp_call_function_data, &data, retry)) - return -EBUSY; - - /* Send a message to the requested CPUs. */ - send_ipi_message(to_whom, IPI_CALL_FUNC); - - /* Wait for a minimal response. */ - timeout = jiffies + HZ; - while (atomic_read (&data.unstarted_count) > 0 - && time_before (jiffies, timeout)) - barrier(); - - /* If there's no response yet, log a message but allow a longer - * timeout period -- if we get a response this time, log - * a message saying when we got it.. - */ - if (atomic_read(&data.unstarted_count) > 0) { - long start_time = jiffies; - printk(KERN_ERR "%s: initial timeout -- trying long wait\n", - __func__); - timeout = jiffies + 30 * HZ; - while (atomic_read(&data.unstarted_count) > 0 - && time_before(jiffies, timeout)) - barrier(); - if (atomic_read(&data.unstarted_count) <= 0) { - long delta = jiffies - start_time; - printk(KERN_ERR - "%s: response %ld.%ld seconds into long wait\n", - __func__, delta / HZ, - (100 * (delta - ((delta / HZ) * HZ))) / HZ); - } - } - - /* We either got one or timed out -- clear the lock. */ - mb(); - smp_call_function_data = NULL; - - /* - * If after both the initial and long timeout periods we still don't - * have a response, something is very wrong... - */ - BUG_ON(atomic_read (&data.unstarted_count) > 0); - - /* Wait for a complete response, if needed. */ - if (wait) { - while (atomic_read (&data.unfinished_count) > 0) - barrier(); - } - - return 0; + send_ipi_message(mask, IPI_CALL_FUNC); } -EXPORT_SYMBOL(smp_call_function_on_cpu); -int -smp_call_function (void (*func) (void *info), void *info, int retry, int wait) +void arch_send_call_function_single_ipi(int cpu) { - return smp_call_function_on_cpu (func, info, retry, wait, - cpu_online_map); + send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); } -EXPORT_SYMBOL(smp_call_function); static void ipi_imb(void *ignored) @@ -807,7 +657,7 @@ void smp_imb(void) { /* Must wait other processors to flush their icache before continue. */ - if (on_each_cpu(ipi_imb, NULL, 1, 1)) + if (on_each_cpu(ipi_imb, NULL, 1)) printk(KERN_CRIT "smp_imb: timed out\n"); } EXPORT_SYMBOL(smp_imb); @@ -823,7 +673,7 @@ flush_tlb_all(void) { /* Although we don't have any data to pass, we do want to synchronize with the other processors. */ - if (on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1)) { + if (on_each_cpu(ipi_flush_tlb_all, NULL, 1)) { printk(KERN_CRIT "flush_tlb_all: timed out\n"); } } @@ -860,7 +710,7 @@ flush_tlb_mm(struct mm_struct *mm) } } - if (smp_call_function(ipi_flush_tlb_mm, mm, 1, 1)) { + if (smp_call_function(ipi_flush_tlb_mm, mm, 1)) { printk(KERN_CRIT "flush_tlb_mm: timed out\n"); } @@ -913,7 +763,7 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) data.mm = mm; data.addr = addr; - if (smp_call_function(ipi_flush_tlb_page, &data, 1, 1)) { + if (smp_call_function(ipi_flush_tlb_page, &data, 1)) { printk(KERN_CRIT "flush_tlb_page: timed out\n"); } @@ -965,7 +815,7 @@ flush_icache_user_range(struct vm_area_struct *vma, struct page *page, } } - if (smp_call_function(ipi_flush_icache_page, mm, 1, 1)) { + if (smp_call_function(ipi_flush_icache_page, mm, 1)) { printk(KERN_CRIT "flush_icache_page: timed out\n"); } diff --git a/arch/alpha/mm/init.c b/arch/alpha/mm/init.c index 40c15e7301ded438baa46d83e67fcac06062efd6..234e42b8ee7436cb61455c3eabe8f3d8f61ea183 100644 --- a/arch/alpha/mm/init.c +++ b/arch/alpha/mm/init.c @@ -94,36 +94,6 @@ __bad_page(void) return pte_mkdirty(mk_pte(virt_to_page(EMPTY_PGE), PAGE_SHARED)); } -#ifndef CONFIG_DISCONTIGMEM -void -show_mem(void) -{ - long i,free = 0,total = 0,reserved = 0; - long shared = 0, cached = 0; - - printk("\nMem-info:\n"); - show_free_areas(); - printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); - i = max_mapnr; - while (i-- > 0) { - total++; - if (PageReserved(mem_map+i)) - reserved++; - else if (PageSwapCache(mem_map+i)) - cached++; - else if (!page_count(mem_map+i)) - free++; - else - shared += page_count(mem_map + i) - 1; - } - printk("%ld pages of RAM\n",total); - printk("%ld free pages\n",free); - printk("%ld reserved pages\n",reserved); - printk("%ld pages shared\n",shared); - printk("%ld pages swap cached\n",cached); -} -#endif - static inline unsigned long load_PCB(struct pcb_struct *pcb) { diff --git a/arch/alpha/mm/numa.c b/arch/alpha/mm/numa.c index 10ab7833e83ca660c7292869e501434251e4bdba..a13de49d126579c58f2b4d3131dd861741628d59 100644 --- a/arch/alpha/mm/numa.c +++ b/arch/alpha/mm/numa.c @@ -19,7 +19,6 @@ #include pg_data_t node_data[MAX_NUMNODES]; -bootmem_data_t node_bdata[MAX_NUMNODES]; EXPORT_SYMBOL(node_data); #undef DEBUG_DISCONTIG @@ -141,7 +140,7 @@ setup_memory_node(int nid, void *kernel_end) printk(" not enough mem to reserve NODE_DATA"); return; } - NODE_DATA(nid)->bdata = &node_bdata[nid]; + NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; printk(" Detected node memory: start %8lu, end %8lu\n", node_min_pfn, node_max_pfn); @@ -304,8 +303,9 @@ void __init paging_init(void) dma_local_pfn = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT; for_each_online_node(nid) { - unsigned long start_pfn = node_bdata[nid].node_boot_start >> PAGE_SHIFT; - unsigned long end_pfn = node_bdata[nid].node_low_pfn; + bootmem_data_t *bdata = &bootmem_node_data[nid]; + unsigned long start_pfn = bdata->node_min_pfn; + unsigned long end_pfn = bdata->node_low_pfn; if (dma_local_pfn >= end_pfn - start_pfn) zones_size[ZONE_DMA] = end_pfn - start_pfn; @@ -313,7 +313,7 @@ void __init paging_init(void) zones_size[ZONE_DMA] = dma_local_pfn; zones_size[ZONE_NORMAL] = (end_pfn - start_pfn) - dma_local_pfn; } - free_area_init_node(nid, NODE_DATA(nid), zones_size, start_pfn, NULL); + free_area_init_node(nid, zones_size, start_pfn, NULL); } /* Initialize the kernel's ZERO_PGE. */ @@ -359,38 +359,3 @@ void __init mem_init(void) mem_stress(); #endif } - -void -show_mem(void) -{ - long i,free = 0,total = 0,reserved = 0; - long shared = 0, cached = 0; - int nid; - - printk("\nMem-info:\n"); - show_free_areas(); - printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); - for_each_online_node(nid) { - unsigned long flags; - pgdat_resize_lock(NODE_DATA(nid), &flags); - i = node_spanned_pages(nid); - while (i-- > 0) { - struct page *page = nid_page_nr(nid, i); - total++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (!page_count(page)) - free++; - else - shared += page_count(page) - 1; - } - pgdat_resize_unlock(NODE_DATA(nid), &flags); - } - printk("%ld pages of RAM\n",total); - printk("%ld free pages\n",free); - printk("%ld reserved pages\n",reserved); - printk("%ld pages shared\n",shared); - printk("%ld pages swap cached\n",cached); -} diff --git a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c index 9fc0eeb4f0abffb573b69365d28eca36b5d5e70d..7c3d5ec6ec676d579f027b5caaddcafbb8584e3e 100644 --- a/arch/alpha/oprofile/common.c +++ b/arch/alpha/oprofile/common.c @@ -65,7 +65,7 @@ op_axp_setup(void) model->reg_setup(®, ctr, &sys); /* Configure the registers on all cpus. */ - (void)smp_call_function(model->cpu_setup, ®, 0, 1); + (void)smp_call_function(model->cpu_setup, ®, 1); model->cpu_setup(®); return 0; } @@ -86,7 +86,7 @@ op_axp_cpu_start(void *dummy) static int op_axp_start(void) { - (void)smp_call_function(op_axp_cpu_start, NULL, 0, 1); + (void)smp_call_function(op_axp_cpu_start, NULL, 1); op_axp_cpu_start(NULL); return 0; } @@ -101,7 +101,7 @@ op_axp_cpu_stop(void *dummy) static void op_axp_stop(void) { - (void)smp_call_function(op_axp_cpu_stop, NULL, 0, 1); + (void)smp_call_function(op_axp_cpu_stop, NULL, 1); op_axp_cpu_stop(NULL); } diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b786e68914d4a20b12b743ee886b9acdbed623d7..257033c691f2618adf9c6103d9e1e9090b470fcb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -12,8 +12,12 @@ config ARM select RTC_LIB select SYS_SUPPORTS_APM_EMULATION select HAVE_OPROFILE + select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) select HAVE_KRETPROBES if (HAVE_KPROBES) + select HAVE_FTRACE if (!XIP_KERNEL) + select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE) + select HAVE_GENERIC_DMA_COHERENT help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -22,6 +26,9 @@ config ARM Europe. There is an ARM Linux project with a web page at . +config HAVE_PWM + bool + config SYS_SUPPORTS_APM_EMULATION bool @@ -84,6 +91,11 @@ config STACKTRACE_SUPPORT bool default y +config HAVE_LATENCYTOP_SUPPORT + bool + depends on !SMP + default y + config LOCKDEP_SUPPORT bool default y @@ -147,6 +159,10 @@ config FIQ config ARCH_MTD_XIP bool +config GENERIC_HARDIRQS_NO__DO_IRQ + bool + def_bool y + if OPROFILE config OPROFILE_ARMV6 @@ -183,12 +199,14 @@ choice config ARCH_AAEC2000 bool "Agilent AAEC-2000 based" select ARM_AMBA + select HAVE_CLK help This enables support for systems based on the Agilent AAEC-2000 config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" select ARM_AMBA + select HAVE_CLK select ICST525 help Support for ARM's Integrator platform. @@ -196,6 +214,7 @@ config ARCH_INTEGRATOR config ARCH_REALVIEW bool "ARM Ltd. RealView family" select ARM_AMBA + select HAVE_CLK select ICST307 select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -206,6 +225,7 @@ config ARCH_VERSATILE bool "ARM Ltd. Versatile family" select ARM_AMBA select ARM_VIC + select HAVE_CLK select ICST307 select GENERIC_TIME select GENERIC_CLOCKEVENTS @@ -215,6 +235,7 @@ config ARCH_VERSATILE config ARCH_AT91 bool "Atmel AT91" select GENERIC_GPIO + select HAVE_CLK help This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. @@ -232,13 +253,6 @@ config ARCH_CLPS711X help Support for Cirrus Logic 711x/721x based boards. -config ARCH_CO285 - bool "Co-EBSA285" - select FOOTBRIDGE - select FOOTBRIDGE_ADDIN - help - Support for Intel's EBSA285 companion chip. - config ARCH_EBSA110 bool "EBSA-110" select ISA @@ -254,7 +268,8 @@ config ARCH_EP93XX select ARM_AMBA select ARM_VIC select GENERIC_GPIO - select HAVE_GPIO_LIB + select HAVE_CLK + select ARCH_REQUIRE_GPIOLIB help This enables support for the Cirrus EP93xx series of CPUs. @@ -299,6 +314,8 @@ config ARCH_IOP32X depends on MMU select PLAT_IOP select PCI + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB help Support for Intel's 80219 and IOP32X (XScale) family of processors. @@ -308,6 +325,8 @@ config ARCH_IOP33X depends on MMU select PLAT_IOP select PCI + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB help Support for Intel's IOP33X (XScale) family of processors. @@ -347,6 +366,16 @@ config ARCH_L7200 If you have any questions or comments about the Linux kernel port to this board, send e-mail to . +config ARCH_KIRKWOOD + bool "Marvell Kirkwood" + select PCI + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select PLAT_ORION + help + Support for the following Marvell Kirkwood series SoCs: + 88F6180, 88F6192 and 88F6281. + config ARCH_KS8695 bool "Micrel/Kendin KS8695" select GENERIC_GPIO @@ -359,15 +388,38 @@ config ARCH_NS9XXX select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS + select HAVE_CLK help Say Y here if you intend to run this kernel on a NetSilicon NS9xxx System. +config ARCH_LOKI + bool "Marvell Loki (88RC8480)" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select PLAT_ORION + help + Support for the Marvell Loki (88RC8480) SoC. + +config ARCH_MV78XX0 + bool "Marvell MV78xx0" + select PCI + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select PLAT_ORION + help + Support for the following Marvell MV78xx0 series SoCs: + MV781x0, MV782x0. + config ARCH_MXC bool "Freescale MXC/iMX-based" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS select ARCH_MTD_XIP + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB help Support for Freescale MXC/iMX-based family of processors @@ -381,10 +433,12 @@ config ARCH_ORION5X select PLAT_ORION help Support for the following Marvell Orion 5x series SoCs: - Orion-1 (5181), Orion-NAS (5182), Orion-2 (5281.) + Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), + Orion-2 (5281). config ARCH_PNX4008 bool "Philips Nexperia PNX4008 Mobile" + select HAVE_CLK help This enables support for Philips PNX4008 mobile platform. @@ -393,7 +447,8 @@ config ARCH_PXA depends on MMU select ARCH_MTD_XIP select GENERIC_GPIO - select HAVE_GPIO_LIB + select HAVE_CLK + select ARCH_REQUIRE_GPIOLIB select GENERIC_TIME select GENERIC_CLOCKEVENTS select TICK_ONESHOT @@ -406,6 +461,7 @@ config ARCH_RPC select FIQ select TIMER_ACORN select ARCH_MAY_HAVE_PC_FDC + select HAVE_PATA_PLATFORM select ISA_DMA_API select NO_IOPORT help @@ -422,14 +478,16 @@ config ARCH_SA1100 select GENERIC_GPIO select GENERIC_TIME select GENERIC_CLOCKEVENTS + select HAVE_CLK select TICK_ONESHOT - select HAVE_GPIO_LIB + select ARCH_REQUIRE_GPIOLIB help Support for StrongARM 11x0 based boards. config ARCH_S3C2410 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443" select GENERIC_GPIO + select HAVE_CLK help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or @@ -457,13 +515,15 @@ config ARCH_DAVINCI select GENERIC_TIME select GENERIC_CLOCKEVENTS select GENERIC_GPIO + select HAVE_CLK help Support for TI's DaVinci platform. config ARCH_OMAP bool "TI OMAP" select GENERIC_GPIO - select HAVE_GPIO_LIB + select HAVE_CLK + select ARCH_REQUIRE_GPIOLIB select GENERIC_TIME select GENERIC_CLOCKEVENTS help @@ -502,6 +562,10 @@ source "arch/arm/mach-ixp2000/Kconfig" source "arch/arm/mach-ixp23xx/Kconfig" +source "arch/arm/mach-loki/Kconfig" + +source "arch/arm/mach-mv78xx0/Kconfig" + source "arch/arm/mach-pxa/Kconfig" source "arch/arm/mach-sa1100/Kconfig" @@ -514,6 +578,8 @@ source "arch/arm/mach-omap2/Kconfig" source "arch/arm/mach-orion5x/Kconfig" +source "arch/arm/mach-kirkwood/Kconfig" + source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s3c/Kconfig" @@ -650,6 +716,7 @@ source "kernel/time/Kconfig" config SMP bool "Symmetric Multi-Processing (EXPERIMENTAL)" depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) + select USE_GENERIC_SMP_HELPERS help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -703,27 +770,6 @@ config PREEMPT Say Y here if you are building a kernel for a desktop, embedded or real-time system. Say N if you are unsure. -config NO_IDLE_HZ - bool "Dynamic tick timer" - depends on !GENERIC_CLOCKEVENTS - help - Select this option if you want to disable continuous timer ticks - and have them programmed to occur as required. This option saves - power as the system can remain in idle state for longer. - - By default dynamic tick is disabled during the boot, and can be - manually enabled with: - - echo 1 > /sys/devices/system/timer/timer0/dyn_tick - - Alternatively, if you want dynamic tick automatically enabled - during boot, pass "dyntick=enable" via the kernel command string. - - Please note that dynamic tick may affect the accuracy of - timekeeping on some platforms depending on the implementation. - Currently at least OMAP, PXA2xx and SA11x0 platforms are known - to have accurate timekeeping with dynamic tick. - config HZ int default 128 if ARCH_L7200 @@ -789,7 +835,7 @@ source "mm/Kconfig" config LEDS bool "Timer and CPU usage LEDs" - depends on ARCH_CDB89712 || ARCH_CO285 || ARCH_EBSA110 || \ + depends on ARCH_CDB89712 || ARCH_EBSA110 || \ ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \ ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ diff --git a/arch/arm/Makefile b/arch/arm/Makefile index e72db27e0ba074e599d9eda4101c417c19f78362..2f07477442369ee44b88cbd7fe3a57bcea8ec774 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -67,7 +67,7 @@ tune-$(CONFIG_CPU_ARM720T) :=-mtune=arm7tdmi tune-$(CONFIG_CPU_ARM740T) :=-mtune=arm7tdmi tune-$(CONFIG_CPU_ARM9TDMI) :=-mtune=arm9tdmi tune-$(CONFIG_CPU_ARM940T) :=-mtune=arm9tdmi -tune-$(CONFIG_CPU_ARM946T) :=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi) +tune-$(CONFIG_CPU_ARM946E) :=$(call cc-option,-mtune=arm9e,-mtune=arm9tdmi) tune-$(CONFIG_CPU_ARM920T) :=-mtune=arm9tdmi tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi tune-$(CONFIG_CPU_ARM925T) :=-mtune=arm9tdmi @@ -100,8 +100,6 @@ textofs-y := 0x00008000 incdir-$(CONFIG_ARCH_CLPS7500) := cl7500 machine-$(CONFIG_FOOTBRIDGE) := footbridge incdir-$(CONFIG_FOOTBRIDGE) := ebsa285 - machine-$(CONFIG_ARCH_CO285) := footbridge - incdir-$(CONFIG_ARCH_CO285) := ebsa285 machine-$(CONFIG_ARCH_SHARK) := shark machine-$(CONFIG_ARCH_SA1100) := sa1100 ifeq ($(CONFIG_ARCH_SA1100),y) @@ -135,11 +133,15 @@ endif machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx machine-$(CONFIG_ARCH_DAVINCI) := davinci + machine-$(CONFIG_ARCH_KIRKWOOD) := kirkwood machine-$(CONFIG_ARCH_KS8695) := ks8695 incdir-$(CONFIG_ARCH_MXC) := mxc + machine-$(CONFIG_ARCH_MX2) := mx2 machine-$(CONFIG_ARCH_MX3) := mx3 machine-$(CONFIG_ARCH_ORION5X) := orion5x machine-$(CONFIG_ARCH_MSM7X00A) := msm + machine-$(CONFIG_ARCH_LOKI) := loki + machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. @@ -190,8 +192,6 @@ core-$(CONFIG_PLAT_S3C24XX) += arch/arm/plat-s3c24xx/ core-$(CONFIG_ARCH_MXC) += arch/arm/plat-mxc/ drivers-$(CONFIG_OPROFILE) += arch/arm/oprofile/ -drivers-$(CONFIG_ARCH_CLPS7500) += drivers/acorn/char/ -drivers-$(CONFIG_ARCH_L7200) += drivers/acorn/char/ libs-y := arch/arm/lib/ $(libs-y) diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index de9d9ee50958089bcf8fb7217fd1c48617d6097c..95baac4939e09a3809e427ed82207c5f3c1270c7 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -69,6 +69,12 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ head.o misc.o $(OBJS) + +ifeq ($(CONFIG_FTRACE),y) +ORIG_CFLAGS := $(KBUILD_CFLAGS) +KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) +endif + EXTRA_CFLAGS := -fpic -fno-builtin EXTRA_AFLAGS := diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 3c2c8f2a1dc4f4e6a4da9dc0bd50b4b4447d42c4..de41daeab5e9832416218a0ca3e07b9a15cb219f 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -623,8 +623,8 @@ proc_types: b __armv4_mmu_cache_off b __armv4_mmu_cache_flush - .word 0x56055310 @ Feroceon - .word 0xfffffff0 + .word 0x56050000 @ Feroceon + .word 0xff0f0000 b __armv4_mmu_cache_on b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index 9b444022cb9bc76933f1fdba6dffb294723fd7ac..7145cc7c04f0b8e36fb4b86205602fa7e0618bac 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c @@ -217,8 +217,6 @@ static unsigned outcnt; /* bytes in output buffer */ static int fill_inbuf(void); static void flush_window(void); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); extern char input_data[]; extern char input_data_end[]; @@ -227,64 +225,21 @@ static uch *output_data; static ulg output_ptr; static ulg bytes_out; -static void *malloc(int size); -static void free(void *where); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); static void putstr(const char *); extern int end; static ulg free_mem_ptr; -static ulg free_mem_ptr_end; +static ulg free_mem_end_ptr; -#define HEAP_SIZE 0x3000 - -#include "../../../../lib/inflate.c" - -#ifndef STANDALONE_DEBUG -static void *malloc(int size) -{ - void *p; - - if (size <0) error("Malloc error"); - if (free_mem_ptr <= 0) error("Memory error"); - - free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ - - p = (void *)free_mem_ptr; - free_mem_ptr += size; - - if (free_mem_ptr >= free_mem_ptr_end) - error("Out of memory"); - return p; -} - -static void free(void *where) -{ /* gzip_mark & gzip_release do the free */ -} - -static void gzip_mark(void **ptr) -{ - arch_decomp_wdog(); - *ptr = (void *) free_mem_ptr; -} +#ifdef STANDALONE_DEBUG +#define NO_INFLATE_MALLOC +#endif -static void gzip_release(void **ptr) -{ - arch_decomp_wdog(); - free_mem_ptr = (long) *ptr; -} -#else -static void gzip_mark(void **ptr) -{ -} +#define ARCH_HAS_DECOMP_WDOG -static void gzip_release(void **ptr) -{ -} -#endif +#include "../../../../lib/inflate.c" /* =========================================================================== * Fill the input buffer. This is called only when the buffer is empty @@ -348,7 +303,7 @@ decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p, { output_data = (uch *)output_start; /* Points to kernel start */ free_mem_ptr = free_mem_ptr_p; - free_mem_ptr_end = free_mem_ptr_end_p; + free_mem_end_ptr = free_mem_ptr_end_p; __machine_arch_type = arch_id; arch_decomp_setup(); diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index 3d0b9fa42f8408e438befad96672e97ee0e27007..325e4b6a6afbdc842df5a822cdc507998508d55b 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -2,7 +2,6 @@ # Makefile for the linux kernel. # -obj-y += rtctime.o obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_ARM_VIC) += vic.o obj-$(CONFIG_ICST525) += icst525.o diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 2744673314b470cb84b68d1ff9a040a0356d34af..69130f365904bc0889e3f99d75af10834c9a9f8d 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c @@ -280,7 +280,7 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, /* * Trying to unmap an invalid mapping */ - if (dma_mapping_error(dma_addr)) { + if (dma_mapping_error(dev, dma_addr)) { dev_err(dev, "Trying to unmap invalid mapping\n"); return; } @@ -554,9 +554,8 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, device_info = kmalloc(sizeof(struct dmabounce_device_info), GFP_ATOMIC); if (!device_info) { - printk(KERN_ERR - "Could not allocated dmabounce_device_info for %s", - dev->bus_id); + dev_err(dev, + "Could not allocated dmabounce_device_info\n"); return -ENOMEM; } @@ -594,8 +593,7 @@ dmabounce_register_dev(struct device *dev, unsigned long small_buffer_size, dev->archdata.dmabounce = device_info; - printk(KERN_INFO "dmabounce: registered device %s on %s bus\n", - dev->bus_id, dev->bus->name); + dev_info(dev, "dmabounce: registered device\n"); return 0; @@ -614,16 +612,15 @@ dmabounce_unregister_dev(struct device *dev) dev->archdata.dmabounce = NULL; if (!device_info) { - printk(KERN_WARNING - "%s: Never registered with dmabounce but attempting" \ - "to unregister!\n", dev->bus_id); + dev_warn(dev, + "Never registered with dmabounce but attempting" + "to unregister!\n"); return; } if (!list_empty(&device_info->safe_buffers)) { - printk(KERN_ERR - "%s: Removing from dmabounce with pending buffers!\n", - dev->bus_id); + dev_err(dev, + "Removing from dmabounce with pending buffers!\n"); BUG(); } @@ -639,8 +636,7 @@ dmabounce_unregister_dev(struct device *dev) kfree(device_info); - printk(KERN_INFO "dmabounce: device %s on %s bus unregistered\n", - dev->bus_id, dev->bus->name); + dev_info(dev, "dmabounce: device unregistered\n"); } diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index d973c986f721aec8822f8ef0db8eeb97b0ec199e..85579654d3b778761e912ae22b7eaea14f8b4ca9 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c @@ -331,17 +331,17 @@ static int locomo_gpio_type(unsigned int irq, unsigned int type) mask = 1 << (irq - LOCOMO_IRQ_GPIO_START); - if (type == IRQT_PROBE) { + if (type == IRQ_TYPE_PROBE) { if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) return 0; - type = __IRQT_RISEDGE | __IRQT_FALEDGE; + type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; } - if (type & __IRQT_RISEDGE) + if (type & IRQ_TYPE_EDGE_RISING) GPIO_IRQ_rising_edge |= mask; else GPIO_IRQ_rising_edge &= ~mask; - if (type & __IRQT_FALEDGE) + if (type & IRQ_TYPE_EDGE_FALLING) GPIO_IRQ_falling_edge |= mask; else GPIO_IRQ_falling_edge &= ~mask; @@ -473,7 +473,7 @@ static void locomo_setup_irq(struct locomo *lchip) /* * Install handler for IRQ_LOCOMO_HW. */ - set_irq_type(lchip->irq, IRQT_FALLING); + set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); set_irq_chip_data(lchip->irq, irqbase); set_irq_chained_handler(lchip->irq, locomo_handler); @@ -543,7 +543,6 @@ locomo_init_one_child(struct locomo *lchip, struct locomo_dev_info *info) goto out; } - strncpy(dev->dev.bus_id, info->name, sizeof(dev->dev.bus_id)); /* * If the parent device has a DMA mask associated with it, * propagate it down to the children. @@ -553,6 +552,7 @@ locomo_init_one_child(struct locomo *lchip, struct locomo_dev_info *info) dev->dev.dma_mask = &dev->dma_mask; } + dev_set_name(&dev->dev, "%s", info->name); dev->devid = info->devid; dev->dev.parent = lchip->dev; dev->dev.bus = &locomo_bus_type; diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c deleted file mode 100644 index aa8f7739c822c5efa1a850beda94bbd4ea8b971a..0000000000000000000000000000000000000000 --- a/arch/arm/common/rtctime.c +++ /dev/null @@ -1,434 +0,0 @@ -/* - * linux/arch/arm/common/rtctime.c - * - * Copyright (C) 2003 Deep Blue Solutions Ltd. - * Based on sa1100-rtc.c, Nils Faerber, CIH, Nicolas Pitre. - * Based on rtc.c by Paul Gortmaker - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -static DECLARE_WAIT_QUEUE_HEAD(rtc_wait); -static struct fasync_struct *rtc_async_queue; - -/* - * rtc_lock protects rtc_irq_data - */ -static DEFINE_SPINLOCK(rtc_lock); -static unsigned long rtc_irq_data; - -/* - * rtc_sem protects rtc_inuse and rtc_ops - */ -static DEFINE_MUTEX(rtc_mutex); -static unsigned long rtc_inuse; -static struct rtc_ops *rtc_ops; - -#define rtc_epoch 1900UL - -/* - * Calculate the next alarm time given the requested alarm time mask - * and the current time. - */ -void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) -{ - unsigned long next_time; - unsigned long now_time; - - next->tm_year = now->tm_year; - next->tm_mon = now->tm_mon; - next->tm_mday = now->tm_mday; - next->tm_hour = alrm->tm_hour; - next->tm_min = alrm->tm_min; - next->tm_sec = alrm->tm_sec; - - rtc_tm_to_time(now, &now_time); - rtc_tm_to_time(next, &next_time); - - if (next_time < now_time) { - /* Advance one day */ - next_time += 60 * 60 * 24; - rtc_time_to_tm(next_time, next); - } -} -EXPORT_SYMBOL(rtc_next_alarm_time); - -static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) -{ - memset(tm, 0, sizeof(struct rtc_time)); - return ops->read_time(tm); -} - -static inline int rtc_arm_set_time(struct rtc_ops *ops, struct rtc_time *tm) -{ - int ret; - - ret = rtc_valid_tm(tm); - if (ret == 0) - ret = ops->set_time(tm); - - return ret; -} - -static inline int rtc_arm_read_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) -{ - int ret = -EINVAL; - if (ops->read_alarm) { - memset(alrm, 0, sizeof(struct rtc_wkalrm)); - ret = ops->read_alarm(alrm); - } - return ret; -} - -static inline int rtc_arm_set_alarm(struct rtc_ops *ops, struct rtc_wkalrm *alrm) -{ - int ret = -EINVAL; - if (ops->set_alarm) - ret = ops->set_alarm(alrm); - return ret; -} - -void rtc_update(unsigned long num, unsigned long events) -{ - spin_lock(&rtc_lock); - rtc_irq_data = (rtc_irq_data + (num << 8)) | events; - spin_unlock(&rtc_lock); - - wake_up_interruptible(&rtc_wait); - kill_fasync(&rtc_async_queue, SIGIO, POLL_IN); -} -EXPORT_SYMBOL(rtc_update); - - -static ssize_t -rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos) -{ - DECLARE_WAITQUEUE(wait, current); - unsigned long data; - ssize_t ret; - - if (count < sizeof(unsigned long)) - return -EINVAL; - - add_wait_queue(&rtc_wait, &wait); - do { - __set_current_state(TASK_INTERRUPTIBLE); - - spin_lock_irq(&rtc_lock); - data = rtc_irq_data; - rtc_irq_data = 0; - spin_unlock_irq(&rtc_lock); - - if (data != 0) { - ret = 0; - break; - } - if (file->f_flags & O_NONBLOCK) { - ret = -EAGAIN; - break; - } - if (signal_pending(current)) { - ret = -ERESTARTSYS; - break; - } - schedule(); - } while (1); - set_current_state(TASK_RUNNING); - remove_wait_queue(&rtc_wait, &wait); - - if (ret == 0) { - ret = put_user(data, (unsigned long __user *)buf); - if (ret == 0) - ret = sizeof(unsigned long); - } - return ret; -} - -static unsigned int rtc_poll(struct file *file, poll_table *wait) -{ - unsigned long data; - - poll_wait(file, &rtc_wait, wait); - - spin_lock_irq(&rtc_lock); - data = rtc_irq_data; - spin_unlock_irq(&rtc_lock); - - return data != 0 ? POLLIN | POLLRDNORM : 0; -} - -static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, - unsigned long arg) -{ - struct rtc_ops *ops = file->private_data; - struct rtc_time tm; - struct rtc_wkalrm alrm; - void __user *uarg = (void __user *)arg; - int ret = -EINVAL; - - switch (cmd) { - case RTC_ALM_READ: - ret = rtc_arm_read_alarm(ops, &alrm); - if (ret) - break; - ret = copy_to_user(uarg, &alrm.time, sizeof(tm)); - if (ret) - ret = -EFAULT; - break; - - case RTC_ALM_SET: - ret = copy_from_user(&alrm.time, uarg, sizeof(tm)); - if (ret) { - ret = -EFAULT; - break; - } - alrm.enabled = 0; - alrm.pending = 0; - alrm.time.tm_mday = -1; - alrm.time.tm_mon = -1; - alrm.time.tm_year = -1; - alrm.time.tm_wday = -1; - alrm.time.tm_yday = -1; - alrm.time.tm_isdst = -1; - ret = rtc_arm_set_alarm(ops, &alrm); - break; - - case RTC_RD_TIME: - ret = rtc_arm_read_time(ops, &tm); - if (ret) - break; - ret = copy_to_user(uarg, &tm, sizeof(tm)); - if (ret) - ret = -EFAULT; - break; - - case RTC_SET_TIME: - if (!capable(CAP_SYS_TIME)) { - ret = -EACCES; - break; - } - ret = copy_from_user(&tm, uarg, sizeof(tm)); - if (ret) { - ret = -EFAULT; - break; - } - ret = rtc_arm_set_time(ops, &tm); - break; - - case RTC_EPOCH_SET: -#ifndef rtc_epoch - /* - * There were no RTC clocks before 1900. - */ - if (arg < 1900) { - ret = -EINVAL; - break; - } - if (!capable(CAP_SYS_TIME)) { - ret = -EACCES; - break; - } - rtc_epoch = arg; - ret = 0; -#endif - break; - - case RTC_EPOCH_READ: - ret = put_user(rtc_epoch, (unsigned long __user *)uarg); - break; - - case RTC_WKALM_SET: - ret = copy_from_user(&alrm, uarg, sizeof(alrm)); - if (ret) { - ret = -EFAULT; - break; - } - ret = rtc_arm_set_alarm(ops, &alrm); - break; - - case RTC_WKALM_RD: - ret = rtc_arm_read_alarm(ops, &alrm); - if (ret) - break; - ret = copy_to_user(uarg, &alrm, sizeof(alrm)); - if (ret) - ret = -EFAULT; - break; - - default: - if (ops->ioctl) - ret = ops->ioctl(cmd, arg); - break; - } - return ret; -} - -static int rtc_open(struct inode *inode, struct file *file) -{ - int ret; - - mutex_lock(&rtc_mutex); - - if (rtc_inuse) { - ret = -EBUSY; - } else if (!rtc_ops || !try_module_get(rtc_ops->owner)) { - ret = -ENODEV; - } else { - file->private_data = rtc_ops; - - ret = rtc_ops->open ? rtc_ops->open() : 0; - if (ret == 0) { - spin_lock_irq(&rtc_lock); - rtc_irq_data = 0; - spin_unlock_irq(&rtc_lock); - - rtc_inuse = 1; - } - } - mutex_unlock(&rtc_mutex); - - return ret; -} - -static int rtc_release(struct inode *inode, struct file *file) -{ - struct rtc_ops *ops = file->private_data; - - if (ops->release) - ops->release(); - - spin_lock_irq(&rtc_lock); - rtc_irq_data = 0; - spin_unlock_irq(&rtc_lock); - - module_put(rtc_ops->owner); - rtc_inuse = 0; - - return 0; -} - -static int rtc_fasync(int fd, struct file *file, int on) -{ - return fasync_helper(fd, file, on, &rtc_async_queue); -} - -static const struct file_operations rtc_fops = { - .owner = THIS_MODULE, - .llseek = no_llseek, - .read = rtc_read, - .poll = rtc_poll, - .ioctl = rtc_ioctl, - .open = rtc_open, - .release = rtc_release, - .fasync = rtc_fasync, -}; - -static struct miscdevice rtc_miscdev = { - .minor = RTC_MINOR, - .name = "rtc", - .fops = &rtc_fops, -}; - - -static int rtc_read_proc(char *page, char **start, off_t off, int count, int *eof, void *data) -{ - struct rtc_ops *ops = data; - struct rtc_wkalrm alrm; - struct rtc_time tm; - char *p = page; - - if (rtc_arm_read_time(ops, &tm) == 0) { - p += sprintf(p, - "rtc_time\t: %02d:%02d:%02d\n" - "rtc_date\t: %04d-%02d-%02d\n" - "rtc_epoch\t: %04lu\n", - tm.tm_hour, tm.tm_min, tm.tm_sec, - tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday, - rtc_epoch); - } - - if (rtc_arm_read_alarm(ops, &alrm) == 0) { - p += sprintf(p, "alrm_time\t: "); - if ((unsigned int)alrm.time.tm_hour <= 24) - p += sprintf(p, "%02d:", alrm.time.tm_hour); - else - p += sprintf(p, "**:"); - if ((unsigned int)alrm.time.tm_min <= 59) - p += sprintf(p, "%02d:", alrm.time.tm_min); - else - p += sprintf(p, "**:"); - if ((unsigned int)alrm.time.tm_sec <= 59) - p += sprintf(p, "%02d\n", alrm.time.tm_sec); - else - p += sprintf(p, "**\n"); - - p += sprintf(p, "alrm_date\t: "); - if ((unsigned int)alrm.time.tm_year <= 200) - p += sprintf(p, "%04d-", alrm.time.tm_year + 1900); - else - p += sprintf(p, "****-"); - if ((unsigned int)alrm.time.tm_mon <= 11) - p += sprintf(p, "%02d-", alrm.time.tm_mon + 1); - else - p += sprintf(p, "**-"); - if ((unsigned int)alrm.time.tm_mday <= 31) - p += sprintf(p, "%02d\n", alrm.time.tm_mday); - else - p += sprintf(p, "**\n"); - p += sprintf(p, "alrm_wakeup\t: %s\n", - alrm.enabled ? "yes" : "no"); - p += sprintf(p, "alrm_pending\t: %s\n", - alrm.pending ? "yes" : "no"); - } - - if (ops->proc) - p += ops->proc(p); - - return p - page; -} - -int register_rtc(struct rtc_ops *ops) -{ - int ret = -EBUSY; - - mutex_lock(&rtc_mutex); - if (rtc_ops == NULL) { - rtc_ops = ops; - - ret = misc_register(&rtc_miscdev); - if (ret == 0) - create_proc_read_entry("driver/rtc", 0, NULL, - rtc_read_proc, ops); - } - mutex_unlock(&rtc_mutex); - - return ret; -} -EXPORT_SYMBOL(register_rtc); - -void unregister_rtc(struct rtc_ops *rtc) -{ - mutex_lock(&rtc_mutex); - if (rtc == rtc_ops) { - remove_proc_entry("driver/rtc", NULL); - misc_deregister(&rtc_miscdev); - rtc_ops = NULL; - } - mutex_unlock(&rtc_mutex); -} -EXPORT_SYMBOL(unregister_rtc); diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index eb06d0b2cb747344c47fb1395d6f2b6fecf080d9..f6d3fdda7067caafff09011a6b587b1e982f6d4a 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -241,14 +241,14 @@ static int sa1111_type_lowirq(unsigned int irq, unsigned int flags) void __iomem *mapbase = get_irq_chip_data(irq); unsigned long ip0; - if (flags == IRQT_PROBE) + if (flags == IRQ_TYPE_PROBE) return 0; - if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) + if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) return -EINVAL; ip0 = sa1111_readl(mapbase + SA1111_INTPOL0); - if (flags & __IRQT_RISEDGE) + if (flags & IRQ_TYPE_EDGE_RISING) ip0 &= ~mask; else ip0 |= mask; @@ -338,14 +338,14 @@ static int sa1111_type_highirq(unsigned int irq, unsigned int flags) void __iomem *mapbase = get_irq_chip_data(irq); unsigned long ip1; - if (flags == IRQT_PROBE) + if (flags == IRQ_TYPE_PROBE) return 0; - if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0) + if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0) return -EINVAL; ip1 = sa1111_readl(mapbase + SA1111_INTPOL1); - if (flags & __IRQT_RISEDGE) + if (flags & IRQ_TYPE_EDGE_RISING) ip1 &= ~mask; else ip1 |= mask; @@ -427,7 +427,7 @@ static void sa1111_setup_irq(struct sa1111 *sachip) /* * Register SA1111 interrupt */ - set_irq_type(sachip->irq, IRQT_RISING); + set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); set_irq_data(sachip->irq, irqbase); set_irq_chained_handler(sachip->irq, sa1111_irq_handler); } @@ -550,9 +550,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, goto out; } - snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id), - "%4.4lx", info->offset); - + dev_set_name(&dev->dev, "%4.4lx", info->offset); dev->devid = info->devid; dev->dev.parent = sachip->dev; dev->dev.bus = &sa1111_bus_type; @@ -560,7 +558,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask; dev->res.start = sachip->phys + info->offset; dev->res.end = dev->res.start + 511; - dev->res.name = dev->dev.bus_id; + dev->res.name = dev_name(&dev->dev); dev->res.flags = IORESOURCE_MEM; dev->mapbase = sachip->base + info->offset; dev->skpcr_mask = info->skpcr_mask; @@ -570,6 +568,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, if (ret) { printk("SA1111: failed to allocate resource for %s\n", dev->res.name); + dev_set_name(&dev->dev, NULL); kfree(dev); goto out; } @@ -593,7 +592,8 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent, if (dev->dma_mask != 0xffffffffUL) { ret = dmabounce_register_dev(&dev->dev, 1024, 4096); if (ret) { - printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id); + dev_err(&dev->dev, "SA1111: Failed to register" + " with dmabounce\n"); device_unregister(&dev->dev); } } @@ -627,7 +627,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) if (!sachip) return -ENOMEM; - sachip->clk = clk_get(me, "GPIO27_CLK"); + sachip->clk = clk_get(me, "SA1111_CLK"); if (!sachip->clk) { ret = PTR_ERR(sachip->clk); goto err_free; diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c index bc299b07a6fa8a949ed72fdc352e2cea817f51ac..ae39553589ddbf34b37f37e0d2c3c3d67a1b4e9c 100644 --- a/arch/arm/common/scoop.c +++ b/arch/arm/common/scoop.c @@ -247,7 +247,7 @@ static int __devinit scoop_probe(struct platform_device *pdev) devptr->gpio.base = -1; if (inf->gpio_base != 0) { - devptr->gpio.label = pdev->dev.bus_id; + devptr->gpio.label = dev_name(&pdev->dev); devptr->gpio.base = inf->gpio_base; devptr->gpio.ngpio = 12; /* PA11 = 0, PA12 = 1, etc. up to PA22 = 11 */ devptr->gpio.set = scoop_gpio_set; diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index 5bba5255b119dc7ee18d72cc8efc2d8c1d2963c2..8822b684d474ad322b71bbcf3fe457316fdba775 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -157,6 +158,7 @@ static void sharpsl_battery_thread(struct work_struct *private_) dev_dbg(sharpsl_pm.dev, "Battery: voltage: %d, status: %d, percentage: %d, time: %ld\n", voltage, sharpsl_pm.battstat.mainbat_status, sharpsl_pm.battstat.mainbat_percent, jiffies); +#ifdef CONFIG_BACKLIGHT_CORGI /* If battery is low. limit backlight intensity to save power. */ if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) && ((sharpsl_pm.battstat.mainbat_status == APM_BATTERY_STATUS_LOW) || @@ -169,6 +171,7 @@ static void sharpsl_battery_thread(struct work_struct *private_) sharpsl_pm.machinfo->backlight_limit(0); sharpsl_pm.flags &= ~SHARPSL_BL_LIMIT; } +#endif /* Suspend if critical battery level */ if ((sharpsl_pm.battstat.ac_status != APM_AC_ONLINE) diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9adk_defconfig index e32e73648129d36ac9726b10d2723b7d38e918db..be2b2f38fd94912642b59b706ee4edadcfd40bf1 100644 --- a/arch/arm/configs/at91cap9adk_defconfig +++ b/arch/arm/configs/at91cap9adk_defconfig @@ -213,7 +213,6 @@ CONFIG_CPU_CP15_MMU=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y @@ -907,7 +906,32 @@ CONFIG_USB_MON=y # # USB Gadget Support # -# CONFIG_USB_GADGET is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_USB_ATMEL_USBA=y +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=m +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set CONFIG_MMC=y # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_UNSAFE_RESUME is not set @@ -926,7 +950,59 @@ CONFIG_MMC_AT91=y # CONFIG_MMC_SPI is not set # CONFIG_NEW_LEDS is not set CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_RTC_DRV_AT91SAM9_RTT=0 +CONFIG_RTC_DRV_AT91SAM9_GPBR=0 # # File systems diff --git a/arch/arm/configs/at91rm9200dk_defconfig b/arch/arm/configs/at91rm9200dk_defconfig index 2dbbbc3d4ac36d91fafc246a20434af0b9f31c5e..868fb7b9530b19379fb8a5725df41c5943456bf7 100644 --- a/arch/arm/configs/at91rm9200dk_defconfig +++ b/arch/arm/configs/at91rm9200dk_defconfig @@ -169,7 +169,6 @@ CONFIG_AT91_CF=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y diff --git a/arch/arm/configs/at91rm9200ek_defconfig b/arch/arm/configs/at91rm9200ek_defconfig index 6e994f7820c6975dbf97fd127017e13c436e518b..de43fc6756162078b853e95b9739f9ee7bb4daee 100644 --- a/arch/arm/configs/at91rm9200ek_defconfig +++ b/arch/arm/configs/at91rm9200ek_defconfig @@ -160,7 +160,6 @@ CONFIG_ISA_DMA_API=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig index f659c938473f8da945fc1540a0bcf3bd8d7457fb..2011adfa6758998115dec29a07593b052f66515a 100644 --- a/arch/arm/configs/at91sam9260ek_defconfig +++ b/arch/arm/configs/at91sam9260ek_defconfig @@ -220,7 +220,6 @@ CONFIG_CPU_CP15_MMU=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig index 3802e85f7483c65af9e5256debe4a2879749aea4..4049768962d2dc4379b3a0295cc2e6acd15c3ad1 100644 --- a/arch/arm/configs/at91sam9261ek_defconfig +++ b/arch/arm/configs/at91sam9261ek_defconfig @@ -213,7 +213,6 @@ CONFIG_CPU_CP15_MMU=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/at91sam9263ek_defconfig b/arch/arm/configs/at91sam9263ek_defconfig index 32a0d74e0c8998bb3c3997de96e3d6a11ef23e24..fa1c5aecb5a8d86c2ebdf9d204c55adcfc45154d 100644 --- a/arch/arm/configs/at91sam9263ek_defconfig +++ b/arch/arm/configs/at91sam9263ek_defconfig @@ -213,7 +213,6 @@ CONFIG_CPU_CP15_MMU=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/at91sam9g20ek_defconfig b/arch/arm/configs/at91sam9g20ek_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..c06863847364de15645a1b5c64dfd9524a37e36b --- /dev/null +++ b/arch/arm/configs/at91sam9g20ek_defconfig @@ -0,0 +1,1168 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24 +# Tue Jun 10 15:51:52 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_FAIR_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +# CONFIG_ARCH_AT91SAM9261 is not set +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +CONFIG_ARCH_AT91SAM9G20=y +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9G20 Board Type +# +CONFIG_MACH_AT91SAM9G20EK=y + +# +# AT91 Board Options +# +# CONFIG_MTD_AT91_DATAFLASH_CARD is not set +# CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set + +# +# AT91 Feature Selections +# +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y +# CONFIG_AT91_SLOW_CLOCK is not set +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_LEDS=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_SUSPEND=y +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +CONFIG_ATMEL_PWM=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=y + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=320 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_SEQUENCER=y +# CONFIG_SND_SEQ_DUMMY is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_AT91_AC97 is not set + +# +# SPI devices +# +CONFIG_SND_AT73C213=y +CONFIG_SND_AT73C213_TARGET_BITRATE=48000 + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# SoC Audio support for SuperH +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_PERSIST is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +CONFIG_USB_ZERO=m +# CONFIG_USB_ETH is not set +CONFIG_USB_GADGETFS=m +CONFIG_USB_FILE_STORAGE=m +# CONFIG_USB_FILE_STORAGE_TEST is not set +CONFIG_USB_G_SERIAL=m +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_AT91=y +# CONFIG_MMC_SPI is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_ATMEL_PWM=y +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_AT91SAM9=y +CONFIG_RTC_DRV_AT91SAM9_RTT=0 +CONFIG_RTC_DRV_AT91SAM9_GPBR=0 + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set +# CONFIG_INSTRUMENTATION is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/arch/arm/configs/at91sam9rlek_defconfig b/arch/arm/configs/at91sam9rlek_defconfig index 98e6746d02be22d3849a046114b3838358435278..d8ec5f9ca6ec49c5ec40aebd6b4672124020e27d 100644 --- a/arch/arm/configs/at91sam9rlek_defconfig +++ b/arch/arm/configs/at91sam9rlek_defconfig @@ -211,7 +211,6 @@ CONFIG_CPU_CP15_MMU=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/ateb9200_defconfig b/arch/arm/configs/ateb9200_defconfig index d846a492e5ce2a446f0c1017e1edd1ca891c067f..85c80f723d8e7f43d5287c34cd911059a5e1e31a 100644 --- a/arch/arm/configs/ateb9200_defconfig +++ b/arch/arm/configs/ateb9200_defconfig @@ -171,7 +171,6 @@ CONFIG_AT91_CF=m # Kernel Features # CONFIG_PREEMPT=y -CONFIG_NO_IDLE_HZ=y CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/cm_x270_defconfig b/arch/arm/configs/cm_x270_defconfig deleted file mode 100644 index 5cab08397ae7943b33173710028b110c2dde2f5d..0000000000000000000000000000000000000000 --- a/arch/arm/configs/cm_x270_defconfig +++ /dev/null @@ -1,1410 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.22 -# Wed Jul 18 14:11:48 2007 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ARCH_MTD_XIP=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_SYSFS_DEPRECATED=y -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -# CONFIG_EPOLL is not set -# CONFIG_SIGNALFD is not set -# CONFIG_TIMERFD is not set -# CONFIG_EVENTFD is not set -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_PNX4008 is not set -CONFIG_ARCH_PXA=y -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set -CONFIG_DMABOUNCE=y - -# -# Intel PXA2xx Implementations -# -# CONFIG_ARCH_LUBBOCK is not set -# CONFIG_MACH_LOGICPD_PXA270 is not set -# CONFIG_MACH_MAINSTONE is not set -# CONFIG_ARCH_PXA_IDP is not set -# CONFIG_PXA_SHARPSL is not set -# CONFIG_MACH_TRIZEPS4 is not set -CONFIG_MACH_ARMCORE=y -CONFIG_PXA27x=y - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_XSCALE=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_OUTER_CACHE is not set -CONFIG_IWMMXT=y -CONFIG_XSCALE_PMU=y - -# -# Bus support -# -CONFIG_PCI=y -CONFIG_PCI_SYSCALL=y -CONFIG_PCI_HOST_ITE8152=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -# CONFIG_TICK_ONESHOT is not set -# CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set -CONFIG_HZ=100 -# CONFIG_AEABI is not set -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set -# CONFIG_ARTHUR is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set -# CONFIG_APM_EMULATION is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_EXT=y -# CONFIG_MAC80211 is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m -# CONFIG_IEEE80211_CRYPT_TKIP is not set -# CONFIG_IEEE80211_SOFTMAC is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=m -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=m -CONFIG_MTD_BLKDEVS=m -CONFIG_MTD_BLOCK=m -# CONFIG_MTD_BLOCK_RO is not set -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_SHARP_SL is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=m -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_H1900 is not set -CONFIG_MTD_NAND_IDS=m -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_CAFE is not set -CONFIG_MTD_NAND_CM_X270=m -# CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=12000 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_IDE=m -CONFIG_IDE_MAX_HWIFS=4 -CONFIG_BLK_DEV_IDE=m - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=m -# CONFIG_IDEDISK_MULTI_MODE is not set -CONFIG_BLK_DEV_IDECD=m -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y - -# -# IDE chipset support/bugfixes -# -# CONFIG_IDE_GENERIC is not set -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_IDEPCI_PCIBUS_ORDER is not set -# CONFIG_IDE_ARM is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_SRP is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_FIREWIRE is not set -# CONFIG_IEEE1394 is not set -# CONFIG_I2O is not set -CONFIG_NETDEVICES=y -# CONFIG_NETDEVICES_MULTIQUEUE is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ARCNET is not set -# CONFIG_PHYLIB is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_SMC91X is not set -CONFIG_DM9000=y -# CONFIG_SMC911X is not set -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -CONFIG_8139TOO=m -# CONFIG_8139TOO_PIO is not set -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set -# CONFIG_8139_OLD_RX_RESET is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_SC92031 is not set -CONFIG_NETDEV_1000=y -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -# CONFIG_QLA3XXX is not set -# CONFIG_ATL1 is not set -CONFIG_NETDEV_10000=y -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NETXEN_NIC is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -CONFIG_TOUCHSCREEN_UCB1400=m -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set -CONFIG_HW_RANDOM=m -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_DEVPORT=y -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set -# CONFIG_W1 is not set -# CONFIG_HWMON is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# LED devices -# -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -CONFIG_LEDS_CM_X270=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_IDE_DISK is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -CONFIG_DAB=y -# CONFIG_USB_DABUSB is not set - -# -# Graphics support -# -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_SYS_FOPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_IMSTT is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_RIVA is not set -# CONFIG_FB_MATROX is not set -# CONFIG_FB_RADEON is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_S3 is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_NEOMAGIC is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_PM3 is not set -CONFIG_FB_PXA=y -# CONFIG_FB_PXA_PARAMETERS is not set -CONFIG_FB_MBX=m -# CONFIG_FB_VIRTUAL is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y - -# -# Sound -# -CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set - -# -# Generic devices -# -CONFIG_SND_AC97_CODEC=m -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# PCI devices -# -# CONFIG_SND_AD1889 is not set -# CONFIG_SND_ALS300 is not set -# CONFIG_SND_ALI5451 is not set -# CONFIG_SND_ATIIXP is not set -# CONFIG_SND_ATIIXP_MODEM is not set -# CONFIG_SND_AU8810 is not set -# CONFIG_SND_AU8820 is not set -# CONFIG_SND_AU8830 is not set -# CONFIG_SND_AZT3328 is not set -# CONFIG_SND_BT87X is not set -# CONFIG_SND_CA0106 is not set -# CONFIG_SND_CMIPCI is not set -# CONFIG_SND_CS4281 is not set -# CONFIG_SND_CS46XX is not set -# CONFIG_SND_DARLA20 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_LAYLA20 is not set -# CONFIG_SND_DARLA24 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MIA is not set -# CONFIG_SND_ECHO3G is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGODJ is not set -# CONFIG_SND_EMU10K1 is not set -# CONFIG_SND_EMU10K1X is not set -# CONFIG_SND_ENS1370 is not set -# CONFIG_SND_ENS1371 is not set -# CONFIG_SND_ES1938 is not set -# CONFIG_SND_ES1968 is not set -# CONFIG_SND_FM801 is not set -# CONFIG_SND_HDA_INTEL is not set -# CONFIG_SND_HDSP is not set -# CONFIG_SND_HDSPM is not set -# CONFIG_SND_ICE1712 is not set -# CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set -# CONFIG_SND_KORG1212 is not set -# CONFIG_SND_MAESTRO3 is not set -# CONFIG_SND_MIXART is not set -# CONFIG_SND_NM256 is not set -# CONFIG_SND_PCXHR is not set -# CONFIG_SND_RIPTIDE is not set -# CONFIG_SND_RME32 is not set -# CONFIG_SND_RME96 is not set -# CONFIG_SND_RME9652 is not set -# CONFIG_SND_SONICVIBES is not set -# CONFIG_SND_TRIDENT is not set -# CONFIG_SND_VIA82XX is not set -# CONFIG_SND_VIA82XX_MODEM is not set -# CONFIG_SND_VX222 is not set -# CONFIG_SND_YMFPCI is not set -# CONFIG_SND_AC97_POWER_SAVE is not set - -# -# ALSA ARM devices -# -CONFIG_SND_PXA2XX_PCM=m -CONFIG_SND_PXA2XX_AC97=m - -# -# USB devices -# -# CONFIG_SND_USB_AUDIO is not set -# CONFIG_SND_USB_CAIAQ is not set - -# -# System on Chip audio support -# -# CONFIG_SND_SOC is not set - -# -# Open Sound System -# -# CONFIG_SOUND_PRIME is not set -CONFIG_AC97_BUS=m -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_PERSIST is not set -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -CONFIG_USB_MON=y - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set -CONFIG_MMC=m -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD Card Drivers -# -CONFIG_MMC_BLOCK=m -CONFIG_MMC_BLOCK_BOUNCE=y - -# -# MMC/SD Host Controller Drivers -# -CONFIG_MMC_PXA=m -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_TIFM_SD is not set - -# -# Real Time Clock -# -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T59 is not set -CONFIG_RTC_DRV_V3020=y - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_SA1100=y - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=y -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Distributed Lock Manager -# -# CONFIG_DLM is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DETECT_SOFTLOCKUP is not set -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_LIST is not set -CONFIG_FRAME_POINTER=y -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_ICEDCC is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=m -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_MANAGER=m -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set -CONFIG_CRYPTO_HW=y - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig index 4264e273202d21a9df214b818b1f409583d020d0..f7622e658163f54db175077d658a72e9f16d9cbd 100644 --- a/arch/arm/configs/collie_defconfig +++ b/arch/arm/configs/collie_defconfig @@ -166,7 +166,6 @@ CONFIG_PCMCIA_SA1100=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set CONFIG_ARCH_DISCONTIGMEM_ENABLE=y diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig index e8980a9bb893f50e94889e1237e842547a7bc9a5..9b8748a8d9ddaa9ee9808262e54ae0b67ea1d8b0 100644 --- a/arch/arm/configs/corgi_defconfig +++ b/arch/arm/configs/corgi_defconfig @@ -165,7 +165,6 @@ CONFIG_PCMCIA_PXA2XX=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y diff --git a/arch/arm/configs/ecbat91_defconfig b/arch/arm/configs/ecbat91_defconfig index 90ed214e367337bf8edecc69ad0cfc3ed08b001c..cfeb817ad21acc090ae1de10e4ee07fe01786f64 100644 --- a/arch/arm/configs/ecbat91_defconfig +++ b/arch/arm/configs/ecbat91_defconfig @@ -230,7 +230,6 @@ CONFIG_AT91_CF=y # # CONFIG_TICK_ONESHOT is not set CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/em_x270_defconfig b/arch/arm/configs/em_x270_defconfig deleted file mode 100644 index 6bea0901bdf0f1e6210de6bc831beef5ea791926..0000000000000000000000000000000000000000 --- a/arch/arm/configs/em_x270_defconfig +++ /dev/null @@ -1,1265 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.22 -# Mon Jul 9 15:18:20 2007 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_ARCH_MTD_XIP=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="-em-x270" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=17 -CONFIG_SYSFS_DEPRECATED=y -# CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_PNX4008 is not set -CONFIG_ARCH_PXA=y -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set - -# -# Intel PXA2xx Implementations -# -# CONFIG_ARCH_LUBBOCK is not set -# CONFIG_MACH_LOGICPD_PXA270 is not set -# CONFIG_MACH_MAINSTONE is not set -# CONFIG_ARCH_PXA_IDP is not set -# CONFIG_PXA_SHARPSL is not set -# CONFIG_MACH_TRIZEPS4 is not set -CONFIG_MACH_EM_X270=y -CONFIG_PXA27x=y - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_XSCALE=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_OUTER_CACHE is not set -CONFIG_IWMMXT=y -CONFIG_XSCALE_PMU=y - -# -# Bus support -# -# CONFIG_ARCH_SUPPORTS_MSI is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -# CONFIG_TICK_ONESHOT is not set -# CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set -CONFIG_HZ=100 -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -CONFIG_PM_LEGACY=y -# CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set -CONFIG_APM_EMULATION=m - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -# CONFIG_BT_RFCOMM_TTY is not set -CONFIG_BT_BNEP=m -# CONFIG_BT_BNEP_MC_FILTER is not set -# CONFIG_BT_BNEP_PROTO_FILTER is not set -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIUSB=m -# CONFIG_BT_HCIUSB_SCO is not set -CONFIG_BT_HCIUART=m -# CONFIG_BT_HCIUART_H4 is not set -# CONFIG_BT_HCIUART_BCSP is not set -CONFIG_BT_HCIBCM203X=m -CONFIG_BT_HCIBPA10X=m -CONFIG_BT_HCIBFUSB=m -# CONFIG_BT_HCIVHCI is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set -CONFIG_IEEE80211=m -# CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211_CRYPT_CCMP=m -# CONFIG_IEEE80211_CRYPT_TKIP is not set -# CONFIG_IEEE80211_SOFTMAC is not set -# CONFIG_RFKILL is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -# CONFIG_MTD_CFI_NOSWAP is not set -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_SHARP_SL is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_H1900 is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=12000 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_SCSI_PROC_FS is not set - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_SMC91X is not set -CONFIG_DM9000=y -# CONFIG_SMC911X is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ATKBD is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -CONFIG_KEYBOARD_PXA27x=m -# CONFIG_KEYBOARD_GPIO is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_UCB1400 is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set -CONFIG_HW_RANDOM=m -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set -# CONFIG_HWMON is not set - -# -# Misc devices -# - -# -# Multifunction device drivers -# -# CONFIG_MFD_SM501 is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_SYS_FOPS is not set -CONFIG_FB_DEFERRED_IO=y -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -CONFIG_FB_PXA=y -# CONFIG_FB_PXA_PARAMETERS is not set -# CONFIG_FB_MBX is not set -# CONFIG_FB_VIRTUAL is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y - -# -# Sound -# -CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set - -# -# Generic devices -# -CONFIG_SND_AC97_CODEC=m -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# ALSA ARM devices -# -CONFIG_SND_PXA2XX_PCM=m -CONFIG_SND_PXA2XX_AC97=m - -# -# USB devices -# -# CONFIG_SND_USB_AUDIO is not set -# CONFIG_SND_USB_CAIAQ is not set - -# -# System on Chip audio support -# -# CONFIG_SND_SOC is not set - -# -# Open Sound System -# -# CONFIG_SOUND_PRIME is not set -CONFIG_AC97_BUS=m - -# -# HID Devices -# -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_MON is not set - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set -CONFIG_MMC=m -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD Card Drivers -# -CONFIG_MMC_BLOCK=m - -# -# MMC/SD Host Controller Drivers -# -CONFIG_MMC_PXA=m - -# -# Real Time Clock -# -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=m - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_M48T86 is not set -CONFIG_RTC_DRV_V3020=m - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_SA1100=m - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -CONFIG_SMB_FS=y -# CONFIG_SMB_NLS_DEFAULT is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=y - -# -# Distributed Lock Manager -# -# CONFIG_DLM is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_LIST is not set -CONFIG_FRAME_POINTER=y -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_ICEDCC is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -CONFIG_CRYPTO_ALGAPI=m -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_MANAGER=m -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig index 24a701ab33e5fce33d68356bde6f57ebd2d02fc0..21aa013793c6e6e5771218ba7dcd8b989335c209 100644 --- a/arch/arm/configs/ep93xx_defconfig +++ b/arch/arm/configs/ep93xx_defconfig @@ -184,7 +184,6 @@ CONFIG_ARM_AMBA=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig index ed487b90dbed794754fedd8cf9acfef10832d666..2307587a38a9ec89ca60251429c62cced8281053 100644 --- a/arch/arm/configs/eseries_pxa_defconfig +++ b/arch/arm/configs/eseries_pxa_defconfig @@ -1,15 +1,19 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-hh17 -# Fri Nov 9 20:23:03 2007 +# Linux kernel version: 2.6.26 +# Sat Jul 26 22:28:46 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y @@ -18,75 +22,90 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_ZONE_DMA=y CONFIG_ARCH_MTD_XIP=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y # CONFIG_KALLSYMS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_HAVE_CLK=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y - -# -# Block layer -# CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers @@ -100,6 +119,7 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y # # System Type @@ -111,21 +131,26 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set # CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set # CONFIG_ARCH_PNX4008 is not set CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set @@ -133,80 +158,48 @@ CONFIG_ARCH_PXA=y # CONFIG_ARCH_S3C2410 is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_BOARD_IRQ_MAP_SMALL is not set -CONFIG_BOARD_IRQ_MAP_BIG=y -CONFIG_DMABOUNCE=y +# CONFIG_ARCH_MSM7X00A is not set # -# Intel PXA2xx Implementations +# Intel PXA2xx/PXA3xx Implementations # +# CONFIG_ARCH_GUMSTIX is not set # CONFIG_ARCH_LUBBOCK is not set # CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set # CONFIG_ARCH_PXA_IDP is not set -CONFIG_TOSHIBA_TMIO_OHCI=y -CONFIG_ARCH_ESERIES=y +# CONFIG_PXA_SHARPSL is not set +CONFIG_ARCH_PXA_ESERIES=y CONFIG_MACH_E330=y +CONFIG_MACH_E350=y CONFIG_MACH_E740=y CONFIG_MACH_E750=y CONFIG_MACH_E400=y CONFIG_MACH_E800=y -CONFIG_E330_LCD=y -CONFIG_E740_LCD=y -CONFIG_E750_LCD=y -CONFIG_E400_LCD=y -CONFIG_E800_LCD=y -CONFIG_ESERIES_UDC=y -CONFIG_E330_TC6387XB=y -CONFIG_E740_T7L66XB=y -CONFIG_E400_T7L66XB=y -CONFIG_E750_E800_TC6393XB=y -CONFIG_E740_PCMCIA=m -CONFIG_E750_PCMCIA=m -CONFIG_E800_PCMCIA=m -# CONFIG_MACH_A620 is not set -# CONFIG_MACH_A716 is not set -# CONFIG_MACH_A730 is not set -# CONFIG_ARCH_H1900 is not set -# CONFIG_ARCH_H2200 is not set -# CONFIG_MACH_H3900 is not set -# CONFIG_MACH_H4000 is not set -# CONFIG_MACH_H4700 is not set -# CONFIG_MACH_HX2750 is not set -# CONFIG_ARCH_H5400 is not set -# CONFIG_MACH_HIMALAYA is not set -# CONFIG_MACH_HTCUNIVERSAL is not set -# CONFIG_MACH_HTCALPINE is not set -# CONFIG_MACH_MAGICIAN is not set -# CONFIG_MACH_HTCAPACHE is not set -# CONFIG_MACH_BLUEANGEL is not set - -# -# HTC_HW6X00 -# -# CONFIG_MACH_HTCBEETLES is not set -# CONFIG_MACH_HW6900 is not set -# CONFIG_MACH_HTCATHENA is not set -# CONFIG_ARCH_AXIMX3 is not set -# CONFIG_ARCH_AXIMX5 is not set -# CONFIG_MACH_X50 is not set -# CONFIG_ARCH_ROVERP1 is not set -# CONFIG_ARCH_ROVERP5P is not set -# CONFIG_MACH_XSCALE_PALMLD is not set -# CONFIG_MACH_T3XSCALE is not set -# CONFIG_MACH_RECON is not set -# CONFIG_MACH_GHI270HG is not set -# CONFIG_MACH_GHI270 is not set -# CONFIG_MACH_LOOXC550 is not set -# CONFIG_PXA_SHARPSL is not set # CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_TAVOREVB is not set +# CONFIG_MACH_SAAR is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +# CONFIG_ARCH_PXA_PALM is not set +# CONFIG_PXA_EZX is not set CONFIG_PXA25x=y +# CONFIG_PXA_PWM is not set + +# +# Boot options +# # -# Linux As Bootloader +# Power management # -# CONFIG_LAB is not set # # Processor Type @@ -215,6 +208,7 @@ CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WBI=y CONFIG_CPU_CP15=y @@ -232,11 +226,9 @@ CONFIG_XSCALE_PMU=y # # Bus support # - -# -# PCCARD (PCMCIA/CardBus) support -# -CONFIG_PCCARD=m +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=y # CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=m CONFIG_PCMCIA_LOAD_CIS=y @@ -245,13 +237,15 @@ CONFIG_PCMCIA_IOCTL=y # # PC-card bridges # -CONFIG_PCMCIA_PXA2XX=m # # Kernel Features # +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y @@ -263,9 +257,13 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y CONFIG_ALIGNMENT_TRAP=y # @@ -276,7 +274,7 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="" # CONFIG_XIP_KERNEL is not set CONFIG_KEXEC=y -# CONFIG_TXTOFFSET_DELTA is not set +CONFIG_ATAGS_PROC=y # # CPU Frequency scaling @@ -305,11 +303,12 @@ CONFIG_BINFMT_MISC=y # Power management options # CONFIG_PM=y -CONFIG_PM_LEGACY=y # CONFIG_PM_DEBUG is not set -# CONFIG_DPM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y # CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y # # Networking @@ -319,13 +318,13 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set # CONFIG_PACKET is not set CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set @@ -340,35 +339,40 @@ CONFIG_IP_FIB_HASH=y # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set +CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -381,10 +385,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set # @@ -392,15 +392,74 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set +# CONFIG_CAN is not set +CONFIG_IRDA=y + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRCOMM=m +CONFIG_IRDA_ULTRA=y + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +# CONFIG_IRTTY_SIR is not set + +# +# Dongle support +# +# CONFIG_KINGSUN_DONGLE is not set +# CONFIG_KSDAZZLE_DONGLE is not set +# CONFIG_KS959_DONGLE is not set + +# +# FIR device drivers +# +# CONFIG_USB_IRDA is not set +# CONFIG_SIGMATEL_FIR is not set +CONFIG_PXA_FICP=y +# CONFIG_MCS_FIR is not set # CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=m +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_MAC80211=m + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_DEFAULT_PID=y +CONFIG_MAC80211_RC_DEFAULT="pid" +# CONFIG_MAC80211_MESH is not set +# CONFIG_MAC80211_LEDS is not set +# CONFIG_MAC80211_DEBUG_MENU is not set CONFIG_IEEE80211=m # CONFIG_IEEE80211_DEBUG is not set CONFIG_IEEE80211_CRYPT_WEP=m -# CONFIG_IEEE80211_CRYPT_CCMP is not set -# CONFIG_IEEE80211_CRYPT_TKIP is not set -# CONFIG_IEEE80211_SOFTMAC is not set -CONFIG_WIRELESS_EXT=y +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -409,38 +468,32 @@ CONFIG_WIRELESS_EXT=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_STANDALONE is not set CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=m # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_PARTITIONS is not set # # User Modules And Translation Layers # -CONFIG_MTD_CHAR=m -CONFIG_MTD_BLKDEVS=m -CONFIG_MTD_BLOCK=m +# CONFIG_MTD_CHAR is not set +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set # CONFIG_MTD_BLOCK_RO is not set # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -460,7 +513,6 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access @@ -483,82 +535,43 @@ CONFIG_MTD_CFI_I2=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# CONFIG_MTD_NAND=m -CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_H1900 is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set CONFIG_MTD_NAND_IDS=m # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_NANDSIM is not set - -# -# OneNAND Flash Device Drivers -# +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# +CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=m # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=6144 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=m -CONFIG_IDE_MAX_HWIFS=4 -CONFIG_BLK_DEV_IDE=m - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=m -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECS is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_IDE_TASK_IOCTL is not set - -# -# IDE chipset support/bugfixes -# -# CONFIG_IDE_GENERIC is not set -# CONFIG_IDE_ARM is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_BLK_DEV_HD is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=m +CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set # CONFIG_SCSI_PROC_FS is not set @@ -566,7 +579,7 @@ CONFIG_SCSI=m # # SCSI support type (disk, tape, CD-ROM) # -# CONFIG_BLK_DEV_SD is not set +CONFIG_BLK_DEV_SD=m # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set @@ -580,6 +593,7 @@ CONFIG_SCSI=m # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports @@ -587,132 +601,78 @@ CONFIG_SCSI=m # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_DEBUG is not set - -# -# PCMCIA SCSI adapter support -# -# CONFIG_PCMCIA_AHA152X is not set -# CONFIG_PCMCIA_FDOMAIN is not set -# CONFIG_PCMCIA_NINJA_SCSI is not set -# CONFIG_PCMCIA_QLOGIC is not set -# CONFIG_PCMCIA_SYM53C500 is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +# CONFIG_SCSI_DH is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set +CONFIG_PATA_PCMCIA=m +# CONFIG_PATA_PLATFORM is not set # CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# PHY device support -# - -# -# Ethernet (10 or 100Mbit) -# +# CONFIG_VETH is not set # CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set # -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y -# CONFIG_NET_WIRELESS_RTNETLINK is not set - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_PCMCIA_WAVELAN is not set -# CONFIG_PCMCIA_NETWAVE is not set - -# -# Wireless 802.11 Frequency Hopping cards support +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y # CONFIG_PCMCIA_RAYCS is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -# CONFIG_HERMES is not set +# CONFIG_LIBERTAS is not set +CONFIG_HERMES=m +CONFIG_PCMCIA_HERMES=m +# CONFIG_PCMCIA_SPECTRUM is not set # CONFIG_ATMEL is not set - -# -# Wireless 802.11b Pcmcia/Cardbus cards support -# # CONFIG_AIRO_CS is not set # CONFIG_PCMCIA_WL3501 is not set # CONFIG_USB_ZD1201 is not set -CONFIG_HOSTAP=m -# CONFIG_HOSTAP_FIRMWARE is not set -# CONFIG_HOSTAP_CS is not set -# CONFIG_ACX is not set -CONFIG_NET_WIRELESS=y - -# -# PCMCIA network device support -# -# CONFIG_NET_PCMCIA is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8187 is not set +# CONFIG_MAC80211_HWSIM is not set +# CONFIG_P54_COMMON is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_HOSTAP is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set # -# Wan interfaces +# USB Network Adapters # +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +CONFIG_PCMCIA_PCNET=m +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set # CONFIG_WAN is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set # @@ -720,38 +680,48 @@ CONFIG_NET_WIRELESS=y # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_TSDEV=m -CONFIG_INPUT_TSDEV_SCREEN_X=240 -CONFIG_INPUT_TSDEV_SCREEN_Y=320 CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_EVBUG is not set -# CONFIG_INPUT_LED_TRIGGER is not set # # Input Device Drivers # -# CONFIG_INPUT_KEYBOARD is not set +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=m # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set -CONFIG_TOUCHSCREEN_WM97XX=m -CONFIG_TOUCHSCREEN_WM9705=y -CONFIG_TOUCHSCREEN_WM9712=y -CONFIG_TOUCHSCREEN_WM9713=y # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set # CONFIG_TOUCHSCREEN_UCB1400 is not set +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_WM9705=y +CONFIG_TOUCHSCREEN_WM9712=y +CONFIG_TOUCHSCREEN_WM9713=y +# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set # CONFIG_INPUT_MISC is not set # @@ -764,9 +734,11 @@ CONFIG_TOUCHSCREEN_WM9713=y # Character devices # CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -778,25 +750,12 @@ CONFIG_HW_CONSOLE=y # Non-8250 serial port support # # CONFIG_SERIAL_PXA is not set -# CONFIG_RS232_SERIAL is not set CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=m # CONFIG_NVRAM is not set -# CONFIG_SA1100_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set -# CONFIG_TIHTC is not set # # PCMCIA character devices @@ -804,117 +763,79 @@ CONFIG_HW_RANDOM=m # CONFIG_SYNCLINK_CS is not set # CONFIG_CARDMAN_4000 is not set # CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set - -# -# I2C support -# # CONFIG_I2C is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set # -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set -# CONFIG_POWER_SUPPLY is not set - -# -# L3 serial bus support -# -# CONFIG_L3 is not set - -# -# Misc devices +# I2C GPIO expanders: # # -# Multimedia Capabilities Port drivers +# PCI GPIO expanders: # -# CONFIG_ADC is not set # -# Compaq/iPAQ Drivers +# SPI GPIO expanders: # +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set # -# Compaq/HP iPAQ Drivers +# Sonics Silicon Backplane # -# CONFIG_IPAQ_SLEEVE is not set -# CONFIG_SLEEVE_DEBUG is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # # Multifunction device drivers # +CONFIG_MFD_CORE=y # CONFIG_MFD_SM501 is not set -# CONFIG_HTC_ASIC2 is not set -# CONFIG_HTC_ASIC3 is not set -# CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_BBKEYS is not set -# CONFIG_HTC_ASIC3_DS1WM is not set -# CONFIG_SOC_SAMCOP is not set -# CONFIG_SOC_HAMCOP is not set -# CONFIG_SOC_MQ11XX is not set -CONFIG_SOC_T7L66XB=y -# CONFIG_SOC_TC6387XB is not set -CONFIG_SOC_TC6393XB=y -# CONFIG_SOC_TSC2101 is not set -# CONFIG_SOC_TSC2200 is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# +# CONFIG_HTC_PASIC3 is not set +CONFIG_MFD_TC6393XB=y # -# LED Triggers +# Multimedia devices # -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # -# Multimedia devices +# Multimedia core support # # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # -# Digital Video Broadcasting Devices +# Multimedia drivers # -# CONFIG_DVB is not set -# CONFIG_USB_DABUSB is not set +# CONFIG_DAB is not set # # Graphics support # -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_BACKLIGHT_CORGI=y +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_DDC is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set @@ -924,14 +845,25 @@ CONFIG_FB_CFB_IMAGEBLIT=y # # Frame buffer hardware drivers # -# CONFIG_FB_IMAGEON is not set # CONFIG_FB_S1D13XXX is not set CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set # CONFIG_FB_PXA_PARAMETERS is not set # CONFIG_FB_MBX is not set CONFIG_FB_W100=y +# CONFIG_FB_AM200EPD is not set # CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_VSFB is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CORGI=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -939,6 +871,7 @@ CONFIG_FB_W100=y # CONFIG_VGA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set CONFIG_FONTS=y # CONFIG_FONT_8x8 is not set @@ -946,28 +879,13 @@ CONFIG_FONTS=y # CONFIG_FONT_6x11 is not set # CONFIG_FONT_7x14 is not set # CONFIG_FONT_PEARL_8x8 is not set -CONFIG_FONT_ACORN_8x8=y -# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y # CONFIG_FONT_SUN8x16 is not set # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set - -# -# Logo configuration -# -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y - -# -# Sound -# +# CONFIG_LOGO is not set CONFIG_SOUND=y - -# -# Advanced Linux Sound Architecture -# CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -981,125 +899,75 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y CONFIG_SND_VERBOSE_PRINTK=y # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# +CONFIG_SND_DRIVERS=y # CONFIG_SND_DUMMY is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set - -# -# ALSA ARM devices -# +CONFIG_SND_ARM=y # CONFIG_SND_PXA2XX_AC97 is not set -# CONFIG_SND_RECON is not set - -# -# USB devices -# -# CONFIG_SND_USB_AUDIO is not set - -# -# PCMCIA devices -# -# CONFIG_SND_VXPOCKET is not set -# CONFIG_SND_PDAUDIOCF is not set - -# -# SoC audio support -# -CONFIG_SND_SOC_AC97_BUS=y +# CONFIG_SND_USB is not set +# CONFIG_SND_PCMCIA is not set CONFIG_SND_SOC=m - -# -# SoC Platforms -# - -# -# SoC Audio for the Atmel AT91 -# - -# -# SoC Audio for the Intel PXA2xx -# +CONFIG_SND_SOC_AC97_BUS=y CONFIG_SND_PXA2XX_SOC=m CONFIG_SND_PXA2XX_SOC_AC97=m -CONFIG_SND_PXA2XX_SOC_E740_WM9705=m -CONFIG_SND_PXA2XX_SOC_E750_WM9705=m -CONFIG_SND_PXA2XX_SOC_E800_WM9712=m -# CONFIG_SND_PXA2XX_SOC_MAGICIAN is not set -# CONFIG_SND_PXA2XX_SOC_BLUEANGEL is not set -# CONFIG_SND_PXA2XX_SOC_H5000 is not set - -# -# SoC Audio for the Freescale i.MX -# - -# -# SoC Audio for the Samsung S3C24XX -# -# CONFIG_SND_SOC_AC97_CODEC is not set -# CONFIG_SND_SOC_WM8711 is not set -# CONFIG_SND_SOC_WM8510 is not set -# CONFIG_SND_SOC_WM8731 is not set -# CONFIG_SND_SOC_WM8750 is not set -# CONFIG_SND_SOC_WM8753 is not set -# CONFIG_SND_SOC_WM8772 is not set -# CONFIG_SND_SOC_WM8971 is not set -# CONFIG_SND_SOC_WM8956 is not set -# CONFIG_SND_SOC_WM8960 is not set -# CONFIG_SND_SOC_WM8976 is not set -# CONFIG_SND_SOC_WM8974 is not set -# CONFIG_SND_SOC_WM8980 is not set -CONFIG_SND_SOC_WM9705=m -# CONFIG_SND_SOC_WM9713 is not set +CONFIG_SND_PXA2XX_SOC_E800=m CONFIG_SND_SOC_WM9712=m -# CONFIG_SND_SOC_UDA1380 is not set -# CONFIG_SND_SOC_AK4535 is not set - -# -# Open Sound System -# # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # -# HID Devices +# USB Input Devices # -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set +CONFIG_USB_HID=m +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set # -# USB support +# USB HID Boot Protocol drivers # +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_OHCI is not set # CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=m -CONFIG_USB_DEBUG=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # -CONFIG_USB_DEVICEFS=y -CONFIG_USB_DYNAMIC_MINORS=y +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_SUSPEND is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set # # USB Device Class drivers # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1108,68 +976,19 @@ CONFIG_USB_DYNAMIC_MINORS=y # # may also be needed; see USB_STORAGE Help for more information # -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_DPCM is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE is not set # CONFIG_USB_LIBUSUAL is not set -# -# USB Input Devices -# -# CONFIG_USB_HID is not set - -# -# USB HID Boot Protocol drivers -# -# CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_AIPTEK is not set -# CONFIG_USB_WACOM is not set -# CONFIG_USB_ACECAD is not set -# CONFIG_USB_KBTAB is not set -# CONFIG_USB_POWERMATE is not set -# CONFIG_USB_TOUCHSCREEN is not set -# CONFIG_USB_YEALINK is not set -# CONFIG_USB_XPAD is not set -# CONFIG_USB_ATI_REMOTE is not set -# CONFIG_USB_ATI_REMOTE2 is not set -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set -# CONFIG_USB_GTCO is not set - # # USB Imaging devices # # CONFIG_USB_MDC800 is not set # CONFIG_USB_MICROTEK is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_MON is not set +CONFIG_USB_MON=y # # USB port drivers # - -# -# USB Serial Converter support -# # CONFIG_USB_SERIAL is not set # @@ -1193,56 +1012,57 @@ CONFIG_USB_STORAGE=m # CONFIG_USB_LD is not set # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# +# CONFIG_USB_ISIGHTFW is not set CONFIG_USB_GADGET=y # CONFIG_USB_GADGET_DEBUG_FILES is not set CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set # CONFIG_USB_GADGET_NET2280 is not set -CONFIG_USB_GADGET_PXA2XX=y -CONFIG_USB_PXA2XX=y -# CONFIG_USB_PXA2XX_SMALL is not set +CONFIG_USB_GADGET_PXA25X=y +CONFIG_USB_PXA25X=y +CONFIG_USB_PXA25X_SMALL=y +# CONFIG_USB_GADGET_M66592 is not set # CONFIG_USB_GADGET_PXA27X is not set # CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_MQ11XX is not set # CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_S3C2410 is not set # CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set # CONFIG_USB_GADGET_AT91 is not set # CONFIG_USB_GADGET_DUMMY_HCD is not set # CONFIG_USB_GADGET_DUALSPEED is not set # CONFIG_USB_ZERO is not set -CONFIG_USB_ETH=y +CONFIG_USB_ETH=m # CONFIG_USB_ETH_RNDIS is not set # CONFIG_USB_GADGETFS is not set # CONFIG_USB_FILE_STORAGE is not set # CONFIG_USB_G_SERIAL is not set # CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_CHAR is not set -# CONFIG_USB_PXA2XX_GPIO is not set +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y # -# MMC/SD Card support +# MMC/SD Card Drivers # -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set CONFIG_MMC_BLOCK=y -# CONFIG_MMC_PXA is not set -CONFIG_MMC_TMIO=y -# CONFIG_MMC_SAMCOP is not set +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set # -# Real Time Clock +# MMC/SD Host Controller Drivers # +# CONFIG_MMC_PXA is not set +# CONFIG_MMC_SDHCI is not set +# CONFIG_NEW_LEDS is not set CONFIG_RTC_LIB=y # CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set # # File systems @@ -1256,14 +1076,11 @@ CONFIG_EXT2_FS=y # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -1293,7 +1110,6 @@ CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -1306,30 +1122,21 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=m -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_SUMMARY is not set -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set +# CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y @@ -1342,7 +1149,6 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types @@ -1364,10 +1170,7 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y @@ -1408,30 +1211,32 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set -# -# Profiling support -# -# CONFIG_PROFILING is not set - # # Kernel hacking # # CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_MEMORY_INIT is not set CONFIG_FRAME_POINTER=y +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y # CONFIG_DEBUG_USER is not set # @@ -1439,61 +1244,102 @@ CONFIG_FRAME_POINTER=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y # -# Cryptographic options +# Crypto core or helper # -CONFIG_CRYPTO=y CONFIG_CRYPTO_ALGAPI=m CONFIG_CRYPTO_BLKCIPHER=m CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set +CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m # CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # -# Hardware crypto devices +# Compression # +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y # # Library routines # CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/ezx_defconfig b/arch/arm/configs/ezx_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..2a84d557adc272e76c783f1872bd5643604b55d0 --- /dev/null +++ b/arch/arm/configs/ezx_defconfig @@ -0,0 +1,1614 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc3 +# Mon Jul 7 17:52:21 2008 +# +CONFIG_ARM=y +CONFIG_HAVE_PWM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="-ezxdev" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_DEADLINE=y +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +CONFIG_DEFAULT_DEADLINE=y +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Intel PXA2xx/PXA3xx Implementations +# +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_MACH_TRIZEPS4 is not set +# CONFIG_MACH_EM_X270 is not set +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +# CONFIG_MACH_ARMCORE is not set +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +CONFIG_PXA_EZX=y +CONFIG_MACH_EZX_A780=y +CONFIG_MACH_EZX_E680=y +CONFIG_MACH_EZX_A1200=y +CONFIG_MACH_EZX_A910=y +CONFIG_MACH_EZX_E6=y +CONFIG_MACH_EZX_E2=y +CONFIG_PXA27x=y +CONFIG_PXA_SSP=y +CONFIG_PXA_PWM=y + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=tty1 root=/dev/mmcblk0p2 rootfstype=ext2 rootdelay=1 ip=192.168.0.202:192.168.0.200:192.168.0.200:255.255.255.0 debug" +# CONFIG_XIP_KERNEL is not set +CONFIG_KEXEC=y +CONFIG_ATAGS_PROC=y + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=m +CONFIG_BINFMT_MISC=m + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +# CONFIG_NF_CT_PROTO_DCCP is not set +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_RAW=m + +# +# Bridge: Netfilter Configuration +# +# CONFIG_BRIDGE_NF_EBTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +CONFIG_BRIDGE=m +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_SCH_FIFO=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIUSB is not set +# CONFIG_BT_HCIBTUSB is not set +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y + +# +# Wireless +# +CONFIG_CFG80211=m +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_MAC80211=m + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_NONE is not set + +# +# Selecting 'y' for an algorithm will +# + +# +# build the algorithm into mac80211. +# +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_RC_PID=y +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set +# CONFIG_MAC80211_DEBUG is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=m +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +CONFIG_MTD_XIP=y + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_PXA2XX is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_NET_ETHERNET is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_PXA27x=y +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_TOUCHSCREEN_PCAP=y +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +CONFIG_INPUT_UINPUT=y + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=8 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=m + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TC6393XB is not set +CONFIG_EZX_PCAP=y + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_V4L_USB_DRIVERS is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_VIDEO_PXA27x is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set +CONFIG_FB_PXA_PARAMETERS=y +# CONFIG_FB_MBX is not set +# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +CONFIG_BACKLIGHT_PWM=y + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +CONFIG_FONT_MINI_4x6=y +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_PXA2XX_AC97 is not set + +# +# SPI devices +# + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# System on Chip audio support +# +CONFIG_SND_SOC=y +CONFIG_SND_PXA2XX_SOC=y + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_M66592 is not set +CONFIG_USB_GADGET_PXA27X=y +CONFIG_USB_PXA27X=y +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +# CONFIG_USB_ETH_RNDIS is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_UNSAFE_RESUME=y + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_SDIO_UART=y + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_PXA=y +# CONFIG_MMC_SPI is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_GPIO is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=m +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=m +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +CONFIG_CRAMFS=m +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +# CONFIG_NFS_V4 is not set +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V4 is not set +# CONFIG_ROOT_NFS is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=m +# CONFIG_SMB_NLS_DEFAULT is not set +CONFIG_CIFS=m +CONFIG_CIFS_STATS=y +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_MANAGER=m +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_XCBC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_SHA1=m +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +# CONFIG_CRYPTO_SALSA20 is not set +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/imx27ads_defconfig b/arch/arm/configs/imx27ads_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..bcd95b8dd2df1970d628ef35c41aa515f3ac580f --- /dev/null +++ b/arch/arm/configs/imx27ads_defconfig @@ -0,0 +1,826 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc6 +# Fri Jun 20 16:29:34 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +CONFIG_ARCH_MX2=y +# CONFIG_ARCH_MX3 is not set + +# +# MX2 family CPU support +# +CONFIG_MACH_MX27=y + +# +# MX2 Platforms +# +CONFIG_MACH_MX27ADS=y +# CONFIG_MACH_PCM038 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_FEC_OLD is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_IMX is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig index 988b4d13e76f5c9da6389615a74c0533ac703eba..482e57061053eb83eb67558a9950b25ee8676e22 100644 --- a/arch/arm/configs/iop13xx_defconfig +++ b/arch/arm/configs/iop13xx_defconfig @@ -197,7 +197,6 @@ CONFIG_PCI_LEGACY=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig index 83f40d4041a6650a2e6f35bfa0256cf549c4ff2a..8612f58e105675b6f6c2529db0f2c1721a0634bc 100644 --- a/arch/arm/configs/iop32x_defconfig +++ b/arch/arm/configs/iop32x_defconfig @@ -201,7 +201,6 @@ CONFIG_PCI_LEGACY=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/iop33x_defconfig b/arch/arm/configs/iop33x_defconfig index 917afb5ccfacba602b1041b35f6689e5cbb1fc66..8b0098d19d084979731dfe3b6d7bf357f956b064 100644 --- a/arch/arm/configs/iop33x_defconfig +++ b/arch/arm/configs/iop33x_defconfig @@ -197,7 +197,6 @@ CONFIG_PCI_LEGACY=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/ixp2000_defconfig b/arch/arm/configs/ixp2000_defconfig index f8f9793b526f243187ec24754f8fcb6bf7422506..84680db6c6152c49a578a77f73a03736f9ea9613 100644 --- a/arch/arm/configs/ixp2000_defconfig +++ b/arch/arm/configs/ixp2000_defconfig @@ -184,7 +184,6 @@ CONFIG_PCI=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/ixp23xx_defconfig b/arch/arm/configs/ixp23xx_defconfig index 27cf022dd807195f5703910fcc7d74164983510f..4a2f7b2372db3acd7aa418567bfd38733de719f8 100644 --- a/arch/arm/configs/ixp23xx_defconfig +++ b/arch/arm/configs/ixp23xx_defconfig @@ -180,7 +180,6 @@ CONFIG_PCI=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/ixp4xx_defconfig b/arch/arm/configs/ixp4xx_defconfig index efa0485d2f7ec10eb01ed26b47b3180e3a66e47e..fc14932e3abd565303d06910d91f3993770ecbe5 100644 --- a/arch/arm/configs/ixp4xx_defconfig +++ b/arch/arm/configs/ixp4xx_defconfig @@ -165,6 +165,7 @@ CONFIG_ARCH_PRPMC1100=y CONFIG_MACH_NAS100D=y CONFIG_MACH_DSMG600=y CONFIG_ARCH_IXDP4XX=y +CONFIG_MACH_FSG=y CONFIG_CPU_IXP46X=y CONFIG_CPU_IXP43X=y CONFIG_MACH_GTWX5715=y @@ -770,7 +771,7 @@ CONFIG_ATA=y # CONFIG_SATA_SIL24 is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_ULI is not set -# CONFIG_SATA_VIA is not set +CONFIG_SATA_VIA=y # CONFIG_SATA_VITESSE is not set # CONFIG_SATA_INIC162X is not set # CONFIG_PATA_ALI is not set @@ -1143,7 +1144,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83781D is not set +CONFIG_SENSORS_W83781D=y # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set @@ -1334,8 +1335,8 @@ CONFIG_LEDS_CLASS=y # # LED drivers # -# CONFIG_LEDS_IXP4XX is not set CONFIG_LEDS_GPIO=y +CONFIG_LEDS_FSG=y # # LED Triggers @@ -1367,7 +1368,7 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_DS1672 is not set # CONFIG_RTC_DRV_MAX6900 is not set # CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set +CONFIG_RTC_DRV_ISL1208=y CONFIG_RTC_DRV_X1205=y CONFIG_RTC_DRV_PCF8563=y # CONFIG_RTC_DRV_PCF8583 is not set diff --git a/arch/arm/configs/kafa_defconfig b/arch/arm/configs/kafa_defconfig index ae51a40db6f99df08cddefbfcc96714f35f8525e..6dd95a2c8d5d09e6c1d050ab25bc0ece08199eaa 100644 --- a/arch/arm/configs/kafa_defconfig +++ b/arch/arm/configs/kafa_defconfig @@ -162,7 +162,6 @@ CONFIG_CPU_TLB_V4WBI=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/kb9202_defconfig b/arch/arm/configs/kb9202_defconfig index c16537d9d67a9102818e9ef3fdc4041812520680..8e74c66f239db6bec52dd8f88ffa1a8c44603b55 100644 --- a/arch/arm/configs/kb9202_defconfig +++ b/arch/arm/configs/kb9202_defconfig @@ -126,7 +126,6 @@ CONFIG_ISA_DMA_API=y # # Kernel Features # -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e3357ba10f1f16200dd3cd92f46060addc5898e4 --- /dev/null +++ b/arch/arm/configs/kirkwood_defconfig @@ -0,0 +1,1426 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc5 +# Sun Jun 22 15:51:25 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +CONFIG_ARCH_KIRKWOOD=y +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Marvell Kirkwood Implementations +# +CONFIG_MACH_DB88F6281_BP=y +CONFIG_MACH_RD88F6192_NAS=y +CONFIG_MACH_RD88F6281=y + +# +# Boot options +# + +# +# Power management +# +CONFIG_PLAT_ORION=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_FEROCEON=y +# CONFIG_CPU_FEROCEON_OLD_ID is not set +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_FEROCEON=y +CONFIG_CPU_TLB_FEROCEON=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_FEROCEON_L2=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_NET_TCPPROBE is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_ORION=y +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +CONFIG_SATA_MV=y +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_MV643XX_ETH=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_MV64XXX=y + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_ORION=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +# CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +# CONFIG_LEDS_CLASS is not set + +# +# LED drivers +# + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGERS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_MV=y +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_DMADEVICES=y + +# +# DMA Devices +# +CONFIG_MV_XOR=y +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_XFS_FS=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_ASYNC_CORE=y +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/ks8695_defconfig b/arch/arm/configs/ks8695_defconfig index 8ab21a0719e959097e465e714ec2a00084693302..6077f2cb88e4cecfce760d26237fd984ac6db594 100644 --- a/arch/arm/configs/ks8695_defconfig +++ b/arch/arm/configs/ks8695_defconfig @@ -174,7 +174,6 @@ CONFIG_PCCARD_NONSTATIC=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/loki_defconfig b/arch/arm/configs/loki_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..17da7c3b3d53b8482e9dd57114cc3761f573505b --- /dev/null +++ b/arch/arm/configs/loki_defconfig @@ -0,0 +1,1147 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc5 +# Fri Jun 13 03:07:49 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_LOKI=y +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Marvell Loki (88RC8480) Implementations +# +CONFIG_MACH_LB88RC8480=y + +# +# Boot options +# + +# +# Power management +# +CONFIG_PLAT_ORION=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_FEROCEON=y +# CONFIG_CPU_FEROCEON_OLD_ID is not set +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_FEROCEON=y +CONFIG_CPU_TLB_FEROCEON=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_FPE_NWFPE is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +CONFIG_FTL=y +CONFIG_NFTL=y +# CONFIG_NFTL_RW is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +CONFIG_MTD_CFI_I4=y +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +CONFIG_MTD_M25P80=y +CONFIG_M25PXX_USE_FAST_READ=y +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_ORION=y +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +CONFIG_ATA_SFF=y +CONFIG_SATA_MV=y +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_E1000E_ENABLED is not set +CONFIG_MV643XX_ETH=y +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_MV64XXX=y + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +# CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +# CONFIG_LEDS_CLASS is not set + +# +# LED drivers +# + +# +# LED Triggers +# +# CONFIG_LEDS_TRIGGERS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_XFS_FS=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +# CONFIG_JOLIET is not set +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_LDM_DEBUG=y +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_LATENCYTOP is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/lpd270_defconfig b/arch/arm/configs/lpd270_defconfig index a3bf5833b87ad94a9987185f333818b7916cab08..1a38d8e3fe66ba59c2b189a1d89d42c9ce88a91a 100644 --- a/arch/arm/configs/lpd270_defconfig +++ b/arch/arm/configs/lpd270_defconfig @@ -173,7 +173,6 @@ CONFIG_XSCALE_PMU=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/lpd7a404_defconfig b/arch/arm/configs/lpd7a404_defconfig index 46a0f7fe1fa51823eda6d4b25f2bdca451099203..7a2e932da1c644fc8bd4390eb1a99005a0040f14 100644 --- a/arch/arm/configs/lpd7a404_defconfig +++ b/arch/arm/configs/lpd7a404_defconfig @@ -148,7 +148,6 @@ CONFIG_ARM_AMBA=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set # CONFIG_AEABI is not set CONFIG_ARCH_DISCONTIGMEM_ENABLE=y CONFIG_SELECT_MEMORY_MODEL=y diff --git a/arch/arm/configs/mv78xx0_defconfig b/arch/arm/configs/mv78xx0_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d38ebf8721a47b92141efbc996838fcccb035233 --- /dev/null +++ b/arch/arm/configs/mv78xx0_defconfig @@ -0,0 +1,1445 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc5 +# Fri Jun 13 02:57:32 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +# CONFIG_SLUB_DEBUG is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_LOKI is not set +CONFIG_ARCH_MV78XX0=y +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Marvell MV78xx0 Implementations +# +CONFIG_MACH_DB78X00_BP=y + +# +# Boot options +# + +# +# Power management +# +CONFIG_PLAT_ORION=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_FEROCEON=y +CONFIG_CPU_FEROCEON_OLD_ID=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_FEROCEON=y +CONFIG_CPU_TLB_FEROCEON=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +CONFIG_OUTER_CACHE=y +CONFIG_CACHE_FEROCEON_L2=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +CONFIG_NET_PKTGEN=m +# CONFIG_NET_TCPPROBE is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +CONFIG_MTD_NAND_ORION=y +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +CONFIG_SATA_MV=y +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_MV643XX_ETH=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_MV64XXX=y + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +CONFIG_USB_PRINTER=y +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +# CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RS5C372=y +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +CONFIG_RTC_DRV_M41T80=y +# CONFIG_RTC_DRV_M41T80_WDT is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/mx31ads_defconfig b/arch/arm/configs/mx31ads_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e05271753e1582ed6e69e41f43a2287a67b4054e --- /dev/null +++ b/arch/arm/configs/mx31ads_defconfig @@ -0,0 +1,839 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc6 +# Fri Jun 20 16:21:11 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +# CONFIG_ARCH_MX2 is not set +CONFIG_ARCH_MX3=y + +# +# MX3 Options +# +CONFIG_MACH_MX31ADS=y +# CONFIG_MACH_PCM037 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/mx31litekit_defconfig b/arch/arm/configs/mx31litekit_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..4f41c413568593ac1c41b94f020521bf10f7f838 --- /dev/null +++ b/arch/arm/configs/mx31litekit_defconfig @@ -0,0 +1,1100 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc5 +# Fri Jun 13 14:23:39 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_GENERIC_GPIO is not set +# CONFIG_GENERIC_TIME is not set +# CONFIG_GENERIC_CLOCKEVENTS is not set +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +CONFIG_ARCH_MX3=y + +# +# MX3 Options +# +# CONFIG_MACH_MX31ADS is not set +CONFIG_MACH_MX31LITE=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +# CONFIG_PCMCIA is not set + +# +# PC-card bridges +# + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +CONFIG_PREEMPT=y +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_AOUT=y +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +# CONFIG_SUSPEND is not set +# CONFIG_APM_EMULATION is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_RAM=y +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_CPIA2 is not set +CONFIG_V4L_USB_DRIVERS=y +# CONFIG_USB_VICAM is not set +# CONFIG_USB_IBMCAM is not set +# CONFIG_USB_KONICAWC is not set +# CONFIG_USB_QUICKCAM_MESSENGER is not set +# CONFIG_USB_ET61X251 is not set +# CONFIG_USB_OV511 is not set +# CONFIG_USB_SE401 is not set +# CONFIG_USB_SN9C102 is not set +# CONFIG_USB_STV680 is not set +# CONFIG_USB_ZC0301 is not set +# CONFIG_USB_PWC is not set +# CONFIG_USB_ZR364XX is not set +# CONFIG_USB_STKWEBCAM is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_USB_DSBR is not set +# CONFIG_USB_SI470X is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_STORAGE is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/netx_defconfig b/arch/arm/configs/netx_defconfig index 57f32f39d0ff6af2de160fd9cdc897f85af516fa..0884f2370c3ae649ac15009a8677e7d486040146 100644 --- a/arch/arm/configs/netx_defconfig +++ b/arch/arm/configs/netx_defconfig @@ -154,7 +154,6 @@ CONFIG_ARM_AMBA=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/onearm_defconfig b/arch/arm/configs/onearm_defconfig index 650a248613e5afc6b0d838646d42ed04d6aabb0c..418ca2febbe303df5145f5a162b459e33ad2b431 100644 --- a/arch/arm/configs/onearm_defconfig +++ b/arch/arm/configs/onearm_defconfig @@ -202,7 +202,6 @@ CONFIG_AT91_CF=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig index 52cd99bd52fbe700b0880143ee84b231094488a7..9578b5d9f9c76af3ae92e4cb286365d930311108 100644 --- a/arch/arm/configs/orion5x_defconfig +++ b/arch/arm/configs/orion5x_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.24 -# Thu Feb 7 14:10:30 2008 +# Linux kernel version: 2.6.26-rc4 +# Mon Jun 2 23:54:48 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -21,6 +21,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_ZONE_DMA=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -40,24 +41,24 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set CONFIG_LOG_BUF_SHIFT=14 # CONFIG_CGROUPS is not set -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_FAIR_USER_SCHED=y -# CONFIG_FAIR_CGROUP_SCHED is not set +# CONFIG_GROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set # CONFIG_BLK_DEV_INITRD is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set CONFIG_HOTPLUG=y CONFIG_PRINTK=y @@ -73,20 +74,25 @@ CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set +# CONFIG_SLUB_DEBUG is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y # CONFIG_SLOB is not set -# CONFIG_PROFILING is not set +CONFIG_PROFILING=y # CONFIG_MARKERS is not set +CONFIG_OPROFILE=y CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set @@ -111,7 +117,6 @@ CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" CONFIG_CLASSIC_RCU=y -# CONFIG_PREEMPT_RCU is not set # # System Type @@ -160,6 +165,15 @@ CONFIG_MACH_RD88F5182=y CONFIG_MACH_KUROBOX_PRO=y CONFIG_MACH_DNS323=y CONFIG_MACH_TS209=y +CONFIG_MACH_LINKSTATION_PRO=y +CONFIG_MACH_TS409=y +CONFIG_MACH_WRT350N_V2=y +CONFIG_MACH_TS78XX=y +CONFIG_MACH_MV2120=y +CONFIG_MACH_MSS2=y +CONFIG_MACH_WNR854T=y +CONFIG_MACH_RD88F5181L_GE=y +CONFIG_MACH_RD88F5181L_FXO=y # # Boot options @@ -168,6 +182,7 @@ CONFIG_MACH_TS209=y # # Power management # +CONFIG_PLAT_ORION=y # # Processor Type @@ -177,8 +192,9 @@ CONFIG_CPU_FEROCEON=y CONFIG_CPU_FEROCEON_OLD_ID=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_COPY_FEROCEON=y CONFIG_CPU_TLB_V4WBI=y CONFIG_CPU_CP15=y CONFIG_CPU_CP15_MMU=y @@ -189,7 +205,6 @@ CONFIG_CPU_CP15_MMU=y CONFIG_ARM_THUMB=y # CONFIG_CPU_ICACHE_DISABLE is not set # CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set # CONFIG_OUTER_CACHE is not set # @@ -199,6 +214,7 @@ CONFIG_PCI=y CONFIG_PCI_SYSCALL=y # CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set # CONFIG_PCCARD is not set # @@ -221,6 +237,7 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 @@ -238,7 +255,6 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="" # CONFIG_XIP_KERNEL is not set # CONFIG_KEXEC is not set -# CONFIG_ATAGS_PROC is not set # # Floating point emulation @@ -311,8 +327,6 @@ CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set # CONFIG_IP_DCCP is not set @@ -335,6 +349,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # Network testing # CONFIG_NET_PKTGEN=m +# CONFIG_NET_TCPPROBE is not set # CONFIG_HAMRADIO is not set # CONFIG_CAN is not set # CONFIG_IRDA is not set @@ -362,6 +377,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y @@ -371,6 +388,7 @@ CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers @@ -378,9 +396,8 @@ CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y -CONFIG_FTL=y -CONFIG_NFTL=y -# CONFIG_NFTL_RW is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set @@ -405,12 +422,12 @@ CONFIG_MTD_MAP_BANK_WIDTH_4=y # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set CONFIG_MTD_CFI_I1=y CONFIG_MTD_CFI_I2=y -CONFIG_MTD_CFI_I4=y +# CONFIG_MTD_CFI_I4 is not set # CONFIG_MTD_CFI_I8 is not set # CONFIG_MTD_OTP is not set CONFIG_MTD_CFI_INTELEXT=y CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y +# CONFIG_MTD_CFI_STAA is not set CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set @@ -481,6 +498,9 @@ CONFIG_MISC_DEVICES=y # CONFIG_EEPROM_93CX6 is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support @@ -542,6 +562,7 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set @@ -556,7 +577,10 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_SRP is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y # CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y # CONFIG_SATA_SVW is not set # CONFIG_ATA_PIIX is not set CONFIG_SATA_MV=y @@ -566,7 +590,6 @@ CONFIG_SATA_MV=y # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SX4 is not set # CONFIG_SATA_SIL is not set -# CONFIG_SATA_SIL24 is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_ULI is not set # CONFIG_SATA_VIA is not set @@ -611,6 +634,7 @@ CONFIG_SATA_MV=y # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set # CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set # CONFIG_MD is not set # CONFIG_FUSION is not set @@ -652,7 +676,7 @@ CONFIG_NET_PCI=y # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set # CONFIG_EEPRO100 is not set -CONFIG_E100=y +# CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set @@ -668,9 +692,7 @@ CONFIG_E100=y CONFIG_NETDEV_1000=y # CONFIG_ACENIC is not set # CONFIG_DL2K is not set -CONFIG_E1000=y -CONFIG_E1000_NAPI=y -# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000 is not set # CONFIG_E1000E is not set # CONFIG_E1000E_ENABLED is not set # CONFIG_IP1000 is not set @@ -680,27 +702,15 @@ CONFIG_E1000_NAPI=y # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set # CONFIG_SIS190 is not set -CONFIG_SKGE=y -CONFIG_SKY2=y -# CONFIG_SK98LIN is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set # CONFIG_VIA_VELOCITY is not set -CONFIG_TIGON3=y +# CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set CONFIG_MV643XX_ETH=y # CONFIG_QLA3XXX is not set # CONFIG_ATL1 is not set -CONFIG_NETDEV_10000=y -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_IXGBE is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NETXEN_NIC is not set -# CONFIG_NIU is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_TEHUTI is not set -# CONFIG_BNX2X is not set +# CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set # @@ -708,6 +718,7 @@ CONFIG_NETDEV_10000=y # # CONFIG_WLAN_PRE80211 is not set # CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # # USB Network Adapters @@ -738,12 +749,9 @@ CONFIG_INPUT=y # # Userland interfaces # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set +CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set # @@ -765,10 +773,8 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # # Character devices # -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_VT is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set @@ -777,7 +783,7 @@ CONFIG_HW_CONSOLE=y # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y +# CONFIG_SERIAL_8250_PCI is not set CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_RUNTIME_UARTS=2 # CONFIG_SERIAL_8250_EXTENDED is not set @@ -792,7 +798,7 @@ CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m +# CONFIG_HW_RANDOM is not set # CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set @@ -803,13 +809,6 @@ CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - # # I2C Hardware Bus support # @@ -837,6 +836,7 @@ CONFIG_I2C_CHARDEV=y # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set # CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set CONFIG_I2C_MV64XXX=y # @@ -847,19 +847,13 @@ CONFIG_I2C_MV64XXX=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set -# CONFIG_TPS65010 is not set # CONFIG_SENSORS_MAX6875 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y @@ -872,6 +866,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_I5K_AMB is not set @@ -901,6 +896,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set # CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set @@ -910,6 +906,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set @@ -925,14 +922,24 @@ CONFIG_SSB_POSSIBLE=y # Multifunction device drivers # # CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set -CONFIG_DAB=y -# CONFIG_USB_DABUSB is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set # # Graphics support @@ -948,12 +955,6 @@ CONFIG_DAB=y # # CONFIG_DISPLAY_SUPPORT is not set -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - # # Sound # @@ -985,14 +986,18 @@ CONFIG_USB_DEVICEFS=y CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_OHCI_HCD is not set # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set @@ -1003,6 +1008,7 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y # # CONFIG_USB_ACM is not set CONFIG_USB_PRINTER=y +# CONFIG_USB_WDM is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1022,7 +1028,9 @@ CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y CONFIG_USB_STORAGE_JUMPSHOT=y # CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set # CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set # CONFIG_USB_LIBUSUAL is not set # @@ -1060,6 +1068,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set CONFIG_NEW_LEDS=y @@ -1068,7 +1077,7 @@ CONFIG_LEDS_CLASS=y # # LED drivers # -# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_GPIO=y # # LED Triggers @@ -1076,6 +1085,7 @@ CONFIG_LEDS_CLASS=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -1105,6 +1115,7 @@ CONFIG_RTC_DRV_RS5C372=y # CONFIG_RTC_DRV_PCF8583 is not set CONFIG_RTC_DRV_M41T80=y # CONFIG_RTC_DRV_M41T80_WDT is not set +# CONFIG_RTC_DRV_S35390A is not set # # SPI RTC drivers @@ -1125,6 +1136,7 @@ CONFIG_RTC_DRV_M41T80=y # # on-CPU RTC drivers # +# CONFIG_UIO is not set # # File systems @@ -1140,14 +1152,11 @@ CONFIG_JBD=y # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -1155,8 +1164,8 @@ CONFIG_DNOTIFY=y # # CD-ROM/DVD Filesystems # -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y # CONFIG_ZISOFS is not set CONFIG_UDF_FS=m CONFIG_UDF_NLS=y @@ -1205,8 +1214,10 @@ CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -1214,7 +1225,6 @@ CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y @@ -1241,14 +1251,13 @@ CONFIG_PARTITION_ADVANCED=y # CONFIG_MAC_PARTITION is not set CONFIG_MSDOS_PARTITION=y CONFIG_BSD_DISKLABEL=y -CONFIG_MINIX_SUBPARTITION=y -CONFIG_SOLARIS_X86_PARTITION=y -CONFIG_UNIXWARE_DISKLABEL=y -CONFIG_LDM_PARTITION=y -CONFIG_LDM_DEBUG=y +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set -CONFIG_SUN_PARTITION=y +# CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set # CONFIG_SYSV68_PARTITION is not set @@ -1300,15 +1309,48 @@ CONFIG_NLS_ISO8859_2=y # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set # CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set # CONFIG_SAMPLES is not set CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set # # Security options @@ -1317,50 +1359,79 @@ CONFIG_DEBUG_USER=y # CONFIG_SECURITY is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_CRYPTO=y + +# +# Crypto core or helper +# CONFIG_CRYPTO_ALGAPI=m CONFIG_CRYPTO_BLKCIPHER=m -# CONFIG_CRYPTO_SEQIV is not set CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_XTS is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# # CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# # CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set -# CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_LZO is not set CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_HIFN_795X is not set @@ -1369,12 +1440,14 @@ CONFIG_CRYPTO_HW=y # Library routines # CONFIG_BITREVERSE=y -CONFIG_CRC_CCITT=y -CONFIG_CRC16=y -# CONFIG_CRC_ITU_T is not set +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC7 is not set -CONFIG_LIBCRC32C=y +# CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y diff --git a/arch/arm/configs/pcm037_defconfig b/arch/arm/configs/pcm037_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..62747458647027e15bfa956587adb693d2ce25ba --- /dev/null +++ b/arch/arm/configs/pcm037_defconfig @@ -0,0 +1,748 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc6 +# Wed Jun 25 11:52:42 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +CONFIG_ARCH_MX3=y + +# +# MX3 Options +# +# CONFIG_MACH_MX31ADS is not set +CONFIG_MACH_PCM037=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_V6=y +# CONFIG_CPU_32v6K is not set +CONFIG_CPU_32v6=y +CONFIG_CPU_ABRT_EV6=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_V6=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_TLB_V6=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_VFP=y + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +# CONFIG_MTD_CFI_NOSWAP is not set +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +# CONFIG_BLK_DEV is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +CONFIG_SMC91X=y +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/pcm038_defconfig b/arch/arm/configs/pcm038_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..6b798c215ca89671be60532e6b0a692b54ac61ab --- /dev/null +++ b/arch/arm/configs/pcm038_defconfig @@ -0,0 +1,1008 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc6 +# Fri Jun 20 16:38:36 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +CONFIG_ARCH_MXC=y +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Freescale MXC Implementations +# +CONFIG_ARCH_MX2=y +# CONFIG_ARCH_MX3 is not set + +# +# MX2 family CPU support +# +CONFIG_MACH_MX27=y + +# +# MX2 Platforms +# +# CONFIG_MACH_MX27ADS is not set +CONFIG_MACH_PCM038=y +CONFIG_MACH_PCM970_BASEBOARD=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +# CONFIG_PM is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_TCPPROBE is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_FEC_OLD=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +# CONFIG_TUNER_3036 is not set +# CONFIG_SOC_CAMERA is not set +# CONFIG_RADIO_ADAPTERS is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_CFB_FILLRECT is not set +# CONFIG_FB_CFB_COPYAREA is not set +# CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +# CONFIG_LOGO is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_NEW_LEDS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +CONFIG_RTC_DRV_PCF8563=y +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_DNOTIFY is not set +# CONFIG_INOTIFY is not set +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=m +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=m +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_FRAME_POINTER=y +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_USER is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/picotux200_defconfig b/arch/arm/configs/picotux200_defconfig index 95a22f5128054528c29fa38b2895a424ee519315..14826f0dabde9300232a283c01f9b5153075dd17 100644 --- a/arch/arm/configs/picotux200_defconfig +++ b/arch/arm/configs/picotux200_defconfig @@ -201,7 +201,6 @@ CONFIG_ARM_THUMB=y # Kernel Features # # CONFIG_PREEMPT is not set -CONFIG_NO_IDLE_HZ=y CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y diff --git a/arch/arm/configs/pnx4008_defconfig b/arch/arm/configs/pnx4008_defconfig index b5e11aa2e290f4f94c33b3e2c5fe0e5cd9ee381f..811b8f60d19deef2ef61aa835f09ba28c7f7a86b 100644 --- a/arch/arm/configs/pnx4008_defconfig +++ b/arch/arm/configs/pnx4008_defconfig @@ -151,7 +151,6 @@ CONFIG_ARM_THUMB=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/qil-a9260_defconfig b/arch/arm/configs/qil-a9260_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ef903bed061e602cc04849b22245e309519fed18 --- /dev/null +++ b/arch/arm/configs/qil-a9260_defconfig @@ -0,0 +1,1256 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24 +# Tue Apr 15 12:28:38 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +CONFIG_ARCH_AT91SAM9260=y +# CONFIG_ARCH_AT91SAM9261 is not set +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9260 Variants +# +# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set + +# +# AT91SAM9260 / AT91SAM9XE Board Type +# +# CONFIG_MACH_AT91SAM9260EK is not set +# CONFIG_MACH_CAM60 is not set +# CONFIG_MACH_SAM9_L9260 is not set +# CONFIG_MACH_USB_A9260 is not set +CONFIG_MACH_QIL_A9260=y + +# +# AT91 Board Options +# + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set +CONFIG_AT91_SLOW_CLOCK=y +CONFIG_AT91_TIMER_HZ=100 +# CONFIG_AT91_EARLY_DBGU is not set +CONFIG_AT91_EARLY_USART0=y +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS1,115200" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_SUSPEND=y +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_PCA is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_NOWAYOUT=y + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_AT91SAM9_WATCHDOG is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_PERSIST is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_AT91=y +# CONFIG_MMC_SPI is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +CONFIG_RTC_DRV_M41T94=y + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_AT91SAM9 is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_INSTRUMENTATION is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_ECB is not set +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/realview-smp_defconfig b/arch/arm/configs/realview-smp_defconfig index fc39ba1a89f316cd222b61d36794340a334bc92f..0c09b23167ec1f69b961322a5f051e2a8709347e 100644 --- a/arch/arm/configs/realview-smp_defconfig +++ b/arch/arm/configs/realview-smp_defconfig @@ -177,7 +177,6 @@ CONFIG_NR_CPUS=4 CONFIG_HOTPLUG_CPU=y CONFIG_LOCAL_TIMERS=y # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/realview_defconfig b/arch/arm/configs/realview_defconfig index accbf529ce5bdba509700fe787917f0a8b231b36..907e54344dad05af00744830cd6aae993b3a436a 100644 --- a/arch/arm/configs/realview_defconfig +++ b/arch/arm/configs/realview_defconfig @@ -126,7 +126,6 @@ CONFIG_ISA_DMA_API=y # # Kernel Features # -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y diff --git a/arch/arm/configs/rpc_defconfig b/arch/arm/configs/rpc_defconfig index 5ddecb9ddf01df02111c587c7c076eed53ec2bc4..f62d1817d2c67980fa957f80037c26628947b2d7 100644 --- a/arch/arm/configs/rpc_defconfig +++ b/arch/arm/configs/rpc_defconfig @@ -190,7 +190,6 @@ CONFIG_ISA_DMA_API=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/s3c2410_defconfig b/arch/arm/configs/s3c2410_defconfig index f8a1645b3d4affd925eb2dfaaf85cd1d1db995a4..35faaea8623e43f3e47a86de92255a09184d8724 100644 --- a/arch/arm/configs/s3c2410_defconfig +++ b/arch/arm/configs/s3c2410_defconfig @@ -1,15 +1,18 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-rc6 -# Mon Apr 9 10:12:58 2007 +# Linux kernel version: 2.6.26-rc8 +# Mon Jul 7 16:59:23 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y # CONFIG_GENERIC_TIME is not set +# CONFIG_GENERIC_CLOCKEVENTS is not set CONFIG_MMU=y CONFIG_NO_IOPORT=y CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_GENERIC_IRQ_PROBE=y @@ -18,34 +21,39 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_ZONE_DMA=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set +CONFIG_IKCONFIG=m +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=16 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_CC_OPTIMIZE_FOR_SIZE=y @@ -53,6 +61,7 @@ CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set @@ -60,34 +69,43 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y - -# -# Block layer -# CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set # # IO Schedulers @@ -101,6 +119,7 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y # # System Type @@ -119,14 +138,17 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ARCH_NETX is not set # CONFIG_ARCH_H720X is not set # CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IOP32X is not set # CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set # CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set @@ -134,18 +156,32 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" CONFIG_ARCH_S3C2410=y # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set CONFIG_PLAT_S3C24XX=y CONFIG_CPU_S3C244X=y +# CONFIG_S3C24XX_PWM is not set CONFIG_PM_SIMTEC=y +CONFIG_S3C2410_DMA=y +# CONFIG_S3C2410_DMA_DEBUG is not set +CONFIG_MACH_SMDK=y +CONFIG_PLAT_S3C=y +CONFIG_CPU_LLSERIAL_S3C2410=y +CONFIG_CPU_LLSERIAL_S3C2440=y + +# +# Boot options +# # CONFIG_S3C_BOOT_WATCHDOG is not set # CONFIG_S3C_BOOT_ERROR_RESET is not set + +# +# Power management +# # CONFIG_S3C2410_PM_DEBUG is not set # CONFIG_S3C2410_PM_CHECK is not set CONFIG_S3C_LOWLEVEL_UART_PORT=0 -CONFIG_S3C2410_DMA=y -# CONFIG_S3C2410_DMA_DEBUG is not set -CONFIG_MACH_SMDK=y # # S3C2400 Machines @@ -155,6 +191,8 @@ CONFIG_CPU_S3C2410_DMA=y CONFIG_S3C2410_PM=y CONFIG_S3C2410_GPIO=y CONFIG_S3C2410_CLOCK=y +CONFIG_SIMTEC_NOR=y +CONFIG_MACH_BAST_IDE=y # # S3C2410 Machines @@ -167,6 +205,7 @@ CONFIG_ARCH_BAST=y CONFIG_MACH_OTOM=y CONFIG_MACH_AML_M5900=y CONFIG_BAST_PC104_IRQ=y +# CONFIG_MACH_TCT_HAMMER is not set CONFIG_MACH_VR1000=y CONFIG_MACH_QT2410=y CONFIG_CPU_S3C2412=y @@ -176,8 +215,10 @@ CONFIG_S3C2412_PM=y # # S3C2412 Machines # +# CONFIG_MACH_JIVE is not set CONFIG_MACH_SMDK2413=y CONFIG_MACH_S3C2413=y +# CONFIG_MACH_SMDK2412 is not set CONFIG_MACH_VSTMS=y CONFIG_CPU_S3C2440=y CONFIG_S3C2440_DMA=y @@ -191,6 +232,7 @@ CONFIG_MACH_RX3715=y CONFIG_ARCH_S3C2440=y CONFIG_MACH_NEXCODER_2440=y CONFIG_SMDK2440_CPU2440=y +# CONFIG_MACH_AT2440EVB is not set CONFIG_CPU_S3C2442=y # @@ -215,6 +257,7 @@ CONFIG_CPU_32v4T=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV4T=y CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_V4WT=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_COPY_V4WB=y @@ -236,17 +279,15 @@ CONFIG_CPU_CP15_MMU=y # Bus support # CONFIG_ISA=y - -# -# PCCARD (PCMCIA/CardBus) support -# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set # # Kernel Features # +# CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=200 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set @@ -257,9 +298,13 @@ CONFIG_FLATMEM_MANUAL=y CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y CONFIG_ALIGNMENT_TRAP=y # @@ -279,7 +324,7 @@ CONFIG_CMDLINE="root=/dev/hda1 ro init=/bin/bash console=ttySAC0" # At least one emulation must be selected # CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set +CONFIG_FPE_NWFPE_XP=y # CONFIG_FPE_FASTFPE is not set # CONFIG_VFP is not set @@ -295,10 +340,12 @@ CONFIG_BINFMT_AOUT=y # Power management options # CONFIG_PM=y -# CONFIG_PM_LEGACY is not set # CONFIG_PM_DEBUG is not set -# CONFIG_PM_SYSFS_DEPRECATED is not set -# CONFIG_APM_EMULATION is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=m +CONFIG_ARCH_SUSPEND_POSSIBLE=y # # Networking @@ -308,59 +355,67 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set -# CONFIG_PACKET is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set +CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_FIB_HASH=y CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set # CONFIG_ARPD is not set # CONFIG_SYN_COOKIES is not set # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set +CONFIG_INET_TUNNEL=m CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +# CONFIG_IPV6_ROUTE_INFO is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -373,20 +428,71 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set +CONFIG_NET_SCH_FIFO=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set -# CONFIG_BT is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=m +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_MAC80211=m + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_NONE is not set + +# +# Selecting 'y' for an algorithm will +# + +# +# build the algorithm into mac80211. +# +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set +# CONFIG_MAC80211_DEBUG is not set # CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -395,21 +501,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set +CONFIG_FW_LOADER=m # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set @@ -420,6 +519,7 @@ CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers @@ -432,6 +532,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -457,7 +558,6 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set CONFIG_MTD_ROM=y # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access @@ -486,13 +586,10 @@ CONFIG_MTD_BAST_MAXSIZE=4 # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_S3C2410=y # CONFIG_MTD_NAND_S3C2410_DEBUG is not set @@ -500,30 +597,25 @@ CONFIG_MTD_NAND_S3C2410=y # CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_NANDSIM is not set - -# -# OneNAND Flash Device Drivers -# +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set CONFIG_PARPORT=y -# CONFIG_PARPORT_PC is not set +CONFIG_PARPORT_PC=m +# CONFIG_PARPORT_PC_FIFO is not set +# CONFIG_PARPORT_PC_SUPERIO is not set # CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_AX88796 is not set +CONFIG_PARPORT_AX88796=m CONFIG_PARPORT_1284=y - -# -# Plug and Play support -# +CONFIG_PARPORT_NOT_PC=y # CONFIG_PNP is not set -# CONFIG_PNPACPI is not set - -# -# Block devices -# +CONFIG_BLK_DEV=y +# CONFIG_PARIDE is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set @@ -532,34 +624,34 @@ CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +# CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set CONFIG_ATA_OVER_ETH=m - -# -# ATA/ATAPI/MFM/RLL support -# +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y CONFIG_IDE=y CONFIG_BLK_DEV_IDE=y # -# Please see Documentation/ide.txt for help/info on IDE drives +# Please see Documentation/ide/ide.txt for help/info on IDE drives # # CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set CONFIG_BLK_DEV_IDECD=y +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y CONFIG_BLK_DEV_IDETAPE=m CONFIG_BLK_DEV_IDEFLOPPY=m +# CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y # # IDE chipset support/bugfixes # -CONFIG_IDE_GENERIC=y -# CONFIG_IDE_ARM is not set -CONFIG_BLK_DEV_IDE_BAST=y -# CONFIG_IDE_CHIPSETS is not set +# CONFIG_BLK_DEV_PLATFORM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_BLK_DEV_HD is not set @@ -567,101 +659,119 @@ CONFIG_BLK_DEV_IDE_BAST=y # SCSI device support # # CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_TGT=m # CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=m + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_PPA is not set +# CONFIG_SCSI_IMM is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_DEBUG is not set # CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# +CONFIG_HAVE_PATA_PLATFORM=y # CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# ARCnet devices -# +# CONFIG_VETH is not set # CONFIG_ARCNET is not set - -# -# PHY device support -# # CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y CONFIG_MII=y +# CONFIG_AX88796 is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_SMC91X is not set CONFIG_DM9000=y +# CONFIG_ENC28J60 is not set +CONFIG_DM9000_DEBUGLEVEL=4 # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_AT1700 is not set # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set # CONFIG_NET_PCI is not set +# CONFIG_B44 is not set # CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# +CONFIG_NETDEV_1000=y +# CONFIG_E1000E_ENABLED is not set +CONFIG_NETDEV_10000=y # CONFIG_TR is not set # -# Wireless LAN (non-hamradio) +# Wireless LAN # -# CONFIG_NET_RADIO is not set +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # -# Wan interfaces +# USB Network Adapters # +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set # CONFIG_WAN is not set # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set # @@ -669,6 +779,7 @@ CONFIG_DM9000=y # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces @@ -678,7 +789,6 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -695,12 +805,21 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_GPIO is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set # CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set # CONFIG_MOUSE_INPORT is not set # CONFIG_MOUSE_LOGIBM is not set # CONFIG_MOUSE_PC110PAD is not set # CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_MOUSE_GPIO is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -721,6 +840,7 @@ CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y CONFIG_SERIAL_NONSTANDARD=y # CONFIG_COMPUTONE is not set # CONFIG_ROCKETPORT is not set @@ -728,8 +848,6 @@ CONFIG_SERIAL_NONSTANDARD=y # CONFIG_DIGIEPCA is not set # CONFIG_MOXA_INTELLIO is not set # CONFIG_MOXA_SMARTIO is not set -# CONFIG_MOXA_SMARTIO_NEW is not set -# CONFIG_SYNCLINKMP is not set # CONFIG_N_HDLC is not set # CONFIG_RISCOM8 is not set # CONFIG_SPECIALIX is not set @@ -758,8 +876,12 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y # # Non-8250 serial port support # +CONFIG_SERIAL_SAMSUNG=y +# CONFIG_SERIAL_SAMSUNG_DEBUG is not set +CONFIG_SERIAL_SAMSUNG_CONSOLE=y CONFIG_SERIAL_S3C2410=y -CONFIG_SERIAL_S3C2410_CONSOLE=y +CONFIG_SERIAL_S3C2412=y +CONFIG_SERIAL_S3C2440=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y @@ -768,89 +890,50 @@ CONFIG_LEGACY_PTY_COUNT=256 CONFIG_PRINTER=y # CONFIG_LP_CONSOLE is not set CONFIG_PPDEV=y -# CONFIG_TIPAR is not set - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_S3C2410_WATCHDOG=y - -# -# ISA-based Watchdog Cards -# -# CONFIG_PCWATCHDOG is not set -# CONFIG_MIXCOMWD is not set -# CONFIG_WDT is not set - -# -# USB-based Watchdog Cards -# -# CONFIG_USBPCWATCHDOG is not set CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set - -# -# I2C support -# +CONFIG_DEVPORT=y CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=m - -# -# I2C Algorithms -# -CONFIG_I2C_ALGOBIT=m -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set +CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support # # CONFIG_I2C_ELEKTOR is not set +# CONFIG_I2C_GPIO is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set CONFIG_I2C_S3C2410=y +CONFIG_I2C_SIMTEC=y +# CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set # CONFIG_I2C_PCA_ISA is not set +# CONFIG_I2C_PCA_PLATFORM is not set # # Miscellaneous I2C Chip support # -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set +# CONFIG_DS1682 is not set CONFIG_SENSORS_EEPROM=m # CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set # CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set - -# -# SPI support -# CONFIG_SPI=y # CONFIG_SPI_DEBUG is not set CONFIG_SPI_MASTER=y @@ -860,6 +943,7 @@ CONFIG_SPI_MASTER=y # CONFIG_SPI_BITBANG=m # CONFIG_SPI_BUTTERFLY is not set +# CONFIG_SPI_LM70_LLP is not set CONFIG_SPI_S3C24XX=m CONFIG_SPI_S3C24XX_GPIO=m @@ -867,30 +951,43 @@ CONFIG_SPI_S3C24XX_GPIO=m # SPI Protocol Masters # # CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_HAVE_GPIO_LIB=y # -# Dallas's 1-wire bus +# GPIO Support # -# CONFIG_W1 is not set +# CONFIG_DEBUG_GPIO is not set # -# Hardware Monitoring support +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + # +# SPI GPIO expanders: +# +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set CONFIG_HWMON=y CONFIG_HWMON_VID=m -# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_AD7418 is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set # CONFIG_SENSORS_GL518SM is not set # CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set @@ -905,72 +1002,95 @@ CONFIG_SENSORS_LM85=m # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set # CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set # CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set # CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set # -# Misc devices +# Watchdog Device Drivers # +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_S3C2410_WATCHDOG=y # -# Multifunction device drivers +# ISA-based Watchdog Cards # -# CONFIG_MFD_SM501 is not set +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set # -# LED devices +# USB-based Watchdog Cards # -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=m +# CONFIG_USBPCWATCHDOG is not set # -# LED drivers +# Sonics Silicon Backplane # -CONFIG_LEDS_S3C24XX=m -CONFIG_LEDS_H1940=m +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# LED Triggers +# Multifunction device drivers # -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=m -# CONFIG_LEDS_TRIGGER_IDE_DISK is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_MFD_SM501=y +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # -# Digital Video Broadcasting Devices +# Multimedia drivers # -# CONFIG_DVB is not set -# CONFIG_USB_DABUSB is not set +# CONFIG_DAB is not set # # Graphics support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y CONFIG_FIRMWARE_EDID=y # CONFIG_FB_DDC is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set @@ -978,12 +1098,19 @@ CONFIG_FB_MODE_HELPERS=y # CONFIG_FB_TILEBLITTING is not set # -# Frambuffer hardware drivers +# Frame buffer hardware drivers # # CONFIG_FB_S1D13XXX is not set CONFIG_FB_S3C2410=y # CONFIG_FB_S3C2410_DEBUG is not set +CONFIG_FB_SM501=y # CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -992,40 +1119,45 @@ CONFIG_FB_S3C2410=y # CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set # CONFIG_FONTS is not set CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y - -# -# Logo configuration -# # CONFIG_LOGO is not set # # Sound # # CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set # -# HID Devices +# USB Input Devices # -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set +# CONFIG_USB_HID is not set # -# USB support +# USB HID Boot Protocol drivers # +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y # CONFIG_USB_ARCH_HAS_EHCI is not set CONFIG_USB=y # CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set # # Miscellaneous USB options # CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_SUSPEND is not set # CONFIG_USB_OTG is not set @@ -1033,18 +1165,22 @@ CONFIG_USB_DEVICEFS=y # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set # # USB Device Class drivers # -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1053,57 +1189,78 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # # may also be needed; see USB_STORAGE Help for more information # -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Input Devices -# -# CONFIG_USB_HID is not set - -# -# USB HID Boot Protocol drivers -# -# CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set -# CONFIG_USB_AIPTEK is not set -# CONFIG_USB_WACOM is not set -# CONFIG_USB_ACECAD is not set -# CONFIG_USB_KBTAB is not set -# CONFIG_USB_POWERMATE is not set -# CONFIG_USB_TOUCHSCREEN is not set -# CONFIG_USB_YEALINK is not set -# CONFIG_USB_XPAD is not set -# CONFIG_USB_ATI_REMOTE is not set -# CONFIG_USB_ATI_REMOTE2 is not set -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set -# CONFIG_USB_GTCO is not set +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_LIBUSUAL=y # # USB Imaging devices # # CONFIG_USB_MDC800 is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set -# CONFIG_USB_USBNET is not set +# CONFIG_USB_MICROTEK is not set CONFIG_USB_MON=y # # USB port drivers # # CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -# CONFIG_USB_SERIAL is not set +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CONSOLE is not set +# CONFIG_USB_EZUSB is not set +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_CH341 is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +CONFIG_USB_SERIAL_FTDI_SIO=y +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_MOTOROLA is not set +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=y +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +CONFIG_USB_SERIAL_OPTION=m +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set # # USB Miscellaneous drivers @@ -1116,35 +1273,38 @@ CONFIG_USB_MON=y # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set # CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set +CONFIG_USB_LED=m # CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set # CONFIG_USB_PHIDGET is not set # CONFIG_USB_IDMOUSE is not set # CONFIG_USB_FTDI_ELAN is not set # CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set +CONFIG_USB_LD=m # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# +# CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m # -# MMC/SD Card support +# LED drivers # -# CONFIG_MMC is not set +CONFIG_LEDS_S3C24XX=m +CONFIG_LEDS_H1940=m +# CONFIG_LEDS_GPIO is not set # -# Real Time Clock +# LED Triggers # +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -1158,61 +1318,86 @@ CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # -# RTC drivers +# I2C RTC drivers # -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_DS1374 is not set # CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set # CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set # CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -CONFIG_RTC_DRV_S3C=y + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_TEST is not set -# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_M48T59 is not set # CONFIG_RTC_DRV_V3020 is not set +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_S3C=y +# CONFIG_UIO is not set + # # File systems # CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set +CONFIG_EXT3_FS_POSIX_ACL=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set +CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -CONFIG_ROMFS_FS=y +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y # # CD-ROM/DVD Filesystems # -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +# CONFIG_ZISOFS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y # # DOS/FAT/NT Filesystems @@ -1222,7 +1407,9 @@ CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set +CONFIG_NTFS_FS=m +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set # # Pseudo filesystems @@ -1230,10 +1417,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y -# CONFIG_TMPFS is not set +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set +CONFIG_CONFIGFS_FS=m # # Miscellaneous filesystems @@ -1248,31 +1435,32 @@ CONFIG_RAMFS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y # CONFIG_JFFS2_FS_XATTR is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1280,7 +1468,6 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types @@ -1302,94 +1489,93 @@ CONFIG_SOLARIS_X86_PARTITION=y # CONFIG_SUN_PARTITION is not set # CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Distributed Lock Manager -# +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m # CONFIG_DLM is not set -# -# Profiling support -# -# CONFIG_PROFILING is not set - # # Kernel hacking # # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set -CONFIG_LOG_BUF_SHIFT=16 CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y -CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set CONFIG_DEBUG_USER=y -# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set CONFIG_DEBUG_S3C_PORT=y @@ -1400,21 +1586,100 @@ CONFIG_DEBUG_S3C_UART=0 # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=m +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=m +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # -# Cryptographic options +# Compression # -# CONFIG_CRYPTO is not set +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y # # Library routines # CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=m CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y CONFIG_HAS_IOMEM=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/sam9_l9260_defconfig b/arch/arm/configs/sam9_l9260_defconfig index 484dc9739dfcd9aefe6acfb5d43a73b2eb9dfa3e..8688362bcf7b18ffb7525954c4a34112dccf6db9 100644 --- a/arch/arm/configs/sam9_l9260_defconfig +++ b/arch/arm/configs/sam9_l9260_defconfig @@ -211,7 +211,6 @@ CONFIG_ARM_THUMB=y # # CONFIG_TICK_ONESHOT is not set CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/spitz_defconfig b/arch/arm/configs/spitz_defconfig index aa7a011795006fad2a2d624453d38595f933ec12..7d59fb1f1ceaa523bfc3433b6d1498d9d67b0e94 100644 --- a/arch/arm/configs/spitz_defconfig +++ b/arch/arm/configs/spitz_defconfig @@ -164,7 +164,6 @@ CONFIG_PCMCIA_PXA2XX=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig index 576b8339f0d632f91b2b8e6ef508b51344add228..07dfb98df4f0798da3b02a9497c0a32b081ff3be 100644 --- a/arch/arm/configs/tct_hammer_defconfig +++ b/arch/arm/configs/tct_hammer_defconfig @@ -247,7 +247,6 @@ CONFIG_ARM_THUMB=y # # CONFIG_TICK_ONESHOT is not set # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=200 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig index 6db6392806f9a507ff9a0d24f62c7d2dd190ad11..8b7a431a8bfc6c2ac26586843eed1d7c3d4e1e5f 100644 --- a/arch/arm/configs/trizeps4_defconfig +++ b/arch/arm/configs/trizeps4_defconfig @@ -195,7 +195,6 @@ CONFIG_PCMCIA_PXA2XX=y # Kernel Features # CONFIG_PREEMPT=y -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y diff --git a/arch/arm/configs/usb-a9260_defconfig b/arch/arm/configs/usb-a9260_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..3680bd2df26d8ad65536d80131ef8b4e024fdf8a --- /dev/null +++ b/arch/arm/configs/usb-a9260_defconfig @@ -0,0 +1,1142 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24 +# Tue Apr 15 11:39:35 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +CONFIG_ARCH_AT91SAM9260=y +# CONFIG_ARCH_AT91SAM9261 is not set +# CONFIG_ARCH_AT91SAM9263 is not set +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9260 Variants +# +# CONFIG_ARCH_AT91SAM9260_SAM9XE is not set + +# +# AT91SAM9260 / AT91SAM9XE Board Type +# +# CONFIG_MACH_AT91SAM9260EK is not set +# CONFIG_MACH_CAM60 is not set +# CONFIG_MACH_SAM9_L9260 is not set +CONFIG_MACH_USB_A9260=y +# CONFIG_MACH_QIL_A9260 is not set + +# +# AT91 Board Options +# + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set +CONFIG_AT91_SLOW_CLOCK=y +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_SUSPEND=y +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_PERSIST is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_INSTRUMENTATION is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_ECB is not set +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/usb-a9263_defconfig b/arch/arm/configs/usb-a9263_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..48d455bc73631394c70934f7a9697091f4d2662a --- /dev/null +++ b/arch/arm/configs/usb-a9263_defconfig @@ -0,0 +1,1134 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24 +# Tue Apr 15 11:15:19 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED is not set +# CONFIG_RELAY is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARCH_AT91=y +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Atmel AT91 System-on-Chip +# +# CONFIG_ARCH_AT91RM9200 is not set +# CONFIG_ARCH_AT91SAM9260 is not set +# CONFIG_ARCH_AT91SAM9261 is not set +CONFIG_ARCH_AT91SAM9263=y +# CONFIG_ARCH_AT91SAM9RL is not set +# CONFIG_ARCH_AT91CAP9 is not set +# CONFIG_ARCH_AT91X40 is not set +CONFIG_AT91_PMC_UNIT=y + +# +# AT91SAM9263 Board Type +# +# CONFIG_MACH_AT91SAM9263EK is not set +CONFIG_MACH_USB_A9263=y + +# +# AT91 Board Options +# + +# +# AT91 Feature Selections +# +# CONFIG_AT91_PROGRAMMABLE_CLOCKS is not set +CONFIG_AT91_SLOW_CLOCK=y +CONFIG_AT91_TIMER_HZ=100 +CONFIG_AT91_EARLY_DBGU=y +# CONFIG_AT91_EARLY_USART0 is not set +# CONFIG_AT91_EARLY_USART1 is not set +# CONFIG_AT91_EARLY_USART2 is not set +# CONFIG_AT91_EARLY_USART3 is not set +# CONFIG_AT91_EARLY_USART4 is not set +# CONFIG_AT91_EARLY_USART5 is not set + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +# CONFIG_OUTER_CACHE is not set + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +# CONFIG_LEDS is not set +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="mem=64M console=ttyS0,115200" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y +CONFIG_SUSPEND=y +# CONFIG_APM_EMULATION is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_DHCP is not set +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +CONFIG_MTD_DATAFLASH=y +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_AT91=y +CONFIG_MTD_NAND_AT91_ECC_SOFT=y +# CONFIG_MTD_NAND_AT91_ECC_HW is not set +# CONFIG_MTD_NAND_AT91_ECC_NONE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +CONFIG_MACB=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_ATMEL=y +CONFIG_SERIAL_ATMEL_CONSOLE=y +# CONFIG_SERIAL_ATMEL_TTYAT is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_PERSIST is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_S3C2410 is not set +CONFIG_USB_GADGET_AT91=y +CONFIG_USB_AT91=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_MMC is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +CONFIG_LEDS_GPIO=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set +# CONFIG_INSTRUMENTATION is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_ERRORS is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_ECB is not set +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/configs/versatile_defconfig b/arch/arm/configs/versatile_defconfig index 48dca69addae8608fc2aea9c40d62f441351f2d3..8355f88f72926b83cc25c106f597ce967bc3e3a9 100644 --- a/arch/arm/configs/versatile_defconfig +++ b/arch/arm/configs/versatile_defconfig @@ -151,7 +151,6 @@ CONFIG_ARM_AMBA=y # Kernel Features # # CONFIG_PREEMPT is not set -# CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 # CONFIG_AEABI is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set diff --git a/arch/arm/configs/xm_x270_defconfig b/arch/arm/configs/xm_x270_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..aa40d91ce5994adf39b1656661cad922c5706bf7 --- /dev/null +++ b/arch/arm/configs/xm_x270_defconfig @@ -0,0 +1,1741 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.25 +# Sun May 11 15:12:52 2008 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ZONE_DMA=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +# CONFIG_VM_EVENT_COUNTERS is not set +# CONFIG_SLUB_DEBUG is not set +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System Type +# +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_MSM7X00A is not set +CONFIG_DMABOUNCE=y + +# +# Intel PXA2xx/PXA3xx Implementations +# + +# +# Select target boards +# +# CONFIG_ARCH_GUMSTIX is not set +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +# CONFIG_ARCH_PXA_ESERIES is not set +# CONFIG_MACH_TRIZEPS4 is not set +CONFIG_MACH_EM_X270=y +# CONFIG_MACH_COLIBRI is not set +# CONFIG_MACH_ZYLONITE is not set +# CONFIG_MACH_LITTLETON is not set +CONFIG_MACH_ARMCORE=y +# CONFIG_MACH_MAGICIAN is not set +# CONFIG_MACH_PCM027 is not set +CONFIG_PXA27x=y +# CONFIG_PXA_PWM is not set + +# +# Boot options +# + +# +# Power management +# + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +CONFIG_PCI=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCI_HOST_ITE8152=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +CONFIG_PCCARD=m +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=m +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=m +# CONFIG_YENTA_O2 is not set +# CONFIG_YENTA_RICOH is not set +CONFIG_YENTA_TI=y +# CONFIG_YENTA_ENE_TUNE is not set +# CONFIG_YENTA_TOSHIBA is not set +# CONFIG_PD6729 is not set +# CONFIG_I82092 is not set +CONFIG_PCMCIA_PXA2XX=m +CONFIG_PCCARD_NONSTATIC=m + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_PREEMPT is not set +CONFIG_HZ=100 +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="root=1f03 mem=32M" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_APM_EMULATION=m +CONFIG_ARCH_SUSPEND_POSSIBLE=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +# CONFIG_INET_DIAG is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +# CONFIG_BT_RFCOMM_TTY is not set +CONFIG_BT_BNEP=m +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +# CONFIG_BT_HCIBTSDIO is not set +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIDTL1 is not set +# CONFIG_BT_HCIBT3C is not set +# CONFIG_BT_HCIBLUECARD is not set +# CONFIG_BT_HCIBTUART is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=m +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_XIP is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +CONFIG_MTD_PXA2XX=y +# CONFIG_MTD_ARM_INTEGRATOR is not set +# CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_SHARPSL is not set +# CONFIG_MTD_NAND_CAFE is not set +CONFIG_MTD_NAND_CM_X270=y +# CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_NAND_PLATFORM=y +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +CONFIG_PATA_PCMCIA=m +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +CONFIG_DM9000=y +CONFIG_DM9000_DEBUGLEVEL=1 +# CONFIG_SMC911X is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y +# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +CONFIG_LIBERTAS=m +# CONFIG_LIBERTAS_USB is not set +# CONFIG_LIBERTAS_CS is not set +CONFIG_LIBERTAS_SDIO=m +# CONFIG_LIBERTAS_DEBUG is not set +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_HOSTAP is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_NET_PCMCIA is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_BSDCOMP=m +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +# CONFIG_INPUT_APMPOWER is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_KEYBOARD_PXA27x=m +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_UCB1400=m +CONFIG_TOUCHSCREEN_WM97XX=m +# CONFIG_TOUCHSCREEN_WM9705 is not set +CONFIG_TOUCHSCREEN_WM9712=y +# CONFIG_TOUCHSCREEN_WM9713 is not set +# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=16 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +CONFIG_I2C_PXA=y +# CONFIG_I2C_PXA_SLAVE is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# +# CONFIG_DEBUG_GPIO is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +CONFIG_FB_PXA=y +# CONFIG_FB_PXA_SMARTPANEL is not set +CONFIG_FB_PXA_PARAMETERS=y +CONFIG_FB_MBX=m +# CONFIG_FB_AM200EPD is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +CONFIG_SOUND=m + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=m +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +# CONFIG_SND_AC97_POWER_SAVE is not set + +# +# ALSA ARM devices +# +CONFIG_SND_PXA2XX_PCM=m +CONFIG_SND_PXA2XX_AC97=m + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_GADGET is not set +CONFIG_MMC=m +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set + +# +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=m +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_PXA=m +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_TIFM_SD is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_CM_X270=y + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +CONFIG_RTC_DRV_V3020=y + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_SA1100=y +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +CONFIG_JFFS2_SUMMARY=y +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +# CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=m +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=m +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=0 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +# CONFIG_DETECT_SOFTLOCKUP is not set +# CONFIG_SCHED_DEBUG is not set +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_USER=y +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_LL=y +# CONFIG_DEBUG_ICEDCC is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index ad455ff5aebe5379841cede6d11ae29c504b8841..1d296fc8494e01f7f33a8cac97855506727f3e46 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@ -4,6 +4,10 @@ AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET) +ifdef CONFIG_DYNAMIC_FTRACE +CFLAGS_REMOVE_ftrace.o = -pg +endif + # Object file lists. obj-y := compat.o entry-armv.o entry-common.o irq.o \ @@ -18,11 +22,13 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o obj-$(CONFIG_ATAGS_PROC) += atags.o obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o obj-$(CONFIG_ARM_THUMBEE) += thumbee.o +obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 688b7b1ee416c54987239740680ffbd29fdeb3b0..cc7b246e9652033d9593006f2821f99aad102fe3 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -18,6 +18,7 @@ #include #include #include +#include /* * libgcc functions - functions that are used internally by the @@ -181,3 +182,7 @@ EXPORT_SYMBOL(_find_next_bit_be); #endif EXPORT_SYMBOL(copy_page); + +#ifdef CONFIG_FTRACE +EXPORT_SYMBOL(mcount); +#endif diff --git a/arch/arm/kernel/atags.c b/arch/arm/kernel/atags.c index 64c420805e6f4e2b7945cef4bcff38e3c4e2f576..42a1a1415fa6c37ee96b742d4bb3c1bdc9a6542d 100644 --- a/arch/arm/kernel/atags.c +++ b/arch/arm/kernel/atags.c @@ -1,5 +1,4 @@ #include -#include #include #include #include @@ -7,9 +6,8 @@ struct buffer { size_t size; - char *data; + char data[]; }; -static struct buffer tags_buffer; static int read_buffer(char* page, char** start, off_t off, int count, @@ -29,58 +27,57 @@ read_buffer(char* page, char** start, off_t off, int count, return count; } - -static int -create_proc_entries(void) -{ - struct proc_dir_entry* tags_entry; - - tags_entry = create_proc_read_entry("atags", 0400, NULL, read_buffer, &tags_buffer); - if (!tags_entry) - return -ENOMEM; - - return 0; -} - - -static char __initdata atags_copy_buf[KEXEC_BOOT_PARAMS_SIZE]; -static char __initdata *atags_copy; +#define BOOT_PARAMS_SIZE 1536 +static char __initdata atags_copy[BOOT_PARAMS_SIZE]; void __init save_atags(const struct tag *tags) { - atags_copy = atags_copy_buf; - memcpy(atags_copy, tags, KEXEC_BOOT_PARAMS_SIZE); + memcpy(atags_copy, tags, sizeof(atags_copy)); } - static int __init init_atags_procfs(void) { - struct tag *tag; - int error; + /* + * This cannot go into save_atags() because kmalloc and proc don't work + * yet when it is called. + */ + struct proc_dir_entry *tags_entry; + struct tag *tag = (struct tag *)atags_copy; + struct buffer *b; + size_t size; - if (!atags_copy) { - printk(KERN_WARNING "Exporting ATAGs: No saved tags found\n"); - return -EIO; + if (tag->hdr.tag != ATAG_CORE) { + printk(KERN_INFO "No ATAGs?"); + return -EINVAL; } - for (tag = (struct tag *) atags_copy; tag->hdr.size; tag = tag_next(tag)) + for (; tag->hdr.size; tag = tag_next(tag)) ; - tags_buffer.size = ((char *) tag - atags_copy) + sizeof(tag->hdr); - tags_buffer.data = kmalloc(tags_buffer.size, GFP_KERNEL); - if (tags_buffer.data == NULL) - return -ENOMEM; - memcpy(tags_buffer.data, atags_copy, tags_buffer.size); - - error = create_proc_entries(); - if (error) { - printk(KERN_ERR "Exporting ATAGs: not enough memory\n"); - kfree(tags_buffer.data); - tags_buffer.size = 0; - tags_buffer.data = NULL; - } + /* include the terminating ATAG_NONE */ + size = (char *)tag - atags_copy + sizeof(struct tag_header); - return error; -} + WARN_ON(tag->hdr.tag != ATAG_NONE); + + b = kmalloc(sizeof(*b) + size, GFP_KERNEL); + if (!b) + goto nomem; + b->size = size; + memcpy(b->data, atags_copy, size); + + tags_entry = create_proc_read_entry("atags", 0400, + NULL, read_buffer, b); + + if (!tags_entry) + goto nomem; + + return 0; + +nomem: + kfree(b); + printk(KERN_ERR "Exporting ATAGs: not enough memory\n"); + + return -ENOMEM; +} arch_initcall(init_atags_procfs); diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index a53c0aba5c142b53295ca2563785bde904dc72b1..f5cfdabcb87dc8314d488dae8d864ecf4b4ca9e4 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -680,7 +680,7 @@ static int __init ecard_probeirqhw(void) #define IO_EC_MEMC8_BASE 0 #endif -unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) +static unsigned int __ecard_address(ecard_t *ec, card_type_t type, card_speed_t speed) { unsigned long address = 0; int slot = ec->slot_no; @@ -783,7 +783,7 @@ static void ecard_proc_init(void) #define ec_set_resource(ec,nr,st,sz) \ do { \ - (ec)->resource[nr].name = ec->dev.bus_id; \ + (ec)->resource[nr].name = dev_name(&ec->dev); \ (ec)->resource[nr].start = st; \ (ec)->resource[nr].end = (st) + (sz) - 1; \ (ec)->resource[nr].flags = IORESOURCE_MEM; \ @@ -853,8 +853,7 @@ static struct expansion_card *__init ecard_alloc_card(int type, int slot) for (i = 0; i < ECARD_NUM_RESOURCES; i++) { if (ec->resource[i].flags && request_resource(&iomem_resource, &ec->resource[i])) { - printk(KERN_ERR "%s: resource(s) not available\n", - ec->dev.bus_id); + dev_err(&ec->dev, "resource(s) not available\n"); ec->resource[i].end -= ec->resource[i].start; ec->resource[i].start = 0; ec->resource[i].flags = 0; @@ -1002,7 +1001,7 @@ ecard_probe(int slot, card_type_t type) } rc = -ENODEV; - if ((ec->podaddr = ecard_address(ec, type, ECARD_SYNC)) == 0) + if ((ec->podaddr = __ecard_address(ec, type, ECARD_SYNC)) == 0) goto nodev; cid.r_zero = 1; @@ -1141,10 +1140,10 @@ static int ecard_drv_probe(struct device *dev) id = ecard_match_device(drv->id_table, ec); - ecard_claim(ec); + ec->claimed = 1; ret = drv->probe(ec, id); if (ret) - ecard_release(ec); + ec->claimed = 0; return ret; } @@ -1154,7 +1153,7 @@ static int ecard_drv_remove(struct device *dev) struct ecard_driver *drv = ECARD_DRV(dev->driver); drv->remove(ec); - ecard_release(ec); + ec->claimed = 0; /* * Restore the default operations. We ensure that the @@ -1182,7 +1181,7 @@ static void ecard_drv_shutdown(struct device *dev) if (dev->driver) { if (drv->shutdown) drv->shutdown(ec); - ecard_release(ec); + ec->claimed = 0; } /* @@ -1239,7 +1238,6 @@ static int ecard_bus_init(void) postcore_initcall(ecard_bus_init); EXPORT_SYMBOL(ecard_readchunk); -EXPORT_SYMBOL(__ecard_address); EXPORT_SYMBOL(ecard_register_driver); EXPORT_SYMBOL(ecard_remove_driver); EXPORT_SYMBOL(ecard_bus_type); diff --git a/arch/arm/kernel/ecard.h b/arch/arm/kernel/ecard.h index d7c2dacf935ded1b001ea417e4fedcec4c837252..4642d436be2ad1ee28c7e03d5a29e5f5d35a4b67 100644 --- a/arch/arm/kernel/ecard.h +++ b/arch/arm/kernel/ecard.h @@ -54,3 +54,16 @@ struct ex_chunk_dir { #define c_len(x) ((x)->r_len[0]|((x)->r_len[1]<<8)|((x)->r_len[2]<<16)) #define c_start(x) ((x)->r_start) }; + +typedef enum ecard_type { /* Cards address space */ + ECARD_IOC, + ECARD_MEMC, + ECARD_EASI +} card_type_t; + +typedef enum { /* Speed for ECARD_IOC space */ + ECARD_SLOW = 0, + ECARD_MEDIUM = 1, + ECARD_FAST = 2, + ECARD_SYNC = 3 +} card_speed_t; diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 597ed00a08d87e68fa84cb81256179283668d821..84694e88b4289d07d2b952f69a1ff644ca010fb2 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -9,6 +9,7 @@ */ #include +#include #include #include "entry-header.S" @@ -99,6 +100,56 @@ ENTRY(ret_from_fork) #undef CALL #define CALL(x) .long x +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE +ENTRY(mcount) + stmdb sp!, {r0-r3, lr} + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE + + .globl mcount_call +mcount_call: + bl ftrace_stub + ldmia sp!, {r0-r3, pc} + +ENTRY(ftrace_caller) + stmdb sp!, {r0-r3, lr} + ldr r1, [fp, #-4] + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE + + .globl ftrace_call +ftrace_call: + bl ftrace_stub + ldmia sp!, {r0-r3, pc} + +#else + +ENTRY(mcount) + stmdb sp!, {r0-r3, lr} + ldr r0, =ftrace_trace_function + ldr r2, [r0] + adr r0, ftrace_stub + cmp r0, r2 + bne trace + ldmia sp!, {r0-r3, pc} + +trace: + ldr r1, [fp, #-4] + mov r0, lr + sub r0, r0, #MCOUNT_INSN_SIZE + mov lr, pc + mov pc, r2 + ldmia sp!, {r0-r3, pc} + +#endif /* CONFIG_DYNAMIC_FTRACE */ + + .globl ftrace_stub +ftrace_stub: + mov pc, lr + +#endif /* CONFIG_FTRACE */ + /*============================================================================= * SWI handler *----------------------------------------------------------------------------- diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c new file mode 100644 index 0000000000000000000000000000000000000000..76d50e6091bc5694d19a6d9fab0b59284cd311fd --- /dev/null +++ b/arch/arm/kernel/ftrace.c @@ -0,0 +1,116 @@ +/* + * Dynamic function tracing support. + * + * Copyright (C) 2008 Abhishek Sagar + * + * For licencing details, see COPYING. + * + * Defines low-level handling of mcount calls when the kernel + * is compiled with the -pg flag. When using dynamic ftrace, the + * mcount call-sites get patched lazily with NOP till they are + * enabled. All code mutation routines here take effect atomically. + */ + +#include + +#include +#include + +#define PC_OFFSET 8 +#define BL_OPCODE 0xeb000000 +#define BL_OFFSET_MASK 0x00ffffff + +static unsigned long bl_insn; +static const unsigned long NOP = 0xe1a00000; /* mov r0, r0 */ + +unsigned char *ftrace_nop_replace(void) +{ + return (char *)&NOP; +} + +/* construct a branch (BL) instruction to addr */ +unsigned char *ftrace_call_replace(unsigned long pc, unsigned long addr) +{ + long offset; + + offset = (long)addr - (long)(pc + PC_OFFSET); + if (unlikely(offset < -33554432 || offset > 33554428)) { + /* Can't generate branches that far (from ARM ARM). Ftrace + * doesn't generate branches outside of kernel text. + */ + WARN_ON_ONCE(1); + return NULL; + } + offset = (offset >> 2) & BL_OFFSET_MASK; + bl_insn = BL_OPCODE | offset; + return (unsigned char *)&bl_insn; +} + +int ftrace_modify_code(unsigned long pc, unsigned char *old_code, + unsigned char *new_code) +{ + unsigned long err = 0, replaced = 0, old, new; + + old = *(unsigned long *)old_code; + new = *(unsigned long *)new_code; + + __asm__ __volatile__ ( + "1: ldr %1, [%2] \n" + " cmp %1, %4 \n" + "2: streq %3, [%2] \n" + " cmpne %1, %3 \n" + " movne %0, #2 \n" + "3:\n" + + ".section .fixup, \"ax\"\n" + "4: mov %0, #1 \n" + " b 3b \n" + ".previous\n" + + ".section __ex_table, \"a\"\n" + " .long 1b, 4b \n" + " .long 2b, 4b \n" + ".previous\n" + + : "=r"(err), "=r"(replaced) + : "r"(pc), "r"(new), "r"(old), "0"(err), "1"(replaced) + : "memory"); + + if (!err && (replaced == old)) + flush_icache_range(pc, pc + MCOUNT_INSN_SIZE); + + return err; +} + +int ftrace_update_ftrace_func(ftrace_func_t func) +{ + int ret; + unsigned long pc, old; + unsigned char *new; + + pc = (unsigned long)&ftrace_call; + memcpy(&old, &ftrace_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(pc, (unsigned long)func); + ret = ftrace_modify_code(pc, (unsigned char *)&old, new); + return ret; +} + +int ftrace_mcount_set(unsigned long *data) +{ + unsigned long pc, old; + unsigned long *addr = data; + unsigned char *new; + + pc = (unsigned long)&mcount_call; + memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(pc, *addr); + *addr = ftrace_modify_code(pc, (unsigned char *)&old, new); + return 0; +} + +/* run from kstop_machine */ +int __init ftrace_dyn_arch_init(void *data) +{ + ftrace_mcount_set(data); + return 0; +} diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c new file mode 100644 index 0000000000000000000000000000000000000000..aaffaecffcd13699dfd0cd51d2eaf61608e4a94d --- /dev/null +++ b/arch/arm/kernel/kgdb.c @@ -0,0 +1,201 @@ +/* + * arch/arm/kernel/kgdb.c + * + * ARM KGDB support + * + * Copyright (c) 2002-2004 MontaVista Software, Inc + * Copyright (c) 2008 Wind River Systems, Inc. + * + * Authors: George Davis + * Deepak Saxena + */ +#include +#include + +/* Make a local copy of the registers passed into the handler (bletch) */ +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *kernel_regs) +{ + int regno; + + /* Initialize all to zero. */ + for (regno = 0; regno < GDB_MAX_REGS; regno++) + gdb_regs[regno] = 0; + + gdb_regs[_R0] = kernel_regs->ARM_r0; + gdb_regs[_R1] = kernel_regs->ARM_r1; + gdb_regs[_R2] = kernel_regs->ARM_r2; + gdb_regs[_R3] = kernel_regs->ARM_r3; + gdb_regs[_R4] = kernel_regs->ARM_r4; + gdb_regs[_R5] = kernel_regs->ARM_r5; + gdb_regs[_R6] = kernel_regs->ARM_r6; + gdb_regs[_R7] = kernel_regs->ARM_r7; + gdb_regs[_R8] = kernel_regs->ARM_r8; + gdb_regs[_R9] = kernel_regs->ARM_r9; + gdb_regs[_R10] = kernel_regs->ARM_r10; + gdb_regs[_FP] = kernel_regs->ARM_fp; + gdb_regs[_IP] = kernel_regs->ARM_ip; + gdb_regs[_SPT] = kernel_regs->ARM_sp; + gdb_regs[_LR] = kernel_regs->ARM_lr; + gdb_regs[_PC] = kernel_regs->ARM_pc; + gdb_regs[_CPSR] = kernel_regs->ARM_cpsr; +} + +/* Copy local gdb registers back to kgdb regs, for later copy to kernel */ +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *kernel_regs) +{ + kernel_regs->ARM_r0 = gdb_regs[_R0]; + kernel_regs->ARM_r1 = gdb_regs[_R1]; + kernel_regs->ARM_r2 = gdb_regs[_R2]; + kernel_regs->ARM_r3 = gdb_regs[_R3]; + kernel_regs->ARM_r4 = gdb_regs[_R4]; + kernel_regs->ARM_r5 = gdb_regs[_R5]; + kernel_regs->ARM_r6 = gdb_regs[_R6]; + kernel_regs->ARM_r7 = gdb_regs[_R7]; + kernel_regs->ARM_r8 = gdb_regs[_R8]; + kernel_regs->ARM_r9 = gdb_regs[_R9]; + kernel_regs->ARM_r10 = gdb_regs[_R10]; + kernel_regs->ARM_fp = gdb_regs[_FP]; + kernel_regs->ARM_ip = gdb_regs[_IP]; + kernel_regs->ARM_sp = gdb_regs[_SPT]; + kernel_regs->ARM_lr = gdb_regs[_LR]; + kernel_regs->ARM_pc = gdb_regs[_PC]; + kernel_regs->ARM_cpsr = gdb_regs[_CPSR]; +} + +void +sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task) +{ + struct pt_regs *thread_regs; + int regno; + + /* Just making sure... */ + if (task == NULL) + return; + + /* Initialize to zero */ + for (regno = 0; regno < GDB_MAX_REGS; regno++) + gdb_regs[regno] = 0; + + /* Otherwise, we have only some registers from switch_to() */ + thread_regs = task_pt_regs(task); + gdb_regs[_R0] = thread_regs->ARM_r0; + gdb_regs[_R1] = thread_regs->ARM_r1; + gdb_regs[_R2] = thread_regs->ARM_r2; + gdb_regs[_R3] = thread_regs->ARM_r3; + gdb_regs[_R4] = thread_regs->ARM_r4; + gdb_regs[_R5] = thread_regs->ARM_r5; + gdb_regs[_R6] = thread_regs->ARM_r6; + gdb_regs[_R7] = thread_regs->ARM_r7; + gdb_regs[_R8] = thread_regs->ARM_r8; + gdb_regs[_R9] = thread_regs->ARM_r9; + gdb_regs[_R10] = thread_regs->ARM_r10; + gdb_regs[_FP] = thread_regs->ARM_fp; + gdb_regs[_IP] = thread_regs->ARM_ip; + gdb_regs[_SPT] = thread_regs->ARM_sp; + gdb_regs[_LR] = thread_regs->ARM_lr; + gdb_regs[_PC] = thread_regs->ARM_pc; + gdb_regs[_CPSR] = thread_regs->ARM_cpsr; +} + +static int compiled_break; + +int kgdb_arch_handle_exception(int exception_vector, int signo, + int err_code, char *remcom_in_buffer, + char *remcom_out_buffer, + struct pt_regs *linux_regs) +{ + unsigned long addr; + char *ptr; + + switch (remcom_in_buffer[0]) { + case 'D': + case 'k': + case 'c': + kgdb_contthread = NULL; + + /* + * Try to read optional parameter, pc unchanged if no parm. + * If this was a compiled breakpoint, we need to move + * to the next instruction or we will just breakpoint + * over and over again. + */ + ptr = &remcom_in_buffer[1]; + if (kgdb_hex2long(&ptr, &addr)) + linux_regs->ARM_pc = addr; + else if (compiled_break == 1) + linux_regs->ARM_pc += 4; + + compiled_break = 0; + + return 0; + } + + return -1; +} + +static int kgdb_brk_fn(struct pt_regs *regs, unsigned int instr) +{ + kgdb_handle_exception(1, SIGTRAP, 0, regs); + + return 0; +} + +static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int instr) +{ + compiled_break = 1; + kgdb_handle_exception(1, SIGTRAP, 0, regs); + + return 0; +} + +static struct undef_hook kgdb_brkpt_hook = { + .instr_mask = 0xffffffff, + .instr_val = KGDB_BREAKINST, + .fn = kgdb_brk_fn +}; + +static struct undef_hook kgdb_compiled_brkpt_hook = { + .instr_mask = 0xffffffff, + .instr_val = KGDB_COMPILED_BREAK, + .fn = kgdb_compiled_brk_fn +}; + +/** + * kgdb_arch_init - Perform any architecture specific initalization. + * + * This function will handle the initalization of any architecture + * specific callbacks. + */ +int kgdb_arch_init(void) +{ + register_undef_hook(&kgdb_brkpt_hook); + register_undef_hook(&kgdb_compiled_brkpt_hook); + + return 0; +} + +/** + * kgdb_arch_exit - Perform any architecture specific uninitalization. + * + * This function will handle the uninitalization of any architecture + * specific callbacks, for dynamic registration and unregistration. + */ +void kgdb_arch_exit(void) +{ + unregister_undef_hook(&kgdb_brkpt_hook); + unregister_undef_hook(&kgdb_compiled_brkpt_hook); +} + +/* + * Register our undef instruction hooks with ARM undef core. + * We regsiter a hook specifically looking for the KGB break inst + * and we handle the normal undef case within the do_undefinstr + * handler. + */ +struct kgdb_arch arch_kgdb_ops = { +#ifndef __ARMEB__ + .gdb_bpt_instr = {0xfe, 0xde, 0xff, 0xe7} +#else /* ! __ARMEB__ */ + .gdb_bpt_instr = {0xe7, 0xff, 0xde, 0xfe} +#endif +}; diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c index 5593dd207216bd0d2d1d8319eb8ab06e2bc13714..d28513f14d05906cec08a849128f76edaaf5ad16 100644 --- a/arch/arm/kernel/kprobes.c +++ b/arch/arm/kernel/kprobes.c @@ -274,7 +274,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, * for kretprobe handlers which should normally be interested in r0 only * anyway. */ -static void __attribute__((naked)) __kprobes kretprobe_trampoline(void) +void __naked __kprobes kretprobe_trampoline(void) { __asm__ __volatile__ ( "stmdb sp!, {r0 - r11} \n\t" @@ -296,8 +296,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs) unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; INIT_HLIST_HEAD(&empty_rp); - spin_lock_irqsave(&kretprobe_lock, flags); - head = kretprobe_inst_table_head(current); + kretprobe_hash_lock(current, &head, &flags); /* * It is possible to have multiple instances associated with a given @@ -337,7 +336,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs) } kretprobe_assert(ri, orig_ret_address, trampoline_address); - spin_unlock_irqrestore(&kretprobe_lock, flags); + kretprobe_hash_unlock(current, &flags); hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { hlist_del(&ri->hlist); @@ -347,7 +346,6 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs) return (void *)orig_ret_address; } -/* Called with kretprobe_lock held. */ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs) { diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 79b7e5cf5416cff90059fd145ca6a2c76d253011..a68259a0cccdb54ac3dd06cb3e5248b9b0904cd8 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 46bf2ede612840b84eb3f7994c4cc85ae0d4c076..89bfded70a1f480ced698568a9d5fd685c48a17b 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -133,10 +133,8 @@ static void default_idle(void) cpu_relax(); else { local_irq_disable(); - if (!need_resched()) { - timer_dyn_reprogram(); + if (!need_resched()) arch_idle(); - } local_irq_enable(); } } @@ -164,7 +162,7 @@ void cpu_idle(void) if (!idle) idle = default_idle; leds_event(led_idle_start); - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched()) idle(); leds_event(led_idle_end); diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index b7b0720bc1bbe8295ea3ca7b2849e4a5ad875bf2..38f0e7940a132b1c9e0458bc10e9d1dc3f2401ee 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -36,6 +36,7 @@ #include #include #include +#include #include "compat.h" #include "atags.h" @@ -853,6 +854,7 @@ void __init setup_arch(char **cmdline_p) conswitchp = &dummy_con; #endif #endif + early_trap_init(); } diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index eefae1de334cabbb94ec07e0c85d2ac01795282f..5a7c09564d134cfdb8935f642e691de3f29b82c3 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -68,20 +68,10 @@ enum ipi_msg_type { IPI_TIMER, IPI_RESCHEDULE, IPI_CALL_FUNC, + IPI_CALL_FUNC_SINGLE, IPI_CPU_STOP, }; -struct smp_call_struct { - void (*func)(void *info); - void *info; - int wait; - cpumask_t pending; - cpumask_t unfinished; -}; - -static struct smp_call_struct * volatile smp_call_function_data; -static DEFINE_SPINLOCK(smp_call_function_lock); - int __cpuinit __cpu_up(unsigned int cpu) { struct cpuinfo_arm *ci = &per_cpu(cpu_data, cpu); @@ -366,114 +356,15 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg) local_irq_restore(flags); } -/* - * You must not call this function with disabled interrupts, from a - * hardware interrupt handler, nor from a bottom half handler. - */ -static int smp_call_function_on_cpu(void (*func)(void *info), void *info, - int retry, int wait, cpumask_t callmap) -{ - struct smp_call_struct data; - unsigned long timeout; - int ret = 0; - - data.func = func; - data.info = info; - data.wait = wait; - - cpu_clear(smp_processor_id(), callmap); - if (cpus_empty(callmap)) - goto out; - - data.pending = callmap; - if (wait) - data.unfinished = callmap; - - /* - * try to get the mutex on smp_call_function_data - */ - spin_lock(&smp_call_function_lock); - smp_call_function_data = &data; - - send_ipi_message(callmap, IPI_CALL_FUNC); - - timeout = jiffies + HZ; - while (!cpus_empty(data.pending) && time_before(jiffies, timeout)) - barrier(); - - /* - * did we time out? - */ - if (!cpus_empty(data.pending)) { - /* - * this may be causing our panic - report it - */ - printk(KERN_CRIT - "CPU%u: smp_call_function timeout for %p(%p)\n" - " callmap %lx pending %lx, %swait\n", - smp_processor_id(), func, info, *cpus_addr(callmap), - *cpus_addr(data.pending), wait ? "" : "no "); - - /* - * TRACE - */ - timeout = jiffies + (5 * HZ); - while (!cpus_empty(data.pending) && time_before(jiffies, timeout)) - barrier(); - - if (cpus_empty(data.pending)) - printk(KERN_CRIT " RESOLVED\n"); - else - printk(KERN_CRIT " STILL STUCK\n"); - } - - /* - * whatever happened, we're done with the data, so release it - */ - smp_call_function_data = NULL; - spin_unlock(&smp_call_function_lock); - - if (!cpus_empty(data.pending)) { - ret = -ETIMEDOUT; - goto out; - } - - if (wait) - while (!cpus_empty(data.unfinished)) - barrier(); - out: - - return 0; -} - -int smp_call_function(void (*func)(void *info), void *info, int retry, - int wait) +void arch_send_call_function_ipi(cpumask_t mask) { - return smp_call_function_on_cpu(func, info, retry, wait, - cpu_online_map); + send_ipi_message(mask, IPI_CALL_FUNC); } -EXPORT_SYMBOL_GPL(smp_call_function); -int smp_call_function_single(int cpu, void (*func)(void *info), void *info, - int retry, int wait) +void arch_send_call_function_single_ipi(int cpu) { - /* prevent preemption and reschedule on another processor */ - int current_cpu = get_cpu(); - int ret = 0; - - if (cpu == current_cpu) { - local_irq_disable(); - func(info); - local_irq_enable(); - } else - ret = smp_call_function_on_cpu(func, info, retry, wait, - cpumask_of_cpu(cpu)); - - put_cpu(); - - return ret; + send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE); } -EXPORT_SYMBOL_GPL(smp_call_function_single); void show_ipi_list(struct seq_file *p) { @@ -521,27 +412,6 @@ asmlinkage void __exception do_local_timer(struct pt_regs *regs) } #endif -/* - * ipi_call_function - handle IPI from smp_call_function() - * - * Note that we copy data out of the cross-call structure and then - * let the caller know that we're here and have done with their data - */ -static void ipi_call_function(unsigned int cpu) -{ - struct smp_call_struct *data = smp_call_function_data; - void (*func)(void *info) = data->func; - void *info = data->info; - int wait = data->wait; - - cpu_clear(cpu, data->pending); - - func(info); - - if (wait) - cpu_clear(cpu, data->unfinished); -} - static DEFINE_SPINLOCK(stop_lock); /* @@ -611,7 +481,11 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs) break; case IPI_CALL_FUNC: - ipi_call_function(cpu); + generic_smp_call_function_interrupt(); + break; + + case IPI_CALL_FUNC_SINGLE: + generic_smp_call_function_single_interrupt(); break; case IPI_CPU_STOP: @@ -662,14 +536,13 @@ int setup_profiling_timer(unsigned int multiplier) } static int -on_each_cpu_mask(void (*func)(void *), void *info, int retry, int wait, - cpumask_t mask) +on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask) { int ret = 0; preempt_disable(); - ret = smp_call_function_on_cpu(func, info, retry, wait, mask); + ret = smp_call_function_mask(mask, func, info, wait); if (cpu_isset(smp_processor_id(), mask)) func(info); @@ -731,14 +604,14 @@ static inline void ipi_flush_tlb_kernel_range(void *arg) void flush_tlb_all(void) { - on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1); + on_each_cpu(ipi_flush_tlb_all, NULL, 1); } void flush_tlb_mm(struct mm_struct *mm) { cpumask_t mask = mm->cpu_vm_mask; - on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask); } void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) @@ -749,7 +622,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) ta.ta_vma = vma; ta.ta_start = uaddr; - on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask); } void flush_tlb_kernel_page(unsigned long kaddr) @@ -758,7 +631,7 @@ void flush_tlb_kernel_page(unsigned long kaddr) ta.ta_start = kaddr; - on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1, 1); + on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1); } void flush_tlb_range(struct vm_area_struct *vma, @@ -771,7 +644,7 @@ void flush_tlb_range(struct vm_area_struct *vma, ta.ta_start = start; ta.ta_end = end; - on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, 1, mask); + on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask); } void flush_tlb_kernel_range(unsigned long start, unsigned long end) @@ -781,5 +654,5 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) ta.ta_start = start; ta.ta_end = end; - on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1, 1); + on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1); } diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index ae31deb2d0653a6a8fe57b000fb2827de9acdf13..fc650f64df43ce00a83ad9f22e33e26b266d76ce 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -36,6 +36,7 @@ EXPORT_SYMBOL(walk_stackframe); #ifdef CONFIG_STACKTRACE struct stack_trace_data { struct stack_trace *trace; + unsigned int no_sched_functions; unsigned int skip; }; @@ -43,27 +44,53 @@ static int save_trace(struct stackframe *frame, void *d) { struct stack_trace_data *data = d; struct stack_trace *trace = data->trace; + unsigned long addr = frame->lr; + if (data->no_sched_functions && in_sched_functions(addr)) + return 0; if (data->skip) { data->skip--; return 0; } - trace->entries[trace->nr_entries++] = frame->lr; + trace->entries[trace->nr_entries++] = addr; return trace->nr_entries >= trace->max_entries; } -void save_stack_trace(struct stack_trace *trace) +void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) { struct stack_trace_data data; unsigned long fp, base; data.trace = trace; data.skip = trace->skip; - base = (unsigned long)task_stack_page(current); - asm("mov %0, fp" : "=r" (fp)); + base = (unsigned long)task_stack_page(tsk); + + if (tsk != current) { +#ifdef CONFIG_SMP + /* + * What guarantees do we have here that 'tsk' + * is not running on another CPU? + */ + BUG(); +#else + data.no_sched_functions = 1; + fp = thread_saved_fp(tsk); +#endif + } else { + data.no_sched_functions = 0; + asm("mov %0, fp" : "=r" (fp)); + } walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); + if (trace->nr_entries < trace->max_entries) + trace->entries[trace->nr_entries++] = ULONG_MAX; +} + +void save_stack_trace(struct stack_trace *trace) +{ + save_stack_trace_tsk(current, trace); } +EXPORT_SYMBOL_GPL(save_stack_trace); #endif diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index b5867eca1d0bed94548a1582445a12979c1fc86d..368d171754cf309acfabb1714f4b4dd915790086 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -130,7 +130,9 @@ static const struct leds_evt_name evt_names[] = { { "red", led_red_on, led_red_off }, }; -static ssize_t leds_store(struct sys_device *dev, const char *buf, size_t size) +static ssize_t leds_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t size) { int ret = -EINVAL, len = strcspn(buf, " "); @@ -365,108 +367,6 @@ static struct sysdev_class timer_sysclass = { .resume = timer_resume, }; -#ifdef CONFIG_NO_IDLE_HZ -static int timer_dyn_tick_enable(void) -{ - struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; - unsigned long flags; - int ret = -ENODEV; - - if (dyn_tick) { - spin_lock_irqsave(&dyn_tick->lock, flags); - ret = 0; - if (!(dyn_tick->state & DYN_TICK_ENABLED)) { - ret = dyn_tick->enable(); - - if (ret == 0) - dyn_tick->state |= DYN_TICK_ENABLED; - } - spin_unlock_irqrestore(&dyn_tick->lock, flags); - } - - return ret; -} - -static int timer_dyn_tick_disable(void) -{ - struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; - unsigned long flags; - int ret = -ENODEV; - - if (dyn_tick) { - spin_lock_irqsave(&dyn_tick->lock, flags); - ret = 0; - if (dyn_tick->state & DYN_TICK_ENABLED) { - ret = dyn_tick->disable(); - - if (ret == 0) - dyn_tick->state &= ~DYN_TICK_ENABLED; - } - spin_unlock_irqrestore(&dyn_tick->lock, flags); - } - - return ret; -} - -/* - * Reprogram the system timer for at least the calculated time interval. - * This function should be called from the idle thread with IRQs disabled, - * immediately before sleeping. - */ -void timer_dyn_reprogram(void) -{ - struct dyn_tick_timer *dyn_tick = system_timer->dyn_tick; - unsigned long next, seq, flags; - - if (!dyn_tick) - return; - - spin_lock_irqsave(&dyn_tick->lock, flags); - if (dyn_tick->state & DYN_TICK_ENABLED) { - next = next_timer_interrupt(); - do { - seq = read_seqbegin(&xtime_lock); - dyn_tick->reprogram(next - jiffies); - } while (read_seqretry(&xtime_lock, seq)); - } - spin_unlock_irqrestore(&dyn_tick->lock, flags); -} - -static ssize_t timer_show_dyn_tick(struct sys_device *dev, char *buf) -{ - return sprintf(buf, "%i\n", - (system_timer->dyn_tick->state & DYN_TICK_ENABLED) >> 1); -} - -static ssize_t timer_set_dyn_tick(struct sys_device *dev, const char *buf, - size_t count) -{ - unsigned int enable = simple_strtoul(buf, NULL, 2); - - if (enable) - timer_dyn_tick_enable(); - else - timer_dyn_tick_disable(); - - return count; -} -static SYSDEV_ATTR(dyn_tick, 0644, timer_show_dyn_tick, timer_set_dyn_tick); - -/* - * dyntick=enable|disable - */ -static char dyntick_str[4] __initdata = ""; - -static int __init dyntick_setup(char *str) -{ - if (str) - strlcpy(dyntick_str, str, sizeof(dyntick_str)); - return 1; -} - -__setup("dyntick=", dyntick_setup); -#endif - static int __init timer_init_sysfs(void) { int ret = sysdev_class_register(&timer_sysclass); @@ -475,19 +375,6 @@ static int __init timer_init_sysfs(void) ret = sysdev_register(&system_timer->dev); } -#ifdef CONFIG_NO_IDLE_HZ - if (ret == 0 && system_timer->dyn_tick) { - ret = sysdev_create_file(&system_timer->dev, &attr_dyn_tick); - - /* - * Turn on dynamic tick after calibrate delay - * for correct bogomips - */ - if (ret == 0 && dyntick_str[0] == 'e') - ret = timer_dyn_tick_enable(); - } -#endif - return ret; } @@ -500,10 +387,5 @@ void __init time_init(void) system_timer->offset = dummy_gettimeoffset; #endif system_timer->init(); - -#ifdef CONFIG_NO_IDLE_HZ - if (system_timer->dyn_tick) - spin_lock_init(&system_timer->dyn_tick->lock); -#endif } diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 5595fdd75e8200ec0e8d5ea8a54c750ed0398e1f..7277aef8309836fb74b6e2368beabf050757af9d 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -707,6 +707,11 @@ void abort(void) EXPORT_SYMBOL(abort); void __init trap_init(void) +{ + return; +} + +void __init early_trap_init(void) { unsigned long vectors = CONFIG_VECTORS_BASE; extern char __stubs_start[], __stubs_end[]; diff --git a/arch/arm/lib/copy_template.S b/arch/arm/lib/copy_template.S index cab355c0c1f782d28fc7c074f5a08b1661fadc50..139cce6460556b3a92b2b58b6bf86383f2bf8b07 100644 --- a/arch/arm/lib/copy_template.S +++ b/arch/arm/lib/copy_template.S @@ -12,14 +12,6 @@ * published by the Free Software Foundation. */ -/* - * This can be used to enable code to cacheline align the source pointer. - * Experiments on tested architectures (StrongARM and XScale) didn't show - * this a worthwhile thing to do. That might be different in the future. - */ -//#define CALGN(code...) code -#define CALGN(code...) - /* * Theory of operation * ------------------- @@ -82,7 +74,7 @@ stmfd sp!, {r5 - r8} blt 5f - CALGN( ands ip, r1, #31 ) + CALGN( ands ip, r0, #31 ) CALGN( rsb r3, ip, #32 ) CALGN( sbcnes r4, r3, r2 ) @ C is always set here CALGN( bcs 2f ) @@ -168,7 +160,7 @@ subs r2, r2, #28 blt 14f - CALGN( ands ip, r1, #31 ) + CALGN( ands ip, r0, #31 ) CALGN( rsb ip, ip, #32 ) CALGN( sbcnes r4, ip, r2 ) @ C is always set here CALGN( subcc r2, r2, ip ) diff --git a/arch/arm/lib/memmove.S b/arch/arm/lib/memmove.S index ef7fddc14ac989bd6dca30f204cadeb92317b133..2e301b7bd8f13d13243761049353be4ef8f72e10 100644 --- a/arch/arm/lib/memmove.S +++ b/arch/arm/lib/memmove.S @@ -13,14 +13,6 @@ #include #include -/* - * This can be used to enable code to cacheline align the source pointer. - * Experiments on tested architectures (StrongARM and XScale) didn't show - * this a worthwhile thing to do. That might be different in the future. - */ -//#define CALGN(code...) code -#define CALGN(code...) - .text /* @@ -55,11 +47,12 @@ ENTRY(memmove) stmfd sp!, {r5 - r8} blt 5f - CALGN( ands ip, r1, #31 ) + CALGN( ands ip, r0, #31 ) CALGN( sbcnes r4, ip, r2 ) @ C is always set here CALGN( bcs 2f ) CALGN( adr r4, 6f ) CALGN( subs r2, r2, ip ) @ C is set here + CALGN( rsb ip, ip, #32 ) CALGN( add pc, r4, ip ) PLD( pld [r1, #-4] ) @@ -138,8 +131,7 @@ ENTRY(memmove) subs r2, r2, #28 blt 14f - CALGN( ands ip, r1, #31 ) - CALGN( rsb ip, ip, #32 ) + CALGN( ands ip, r0, #31 ) CALGN( sbcnes r4, ip, r2 ) @ C is always set here CALGN( subcc r2, r2, ip ) CALGN( bcc 15f ) diff --git a/arch/arm/lib/memset.S b/arch/arm/lib/memset.S index 95b110b07a89bda56ef79d29673bd5e870bad13a..b477d4ac88eff4aadab356766dafb83c2c20fe47 100644 --- a/arch/arm/lib/memset.S +++ b/arch/arm/lib/memset.S @@ -39,6 +39,9 @@ ENTRY(memset) mov r3, r1 cmp r2, #16 blt 4f + +#if ! CALGN(1)+0 + /* * We need an extra register for this loop - save the return address and * use the LR @@ -64,6 +67,49 @@ ENTRY(memset) stmneia r0!, {r1, r3, ip, lr} ldr lr, [sp], #4 +#else + +/* + * This version aligns the destination pointer in order to write + * whole cache lines at once. + */ + + stmfd sp!, {r4-r7, lr} + mov r4, r1 + mov r5, r1 + mov r6, r1 + mov r7, r1 + mov ip, r1 + mov lr, r1 + + cmp r2, #96 + tstgt r0, #31 + ble 3f + + and ip, r0, #31 + rsb ip, ip, #32 + sub r2, r2, ip + movs ip, ip, lsl #(32 - 4) + stmcsia r0!, {r4, r5, r6, r7} + stmmiia r0!, {r4, r5} + tst ip, #(1 << 30) + mov ip, r1 + strne r1, [r0], #4 + +3: subs r2, r2, #64 + stmgeia r0!, {r1, r3-r7, ip, lr} + stmgeia r0!, {r1, r3-r7, ip, lr} + bgt 3b + ldmeqfd sp!, {r4-r7, pc} + + tst r2, #32 + stmneia r0!, {r1, r3-r7, ip, lr} + tst r2, #16 + stmneia r0!, {r4-r7} + ldmfd sp!, {r4-r7, lr} + +#endif + 4: tst r2, #8 stmneia r0!, {r1, r3} tst r2, #4 diff --git a/arch/arm/lib/memzero.S b/arch/arm/lib/memzero.S index abf2508e8221a65113b63cd14b87c3c129d8a5f2..b8f79d80ee9bf703d7554c15d2a22ceb1fe9ef1e 100644 --- a/arch/arm/lib/memzero.S +++ b/arch/arm/lib/memzero.S @@ -39,6 +39,9 @@ ENTRY(__memzero) */ cmp r1, #16 @ 1 we can skip this chunk if we blt 4f @ 1 have < 16 bytes + +#if ! CALGN(1)+0 + /* * We need an extra register for this loop - save the return address and * use the LR @@ -64,6 +67,47 @@ ENTRY(__memzero) stmneia r0!, {r2, r3, ip, lr} @ 4 ldr lr, [sp], #4 @ 1 +#else + +/* + * This version aligns the destination pointer in order to write + * whole cache lines at once. + */ + + stmfd sp!, {r4-r7, lr} + mov r4, r2 + mov r5, r2 + mov r6, r2 + mov r7, r2 + mov ip, r2 + mov lr, r2 + + cmp r1, #96 + andgts ip, r0, #31 + ble 3f + + rsb ip, ip, #32 + sub r1, r1, ip + movs ip, ip, lsl #(32 - 4) + stmcsia r0!, {r4, r5, r6, r7} + stmmiia r0!, {r4, r5} + movs ip, ip, lsl #2 + strcs r2, [r0], #4 + +3: subs r1, r1, #64 + stmgeia r0!, {r2-r7, ip, lr} + stmgeia r0!, {r2-r7, ip, lr} + bgt 3b + ldmeqfd sp!, {r4-r7, pc} + + tst r1, #32 + stmneia r0!, {r2-r7, ip, lr} + tst r1, #16 + stmneia r0!, {r4-r7} + ldmfd sp!, {r4-r7, lr} + +#endif + 4: tst r1, #8 @ 1 8 bytes or more? stmneia r0!, {r2, r3} @ 2 tst r1, #4 @ 1 4 bytes or more? diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 0fc07b6db749ea98c7b42f87d4536e28ae2b1ad7..5bad6b9b00d77be2dbbc1ea65f90d8d746dc6f26 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -30,6 +30,11 @@ config ARCH_AT91SAM9RL select GENERIC_TIME select GENERIC_CLOCKEVENTS +config ARCH_AT91SAM9G20 + bool "AT91SAM9G20" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + config ARCH_AT91CAP9 bool "AT91CAP9" select GENERIC_TIME @@ -126,6 +131,12 @@ config MACH_ECBAT91 Select this if you are using emQbit's ECB_AT91 board. +config MACH_YL9200 + bool "ucDragon YL-9200" + depends on ARCH_AT91RM9200 + help + Select this if you are using the ucDragon YL-9200 board. + endif # ---------------------------------------------------------- @@ -164,6 +175,20 @@ config MACH_SAM9_L9260 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. +config MACH_USB_A9260 + bool "CALAO USB-A9260" + depends on ARCH_AT91SAM9260 + help + Select this if you are using a Calao Systems USB-A9260. + + +config MACH_QIL_A9260 + bool "CALAO QIL-A9260 board" + depends on ARCH_AT91SAM9260 + help + Select this if you are using a Calao Systems QIL-A9260 Board. + + endif # ---------------------------------------------------------- @@ -194,6 +219,13 @@ config MACH_AT91SAM9263EK Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. +config MACH_USB_A9263 + bool "CALAO USB-A9263" + depends on ARCH_AT91SAM9263 + help + Select this if you are using a Calao Systems USB-A9263. + + endif # ---------------------------------------------------------- @@ -212,6 +244,20 @@ endif # ---------------------------------------------------------- +if ARCH_AT91SAM9G20 + +comment "AT91SAM9G20 Board Type" + +config MACH_AT91SAM9G20EK + bool "Atmel AT91SAM9G20-EK Evaluation Kit" + depends on ARCH_AT91SAM9G20 + help + Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit. + +endif + +# ---------------------------------------------------------- + if ARCH_AT91CAP9 comment "AT91CAP9 Board Type" @@ -247,13 +293,13 @@ comment "AT91 Board Options" config MTD_AT91_DATAFLASH_CARD bool "Enable DataFlash Card support" - depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK || MACH_SAM9_L9260 || MACH_ECBAT91) + depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK) help Enable support for the DataFlash card. config MTD_NAND_AT91_BUSWIDTH_16 bool "Enable 16-bit data bus interface to NAND flash" - depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) + depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91SAM9G20EK || MACH_AT91CAP9ADK) help On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). @@ -302,15 +348,15 @@ config AT91_EARLY_USART2 config AT91_EARLY_USART3 bool "USART3" - depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260) + depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) config AT91_EARLY_USART4 bool "USART4" - depends on ARCH_AT91SAM9260 + depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20 config AT91_EARLY_USART5 bool "USART5" - depends on ARCH_AT91SAM9260 + depends on ARCH_AT91SAM9260 || ARCH_AT91SAM9G20 endchoice diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 8d9bc0153b183ecd21c9f35d49956191437defb1..7d641f97516bff56c90caefd32909db90c203783 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_d obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o +obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o @@ -30,21 +31,28 @@ obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o obj-$(CONFIG_MACH_KAFA) += board-kafa.o obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o +obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o # AT91SAM9260 board-specific support obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o obj-$(CONFIG_MACH_CAM60) += board-cam60.o obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o +obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o +obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o # AT91SAM9261 board-specific support obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o # AT91SAM9263 board-specific support obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o +obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o # AT91SAM9RL board-specific support obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o +# AT91SAM9G20 board-specific support +obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o + # AT91CAP9 board-specific support obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index be526746e01e496d46a3e49db1b06494c7f9b1bf..dc8b40783d94243565a1e7963941f35fdf267c13 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c @@ -83,6 +83,105 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {} #endif +/* -------------------------------------------------------------------- + * USB HS Device (Gadget) + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) + +static struct resource usba_udc_resources[] = { + [0] = { + .start = AT91CAP9_UDPHS_FIFO, + .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91CAP9_BASE_UDPHS, + .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = AT91CAP9_ID_UDPHS, + .end = AT91CAP9_ID_UDPHS, + .flags = IORESOURCE_IRQ, + }, +}; + +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ + [idx] = { \ + .name = nam, \ + .index = idx, \ + .fifo_size = maxpkt, \ + .nr_banks = maxbk, \ + .can_dma = dma, \ + .can_isoc = isoc, \ + } + +static struct usba_ep_data usba_udc_ep[] = { + EP("ep0", 0, 64, 1, 0, 0), + EP("ep1", 1, 1024, 3, 1, 1), + EP("ep2", 2, 1024, 3, 1, 1), + EP("ep3", 3, 1024, 2, 1, 1), + EP("ep4", 4, 1024, 2, 1, 1), + EP("ep5", 5, 1024, 2, 1, 0), + EP("ep6", 6, 1024, 2, 1, 0), + EP("ep7", 7, 1024, 2, 0, 0), +}; + +#undef EP + +/* + * pdata doesn't have room for any endpoints, so we need to + * append room for the ones we need right after it. + */ +static struct { + struct usba_platform_data pdata; + struct usba_ep_data ep[8]; +} usba_udc_data; + +static struct platform_device at91_usba_udc_device = { + .name = "atmel_usba_udc", + .id = -1, + .dev = { + .platform_data = &usba_udc_data.pdata, + }, + .resource = usba_udc_resources, + .num_resources = ARRAY_SIZE(usba_udc_resources), +}; + +void __init at91_add_device_usba(struct usba_platform_data *data) +{ + at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | + AT91_MATRIX_UDPHS_BYPASS_LOCK); + + /* + * Invalid pins are 0 on AT91, but the usba driver is shared + * with AVR32, which use negative values instead. Once/if + * gpio_is_valid() is ported to AT91, revisit this code. + */ + usba_udc_data.pdata.vbus_pin = -EINVAL; + usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); + memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));; + + if (data && data->vbus_pin > 0) { + at91_set_gpio_input(data->vbus_pin, 0); + at91_set_deglitch(data->vbus_pin, 1); + usba_udc_data.pdata.vbus_pin = data->vbus_pin; + } + + /* Pullup pin is handled internally by USB device peripheral */ + + /* Clocks */ + at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); + at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); + + platform_device_register(&at91_usba_udc_device); +} +#else +void __init at91_add_device_usba(struct usba_platform_data *data) {} +#endif + + /* -------------------------------------------------------------------- * Ethernet * -------------------------------------------------------------------- */ @@ -278,7 +377,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -296,7 +395,7 @@ static struct resource nand_resources[] = { }; static struct platform_device at91cap9_nand_device = { - .name = "at91_nand", + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -305,7 +404,7 @@ static struct platform_device at91cap9_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned long csa, mode; @@ -346,7 +445,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) platform_device_register(&at91cap9_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index de19bee83f758c55c4b092428b31cfdc573048ce..8ced9bc82099911445a0d459169a185455554e09 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -369,7 +369,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -382,7 +382,7 @@ static struct resource nand_resources[] = { }; static struct platform_device at91rm9200_nand_device = { - .name = "at91_nand", + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -391,7 +391,7 @@ static struct platform_device at91rm9200_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned int csa; @@ -429,7 +429,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) platform_device_register(&at91rm9200_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index ee26550cdc21ed76923f1a869179372747ab10b1..380f12a122004cc457a5ea7210aef908f97e783d 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -47,6 +47,20 @@ static struct map_desc at91sam9260_sram_desc[] __initdata = { } }; +static struct map_desc at91sam9g20_sram_desc[] __initdata = { + { + .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE, + .pfn = __phys_to_pfn(AT91SAM9G20_SRAM0_BASE), + .length = AT91SAM9G20_SRAM0_SIZE, + .type = MT_DEVICE, + }, { + .virtual = AT91_IO_VIRT_BASE - AT91SAM9G20_SRAM0_SIZE - AT91SAM9G20_SRAM1_SIZE, + .pfn = __phys_to_pfn(AT91SAM9G20_SRAM1_BASE), + .length = AT91SAM9G20_SRAM1_SIZE, + .type = MT_DEVICE, + } +}; + static struct map_desc at91sam9xe_sram_desc[] __initdata = { { .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE), @@ -307,6 +321,8 @@ void __init at91sam9260_initialize(unsigned long main_clock) if (cpu_is_at91sam9xe()) at91sam9xe_initialize(); + else if (cpu_is_at91sam9g20()) + iotable_init(at91sam9g20_sram_desc, ARRAY_SIZE(at91sam9g20_sram_desc)); else iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 393a32aefce5cd167795b615e88c7efeb971477d..cae5f52f1278e1311baa90e5fe4da69880a02c8c 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -18,6 +18,7 @@ #include #include +#include #include #include #include @@ -283,7 +284,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -301,7 +302,7 @@ static struct resource nand_resources[] = { }; static struct platform_device at91sam9260_nand_device = { - .name = "at91_nand", + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -310,7 +311,7 @@ static struct platform_device at91sam9260_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned long csa, mode; @@ -320,20 +321,41 @@ void __init at91_add_device_nand(struct at91_nand_data *data) csa = at91_sys_read(AT91_MATRIX_EBICSA); at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); - /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) - | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + if (cpu_is_at91sam9260()) { + /* Timing for sam9260 */ + /* set the bus interface characteristics */ + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) + | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) - | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) + | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - if (data->bus_width_16) - mode = AT91_SMC_DBW_16; - else - mode = AT91_SMC_DBW_8; - at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2)); + if (data->bus_width_16) + mode = AT91_SMC_DBW_16; + else + mode = AT91_SMC_DBW_8; + at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2)); + } + + if (cpu_is_at91sam9g20()) { + /* Timing for sam9g20 */ + /* set the bus interface characteristics */ + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) + | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); + + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(4) + | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(4)); + + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + + if (data->bus_width_16) + mode = AT91_SMC_DBW_16; + else + mode = AT91_SMC_DBW_8; + at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(3)); + } /* enable pin */ if (data->enable_pin) @@ -351,7 +373,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) platform_device_register(&at91sam9260_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 0babb645b83c055ea1120706b2344c9c286d3ca2..483d436af22d84610b84b9a916748b222c35c263 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -199,7 +199,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -211,8 +211,8 @@ static struct resource nand_resources[] = { } }; -static struct platform_device at91_nand_device = { - .name = "at91_nand", +static struct platform_device atmel_nand_device = { + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -221,7 +221,7 @@ static struct platform_device at91_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned long csa, mode; @@ -232,19 +232,19 @@ void __init at91_add_device_nand(struct at91_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) - | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) + | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) - | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) + | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); if (data->bus_width_16) mode = AT91_SMC_DBW_16; else mode = AT91_SMC_DBW_8; - at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); + at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2)); /* enable pin */ if (data->enable_pin) @@ -262,11 +262,11 @@ void __init at91_add_device_nand(struct at91_nand_data *data) at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ nand_data = *data; - platform_device_register(&at91_nand_device); + platform_device_register(&atmel_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 719667e25c981f01f8261e37746d3f5cdbb22d65..9762b15f658ac0238bed885ab511e43c8aed83d7 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -353,7 +353,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -371,7 +371,7 @@ static struct resource nand_resources[] = { }; static struct platform_device at91sam9263_nand_device = { - .name = "at91_nand", + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -380,7 +380,7 @@ static struct platform_device at91sam9263_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned long csa, mode; @@ -391,8 +391,8 @@ void __init at91_add_device_nand(struct at91_nand_data *data) at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) - | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) + | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); @@ -421,7 +421,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) platform_device_register(&at91sam9263_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 450db304936ffea07453e4319d51fa7b5eb2244b..5f3094870cadcbaa5e92579cbd451b3e9ab89943 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -25,6 +25,101 @@ #include "generic.h" +/* -------------------------------------------------------------------- + * USB HS Device (Gadget) + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) + +static struct resource usba_udc_resources[] = { + [0] = { + .start = AT91SAM9RL_UDPHS_FIFO, + .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = AT91SAM9RL_BASE_UDPHS, + .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = AT91SAM9RL_ID_UDPHS, + .end = AT91SAM9RL_ID_UDPHS, + .flags = IORESOURCE_IRQ, + }, +}; + +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ + [idx] = { \ + .name = nam, \ + .index = idx, \ + .fifo_size = maxpkt, \ + .nr_banks = maxbk, \ + .can_dma = dma, \ + .can_isoc = isoc, \ + } + +static struct usba_ep_data usba_udc_ep[] __initdata = { + EP("ep0", 0, 64, 1, 0, 0), + EP("ep1", 1, 1024, 2, 1, 1), + EP("ep2", 2, 1024, 2, 1, 1), + EP("ep3", 3, 1024, 3, 1, 0), + EP("ep4", 4, 1024, 3, 1, 0), + EP("ep5", 5, 1024, 3, 1, 1), + EP("ep6", 6, 1024, 3, 1, 1), +}; + +#undef EP + +/* + * pdata doesn't have room for any endpoints, so we need to + * append room for the ones we need right after it. + */ +static struct { + struct usba_platform_data pdata; + struct usba_ep_data ep[7]; +} usba_udc_data; + +static struct platform_device at91_usba_udc_device = { + .name = "atmel_usba_udc", + .id = -1, + .dev = { + .platform_data = &usba_udc_data.pdata, + }, + .resource = usba_udc_resources, + .num_resources = ARRAY_SIZE(usba_udc_resources), +}; + +void __init at91_add_device_usba(struct usba_platform_data *data) +{ + /* + * Invalid pins are 0 on AT91, but the usba driver is shared + * with AVR32, which use negative values instead. Once/if + * gpio_is_valid() is ported to AT91, revisit this code. + */ + usba_udc_data.pdata.vbus_pin = -EINVAL; + usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep); + memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));; + + if (data && data->vbus_pin > 0) { + at91_set_gpio_input(data->vbus_pin, 0); + at91_set_deglitch(data->vbus_pin, 1); + usba_udc_data.pdata.vbus_pin = data->vbus_pin; + } + + /* Pullup pin is handled internally by USB device peripheral */ + + /* Clocks */ + at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk"); + at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk"); + + platform_device_register(&at91_usba_udc_device); +} +#else +void __init at91_add_device_usba(struct usba_platform_data *data) {} +#endif + + /* -------------------------------------------------------------------- * MMC / SD * -------------------------------------------------------------------- */ @@ -100,7 +195,7 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} * -------------------------------------------------------------------- */ #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) -static struct at91_nand_data nand_data; +static struct atmel_nand_data nand_data; #define NAND_BASE AT91_CHIPSELECT_3 @@ -117,8 +212,8 @@ static struct resource nand_resources[] = { } }; -static struct platform_device at91_nand_device = { - .name = "at91_nand", +static struct platform_device atmel_nand_device = { + .name = "atmel_nand", .id = -1, .dev = { .platform_data = &nand_data, @@ -127,7 +222,7 @@ static struct platform_device at91_nand_device = { .num_resources = ARRAY_SIZE(nand_resources), }; -void __init at91_add_device_nand(struct at91_nand_data *data) +void __init at91_add_device_nand(struct atmel_nand_data *data) { unsigned long csa; @@ -138,15 +233,15 @@ void __init at91_add_device_nand(struct at91_nand_data *data) at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); /* set the bus interface characteristics */ - at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) - | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) + | AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) - | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) + | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); + at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2)); /* enable pin */ if (data->enable_pin) @@ -164,11 +259,11 @@ void __init at91_add_device_nand(struct at91_nand_data *data) at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */ nand_data = *data; - platform_device_register(&at91_nand_device); + platform_device_register(&atmel_nand_device); } #else -void __init at91_add_device_nand(struct at91_nand_data *data) {} +void __init at91_add_device_nand(struct atmel_nand_data *data) {} #endif diff --git a/arch/arm/mach-at91/board-cam60.c b/arch/arm/mach-at91/board-cam60.c index b22a1a00405547cf7be13f22371dd510a5677f33..af2c33aff1a8c9aafa194429248f74bf028eab07 100644 --- a/arch/arm/mach-at91/board-cam60.c +++ b/arch/arm/mach-at91/board-cam60.c @@ -142,7 +142,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return cam60_nand_partition; } -static struct at91_nand_data __initdata cam60_nand_data = { +static struct atmel_nand_data __initdata cam60_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not there diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index e5512d1ff21750e7593fa7ad4f183fe53baa61d7..117cf6c9afce3534b8c904bb4915974728456dbb 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -78,6 +78,12 @@ static struct at91_usbh_data __initdata cap9adk_usbh_data = { .ports = 2, }; +/* + * USB HS Device port + */ +static struct usba_platform_data __initdata cap9adk_usba_udc_data = { + .vbus_pin = AT91_PIN_PB31, +}; /* * ADS7846 Touchscreen @@ -175,7 +181,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return cap9adk_nand_partitions; } -static struct at91_nand_data __initdata cap9adk_nand_data = { +static struct atmel_nand_data __initdata cap9adk_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not connected @@ -324,8 +330,11 @@ static void __init cap9adk_board_init(void) /* Serial */ at91_add_device_serial(); /* USB Host */ - set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH); + set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); at91_add_device_usbh(&cap9adk_usbh_data); + /* USB HS */ + set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); + at91_add_device_usba(&cap9adk_usba_udc_data); /* SPI */ at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); /* Touchscreen */ @@ -341,7 +350,7 @@ static void __init cap9adk_board_init(void) /* I2C */ at91_add_device_i2c(NULL, 0); /* LCD Controller */ - set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH); + set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); at91_add_device_lcdc(&cap9adk_lcdc_data); /* AC97 */ at91_add_device_ac97(&cap9adk_ac97_data); diff --git a/arch/arm/mach-at91/board-carmeva.c b/arch/arm/mach-at91/board-carmeva.c index 0f0878294a67c660a8bb2e3b291f5c85212cd3f6..9854fc3dd1f268f65e2abbf90757e97233aed2a0 100644 --- a/arch/arm/mach-at91/board-carmeva.c +++ b/arch/arm/mach-at91/board-carmeva.c @@ -40,24 +40,21 @@ #include "generic.h" -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - */ -static struct at91_uart_config __initdata carmeva_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 2, - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; - static void __init carmeva_map_io(void) { /* Initialize processor: 20.000 MHz crystal */ at91rm9200_initialize(20000000, AT91RM9200_BGA); - /* Setup the serial ports and console */ - at91_init_serial(&carmeva_uart_config); + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static void __init carmeva_init_irq(void) diff --git a/arch/arm/mach-at91/board-csb637.c b/arch/arm/mach-at91/board-csb637.c index 419fd19b620b9bbfb92bc4517d58e28f3682c213..bb1a5474ddab0719daf48e592a9809a237bfa102 100644 --- a/arch/arm/mach-at91/board-csb637.c +++ b/arch/arm/mach-at91/board-csb637.c @@ -45,10 +45,10 @@ static void __init csb637_map_io(void) /* Initialize processor: 3.6864 MHz crystal */ at91rm9200_initialize(3686400, AT91RM9200_BGA); - /* DBGU on ttyS0 */ + /* DBGU on ttyS0. (Rx & Tx only) */ at91_register_uart(0, 0, 0); - /* make console=ttyS0 the default */ + /* make console=ttyS0 (ie, DBGU) the default */ at91_set_serial_console(0); } diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c index c1a813c7169b63f86f932b53bd3945efc1535204..02a70b2f355bd07e3551e82fa60d96be266cde8b 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-dk.c @@ -45,17 +45,6 @@ #include "generic.h" -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - */ -static struct at91_uart_config __initdata dk_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 2, - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; - static void __init dk_map_io(void) { /* Initialize processor: 18.432 MHz crystal */ @@ -64,8 +53,16 @@ static void __init dk_map_io(void) /* Setup the LEDs */ at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2); - /* Setup the serial ports and console */ - at91_init_serial(&dk_uart_config); + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static void __init dk_init_irq(void) @@ -150,7 +147,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return dk_nand_partition; } -static struct at91_nand_data __initdata dk_nand_data = { +static struct atmel_nand_data __initdata dk_nand_data = { .ale = 22, .cle = 21, .det_pin = AT91_PIN_PB1, @@ -163,7 +160,7 @@ static struct at91_nand_data __initdata dk_nand_data = { #define DK_FLASH_SIZE 0x200000 static struct physmap_flash_data dk_flash_data = { - .width = 2, + .width = 2, }; static struct resource dk_flash_resource = { diff --git a/arch/arm/mach-at91/board-eb9200.c b/arch/arm/mach-at91/board-eb9200.c index af1a1d8ecc303a31d59841536f9c896acdd82b34..3fe054e0056bfbdb2ca2efe1518ae483e98fcd86 100644 --- a/arch/arm/mach-at91/board-eb9200.c +++ b/arch/arm/mach-at91/board-eb9200.c @@ -40,24 +40,24 @@ #include "generic.h" -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - */ -static struct at91_uart_config __initdata eb9200_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 2, - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; - static void __init eb9200_map_io(void) { /* Initialize processor: 18.432 MHz crystal */ at91rm9200_initialize(18432000, AT91RM9200_BGA); - /* Setup the serial ports and console */ - at91_init_serial(&eb9200_uart_config); + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART2 on ttyS2. (Rx, Tx) - IRDA */ + at91_register_uart(AT91RM9200_ID_US2, 2, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static void __init eb9200_init_irq(void) diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c index 0574e50a30dd096bbb5f012ac522895518b8a880..74aa4325eab38e4105a51d52d5273d61b8938278 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-ek.c @@ -45,17 +45,6 @@ #include "generic.h" -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - */ -static struct at91_uart_config __initdata ek_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 2, - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; - static void __init ek_map_io(void) { /* Initialize processor: 18.432 MHz crystal */ @@ -64,8 +53,16 @@ static void __init ek_map_io(void) /* Setup the LEDs */ at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2); - /* Setup the serial ports and console */ - at91_init_serial(&ek_uart_config); + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static void __init ek_init_irq(void) @@ -122,7 +119,7 @@ static struct i2c_board_info __initdata ek_i2c_devices[] = { #define EK_FLASH_SIZE 0x200000 static struct physmap_flash_data ek_flash_data = { - .width = 2, + .width = 2, }; static struct resource ek_flash_resource = { diff --git a/arch/arm/mach-at91/board-kb9202.c b/arch/arm/mach-at91/board-kb9202.c index 4b39b9cda75b48e84b9f49bae5c4f302efa27480..082ed59365a4a4f90a13e6ab19897cad6df30f9f 100644 --- a/arch/arm/mach-at91/board-kb9202.c +++ b/arch/arm/mach-at91/board-kb9202.c @@ -37,19 +37,10 @@ #include #include -#include "generic.h" +#include +#include "generic.h" -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - */ -static struct at91_uart_config __initdata kb9202_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 3, - .tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; static void __init kb9202_map_io(void) { @@ -59,8 +50,20 @@ static void __init kb9202_map_io(void) /* Set up the LEDs */ at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18); - /* Setup the serial ports and console */ - at91_init_serial(&kb9202_uart_config); + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1 (Rx & Tx only) */ + at91_register_uart(AT91RM9200_ID_US0, 1, 0); + + /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */ + at91_register_uart(AT91RM9200_ID_US1, 2, 0); + + /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */ + at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } static void __init kb9202_init_irq(void) @@ -102,7 +105,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return kb9202_nand_partition; } -static struct at91_nand_data __initdata kb9202_nand_data = { +static struct atmel_nand_data __initdata kb9202_nand_data = { .ale = 22, .cle = 21, // .det_pin = ... not there diff --git a/arch/arm/mach-at91/board-qil-a9260.c b/arch/arm/mach-at91/board-qil-a9260.c new file mode 100644 index 0000000000000000000000000000000000000000..99b4ec3818d6d7b5d8704cf3abdeb49a34d0b0f7 --- /dev/null +++ b/arch/arm/mach-at91/board-qil-a9260.c @@ -0,0 +1,255 @@ +/* + * linux/arch/arm/mach-at91/board-qil-a9260.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2006 Atmel + * Copyright (C) 2007 Calao-systems + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "generic.h" + + +static void __init ek_map_io(void) +{ + /* Initialize processor: 12.000 MHz crystal */ + at91sam9260_initialize(12000000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */ + at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS1 (ie, USART0) */ + at91_set_serial_console(1); + +} + +static void __init ek_init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PC5, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + +/* + * SPI devices. + */ +static struct spi_board_info ek_spi_devices[] = { +#if defined(CONFIG_RTC_DRV_M41T94) + { /* M41T94 RTC */ + .modalias = "m41t94", + .chip_select = 0, + .max_speed_hz = 1 * 1000 * 1000, + .bus_num = 0, + } +#endif +}; + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA31, + .is_rmii = 1, +}; + +/* + * NAND flash + */ +static struct mtd_partition __initdata ek_nand_partition[] = { + { + .name = "Uboot & Kernel", + .offset = 0x00000000, + .size = 16 * 1024 * 1024, + }, + { + .name = "Root FS", + .offset = 0x01000000, + .size = 120 * 1024 * 1024, + }, + { + .name = "FS", + .offset = 0x08800000, + .size = 120 * 1024 * 1024, + }, +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(ek_nand_partition); + return ek_nand_partition; +} + +static struct at91_nand_data __initdata ek_nand_data = { + .ale = 21, + .cle = 22, +// .det_pin = ... not connected + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, + .partition_info = nand_partitions, +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) + .bus_width_16 = 1, +#else + .bus_width_16 = 0, +#endif +}; + +/* + * MCI (SD/MMC) + */ +static struct at91_mmc_data __initdata ek_mmc_data = { + .slot_b = 0, + .wire4 = 1, +// .det_pin = ... not connected +// .wp_pin = ... not connected +// .vcc_pin = ... not connected +}; + +/* + * GPIO Buttons + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { /* USER PUSH BUTTON */ + .code = KEY_ENTER, + .gpio = AT91_PIN_PB10, + .active_low = 1, + .desc = "user_pb", + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */ + at91_set_deglitch(AT91_PIN_PB10, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + +/* + * LEDs + */ +static struct gpio_led ek_leds[] = { + { /* user_led (green) */ + .name = "user_led", + .gpio = AT91_PIN_PB21, + .active_low = 0, + .default_trigger = "heartbeat", + } +}; + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&ek_usbh_data); + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); + /* NAND */ + at91_add_device_nand(&ek_nand_data); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); + /* MMC */ + at91_add_device_mmc(0, &ek_mmc_data); + /* Push Buttons */ + ek_add_device_buttons(); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* shutdown controller, wakeup button (5 msec low) */ + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW + | AT91_SHDW_RTTWKEN); +} + +MACHINE_START(QIL_A9260, "CALAO QIL_A9260") + /* Maintainer: calao-systems */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = ek_map_io, + .init_irq = ek_init_irq, + .init_machine = ek_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9-l9260.c b/arch/arm/mach-at91/board-sam9-l9260.c index 8f76af5e219aea79278bff8085243966a7b53b3e..57a6221943ed3b82f57e69d6db53994aaf7fc9f7 100644 --- a/arch/arm/mach-at91/board-sam9-l9260.c +++ b/arch/arm/mach-at91/board-sam9-l9260.c @@ -141,7 +141,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return ek_nand_partition; } -static struct at91_nand_data __initdata ek_nand_data = { +static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not connected diff --git a/arch/arm/mach-at91/board-sam9260ek.c b/arch/arm/mach-at91/board-sam9260ek.c index 4d1d9c777084dfb3f695bebcffc1b1ab8b11d2ae..6a680795c3c83d80cea369cd85d4fee0269201d4 100644 --- a/arch/arm/mach-at91/board-sam9260ek.c +++ b/arch/arm/mach-at91/board-sam9260ek.c @@ -178,7 +178,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return ek_nand_partition; } -static struct at91_nand_data __initdata ek_nand_data = { +static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not connected diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 08382c0df2211401c1ccb04887a45a938901f4de..43dfbd0d543a07c7aeb7689354e3ea506bff60b1 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -183,7 +183,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return ek_nand_partition; } -static struct at91_nand_data __initdata ek_nand_data = { +static struct atmel_nand_data __initdata ek_nand_data = { .ale = 22, .cle = 21, // .det_pin = ... not connected diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index b4cd5d0ed597ed57bbd90460b1e8b8b7797f3d2f..6605a098011761bb32cc85b58077cfac6f866cbb 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -187,7 +187,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return ek_nand_partition; } -static struct at91_nand_data __initdata ek_nand_data = { +static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not connected diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c new file mode 100644 index 0000000000000000000000000000000000000000..45617c2012405926c9ef4655753ef47fb6e267d3 --- /dev/null +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -0,0 +1,218 @@ +/* + * Copyright (C) 2005 SAN People + * Copyright (C) 2008 Atmel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include "generic.h" + + +static void __init ek_map_io(void) +{ + /* Initialize processor: 18.432 MHz crystal */ + at91sam9260_initialize(18432000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); + + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */ + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init ek_init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PC5, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + + +/* + * SPI devices. + */ +static struct spi_board_info ek_spi_devices[] = { +#if !defined(CONFIG_MMC_AT91) + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .chip_select = 1, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) + { /* DataFlash card */ + .modalias = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + }, +#endif +#endif +}; + + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA7, + .is_rmii = 1, +}; + + +/* + * NAND flash + */ +static struct mtd_partition __initdata ek_nand_partition[] = { + { + .name = "Bootstrap", + .offset = 0, + .size = 4 * 1024 * 1024, + }, + { + .name = "Partition 1", + .offset = 4 * 1024 * 1024, + .size = 60 * 1024 * 1024, + }, + { + .name = "Partition 2", + .offset = 64 * 1024 * 1024, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(ek_nand_partition); + return ek_nand_partition; +} + +/* det_pin is not connected */ +static struct at91_nand_data __initdata ek_nand_data = { + .ale = 21, + .cle = 22, + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, + .partition_info = nand_partitions, +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) + .bus_width_16 = 1, +#else + .bus_width_16 = 0, +#endif +}; + + +/* + * MCI (SD/MMC) + * det_pin, wp_pin and vcc_pin are not connected + */ +static struct at91_mmc_data __initdata ek_mmc_data = { + .slot_b = 1, + .wire4 = 1, +}; + + +/* + * LEDs + */ +static struct gpio_led ek_leds[] = { + { /* "bottom" led, green, userled1 to be defined */ + .name = "ds5", + .gpio = AT91_PIN_PA6, + .active_low = 1, + .default_trigger = "none", + }, + { /* "power" led, yellow */ + .name = "ds1", + .gpio = AT91_PIN_PA9, + .default_trigger = "heartbeat", + } +}; + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&ek_usbh_data); + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); + /* NAND */ + at91_add_device_nand(&ek_nand_data); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); + /* MMC */ + at91_add_device_mmc(0, &ek_mmc_data); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); +} + +MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") + /* Maintainer: Atmel */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = ek_map_io, + .init_irq = ek_init_irq, + .init_machine = ek_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index ffc0597aee8dfd5df7f3f5795cf53c33d4dc4c2a..66e77bb2e079c4ad9592ed1d6dc347159fa079e8 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -55,6 +55,14 @@ static void __init ek_init_irq(void) } +/* + * USB HS Device port + */ +static struct usba_platform_data __initdata ek_usba_udc_data = { + .vbus_pin = AT91_PIN_PA8, +}; + + /* * MCI (SD/MMC) */ @@ -88,7 +96,7 @@ static struct mtd_partition * __init nand_partitions(int size, int *num_partitio return ek_nand_partition; } -static struct at91_nand_data __initdata ek_nand_data = { +static struct atmel_nand_data __initdata ek_nand_data = { .ale = 21, .cle = 22, // .det_pin = ... not connected @@ -175,6 +183,8 @@ static void __init ek_board_init(void) { /* Serial */ at91_add_device_serial(); + /* USB HS */ + at91_add_device_usba(&ek_usba_udc_data); /* I2C */ at91_add_device_i2c(NULL, 0); /* NAND */ diff --git a/arch/arm/mach-at91/board-usb-a9260.c b/arch/arm/mach-at91/board-usb-a9260.c new file mode 100644 index 0000000000000000000000000000000000000000..837aedf8ffeb891f4d181dc271f32fba441feca3 --- /dev/null +++ b/arch/arm/mach-at91/board-usb-a9260.c @@ -0,0 +1,215 @@ +/* + * linux/arch/arm/mach-at91/board-usb-a9260.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2006 Atmel + * Copyright (C) 2007 Calao-systems + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "generic.h" + + +static void __init ek_map_io(void) +{ + /* Initialize processor: 12.000 MHz crystal */ + at91sam9260_initialize(12000000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init ek_init_irq(void) +{ + at91sam9260_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PC5, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA31, + .is_rmii = 1, +}; + +/* + * NAND flash + */ +static struct mtd_partition __initdata ek_nand_partition[] = { + { + .name = "Uboot & Kernel", + .offset = 0x00000000, + .size = 16 * 1024 * 1024, + }, + { + .name = "Root FS", + .offset = 0x01000000, + .size = 120 * 1024 * 1024, + }, + { + .name = "FS", + .offset = 0x08800000, + .size = 120 * 1024 * 1024, + } +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(ek_nand_partition); + return ek_nand_partition; +} + +static struct at91_nand_data __initdata ek_nand_data = { + .ale = 21, + .cle = 22, +// .det_pin = ... not connected + .rdy_pin = AT91_PIN_PC13, + .enable_pin = AT91_PIN_PC14, + .partition_info = nand_partitions, +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) + .bus_width_16 = 1, +#else + .bus_width_16 = 0, +#endif +}; + +/* + * GPIO Buttons + */ + +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { /* USER PUSH BUTTON */ + .code = KEY_ENTER, + .gpio = AT91_PIN_PB10, + .active_low = 1, + .desc = "user_pb", + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */ + at91_set_deglitch(AT91_PIN_PB10, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + +/* + * LEDs + */ +static struct gpio_led ek_leds[] = { + { /* user_led (green) */ + .name = "user_led", + .gpio = AT91_PIN_PB21, + .active_low = 0, + .default_trigger = "heartbeat", + } +}; + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&ek_usbh_data); + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* NAND */ + at91_add_device_nand(&ek_nand_data); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); + /* Push Buttons */ + ek_add_device_buttons(); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* shutdown controller, wakeup button (5 msec low) */ + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW + | AT91_SHDW_RTTWKEN); +} + +MACHINE_START(USB_A9260, "CALAO USB_A9260") + /* Maintainer: calao-systems */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = ek_map_io, + .init_irq = ek_init_irq, + .init_machine = ek_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-usb-a9263.c b/arch/arm/mach-at91/board-usb-a9263.c new file mode 100644 index 0000000000000000000000000000000000000000..95800d32bd49d304f6e527e8afd23fdb29174fe5 --- /dev/null +++ b/arch/arm/mach-at91/board-usb-a9263.c @@ -0,0 +1,230 @@ +/* + * linux/arch/arm/mach-at91/board-usb-a9263.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2007 Atmel Corporation. + * Copyright (C) 2007 Calao-systems + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include "generic.h" + + +static void __init ek_map_io(void) +{ + /* Initialize processor: 12.00 MHz crystal */ + at91sam9263_initialize(12000000); + + /* DGBU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); +} + +static void __init ek_init_irq(void) +{ + at91sam9263_init_interrupts(NULL); +} + + +/* + * USB Host port + */ +static struct at91_usbh_data __initdata ek_usbh_data = { + .ports = 2, +}; + +/* + * USB Device port + */ +static struct at91_udc_data __initdata ek_udc_data = { + .vbus_pin = AT91_PIN_PB11, + .pullup_pin = 0, /* pull-up driven by UDC */ +}; + +/* + * SPI devices. + */ +static struct spi_board_info ek_spi_devices[] = { +#if !defined(CONFIG_MMC_AT91) + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .chip_select = 0, + .max_speed_hz = 15 * 1000 * 1000, + .bus_num = 0, + } +#endif +}; + +/* + * MACB Ethernet device + */ +static struct at91_eth_data __initdata ek_macb_data = { + .phy_irq_pin = AT91_PIN_PE31, + .is_rmii = 1, +}; + +/* + * NAND flash + */ +static struct mtd_partition __initdata ek_nand_partition[] = { + { + .name = "Linux Kernel", + .offset = 0x00000000, + .size = 16 * 1024 * 1024, + }, + { + .name = "Root FS", + .offset = 0x01000000, + .size = 120 * 1024 * 1024, + }, + { + .name = "FS", + .offset = 0x08800000, + .size = 120 * 1024 * 1024, + } +}; + +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) +{ + *num_partitions = ARRAY_SIZE(ek_nand_partition); + return ek_nand_partition; +} + +static struct at91_nand_data __initdata ek_nand_data = { + .ale = 21, + .cle = 22, +// .det_pin = ... not connected + .rdy_pin = AT91_PIN_PA22, + .enable_pin = AT91_PIN_PD15, + .partition_info = nand_partitions, +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) + .bus_width_16 = 1, +#else + .bus_width_16 = 0, +#endif +}; + +/* + * GPIO Buttons + */ +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) +static struct gpio_keys_button ek_buttons[] = { + { /* USER PUSH BUTTON */ + .code = KEY_ENTER, + .gpio = AT91_PIN_PB10, + .active_low = 1, + .desc = "user_pb", + .wakeup = 1, + } +}; + +static struct gpio_keys_platform_data ek_button_data = { + .buttons = ek_buttons, + .nbuttons = ARRAY_SIZE(ek_buttons), +}; + +static struct platform_device ek_button_device = { + .name = "gpio-keys", + .id = -1, + .num_resources = 0, + .dev = { + .platform_data = &ek_button_data, + } +}; + +static void __init ek_add_device_buttons(void) +{ + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */ + at91_set_deglitch(AT91_PIN_PB10, 1); + + platform_device_register(&ek_button_device); +} +#else +static void __init ek_add_device_buttons(void) {} +#endif + +/* + * LEDs + */ +static struct gpio_led ek_leds[] = { + { /* user_led (green) */ + .name = "user_led", + .gpio = AT91_PIN_PB21, + .active_low = 1, + .default_trigger = "heartbeat", + } +}; + + +static void __init ek_board_init(void) +{ + /* Serial */ + at91_add_device_serial(); + /* USB Host */ + at91_add_device_usbh(&ek_usbh_data); + /* USB Device */ + at91_add_device_udc(&ek_udc_data); + /* SPI */ + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices)); + /* Ethernet */ + at91_add_device_eth(&ek_macb_data); + /* NAND */ + at91_add_device_nand(&ek_nand_data); + /* I2C */ + at91_add_device_i2c(NULL, 0); + /* Push Buttons */ + ek_add_device_buttons(); + /* LEDs */ + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); + /* shutdown controller, wakeup button (5 msec low) */ + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW + | AT91_SHDW_RTTWKEN); +} + +MACHINE_START(USB_A9263, "CALAO USB_A9263") + /* Maintainer: calao-systems */ + .phys_io = AT91_BASE_SYS, + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, + .boot_params = AT91_SDRAM_BASE + 0x100, + .timer = &at91sam926x_timer, + .map_io = ek_map_io, + .init_irq = ek_init_irq, + .init_machine = ek_board_init, +MACHINE_END diff --git a/arch/arm/mach-at91/board-yl-9200.c b/arch/arm/mach-at91/board-yl-9200.c old mode 100755 new mode 100644 index b5717108991d4e53170735bea8cfd77144f84176..bbbfd06f5e0c37b0a22899f656b869a15b5c5ff4 --- a/arch/arm/mach-at91/board-yl-9200.c +++ b/arch/arm/mach-at91/board-yl-9200.c @@ -1,11 +1,10 @@ /* * linux/arch/arm/mach-at91/board-yl-9200.c * - * Adapted from: - *various board files in - * /arch/arm/mach-at91 - * modifications to convert to YL-9200 platform - * Copyright (C) 2007 S.Birtles + * Adapted from various board files in arch/arm/mach-at91 + * + * Modifications for YL-9200 platform: + * Copyright (C) 2007 S. Birtles * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -26,13 +25,14 @@ #include #include #include +#include #include #include -/*#include */ #include #include +#include +#include -/*#include */ #include #include #include @@ -45,179 +45,108 @@ #include #include #include -#include -#include #include "generic.h" -#include -#define YL_9200_FLASH_BASE AT91_CHIPSELECT_0 -#define YL_9200_FLASH_SIZE 0x800000 -/* - * Serial port configuration. - * 0 .. 3 = USART0 .. USART3 - * 4 = DBGU - *atmel_usart.0: ttyS0 at MMIO 0xfefff200 (irq = 1) is a ATMEL_SERIAL - *atmel_usart.1: ttyS1 at MMIO 0xfffc0000 (irq = 6) is a ATMEL_SERIAL - *atmel_usart.2: ttyS2 at MMIO 0xfffc4000 (irq = 7) is a ATMEL_SERIAL - *atmel_usart.3: ttyS3 at MMIO 0xfffc8000 (irq = 8) is a ATMEL_SERIAL - *atmel_usart.4: ttyS4 at MMIO 0xfffcc000 (irq = 9) is a ATMEL_SERIAL - * on the YL-9200 we are sitting at the following - *ttyS0 at MMIO 0xfefff200 (irq = 1) is a AT91_SERIAL - *ttyS1 at MMIO 0xfefc4000 (irq = 7) is a AT91_SERIAL - */ +static void __init yl9200_map_io(void) +{ + /* Initialize processor: 18.432 MHz crystal */ + at91rm9200_initialize(18432000, AT91RM9200_PQFP); -/* extern void __init yl_9200_add_device_sounder(struct gpio_sounder *sounders, int nr);*/ + /* Setup the LEDs D2=PB17 (timer), D3=PB16 (cpu) */ + at91_init_leds(AT91_PIN_PB16, AT91_PIN_PB17); -static struct at91_uart_config __initdata yl_9200_uart_config = { - .console_tty = 0, /* ttyS0 */ - .nr_tty = 3, - .tty_map = { 4, 1, 0, -1, -1 } /* ttyS0, ..., ttyS4 */ -}; + /* DBGU on ttyS0. (Rx & Tx only) */ + at91_register_uart(0, 0, 0); -static void __init yl_9200_map_io(void) -{ - /* Initialize processor: 18.432 MHz crystal */ - /*Also initialises register clocks & gpio*/ - at91rm9200_initialize(18432000, AT91RM9200_PQFP); /*we have a 3 bank system*/ + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */ + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD + | ATMEL_UART_RI); - /* Setup the serial ports and console */ - at91_init_serial(&yl_9200_uart_config); + /* USART0 on ttyS2. (Rx & Tx only to JP3) */ + at91_register_uart(AT91RM9200_ID_US0, 2, 0); - /* Setup the LEDs D2=PB17,D3=PB16 */ - at91_init_leds(AT91_PIN_PB16,AT91_PIN_PB17); /*cpu-led,timer-led*/ + /* USART3 on ttyS3. (Rx, Tx, RTS - RS485 interface) */ + at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_RTS); + + /* set serial console to ttyS0 (ie, DBGU) */ + at91_set_serial_console(0); } -static void __init yl_9200_init_irq(void) +static void __init yl9200_init_irq(void) { at91rm9200_init_interrupts(NULL); } -static struct at91_eth_data __initdata yl_9200_eth_data = { - .phy_irq_pin = AT91_PIN_PB28, - .is_rmii = 1, -}; -static struct at91_usbh_data __initdata yl_9200_usbh_data = { - .ports = 1, /* this should be 1 not 2 for the Yl9200*/ +/* + * LEDs + */ +static struct gpio_led yl9200_leds[] = { + { /* D2 */ + .name = "led2", + .gpio = AT91_PIN_PB17, + .active_low = 1, + .default_trigger = "timer", + }, + { /* D3 */ + .name = "led3", + .gpio = AT91_PIN_PB16, + .active_low = 1, + .default_trigger = "heartbeat", + }, + { /* D4 */ + .name = "led4", + .gpio = AT91_PIN_PB15, + .active_low = 1, + }, + { /* D5 */ + .name = "led5", + .gpio = AT91_PIN_PB8, + .active_low = 1, + } }; -static struct at91_udc_data __initdata yl_9200_udc_data = { -/*on sheet 7 Schemitic rev 1.0*/ - .pullup_pin = AT91_PIN_PC4, - .vbus_pin= AT91_PIN_PC5, - .pullup_active_low = 1, /*ACTIVE LOW!! due to PNP transistor on page 7*/ - -}; /* -static struct at91_cf_data __initdata yl_9200_cf_data = { -TODO S.BIRTLES - .det_pin = AT91_PIN_xxx, - .rst_pin = AT91_PIN_xxx, - .irq_pin = ... not connected - .vcc_pin = ... always powered - + * Ethernet + */ +static struct at91_eth_data __initdata yl9200_eth_data = { + .phy_irq_pin = AT91_PIN_PB28, + .is_rmii = 1, }; -*/ -static struct at91_mmc_data __initdata yl_9200_mmc_data = { - .det_pin = AT91_PIN_PB9, /*THIS LOOKS CORRECT SHEET7*/ -/* .wp_pin = ... not connected SHEET7*/ - .slot_b = 0, - .wire4 = 1, +/* + * USB Host + */ +static struct at91_usbh_data __initdata yl9200_usbh_data = { + .ports = 1, /* PQFP version of AT91RM9200 */ }; -/* -------------------------------------------------------------------- - * Touch screen - * -------------------------------------------------------------------- */ -#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) -static int ads7843_pendown_state(void) -{ - return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */ -} - -static void __init at91_init_device_ts(void) -{ -/*IMPORTANT NOTE THE SPI INTERFACE IS ALREADY CONFIGURED BY XXX_DEVICES.C -THAT IS TO SAY THAT MISO,MOSI,SPCK AND CS are already configured -we only need to enable the other datapins which are: -PB10/RK1 BUSY -*/ -/* Touchscreen BUSY signal , pin,use pullup ( TODO not currently used in the ADS7843/6.c driver)*/ -at91_set_gpio_input(AT91_PIN_PB10, 1); -} - -#else -static void __init at91_init_device_ts(void) {} -#endif - -static struct ads7846_platform_data ads_info = { - .model = 7843, - .x_min = 150, - .x_max = 3830, - .y_min = 190, - .y_max = 3830, - .vref_delay_usecs = 100, -/* for a 8" touch screen*/ - //.x_plate_ohms = 603, //= 450, S.Birtles TODO - //.y_plate_ohms = 332, //= 250, S.Birtles TODO -/*for a 10.4" touch screen*/ - //.x_plate_ohms =611, - //.y_plate_ohms =325, - - .x_plate_ohms = 576, - .y_plate_ohms = 366, - // - .pressure_max = 15000, /*generally nonsense on the 7843*/ - /*number of times to send query to chip in a given run 0 equals one time (do not set to 0!! ,there is a bug in ADS 7846 code)*/ - .debounce_max = 1, - .debounce_rep = 0, - .debounce_tol = (~0), - .get_pendown_state = ads7843_pendown_state, -}; +/* + * USB Device + */ +static struct at91_udc_data __initdata yl9200_udc_data = { + .pullup_pin = AT91_PIN_PC4, + .vbus_pin = AT91_PIN_PC5, + .pullup_active_low = 1, /* Active Low due to PNP transistor (pg 7) */ -/*static struct canbus_platform_data can_info = { - .model = 2510, }; -*/ - -static struct spi_board_info yl_9200_spi_devices[] = { -/*this sticks it at: - /sys/devices/platform/atmel_spi.0/spi0.0 - /sys/bus/platform/devices/ -Documentation/spi IIRC*/ -#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) - /*(this IS correct 04-NOV-2007)*/ - { - .modalias = "ads7846", /* because the driver is called ads7846*/ - .chip_select = 0, /*THIS MUST BE AN INDEX INTO AN ARRAY OF pins */ -/*this is ONLY TO BE USED if chipselect above is not used, it passes a pin directly for the chip select*/ - /*.controller_data =AT91_PIN_PA3 ,*/ - .max_speed_hz = 5000*26, /*(4700 * 26)-125000 * 26, (max sample rate @ 3V) * (cmd + data + overhead) */ - .bus_num = 0, - .platform_data = &ads_info, - .irq = AT91_PIN_PB11, - }, -#endif -/*we need to put our CAN driver data here!!*/ -/*THIS IS ALL DUMMY DATA*/ -/* { - .modalias = "mcp2510", //DUMMY for MCP2510 chip - .chip_select = 1,*/ /*THIS MUST BE AN INDEX INTO AN ARRAY OF pins */ - /*this is ONLY TO BE USED if chipselect above is not used, it passes a pin directly for the chip select */ - /* .controller_data =AT91_PIN_PA4 , - .max_speed_hz = 25000 * 26, - .bus_num = 0, - .platform_data = &can_info, - .irq = AT91_PIN_PC0, - }, - */ - //max SPI chip needs to go here +/* + * MMC + */ +static struct at91_mmc_data __initdata yl9200_mmc_data = { + .det_pin = AT91_PIN_PB9, + // .wp_pin = ... not connected + .wire4 = 1, }; -static struct mtd_partition __initdata yl_9200_nand_partition[] = { +/* + * NAND Flash + */ +static struct mtd_partition __initdata yl9200_nand_partition[] = { { .name = "AT91 NAND partition 1, boot", .offset = 0, @@ -242,442 +171,434 @@ static struct mtd_partition __initdata yl_9200_nand_partition[] = { .name = "AT91 NAND partition 5, ext-fs", .offset = 32 * SZ_1M, .size = 32 * SZ_1M - }, + } }; static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) { - *num_partitions = ARRAY_SIZE(yl_9200_nand_partition); - return yl_9200_nand_partition; + *num_partitions = ARRAY_SIZE(yl9200_nand_partition); + return yl9200_nand_partition; } -static struct at91_nand_data __initdata yl_9200_nand_data = { - .ale= 6, - .cle= 7, - /*.det_pin = AT91_PIN_PCxx,*/ /*we don't have a det pin because NandFlash is fixed to board*/ - .rdy_pin = AT91_PIN_PC14, /*R/!B Sheet10*/ - .enable_pin = AT91_PIN_PC15, /*!CE Sheet10 */ +static struct atmel_nand_data __initdata yl9200_nand_data = { + .ale = 6, + .cle = 7, + // .det_pin = ... not connected + .rdy_pin = AT91_PIN_PC14, /* R/!B (Sheet10) */ + .enable_pin = AT91_PIN_PC15, /* !CE (Sheet10) */ .partition_info = nand_partitions, }; - - /* -TODO S.Birtles -potentially a problem with the size above -physmap platform flash device: 00800000 at 10000000 -physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank -NOR chip too large to fit in mapping. Attempting to cope... - Intel/Sharp Extended Query Table at 0x0031 -Using buffer write method -cfi_cmdset_0001: Erase suspend on write enabled -Reducing visibility of 16384KiB chip to 8192KiB -*/ + * NOR Flash + */ +#define YL9200_FLASH_BASE AT91_CHIPSELECT_0 +#define YL9200_FLASH_SIZE 0x1000000 -static struct mtd_partition yl_9200_flash_partitions[] = { +static struct mtd_partition yl9200_flash_partitions[] = { + { + .name = "Bootloader", + .size = 0x00040000, + .offset = 0, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, { - .name = "Bootloader", - .size = 0x00040000, - .offset = 0, - .mask_flags = MTD_WRITEABLE /* force read-only */ - },{ - .name = "Kernel", - .size = 0x001C0000, - .offset = 0x00040000, - },{ - .name = "Filesystem", - .size = MTDPART_SIZ_FULL, - .offset = 0x00200000 + .name = "Kernel", + .size = 0x001C0000, + .offset = 0x00040000, + }, + { + .name = "Filesystem", + .size = MTDPART_SIZ_FULL, + .offset = 0x00200000 } - }; -static struct physmap_flash_data yl_9200_flash_data = { - .width = 2, - .parts = yl_9200_flash_partitions, - .nr_parts = ARRAY_SIZE(yl_9200_flash_partitions), +static struct physmap_flash_data yl9200_flash_data = { + .width = 2, + .parts = yl9200_flash_partitions, + .nr_parts = ARRAY_SIZE(yl9200_flash_partitions), }; -static struct resource yl_9200_flash_resources[] = { -{ - .start = YL_9200_FLASH_BASE, - .end = YL_9200_FLASH_BASE + YL_9200_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, +static struct resource yl9200_flash_resources[] = { + { + .start = YL9200_FLASH_BASE, + .end = YL9200_FLASH_BASE + YL9200_FLASH_SIZE - 1, + .flags = IORESOURCE_MEM, } }; -static struct platform_device yl_9200_flash = { +static struct platform_device yl9200_flash = { .name = "physmap-flash", .id = 0, .dev = { - .platform_data = &yl_9200_flash_data, + .platform_data = &yl9200_flash_data, }, - .resource = yl_9200_flash_resources, - .num_resources = ARRAY_SIZE(yl_9200_flash_resources), + .resource = yl9200_flash_resources, + .num_resources = ARRAY_SIZE(yl9200_flash_resources), }; - -static struct gpio_led yl_9200_leds[] = { -/*D2 &D3 are passed directly in via at91_init_leds*/ - { - .name = "led4", /*D4*/ - .gpio = AT91_PIN_PB15, - .active_low = 1, - .default_trigger = "heartbeat", - /*.default_trigger = "timer",*/ - }, - { - .name = "led5", /*D5*/ - .gpio = AT91_PIN_PB8, - .active_low = 1, - .default_trigger = "heartbeat", - } -}; - -//static struct gpio_sounder yl_9200_sounder[] = {*/ -/*This is a simple speaker attached to a gpo line*/ - -// { -// .name = "Speaker", /*LS1*/ -// .gpio = AT91_PIN_PA22, -// .active_low = 0, -// .default_trigger = "heartbeat", - /*.default_trigger = "timer",*/ -// }, -//}; - - - -static struct i2c_board_info __initdata yl_9200_i2c_devices[] = { - { - /*TODO*/ - I2C_BOARD_INFO("CS4334", 0x00), +/* + * I2C (TWI) + */ +static struct i2c_board_info __initdata yl9200_i2c_devices[] = { + { /* EEPROM */ + I2C_BOARD_INFO("24c128", 0x50), } }; - - /* +/* * GPIO Buttons - */ +*/ #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) -static struct gpio_keys_button yl_9200_buttons[] = { +static struct gpio_keys_button yl9200_buttons[] = { { .gpio = AT91_PIN_PA24, - .code = BTN_2, + .code = BTN_2, .desc = "SW2", .active_low = 1, .wakeup = 1, }, { .gpio = AT91_PIN_PB1, - .code = BTN_3, + .code = BTN_3, .desc = "SW3", .active_low = 1, .wakeup = 1, }, { .gpio = AT91_PIN_PB2, - .code = BTN_4, + .code = BTN_4, .desc = "SW4", .active_low = 1, .wakeup = 1, }, { .gpio = AT91_PIN_PB6, - .code = BTN_5, + .code = BTN_5, .desc = "SW5", .active_low = 1, .wakeup = 1, - }, - + } }; -static struct gpio_keys_platform_data yl_9200_button_data = { - .buttons = yl_9200_buttons, - .nbuttons = ARRAY_SIZE(yl_9200_buttons), +static struct gpio_keys_platform_data yl9200_button_data = { + .buttons = yl9200_buttons, + .nbuttons = ARRAY_SIZE(yl9200_buttons), }; -static struct platform_device yl_9200_button_device = { +static struct platform_device yl9200_button_device = { .name = "gpio-keys", .id = -1, .num_resources = 0, .dev = { - .platform_data = &yl_9200_button_data, + .platform_data = &yl9200_button_data, } }; -static void __init yl_9200_add_device_buttons(void) +static void __init yl9200_add_device_buttons(void) { - //SW2 - at91_set_gpio_input(AT91_PIN_PA24, 0); + at91_set_gpio_input(AT91_PIN_PA24, 1); /* SW2 */ at91_set_deglitch(AT91_PIN_PA24, 1); - - //SW3 - at91_set_gpio_input(AT91_PIN_PB1, 0); + at91_set_gpio_input(AT91_PIN_PB1, 1); /* SW3 */ at91_set_deglitch(AT91_PIN_PB1, 1); - //SW4 - at91_set_gpio_input(AT91_PIN_PB2, 0); + at91_set_gpio_input(AT91_PIN_PB2, 1); /* SW4 */ at91_set_deglitch(AT91_PIN_PB2, 1); - - //SW5 - at91_set_gpio_input(AT91_PIN_PB6, 0); + at91_set_gpio_input(AT91_PIN_PB6, 1); /* SW5 */ at91_set_deglitch(AT91_PIN_PB6, 1); + /* Enable buttons (Sheet 5) */ + at91_set_gpio_output(AT91_PIN_PB7, 1); + + platform_device_register(&yl9200_button_device); +} +#else +static void __init yl9200_add_device_buttons(void) {} +#endif + +/* + * Touchscreen + */ +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) +static int ads7843_pendown_state(void) +{ + return !at91_get_gpio_value(AT91_PIN_PB11); /* Touchscreen PENIRQ */ +} + +static struct ads7846_platform_data ads_info = { + .model = 7843, + .x_min = 150, + .x_max = 3830, + .y_min = 190, + .y_max = 3830, + .vref_delay_usecs = 100, + + /* For a 8" touch-screen */ + // .x_plate_ohms = 603, + // .y_plate_ohms = 332, + + /* For a 10.4" touch-screen */ + // .x_plate_ohms = 611, + // .y_plate_ohms = 325, + + .x_plate_ohms = 576, + .y_plate_ohms = 366, + + .pressure_max = 15000, /* generally nonsense on the 7843 */ + .debounce_max = 1, + .debounce_rep = 0, + .debounce_tol = (~0), + .get_pendown_state = ads7843_pendown_state, +}; - at91_set_gpio_output(AT91_PIN_PB7, 1); /* #TURN BUTTONS ON, SHEET 5 of schematics */ - platform_device_register(&yl_9200_button_device); +static void __init yl9200_add_device_ts(void) +{ + at91_set_gpio_input(AT91_PIN_PB11, 1); /* Touchscreen interrupt pin */ + at91_set_gpio_input(AT91_PIN_PB10, 1); /* Touchscreen BUSY signal - not used! */ } #else -static void __init yl_9200_add_device_buttons(void) {} +static void __init yl9200_add_device_ts(void) {} +#endif + +/* + * SPI devices + */ +static struct spi_board_info yl9200_spi_devices[] = { +#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) + { /* Touchscreen */ + .modalias = "ads7846", + .chip_select = 0, + .max_speed_hz = 5000 * 26, + .platform_data = &ads_info, + .irq = AT91_PIN_PB11, + }, #endif + { /* CAN */ + .modalias = "mcp2510", + .chip_select = 1, + .max_speed_hz = 25000 * 26, + .irq = AT91_PIN_PC0, + } +}; +/* + * LCD / VGA + * + * EPSON S1D13806 FB (discontinued chip) + * EPSON S1D13506 FB + */ #if defined(CONFIG_FB_S1D135XX) || defined(CONFIG_FB_S1D13XXX_MODULE) #include
with the' + @echo ' name of a dts file from the arch/$(ARCH)/boot/dts/ directory' + @echo ' (minus the .dts extension).' endef install: diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 095e04db1c0e1f75e39cbd01c6419c8b890295c2..14174aa240744783d6c0d77748a9b714d6cebea0 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -35,6 +35,8 @@ endif BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt +DTS_FLAGS ?= -p 1024 + $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 @@ -63,10 +65,10 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ - fixed-head.S ep88xc.c ep405.c \ + fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \ cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ - virtex405-head.S + virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot)) @@ -161,12 +163,12 @@ quiet_cmd_flex = FLEX $@ cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped $(obj)/dtc-src/dtc-parser.tab.c: $(src)/dtc-src/dtc-parser.y FORCE - $(call if_changed,bison) + $(call if_changed,bison) $(obj)/dtc-src/dtc-parser.tab.h: $(obj)/dtc-src/dtc-parser.tab.c $(obj)/dtc-src/dtc-lexer.lex.c: $(src)/dtc-src/dtc-lexer.l FORCE - $(call if_changed,flex) + $(call if_changed,flex) endif ############# @@ -213,6 +215,7 @@ image-$(CONFIG_WALNUT) += treeImage.walnut # Board ports in arch/powerpc/platform/44x/Kconfig image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo +image-$(CONFIG_SAM440EP) += cuImage.sam440ep image-$(CONFIG_SEQUOIA) += cuImage.sequoia image-$(CONFIG_RAINIER) += cuImage.rainier image-$(CONFIG_TAISHAN) += cuImage.taishan @@ -242,6 +245,7 @@ image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \ cuImage.mpc8349emitxgp image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds +image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot # Board ports in arch/powerpc/platform/85xx/Kconfig image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads @@ -254,6 +258,7 @@ image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \ cuImage.mpc8572ds image-$(CONFIG_TQM8540) += cuImage.tqm8540 image-$(CONFIG_TQM8541) += cuImage.tqm8541 +image-$(CONFIG_TQM8548) += cuImage.tqm8548 image-$(CONFIG_TQM8555) += cuImage.tqm8555 image-$(CONFIG_TQM8560) += cuImage.tqm8560 image-$(CONFIG_SBC8548) += cuImage.sbc8548 @@ -263,6 +268,7 @@ image-$(CONFIG_KSI8560) += cuImage.ksi8560 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig image-$(CONFIG_STORCENTER) += cuImage.storcenter image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 +image-$(CONFIG_PPC_C2K) += cuImage.c2k # For 32-bit powermacs, build the COFF and miboot images # as well as the ELF images. @@ -270,6 +276,9 @@ ifeq ($(CONFIG_PPC32),y) image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot endif +# Allow extra targets to be added to the defconfig +image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS)) + initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-)) initrd-y := $(patsubst zImage%, zImage.initrd%, \ $(patsubst dtbImage%, dtbImage.initrd%, \ diff --git a/arch/powerpc/boot/addnote.c b/arch/powerpc/boot/addnote.c index 8041a9845ab7efa9c94d58505a1d32c949b7e716..b1e5611b2ab1d639edd67346ca50f88d625b9629 100644 --- a/arch/powerpc/boot/addnote.c +++ b/arch/powerpc/boot/addnote.c @@ -25,7 +25,7 @@ char arch[] = "PowerPC"; #define N_DESCR 6 unsigned int descr[N_DESCR] = { 0xffffffff, /* real-mode = true */ - 0x00c00000, /* real-base, i.e. where we expect OF to be */ + 0x02000000, /* real-base, i.e. where we expect OF to be */ 0xffffffff, /* real-size */ 0xffffffff, /* virt-base */ 0xffffffff, /* virt-size */ diff --git a/arch/powerpc/boot/cuboot-c2k.c b/arch/powerpc/boot/cuboot-c2k.c new file mode 100644 index 0000000000000000000000000000000000000000..e43594950ba38467a056839193f92ed4971c617c --- /dev/null +++ b/arch/powerpc/boot/cuboot-c2k.c @@ -0,0 +1,190 @@ +/* + * GEFanuc C2K platform code. + * + * Author: Remi Machet + * + * Originated from prpmc2800.c + * + * 2008 (c) Stanford University + * 2007 (c) MontaVista, Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "types.h" +#include "stdio.h" +#include "io.h" +#include "ops.h" +#include "elf.h" +#include "gunzip_util.h" +#include "mv64x60.h" +#include "cuboot.h" +#include "ppcboot.h" + +static u8 *bridge_base; + +static void c2k_bridge_setup(u32 mem_size) +{ + u32 i, v[30], enables, acc_bits; + u32 pci_base_hi, pci_base_lo, size, buf[2]; + unsigned long cpu_base; + int rc; + void *devp, *mv64x60_devp; + u8 *bridge_pbase, is_coherent; + struct mv64x60_cpu2pci_win *tbl; + int bus; + + bridge_pbase = mv64x60_get_bridge_pbase(); + is_coherent = mv64x60_is_coherent(); + + if (is_coherent) + acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB + | MV64x60_PCI_ACC_CNTL_SWAP_NONE + | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES + | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES; + else + acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE + | MV64x60_PCI_ACC_CNTL_SWAP_NONE + | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES + | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES; + + mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent); + mv64x60_devp = find_node_by_compatible(NULL, "marvell,mv64360"); + if (mv64x60_devp == NULL) + fatal("Error: Missing marvell,mv64360 device tree node\n\r"); + + enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); + enables |= 0x007ffe00; /* Disable all cpu->pci windows */ + out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables); + + /* Get the cpu -> pci i/o & mem mappings from the device tree */ + devp = NULL; + for (bus = 0; ; bus++) { + char name[] = "pci "; + + name[strlen(name)-1] = bus+'0'; + + devp = find_node_by_alias(name); + if (devp == NULL) + break; + + if (bus >= 2) + fatal("Error: Only 2 PCI controllers are supported at" \ + " this time.\n"); + + mv64x60_config_pci_windows(bridge_base, bridge_pbase, bus, 0, + mem_size, acc_bits); + + rc = getprop(devp, "ranges", v, sizeof(v)); + if (rc == 0) + fatal("Error: Can't find marvell,mv64360-pci ranges" + " property\n\r"); + + /* Get the cpu -> pci i/o & mem mappings from the device tree */ + + for (i = 0; i < rc; i += 6) { + switch (v[i] & 0xff000000) { + case 0x01000000: /* PCI I/O Space */ + tbl = mv64x60_cpu2pci_io; + break; + case 0x02000000: /* PCI MEM Space */ + tbl = mv64x60_cpu2pci_mem; + break; + default: + continue; + } + + pci_base_hi = v[i+1]; + pci_base_lo = v[i+2]; + cpu_base = v[i+3]; + size = v[i+5]; + + buf[0] = cpu_base; + buf[1] = size; + + if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base)) + fatal("Error: Can't translate PCI address " \ + "0x%x\n\r", (u32)cpu_base); + + mv64x60_config_cpu2pci_window(bridge_base, bus, + pci_base_hi, pci_base_lo, cpu_base, size, tbl); + } + + enables &= ~(3<<(9+bus*5)); /* Enable cpu->pci i/o, + cpu->pci mem0 */ + out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), + enables); + }; +} + +static void c2k_fixups(void) +{ + u32 mem_size; + + mem_size = mv64x60_get_mem_size(bridge_base); + c2k_bridge_setup(mem_size); /* Do necessary bridge setup */ +} + +#define MV64x60_MPP_CNTL_0 0xf000 +#define MV64x60_MPP_CNTL_2 0xf008 +#define MV64x60_GPP_IO_CNTL 0xf100 +#define MV64x60_GPP_LEVEL_CNTL 0xf110 +#define MV64x60_GPP_VALUE_SET 0xf118 + +static void c2k_reset(void) +{ + u32 temp; + + udelay(5000000); + + if (bridge_base != 0) { + temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); + temp &= 0xFFFF0FFF; + out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); + + temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); + temp |= 0x00000004; + out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); + + temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); + temp |= 0x00000004; + out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); + + temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); + temp &= 0xFFFF0FFF; + out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); + + temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); + temp |= 0x00080000; + out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); + + temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); + temp |= 0x00080000; + out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); + + out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET), + 0x00080004); + } + + for (;;); +} + +static bd_t bd; + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + CUBOOT_INIT(); + + fdt_init(_dtb_start); + + bridge_base = mv64x60_get_bridge_base(); + + platform_ops.fixups = c2k_fixups; + platform_ops.exit = c2k_reset; + + if (serial_console_init() < 0) + exit(); +} diff --git a/arch/powerpc/boot/cuboot-sam440ep.c b/arch/powerpc/boot/cuboot-sam440ep.c new file mode 100644 index 0000000000000000000000000000000000000000..ec10a47460dd0e278e34dea6b31405cf521a6470 --- /dev/null +++ b/arch/powerpc/boot/cuboot-sam440ep.c @@ -0,0 +1,49 @@ +/* + * Old U-boot compatibility for Sam440ep based off bamboo.c code + * original copyrights below + * + * Author: Josh Boyer + * + * Copyright 2007 IBM Corporation + * + * Based on cuboot-ebony.c + * + * Modified from cuboot-bamboo.c for sam440ep: + * Copyright 2008 Giuseppe Coviello + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "44x.h" +#include "4xx.h" +#include "cuboot.h" + +#define TARGET_4xx +#define TARGET_44x +#include "ppcboot.h" + +static bd_t bd; + +static void sam440ep_fixups(void) +{ + unsigned long sysclk = 66666666; + + ibm440ep_fixup_clocks(sysclk, 11059200, 25000000); + ibm4xx_sdram_fixup_memsize(); + ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + CUBOOT_INIT(); + platform_ops.fixups = sam440ep_fixups; + platform_ops.exit = ibm44x_dbcr_reset; + fdt_init(_dtb_start); + serial_console_init(); +} diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c index eb108a877492adad8771416e749655999111f7f4..21780210057d287ef9a46cc9e32fc5511074b2b4 100644 --- a/arch/powerpc/boot/cuboot-warp.c +++ b/arch/powerpc/boot/cuboot-warp.c @@ -10,6 +10,7 @@ #include "ops.h" #include "4xx.h" #include "cuboot.h" +#include "stdio.h" #define TARGET_4xx #define TARGET_44x @@ -17,14 +18,54 @@ static bd_t bd; -static void warp_fixups(void) +static void warp_fixup_one_nor(u32 from, u32 to) { - unsigned long sysclk = 66000000; + void *devp; + char name[50]; + u32 v[2]; + + sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from); + + devp = finddevice(name); + if (!devp) + return; + + if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { + v[0] = to; + setprop(devp, "reg", v, sizeof(v)); + + printf("NOR 64M fixup %x -> %x\r\n", from, to); + } +} + - ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); +static void warp_fixups(void) +{ + ibm440ep_fixup_clocks(66000000, 11059200, 50000000); ibm4xx_sdram_fixup_memsize(); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + + /* Fixup for 64M flash on Rev A boards. */ + if (bd.bi_flashsize == 0x4000000) { + void *devp; + u32 v[3]; + + devp = finddevice("/plb/opb/ebc/nor_flash@0,0"); + if (!devp) + return; + + /* Fixup the size */ + if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { + v[2] = bd.bi_flashsize; + setprop(devp, "reg", v, sizeof(v)); + } + + /* Fixup parition offsets */ + warp_fixup_one_nor(0x300000, 0x3f00000); + warp_fixup_one_nor(0x340000, 0x3f40000); + warp_fixup_one_nor(0x380000, 0x3f80000); + } } diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts new file mode 100644 index 0000000000000000000000000000000000000000..8b1bb0e41905c422a30697c7ae04b9e008589ffb --- /dev/null +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts @@ -0,0 +1,282 @@ +/* + * Analogue & Micro ASP8347 Device Tree Source + * + * Copyright 2008 Codehermit + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "Analogue & Micro ASP8347E"; + compatible = "analogue-and-micro,asp8347e"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8347@0 { + device_type = "cpu"; + reg = <0x0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x8000000>; // 128MB at 0 + }; + + localbus@ff005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8347e-localbus", + "fsl,pq2pro-localbus", + "simple-bus"; + reg = <0xff005000 0x1000>; + interrupts = <77 0x8>; + interrupt-parent = <&ipic>; + + ranges = < + 0 0 0xf0000000 0x02000000 + >; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + soc8349@ff000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xff000000 0x00100000>; + reg = <0xff000000 0x00000200>; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + + rtc@68 { + compatible = "dallas,ds1374"; + reg = <0x68>; + }; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <15 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + spi@7000 { + cell-index = <0>; + compatible = "fsl,spi"; + reg = <0x7000 0x1000>; + interrupts = <16 0x8>; + interrupt-parent = <&ipic>; + mode = "cpu"; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8347-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + + /* phy type (ULPI or SERIAL) are only types supported for MPH */ + /* port = 0 or 1 */ + usb@22000 { + compatible = "fsl-usb2-mph"; + reg = <0x22000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&ipic>; + interrupts = <39 0x8>; + phy_type = "ulpi"; + port1; + }; + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + compatible = "fsl-usb2-dr"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&ipic>; + interrupts = <38 0x8>; + dr_mode = "otg"; + phy_type = "ulpi"; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&ipic>; + interrupts = <17 0x8>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&ipic>; + interrupts = <18 0x8>; + reg = <0x2>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 08 e5 11 32 33 ]; + interrupts = <32 0x8 33 0x8 34 0x8>; + interrupt-parent = <&ipic>; + phy-handle = <&phy0>; + linux,network-index = <0>; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 08 e5 11 32 34 ]; + interrupts = <35 0x8 36 0x8 37 0x8>; + interrupt-parent = <&ipic>; + phy-handle = <&phy1>; + linux,network-index = <1>; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <400000000>; + interrupts = <9 0x8>; + interrupt-parent = <&ipic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <400000000>; + interrupts = <10 0x8>; + interrupt-parent = <&ipic>; + }; + + /* May need to remove if on a part without crypto engine */ + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <0x30000 0x10000>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x0000007e>; + /* desc mask is for rev2.0, + * we need runtime fixup for >2.0 */ + descriptor-types-mask = <0x01010ebf>; + }; + + /* IPIC + * interrupts cell = + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + ipic: pic@700 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x700 0x100>; + device_type = "ipic"; + }; + }; + + chosen { + bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; + linux,stdout-path = &serial0; + }; + +}; diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index ba2521bdaab1ccdb7423acaa97ec9ea47985934d..6ce0cc2c0208e311e7924903d511f1c998a9ce4c 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts @@ -11,12 +11,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,bamboo"; compatible = "amcc,bamboo"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -34,13 +36,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440EP"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -48,14 +50,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -65,22 +67,22 @@ compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440ep"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440ep"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -92,29 +94,29 @@ SDRAM0: sdram { compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; DMA0: dma { compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; + interrupt-map = ; }; POB0: opb { @@ -124,101 +126,101 @@ /* Bamboo is oddball in the 44x world and doesn't use the ERPN * bits. */ - ranges = <00000000 0 00000000 80000000 - 80000000 0 80000000 80000000>; + ranges = <0x00000000 0x00000000 0x00000000 0x80000000 + 0x80000000 0x00000000 0x80000000 0x80000000>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; }; UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <4 4>; + interrupts = <0x4 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; EMAC0: ethernet@ef600e00 { device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = ; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0xef600e00 0x00000070>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0 1>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <0>; }; @@ -227,26 +229,26 @@ device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1e 4 1f 4>; - reg = ; + interrupts = <0x1e 0x4 0x1f 0x4>; + reg = <0xef600f00 0x00000070>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <2 3>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <1>; }; usb@ef601000 { compatible = "ohci-be"; - reg = ; - interrupts = <8 1 9 1>; + reg = <0xef601000 0x00000080>; + interrupts = <0x8 0x1 0x9 0x1>; interrupt-parent = < &UIC1 >; }; }; @@ -258,35 +260,35 @@ #address-cells = <3>; compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; primary; - reg = <0 eec00000 8 /* Config space access */ - 0 eed00000 4 /* IACK */ - 0 eed00000 4 /* Special cycle */ - 0 ef400000 40>; /* Internal registers */ + reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ + 0x00000000 0xeed00000 0x00000004 /* IACK */ + 0x00000000 0xeed00000 0x00000004 /* Special cycle */ + 0x00000000 0xef400000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <02000000 0 a0000000 0 a0000000 0 20000000 - 01000000 0 00000000 0 e8000000 0 00010000>; + ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 + 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* Bamboo has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x0>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 0 &UIC0 1c 8 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 /* IDSEL 2 */ - 1000 0 0 0 &UIC0 1b 8 + 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 /* IDSEL 3 */ - 1800 0 0 0 &UIC0 1a 8 + 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 /* IDSEL 4 */ - 2000 0 0 0 &UIC0 19 8 + 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts new file mode 100644 index 0000000000000000000000000000000000000000..f5d625fa3e523c8019c62a89c970dc9cb4cf202c --- /dev/null +++ b/arch/powerpc/boot/dts/c2k.dts @@ -0,0 +1,371 @@ +/* Device Tree Source for GEFanuc C2K + * + * Author: Remi Machet + * + * Originated from prpmc2800.dts + * + * 2008 (c) Stanford University + * 2007 (c) MontaVista, Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "C2K"; + compatible = "GEFanuc,C2K"; + coherency-off; + + aliases { + pci0 = &PCI0; + pci1 = &PCI1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "PowerPC,7447"; + reg = <0>; + clock-frequency = <996000000>; /* 996 MHz */ + bus-frequency = <166666667>; /* 166.6666 MHz */ + timebase-frequency = <41666667>; /* 166.6666/4 MHz */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1GB */ + }; + + system-controller@d8000000 { /* Marvell Discovery */ + #address-cells = <1>; + #size-cells = <1>; + model = "mv64460"; + compatible = "marvell,mv64360"; + clock-frequency = <166666667>; /* 166.66... MHz */ + reg = <0xd8000000 0x00010000>; + virtual-reg = <0xd8000000>; + ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */ + 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */ + 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */ + 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */ + 0xd8100000 0xd8100000 0x00010000 /* FPGA */ + 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */ + 0xf8000000 0xf8000000 0x08000000 /* User FLASH */ + 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */ + 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */ + + mdio@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,mv64360-mdio"; + reg = <0x2000 4>; + PHY0: ethernet-phy@0 { + device_type = "ethernet-phy"; + interrupts = <76>; /* GPP 12 */ + interrupt-parent = <&PIC>; + reg = <0>; + }; + PHY1: ethernet-phy@1 { + device_type = "ethernet-phy"; + interrupts = <76>; /* GPP 12 */ + interrupt-parent = <&PIC>; + reg = <1>; + }; + PHY2: ethernet-phy@2 { + device_type = "ethernet-phy"; + interrupts = <76>; /* GPP 12 */ + interrupt-parent = <&PIC>; + reg = <2>; + }; + }; + + ethernet-group@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,mv64360-eth-group"; + reg = <0x2000 0x2000>; + ethernet@0 { + device_type = "network"; + compatible = "marvell,mv64360-eth"; + reg = <0>; + interrupts = <32>; + interrupt-parent = <&PIC>; + phy = <&PHY0>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@1 { + device_type = "network"; + compatible = "marvell,mv64360-eth"; + reg = <1>; + interrupts = <33>; + interrupt-parent = <&PIC>; + phy = <&PHY1>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + ethernet@2 { + device_type = "network"; + compatible = "marvell,mv64360-eth"; + reg = <2>; + interrupts = <34>; + interrupt-parent = <&PIC>; + phy = <&PHY2>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + }; + + SDMA0: sdma@4000 { + compatible = "marvell,mv64360-sdma"; + reg = <0x4000 0xc18>; + virtual-reg = <0xd8004000>; + interrupt-base = <0>; + interrupts = <36>; + interrupt-parent = <&PIC>; + }; + + SDMA1: sdma@6000 { + compatible = "marvell,mv64360-sdma"; + reg = <0x6000 0xc18>; + virtual-reg = <0xd8006000>; + interrupt-base = <0>; + interrupts = <38>; + interrupt-parent = <&PIC>; + }; + + BRG0: brg@b200 { + compatible = "marvell,mv64360-brg"; + reg = <0xb200 0x8>; + clock-src = <8>; + clock-frequency = <133333333>; + current-speed = <115200>; + }; + + BRG1: brg@b208 { + compatible = "marvell,mv64360-brg"; + reg = <0xb208 0x8>; + clock-src = <8>; + clock-frequency = <133333333>; + current-speed = <115200>; + }; + + CUNIT: cunit@f200 { + reg = <0xf200 0x200>; + }; + + MPSCROUTING: mpscrouting@b400 { + reg = <0xb400 0xc>; + }; + + MPSCINTR: mpscintr@b800 { + reg = <0xb800 0x100>; + virtual-reg = <0xd800b800>; + }; + + MPSC0: mpsc@8000 { + device_type = "serial"; + compatible = "marvell,mv64360-mpsc"; + reg = <0x8000 0x38>; + virtual-reg = <0xd8008000>; + sdma = <&SDMA0>; + brg = <&BRG0>; + cunit = <&CUNIT>; + mpscrouting = <&MPSCROUTING>; + mpscintr = <&MPSCINTR>; + cell-index = <0>; + interrupts = <40>; + interrupt-parent = <&PIC>; + }; + + MPSC1: mpsc@9000 { + device_type = "serial"; + compatible = "marvell,mv64360-mpsc"; + reg = <0x9000 0x38>; + virtual-reg = <0xd8009000>; + sdma = <&SDMA1>; + brg = <&BRG1>; + cunit = <&CUNIT>; + mpscrouting = <&MPSCROUTING>; + mpscintr = <&MPSCINTR>; + cell-index = <1>; + interrupts = <42>; + interrupt-parent = <&PIC>; + }; + + wdt@b410 { /* watchdog timer */ + compatible = "marvell,mv64360-wdt"; + reg = <0xb410 0x8>; + }; + + i2c@c000 { + compatible = "marvell,mv64360-i2c"; + reg = <0xc000 0x20>; + virtual-reg = <0xd800c000>; + interrupts = <37>; + interrupt-parent = <&PIC>; + }; + + PIC: pic { + #interrupt-cells = <1>; + #address-cells = <0>; + compatible = "marvell,mv64360-pic"; + reg = <0x0000 0x88>; + interrupt-controller; + }; + + mpp@f000 { + compatible = "marvell,mv64360-mpp"; + reg = <0xf000 0x10>; + }; + + gpp@f100 { + compatible = "marvell,mv64360-gpp"; + reg = <0xf100 0x20>; + }; + + PCI0: pci@80000000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "marvell,mv64360-pci"; + reg = <0x0cf8 0x8>; + ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000 + 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>; + bus-range = <0 255>; + clock-frequency = <66000000>; + interrupt-pci-iack = <0x0c34>; + interrupt-parent = <&PIC>; + interrupt-map-mask = <0x0000 0x0 0x0 0x7>; + interrupt-map = < + /* Only one interrupt line for PMC0 slot (INTA) */ + 0x0000 0 0 1 &PIC 88 + >; + }; + + + PCI1: pci@a0000000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "marvell,mv64360-pci"; + reg = <0x0c78 0x8>; + ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000 + 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>; + bus-range = <0 255>; + clock-frequency = <66000000>; + interrupt-pci-iack = <0x0cb4>; + interrupt-parent = <&PIC>; + interrupt-map-mask = <0xf800 0x00 0x00 0x7>; + interrupt-map = < + /* IDSEL 0x01: PMC1 ? */ + 0x0800 0 0 1 &PIC 88 + /* IDSEL 0x02: cPCI bridge */ + 0x1000 0 0 1 &PIC 88 + /* IDSEL 0x03: USB controller */ + 0x1800 0 0 1 &PIC 91 + /* IDSEL 0x04: SATA controller */ + 0x2000 0 0 1 &PIC 95 + >; + }; + + cpu-error@0070 { + compatible = "marvell,mv64360-cpu-error"; + reg = <0x0070 0x10 0x0128 0x28>; + interrupts = <3>; + interrupt-parent = <&PIC>; + }; + + sram-ctrl@0380 { + compatible = "marvell,mv64360-sram-ctrl"; + reg = <0x0380 0x80>; + interrupts = <13>; + interrupt-parent = <&PIC>; + }; + + pci-error@1d40 { + compatible = "marvell,mv64360-pci-error"; + reg = <0x1d40 0x40 0x0c28 0x4>; + interrupts = <12>; + interrupt-parent = <&PIC>; + }; + + pci-error@1dc0 { + compatible = "marvell,mv64360-pci-error"; + reg = <0x1dc0 0x40 0x0ca8 0x4>; + interrupts = <16>; + interrupt-parent = <&PIC>; + }; + + mem-ctrl@1400 { + compatible = "marvell,mv64360-mem-ctrl"; + reg = <0x1400 0x60>; + interrupts = <17>; + interrupt-parent = <&PIC>; + }; + /* Devices attached to the device controller */ + devicebus@045c { + #address-cells = <2>; + #size-cells = <1>; + compatible = "marvell,mv64306-devctrl"; + reg = <0x45C 0x88>; + interrupts = <1>; + interrupt-parent = <&PIC>; + ranges = <0 0 0xd8100000 0x10000 + 2 0 0xd8110000 0x10000 + 4 0 0xf8000000 0x8000000>; + fpga@0,0 { + compatible = "sbs,fpga-c2k"; + reg = <0 0 0x10000>; + }; + fpga_usart@2,0 { + compatible = "sbs,fpga_usart-c2k"; + reg = <2 0 0x10000>; + }; + nor_flash@4,0 { + compatible = "cfi-flash"; + reg = <4 0 0x8000000>; /* 128MB */ + bank-width = <4>; + device-width = <1>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "boot"; + reg = <0x00000000 0x00080000>; + }; + partition@40000 { + label = "kernel"; + reg = <0x00080000 0x00400000>; + }; + partition@440000 { + label = "initrd"; + reg = <0x00480000 0x00B80000>; + }; + partition@1000000 { + label = "rootfs"; + reg = <0x01000000 0x06800000>; + }; + partition@7800000 { + label = "recovery"; + reg = <0x07800000 0x00800000>; + read-only; + }; + }; + }; + }; + chosen { + linux,stdout-path = &MPSC0; + }; +}; diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 39634124929b263aaa682ccfccb1d94739115038..79fe412c11c9c0d0dfcf14b737492095129c4197 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts @@ -8,12 +8,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,canyonlands"; compatible = "amcc,canyonlands"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -29,13 +31,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,460EX"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by U-Boot */ timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -43,14 +45,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by U-Boot */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-460ex","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -60,11 +62,11 @@ compatible = "ibm,uic-460ex","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -72,11 +74,11 @@ compatible = "ibm,uic-460ex","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = ; /* cascade */ + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -84,22 +86,22 @@ compatible = "ibm,uic-460ex","ibm,uic"; interrupt-controller; cell-index = <3>; - dcr-reg = <0f0 009>; + dcr-reg = <0x0f0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <10 4 11 4>; /* cascade */ + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-460ex"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-460ex"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -111,74 +113,74 @@ SDRAM0: sdram { compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; - num-rx-chans = <10>; + num-rx-chans = <16>; #address-cells = <0>; #size-cells = <0>; interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 6 4 - /*RXEOB*/ 7 4 - /*SERR*/ 3 4 - /*TXDE*/ 4 4 - /*RXDE*/ 5 4>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4>; }; POB0: opb { compatible = "ibm,opb-460ex", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = ; + ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; clock-frequency = <0>; /* Filled in by U-Boot */ EBC0: ebc { compatible = "ibm,ebc-460ex", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by U-Boot */ /* ranges property is supplied by U-Boot */ - interrupts = <6 4>; + interrupts = <0x6 0x4>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl512n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; - reg = <0 1e0000>; + reg = <0x00000000 0x001e0000>; }; partition@1e0000 { label = "dtb"; - reg = <1e0000 20000>; + reg = <0x001e0000 0x00020000>; }; partition@200000 { label = "ramdisk"; - reg = <200000 1400000>; + reg = <0x00200000 0x01400000>; }; partition@1600000 { label = "jffs2"; - reg = <1600000 400000>; + reg = <0x01600000 0x00400000>; }; partition@1a00000 { label = "user"; - reg = <1a00000 2560000>; + reg = <0x01a00000 0x02560000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; }; @@ -186,103 +188,103 @@ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1d 4>; + interrupts = <0x1d 0x4>; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1e 4>; + interrupts = <0x1e 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-460ex", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-460ex", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-460ex", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; RGMII0: emac-rgmii@ef601500 { compatible = "ibm,rgmii-460ex", "ibm,rgmii"; - reg = ; + reg = <0xef601500 0x00000008>; has-mdio; }; TAH0: emac-tah@ef601350 { compatible = "ibm,tah-460ex", "ibm,tah"; - reg = ; + reg = <0xef601350 0x00000030>; }; TAH1: emac-tah@ef601450 { compatible = "ibm,tah-460ex", "ibm,tah"; - reg = ; + reg = <0xef601450 0x00000030>; }; EMAC0: ethernet@ef600e00 { device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4"; + compatible = "ibm,emac-460ex", "ibm,emac4sync"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600e00 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <0>; tah-device = <&TAH0>; @@ -293,25 +295,25 @@ EMAC1: ethernet@ef600f00 { device_type = "network"; - compatible = "ibm,emac-460ex", "ibm,emac4"; + compatible = "ibm,emac-460ex", "ibm,emac4sync"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600f00 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <8>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <1>; tah-device = <&TAH1>; @@ -331,27 +333,27 @@ primary; large-inbound-windows; enable-msi-hole; - reg = ; /* Internal messaging registers */ + reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ + 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ + 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 - 01000000 0 00000000 0000000c 08000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0 to 0x3f */ - bus-range = <0 3f>; + bus-range = <0x0 0x3f>; /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0000 0 0 0>; - interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; }; PCIE0: pciex@d00000000 { @@ -361,23 +363,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <100 020>; - sdr-base = <300>; + port = <0x0>; /* port number */ + reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ + 0x0000000c 0x08010000 0x00001000>; /* Registers */ + dcr-reg = <0x100 0x020>; + sdr-base = <0x300>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 - 01000000 0 00000000 0000000f 80000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 40 to 0x7f */ - bus-range = <40 7f>; + bus-range = <0x40 0x7f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -387,12 +389,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; }; PCIE1: pciex@d20000000 { @@ -402,23 +404,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; primary; - port = <1>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <120 020>; - sdr-base = <340>; + port = <0x1>; /* port number */ + reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ + 0x0000000c 0x08011000 0x00001000>; /* Registers */ + dcr-reg = <0x120 0x020>; + sdr-base = <0x340>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 - 01000000 0 00000000 0000000f 80010000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 80 to 0xbf */ - bus-range = <80 bf>; + bus-range = <0x80 0xbf>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -428,12 +430,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; }; }; }; diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 5079dc890e0e47915f9c5dfce531093f0f26e618..ec2d142291b4981028f7af4bcfa23cb1cdeef3b7 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts @@ -11,12 +11,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "ibm,ebony"; compatible = "ibm,ebony"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -32,13 +34,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440GP"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; // Filled in by zImage timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; /* 32 kB */ - d-cache-size = <8000>; /* 32 kB */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; /* 32 kB */ + d-cache-size = <32768>; /* 32 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -46,14 +48,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; // Filled in by zImage + reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440gp", "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -64,17 +66,17 @@ compatible = "ibm,uic-440gp", "ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; CPC0: cpc { compatible = "ibm,cpc-440gp"; - dcr-reg = <0b0 003 0e0 010>; + dcr-reg = <0x0b0 0x003 0x0e0 0x010>; // FIXME: anything else? }; @@ -87,37 +89,37 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-440gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; // FIXME: anything else? }; SRAM0: sram { compatible = "ibm,sram-440gp"; - dcr-reg = <020 8 00a 1>; + dcr-reg = <0x020 0x008 0x00a 0x001>; }; DMA0: dma { // FIXME: ??? compatible = "ibm,dma-440gp"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <4>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { @@ -126,34 +128,34 @@ #size-cells = <1>; /* Wish there was a nicer way of specifying a full 32-bit range */ - ranges = <00000000 1 00000000 80000000 - 80000000 1 80000000 80000000>; - dcr-reg = <090 00b>; + ranges = <0x00000000 0x00000001 0x00000000 0x80000000 + 0x80000000 0x00000001 0x80000000 0x80000000>; + dcr-reg = <0x090 0x00b>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; // Filled in by zImage EBC0: ebc { compatible = "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; // Filled in by zImage // ranges property is supplied by zImage // based on firmware's configuration of the // EBC bridge - interrupts = <5 4>; + interrupts = <0x5 0x4>; interrupt-parent = <&UIC1>; small-flash@0,80000 { compatible = "jedec-flash"; bank-width = <1>; - reg = <0 80000 80000>; + reg = <0x00000000 0x00080000 0x00080000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "OpenBIOS"; - reg = <0 80000>; + reg = <0x00000000 0x00080000>; read-only; }; }; @@ -161,101 +163,101 @@ nvram@1,0 { /* NVRAM & RTC */ compatible = "ds1743-nvram"; - #bytes = <2000>; - reg = <1 0 2000>; + #bytes = <0x2000>; + reg = <0x00000001 0x00000000 0x00002000>; }; large-flash@2,0 { compatible = "jedec-flash"; bank-width = <1>; - reg = <2 0 400000>; + reg = <0x00000002 0x00000000 0x00400000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "fs"; - reg = <0 380000>; + reg = <0x00000000 0x00380000>; }; partition@380000 { label = "firmware"; - reg = <380000 80000>; + reg = <0x00380000 0x00080000>; }; }; ir@3,0 { - reg = <3 0 10>; + reg = <0x00000003 0x00000000 0x00000010>; }; fpga@7,0 { compatible = "Ebony-FPGA"; - reg = <7 0 10>; - virtual-reg = ; + reg = <0x00000007 0x00000000 0x00000010>; + virtual-reg = <0xe8300000>; }; }; UART0: serial@40000200 { device_type = "serial"; compatible = "ns16550"; - reg = <40000200 8>; - virtual-reg = ; - clock-frequency = ; - current-speed = <2580>; + reg = <0x40000200 0x00000008>; + virtual-reg = <0xe0000200>; + clock-frequency = <11059200>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@40000300 { device_type = "serial"; compatible = "ns16550"; - reg = <40000300 8>; - virtual-reg = ; - clock-frequency = ; - current-speed = <2580>; + reg = <0x40000300 0x00000008>; + virtual-reg = <0xe0000300>; + clock-frequency = <11059200>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC0: i2c@40000400 { /* FIXME */ compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <40000400 14>; + reg = <0x40000400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@40000500 { /* FIXME */ compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <40000500 14>; + reg = <0x40000500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; GPIO0: gpio@40000700 { /* FIXME */ compatible = "ibm,gpio-440gp"; - reg = <40000700 20>; + reg = <0x40000700 0x00000020>; }; ZMII0: emac-zmii@40000780 { compatible = "ibm,zmii-440gp", "ibm,zmii"; - reg = <40000780 c>; + reg = <0x40000780 0x0000000c>; }; EMAC0: ethernet@40000800 { device_type = "network"; compatible = "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = <40000800 70>; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0x40000800 0x00000070>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <0 1>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; zmii-device = <&ZMII0>; zmii-channel = <0>; }; @@ -263,18 +265,18 @@ device_type = "network"; compatible = "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1e 4 1f 4>; - reg = <40000900 70>; + interrupts = <0x1e 0x4 0x1f 0x4>; + reg = <0x40000900 0x00000070>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <2 3>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; zmii-device = <&ZMII0>; zmii-channel = <1>; }; @@ -282,9 +284,9 @@ GPT0: gpt@40000a00 { /* FIXME */ - reg = <40000a00 d4>; + reg = <0x40000a00 0x000000d4>; interrupt-parent = <&UIC0>; - interrupts = <12 4 13 4 14 4 15 4 16 4>; + interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; }; }; @@ -296,35 +298,35 @@ #address-cells = <3>; compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; primary; - reg = <2 0ec00000 8 /* Config space access */ - 0 0 0 /* no IACK cycles */ - 2 0ed00000 4 /* Special cycles */ - 2 0ec80000 f0 /* Internal registers */ - 2 0ec80100 fc>; /* Internal messaging registers */ + reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ + 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */ + 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 00000003 80000000 0 80000000 - 01000000 0 00000000 00000002 08000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* Ebony has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x0>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 0 &UIC0 17 8 + 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8 /* IDSEL 2 */ - 1000 0 0 0 &UIC0 18 8 + 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8 /* IDSEL 3 */ - 1800 0 0 0 &UIC0 19 8 + 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8 /* IDSEL 4 */ - 2000 0 0 0 &UIC0 1a 8 + 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts index 92938557ac8a576d9fd8d27e6412beb65d17d8e3..53ef06cc213401680a4c9fe5c814b9a2cc411172 100644 --- a/arch/powerpc/boot/dts/ep405.dts +++ b/arch/powerpc/boot/dts/ep405.dts @@ -9,12 +9,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; model = "ep405"; compatible = "ep405"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC; @@ -29,13 +31,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,405GP"; - reg = <0>; - clock-frequency = ; /* Filled in by zImage */ + reg = <0x00000000>; + clock-frequency = <200000000>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <4000>; - d-cache-size = <4000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; + d-cache-size = <16384>; dcr-controller; dcr-access-method = "native"; }; @@ -43,14 +45,14 @@ memory { device_type = "memory"; - reg = <0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller { compatible = "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 9>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -65,91 +67,91 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL: mcmal { compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <1>; num-rx-chans = <1>; interrupt-parent = <&UIC0>; interrupts = < - b 4 /* TXEOB */ - c 4 /* RXEOB */ - a 4 /* SERR */ - d 4 /* TXDE */ - e 4 /* RXDE */>; + 0xb 0x4 /* TXEOB */ + 0xc 0x4 /* RXEOB */ + 0xa 0x4 /* SERR */ + 0xd 0x4 /* TXDE */ + 0xe 0x4 /* RXDE */>; }; POB0: opb { compatible = "ibm,opb-405gp", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = ; - dcr-reg = <0a0 5>; + ranges = <0xef600000 0xef600000 0x00a00000>; + dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by zImage */ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <2580>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <2580>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC: i2c@ef600500 { compatible = "ibm,iic-405gp", "ibm,iic"; - reg = ; + reg = <0xef600500 0x00000011>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; GPIO: gpio@ef600700 { compatible = "ibm,gpio-405gp"; - reg = ; + reg = <0xef600700 0x00000020>; }; EMAC: ethernet@ef600800 { - linux,network-index = <0>; + linux,network-index = <0x0>; device_type = "network"; compatible = "ibm,emac-405gp", "ibm,emac"; interrupt-parent = <&UIC0>; interrupts = < - f 4 /* Ethernet */ - 9 4 /* Ethernet Wake Up */>; + 0xf 0x4 /* Ethernet */ + 0x9 0x4 /* Ethernet Wake Up */>; local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = ; + reg = <0xef600800 0x00000070>; mal-device = <&MAL>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; }; }; EBC0: ebc { compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; @@ -163,13 +165,13 @@ /* NVRAM and RTC */ nvrtc@4,200000 { compatible = "ds1742"; - reg = <4 200000 0>; /* size fixed up by zImage */ + reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */ }; /* "BCSR" CPLD contains a PCI irq controller */ bcsr@4,0 { compatible = "ep405-bcsr"; - reg = <4 0 10>; + reg = <0x00000004 0x00000000 0x00000010>; interrupt-controller; /* Routing table */ irq-routing = [ 00 /* SYSERR */ @@ -198,26 +200,26 @@ #address-cells = <3>; compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; primary; - reg = ; /* Internal registers */ + reg = <0xeec00000 0x00000008 /* Config space access */ + 0xeed80000 0x00000004 /* IACK */ + 0xeed80000 0x00000004 /* Special cycle */ + 0xef480000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <02000000 0 80000000 80000000 0 20000000 - 01000000 0 00000000 e8000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* That's all I know about IRQs on that thing ... */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x0>; interrupt-map = < /* USB */ - 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */ + 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */ >; }; }; diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts index 0f2fc077d8db4c181593e7bc836e60c647d18c3b..24cf0dba120c89f53933250688783db89cbc627a 100644 --- a/arch/powerpc/boot/dts/glacier.dts +++ b/arch/powerpc/boot/dts/glacier.dts @@ -8,12 +8,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,glacier"; compatible = "amcc,glacier", "amcc,canyonlands"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -31,13 +33,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,460GT"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by U-Boot */ timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -45,14 +47,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by U-Boot */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-460gt","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -62,11 +64,11 @@ compatible = "ibm,uic-460gt","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -74,11 +76,11 @@ compatible = "ibm,uic-460gt","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = ; /* cascade */ + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -86,22 +88,22 @@ compatible = "ibm,uic-460gt","ibm,uic"; interrupt-controller; cell-index = <3>; - dcr-reg = <0f0 009>; + dcr-reg = <0x0f0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <10 4 11 4>; /* cascade */ + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-460gt"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-460gt"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -113,75 +115,75 @@ SDRAM0: sdram { compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; - num-rx-chans = <20>; + num-rx-chans = <32>; #address-cells = <0>; #size-cells = <0>; interrupt-parent = <&UIC2>; - interrupts = < /*TXEOB*/ 6 4 - /*RXEOB*/ 7 4 - /*SERR*/ 3 4 - /*TXDE*/ 4 4 - /*RXDE*/ 5 4>; - desc-base-addr-high = <8>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4>; + desc-base-addr-high = <0x8>; }; POB0: opb { compatible = "ibm,opb-460gt", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = ; + ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; clock-frequency = <0>; /* Filled in by U-Boot */ EBC0: ebc { compatible = "ibm,ebc-460gt", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by U-Boot */ /* ranges property is supplied by U-Boot */ - interrupts = <6 4>; + interrupts = <0x6 0x4>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl512n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; - reg = <0 1e0000>; + reg = <0x00000000 0x001e0000>; }; partition@1e0000 { label = "dtb"; - reg = <1e0000 20000>; + reg = <0x001e0000 0x00020000>; }; partition@200000 { label = "ramdisk"; - reg = <200000 1400000>; + reg = <0x00200000 0x01400000>; }; partition@1600000 { label = "jffs2"; - reg = <1600000 400000>; + reg = <0x01600000 0x00400000>; }; partition@1a00000 { label = "user"; - reg = <1a00000 2560000>; + reg = <0x01a00000 0x02560000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; }; @@ -189,109 +191,109 @@ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1d 4>; + interrupts = <0x1d 0x4>; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; /* Filled in by U-Boot */ interrupt-parent = <&UIC1>; - interrupts = <1e 4>; + interrupts = <0x1e 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-460gt", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-460gt", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-460gt", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; RGMII0: emac-rgmii@ef601500 { compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = ; + reg = <0xef601500 0x00000008>; has-mdio; }; RGMII1: emac-rgmii@ef601600 { compatible = "ibm,rgmii-460gt", "ibm,rgmii"; - reg = ; + reg = <0xef601600 0x00000008>; has-mdio; }; TAH0: emac-tah@ef601350 { compatible = "ibm,tah-460gt", "ibm,tah"; - reg = ; + reg = <0xef601350 0x00000030>; }; TAH1: emac-tah@ef601450 { compatible = "ibm,tah-460gt", "ibm,tah"; - reg = ; + reg = <0xef601450 0x00000030>; }; EMAC0: ethernet@ef600e00 { device_type = "network"; compatible = "ibm,emac-460gt", "ibm,emac4"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600e00 0x00000074>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <0>; tah-device = <&TAH0>; @@ -304,23 +306,23 @@ device_type = "network"; compatible = "ibm,emac-460gt", "ibm,emac4"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600f00 0x00000074>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <8>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <1>; tah-device = <&TAH1>; @@ -334,23 +336,23 @@ device_type = "network"; compatible = "ibm,emac-460gt", "ibm,emac4"; interrupt-parent = <&EMAC2>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef601100 0x00000074>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <2>; - mal-rx-channel = <10>; + mal-rx-channel = <16>; cell-index = <2>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII1>; rgmii-channel = <0>; has-inverted-stacr-oc; @@ -362,23 +364,23 @@ device_type = "network"; compatible = "ibm,emac-460gt", "ibm,emac4"; interrupt-parent = <&EMAC3>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef601200 0x00000074>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <3>; - mal-rx-channel = <18>; + mal-rx-channel = <24>; cell-index = <3>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII1>; rgmii-channel = <1>; has-inverted-stacr-oc; @@ -396,27 +398,27 @@ primary; large-inbound-windows; enable-msi-hole; - reg = ; /* Internal messaging registers */ + reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ + 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ + 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 - 01000000 0 00000000 0000000c 08000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0 to 0x3f */ - bus-range = <0 3f>; + bus-range = <0x0 0x3f>; /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ - interrupt-map-mask = <0000 0 0 0>; - interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; }; PCIE0: pciex@d00000000 { @@ -426,23 +428,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <100 020>; - sdr-base = <300>; + port = <0x0>; /* port number */ + reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ + 0x0000000c 0x08010000 0x00001000>; /* Registers */ + dcr-reg = <0x100 0x020>; + sdr-base = <0x300>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 - 01000000 0 00000000 0000000f 80000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 40 to 0x7f */ - bus-range = <40 7f>; + bus-range = <0x40 0x7f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -452,12 +454,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; }; PCIE1: pciex@d20000000 { @@ -467,23 +469,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; primary; - port = <1>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <120 020>; - sdr-base = <340>; + port = <0x1>; /* port number */ + reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ + 0x0000000c 0x08011000 0x00001000>; /* Registers */ + dcr-reg = <0x120 0x020>; + sdr-base = <0x340>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 - 01000000 0 00000000 0000000f 80010000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 80 to 0xbf */ - bus-range = <80 bf>; + bus-range = <0x80 0xbf>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -493,12 +495,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; }; }; }; diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts index b5d95ac24dbf1bd1cb6d589aed908f31f3b152de..513bc43a71afab17b8784cb7a71c1115f78ea9ee 100644 --- a/arch/powerpc/boot/dts/haleakala.dts +++ b/arch/powerpc/boot/dts/haleakala.dts @@ -8,12 +8,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; model = "amcc,haleakala"; compatible = "amcc,haleakala", "amcc,kilauea"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -28,13 +30,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,405EXr"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by U-Boot */ timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <4000>; /* 16 kB */ - d-cache-size = <4000>; /* 16 kB */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; /* 16 kB */ + d-cache-size = <16384>; /* 16 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -42,14 +44,14 @@ memory { device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ + reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ }; UIC0: interrupt-controller { compatible = "ibm,uic-405exr", "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -59,11 +61,11 @@ compatible = "ibm,uic-405exr","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -71,11 +73,11 @@ compatible = "ibm,uic-405exr","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1c 4 1d 4>; /* cascade */ + interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -88,72 +90,72 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-405exr"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { compatible = "ibm,opb-405exr", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <80000000 80000000 10000000 - ef600000 ef600000 a00000 - f0000000 f0000000 10000000>; - dcr-reg = <0a0 5>; + ranges = <0x80000000 0x80000000 0x10000000 + 0xef600000 0xef600000 0x00a00000 + 0xf0000000 0xf0000000 0x10000000>; + dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by U-Boot */ EBC0: ebc { compatible = "ibm,ebc-405exr", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by U-Boot */ /* ranges property is supplied by U-Boot */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl512n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; - reg = <0 200000>; + reg = <0x00000000 0x00200000>; }; partition@200000 { label = "root"; - reg = <200000 200000>; + reg = <0x00200000 0x00200000>; }; partition@400000 { label = "user"; - reg = <400000 3b60000>; + reg = <0x00400000 0x03b60000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; }; @@ -161,68 +163,68 @@ UART0: serial@ef600200 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600200 0x00000008>; + virtual-reg = <0xef600200>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1a 4>; + interrupts = <0x1a 0x4>; }; UART1: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC0: i2c@ef600400 { compatible = "ibm,iic-405exr", "ibm,iic"; - reg = ; + reg = <0xef600400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600500 { compatible = "ibm,iic-405exr", "ibm,iic"; - reg = ; + reg = <0xef600500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; RGMII0: emac-rgmii@ef600b00 { compatible = "ibm,rgmii-405exr", "ibm,rgmii"; - reg = ; + reg = <0xef600b00 0x00000104>; has-mdio; }; EMAC0: ethernet@ef600900 { - linux,network-index = <0>; + linux,network-index = <0x0>; device_type = "network"; - compatible = "ibm,emac-405exr", "ibm,emac4"; + compatible = "ibm,emac-405exr", "ibm,emac4sync"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600900 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <0>; has-inverted-stacr-oc; @@ -237,23 +239,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <040 020>; - sdr-base = <400>; + port = <0x0>; /* port number */ + reg = <0xa0000000 0x20000000 /* Config space access */ + 0xef000000 0x00001000>; /* Registers */ + dcr-reg = <0x040 0x020>; + sdr-base = <0x400>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 90000000 0 08000000 - 01000000 0 00000000 e0000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 + 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0x00 to 0x3f */ - bus-range = <00 3f>; + bus-range = <0x0 0x3f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -263,12 +265,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ - 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ - 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ - 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; }; }; }; diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts index b5d87895fe060977fe8f9ff6e05c4ee726bcb9ed..f87fe7b9ced946e6e5a1ac699d97af48404397cb 100644 --- a/arch/powerpc/boot/dts/holly.dts +++ b/arch/powerpc/boot/dts/holly.dts @@ -10,6 +10,8 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { model = "41K7339"; compatible = "ibm,holly"; @@ -21,22 +23,22 @@ #size-cells =<0>; PowerPC,750CL@0 { device_type = "cpu"; - reg = <0>; - d-cache-line-size = <20>; - i-cache-line-size = <20>; - d-cache-size = <8000>; - i-cache-size = <8000>; - d-cache-sets = <80>; - i-cache-sets = <80>; - timebase-frequency = <2faf080>; - clock-frequency = <23c34600>; - bus-frequency = ; + reg = <0x00000000>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + d-cache-sets = <128>; + i-cache-sets = <128>; + timebase-frequency = <50000000>; + clock-frequency = <600000000>; + bus-frequency = <200000000>; }; }; memory@0 { device_type = "memory"; - reg = <00000000 20000000>; + reg = <0x00000000 0x20000000>; }; tsi109@c0000000 { @@ -44,33 +46,33 @@ compatible = "tsi109-bridge", "tsi108-bridge"; #address-cells = <1>; #size-cells = <1>; - ranges = <00000000 c0000000 00010000>; - reg = ; + ranges = <0x00000000 0xc0000000 0x00010000>; + reg = <0xc0000000 0x00010000>; i2c@7000 { device_type = "i2c"; compatible = "tsi109-i2c", "tsi108-i2c"; interrupt-parent = <&MPIC>; - interrupts = ; - reg = <7000 400>; + interrupts = <0xe 0x2>; + reg = <0x00007000 0x00000400>; }; MDIO: mdio@6000 { device_type = "mdio"; compatible = "tsi109-mdio", "tsi108-mdio"; - reg = <6000 50>; + reg = <0x00006000 0x00000050>; #address-cells = <1>; #size-cells = <0>; PHY1: ethernet-phy@1 { compatible = "bcm5461a"; - reg = <1>; + reg = <0x00000001>; txc-rxc-delay-disable; }; PHY2: ethernet-phy@2 { compatible = "bcm5461a"; - reg = <2>; + reg = <0x00000002>; txc-rxc-delay-disable; }; }; @@ -80,10 +82,10 @@ compatible = "tsi109-ethernet", "tsi108-ethernet"; #address-cells = <1>; #size-cells = <0>; - reg = <6000 200>; + reg = <0x00006000 0x00000200>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupt-parent = <&MPIC>; - interrupts = <10 2>; + interrupts = <0x10 0x2>; mdio-handle = <&MDIO>; phy-handle = <&PHY1>; }; @@ -93,10 +95,10 @@ compatible = "tsi109-ethernet", "tsi108-ethernet"; #address-cells = <1>; #size-cells = <0>; - reg = <6400 200>; + reg = <0x00006400 0x00000200>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupt-parent = <&MPIC>; - interrupts = <11 2>; + interrupts = <0x11 0x2>; mdio-handle = <&MDIO>; phy-handle = <&PHY2>; }; @@ -104,23 +106,23 @@ serial@7808 { device_type = "serial"; compatible = "ns16550"; - reg = <7808 200>; - virtual-reg = ; - clock-frequency = <3F9C6000>; - current-speed = <1c200>; + reg = <0x00007808 0x00000200>; + virtual-reg = <0xc0007808>; + clock-frequency = <1067212800>; + current-speed = <115200>; interrupt-parent = <&MPIC>; - interrupts = ; + interrupts = <0xc 0x2>; }; serial@7c08 { device_type = "serial"; compatible = "ns16550"; - reg = <7c08 200>; - virtual-reg = ; - clock-frequency = <3F9C6000>; - current-speed = <1c200>; + reg = <0x00007c08 0x00000200>; + virtual-reg = <0xc0007c08>; + clock-frequency = <1067212800>; + current-speed = <115200>; interrupt-parent = <&MPIC>; - interrupts = ; + interrupts = <0xd 0x2>; }; MPIC: pic@7400 { @@ -128,7 +130,7 @@ compatible = "chrp,open-pic"; interrupt-controller; #interrupt-cells = <2>; - reg = <7400 400>; + reg = <0x00007400 0x00000400>; big-endian; }; @@ -138,42 +140,42 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <1000 1000>; - bus-range = <0 0>; + reg = <0x00001000 0x00001000>; + bus-range = <0x0 0x0>; /*----------------------------------------------------+ | PCI memory range. | 01 denotes I/O space | 02 denotes 32-bit memory space +----------------------------------------------------*/ - ranges = <02000000 0 40000000 40000000 0 10000000 - 01000000 0 00000000 7e000000 0 00010000>; - clock-frequency = <7f28154>; + ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 + 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; + clock-frequency = <133333332>; interrupt-parent = <&MPIC>; - interrupts = <17 2>; - interrupt-map-mask = ; + interrupts = <0x17 0x2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; /*----------------------------------------------------+ | The INTA, INTB, INTC, INTD are shared. +----------------------------------------------------*/ interrupt-map = < - 0800 0 0 1 &RT0 24 0 - 0800 0 0 2 &RT0 25 0 - 0800 0 0 3 &RT0 26 0 - 0800 0 0 4 &RT0 27 0 - - 1000 0 0 1 &RT0 25 0 - 1000 0 0 2 &RT0 26 0 - 1000 0 0 3 &RT0 27 0 - 1000 0 0 4 &RT0 24 0 - - 1800 0 0 1 &RT0 26 0 - 1800 0 0 2 &RT0 27 0 - 1800 0 0 3 &RT0 24 0 - 1800 0 0 4 &RT0 25 0 - - 2000 0 0 1 &RT0 27 0 - 2000 0 0 2 &RT0 24 0 - 2000 0 0 3 &RT0 25 0 - 2000 0 0 4 &RT0 26 0 + 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 + 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 + 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 + 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 + + 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 + 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 + 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 + 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 + + 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 + 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 + 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 + 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 + + 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 + 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 + 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 + 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 >; RT0: router@1180 { @@ -183,7 +185,7 @@ clock-frequency = <0>; #address-cells = <0>; #interrupt-cells = <2>; - interrupts = <17 2>; + interrupts = <0x17 0x2>; interrupt-parent = <&MPIC>; }; }; diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index cc2873a531d27727219fa20210d075b1ccdd3995..077819bc3cbd0744c822f6037a5de76ff2a7e142 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts @@ -12,12 +12,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,katmai"; compatible = "amcc,katmai"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -33,13 +35,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440SPe"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -47,14 +49,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440spe","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -64,11 +66,11 @@ compatible = "ibm,uic-440spe","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -76,11 +78,11 @@ compatible = "ibm,uic-440spe","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = ; /* cascade */ + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -88,22 +90,22 @@ compatible = "ibm,uic-440spe","ibm,uic"; interrupt-controller; cell-index = <3>; - dcr-reg = <0f0 009>; + dcr-reg = <0x0f0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <10 4 11 4>; /* cascade */ + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440spe"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440spe"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -115,108 +117,108 @@ SDRAM0: sdram { compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <1>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; + interrupt-map = ; }; POB0: opb { compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <00000000 4 e0000000 20000000>; + ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; }; UART0: serial@10000200 { device_type = "serial"; compatible = "ns16550"; - reg = <10000200 8>; - virtual-reg = ; + reg = <0x10000200 0x00000008>; + virtual-reg = <0xa0000200>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@10000300 { device_type = "serial"; compatible = "ns16550"; - reg = <10000300 8>; - virtual-reg = ; + reg = <0x10000300 0x00000008>; + virtual-reg = <0xa0000300>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@10000600 { device_type = "serial"; compatible = "ns16550"; - reg = <10000600 8>; - virtual-reg = ; + reg = <0x10000600 0x00000008>; + virtual-reg = <0xa0000600>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC1>; - interrupts = <5 4>; + interrupts = <0x5 0x4>; }; IIC0: i2c@10000400 { compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <10000400 14>; + reg = <0x10000400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@10000500 { compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; - reg = <10000500 14>; + reg = <0x10000500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; EMAC0: ethernet@10000800 { - linux,network-index = <0>; + linux,network-index = <0x0>; device_type = "network"; compatible = "ibm,emac-440spe", "ibm,emac4"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = <10000800 70>; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0x10000800 0x00000074>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "gmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; has-inverted-stacr-oc; has-new-stacr-staopc; }; @@ -231,23 +233,23 @@ primary; large-inbound-windows; enable-msi-hole; - reg = ; /* Internal messaging registers */ + reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ + 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ + 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 - 01000000 0 00000000 0000000c 08000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0 to 0xf */ - bus-range = <0 f>; + bus-range = <0x0 0xf>; /* * On Katmai, the following PCI-X interrupts signals @@ -258,13 +260,13 @@ * INTC: J2: 1-2 * INTD: J1: 1-2 */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 1 &UIC1 14 8 - 0800 0 0 2 &UIC1 13 8 - 0800 0 0 3 &UIC1 12 8 - 0800 0 0 4 &UIC1 11 8 + 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 + 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 + 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 + 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 >; }; @@ -275,23 +277,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <100 020>; - sdr-base = <300>; + port = <0x0>; /* port number */ + reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ + 0x0000000c 0x10000000 0x00001000>; /* Registers */ + dcr-reg = <0x100 0x020>; + sdr-base = <0x300>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 - 01000000 0 00000000 0000000f 80000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 10 to 0x1f */ - bus-range = <10 1f>; + bus-range = <0x10 0x1f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -301,12 +303,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; }; PCIE1: pciex@d20000000 { @@ -316,23 +318,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; - port = <1>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <120 020>; - sdr-base = <340>; + port = <0x1>; /* port number */ + reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ + 0x0000000c 0x10001000 0x00001000>; /* Registers */ + dcr-reg = <0x120 0x020>; + sdr-base = <0x340>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 - 01000000 0 00000000 0000000f 80010000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 10 to 0x1f */ - bus-range = <20 2f>; + bus-range = <0x20 0x2f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -342,12 +344,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; }; PCIE2: pciex@d40000000 { @@ -357,23 +359,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; primary; - port = <2>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <140 020>; - sdr-base = <370>; + port = <0x2>; /* port number */ + reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ + 0x0000000c 0x10002000 0x00001000>; /* Registers */ + dcr-reg = <0x140 0x020>; + sdr-base = <0x370>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 - 01000000 0 00000000 0000000f 80020000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 10 to 0x1f */ - bus-range = <30 3f>; + bus-range = <0x30 0x3f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -383,12 +385,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ - 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ - 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ - 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; }; }; diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 48c9a6e71f1a6eebd65a65879cb2b333ab1a062d..dececc4b5ff280f8b40fc22be6c5bc8bdd5ac433 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts @@ -8,12 +8,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; model = "amcc,kilauea"; compatible = "amcc,kilauea"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -29,13 +31,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,405EX"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by U-Boot */ timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <4000>; /* 16 kB */ - d-cache-size = <4000>; /* 16 kB */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; /* 16 kB */ + d-cache-size = <16384>; /* 16 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -43,14 +45,14 @@ memory { device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ + reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ }; UIC0: interrupt-controller { compatible = "ibm,uic-405ex", "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -60,11 +62,11 @@ compatible = "ibm,uic-405ex","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -72,11 +74,11 @@ compatible = "ibm,uic-405ex","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1c 4 1d 4>; /* cascade */ + interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -89,72 +91,72 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-405ex"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { compatible = "ibm,opb-405ex", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <80000000 80000000 10000000 - ef600000 ef600000 a00000 - f0000000 f0000000 10000000>; - dcr-reg = <0a0 5>; + ranges = <0x80000000 0x80000000 0x10000000 + 0xef600000 0xef600000 0x00a00000 + 0xf0000000 0xf0000000 0x10000000>; + dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by U-Boot */ EBC0: ebc { compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by U-Boot */ /* ranges property is supplied by U-Boot */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl512n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; - reg = <0 200000>; + reg = <0x00000000 0x00200000>; }; partition@200000 { label = "root"; - reg = <200000 200000>; + reg = <0x00200000 0x00200000>; }; partition@400000 { label = "user"; - reg = <400000 3b60000>; + reg = <0x00400000 0x03b60000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; }; @@ -162,68 +164,68 @@ UART0: serial@ef600200 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600200 0x00000008>; + virtual-reg = <0xef600200>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1a 4>; + interrupts = <0x1a 0x4>; }; UART1: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC0: i2c@ef600400 { compatible = "ibm,iic-405ex", "ibm,iic"; - reg = ; + reg = <0xef600400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600500 { compatible = "ibm,iic-405ex", "ibm,iic"; - reg = ; + reg = <0xef600500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; RGMII0: emac-rgmii@ef600b00 { compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = ; + reg = <0xef600b00 0x00000104>; has-mdio; }; EMAC0: ethernet@ef600900 { - linux,network-index = <0>; + linux,network-index = <0x0>; device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4"; + compatible = "ibm,emac-405ex", "ibm,emac4sync"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600900 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <0>; has-inverted-stacr-oc; @@ -231,27 +233,27 @@ }; EMAC1: ethernet@ef600a00 { - linux,network-index = <1>; + linux,network-index = <0x1>; device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4"; + compatible = "ibm,emac-405ex", "ibm,emac4sync"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600a00 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <1>; has-inverted-stacr-oc; @@ -266,23 +268,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <040 020>; - sdr-base = <400>; + port = <0x0>; /* port number */ + reg = <0xa0000000 0x20000000 /* Config space access */ + 0xef000000 0x00001000>; /* Registers */ + dcr-reg = <0x040 0x020>; + sdr-base = <0x400>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 90000000 0 08000000 - 01000000 0 00000000 e0000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 + 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0x00 to 0x3f */ - bus-range = <00 3f>; + bus-range = <0x0 0x3f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -292,12 +294,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ - 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ - 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ - 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; }; PCIE1: pciex@0c0000000 { @@ -307,23 +309,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; primary; - port = <1>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <060 020>; - sdr-base = <440>; + port = <0x1>; /* port number */ + reg = <0xc0000000 0x20000000 /* Config space access */ + 0xef001000 0x00001000>; /* Registers */ + dcr-reg = <0x060 0x020>; + sdr-base = <0x440>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 98000000 0 08000000 - 01000000 0 00000000 e0010000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 + 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0x40 to 0x7f */ - bus-range = <40 7f>; + bus-range = <0x40 0x7f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -333,12 +335,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ - 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ - 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ - 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; }; }; }; diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index f869ce3ca0b74193792acbaca1ec848c3cb28e4a..49737589ffc81f65778a2dbf4a8476427ab49e09 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts @@ -40,6 +40,7 @@ timebase-frequency = <0>; /* From U-boot */ bus-frequency = <0>; /* From U-boot */ clock-frequency = <0>; /* From U-boot */ + next-level-cache = <&L2>; }; }; @@ -58,16 +59,16 @@ memory-controller@2000 { compatible = "fsl,8540-memory-controller"; reg = <0x2000 0x1000>; - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; interrupts = <0x12 0x2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; /* 32 bytes */ cache-size = <0x40000>; /* L2, 256K */ - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; interrupts = <0x10 0x2>; }; @@ -78,10 +79,51 @@ compatible = "fsl-i2c"; reg = <0x3000 0x100>; interrupts = <0x2b 0x2>; - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { /* For TSECs */ #address-cells = <1>; #size-cells = <0>; @@ -89,13 +131,13 @@ reg = <0x24520 0x20>; PHY1: ethernet-phy@1 { - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; reg = <0x1>; device_type = "ethernet-phy"; }; PHY2: ethernet-phy@2 { - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; reg = <0x2>; device_type = "ethernet-phy"; }; @@ -109,7 +151,7 @@ /* Mac address filled in by bootwrapper */ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; phy-handle = <&PHY1>; }; @@ -121,11 +163,11 @@ /* Mac address filled in by bootwrapper */ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; phy-handle = <&PHY2>; }; - MPIC: pic@40000 { + mpic: pic@40000 { #address-cells = <0>; #interrupt-cells = <2>; interrupt-controller; @@ -164,7 +206,7 @@ #interrupt-cells = <2>; interrupt-controller; interrupts = <0x2e 0x2>; - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; reg = <0x90c00 0x80>; compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; }; @@ -202,7 +244,7 @@ fsl,mdc-pin = <25>; PHY0: ethernet-phy@0 { - interrupt-parent = <&MPIC>; + interrupt-parent = <&mpic>; reg = <0x0>; device_type = "ethernet-phy"; }; diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts index 84cc5e72ddd845afd9348d614b7dd1c37b15443d..945508c7e7d8bbd9830876e8d708f56b92f0e6df 100644 --- a/arch/powerpc/boot/dts/makalu.dts +++ b/arch/powerpc/boot/dts/makalu.dts @@ -8,12 +8,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; model = "amcc,makalu"; compatible = "amcc,makalu"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -29,13 +31,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,405EX"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by U-Boot */ timebase-frequency = <0>; /* Filled in by U-Boot */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <4000>; /* 16 kB */ - d-cache-size = <4000>; /* 16 kB */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; /* 16 kB */ + d-cache-size = <16384>; /* 16 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -43,14 +45,14 @@ memory { device_type = "memory"; - reg = <0 0>; /* Filled in by U-Boot */ + reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ }; UIC0: interrupt-controller { compatible = "ibm,uic-405ex", "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -60,11 +62,11 @@ compatible = "ibm,uic-405ex","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -72,11 +74,11 @@ compatible = "ibm,uic-405ex","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1c 4 1d 4>; /* cascade */ + interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -89,72 +91,72 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-405ex"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL0: mcmal { compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { compatible = "ibm,opb-405ex", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <80000000 80000000 10000000 - ef600000 ef600000 a00000 - f0000000 f0000000 10000000>; - dcr-reg = <0a0 5>; + ranges = <0x80000000 0x80000000 0x10000000 + 0xef600000 0xef600000 0x00a00000 + 0xf0000000 0xf0000000 0x10000000>; + dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by U-Boot */ EBC0: ebc { compatible = "ibm,ebc-405ex", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by U-Boot */ /* ranges property is supplied by U-Boot */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl512n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "kernel"; - reg = <0 200000>; + reg = <0x00000000 0x00200000>; }; partition@200000 { label = "root"; - reg = <200000 200000>; + reg = <0x00200000 0x00200000>; }; partition@400000 { label = "user"; - reg = <400000 3b60000>; + reg = <0x00400000 0x03b60000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; }; @@ -162,68 +164,68 @@ UART0: serial@ef600200 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600200 0x00000008>; + virtual-reg = <0xef600200>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1a 4>; + interrupts = <0x1a 0x4>; }; UART1: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by U-Boot */ current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC0: i2c@ef600400 { compatible = "ibm,iic-405ex", "ibm,iic"; - reg = ; + reg = <0xef600400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600500 { compatible = "ibm,iic-405ex", "ibm,iic"; - reg = ; + reg = <0xef600500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; RGMII0: emac-rgmii@ef600b00 { compatible = "ibm,rgmii-405ex", "ibm,rgmii"; - reg = ; + reg = <0xef600b00 0x00000104>; has-mdio; }; EMAC0: ethernet@ef600900 { - linux,network-index = <0>; + linux,network-index = <0x0>; device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4"; + compatible = "ibm,emac-405ex", "ibm,emac4sync"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600900 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <0000003f>; /* Start at 6 */ + phy-map = <0x0000003f>; /* Start at 6 */ rgmii-device = <&RGMII0>; rgmii-channel = <0>; has-inverted-stacr-oc; @@ -231,27 +233,27 @@ }; EMAC1: ethernet@ef600a00 { - linux,network-index = <1>; + linux,network-index = <0x1>; device_type = "network"; - compatible = "ibm,emac-405ex", "ibm,emac4"; + compatible = "ibm,emac-405ex", "ibm,emac4sync"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600a00 0x000000c4>; local-mac-address = [000000000000]; /* Filled in by U-Boot */ mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; rgmii-device = <&RGMII0>; rgmii-channel = <1>; has-inverted-stacr-oc; @@ -266,23 +268,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; primary; - port = <0>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <040 020>; - sdr-base = <400>; + port = <0x0>; /* port number */ + reg = <0xa0000000 0x20000000 /* Config space access */ + 0xef000000 0x00001000>; /* Registers */ + dcr-reg = <0x040 0x020>; + sdr-base = <0x400>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 90000000 0 08000000 - 01000000 0 00000000 e0000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 + 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0x00 to 0x3f */ - bus-range = <00 3f>; + bus-range = <0x0 0x3f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -292,12 +294,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ - 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ - 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ - 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; }; PCIE1: pciex@0c0000000 { @@ -307,23 +309,23 @@ #address-cells = <3>; compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; primary; - port = <1>; /* port number */ - reg = ; /* Registers */ - dcr-reg = <060 020>; - sdr-base = <440>; + port = <0x1>; /* port number */ + reg = <0xc0000000 0x20000000 /* Config space access */ + 0xef001000 0x00001000>; /* Registers */ + dcr-reg = <0x060 0x020>; + sdr-base = <0x440>; /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 98000000 0 08000000 - 01000000 0 00000000 e0010000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 + 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* This drives busses 0x40 to 0x7f */ - bus-range = <40 7f>; + bus-range = <0x40 0x7f>; /* Legacy interrupts (note the weird polarity, the bridge seems * to invert PCIe legacy interrupts). @@ -333,12 +335,12 @@ * below are basically de-swizzled numbers. * The real slot is on idsel 0, so the swizzling is 1:1 */ - interrupt-map-mask = <0000 0 0 7>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = < - 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ - 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ - 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ - 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; + 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ + 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ + 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ + 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; }; }; }; diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts index 94ad7b2b241e249eeb3cb51be5b30ca4378dc4b2..1f9036c317b4ab235e9264705ee38fdd1e2c5d14 100644 --- a/arch/powerpc/boot/dts/mpc5121ads.dts +++ b/arch/powerpc/boot/dts/mpc5121ads.dts @@ -1,7 +1,7 @@ /* - * MPC5121E MDS Device Tree Source + * MPC5121E ADS Device Tree Source * - * Copyright 2007 Freescale Semiconductor Inc. + * Copyright 2007,2008 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -17,6 +17,10 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + pci = &pci; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -39,8 +43,41 @@ reg = <0x00000000 0x10000000>; // 256MB at 0 }; + mbx@20000000 { + compatible = "fsl,mpc5121-mbx"; + reg = <0x20000000 0x4000>; + interrupts = <66 0x8>; + interrupt-parent = < &ipic >; + }; + + sram@30000000 { + compatible = "fsl,mpc5121-sram"; + reg = <0x30000000 0x20000>; // 128K at 0x30000000 + }; + + nfc@40000000 { + compatible = "fsl,mpc5121-nfc"; + reg = <0x40000000 0x100000>; // 1M at 0x40000000 + interrupts = <6 8>; + interrupt-parent = < &ipic >; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <1>; + // ADS has two Hynix 512MB Nand flash chips in a single + // stacked package . + chips = <2>; + nand0@0 { + label = "nand0"; + reg = <0x00000000 0x02000000>; // first 32 MB of chip 0 + }; + nand1@20000000 { + label = "nand1"; + reg = <0x20000000 0x02000000>; // first 32 MB of chip 1 + }; + }; + localbus@80000020 { - compatible = "fsl,mpc5121ads-localbus"; + compatible = "fsl,mpc5121-localbus"; #address-cells = <2>; #size-cells = <1>; reg = <0x80000020 0x40>; @@ -51,14 +88,51 @@ flash@0,0 { compatible = "cfi-flash"; reg = <0 0x0 0x4000000>; + #address-cells = <1>; + #size-cells = <1>; bank-width = <4>; - device-width = <1>; + device-width = <2>; + protected@0 { + label = "protected"; + reg = <0x00000000 0x00040000>; // first sector is protected + read-only; + }; + filesystem@40000 { + label = "filesystem"; + reg = <0x00040000 0x03c00000>; // 60M for filesystem + }; + kernel@3c40000 { + label = "kernel"; + reg = <0x03c40000 0x00280000>; // 2.5M for kernel + }; + device-tree@3ec0000 { + label = "device-tree"; + reg = <0x03ec0000 0x00040000>; // one sector for device tree + }; + u-boot@3f00000 { + label = "u-boot"; + reg = <0x03f00000 0x00100000>; // 1M for u-boot + read-only; + }; }; board-control@2,0 { compatible = "fsl,mpc5121ads-cpld"; reg = <0x2 0x0 0x8000>; }; + + cpld_pic: pic@2,a { + compatible = "fsl,mpc5121ads-cpld-pic"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2 0xa 0x5>; + interrupt-parent = < &ipic >; + // irq routing + // all irqs but touch screen are routed to irq0 (ipic 48) + // touch screen is statically routed to irq1 (ipic 17) + // so don't use it here + interrupts = <48 0x8>; + }; }; soc@80000000 { @@ -85,38 +159,252 @@ reg = <0xc00 0x100>; }; - // 512x PSCs are not 52xx PSCs compatible + rtc@a00 { // Real time clock + compatible = "fsl,mpc5121-rtc"; + reg = <0xa00 0x100>; + interrupts = <79 0x8 80 0x8>; + interrupt-parent = < &ipic >; + }; + + clock@f00 { // Clock control + compatible = "fsl,mpc5121-clock"; + reg = <0xf00 0x100>; + }; + + pmc@1000{ //Power Management Controller + compatible = "fsl,mpc5121-pmc"; + reg = <0x1000 0x100>; + interrupts = <83 0x2>; + interrupt-parent = < &ipic >; + }; + + gpio@1100 { + compatible = "fsl,mpc5121-gpio"; + reg = <0x1100 0x100>; + interrupts = <78 0x8>; + interrupt-parent = < &ipic >; + }; + + mscan@1300 { + compatible = "fsl,mpc5121-mscan"; + cell-index = <0>; + interrupts = <12 0x8>; + interrupt-parent = < &ipic >; + reg = <0x1300 0x80>; + }; + + mscan@1380 { + compatible = "fsl,mpc5121-mscan"; + cell-index = <1>; + interrupts = <13 0x8>; + interrupt-parent = < &ipic >; + reg = <0x1380 0x80>; + }; + + i2c@1700 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <0>; + reg = <0x1700 0x20>; + interrupts = <9 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + }; + + i2c@1720 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <1>; + reg = <0x1720 0x20>; + interrupts = <10 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + }; + + i2c@1740 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; + cell-index = <2>; + reg = <0x1740 0x20>; + interrupts = <11 0x8>; + interrupt-parent = < &ipic >; + fsl5200-clocking; + }; + + i2ccontrol@1760 { + compatible = "fsl,mpc5121-i2c-ctrl"; + reg = <0x1760 0x8>; + }; + + axe@2000 { + compatible = "fsl,mpc5121-axe"; + reg = <0x2000 0x100>; + interrupts = <42 0x8>; + interrupt-parent = < &ipic >; + }; + + display@2100 { + compatible = "fsl,mpc5121-diu", "fsl-diu"; + reg = <0x2100 0x100>; + interrupts = <64 0x8>; + interrupt-parent = < &ipic >; + }; + + mdio@2800 { + compatible = "fsl,mpc5121-fec-mdio"; + reg = <0x2800 0x800>; + #address-cells = <1>; + #size-cells = <0>; + phy: ethernet-phy@0 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@2800 { + device_type = "network"; + compatible = "fsl,mpc5121-fec"; + reg = <0x2800 0x800>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <4 0x8>; + interrupt-parent = < &ipic >; + phy-handle = < &phy >; + fsl,align-tx-packets = <4>; + }; + + // 5121e has two dr usb modules + // mpc5121_ads only uses USB0 + + // USB1 using external ULPI PHY + //usb@3000 { + // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; + // reg = <0x3000 0x1000>; + // #address-cells = <1>; + // #size-cells = <0>; + // interrupt-parent = < &ipic >; + // interrupts = <43 0x8>; + // dr_mode = "otg"; + // phy_type = "ulpi"; + // port1; + //}; + + // USB0 using internal UTMI PHY + usb@4000 { + compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; + reg = <0x4000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = < &ipic >; + interrupts = <44 0x8>; + dr_mode = "otg"; + phy_type = "utmi_wide"; + port0; + }; + + // IO control + ioctl@a000 { + compatible = "fsl,mpc5121-ioctl"; + reg = <0xA000 0x1000>; + }; + + pata@10200 { + compatible = "fsl,mpc5121-pata"; + reg = <0x10200 0x100>; + interrupts = <5 0x8>; + interrupt-parent = < &ipic >; + }; + + // 512x PSCs are not 52xx PSC compatible // PSC3 serial port A aka ttyPSC0 serial@11300 { device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart"; + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; // Logical port assignment needed until driver // learns to use aliases port-number = <0>; cell-index = <3>; reg = <0x11300 0x100>; - interrupts = <0x28 0x8>; // actually the fifo irq + interrupts = <40 0x8>; interrupt-parent = < &ipic >; + rx-fifo-size = <16>; + tx-fifo-size = <16>; }; // PSC4 serial port B aka ttyPSC1 serial@11400 { device_type = "serial"; - compatible = "fsl,mpc5121-psc-uart"; + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; // Logical port assignment needed until driver // learns to use aliases port-number = <1>; cell-index = <4>; reg = <0x11400 0x100>; - interrupts = <0x28 0x8>; // actually the fifo irq + interrupts = <40 0x8>; interrupt-parent = < &ipic >; + rx-fifo-size = <16>; + tx-fifo-size = <16>; }; - pscsfifo@11f00 { + // PSC5 in ac97 mode + ac97@11500 { + compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; + cell-index = <5>; + reg = <0x11500 0x100>; + interrupts = <40 0x8>; + interrupt-parent = < &ipic >; + fsl,mode = "ac97-slave"; + rx-fifo-size = <384>; + tx-fifo-size = <384>; + }; + + pscfifo@11f00 { compatible = "fsl,mpc5121-psc-fifo"; reg = <0x11f00 0x100>; - interrupts = <0x28 0x8>; + interrupts = <40 0x8>; interrupt-parent = < &ipic >; }; + + dma@14000 { + compatible = "fsl,mpc5121-dma2"; + reg = <0x14000 0x1800>; + interrupts = <65 0x8>; + interrupt-parent = < &ipic >; + }; + + }; + + pci: pci@80008500 { + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + // IDSEL 0x15 - Slot 1 PCI + 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 + 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 + 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 + 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 + + // IDSEL 0x16 - Slot 2 MiniPCI + 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 + 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 + + // IDSEL 0x17 - Slot 3 MiniPCI + 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 + 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 + >; + interrupt-parent = < &ipic >; + interrupts = <1 0x8>; + bus-range = <0 0>; + ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 + 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>; + clock-frequency = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0x80008500 0x100>; + compatible = "fsl,mpc5121-pci"; + device_type = "pci"; }; }; diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts index 4936349b87cd6eabb8a1649642d7ed7a4829be8a..2544f3ecd6e9096fb60d06807176c58ebe83c7a0 100644 --- a/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts @@ -18,6 +18,16 @@ #address-cells = <1>; #size-cells = <1>; + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + + serial0 = &serial0; + serial1 = &serial1; + + pci0 = &pci0; + }; + cpus { #address-cells = <1>; #size-cells =<0>; @@ -78,7 +88,7 @@ }; - ethernet@6200 { + enet0: ethernet@6200 { linux,network-index = <0>; #size-cells = <0>; device_type = "network"; @@ -91,7 +101,7 @@ phy-handle = <&phy8>; }; - ethernet@6600 { + enet1: ethernet@6600 { linux,network-index = <1>; #address-cells = <1>; #size-cells = <0>; @@ -105,7 +115,7 @@ phy-handle = <&phy9>; }; - serial@7808 { + serial0: serial@7808 { device_type = "serial"; compatible = "ns16550"; reg = <0x7808 0x200>; @@ -114,7 +124,7 @@ interrupt-parent = <&mpic>; }; - serial@7c08 { + serial1: serial@7c08 { device_type = "serial"; compatible = "ns16550"; reg = <0x7c08 0x200>; @@ -124,16 +134,14 @@ }; mpic: pic@7400 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x7400 0x400>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; - pci@1000 { + pci0: pci@1000 { compatible = "tsi108-pci"; device_type = "pci"; #interrupt-cells = <1>; @@ -186,8 +194,4 @@ }; }; }; - chosen { - linux,stdout-path = "/tsi108@c0000000/serial@7808"; - }; - }; diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts index 46e2da30c3dd2b895e5e9c9a575855a736359086..2a1929acaabd32aac0d02d1a73cef7ae81d351bc 100644 --- a/arch/powerpc/boot/dts/mpc8272ads.dts +++ b/arch/powerpc/boot/dts/mpc8272ads.dts @@ -217,6 +217,17 @@ linux,network-index = <1>; fsl,cpm-command = <0x16200300>; }; + + i2c@11860 { + compatible = "fsl,mpc8272-i2c", + "fsl,cpm2-i2c"; + reg = <0x11860 0x20 0x8afc 0x2>; + interrupts = <1 8>; + interrupt-parent = <&PIC>; + fsl,cpm-command = <0x29600000>; + #address-cells = <1>; + #size-cells = <0>; + }; }; PIC: interrupt-controller@10c00 { @@ -226,22 +237,15 @@ compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; }; -/* May need to remove if on a part without crypto engine */ crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "fsl,mpc8272-talitos-sec2", - "fsl,talitos-sec2", - "fsl,talitos", - "talitos"; - reg = <0x30000 0x10000>; - interrupts = <11 8>; + compatible = "fsl,sec1.0"; + reg = <0x40000 0x13000>; + interrupts = <47 0x8>; interrupt-parent = <&PIC>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x7e>; -/* desc mask is for rev1.x, we need runtime fixup for >=2.x */ - descriptor-types-mask = <0x1010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x1010415>; }; }; diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index e1f0dca8ac397324876f46aee281c08a2acc5e39..2a94ae0dc8b875c5c080e69c894838ca21545263 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -109,18 +109,38 @@ reg = <0x200 0x100>; }; - i2c@3000 { + sleep-nexus { #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; + #size-cells = <1>; + compatible = "simple-bus"; + sleep = <&pmc 0x03000000>; + ranges; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 0x8>; + interrupt-parent = <&ipic>; + dfsrr; + rtc@68 { + compatible = "dallas,ds1339"; + reg = <0x68>; + }; + }; + + crypto@30000 { + compatible = "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + fsl,num-channels = <1>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x4c>; + fsl,descriptor-types-mask = <0x0122003f>; }; }; @@ -144,6 +164,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { compatible = "fsl-usb2-dr"; @@ -153,37 +208,44 @@ interrupt-parent = <&ipic>; interrupts = <38 0x8>; phy_type = "utmi_wide"; + sleep = <&pmc 0x00300000>; }; - mdio@24520 { + enet0: ethernet@24000 { #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy4: ethernet-phy@4 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x4>; - device_type = "ethernet-phy"; - }; - }; + #size-cells = <1>; + sleep = <&pmc 0x20000000>; + ranges; - enet0: ethernet@24000 { cell-index = <0>; device_type = "network"; model = "eTSEC"; - compatible = "gianfar"; + compatible = "gianfar", "simple-bus"; reg = <0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <37 0x8 36 0x8 35 0x8>; interrupt-parent = <&ipic>; phy-handle = < &phy1 >; + fsl,magic-packet; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + phy1: ethernet-phy@1 { + interrupt-parent = <&ipic>; + interrupts = <19 0x8>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@4 { + interrupt-parent = <&ipic>; + interrupts = <20 0x8>; + reg = <0x4>; + device_type = "ethernet-phy"; + }; + }; }; enet1: ethernet@25000 { @@ -196,6 +258,8 @@ interrupts = <34 0x8 33 0x8 32 0x8>; interrupt-parent = <&ipic>; phy-handle = < &phy4 >; + sleep = <&pmc 0x10000000>; + fsl,magic-packet; }; serial0: serial@4500 { @@ -218,20 +282,6 @@ interrupt-parent = <&ipic>; }; - crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0x7000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - /* Rev. 2.2 */ - num-channels = <1>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000004c>; - descriptor-types-mask = <0x0122003f>; - }; - /* IPIC * interrupts cell = * sense values match linux IORESOURCE_IRQ_* defines: @@ -245,36 +295,119 @@ reg = <0x700 0x100>; device_type = "ipic"; }; + + pmc: power@b00 { + compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; + interrupts = <80 8>; + interrupt-parent = <&ipic>; + fsl,mpc8313-wakeup-timer = <>m1>; + + /* Remove this (or change to "okay") if you have + * a REVA3 or later board, if you apply one of the + * workarounds listed in section 8.5 of the board + * manual, or if you are adapting this device tree + * to a different board. + */ + status = "fail"; + }; + + gtm1: timer@500 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x500 0x100>; + interrupts = <90 8 78 8 84 8 72 8>; + interrupt-parent = <&ipic>; + }; + + timer@600 { + compatible = "fsl,mpc8313-gtm", "fsl,gtm"; + reg = <0x600 0x100>; + interrupts = <91 8 79 8 85 8 73 8>; + interrupt-parent = <&ipic>; + }; }; - pci0: pci@e0008500 { - cell-index = <1>; - interrupt-map-mask = <0xf800 0x0 0x0 0x7>; - interrupt-map = < - - /* IDSEL 0x0E -mini PCI */ - 0x7000 0x0 0x0 0x1 &ipic 18 0x8 - 0x7000 0x0 0x0 0x2 &ipic 18 0x8 - 0x7000 0x0 0x0 0x3 &ipic 18 0x8 - 0x7000 0x0 0x0 0x4 &ipic 18 0x8 - - /* IDSEL 0x0F - PCI slot */ - 0x7800 0x0 0x0 0x1 &ipic 17 0x8 - 0x7800 0x0 0x0 0x2 &ipic 18 0x8 - 0x7800 0x0 0x0 0x3 &ipic 17 0x8 - 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; - interrupt-parent = <&ipic>; - interrupts = <66 0x8>; - bus-range = <0x0 0x0>; - ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 - 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 - 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; - clock-frequency = <66666666>; - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - reg = <0xe0008500 0x100>; - compatible = "fsl,mpc8349-pci"; - device_type = "pci"; + sleep-nexus { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + sleep = <&pmc 0x00010000>; + ranges; + + pci0: pci@e0008500 { + cell-index = <1>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0E -mini PCI */ + 0x7000 0x0 0x0 0x1 &ipic 18 0x8 + 0x7000 0x0 0x0 0x2 &ipic 18 0x8 + 0x7000 0x0 0x0 0x3 &ipic 18 0x8 + 0x7000 0x0 0x0 0x4 &ipic 18 0x8 + + /* IDSEL 0x0F - PCI slot */ + 0x7800 0x0 0x0 0x1 &ipic 17 0x8 + 0x7800 0x0 0x0 0x2 &ipic 18 0x8 + 0x7800 0x0 0x0 0x3 &ipic 17 0x8 + 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; + interrupt-parent = <&ipic>; + interrupts = <66 0x8>; + bus-range = <0x0 0x0>; + ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 + 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe0008500 0x100>; + compatible = "fsl,mpc8349-pci"; + device_type = "pci"; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; + reg = <0xe00082a8 4>; + ranges = <0 0xe0008100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + + dma-channel@0 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + }; + + dma-channel@80 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x80 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <1>; + }; + + dma-channel@100 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x100 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <2>; + }; + + dma-channel@180 { + compatible = "fsl,mpc8313-dma-channel", + "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <3>; + }; + }; }; }; diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index d7a1ececa30f43fa7486e1669c869c8fdf224a70..f704513fb930b5dd6dcf4270e9592ae8368f271c 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -132,6 +132,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -206,17 +241,16 @@ }; crypto@30000 { - model = "SEC3"; - device_type = "crypto"; - compatible = "talitos"; + compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0", + "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", + "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x97c>; + fsl,descriptor-types-mask = <0x3ab0abf>; }; sata@18000 { diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index 539e02fb35266e12d21bf1327b3e8675ca0d3dfe..7345743d3d96ac7100a2e0f3269aaf147cbf0cd4 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -114,18 +114,50 @@ interrupt-parent = <&ipic>; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0x7000>; + compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 2.2 */ - num-channels = <1>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000004c>; - descriptor-types-mask = <0x0122003f>; + fsl,num-channels = <1>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x4c>; + fsl,descriptor-types-mask = <0x0122003f>; }; ipic: pic@700 { diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts index 179c81c6a7acb5272866919ada396c4a46990971..e74c045a0f8caa235312518b76e2a333d6a30eaf 100644 --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts @@ -68,7 +68,7 @@ compatible = "fsl-i2c"; reg = <0x3000 0x100>; interrupts = <14 0x8>; - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; dfsrr; }; @@ -79,7 +79,7 @@ reg = <0x4500 0x100>; clock-frequency = <0>; interrupts = <9 0x8>; - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; }; serial1: serial@4600 { @@ -89,24 +89,56 @@ reg = <0x4600 0x100>; clock-frequency = <0>; interrupts = <10 0x8>; - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; }; crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0x7000>; + compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; interrupts = <11 0x8>; - interrupt-parent = <&pic>; - /* Rev. 2.2 */ - num-channels = <1>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000004c>; - descriptor-types-mask = <0x0122003f>; + interrupt-parent = <&ipic>; + fsl,num-channels = <1>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x4c>; + fsl,descriptor-types-mask = <0x0122003f>; }; - pic:pic@700 { + ipic:pic@700 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; @@ -240,13 +272,13 @@ compatible = "fsl,ucc-mdio"; phy00:ethernet-phy@00 { - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; interrupts = <0>; reg = <0x0>; device_type = "ethernet-phy"; }; phy04:ethernet-phy@04 { - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; interrupts = <0>; reg = <0x4>; device_type = "ethernet-phy"; @@ -261,7 +293,7 @@ reg = <0x80 0x80>; big-endian; interrupts = <32 0x8 33 0x8>; //high:32 low:33 - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; }; }; @@ -270,21 +302,21 @@ interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x10 AD16 (USB) */ - 0x8000 0x0 0x0 0x1 &pic 17 0x8 + 0x8000 0x0 0x0 0x1 &ipic 17 0x8 /* IDSEL 0x11 AD17 (Mini1)*/ - 0x8800 0x0 0x0 0x1 &pic 18 0x8 - 0x8800 0x0 0x0 0x2 &pic 19 0x8 - 0x8800 0x0 0x0 0x3 &pic 20 0x8 - 0x8800 0x0 0x0 0x4 &pic 48 0x8 + 0x8800 0x0 0x0 0x1 &ipic 18 0x8 + 0x8800 0x0 0x0 0x2 &ipic 19 0x8 + 0x8800 0x0 0x0 0x3 &ipic 20 0x8 + 0x8800 0x0 0x0 0x4 &ipic 48 0x8 /* IDSEL 0x12 AD18 (PCI/Mini2) */ - 0x9000 0x0 0x0 0x1 &pic 19 0x8 - 0x9000 0x0 0x0 0x2 &pic 20 0x8 - 0x9000 0x0 0x0 0x3 &pic 48 0x8 - 0x9000 0x0 0x0 0x4 &pic 17 0x8>; + 0x9000 0x0 0x0 0x1 &ipic 19 0x8 + 0x9000 0x0 0x0 0x2 &ipic 20 0x8 + 0x9000 0x0 0x0 0x3 &ipic 48 0x8 + 0x9000 0x0 0x0 0x4 &ipic 17 0x8>; - interrupt-parent = <&pic>; + interrupt-parent = <&ipic>; interrupts = <66 0x8>; bus-range = <0x0 0x0>; ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 9426676b0b7d4db483e4d8dfc068489e952b1ce5..8dfab56625856ea3d57f77b45921789b5d22a206 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -93,6 +93,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@22000 { compatible = "fsl-usb2-mph"; reg = <0x22000 0x1000>; @@ -178,16 +213,14 @@ }; crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; + compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - descriptor-types-mask = <0x01010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; }; ipic: pic@700 { diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index f81d735e6e72f416170b96221329332f3ac165cc..49ca3497eefb45bb1540b53757914a488febdd39 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts @@ -91,6 +91,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -151,16 +186,14 @@ }; crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; + compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - descriptor-types-mask = <0x01010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; }; ipic: pic@700 { diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index 0199c5c548d80a5dfcfa843da5ad929b41a3ed1f..ba586cb7afbb52d13600895d39571717582b2fd0 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts @@ -103,6 +103,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + /* phy type (ULPI or SERIAL) are only types supported for MPH */ /* port = 0 or 1 */ usb@22000 { @@ -193,20 +228,15 @@ interrupt-parent = <&ipic>; }; - /* May need to remove if on a part without crypto engine */ crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; + compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - /* desc mask is for rev2.0, - * we need runtime fixup for >2.0 */ - descriptor-types-mask = <0x01010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; }; /* IPIC diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 8160ff24e87ed811f425a068cec1b4f757a081d2..3701dae1ee02b09fe7f84246d886401f57ee9a14 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts @@ -118,18 +118,50 @@ interrupt-parent = <&ipic>; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; + compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ - descriptor-types-mask = <0x01010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; }; ipic: pic@700 { diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts new file mode 100644 index 0000000000000000000000000000000000000000..8acd1d6577f22a4b7ffe3bc1b949c3f15c1e667b --- /dev/null +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts @@ -0,0 +1,432 @@ +/* + * MPC8360E RDK Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8360rdk"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8360@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <32768>; + i-cache-size = <32768>; + /* filled by u-boot */ + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + /* filled by u-boot */ + reg = <0 0>; + }; + + soc@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", + "simple-bus"; + ranges = <0 0xe0000000 0x200000>; + reg = <0xe0000000 0x200>; + /* filled by u-boot */ + bus-frequency = <0>; + + wdt@200 { + compatible = "mpc83xx_wdt"; + reg = <0x200 0x100>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <16 8>; + interrupt-parent = <&ipic>; + dfsrr; + }; + + serial0: serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + interrupts = <9 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + serial1: serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + interrupts = <10 8>; + interrupt-parent = <&ipic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + + crypto@30000 { + compatible = "fsl,sec2-crypto"; + reg = <0x30000 0x10000>; + interrupts = <11 8>; + interrupt-parent = <&ipic>; + num-channels = <4>; + channel-fifo-len = <24>; + exec-units-mask = <0x7e>; + /* + * desc mask is for rev1.x, we need runtime fixup + * for >=2.x + */ + descriptor-types-mask = <0x1010ebf>; + }; + + ipic: interrupt-controller@700 { + #address-cells = <0>; + #interrupt-cells = <2>; + compatible = "fsl,pq2pro-pic", "fsl,ipic"; + interrupt-controller; + reg = <0x700 0x100>; + }; + + qe_pio_b: gpio-controller@1418 { + #gpio-cells = <2>; + compatible = "fsl,mpc8360-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank"; + reg = <0x1418 0x18>; + gpio-controller; + }; + + qe_pio_e: gpio-controller@1460 { + #gpio-cells = <2>; + compatible = "fsl,mpc8360-qe-pario-bank", + "fsl,mpc8323-qe-pario-bank"; + reg = <0x1460 0x18>; + gpio-controller; + }; + + qe@100000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "qe"; + compatible = "fsl,qe", "simple-bus"; + ranges = <0 0x100000 0x100000>; + reg = <0x100000 0x480>; + /* filled by u-boot */ + clock-frequency = <0>; + bus-frequency = <0>; + brg-frequency = <0>; + + muram@10000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,qe-muram", "fsl,cpm-muram"; + ranges = <0 0x10000 0xc000>; + + data-only@0 { + compatible = "fsl,qe-muram-data", + "fsl,cpm-muram-data"; + reg = <0 0xc000>; + }; + }; + + timer@440 { + compatible = "fsl,mpc8360-qe-gtm", + "fsl,qe-gtm", "fsl,gtm"; + reg = <0x440 0x40>; + interrupts = <12 13 14 15>; + interrupt-parent = <&qeic>; + /* filled by u-boot */ + clock-frequency = <0>; + }; + + spi@4c0 { + cell-index = <0>; + compatible = "fsl,spi"; + reg = <0x4c0 0x40>; + interrupts = <2>; + interrupt-parent = <&qeic>; + mode = "cpu-qe"; + }; + + spi@500 { + cell-index = <1>; + compatible = "fsl,spi"; + reg = <0x500 0x40>; + interrupts = <1>; + interrupt-parent = <&qeic>; + mode = "cpu-qe"; + }; + + enet0: ucc@2000 { + device_type = "network"; + compatible = "ucc_geth"; + cell-index = <1>; + reg = <0x2000 0x200>; + interrupts = <32>; + interrupt-parent = <&qeic>; + rx-clock-name = "none"; + tx-clock-name = "clk9"; + phy-handle = <&phy2>; + phy-connection-type = "rgmii-rxid"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet1: ucc@3000 { + device_type = "network"; + compatible = "ucc_geth"; + cell-index = <2>; + reg = <0x3000 0x200>; + interrupts = <33>; + interrupt-parent = <&qeic>; + rx-clock-name = "none"; + tx-clock-name = "clk4"; + phy-handle = <&phy4>; + phy-connection-type = "rgmii-rxid"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet2: ucc@2600 { + device_type = "network"; + compatible = "ucc_geth"; + cell-index = <7>; + reg = <0x2600 0x200>; + interrupts = <42>; + interrupt-parent = <&qeic>; + rx-clock-name = "clk20"; + tx-clock-name = "clk19"; + phy-handle = <&phy1>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + enet3: ucc@3200 { + device_type = "network"; + compatible = "ucc_geth"; + cell-index = <4>; + reg = <0x3200 0x200>; + interrupts = <35>; + interrupt-parent = <&qeic>; + rx-clock-name = "clk8"; + tx-clock-name = "clk7"; + phy-handle = <&phy3>; + phy-connection-type = "mii"; + /* filled by u-boot */ + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + mdio@2120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,ucc-mdio"; + reg = <0x2120 0x18>; + + phy1: ethernet-phy@1 { + device_type = "ethernet-phy"; + compatible = "national,DP83848VV"; + reg = <1>; + }; + + phy2: ethernet-phy@2 { + device_type = "ethernet-phy"; + compatible = "broadcom,BCM5481UA2KMLG"; + reg = <2>; + }; + + phy3: ethernet-phy@3 { + device_type = "ethernet-phy"; + compatible = "national,DP83848VV"; + reg = <3>; + }; + + phy4: ethernet-phy@4 { + device_type = "ethernet-phy"; + compatible = "broadcom,BCM5481UA2KMLG"; + reg = <4>; + }; + }; + + serial2: ucc@2400 { + device_type = "serial"; + compatible = "ucc_uart"; + reg = <0x2400 0x200>; + cell-index = <5>; + port-number = <0>; + rx-clock-name = "brg7"; + tx-clock-name = "brg8"; + interrupts = <40>; + interrupt-parent = <&qeic>; + soft-uart; + }; + + serial3: ucc@3400 { + device_type = "serial"; + compatible = "ucc_uart"; + reg = <0x3400 0x200>; + cell-index = <6>; + port-number = <1>; + rx-clock-name = "brg13"; + tx-clock-name = "brg14"; + interrupts = <41>; + interrupt-parent = <&qeic>; + soft-uart; + }; + + qeic: interrupt-controller@80 { + #address-cells = <0>; + #interrupt-cells = <1>; + compatible = "fsl,qe-ic"; + interrupt-controller; + reg = <0x80 0x80>; + big-endian; + interrupts = <32 8 33 8>; + interrupt-parent = <&ipic>; + }; + }; + }; + + localbus@e0005000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", + "simple-bus"; + reg = <0xe0005000 0xd8>; + ranges = <0 0 0xff800000 0x0800000 + 1 0 0x60000000 0x0001000 + 2 0 0x70000000 0x4000000>; + + flash@0,0 { + compatible = "intel,PC28F640P30T85", "cfi-flash"; + reg = <0 0 0x800000>; + bank-width = <2>; + device-width = <1>; + }; + + display@2,0 { + device_type = "display"; + compatible = "fujitsu,MB86277", "fujitsu,mint"; + reg = <2 0 0x4000000>; + fujitsu,sh3; + little-endian; + /* filled by u-boot */ + address = <0>; + depth = <0>; + width = <0>; + height = <0>; + linebytes = <0>; + /* linux,opened; - added by uboot */ + }; + }; + + pci0: pci@e0008500 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; + reg = <0xe0008500 0x100>; + ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 + 0x42000000 0 0x80000000 0x80000000 0 0x10000000 + 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; + interrupts = <66 8>; + interrupt-parent = <&ipic>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = ; + /* filled by u-boot */ + bus-range = <0 0>; + clock-frequency = <0>; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index fea592574004dae7e7f0fe8834de260d0979ce81..0a700cb5f6110ba53f83f2b36d107ba70f8c01d2 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -233,41 +233,6 @@ interrupt-parent = <&ipic>; }; - crypto@30000 { - model = "SEC3"; - compatible = "talitos"; - reg = <0x30000 0x10000>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; - }; - - sdhc@2e000 { - model = "eSDHC"; - compatible = "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - }; - - sata@18000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x18000 0x1000>; - interrupts = <44 0x8>; - interrupt-parent = <&ipic>; - }; - - sata@19000 { - compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; - reg = <0x19000 0x1000>; - interrupts = <45 0x8>; - interrupt-parent = <&ipic>; - }; - dma@82a8 { #address-cells = <1>; #size-cells = <1>; @@ -303,6 +268,40 @@ }; }; + crypto@30000 { + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <11 0x8>; + interrupt-parent = <&ipic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + + sdhc@2e000 { + model = "eSDHC"; + compatible = "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + }; + + sata@18000 { + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; + reg = <0x18000 0x1000>; + interrupts = <44 0x8>; + interrupt-parent = <&ipic>; + }; + + sata@19000 { + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; + reg = <0x19000 0x1000>; + interrupts = <45 0x8>; + interrupt-parent = <&ipic>; + }; + /* IPIC * interrupts cell = * sense values match linux IORESOURCE_IRQ_* defines: diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index f3083c779b6697ec2e7c15937ab71bf577908ac2..ed137aa83d5f01d5c4e50442a6d521a1db84c7ce 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -143,6 +143,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -213,17 +248,15 @@ }; crypto@30000 { - model = "SEC3"; - device_type = "crypto"; - compatible = "talitos"; + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; }; sata@18000 { diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index 1d6ea080ad730d6224caecf1d185a9b69e1aeea0..29c8c76a58f7d122dbcc8febdf37668b1ad57dc5 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -157,6 +157,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -234,16 +269,15 @@ }; crypto@30000 { - model = "SEC3"; - compatible = "talitos"; + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; }; sdhc@2e000 { diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 0e872a60e091fe34ec5757f5e1d0ce4ca2760f93..34a7f2f935e1482d72717d0045fee840a58e69bf 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -143,6 +143,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -213,17 +248,15 @@ }; crypto@30000 { - model = "SEC3"; - device_type = "crypto"; - compatible = "talitos"; + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; }; /* IPIC diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index 6f78a9fd98266254295b13005437b37290e18c1a..d641a8985ea38e87954b6d77c869308ee1730e66 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -157,6 +157,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -234,16 +269,15 @@ }; crypto@30000 { - model = "SEC3"; - compatible = "talitos"; + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; }; sdhc@2e000 { diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 1eb8defaff6fff78147355fabb24856925c40011..e4d7030d50e558ded5a02f4566d2b5d3cf2a0d08 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -143,6 +143,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -213,17 +248,15 @@ }; crypto@30000 { - model = "SEC3"; - device_type = "crypto"; - compatible = "talitos"; + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - /* Rev. 3.0 geometry */ - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x000001fe>; - descriptor-types-mask = <0x03ab0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; }; sata@18000 { diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts new file mode 100644 index 0000000000000000000000000000000000000000..02cfa24a1695265bb60faa17f138de56da4a2674 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8536ds.dts @@ -0,0 +1,432 @@ +/* + * MPC8536 DS Device Tree Source + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "fsl,mpc8536ds"; + compatible = "fsl,mpc8536ds"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + pci3 = &pci3; + }; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8536@0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 00000000>; // Filled by U-Boot + }; + + soc@ffe00000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xffe00000 0x100000>; + reg = <0xffe00000 0x1000>; + bus-frequency = <0>; // Filled out by uboot. + + memory-controller@2000 { + compatible = "fsl,mpc8536-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 0x2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8536-l2-cache-controller"; + reg = <0x20000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <16 0x2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 0x2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 0x2>; + interrupt-parent = <&mpic>; + dfsrr; + rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + }; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma"; + reg = <0x21300 4>; + ranges = <0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8536-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <14 0x2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8536-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <15 0x2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8536-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <16 0x2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8536-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <17 0x2>; + }; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <10 0x1>; + reg = <0>; + device_type = "ethernet-phy"; + }; + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <10 0x1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + + usb@22000 { + compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; + reg = <0x22000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&mpic>; + interrupts = <28 0x2>; + phy_type = "ulpi"; + }; + + usb@23000 { + compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph"; + reg = <0x23000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&mpic>; + interrupts = <46 0x2>; + phy_type = "ulpi"; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; + + enet1: ethernet@26000 { + cell-index = <1>; + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 32 2 33 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; + phy-connection-type = "rgmii-id"; + }; + + usb@2b000 { + compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr"; + reg = <0x2b000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&mpic>; + interrupts = <60 0x2>; + dr_mode = "peripheral"; + phy_type = "ulpi"; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <42 0x2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <42 0x2>; + interrupt-parent = <&mpic>; + }; + + crypto@30000 { + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 58 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + + sata@18000 { + compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; + reg = <0x18000 0x1000>; + cell-index = <1>; + interrupts = <74 0x2>; + interrupt-parent = <&mpic>; + }; + + sata@19000 { + compatible = "fsl,mpc8536-sata", "fsl,pq-sata"; + reg = <0x19000 0x1000>; + cell-index = <2>; + interrupts = <41 0x2>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { //global utilities block + compatible = "fsl,mpc8548-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + big-endian; + }; + + msi@41600 { + compatible = "fsl,mpc8536-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; + }; + + pci0: pci@ffe08000 { + cell-index = <0>; + compatible = "fsl,mpc8540-pci"; + device_type = "pci"; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + + /* IDSEL 0x11 J17 Slot 1 */ + 0x8800 0 0 1 &mpic 1 1 + 0x8800 0 0 2 &mpic 2 1 + 0x8800 0 0 3 &mpic 3 1 + 0x8800 0 0 4 &mpic 4 1>; + + interrupt-parent = <&mpic>; + interrupts = <24 0x2>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000 + 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>; + clock-frequency = <66666666>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xffe08000 0x1000>; + }; + + pci1: pcie@ffe09000 { + cell-index = <1>; + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xffe09000 0x1000>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000 + 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <25 0x2>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 4 1 + 0000 0 0 2 &mpic 5 1 + 0000 0 0 3 &mpic 6 1 + 0000 0 0 4 &mpic 7 1 + >; + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0 0x98000000 + 0x02000000 0 0x98000000 + 0 0x08000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe0a000 { + cell-index = <2>; + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xffe0a000 0x1000>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000 + 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <26 0x2>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 0 1 + 0000 0 0 2 &mpic 1 1 + 0000 0 0 3 &mpic 2 1 + 0000 0 0 4 &mpic 3 1 + >; + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0 0x90000000 + 0x02000000 0 0x90000000 + 0 0x08000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00010000>; + }; + }; + + pci3: pcie@ffe0b000 { + cell-index = <3>; + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xffe0b000 0x1000>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 + 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <27 0x2>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0 0 1 &mpic 8 1 + 0000 0 0 2 &mpic 9 1 + 0000 0 0 3 &mpic 10 1 + 0000 0 0 4 &mpic 11 1 + >; + + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x20000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00100000>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 18033ed0b5356319332b71b035fbda62d87b25c5..f2273a872b112e2610c9b9a4bbc6afecd236e389 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts @@ -40,6 +40,7 @@ timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; }; }; @@ -63,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -83,6 +84,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -165,14 +207,12 @@ interrupt-parent = <&mpic>; }; mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; }; diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 663c7c50ca4552c90a9362e933305cd83e5ccda9..c4469f19ff82814070ac3fb3465364665a1da0e0 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts @@ -40,6 +40,7 @@ timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; }; }; @@ -63,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8541-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -83,6 +84,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -147,15 +189,24 @@ interrupt-parent = <&mpic>; }; + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; + mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; cpm@919c0 { diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 6a0d8db96d97c8935838e6978ec88a3583deca42..7d3829d3495e1ac52d2fbd85e3fd1ba92575493b 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts @@ -41,6 +41,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -65,7 +66,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8544-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -209,15 +210,40 @@ fsl,has-rstcr; }; + crypto@30000 { + compatible = "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xfe>; + fsl,descriptor-types-mask = <0x12b0ebf>; + }; + mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; + }; + + msi@41600 { + compatible = "fsl,mpc8544-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; }; }; diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 4811b8107415cd610e8ea760d4fbdcb0455ebe32..d84466bb7ecaa30739b9006f69dd5b69ed8dcb74 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts @@ -45,6 +45,7 @@ timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; }; }; @@ -68,7 +69,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8548-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -99,6 +100,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -207,15 +249,24 @@ fsl,has-rstcr; }; + crypto@30000 { + compatible = "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xfe>; + fsl,descriptor-types-mask = <0x12b0ebf>; + }; + mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; }; diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index b025c566c10d1cf725a3675d113f0efb6c73c940..e03a780062832d7be3d167de7f564d4d8b04f2ce 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts @@ -40,6 +40,7 @@ timebase-frequency = <0>; // 33 MHz, from uboot bus-frequency = <0>; // 166 MHz clock-frequency = <0>; // 825 MHz, from uboot + next-level-cache = <&L2>; }; }; @@ -63,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8555-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -83,6 +84,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -147,15 +189,24 @@ interrupt-parent = <&mpic>; }; + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; + mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; cpm@919c0 { diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 0cc16ab305d118879ad59dba5a144bc21a6af1c6..ba8159de040be8a406f7f48bd84f512b3e500376 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -64,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -73,6 +73,47 @@ interrupts = <16 2>; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -134,6 +175,7 @@ #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; device_type = "open-pic"; }; diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index a025a8ededc5706277795ca44d7997aa722e1187..9c30a34821dcf73e0163fd01f13954be51ef6980 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts @@ -42,6 +42,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -70,7 +71,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8568-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -106,6 +107,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8568-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8568-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8568-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8568-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -189,27 +231,23 @@ }; crypto@30000 { - device_type = "crypto"; - model = "SEC2"; - compatible = "talitos"; - reg = <0x30000 0xf000>; + compatible = "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; interrupts = <45 2>; interrupt-parent = <&mpic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0xfe>; - descriptor-types-mask = <0x12b0ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xfe>; + fsl,descriptor-types-mask = <0x12b0ebf>; }; mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; par_io@e0100 { diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 66f27ab613a28eb89f893c98283af7aef9ad2c25..08c61e3daeccabdf3fd3abb2967811ac5ca80786 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -42,6 +42,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; PowerPC,8572@1 { @@ -54,6 +55,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -84,7 +86,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,mpc8572-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; // 32 bytes @@ -115,6 +117,88 @@ dfsrr; }; + dma@c300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; + reg = <0xc300 0x4>; + ranges = <0x0 0xc100 0x200>; + cell-index = <1>; + dma-channel@0 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <76 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <77 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <78 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <79 2>; + }; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8572-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -221,15 +305,41 @@ fsl,has-rstcr; }; + msi@41600 { + compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; + }; + + crypto@30000 { + compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", + "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2 58 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x9fe>; + fsl,descriptor-types-mask = <0x3ab0ebf>; + }; + mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; }; diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index fa9b6bbeb5afdd5d87018d13e3f2736881615a62..666185f594591fbd8e43f853fca1bc83f287e6b8 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts @@ -172,14 +172,28 @@ }; mpic: interrupt-controller@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; + }; + + msi@41600 { + compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; + reg = <0x41600 0x80>; + msi-available-ranges = <0 0x100>; + interrupts = < + 0xe0 0 + 0xe1 0 + 0xe2 0 + 0xe3 0 + 0xe4 0 + 0xe5 0 + 0xe6 0 + 0xe7 0>; + interrupt-parent = <&mpic>; }; global-utilities@e0000 { @@ -349,7 +363,7 @@ 0xe000 0 0 4 &mpic 1 1 /* IDSEL 0x1f */ - 0xf800 0 0 1 &mpic 3 0 + 0xf800 0 0 1 &mpic 3 2 0xf800 0 0 2 &mpic 0 1 >; @@ -374,6 +388,20 @@ 0x01000000 0x0 0x00000000 0x01000000 0x0 0x00000000 0x0 0x00100000>; + + isa@1e { + device_type = "isa"; + #size-cells = <1>; + #address-cells = <2>; + reg = <0xf000 0 0 0 0>; + ranges = <1 0 0x01000000 0 0 + 0x00001000>; + + rtc@70 { + compatible = "pnpPNP,b00"; + reg = <1 0x70 2>; + }; + }; }; }; }; diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 1e4bfe9cadb99093f58532aed1eea73a4cdf3c3e..ae08761ffff179f892a83357cbbe8ff17790017f 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts @@ -134,6 +134,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -239,14 +280,12 @@ }; mpic: pic@40000 { - clock-frequency = <0>; interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; global-utilities@e0000 { diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts index 765e43c997da1458b6aae6ea1216b59e57aff390..bd700651f360d220e4b7d85c2261532f5095f68c 100644 --- a/arch/powerpc/boot/dts/mpc866ads.dts +++ b/arch/powerpc/boot/dts/mpc866ads.dts @@ -171,6 +171,17 @@ fsl,cpm-command = <0000>; linux,network-index = <1>; }; + + i2c@860 { + compatible = "fsl,mpc866-i2c", + "fsl,cpm1-i2c"; + reg = <0x860 0x20 0x3c80 0x30>; + interrupts = <16>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-command = <0x10>; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts index 9895043722b9fd1a88f4ebd05df9b3606cbcad0f..b123e9f7a5a860d2125682918bf9f46fe690dff4 100644 --- a/arch/powerpc/boot/dts/mpc885ads.dts +++ b/arch/powerpc/boot/dts/mpc885ads.dts @@ -215,6 +215,17 @@ fsl,cpm-command = <0x80>; linux,network-index = <2>; }; + + i2c@860 { + compatible = "fsl,mpc885-i2c", + "fsl,cpm1-i2c"; + reg = <0x860 0x20 0x3c80 0x30>; + interrupts = <16>; + interrupt-parent = <&CPM_PIC>; + fsl,cpm-command = <0x10>; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; diff --git a/arch/powerpc/boot/dts/ps3.dts b/arch/powerpc/boot/dts/ps3.dts index 379ded282d5e03c32e7a02c39a3616fa28e665c8..96ba5b512afe88a7c955eaaca963619edf20cb37 100644 --- a/arch/powerpc/boot/dts/ps3.dts +++ b/arch/powerpc/boot/dts/ps3.dts @@ -18,6 +18,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +/dts-v1/; + / { model = "SonyPS3"; compatible = "sony,ps3"; @@ -34,7 +36,7 @@ memory { device_type = "memory"; - reg = <0 0 0 0>; + reg = <0x00000000 0x00000000 0x00000000 0x00000000>; }; /* @@ -55,14 +57,14 @@ cpu@0 { device_type = "cpu"; - reg = <0>; - ibm,ppc-interrupt-server#s = <0 1>; + reg = <0x00000000>; + ibm,ppc-interrupt-server#s = <0x0 0x1>; clock-frequency = <0>; timebase-frequency = <0>; - i-cache-size = <8000>; - d-cache-size = <8000>; - i-cache-line-size = <80>; - d-cache-line-size = <80>; + i-cache-size = <32768>; + d-cache-size = <32768>; + i-cache-line-size = <128>; + d-cache-line-size = <128>; }; }; }; diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts index 6a8fa7089ea2a456bf73f84cb805fec262dcf62b..9684c80e40931927cc5879dfa3935eebd12b70aa 100644 --- a/arch/powerpc/boot/dts/rainier.dts +++ b/arch/powerpc/boot/dts/rainier.dts @@ -12,12 +12,14 @@ * */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,rainier"; compatible = "amcc,rainier"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -35,13 +37,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440GRx"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -49,14 +51,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440grx","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -66,11 +68,11 @@ compatible = "ibm,uic-440grx","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -78,22 +80,22 @@ compatible = "ibm,uic-440grx","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1c 4 1d 4>; /* cascade */ + interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -105,80 +107,80 @@ SDRAM0: sdram { compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; DMA0: dma { compatible = "ibm,dma-440grx", "ibm,dma-4xx"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { compatible = "ibm,opb-440grx", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <00000000 1 00000000 80000000 - 80000000 1 80000000 80000000>; + ranges = <0x00000000 0x00000001 0x00000000 0x80000000 + 0x80000000 0x00000001 0x80000000 0x80000000>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440grx", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl256n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "Kernel"; - reg = <0 180000>; + reg = <0x00000000 0x00180000>; }; partition@180000 { label = "ramdisk"; - reg = <180000 200000>; + reg = <0x00180000 0x00200000>; }; partition@380000 { label = "file system"; - reg = <380000 3aa0000>; + reg = <0x00380000 0x03aa0000>; }; partition@3e20000 { label = "kozio"; - reg = <3e20000 140000>; + reg = <0x03e20000 0x00140000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; @@ -187,69 +189,69 @@ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC1>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC1>; - interrupts = <4 4>; + interrupts = <0x4 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-440grx", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-440grx", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-440grx", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; RGMII0: emac-rgmii@ef601000 { compatible = "ibm,rgmii-440grx", "ibm,rgmii"; - reg = ; + reg = <0xef601000 0x00000008>; has-mdio; }; @@ -257,23 +259,23 @@ device_type = "network"; compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600e00 0x00000074>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <0>; rgmii-device = <&RGMII0>; @@ -286,23 +288,23 @@ device_type = "network"; compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600f00 0x00000074>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <1>; rgmii-device = <&RGMII0>; @@ -319,24 +321,25 @@ #address-cells = <3>; compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; primary; - reg = <1 eec00000 8 /* Config space access */ - 1 eed00000 4 /* IACK */ - 1 eed00000 4 /* Special cycle */ - 1 ef400000 40>; /* Internal registers */ + reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ + 0x00000001 0xeed00000 0x00000004 /* IACK */ + 0x00000001 0xeed00000 0x00000004 /* Special cycle */ + 0x00000001 0xef400000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <02000000 0 80000000 1 80000000 0 10000000 - 01000000 0 00000000 1 e8000000 0 00100000>; + ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 + 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 + 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0000 0 0 0>; - interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/sam440ep.dts b/arch/powerpc/boot/dts/sam440ep.dts new file mode 100644 index 0000000000000000000000000000000000000000..f0663be104210e4edc3eb527bc1dcfd0d6af7233 --- /dev/null +++ b/arch/powerpc/boot/dts/sam440ep.dts @@ -0,0 +1,293 @@ +/* + * Device Tree Source for ACube Sam440ep based off bamboo.dts code + * original copyrights below + * + * Copyright (c) 2006, 2007 IBM Corp. + * Josh Boyer + * + * Modified from bamboo.dts for sam440ep: + * Copyright 2008 Giuseppe Coviello + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "acube,sam440ep"; + compatible = "acube,sam440ep"; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + serial0 = &UART0; + serial1 = &UART1; + serial2 = &UART2; + serial3 = &UART3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,440EP"; + reg = <0>; + clock-frequency = <0>; /* Filled in by zImage */ + timebase-frequency = <0>; /* Filled in by zImage */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0 0>; /* Filled in by zImage */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-440ep","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x0c0 9>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-440ep","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x0d0 9>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x1e 4 0x1f 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-440ep"; + dcr-reg = <0x00e 2>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-440ep"; + dcr-reg = <0x00c 2>; + }; + + plb { + compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by zImage */ + + SDRAM0: sdram { + compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; + dcr-reg = <0x010 2>; + }; + + DMA0: dma { + compatible = "ibm,dma-440ep", "ibm,dma-440gp"; + dcr-reg = <0x100 0x027>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; + dcr-reg = <0x180 0x062>; + num-tx-chans = <4>; + num-rx-chans = <2>; + interrupt-parent = <&MAL0>; + interrupts = <0 1 2 3 4>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + }; + + POB0: opb { + compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + /* Bamboo is oddball in the 44x world and doesn't use the ERPN + * bits. + */ + ranges = <0x00000000 0 0x00000000 0x80000000 + 0x80000000 0 0x80000000 0x80000000>; + interrupt-parent = <&UIC1>; + interrupts = <7 4>; + clock-frequency = <0>; /* Filled in by zImage */ + + EBC0: ebc { + compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; + dcr-reg = <0x012 2>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by zImage */ + interrupts = <5 1>; + interrupt-parent = <&UIC1>; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 8>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by zImage */ + current-speed = <0x1c200>; + interrupt-parent = <&UIC0>; + interrupts = <0 4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600400 8>; + virtual-reg = <0xef600400>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <1 4>; + }; + + UART2: serial@ef600500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600500 8>; + virtual-reg = <0xef600500>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <3 4>; + }; + + UART3: serial@ef600600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600600 8>; + virtual-reg = <0xef600600>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <4 4>; + }; + + IIC0: i2c@ef600700 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; + index = <0>; + reg = <0xef600700 0x14>; + interrupt-parent = <&UIC0>; + interrupts = <2 4>; + rtc@68 { + compatible = "stm,m41t80"; + reg = <0x68>; + }; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; + index = <5>; + reg = <0xef600800 0x14>; + interrupt-parent = <&UIC0>; + interrupts = <7 4>; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; + reg = <0xef600d00 0xc>; + }; + + EMAC0: ethernet@ef600e00 { + linux,network-index = <0>; + device_type = "network"; + compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; + interrupt-parent = <&UIC1>; + interrupts = <0x1c 4 0x1d 4>; + reg = <0xef600e00 0x70>; + local-mac-address = [000000000000]; + mal-device = <&MAL0>; + mal-tx-channel = <0 1>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <0x5dc>; + rx-fifo-size = <0x1000>; + tx-fifo-size = <0x800>; + phy-mode = "rmii"; + phy-map = <00000000>; + zmii-device = <&ZMII0>; + zmii-channel = <0>; + }; + + EMAC1: ethernet@ef600f00 { + linux,network-index = <1>; + device_type = "network"; + compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; + interrupt-parent = <&UIC1>; + interrupts = <0x1e 4 0x1f 4>; + reg = <0xef600f00 0x70>; + local-mac-address = [000000000000]; + mal-device = <&MAL0>; + mal-tx-channel = <2 3>; + mal-rx-channel = <1>; + cell-index = <1>; + max-frame-size = <0x5dc>; + rx-fifo-size = <0x1000>; + tx-fifo-size = <0x800>; + phy-mode = "rmii"; + phy-map = <00000000>; + zmii-device = <&ZMII0>; + zmii-channel = <1>; + }; + usb@ef601000 { + compatible = "ohci-be"; + reg = <0xef601000 0x80>; + interrupts = <8 4 9 4>; + interrupt-parent = <&UIC1>; + }; + }; + + PCI0: pci@ec000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; + primary; + reg = <0 0xeec00000 8 /* Config space access */ + 0 0xeed00000 4 /* IACK */ + 0 0xeed00000 4 /* Special cycle */ + 0 0xef400000 0x40>; /* Internal registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed. Chip supports a second + * IO range but we don't use it for now + */ + ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 + 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; + }; + }; + + chosen { + linux,stdout-path = "/plb/opb/serial@ef600300"; + }; +}; diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index 3839d4b7d6a7fc4d7b871ae2e78519519a9318da..45f789b56709b410133cb778a4a3c0e736778484 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts @@ -95,6 +95,41 @@ mode = "cpu"; }; + dma@82a8 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; + reg = <0x82a8 4>; + ranges = <0 0x8100 0x1a8>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@80 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x80 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@100 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x100 0x80>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + dma-channel@180 { + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; + reg = <0x180 0x28>; + interrupt-parent = <&ipic>; + interrupts = <71 8>; + }; + }; + /* phy type (ULPI or SERIAL) are only types supported for MPH */ /* port = 0 or 1 */ usb@22000 { @@ -186,19 +221,15 @@ interrupt-parent = <&ipic>; }; - /* May need to remove if on a part without crypto engine */ crypto@30000 { - model = "SEC2"; - compatible = "talitos"; + compatible = "fsl,sec2.0"; reg = <0x30000 0x10000>; interrupts = <11 0x8>; interrupt-parent = <&ipic>; - num-channels = <4>; - channel-fifo-len = <24>; - exec-units-mask = <0x0000007e>; - /* desc mask is for rev2.0, - * we need runtime fixup for >2.0 */ - descriptor-types-mask = <0x01010ebf>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; }; /* IPIC diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index 22d967178fe9c4e00ab99dae429ddaa96255eadc..333552b4e90dd1d417ebe31cbf3c5ef0d248aab2 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts @@ -44,6 +44,7 @@ timebase-frequency = <0>; // From uboot bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -161,7 +162,7 @@ interrupts = <0x12 0x2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8548-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; // 32 bytes @@ -192,6 +193,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -262,15 +304,24 @@ fsl,has-rstcr; }; + crypto@30000 { + compatible = "fsl,sec2.1", "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0xfe>; + fsl,descriptor-types-mask = <0x12b0ebf>; + }; + mpic: pic@40000 { interrupt-controller; #address-cells = <0>; - #size-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; compatible = "chrp,open-pic"; device_type = "open-pic"; - big-endian; }; }; diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index 0476802fba6003370b71be5654595939865e28e5..db3632ef9888f3270a4885ba647f88bceb9c8ac8 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts @@ -43,6 +43,7 @@ timebase-frequency = <0>; // From uboot bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -66,7 +67,7 @@ interrupts = <0x12 0x2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8560-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <0x20>; // 32 bytes @@ -97,6 +98,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -155,8 +197,8 @@ mpic: pic@40000 { interrupt-controller; #address-cells = <0>; - #size-cells = <0>; #interrupt-cells = <2>; + compatible = "chrp,open-pic"; reg = <0x40000 0x40000>; device_type = "open-pic"; }; diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts index 3eebeec157b3a83512918995d66bd041b380c03d..9652456158fbac84db0da31f7e7825e61bcabd9f 100644 --- a/arch/powerpc/boot/dts/sbc8641d.dts +++ b/arch/powerpc/boot/dts/sbc8641d.dts @@ -151,6 +151,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts index 72d67564bdfc6302a3d48185761aa5abeadd67ce..72d15f075d34638a377b27d62355e1e38adf455c 100644 --- a/arch/powerpc/boot/dts/sequoia.dts +++ b/arch/powerpc/boot/dts/sequoia.dts @@ -12,12 +12,14 @@ * */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,sequoia"; compatible = "amcc,sequoia"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -35,13 +37,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440EPx"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -49,14 +51,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440epx","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -66,11 +68,11 @@ compatible = "ibm,uic-440epx","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; @@ -78,22 +80,22 @@ compatible = "ibm,uic-440epx","ibm,uic"; interrupt-controller; cell-index = <2>; - dcr-reg = <0e0 009>; + dcr-reg = <0x0e0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1c 4 1d 4>; /* cascade */ + interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -105,44 +107,44 @@ SDRAM0: sdram { compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; DMA0: dma { compatible = "ibm,dma-440epx", "ibm,dma-4xx"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <2>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; USB1: usb@e0000400 { compatible = "ohci-be"; - reg = <0 e0000400 60>; + reg = <0x00000000 0xe0000400 0x00000060>; interrupt-parent = <&UIC0>; - interrupts = <15 8>; + interrupts = <0x15 0x8>; }; USB0: ehci@e0000300 { compatible = "ibm,usb-ehci-440epx", "usb-ehci"; interrupt-parent = <&UIC0>; - interrupts = <1a 4>; - reg = <0 e0000300 90 0 e0000390 70>; + interrupts = <0x1a 0x4>; + reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; big-endian; }; @@ -150,50 +152,50 @@ compatible = "ibm,opb-440epx", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <00000000 1 00000000 80000000 - 80000000 1 80000000 80000000>; + ranges = <0x00000000 0x00000001 0x00000000 0x80000000 + 0x80000000 0x00000001 0x80000000 0x80000000>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440epx", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; nor_flash@0,0 { compatible = "amd,s29gl256n", "cfi-flash"; bank-width = <2>; - reg = <0 000000 4000000>; + reg = <0x00000000 0x00000000 0x04000000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "Kernel"; - reg = <0 180000>; + reg = <0x00000000 0x00180000>; }; partition@180000 { label = "ramdisk"; - reg = <180000 200000>; + reg = <0x00180000 0x00200000>; }; partition@380000 { label = "file system"; - reg = <380000 3aa0000>; + reg = <0x00380000 0x03aa0000>; }; partition@3e20000 { label = "kozio"; - reg = <3e20000 140000>; + reg = <0x03e20000 0x00140000>; }; partition@3f60000 { label = "env"; - reg = <3f60000 40000>; + reg = <0x03f60000 0x00040000>; }; partition@3fa0000 { label = "u-boot"; - reg = <3fa0000 60000>; + reg = <0x03fa0000 0x00060000>; }; }; @@ -202,69 +204,69 @@ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC1>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC1>; - interrupts = <4 4>; + interrupts = <0x4 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-440epx", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-440epx", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-440epx", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; RGMII0: emac-rgmii@ef601000 { compatible = "ibm,rgmii-440epx", "ibm,rgmii"; - reg = ; + reg = <0xef601000 0x00000008>; has-mdio; }; @@ -272,23 +274,23 @@ device_type = "network"; compatible = "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC0>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600e00 0x00000074>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <0>; rgmii-device = <&RGMII0>; @@ -301,23 +303,23 @@ device_type = "network"; compatible = "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC1>; - interrupts = <0 1>; + interrupts = <0x0 0x1>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - reg = ; + interrupt-map = ; + reg = <0xef600f00 0x00000074>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <1>; rgmii-device = <&RGMII0>; @@ -334,10 +336,10 @@ #address-cells = <3>; compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; primary; - reg = <1 eec00000 8 /* Config space access */ - 1 eed00000 4 /* IACK */ - 1 eed00000 4 /* Special cycle */ - 1 ef400000 40>; /* Internal registers */ + reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ + 0x00000001 0xeed00000 0x00000004 /* IACK */ + 0x00000001 0xeed00000 0x00000004 /* Special cycle */ + 0x00000001 0xef400000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second @@ -347,16 +349,16 @@ * I/O 1 E800 0000 1 E800 FFFF 64KB * I/O 1 E880 0000 1 EBFF FFFF 56MB */ - ranges = <02000000 0 80000000 1 80000000 0 40000000 - 01000000 0 00000000 1 e8000000 0 00010000 - 01000000 0 00000000 1 e8800000 0 03800000>; + ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 + 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 + 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* All PCI interrupts are routed to IRQ 67 */ - interrupt-map-mask = <0000 0 0 0>; - interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; + interrupt-map-mask = <0x0 0x0 0x0 0x0>; + interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts index 5893816c0bcecc5b18ec1653c1cbb2e5c3cc8c1c..eab680ce10da035003ca19670553e5a1ab900ece 100644 --- a/arch/powerpc/boot/dts/storcenter.dts +++ b/arch/powerpc/boot/dts/storcenter.dts @@ -95,6 +95,7 @@ mpic: interrupt-controller@40000 { #interrupt-cells = <2>; + #address-cells = <0>; device_type = "open-pic"; compatible = "chrp,open-pic"; interrupt-controller; diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index f81fd7fdb29e1ef58f424404904bfddfcd4126ab..fcd1db6ca0a8e10ea0860c349e75882ac9c473fb 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts @@ -38,6 +38,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -62,7 +63,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; @@ -82,6 +83,47 @@ dfsrr; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -131,6 +173,7 @@ #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; device_type = "open-pic"; }; diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts index e808e1c5593a924c24bb8d11f9f2e636da6ee903..058438f9629b814263f30623aebab22b9731903d 100644 --- a/arch/powerpc/boot/dts/taishan.dts +++ b/arch/powerpc/boot/dts/taishan.dts @@ -10,12 +10,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,taishan"; compatible = "amcc,taishan"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC2; @@ -31,13 +33,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440GX"; - reg = <0>; - clock-frequency = <2FAF0800>; // 800MHz + reg = <0x00000000>; + clock-frequency = <800000000>; // 800MHz timebase-frequency = <0>; // Filled in by zImage - i-cache-line-size = <32>; - d-cache-line-size = <32>; - i-cache-size = <8000>; /* 32 kB */ - d-cache-size = <8000>; /* 32 kB */ + i-cache-line-size = <50>; + d-cache-line-size = <50>; + i-cache-size = <32768>; /* 32 kB */ + d-cache-size = <32768>; /* 32 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -45,7 +47,7 @@ memory { device_type = "memory"; - reg = <0 0 0>; // Filled in by zImage + reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage }; @@ -53,7 +55,7 @@ compatible = "ibm,uic-440gx", "ibm,uic"; interrupt-controller; cell-index = <3>; - dcr-reg = <200 009>; + dcr-reg = <0x200 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -64,11 +66,11 @@ compatible = "ibm,uic-440gx", "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <01 4 00 4>; /* cascade - first non-critical */ + interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */ interrupt-parent = <&UICB0>; }; @@ -77,11 +79,11 @@ compatible = "ibm,uic-440gx", "ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <03 4 02 4>; /* cascade */ + interrupts = <0x3 0x4 0x2 0x4>; /* cascade */ interrupt-parent = <&UICB0>; }; @@ -89,29 +91,29 @@ compatible = "ibm,uic-440gx", "ibm,uic"; interrupt-controller; cell-index = <2>; /* was 1 */ - dcr-reg = <210 009>; + dcr-reg = <0x210 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <05 4 04 4>; /* cascade */ + interrupts = <0x5 0x4 0x4 0x4>; /* cascade */ interrupt-parent = <&UICB0>; }; CPC0: cpc { compatible = "ibm,cpc-440gp"; - dcr-reg = <0b0 003 0e0 010>; + dcr-reg = <0x0b0 0x003 0x0e0 0x010>; // FIXME: anything else? }; L2C0: l2c { compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; - dcr-reg = <20 8 /* Internal SRAM DCR's */ - 30 8>; /* L2 cache DCR's */ - cache-line-size = <20>; /* 32 bytes */ - cache-size = <40000>; /* L2, 256K */ + dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ + 0x030 0x008>; /* L2 cache DCR's */ + cache-line-size = <32>; /* 32 bytes */ + cache-size = <262144>; /* L2, 256K */ interrupt-parent = <&UIC2>; - interrupts = <17 1>; + interrupts = <0x17 0x1>; }; plb { @@ -119,41 +121,41 @@ #address-cells = <2>; #size-cells = <1>; ranges; - clock-frequency = <9896800>; // 160MHz + clock-frequency = <160000000>; // 160MHz SDRAM0: memory-controller { compatible = "ibm,sdram-440gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; // FIXME: anything else? }; SRAM0: sram { compatible = "ibm,sram-440gp"; - dcr-reg = <020 8 00a 1>; + dcr-reg = <0x020 0x008 0x00a 0x001>; }; DMA0: dma { // FIXME: ??? compatible = "ibm,dma-440gp"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <4>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; - interrupt-map-mask = ; + interrupt-map = ; + interrupt-map-mask = <0xffffffff>; }; POB0: opb { @@ -162,29 +164,56 @@ #size-cells = <1>; /* Wish there was a nicer way of specifying a full 32-bit range */ - ranges = <00000000 1 00000000 80000000 - 80000000 1 80000000 80000000>; - dcr-reg = <090 00b>; + ranges = <0x00000000 0x00000001 0x00000000 0x80000000 + 0x80000000 0x00000001 0x80000000 0x80000000>; + dcr-reg = <0x090 0x00b>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; - clock-frequency = <4C4B400>; // 80MHz + interrupts = <0x7 0x4>; + clock-frequency = <80000000>; // 80MHz EBC0: ebc { compatible = "ibm,ebc-440gx", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; - clock-frequency = <4C4B400>; // 80MHz + clock-frequency = <80000000>; // 80MHz /* ranges property is supplied by zImage * based on firmware's configuration of the * EBC bridge */ - interrupts = <5 4>; + interrupts = <0x5 0x4>; interrupt-parent = <&UIC1>; - /* TODO: Add other EBC devices */ + nor_flash@0,0 { + compatible = "cfi-flash"; + bank-width = <4>; + device-width = <2>; + reg = <0x0 0x0 0x4000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "kernel"; + reg = <0x0 0x180000>; + }; + partition@180000 { + label = "root"; + reg = <0x180000 0x200000>; + }; + partition@380000 { + label = "user"; + reg = <0x380000 0x3bc0000>; + }; + partition@3f40000 { + label = "env"; + reg = <0x3f40000 0x80000>; + }; + partition@3fc0000 { + label = "u-boot"; + reg = <0x3fc0000 0x40000>; + }; + }; }; @@ -192,103 +221,103 @@ UART0: serial@40000200 { device_type = "serial"; compatible = "ns16550"; - reg = <40000200 8>; - virtual-reg = ; - clock-frequency = ; - current-speed = <1C200>; /* 115200 */ + reg = <0x40000200 0x00000008>; + virtual-reg = <0xe0000200>; + clock-frequency = <11059200>; + current-speed = <115200>; /* 115200 */ interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@40000300 { device_type = "serial"; compatible = "ns16550"; - reg = <40000300 8>; - virtual-reg = ; - clock-frequency = ; - current-speed = <1C200>; /* 115200 */ + reg = <0x40000300 0x00000008>; + virtual-reg = <0xe0000300>; + clock-frequency = <11059200>; + current-speed = <115200>; /* 115200 */ interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC0: i2c@40000400 { /* FIXME */ compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <40000400 14>; + reg = <0x40000400 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@40000500 { /* FIXME */ compatible = "ibm,iic-440gp", "ibm,iic"; - reg = <40000500 14>; + reg = <0x40000500 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; }; GPIO0: gpio@40000700 { /* FIXME */ compatible = "ibm,gpio-440gp"; - reg = <40000700 20>; + reg = <0x40000700 0x00000020>; }; ZMII0: emac-zmii@40000780 { compatible = "ibm,zmii-440gx", "ibm,zmii"; - reg = <40000780 c>; + reg = <0x40000780 0x0000000c>; }; RGMII0: emac-rgmii@40000790 { compatible = "ibm,rgmii"; - reg = <40000790 8>; + reg = <0x40000790 0x00000008>; }; TAH0: emac-tah@40000b50 { compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <40000b50 30>; + reg = <0x40000b50 0x00000030>; }; TAH1: emac-tah@40000d50 { compatible = "ibm,tah-440gx", "ibm,tah"; - reg = <40000d50 30>; + reg = <0x40000d50 0x00000030>; }; EMAC0: ethernet@40000800 { - unused = <1>; + unused = <0x1>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = <40000800 70>; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0x40000800 0x00000074>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; zmii-device = <&ZMII0>; zmii-channel = <0>; }; EMAC1: ethernet@40000900 { - unused = <1>; + unused = <0x1>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC1>; - interrupts = <1e 4 1f 4>; - reg = <40000900 70>; + interrupts = <0x1e 0x4 0x1f 0x4>; + reg = <0x40000900 0x00000074>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; zmii-device = <&ZMII0>; zmii-channel = <1>; }; @@ -297,18 +326,18 @@ device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC2>; - interrupts = <0 4 1 4>; - reg = <40000c00 70>; + interrupts = <0x0 0x4 0x1 0x4>; + reg = <0x40000c00 0x00000074>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <2>; mal-rx-channel = <2>; cell-index = <2>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; rgmii-device = <&RGMII0>; rgmii-channel = <0>; zmii-device = <&ZMII0>; @@ -321,18 +350,18 @@ device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC2>; - interrupts = <2 4 3 4>; - reg = <40000e00 70>; + interrupts = <0x2 0x4 0x3 0x4>; + reg = <0x40000e00 0x00000074>; local-mac-address = [000000000000]; // Filled in by zImage mal-device = <&MAL0>; mal-tx-channel = <3>; mal-rx-channel = <3>; cell-index = <3>; - max-frame-size = <2328>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <9000>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rgmii"; - phy-map = <00000003>; + phy-map = <0x00000003>; rgmii-device = <&RGMII0>; rgmii-channel = <1>; zmii-device = <&ZMII0>; @@ -344,9 +373,9 @@ GPT0: gpt@40000a00 { /* FIXME */ - reg = <40000a00 d4>; + reg = <0x40000a00 0x000000d4>; interrupt-parent = <&UIC0>; - interrupts = <12 4 13 4 14 4 15 4 16 4>; + interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; }; }; @@ -360,34 +389,34 @@ primary; large-inbound-windows; enable-msi-hole; - reg = <2 0ec00000 8 /* Config space access */ - 0 0 0 /* no IACK cycles */ - 2 0ed00000 4 /* Special cycles */ - 2 0ec80000 100 /* Internal registers */ - 2 0ec80100 fc>; /* Internal messaging registers */ + reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ + 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ + 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ + 0x00000002 0x0ec80000 0x00000100 /* Internal registers */ + 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed */ - ranges = <02000000 0 80000000 00000003 80000000 0 80000000 - 01000000 0 00000000 00000002 08000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 + 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 1 &UIC0 17 8 - 0800 0 0 2 &UIC0 18 8 - 0800 0 0 3 &UIC0 19 8 - 0800 0 0 4 &UIC0 1a 8 + 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8 + 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8 + 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8 + 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8 /* IDSEL 2 */ - 1000 0 0 1 &UIC0 18 8 - 1000 0 0 2 &UIC0 19 8 - 1000 0 0 3 &UIC0 1a 8 - 1000 0 0 4 &UIC0 17 8 + 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8 + 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8 + 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8 + 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts index 773a68e0005813de3918fa8031538ae50721a186..3008bf8830c1a1579115d8d4d362c4d7c7a2ff3a 100644 --- a/arch/powerpc/boot/dts/tqm5200.dts +++ b/arch/powerpc/boot/dts/tqm5200.dts @@ -70,6 +70,20 @@ fsl,has-wdt; }; + can@900 { + compatible = "fsl,mpc5200-mscan"; + interrupts = <2 17 0>; + interrupt-parent = <&mpc5200_pic>; + reg = <0x900 0x80>; + }; + + can@980 { + compatible = "fsl,mpc5200-mscan"; + interrupts = <2 18 0>; + interrupt-parent = <&mpc5200_pic>; + reg = <0x980 0x80>; + }; + gpio@b00 { compatible = "fsl,mpc5200-gpio"; reg = <0xb00 0x40>; diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index 1addb3ae719ed56303a2233e5e57e9eae18a6ece..e1d260b9085eeaaf8a3b3e0620a2a6408d5a145f 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts @@ -12,8 +12,8 @@ /dts-v1/; / { - model = "tqm,8540"; - compatible = "tqm,8540", "tqm,85xx"; + model = "tqc,tqm8540"; + compatible = "tqc,tqm8540"; #address-cells = <1>; #size-cells = <1>; @@ -40,6 +40,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -64,7 +65,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; @@ -89,6 +90,47 @@ }; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8540-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -177,6 +219,7 @@ #interrupt-cells = <2>; reg = <0x40000 0x40000>; device_type = "open-pic"; + compatible = "chrp,open-pic"; }; }; diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 9e01093f496ef597a88f0fa586b0e07a2bb2fac2..d76441ec5dc72f1599ced341d2356062538da9b5 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts @@ -12,8 +12,8 @@ /dts-v1/; / { - model = "tqm,8541"; - compatible = "tqm,8541", "tqm,85xx"; + model = "tqc,tqm8541"; + compatible = "tqc,tqm8541"; #address-cells = <1>; #size-cells = <1>; @@ -39,6 +39,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -63,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; @@ -88,6 +89,47 @@ }; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8541-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -158,12 +200,24 @@ interrupt-parent = <&mpic>; }; + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; + mpic: pic@40000 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; device_type = "open-pic"; + compatible = "chrp,open-pic"; }; cpm@919c0 { diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts new file mode 100644 index 0000000000000000000000000000000000000000..64d2d5bbcdf189331b8ed024d87e07eba9b1c59f --- /dev/null +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -0,0 +1,406 @@ +/* + * TQM8548 Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2008 Wolfgang Grandegger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "tqc,tqm8548"; + compatible = "tqc,tqm8548"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8548@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000>; // Filled in by U-Boot + }; + + soc8548@a0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xa0000000 0x100000>; + reg = <0xa0000000 0x1000>; // CCSRBAR + bus-frequency = <0>; + + memory-controller@2000 { + compatible = "fsl,mpc8548-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8548-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x80000>; // L2, 512K + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy1: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + phy2: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <3>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@4 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <4>; + device_type = "ethernet-phy"; + }; + phy5: ethernet-phy@5 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <5>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; + }; + + enet2: ethernet@26000 { + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 32 2 33 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; + }; + + enet3: ethernet@27000 { + cell-index = <3>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x27000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <37 2 38 2 39 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy4>; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + current-speed = <115200>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + current-speed = <115200>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { // global utilities reg + compatible = "fsl,mpc8548-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + }; + + localbus@a0005000 { + compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xa0005000 0x100>; // BRx, ORx, etc. + + ranges = < + 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 + 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 + 2 0x0 0xa3000000 0x00008000 // CAN (2 x i82527) + 3 0x0 0xa3010000 0x00008000 // NAND FLASH + + >; + + flash@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <1 0x0 0x8000000>; + bank-width = <4>; + device-width = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x00300000>; + }; + partition@500000 { + label = "user"; + reg = <0x00500000 0x07a00000>; + }; + partition@7f00000 { + label = "env1"; + reg = <0x07f00000 0x00040000>; + }; + partition@7f40000 { + label = "env2"; + reg = <0x07f40000 0x00040000>; + }; + partition@7f80000 { + label = "u-boot"; + reg = <0x07f80000 0x00080000>; + read-only; + }; + }; + + /* Note: CAN support needs be enabled in U-Boot */ + can0@2,0 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x0 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + + can1@2,100 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x100 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + + /* Note: NAND support needs to be enabled in U-Boot */ + upm@3,0 { + #address-cells = <0>; + #size-cells = <0>; + compatible = "fsl,upm-nand"; + reg = <3 0x0 0x800>; + fsl,upm-addr-offset = <0x10>; + fsl,upm-cmd-offset = <0x08>; + chip-delay = <25>; // in micro-seconds + + nand@0 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fs"; + reg = <0x00000000 0x01000000>; + }; + }; + }; + }; + + pci0: pci@a0008000 { + cell-index = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; + device_type = "pci"; + reg = <0xa0008000 0x1000>; + clock-frequency = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 28 */ + 0xe000 0 0 1 &mpic 2 1 + 0xe000 0 0 2 &mpic 3 1>; + + interrupt-parent = <&mpic>; + interrupts = <24 2>; + bus-range = <0 0>; + ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 + 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>; + }; + + pci1: pcie@a000a000 { + cell-index = <2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 (PEX) */ + 0x00000 0 0 1 &mpic 0 1 + 0x00000 0 0 2 &mpic 1 1 + 0x00000 0 0 3 &mpic 2 1 + 0x00000 0 0 4 &mpic 3 1>; + + interrupt-parent = <&mpic>; + interrupts = <26 2>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>; + clock-frequency = <33333333>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xa000a000 0x1000>; + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0 0xb0000000 0x02000000 0 + 0xb0000000 0 0x10000000 + 0x01000000 0 0x00000000 0x01000000 0 + 0x00000000 0 0x08000000>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts new file mode 100644 index 0000000000000000000000000000000000000000..2563112cabd328e73ae174551e06495532ee4628 --- /dev/null +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -0,0 +1,411 @@ +/* + * TQM8548 Device Tree Source + * + * Copyright 2006 Freescale Semiconductor Inc. + * Copyright 2008 Wolfgang Grandegger + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/dts-v1/; + +/ { + model = "tqc,tqm8548"; + compatible = "tqc,tqm8548"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + pci1 = &pci1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8548@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x8000>; // L1, 32K + i-cache-size = <0x8000>; // L1, 32K + next-level-cache = <&L2>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000>; // Filled in by U-Boot + }; + + soc8548@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x0 0xe0000000 0x100000>; + reg = <0xe0000000 0x1000>; // CCSRBAR + bus-frequency = <0>; + + memory-controller@2000 { + compatible = "fsl,mpc8548-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&mpic>; + interrupts = <18 2>; + }; + + L2: l2-cache-controller@20000 { + compatible = "fsl,mpc8548-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; // 32 bytes + cache-size = <0x80000>; // L2, 512K + interrupt-parent = <&mpic>; + interrupts = <16 2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + + rtc@68 { + compatible = "dallas,ds1337"; + reg = <0x68>; + }; + }; + + i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <1>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <43 2>; + interrupt-parent = <&mpic>; + dfsrr; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8548-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy1: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <1>; + device_type = "ethernet-phy"; + }; + phy2: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <2>; + device_type = "ethernet-phy"; + }; + phy3: ethernet-phy@3 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <3>; + device_type = "ethernet-phy"; + }; + phy4: ethernet-phy@4 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <4>; + device_type = "ethernet-phy"; + }; + phy5: ethernet-phy@5 { + interrupt-parent = <&mpic>; + interrupts = <8 1>; + reg = <5>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 30 2 34 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; + }; + + enet1: ethernet@25000 { + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 36 2 40 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy1>; + }; + + enet2: ethernet@26000 { + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 32 2 33 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy3>; + }; + + enet3: ethernet@27000 { + cell-index = <3>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x27000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <37 2 38 2 39 2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy4>; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + current-speed = <115200>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; // reg base, size + clock-frequency = <0>; // should we fill in in uboot? + current-speed = <115200>; + interrupts = <42 2>; + interrupt-parent = <&mpic>; + }; + + global-utilities@e0000 { // global utilities reg + compatible = "fsl,mpc8548-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + }; + + localbus@e0005000 { + compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xe0005000 0x100>; // BRx, ORx, etc. + + ranges = < + 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 + 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 + 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) + 3 0x0 0xe3010000 0x00008000 // NAND FLASH + + >; + + flash@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <1 0x0 0x8000000>; + bank-width = <4>; + device-width = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x00300000>; + }; + partition@500000 { + label = "user"; + reg = <0x00500000 0x07a00000>; + }; + partition@7f00000 { + label = "env1"; + reg = <0x07f00000 0x00040000>; + }; + partition@7f40000 { + label = "env2"; + reg = <0x07f40000 0x00040000>; + }; + partition@7f80000 { + label = "u-boot"; + reg = <0x07f80000 0x00080000>; + read-only; + }; + }; + + /* Note: CAN support needs be enabled in U-Boot */ + can0@2,0 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x0 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + + can1@2,100 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x100 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + + /* Note: NAND support needs to be enabled in U-Boot */ + upm@3,0 { + #address-cells = <0>; + #size-cells = <0>; + compatible = "fsl,upm-nand"; + reg = <3 0x0 0x800>; + fsl,upm-addr-offset = <0x10>; + fsl,upm-cmd-offset = <0x08>; + chip-delay = <25>; // in micro-seconds + + nand@0 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "fs"; + reg = <0x00000000 0x01000000>; + }; + }; + }; + }; + + pci0: pci@e0008000 { + cell-index = <0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; + device_type = "pci"; + reg = <0xe0008000 0x1000>; + clock-frequency = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 28 */ + 0xe000 0 0 1 &mpic 2 1 + 0xe000 0 0 2 &mpic 3 1>; + + interrupt-parent = <&mpic>; + interrupts = <24 2>; + bus-range = <0 0>; + ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 + 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; + }; + + pci1: pcie@e000a000 { + cell-index = <2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x0 (PEX) */ + 0x00000 0 0 1 &mpic 0 1 + 0x00000 0 0 2 &mpic 1 1 + 0x00000 0 0 3 &mpic 2 1 + 0x00000 0 0 4 &mpic 3 1>; + + interrupt-parent = <&mpic>; + interrupts = <26 2>; + bus-range = <0 0xff>; + ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000 + 0x01000000 0 0x00000000 0xef000000 0 0x08000000>; + clock-frequency = <33333333>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xe000a000 0x1000>; + compatible = "fsl,mpc8548-pcie"; + device_type = "pci"; + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0 0xc0000000 0x02000000 0 + 0xc0000000 0 0x20000000 + 0x01000000 0 0x00000000 0x01000000 0 + 0x00000000 0 0x08000000>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index a20eb06c482f87e262860d5b6ca9f36f1a295a06..6f7ea59c4846e05c783b4076349cc29cb6c09185 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts @@ -12,8 +12,8 @@ /dts-v1/; / { - model = "tqm,8555"; - compatible = "tqm,8555", "tqm,85xx"; + model = "tqc,tqm8555"; + compatible = "tqc,tqm8555"; #address-cells = <1>; #size-cells = <1>; @@ -39,6 +39,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -63,7 +64,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; @@ -88,6 +89,47 @@ }; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8555-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -158,12 +200,24 @@ interrupt-parent = <&mpic>; }; + crypto@30000 { + compatible = "fsl,sec2.0"; + reg = <0x30000 0x10000>; + interrupts = <45 2>; + interrupt-parent = <&mpic>; + fsl,num-channels = <4>; + fsl,channel-fifo-len = <24>; + fsl,exec-units-mask = <0x7e>; + fsl,descriptor-types-mask = <0x01010ebf>; + }; + mpic: pic@40000 { interrupt-controller; #address-cells = <0>; #interrupt-cells = <2>; reg = <0x40000 0x40000>; device_type = "open-pic"; + compatible = "chrp,open-pic"; }; cpm@919c0 { diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index b9ac6c943b890919b0f1d87cda369f53db9c569a..3fe35208907b9cfe317d64642223fba9ed8467b5 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts @@ -2,6 +2,7 @@ * TQM 8560 Device Tree Source * * Copyright 2008 Freescale Semiconductor Inc. + * Copyright 2008 Wolfgang Grandegger * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -12,8 +13,8 @@ /dts-v1/; / { - model = "tqm,8560"; - compatible = "tqm,8560", "tqm,85xx"; + model = "tqc,tqm8560"; + compatible = "tqc,tqm8560"; #address-cells = <1>; #size-cells = <1>; @@ -40,6 +41,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -64,7 +66,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; @@ -89,6 +91,47 @@ }; }; + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8560-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + mdio@24520 { #address-cells = <1>; #size-cells = <0>; @@ -145,6 +188,7 @@ #interrupt-cells = <2>; reg = <0x40000 0x40000>; device_type = "open-pic"; + compatible = "chrp,open-pic"; }; cpm@919c0 { @@ -221,6 +265,70 @@ }; }; + localbus@e0005000 { + compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", + "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xe0005000 0x100>; // BRx, ORx, etc. + + ranges = < + 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 + 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 + 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) + >; + + flash@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <1 0x0 0x8000000>; + bank-width = <4>; + device-width = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x00300000>; + }; + partition@500000 { + label = "user"; + reg = <0x00500000 0x07a00000>; + }; + partition@7f00000 { + label = "env1"; + reg = <0x07f00000 0x00040000>; + }; + partition@7f40000 { + label = "env2"; + reg = <0x07f40000 0x00040000>; + }; + partition@7f80000 { + label = "u-boot"; + reg = <0x07f80000 0x00080000>; + read-only; + }; + }; + + /* Note: CAN support needs be enabled in U-Boot */ + can0@2,0 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x0 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + + can1@2,100 { + compatible = "intel,82527"; // Bosch CC770 + reg = <2 0x100 0x100>; + interrupts = <4 0>; + interrupt-parent = <&mpic>; + }; + }; + pci0: pci@e0008000 { cell-index = <0>; #interrupt-cells = <1>; diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts new file mode 100644 index 0000000000000000000000000000000000000000..dc8e78e2dceb27d791f07e1f9d78c760665dd4b3 --- /dev/null +++ b/arch/powerpc/boot/dts/virtex440-ml507.dts @@ -0,0 +1,296 @@ +/* + * This file supports the Xilinx ML507 board with the 440 processor. + * A reference design for the FPGA is provided at http://git.xilinx.com. + * + * (C) Copyright 2008 Xilinx, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,virtex440"; + dcr-parent = <&ppc440_0>; + model = "testing"; + DDR2_SDRAM: memory@0 { + device_type = "memory"; + reg = < 0 0x10000000 >; + } ; + chosen { + bootargs = "console=ttyS0 ip=on root=/dev/ram"; + linux,stdout-path = "/plb@0/serial@83e00000"; + } ; + cpus { + #address-cells = <1>; + #cpus = <1>; + #size-cells = <0>; + ppc440_0: cpu@0 { + clock-frequency = <400000000>; + compatible = "PowerPC,440", "ibm,ppc440"; + d-cache-line-size = <0x20>; + d-cache-size = <0x8000>; + dcr-access-method = "native"; + dcr-controller ; + device_type = "cpu"; + i-cache-line-size = <0x20>; + i-cache-size = <0x8000>; + model = "PowerPC,440"; + reg = <0>; + timebase-frequency = <400000000>; + xlnx,apu-control = <1>; + xlnx,apu-udi-0 = <0>; + xlnx,apu-udi-1 = <0>; + xlnx,apu-udi-10 = <0>; + xlnx,apu-udi-11 = <0>; + xlnx,apu-udi-12 = <0>; + xlnx,apu-udi-13 = <0>; + xlnx,apu-udi-14 = <0>; + xlnx,apu-udi-15 = <0>; + xlnx,apu-udi-2 = <0>; + xlnx,apu-udi-3 = <0>; + xlnx,apu-udi-4 = <0>; + xlnx,apu-udi-5 = <0>; + xlnx,apu-udi-6 = <0>; + xlnx,apu-udi-7 = <0>; + xlnx,apu-udi-8 = <0>; + xlnx,apu-udi-9 = <0>; + xlnx,dcr-autolock-enable = <1>; + xlnx,dcu-rd-ld-cache-plb-prio = <0>; + xlnx,dcu-rd-noncache-plb-prio = <0>; + xlnx,dcu-rd-touch-plb-prio = <0>; + xlnx,dcu-rd-urgent-plb-prio = <0>; + xlnx,dcu-wr-flush-plb-prio = <0>; + xlnx,dcu-wr-store-plb-prio = <0>; + xlnx,dcu-wr-urgent-plb-prio = <0>; + xlnx,dma0-control = <0>; + xlnx,dma0-plb-prio = <0>; + xlnx,dma0-rxchannelctrl = <0x1010000>; + xlnx,dma0-rxirqtimer = <0x3ff>; + xlnx,dma0-txchannelctrl = <0x1010000>; + xlnx,dma0-txirqtimer = <0x3ff>; + xlnx,dma1-control = <0>; + xlnx,dma1-plb-prio = <0>; + xlnx,dma1-rxchannelctrl = <0x1010000>; + xlnx,dma1-rxirqtimer = <0x3ff>; + xlnx,dma1-txchannelctrl = <0x1010000>; + xlnx,dma1-txirqtimer = <0x3ff>; + xlnx,dma2-control = <0>; + xlnx,dma2-plb-prio = <0>; + xlnx,dma2-rxchannelctrl = <0x1010000>; + xlnx,dma2-rxirqtimer = <0x3ff>; + xlnx,dma2-txchannelctrl = <0x1010000>; + xlnx,dma2-txirqtimer = <0x3ff>; + xlnx,dma3-control = <0>; + xlnx,dma3-plb-prio = <0>; + xlnx,dma3-rxchannelctrl = <0x1010000>; + xlnx,dma3-rxirqtimer = <0x3ff>; + xlnx,dma3-txchannelctrl = <0x1010000>; + xlnx,dma3-txirqtimer = <0x3ff>; + xlnx,endian-reset = <0>; + xlnx,generate-plb-timespecs = <1>; + xlnx,icu-rd-fetch-plb-prio = <0>; + xlnx,icu-rd-spec-plb-prio = <0>; + xlnx,icu-rd-touch-plb-prio = <0>; + xlnx,interconnect-imask = <0xffffffff>; + xlnx,mplb-allow-lock-xfer = <1>; + xlnx,mplb-arb-mode = <0>; + xlnx,mplb-awidth = <0x20>; + xlnx,mplb-counter = <0x500>; + xlnx,mplb-dwidth = <0x80>; + xlnx,mplb-max-burst = <8>; + xlnx,mplb-native-dwidth = <0x80>; + xlnx,mplb-p2p = <0>; + xlnx,mplb-prio-dcur = <2>; + xlnx,mplb-prio-dcuw = <3>; + xlnx,mplb-prio-icu = <4>; + xlnx,mplb-prio-splb0 = <1>; + xlnx,mplb-prio-splb1 = <0>; + xlnx,mplb-read-pipe-enable = <1>; + xlnx,mplb-sync-tattribute = <0>; + xlnx,mplb-wdog-enable = <1>; + xlnx,mplb-write-pipe-enable = <1>; + xlnx,mplb-write-post-enable = <1>; + xlnx,num-dma = <1>; + xlnx,pir = <0xf>; + xlnx,ppc440mc-addr-base = <0>; + xlnx,ppc440mc-addr-high = <0xfffffff>; + xlnx,ppc440mc-arb-mode = <0>; + xlnx,ppc440mc-bank-conflict-mask = <0xc00000>; + xlnx,ppc440mc-control = <0xf810008f>; + xlnx,ppc440mc-max-burst = <8>; + xlnx,ppc440mc-prio-dcur = <2>; + xlnx,ppc440mc-prio-dcuw = <3>; + xlnx,ppc440mc-prio-icu = <4>; + xlnx,ppc440mc-prio-splb0 = <1>; + xlnx,ppc440mc-prio-splb1 = <0>; + xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>; + xlnx,ppcdm-asyncmode = <0>; + xlnx,ppcds-asyncmode = <0>; + xlnx,user-reset = <0>; + DMA0: sdma@80 { + compatible = "xlnx,ll-dma-1.00.a"; + dcr-reg = < 0x80 0x11 >; + interrupt-parent = <&xps_intc_0>; + interrupts = < 9 2 0xa 2 >; + } ; + } ; + } ; + plb_v46_0: plb@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,plb-v46-1.02.a", "simple-bus"; + ranges ; + DIP_Switches_8Bit: gpio@81460000 { + compatible = "xlnx,xps-gpio-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 6 2 >; + reg = < 0x81460000 0x10000 >; + xlnx,all-inputs = <1>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; + xlnx,family = "virtex5"; + xlnx,gpio-width = <8>; + xlnx,interrupt-present = <1>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; + } ; + Hard_Ethernet_MAC: xps-ll-temac@81c00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,compound"; + ethernet@81c00000 { + compatible = "xlnx,xps-ll-temac-1.01.b"; + device_type = "network"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 5 2 >; + llink-connected = <&DMA0>; + local-mac-address = [ 02 00 00 00 00 00 ]; + reg = < 0x81c00000 0x40 >; + xlnx,bus2core-clk-ratio = <1>; + xlnx,phy-type = <1>; + xlnx,phyaddr = <1>; + xlnx,rxcsum = <1>; + xlnx,rxfifo = <0x1000>; + xlnx,temac-type = <0>; + xlnx,txcsum = <1>; + xlnx,txfifo = <0x1000>; + } ; + } ; + LEDs_8Bit: gpio@81400000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = < 0x81400000 0x10000 >; + xlnx,all-inputs = <0>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; + xlnx,family = "virtex5"; + xlnx,gpio-width = <8>; + xlnx,interrupt-present = <0>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; + } ; + LEDs_Positions: gpio@81420000 { + compatible = "xlnx,xps-gpio-1.00.a"; + reg = < 0x81420000 0x10000 >; + xlnx,all-inputs = <0>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; + xlnx,family = "virtex5"; + xlnx,gpio-width = <5>; + xlnx,interrupt-present = <0>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; + } ; + Push_Buttons_5Bit: gpio@81440000 { + compatible = "xlnx,xps-gpio-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 7 2 >; + reg = < 0x81440000 0x10000 >; + xlnx,all-inputs = <1>; + xlnx,all-inputs-2 = <0>; + xlnx,dout-default = <0>; + xlnx,dout-default-2 = <0>; + xlnx,family = "virtex5"; + xlnx,gpio-width = <5>; + xlnx,interrupt-present = <1>; + xlnx,is-bidir = <1>; + xlnx,is-bidir-2 = <1>; + xlnx,is-dual = <0>; + xlnx,tri-default = <0xffffffff>; + xlnx,tri-default-2 = <0xffffffff>; + } ; + RS232_Uart_1: serial@83e00000 { + clock-frequency = <100000000>; + compatible = "xlnx,xps-uart16550-2.00.a", "ns16550"; + current-speed = <0x2580>; + device_type = "serial"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 8 2 >; + reg = < 0x83e00000 0x10000 >; + reg-offset = <3>; + reg-shift = <2>; + xlnx,family = "virtex5"; + xlnx,has-external-rclk = <0>; + xlnx,has-external-xin = <0>; + xlnx,is-a-16550 = <1>; + } ; + SysACE_CompactFlash: sysace@83600000 { + compatible = "xlnx,xps-sysace-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 4 2 >; + reg = < 0x83600000 0x10000 >; + xlnx,family = "virtex5"; + xlnx,mem-width = <0x10>; + } ; + xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 { + compatible = "xlnx,xps-bram-if-cntlr-1.00.a"; + reg = < 0xffff0000 0x10000 >; + xlnx,family = "virtex5"; + } ; + xps_intc_0: interrupt-controller@81800000 { + #interrupt-cells = <2>; + compatible = "xlnx,xps-intc-1.00.a"; + interrupt-controller ; + reg = < 0x81800000 0x10000 >; + xlnx,num-intr-inputs = <0xb>; + } ; + xps_timebase_wdt_1: xps-timebase-wdt@83a00000 { + compatible = "xlnx,xps-timebase-wdt-1.00.b"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 2 0 1 2 >; + reg = < 0x83a00000 0x10000 >; + xlnx,family = "virtex5"; + xlnx,wdt-enable-once = <0>; + xlnx,wdt-interval = <0x1e>; + } ; + xps_timer_1: timer@83c00000 { + compatible = "xlnx,xps-timer-1.00.a"; + interrupt-parent = <&xps_intc_0>; + interrupts = < 3 2 >; + reg = < 0x83c00000 0x10000 >; + xlnx,count-width = <0x20>; + xlnx,family = "virtex5"; + xlnx,gen0-assert = <1>; + xlnx,gen1-assert = <1>; + xlnx,one-timer-only = <1>; + xlnx,trig0-assert = <1>; + xlnx,trig1-assert = <1>; + } ; + } ; +} ; diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index a328607c8f84d40389776088bc830a27d933498e..4a9f726ada139b47d4c45edff3b71b04cbd5f024 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts @@ -9,12 +9,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; model = "ibm,walnut"; compatible = "ibm,walnut"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC; @@ -29,13 +31,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,405GP"; - reg = <0>; - clock-frequency = ; /* Filled in by zImage */ + reg = <0x00000000>; + clock-frequency = <200000000>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <4000>; - d-cache-size = <4000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; + d-cache-size = <16384>; dcr-controller; dcr-access-method = "native"; }; @@ -43,14 +45,14 @@ memory { device_type = "memory"; - reg = <0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller { compatible = "ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 9>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -65,63 +67,63 @@ SDRAM0: memory-controller { compatible = "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; MAL: mcmal { compatible = "ibm,mcmal-405gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <1>; num-rx-chans = <1>; interrupt-parent = <&UIC0>; interrupts = < - b 4 /* TXEOB */ - c 4 /* RXEOB */ - a 4 /* SERR */ - d 4 /* TXDE */ - e 4 /* RXDE */>; + 0xb 0x4 /* TXEOB */ + 0xc 0x4 /* RXEOB */ + 0xa 0x4 /* SERR */ + 0xd 0x4 /* TXDE */ + 0xe 0x4 /* RXDE */>; }; POB0: opb { compatible = "ibm,opb-405gp", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = ; - dcr-reg = <0a0 5>; + ranges = <0xef600000 0xef600000 0x00a00000>; + dcr-reg = <0x0a0 0x005>; clock-frequency = <0>; /* Filled in by zImage */ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <2580>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <2580>; + current-speed = <9600>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; IIC: i2c@ef600500 { compatible = "ibm,iic-405gp", "ibm,iic"; - reg = ; + reg = <0xef600500 0x00000011>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; GPIO: gpio@ef600700 { compatible = "ibm,gpio-405gp"; - reg = ; + reg = <0xef600700 0x00000020>; }; EMAC: ethernet@ef600800 { @@ -129,26 +131,26 @@ compatible = "ibm,emac-405gp", "ibm,emac"; interrupt-parent = <&UIC0>; interrupts = < - f 4 /* Ethernet */ - 9 4 /* Ethernet Wake Up */>; + 0xf 0x4 /* Ethernet */ + 0x9 0x4 /* Ethernet Wake Up */>; local-mac-address = [000000000000]; /* Filled in by zImage */ - reg = ; + reg = <0xef600800 0x00000070>; mal-device = <&MAL>; mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000001>; + phy-map = <0x00000001>; }; }; EBC0: ebc { compatible = "ibm,ebc-405gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; /* The ranges property is supplied by the bootwrapper @@ -158,18 +160,18 @@ clock-frequency = <0>; /* Filled in by zImage */ sram@0,0 { - reg = <0 0 80000>; + reg = <0x00000000 0x00000000 0x00080000>; }; flash@0,80000 { compatible = "jedec-flash"; bank-width = <1>; - reg = <0 80000 80000>; + reg = <0x00000000 0x00080000 0x00080000>; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "OpenBIOS"; - reg = <0 80000>; + reg = <0x00000000 0x00080000>; read-only; }; }; @@ -177,24 +179,24 @@ nvram@1,0 { /* NVRAM and RTC */ compatible = "ds1743-nvram"; - #bytes = <2000>; - reg = <1 0 2000>; + #bytes = <0x2000>; + reg = <0x00000001 0x00000000 0x00002000>; }; keyboard@2,0 { compatible = "intel,82C42PC"; - reg = <2 0 2>; + reg = <0x00000002 0x00000000 0x00000002>; }; ir@3,0 { compatible = "ti,TIR2000PAG"; - reg = <3 0 10>; + reg = <0x00000003 0x00000000 0x00000010>; }; fpga@7,0 { compatible = "Walnut-FPGA"; - reg = <7 0 10>; - virtual-reg = ; + reg = <0x00000007 0x00000000 0x00000010>; + virtual-reg = <0xf0300005>; }; }; @@ -205,35 +207,35 @@ #address-cells = <3>; compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; primary; - reg = ; /* Internal registers */ + reg = <0xeec00000 0x00000008 /* Config space access */ + 0xeed80000 0x00000004 /* IACK */ + 0xeed80000 0x00000004 /* Special cycle */ + 0xef480000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <02000000 0 80000000 80000000 0 20000000 - 01000000 0 00000000 e8000000 0 00010000>; + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; /* Walnut has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x0>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 0 &UIC0 1c 8 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 /* IDSEL 2 */ - 1000 0 0 0 &UIC0 1d 8 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8 /* IDSEL 3 */ - 1800 0 0 0 &UIC0 1e 8 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IDSEL 4 */ - 2000 0 0 0 &UIC0 1f 8 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8 >; }; }; diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts index b04a52e22bf5b3b6607fbe274fe05b19c044d4cc..340018cf16b777245cf45970d4b94d11f8c2437f 100644 --- a/arch/powerpc/boot/dts/warp.dts +++ b/arch/powerpc/boot/dts/warp.dts @@ -9,12 +9,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "pika,warp"; compatible = "pika,warp"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -28,13 +30,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440EP"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -42,14 +44,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -59,22 +61,22 @@ compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440ep"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440ep"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -86,86 +88,79 @@ SDRAM0: sdram { compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; DMA0: dma { compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; + interrupt-map = ; }; POB0: opb { compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; - ranges = <00000000 0 00000000 80000000 - 80000000 0 80000000 80000000>; + ranges = <0x00000000 0x00000000 0x00000000 0x80000000 + 0x80000000 0x00000000 0x80000000 0x80000000>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; fpga@2,0 { compatible = "pika,fpga"; - reg = <2 0 2200>; - interrupts = <18 8>; + reg = <0x00000002 0x00000000 0x00001000>; + interrupts = <0x18 0x8>; interrupt-parent = <&UIC0>; }; + fpga@2,4000 { + compatible = "pika,fpga-sd"; + reg = <0x00000002 0x00004000 0x00000A00>; + }; + nor_flash@0,0 { - compatible = "amd,s29gl512n", "cfi-flash"; + compatible = "amd,s29gl032a", "cfi-flash"; bank-width = <2>; - reg = <0 0 4000000>; + reg = <0x00000000 0x00000000 0x00400000>; #address-cells = <1>; #size-cells = <1>; - partition@0 { - label = "kernel"; - reg = <0 180000>; - }; - partition@180000 { - label = "root"; - reg = <180000 3480000>; - }; - partition@3600000 { - label = "user"; - reg = <3600000 900000>; - }; - partition@3f00000 { + partition@300000 { label = "fpga"; - reg = <3f00000 40000>; + reg = <0x0030000 0x00040000>; }; - partition@3f40000 { + partition@340000 { label = "env"; - reg = <3f40000 40000>; + reg = <0x0340000 0x00040000>; }; - partition@3f80000 { + partition@380000 { label = "u-boot"; - reg = <3f80000 80000>; + reg = <0x0380000 0x00080000>; }; }; }; @@ -173,60 +168,80 @@ UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; + index = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + ad7414@4a { + compatible = "adi,ad7414"; + reg = <0x4a>; + interrupts = <0x19 0x8>; + interrupt-parent = <&UIC0>; + }; }; GPIO0: gpio@ef600b00 { compatible = "ibm,gpio-440ep"; - reg = ; + reg = <0xef600b00 0x00000048>; + #gpio-cells = <2>; + gpio-controller; }; GPIO1: gpio@ef600c00 { compatible = "ibm,gpio-440ep"; - reg = ; + reg = <0xef600c00 0x00000048>; + #gpio-cells = <2>; + gpio-controller; + + led@31 { + compatible = "linux,gpio-led"; + linux,name = ":green:"; + gpios = <&GPIO1 0x30 0>; + }; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; EMAC0: ethernet@ef600e00 { device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = ; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0xef600e00 0x00000070>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0 1>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <0>; }; usb@ef601000 { compatible = "ohci-be"; - reg = ; - interrupts = <8 1 9 1>; + reg = <0xef601000 0x00000080>; + interrupts = <0x8 0x1 0x9 0x1>; interrupt-parent = < &UIC1 >; }; }; diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts index 0d6d332814e0f061349360b399ae09b2d9d5ec7d..e39422aa0d855e794658c65a79bdab132ecdc3f1 100644 --- a/arch/powerpc/boot/dts/yosemite.dts +++ b/arch/powerpc/boot/dts/yosemite.dts @@ -9,12 +9,14 @@ * any warranty of any kind, whether express or implied. */ +/dts-v1/; + / { #address-cells = <2>; #size-cells = <1>; model = "amcc,yosemite"; compatible = "amcc,yosemite","amcc,bamboo"; - dcr-parent = <&/cpus/cpu@0>; + dcr-parent = <&{/cpus/cpu@0}>; aliases { ethernet0 = &EMAC0; @@ -32,13 +34,13 @@ cpu@0 { device_type = "cpu"; model = "PowerPC,440EP"; - reg = <0>; + reg = <0x00000000>; clock-frequency = <0>; /* Filled in by zImage */ timebase-frequency = <0>; /* Filled in by zImage */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; dcr-controller; dcr-access-method = "native"; }; @@ -46,14 +48,14 @@ memory { device_type = "memory"; - reg = <0 0 0>; /* Filled in by zImage */ + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ }; UIC0: interrupt-controller0 { compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <0>; - dcr-reg = <0c0 009>; + dcr-reg = <0x0c0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; @@ -63,22 +65,22 @@ compatible = "ibm,uic-440ep","ibm,uic"; interrupt-controller; cell-index = <1>; - dcr-reg = <0d0 009>; + dcr-reg = <0x0d0 0x009>; #address-cells = <0>; #size-cells = <0>; #interrupt-cells = <2>; - interrupts = <1e 4 1f 4>; /* cascade */ + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ interrupt-parent = <&UIC0>; }; SDR0: sdr { compatible = "ibm,sdr-440ep"; - dcr-reg = <00e 002>; + dcr-reg = <0x00e 0x002>; }; CPR0: cpr { compatible = "ibm,cpr-440ep"; - dcr-reg = <00c 002>; + dcr-reg = <0x00c 0x002>; }; plb { @@ -90,29 +92,29 @@ SDRAM0: sdram { compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; - dcr-reg = <010 2>; + dcr-reg = <0x010 0x002>; }; DMA0: dma { compatible = "ibm,dma-440ep", "ibm,dma-440gp"; - dcr-reg = <100 027>; + dcr-reg = <0x100 0x027>; }; MAL0: mcmal { compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; - dcr-reg = <180 62>; + dcr-reg = <0x180 0x062>; num-tx-chans = <4>; num-rx-chans = <2>; interrupt-parent = <&MAL0>; - interrupts = <0 1 2 3 4>; + interrupts = <0x0 0x1 0x2 0x3 0x4>; #interrupt-cells = <1>; #address-cells = <0>; #size-cells = <0>; - interrupt-map = ; + interrupt-map = ; }; POB0: opb { @@ -122,110 +124,110 @@ /* Bamboo is oddball in the 44x world and doesn't use the ERPN * bits. */ - ranges = <00000000 0 00000000 80000000 - 80000000 0 80000000 80000000>; + ranges = <0x00000000 0x00000000 0x00000000 0x80000000 + 0x80000000 0x00000000 0x80000000 0x80000000>; interrupt-parent = <&UIC1>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; clock-frequency = <0>; /* Filled in by zImage */ EBC0: ebc { compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; - dcr-reg = <012 2>; + dcr-reg = <0x012 0x002>; #address-cells = <2>; #size-cells = <1>; clock-frequency = <0>; /* Filled in by zImage */ - interrupts = <5 1>; + interrupts = <0x5 0x1>; interrupt-parent = <&UIC1>; }; UART0: serial@ef600300 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; clock-frequency = <0>; /* Filled in by zImage */ - current-speed = <1c200>; + current-speed = <115200>; interrupt-parent = <&UIC0>; - interrupts = <0 4>; + interrupts = <0x0 0x4>; }; UART1: serial@ef600400 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600400 0x00000008>; + virtual-reg = <0xef600400>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <1 4>; + interrupts = <0x1 0x4>; }; UART2: serial@ef600500 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600500 0x00000008>; + virtual-reg = <0xef600500>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <3 4>; + interrupts = <0x3 0x4>; status = "disabled"; }; UART3: serial@ef600600 { device_type = "serial"; compatible = "ns16550"; - reg = ; - virtual-reg = ; + reg = <0xef600600 0x00000008>; + virtual-reg = <0xef600600>; clock-frequency = <0>; current-speed = <0>; interrupt-parent = <&UIC0>; - interrupts = <4 4>; + interrupts = <0x4 0x4>; status = "disabled"; }; IIC0: i2c@ef600700 { compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = ; + reg = <0xef600700 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <2 4>; + interrupts = <0x2 0x4>; }; IIC1: i2c@ef600800 { compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; - reg = ; + reg = <0xef600800 0x00000014>; interrupt-parent = <&UIC0>; - interrupts = <7 4>; + interrupts = <0x7 0x4>; }; spi@ef600900 { compatible = "amcc,spi-440ep"; - reg = ; - interrupts = <8 4>; + reg = <0xef600900 0x00000006>; + interrupts = <0x8 0x4>; interrupt-parent = <&UIC0>; }; ZMII0: emac-zmii@ef600d00 { compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; - reg = ; + reg = <0xef600d00 0x0000000c>; }; EMAC0: ethernet@ef600e00 { device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1c 4 1d 4>; - reg = ; + interrupts = <0x1c 0x4 0x1d 0x4>; + reg = <0xef600e00 0x00000070>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <0 1>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <0>; }; @@ -234,26 +236,26 @@ device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; - interrupts = <1e 4 1f 4>; - reg = ; + interrupts = <0x1e 0x4 0x1f 0x4>; + reg = <0xef600f00 0x00000070>; local-mac-address = [000000000000]; mal-device = <&MAL0>; mal-tx-channel = <2 3>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; - rx-fifo-size = <1000>; - tx-fifo-size = <800>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; phy-mode = "rmii"; - phy-map = <00000000>; + phy-map = <0x00000000>; zmii-device = <&ZMII0>; zmii-channel = <1>; }; usb@ef601000 { compatible = "ohci-be"; - reg = ; - interrupts = <8 4 9 4>; + reg = <0xef601000 0x00000080>; + interrupts = <0x8 0x4 0x9 0x4>; interrupt-parent = < &UIC1 >; }; }; @@ -265,35 +267,35 @@ #address-cells = <3>; compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; primary; - reg = <0 eec00000 8 /* Config space access */ - 0 eed00000 4 /* IACK */ - 0 eed00000 4 /* Special cycle */ - 0 ef400000 40>; /* Internal registers */ + reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ + 0x00000000 0xeed00000 0x00000004 /* IACK */ + 0x00000000 0xeed00000 0x00000004 /* Special cycle */ + 0x00000000 0xef400000 0x00000040>; /* Internal registers */ /* Outbound ranges, one memory and one IO, * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <02000000 0 a0000000 0 a0000000 0 20000000 - 01000000 0 00000000 0 e8000000 0 00010000>; + ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 + 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; /* Inbound 2GB range starting at 0 */ - dma-ranges = <42000000 0 0 0 0 0 80000000>; + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; /* Bamboo has all 4 IRQ pins tied together per slot */ - interrupt-map-mask = ; + interrupt-map-mask = <0xf800 0x0 0x0 0x0>; interrupt-map = < /* IDSEL 1 */ - 0800 0 0 0 &UIC0 1c 8 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 /* IDSEL 2 */ - 1000 0 0 0 &UIC0 1b 8 + 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 /* IDSEL 3 */ - 1800 0 0 0 &UIC0 1a 8 + 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 /* IDSEL 4 */ - 2000 0 0 0 &UIC0 19 8 + 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 >; }; }; diff --git a/arch/powerpc/boot/oflib.c b/arch/powerpc/boot/oflib.c index 95b8fd69a403b65874a272435f4915ced50e6d84..b0ec9cf3eaaf6e6bf44f9a77aeb079761a2d628c 100644 --- a/arch/powerpc/boot/oflib.c +++ b/arch/powerpc/boot/oflib.c @@ -168,8 +168,19 @@ void *of_claim(unsigned long virt, unsigned long size, unsigned long align) void *of_vmlinux_alloc(unsigned long size) { - void *p = malloc(size); - + unsigned long start = (unsigned long)_start, end = (unsigned long)_end; + void *addr; + void *p; + + /* With some older POWER4 firmware we need to claim the area the kernel + * will reside in. Newer firmwares don't need this so we just ignore + * the return value. + */ + addr = of_claim(start, end - start, 0); + printf("Trying to claim from 0x%lx to 0x%lx (0x%lx) got %p\r\n", + start, end, end - start, addr); + + p = malloc(size); if (!p) fatal("Can't allocate memory for kernel image!\n\r"); diff --git a/arch/powerpc/boot/redboot-83xx.c b/arch/powerpc/boot/redboot-83xx.c new file mode 100644 index 0000000000000000000000000000000000000000..79aa9e151fa706661993e39a5b0a93b633a31fe0 --- /dev/null +++ b/arch/powerpc/boot/redboot-83xx.c @@ -0,0 +1,60 @@ +/* + * RedBoot firmware support + * + * Author: Scott Wood + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * Copyright (c) 2008 Codehermit + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "redboot.h" +#include "fsl-soc.h" +#include "io.h" + +static bd_t bd; +BSS_STACK(4096); + +#define MHZ(x) ((x + 500000) / 1000000) + +static void platform_fixups(void) +{ + void *node; + + dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); + dt_fixup_mac_addresses(bd.bi_enetaddr); + dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); + + node = finddevice("/soc/cpm/brg"); + if (node) { + printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", + bd.bi_busfreq, MHZ(bd.bi_busfreq)); + setprop(node, "clock-frequency", &bd.bi_busfreq, 4); + } + +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + memcpy(&bd, (char *)r3, sizeof(bd)); + + if (bd.bi_tag != 0x42444944) + return; + + simple_alloc_init(_end, + bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, + 32, 64); + + fdt_init(_dtb_start); + serial_console_init(); + platform_ops.fixups = platform_fixups; + + loader_info.cmdline = (char *)bd.bi_cmdline; + loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); +} diff --git a/arch/powerpc/boot/simpleboot.c b/arch/powerpc/boot/simpleboot.c index 86cd285bccc6b2c32e53ec82dffb81aa5b90a815..c58a0dada992eef1c9edd4d901a6c9901fba413a 100644 --- a/arch/powerpc/boot/simpleboot.c +++ b/arch/powerpc/boot/simpleboot.c @@ -23,6 +23,8 @@ BSS_STACK(4*1024); +extern int platform_specific_init(void) __attribute__((weak)); + void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { @@ -80,5 +82,9 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, /* prepare the device tree and find the console */ fdt_init(_dtb_start); + + if (platform_specific_init) + platform_specific_init(); + serial_console_init(); } diff --git a/arch/powerpc/boot/virtex.c b/arch/powerpc/boot/virtex.c new file mode 100644 index 0000000000000000000000000000000000000000..f622805f8000cdaf1934902f5390b6a8a090ffd3 --- /dev/null +++ b/arch/powerpc/boot/virtex.c @@ -0,0 +1,100 @@ +/* + * The platform specific code for virtex devices since a boot loader is not + * always used. + * + * (C) Copyright 2008 Xilinx, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "io.h" +#include "stdio.h" + +#define UART_DLL 0 /* Out: Divisor Latch Low */ +#define UART_DLM 1 /* Out: Divisor Latch High */ +#define UART_FCR 2 /* Out: FIFO Control Register */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_LCR 3 /* Out: Line Control Register */ +#define UART_MCR 4 /* Out: Modem Control Register */ +#define UART_MCR_RTS 0x02 /* RTS complement */ +#define UART_MCR_DTR 0x01 /* DTR complement */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ +#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ + +static int virtex_ns16550_console_init(void *devp) +{ + unsigned char *reg_base; + u32 reg_shift, reg_offset, clk, spd; + u16 divisor; + int n; + + if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1) + return -1; + + n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset)); + if (n == sizeof(reg_offset)) + reg_base += reg_offset; + + n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift)); + if (n != sizeof(reg_shift)) + reg_shift = 0; + + n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd)); + if (n != sizeof(spd)) + spd = 9600; + + /* should there be a default clock rate?*/ + n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk)); + if (n != sizeof(clk)) + return -1; + + divisor = clk / (16 * spd); + + /* Access baud rate */ + out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB); + + /* Baud rate based on input clock */ + out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF); + out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8); + + /* 8 data, 1 stop, no parity */ + out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8); + + /* RTS/DTR */ + out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR); + + /* Clear transmitter and receiver */ + out_8(reg_base + (UART_FCR << reg_shift), + UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR); + return 0; +} + +/* For virtex, the kernel may be loaded without using a bootloader and if so + some UARTs need more setup than is provided in the normal console init +*/ +int platform_specific_init(void) +{ + void *devp; + char devtype[MAX_PROP_LEN]; + char path[MAX_PATH_LEN]; + + devp = finddevice("/chosen"); + if (devp == NULL) + return -1; + + if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) { + devp = finddevice(path); + if (devp == NULL) + return -1; + + if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0) + && !strcmp(devtype, "serial") + && (dt_is_compatible(devp, "ns16550"))) + virtex_ns16550_console_init(devp); + } + return 0; +} diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index d6c96d9ab29177513788e06ead0dddc45e8f3501..644bf9d4ea00b21233daaac6e6b69c0c7be61695 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper @@ -138,14 +138,20 @@ objflags=-S tmp=$tmpdir/zImage.$$.o ksection=.kernel:vmlinux.strip isection=.kernel:initrd +link_address='0x400000' case "$platform" in -pmac|pseries|chrp) +pseries) + platformo=$object/of.o + link_address='0x4000000' + ;; +pmac|chrp) platformo=$object/of.o ;; coff) platformo=$object/of.o lds=$object/zImage.coff.lds + link_address='0x500000' ;; miboot|uboot) # miboot and U-boot want just the bare bits, not an ELF binary @@ -171,13 +177,13 @@ cuboot*) *-mpc824*) platformo=$object/cuboot-824x.o ;; - *-mpc83*) + *-mpc83*|*-asp834x*) platformo=$object/cuboot-83xx.o ;; *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) platformo=$object/cuboot-85xx-cpm2.o ;; - *-mpc85*|*-tqm8540|*-sbc85*) + *-mpc85*|*-tqm85*|*-sbc85*) platformo=$object/cuboot-85xx.o ;; esac @@ -190,6 +196,7 @@ ps3) objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data" ksection=.kernel:vmlinux.bin isection=.kernel:initrd + link_address='' ;; ep88xc|ep405|ep8248e) platformo="$object/fixed-head.o $object/$platform.o" @@ -200,7 +207,19 @@ adder875-redboot) binary=y ;; simpleboot-virtex405-*) - platformo="$object/virtex405-head.o $object/simpleboot.o" + platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o" + binary=y + ;; +simpleboot-virtex440-*) + platformo="$object/simpleboot.o $object/virtex.o" + binary=y + ;; +simpleboot-*) + platformo="$object/simpleboot.o" + binary=y + ;; +asp834x-redboot) + platformo="$object/fixed-head.o $object/redboot-83xx.o" binary=y ;; esac @@ -268,7 +287,10 @@ if [ -n "$dtb" ]; then fi if [ "$platform" != "miboot" ]; then - ${CROSS}ld -m elf32ppc -T $lds -o "$ofile" \ + if [ -n "$link_address" ] ; then + text_start="-Ttext $link_address --defsym _start=$link_address" + fi + ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \ $platformo $tmp $object/wrapper.a rm $tmp fi diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S index fe87a90ce7f1a606bba00f50597ac9677757598c..856dc78b14ef8f3d2b8062ba5c0b5d6b22f49e4d 100644 --- a/arch/powerpc/boot/zImage.coff.lds.S +++ b/arch/powerpc/boot/zImage.coff.lds.S @@ -3,7 +3,6 @@ ENTRY(_zimage_start_opd) EXTERN(_zimage_start_opd) SECTIONS { - . = (5*1024*1024); _start = .; .text : { diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S index f6e380fdb388903a01394c1643f3a7b71ae2c455..0962d62bdb5051c7e4ae61ff0b461e34bc952e46 100644 --- a/arch/powerpc/boot/zImage.lds.S +++ b/arch/powerpc/boot/zImage.lds.S @@ -3,7 +3,6 @@ ENTRY(_zimage_start) EXTERN(_zimage_start) SECTIONS { - . = (4*1024*1024); _start = .; .text : { diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9ce5cbc2a4e73fec2cd138cf52047bd7f2060dd6 --- /dev/null +++ b/arch/powerpc/configs/44x/sam440ep_defconfig @@ -0,0 +1,1192 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.25 +# Mon May 5 13:43:02 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +CONFIG_44x=y +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +CONFIG_4xx=y +CONFIG_BOOKE=y +CONFIG_PTE_64BIT=y +CONFIG_PHYS_64BIT=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +# CONFIG_DEFAULT_UIMAGE is not set +CONFIG_PPC_DCR_NATIVE=y +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_PPC_DCR=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +# CONFIG_IKCONFIG_PROC is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y +# CONFIG_PPC4xx_PCI_EXPRESS is not set + +# +# Platform support +# +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +# CONFIG_BAMBOO is not set +# CONFIG_EBONY is not set +CONFIG_SAM440EP=y +# CONFIG_SEQUOIA is not set +# CONFIG_TAISHAN is not set +# CONFIG_KATMAI is not set +# CONFIG_RAINIER is not set +# CONFIG_WARP is not set +# CONFIG_CANYONLANDS is not set +# CONFIG_YOSEMITE is not set +CONFIG_440EP=y +CONFIG_IBM440EP_ERR42=y +# CONFIG_IPIC is not set +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_MATH_EMULATION is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="" +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_4xx_SOC=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_CONSISTENT_START=0xff100000 +CONFIG_CONSISTENT_SIZE=0x00200000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=35000 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_XILINX_SYSACE is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +CONFIG_SATA_SIL=y +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +# CONFIG_MII is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_IBM_NEW_EMAC=y +CONFIG_IBM_NEW_EMAC_RXB=128 +CONFIG_IBM_NEW_EMAC_TXB=64 +CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32 +CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256 +CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0 +# CONFIG_IBM_NEW_EMAC_DEBUG is not set +CONFIG_IBM_NEW_EMAC_ZMII=y +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_APPLETOUCH is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +# CONFIG_SERIAL_8250_PCI is not set +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_MANY_PORTS is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +# CONFIG_SERIAL_8250_DETECT_IRQ is not set +# CONFIG_SERIAL_8250_RSA is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_ALGOBIT=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_IBM_IIC=y +# CONFIG_I2C_MPC is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DDC=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +CONFIG_FB_MACMODES=y +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_OF is not set +# CONFIG_FB_CT65550 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +CONFIG_FB_RADEON=y +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_HCD_PPC_OF=y +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PPC_OF=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +CONFIG_USB_OHCI_HCD_PPC_OF_LE=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +CONFIG_RTC_DRV_M41T80=y +CONFIG_RTC_DRV_M41T80_WDT=y +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +# CONFIG_EXT2_FS_SECURITY is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +CONFIG_REISERFS_FS=y +# CONFIG_REISERFS_CHECK is not set +# CONFIG_REISERFS_PROC_INFO is not set +# CONFIG_REISERFS_FS_XATTR is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=y +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +CONFIG_AFFS_FS=m +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +CONFIG_AMIGA_PARTITION=y +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=y +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_SAMPLES is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +# CONFIG_CRYPTO is not set +# CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig index 087aedce1338abe5f76dadfca96e87439c71643f..e53c92655bd66f43eb7a05348a87f3dd553a5536 100644 --- a/arch/powerpc/configs/44x/taishan_defconfig +++ b/arch/powerpc/configs/44x/taishan_defconfig @@ -348,7 +348,83 @@ CONFIG_FW_LOADER=y # CONFIG_SYS_HYPERVISOR is not set CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set CONFIG_OF_DEVICE=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y @@ -660,6 +736,7 @@ CONFIG_TMPFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..9c41f66b5a7df3710346a5a18fcf7a8200ff4b13 --- /dev/null +++ b/arch/powerpc/configs/44x/virtex5_defconfig @@ -0,0 +1,1107 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc8 +# Wed Jul 2 15:36:41 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +CONFIG_44x=y +# CONFIG_E200 is not set +CONFIG_4xx=y +CONFIG_BOOKE=y +CONFIG_PTE_64BIT=y +CONFIG_PHYS_64BIT=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +# CONFIG_DEFAULT_UIMAGE is not set +CONFIG_PPC_DCR_NATIVE=y +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_PPC_DCR=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y +# CONFIG_PPC4xx_PCI_EXPRESS is not set + +# +# Platform support +# +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +# CONFIG_BAMBOO is not set +# CONFIG_EBONY is not set +# CONFIG_SEQUOIA is not set +# CONFIG_TAISHAN is not set +# CONFIG_KATMAI is not set +# CONFIG_RAINIER is not set +# CONFIG_WARP is not set +# CONFIG_CANYONLANDS is not set +# CONFIG_YOSEMITE is not set +CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y +CONFIG_XILINX_VIRTEX=y +CONFIG_XILINX_VIRTEX_5_FXT=y +# CONFIG_IPIC is not set +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +# CONFIG_PREEMPT_RCU is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_MATH_EMULATION=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="" +CONFIG_EXTRA_TARGETS="" +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_4xx_SOC=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_CONSISTENT_START=0xff100000 +CONFIG_CONSISTENT_SIZE=0x00200000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_QUEUE is not set +CONFIG_IP_NF_IPTABLES=m +# CONFIG_IP_NF_MATCH_RECENT is not set +# CONFIG_IP_NF_MATCH_ECN is not set +# CONFIG_IP_NF_MATCH_AH is not set +# CONFIG_IP_NF_MATCH_TTL is not set +# CONFIG_IP_NF_MATCH_ADDRTYPE is not set +CONFIG_IP_NF_FILTER=m +# CONFIG_IP_NF_TARGET_REJECT is not set +# CONFIG_IP_NF_TARGET_LOG is not set +# CONFIG_IP_NF_TARGET_ULOG is not set +CONFIG_IP_NF_MANGLE=m +# CONFIG_IP_NF_TARGET_ECN is not set +# CONFIG_IP_NF_TARGET_TTL is not set +# CONFIG_IP_NF_RAW is not set +# CONFIG_IP_NF_ARPTABLES is not set + +# +# IPv6: Netfilter Configuration +# +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_IPTABLES is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_XILINX_SYSACE is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +# CONFIG_NVRAM is not set +# CONFIG_GEN_RTC is not set +CONFIG_XILINX_HWICAP=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_IBM_IIC is not set +# CONFIG_I2C_MPC is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +CONFIG_I2C_DEBUG_CORE=y +CONFIG_I2C_DEBUG_ALGO=y +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_OF is not set +# CONFIG_FB_CT65550 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_IBM_GXT4500 is not set +CONFIG_FB_XILINX=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=m + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_CRAMFS=y +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +CONFIG_ROMFS_FS=y +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_SMB_FS=y +# CONFIG_SMB_NLS_DEFAULT is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_SAMPLES is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..d2c435f0da42fbde3db15770680ee6002dd48756 --- /dev/null +++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig @@ -0,0 +1,1128 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc2 +# Mon May 19 21:12:32 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +# CONFIG_FSL_EMB_PERFMON is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +# CONFIG_EPOLL is not set +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +# CONFIG_PPC_MULTIPLATFORM is not set +# CONFIG_PPC_82xx is not set +CONFIG_PPC_83xx=y +# CONFIG_PPC_86xx is not set +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_MPC83xx=y +# CONFIG_MPC831x_RDB is not set +# CONFIG_MPC832x_MDS is not set +# CONFIG_MPC832x_RDB is not set +# CONFIG_MPC834x_MDS is not set +# CONFIG_MPC834x_ITX is not set +# CONFIG_MPC836x_MDS is not set +CONFIG_MPC836x_RDK=y +# CONFIG_MPC837x_MDS is not set +# CONFIG_MPC837x_RDB is not set +# CONFIG_SBC834x is not set +CONFIG_IPIC=y +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +CONFIG_QUICC_ENGINE=y +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_FSL_LBC=y +CONFIG_FSL_GTM=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_TASK_SIZE=0xc0000000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_OF_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_AMDSTD is not set +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_GPIO=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +CONFIG_BROADCOM_PHY=y +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_GIANFAR is not set +CONFIG_UCC_GETH=y +CONFIG_UGETH_NAPI=y +# CONFIG_UGETH_MAGIC_PACKET is not set +# CONFIG_UGETH_FILTERING is not set +# CONFIG_UGETH_TX_ON_DEMAND is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_SERIAL_QE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_NVRAM is not set +# CONFIG_GEN_RTC is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_GPIO is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_MPC=y +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_MPC83xx=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SPIDEV=y +# CONFIG_SPI_TLE62X0 is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_83xx_WDT=y + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +CONFIG_FB_MACMODES=y +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +CONFIG_FB_OF=y +# CONFIG_FB_CT65550 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_FSL_DIU is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_LOGO_LINUX_CLUT224=y + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +# CONFIG_MSDOS_PARTITION is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_NLS is not set +# CONFIG_DLM is not set +CONFIG_UCC_SLOW=y +CONFIG_UCC_FAST=y +CONFIG_UCC=y +CONFIG_QE_GPIO=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_SAMPLES is not set +# CONFIG_IRQSTACKS is not set +CONFIG_PPC_EARLY_DEBUG=y +# CONFIG_PPC_EARLY_DEBUG_LPAR is not set +# CONFIG_PPC_EARLY_DEBUG_G5 is not set +# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set +# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set +# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set +# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set +# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set +# CONFIG_PPC_EARLY_DEBUG_BEAT is not set +# CONFIG_PPC_EARLY_DEBUG_44x is not set +# CONFIG_PPC_EARLY_DEBUG_40x is not set +# CONFIG_PPC_EARLY_DEBUG_CPM is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set +CONFIG_PPC_LIB_RHEAP=y +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig index 042a85ea7b723b63eeed260e024fec4d70d402bc..a0583e5119f5b087fd15f62f5fa947c7170a7474 100644 --- a/arch/powerpc/configs/85xx/mpc8544_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8544_ds_defconfig @@ -997,10 +997,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig index 03627cfebcb40cfa7467833a4c3a4a7602fc83aa..164fd9606ee6acf9e7e0a80b8ca1745abd532b9f 100644 --- a/arch/powerpc/configs/85xx/mpc8572_ds_defconfig +++ b/arch/powerpc/configs/85xx/mpc8572_ds_defconfig @@ -997,10 +997,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..b3b770be3cc9b237ca6f187c10f4d92d04690d34 --- /dev/null +++ b/arch/powerpc/configs/85xx/tqm8548_defconfig @@ -0,0 +1,1225 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc5 +# Thu Jun 26 14:40:02 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_E500=y +# CONFIG_PPC_E500MC is not set +CONFIG_BOOKE=y +CONFIG_FSL_BOOKE=y +CONFIG_FSL_EMB_PERFMON=y +# CONFIG_PHYS_64BIT is not set +CONFIG_SPE=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +# CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_MPC85xx=y +# CONFIG_MPC8540_ADS is not set +# CONFIG_MPC8560_ADS is not set +# CONFIG_MPC85xx_CDS is not set +# CONFIG_MPC85xx_MDS is not set +# CONFIG_MPC85xx_DS is not set +# CONFIG_KSI8560 is not set +# CONFIG_STX_GP3 is not set +# CONFIG_TQM8540 is not set +# CONFIG_TQM8541 is not set +CONFIG_TQM8548=y +# CONFIG_TQM8555 is not set +# CONFIG_TQM8560 is not set +# CONFIG_SBC8548 is not set +# CONFIG_SBC8560 is not set +CONFIG_TQM85xx=y +# CONFIG_IPIC is not set +CONFIG_MPIC=y +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPM2 is not set +CONFIG_PPC_CPM_NEW_BINDING=y +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +CONFIG_MATH_EMULATION=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +# CONFIG_SECCOMP is not set +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_FSL_PCI=y +CONFIG_FSL_LBC=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +# CONFIG_PCIEASPM is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_PHYSICAL_ALIGN=0x10000000 +CONFIG_TASK_SIZE=0xc0000000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +CONFIG_MTD_NAND_ECC_SMC=y +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_NAND_FSL_ELBC is not set +CONFIG_MTD_NAND_FSL_UPM=y +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MTD_UBI_BEB_RESERVE=1 +# CONFIG_MTD_UBI_GLUEBI is not set + +# +# UBI debugging options +# +# CONFIG_MTD_UBI_DEBUG is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +# CONFIG_BLK_DEV_IDEDISK is not set +# CONFIG_IDEDISK_MULTI_MODE is not set +# CONFIG_BLK_DEV_IDECD is not set +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +# CONFIG_IDE_TASK_IOCTL is not set +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_PLATFORM is not set +CONFIG_BLK_DEV_IDEDMA_SFF=y + +# +# PCI IDE chipsets support +# +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_PCIBUS_ORDER=y +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SL82C105 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +CONFIG_BLK_DEV_VIA82CXXX=y +# CONFIG_BLK_DEV_TC86C001 is not set +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_BLK_DEV_HD_ONLY is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +CONFIG_E1000_NAPI=y +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_GIANFAR=y +CONFIG_GFAR_NAPI=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +CONFIG_NETDEV_10000=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_SFC is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_MPC=y +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +CONFIG_SENSORS_LM75=y +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +CONFIG_DAB=y + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=y +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PPC is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +# CONFIG_MSDOS_PARTITION is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUGGER is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_BDI_SWITCH is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/asp8347_defconfig b/arch/powerpc/configs/asp8347_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..60bb4d106c87c039051775b34c6280c504e6eca6 --- /dev/null +++ b/arch/powerpc/configs/asp8347_defconfig @@ -0,0 +1,1214 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.25-rc6 +# Tue May 6 02:21:00 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +CONFIG_FSL_EMB_PERFMON=y +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +# CONFIG_DEFAULT_UIMAGE is not set +CONFIG_REDBOOT=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +# CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +# CONFIG_EPOLL is not set +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +# CONFIG_PPC_MULTIPLATFORM is not set +# CONFIG_PPC_82xx is not set +CONFIG_PPC_83xx=y +# CONFIG_PPC_86xx is not set +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_MPC83xx=y +# CONFIG_MPC831x_RDB is not set +# CONFIG_MPC832x_MDS is not set +# CONFIG_MPC832x_RDB is not set +# CONFIG_MPC834x_MDS is not set +# CONFIG_MPC834x_ITX is not set +# CONFIG_MPC836x_MDS is not set +# CONFIG_MPC837x_MDS is not set +# CONFIG_MPC837x_RDB is not set +# CONFIG_SBC834x is not set +CONFIG_ASP834x=y +CONFIG_PPC_MPC834x=y +CONFIG_IPIC=y +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_BOOT_LOAD=0x00800000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +CONFIG_OF_DEVICE=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_GIANFAR=y +# CONFIG_GFAR_NAPI is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +CONFIG_GEN_RTC=y +# CONFIG_GEN_RTC_X is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y + +# +# I2C Algorithms +# +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_MPC=y +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_AD7418 is not set +# CONFIG_SENSORS_ADM1021 is not set +# CONFIG_SENSORS_ADM1025 is not set +# CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set +# CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +# CONFIG_SENSORS_DS1621 is not set +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +# CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set +# CONFIG_SENSORS_IT87 is not set +# CONFIG_SENSORS_LM63 is not set +# CONFIG_SENSORS_LM75 is not set +# CONFIG_SENSORS_LM77 is not set +# CONFIG_SENSORS_LM78 is not set +# CONFIG_SENSORS_LM80 is not set +# CONFIG_SENSORS_LM83 is not set +# CONFIG_SENSORS_LM85 is not set +# CONFIG_SENSORS_LM87 is not set +# CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +# CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +# CONFIG_SENSORS_VIA686A is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +# CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +# CONFIG_SENSORS_W83L785TS is not set +# CONFIG_SENSORS_W83L786NG is not set +# CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_83xx_WDT=y + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=m +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_EHCI_HCD_PPC_OF=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y + +# +# Conflicting RTC option has been selected, check GEN_RTC and RTC +# +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +CONFIG_RTC_DRV_DS1374=y +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set + +# +# Userspace I/O +# +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +# CONFIG_MAC_PARTITION is not set +# CONFIG_MSDOS_PARTITION is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_SAMPLES is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +# CONFIG_CRYPTO_SEQIV is not set +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..dc599c7e97d50f4d70ad1de8fbd0822a165fc57a --- /dev/null +++ b/arch/powerpc/configs/c2k_defconfig @@ -0,0 +1,1872 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc2 +# Thu May 15 11:00:14 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_NOT_COHERENT_CACHE=y +CONFIG_CHECK_CACHE_COHERENCY=y +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +# CONFIG_DEFAULT_UIMAGE is not set +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +# CONFIG_UTS_NS is not set +# CONFIG_IPC_NS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +CONFIG_PPC_MULTIPLATFORM=y +# CONFIG_PPC_82xx is not set +# CONFIG_PPC_83xx is not set +# CONFIG_PPC_86xx is not set +CONFIG_CLASSIC32=y +# CONFIG_PPC_CHRP is not set +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_MPC5121_ADS is not set +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_PMAC is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_EMBEDDED6xx=y +# CONFIG_LINKSTATION is not set +# CONFIG_STORCENTER is not set +# CONFIG_MPC7448HPC2 is not set +# CONFIG_PPC_HOLLY is not set +# CONFIG_PPC_PRPMC2800 is not set +CONFIG_PPC_C2K=y +CONFIG_MV64X60=y +# CONFIG_IPIC is not set +# CONFIG_MPIC is not set +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=m +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set + +# +# CPU Frequency drivers +# +# CONFIG_TAU is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +CONFIG_HIGHMEM=y +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_KEXEC is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +# CONFIG_PROC_DEVICETREE is not set +# CONFIG_CMDLINE_BOOL is not set +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +CONFIG_HOTPLUG_PCI_SHPC=m +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_TASK_SIZE=0xc0000000 +CONFIG_CONSISTENT_START=0xff100000 +CONFIG_CONSISTENT_SIZE=0x00200000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IP_VS=m +# CONFIG_IP_VS_DEBUG is not set +CONFIG_IP_VS_TAB_BITS=12 + +# +# IPVS transport protocol load balancing support +# +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y + +# +# IPVS scheduler +# +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m + +# +# IPVS application helper +# +CONFIG_IP_VS_FTP=m +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +# CONFIG_IPV6_MIP6 is not set +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETLABEL is not set +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK_QUEUE is not set +# CONFIG_NETFILTER_NETLINK_LOG is not set +# CONFIG_NF_CONNTRACK is not set +CONFIG_NETFILTER_XTABLES=m +# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set +# CONFIG_NETFILTER_XT_TARGET_DSCP is not set +# CONFIG_NETFILTER_XT_TARGET_MARK is not set +# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set +# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TRACE is not set +# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set +# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_DCCP is not set +# CONFIG_NETFILTER_XT_MATCH_DSCP is not set +# CONFIG_NETFILTER_XT_MATCH_ESP is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set +# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_MAC is not set +# CONFIG_NETFILTER_XT_MATCH_MARK is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +# CONFIG_NETFILTER_XT_MATCH_POLICY is not set +# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set +# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set +# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set +# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_REALM is not set +# CONFIG_NETFILTER_XT_MATCH_SCTP is not set +# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set +# CONFIG_NETFILTER_XT_MATCH_STRING is not set +# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set + +# +# IP: Netfilter Configuration +# +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +# CONFIG_IP_NF_MATCH_AH is not set +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +# CONFIG_IP_NF_TARGET_TTL is not set +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +# CONFIG_IP6_NF_QUEUE is not set +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +# CONFIG_IP6_NF_MATCH_AH is not set +# CONFIG_IP6_NF_MATCH_MH is not set +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +# CONFIG_IP6_NF_TARGET_REJECT is not set +CONFIG_IP6_NF_MANGLE=m +# CONFIG_IP6_NF_TARGET_HL is not set +CONFIG_IP6_NF_RAW=m + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +# CONFIG_BRIDGE_EBT_ULOG is not set +# CONFIG_BRIDGE_EBT_NFLOG is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_TIPC is not set +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_LANE=m +# CONFIG_ATM_MPOA is not set +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +# CONFIG_DECNET is not set +CONFIG_LLC=m +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_PRIO=m +# CONFIG_NET_SCH_RR is not set +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +# CONFIG_CLS_U32_MARK is not set +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_EMATCH is not set +# CONFIG_NET_CLS_ACT is not set +CONFIG_NET_CLS_IND=y +CONFIG_NET_SCH_FIFO=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_TCPPROBE is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +# CONFIG_BT_HCIUART_LL is not set +CONFIG_BT_HCIBCM203X=m +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +CONFIG_IEEE80211=m +# CONFIG_IEEE80211_DEBUG is not set +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=m +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +CONFIG_MTD_CFI_I4=y +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP_OF=y +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=m +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=m +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +CONFIG_SCSI_NETLINK=y +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=m +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=m +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SAS_LIBSAS is not set +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +CONFIG_BLK_DEV_3W_XXXX_RAID=m +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=4 +CONFIG_AIC7XXX_RESET_DELAY_MS=15000 +# CONFIG_AIC7XXX_DEBUG_ENABLE is not set +CONFIG_AIC7XXX_DEBUG_MASK=0 +# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set +CONFIG_SCSI_AIC7XXX_OLD=m +CONFIG_SCSI_AIC79XX=m +CONFIG_AIC79XX_CMDS_PER_DEVICE=4 +CONFIG_AIC79XX_RESET_DELAY_MS=15000 +# CONFIG_AIC79XX_DEBUG_ENABLE is not set +CONFIG_AIC79XX_DEBUG_MASK=0 +# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +CONFIG_SCSI_ARCMSR=m +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_MAILBOX=m +# CONFIG_MEGARAID_LEGACY is not set +CONFIG_MEGARAID_SAS=m +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +CONFIG_SCSI_FUTURE_DOMAIN=m +CONFIG_SCSI_GDTH=m +CONFIG_SCSI_IPS=m +CONFIG_SCSI_INITIO=m +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_STEX is not set +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 +CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 +CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 +CONFIG_SCSI_SYM53C8XX_MMIO=y +CONFIG_SCSI_QLOGIC_1280=m +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +CONFIG_SCSI_LPFC=m +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +CONFIG_DUMMY=m +CONFIG_BONDING=m +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +CONFIG_TUN=m +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_MV643XX_ETH=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_ATM_DRIVERS is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +CONFIG_SLHC=m +# CONFIG_NET_FC is not set +CONFIG_NETCONSOLE=m +# CONFIG_NETCONSOLE_DYNAMIC is not set +CONFIG_NETPOLL=y +CONFIG_NETPOLL_TRAP=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_ISDN=m +CONFIG_ISDN_I4L=m +CONFIG_ISDN_PPP=y +CONFIG_ISDN_PPP_VJ=y +CONFIG_ISDN_MPP=y +CONFIG_IPPP_FILTER=y +# CONFIG_ISDN_PPP_BSDCOMP is not set +CONFIG_ISDN_AUDIO=y +CONFIG_ISDN_TTY_FAX=y + +# +# ISDN feature submodules +# +CONFIG_ISDN_DRV_LOOP=m +# CONFIG_ISDN_DIVERSION is not set + +# +# ISDN4Linux hardware drivers +# + +# +# Passive cards +# +CONFIG_ISDN_DRV_HISAX=m + +# +# D-channel protocol features +# +CONFIG_HISAX_EURO=y +CONFIG_DE_AOC=y +CONFIG_HISAX_NO_SENDCOMPLETE=y +CONFIG_HISAX_NO_LLC=y +CONFIG_HISAX_NO_KEYPAD=y +CONFIG_HISAX_1TR6=y +CONFIG_HISAX_NI1=y +CONFIG_HISAX_MAX_CARDS=8 + +# +# HiSax supported cards +# +CONFIG_HISAX_16_3=y +CONFIG_HISAX_S0BOX=y +CONFIG_HISAX_FRITZPCI=y +CONFIG_HISAX_AVM_A1_PCMCIA=y +CONFIG_HISAX_ELSA=y +CONFIG_HISAX_DIEHLDIVA=y +CONFIG_HISAX_SEDLBAUER=y +CONFIG_HISAX_NICCY=y +CONFIG_HISAX_BKM_A4T=y +CONFIG_HISAX_SCT_QUADRO=y +CONFIG_HISAX_GAZEL=y +CONFIG_HISAX_W6692=y +CONFIG_HISAX_HFC_SX=y +# CONFIG_HISAX_DEBUG is not set + +# +# HiSax PCMCIA card service modules +# + +# +# HiSax sub driver modules +# +CONFIG_HISAX_ST5481=m +CONFIG_HISAX_HFCUSB=m +# CONFIG_HISAX_HFC4S8S is not set +CONFIG_HISAX_FRITZ_PCIPNP=m +CONFIG_HISAX_HDLC=y + +# +# Active cards +# +CONFIG_HYSDN=m +CONFIG_HYSDN_CAPI=y +# CONFIG_ISDN_DRV_GIGASET is not set +CONFIG_ISDN_CAPI=m +CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y +CONFIG_CAPI_TRACE=y +CONFIG_ISDN_CAPI_MIDDLEWARE=y +CONFIG_ISDN_CAPI_CAPI20=m +CONFIG_ISDN_CAPI_CAPIFS_BOOL=y +CONFIG_ISDN_CAPI_CAPIFS=m +CONFIG_ISDN_CAPI_CAPIDRV=m + +# +# CAPI hardware drivers +# +CONFIG_CAPI_AVM=y +CONFIG_ISDN_DRV_AVMB1_B1PCI=m +CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y +CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m +CONFIG_ISDN_DRV_AVMB1_T1PCI=m +CONFIG_ISDN_DRV_AVMB1_C4=m +CONFIG_CAPI_EICON=y +CONFIG_ISDN_DIVAS=m +CONFIG_ISDN_DIVAS_BRIPCI=y +CONFIG_ISDN_DIVAS_PRIPCI=y +CONFIG_ISDN_DIVAS_DIVACAPI=m +CONFIG_ISDN_DIVAS_USERIDI=m +CONFIG_ISDN_DIVAS_MAINT=m +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_MPSC=y +CONFIG_SERIAL_MPSC_CONSOLE=y +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=m +CONFIG_NVRAM=m +CONFIG_GEN_RTC=m +# CONFIG_GEN_RTC_X is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +CONFIG_RAW_DRIVER=y +CONFIG_MAX_RAW_DEVS=8192 +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_MPC is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set +CONFIG_I2C_MV64XXX=m + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +CONFIG_SENSORS_EEPROM=m +CONFIG_SENSORS_PCF8574=m +# CONFIG_PCF8575 is not set +CONFIG_SENSORS_PCF8591=m +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_HWMON=m +CONFIG_HWMON_VID=m +# CONFIG_SENSORS_AD7418 is not set +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +# CONFIG_SENSORS_ADM1029 is not set +CONFIG_SENSORS_ADM1031=m +# CONFIG_SENSORS_ADM9240 is not set +# CONFIG_SENSORS_ADT7470 is not set +# CONFIG_SENSORS_ADT7473 is not set +# CONFIG_SENSORS_ATXP1 is not set +CONFIG_SENSORS_DS1621=m +# CONFIG_SENSORS_I5K_AMB is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_F71882FG is not set +# CONFIG_SENSORS_F75375S is not set +CONFIG_SENSORS_GL518SM=m +# CONFIG_SENSORS_GL520SM is not set +CONFIG_SENSORS_IT87=m +# CONFIG_SENSORS_LM63 is not set +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +# CONFIG_SENSORS_LM92 is not set +# CONFIG_SENSORS_LM93 is not set +CONFIG_SENSORS_MAX1619=m +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set +# CONFIG_SENSORS_SIS5595 is not set +# CONFIG_SENSORS_DME1737 is not set +CONFIG_SENSORS_SMSC47M1=m +# CONFIG_SENSORS_SMSC47M192 is not set +CONFIG_SENSORS_SMSC47B397=m +# CONFIG_SENSORS_ADS7828 is not set +# CONFIG_SENSORS_THMC50 is not set +CONFIG_SENSORS_VIA686A=m +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set +CONFIG_SENSORS_W83781D=m +# CONFIG_SENSORS_W83791D is not set +# CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set +CONFIG_SENSORS_W83L785TS=m +# CONFIG_SENSORS_W83L786NG is not set +CONFIG_SENSORS_W83627HF=m +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set +# CONFIG_THERMAL is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +# CONFIG_MV64X60_WDT is not set + +# +# PCI-based Watchdog Cards +# +CONFIG_PCIPCWATCHDOG=m +CONFIG_WDTPCI=m +CONFIG_WDT_501_PCI=y + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_HID=m +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=m +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_HCD_PPC_OF=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PPC_OF=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +# CONFIG_USB_STORAGE_USBAT is not set +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USB_MON=y + +# +# USB port drivers +# +CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y +CONFIG_USB_SERIAL_GENERIC=y +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +CONFIG_USB_SERIAL_BELKIN=m +# CONFIG_USB_SERIAL_CH341 is not set +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +# CONFIG_USB_SERIAL_FUNSOFT is not set +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_IUU is not set +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KEYSPAN_MPR=y +CONFIG_USB_SERIAL_KEYSPAN_USA28=y +CONFIG_USB_SERIAL_KEYSPAN_USA28X=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y +CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y +CONFIG_USB_SERIAL_KEYSPAN_USA19=y +CONFIG_USB_SERIAL_KEYSPAN_USA18X=y +CONFIG_USB_SERIAL_KEYSPAN_USA19W=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y +CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y +CONFIG_USB_SERIAL_KEYSPAN_USA49W=y +CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +CONFIG_USB_SERIAL_PL2303=m +# CONFIG_USB_SERIAL_OTI6858 is not set +# CONFIG_USB_SERIAL_SPCP8X5 is not set +# CONFIG_USB_SERIAL_HP4X is not set +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SAFE_PADDED=y +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +# CONFIG_USB_SERIAL_OPTION is not set +CONFIG_USB_SERIAL_OMNINET=m +# CONFIG_USB_SERIAL_DEBUG is not set + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +CONFIG_USB_AUERSWALD=m +CONFIG_USB_RIO500=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +# CONFIG_USB_BERRY_CHARGE is not set +CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +CONFIG_USB_TEST=m +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +# CONFIG_USB_CXACRU is not set +# CONFIG_USB_UEAGLEATM is not set +# CONFIG_USB_XUSBATM is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_USER_MEM=y +CONFIG_INFINIBAND_ADDR_TRANS=y +CONFIG_INFINIBAND_MTHCA=m +CONFIG_INFINIBAND_MTHCA_DEBUG=y +CONFIG_INFINIBAND_AMSO1100=m +# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set +# CONFIG_MLX4_INFINIBAND is not set +# CONFIG_INFINIBAND_NES is not set +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +CONFIG_INFINIBAND_IPOIB_DEBUG=y +# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set +CONFIG_INFINIBAND_SRP=m +# CONFIG_INFINIBAND_ISER is not set +# CONFIG_EDAC is not set +# CONFIG_RTC_CLASS is not set +CONFIG_DMADEVICES=y + +# +# DMA Devices +# +# CONFIG_FSL_DMA is not set +# CONFIG_UIO is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=m +CONFIG_FS_MBCACHE=m +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_PRINT_QUOTA_WARNING=y +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +# CONFIG_AUTOFS_FS is not set +CONFIG_AUTOFS4_FS=m +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +CONFIG_CRAMFS=m +CONFIG_VXFS_FS=m +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_SUNRPC_XPRT_RDMA=m +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +CONFIG_RPCSEC_GSS_SPKM3=m +# CONFIG_SMB_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +# CONFIG_CIFS_EXPERIMENTAL is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +CONFIG_OSF_PARTITION=y +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +CONFIG_SGI_PARTITION=y +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +# CONFIG_KARMA_PARTITION is not set +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_CHECK_SIGNATURE=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +# CONFIG_DEBUG_MUTEXES is not set +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_HIGHMEM=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_LKDTM is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_STACKOVERFLOW=y +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUGGER is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_BDI_SWITCH is not set +CONFIG_BOOTX_TEXT=y +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_CAPABILITIES=y +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +# CONFIG_CRYPTO_CAMELLIA is not set +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +CONFIG_CRYPTO_KHAZAD=m +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/mpc8536_ds_defconfig b/arch/powerpc/configs/mpc8536_ds_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..f1e2931de5da33eeffea4bf711d9431479f43eb0 --- /dev/null +++ b/arch/powerpc/configs/mpc8536_ds_defconfig @@ -0,0 +1,1637 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc8 +# Wed Jul 2 01:34:26 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_E500=y +# CONFIG_PPC_E500MC is not set +CONFIG_BOOKE=y +CONFIG_FSL_BOOKE=y +CONFIG_FSL_EMB_PERFMON=y +# CONFIG_PHYS_64BIT is not set +CONFIG_SPE=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +CONFIG_AUDIT=y +# CONFIG_AUDITSYSCALL is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +# CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MODVERSIONS=y +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +# CONFIG_PPC_MPC512x is not set +# CONFIG_PPC_MPC5121 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +CONFIG_MPC85xx=y +# CONFIG_MPC8540_ADS is not set +# CONFIG_MPC8560_ADS is not set +# CONFIG_MPC85xx_CDS is not set +# CONFIG_MPC85xx_MDS is not set +CONFIG_MPC8536_DS=y +# CONFIG_MPC85xx_DS is not set +# CONFIG_KSI8560 is not set +# CONFIG_STX_GP3 is not set +# CONFIG_TQM8540 is not set +# CONFIG_TQM8541 is not set +# CONFIG_TQM8548 is not set +# CONFIG_TQM8555 is not set +# CONFIG_TQM8560 is not set +# CONFIG_SBC8548 is not set +# CONFIG_SBC8560 is not set +# CONFIG_IPIC is not set +CONFIG_MPIC=y +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPM2 is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +CONFIG_HIGHMEM=y +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=m +CONFIG_MATH_EMULATION=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ZONE_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_FSL_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +# CONFIG_PCIEPORTBUS is not set +CONFIG_ARCH_SUPPORTS_MSI=y +# CONFIG_PCI_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +CONFIG_PHYSICAL_ALIGN=0x10000000 +CONFIG_TASK_SIZE=0xc0000000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +CONFIG_NET_KEY=m +# CONFIG_NET_KEY_MIGRATE is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_NET_IPGRE=y +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_ARPD=y +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +CONFIG_INET_TUNNEL=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +CONFIG_IPV6=y +# CONFIG_IPV6_PRIVACY is not set +# CONFIG_IPV6_ROUTER_PREF is not set +# CONFIG_IPV6_OPTIMISTIC_DAD is not set +# CONFIG_INET6_AH is not set +# CONFIG_INET6_ESP is not set +# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6_MIP6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y +# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set +CONFIG_IPV6_SIT=y +CONFIG_IPV6_NDISC_NODETYPE=y +# CONFIG_IPV6_TUNNEL is not set +# CONFIG_IPV6_MULTIPLE_TABLES is not set +# CONFIG_IPV6_MROUTE is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +# CONFIG_MTD is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_I2C=y +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +CONFIG_BLK_DEV_NBD=y +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=524288 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=y +# CONFIG_CHR_DEV_OSST is not set +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +CONFIG_SCSI_LOGGING=y +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_SRP is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +# CONFIG_SATA_AHCI is not set +CONFIG_SATA_SIL24=y +CONFIG_SATA_FSL=y +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +CONFIG_SATA_SIL=y +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +# CONFIG_MACINTOSH_DRIVERS is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +CONFIG_DUMMY=y +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +CONFIG_VITESSE_PHY=y +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_NET_PCI is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +CONFIG_SKGE=y +# CONFIG_SKGE_DEBUG is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +CONFIG_GIANFAR=y +CONFIG_GFAR_NAPI=y +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +CONFIG_NETDEV_10000=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set +# CONFIG_MLX4_CORE is not set +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_SFC is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=2 +CONFIG_SERIAL_8250_RUNTIME_UARTS=2 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_UARTLITE is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +# CONFIG_SERIAL_OF_PLATFORM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_MPC=y +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +CONFIG_SENSORS_EEPROM=y +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +CONFIG_DVB_CORE=m +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_DVB_CAPTURE_DRIVERS=y + +# +# Supported SAA7146 based PCI Adapters +# +# CONFIG_TTPCI_EEPROM is not set +# CONFIG_DVB_BUDGET_CORE is not set + +# +# Supported USB Adapters +# +# CONFIG_DVB_USB is not set +# CONFIG_DVB_TTUSB_BUDGET is not set +# CONFIG_DVB_TTUSB_DEC is not set +# CONFIG_DVB_CINERGYT2 is not set + +# +# Supported FlexCopII (B2C2) Adapters +# +# CONFIG_DVB_B2C2_FLEXCOP is not set + +# +# Supported BT878 Adapters +# + +# +# Supported Pluto2 Adapters +# +# CONFIG_DVB_PLUTO2 is not set + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_FE_CUSTOMISE is not set + +# +# DVB-S (satellite) frontends +# +# CONFIG_DVB_CX24110 is not set +# CONFIG_DVB_CX24123 is not set +# CONFIG_DVB_MT312 is not set +# CONFIG_DVB_S5H1420 is not set +# CONFIG_DVB_STV0299 is not set +# CONFIG_DVB_TDA8083 is not set +# CONFIG_DVB_TDA10086 is not set +# CONFIG_DVB_VES1X93 is not set +# CONFIG_DVB_TUNER_ITD1000 is not set +# CONFIG_DVB_TDA826X is not set +# CONFIG_DVB_TUA6100 is not set + +# +# DVB-T (terrestrial) frontends +# +# CONFIG_DVB_SP8870 is not set +# CONFIG_DVB_SP887X is not set +# CONFIG_DVB_CX22700 is not set +# CONFIG_DVB_CX22702 is not set +# CONFIG_DVB_L64781 is not set +# CONFIG_DVB_TDA1004X is not set +# CONFIG_DVB_NXT6000 is not set +# CONFIG_DVB_MT352 is not set +# CONFIG_DVB_ZL10353 is not set +# CONFIG_DVB_DIB3000MB is not set +# CONFIG_DVB_DIB3000MC is not set +# CONFIG_DVB_DIB7000M is not set +# CONFIG_DVB_DIB7000P is not set +# CONFIG_DVB_TDA10048 is not set + +# +# DVB-C (cable) frontends +# +# CONFIG_DVB_VES1820 is not set +# CONFIG_DVB_TDA10021 is not set +# CONFIG_DVB_TDA10023 is not set +# CONFIG_DVB_STV0297 is not set + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +# CONFIG_DVB_NXT200X is not set +# CONFIG_DVB_OR51211 is not set +# CONFIG_DVB_OR51132 is not set +# CONFIG_DVB_BCM3510 is not set +# CONFIG_DVB_LGDT330X is not set +# CONFIG_DVB_S5H1409 is not set +# CONFIG_DVB_AU8522 is not set +# CONFIG_DVB_S5H1411 is not set + +# +# Digital terrestrial only tuners/PLL +# +# CONFIG_DVB_PLL is not set +# CONFIG_DVB_TUNER_DIB0070 is not set + +# +# SEC control devices for DVB-S +# +# CONFIG_DVB_LNBP21 is not set +# CONFIG_DVB_ISL6405 is not set +# CONFIG_DVB_ISL6421 is not set +CONFIG_DAB=y +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +# CONFIG_VGACON_SOFT_SCROLLBACK is not set +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5530 is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +CONFIG_SND_INTEL8X0=y +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set +# CONFIG_SND_AC97_POWER_SAVE is not set + +# +# ALSA PowerMac devices +# + +# +# ALSA PowerPC devices +# + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_EHCI_HCD_PPC_OF=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PPC_OF=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +CONFIG_USB_OHCI_HCD_PPC_OF_LE=y +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +# CONFIG_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PPC is not set +CONFIG_DMADEVICES=y + +# +# DMA Devices +# +CONFIG_FSL_DMA=y +CONFIG_DMA_ENGINE=y + +# +# DMA Clients +# +# CONFIG_NET_DMA is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +# CONFIG_NTFS_RW is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +CONFIG_ADFS_FS=m +# CONFIG_ADFS_FS_RW is not set +CONFIG_AFFS_FS=m +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_CRAMFS=y +CONFIG_VXFS_FS=m +# CONFIG_MINIX_FS is not set +CONFIG_HPFS_FS=m +CONFIG_QNX4FS_FS=m +# CONFIG_ROMFS_FS is not set +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_UFS_DEBUG is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFSD=y +# CONFIG_NFSD_V3 is not set +# CONFIG_NFSD_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +# CONFIG_OSF_PARTITION is not set +# CONFIG_AMIGA_PARTITION is not set +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_MINIX_SUBPARTITION is not set +# CONFIG_SOLARIS_X86_PARTITION is not set +# CONFIG_UNIXWARE_DISKLABEL is not set +# CONFIG_LDM_PARTITION is not set +# CONFIG_SGI_PARTITION is not set +# CONFIG_ULTRIX_PARTITION is not set +# CONFIG_SUN_PARTITION is not set +# CONFIG_KARMA_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=m +# CONFIG_DLM is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_HIGHMEM is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUGGER is not set +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_VIRQ_DEBUG is not set +# CONFIG_BDI_SWITCH is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_SHA1=m +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +# CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index 3efab71a603b74a49d60b5507371e5f81c6ad287..fa0170504b88cfcabbb706a820d27680dccb6160 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -1005,10 +1005,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/mpc8610_hpcd_defconfig index 5612d40d0463907067f261ed32445d1b05eab678..cdf98ae3682b1b71b16d8e5ab10a2c9a120240fd 100644 --- a/arch/powerpc/configs/mpc8610_hpcd_defconfig +++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.26-rc5 -# Mon Jun 9 08:50:24 2008 +# Linux kernel version: 2.6.26 +# Tue Jul 15 08:31:01 2008 # # CONFIG_PPC64 is not set @@ -51,6 +51,8 @@ CONFIG_PPC_UDBG_16550=y CONFIG_AUDIT_ARCH=y CONFIG_GENERIC_BUG=y CONFIG_DEFAULT_UIMAGE=y +CONFIG_HIBERNATE_32=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y # CONFIG_PPC_DCR_NATIVE is not set # CONFIG_PPC_DCR_MMIO is not set CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -97,6 +99,7 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y # CONFIG_ELF_CORE is not set +CONFIG_PCSPKR_PLATFORM=y CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y @@ -117,7 +120,7 @@ CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y -# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_HAVE_DMA_ATTRS=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y @@ -153,31 +156,43 @@ CONFIG_CLASSIC_RCU=y # # Platform support # -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_PPC_82xx is not set -# CONFIG_PPC_83xx is not set -CONFIG_PPC_86xx=y +CONFIG_PPC_MULTIPLATFORM=y +CONFIG_CLASSIC32=y +CONFIG_PPC_CHRP=y # CONFIG_PPC_MPC512x is not set # CONFIG_PPC_MPC5121 is not set +# CONFIG_MPC5121_ADS is not set +# CONFIG_PPC_MPC52xx is not set +CONFIG_PPC_PMAC=y # CONFIG_PPC_CELL is not set # CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PPC_82xx is not set # CONFIG_PQ2ADS is not set +# CONFIG_PPC_83xx is not set +CONFIG_PPC_86xx=y # CONFIG_MPC8641_HPCN is not set # CONFIG_SBC8641D is not set CONFIG_MPC8610_HPCD=y CONFIG_MPC8610=y +# CONFIG_EMBEDDED6xx is not set +CONFIG_PPC_NATIVE=y +# CONFIG_UDBG_RTAS_CONSOLE is not set # CONFIG_IPIC is not set CONFIG_MPIC=y # CONFIG_MPIC_WEIRD is not set -# CONFIG_PPC_I8259 is not set -# CONFIG_PPC_RTAS is not set +CONFIG_PPC_I8259=y +CONFIG_PPC_RTAS=y +# CONFIG_RTAS_ERROR_LOGGING is not set +CONFIG_RTAS_PROC=y # CONFIG_MMIO_NVRAM is not set -# CONFIG_PPC_MPC106 is not set +CONFIG_PPC_MPC106=y # CONFIG_PPC_970_NAP is not set # CONFIG_PPC_INDIRECT_IO is not set # CONFIG_GENERIC_IOMAP is not set # CONFIG_CPU_FREQ is not set -# CONFIG_FSL_ULI1575 is not set +# CONFIG_PPC601_SYNC_FIX is not set +# CONFIG_TAU is not set +CONFIG_FSL_ULI1575=y # # Kernel options @@ -202,6 +217,7 @@ CONFIG_BINFMT_ELF=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_HAS_WALK_MEMORY=y CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_KEXEC is not set CONFIG_ARCH_FLATMEM_ENABLE=y CONFIG_ARCH_POPULATES_NODE_MAP=y CONFIG_SELECT_MEMORY_MODEL=y @@ -228,11 +244,13 @@ CONFIG_ISA_DMA_API=y # # Bus options # +# CONFIG_ISA is not set CONFIG_ZONE_DMA=y CONFIG_GENERIC_ISA_DMA=y CONFIG_PPC_INDIRECT_PCI=y CONFIG_FSL_SOC=y CONFIG_FSL_PCI=y +CONFIG_PPC_PCI_CHOICE=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_SYSCALL=y @@ -469,6 +487,7 @@ CONFIG_OF_I2C=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_FD is not set +# CONFIG_MAC_FLOPPY is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set @@ -571,6 +590,8 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_MESH is not set +# CONFIG_SCSI_MAC53C94 is not set # CONFIG_SCSI_SRP is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set @@ -639,6 +660,10 @@ CONFIG_PATA_ALI=y # # IEEE 1394 (FireWire) support # + +# +# Enable only one of the two stacks, unless you know what you are doing +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set @@ -655,6 +680,8 @@ CONFIG_DUMMY=y # CONFIG_PHYLIB is not set CONFIG_NET_ETHERNET=y # CONFIG_MII is not set +# CONFIG_MACE is not set +# CONFIG_BMAC is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set @@ -762,14 +789,16 @@ CONFIG_SERIAL_8250_RSA=y # CONFIG_SERIAL_UARTLITE is not set CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_PMACZILOG is not set # CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_OF_PLATFORM is not set CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set +# CONFIG_BRIQ_PANEL is not set +# CONFIG_HVC_RTAS is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set # CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -787,9 +816,11 @@ CONFIG_I2C_BOARDINFO=y # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_HYDRA is not set # CONFIG_I2C_I801 is not set # CONFIG_I2C_I810 is not set # CONFIG_I2C_PIIX4 is not set +CONFIG_I2C_POWERMAC=y CONFIG_I2C_MPC=y # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_OCORES is not set @@ -826,6 +857,7 @@ CONFIG_I2C_MPC=y # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set # @@ -888,6 +920,9 @@ CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_PM2 is not set # CONFIG_FB_CYBER2000 is not set # CONFIG_FB_OF is not set +# CONFIG_FB_CONTROL is not set +# CONFIG_FB_PLATINUM is not set +# CONFIG_FB_VALKYRIE is not set # CONFIG_FB_CT65550 is not set # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set @@ -1027,11 +1062,18 @@ CONFIG_SND_VERBOSE_PROCFS=y # # ALSA PowerMac devices # +# CONFIG_SND_POWERMAC is not set # # ALSA PowerPC devices # +# +# Apple Onboard Audio driver +# +# CONFIG_SND_AOA is not set +# CONFIG_SND_AOA_SOUNDBUS is not set + # # System on Chip audio support # @@ -1075,7 +1117,57 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set # CONFIG_EDAC is not set -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_PPC is not set # CONFIG_DMADEVICES is not set # CONFIG_UIO is not set @@ -1295,8 +1387,11 @@ CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_DEBUGGER is not set +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set # CONFIG_IRQSTACKS is not set # CONFIG_BDI_SWITCH is not set +# CONFIG_BOOTX_TEXT is not set # CONFIG_PPC_EARLY_DEBUG is not set # diff --git a/arch/powerpc/configs/mpc8641_hpcn_defconfig b/arch/powerpc/configs/mpc8641_hpcn_defconfig index 4a8171507391996b0361974dc5ab282c53510a8e..867b8c0215f37cdb8b1013f27560eef26acffa48 100644 --- a/arch/powerpc/configs/mpc8641_hpcn_defconfig +++ b/arch/powerpc/configs/mpc8641_hpcn_defconfig @@ -991,10 +991,12 @@ CONFIG_SND=y CONFIG_SND_TIMER=y CONFIG_SND_PCM=y # CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y # CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y +# CONFIG_SND_SUPPORT_OLD_API is not set CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig index 12f9b5a80220885be932c66ba70353a24cf3b0f0..f9d279bb700be0bda4a70a8193cbdbc6d6a498bb 100644 --- a/arch/powerpc/configs/ppc44x_defconfig +++ b/arch/powerpc/configs/ppc44x_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25-rc6 -# Sat Apr 5 09:35:48 2008 +# Linux kernel version: 2.6.26-rc8 +# Wed Jul 9 13:50:48 2008 # # CONFIG_PPC64 is not set @@ -32,6 +32,8 @@ CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_HARDIRQS=y # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_ARCH_HAS_ILOG2_U32=y CONFIG_GENERIC_HWEIGHT=y @@ -88,6 +90,7 @@ CONFIG_INITRAMFS_SOURCE="" CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_EXTRA_PASS=y @@ -115,12 +118,14 @@ CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set CONFIG_PROC_PAGE_MONITOR=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set @@ -157,6 +162,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y # CONFIG_PQ2ADS is not set CONFIG_BAMBOO=y CONFIG_EBONY=y +CONFIG_SAM440EP=y CONFIG_SEQUOIA=y CONFIG_TAISHAN=y CONFIG_KATMAI=y @@ -164,6 +170,7 @@ CONFIG_RAINIER=y CONFIG_WARP=y CONFIG_CANYONLANDS=y CONFIG_YOSEMITE=y +CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y CONFIG_440EP=y CONFIG_440EPX=y CONFIG_440GRX=y @@ -172,6 +179,8 @@ CONFIG_440GX=y CONFIG_440SPe=y CONFIG_460EX=y CONFIG_IBM440EP_ERR42=y +CONFIG_XILINX_VIRTEX=y +CONFIG_XILINX_VIRTEX_5_FXT=y # CONFIG_IPIC is not set # CONFIG_MPIC is not set # CONFIG_MPIC_WEIRD is not set @@ -220,13 +229,16 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_PROC_DEVICETREE=y # CONFIG_CMDLINE_BOOL is not set +CONFIG_EXTRA_TARGETS="" CONFIG_SECCOMP=y CONFIG_ISA_DMA_API=y @@ -246,6 +258,7 @@ CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set # CONFIG_PCCARD is not set # CONFIG_HOTPLUG_PCI is not set +# CONFIG_HAS_RAPIDIO is not set # # Advanced setup @@ -255,13 +268,13 @@ CONFIG_PCI_LEGACY=y # # Default settings for advanced configuration options are used # -CONFIG_HIGHMEM_START=0xfe000000 CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_PAGE_OFFSET=0xc0000000 CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 CONFIG_TASK_SIZE=0xc0000000 CONFIG_CONSISTENT_START=0xff100000 CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x01000000 # # Networking @@ -303,8 +316,6 @@ CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set # CONFIG_IP_DCCP is not set @@ -366,6 +377,7 @@ CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set CONFIG_MTD_OF_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers @@ -478,6 +490,10 @@ CONFIG_HAVE_IDE=y # # IEEE 1394 (FireWire) support # + +# +# Enable only one of the two stacks, unless you know what you are doing +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set @@ -528,7 +544,6 @@ CONFIG_NETDEV_1000=y # CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set @@ -546,6 +561,7 @@ CONFIG_NETDEV_10000=y # CONFIG_MLX4_CORE is not set # CONFIG_TEHUTI is not set # CONFIG_BNX2X is not set +# CONFIG_SFC is not set # CONFIG_TR is not set # @@ -553,6 +569,7 @@ CONFIG_NETDEV_10000=y # # CONFIG_WLAN_PRE80211 is not set # CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -579,6 +596,7 @@ CONFIG_NETDEV_10000=y # Character devices # # CONFIG_VT is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_NOZOMI is not set @@ -611,22 +629,19 @@ CONFIG_LEGACY_PTY_COUNT=256 # CONFIG_HW_RANDOM is not set # CONFIG_NVRAM is not set # CONFIG_GEN_RTC is not set +CONFIG_XILINX_HWICAP=m # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set CONFIG_DEVPORT=y # CONFIG_I2C is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set # @@ -639,12 +654,22 @@ CONFIG_SSB_POSSIBLE=y # Multifunction device drivers # # CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# # CONFIG_DAB is not set # @@ -671,6 +696,8 @@ CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -679,14 +706,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set # CONFIG_INFINIBAND is not set # CONFIG_EDAC is not set # CONFIG_RTC_CLASS is not set # CONFIG_DMADEVICES is not set - -# -# Userspace I/O -# # CONFIG_UIO is not set # @@ -701,7 +725,6 @@ CONFIG_EXT2_FS=y # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set CONFIG_DNOTIFY=y CONFIG_INOTIFY=y @@ -770,7 +793,6 @@ CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y @@ -798,6 +820,7 @@ CONFIG_MSDOS_PARTITION=y # Library routines # CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set @@ -818,6 +841,7 @@ CONFIG_HAVE_LMB=y # CONFIG_PRINTK_TIME is not set CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set @@ -828,6 +852,7 @@ CONFIG_DETECT_SOFTLOCKUP=y CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set # CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_RT_MUTEXES is not set @@ -840,6 +865,7 @@ CONFIG_SCHED_DEBUG=y CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set # CONFIG_BOOT_PRINTK_DELAY is not set @@ -851,6 +877,9 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_DEBUGGER is not set +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set +# CONFIG_IRQSTACKS is not set # CONFIG_BDI_SWITCH is not set # CONFIG_PPC_EARLY_DEBUG is not set @@ -861,50 +890,80 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_SECURITY is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_CRYPTO=y + +# +# Crypto core or helper +# CONFIG_CRYPTO_ALGAPI=y CONFIG_CRYPTO_BLKCIPHER=y -# CONFIG_CRYPTO_SEQIV is not set CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=y +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_XTS is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_CRYPTD is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# # CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# # CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set -# CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_LZO is not set # CONFIG_CRYPTO_HW is not set # CONFIG_PPC_CLOCK is not set +# CONFIG_VIRTUALIZATION is not set diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..e6e91c85da3189aa695c6aef56170911f7880f1d --- /dev/null +++ b/arch/powerpc/configs/ppc6xx_defconfig @@ -0,0 +1,3304 @@ +# powerpc +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-git2 +# Tue Jul 15 23:54:18 2008 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +CONFIG_6xx=y +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_PPC_FPU=y +CONFIG_FSL_EMB_PERFMON=y +CONFIG_ALTIVEC=y +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_PPC_MM_SLICES is not set +# CONFIG_SMP is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set +CONFIG_IRQ_PER_CPU=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_GPIO=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_DEFAULT_UIMAGE=y +CONFIG_REDBOOT=y +CONFIG_HIBERNATE_32=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_POSIX_MQUEUE=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_NS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_CGROUP_MEM_RES_CTLR is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_RELAY=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +# CONFIG_EMBEDDED is not set +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KALLSYMS_EXTRA_PASS=y +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +# CONFIG_COMPAT_BRK is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_MARKERS=y +CONFIG_OPROFILE=m +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_KMOD=y +CONFIG_BLOCK=y +CONFIG_LBD=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_LSF=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_INTEGRITY=y + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# Platform support +# +CONFIG_PPC_MULTIPLATFORM=y +CONFIG_CLASSIC32=y +CONFIG_PPC_CHRP=y +# CONFIG_MPC5121_ADS is not set +# CONFIG_MPC5121_GENERIC is not set +CONFIG_PPC_MPC52xx=y +# CONFIG_PPC_MPC5200_SIMPLE is not set +CONFIG_PPC_EFIKA=y +# CONFIG_PPC_LITE5200 is not set +CONFIG_PPC_MPC5200_BUGFIX=y +CONFIG_PPC_MPC5200_GPIO=y +CONFIG_PPC_PMAC=y +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +CONFIG_PPC_82xx=y +CONFIG_MPC8272_ADS=y +CONFIG_PQ2FADS=y +CONFIG_EP8248E=y +CONFIG_PQ2ADS=y +CONFIG_8260=y +CONFIG_8272=y +CONFIG_PQ2_ADS_PCI_PIC=y +CONFIG_PPC_83xx=y +CONFIG_MPC831x_RDB=y +CONFIG_MPC832x_MDS=y +CONFIG_MPC832x_RDB=y +CONFIG_MPC834x_MDS=y +CONFIG_MPC834x_ITX=y +CONFIG_MPC836x_MDS=y +CONFIG_MPC836x_RDK=y +CONFIG_MPC837x_MDS=y +CONFIG_MPC837x_RDB=y +CONFIG_SBC834x=y +CONFIG_ASP834x=y +CONFIG_PPC_MPC831x=y +CONFIG_PPC_MPC832x=y +CONFIG_PPC_MPC834x=y +CONFIG_PPC_MPC837x=y +CONFIG_PPC_86xx=y +CONFIG_MPC8641_HPCN=y +CONFIG_SBC8641D=y +CONFIG_MPC8610_HPCD=y +CONFIG_MPC8641=y +CONFIG_MPC8610=y +# CONFIG_EMBEDDED6xx is not set +CONFIG_PPC_NATIVE=y +# CONFIG_UDBG_RTAS_CONSOLE is not set +CONFIG_IPIC=y +CONFIG_MPIC=y +# CONFIG_MPIC_WEIRD is not set +CONFIG_PPC_I8259=y +CONFIG_PPC_RTAS=y +# CONFIG_RTAS_ERROR_LOGGING is not set +CONFIG_RTAS_PROC=y +# CONFIG_MMIO_NVRAM is not set +CONFIG_PPC_MPC106=y +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +CONFIG_CPU_FREQ_DEBUG=y +CONFIG_CPU_FREQ_STAT=m +CONFIG_CPU_FREQ_STAT_DETAILS=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=m +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=m +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m + +# +# CPU Frequency drivers +# +CONFIG_CPU_FREQ_PMAC=y +# CONFIG_PPC601_SYNC_FIX is not set +CONFIG_TAU=y +# CONFIG_TAU_INT is not set +CONFIG_TAU_AVERAGE=y +CONFIG_QUICC_ENGINE=y +CONFIG_CPM2=y +CONFIG_PPC_CPM_NEW_BINDING=y +CONFIG_FSL_ULI1575=y +CONFIG_CPM=y +CONFIG_PPC_BESTCOMM=y +CONFIG_PPC_BESTCOMM_ATA=m +CONFIG_PPC_BESTCOMM_FEC=m +CONFIG_PPC_BESTCOMM_GEN_BD=m + +# +# Kernel options +# +CONFIG_HIGHMEM=y +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +# CONFIG_SCHED_HRTICK is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_MATH_EMULATION is not set +# CONFIG_IOMMU_HELPER is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_HAS_WALK_MEMORY=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_KEXEC is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +CONFIG_RESOURCES_64BIT=y +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y +CONFIG_VIRT_TO_BUS=y +CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_EXTRA_TARGETS="" +CONFIG_ARCH_WANTS_FREEZER_CONTROL=y +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_VERBOSE is not set +CONFIG_CAN_PM_TRACE=y +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_APM_EMULATION=y +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_ISA=y +CONFIG_ZONE_DMA=y +CONFIG_GENERIC_ISA_DMA=y +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_FSL_SOC=y +CONFIG_FSL_PCI=y +CONFIG_FSL_LBC=y +CONFIG_FSL_GTM=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y +CONFIG_PCI_8260=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +CONFIG_PD6729=m +CONFIG_I82092=m +CONFIG_I82365=m +# CONFIG_TCIC is not set +CONFIG_PCMCIA_PROBE=y +CONFIG_PCCARD_NONSTATIC=y +# CONFIG_HOTPLUG_PCI is not set +CONFIG_HAS_RAPIDIO=y +# CONFIG_RAPIDIO is not set + +# +# Advanced setup +# +CONFIG_ADVANCED_OPTIONS=y +# CONFIG_LOWMEM_SIZE_BOOL is not set +CONFIG_LOWMEM_SIZE=0x30000000 +# CONFIG_PAGE_OFFSET_BOOL is not set +CONFIG_PAGE_OFFSET=0xc0000000 +# CONFIG_KERNEL_START_BOOL is not set +CONFIG_KERNEL_START=0xc0000000 +CONFIG_PHYSICAL_START=0x00000000 +# CONFIG_TASK_SIZE_BOOL is not set +CONFIG_TASK_SIZE=0xc0000000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +CONFIG_PACKET_MMAP=y +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=y +CONFIG_XFRM_SUB_POLICY=y +CONFIG_XFRM_MIGRATE=y +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=m +CONFIG_NET_KEY_MIGRATE=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_IPCOMP=m +CONFIG_INET_XFRM_TUNNEL=m +CONFIG_INET_TUNNEL=m +CONFIG_INET_XFRM_MODE_TRANSPORT=m +CONFIG_INET_XFRM_MODE_TUNNEL=m +CONFIG_INET_XFRM_MODE_BEET=m +CONFIG_INET_LRO=y +CONFIG_INET_DIAG=m +CONFIG_INET_TCP_DIAG=m +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_BIC=m +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_CONG_WESTWOOD=m +CONFIG_TCP_CONG_HTCP=m +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_VEGAS=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_TCP_MD5SIG=y +# CONFIG_IP_VS is not set +CONFIG_IPV6=m +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_INET6_XFRM_TUNNEL=m +CONFIG_INET6_TUNNEL=m +CONFIG_INET6_XFRM_MODE_TRANSPORT=m +CONFIG_INET6_XFRM_MODE_TUNNEL=m +CONFIG_INET6_XFRM_MODE_BEET=m +CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_NDISC_NODETYPE=y +CONFIG_IPV6_TUNNEL=m +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_NETLABEL=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +CONFIG_NETFILTER_ADVANCED=y +CONFIG_BRIDGE_NETFILTER=y + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CT_ACCT=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=m +CONFIG_NF_CT_PROTO_GRE=m +CONFIG_NF_CT_PROTO_SCTP=m +CONFIG_NF_CT_PROTO_UDPLITE=m +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NOTRACK=m +CONFIG_NETFILTER_XT_TARGET_RATEEST=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_DCCP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_SCTP=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=m +# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set +CONFIG_IP_NF_QUEUE=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_RECENT=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_LOG=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_NF_NAT_SNMP_BASIC=m +CONFIG_NF_NAT_PROTO_DCCP=m +CONFIG_NF_NAT_PROTO_GRE=m +CONFIG_NF_NAT_PROTO_UDPLITE=m +CONFIG_NF_NAT_PROTO_SCTP=m +CONFIG_NF_NAT_FTP=m +CONFIG_NF_NAT_IRC=m +CONFIG_NF_NAT_TFTP=m +CONFIG_NF_NAT_AMANDA=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +CONFIG_NF_NAT_SIP=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_CLUSTERIP=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_IP6_NF_QUEUE=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_RAW=m + +# +# DECnet: Netfilter Configuration +# +# CONFIG_DECNET_NF_GRABULATOR is not set + +# +# Bridge: Netfilter Configuration +# +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_ULOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_IP_DCCP=m +CONFIG_INET_DCCP_DIAG=m +CONFIG_IP_DCCP_ACKVEC=y + +# +# DCCP CCIDs Configuration (EXPERIMENTAL) +# +CONFIG_IP_DCCP_CCID2=m +# CONFIG_IP_DCCP_CCID2_DEBUG is not set +CONFIG_IP_DCCP_CCID3=m +# CONFIG_IP_DCCP_CCID3_DEBUG is not set +CONFIG_IP_DCCP_CCID3_RTO=100 +CONFIG_IP_DCCP_TFRC_LIB=m + +# +# DCCP Kernel Hacking +# +# CONFIG_IP_DCCP_DEBUG is not set +CONFIG_NET_DCCPPROBE=m +CONFIG_IP_SCTP=m +# CONFIG_SCTP_DBG_MSG is not set +# CONFIG_SCTP_DBG_OBJCNT is not set +# CONFIG_SCTP_HMAC_NONE is not set +# CONFIG_SCTP_HMAC_SHA1 is not set +CONFIG_SCTP_HMAC_MD5=y +CONFIG_TIPC=m +# CONFIG_TIPC_ADVANCED is not set +# CONFIG_TIPC_DEBUG is not set +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +# CONFIG_ATM_CLIP_NO_ICMP is not set +CONFIG_ATM_LANE=m +# CONFIG_ATM_MPOA is not set +CONFIG_ATM_BR2684=m +# CONFIG_ATM_BR2684_IPFILTER is not set +CONFIG_BRIDGE=m +CONFIG_VLAN_8021Q=m +CONFIG_DECNET=m +CONFIG_DECNET_ROUTER=y +CONFIG_LLC=m +# CONFIG_LLC2 is not set +CONFIG_IPX=m +# CONFIG_IPX_INTERN is not set +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +# CONFIG_LTPC is not set +# CONFIG_COPS is not set +CONFIG_IPDDP=m +CONFIG_IPDDP_ENCAP=y +CONFIG_IPDDP_DECAP=y +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +CONFIG_WAN_ROUTER=m +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_CBQ=m +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_ATM=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_DSMARK=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_INGRESS=m + +# +# Classification +# +CONFIG_NET_CLS=y +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_TCINDEX=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_ROUTE=y +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_PERF=y +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_RSVP=m +CONFIG_NET_CLS_RSVP6=m +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_CLS_IND=y +CONFIG_NET_SCH_FIFO=y + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NET_TCPPROBE is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +CONFIG_IRDA=m + +# +# IrDA protocols +# +CONFIG_IRLAN=m +CONFIG_IRNET=m +CONFIG_IRCOMM=m +# CONFIG_IRDA_ULTRA is not set + +# +# IrDA options +# +CONFIG_IRDA_CACHE_LAST_LSAP=y +CONFIG_IRDA_FAST_RR=y +# CONFIG_IRDA_DEBUG is not set + +# +# Infrared-port device drivers +# + +# +# SIR device drivers +# +CONFIG_IRTTY_SIR=m + +# +# Dongle support +# +# CONFIG_DONGLE is not set +CONFIG_KINGSUN_DONGLE=m +CONFIG_KSDAZZLE_DONGLE=m +CONFIG_KS959_DONGLE=m + +# +# FIR device drivers +# +CONFIG_USB_IRDA=m +CONFIG_SIGMATEL_FIR=m +CONFIG_NSC_FIR=m +CONFIG_WINBOND_FIR=m +CONFIG_TOSHIBA_FIR=m +CONFIG_SMC_IRCC_FIR=m +CONFIG_ALI_FIR=m +CONFIG_VLSI_FIR=m +CONFIG_VIA_FIR=m +CONFIG_MCS_FIR=m +CONFIG_BT=m +CONFIG_BT_L2CAP=m +CONFIG_BT_SCO=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=m + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIDTL1=m +CONFIG_BT_HCIBT3C=m +CONFIG_BT_HCIBLUECARD=m +CONFIG_BT_HCIBTUART=m +CONFIG_BT_HCIVHCI=m +# CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y + +# +# Wireless +# +CONFIG_CFG80211=m +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_MAC80211=m +CONFIG_MAC80211_QOS=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_PID=y +CONFIG_MAC80211_RC_DEFAULT_PID=y +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_LEDS=y +CONFIG_MAC80211_DEBUGFS=y +# CONFIG_MAC80211_DEBUG_MENU is not set +CONFIG_IEEE80211=m +CONFIG_IEEE80211_DEBUG=y +CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_CCMP=m +CONFIG_IEEE80211_CRYPT_TKIP=m +# CONFIG_RFKILL is not set +CONFIG_NET_9P=m +CONFIG_NET_9P_VIRTIO=m +# CONFIG_NET_9P_DEBUG is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_DEVRES=y +# CONFIG_SYS_HYPERVISOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y +# CONFIG_MTD is not set +CONFIG_OF_DEVICE=y +CONFIG_OF_GPIO=y +CONFIG_OF_I2C=y +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_SERIAL=m +# CONFIG_PARPORT_PC_FIFO is not set +# CONFIG_PARPORT_PC_SUPERIO is not set +# CONFIG_PARPORT_PC_PCMCIA is not set +# CONFIG_PARPORT_GSC is not set +# CONFIG_PARPORT_AX88796 is not set +CONFIG_PARPORT_1284=y +CONFIG_PARPORT_NOT_PC=y +CONFIG_PNP=y +# CONFIG_PNP_DEBUG is not set + +# +# Protocols +# +CONFIG_ISAPNP=y +# CONFIG_PNPACPI is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_FD is not set +CONFIG_MAC_FLOPPY=m +# CONFIG_BLK_DEV_XD is not set +# CONFIG_PARIDE is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=m +CONFIG_BLK_DEV_CRYPTOLOOP=m +CONFIG_BLK_DEV_NBD=m +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set +CONFIG_CDROM_PKTCDVD=m +CONFIG_CDROM_PKTCDVD_BUFFERS=8 +# CONFIG_CDROM_PKTCDVD_WCACHE is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_VIRTIO_BLK=m +CONFIG_MISC_DEVICES=y +# CONFIG_PHANTOM is not set +CONFIG_EEPROM_93CX6=m +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_HAVE_IDE=y +CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide/ide.txt for help/info on IDE drives +# +CONFIG_IDE_ATAPI=y +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +CONFIG_IDEDISK_MULTI_MODE=y +# CONFIG_BLK_DEV_IDECS is not set +# CONFIG_BLK_DEV_DELKIN is not set +CONFIG_BLK_DEV_IDECD=m +CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y +# CONFIG_BLK_DEV_IDETAPE is not set +CONFIG_BLK_DEV_IDEFLOPPY=m +# CONFIG_BLK_DEV_IDESCSI is not set +CONFIG_IDE_TASK_IOCTL=y +CONFIG_IDE_PROC_FS=y + +# +# IDE chipset support/bugfixes +# +# CONFIG_IDE_GENERIC is not set +# CONFIG_BLK_DEV_PLATFORM is not set +# CONFIG_BLK_DEV_IDEPNP is not set +CONFIG_BLK_DEV_IDEDMA_SFF=y + +# +# PCI IDE chipsets support +# +CONFIG_BLK_DEV_IDEPCI=y +# CONFIG_IDEPCI_PCIBUS_ORDER is not set +# CONFIG_BLK_DEV_OFFBOARD is not set +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +# CONFIG_BLK_DEV_HPT366 is not set +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT8213 is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SL82C105 is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_BLK_DEV_TC86C001 is not set +CONFIG_BLK_DEV_IDE_PMAC=y +CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y +CONFIG_BLK_DEV_IDEDMA_PMAC=y +CONFIG_BLK_DEV_IDEDMA=y +CONFIG_BLK_DEV_HD_ONLY=y +CONFIG_BLK_DEV_HD=y + +# +# SCSI device support +# +CONFIG_RAID_ATTRS=m +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +CONFIG_SCSI_TGT=m +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +CONFIG_CHR_DEV_OSST=m +CONFIG_BLK_DEV_SR=m +CONFIG_BLK_DEV_SR_VENDOR=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=m +CONFIG_SCSI_ENCLOSURE=m + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +CONFIG_SCSI_MULTI_LUN=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +CONFIG_SCSI_SPI_ATTRS=m +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +CONFIG_SCSI_SRP_ATTRS=m +CONFIG_SCSI_SRP_TGT_ATTRS=y +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_7000FASST is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AHA152X is not set +# CONFIG_SCSI_AHA1542 is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ADVANSYS is not set +# CONFIG_SCSI_IN2000 is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_DTC3280 is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_GENERIC_NCR5380 is not set +# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_PPA is not set +# CONFIG_SCSI_IMM is not set +# CONFIG_SCSI_MVSAS is not set +# CONFIG_SCSI_NCR53C406A is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_SYM53C416 is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_T128 is not set +# CONFIG_SCSI_U14_34F is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set +CONFIG_SCSI_MESH=m +CONFIG_SCSI_MESH_SYNC_RATE=5 +CONFIG_SCSI_MESH_RESET_DELAY_MS=4000 +CONFIG_SCSI_MAC53C94=m +CONFIG_SCSI_SRP=m +CONFIG_SCSI_LOWLEVEL_PCMCIA=y +# CONFIG_PCMCIA_AHA152X is not set +# CONFIG_PCMCIA_FDOMAIN is not set +# CONFIG_PCMCIA_NINJA_SCSI is not set +# CONFIG_PCMCIA_QLOGIC is not set +# CONFIG_PCMCIA_SYM53C500 is not set +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +# CONFIG_SATA_PMP is not set +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_SATA_FSL=m +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +CONFIG_ATA_PIIX=m +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +CONFIG_PDC_ADMA=m +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +CONFIG_ATA_GENERIC=m +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_ISAPNP is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_LEGACY is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +CONFIG_PATA_MPC52xx=m +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +CONFIG_PATA_OPTIDMA=m +# CONFIG_PATA_PCMCIA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_QDI is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +CONFIG_PATA_VIA=m +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_WINBOND_VLB is not set +CONFIG_PATA_PLATFORM=m +CONFIG_PATA_OF_PLATFORM=m +CONFIG_PATA_SCH=m +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_MD_RAID10=m +CONFIG_MD_RAID456=m +CONFIG_MD_RAID5_RESHAPE=y +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_BLK_DEV_DM=m +CONFIG_DM_DEBUG=y +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_MIRROR=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +# CONFIG_DM_DELAY is not set +CONFIG_DM_UEVENT=y +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_OHCI_DEBUG=y +CONFIG_FIREWIRE_SBP2=m +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_MACINTOSH_DRIVERS=y +CONFIG_ADB=y +CONFIG_ADB_CUDA=y +CONFIG_ADB_PMU=y +CONFIG_ADB_PMU_LED=y +CONFIG_ADB_PMU_LED_IDE=y +CONFIG_PMAC_APM_EMU=y +CONFIG_PMAC_MEDIABAY=y +CONFIG_PMAC_BACKLIGHT=y +# CONFIG_PMAC_BACKLIGHT_LEGACY is not set +CONFIG_ADB_MACIO=y +CONFIG_INPUT_ADBHID=y +CONFIG_MAC_EMUMOUSEBTN=y +CONFIG_THERM_WINDTUNNEL=m +CONFIG_THERM_ADT746X=m +CONFIG_WINDFARM=y +# CONFIG_ANSLCD is not set +CONFIG_PMAC_RACKMETER=m +CONFIG_NETDEVICES=y +CONFIG_NETDEVICES_MULTIQUEUE=y +CONFIG_IFB=m +CONFIG_DUMMY=m +CONFIG_BONDING=m +CONFIG_MACVLAN=m +CONFIG_EQUALIZER=m +CONFIG_TUN=m +CONFIG_VETH=m +CONFIG_NET_SB1000=m +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=m + +# +# MII PHY device drivers +# +CONFIG_MARVELL_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_LXT_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_VITESSE_PHY=m +CONFIG_SMSC_PHY=m +CONFIG_BROADCOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_REALTEK_PHY=m +CONFIG_MDIO_BITBANG=y +CONFIG_NET_ETHERNET=y +CONFIG_MII=m +CONFIG_MACE=m +# CONFIG_MACE_AAUI_PORT is not set +CONFIG_BMAC=m +CONFIG_HAPPYMEAL=m +CONFIG_SUNGEM=m +CONFIG_CASSINI=m +CONFIG_NET_VENDOR_3COM=y +# CONFIG_EL1 is not set +# CONFIG_EL2 is not set +# CONFIG_ELPLUS is not set +# CONFIG_EL16 is not set +CONFIG_EL3=m +# CONFIG_3C515 is not set +CONFIG_VORTEX=m +CONFIG_TYPHOON=m +# CONFIG_LANCE is not set +CONFIG_NET_VENDOR_SMC=y +# CONFIG_WD80x3 is not set +CONFIG_ULTRA=m +# CONFIG_SMC9194 is not set +# CONFIG_NET_VENDOR_RACAL is not set +CONFIG_NET_TULIP=y +CONFIG_DE2104X=m +CONFIG_TULIP=m +# CONFIG_TULIP_MWI is not set +CONFIG_TULIP_MMIO=y +# CONFIG_TULIP_NAPI is not set +CONFIG_DE4X5=m +CONFIG_WINBOND_840=m +CONFIG_DM9102=m +CONFIG_ULI526X=m +CONFIG_PCMCIA_XIRCOM=m +# CONFIG_AT1700 is not set +# CONFIG_DEPCA is not set +# CONFIG_HP100 is not set +CONFIG_NET_ISA=y +# CONFIG_E2100 is not set +CONFIG_EWRK3=m +# CONFIG_EEXPRESS is not set +# CONFIG_EEXPRESS_PRO is not set +# CONFIG_HPLAN_PLUS is not set +# CONFIG_HPLAN is not set +# CONFIG_LP486E is not set +# CONFIG_ETH16I is not set +CONFIG_NE2000=m +# CONFIG_ZNET is not set +# CONFIG_SEEQ8005 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +CONFIG_NET_PCI=y +CONFIG_PCNET32=m +CONFIG_AMD8111_ETH=m +CONFIG_AMD8111E_NAPI=y +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_ADAPTEC_STARFIRE_NAPI=y +# CONFIG_AC3200 is not set +# CONFIG_APRICOT is not set +CONFIG_B44=m +CONFIG_B44_PCI_AUTOSELECT=y +CONFIG_B44_PCICORE_AUTOSELECT=y +CONFIG_B44_PCI=y +CONFIG_FORCEDETH=m +CONFIG_FORCEDETH_NAPI=y +# CONFIG_CS89x0 is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=m +CONFIG_FEALNX=m +CONFIG_NATSEMI=m +CONFIG_NE2K_PCI=m +CONFIG_8139CP=m +CONFIG_8139TOO=m +# CONFIG_8139TOO_PIO is not set +# CONFIG_8139TOO_TUNE_TWISTER is not set +CONFIG_8139TOO_8129=y +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R6040=m +CONFIG_SIS900=m +CONFIG_EPIC100=m +CONFIG_SUNDANCE=m +# CONFIG_SUNDANCE_MMIO is not set +CONFIG_TLAN=m +CONFIG_VIA_RHINE=m +CONFIG_VIA_RHINE_MMIO=y +CONFIG_VIA_RHINE_NAPI=y +CONFIG_SC92031=m +CONFIG_NET_POCKET=y +CONFIG_DE600=m +CONFIG_DE620=m +CONFIG_FEC_MPC52xx=m +CONFIG_FEC_MPC52xx_MDIO=y +# CONFIG_FS_ENET is not set +CONFIG_NETDEV_1000=y +CONFIG_ACENIC=m +# CONFIG_ACENIC_OMIT_TIGON_I is not set +CONFIG_DL2K=m +CONFIG_E1000=m +CONFIG_E1000_NAPI=y +# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +CONFIG_E1000E=m +CONFIG_E1000E_ENABLED=y +CONFIG_IP1000=m +CONFIG_IGB=m +CONFIG_NS83820=m +CONFIG_HAMACHI=m +CONFIG_YELLOWFIN=m +CONFIG_R8169=m +CONFIG_R8169_NAPI=y +CONFIG_R8169_VLAN=y +CONFIG_SIS190=m +CONFIG_SKGE=m +# CONFIG_SKGE_DEBUG is not set +CONFIG_SKY2=m +# CONFIG_SKY2_DEBUG is not set +CONFIG_VIA_VELOCITY=m +CONFIG_TIGON3=m +CONFIG_BNX2=m +CONFIG_GIANFAR=m +CONFIG_GFAR_NAPI=y +# CONFIG_UCC_GETH is not set +CONFIG_MV643XX_ETH=m +CONFIG_QLA3XXX=m +CONFIG_ATL1=m +CONFIG_NETDEV_10000=y +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T1_NAPI=y +CONFIG_CHELSIO_T3=m +CONFIG_IXGBE=m +CONFIG_IXGB=m +CONFIG_IXGB_NAPI=y +CONFIG_S2IO=m +CONFIG_S2IO_NAPI=y +CONFIG_MYRI10GE=m +CONFIG_NETXEN_NIC=m +CONFIG_NIU=m +# CONFIG_MLX4_CORE is not set +CONFIG_TEHUTI=m +CONFIG_BNX2X=m +CONFIG_SFC=m +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_AX8817X=m +CONFIG_USB_NET_CDCETHER=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_NET1080=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_USB_NET_CDC_SUBSET=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_ZAURUS=m +CONFIG_NET_PCMCIA=y +CONFIG_PCMCIA_3C589=m +CONFIG_PCMCIA_3C574=m +CONFIG_PCMCIA_FMVJ18X=m +CONFIG_PCMCIA_PCNET=m +CONFIG_PCMCIA_NMCLAN=m +CONFIG_PCMCIA_SMC91C92=m +CONFIG_PCMCIA_XIRC2PS=m +CONFIG_PCMCIA_AXNET=m +# CONFIG_WAN is not set +CONFIG_ATM_DRIVERS=y +# CONFIG_ATM_DUMMY is not set +CONFIG_ATM_TCP=m +CONFIG_ATM_LANAI=m +CONFIG_ATM_ENI=m +# CONFIG_ATM_ENI_DEBUG is not set +# CONFIG_ATM_ENI_TUNE_BURST is not set +# CONFIG_ATM_FIRESTREAM is not set +# CONFIG_ATM_ZATM is not set +CONFIG_ATM_NICSTAR=m +# CONFIG_ATM_NICSTAR_USE_SUNI is not set +# CONFIG_ATM_NICSTAR_USE_IDT77105 is not set +CONFIG_ATM_IDT77252=m +# CONFIG_ATM_IDT77252_DEBUG is not set +# CONFIG_ATM_IDT77252_RCV_ALL is not set +CONFIG_ATM_IDT77252_USE_SUNI=y +# CONFIG_ATM_AMBASSADOR is not set +# CONFIG_ATM_HORIZON is not set +# CONFIG_ATM_IA is not set +CONFIG_ATM_FORE200E_MAYBE=m +# CONFIG_ATM_FORE200E_PCA is not set +CONFIG_ATM_HE=m +# CONFIG_ATM_HE_USE_SUNI is not set +CONFIG_FDDI=y +# CONFIG_DEFXX is not set +CONFIG_SKFP=m +# CONFIG_HIPPI is not set +CONFIG_PLIP=m +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +CONFIG_PPP_MPPE=m +CONFIG_PPPOE=m +CONFIG_PPPOATM=m +CONFIG_PPPOL2TP=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLHC=m +CONFIG_SLIP_SMART=y +# CONFIG_SLIP_MODE_SLIP6 is not set +CONFIG_NET_FC=y +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NETPOLL=y +CONFIG_NETPOLL_TRAP=y +CONFIG_NET_POLL_CONTROLLER=y +CONFIG_VIRTIO_NET=m +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=m + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GPIO is not set +CONFIG_INPUT_MOUSE=y +CONFIG_MOUSE_PS2=y +CONFIG_MOUSE_PS2_ALPS=y +CONFIG_MOUSE_PS2_LOGIPS2PP=y +CONFIG_MOUSE_PS2_SYNAPTICS=y +CONFIG_MOUSE_PS2_LIFEBOOK=y +CONFIG_MOUSE_PS2_TRACKPOINT=y +# CONFIG_MOUSE_PS2_TOUCHKIT is not set +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_APPLETOUCH=m +# CONFIG_MOUSE_INPORT is not set +# CONFIG_MOUSE_LOGIBM is not set +# CONFIG_MOUSE_PC110PAD is not set +CONFIG_MOUSE_VSXXXAA=m +# CONFIG_MOUSE_GPIO is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=y +CONFIG_JOYSTICK_IFORCE_232=y +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_GTCO=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_WACOM=m +# CONFIG_INPUT_TOUCHSCREEN is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_PCSPKR=m +CONFIG_INPUT_ATI_REMOTE=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_YEALINK=m +CONFIG_INPUT_UINPUT=m + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PARKBD is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +CONFIG_SERIO_RAW=m +CONFIG_GAMEPORT=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m +CONFIG_INPUT_LIRC=y +CONFIG_LIRC_DEV=m +CONFIG_LIRC_ATIUSB=m +CONFIG_LIRC_BT829=m +CONFIG_LIRC_CMDIR=m +CONFIG_LIRC_I2C=m +CONFIG_LIRC_IGORPLUGUSB=m +CONFIG_LIRC_IMON=m +CONFIG_LIRC_IT87=m +CONFIG_LIRC_MCEUSB=m +CONFIG_LIRC_MCEUSB2=m +CONFIG_LIRC_PVR150=m +CONFIG_LIRC_PARALLEL=m +CONFIG_LIRC_SERIAL=m +CONFIG_LIRC_SIR=m +CONFIG_LIRC_STREAMZAP=m +CONFIG_LIRC_TTUSBIR=m + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_DEVKMEM is not set +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +CONFIG_ROCKETPORT=m +CONFIG_CYCLADES=m +# CONFIG_CYZ_INTR is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_ESPSERIAL is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +CONFIG_SYNCLINK=m +CONFIG_SYNCLINKMP=m +CONFIG_SYNCLINK_GT=m +CONFIG_N_HDLC=m +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +CONFIG_NOZOMI=m + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIAL_8250_CS=m +CONFIG_SERIAL_8250_NR_UARTS=32 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +# CONFIG_SERIAL_8250_FOURPORT is not set +# CONFIG_SERIAL_8250_ACCENT is not set +# CONFIG_SERIAL_8250_BOCA is not set +# CONFIG_SERIAL_8250_EXAR_ST16C554 is not set +# CONFIG_SERIAL_8250_HUB6 is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_UARTLITE=m +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_PMACZILOG=m +# CONFIG_SERIAL_PMACZILOG_TTYS is not set +# CONFIG_SERIAL_CPM is not set +CONFIG_SERIAL_MPC52xx=y +CONFIG_SERIAL_MPC52xx_CONSOLE=y +CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200 +CONFIG_SERIAL_JSM=m +CONFIG_SERIAL_OF_PLATFORM=y +# CONFIG_SERIAL_QE is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_LEGACY_PTYS is not set +# CONFIG_CRASH is not set +CONFIG_BRIQ_PANEL=m +CONFIG_PRINTER=m +CONFIG_LP_CONSOLE=y +CONFIG_PPDEV=m +# CONFIG_HVC_RTAS is not set +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_NVRAM=y +CONFIG_DTLK=m +CONFIG_R3964=m +# CONFIG_APPLICOM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +CONFIG_CARDMAN_4000=m +CONFIG_CARDMAN_4040=m +CONFIG_IPWIRELESS=m +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_ALGOPCA=m + +# +# I2C Hardware Bus support +# + +# +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# +# Mac SMBus host controller drivers +# +CONFIG_I2C_HYDRA=m +CONFIG_I2C_POWERMAC=y + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_CPM is not set +# CONFIG_I2C_GPIO is not set +CONFIG_I2C_MPC=m +# CONFIG_I2C_OCORES is not set +CONFIG_I2C_SIMTEC=m + +# +# External I2C/SMBus adapter drivers +# +CONFIG_I2C_PARPORT=m +CONFIG_I2C_PARPORT_LIGHT=m +# CONFIG_I2C_TAOS_EVM is not set +CONFIG_I2C_TINY_USB=m + +# +# Graphics adapter I2C/DDC channel drivers +# +CONFIG_I2C_VOODOO3=m + +# +# Other I2C/SMBus bus drivers +# +# CONFIG_I2C_ELEKTOR is not set +CONFIG_I2C_PCA_ISA=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_STUB=m + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +CONFIG_AT24=m +CONFIG_SENSORS_EEPROM=m +CONFIG_SENSORS_PCF8574=m +CONFIG_PCF8575=m +CONFIG_SENSORS_PCA9539=m +CONFIG_SENSORS_PCF8591=m +# CONFIG_TPS65010 is not set +CONFIG_SENSORS_MAX6875=m +CONFIG_SENSORS_TSL2550=m +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +CONFIG_HAVE_GPIO_LIB=y + +# +# GPIO Support +# +# CONFIG_DEBUG_GPIO is not set + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# SPI GPIO expanders: +# +CONFIG_W1=m +CONFIG_W1_CON=y + +# +# 1-wire Bus Masters +# +# CONFIG_W1_MASTER_MATROX is not set +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +# CONFIG_W1_MASTER_GPIO is not set + +# +# 1-wire Slaves +# +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_DS2433=m +CONFIG_W1_SLAVE_DS2433_CRC=y +CONFIG_W1_SLAVE_DS2760=m +CONFIG_POWER_SUPPLY=m +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +CONFIG_APM_POWER=m +# CONFIG_BATTERY_DS2760 is not set +CONFIG_BATTERY_PMU=m +CONFIG_HWMON=m +CONFIG_HWMON_VID=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1021=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7473=m +CONFIG_SENSORS_AMS=m +CONFIG_SENSORS_AMS_PMU=y +CONFIG_SENSORS_AMS_I2C=y +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_DS1621=m +# CONFIG_SENSORS_I5K_AMB is not set +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +CONFIG_SOFT_WATCHDOG=m +# CONFIG_MPC5200_WDT is not set +CONFIG_83xx_WDT=m +CONFIG_WATCHDOG_RTAS=m + +# +# ISA-based Watchdog Cards +# +# CONFIG_PCWATCHDOG is not set +# CONFIG_MIXCOMWD is not set +# CONFIG_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +CONFIG_USBPCWATCHDOG=m + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +CONFIG_SSB=m +CONFIG_SSB_SPROM=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +# CONFIG_SSB_B43_PCI_BRIDGE is not set +CONFIG_SSB_PCMCIAHOST_POSSIBLE=y +CONFIG_SSB_PCMCIAHOST=y +# CONFIG_SSB_DEBUG is not set +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_DRIVER_PCICORE=y + +# +# Multifunction device drivers +# +CONFIG_MFD_SM501=m +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=m +CONFIG_VIDEO_V4L2_COMMON=m +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +CONFIG_DVB_CORE=m +CONFIG_VIDEO_MEDIA=m + +# +# Multimedia drivers +# +CONFIG_VIDEO_SAA7146=m +CONFIG_VIDEO_SAA7146_VV=m +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_TUNER=m +# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set +CONFIG_MEDIA_TUNER_SIMPLE=m +CONFIG_MEDIA_TUNER_TDA8290=m +CONFIG_MEDIA_TUNER_TDA827X=m +CONFIG_MEDIA_TUNER_TDA18271=m +CONFIG_MEDIA_TUNER_TDA9887=m +CONFIG_MEDIA_TUNER_TEA5761=m +CONFIG_MEDIA_TUNER_TEA5767=m +CONFIG_MEDIA_TUNER_MT20XX=m +CONFIG_MEDIA_TUNER_MT2060=m +CONFIG_MEDIA_TUNER_MT2266=m +CONFIG_MEDIA_TUNER_MT2131=m +CONFIG_MEDIA_TUNER_QT1010=m +CONFIG_MEDIA_TUNER_XC2028=m +CONFIG_MEDIA_TUNER_XC5000=m +CONFIG_MEDIA_TUNER_MXL5005S=m +CONFIG_VIDEO_V4L2=m +CONFIG_VIDEO_V4L1=m +CONFIG_VIDEOBUF_GEN=m +CONFIG_VIDEOBUF_DMA_SG=m +CONFIG_VIDEOBUF_VMALLOC=m +CONFIG_VIDEOBUF_DVB=m +CONFIG_VIDEO_BTCX=m +CONFIG_VIDEO_IR_I2C=m +CONFIG_VIDEO_IR=m +CONFIG_VIDEO_TVEEPROM=m +CONFIG_VIDEO_TUNER=m +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set + +# +# Encoders/decoders and other helper chips +# + +# +# Audio decoders +# +CONFIG_VIDEO_TVAUDIO=m +CONFIG_VIDEO_TDA7432=m +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TDA9875=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS5345=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_M52790=m +CONFIG_VIDEO_TLV320AIC23B=m +CONFIG_VIDEO_WM8775=m +CONFIG_VIDEO_WM8739=m +CONFIG_VIDEO_VP27SMPX=m + +# +# Video decoders +# +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_BT866=m +CONFIG_VIDEO_KS0127=m +CONFIG_VIDEO_OV7670=m +CONFIG_VIDEO_TCM825X=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_SAA7111=m +CONFIG_VIDEO_SAA7114=m +CONFIG_VIDEO_SAA711X=m +CONFIG_VIDEO_SAA717X=m +CONFIG_VIDEO_SAA7191=m +CONFIG_VIDEO_TVP5150=m +CONFIG_VIDEO_VPX3220=m + +# +# Video and audio decoders +# +CONFIG_VIDEO_CX25840=m + +# +# MPEG video encoders +# +CONFIG_VIDEO_CX2341X=m + +# +# Video encoders +# +CONFIG_VIDEO_SAA7127=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m + +# +# Video improvement chips +# +CONFIG_VIDEO_UPD64031A=m +CONFIG_VIDEO_UPD64083=m +# CONFIG_VIDEO_VIVI is not set +CONFIG_VIDEO_BT848=m +CONFIG_VIDEO_BT848_DVB=y +CONFIG_VIDEO_SAA6588=m +# CONFIG_VIDEO_PMS is not set +CONFIG_VIDEO_BWQCAM=m +CONFIG_VIDEO_CQCAM=m +CONFIG_VIDEO_W9966=m +CONFIG_VIDEO_CPIA=m +CONFIG_VIDEO_CPIA_PP=m +CONFIG_VIDEO_CPIA_USB=m +CONFIG_VIDEO_CPIA2=m +CONFIG_VIDEO_SAA5246A=m +CONFIG_VIDEO_SAA5249=m +CONFIG_TUNER_3036=m +# CONFIG_VIDEO_STRADIS is not set +# CONFIG_VIDEO_ZORAN is not set +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_MXB=m +CONFIG_VIDEO_DPC=m +CONFIG_VIDEO_HEXIUM_ORION=m +CONFIG_VIDEO_HEXIUM_GEMINI=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +CONFIG_VIDEO_CX88_VP3054=m +CONFIG_VIDEO_CX23885=m +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_FB_IVTV=m +CONFIG_VIDEO_CX18=m +# CONFIG_VIDEO_CAFE_CCIC is not set +CONFIG_V4L_USB_DRIVERS=y +CONFIG_USB_VIDEO_CLASS=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_PVRUSB2_SYSFS=y +CONFIG_VIDEO_PVRUSB2_DVB=y +# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_VIDEO_USBVISION=m +CONFIG_VIDEO_USBVIDEO=m +CONFIG_USB_VICAM=m +CONFIG_USB_IBMCAM=m +CONFIG_USB_KONICAWC=m +CONFIG_USB_QUICKCAM_MESSENGER=m +CONFIG_USB_ET61X251=m +CONFIG_VIDEO_OVCAMCHIP=m +CONFIG_USB_W9968CF=m +CONFIG_USB_OV511=m +CONFIG_USB_SE401=m +CONFIG_USB_SN9C102=m +CONFIG_USB_STV680=m +CONFIG_USB_ZC0301=m +CONFIG_USB_PWC=m +# CONFIG_USB_PWC_DEBUG is not set +CONFIG_USB_ZR364XX=m +CONFIG_USB_STKWEBCAM=m +CONFIG_SOC_CAMERA=m +CONFIG_SOC_CAMERA_MT9M001=m +# CONFIG_MT9M001_PCA9536_SWITCH is not set +CONFIG_SOC_CAMERA_MT9V022=m +# CONFIG_MT9V022_PCA9536_SWITCH is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_RADIO_CADET is not set +# CONFIG_RADIO_RTRACK is not set +# CONFIG_RADIO_RTRACK2 is not set +# CONFIG_RADIO_AZTECH is not set +# CONFIG_RADIO_GEMTEK is not set +CONFIG_RADIO_GEMTEK_PCI=m +CONFIG_RADIO_MAXIRADIO=m +CONFIG_RADIO_MAESTRO=m +# CONFIG_RADIO_SF16FMI is not set +# CONFIG_RADIO_SF16FMR2 is not set +# CONFIG_RADIO_TERRATEC is not set +# CONFIG_RADIO_TRUST is not set +# CONFIG_RADIO_TYPHOON is not set +# CONFIG_RADIO_ZOLTRIX is not set +CONFIG_USB_DSBR=m +CONFIG_USB_SI470X=m +CONFIG_DVB_CAPTURE_DRIVERS=y + +# +# Supported SAA7146 based PCI Adapters +# +CONFIG_TTPCI_EEPROM=m +CONFIG_DVB_AV7110=m +CONFIG_DVB_AV7110_OSD=y +CONFIG_DVB_BUDGET_CORE=m +CONFIG_DVB_BUDGET=m +CONFIG_DVB_BUDGET_CI=m +CONFIG_DVB_BUDGET_AV=m +CONFIG_DVB_BUDGET_PATCH=m + +# +# Supported USB Adapters +# +CONFIG_DVB_USB=m +# CONFIG_DVB_USB_DEBUG is not set +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_DIBUSB_MB=m +# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_CXUSB=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_VP7045=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_DVB_CINERGYT2=m +CONFIG_DVB_CINERGYT2_TUNING=y +CONFIG_DVB_CINERGYT2_STREAM_URB_COUNT=32 +CONFIG_DVB_CINERGYT2_STREAM_BUF_SIZE=512 +CONFIG_DVB_CINERGYT2_QUERY_INTERVAL=250 +CONFIG_DVB_CINERGYT2_ENABLE_RC_INPUT_DEVICE=y +CONFIG_DVB_CINERGYT2_RC_QUERY_INTERVAL=100 + +# +# Supported FlexCopII (B2C2) Adapters +# +CONFIG_DVB_B2C2_FLEXCOP=m +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +# CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set + +# +# Supported BT878 Adapters +# +CONFIG_DVB_BT8XX=m + +# +# Supported Pluto2 Adapters +# +CONFIG_DVB_PLUTO2=m + +# +# Supported DVB Frontends +# + +# +# Customise DVB Frontends +# +# CONFIG_DVB_FE_CUSTOMISE is not set + +# +# DVB-S (satellite) frontends +# +CONFIG_DVB_CX24110=m +CONFIG_DVB_CX24123=m +CONFIG_DVB_MT312=m +CONFIG_DVB_S5H1420=m +CONFIG_DVB_STV0299=m +CONFIG_DVB_TDA8083=m +CONFIG_DVB_TDA10086=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_TUNER_ITD1000=m +CONFIG_DVB_TDA826X=m +CONFIG_DVB_TUA6100=m + +# +# DVB-T (terrestrial) frontends +# +CONFIG_DVB_SP8870=m +CONFIG_DVB_SP887X=m +CONFIG_DVB_CX22700=m +CONFIG_DVB_CX22702=m +CONFIG_DVB_L64781=m +CONFIG_DVB_TDA1004X=m +CONFIG_DVB_NXT6000=m +CONFIG_DVB_MT352=m +CONFIG_DVB_ZL10353=m +CONFIG_DVB_DIB3000MB=m +CONFIG_DVB_DIB3000MC=m +CONFIG_DVB_DIB7000M=m +CONFIG_DVB_DIB7000P=m +CONFIG_DVB_TDA10048=m + +# +# DVB-C (cable) frontends +# +CONFIG_DVB_VES1820=m +CONFIG_DVB_TDA10021=m +CONFIG_DVB_TDA10023=m +CONFIG_DVB_STV0297=m + +# +# ATSC (North American/Korean Terrestrial/Cable DTV) frontends +# +CONFIG_DVB_NXT200X=m +CONFIG_DVB_OR51211=m +CONFIG_DVB_OR51132=m +CONFIG_DVB_BCM3510=m +CONFIG_DVB_LGDT330X=m +CONFIG_DVB_S5H1409=m +CONFIG_DVB_AU8522=m +CONFIG_DVB_S5H1411=m + +# +# Digital terrestrial only tuners/PLL +# +CONFIG_DVB_PLL=m +CONFIG_DVB_TUNER_DIB0070=m + +# +# SEC control devices for DVB-S +# +CONFIG_DVB_LNBP21=m +CONFIG_DVB_ISL6405=m +CONFIG_DVB_ISL6421=m +CONFIG_DAB=y +CONFIG_USB_DABUSB=m + +# +# Graphics support +# +CONFIG_AGP=y +CONFIG_AGP_UNINORTH=y +CONFIG_DRM=m +CONFIG_DRM_TDFX=m +CONFIG_DRM_R128=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_MGA=m +CONFIG_DRM_SIS=m +CONFIG_DRM_VIA=m +CONFIG_DRM_SAVAGE=m +CONFIG_VGASTATE=y +CONFIG_VIDEO_OUTPUT_CONTROL=m +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_DDC=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_SVGALIB=m +CONFIG_FB_MACMODES=y +CONFIG_FB_BACKLIGHT=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +CONFIG_FB_CIRRUS=m +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +CONFIG_FB_OF=y +# CONFIG_FB_CONTROL is not set +CONFIG_FB_PLATINUM=y +CONFIG_FB_VALKYRIE=y +CONFIG_FB_CT65550=y +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_NVIDIA=y +CONFIG_FB_NVIDIA_I2C=y +# CONFIG_FB_NVIDIA_DEBUG is not set +CONFIG_FB_NVIDIA_BACKLIGHT=y +CONFIG_FB_RIVA=m +# CONFIG_FB_RIVA_I2C is not set +# CONFIG_FB_RIVA_DEBUG is not set +CONFIG_FB_RIVA_BACKLIGHT=y +CONFIG_FB_MATROX=y +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_MATROX_MULTIHEAD=y +CONFIG_FB_RADEON=y +CONFIG_FB_RADEON_I2C=y +CONFIG_FB_RADEON_BACKLIGHT=y +# CONFIG_FB_RADEON_DEBUG is not set +CONFIG_FB_ATY128=y +CONFIG_FB_ATY128_BACKLIGHT=y +CONFIG_FB_ATY=y +CONFIG_FB_ATY_CT=y +CONFIG_FB_ATY_GENERIC_LCD=y +CONFIG_FB_ATY_GX=y +CONFIG_FB_ATY_BACKLIGHT=y +CONFIG_FB_S3=m +CONFIG_FB_SAVAGE=m +CONFIG_FB_SAVAGE_I2C=y +CONFIG_FB_SAVAGE_ACCEL=y +# CONFIG_FB_SIS is not set +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_KYRO=m +CONFIG_FB_3DFX=m +CONFIG_FB_3DFX_ACCEL=y +CONFIG_FB_VOODOO1=m +# CONFIG_FB_VT8623 is not set +CONFIG_FB_TRIDENT=m +CONFIG_FB_TRIDENT_ACCEL=y +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_FSL_DIU is not set +CONFIG_FB_SM501=m +CONFIG_FB_IBM_GXT4500=y +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=m + +# +# Display hardware drivers +# + +# +# Console display driver support +# +CONFIG_VGA_CONSOLE=y +CONFIG_VGACON_SOFT_SCROLLBACK=y +CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 +# CONFIG_MDA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_TIMER=m +CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_DYNAMIC_MINORS=y +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_VERBOSE_PROCFS=y +CONFIG_SND_VERBOSE_PRINTK=y +CONFIG_SND_DEBUG=y +CONFIG_SND_DEBUG_VERBOSE=y +CONFIG_SND_PCM_XRUN_DEBUG=y +CONFIG_SND_VMASTER=y +CONFIG_SND_MPU401_UART=m +CONFIG_SND_OPL3_LIB=m +CONFIG_SND_VX_LIB=m +CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y +CONFIG_SND_DUMMY=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_MPU401=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AC97_POWER_SAVE_DEFAULT=5 +CONFIG_SND_SB_COMMON=m +CONFIG_SND_SB16_DSP=m +CONFIG_SND_ISA=y +# CONFIG_SND_ADLIB is not set +# CONFIG_SND_AD1816A is not set +# CONFIG_SND_AD1848 is not set +# CONFIG_SND_ALS100 is not set +# CONFIG_SND_AZT2320 is not set +# CONFIG_SND_CMI8330 is not set +# CONFIG_SND_CS4231 is not set +# CONFIG_SND_CS4232 is not set +# CONFIG_SND_CS4236 is not set +# CONFIG_SND_DT019X is not set +# CONFIG_SND_ES968 is not set +# CONFIG_SND_ES1688 is not set +# CONFIG_SND_ES18XX is not set +# CONFIG_SND_SC6000 is not set +# CONFIG_SND_GUSCLASSIC is not set +# CONFIG_SND_GUSEXTREME is not set +# CONFIG_SND_GUSMAX is not set +# CONFIG_SND_INTERWAVE is not set +# CONFIG_SND_INTERWAVE_STB is not set +# CONFIG_SND_OPL3SA2 is not set +# CONFIG_SND_OPTI92X_AD1848 is not set +# CONFIG_SND_OPTI92X_CS4231 is not set +# CONFIG_SND_OPTI93X is not set +# CONFIG_SND_MIRO is not set +# CONFIG_SND_SB8 is not set +# CONFIG_SND_SB16 is not set +# CONFIG_SND_SBAWE is not set +# CONFIG_SND_SGALAXY is not set +# CONFIG_SND_SSCAPE is not set +# CONFIG_SND_WAVEFRONT is not set +CONFIG_SND_PCI=y +CONFIG_SND_AD1889=m +CONFIG_SND_ALS300=m +CONFIG_SND_ALS4000=m +CONFIG_SND_ALI5451=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_AZT3328=m +CONFIG_SND_BT87X=m +# CONFIG_SND_BT87X_OVERCLOCK is not set +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN_LIB=m +CONFIG_SND_OXYGEN=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CS46XX_NEW_DSP=y +CONFIG_SND_CS5530=m +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_EMU10K1=m +CONFIG_SND_EMU10K1X=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_ES1938=m +CONFIG_SND_ES1968=m +CONFIG_SND_FM801=m +CONFIG_SND_FM801_TEA575X_BOOL=y +CONFIG_SND_FM801_TEA575X=m +# CONFIG_SND_HDA_INTEL is not set +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_HIFIER=m +CONFIG_SND_ICE1712=m +CONFIG_SND_ICE1724=m +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +CONFIG_SND_KORG1212=m +CONFIG_SND_MAESTRO3=m +CONFIG_SND_MIXART=m +CONFIG_SND_NM256=m +CONFIG_SND_PCXHR=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_SONICVIBES=m +CONFIG_SND_TRIDENT=m +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +# CONFIG_SND_YMFPCI is not set +CONFIG_SND_PPC=y +CONFIG_SND_POWERMAC=m +CONFIG_SND_POWERMAC_AUTO_DRC=y +CONFIG_SND_AOA=m +CONFIG_SND_AOA_FABRIC_LAYOUT=m +CONFIG_SND_AOA_ONYX=m +CONFIG_SND_AOA_TAS=m +CONFIG_SND_AOA_TOONIE=m +CONFIG_SND_AOA_SOUNDBUS=m +CONFIG_SND_AOA_SOUNDBUS_I2S=m +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_USX2Y=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +# CONFIG_SND_PCMCIA is not set +# CONFIG_SND_SOC is not set +# CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=m +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +CONFIG_HID_DEBUG=y +CONFIG_HIDRAW=y + +# +# USB Input Devices +# +CONFIG_USB_HID=y +CONFIG_USB_HIDINPUT_POWERBOOK=y +CONFIG_HID_FF=y +CONFIG_HID_PID=y +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_PANTHERLORD_FF=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_ZEROPLUS_FF=y +CONFIG_USB_HIDDEV=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_DEVICE_CLASS is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_FSL=y +CONFIG_USB_EHCI_HCD_PPC_OF=y +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=m +CONFIG_USB_OHCI_HCD_PPC_SOC=y +CONFIG_USB_OHCI_HCD_PPC_OF=y +CONFIG_USB_OHCI_HCD_PPC_OF_BE=y +CONFIG_USB_OHCI_HCD_PPC_OF_LE=y +CONFIG_USB_OHCI_HCD_PCI=y +# CONFIG_USB_OHCI_HCD_SSB is not set +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +CONFIG_USB_UHCI_HCD=m +CONFIG_USB_U132_HCD=m +CONFIG_USB_SL811_HCD=m +# CONFIG_USB_SL811_CS is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +CONFIG_USB_ACM=m +CONFIG_USB_PRINTER=m +CONFIG_USB_WDM=m + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=m +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +# CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +CONFIG_USB_STORAGE_ONETOUCH=y +CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_STORAGE_CYPRESS_ATACB=y +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USB_MON=y + +# +# USB port drivers +# +CONFIG_USB_USS720=m +CONFIG_USB_SERIAL=m +CONFIG_USB_EZUSB=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_AIRPRIME=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP2101=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_FUNSOFT=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +# CONFIG_USB_SERIAL_GARMIN is not set +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MOTOROLA=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_HP4X=m +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SAFE_PADDED=y +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_XIRCOM=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_DEBUG=m + +# +# USB Miscellaneous drivers +# +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_AUERSWALD=m +# CONFIG_USB_RIO500 is not set +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_BERRY_CHARGE=m +CONFIG_USB_LED=m +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +CONFIG_USB_PHIDGET=m +CONFIG_USB_PHIDGETKIT=m +CONFIG_USB_PHIDGETMOTORCONTROL=m +CONFIG_USB_PHIDGETSERVO=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_APPLEDISPLAY=m +CONFIG_USB_SISUSBVGA=m +CONFIG_USB_SISUSBVGA_CON=y +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +# CONFIG_USB_TEST is not set +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_CXACRU=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_XUSBATM=m +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y + +# +# LED drivers +# +# CONFIG_LEDS_GPIO is not set + +# +# LED Triggers +# +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_IDE_DISK=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_ACCESSIBILITY=y +CONFIG_A11Y_BRAILLE_CONSOLE=y +# CONFIG_INFINIBAND is not set +CONFIG_EDAC=y + +# +# Reporting subsystems +# +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_MM_EDAC=m +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_FM3130=m + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +CONFIG_RTC_DRV_CMOS=y +CONFIG_RTC_DRV_DS1511=m +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_STK17TA8=m +# CONFIG_RTC_DRV_M48T86 is not set +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_V3020=m + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_PPC=y +CONFIG_DMADEVICES=y + +# +# DMA Devices +# +# CONFIG_FSL_DMA is not set +CONFIG_AUXDISPLAY=y +CONFIG_KS0108=m +CONFIG_KS0108_PORT=0x378 +CONFIG_KS0108_DELAY=2 +CONFIG_UIO=m +CONFIG_UIO_CIF=m +CONFIG_UIO_SMX=m + +# +# File systems +# +CONFIG_EXT2_FS=m +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +CONFIG_EXT2_FS_XIP=y +CONFIG_FS_XIP=y +CONFIG_EXT3_FS=m +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXT4DEV_FS=m +CONFIG_EXT4DEV_FS_XATTR=y +CONFIG_EXT4DEV_FS_POSIX_ACL=y +CONFIG_EXT4DEV_FS_SECURITY=y +CONFIG_JBD=m +# CONFIG_JBD_DEBUG is not set +CONFIG_JBD2=m +CONFIG_JBD2_DEBUG=y +CONFIG_FS_MBCACHE=m +CONFIG_REISERFS_FS=m +# CONFIG_REISERFS_CHECK is not set +CONFIG_REISERFS_PROC_INFO=y +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +# CONFIG_JFS_DEBUG is not set +# CONFIG_JFS_STATISTICS is not set +CONFIG_FS_POSIX_ACL=y +CONFIG_XFS_FS=m +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=m +CONFIG_OCFS2_FS=m +CONFIG_OCFS2_FS_O2CB=m +CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m +# CONFIG_OCFS2_DEBUG_MASKLOG is not set +# CONFIG_OCFS2_DEBUG_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y +CONFIG_AUTOFS_FS=m +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=m +CONFIG_GENERIC_ACL=y + +# +# CD-ROM/DVD Filesystems +# +CONFIG_ISO9660_FS=y +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_UDF_NLS=y + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="ascii" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_CONFIGFS_FS=m + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +CONFIG_AFFS_FS=m +CONFIG_ECRYPT_FS=m +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +# CONFIG_BEFS_DEBUG is not set +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +# CONFIG_SQUASHFS_EMBEDDED is not set +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_VXFS_FS=m +CONFIG_MINIX_FS=m +# CONFIG_HPFS_FS is not set +CONFIG_QNX4FS_FS=m +CONFIG_ROMFS_FS=m +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m +# CONFIG_UFS_FS_WRITE is not set +# CONFIG_UFS_DEBUG is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=m +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFSD=m +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3=y +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_LOCKD=m +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_ACL_SUPPORT=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=m +CONFIG_SUNRPC_GSS=m +CONFIG_SUNRPC_BIND34=y +CONFIG_RPCSEC_GSS_KRB5=m +CONFIG_RPCSEC_GSS_SPKM3=m +# CONFIG_SMB_FS is not set +CONFIG_CIFS=m +# CONFIG_CIFS_STATS is not set +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +# CONFIG_CIFS_DEBUG2 is not set +CONFIG_CIFS_EXPERIMENTAL=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_NCP_FS=m +CONFIG_NCPFS_PACKET_SIGNING=y +CONFIG_NCPFS_IOCTL_LOCKING=y +CONFIG_NCPFS_STRONG=y +CONFIG_NCPFS_NFS_NS=y +CONFIG_NCPFS_OS2_NS=y +CONFIG_NCPFS_SMALLDOS=y +CONFIG_NCPFS_NLS=y +CONFIG_NCPFS_EXTRAS=y +CONFIG_CODA_FS=m +# CONFIG_CODA_FS_OLD_API is not set +# CONFIG_AFS_FS is not set +CONFIG_9P_FS=m + +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y +CONFIG_MSDOS_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +CONFIG_SGI_PARTITION=y +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_UTF8=m +CONFIG_DLM=m +CONFIG_DLM_DEBUG=y +CONFIG_QE_GPIO=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +CONFIG_CRC_CCITT=m +CONFIG_CRC16=m +CONFIG_CRC_T10DIF=m +CONFIG_CRC_ITU_T=m +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +CONFIG_LIBCRC32C=m +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=m +CONFIG_LZO_COMPRESS=m +CONFIG_LZO_DECOMPRESS=m +CONFIG_TEXTSEARCH=y +CONFIG_TEXTSEARCH_KMP=m +CONFIG_TEXTSEARCH_BM=m +CONFIG_TEXTSEARCH_FSM=m +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_HAVE_LMB=y + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +CONFIG_UNUSED_SYMBOLS=y +CONFIG_DEBUG_FS=y +CONFIG_HEADERS_CHECK=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_SHIRQ=y +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_DEBUG_OBJECTS=y +# CONFIG_DEBUG_OBJECTS_SELFTEST is not set +CONFIG_DEBUG_OBJECTS_FREE=y +CONFIG_DEBUG_OBJECTS_TIMERS=y +CONFIG_SLUB_DEBUG_ON=y +# CONFIG_SLUB_STATS is not set +CONFIG_DEBUG_RT_MUTEXES=y +CONFIG_DEBUG_PI_LIST=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_HIGHMEM=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_VM=y +CONFIG_DEBUG_WRITECOUNT=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_SG=y +CONFIG_FRAME_POINTER=y +CONFIG_BOOT_PRINTK_DELAY=y +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_LKDTM is not set +CONFIG_FAULT_INJECTION=y +CONFIG_FAILSLAB=y +CONFIG_FAIL_PAGE_ALLOC=y +CONFIG_FAIL_MAKE_REQUEST=y +CONFIG_FAULT_INJECTION_DEBUG_FS=y +CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y +CONFIG_LATENCYTOP=y +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_TRACER_MAX_TRACE=y +CONFIG_TRACING=y +CONFIG_FTRACE=y +CONFIG_SCHED_TRACER=y +CONFIG_CONTEXT_SWITCH_TRACER=y +CONFIG_DYNAMIC_FTRACE=y +# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_FIREWIRE_OHCI_REMOTE_DMA is not set +# CONFIG_SAMPLES is not set +CONFIG_DEBUG_STACKOVERFLOW=y +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_DEBUGGER=y +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set +# CONFIG_KGDB_CONSOLE is not set +CONFIG_XMON=y +# CONFIG_XMON_DEFAULT is not set +CONFIG_XMON_DISASSEMBLY=y +CONFIG_IRQSTACKS=y +# CONFIG_VIRQ_DEBUG is not set +# CONFIG_BDI_SWITCH is not set +CONFIG_BOOTX_TEXT=y +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +CONFIG_SECURITY_NETWORK_XFRM=y +CONFIG_SECURITY_FILE_CAPABILITIES=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT=y +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +# CONFIG_SECURITY_SMACK is not set +CONFIG_XOR_BLOCKS=m +CONFIG_ASYNC_CORE=m +CONFIG_ASYNC_MEMCPY=m +CONFIG_ASYNC_XOR=m +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_NULL=m +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=m +CONFIG_CRYPTO_TEST=m + +# +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_SEQIV=m + +# +# Block modes +# +CONFIG_CRYPTO_CBC=m +CONFIG_CRYPTO_CTR=m +CONFIG_CRYPTO_CTS=m +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_XTS=m + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_XCBC=m + +# +# Digest +# +CONFIG_CRYPTO_CRC32C=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_MICHAEL_MIC=m +CONFIG_CRYPTO_RMD128=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_RMD256=m +CONFIG_CRYPTO_RMD320=m +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=m +CONFIG_CRYPTO_SHA512=m +CONFIG_CRYPTO_TGR192=m +CONFIG_CRYPTO_WP512=m + +# +# Ciphers +# +CONFIG_CRYPTO_AES=m +CONFIG_CRYPTO_ANUBIS=m +CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_KHAZAD=m +CONFIG_CRYPTO_SALSA20=m +CONFIG_CRYPTO_SEED=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TEA=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_TWOFISH_COMMON=m + +# +# Compression +# +CONFIG_CRYPTO_DEFLATE=m +CONFIG_CRYPTO_LZO=m +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_HIFN_795X=m +CONFIG_CRYPTO_DEV_HIFN_795X_RNG=y +CONFIG_CRYPTO_DEV_TALITOS=m +CONFIG_PPC_CLOCK=y +CONFIG_PPC_LIB_RHEAP=y +CONFIG_VIRTUALIZATION=y +CONFIG_VIRTIO=m +CONFIG_VIRTIO_RING=m +CONFIG_VIRTIO_PCI=m +CONFIG_VIRTIO_BALLOON=m diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig index 71d79e428d20ccabd786a0e7a880ff17c2bf2903..f9a3d3b394cfb5ce8694c6b5700507a855623193 100644 --- a/arch/powerpc/configs/ps3_defconfig +++ b/arch/powerpc/configs/ps3_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.25 -# Mon Apr 28 12:39:10 2008 +# Linux kernel version: 2.6.26 +# Wed Jul 16 13:59:24 2008 # CONFIG_PPC64=y @@ -14,8 +14,9 @@ CONFIG_POWER4=y CONFIG_TUNE_CELL=y CONFIG_PPC_FPU=y CONFIG_ALTIVEC=y +# CONFIG_VSX is not set CONFIG_PPC_STD_MMU=y -# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC_MM_SLICES=y CONFIG_VIRT_CPU_ACCOUNTING=y CONFIG_SMP=y CONFIG_NR_CPUS=2 @@ -31,6 +32,7 @@ CONFIG_GENERIC_HARDIRQS=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_IRQ_PER_CPU=y CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y @@ -90,6 +92,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_EXTRA_PASS=y @@ -117,12 +120,15 @@ CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_DMA_ATTRS=y +CONFIG_USE_GENERIC_SMP_HELPERS=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set @@ -132,6 +138,7 @@ CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y # CONFIG_BLK_DEV_IO_TRACE is not set CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_INTEGRITY is not set CONFIG_BLOCK_COMPAT=y # @@ -152,13 +159,8 @@ CONFIG_CLASSIC_RCU=y # Platform support # CONFIG_PPC_MULTIPLATFORM=y -# CONFIG_PPC_82xx is not set -# CONFIG_PPC_83xx is not set -# CONFIG_PPC_86xx is not set # CONFIG_PPC_PSERIES is not set # CONFIG_PPC_ISERIES is not set -# CONFIG_PPC_MPC512x is not set -# CONFIG_PPC_MPC5121 is not set # CONFIG_PPC_PMAC is not set # CONFIG_PPC_MAPLE is not set # CONFIG_PPC_PASEMI is not set @@ -187,6 +189,7 @@ CONFIG_PPC_CELL=y # Cell Broadband Engine options # CONFIG_SPU_FS=y +CONFIG_SPU_FS_64K_LS=y CONFIG_SPU_BASE=y # CONFIG_PQ2ADS is not set # CONFIG_IPIC is not set @@ -222,6 +225,7 @@ CONFIG_PREEMPT_NONE=y CONFIG_BINFMT_ELF=y CONFIG_COMPAT_BINFMT_ELF=y CONFIG_BINFMT_MISC=y +CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y # CONFIG_IOMMU_VMERGE is not set CONFIG_IOMMU_HELPER=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y @@ -248,18 +252,22 @@ CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG_SPARSE=y +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_ARCH_MEMORY_PROBE=y -# CONFIG_PPC_HAS_HASH_64K is not set +CONFIG_PPC_HAS_HASH_64K=y # CONFIG_PPC_64K_PAGES is not set CONFIG_FORCE_MAX_ZONEORDER=13 -# CONFIG_SCHED_SMT is not set +CONFIG_SCHED_SMT=y CONFIG_PROC_DEVICETREE=y # CONFIG_CMDLINE_BOOL is not set -# CONFIG_PM is not set +CONFIG_EXTRA_TARGETS="" +CONFIG_PM=y +CONFIG_PM_DEBUG=y +# CONFIG_PM_VERBOSE is not set # CONFIG_SECCOMP is not set CONFIG_ISA_DMA_API=y @@ -273,6 +281,7 @@ CONFIG_GENERIC_ISA_DMA=y # CONFIG_PCI_SYSCALL is not set # CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set +# CONFIG_HAS_RAPIDIO is not set CONFIG_PAGE_OFFSET=0xc000000000000000 CONFIG_KERNEL_START=0xc000000000000000 CONFIG_PHYSICAL_START=0x00000000 @@ -412,6 +421,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=m +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set @@ -478,6 +489,7 @@ CONFIG_SCSI_WAIT_SCAN=m # CONFIG_SCSI_SAS_LIBSAS is not set # CONFIG_SCSI_SRP_ATTRS is not set # CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_DH is not set # CONFIG_ATA is not set # CONFIG_MD is not set # CONFIG_MACINTOSH_DRIVERS is not set @@ -533,8 +545,18 @@ CONFIG_USB_NET_MCS7830=m # CONFIG_USB_NET_CDC_SUBSET is not set # CONFIG_USB_NET_ZAURUS is not set # CONFIG_WAN is not set -# CONFIG_PPP is not set +CONFIG_PPP=m +CONFIG_PPP_MULTILINK=y +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=m +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=m +# CONFIG_PPP_BSDCOMP is not set +# CONFIG_PPP_MPPE is not set +CONFIG_PPPOE=m +# CONFIG_PPPOL2TP is not set # CONFIG_SLIP is not set +CONFIG_SLHC=m # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set @@ -603,6 +625,7 @@ CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -618,23 +641,17 @@ CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_I2C is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set # @@ -652,8 +669,17 @@ CONFIG_SSB_POSSIBLE=y # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# # CONFIG_DAB is not set # @@ -671,8 +697,8 @@ CONFIG_FB=y CONFIG_FB_SYS_FILLRECT=y CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set CONFIG_FB_SYS_FOPS=y -CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set @@ -712,18 +738,12 @@ CONFIG_FB_LOGO_EXTRA=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_LOGO_LINUX_CLUT224=y - -# -# Sound -# CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m +CONFIG_SND_HWDEP=m +CONFIG_SND_RAWMIDI=m # CONFIG_SND_SEQUENCER is not set # CONFIG_SND_MIXER_OSS is not set # CONFIG_SND_PCM_OSS is not set @@ -732,53 +752,20 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# ALSA PowerMac devices -# - -# -# ALSA PowerMac requires I2C -# - -# -# ALSA PowerPC devices -# +# CONFIG_SND_DRIVERS is not set +CONFIG_SND_PPC=y CONFIG_SND_PS3=m CONFIG_SND_PS3_DEFAULT_START_DELAY=2000 - -# -# USB devices -# -# CONFIG_SND_USB_AUDIO is not set +CONFIG_SND_USB=y +CONFIG_SND_USB_AUDIO=m # CONFIG_SND_USB_USX2Y is not set # CONFIG_SND_USB_CAIAQ is not set - -# -# System on Chip audio support -# # CONFIG_SND_SOC is not set - -# -# ALSA SoC audio for Freescale SOCs -# - -# -# Open Sound System -# # CONFIG_SOUND_PRIME is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y # CONFIG_HID_DEBUG is not set -# CONFIG_HIDRAW is not set +CONFIG_HIDRAW=y # # USB Input Devices @@ -807,17 +794,20 @@ CONFIG_USB=m CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set # CONFIG_USB_DYNAMIC_MINORS is not set +CONFIG_USB_SUSPEND=y # CONFIG_USB_OTG is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_EHCI_HCD=m # CONFIG_USB_EHCI_ROOT_HUB_TT is not set # CONFIG_USB_EHCI_TT_NEWSCHED is not set CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y # CONFIG_USB_EHCI_HCD_PPC_OF is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=m # CONFIG_USB_OHCI_HCD_PPC_OF is not set # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set @@ -831,6 +821,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -890,12 +881,45 @@ CONFIG_USB_MON=y # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set # CONFIG_EDAC is not set -# CONFIG_RTC_CLASS is not set +CONFIG_RTC_LIB=m +CONFIG_RTC_CLASS=m + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +CONFIG_RTC_DRV_PPC=m # CONFIG_DMADEVICES is not set # CONFIG_UIO is not set @@ -911,6 +935,7 @@ CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set @@ -959,8 +984,8 @@ CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y # CONFIG_CONFIGFS_FS is not set # @@ -1059,12 +1084,15 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_BITREVERSE=y # CONFIG_GENERIC_FIND_FIRST_BIT is not set -# CONFIG_CRC_CCITT is not set +CONFIG_CRC_CCITT=m # CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set CONFIG_CRC_ITU_T=m CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=m +CONFIG_ZLIB_DEFLATE=m CONFIG_LZO_COMPRESS=m CONFIG_LZO_DECOMPRESS=m CONFIG_PLIST=y @@ -1082,7 +1110,7 @@ CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set +CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set @@ -1090,33 +1118,49 @@ CONFIG_DETECT_SOFTLOCKUP=y CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set CONFIG_DEBUG_SPINLOCK=y CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_PROVE_LOCKING=y +CONFIG_LOCKDEP=y # CONFIG_LOCK_STAT is not set +CONFIG_DEBUG_LOCKDEP=y +CONFIG_TRACE_IRQFLAGS=y CONFIG_DEBUG_SPINLOCK_SLEEP=y # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_STACKTRACE=y # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEBUG_WRITECOUNT=y CONFIG_DEBUG_LIST=y # CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set # CONFIG_SAMPLES is not set CONFIG_DEBUG_STACKOVERFLOW=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_PAGEALLOC is not set # CONFIG_DEBUGGER is not set +# CONFIG_CODE_PATCHING_SELFTEST is not set +# CONFIG_FTR_FIXUP_SELFTEST is not set CONFIG_IRQSTACKS=y +# CONFIG_VIRQ_DEBUG is not set # CONFIG_BOOTX_TEXT is not set # CONFIG_PPC_EARLY_DEBUG is not set @@ -1172,6 +1216,10 @@ CONFIG_CRYPTO_PCBC=m # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set # CONFIG_CRYPTO_SHA1 is not set # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig index adaa05fb0478f7bce0b540eee7374e282f601f6c..fe6ffa683d781d2c818b42df92dd275859c5c3d4 100644 --- a/arch/powerpc/configs/pseries_defconfig +++ b/arch/powerpc/configs/pseries_defconfig @@ -946,6 +946,7 @@ CONFIG_HVC_DRIVER=y CONFIG_HVC_CONSOLE=y CONFIG_HVC_RTAS=y CONFIG_HVCS=m +CONFIG_IBM_BSR=m # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set CONFIG_GEN_RTC=y diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 2346d271fbfdbc5bb8323a588de5124e3237cabf..1a4094704b1fc630386041239241008c5d457487 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile @@ -12,6 +12,18 @@ CFLAGS_prom_init.o += -fPIC CFLAGS_btext.o += -fPIC endif +ifdef CONFIG_FTRACE +# Do not trace early boot code +CFLAGS_REMOVE_cputable.o = -pg +CFLAGS_REMOVE_prom_init.o = -pg + +ifdef CONFIG_DYNAMIC_FTRACE +# dynamic ftrace setup. +CFLAGS_REMOVE_ftrace.o = -pg +endif + +endif + obj-y := cputable.o ptrace.o syscalls.o \ irq.o align.o signal_32.o pmc.o vdso.o \ init_task.o process.o systbl.o idle.o \ @@ -38,12 +50,13 @@ obj-$(CONFIG_IBMVIO) += vio.o obj-$(CONFIG_IBMEBUS) += ibmebus.o obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o +obj-$(CONFIG_E500) += idle_e500.o obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o obj-$(CONFIG_TAU) += tau_6xx.o obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ swsusp_$(CONFIG_WORD_SIZE).o obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o -obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o +obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_44x) += cpu_setup_44x.o ifeq ($(CONFIG_PPC_MERGE),y) @@ -61,6 +74,7 @@ obj-y += time.o prom.o traps.o setup-common.o \ misc_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_PPC32) += entry_32.o setup_32.o obj-$(CONFIG_PPC64) += dma_64.o iommu.o +obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o obj-$(CONFIG_MODULES) += ppc_ksyms.o obj-$(CONFIG_BOOTX_TEXT) += btext.o @@ -78,6 +92,8 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o \ obj-$(CONFIG_AUDIT) += audit.o obj64-$(CONFIG_AUDIT) += compat_audit.o +obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o + obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o ifneq ($(CONFIG_PPC_INDIRECT_IO),y) diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c index e06f75daeba368ca231ec3d8af43db2285e68aba..367129789cc0854a01fd96efc88824d7f9c995a8 100644 --- a/arch/powerpc/kernel/align.c +++ b/arch/powerpc/kernel/align.c @@ -48,6 +48,7 @@ struct aligninfo { #define HARD 0x80 /* string, stwcx. */ #define E4 0x40 /* SPE endianness is word */ #define E8 0x80 /* SPE endianness is double word */ +#define SPLT 0x80 /* VSX SPLAT load */ /* DSISR bits reported for a DCBZ instruction: */ #define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ @@ -363,10 +364,10 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr, * Only POWER6 has these instructions, and it does true little-endian, * so we don't need the address swizzling. */ -static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, - unsigned int reg, unsigned int flags) +static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg, + unsigned int flags) { - char *ptr = (char *) ¤t->thread.fpr[reg]; + char *ptr = (char *) ¤t->thread.TS_FPR(reg); int i, ret; if (!(flags & F)) @@ -637,6 +638,36 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg, } #endif /* CONFIG_SPE */ +#ifdef CONFIG_VSX +/* + * Emulate VSX instructions... + */ +static int emulate_vsx(unsigned char __user *addr, unsigned int reg, + unsigned int areg, struct pt_regs *regs, + unsigned int flags, unsigned int length) +{ + char *ptr = (char *) ¤t->thread.TS_FPR(reg); + int ret; + + flush_vsx_to_thread(current); + + if (flags & ST) + ret = __copy_to_user(addr, ptr, length); + else { + if (flags & SPLT){ + ret = __copy_from_user(ptr, addr, length); + ptr += length; + } + ret |= __copy_from_user(ptr, addr, length); + } + if (flags & U) + regs->gpr[areg] = regs->dar; + if (ret) + return -EFAULT; + return 1; +} +#endif + /* * Called on alignment exception. Attempts to fixup * @@ -647,7 +678,7 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg, int fix_alignment(struct pt_regs *regs) { - unsigned int instr, nb, flags; + unsigned int instr, nb, flags, instruction = 0; unsigned int reg, areg; unsigned int dsisr; unsigned char __user *addr; @@ -689,6 +720,7 @@ int fix_alignment(struct pt_regs *regs) if (cpu_has_feature(CPU_FTR_REAL_LE) && (regs->msr & MSR_LE)) instr = cpu_to_le32(instr); dsisr = make_dsisr(instr); + instruction = instr; } /* extract the operation and registers from the dsisr */ @@ -728,6 +760,30 @@ int fix_alignment(struct pt_regs *regs) /* DAR has the operand effective address */ addr = (unsigned char __user *)regs->dar; +#ifdef CONFIG_VSX + if ((instruction & 0xfc00003e) == 0x7c000018) { + /* Additional register addressing bit (64 VSX vs 32 FPR/GPR */ + reg |= (instruction & 0x1) << 5; + /* Simple inline decoder instead of a table */ + if (instruction & 0x200) + nb = 16; + else if (instruction & 0x080) + nb = 8; + else + nb = 4; + flags = 0; + if (instruction & 0x100) + flags |= ST; + if (instruction & 0x040) + flags |= U; + /* splat load needs a special decoder */ + if ((instruction & 0x400) == 0){ + flags |= SPLT; + nb = 8; + } + return emulate_vsx(addr, reg, areg, regs, flags, nb); + } +#endif /* A size of 0 indicates an instruction we don't support, with * the exception of DCBZ which is handled as a special case here */ @@ -759,7 +815,7 @@ int fix_alignment(struct pt_regs *regs) /* Special case for 16-byte FP loads and stores */ if (nb == 16) - return emulate_fp_pair(regs, addr, reg, flags); + return emulate_fp_pair(addr, reg, flags); /* If we are loading, get the data from user space, else * get it from register values @@ -784,7 +840,7 @@ int fix_alignment(struct pt_regs *regs) return -EFAULT; } } else if (flags & F) { - data.dd = current->thread.fpr[reg]; + data.dd = current->thread.TS_FPR(reg); if (flags & S) { /* Single-precision FP store requires conversion... */ #ifdef CONFIG_PPC_FPU @@ -862,7 +918,7 @@ int fix_alignment(struct pt_regs *regs) if (unlikely(ret)) return -EFAULT; } else if (flags & F) - current->thread.fpr[reg] = data.dd; + current->thread.TS_FPR(reg) = data.dd; else regs->gpr[reg] = data.ll; diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index ec9228d687b08515319694001c6c1feffb577944..92768d3006f7c0800c263bd2d121537fba2a4409 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c @@ -52,6 +52,10 @@ #include #endif +#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) +#include "head_booke.h" +#endif + int main(void) { DEFINE(THREAD, offsetof(struct task_struct, thread)); @@ -74,6 +78,10 @@ int main(void) DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr)); DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr)); #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX + DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr)); + DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr)); +#endif /* CONFIG_VSX */ #ifdef CONFIG_PPC64 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid)); #else /* CONFIG_PPC64 */ @@ -242,6 +250,25 @@ int main(void) DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); #endif /* CONFIG_PPC64 */ +#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) + DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE); + DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); + /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */ + DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); + DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1)); + DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2)); + DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3)); + DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6)); + DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7)); + DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0)); + DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1)); + DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0)); + DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1)); + DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0)); + DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1)); + DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); +#endif + DEFINE(CLONE_VM, CLONE_VM); DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index e3623e3e34514d8aed247024ebbf2673416d0060..5465e8de0e61a547fed18f14222199b311b0dfee 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S @@ -33,6 +33,7 @@ _GLOBAL(__setup_cpu_440grx) mtlr r4 blr _GLOBAL(__setup_cpu_460ex) +_GLOBAL(__setup_cpu_460gt) b __init_fpu_44x _GLOBAL(__setup_cpu_440gx) _GLOBAL(__setup_cpu_440spe) diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index e44d5530f0a6d5ea0457d137d1856fac559a7b82..25c273c761d19855f2d8861720c24f7cb095bb2f 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c @@ -23,6 +23,9 @@ struct cpu_spec* cur_cpu_spec = NULL; EXPORT_SYMBOL(cur_cpu_spec); +/* The platform string corresponding to the real PVR */ +const char *powerpc_base_platform; + /* NOTE: * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's * the responsibility of the appropriate CPU save/restore functions to @@ -37,6 +40,7 @@ extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); +extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); @@ -52,6 +56,8 @@ extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); extern void __restore_cpu_pa6t(void); extern void __restore_cpu_ppc970(void); +extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec); +extern void __restore_cpu_power7(void); #endif /* CONFIG_PPC64 */ /* This table only contains "desktop" CPUs, it need to be filled with embedded @@ -67,7 +73,12 @@ extern void __restore_cpu_ppc970(void); PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ - PPC_FEATURE_TRUE_LE) + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PERFMON_COMPAT) +#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ + PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ + PPC_FEATURE_TRUE_LE | \ + PPC_FEATURE_PSERIES_PERFMON_COMPAT) #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ PPC_FEATURE_TRUE_LE | \ PPC_FEATURE_HAS_ALTIVEC_COMP) @@ -347,6 +358,7 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .machine_check = machine_check_generic, + .oprofile_cpu_type = "ppc64/compat-power5+", .platform = "power5+", }, { /* Power6 */ @@ -378,8 +390,41 @@ static struct cpu_spec __initdata cpu_specs[] = { .icache_bsize = 128, .dcache_bsize = 128, .machine_check = machine_check_generic, + .oprofile_cpu_type = "ppc64/compat-power6", .platform = "power6", }, + { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ + .pvr_mask = 0xffffffff, + .pvr_value = 0x0f000003, + .cpu_name = "POWER7 (architected)", + .cpu_features = CPU_FTRS_POWER7, + .cpu_user_features = COMMON_USER_POWER7, + .icache_bsize = 128, + .dcache_bsize = 128, + .machine_check = machine_check_generic, + .oprofile_cpu_type = "ppc64/compat-power7", + .platform = "power7", + }, + { /* Power7 */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x003f0000, + .cpu_name = "POWER7 (raw)", + .cpu_features = CPU_FTRS_POWER7, + .cpu_user_features = COMMON_USER_POWER7, + .icache_bsize = 128, + .dcache_bsize = 128, + .num_pmcs = 6, + .pmc_type = PPC_PMC_IBM, + .cpu_setup = __setup_cpu_power7, + .cpu_restore = __restore_cpu_power7, + .oprofile_cpu_type = "ppc64/power7", + .oprofile_type = PPC_OPROFILE_POWER4, + .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV, + .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR, + .oprofile_mmcra_clear = POWER6_MMCRA_THRM | + POWER6_MMCRA_OTHER, + .platform = "power7", + }, { /* Cell Broadband Engine */ .pvr_mask = 0xffff0000, .pvr_value = 0x00700000, @@ -1410,6 +1455,16 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_440A, .platform = "ppc440", }, + { /* 440 in Xilinx Virtex-5 FXT */ + .pvr_mask = 0xfffffff0, + .pvr_value = 0x7ff21910, + .cpu_name = "440 in Virtex-5 FXT", + .cpu_features = CPU_FTRS_44X, + .cpu_user_features = COMMON_USER_BOOKE, + .icache_bsize = 32, + .dcache_bsize = 32, + .platform = "ppc440", + }, { /* 460EX */ .pvr_mask = 0xffff0002, .pvr_value = 0x13020002, @@ -1427,9 +1482,10 @@ static struct cpu_spec __initdata cpu_specs[] = { .pvr_value = 0x13020000, .cpu_name = "460GT", .cpu_features = CPU_FTRS_44X, - .cpu_user_features = COMMON_USER_BOOKE, + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, .icache_bsize = 32, .dcache_bsize = 32, + .cpu_setup = __setup_cpu_460gt, .machine_check = machine_check_440A, .platform = "ppc440", }, @@ -1491,7 +1547,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .pvr_mask = 0xffff0000, .pvr_value = 0x80200000, .cpu_name = "e500", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ .cpu_features = CPU_FTRS_E500, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_SPE_COMP | @@ -1508,7 +1563,6 @@ static struct cpu_spec __initdata cpu_specs[] = { .pvr_mask = 0xffff0000, .pvr_value = 0x80210000, .cpu_name = "e500v2", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ .cpu_features = CPU_FTRS_E500_2, .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_SPE_COMP | @@ -1522,6 +1576,20 @@ static struct cpu_spec __initdata cpu_specs[] = { .machine_check = machine_check_e500, .platform = "ppc8548", }, + { /* e500mc */ + .pvr_mask = 0xffff0000, + .pvr_value = 0x80230000, + .cpu_name = "e500mc", + .cpu_features = CPU_FTRS_E500MC, + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, + .icache_bsize = 64, + .dcache_bsize = 64, + .num_pmcs = 4, + .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ + .oprofile_type = PPC_OPROFILE_FSL_EMB, + .machine_check = machine_check_e500, + .platform = "ppce500mc", + }, { /* default match */ .pvr_mask = 0x00000000, .pvr_value = 0x00000000, @@ -1567,9 +1635,34 @@ struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) t->cpu_setup = s->cpu_setup; t->cpu_restore = s->cpu_restore; t->platform = s->platform; + /* + * If we have passed through this logic once + * before and have pulled the default case + * because the real PVR was not found inside + * cpu_specs[], then we are possibly running in + * compatibility mode. In that case, let the + * oprofiler know which set of compatibility + * counters to pull from by making sure the + * oprofile_cpu_type string is set to that of + * compatibility mode. If the oprofile_cpu_type + * already has a value, then we are possibly + * overriding a real PVR with a logical one, and, + * in that case, keep the current value for + * oprofile_cpu_type. + */ + if (t->oprofile_cpu_type == NULL) + t->oprofile_cpu_type = s->oprofile_cpu_type; } else *t = *s; *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; + + /* + * Set the base platform string once; assumes + * we're called with real pvr first. + */ + if (*PTRRELOC(&powerpc_base_platform) == NULL) + *PTRRELOC(&powerpc_base_platform) = t->platform; + #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) /* ppc64 and booke expect identify_cpu to also call * setup_cpu for that processor. I will consolidate @@ -1587,38 +1680,3 @@ struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) BUG(); return NULL; } - -void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end) -{ - struct fixup_entry { - unsigned long mask; - unsigned long value; - long start_off; - long end_off; - } *fcur, *fend; - - fcur = fixup_start; - fend = fixup_end; - - for (; fcur < fend; fcur++) { - unsigned int *pstart, *pend, *p; - - if ((value & fcur->mask) == fcur->value) - continue; - - /* These PTRRELOCs will disappear once the new scheme for - * modules and vdso is implemented - */ - pstart = ((unsigned int *)fcur) + (fcur->start_off / 4); - pend = ((unsigned int *)fcur) + (fcur->end_off / 4); - - for (p = pstart; p < pend; p++) { - *p = 0x60000000u; - asm volatile ("dcbst 0, %0" : : "r" (p)); - } - asm volatile ("sync" : : : "memory"); - for (p = pstart; p < pend; p++) - asm volatile ("icbi 0,%0" : : "r" (p)); - asm volatile ("sync; isync" : : : "memory"); - } -} diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index eae401de3f769f08176838d9456a2e84c9ba786d..0a8439aafdd1ed26f78d61bc110703f32bd284c4 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c @@ -48,7 +48,7 @@ int crashing_cpu = -1; static cpumask_t cpus_in_crash = CPU_MASK_NONE; cpumask_t cpus_in_sr = CPU_MASK_NONE; -#define CRASH_HANDLER_MAX 1 +#define CRASH_HANDLER_MAX 2 /* NULL terminated list of shutdown handles */ static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; static DEFINE_SPINLOCK(crash_handlers_lock); diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c index 9ee3c5278db0a955425b4b1206a8e200ae01e6cc..e0debcca0bfadaf03dbc6f3c35a56f1ad4a3aee2 100644 --- a/arch/powerpc/kernel/crash_dump.c +++ b/arch/powerpc/kernel/crash_dump.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,8 @@ void __init reserve_kdump_trampoline(void) static void __init create_trampoline(unsigned long addr) { + unsigned int *p = (unsigned int *)addr; + /* The maximum range of a single instruction branch, is the current * instruction's address + (32 MB - 4) bytes. For the trampoline we * need to branch to current address + 32 MB. So we insert a nop at @@ -41,8 +44,8 @@ static void __init create_trampoline(unsigned long addr) * branch to "addr" we jump to ("addr" + 32 MB). Although it requires * two instructions it doesn't require any registers. */ - create_instruction(addr, 0x60000000); /* nop */ - create_branch(addr + 4, addr + PHYSICAL_START, 0); + patch_instruction(p, PPC_NOP_INSTR); + patch_branch(++p, addr + PHYSICAL_START, 0); } void __init setup_kdump_trampoline(void) diff --git a/arch/powerpc/kernel/dma_64.c b/arch/powerpc/kernel/dma_64.c index 3a317cb0636a4f572790982648b65c077bb84b30..ae5708e3a3127fc9a180ae1d881d5bea5ede48bc 100644 --- a/arch/powerpc/kernel/dma_64.c +++ b/arch/powerpc/kernel/dma_64.c @@ -15,15 +15,6 @@ * Generic iommu implementation */ -static inline unsigned long device_to_mask(struct device *dev) -{ - if (dev->dma_mask && *dev->dma_mask) - return *dev->dma_mask; - /* Assume devices without mask can take 32 bit addresses */ - return 0xfffffffful; -} - - /* Allocates a contiguous real buffer and creates mappings over it. * Returns the virtual address of the buffer and sets dma_handle * to the dma address (mapping) of the first page. @@ -50,32 +41,38 @@ static void dma_iommu_free_coherent(struct device *dev, size_t size, */ static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { return iommu_map_single(dev, dev->archdata.dma_data, vaddr, size, - device_to_mask(dev), direction); + device_to_mask(dev), direction, attrs); } static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { - iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction); + iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction, + attrs); } static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist, - int nelems, enum dma_data_direction direction) + int nelems, enum dma_data_direction direction, + struct dma_attrs *attrs) { - return iommu_map_sg(dev, sglist, nelems, - device_to_mask(dev), direction); + return iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems, + device_to_mask(dev), direction, attrs); } static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist, - int nelems, enum dma_data_direction direction) + int nelems, enum dma_data_direction direction, + struct dma_attrs *attrs) { - iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction); + iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction, + attrs); } /* We support DMA to/from any memory page via the iommu */ @@ -148,19 +145,22 @@ static void dma_direct_free_coherent(struct device *dev, size_t size, static dma_addr_t dma_direct_map_single(struct device *dev, void *ptr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { return virt_to_abs(ptr) + get_dma_direct_offset(dev); } static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { } static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) { struct scatterlist *sg; int i; @@ -174,7 +174,8 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, } static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) { } diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 0c8614d9875ca8b5966c148c7ad447bbcf3a987d..1cbbf70336415d37c5d14a1f1bd76f8fd1158a30 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S @@ -30,6 +30,7 @@ #include #include #include +#include #undef SHOW_SYSCALLS #undef SHOW_SYSCALLS_TASK @@ -44,29 +45,54 @@ #endif #ifdef CONFIG_BOOKE -#include "head_booke.h" -#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \ - mtspr exc_level##_SPRG,r8; \ - BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \ - lwz r0,GPR10-INT_FRAME_SIZE(r8); \ - stw r0,GPR10(r11); \ - lwz r0,GPR11-INT_FRAME_SIZE(r8); \ - stw r0,GPR11(r11); \ - mfspr r8,exc_level##_SPRG - .globl mcheck_transfer_to_handler mcheck_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) - b transfer_to_handler_full + mfspr r0,SPRN_DSRR0 + stw r0,_DSRR0(r11) + mfspr r0,SPRN_DSRR1 + stw r0,_DSRR1(r11) + /* fall through */ .globl debug_transfer_to_handler debug_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) - b transfer_to_handler_full + mfspr r0,SPRN_CSRR0 + stw r0,_CSRR0(r11) + mfspr r0,SPRN_CSRR1 + stw r0,_CSRR1(r11) + /* fall through */ .globl crit_transfer_to_handler crit_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) +#ifdef CONFIG_FSL_BOOKE + mfspr r0,SPRN_MAS0 + stw r0,MAS0(r11) + mfspr r0,SPRN_MAS1 + stw r0,MAS1(r11) + mfspr r0,SPRN_MAS2 + stw r0,MAS2(r11) + mfspr r0,SPRN_MAS3 + stw r0,MAS3(r11) + mfspr r0,SPRN_MAS6 + stw r0,MAS6(r11) +#ifdef CONFIG_PHYS_64BIT + mfspr r0,SPRN_MAS7 + stw r0,MAS7(r11) +#endif /* CONFIG_PHYS_64BIT */ +#endif /* CONFIG_FSL_BOOKE */ +#ifdef CONFIG_44x + mfspr r0,SPRN_MMUCR + stw r0,MMUCR(r11) +#endif + mfspr r0,SPRN_SRR0 + stw r0,_SRR0(r11) + mfspr r0,SPRN_SRR1 + stw r0,_SRR1(r11) + + mfspr r8,SPRN_SPRG3 + lwz r0,KSP_LIMIT(r8) + stw r0,SAVED_KSP_LIMIT(r11) + rlwimi r0,r1,0,0,(31-THREAD_SHIFT) + stw r0,KSP_LIMIT(r8) /* fall through */ #endif @@ -77,6 +103,16 @@ crit_transfer_to_handler: stw r0,GPR10(r11) lwz r0,crit_r11@l(0) stw r0,GPR11(r11) + mfspr r0,SPRN_SRR0 + stw r0,crit_srr0@l(0) + mfspr r0,SPRN_SRR1 + stw r0,crit_srr1@l(0) + + mfspr r8,SPRN_SPRG3 + lwz r0,KSP_LIMIT(r8) + stw r0,saved_ksp_limit@l(0) + rlwimi r0,r1,0,0,(31-THREAD_SHIFT) + stw r0,KSP_LIMIT(r8) /* fall through */ #endif @@ -141,13 +177,14 @@ transfer_to_handler: cmplw r1,r9 /* if r1 <= ksp_limit */ ble- stack_ovf /* then the kernel stack overflowed */ 5: -#ifdef CONFIG_6xx +#if defined(CONFIG_6xx) || defined(CONFIG_E500) rlwinm r9,r1,0,0,31-THREAD_SHIFT tophys(r9,r9) /* check local flags */ lwz r12,TI_LOCAL_FLAGS(r9) mtcrf 0x01,r12 bt- 31-TLF_NAPPING,4f -#endif /* CONFIG_6xx */ + bt- 31-TLF_SLEEPING,7f +#endif /* CONFIG_6xx || CONFIG_E500 */ .globl transfer_to_handler_cont transfer_to_handler_cont: 3: @@ -160,10 +197,17 @@ transfer_to_handler_cont: SYNC RFI /* jump to handler, enable MMU */ -#ifdef CONFIG_6xx +#if defined (CONFIG_6xx) || defined(CONFIG_E500) 4: rlwinm r12,r12,0,~_TLF_NAPPING stw r12,TI_LOCAL_FLAGS(r9) - b power_save_6xx_restore + b power_save_ppc32_restore + +7: rlwinm r12,r12,0,~_TLF_SLEEPING + stw r12,TI_LOCAL_FLAGS(r9) + lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */ + rlwinm r9,r9,0,~MSR_EE + lwz r12,_LINK(r11) /* and return to address in LR */ + b fast_exception_return #endif /* @@ -299,7 +343,12 @@ syscall_dotrace: stw r0,_TRAP(r1) addi r3,r1,STACK_FRAME_OVERHEAD bl do_syscall_trace_enter - lwz r0,GPR0(r1) /* Restore original registers */ + /* + * Restore argument registers possibly just changed. + * We use the return value of do_syscall_trace_enter + * for call number to look up in the table (r0). + */ + mr r0,r3 lwz r3,GPR3(r1) lwz r4,GPR4(r1) lwz r5,GPR5(r1) @@ -668,7 +717,7 @@ user_exc_return: /* r10 contains MSR_KERNEL here */ /* Check current_thread_info()->flags */ rlwinm r9,r1,0,0,(31-THREAD_SHIFT) lwz r9,TI_FLAGS(r9) - andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) + andi. r0,r9,_TIF_USER_WORK_MASK bne do_work restore_user: @@ -859,17 +908,90 @@ exc_exit_restart_end: exc_lvl_rfi; \ b .; /* prevent prefetch past exc_lvl_rfi */ +#define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \ + lwz r9,_##exc_lvl_srr0(r1); \ + lwz r10,_##exc_lvl_srr1(r1); \ + mtspr SPRN_##exc_lvl_srr0,r9; \ + mtspr SPRN_##exc_lvl_srr1,r10; + +#if defined(CONFIG_FSL_BOOKE) +#ifdef CONFIG_PHYS_64BIT +#define RESTORE_MAS7 \ + lwz r11,MAS7(r1); \ + mtspr SPRN_MAS7,r11; +#else +#define RESTORE_MAS7 +#endif /* CONFIG_PHYS_64BIT */ +#define RESTORE_MMU_REGS \ + lwz r9,MAS0(r1); \ + lwz r10,MAS1(r1); \ + lwz r11,MAS2(r1); \ + mtspr SPRN_MAS0,r9; \ + lwz r9,MAS3(r1); \ + mtspr SPRN_MAS1,r10; \ + lwz r10,MAS6(r1); \ + mtspr SPRN_MAS2,r11; \ + mtspr SPRN_MAS3,r9; \ + mtspr SPRN_MAS6,r10; \ + RESTORE_MAS7; +#elif defined(CONFIG_44x) +#define RESTORE_MMU_REGS \ + lwz r9,MMUCR(r1); \ + mtspr SPRN_MMUCR,r9; +#else +#define RESTORE_MMU_REGS +#endif + +#ifdef CONFIG_40x .globl ret_from_crit_exc ret_from_crit_exc: + mfspr r9,SPRN_SPRG3 + lis r10,saved_ksp_limit@ha; + lwz r10,saved_ksp_limit@l(r10); + tovirt(r9,r9); + stw r10,KSP_LIMIT(r9) + lis r9,crit_srr0@ha; + lwz r9,crit_srr0@l(r9); + lis r10,crit_srr1@ha; + lwz r10,crit_srr1@l(r10); + mtspr SPRN_SRR0,r9; + mtspr SPRN_SRR1,r10; RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) +#endif /* CONFIG_40x */ #ifdef CONFIG_BOOKE + .globl ret_from_crit_exc +ret_from_crit_exc: + mfspr r9,SPRN_SPRG3 + lwz r10,SAVED_KSP_LIMIT(r1) + stw r10,KSP_LIMIT(r9) + RESTORE_xSRR(SRR0,SRR1); + RESTORE_MMU_REGS; + RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) + .globl ret_from_debug_exc ret_from_debug_exc: + mfspr r9,SPRN_SPRG3 + lwz r10,SAVED_KSP_LIMIT(r1) + stw r10,KSP_LIMIT(r9) + lwz r9,THREAD_INFO-THREAD(r9) + rlwinm r10,r1,0,0,(31-THREAD_SHIFT) + lwz r10,TI_PREEMPT(r10) + stw r10,TI_PREEMPT(r9) + RESTORE_xSRR(SRR0,SRR1); + RESTORE_xSRR(CSRR0,CSRR1); + RESTORE_MMU_REGS; RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) .globl ret_from_mcheck_exc ret_from_mcheck_exc: + mfspr r9,SPRN_SPRG3 + lwz r10,SAVED_KSP_LIMIT(r1) + stw r10,KSP_LIMIT(r9) + RESTORE_xSRR(SRR0,SRR1); + RESTORE_xSRR(CSRR0,CSRR1); + RESTORE_xSRR(DSRR0,DSRR1); + RESTORE_MMU_REGS; RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) #endif /* CONFIG_BOOKE */ @@ -925,7 +1047,7 @@ recheck: lwz r9,TI_FLAGS(r9) andi. r0,r9,_TIF_NEED_RESCHED bne- do_resched - andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK + andi. r0,r9,_TIF_USER_WORK_MASK beq restore_user do_user_signal: /* r10 contains MSR_KERNEL here */ ori r10,r10,MSR_EE @@ -938,8 +1060,8 @@ do_user_signal: /* r10 contains MSR_KERNEL here */ SAVE_NVGPRS(r1) rlwinm r3,r3,0,0,30 stw r3,_TRAP(r1) -2: li r3,0 - addi r4,r1,STACK_FRAME_OVERHEAD +2: addi r3,r1,STACK_FRAME_OVERHEAD + mr r4,r9 bl do_signal REST_NVGPRS(r1) b recheck @@ -1035,3 +1157,129 @@ machine_check_in_rtas: /* XXX load up BATs and panic */ #endif /* CONFIG_PPC_RTAS */ + +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE +_GLOBAL(mcount) +_GLOBAL(_mcount) + stwu r1,-48(r1) + stw r3, 12(r1) + stw r4, 16(r1) + stw r5, 20(r1) + stw r6, 24(r1) + mflr r3 + stw r7, 28(r1) + mfcr r5 + stw r8, 32(r1) + stw r9, 36(r1) + stw r10,40(r1) + stw r3, 44(r1) + stw r5, 8(r1) + subi r3, r3, MCOUNT_INSN_SIZE + .globl mcount_call +mcount_call: + bl ftrace_stub + nop + lwz r6, 8(r1) + lwz r0, 44(r1) + lwz r3, 12(r1) + mtctr r0 + lwz r4, 16(r1) + mtcr r6 + lwz r5, 20(r1) + lwz r6, 24(r1) + lwz r0, 52(r1) + lwz r7, 28(r1) + lwz r8, 32(r1) + mtlr r0 + lwz r9, 36(r1) + lwz r10,40(r1) + addi r1, r1, 48 + bctr + +_GLOBAL(ftrace_caller) + /* Based off of objdump optput from glibc */ + stwu r1,-48(r1) + stw r3, 12(r1) + stw r4, 16(r1) + stw r5, 20(r1) + stw r6, 24(r1) + mflr r3 + lwz r4, 52(r1) + mfcr r5 + stw r7, 28(r1) + stw r8, 32(r1) + stw r9, 36(r1) + stw r10,40(r1) + stw r3, 44(r1) + stw r5, 8(r1) + subi r3, r3, MCOUNT_INSN_SIZE +.globl ftrace_call +ftrace_call: + bl ftrace_stub + nop + lwz r6, 8(r1) + lwz r0, 44(r1) + lwz r3, 12(r1) + mtctr r0 + lwz r4, 16(r1) + mtcr r6 + lwz r5, 20(r1) + lwz r6, 24(r1) + lwz r0, 52(r1) + lwz r7, 28(r1) + lwz r8, 32(r1) + mtlr r0 + lwz r9, 36(r1) + lwz r10,40(r1) + addi r1, r1, 48 + bctr +#else +_GLOBAL(mcount) +_GLOBAL(_mcount) + stwu r1,-48(r1) + stw r3, 12(r1) + stw r4, 16(r1) + stw r5, 20(r1) + stw r6, 24(r1) + mflr r3 + lwz r4, 52(r1) + mfcr r5 + stw r7, 28(r1) + stw r8, 32(r1) + stw r9, 36(r1) + stw r10,40(r1) + stw r3, 44(r1) + stw r5, 8(r1) + + subi r3, r3, MCOUNT_INSN_SIZE + LOAD_REG_ADDR(r5, ftrace_trace_function) + lwz r5,0(r5) + + mtctr r5 + bctrl + + nop + + lwz r6, 8(r1) + lwz r0, 44(r1) + lwz r3, 12(r1) + mtctr r0 + lwz r4, 16(r1) + mtcr r6 + lwz r5, 20(r1) + lwz r6, 24(r1) + lwz r0, 52(r1) + lwz r7, 28(r1) + lwz r8, 32(r1) + mtlr r0 + lwz r9, 36(r1) + lwz r10,40(r1) + addi r1, r1, 48 + bctr +#endif + +_GLOBAL(ftrace_stub) + blr + +#endif /* CONFIG_MCOUNT */ diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index c0db5b769e55ee601e0d11e428cb6acc2c90d4bc..2d802e97097c55056757fab95a86aa400f352d99 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -31,6 +31,7 @@ #include #include #include +#include /* * System calls. @@ -213,7 +214,12 @@ syscall_dotrace: bl .save_nvgprs addi r3,r1,STACK_FRAME_OVERHEAD bl .do_syscall_trace_enter - ld r0,GPR0(r1) /* Restore original registers */ + /* + * Restore argument registers possibly just changed. + * We use the return value of do_syscall_trace_enter + * for the call number to look up in the table (r0). + */ + mr r0,r3 ld r3,GPR3(r1) ld r4,GPR4(r1) ld r5,GPR5(r1) @@ -353,6 +359,11 @@ _GLOBAL(_switch) mflr r20 /* Return to switch caller */ mfmsr r22 li r0, MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + oris r0,r0,MSR_VSX@h /* Disable VSX */ +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif /* CONFIG_VSX */ #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION oris r0,r0,MSR_VEC@h /* Disable altivec */ @@ -383,16 +394,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) ld r8,KSP(r4) /* new stack pointer */ BEGIN_FTR_SECTION - b 2f -END_FTR_SECTION_IFCLR(CPU_FTR_SLB) -BEGIN_FTR_SECTION + BEGIN_FTR_SECTION_NESTED(95) clrrdi r6,r8,28 /* get its ESID */ clrrdi r9,r1,28 /* get current sp ESID */ -END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT) -BEGIN_FTR_SECTION + FTR_SECTION_ELSE_NESTED(95) clrrdi r6,r8,40 /* get its 1T ESID */ clrrdi r9,r1,40 /* get current sp 1T ESID */ -END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT) + ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95) +FTR_SECTION_ELSE + b 2f +ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB) clrldi. r0,r6,2 /* is new ESID c00000000? */ cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */ cror eq,4*cr1+eq,eq @@ -632,8 +643,7 @@ user_work: b .ret_from_except_lite 1: bl .save_nvgprs - li r3,0 - addi r4,r1,STACK_FRAME_OVERHEAD + addi r3,r1,STACK_FRAME_OVERHEAD bl .do_signal b .ret_from_except @@ -870,3 +880,67 @@ _GLOBAL(enter_prom) ld r0,16(r1) mtlr r0 blr + +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE +_GLOBAL(mcount) +_GLOBAL(_mcount) + /* Taken from output of objdump from lib64/glibc */ + mflr r3 + stdu r1, -112(r1) + std r3, 128(r1) + subi r3, r3, MCOUNT_INSN_SIZE + .globl mcount_call +mcount_call: + bl ftrace_stub + nop + ld r0, 128(r1) + mtlr r0 + addi r1, r1, 112 + blr + +_GLOBAL(ftrace_caller) + /* Taken from output of objdump from lib64/glibc */ + mflr r3 + ld r11, 0(r1) + stdu r1, -112(r1) + std r3, 128(r1) + ld r4, 16(r11) + subi r3, r3, MCOUNT_INSN_SIZE +.globl ftrace_call +ftrace_call: + bl ftrace_stub + nop + ld r0, 128(r1) + mtlr r0 + addi r1, r1, 112 +_GLOBAL(ftrace_stub) + blr +#else +_GLOBAL(mcount) + blr + +_GLOBAL(_mcount) + /* Taken from output of objdump from lib64/glibc */ + mflr r3 + ld r11, 0(r1) + stdu r1, -112(r1) + std r3, 128(r1) + ld r4, 16(r11) + + subi r3, r3, MCOUNT_INSN_SIZE + LOAD_REG_ADDR(r5,ftrace_trace_function) + ld r5,0(r5) + ld r5,0(r5) + mtctr r5 + bctrl + + nop + ld r0, 128(r1) + mtlr r0 + addi r1, r1, 112 +_GLOBAL(ftrace_stub) + blr + +#endif +#endif diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S index 821e152e093c5bf4e58fe7b8b136974c7e4f2e52..a088c064ae405513a2d0969943c102647e8f4a46 100644 --- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S @@ -24,6 +24,29 @@ #include #include +#ifdef CONFIG_VSX +#define REST_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ + REST_32FPRS(n,base); \ + b 3f; \ +2: REST_32VSRS(n,c,base); \ +3: + +#define SAVE_32FPVSRS(n,c,base) \ +BEGIN_FTR_SECTION \ + b 2f; \ +END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ + SAVE_32FPRS(n,base); \ + b 3f; \ +2: SAVE_32VSRS(n,c,base); \ +3: +#else +#define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base) +#define SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base) +#endif + /* * This task wants to use the FPU now. * On UP, disable FP for the task which had the FPU previously, @@ -34,6 +57,11 @@ _GLOBAL(load_up_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + oris r5,r5,MSR_VSX@h +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC MTMSRD(r5) /* enable use of fpu now */ isync @@ -50,7 +78,7 @@ _GLOBAL(load_up_fpu) beq 1f toreal(r4) addi r4,r4,THREAD /* want last_task_used_math->thread */ - SAVE_32FPRS(0, r4) + SAVE_32FPVSRS(0, r5, r4) mffs fr0 stfd fr0,THREAD_FPSCR(r4) PPC_LL r5,PT_REGS(r4) @@ -77,7 +105,7 @@ _GLOBAL(load_up_fpu) #endif lfd fr0,THREAD_FPSCR(r5) MTFSF_L(fr0) - REST_32FPRS(0, r5) + REST_32FPVSRS(0, r4, r5) #ifndef CONFIG_SMP subi r4,r5,THREAD fromreal(r4) @@ -85,7 +113,7 @@ _GLOBAL(load_up_fpu) #endif /* CONFIG_SMP */ /* restore registers and return */ /* we haven't used ctr or xer or lr */ - b fast_exception_return + blr /* * giveup_fpu(tsk) @@ -96,6 +124,11 @@ _GLOBAL(load_up_fpu) _GLOBAL(giveup_fpu) mfmsr r5 ori r5,r5,MSR_FP +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + oris r5,r5,MSR_VSX@h +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif SYNC_601 ISYNC_601 MTMSRD(r5) /* enable use of fpu now */ @@ -106,7 +139,7 @@ _GLOBAL(giveup_fpu) addi r3,r3,THREAD /* want THREAD of task */ PPC_LL r5,PT_REGS(r3) PPC_LCMPI 0,r5,0 - SAVE_32FPRS(0, r3) + SAVE_32FPVSRS(0, r4 ,r3) mffs fr0 stfd fr0,THREAD_FPSCR(r3) beq 1f diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c new file mode 100644 index 0000000000000000000000000000000000000000..3855ceb937b0d23ae3b5d39bf271aabadea5eb79 --- /dev/null +++ b/arch/powerpc/kernel/ftrace.c @@ -0,0 +1,154 @@ +/* + * Code for replacing ftrace calls with jumps. + * + * Copyright (C) 2007-2008 Steven Rostedt + * + * Thanks goes out to P.A. Semi, Inc for supplying me with a PPC64 box. + * + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + + +static unsigned int ftrace_nop = 0x60000000; + +#ifdef CONFIG_PPC32 +# define GET_ADDR(addr) addr +#else +/* PowerPC64's functions are data that points to the functions */ +# define GET_ADDR(addr) *(unsigned long *)addr +#endif + + +static unsigned int notrace ftrace_calc_offset(long ip, long addr) +{ + return (int)(addr - ip); +} + +notrace unsigned char *ftrace_nop_replace(void) +{ + return (char *)&ftrace_nop; +} + +notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) +{ + static unsigned int op; + + /* + * It would be nice to just use create_function_call, but that will + * update the code itself. Here we need to just return the + * instruction that is going to be modified, without modifying the + * code. + */ + addr = GET_ADDR(addr); + + /* Set to "bl addr" */ + op = 0x48000001 | (ftrace_calc_offset(ip, addr) & 0x03fffffc); + + /* + * No locking needed, this must be called via kstop_machine + * which in essence is like running on a uniprocessor machine. + */ + return (unsigned char *)&op; +} + +#ifdef CONFIG_PPC64 +# define _ASM_ALIGN " .align 3 " +# define _ASM_PTR " .llong " +#else +# define _ASM_ALIGN " .align 2 " +# define _ASM_PTR " .long " +#endif + +notrace int +ftrace_modify_code(unsigned long ip, unsigned char *old_code, + unsigned char *new_code) +{ + unsigned replaced; + unsigned old = *(unsigned *)old_code; + unsigned new = *(unsigned *)new_code; + int faulted = 0; + + /* + * Note: Due to modules and __init, code can + * disappear and change, we need to protect against faulting + * as well as code changing. + * + * No real locking needed, this code is run through + * kstop_machine. + */ + asm volatile ( + "1: lwz %1, 0(%2)\n" + " cmpw %1, %5\n" + " bne 2f\n" + " stwu %3, 0(%2)\n" + "2:\n" + ".section .fixup, \"ax\"\n" + "3: li %0, 1\n" + " b 2b\n" + ".previous\n" + ".section __ex_table,\"a\"\n" + _ASM_ALIGN "\n" + _ASM_PTR "1b, 3b\n" + ".previous" + : "=r"(faulted), "=r"(replaced) + : "r"(ip), "r"(new), + "0"(faulted), "r"(old) + : "memory"); + + if (replaced != old && replaced != new) + faulted = 2; + + if (!faulted) + flush_icache_range(ip, ip + 8); + + return faulted; +} + +notrace int ftrace_update_ftrace_func(ftrace_func_t func) +{ + unsigned long ip = (unsigned long)(&ftrace_call); + unsigned char old[MCOUNT_INSN_SIZE], *new; + int ret; + + memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, (unsigned long)func); + ret = ftrace_modify_code(ip, old, new); + + return ret; +} + +notrace int ftrace_mcount_set(unsigned long *data) +{ + unsigned long ip = (long)(&mcount_call); + unsigned long *addr = data; + unsigned char old[MCOUNT_INSN_SIZE], *new; + + /* + * Replace the mcount stub with a pointer to the + * ip recorder function. + */ + memcpy(old, &mcount_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, *addr); + *addr = ftrace_modify_code(ip, old, new); + + return 0; +} + +int __init ftrace_dyn_arch_init(void *data) +{ + /* This is running in kstop_machine */ + + ftrace_mcount_set(data); + + return 0; +} + diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index 785af9b56591550d2947bf211e28901ab9981e48..99ee2f0f0f2bdcef067df7179e9614c459838983 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S @@ -421,8 +421,10 @@ BEGIN_FTR_SECTION b ProgramCheck END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE) EXCEPTION_PROLOG - bne load_up_fpu /* if from user, just load it up */ - addi r3,r1,STACK_FRAME_OVERHEAD + beq 1f + bl load_up_fpu /* if from user, just load it up */ + b fast_exception_return +1: addi r3,r1,STACK_FRAME_OVERHEAD EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) /* Decrementer */ diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 8552e67e3a8bebc9da26b01840dd996e1b2f6d0f..56d8e5d90c5be0b0518dcefaf2262a8ae97bd5da 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S @@ -93,6 +93,12 @@ _ENTRY(crit_r10) .space 4 _ENTRY(crit_r11) .space 4 +_ENTRY(crit_srr0) + .space 4 +_ENTRY(crit_srr1) + .space 4 +_ENTRY(saved_ksp_limit) + .space 4 /* * Exception vector entry code. This code runs with address translation @@ -148,14 +154,14 @@ _ENTRY(crit_r11) mfcr r10; /* save CR in r10 for now */\ mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ andi. r11,r11,MSR_PR; \ - lis r11,critical_stack_top@h; \ - ori r11,r11,critical_stack_top@l; \ + lis r11,critirq_ctx@ha; \ + tophys(r11,r11); \ + lwz r11,critirq_ctx@l(r11); \ beq 1f; \ /* COMING FROM USER MODE */ \ mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ - addi r11,r11,THREAD_SIZE; \ -1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ +1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\ tophys(r11,r11); \ stw r10,_CCR(r11); /* save various registers */\ stw r12,GPR12(r11); \ @@ -996,16 +1002,6 @@ empty_zero_page: swapper_pg_dir: .space PGD_TABLE_SIZE - -/* Stack for handling critical exceptions from kernel mode */ - .section .bss - .align 12 -exception_stack_bottom: - .space 4096 -critical_stack_top: - .globl exception_stack_top -exception_stack_top: - /* Room for two PTE pointers, usually the kernel and current user pointers * to their respective root page table. */ diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index 22b5d2c459a3bb927bd157966843e71ac729b69b..f3a1ea9d7fe44d8e45371d3f9b91863277fa4756 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S @@ -293,119 +293,9 @@ interrupt_base: MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception) /* Data Storage Interrupt */ - START_EXCEPTION(DataStorage) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 - mtspr SPRN_SPRG4W, r12 - mtspr SPRN_SPRG5W, r13 - mfcr r11 - mtspr SPRN_SPRG7W, r11 - - /* - * Check if it was a store fault, if not then bail - * because a user tried to access a kernel or - * read-protected page. Otherwise, get the - * offending address and handle it. - */ - mfspr r10, SPRN_ESR - andis. r10, r10, ESR_ST@h - beq 2f - - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, PAGE_OFFSET@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - - mfspr r12,SPRN_MMUCR - rlwinm r12,r12,0,0,23 /* Clear TID */ - - b 4f - - /* Get the PGD for the current thread */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) - - /* Load PID into MMUCR TID */ - mfspr r12,SPRN_MMUCR /* Get MMUCR */ - mfspr r13,SPRN_PID /* Get PID */ - rlwimi r12,r13,0,24,31 /* Set TID */ - -4: - mtspr SPRN_MMUCR,r12 - - rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ - lwzx r11, r12, r11 /* Get pgd/pmd entry */ - rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - - andi. r13, r11, _PAGE_RW /* Is it writeable? */ - beq 2f /* Bail if not */ - - /* Update 'changed'. - */ - ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE - stw r11, 4(r12) /* Update Linux page table */ - - li r13, PPC44x_TLB_SR@l /* Set SR */ - rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */ - rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */ - rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */ - rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */ - rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */ - and r12, r12, r11 /* HWEXEC/RW & USER */ - rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */ - rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */ - - rlwimi r11,r13,0,26,31 /* Insert static perms */ - - /* - * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added - * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see - * include/asm-powerpc/pgtable-ppc32.h for details). - */ - rlwinm r11,r11,0,20,10 - - /* find the TLB index that caused the fault. It has to be here. */ - tlbsx r10, 0, r10 - - tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */ - - /* Done...restore registers and get out of here. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R + DATA_STORAGE_EXCEPTION - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - rfi /* Force context change */ - -2: - /* - * The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b data_access - - /* Instruction Storage Interrupt */ + /* Instruction Storage Interrupt */ INSTRUCTION_STORAGE_EXCEPTION /* External Input Interrupt */ @@ -423,7 +313,6 @@ interrupt_base: #else EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE) #endif - /* System Call Interrupt */ START_EXCEPTION(SystemCall) NORMAL_EXCEPTION_PROLOG @@ -484,18 +373,57 @@ interrupt_base: 4: mtspr SPRN_MMUCR,r12 + /* Mask of required permission bits. Note that while we + * do copy ESR:ST to _PAGE_RW position as trying to write + * to an RO page is pretty common, we don't do it with + * _PAGE_DIRTY. We could do it, but it's a fairly rare + * event so I'd rather take the overhead when it happens + * rather than adding an instruction here. We should measure + * whether the whole thing is worth it in the first place + * as we could avoid loading SPRN_ESR completely in the first + * place... + * + * TODO: Is it worth doing that mfspr & rlwimi in the first + * place or can we save a couple of instructions here ? + */ + mfspr r12,SPRN_ESR + li r13,_PAGE_PRESENT|_PAGE_ACCESSED + rlwimi r13,r12,10,30,30 + + /* Load the PTE */ rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ lwzx r11, r12, r11 /* Get pgd/pmd entry */ rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ beq 2f /* Bail if no table */ rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ + lwz r11, 0(r12) /* Get high word of pte entry */ + lwz r12, 4(r12) /* Get low word of pte entry */ - ori r11, r11, _PAGE_ACCESSED - stw r11, 4(r12) + lis r10,tlb_44x_index@ha + + andc. r13,r13,r12 /* Check permission */ + + /* Load the next available TLB index */ + lwz r13,tlb_44x_index@l(r10) + + bne 2f /* Bail if permission mismach */ + + /* Increment, rollover, and store TLB index */ + addi r13,r13,1 + + /* Compare with watermark (instruction gets patched) */ + .globl tlb_44x_patch_hwater_D +tlb_44x_patch_hwater_D: + cmpwi 0,r13,1 /* reserve entries */ + ble 5f + li r13,0 +5: + /* Store the next available TLB index */ + stw r13,tlb_44x_index@l(r10) + + /* Re-load the faulting address */ + mfspr r10,SPRN_DEAR /* Jump to common tlb load */ b finish_tlb_load @@ -510,7 +438,7 @@ interrupt_base: mfspr r12, SPRN_SPRG4R mfspr r11, SPRN_SPRG1 mfspr r10, SPRN_SPRG0 - b data_access + b DataStorage /* Instruction TLB Error Interrupt */ /* @@ -554,18 +482,42 @@ interrupt_base: 4: mtspr SPRN_MMUCR,r12 + /* Make up the required permissions */ + li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC + rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ lwzx r11, r12, r11 /* Get pgd/pmd entry */ rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ beq 2f /* Bail if no table */ rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ + lwz r11, 0(r12) /* Get high word of pte entry */ + lwz r12, 4(r12) /* Get low word of pte entry */ - ori r11, r11, _PAGE_ACCESSED - stw r11, 4(r12) + lis r10,tlb_44x_index@ha + + andc. r13,r13,r12 /* Check permission */ + + /* Load the next available TLB index */ + lwz r13,tlb_44x_index@l(r10) + + bne 2f /* Bail if permission mismach */ + + /* Increment, rollover, and store TLB index */ + addi r13,r13,1 + + /* Compare with watermark (instruction gets patched) */ + .globl tlb_44x_patch_hwater_I +tlb_44x_patch_hwater_I: + cmpwi 0,r13,1 /* reserve entries */ + ble 5f + li r13,0 +5: + /* Store the next available TLB index */ + stw r13,tlb_44x_index@l(r10) + + /* Re-load the faulting address */ + mfspr r10,SPRN_SRR0 /* Jump to common TLB load point */ b finish_tlb_load @@ -587,86 +539,40 @@ interrupt_base: /* * Local functions - */ - /* - * Data TLB exceptions will bail out to this point - * if they can't resolve the lightweight TLB fault. - */ -data_access: - NORMAL_EXCEPTION_PROLOG - mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ - stw r5,_ESR(r11) - mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ - EXC_XFER_EE_LITE(0x0300, handle_page_fault) + */ /* * Both the instruction and data TLB miss get to this * point to load the TLB. * r10 - EA of fault - * r11 - available to use - * r12 - Pointer to the 64-bit PTE - * r13 - available to use + * r11 - PTE high word value + * r12 - PTE low word value + * r13 - TLB index * MMUCR - loaded with proper value when we get here * Upon exit, we reload everything and RFI. */ finish_tlb_load: - /* - * We set execute, because we don't have the granularity to - * properly set this at the page level (Linux problem). - * If shared is set, we cause a zero PID->TID load. - * Many of these bits are software only. Bits we don't set - * here we (properly should) assume have the appropriate value. - */ - - /* Load the next available TLB index */ - lis r13, tlb_44x_index@ha - lwz r13, tlb_44x_index@l(r13) - /* Load the TLB high watermark */ - lis r11, tlb_44x_hwater@ha - lwz r11, tlb_44x_hwater@l(r11) - - /* Increment, rollover, and store TLB index */ - addi r13, r13, 1 - cmpw 0, r13, r11 /* reserve entries */ - ble 7f - li r13, 0 -7: - /* Store the next available TLB index */ - lis r11, tlb_44x_index@ha - stw r13, tlb_44x_index@l(r11) - - lwz r11, 0(r12) /* Get MS word of PTE */ - lwz r12, 4(r12) /* Get LS word of PTE */ - rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */ - tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */ + /* Combine RPN & ERPN an write WS 0 */ + rlwimi r11,r12,0,0,19 + tlbwe r11,r13,PPC44x_TLB_XLAT /* - * Create PAGEID. This is the faulting address, + * Create WS1. This is the faulting address (EPN), * page size, and valid flag. */ - li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K - rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */ - tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */ - - li r10, PPC44x_TLB_SR@l /* Set SR */ - rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */ - rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */ - rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */ - rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */ - and r11, r12, r11 /* HWEXEC & USER */ - rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ - - rlwimi r12, r10, 0, 26, 31 /* Insert static perms */ - - /* - * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added - * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see - * include/asm-powerpc/pgtable-ppc32.h for details). - */ - rlwinm r12, r12, 0, 20, 10 - - tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */ + li r11,PPC44x_TLB_VALID | PPC44x_TLB_4K + rlwimi r10,r11,0,20,31 /* Insert valid and page size*/ + tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */ + + /* And WS 2 */ + li r10,0xf85 /* Mask to apply from PTE */ + rlwimi r10,r12,29,30,30 /* DIRTY -> SW position */ + and r11,r12,r10 /* Mask PTE bits to keep */ + andi. r10,r12,_PAGE_USER /* User page ? */ + beq 1f /* nope, leave U bits empty */ + rlwimi r11,r11,3,26,28 /* yes, copy S bits to U */ +1: tlbwe r11,r13,PPC44x_TLB_ATTRIB /* Write ATTRIB */ /* Done...restore registers and get out of here. */ @@ -742,15 +648,6 @@ empty_zero_page: swapper_pg_dir: .space PGD_TABLE_SIZE -/* Reserved 4k for the critical exception stack & 4k for the machine - * check stack per CPU for kernel mode exceptions */ - .section .bss - .align 12 -exception_stack_bottom: - .space BOOKE_EXCEPTION_STACK_SIZE - .globl exception_stack_top -exception_stack_top: - /* * Room for two PTE pointers, usually the kernel and current user pointers * to their respective root page table. diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index 25e84c0e116695e37d416296e34eb6f8cfc28ba6..cc8fb474d5204ed3c2cf2c48bd754b1fdf3758c9 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S @@ -275,7 +275,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) . = 0xf00 b performance_monitor_pSeries - STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable) + . = 0xf20 + b altivec_unavailable_pSeries + + . = 0xf40 + b vsx_unavailable_pSeries #ifdef CONFIG_CBE_RAS HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) @@ -295,6 +299,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) /* moved from 0xf00 */ STD_EXCEPTION_PSERIES(., performance_monitor) + STD_EXCEPTION_PSERIES(., altivec_unavailable) + STD_EXCEPTION_PSERIES(., vsx_unavailable) /* * An interrupt came in while soft-disabled; clear EE in SRR1, @@ -739,7 +745,8 @@ fp_unavailable_common: ENABLE_INTS bl .kernel_fp_unavailable_exception BUG_OPCODE -1: b .load_up_fpu +1: bl .load_up_fpu + b fast_exception_return .align 7 .globl altivec_unavailable_common @@ -747,7 +754,10 @@ altivec_unavailable_common: EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) #ifdef CONFIG_ALTIVEC BEGIN_FTR_SECTION - bne .load_up_altivec /* if from user, just load it up */ + beq 1f + bl .load_up_altivec + b fast_exception_return +1: END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) #endif bl .save_nvgprs @@ -827,9 +837,70 @@ _STATIC(load_up_altivec) std r4,0(r3) #endif /* CONFIG_SMP */ /* restore registers and return */ - b fast_exception_return + blr #endif /* CONFIG_ALTIVEC */ + .align 7 + .globl vsx_unavailable_common +vsx_unavailable_common: + EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) +#ifdef CONFIG_VSX +BEGIN_FTR_SECTION + bne .load_up_vsx +1: +END_FTR_SECTION_IFSET(CPU_FTR_VSX) +#endif + bl .save_nvgprs + addi r3,r1,STACK_FRAME_OVERHEAD + ENABLE_INTS + bl .vsx_unavailable_exception + b .ret_from_except + +#ifdef CONFIG_VSX +/* + * load_up_vsx(unused, unused, tsk) + * Disable VSX for the task which had it previously, + * and save its vector registers in its thread_struct. + * Reuse the fp and vsx saves, but first check to see if they have + * been saved already. + * On entry: r13 == 'current' && last_task_used_vsx != 'current' + */ +_STATIC(load_up_vsx) +/* Load FP and VSX registers if they haven't been done yet */ + andi. r5,r12,MSR_FP + beql+ load_up_fpu /* skip if already loaded */ + andis. r5,r12,MSR_VEC@h + beql+ load_up_altivec /* skip if already loaded */ + +#ifndef CONFIG_SMP + ld r3,last_task_used_vsx@got(r2) + ld r4,0(r3) + cmpdi 0,r4,0 + beq 1f + /* Disable VSX for last_task_used_vsx */ + addi r4,r4,THREAD + ld r5,PT_REGS(r4) + ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) + lis r6,MSR_VSX@h + andc r6,r4,r6 + std r6,_MSR-STACK_FRAME_OVERHEAD(r5) +1: +#endif /* CONFIG_SMP */ + ld r4,PACACURRENT(r13) + addi r4,r4,THREAD /* Get THREAD */ + li r6,1 + stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */ + /* enable use of VSX after return */ + oris r12,r12,MSR_VSX@h + std r12,_MSR(r1) +#ifndef CONFIG_SMP + /* Update last_task_used_math to 'current' */ + ld r4,PACACURRENT(r13) + std r4,0(r3) +#endif /* CONFIG_SMP */ + b fast_exception_return +#endif /* CONFIG_VSX */ + /* * Hash table stuff */ @@ -1127,7 +1198,6 @@ _GLOBAL(generic_secondary_smp_init) 3: HMT_LOW lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ /* start. */ - sync #ifndef CONFIG_SMP b 3b /* Never go on non-SMP */ @@ -1135,6 +1205,8 @@ _GLOBAL(generic_secondary_smp_init) cmpwi 0,r23,0 beq 3b /* Loop until told to go */ + sync /* order paca.run and cur_cpu_spec */ + /* See if we need to call a cpu state restore handler */ LOAD_REG_IMMEDIATE(r23, cur_cpu_spec) ld r23,0(r23) diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index aefafc6330c9497be4d7c8c8b2cf9f5e63b51749..fce2df988504d6e8962b31656ceec6dceff7ac44 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h @@ -43,9 +43,7 @@ SAVE_2GPRS(7, r11) /* To handle the additional exception priority levels on 40x and Book-E - * processors we allocate a 4k stack per additional priority level. The various - * head_xxx.S files allocate space (exception_stack_top) for each priority's - * stack times the number of CPUs + * processors we allocate a stack per additional priority level. * * On 40x critical is the only additional level * On 44x/e500 we have critical and machine check @@ -61,36 +59,37 @@ * going to critical or their own debug level we aren't currently * providing configurations that micro-optimize space usage. */ -#ifdef CONFIG_44x -#define NUM_EXCEPTION_LVLS 2 -#else -#define NUM_EXCEPTION_LVLS 3 -#endif -#define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS) /* CRIT_SPRG only used in critical exception handling */ #define CRIT_SPRG SPRN_SPRG2 /* MCHECK_SPRG only used in machine check exception handling */ #define MCHECK_SPRG SPRN_SPRG6W -#define MCHECK_STACK_TOP (exception_stack_top - 4096) -#define CRIT_STACK_TOP (exception_stack_top) +#define MCHECK_STACK_BASE mcheckirq_ctx +#define CRIT_STACK_BASE critirq_ctx -/* only on e200 for now */ -#define DEBUG_STACK_TOP (exception_stack_top - 8192) +/* only on e500mc/e200 */ +#define DEBUG_STACK_BASE dbgirq_ctx +#ifdef CONFIG_PPC_E500MC +#define DEBUG_SPRG SPRN_SPRG9 +#else #define DEBUG_SPRG SPRN_SPRG6W +#endif + +#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) #ifdef CONFIG_SMP #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ mfspr r8,SPRN_PIR; \ - mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \ - neg r8,r8; \ - addis r8,r8,level##_STACK_TOP@ha; \ - addi r8,r8,level##_STACK_TOP@l + slwi r8,r8,2; \ + addis r8,r8,level##_STACK_BASE@ha; \ + lwz r8,level##_STACK_BASE@l(r8); \ + addi r8,r8,EXC_LVL_FRAME_OVERHEAD; #else #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ - lis r8,level##_STACK_TOP@h; \ - ori r8,r8,level##_STACK_TOP@l + lis r8,level##_STACK_BASE@ha; \ + lwz r8,level##_STACK_BASE@l(r8); \ + addi r8,r8,EXC_LVL_FRAME_OVERHEAD; #endif /* @@ -104,22 +103,36 @@ #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ mtspr exc_level##_SPRG,r8; \ BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ - stw r10,GPR10-INT_FRAME_SIZE(r8); \ - stw r11,GPR11-INT_FRAME_SIZE(r8); \ - mfcr r10; /* save CR in r10 for now */\ - mfspr r11,exc_level_srr1; /* check whether user or kernel */\ - andi. r11,r11,MSR_PR; \ - mr r11,r8; \ - mfspr r8,exc_level##_SPRG; \ - beq 1f; \ - /* COMING FROM USER MODE */ \ + stw r9,GPR9(r8); /* save various registers */\ + mfcr r9; /* save CR in r9 for now */\ + stw r10,GPR10(r8); \ + stw r11,GPR11(r8); \ + stw r9,_CCR(r8); /* save CR on stack */\ + mfspr r10,exc_level_srr1; /* check whether user or kernel */\ + andi. r10,r10,MSR_PR; \ mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ - addi r11,r11,THREAD_SIZE; \ -1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ - stw r10,_CCR(r11); /* save various registers */\ - stw r12,GPR12(r11); \ + addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\ + beq 1f; \ + /* COMING FROM USER MODE */ \ + stw r9,_CCR(r11); /* save CR */\ + lwz r10,GPR10(r8); /* copy regs from exception stack */\ + lwz r9,GPR9(r8); \ + stw r10,GPR10(r11); \ + lwz r10,GPR11(r8); \ stw r9,GPR9(r11); \ + stw r10,GPR11(r11); \ + b 2f; \ + /* COMING FROM PRIV MODE */ \ +1: lwz r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r11); \ + lwz r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r11); \ + stw r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r8); \ + stw r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r8); \ + lwz r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r11); \ + stw r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r8); \ + mr r11,r8; \ +2: mfspr r8,exc_level##_SPRG; \ + stw r12,GPR12(r11); /* save various registers */\ mflr r10; \ stw r10,_LINK(r11); \ mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ @@ -231,7 +244,7 @@ label: * the code where the exception occurred (since exception entry \ * doesn't turn off DE automatically). We simulate the effect \ * of turning off DE on entry to an exception handler by turning \ - * off DE in the CSRR1 value and clearing the debug status. \ + * off DE in the DSRR1 value and clearing the debug status. \ */ \ mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ andis. r10,r10,DBSR_IC@h; \ @@ -262,17 +275,17 @@ label: lwz r12,GPR12(r11); \ mtspr DEBUG_SPRG,r8; \ BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ - lwz r10,GPR10-INT_FRAME_SIZE(r8); \ - lwz r11,GPR11-INT_FRAME_SIZE(r8); \ + lwz r10,GPR10(r8); \ + lwz r11,GPR11(r8); \ mfspr r8,DEBUG_SPRG; \ \ RFDI; \ b .; \ \ - /* continue normal handling for a critical exception... */ \ + /* continue normal handling for a debug exception... */ \ 2: mfspr r4,SPRN_DBSR; \ addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) + EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) #define DEBUG_CRIT_EXCEPTION \ START_EXCEPTION(DebugCrit); \ @@ -315,8 +328,8 @@ label: lwz r12,GPR12(r11); \ mtspr CRIT_SPRG,r8; \ BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ - lwz r10,GPR10-INT_FRAME_SIZE(r8); \ - lwz r11,GPR11-INT_FRAME_SIZE(r8); \ + lwz r10,GPR10(r8); \ + lwz r11,GPR11(r8); \ mfspr r8,CRIT_SPRG; \ \ rfci; \ @@ -327,6 +340,14 @@ label: addi r3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) +#define DATA_STORAGE_EXCEPTION \ + START_EXCEPTION(DataStorage) \ + NORMAL_EXCEPTION_PROLOG; \ + mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \ + stw r5,_ESR(r11); \ + mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \ + EXC_XFER_EE_LITE(0x0300, handle_page_fault) + #define INSTRUCTION_STORAGE_EXCEPTION \ START_EXCEPTION(InstructionStorage) \ NORMAL_EXCEPTION_PROLOG; \ @@ -363,8 +384,31 @@ label: #define FP_UNAVAILABLE_EXCEPTION \ START_EXCEPTION(FloatingPointUnavailable) \ NORMAL_EXCEPTION_PROLOG; \ - bne load_up_fpu; /* if from user, just load it up */ \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ + beq 1f; \ + bl load_up_fpu; /* if from user, just load it up */ \ + b fast_exception_return; \ +1: addi r3,r1,STACK_FRAME_OVERHEAD; \ EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) +#ifndef __ASSEMBLY__ +struct exception_regs { + unsigned long mas0; + unsigned long mas1; + unsigned long mas2; + unsigned long mas3; + unsigned long mas6; + unsigned long mas7; + unsigned long srr0; + unsigned long srr1; + unsigned long csrr0; + unsigned long csrr1; + unsigned long dsrr0; + unsigned long dsrr1; + unsigned long saved_ksp_limit; +}; + +/* ensure this structure is always sized to a multiple of the stack alignment */ +#define STACK_EXC_LVL_FRAME_SIZE _ALIGN_UP(sizeof (struct exception_regs), 16) + +#endif /* __ASSEMBLY__ */ #endif /* __HEAD_BOOKE_H__ */ diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index e581524d85bc9ee040bef175426d85c4a03b0cc6..3cb52fa0eda319a7ff52c496e89802b162a5c56f 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -39,6 +39,7 @@ #include #include #include +#include #include "head_booke.h" /* As with the other PowerPC ports, it is expected that when code @@ -150,16 +151,11 @@ skpinv: addi r6,r6,1 /* Increment */ /* Invalidate TLB0 */ li r6,0x04 tlbivax 0,r6 -#ifdef CONFIG_SMP - tlbsync -#endif + TLBSYNC /* Invalidate TLB1 */ li r6,0x0c tlbivax 0,r6 -#ifdef CONFIG_SMP - tlbsync -#endif - msync + TLBSYNC /* 3. Setup a temp mapping and jump to it */ andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ @@ -237,10 +233,7 @@ skpinv: addi r6,r6,1 /* Increment */ /* Invalidate TLB1 */ li r9,0x0c tlbivax 0,r9 -#ifdef CONFIG_SMP - tlbsync -#endif - msync + TLBSYNC /* 6. Setup KERNELBASE mapping in TLB1[0] */ lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ @@ -282,10 +275,7 @@ skpinv: addi r6,r6,1 /* Increment */ /* Invalidate TLB1 */ li r9,0x0c tlbivax 0,r9 -#ifdef CONFIG_SMP - tlbsync -#endif - msync + TLBSYNC /* Establish the interrupt vector offsets */ SET_IVOR(0, CriticalInput); @@ -304,7 +294,7 @@ skpinv: addi r6,r6,1 /* Increment */ SET_IVOR(13, DataTLBError); SET_IVOR(14, InstructionTLBError); SET_IVOR(15, DebugDebug); -#if defined(CONFIG_E500) +#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) SET_IVOR(15, DebugCrit); #endif SET_IVOR(32, SPEUnavailable); @@ -313,6 +303,9 @@ skpinv: addi r6,r6,1 /* Increment */ #ifndef CONFIG_E200 SET_IVOR(35, PerformanceMonitor); #endif +#ifdef CONFIG_PPC_E500MC + SET_IVOR(36, Doorbell); +#endif /* Establish the interrupt vector base */ lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ @@ -479,90 +472,16 @@ interrupt_base: /* Data Storage Interrupt */ START_EXCEPTION(DataStorage) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 - mtspr SPRN_SPRG4W, r12 - mtspr SPRN_SPRG5W, r13 - mfcr r11 - mtspr SPRN_SPRG7W, r11 - - /* - * Check if it was a store fault, if not then bail - * because a user tried to access a kernel or - * read-protected page. Otherwise, get the - * offending address and handle it. - */ - mfspr r10, SPRN_ESR - andis. r10, r10, ESR_ST@h - beq 2f - - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, PAGE_OFFSET@h - cmplw 0, r10, r11 - bge 2f - - /* Get the PGD for the current thread */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) -4: - FIND_PTE - - /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */ - andi. r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE - cmpwi 0, r13, _PAGE_RW|_PAGE_USER - bne 2f /* Bail if not */ - - /* Update 'changed'. */ - ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE - stw r11, PTE_FLAGS_OFFSET(r12) /* Update Linux page table */ - - /* MAS2 not updated as the entry does exist in the tlb, this - fault taken to detect state transition (eg: COW -> DIRTY) - */ - andi. r11, r11, _PAGE_HWEXEC - rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */ - ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */ - - /* update search PID in MAS6, AS = 0 */ - mfspr r12, SPRN_PID0 - slwi r12, r12, 16 - mtspr SPRN_MAS6, r12 - - /* find the TLB index that caused the fault. It has to be here. */ - tlbsx 0, r10 - - /* only update the perm bits, assume the RPN is fine */ - mfspr r12, SPRN_MAS3 - rlwimi r12, r11, 0, 20, 31 - mtspr SPRN_MAS3,r12 - tlbwe - - /* Done...restore registers and get out of here. */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - rfi /* Force context change */ - -2: - /* - * The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b data_access + NORMAL_EXCEPTION_PROLOG + mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ + stw r5,_ESR(r11) + mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ + andis. r10,r5,(ESR_ILK|ESR_DLK)@h + bne 1f + EXC_XFER_EE_LITE(0x0300, handle_page_fault) +1: + addi r3,r1,STACK_FRAME_OVERHEAD + EXC_XFER_EE_LITE(0x0300, CacheLockingException) /* Instruction Storage Interrupt */ INSTRUCTION_STORAGE_EXCEPTION @@ -641,15 +560,30 @@ interrupt_base: lwz r11,PGDIR(r11) 4: + /* Mask of required permission bits. Note that while we + * do copy ESR:ST to _PAGE_RW position as trying to write + * to an RO page is pretty common, we don't do it with + * _PAGE_DIRTY. We could do it, but it's a fairly rare + * event so I'd rather take the overhead when it happens + * rather than adding an instruction here. We should measure + * whether the whole thing is worth it in the first place + * as we could avoid loading SPRN_ESR completely in the first + * place... + * + * TODO: Is it worth doing that mfspr & rlwimi in the first + * place or can we save a couple of instructions here ? + */ + mfspr r12,SPRN_ESR + li r13,_PAGE_PRESENT|_PAGE_ACCESSED + rlwimi r13,r12,11,29,29 + FIND_PTE - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ + andc. r13,r13,r11 /* Check permission */ + bne 2f /* Bail if permission mismach */ #ifdef CONFIG_PTE_64BIT lwz r13, 0(r12) #endif - ori r11, r11, _PAGE_ACCESSED - stw r11, PTE_FLAGS_OFFSET(r12) /* Jump to common tlb load */ b finish_tlb_load @@ -663,7 +597,7 @@ interrupt_base: mfspr r12, SPRN_SPRG4R mfspr r11, SPRN_SPRG1 mfspr r10, SPRN_SPRG0 - b data_access + b DataStorage /* Instruction TLB Error Interrupt */ /* @@ -701,15 +635,16 @@ interrupt_base: lwz r11,PGDIR(r11) 4: + /* Make up the required permissions */ + li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC + FIND_PTE - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ + andc. r13,r13,r11 /* Check permission */ + bne 2f /* Bail if permission mismach */ #ifdef CONFIG_PTE_64BIT lwz r13, 0(r12) #endif - ori r11, r11, _PAGE_ACCESSED - stw r11, PTE_FLAGS_OFFSET(r12) /* Jump to common TLB load point */ b finish_tlb_load @@ -750,10 +685,13 @@ interrupt_base: /* Performance Monitor */ EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) +#ifdef CONFIG_PPC_E500MC + EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE) +#endif /* Debug Interrupt */ DEBUG_DEBUG_EXCEPTION -#if defined(CONFIG_E500) +#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) DEBUG_CRIT_EXCEPTION #endif @@ -761,29 +699,13 @@ interrupt_base: * Local functions */ - /* - * Data TLB exceptions will bail out to this point - * if they can't resolve the lightweight TLB fault. - */ -data_access: - NORMAL_EXCEPTION_PROLOG - mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ - stw r5,_ESR(r11) - mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ - andis. r10,r5,(ESR_ILK|ESR_DLK)@h - bne 1f - EXC_XFER_EE_LITE(0x0300, handle_page_fault) -1: - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE_LITE(0x0300, CacheLockingException) - /* - * Both the instruction and data TLB miss get to this * point to load the TLB. * r10 - EA of fault * r11 - TLB (info from Linux PTE) - * r12, r13 - available to use + * r12 - available to use + * r13 - upper bits of PTE (if PTE_64BIT) or available to use * CR5 - results of addr >= PAGE_OFFSET * MAS0, MAS1 - loaded with proper value when we get here * MAS2, MAS3 - will need additional info from Linux PTE @@ -805,20 +727,14 @@ finish_tlb_load: #endif mtspr SPRN_MAS2, r12 - bge 5, 1f - - /* is user addr */ - andi. r12, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC) + li r10, (_PAGE_HWEXEC | _PAGE_PRESENT) + rlwimi r10, r11, 31, 29, 29 /* extract _PAGE_DIRTY into SW */ + and r12, r11, r10 andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */ - srwi r10, r12, 1 - or r12, r12, r10 /* Copy user perms into supervisor */ - iseleq r12, 0, r12 - b 2f - - /* is kernel addr */ -1: rlwinm r12, r11, 31, 29, 29 /* Extract _PAGE_HWWRITE into SW */ - ori r12, r12, (MAS3_SX | MAS3_SR) - + slwi r10, r12, 1 + or r10, r10, r12 + iseleq r12, r12, r10 + #ifdef CONFIG_PTE_64BIT 2: rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */ rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */ @@ -1065,6 +981,52 @@ _GLOBAL(set_context) isync /* Force context change */ blr +_GLOBAL(flush_dcache_L1) + mfspr r3,SPRN_L1CFG0 + + rlwinm r5,r3,9,3 /* Extract cache block size */ + twlgti r5,1 /* Only 32 and 64 byte cache blocks + * are currently defined. + */ + li r4,32 + subfic r6,r5,2 /* r6 = log2(1KiB / cache block size) - + * log2(number of ways) + */ + slw r5,r4,r5 /* r5 = cache block size */ + + rlwinm r7,r3,0,0xff /* Extract number of KiB in the cache */ + mulli r7,r7,13 /* An 8-way cache will require 13 + * loads per set. + */ + slw r7,r7,r6 + + /* save off HID0 and set DCFA */ + mfspr r8,SPRN_HID0 + ori r9,r8,HID0_DCFA@l + mtspr SPRN_HID0,r9 + isync + + lis r4,KERNELBASE@h + mtctr r7 + +1: lwz r3,0(r4) /* Load... */ + add r4,r4,r5 + bdnz 1b + + msync + lis r4,KERNELBASE@h + mtctr r7 + +1: dcbf 0,r4 /* ...and flush. */ + add r4,r4,r5 + bdnz 1b + + /* restore HID0 */ + mtspr SPRN_HID0,r8 + isync + + blr + /* * We put a few things here that have to be page-aligned. This stuff * goes at the beginning of the data segment, which is page-aligned. @@ -1080,15 +1042,6 @@ empty_zero_page: swapper_pg_dir: .space PGD_TABLE_SIZE -/* Reserved 4k for the critical exception stack & 4k for the machine - * check stack per CPU for kernel mode exceptions */ - .section .bss - .align 12 -exception_stack_bottom: - .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS - .globl exception_stack_top -exception_stack_top: - /* * Room for two PTE pointers, usually the kernel and current user pointers * to their respective root page table. diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c index 9971159c80406d72e4f3b9806fcd7d6d60f5cec3..9d42eb57aea3305f1ad866f6709c988363681891 100644 --- a/arch/powerpc/kernel/ibmebus.c +++ b/arch/powerpc/kernel/ibmebus.c @@ -53,7 +53,7 @@ static struct device ibmebus_bus_device = { /* fake "parent" device */ struct bus_type ibmebus_bus_type; /* These devices will automatically be added to the bus during init */ -static struct of_device_id __initdata builtin_matches[] = { +static struct of_device_id __initdata ibmebus_matches[] = { { .compatible = "IBM,lhca" }, { .compatible = "IBM,lhea" }, {}, @@ -82,7 +82,8 @@ static void ibmebus_free_coherent(struct device *dev, static dma_addr_t ibmebus_map_single(struct device *dev, void *ptr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { return (dma_addr_t)(ptr); } @@ -90,14 +91,16 @@ static dma_addr_t ibmebus_map_single(struct device *dev, static void ibmebus_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { return; } static int ibmebus_map_sg(struct device *dev, struct scatterlist *sgl, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) { struct scatterlist *sg; int i; @@ -112,7 +115,8 @@ static int ibmebus_map_sg(struct device *dev, static void ibmebus_unmap_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) { return; } @@ -350,7 +354,7 @@ static int __init ibmebus_bus_init(void) return err; } - err = ibmebus_create_devices(builtin_matches); + err = ibmebus_create_devices(ibmebus_matches); if (err) { device_unregister(&ibmebus_bus_device); bus_unregister(&ibmebus_bus_type); diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c index c3cf0e8f3ac173332a01148946ace8c43f45a5a5..d308a9f70f1b81b970ef0f13df10454f0deee3d9 100644 --- a/arch/powerpc/kernel/idle.c +++ b/arch/powerpc/kernel/idle.c @@ -60,7 +60,7 @@ void cpu_idle(void) set_thread_flag(TIF_POLLING_NRFLAG); while (1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched() && !cpu_should_die()) { ppc64_runlatch_off(); diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S index 01bcd52bbf8e11f8594987f41a69a795a848071b..019b02d8844f86c0a2325520fffb4b1a0e62e8a7 100644 --- a/arch/powerpc/kernel/idle_6xx.S +++ b/arch/powerpc/kernel/idle_6xx.S @@ -153,7 +153,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) * address of current. R11 points to the exception frame (physical * address). We have to preserve r10. */ -_GLOBAL(power_save_6xx_restore) +_GLOBAL(power_save_ppc32_restore) lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */ stw r9,_NIP(r11) /* make it do a blr */ diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S new file mode 100644 index 0000000000000000000000000000000000000000..06304034b3939e63cb619849fc5d80ebd6b07ce4 --- /dev/null +++ b/arch/powerpc/kernel/idle_e500.S @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. + * Dave Liu + * copy from idle_6xx.S and modify for e500 based processor, + * implement the power_save function in idle. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include + + .text + +_GLOBAL(e500_idle) + rlwinm r3,r1,0,0,31-THREAD_SHIFT /* current thread_info */ + lwz r4,TI_LOCAL_FLAGS(r3) /* set napping bit */ + ori r4,r4,_TLF_NAPPING /* so when we take an exception */ + stw r4,TI_LOCAL_FLAGS(r3) /* it will return to our caller */ + + /* Check if we can nap or doze, put HID0 mask in r3 */ + lis r3,0 +BEGIN_FTR_SECTION + lis r3,HID0_DOZE@h +END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE) + +BEGIN_FTR_SECTION + /* Now check if user enabled NAP mode */ + lis r4,powersave_nap@ha + lwz r4,powersave_nap@l(r4) + cmpwi 0,r4,0 + beq 1f + stwu r1,-16(r1) + mflr r0 + stw r0,20(r1) + bl flush_dcache_L1 + lwz r0,20(r1) + addi r1,r1,16 + mtlr r0 + lis r3,HID0_NAP@h +END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) +BEGIN_FTR_SECTION + msync + li r7,L2CSR0_L2FL@l + mtspr SPRN_L2CSR0,r7 +2: + mfspr r7,SPRN_L2CSR0 + andi. r4,r7,L2CSR0_L2FL@l + bne 2b +END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP) +1: + /* Go to NAP or DOZE now */ + mfspr r4,SPRN_HID0 + rlwinm r4,r4,0,~(HID0_DOZE|HID0_NAP|HID0_SLEEP) + or r4,r4,r3 + isync + mtspr SPRN_HID0,r4 + isync + + mfmsr r7 + oris r7,r7,MSR_WE@h + ori r7,r7,MSR_EE + msync + mtmsr r7 + isync +2: b 2b + +/* + * Return from NAP/DOZE mode, restore some CPU specific registers, + * r2 containing physical address of current. + * r11 points to the exception frame (physical address). + * We have to preserve r10. + */ +_GLOBAL(power_save_ppc32_restore) + lwz r9,_LINK(r11) /* interrupted in e500_idle */ + stw r9,_NIP(r11) /* make it do a blr */ + +#ifdef CONFIG_SMP + mfspr r12,SPRN_SPRG3 + lwz r11,TI_CPU(r12) /* get cpu number * 4 */ + slwi r11,r11,2 +#else + li r11,0 +#endif + b transfer_to_handler_cont diff --git a/arch/powerpc/kernel/io.c b/arch/powerpc/kernel/io.c index e31aca9208eba4a7cc711f52fdb5c755829fe0dc..1882bf419fa6f294db6adf46e15d2a428493c414 100644 --- a/arch/powerpc/kernel/io.c +++ b/arch/powerpc/kernel/io.c @@ -120,7 +120,8 @@ EXPORT_SYMBOL(_outsl_ns); #define IO_CHECK_ALIGN(v,a) ((((unsigned long)(v)) & ((a) - 1)) == 0) -void _memset_io(volatile void __iomem *addr, int c, unsigned long n) +notrace void +_memset_io(volatile void __iomem *addr, int c, unsigned long n) { void *p = (void __force *)addr; u32 lc = c; diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c index 0c663669bc32cc0dd3bc183368f2225bd5b4d0dc..550a19399bfaac81bceabfbeb60f4a29e0e0752f 100644 --- a/arch/powerpc/kernel/iommu.c +++ b/arch/powerpc/kernel/iommu.c @@ -49,6 +49,8 @@ static int novmerge = 1; static int protect4gb = 1; +static void __iommu_free(struct iommu_table *, dma_addr_t, unsigned int); + static inline unsigned long iommu_num_pages(unsigned long vaddr, unsigned long slen) { @@ -186,10 +188,12 @@ static unsigned long iommu_range_alloc(struct device *dev, static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl, void *page, unsigned int npages, enum dma_data_direction direction, - unsigned long mask, unsigned int align_order) + unsigned long mask, unsigned int align_order, + struct dma_attrs *attrs) { unsigned long entry, flags; dma_addr_t ret = DMA_ERROR_CODE; + int build_fail; spin_lock_irqsave(&(tbl->it_lock), flags); @@ -204,9 +208,21 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl, ret = entry << IOMMU_PAGE_SHIFT; /* Set the return dma address */ /* Put the TCEs in the HW table */ - ppc_md.tce_build(tbl, entry, npages, (unsigned long)page & IOMMU_PAGE_MASK, - direction); + build_fail = ppc_md.tce_build(tbl, entry, npages, + (unsigned long)page & IOMMU_PAGE_MASK, + direction, attrs); + + /* ppc_md.tce_build() only returns non-zero for transient errors. + * Clean up the table bitmap in this case and return + * DMA_ERROR_CODE. For all other errors the functionality is + * not altered. + */ + if (unlikely(build_fail)) { + __iommu_free(tbl, ret, npages); + spin_unlock_irqrestore(&(tbl->it_lock), flags); + return DMA_ERROR_CODE; + } /* Flush/invalidate TLB caches if necessary */ if (ppc_md.tce_flush) @@ -267,15 +283,15 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr, spin_unlock_irqrestore(&(tbl->it_lock), flags); } -int iommu_map_sg(struct device *dev, struct scatterlist *sglist, - int nelems, unsigned long mask, - enum dma_data_direction direction) +int iommu_map_sg(struct device *dev, struct iommu_table *tbl, + struct scatterlist *sglist, int nelems, + unsigned long mask, enum dma_data_direction direction, + struct dma_attrs *attrs) { - struct iommu_table *tbl = dev->archdata.dma_data; dma_addr_t dma_next = 0, dma_addr; unsigned long flags; struct scatterlist *s, *outs, *segstart; - int outcount, incount, i; + int outcount, incount, i, build_fail = 0; unsigned int align; unsigned long handle; unsigned int max_seg_size; @@ -336,7 +352,11 @@ int iommu_map_sg(struct device *dev, struct scatterlist *sglist, npages, entry, dma_addr); /* Insert into HW table */ - ppc_md.tce_build(tbl, entry, npages, vaddr & IOMMU_PAGE_MASK, direction); + build_fail = ppc_md.tce_build(tbl, entry, npages, + vaddr & IOMMU_PAGE_MASK, + direction, attrs); + if(unlikely(build_fail)) + goto failure; /* If we are in an open segment, try merging */ if (segstart != s) { @@ -412,7 +432,8 @@ int iommu_map_sg(struct device *dev, struct scatterlist *sglist, void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, - int nelems, enum dma_data_direction direction) + int nelems, enum dma_data_direction direction, + struct dma_attrs *attrs) { struct scatterlist *sg; unsigned long flags; @@ -554,7 +575,7 @@ void iommu_free_table(struct iommu_table *tbl, const char *node_name) */ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, void *vaddr, size_t size, unsigned long mask, - enum dma_data_direction direction) + enum dma_data_direction direction, struct dma_attrs *attrs) { dma_addr_t dma_handle = DMA_ERROR_CODE; unsigned long uaddr; @@ -572,7 +593,8 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, align = PAGE_SHIFT - IOMMU_PAGE_SHIFT; dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction, - mask >> IOMMU_PAGE_SHIFT, align); + mask >> IOMMU_PAGE_SHIFT, align, + attrs); if (dma_handle == DMA_ERROR_CODE) { if (printk_ratelimit()) { printk(KERN_INFO "iommu_alloc failed, " @@ -587,7 +609,8 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, } void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) + size_t size, enum dma_data_direction direction, + struct dma_attrs *attrs) { unsigned int npages; @@ -640,7 +663,7 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, nio_pages = size >> IOMMU_PAGE_SHIFT; io_order = get_iommu_order(size); mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL, - mask >> IOMMU_PAGE_SHIFT, io_order); + mask >> IOMMU_PAGE_SHIFT, io_order, NULL); if (mapping == DMA_ERROR_CODE) { free_pages((unsigned long)ret, order); return NULL; diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index bcc249d90c4deee52b8d6af1d711dc493e8fb7ad..6ac8612da3c32a61f0fae070fd158be9f6d706f6 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -98,7 +98,7 @@ EXPORT_SYMBOL(irq_desc); int distribute_irqs = 1; -static inline unsigned long get_hard_enabled(void) +static inline notrace unsigned long get_hard_enabled(void) { unsigned long enabled; @@ -108,13 +108,13 @@ static inline unsigned long get_hard_enabled(void) return enabled; } -static inline void set_soft_enabled(unsigned long enable) +static inline notrace void set_soft_enabled(unsigned long enable) { __asm__ __volatile__("stb %0,%1(13)" : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled))); } -void raw_local_irq_restore(unsigned long en) +notrace void raw_local_irq_restore(unsigned long en) { /* * get_paca()->soft_enabled = en; @@ -356,9 +356,42 @@ void __init init_IRQ(void) { if (ppc_md.init_IRQ) ppc_md.init_IRQ(); + + exc_lvl_ctx_init(); + irq_ctx_init(); } +#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) +struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; +struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; +struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; + +void exc_lvl_ctx_init(void) +{ + struct thread_info *tp; + int i; + + for_each_possible_cpu(i) { + memset((void *)critirq_ctx[i], 0, THREAD_SIZE); + tp = critirq_ctx[i]; + tp->cpu = i; + tp->preempt_count = 0; + +#ifdef CONFIG_BOOKE + memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); + tp = dbgirq_ctx[i]; + tp->cpu = i; + tp->preempt_count = 0; + + memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); + tp = mcheckirq_ctx[i]; + tp->cpu = i; + tp->preempt_count = HARDIRQ_OFFSET; +#endif + } +} +#endif #ifdef CONFIG_IRQSTACKS struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; @@ -465,7 +498,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node, host->revmap_type = revmap_type; host->inval_irq = inval_irq; host->ops = ops; - host->of_node = of_node; + host->of_node = of_node_get(of_node); if (host->ops->match == NULL) host->ops->match = default_irq_host_match; diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c new file mode 100644 index 0000000000000000000000000000000000000000..b4fdf2f2743ca6cb7497bba075f80b9b413d01dc --- /dev/null +++ b/arch/powerpc/kernel/kgdb.c @@ -0,0 +1,410 @@ +/* + * PowerPC backend to the KGDB stub. + * + * 1998 (c) Michael AK Tesch (tesch@cs.wisc.edu) + * Copyright (C) 2003 Timesys Corporation. + * Copyright (C) 2004-2006 MontaVista Software, Inc. + * PPC64 Mods (C) 2005 Frank Rowand (frowand@mvista.com) + * PPC32 support restored by Vitaly Wool and + * Sergei Shtylyov + * Copyright (C) 2007-2008 Wind River Systems, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program as licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * This table contains the mapping between PowerPC hardware trap types, and + * signals, which are primarily what GDB understands. GDB and the kernel + * don't always agree on values, so we use constants taken from gdb-6.2. + */ +static struct hard_trap_info +{ + unsigned int tt; /* Trap type code for powerpc */ + unsigned char signo; /* Signal that we map this trap into */ +} hard_trap_info[] = { + { 0x0100, 0x02 /* SIGINT */ }, /* system reset */ + { 0x0200, 0x0b /* SIGSEGV */ }, /* machine check */ + { 0x0300, 0x0b /* SIGSEGV */ }, /* data access */ + { 0x0400, 0x0b /* SIGSEGV */ }, /* instruction access */ + { 0x0500, 0x02 /* SIGINT */ }, /* external interrupt */ + { 0x0600, 0x0a /* SIGBUS */ }, /* alignment */ + { 0x0700, 0x05 /* SIGTRAP */ }, /* program check */ + { 0x0800, 0x08 /* SIGFPE */ }, /* fp unavailable */ + { 0x0900, 0x0e /* SIGALRM */ }, /* decrementer */ + { 0x0c00, 0x14 /* SIGCHLD */ }, /* system call */ +#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) + { 0x2002, 0x05 /* SIGTRAP */ }, /* debug */ +#if defined(CONFIG_FSL_BOOKE) + { 0x2010, 0x08 /* SIGFPE */ }, /* spe unavailable */ + { 0x2020, 0x08 /* SIGFPE */ }, /* spe unavailable */ + { 0x2030, 0x08 /* SIGFPE */ }, /* spe fp data */ + { 0x2040, 0x08 /* SIGFPE */ }, /* spe fp data */ + { 0x2050, 0x08 /* SIGFPE */ }, /* spe fp round */ + { 0x2060, 0x0e /* SIGILL */ }, /* performace monitor */ + { 0x2900, 0x08 /* SIGFPE */ }, /* apu unavailable */ + { 0x3100, 0x0e /* SIGALRM */ }, /* fixed interval timer */ + { 0x3200, 0x02 /* SIGINT */ }, /* watchdog */ +#else /* ! CONFIG_FSL_BOOKE */ + { 0x1000, 0x0e /* SIGALRM */ }, /* prog interval timer */ + { 0x1010, 0x0e /* SIGALRM */ }, /* fixed interval timer */ + { 0x1020, 0x02 /* SIGINT */ }, /* watchdog */ + { 0x2010, 0x08 /* SIGFPE */ }, /* fp unavailable */ + { 0x2020, 0x08 /* SIGFPE */ }, /* ap unavailable */ +#endif +#else /* ! (defined(CONFIG_40x) || defined(CONFIG_BOOKE)) */ + { 0x0d00, 0x05 /* SIGTRAP */ }, /* single-step */ +#if defined(CONFIG_8xx) + { 0x1000, 0x04 /* SIGILL */ }, /* software emulation */ +#else /* ! CONFIG_8xx */ + { 0x0f00, 0x04 /* SIGILL */ }, /* performance monitor */ + { 0x0f20, 0x08 /* SIGFPE */ }, /* altivec unavailable */ + { 0x1300, 0x05 /* SIGTRAP */ }, /* instruction address break */ +#if defined(CONFIG_PPC64) + { 0x1200, 0x05 /* SIGILL */ }, /* system error */ + { 0x1500, 0x04 /* SIGILL */ }, /* soft patch */ + { 0x1600, 0x04 /* SIGILL */ }, /* maintenance */ + { 0x1700, 0x08 /* SIGFPE */ }, /* altivec assist */ + { 0x1800, 0x04 /* SIGILL */ }, /* thermal */ +#else /* ! CONFIG_PPC64 */ + { 0x1400, 0x02 /* SIGINT */ }, /* SMI */ + { 0x1600, 0x08 /* SIGFPE */ }, /* altivec assist */ + { 0x1700, 0x04 /* SIGILL */ }, /* TAU */ + { 0x2000, 0x05 /* SIGTRAP */ }, /* run mode */ +#endif +#endif +#endif + { 0x0000, 0x00 } /* Must be last */ +}; + +static int computeSignal(unsigned int tt) +{ + struct hard_trap_info *ht; + + for (ht = hard_trap_info; ht->tt && ht->signo; ht++) + if (ht->tt == tt) + return ht->signo; + + return SIGHUP; /* default for things we don't know about */ +} + +static int kgdb_call_nmi_hook(struct pt_regs *regs) +{ + kgdb_nmicallback(raw_smp_processor_id(), regs); + return 0; +} + +#ifdef CONFIG_SMP +void kgdb_roundup_cpus(unsigned long flags) +{ + smp_send_debugger_break(MSG_ALL_BUT_SELF); +} +#endif + +/* KGDB functions to use existing PowerPC64 hooks. */ +static int kgdb_debugger(struct pt_regs *regs) +{ + return kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs); +} + +static int kgdb_handle_breakpoint(struct pt_regs *regs) +{ + if (user_mode(regs)) + return 0; + + if (kgdb_handle_exception(0, SIGTRAP, 0, regs) != 0) + return 0; + + if (*(u32 *) (regs->nip) == *(u32 *) (&arch_kgdb_ops.gdb_bpt_instr)) + regs->nip += 4; + + return 1; +} + +static int kgdb_singlestep(struct pt_regs *regs) +{ + struct thread_info *thread_info, *exception_thread_info; + + if (user_mode(regs)) + return 0; + + /* + * On Book E and perhaps other processsors, singlestep is handled on + * the critical exception stack. This causes current_thread_info() + * to fail, since it it locates the thread_info by masking off + * the low bits of the current stack pointer. We work around + * this issue by copying the thread_info from the kernel stack + * before calling kgdb_handle_exception, and copying it back + * afterwards. On most processors the copy is avoided since + * exception_thread_info == thread_info. + */ + thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1)); + exception_thread_info = current_thread_info(); + + if (thread_info != exception_thread_info) + memcpy(exception_thread_info, thread_info, sizeof *thread_info); + + kgdb_handle_exception(0, SIGTRAP, 0, regs); + + if (thread_info != exception_thread_info) + memcpy(thread_info, exception_thread_info, sizeof *thread_info); + + return 1; +} + +static int kgdb_iabr_match(struct pt_regs *regs) +{ + if (user_mode(regs)) + return 0; + + if (kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs) != 0) + return 0; + return 1; +} + +static int kgdb_dabr_match(struct pt_regs *regs) +{ + if (user_mode(regs)) + return 0; + + if (kgdb_handle_exception(0, computeSignal(TRAP(regs)), 0, regs) != 0) + return 0; + return 1; +} + +#define PACK64(ptr, src) do { *(ptr++) = (src); } while (0) + +#define PACK32(ptr, src) do { \ + u32 *ptr32; \ + ptr32 = (u32 *)ptr; \ + *(ptr32++) = (src); \ + ptr = (unsigned long *)ptr32; \ + } while (0) + + +void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + unsigned long *ptr = gdb_regs; + int reg; + + memset(gdb_regs, 0, NUMREGBYTES); + + for (reg = 0; reg < 32; reg++) + PACK64(ptr, regs->gpr[reg]); + +#ifdef CONFIG_FSL_BOOKE +#ifdef CONFIG_SPE + for (reg = 0; reg < 32; reg++) + PACK64(ptr, current->thread.evr[reg]); +#else + ptr += 32; +#endif +#else + /* fp registers not used by kernel, leave zero */ + ptr += 32 * 8 / sizeof(long); +#endif + + PACK64(ptr, regs->nip); + PACK64(ptr, regs->msr); + PACK32(ptr, regs->ccr); + PACK64(ptr, regs->link); + PACK64(ptr, regs->ctr); + PACK32(ptr, regs->xer); + + BUG_ON((unsigned long)ptr > + (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); +} + +void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p) +{ + struct pt_regs *regs = (struct pt_regs *)(p->thread.ksp + + STACK_FRAME_OVERHEAD); + unsigned long *ptr = gdb_regs; + int reg; + + memset(gdb_regs, 0, NUMREGBYTES); + + /* Regs GPR0-2 */ + for (reg = 0; reg < 3; reg++) + PACK64(ptr, regs->gpr[reg]); + + /* Regs GPR3-13 are caller saved, not in regs->gpr[] */ + ptr += 11; + + /* Regs GPR14-31 */ + for (reg = 14; reg < 32; reg++) + PACK64(ptr, regs->gpr[reg]); + +#ifdef CONFIG_FSL_BOOKE +#ifdef CONFIG_SPE + for (reg = 0; reg < 32; reg++) + PACK64(ptr, p->thread.evr[reg]); +#else + ptr += 32; +#endif +#else + /* fp registers not used by kernel, leave zero */ + ptr += 32 * 8 / sizeof(long); +#endif + + PACK64(ptr, regs->nip); + PACK64(ptr, regs->msr); + PACK32(ptr, regs->ccr); + PACK64(ptr, regs->link); + PACK64(ptr, regs->ctr); + PACK32(ptr, regs->xer); + + BUG_ON((unsigned long)ptr > + (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); +} + +#define UNPACK64(dest, ptr) do { dest = *(ptr++); } while (0) + +#define UNPACK32(dest, ptr) do { \ + u32 *ptr32; \ + ptr32 = (u32 *)ptr; \ + dest = *(ptr32++); \ + ptr = (unsigned long *)ptr32; \ + } while (0) + +void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs) +{ + unsigned long *ptr = gdb_regs; + int reg; +#ifdef CONFIG_SPE + union { + u32 v32[2]; + u64 v64; + } acc; +#endif + + for (reg = 0; reg < 32; reg++) + UNPACK64(regs->gpr[reg], ptr); + +#ifdef CONFIG_FSL_BOOKE +#ifdef CONFIG_SPE + for (reg = 0; reg < 32; reg++) + UNPACK64(current->thread.evr[reg], ptr); +#else + ptr += 32; +#endif +#else + /* fp registers not used by kernel, leave zero */ + ptr += 32 * 8 / sizeof(int); +#endif + + UNPACK64(regs->nip, ptr); + UNPACK64(regs->msr, ptr); + UNPACK32(regs->ccr, ptr); + UNPACK64(regs->link, ptr); + UNPACK64(regs->ctr, ptr); + UNPACK32(regs->xer, ptr); + + BUG_ON((unsigned long)ptr > + (unsigned long)(((void *)gdb_regs) + NUMREGBYTES)); +} + +/* + * This function does PowerPC specific procesing for interfacing to gdb. + */ +int kgdb_arch_handle_exception(int vector, int signo, int err_code, + char *remcom_in_buffer, char *remcom_out_buffer, + struct pt_regs *linux_regs) +{ + char *ptr = &remcom_in_buffer[1]; + unsigned long addr; + + switch (remcom_in_buffer[0]) { + /* + * sAA..AA Step one instruction from AA..AA + * This will return an error to gdb .. + */ + case 's': + case 'c': + /* handle the optional parameter */ + if (kgdb_hex2long(&ptr, &addr)) + linux_regs->nip = addr; + + atomic_set(&kgdb_cpu_doing_single_step, -1); + /* set the trace bit if we're stepping */ + if (remcom_in_buffer[0] == 's') { +#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) + mtspr(SPRN_DBCR0, + mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); + linux_regs->msr |= MSR_DE; +#else + linux_regs->msr |= MSR_SE; +#endif + kgdb_single_step = 1; + if (kgdb_contthread) + atomic_set(&kgdb_cpu_doing_single_step, + raw_smp_processor_id()); + } + return 0; + } + + return -1; +} + +/* + * Global data + */ +struct kgdb_arch arch_kgdb_ops = { + .gdb_bpt_instr = {0x7d, 0x82, 0x10, 0x08}, +}; + +static int kgdb_not_implemented(struct pt_regs *regs) +{ + return 0; +} + +static void *old__debugger_ipi; +static void *old__debugger; +static void *old__debugger_bpt; +static void *old__debugger_sstep; +static void *old__debugger_iabr_match; +static void *old__debugger_dabr_match; +static void *old__debugger_fault_handler; + +int kgdb_arch_init(void) +{ + old__debugger_ipi = __debugger_ipi; + old__debugger = __debugger; + old__debugger_bpt = __debugger_bpt; + old__debugger_sstep = __debugger_sstep; + old__debugger_iabr_match = __debugger_iabr_match; + old__debugger_dabr_match = __debugger_dabr_match; + old__debugger_fault_handler = __debugger_fault_handler; + + __debugger_ipi = kgdb_call_nmi_hook; + __debugger = kgdb_debugger; + __debugger_bpt = kgdb_handle_breakpoint; + __debugger_sstep = kgdb_singlestep; + __debugger_iabr_match = kgdb_iabr_match; + __debugger_dabr_match = kgdb_dabr_match; + __debugger_fault_handler = kgdb_not_implemented; + + return 0; +} + +void kgdb_arch_exit(void) +{ + __debugger_ipi = old__debugger_ipi; + __debugger = old__debugger; + __debugger_bpt = old__debugger_bpt; + __debugger_sstep = old__debugger_sstep; + __debugger_iabr_match = old__debugger_iabr_match; + __debugger_dabr_match = old__debugger_dabr_match; + __debugger_fault_handler = old__debugger_fault_handler; +} diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index c176c513566b3c1a179661bae346142fa5cd4bd0..de79915452c87d917728acbeefbd70a2b738d242 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c @@ -34,6 +34,13 @@ #include #include #include +#include + +#ifdef CONFIG_BOOKE +#define MSR_SINGLESTEP (MSR_DE) +#else +#define MSR_SINGLESTEP (MSR_SE) +#endif DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); @@ -53,7 +60,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) ret = -EINVAL; } - /* insn must be on a special executable page on ppc64 */ + /* insn must be on a special executable page on ppc64. This is + * not explicitly required on ppc32 (right now), but it doesn't hurt */ if (!ret) { p->ainsn.insn = get_insn_slot(); if (!p->ainsn.insn) @@ -95,7 +103,16 @@ void __kprobes arch_remove_kprobe(struct kprobe *p) static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) { - regs->msr |= MSR_SE; + /* We turn off async exceptions to ensure that the single step will + * be for the instruction we have the kprobe on, if we dont its + * possible we'd get the single step reported for an exception handler + * like Decrementer or External Interrupt */ + regs->msr &= ~MSR_EE; + regs->msr |= MSR_SINGLESTEP; +#ifdef CONFIG_BOOKE + regs->msr &= ~MSR_CE; + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); +#endif /* * On powerpc we should single step on the original @@ -127,7 +144,6 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs, kcb->kprobe_saved_msr = regs->msr; } -/* Called with kretprobe_lock held */ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs) { @@ -158,7 +174,8 @@ static int __kprobes kprobe_handler(struct pt_regs *regs) kprobe_opcode_t insn = *p->ainsn.insn; if (kcb->kprobe_status == KPROBE_HIT_SS && is_trap(insn)) { - regs->msr &= ~MSR_SE; + /* Turn off 'trace' bits */ + regs->msr &= ~MSR_SINGLESTEP; regs->msr |= kcb->kprobe_saved_msr; goto no_kprobe; } @@ -294,8 +311,7 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, unsigned long trampoline_address =(unsigned long)&kretprobe_trampoline; INIT_HLIST_HEAD(&empty_rp); - spin_lock_irqsave(&kretprobe_lock, flags); - head = kretprobe_inst_table_head(current); + kretprobe_hash_lock(current, &head, &flags); /* * It is possible to have multiple instances associated with a given @@ -334,7 +350,7 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, regs->nip = orig_ret_address; reset_current_kprobe(); - spin_unlock_irqrestore(&kretprobe_lock, flags); + kretprobe_hash_unlock(current, &flags); preempt_enable_no_resched(); hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { @@ -376,6 +392,10 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs) if (!cur) return 0; + /* make sure we got here for instruction we have a kprobe on */ + if (((unsigned long)cur->ainsn.insn + 4) != regs->nip) + return 0; + if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) { kcb->kprobe_status = KPROBE_HIT_SSDONE; cur->post_handler(cur, regs, 0); @@ -395,10 +415,10 @@ out: /* * if somebody else is singlestepping across a probe point, msr - * will have SE set, in which case, continue the remaining processing + * will have DE/SE set, in which case, continue the remaining processing * of do_debug, as if this is not a probe hit. */ - if (regs->msr & MSR_SE) + if (regs->msr & MSR_SINGLESTEP) return 0; return 1; @@ -421,7 +441,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr) * normal page fault. */ regs->nip = (unsigned long)cur->addr; - regs->msr &= ~MSR_SE; + regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */ regs->msr |= kcb->kprobe_saved_msr; if (kcb->kprobe_status == KPROBE_REENTER) restore_previous_kprobe(kcb); @@ -498,7 +518,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, #ifdef CONFIG_PPC64 unsigned long arch_deref_entry_point(void *entry) { - return (unsigned long)(((func_descr_t *)entry)->entry); + return ((func_descr_t *)entry)->entry; } #endif diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 4d96e1db55ee276c6c7a1e5e7b063c38d926b338..9ddfaef1a184564fb85f2919220fe4d99c33aad9 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c @@ -493,18 +493,18 @@ static int __init serial_dev_init(void) device_initcall(serial_dev_init); +#ifdef CONFIG_SERIAL_8250_CONSOLE /* * This is called very early, as part of console_init() (typically just after * time_init()). This function is respondible for trying to find a good * default console on serial ports. It tries to match the open firmware - * default output with one of the available serial console drivers, either - * one of the platform serial ports that have been probed earlier by - * find_legacy_serial_ports() or some more platform specific ones. + * default output with one of the available serial console drivers that have + * been probed earlier by find_legacy_serial_ports() */ static int __init check_legacy_serial_console(void) { struct device_node *prom_stdout = NULL; - int speed = 0, offset = 0; + int i, speed = 0, offset = 0; const char *name; const u32 *spd; @@ -548,31 +548,20 @@ static int __init check_legacy_serial_console(void) if (spd) speed = *spd; - if (0) - ; -#ifdef CONFIG_SERIAL_8250_CONSOLE - else if (strcmp(name, "serial") == 0) { - int i; - /* Look for it in probed array */ - for (i = 0; i < legacy_serial_count; i++) { - if (prom_stdout != legacy_serial_infos[i].np) - continue; - offset = i; - speed = legacy_serial_infos[i].speed; - break; - } - if (i >= legacy_serial_count) - goto not_found; + if (strcmp(name, "serial") != 0) + goto not_found; + + /* Look for it in probed array */ + for (i = 0; i < legacy_serial_count; i++) { + if (prom_stdout != legacy_serial_infos[i].np) + continue; + offset = i; + speed = legacy_serial_infos[i].speed; + break; } -#endif /* CONFIG_SERIAL_8250_CONSOLE */ -#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE - else if (strcmp(name, "ch-a") == 0) - offset = 0; - else if (strcmp(name, "ch-b") == 0) - offset = 1; -#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */ - else + if (i >= legacy_serial_count) goto not_found; + of_node_put(prom_stdout); DBG("Found serial console at ttyS%d\n", offset); @@ -591,3 +580,4 @@ static int __init check_legacy_serial_console(void) } console_initcall(check_legacy_serial_console); +#endif /* CONFIG_SERIAL_8250_CONSOLE */ diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 1e656b43ad7fb87f45a71c393e9f96ea5e18a504..9f856a0c3e3876eb1bd6bbe1e2e2b41dba70bf16 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c @@ -34,8 +34,9 @@ #include #include #include +#include -#define MODULE_VERS "1.7" +#define MODULE_VERS "1.8" #define MODULE_NAME "lparcfg" /* #define LPARCFG_DEBUG */ @@ -129,32 +130,46 @@ static int iseries_lparcfg_data(struct seq_file *m, void *v) /* * Methods used to fetch LPAR data when running on a pSeries platform. */ -static void log_plpar_hcall_return(unsigned long rc, char *tag) +/** + * h_get_mpp + * H_GET_MPP hcall returns info in 7 parms + */ +int h_get_mpp(struct hvcall_mpp_data *mpp_data) { - switch(rc) { - case 0: - return; - case H_HARDWARE: - printk(KERN_INFO "plpar-hcall (%s) " - "Hardware fault\n", tag); - return; - case H_FUNCTION: - printk(KERN_INFO "plpar-hcall (%s) " - "Function not allowed\n", tag); - return; - case H_AUTHORITY: - printk(KERN_INFO "plpar-hcall (%s) " - "Not authorized to this function\n", tag); - return; - case H_PARAMETER: - printk(KERN_INFO "plpar-hcall (%s) " - "Bad parameter(s)\n",tag); - return; - default: - printk(KERN_INFO "plpar-hcall (%s) " - "Unexpected rc(0x%lx)\n", tag, rc); - } + int rc; + unsigned long retbuf[PLPAR_HCALL9_BUFSIZE]; + + rc = plpar_hcall9(H_GET_MPP, retbuf); + + mpp_data->entitled_mem = retbuf[0]; + mpp_data->mapped_mem = retbuf[1]; + + mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff; + mpp_data->pool_num = retbuf[2] & 0xffff; + + mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff; + mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff; + mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffff; + + mpp_data->pool_size = retbuf[4]; + mpp_data->loan_request = retbuf[5]; + mpp_data->backing_mem = retbuf[6]; + + return rc; } +EXPORT_SYMBOL(h_get_mpp); + +struct hvcall_ppp_data { + u64 entitlement; + u64 unallocated_entitlement; + u16 group_num; + u16 pool_num; + u8 capped; + u8 weight; + u8 unallocated_weight; + u16 active_procs_in_pool; + u16 active_system_procs; +}; /* * H_GET_PPP hcall returns info in 4 parms. @@ -176,27 +191,30 @@ static void log_plpar_hcall_return(unsigned long rc, char *tag) * XXXX - Active processors in Physical Processor Pool. * XXXX - Processors active on platform. */ -static unsigned int h_get_ppp(unsigned long *entitled, - unsigned long *unallocated, - unsigned long *aggregation, - unsigned long *resource) +static unsigned int h_get_ppp(struct hvcall_ppp_data *ppp_data) { unsigned long rc; unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; rc = plpar_hcall(H_GET_PPP, retbuf); - *entitled = retbuf[0]; - *unallocated = retbuf[1]; - *aggregation = retbuf[2]; - *resource = retbuf[3]; + ppp_data->entitlement = retbuf[0]; + ppp_data->unallocated_entitlement = retbuf[1]; + + ppp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff; + ppp_data->pool_num = retbuf[2] & 0xffff; - log_plpar_hcall_return(rc, "H_GET_PPP"); + ppp_data->capped = (retbuf[3] >> 6 * 8) & 0x01; + ppp_data->weight = (retbuf[3] >> 5 * 8) & 0xff; + ppp_data->unallocated_weight = (retbuf[3] >> 4 * 8) & 0xff; + ppp_data->active_procs_in_pool = (retbuf[3] >> 2 * 8) & 0xffff; + ppp_data->active_system_procs = retbuf[3] & 0xffff; return rc; } -static void h_pic(unsigned long *pool_idle_time, unsigned long *num_procs) +static unsigned h_pic(unsigned long *pool_idle_time, + unsigned long *num_procs) { unsigned long rc; unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; @@ -206,8 +224,87 @@ static void h_pic(unsigned long *pool_idle_time, unsigned long *num_procs) *pool_idle_time = retbuf[0]; *num_procs = retbuf[1]; - if (rc != H_AUTHORITY) - log_plpar_hcall_return(rc, "H_PIC"); + return rc; +} + +/* + * parse_ppp_data + * Parse out the data returned from h_get_ppp and h_pic + */ +static void parse_ppp_data(struct seq_file *m) +{ + struct hvcall_ppp_data ppp_data; + int rc; + + rc = h_get_ppp(&ppp_data); + if (rc) + return; + + seq_printf(m, "partition_entitled_capacity=%ld\n", + ppp_data.entitlement); + seq_printf(m, "group=%d\n", ppp_data.group_num); + seq_printf(m, "system_active_processors=%d\n", + ppp_data.active_system_procs); + + /* pool related entries are apropriate for shared configs */ + if (lppaca[0].shared_proc) { + unsigned long pool_idle_time, pool_procs; + + seq_printf(m, "pool=%d\n", ppp_data.pool_num); + + /* report pool_capacity in percentage */ + seq_printf(m, "pool_capacity=%d\n", + ppp_data.active_procs_in_pool * 100); + + h_pic(&pool_idle_time, &pool_procs); + seq_printf(m, "pool_idle_time=%ld\n", pool_idle_time); + seq_printf(m, "pool_num_procs=%ld\n", pool_procs); + } + + seq_printf(m, "unallocated_capacity_weight=%d\n", + ppp_data.unallocated_weight); + seq_printf(m, "capacity_weight=%d\n", ppp_data.weight); + seq_printf(m, "capped=%d\n", ppp_data.capped); + seq_printf(m, "unallocated_capacity=%ld\n", + ppp_data.unallocated_entitlement); +} + +/** + * parse_mpp_data + * Parse out data returned from h_get_mpp + */ +static void parse_mpp_data(struct seq_file *m) +{ + struct hvcall_mpp_data mpp_data; + int rc; + + rc = h_get_mpp(&mpp_data); + if (rc) + return; + + seq_printf(m, "entitled_memory=%ld\n", mpp_data.entitled_mem); + + if (mpp_data.mapped_mem != -1) + seq_printf(m, "mapped_entitled_memory=%ld\n", + mpp_data.mapped_mem); + + seq_printf(m, "entitled_memory_group_number=%d\n", mpp_data.group_num); + seq_printf(m, "entitled_memory_pool_number=%d\n", mpp_data.pool_num); + + seq_printf(m, "entitled_memory_weight=%d\n", mpp_data.mem_weight); + seq_printf(m, "unallocated_entitled_memory_weight=%d\n", + mpp_data.unallocated_mem_weight); + seq_printf(m, "unallocated_io_mapping_entitlement=%ld\n", + mpp_data.unallocated_entitlement); + + if (mpp_data.pool_size != -1) + seq_printf(m, "entitled_memory_pool_size=%ld bytes\n", + mpp_data.pool_size); + + seq_printf(m, "entitled_memory_loan_request=%ld\n", + mpp_data.loan_request); + + seq_printf(m, "backing_memory=%ld bytes\n", mpp_data.backing_mem); } #define SPLPAR_CHARACTERISTICS_TOKEN 20 @@ -313,6 +410,25 @@ static int lparcfg_count_active_processors(void) return count; } +static void pseries_cmo_data(struct seq_file *m) +{ + int cpu; + unsigned long cmo_faults = 0; + unsigned long cmo_fault_time = 0; + + if (!firmware_has_feature(FW_FEATURE_CMO)) + return; + + for_each_possible_cpu(cpu) { + cmo_faults += lppaca[cpu].cmo_faults; + cmo_fault_time += lppaca[cpu].cmo_fault_time; + } + + seq_printf(m, "cmo_faults=%lu\n", cmo_faults); + seq_printf(m, "cmo_fault_time_usec=%lu\n", + cmo_fault_time / tb_ticks_per_usec); +} + static int pseries_lparcfg_data(struct seq_file *m, void *v) { int partition_potential_processors; @@ -334,60 +450,13 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v) partition_active_processors = lparcfg_count_active_processors(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) { - unsigned long h_entitled, h_unallocated; - unsigned long h_aggregation, h_resource; - unsigned long pool_idle_time, pool_procs; - unsigned long purr; - - h_get_ppp(&h_entitled, &h_unallocated, &h_aggregation, - &h_resource); - - seq_printf(m, "R4=0x%lx\n", h_entitled); - seq_printf(m, "R5=0x%lx\n", h_unallocated); - seq_printf(m, "R6=0x%lx\n", h_aggregation); - seq_printf(m, "R7=0x%lx\n", h_resource); - - purr = get_purr(); - /* this call handles the ibm,get-system-parameter contents */ parse_system_parameter_string(m); + parse_ppp_data(m); + parse_mpp_data(m); + pseries_cmo_data(m); - seq_printf(m, "partition_entitled_capacity=%ld\n", h_entitled); - - seq_printf(m, "group=%ld\n", (h_aggregation >> 2 * 8) & 0xffff); - - seq_printf(m, "system_active_processors=%ld\n", - (h_resource >> 0 * 8) & 0xffff); - - /* pool related entries are apropriate for shared configs */ - if (lppaca[0].shared_proc) { - - h_pic(&pool_idle_time, &pool_procs); - - seq_printf(m, "pool=%ld\n", - (h_aggregation >> 0 * 8) & 0xffff); - - /* report pool_capacity in percentage */ - seq_printf(m, "pool_capacity=%ld\n", - ((h_resource >> 2 * 8) & 0xffff) * 100); - - seq_printf(m, "pool_idle_time=%ld\n", pool_idle_time); - - seq_printf(m, "pool_num_procs=%ld\n", pool_procs); - } - - seq_printf(m, "unallocated_capacity_weight=%ld\n", - (h_resource >> 4 * 8) & 0xFF); - - seq_printf(m, "capacity_weight=%ld\n", - (h_resource >> 5 * 8) & 0xFF); - - seq_printf(m, "capped=%ld\n", (h_resource >> 6 * 8) & 0x01); - - seq_printf(m, "unallocated_capacity=%ld\n", h_unallocated); - - seq_printf(m, "purr=%ld\n", purr); - + seq_printf(m, "purr=%ld\n", get_purr()); } else { /* non SPLPAR case */ seq_printf(m, "system_active_processors=%d\n", @@ -414,6 +483,83 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v) return 0; } +static ssize_t update_ppp(u64 *entitlement, u8 *weight) +{ + struct hvcall_ppp_data ppp_data; + u8 new_weight; + u64 new_entitled; + ssize_t retval; + + /* Get our current parameters */ + retval = h_get_ppp(&ppp_data); + if (retval) + return retval; + + if (entitlement) { + new_weight = ppp_data.weight; + new_entitled = *entitlement; + } else if (weight) { + new_weight = *weight; + new_entitled = ppp_data.entitlement; + } else + return -EINVAL; + + pr_debug("%s: current_entitled = %lu, current_weight = %u\n", + __FUNCTION__, ppp_data.entitlement, ppp_data.weight); + + pr_debug("%s: new_entitled = %lu, new_weight = %u\n", + __FUNCTION__, new_entitled, new_weight); + + retval = plpar_hcall_norets(H_SET_PPP, new_entitled, new_weight); + return retval; +} + +/** + * update_mpp + * + * Update the memory entitlement and weight for the partition. Caller must + * specify either a new entitlement or weight, not both, to be updated + * since the h_set_mpp call takes both entitlement and weight as parameters. + */ +static ssize_t update_mpp(u64 *entitlement, u8 *weight) +{ + struct hvcall_mpp_data mpp_data; + u64 new_entitled; + u8 new_weight; + ssize_t rc; + + if (entitlement) { + /* Check with vio to ensure the new memory entitlement + * can be handled. + */ + rc = vio_cmo_entitlement_update(*entitlement); + if (rc) + return rc; + } + + rc = h_get_mpp(&mpp_data); + if (rc) + return rc; + + if (entitlement) { + new_weight = mpp_data.mem_weight; + new_entitled = *entitlement; + } else if (weight) { + new_weight = *weight; + new_entitled = mpp_data.entitled_mem; + } else + return -EINVAL; + + pr_debug("%s: current_entitled = %lu, current_weight = %u\n", + __FUNCTION__, mpp_data.entitled_mem, mpp_data.mem_weight); + + pr_debug("%s: new_entitled = %lu, new_weight = %u\n", + __FUNCTION__, new_entitled, new_weight); + + rc = plpar_hcall_norets(H_SET_MPP, new_entitled, new_weight); + return rc; +} + /* * Interface for changing system parameters (variable capacity weight * and entitled capacity). Format of input is "param_name=value"; @@ -427,35 +573,27 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v) static ssize_t lparcfg_write(struct file *file, const char __user * buf, size_t count, loff_t * off) { - char *kbuf; + int kbuf_sz = 64; + char kbuf[kbuf_sz]; char *tmp; u64 new_entitled, *new_entitled_ptr = &new_entitled; u8 new_weight, *new_weight_ptr = &new_weight; - - unsigned long current_entitled; /* parameters for h_get_ppp */ - unsigned long dummy; - unsigned long resource; - u8 current_weight; - - ssize_t retval = -ENOMEM; + ssize_t retval; if (!firmware_has_feature(FW_FEATURE_SPLPAR) || firmware_has_feature(FW_FEATURE_ISERIES)) return -EINVAL; - kbuf = kmalloc(count, GFP_KERNEL); - if (!kbuf) - goto out; + if (count > kbuf_sz) + return -EINVAL; - retval = -EFAULT; if (copy_from_user(kbuf, buf, count)) - goto out; + return -EFAULT; - retval = -EINVAL; kbuf[count - 1] = '\0'; tmp = strchr(kbuf, '='); if (!tmp) - goto out; + return -EINVAL; *tmp++ = '\0'; @@ -463,34 +601,32 @@ static ssize_t lparcfg_write(struct file *file, const char __user * buf, char *endp; *new_entitled_ptr = (u64) simple_strtoul(tmp, &endp, 10); if (endp == tmp) - goto out; - new_weight_ptr = ¤t_weight; + return -EINVAL; + + retval = update_ppp(new_entitled_ptr, NULL); } else if (!strcmp(kbuf, "capacity_weight")) { char *endp; *new_weight_ptr = (u8) simple_strtoul(tmp, &endp, 10); if (endp == tmp) - goto out; - new_entitled_ptr = ¤t_entitled; - } else - goto out; - - /* Get our current parameters */ - retval = h_get_ppp(¤t_entitled, &dummy, &dummy, &resource); - if (retval) { - retval = -EIO; - goto out; - } - - current_weight = (resource >> 5 * 8) & 0xFF; + return -EINVAL; - pr_debug("%s: current_entitled = %lu, current_weight = %u\n", - __func__, current_entitled, current_weight); + retval = update_ppp(NULL, new_weight_ptr); + } else if (!strcmp(kbuf, "entitled_memory")) { + char *endp; + *new_entitled_ptr = (u64) simple_strtoul(tmp, &endp, 10); + if (endp == tmp) + return -EINVAL; - pr_debug("%s: new_entitled = %lu, new_weight = %u\n", - __func__, *new_entitled_ptr, *new_weight_ptr); + retval = update_mpp(new_entitled_ptr, NULL); + } else if (!strcmp(kbuf, "entitled_memory_weight")) { + char *endp; + *new_weight_ptr = (u8) simple_strtoul(tmp, &endp, 10); + if (endp == tmp) + return -EINVAL; - retval = plpar_hcall_norets(H_SET_PPP, *new_entitled_ptr, - *new_weight_ptr); + retval = update_mpp(NULL, new_weight_ptr); + } else + return -EINVAL; if (retval == H_SUCCESS || retval == H_CONSTRAINED) { retval = count; @@ -506,8 +642,6 @@ static ssize_t lparcfg_write(struct file *file, const char __user * buf, retval = -EIO; } -out: - kfree(kbuf); return retval; } @@ -573,7 +707,7 @@ static int lparcfg_open(struct inode *inode, struct file *file) return single_open(file, lparcfg_data, NULL); } -const struct file_operations lparcfg_fops = { +static const struct file_operations lparcfg_fops = { .owner = THIS_MODULE, .read = seq_read, .write = lparcfg_write, @@ -581,7 +715,7 @@ const struct file_operations lparcfg_fops = { .release = single_release, }; -int __init lparcfg_init(void) +static int __init lparcfg_init(void) { struct proc_dir_entry *ent; mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; @@ -601,7 +735,7 @@ int __init lparcfg_init(void) return 0; } -void __exit lparcfg_cleanup(void) +static void __exit lparcfg_cleanup(void) { if (proc_ppc64_lparcfg) remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index 29a0e039d436011b61f2f97b96e8b3237e992977..aab76887a842c7dfa667141fe9467551338cf0ca 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c @@ -48,7 +48,7 @@ void machine_kexec_cleanup(struct kimage *image) * Do not allocate memory (or fail in any way) in machine_kexec(). * We are past the point of no return, committed to rebooting now. */ -NORET_TYPE void machine_kexec(struct kimage *image) +void machine_kexec(struct kimage *image) { if (ppc_md.machine_kexec) ppc_md.machine_kexec(image); diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index 704375bda73a928446bb87ba68e492659be093a0..a168514d8609652335269211c723fb795a2f4865 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c @@ -158,7 +158,7 @@ void kexec_copy_flush(struct kimage *image) * on calling the interrupts, but we would like to call it off irq level * so that the interrupt controller is clean. */ -void kexec_smp_down(void *arg) +static void kexec_smp_down(void *arg) { if (ppc_md.kexec_cpu_down) ppc_md.kexec_cpu_down(0, 1); @@ -172,7 +172,7 @@ static void kexec_prepare_cpus(void) { int my_cpu, i, notified=-1; - smp_call_function(kexec_smp_down, NULL, 0, /* wait */0); + smp_call_function(kexec_smp_down, NULL, /* wait */0); my_cpu = get_cpu(); /* check the others cpus are now down (via paca hw cpu id == -1) */ @@ -249,7 +249,7 @@ static void kexec_prepare_cpus(void) * We could use a smaller stack if we don't care about anything using * current, but that audit has not been performed. */ -union thread_union kexec_stack +static union thread_union kexec_stack __attribute__((__section__(".data.init_task"))) = { }; /* Our assembly helper, in kexec_stub.S */ diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S index 7b91602206985b0bf23a9b530f937b2b954f7fdb..85cb6f340846248882074a2b08f0e920f6acbb2f 100644 --- a/arch/powerpc/kernel/misc.S +++ b/arch/powerpc/kernel/misc.S @@ -116,3 +116,8 @@ _GLOBAL(longjmp) mtlr r0 mr r3,r4 blr + +_GLOBAL(__setup_cpu_power7) +_GLOBAL(__restore_cpu_power7) + /* place holder */ + blr diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 89aaaa6f3561549c896fcd9983a04e96cba72410..6321ae36f7292d03cce3eab12db6a43369464df7 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S @@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE) * * flush_icache_range(unsigned long start, unsigned long stop) */ -_GLOBAL(__flush_icache_range) +_KPROBE(__flush_icache_range) BEGIN_FTR_SECTION blr /* for 601, do nothing */ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 942951e7658643f7d8a1bd33ebcad449d4f6d5de..4dd70cf7bb4eb6e17e8755b4f5fad3b4fb9ae49d 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -506,6 +506,39 @@ _GLOBAL(giveup_altivec) #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX +/* + * __giveup_vsx(tsk) + * Disable VSX for the task given as the argument. + * Does NOT save vsx registers. + * Enables the VSX for use in the kernel on return. + */ +_GLOBAL(__giveup_vsx) + mfmsr r5 + oris r5,r5,MSR_VSX@h + mtmsrd r5 /* enable use of VSX now */ + isync + + cmpdi 0,r3,0 + beqlr- /* if no previous owner, done */ + addi r3,r3,THREAD /* want THREAD of task */ + ld r5,PT_REGS(r3) + cmpdi 0,r5,0 + beq 1f + ld r4,_MSR-STACK_FRAME_OVERHEAD(r5) + lis r3,MSR_VSX@h + andc r4,r4,r3 /* disable VSX for previous task */ + std r4,_MSR-STACK_FRAME_OVERHEAD(r5) +1: +#ifndef CONFIG_SMP + li r5,0 + ld r4,last_task_used_vsx@got(r2) + std r5,0(r4) +#endif /* CONFIG_SMP */ + blr + +#endif /* CONFIG_VSX */ + /* kexec_wait(phys_cpu) * * wait for the flag to change, indicating this kernel is going away but diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c new file mode 100644 index 0000000000000000000000000000000000000000..af07003573c476d5347967f4667328d49ab68022 --- /dev/null +++ b/arch/powerpc/kernel/module.c @@ -0,0 +1,116 @@ +/* Kernel module help for powerpc. + Copyright (C) 2001, 2003 Rusty Russell IBM Corporation. + Copyright (C) 2008 Freescale Semiconductor, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "setup.h" + +LIST_HEAD(module_bug_list); + +void *module_alloc(unsigned long size) +{ + if (size == 0) + return NULL; + + return vmalloc_exec(size); +} + +/* Free memory returned from module_alloc */ +void module_free(struct module *mod, void *module_region) +{ + vfree(module_region); + /* FIXME: If module_region == mod->init_region, trim exception + table entries. */ +} + +static const Elf_Shdr *find_section(const Elf_Ehdr *hdr, + const Elf_Shdr *sechdrs, + const char *name) +{ + char *secstrings; + unsigned int i; + + secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; + for (i = 1; i < hdr->e_shnum; i++) + if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0) + return &sechdrs[i]; + return NULL; +} + +int module_finalize(const Elf_Ehdr *hdr, + const Elf_Shdr *sechdrs, struct module *me) +{ + const Elf_Shdr *sect; + int err; + + err = module_bug_finalize(hdr, sechdrs, me); + if (err) + return err; + + /* Apply feature fixups */ + sect = find_section(hdr, sechdrs, "__ftr_fixup"); + if (sect != NULL) + do_feature_fixups(cur_cpu_spec->cpu_features, + (void *)sect->sh_addr, + (void *)sect->sh_addr + sect->sh_size); + +#ifdef CONFIG_PPC64 + sect = find_section(hdr, sechdrs, "__fw_ftr_fixup"); + if (sect != NULL) + do_feature_fixups(powerpc_firmware_features, + (void *)sect->sh_addr, + (void *)sect->sh_addr + sect->sh_size); +#endif + + sect = find_section(hdr, sechdrs, "__lwsync_fixup"); + if (sect != NULL) + do_lwsync_fixups(cur_cpu_spec->cpu_features, + (void *)sect->sh_addr, + (void *)sect->sh_addr + sect->sh_size); + + return 0; +} + +void module_arch_cleanup(struct module *mod) +{ + module_bug_cleanup(mod); +} + +struct bug_entry *module_find_bug(unsigned long bugaddr) +{ + struct mod_arch_specific *mod; + unsigned int i; + struct bug_entry *bug; + + list_for_each_entry(mod, &module_bug_list, bug_list) { + bug = mod->bug_table; + for (i = 0; i < mod->num_bugs; ++i, ++bug) + if (bugaddr == bug->bug_addr) + return bug; + } + return NULL; +} diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c index eab313858315ef991b5efc0d6886433105e1ac89..2df91a03462a26109d49b9fc82b852df76c14b34 100644 --- a/arch/powerpc/kernel/module_32.c +++ b/arch/powerpc/kernel/module_32.c @@ -34,23 +34,6 @@ #define DEBUGP(fmt , ...) #endif -LIST_HEAD(module_bug_list); - -void *module_alloc(unsigned long size) -{ - if (size == 0) - return NULL; - return vmalloc(size); -} - -/* Free memory returned from module_alloc */ -void module_free(struct module *mod, void *module_region) -{ - vfree(module_region); - /* FIXME: If module_region == mod->init_region, trim exception - table entries. */ -} - /* Count how many different relocations (different symbol, different addend) */ static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num) @@ -325,58 +308,3 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, } return 0; } - -static const Elf_Shdr *find_section(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - const char *name) -{ - char *secstrings; - unsigned int i; - - secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; - for (i = 1; i < hdr->e_shnum; i++) - if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0) - return &sechdrs[i]; - return NULL; -} - -int module_finalize(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - struct module *me) -{ - const Elf_Shdr *sect; - int err; - - err = module_bug_finalize(hdr, sechdrs, me); - if (err) /* never true, currently */ - return err; - - /* Apply feature fixups */ - sect = find_section(hdr, sechdrs, "__ftr_fixup"); - if (sect != NULL) - do_feature_fixups(cur_cpu_spec->cpu_features, - (void *)sect->sh_addr, - (void *)sect->sh_addr + sect->sh_size); - - return 0; -} - -void module_arch_cleanup(struct module *mod) -{ - module_bug_cleanup(mod); -} - -struct bug_entry *module_find_bug(unsigned long bugaddr) -{ - struct mod_arch_specific *mod; - unsigned int i; - struct bug_entry *bug; - - list_for_each_entry(mod, &module_bug_list, bug_list) { - bug = mod->bug_table; - for (i = 0; i < mod->num_bugs; ++i, ++bug) - if (bugaddr == bug->bug_addr) - return bug; - } - return NULL; -} diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c index 3a82b02b784b0c8a4d8da7467b8c7d4410cf9ea4..ee6a2982d567351eb88ace12c2109918af6af59e 100644 --- a/arch/powerpc/kernel/module_64.c +++ b/arch/powerpc/kernel/module_64.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include "setup.h" @@ -101,22 +102,6 @@ static unsigned int count_relocs(const Elf64_Rela *rela, unsigned int num) return _count_relocs; } -void *module_alloc(unsigned long size) -{ - if (size == 0) - return NULL; - - return vmalloc_exec(size); -} - -/* Free memory returned from module_alloc */ -void module_free(struct module *mod, void *module_region) -{ - vfree(module_region); - /* FIXME: If module_region == mod->init_region, trim exception - table entries. */ -} - static int relacmp(const void *_x, const void *_y) { const Elf64_Rela *x, *y; @@ -346,7 +331,7 @@ static unsigned long stub_for_addr(Elf64_Shdr *sechdrs, restore r2. */ static int restore_r2(u32 *instruction, struct module *me) { - if (*instruction != 0x60000000) { + if (*instruction != PPC_NOP_INSTR) { printk("%s: Expect noop after relocate, got %08x\n", me->name, *instruction); return 0; @@ -466,65 +451,3 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, return 0; } - -LIST_HEAD(module_bug_list); - -static const Elf_Shdr *find_section(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, - const char *name) -{ - char *secstrings; - unsigned int i; - - secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; - for (i = 1; i < hdr->e_shnum; i++) - if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0) - return &sechdrs[i]; - return NULL; -} - -int module_finalize(const Elf_Ehdr *hdr, - const Elf_Shdr *sechdrs, struct module *me) -{ - const Elf_Shdr *sect; - int err; - - err = module_bug_finalize(hdr, sechdrs, me); - if (err) - return err; - - /* Apply feature fixups */ - sect = find_section(hdr, sechdrs, "__ftr_fixup"); - if (sect != NULL) - do_feature_fixups(cur_cpu_spec->cpu_features, - (void *)sect->sh_addr, - (void *)sect->sh_addr + sect->sh_size); - - sect = find_section(hdr, sechdrs, "__fw_ftr_fixup"); - if (sect != NULL) - do_feature_fixups(powerpc_firmware_features, - (void *)sect->sh_addr, - (void *)sect->sh_addr + sect->sh_size); - - return 0; -} - -void module_arch_cleanup(struct module *mod) -{ - module_bug_cleanup(mod); -} - -struct bug_entry *module_find_bug(unsigned long bugaddr) -{ - struct mod_arch_specific *mod; - unsigned int i; - struct bug_entry *bug; - - list_for_each_entry(mod, &module_bug_list, bug_list) { - bug = mod->bug_table; - for (i = 0; i < mod->num_bugs; ++i, ++bug) - if (bugaddr == bug->bug_addr) - return bug; - } - return NULL; -} diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c index c62d1012c01322354309aaaf7b78a0d689070c54..3bb7d3dd28be9e20d6e013127426e8c9c96e4861 100644 --- a/arch/powerpc/kernel/msi.c +++ b/arch/powerpc/kernel/msi.c @@ -34,5 +34,5 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) void arch_teardown_msi_irqs(struct pci_dev *dev) { - return ppc_md.teardown_msi_irqs(dev); + ppc_md.teardown_msi_irqs(dev); } diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c index 5748ddb47d9f82fc332b844e56613d3a6e84a07b..e9be908f199b6fa46ee4ec2226316db2ad1702c6 100644 --- a/arch/powerpc/kernel/of_device.c +++ b/arch/powerpc/kernel/of_device.c @@ -89,54 +89,6 @@ struct of_device *of_device_alloc(struct device_node *np, } EXPORT_SYMBOL(of_device_alloc); -ssize_t of_device_get_modalias(struct of_device *ofdev, - char *str, ssize_t len) -{ - const char *compat; - int cplen, i; - ssize_t tsize, csize, repend; - - /* Name & Type */ - csize = snprintf(str, len, "of:N%sT%s", - ofdev->node->name, ofdev->node->type); - - /* Get compatible property if any */ - compat = of_get_property(ofdev->node, "compatible", &cplen); - if (!compat) - return csize; - - /* Find true end (we tolerate multiple \0 at the end */ - for (i=(cplen-1); i>=0 && !compat[i]; i--) - cplen--; - if (!cplen) - return csize; - cplen++; - - /* Check space (need cplen+1 chars including final \0) */ - tsize = csize + cplen; - repend = tsize; - - if (csize>=len) /* @ the limit, all is already filled */ - return tsize; - - if (tsize>=len) { /* limit compat list */ - cplen = len-csize-1; - repend = len; - } - - /* Copy and do char replacement */ - memcpy(&str[csize+1], compat, cplen); - for (i=csize; istart = pci_addr; break; case 2: /* PCI Memory space */ + case 3: /* PCI 64 bits Memory space */ printk(KERN_INFO " MEM 0x%016llx..0x%016llx -> 0x%016llx %s\n", cpu_addr, cpu_addr + size - 1, pci_addr, diff --git a/arch/powerpc/kernel/ppc32.h b/arch/powerpc/kernel/ppc32.h index 90e5627717911a6bdb80c761d71183a4d7ec61e6..dc16aefe1dd09876b5a98bffab73869ec52d860b 100644 --- a/arch/powerpc/kernel/ppc32.h +++ b/arch/powerpc/kernel/ppc32.h @@ -120,6 +120,7 @@ struct mcontext32 { elf_fpregset_t mc_fregs; unsigned int mc_pad[2]; elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16))); + elf_vsrreghalf_t32 mc_vsregs __attribute__((__aligned__(16))); }; struct ucontext32 { diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index d3ac631cbd2628946ac32985d9bcb90db82339a6..e1ea4fe5cfbde0a6c436978f5864f650b10928d2 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c @@ -42,6 +42,7 @@ #include #include #include +#include #ifdef CONFIG_PPC32 extern void transfer_to_handler(void); @@ -67,6 +68,10 @@ EXPORT_SYMBOL(single_step_exception); EXPORT_SYMBOL(sys_sigreturn); #endif +#ifdef CONFIG_FTRACE +EXPORT_SYMBOL(_mcount); +#endif + EXPORT_SYMBOL(strcpy); EXPORT_SYMBOL(strncpy); EXPORT_SYMBOL(strcat); @@ -102,6 +107,9 @@ EXPORT_SYMBOL(giveup_fpu); #ifdef CONFIG_ALTIVEC EXPORT_SYMBOL(giveup_altivec); #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX +EXPORT_SYMBOL(giveup_vsx); +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE EXPORT_SYMBOL(giveup_spe); #endif /* CONFIG_SPE */ diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 7de41c3948ec2dd4d148800c0dcd6421a3c77a2d..e030f3bd50248c2a85aae15e704f27bc1bd2dbe5 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -47,12 +47,15 @@ #ifdef CONFIG_PPC64 #include #endif +#include +#include extern unsigned long _get_SP(void); #ifndef CONFIG_SMP struct task_struct *last_task_used_math = NULL; struct task_struct *last_task_used_altivec = NULL; +struct task_struct *last_task_used_vsx = NULL; struct task_struct *last_task_used_spe = NULL; #endif @@ -104,17 +107,6 @@ void enable_kernel_fp(void) } EXPORT_SYMBOL(enable_kernel_fp); -int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) -{ - if (!tsk->thread.regs) - return 0; - flush_fp_to_thread(current); - - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); - - return 1; -} - #ifdef CONFIG_ALTIVEC void enable_kernel_altivec(void) { @@ -148,36 +140,48 @@ void flush_altivec_to_thread(struct task_struct *tsk) preempt_enable(); } } +#endif /* CONFIG_ALTIVEC */ -int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs) +#ifdef CONFIG_VSX +#if 0 +/* not currently used, but some crazy RAID module might want to later */ +void enable_kernel_vsx(void) { - /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save - * separately, see below */ - const int nregs = ELF_NVRREG - 2; - elf_vrreg_t *reg; - u32 *dest; - - if (tsk == current) - flush_altivec_to_thread(tsk); - - reg = (elf_vrreg_t *)vrregs; - - /* copy the 32 vr registers */ - memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg)); - reg += nregs; + WARN_ON(preemptible()); - /* copy the vscr */ - memcpy(reg, &tsk->thread.vscr, sizeof(*reg)); - reg++; +#ifdef CONFIG_SMP + if (current->thread.regs && (current->thread.regs->msr & MSR_VSX)) + giveup_vsx(current); + else + giveup_vsx(NULL); /* just enable vsx for kernel - force */ +#else + giveup_vsx(last_task_used_vsx); +#endif /* CONFIG_SMP */ +} +EXPORT_SYMBOL(enable_kernel_vsx); +#endif - /* vrsave is stored in the high 32bit slot of the final 128bits */ - memset(reg, 0, sizeof(*reg)); - dest = (u32 *)reg; - *dest = tsk->thread.vrsave; +void giveup_vsx(struct task_struct *tsk) +{ + giveup_fpu(tsk); + giveup_altivec(tsk); + __giveup_vsx(tsk); +} - return 1; +void flush_vsx_to_thread(struct task_struct *tsk) +{ + if (tsk->thread.regs) { + preempt_disable(); + if (tsk->thread.regs->msr & MSR_VSX) { +#ifdef CONFIG_SMP + BUG_ON(tsk != current); +#endif + giveup_vsx(tsk); + } + preempt_enable(); + } } -#endif /* CONFIG_ALTIVEC */ +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE @@ -209,14 +213,6 @@ void flush_spe_to_thread(struct task_struct *tsk) preempt_enable(); } } - -int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs) -{ - flush_spe_to_thread(current); - /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */ - memcpy(evrregs, ¤t->thread.evr[0], sizeof(u32) * 35); - return 1; -} #endif /* CONFIG_SPE */ #ifndef CONFIG_SMP @@ -233,6 +229,10 @@ void discard_lazy_cpu_state(void) if (last_task_used_altivec == current) last_task_used_altivec = NULL; #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX + if (last_task_used_vsx == current) + last_task_used_vsx = NULL; +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE if (last_task_used_spe == current) last_task_used_spe = NULL; @@ -241,6 +241,35 @@ void discard_lazy_cpu_state(void) } #endif /* CONFIG_SMP */ +void do_dabr(struct pt_regs *regs, unsigned long address, + unsigned long error_code) +{ + siginfo_t info; + + if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, + 11, SIGSEGV) == NOTIFY_STOP) + return; + + if (debugger_dabr_match(regs)) + return; + + /* Clear the DAC and struct entries. One shot trigger */ +#if defined(CONFIG_BOOKE) + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W + | DBCR0_IDM)); +#endif + + /* Clear the DABR */ + set_dabr(0); + + /* Deliver the signal to userspace */ + info.si_signo = SIGTRAP; + info.si_errno = 0; + info.si_code = TRAP_HWBKPT; + info.si_addr = (void __user *)address; + force_sig_info(SIGTRAP, &info, current); +} + static DEFINE_PER_CPU(unsigned long, current_dabr); int set_dabr(unsigned long dabr) @@ -256,6 +285,11 @@ int set_dabr(unsigned long dabr) #if defined(CONFIG_PPC64) || defined(CONFIG_6xx) mtspr(SPRN_DABR, dabr); #endif + +#if defined(CONFIG_BOOKE) + mtspr(SPRN_DAC1, dabr); +#endif + return 0; } @@ -297,6 +331,11 @@ struct task_struct *__switch_to(struct task_struct *prev, if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) giveup_altivec(prev); #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX + if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX)) + /* VMX and FPU registers are already save here */ + __giveup_vsx(prev); +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE /* * If the previous thread used spe in the last quantum @@ -317,6 +356,10 @@ struct task_struct *__switch_to(struct task_struct *prev, if (new->thread.regs && last_task_used_altivec == new) new->thread.regs->msr |= MSR_VEC; #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX + if (new->thread.regs && last_task_used_vsx == new) + new->thread.regs->msr |= MSR_VSX; +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE /* Avoid the trap. On smp this this never happens since * we don't set last_task_used_spe @@ -330,6 +373,12 @@ struct task_struct *__switch_to(struct task_struct *prev, if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) set_dabr(new->thread.dabr); +#if defined(CONFIG_BOOKE) + /* If new thread DAC (HW breakpoint) is the same then leave it */ + if (new->thread.dabr) + set_dabr(new->thread.dabr); +#endif + new_thread = &new->thread; old_thread = ¤t->thread; @@ -417,6 +466,8 @@ static struct regbit { {MSR_EE, "EE"}, {MSR_PR, "PR"}, {MSR_FP, "FP"}, + {MSR_VEC, "VEC"}, + {MSR_VSX, "VSX"}, {MSR_ME, "ME"}, {MSR_IR, "IR"}, {MSR_DR, "DR"}, @@ -484,10 +535,8 @@ void show_regs(struct pt_regs * regs) * Lookup NIP late so we have the best change of getting the * above info out without failing */ - printk("NIP ["REG"] ", regs->nip); - print_symbol("%s\n", regs->nip); - printk("LR ["REG"] ", regs->link); - print_symbol("%s\n", regs->link); + printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip); + printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link); #endif show_stack(current, (unsigned long *) regs->gpr[1]); if (!user_mode(regs)) @@ -518,6 +567,10 @@ void flush_thread(void) if (current->thread.dabr) { current->thread.dabr = 0; set_dabr(0); + +#if defined(CONFIG_BOOKE) + current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W); +#endif } } @@ -534,6 +587,7 @@ void prepare_to_copy(struct task_struct *tsk) { flush_fp_to_thread(current); flush_altivec_to_thread(current); + flush_vsx_to_thread(current); flush_spe_to_thread(current); } @@ -689,6 +743,9 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) #endif discard_lazy_cpu_state(); +#ifdef CONFIG_VSX + current->thread.used_vsr = 0; +#endif memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC @@ -971,8 +1028,7 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) newsp = stack[0]; ip = stack[STACK_FRAME_LR_SAVE]; if (!firstframe || ip != lr) { - printk("["REG"] ["REG"] ", sp, ip); - print_symbol("%s", ip); + printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip); if (firstframe) printk(" (unreliable)"); printk("\n"); @@ -987,10 +1043,9 @@ void show_stack(struct task_struct *tsk, unsigned long *stack) && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { struct pt_regs *regs = (struct pt_regs *) (sp + STACK_FRAME_OVERHEAD); - printk("--- Exception: %lx", regs->trap); - print_symbol(" at %s\n", regs->nip); lr = regs->link; - print_symbol(" LR = %s\n", lr); + printk("--- Exception: %lx at %pS\n LR = %pS\n", + regs->trap, (void *)regs->nip, (void *)lr); firstframe = 1; } diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 2aefe2a4129a7fc4bd563db0a92f5a8ded54801e..87d83c56b31ec1671007195ce092523535108bb9 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -609,6 +609,10 @@ static struct feature_property { {"altivec", 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC}, {"ibm,vmx", 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC}, #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX + /* Yes, this _really_ is ibm,vmx == 2 to enable VSX */ + {"ibm,vmx", 2, CPU_FTR_VSX, PPC_FEATURE_HAS_VSX}, +#endif /* CONFIG_VSX */ #ifdef CONFIG_PPC64 {"ibm,dfp", 1, 0, PPC_FEATURE_HAS_DFP}, {"ibm,purr", 1, CPU_FTR_PURR, 0}, diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 6d6df1e6032558713e1a734452ecc10e0ec48e6f..b72849ac7db39af14fe1547571da83066cdc3d77 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c @@ -205,8 +205,6 @@ static int __initdata mem_reserve_cnt; static cell_t __initdata regbuf[1024]; -#define MAX_CPU_THREADS 2 - /* * Error results ... some OF calls will return "-1" on error, some * will return 0, some will return either. To simplify, here are @@ -620,6 +618,7 @@ static void __init early_cmdline_parse(void) #define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */ #define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */ #define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */ +#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */ /* Option vector 2: Open Firmware options supported */ #define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */ @@ -642,6 +641,11 @@ static void __init early_cmdline_parse(void) #else #define OV5_MSI 0x00 #endif /* CONFIG_PCI_MSI */ +#ifdef CONFIG_PPC_SMLPAR +#define OV5_CMO 0x80 /* Cooperative Memory Overcommitment */ +#else +#define OV5_CMO 0x00 +#endif /* * The architecture vector has an array of PVR mask/value pairs, @@ -650,6 +654,8 @@ static void __init early_cmdline_parse(void) static unsigned char ibm_architecture_vec[] = { W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ W(0xffff0000), W(0x003e0000), /* POWER6 */ + W(0xffff0000), W(0x003f0000), /* POWER7 */ + W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */ W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ 5 - 1, /* 5 option vectors */ @@ -658,7 +664,7 @@ static unsigned char ibm_architecture_vec[] = { 3 - 2, /* length */ 0, /* don't ignore, don't halt */ OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 | - OV1_PPC_2_04 | OV1_PPC_2_05, + OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06, /* option vector 2: Open Firmware options supported */ 34 - 2, /* length */ @@ -684,10 +690,12 @@ static unsigned char ibm_architecture_vec[] = { 0, /* don't halt */ /* option vector 5: PAPR/OF options */ - 3 - 2, /* length */ + 5 - 2, /* length */ 0, /* don't ignore, don't halt */ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | OV5_DONATE_DEDICATE_CPU | OV5_MSI, + 0, + OV5_CMO, }; /* Old method - ELF header with PT_NOTE sections */ @@ -1329,10 +1337,6 @@ static void __init prom_hold_cpus(void) unsigned int reg; phandle node; char type[64]; - int cpuid = 0; - unsigned int interrupt_server[MAX_CPU_THREADS]; - unsigned int cpu_threads, hw_cpu_num; - int propsize; struct prom_t *_prom = &RELOC(prom); unsigned long *spinloop = (void *) LOW_ADDR(__secondary_hold_spinloop); @@ -1376,7 +1380,6 @@ static void __init prom_hold_cpus(void) reg = -1; prom_getprop(node, "reg", ®, sizeof(reg)); - prom_debug("\ncpuid = 0x%x\n", cpuid); prom_debug("cpu hw idx = 0x%x\n", reg); /* Init the acknowledge var which will be reset by @@ -1385,28 +1388,9 @@ static void __init prom_hold_cpus(void) */ *acknowledge = (unsigned long)-1; - propsize = prom_getprop(node, "ibm,ppc-interrupt-server#s", - &interrupt_server, - sizeof(interrupt_server)); - if (propsize < 0) { - /* no property. old hardware has no SMT */ - cpu_threads = 1; - interrupt_server[0] = reg; /* fake it with phys id */ - } else { - /* We have a threaded processor */ - cpu_threads = propsize / sizeof(u32); - if (cpu_threads > MAX_CPU_THREADS) { - prom_printf("SMT: too many threads!\n" - "SMT: found %x, max is %x\n", - cpu_threads, MAX_CPU_THREADS); - cpu_threads = 1; /* ToDo: panic? */ - } - } - - hw_cpu_num = interrupt_server[0]; - if (hw_cpu_num != _prom->cpu) { + if (reg != _prom->cpu) { /* Primary Thread of non-boot cpu */ - prom_printf("%x : starting cpu hw idx %x... ", cpuid, reg); + prom_printf("starting cpu hw idx %x... ", reg); call_prom("start-cpu", 3, 0, node, secondary_hold, reg); @@ -1421,17 +1405,10 @@ static void __init prom_hold_cpus(void) } #ifdef CONFIG_SMP else - prom_printf("%x : boot cpu %x\n", cpuid, reg); + prom_printf("boot cpu hw idx %x\n", reg); #endif /* CONFIG_SMP */ - - /* Reserve cpu #s for secondary threads. They start later. */ - cpuid += cpu_threads; } - if (cpuid > NR_CPUS) - prom_printf("WARNING: maximum CPUs (" __stringify(NR_CPUS) - ") exceeded: ignoring extras\n"); - prom_debug("prom_hold_cpus: end...\n"); } diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c index 90eb3a3e383ef008d81c848097e1b9f0fd8cd506..bc1fb27368af4db2ff7627c5e1eb8ffa46a54013 100644 --- a/arch/powerpc/kernel/prom_parse.c +++ b/arch/powerpc/kernel/prom_parse.c @@ -128,12 +128,35 @@ static void of_bus_pci_count_cells(struct device_node *np, *sizec = 2; } +static unsigned int of_bus_pci_get_flags(const u32 *addr) +{ + unsigned int flags = 0; + u32 w = addr[0]; + + switch((w >> 24) & 0x03) { + case 0x01: + flags |= IORESOURCE_IO; + break; + case 0x02: /* 32 bits */ + case 0x03: /* 64 bits */ + flags |= IORESOURCE_MEM; + break; + } + if (w & 0x40000000) + flags |= IORESOURCE_PREFETCH; + return flags; +} + static u64 of_bus_pci_map(u32 *addr, const u32 *range, int na, int ns, int pna) { u64 cp, s, da; + unsigned int af, rf; + + af = of_bus_pci_get_flags(addr); + rf = of_bus_pci_get_flags(range); /* Check address type match */ - if ((addr[0] ^ range[0]) & 0x03000000) + if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) return OF_BAD_ADDR; /* Read address values, skipping high cell */ @@ -153,25 +176,6 @@ static int of_bus_pci_translate(u32 *addr, u64 offset, int na) return of_bus_default_translate(addr + 1, offset, na - 1); } -static unsigned int of_bus_pci_get_flags(const u32 *addr) -{ - unsigned int flags = 0; - u32 w = addr[0]; - - switch((w >> 24) & 0x03) { - case 0x01: - flags |= IORESOURCE_IO; - break; - case 0x02: /* 32 bits */ - case 0x03: /* 64 bits */ - flags |= IORESOURCE_MEM; - break; - } - if (w & 0x40000000) - flags |= IORESOURCE_PREFETCH; - return flags; -} - const u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, unsigned int *flags) { diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c index 2a9fe97e452129c9cd843e8e404d327df8605f66..6b66cd85b433ce8c296848f42e77ae5e18bcca87 100644 --- a/arch/powerpc/kernel/ptrace.c +++ b/arch/powerpc/kernel/ptrace.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -215,29 +216,56 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, void *kbuf, void __user *ubuf) { +#ifdef CONFIG_VSX + double buf[33]; + int i; +#endif flush_fp_to_thread(target); +#ifdef CONFIG_VSX + /* copy to local buffer then write that out */ + for (i = 0; i < 32 ; i++) + buf[i] = target->thread.TS_FPR(i); + memcpy(&buf[32], &target->thread.fpscr, sizeof(double)); + return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1); + +#else BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != - offsetof(struct thread_struct, fpr[32])); + offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &target->thread.fpr, 0, -1); +#endif } static int fpr_set(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, const void *kbuf, const void __user *ubuf) { +#ifdef CONFIG_VSX + double buf[33]; + int i; +#endif flush_fp_to_thread(target); +#ifdef CONFIG_VSX + /* copy to local buffer then write that out */ + i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1); + if (i) + return i; + for (i = 0; i < 32 ; i++) + target->thread.TS_FPR(i) = buf[i]; + memcpy(&target->thread.fpscr, &buf[32], sizeof(double)); + return 0; +#else BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != - offsetof(struct thread_struct, fpr[32])); + offsetof(struct thread_struct, TS_FPR(32))); return user_regset_copyin(&pos, &count, &kbuf, &ubuf, &target->thread.fpr, 0, -1); +#endif } - #ifdef CONFIG_ALTIVEC /* * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. @@ -323,6 +351,56 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset, } #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX +/* + * Currently to set and and get all the vsx state, you need to call + * the fp and VMX calls aswell. This only get/sets the lower 32 + * 128bit VSX registers. + */ + +static int vsr_active(struct task_struct *target, + const struct user_regset *regset) +{ + flush_vsx_to_thread(target); + return target->thread.used_vsr ? regset->n : 0; +} + +static int vsr_get(struct task_struct *target, const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + double buf[32]; + int ret, i; + + flush_vsx_to_thread(target); + + for (i = 0; i < 32 ; i++) + buf[i] = current->thread.fpr[i][TS_VSRLOWOFFSET]; + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, + buf, 0, 32 * sizeof(double)); + + return ret; +} + +static int vsr_set(struct task_struct *target, const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + double buf[32]; + int ret,i; + + flush_vsx_to_thread(target); + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + buf, 0, 32 * sizeof(double)); + for (i = 0; i < 32 ; i++) + current->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i]; + + + return ret; +} +#endif /* CONFIG_VSX */ + #ifdef CONFIG_SPE /* @@ -399,6 +477,9 @@ enum powerpc_regset { #ifdef CONFIG_ALTIVEC REGSET_VMX, #endif +#ifdef CONFIG_VSX + REGSET_VSX, +#endif #ifdef CONFIG_SPE REGSET_SPE, #endif @@ -422,6 +503,13 @@ static const struct user_regset native_regsets[] = { .active = vr_active, .get = vr_get, .set = vr_set }, #endif +#ifdef CONFIG_VSX + [REGSET_VSX] = { + .core_note_type = NT_PPC_VSX, .n = 32, + .size = sizeof(double), .align = sizeof(double), + .active = vsr_active, .get = vsr_get, .set = vsr_set + }, +#endif #ifdef CONFIG_SPE [REGSET_SPE] = { .n = 35, @@ -616,7 +704,7 @@ void user_enable_single_step(struct task_struct *task) if (regs != NULL) { #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; + task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; regs->msr |= MSR_DE; #else regs->msr |= MSR_SE; @@ -629,9 +717,16 @@ void user_disable_single_step(struct task_struct *task) { struct pt_regs *regs = task->thread.regs; + +#if defined(CONFIG_BOOKE) + /* If DAC then do not single step, skip */ + if (task->thread.dabr) + return; +#endif + if (regs != NULL) { #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - task->thread.dbcr0 = 0; + task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_IDM); regs->msr &= ~MSR_DE; #else regs->msr &= ~MSR_SE; @@ -640,22 +735,76 @@ void user_disable_single_step(struct task_struct *task) clear_tsk_thread_flag(task, TIF_SINGLESTEP); } -static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, +int ptrace_set_debugreg(struct task_struct *task, unsigned long addr, unsigned long data) { - /* We only support one DABR and no IABRS at the moment */ + /* For ppc64 we support one DABR and no IABR's at the moment (ppc64). + * For embedded processors we support one DAC and no IAC's at the + * moment. + */ if (addr > 0) return -EINVAL; - /* The bottom 3 bits are flags */ + /* The bottom 3 bits in dabr are flags */ if ((data & ~0x7UL) >= TASK_SIZE) return -EIO; - /* Ensure translation is on */ +#ifndef CONFIG_BOOKE + + /* For processors using DABR (i.e. 970), the bottom 3 bits are flags. + * It was assumed, on previous implementations, that 3 bits were + * passed together with the data address, fitting the design of the + * DABR register, as follows: + * + * bit 0: Read flag + * bit 1: Write flag + * bit 2: Breakpoint translation + * + * Thus, we use them here as so. + */ + + /* Ensure breakpoint translation bit is set */ if (data && !(data & DABR_TRANSLATION)) return -EIO; + /* Move contents to the DABR register */ task->thread.dabr = data; + +#endif +#if defined(CONFIG_BOOKE) + + /* As described above, it was assumed 3 bits were passed with the data + * address, but we will assume only the mode bits will be passed + * as to not cause alignment restrictions for DAC-based processors. + */ + + /* DAC's hold the whole address without any mode flags */ + task->thread.dabr = data & ~0x3UL; + + if (task->thread.dabr == 0) { + task->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | DBCR0_IDM); + task->thread.regs->msr &= ~MSR_DE; + return 0; + } + + /* Read or Write bits must be set */ + + if (!(data & 0x3UL)) + return -EINVAL; + + /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0 + register */ + task->thread.dbcr0 = DBCR0_IDM; + + /* Check for write and read flags and set DBCR0 + accordingly */ + if (data & 0x1UL) + task->thread.dbcr0 |= DBSR_DAC1R; + if (data & 0x2UL) + task->thread.dbcr0 |= DBSR_DAC1W; + + task->thread.regs->msr |= MSR_DE; +#endif return 0; } @@ -728,7 +877,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) tmp = ptrace_get_reg(child, (int) index); } else { flush_fp_to_thread(child); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned long *)child->thread.fpr) + [TS_FPRWIDTH * (index - PT_FPR0)]; } ret = put_user(tmp,(unsigned long __user *) data); break; @@ -755,7 +905,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ret = ptrace_put_reg(child, index, data); } else { flush_fp_to_thread(child); - ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; + ((unsigned long *)child->thread.fpr) + [TS_FPRWIDTH * (index - PT_FPR0)] = data; ret = 0; } break; @@ -820,6 +971,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) sizeof(u32)), (const void __user *) data); #endif +#ifdef CONFIG_VSX + case PTRACE_GETVSRREGS: + return copy_regset_to_user(child, &user_ppc_native_view, + REGSET_VSX, + 0, (32 * sizeof(vector128) + + sizeof(u32)), + (void __user *) data); + + case PTRACE_SETVSRREGS: + return copy_regset_from_user(child, &user_ppc_native_view, + REGSET_VSX, + 0, (32 * sizeof(vector128) + + sizeof(u32)), + (const void __user *) data); +#endif #ifdef CONFIG_SPE case PTRACE_GETEVRREGS: /* Get the child spe register state. */ @@ -849,31 +1015,24 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -static void do_syscall_trace(void) +/* + * We must return the syscall number to actually look up in the table. + * This can be -1L to skip running any syscall at all. + */ +long do_syscall_trace_enter(struct pt_regs *regs) { - /* the 0x80 provides a way for the tracing parent to distinguish - between a syscall stop and SIGTRAP delivery */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } -} + long ret = 0; -void do_syscall_trace_enter(struct pt_regs *regs) -{ secure_computing(regs->gpr[0]); - if (test_thread_flag(TIF_SYSCALL_TRACE) - && (current->ptrace & PT_PTRACED)) - do_syscall_trace(); + if (test_thread_flag(TIF_SYSCALL_TRACE) && + tracehook_report_syscall_entry(regs)) + /* + * Tracing decided this syscall should not happen. + * We'll return a bogus call number to get an ENOSYS + * error, but leave the original number in regs->gpr[0]. + */ + ret = -1L; if (unlikely(current->audit_context)) { #ifdef CONFIG_PPC64 @@ -891,16 +1050,19 @@ void do_syscall_trace_enter(struct pt_regs *regs) regs->gpr[5] & 0xffffffff, regs->gpr[6] & 0xffffffff); } + + return ret ?: regs->gpr[0]; } void do_syscall_trace_leave(struct pt_regs *regs) { + int step; + if (unlikely(current->audit_context)) audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, regs->result); - if ((test_thread_flag(TIF_SYSCALL_TRACE) - || test_thread_flag(TIF_SINGLESTEP)) - && (current->ptrace & PT_PTRACED)) - do_syscall_trace(); + step = test_thread_flag(TIF_SINGLESTEP); + if (step || test_thread_flag(TIF_SYSCALL_TRACE)) + tracehook_report_syscall_exit(regs, step); } diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c index 4c1de6af4c092da35128e6ae553af27a3dcb9baf..67bf1a1e7e1442f7a3ab9485fc2d95ad17a543f7 100644 --- a/arch/powerpc/kernel/ptrace32.c +++ b/arch/powerpc/kernel/ptrace32.c @@ -64,6 +64,11 @@ static long compat_ptrace_old(struct task_struct *child, long request, return -EPERM; } +/* Macros to workout the correct index for the FPR in the thread struct */ +#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1) +#define FPRHALF(i) (((i) - PT_FPR0) & 1) +#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i) + long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t caddr, compat_ulong_t cdata) { @@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, * to be an array of unsigned int (32 bits) - the * index passed in is based on this assumption. */ - tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0]; + tmp = ((unsigned int *)child->thread.fpr) + [FPRINDEX(index)]; } ret = put_user((unsigned int)tmp, (u32 __user *)data); break; @@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, CHECK_FULL_REGS(child->thread.regs); if (numReg >= PT_FPR0) { flush_fp_to_thread(child); - tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0]; + tmp = ((unsigned long int *)child->thread.fpr) + [FPRINDEX(numReg)]; } else { /* register within PT_REGS struct */ tmp = ptrace_get_reg(child, numReg); } @@ -217,7 +224,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, * to be an array of unsigned int (32 bits) - the * index passed in is based on this assumption. */ - ((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data; + ((unsigned int *)child->thread.fpr) + [FPRINDEX(index)] = data; ret = 0; } break; diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c index f9c6abc84a9483a9fce2fb496642ec863f369fa3..1be9fe38bcb570f990f5b5f462913c3c75929ef1 100644 --- a/arch/powerpc/kernel/rtas-proc.c +++ b/arch/powerpc/kernel/rtas-proc.c @@ -160,7 +160,7 @@ static int sensors_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_sensors_show, NULL); } -const struct file_operations ppc_rtas_sensors_operations = { +static const struct file_operations ppc_rtas_sensors_operations = { .open = sensors_open, .read = seq_read, .llseek = seq_lseek, @@ -172,7 +172,7 @@ static int poweron_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_poweron_show, NULL); } -const struct file_operations ppc_rtas_poweron_operations = { +static const struct file_operations ppc_rtas_poweron_operations = { .open = poweron_open, .read = seq_read, .llseek = seq_lseek, @@ -185,7 +185,7 @@ static int progress_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_progress_show, NULL); } -const struct file_operations ppc_rtas_progress_operations = { +static const struct file_operations ppc_rtas_progress_operations = { .open = progress_open, .read = seq_read, .llseek = seq_lseek, @@ -198,7 +198,7 @@ static int clock_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_clock_show, NULL); } -const struct file_operations ppc_rtas_clock_operations = { +static const struct file_operations ppc_rtas_clock_operations = { .open = clock_open, .read = seq_read, .llseek = seq_lseek, @@ -211,7 +211,7 @@ static int tone_freq_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_tone_freq_show, NULL); } -const struct file_operations ppc_rtas_tone_freq_operations = { +static const struct file_operations ppc_rtas_tone_freq_operations = { .open = tone_freq_open, .read = seq_read, .llseek = seq_lseek, @@ -224,7 +224,7 @@ static int tone_volume_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_tone_volume_show, NULL); } -const struct file_operations ppc_rtas_tone_volume_operations = { +static const struct file_operations ppc_rtas_tone_volume_operations = { .open = tone_volume_open, .read = seq_read, .llseek = seq_lseek, @@ -237,7 +237,7 @@ static int rmo_buf_open(struct inode *inode, struct file *file) return single_open(file, ppc_rtas_rmo_buf_show, NULL); } -const struct file_operations ppc_rtas_rmo_buf_ops = { +static const struct file_operations ppc_rtas_rmo_buf_ops = { .open = rmo_buf_open, .read = seq_read, .llseek = seq_lseek, diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 34843c318419012e73195b8837345b232e4dca85..c680f1bbd3877931d88b776940a08156cc6523ce 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c @@ -340,8 +340,8 @@ int rtas_get_error_log_max(void) EXPORT_SYMBOL(rtas_get_error_log_max); -char rtas_err_buf[RTAS_ERROR_LOG_MAX]; -int rtas_last_error_token; +static char rtas_err_buf[RTAS_ERROR_LOG_MAX]; +static int rtas_last_error_token; /** Return a copy of the detailed error text associated with the * most recent failed call to rtas. Because the error text @@ -484,7 +484,7 @@ unsigned int rtas_busy_delay(int status) } EXPORT_SYMBOL(rtas_busy_delay); -int rtas_error_rc(int rtas_rc) +static int rtas_error_rc(int rtas_rc) { int rc; @@ -747,7 +747,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args) /* Call function on all CPUs. One of us will make the * rtas call */ - if (on_each_cpu(rtas_percpu_suspend_me, &data, 1, 0)) + if (on_each_cpu(rtas_percpu_suspend_me, &data, 0)) data.error = -EINVAL; wait_for_completion(&done); diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c index 0a5e22b22729f6b70443c1b0c9fb622aca4ea26e..149cb112cd1ad398357d33ae766e3add6c6cfc01 100644 --- a/arch/powerpc/kernel/rtas_flash.c +++ b/arch/powerpc/kernel/rtas_flash.c @@ -286,7 +286,7 @@ static ssize_t rtas_flash_read(struct file *file, char __user *buf, } /* constructor for flash_block_cache */ -void rtas_block_ctor(struct kmem_cache *cache, void *ptr) +void rtas_block_ctor(void *ptr) { memset(ptr, 0, RTAS_BLK_SIZE); } @@ -731,7 +731,7 @@ static const struct file_operations validate_flash_operations = { .release = validate_flash_release, }; -int __init rtas_flash_init(void) +static int __init rtas_flash_init(void) { int rc; @@ -817,7 +817,7 @@ cleanup: return rc; } -void __exit rtas_flash_cleanup(void) +static void __exit rtas_flash_cleanup(void) { rtas_flash_term_hook = NULL; diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index 3ab88a9dc70dd0686c3d7c29d125fb42b753f6f7..589a2797eac2006075af50ee60e6bff836f3882c 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c @@ -155,12 +155,12 @@ static int rtas_pci_write_config(struct pci_bus *bus, return PCIBIOS_DEVICE_NOT_FOUND; } -struct pci_ops rtas_pci_ops = { +static struct pci_ops rtas_pci_ops = { .read = rtas_pci_read_config, .write = rtas_pci_write_config, }; -int is_python(struct device_node *dev) +static int is_python(struct device_node *dev) { const char *model = of_get_property(dev, "model", NULL); diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index db540eab09f45befe7ebfbcd64984b5c76d528ea..9cc5a52711e5b585bf78ee2e3934e94405508707 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c @@ -367,7 +367,6 @@ static void __init cpu_init_thread_core_maps(int tpc) * setup_cpu_maps - initialize the following cpu maps: * cpu_possible_map * cpu_present_map - * cpu_sibling_map * * Having the possible map set up early allows us to restrict allocations * of things like irqstacks to num_possible_cpus() rather than NR_CPUS. @@ -475,31 +474,9 @@ void __init smp_setup_cpu_maps(void) */ cpu_init_thread_core_maps(nthreads); } - -/* - * Being that cpu_sibling_map is now a per_cpu array, then it cannot - * be initialized until the per_cpu areas have been created. This - * function is now called from setup_per_cpu_areas(). - */ -void __init smp_setup_cpu_sibling_map(void) -{ -#ifdef CONFIG_PPC64 - int i, cpu, base; - - for_each_possible_cpu(cpu) { - DBG("Sibling map for CPU %d:", cpu); - base = cpu_first_thread_in_core(cpu); - for (i = 0; i < threads_per_core; i++) { - cpu_set(base + i, per_cpu(cpu_sibling_map, cpu)); - DBG(" %d", base + i); - } - DBG("\n"); - } - -#endif /* CONFIG_PPC64 */ -} #endif /* CONFIG_SMP */ +#ifdef CONFIG_PCSPKR_PLATFORM static __init int add_pcspkr(void) { struct device_node *np; @@ -522,6 +499,7 @@ static __init int add_pcspkr(void) return ret; } device_initcall(add_pcspkr); +#endif /* CONFIG_PCSPKR_PLATFORM */ void probe_machine(void) { diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 5112a4aa801d7d6843c2202c7815147831a74d2e..066e65c59b58230091db2145e1e4115abe541b84 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c @@ -43,10 +43,6 @@ #define DBG(fmt...) -#if defined CONFIG_KGDB -#include -#endif - extern void bootx_init(unsigned long r4, unsigned long phys); int boot_cpuid; @@ -81,7 +77,7 @@ int ucache_bsize; * from the address that it was linked at, so we must use RELOC/PTRRELOC * to access static data (including strings). -- paulus */ -unsigned long __init early_init(unsigned long dt_ptr) +notrace unsigned long __init early_init(unsigned long dt_ptr) { unsigned long offset = reloc_offset(); struct cpu_spec *spec; @@ -101,6 +97,10 @@ unsigned long __init early_init(unsigned long dt_ptr) PTRRELOC(&__start___ftr_fixup), PTRRELOC(&__stop___ftr_fixup)); + do_lwsync_fixups(spec->cpu_features, + PTRRELOC(&__start___lwsync_fixup), + PTRRELOC(&__stop___lwsync_fixup)); + return KERNELBASE + offset; } @@ -111,7 +111,7 @@ unsigned long __init early_init(unsigned long dt_ptr) * This is called very early on the boot process, after a minimal * MMU environment has been set up but before MMU_init is called. */ -void __init machine_init(unsigned long dt_ptr, unsigned long phys) +notrace void __init machine_init(unsigned long dt_ptr, unsigned long phys) { /* Enable early debugging if any specified (see udbg.h) */ udbg_early_init(); @@ -127,13 +127,18 @@ void __init machine_init(unsigned long dt_ptr, unsigned long phys) ppc_md.power_save = ppc6xx_idle; #endif +#ifdef CONFIG_E500 + if (cpu_has_feature(CPU_FTR_CAN_DOZE) || + cpu_has_feature(CPU_FTR_CAN_NAP)) + ppc_md.power_save = e500_idle; +#endif if (ppc_md.progress) ppc_md.progress("id mach(): done", 0x200); } #ifdef CONFIG_BOOKE_WDT /* Checks wdt=x and wdt_period=xx command-line option */ -int __init early_parse_wdt(char *p) +notrace int __init early_parse_wdt(char *p) { if (p && strncmp(p, "0", 1) != 0) booke_wdt_enabled = 1; @@ -248,6 +253,28 @@ static void __init irqstack_early_init(void) #define irqstack_early_init() #endif +#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) +static void __init exc_lvl_early_init(void) +{ + unsigned int i; + + /* interrupt stacks must be in lowmem, we get that for free on ppc32 + * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ + for_each_possible_cpu(i) { + critirq_ctx[i] = (struct thread_info *) + __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); +#ifdef CONFIG_BOOKE + dbgirq_ctx[i] = (struct thread_info *) + __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); + mcheckirq_ctx[i] = (struct thread_info *) + __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); +#endif + } +} +#else +#define exc_lvl_early_init() +#endif + /* Warning, IO base is not yet inited */ void __init setup_arch(char **cmdline_p) { @@ -271,18 +298,6 @@ void __init setup_arch(char **cmdline_p) xmon_setup(); -#if defined(CONFIG_KGDB) - if (ppc_md.kgdb_map_scc) - ppc_md.kgdb_map_scc(); - set_debug_traps(); - if (strstr(cmd_line, "gdb")) { - if (ppc_md.progress) - ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); - printk("kgdb breakpoint activated\n"); - breakpoint(); - } -#endif - /* * Set cache line size based on type of cpu as a default. * Systems with OF can look in the properties on the cpu node(s) @@ -305,6 +320,8 @@ void __init setup_arch(char **cmdline_p) init_mm.end_data = (unsigned long) _edata; init_mm.brk = klimit; + exc_lvl_early_init(); + irqstack_early_init(); /* set up the bootmem stuff with available memory */ diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 098fd96a394aa4df6947a2cad11146458de2b29f..8b25f51f03bf9b8fc78da61015859a4ce9585fd0 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -363,6 +363,8 @@ void __init setup_system(void) &__start___ftr_fixup, &__stop___ftr_fixup); do_feature_fixups(powerpc_firmware_features, &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); + do_lwsync_fixups(cur_cpu_spec->cpu_features, + &__start___lwsync_fixup, &__stop___lwsync_fixup); /* * Unflatten the device-tree passed by prom_init or kexec @@ -609,9 +611,6 @@ void __init setup_per_cpu_areas(void) paca[i].data_offset = ptr - __per_cpu_start; memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); } - - /* Now that per_cpu is setup, initialize cpu_sibling_map */ - smp_setup_cpu_sibling_map(); } #endif diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index a65a44fbe52375c5b1b5ca7a8deb33305ab11536..a54405ebd7b0c35236cafedb3edee13bcfb67fb3 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c @@ -9,7 +9,7 @@ * this archive for more details. */ -#include +#include #include #include #include @@ -112,7 +112,7 @@ static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka, } } -int do_signal(sigset_t *oldset, struct pt_regs *regs) +static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs) { siginfo_t info; int signr; @@ -120,7 +120,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) int ret; int is32 = is_32bit_task(); - if (test_thread_flag(TIF_RESTORE_SIGMASK)) + if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK) oldset = ¤t->saved_sigmask; else if (!oldset) oldset = ¤t->blocked; @@ -131,9 +131,10 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) check_syscall_restart(regs, &ka, signr > 0); if (signr <= 0) { + struct thread_info *ti = current_thread_info(); /* No signal to deliver -- put the saved sigmask back */ - if (test_thread_flag(TIF_RESTORE_SIGMASK)) { - clear_thread_flag(TIF_RESTORE_SIGMASK); + if (ti->local_flags & _TLF_RESTORE_SIGMASK) { + ti->local_flags &= ~_TLF_RESTORE_SIGMASK; sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); } return 0; /* no signals delivered */ @@ -144,8 +145,12 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) * user space. The DABR will have been cleared if it * triggered inside the kernel. */ - if (current->thread.dabr) + if (current->thread.dabr) { set_dabr(current->thread.dabr); +#if defined(CONFIG_BOOKE) + mtspr(SPRN_DBCR0, current->thread.dbcr0); +#endif + } if (is32) { if (ka.sa.sa_flags & SA_SIGINFO) @@ -169,15 +174,31 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) /* * A signal was successfully delivered; the saved sigmask is in - * its frame, and we can clear the TIF_RESTORE_SIGMASK flag. + * its frame, and we can clear the TLF_RESTORE_SIGMASK flag. */ - if (test_thread_flag(TIF_RESTORE_SIGMASK)) - clear_thread_flag(TIF_RESTORE_SIGMASK); + current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK; + + /* + * Let tracing know that we've done the handler setup. + */ + tracehook_signal_handler(signr, &info, &ka, regs, + test_thread_flag(TIF_SINGLESTEP)); } return ret; } +void do_signal(struct pt_regs *regs, unsigned long thread_info_flags) +{ + if (thread_info_flags & _TIF_SIGPENDING) + do_signal_pending(NULL, regs); + + if (thread_info_flags & _TIF_NOTIFY_RESUME) { + clear_thread_flag(TIF_NOTIFY_RESUME); + tracehook_notify_resume(regs); + } +} + long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r5, unsigned long r6, unsigned long r7, unsigned long r8, struct pt_regs *regs) diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h index 77efb3d5465a1c95793b9386b86ea1952ecbb21d..28f4b9f5fe5e970a505940acd4268ce355be48c3 100644 --- a/arch/powerpc/kernel/signal.h +++ b/arch/powerpc/kernel/signal.h @@ -24,6 +24,16 @@ extern int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka, siginfo_t *info, sigset_t *oldset, struct pt_regs *regs); +extern unsigned long copy_fpr_to_user(void __user *to, + struct task_struct *task); +extern unsigned long copy_fpr_from_user(struct task_struct *task, + void __user *from); +#ifdef CONFIG_VSX +extern unsigned long copy_vsx_to_user(void __user *to, + struct task_struct *task); +extern unsigned long copy_vsx_from_user(struct task_struct *task, + void __user *from); +#endif #ifdef CONFIG_PPC64 diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index ad6943468ee9f25aee853a3ded8f99271f1c3d72..3e80aa32b8b09e1daf432cb7e112d9a04be7ce4a 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c @@ -67,6 +67,13 @@ #define mcontext mcontext32 #define ucontext ucontext32 +/* + * Userspace code may pass a ucontext which doesn't include VSX added + * at the end. We need to check for this case. + */ +#define UCONTEXTSIZEWITHOUTVSX \ + (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32)) + /* * Returning 0 means we return to userspace via * ret_from_except and thus restore all user @@ -243,7 +250,7 @@ long sys_sigsuspend(old_sigset_t mask) current->state = TASK_INTERRUPTIBLE; schedule(); - set_thread_flag(TIF_RESTORE_SIGMASK); + set_restore_sigmask(); return -ERESTARTNOHAND; } @@ -328,6 +335,75 @@ struct rt_sigframe { int abigap[56]; }; +#ifdef CONFIG_VSX +unsigned long copy_fpr_to_user(void __user *to, + struct task_struct *task) +{ + double buf[ELF_NFPREG]; + int i; + + /* save FPR copy to local buffer then write to the thread_struct */ + for (i = 0; i < (ELF_NFPREG - 1) ; i++) + buf[i] = task->thread.TS_FPR(i); + memcpy(&buf[i], &task->thread.fpscr, sizeof(double)); + return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double)); +} + +unsigned long copy_fpr_from_user(struct task_struct *task, + void __user *from) +{ + double buf[ELF_NFPREG]; + int i; + + if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double))) + return 1; + for (i = 0; i < (ELF_NFPREG - 1) ; i++) + task->thread.TS_FPR(i) = buf[i]; + memcpy(&task->thread.fpscr, &buf[i], sizeof(double)); + + return 0; +} + +unsigned long copy_vsx_to_user(void __user *to, + struct task_struct *task) +{ + double buf[ELF_NVSRHALFREG]; + int i; + + /* save FPR copy to local buffer then write to the thread_struct */ + for (i = 0; i < ELF_NVSRHALFREG; i++) + buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET]; + return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double)); +} + +unsigned long copy_vsx_from_user(struct task_struct *task, + void __user *from) +{ + double buf[ELF_NVSRHALFREG]; + int i; + + if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double))) + return 1; + for (i = 0; i < ELF_NVSRHALFREG ; i++) + task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i]; + return 0; +} +#else +inline unsigned long copy_fpr_to_user(void __user *to, + struct task_struct *task) +{ + return __copy_to_user(to, task->thread.fpr, + ELF_NFPREG * sizeof(double)); +} + +inline unsigned long copy_fpr_from_user(struct task_struct *task, + void __user *from) +{ + return __copy_from_user(task->thread.fpr, from, + ELF_NFPREG * sizeof(double)); +} +#endif + /* * Save the current user registers on the user stack. * We only save the altivec/spe registers if the process has used @@ -336,13 +412,13 @@ struct rt_sigframe { static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, int sigret) { + unsigned long msr = regs->msr; + /* Make sure floating point registers are stored in regs */ flush_fp_to_thread(current); - /* save general and floating-point registers */ - if (save_general_regs(regs, frame) || - __copy_to_user(&frame->mc_fregs, current->thread.fpr, - ELF_NFPREG * sizeof(double))) + /* save general registers */ + if (save_general_regs(regs, frame)) return 1; #ifdef CONFIG_ALTIVEC @@ -354,8 +430,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, return 1; /* set MSR_VEC in the saved MSR value to indicate that frame->mc_vregs contains valid data */ - if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR])) - return 1; + msr |= MSR_VEC; } /* else assert((regs->msr & MSR_VEC) == 0) */ @@ -367,7 +442,22 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) return 1; #endif /* CONFIG_ALTIVEC */ - + if (copy_fpr_to_user(&frame->mc_fregs, current)) + return 1; +#ifdef CONFIG_VSX + /* + * Copy VSR 0-31 upper half from thread_struct to local + * buffer, then write that to userspace. Also set MSR_VSX in + * the saved MSR value to indicate that frame->mc_vregs + * contains valid data + */ + if (current->thread.used_vsr) { + __giveup_vsx(current); + if (copy_vsx_to_user(&frame->mc_vsregs, current)) + return 1; + msr |= MSR_VSX; + } +#endif /* CONFIG_VSX */ #ifdef CONFIG_SPE /* save spe registers */ if (current->thread.used_spe) { @@ -377,8 +467,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, return 1; /* set MSR_SPE in the saved MSR value to indicate that frame->mc_vregs contains valid data */ - if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR])) - return 1; + msr |= MSR_SPE; } /* else assert((regs->msr & MSR_SPE) == 0) */ @@ -387,6 +476,8 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, return 1; #endif /* CONFIG_SPE */ + if (__put_user(msr, &frame->mc_gregs[PT_MSR])) + return 1; if (sigret) { /* Set up the sigreturn trampoline: li r0,sigret; sc */ if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) @@ -409,6 +500,9 @@ static long restore_user_regs(struct pt_regs *regs, long err; unsigned int save_r2 = 0; unsigned long msr; +#ifdef CONFIG_VSX + int i; +#endif /* * restore general registers but not including MSR or SOFTE. Also @@ -436,16 +530,11 @@ static long restore_user_regs(struct pt_regs *regs, */ discard_lazy_cpu_state(); - /* force the process to reload the FP registers from - current->thread when it next does FP instructions */ - regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); - if (__copy_from_user(current->thread.fpr, &sr->mc_fregs, - sizeof(sr->mc_fregs))) - return 1; - #ifdef CONFIG_ALTIVEC - /* force the process to reload the altivec registers from - current->thread when it next does altivec instructions */ + /* + * Force the process to reload the altivec registers from + * current->thread when it next does altivec instructions + */ regs->msr &= ~MSR_VEC; if (msr & MSR_VEC) { /* restore altivec registers from the stack */ @@ -459,6 +548,31 @@ static long restore_user_regs(struct pt_regs *regs, if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) return 1; #endif /* CONFIG_ALTIVEC */ + if (copy_fpr_from_user(current, &sr->mc_fregs)) + return 1; + +#ifdef CONFIG_VSX + /* + * Force the process to reload the VSX registers from + * current->thread when it next does VSX instruction. + */ + regs->msr &= ~MSR_VSX; + if (msr & MSR_VSX) { + /* + * Restore altivec registers from the stack to a local + * buffer, then write this out to the thread_struct + */ + if (copy_vsx_from_user(current, &sr->mc_vsregs)) + return 1; + } else if (current->thread.used_vsr) + for (i = 0; i < 32 ; i++) + current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; +#endif /* CONFIG_VSX */ + /* + * force the process to reload the FP registers from + * current->thread when it next does FP instructions + */ + regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); #ifdef CONFIG_SPE /* force the process to reload the spe registers from @@ -823,12 +937,42 @@ long sys_swapcontext(struct ucontext __user *old_ctx, { unsigned char tmp; +#ifdef CONFIG_PPC64 + unsigned long new_msr = 0; + + if (new_ctx && + __get_user(new_msr, &new_ctx->uc_mcontext.mc_gregs[PT_MSR])) + return -EFAULT; + /* + * Check that the context is not smaller than the original + * size (with VMX but without VSX) + */ + if (ctx_size < UCONTEXTSIZEWITHOUTVSX) + return -EINVAL; + /* + * If the new context state sets the MSR VSX bits but + * it doesn't provide VSX state. + */ + if ((ctx_size < sizeof(struct ucontext)) && + (new_msr & MSR_VSX)) + return -EINVAL; +#ifdef CONFIG_VSX + /* + * If userspace doesn't provide enough room for VSX data, + * but current thread has used VSX, we don't have anywhere + * to store the full context back into. + */ + if ((ctx_size < sizeof(struct ucontext)) && + (current->thread.used_vsr && old_ctx)) + return -EINVAL; +#endif +#else /* Context size is for future use. Right now, we only make sure * we are passed something we understand */ if (ctx_size < sizeof(struct ucontext)) return -EINVAL; - +#endif if (old_ctx != NULL) { struct mcontext __user *mctx; diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c index da7c058e3731ffc712367f7f2f4e01e572d0055d..65ad925c3a8f2e1ece221f7c709619c0a7cc4199 100644 --- a/arch/powerpc/kernel/signal_64.c +++ b/arch/powerpc/kernel/signal_64.c @@ -112,11 +112,29 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs, #else /* CONFIG_ALTIVEC */ err |= __put_user(0, &sc->v_regs); #endif /* CONFIG_ALTIVEC */ + flush_fp_to_thread(current); + /* copy fpr regs and fpscr */ + err |= copy_fpr_to_user(&sc->fp_regs, current); +#ifdef CONFIG_VSX + /* + * Copy VSX low doubleword to local buffer for formatting, + * then out to userspace. Update v_regs to point after the + * VMX data. + */ + if (current->thread.used_vsr) { + __giveup_vsx(current); + v_regs += ELF_NVRREG; + err |= copy_vsx_to_user(v_regs, current); + /* set MSR_VSX in the MSR value in the frame to + * indicate that sc->vs_reg) contains valid data. + */ + msr |= MSR_VSX; + } +#endif /* CONFIG_VSX */ err |= __put_user(&sc->gp_regs, &sc->regs); WARN_ON(!FULL_REGS(regs)); err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE); err |= __put_user(msr, &sc->gp_regs[PT_MSR]); - err |= __copy_to_user(&sc->fp_regs, ¤t->thread.fpr, FP_REGS_SIZE); err |= __put_user(signr, &sc->signal); err |= __put_user(handler, &sc->handler); if (set != NULL) @@ -137,29 +155,32 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig, #endif unsigned long err = 0; unsigned long save_r13 = 0; - elf_greg_t *gregs = (elf_greg_t *)regs; unsigned long msr; +#ifdef CONFIG_VSX int i; +#endif /* If this is not a signal return, we preserve the TLS in r13 */ if (!sig) save_r13 = regs->gpr[13]; - /* copy everything before MSR */ - err |= __copy_from_user(regs, &sc->gp_regs, - PT_MSR*sizeof(unsigned long)); - + /* copy the GPRs */ + err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr)); + err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]); /* get MSR separately, transfer the LE bit if doing signal return */ err |= __get_user(msr, &sc->gp_regs[PT_MSR]); if (sig) regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); - + err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]); + err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]); + err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]); + err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]); + err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]); /* skip SOFTE */ - for (i = PT_MSR+1; i <= PT_RESULT; i++) { - if (i == PT_SOFTE) - continue; - err |= __get_user(gregs[i], &sc->gp_regs[i]); - } + err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]); + err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]); + err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]); + err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]); if (!sig) regs->gpr[13] = save_r13; @@ -180,9 +201,7 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig, * This has to be done before copying stuff into current->thread.fpr/vr * for the reasons explained in the previous comment. */ - regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC); - - err |= __copy_from_user(¤t->thread.fpr, &sc->fp_regs, FP_REGS_SIZE); + regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); #ifdef CONFIG_ALTIVEC err |= __get_user(v_regs, &sc->v_regs); @@ -202,7 +221,23 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig, else current->thread.vrsave = 0; #endif /* CONFIG_ALTIVEC */ + /* restore floating point */ + err |= copy_fpr_from_user(current, &sc->fp_regs); +#ifdef CONFIG_VSX + /* + * Get additional VSX data. Update v_regs to point after the + * VMX data. Copy VSX low doubleword from userspace to local + * buffer for formatting, then into the taskstruct. + */ + v_regs += ELF_NVRREG; + if ((msr & MSR_VSX) != 0) + err |= copy_vsx_from_user(current, v_regs); + else + for (i = 0; i < 32 ; i++) + current->thread.fpr[i][TS_VSRLOWOFFSET] = 0; +#else +#endif return err; } @@ -232,6 +267,13 @@ static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp) return err; } +/* + * Userspace code may pass a ucontext which doesn't include VSX added + * at the end. We need to check for this case. + */ +#define UCONTEXTSIZEWITHOUTVSX \ + (sizeof(struct ucontext) - 32*sizeof(long)) + /* * Handle {get,set,swap}_context operations */ @@ -241,13 +283,34 @@ int sys_swapcontext(struct ucontext __user *old_ctx, { unsigned char tmp; sigset_t set; + unsigned long new_msr = 0; - /* Context size is for future use. Right now, we only make sure - * we are passed something we understand + if (new_ctx && + __get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR])) + return -EFAULT; + /* + * Check that the context is not smaller than the original + * size (with VMX but without VSX) */ - if (ctx_size < sizeof(struct ucontext)) + if (ctx_size < UCONTEXTSIZEWITHOUTVSX) return -EINVAL; - + /* + * If the new context state sets the MSR VSX bits but + * it doesn't provide VSX state. + */ + if ((ctx_size < sizeof(struct ucontext)) && + (new_msr & MSR_VSX)) + return -EINVAL; +#ifdef CONFIG_VSX + /* + * If userspace doesn't provide enough room for VSX data, + * but current thread has used VSX, we don't have anywhere + * to store the full context back into. + */ + if ((ctx_size < sizeof(struct ucontext)) && + (current->thread.used_vsr && old_ctx)) + return -EINVAL; +#endif if (old_ctx != NULL) { if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx)) || setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 1457aa0a08f136355347adcbe122a3d2c1692ba2..5337ca7bb649b02999258143947751109fe6c585 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -41,6 +41,7 @@ #include #include #include +#include #include #include #include @@ -62,22 +63,20 @@ struct thread_info *secondary_ti; cpumask_t cpu_possible_map = CPU_MASK_NONE; cpumask_t cpu_online_map = CPU_MASK_NONE; DEFINE_PER_CPU(cpumask_t, cpu_sibling_map) = CPU_MASK_NONE; +DEFINE_PER_CPU(cpumask_t, cpu_core_map) = CPU_MASK_NONE; EXPORT_SYMBOL(cpu_online_map); EXPORT_SYMBOL(cpu_possible_map); EXPORT_PER_CPU_SYMBOL(cpu_sibling_map); +EXPORT_PER_CPU_SYMBOL(cpu_core_map); /* SMP operations for this machine */ struct smp_ops_t *smp_ops; static volatile unsigned int cpu_callin_map[NR_CPUS]; -void smp_call_function_interrupt(void); - int smt_enabled_at_boot = 1; -static int ipi_fail_ok; - static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; #ifdef CONFIG_PPC64 @@ -99,12 +98,15 @@ void smp_message_recv(int msg) { switch(msg) { case PPC_MSG_CALL_FUNCTION: - smp_call_function_interrupt(); + generic_smp_call_function_interrupt(); break; case PPC_MSG_RESCHEDULE: /* XXX Do we have to do this? */ set_need_resched(); break; + case PPC_MSG_CALL_FUNC_SINGLE: + generic_smp_call_function_single_interrupt(); + break; case PPC_MSG_DEBUGGER_BREAK: if (crash_ipi_function_ptr) { crash_ipi_function_ptr(get_irq_regs()); @@ -128,6 +130,19 @@ void smp_send_reschedule(int cpu) smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); } +void arch_send_call_function_single_ipi(int cpu) +{ + smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNC_SINGLE); +} + +void arch_send_call_function_ipi(cpumask_t mask) +{ + unsigned int cpu; + + for_each_cpu_mask(cpu, mask) + smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION); +} + #ifdef CONFIG_DEBUGGER void smp_send_debugger_break(int cpu) { @@ -154,223 +169,13 @@ static void stop_this_cpu(void *dummy) ; } -/* - * Structure and data for smp_call_function(). This is designed to minimise - * static memory requirements. It also looks cleaner. - * Stolen from the i386 version. - */ -static __cacheline_aligned_in_smp DEFINE_SPINLOCK(call_lock); - -static struct call_data_struct { - void (*func) (void *info); - void *info; - atomic_t started; - atomic_t finished; - int wait; -} *call_data; - -/* delay of at least 8 seconds */ -#define SMP_CALL_TIMEOUT 8 - -/* - * These functions send a 'generic call function' IPI to other online - * CPUS in the system. - * - * [SUMMARY] Run a function on other CPUs. - * The function to run. This must be fast and non-blocking. - * An arbitrary pointer to pass to the function. - * currently unused. - * If true, wait (atomically) until function has completed on other CPUs. - * [RETURNS] 0 on success, else a negative status code. Does not return until - * remote CPUs are nearly ready to execute <> or are or have executed. - * is a cpu map of the cpus to send IPI to. - * - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ -static int __smp_call_function_map(void (*func) (void *info), void *info, - int nonatomic, int wait, cpumask_t map) -{ - struct call_data_struct data; - int ret = -1, num_cpus; - int cpu; - u64 timeout; - - if (unlikely(smp_ops == NULL)) - return ret; - - data.func = func; - data.info = info; - atomic_set(&data.started, 0); - data.wait = wait; - if (wait) - atomic_set(&data.finished, 0); - - /* remove 'self' from the map */ - if (cpu_isset(smp_processor_id(), map)) - cpu_clear(smp_processor_id(), map); - - /* sanity check the map, remove any non-online processors. */ - cpus_and(map, map, cpu_online_map); - - num_cpus = cpus_weight(map); - if (!num_cpus) - goto done; - - call_data = &data; - smp_wmb(); - /* Send a message to all CPUs in the map */ - for_each_cpu_mask(cpu, map) - smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION); - - timeout = get_tb() + (u64) SMP_CALL_TIMEOUT * tb_ticks_per_sec; - - /* Wait for indication that they have received the message */ - while (atomic_read(&data.started) != num_cpus) { - HMT_low(); - if (get_tb() >= timeout) { - printk("smp_call_function on cpu %d: other cpus not " - "responding (%d)\n", smp_processor_id(), - atomic_read(&data.started)); - if (!ipi_fail_ok) - debugger(NULL); - goto out; - } - } - - /* optionally wait for the CPUs to complete */ - if (wait) { - while (atomic_read(&data.finished) != num_cpus) { - HMT_low(); - if (get_tb() >= timeout) { - printk("smp_call_function on cpu %d: other " - "cpus not finishing (%d/%d)\n", - smp_processor_id(), - atomic_read(&data.finished), - atomic_read(&data.started)); - debugger(NULL); - goto out; - } - } - } - - done: - ret = 0; - - out: - call_data = NULL; - HMT_medium(); - return ret; -} - -static int __smp_call_function(void (*func)(void *info), void *info, - int nonatomic, int wait) -{ - int ret; - spin_lock(&call_lock); - ret =__smp_call_function_map(func, info, nonatomic, wait, - cpu_online_map); - spin_unlock(&call_lock); - return ret; -} - -int smp_call_function(void (*func) (void *info), void *info, int nonatomic, - int wait) -{ - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - - return __smp_call_function(func, info, nonatomic, wait); -} -EXPORT_SYMBOL(smp_call_function); - -int smp_call_function_single(int cpu, void (*func) (void *info), void *info, - int nonatomic, int wait) -{ - cpumask_t map = CPU_MASK_NONE; - int ret = 0; - - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - - if (!cpu_online(cpu)) - return -EINVAL; - - cpu_set(cpu, map); - if (cpu != get_cpu()) { - spin_lock(&call_lock); - ret = __smp_call_function_map(func, info, nonatomic, wait, map); - spin_unlock(&call_lock); - } else { - local_irq_disable(); - func(info); - local_irq_enable(); - } - put_cpu(); - return ret; -} -EXPORT_SYMBOL(smp_call_function_single); - void smp_send_stop(void) { - int nolock; - - /* It's OK to fail sending the IPI, since the alternative is to - * be stuck forever waiting on the other CPU to take the interrupt. - * - * It's better to at least continue and go through reboot, since this - * function is usually called at panic or reboot time in the first - * place. - */ - ipi_fail_ok = 1; - - /* Don't deadlock in case we got called through panic */ - nolock = !spin_trylock(&call_lock); - __smp_call_function_map(stop_this_cpu, NULL, 1, 0, cpu_online_map); - if (!nolock) - spin_unlock(&call_lock); -} - -void smp_call_function_interrupt(void) -{ - void (*func) (void *info); - void *info; - int wait; - - /* call_data will be NULL if the sender timed out while - * waiting on us to receive the call. - */ - if (!call_data) - return; - - func = call_data->func; - info = call_data->info; - wait = call_data->wait; - - if (!wait) - smp_mb__before_atomic_inc(); - - /* - * Notify initiating CPU that I've grabbed the data and am - * about to execute the function - */ - atomic_inc(&call_data->started); - /* - * At this point the info structure may be out of scope unless wait==1 - */ - (*func)(info); - if (wait) { - smp_mb__before_atomic_inc(); - atomic_inc(&call_data->finished); - } + smp_call_function(stop_this_cpu, NULL, 0); } -extern struct gettimeofday_struct do_gtod; - struct thread_info *current_set[NR_CPUS]; -DECLARE_PER_CPU(unsigned int, pvr); - static void __devinit smp_store_cpu_info(int id) { per_cpu(pvr, id) = mfspr(SPRN_PVR); @@ -426,6 +231,8 @@ void __devinit smp_prepare_boot_cpu(void) BUG_ON(smp_processor_id() != boot_cpuid); cpu_set(boot_cpuid, cpu_online_map); + cpu_set(boot_cpuid, per_cpu(cpu_sibling_map, boot_cpuid)); + cpu_set(boot_cpuid, per_cpu(cpu_core_map, boot_cpuid)); #ifdef CONFIG_PPC64 paca[boot_cpuid].__current = current; #endif @@ -573,11 +380,60 @@ int __cpuinit __cpu_up(unsigned int cpu) return 0; } +/* Return the value of the reg property corresponding to the given + * logical cpu. + */ +int cpu_to_core_id(int cpu) +{ + struct device_node *np; + const int *reg; + int id = -1; + + np = of_get_cpu_node(cpu, NULL); + if (!np) + goto out; + + reg = of_get_property(np, "reg", NULL); + if (!reg) + goto out; + + id = *reg; +out: + of_node_put(np); + return id; +} + +/* Must be called when no change can occur to cpu_present_map, + * i.e. during cpu online or offline. + */ +static struct device_node *cpu_to_l2cache(int cpu) +{ + struct device_node *np; + const phandle *php; + phandle ph; + + if (!cpu_present(cpu)) + return NULL; + + np = of_get_cpu_node(cpu, NULL); + if (np == NULL) + return NULL; + + php = of_get_property(np, "l2-cache", NULL); + if (php == NULL) + return NULL; + ph = *php; + of_node_put(np); + + return of_find_node_by_phandle(ph); +} /* Activate a secondary processor. */ int __devinit start_secondary(void *unused) { unsigned int cpu = smp_processor_id(); + struct device_node *l2_cache; + int i, base; atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; @@ -596,9 +452,36 @@ int __devinit start_secondary(void *unused) secondary_cpu_time_init(); - spin_lock(&call_lock); + ipi_call_lock(); cpu_set(cpu, cpu_online_map); - spin_unlock(&call_lock); + /* Update sibling maps */ + base = cpu_first_thread_in_core(cpu); + for (i = 0; i < threads_per_core; i++) { + if (cpu_is_offline(base + i)) + continue; + cpu_set(cpu, per_cpu(cpu_sibling_map, base + i)); + cpu_set(base + i, per_cpu(cpu_sibling_map, cpu)); + + /* cpu_core_map should be a superset of + * cpu_sibling_map even if we don't have cache + * information, so update the former here, too. + */ + cpu_set(cpu, per_cpu(cpu_core_map, base +i)); + cpu_set(base + i, per_cpu(cpu_core_map, cpu)); + } + l2_cache = cpu_to_l2cache(cpu); + for_each_online_cpu(i) { + struct device_node *np = cpu_to_l2cache(i); + if (!np) + continue; + if (np == l2_cache) { + cpu_set(cpu, per_cpu(cpu_core_map, i)); + cpu_set(i, per_cpu(cpu_core_map, cpu)); + } + of_node_put(np); + } + of_node_put(l2_cache); + ipi_call_unlock(); local_irq_enable(); @@ -635,10 +518,42 @@ void __init smp_cpus_done(unsigned int max_cpus) #ifdef CONFIG_HOTPLUG_CPU int __cpu_disable(void) { - if (smp_ops->cpu_disable) - return smp_ops->cpu_disable(); + struct device_node *l2_cache; + int cpu = smp_processor_id(); + int base, i; + int err; - return -ENOSYS; + if (!smp_ops->cpu_disable) + return -ENOSYS; + + err = smp_ops->cpu_disable(); + if (err) + return err; + + /* Update sibling maps */ + base = cpu_first_thread_in_core(cpu); + for (i = 0; i < threads_per_core; i++) { + cpu_clear(cpu, per_cpu(cpu_sibling_map, base + i)); + cpu_clear(base + i, per_cpu(cpu_sibling_map, cpu)); + cpu_clear(cpu, per_cpu(cpu_core_map, base +i)); + cpu_clear(base + i, per_cpu(cpu_core_map, cpu)); + } + + l2_cache = cpu_to_l2cache(cpu); + for_each_present_cpu(i) { + struct device_node *np = cpu_to_l2cache(i); + if (!np) + continue; + if (np == l2_cache) { + cpu_clear(cpu, per_cpu(cpu_core_map, i)); + cpu_clear(i, per_cpu(cpu_core_map, cpu)); + } + of_node_put(np); + } + of_node_put(l2_cache); + + + return 0; } void __cpu_die(unsigned int cpu) diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c index 67d6f6890edcb50bfddf8892d9a4ebc8359fd29a..c906c4bf68357f7fb65dcf19298269a6d03cfafd 100644 --- a/arch/powerpc/kernel/softemu8xx.c +++ b/arch/powerpc/kernel/softemu8xx.c @@ -124,7 +124,7 @@ int Soft_emulate_8xx(struct pt_regs *regs) disp = instword & 0xffff; ea = (u32 *)(regs->gpr[idxreg] + disp); - ip = (u32 *)¤t->thread.fpr[flreg]; + ip = (u32 *)¤t->thread.TS_FPR(flreg); switch ( inst ) { @@ -168,7 +168,7 @@ int Soft_emulate_8xx(struct pt_regs *regs) break; case FMR: /* assume this is a fp move -- Cort */ - memcpy(ip, ¤t->thread.fpr[(instword>>11)&0x1f], + memcpy(ip, ¤t->thread.TS_FPR((instword>>11)&0x1f), sizeof(double)); break; default: diff --git a/arch/powerpc/kernel/stacktrace.c b/arch/powerpc/kernel/stacktrace.c index 962944038430f69861181623763abb5f16f98049..b0dbb1daa4df1a6ea309b9b79f228834c888f9cc 100644 --- a/arch/powerpc/kernel/stacktrace.c +++ b/arch/powerpc/kernel/stacktrace.c @@ -10,33 +10,34 @@ * 2 of the License, or (at your option) any later version. */ +#include #include #include #include +#include /* * Save stack-backtrace addresses into a stack_trace buffer. */ -void save_stack_trace(struct stack_trace *trace) +static void save_context_stack(struct stack_trace *trace, unsigned long sp, + struct task_struct *tsk, int savesched) { - unsigned long sp; - - asm("mr %0,1" : "=r" (sp)); - for (;;) { unsigned long *stack = (unsigned long *) sp; unsigned long newsp, ip; - if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD)) + if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD)) return; newsp = stack[0]; ip = stack[STACK_FRAME_LR_SAVE]; - if (!trace->skip) - trace->entries[trace->nr_entries++] = ip; - else - trace->skip--; + if (savesched || !in_sched_functions(ip)) { + if (!trace->skip) + trace->entries[trace->nr_entries++] = ip; + else + trace->skip--; + } if (trace->nr_entries >= trace->max_entries) return; @@ -44,3 +45,19 @@ void save_stack_trace(struct stack_trace *trace) sp = newsp; } } + +void save_stack_trace(struct stack_trace *trace) +{ + unsigned long sp; + + asm("mr %0,1" : "=r" (sp)); + + save_context_stack(trace, sp, current, 1); +} +EXPORT_SYMBOL_GPL(save_stack_trace); + +void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) +{ + save_context_stack(trace, tsk->thread.ksp, tsk, 0); +} +EXPORT_SYMBOL_GPL(save_stack_trace_tsk); diff --git a/arch/powerpc/kernel/suspend.c b/arch/powerpc/kernel/suspend.c index 8cee571075417fadd755e168ba4b0471bf58846f..6fc6328dc626c0809d1fe3e6f85814e26f4dce8c 100644 --- a/arch/powerpc/kernel/suspend.c +++ b/arch/powerpc/kernel/suspend.c @@ -7,6 +7,7 @@ * Copyright (c) 2001 Patrick Mochel */ +#include #include /* References to section boundaries */ diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c index 4fe69ca244818e78fb86c37c2091a023b4e77b0b..c04832c4a02e3965834a48adbaad9450e76ef378 100644 --- a/arch/powerpc/kernel/syscalls.c +++ b/arch/powerpc/kernel/syscalls.c @@ -143,6 +143,9 @@ static inline unsigned long do_mmap2(unsigned long addr, size_t len, struct file * file = NULL; unsigned long ret = -EINVAL; + if (!arch_validate_prot(prot)) + goto out; + if (shift) { if (off & ((1 << shift) - 1)) goto out; diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index c8127f832df0f6d28d8efb0ee3a2097f8933dcce..56d172d16e5654b483e2ddaa087c9c6302e6e42d 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c @@ -22,13 +22,17 @@ static DEFINE_PER_CPU(struct cpu, cpu_devices); +static DEFINE_PER_CPU(struct kobject *, cache_toplevel); + /* SMT stuff */ #ifdef CONFIG_PPC_MULTIPLATFORM /* Time in microseconds we delay before sleeping in the idle loop */ DEFINE_PER_CPU(unsigned long, smt_snooze_delay) = { 100 }; -static ssize_t store_smt_snooze_delay(struct sys_device *dev, const char *buf, +static ssize_t store_smt_snooze_delay(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t count) { struct cpu *cpu = container_of(dev, struct cpu, sysdev); @@ -44,7 +48,9 @@ static ssize_t store_smt_snooze_delay(struct sys_device *dev, const char *buf, return count; } -static ssize_t show_smt_snooze_delay(struct sys_device *dev, char *buf) +static ssize_t show_smt_snooze_delay(struct sys_device *dev, + struct sysdev_attribute *attr, + char *buf) { struct cpu *cpu = container_of(dev, struct cpu, sysdev); @@ -152,14 +158,17 @@ static unsigned long write_##NAME(unsigned long val) \ mtspr(ADDRESS, val); \ return 0; \ } \ -static ssize_t show_##NAME(struct sys_device *dev, char *buf) \ +static ssize_t show_##NAME(struct sys_device *dev, \ + struct sysdev_attribute *attr, \ + char *buf) \ { \ struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \ return sprintf(buf, "%lx\n", val); \ } \ static ssize_t __used \ - store_##NAME(struct sys_device *dev, const char *buf, size_t count) \ + store_##NAME(struct sys_device *dev, struct sysdev_attribute *attr, \ + const char *buf, size_t count) \ { \ struct cpu *cpu = container_of(dev, struct cpu, sysdev); \ unsigned long val; \ @@ -290,8 +299,289 @@ static struct sysdev_attribute pa6t_attrs[] = { #endif /* CONFIG_DEBUG_KERNEL */ }; +struct cache_desc { + struct kobject kobj; + struct cache_desc *next; + const char *type; /* Instruction, Data, or Unified */ + u32 size; /* total cache size in KB */ + u32 line_size; /* in bytes */ + u32 nr_sets; /* number of sets */ + u32 level; /* e.g. 1, 2, 3... */ + u32 associativity; /* e.g. 8-way... 0 is fully associative */ +}; + +DEFINE_PER_CPU(struct cache_desc *, cache_desc); + +static struct cache_desc *kobj_to_cache_desc(struct kobject *k) +{ + return container_of(k, struct cache_desc, kobj); +} + +static void cache_desc_release(struct kobject *k) +{ + struct cache_desc *desc = kobj_to_cache_desc(k); + + pr_debug("%s: releasing %s\n", __func__, kobject_name(k)); + + if (desc->next) + kobject_put(&desc->next->kobj); + + kfree(kobj_to_cache_desc(k)); +} + +static ssize_t cache_desc_show(struct kobject *k, struct attribute *attr, char *buf) +{ + struct kobj_attribute *kobj_attr; + + kobj_attr = container_of(attr, struct kobj_attribute, attr); + + return kobj_attr->show(k, kobj_attr, buf); +} + +static struct sysfs_ops cache_desc_sysfs_ops = { + .show = cache_desc_show, +}; + +static struct kobj_type cache_desc_type = { + .release = cache_desc_release, + .sysfs_ops = &cache_desc_sysfs_ops, +}; + +static ssize_t cache_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%uK\n", cache->size); +} + +static struct kobj_attribute cache_size_attr = + __ATTR(size, 0444, cache_size_show, NULL); + +static ssize_t cache_line_size_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%u\n", cache->line_size); +} + +static struct kobj_attribute cache_line_size_attr = + __ATTR(coherency_line_size, 0444, cache_line_size_show, NULL); + +static ssize_t cache_nr_sets_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%u\n", cache->nr_sets); +} + +static struct kobj_attribute cache_nr_sets_attr = + __ATTR(number_of_sets, 0444, cache_nr_sets_show, NULL); + +static ssize_t cache_type_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%s\n", cache->type); +} + +static struct kobj_attribute cache_type_attr = + __ATTR(type, 0444, cache_type_show, NULL); + +static ssize_t cache_level_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%u\n", cache->level); +} + +static struct kobj_attribute cache_level_attr = + __ATTR(level, 0444, cache_level_show, NULL); + +static ssize_t cache_assoc_show(struct kobject *k, struct kobj_attribute *attr, char *buf) +{ + struct cache_desc *cache = kobj_to_cache_desc(k); + + return sprintf(buf, "%u\n", cache->associativity); +} + +static struct kobj_attribute cache_assoc_attr = + __ATTR(ways_of_associativity, 0444, cache_assoc_show, NULL); + +struct cache_desc_info { + const char *type; + const char *size_prop; + const char *line_size_prop; + const char *nr_sets_prop; +}; + +/* PowerPC Processor binding says the [di]-cache-* must be equal on + * unified caches, so just use d-cache properties. */ +static struct cache_desc_info ucache_info = { + .type = "Unified", + .size_prop = "d-cache-size", + .line_size_prop = "d-cache-line-size", + .nr_sets_prop = "d-cache-sets", +}; -static void register_cpu_online(unsigned int cpu) +static struct cache_desc_info dcache_info = { + .type = "Data", + .size_prop = "d-cache-size", + .line_size_prop = "d-cache-line-size", + .nr_sets_prop = "d-cache-sets", +}; + +static struct cache_desc_info icache_info = { + .type = "Instruction", + .size_prop = "i-cache-size", + .line_size_prop = "i-cache-line-size", + .nr_sets_prop = "i-cache-sets", +}; + +static struct cache_desc * __cpuinit create_cache_desc(struct device_node *np, struct kobject *parent, int index, int level, struct cache_desc_info *info) +{ + const u32 *cache_line_size; + struct cache_desc *new; + const u32 *cache_size; + const u32 *nr_sets; + int rc; + + new = kzalloc(sizeof(*new), GFP_KERNEL); + if (!new) + return NULL; + + rc = kobject_init_and_add(&new->kobj, &cache_desc_type, parent, + "index%d", index); + if (rc) + goto err; + + /* type */ + new->type = info->type; + rc = sysfs_create_file(&new->kobj, &cache_type_attr.attr); + WARN_ON(rc); + + /* level */ + new->level = level; + rc = sysfs_create_file(&new->kobj, &cache_level_attr.attr); + WARN_ON(rc); + + /* size */ + cache_size = of_get_property(np, info->size_prop, NULL); + if (cache_size) { + new->size = *cache_size / 1024; + rc = sysfs_create_file(&new->kobj, + &cache_size_attr.attr); + WARN_ON(rc); + } + + /* coherency_line_size */ + cache_line_size = of_get_property(np, info->line_size_prop, NULL); + if (cache_line_size) { + new->line_size = *cache_line_size; + rc = sysfs_create_file(&new->kobj, + &cache_line_size_attr.attr); + WARN_ON(rc); + } + + /* number_of_sets */ + nr_sets = of_get_property(np, info->nr_sets_prop, NULL); + if (nr_sets) { + new->nr_sets = *nr_sets; + rc = sysfs_create_file(&new->kobj, + &cache_nr_sets_attr.attr); + WARN_ON(rc); + } + + /* ways_of_associativity */ + if (new->nr_sets == 1) { + /* fully associative */ + new->associativity = 0; + goto create_assoc; + } + + if (new->nr_sets && new->size && new->line_size) { + /* If we have values for all of these we can derive + * the associativity. */ + new->associativity = + ((new->size * 1024) / new->nr_sets) / new->line_size; +create_assoc: + rc = sysfs_create_file(&new->kobj, + &cache_assoc_attr.attr); + WARN_ON(rc); + } + + return new; +err: + kfree(new); + return NULL; +} + +static bool cache_is_unified(struct device_node *np) +{ + return of_get_property(np, "cache-unified", NULL); +} + +static struct cache_desc * __cpuinit create_cache_index_info(struct device_node *np, struct kobject *parent, int index, int level) +{ + const phandle *next_cache_phandle; + struct device_node *next_cache; + struct cache_desc *new, **end; + + pr_debug("%s(node = %s, index = %d)\n", __func__, np->full_name, index); + + if (cache_is_unified(np)) { + new = create_cache_desc(np, parent, index, level, + &ucache_info); + } else { + new = create_cache_desc(np, parent, index, level, + &dcache_info); + if (new) { + index++; + new->next = create_cache_desc(np, parent, index, level, + &icache_info); + } + } + if (!new) + return NULL; + + end = &new->next; + while (*end) + end = &(*end)->next; + + next_cache_phandle = of_get_property(np, "l2-cache", NULL); + if (!next_cache_phandle) + goto out; + + next_cache = of_find_node_by_phandle(*next_cache_phandle); + if (!next_cache) + goto out; + + *end = create_cache_index_info(next_cache, parent, ++index, ++level); + + of_node_put(next_cache); +out: + return new; +} + +static void __cpuinit create_cache_info(struct sys_device *sysdev) +{ + struct kobject *cache_toplevel; + struct device_node *np = NULL; + int cpu = sysdev->id; + + cache_toplevel = kobject_create_and_add("cache", &sysdev->kobj); + if (!cache_toplevel) + return; + per_cpu(cache_toplevel, cpu) = cache_toplevel; + np = of_get_cpu_node(cpu, NULL); + if (np != NULL) { + per_cpu(cache_desc, cpu) = + create_cache_index_info(np, cache_toplevel, 0, 1); + of_node_put(np); + } + return; +} + +static void __cpuinit register_cpu_online(unsigned int cpu) { struct cpu *c = &per_cpu(cpu_devices, cpu); struct sys_device *s = &c->sysdev; @@ -339,9 +629,33 @@ static void register_cpu_online(unsigned int cpu) if (cpu_has_feature(CPU_FTR_DSCR)) sysdev_create_file(s, &attr_dscr); + + create_cache_info(s); } #ifdef CONFIG_HOTPLUG_CPU +static void remove_cache_info(struct sys_device *sysdev) +{ + struct kobject *cache_toplevel; + struct cache_desc *cache_desc; + int cpu = sysdev->id; + + cache_desc = per_cpu(cache_desc, cpu); + if (cache_desc != NULL) { + sysfs_remove_file(&cache_desc->kobj, &cache_size_attr.attr); + sysfs_remove_file(&cache_desc->kobj, &cache_line_size_attr.attr); + sysfs_remove_file(&cache_desc->kobj, &cache_type_attr.attr); + sysfs_remove_file(&cache_desc->kobj, &cache_level_attr.attr); + sysfs_remove_file(&cache_desc->kobj, &cache_nr_sets_attr.attr); + sysfs_remove_file(&cache_desc->kobj, &cache_assoc_attr.attr); + + kobject_put(&cache_desc->kobj); + } + cache_toplevel = per_cpu(cache_toplevel, cpu); + if (cache_toplevel != NULL) + kobject_put(cache_toplevel); +} + static void unregister_cpu_online(unsigned int cpu) { struct cpu *c = &per_cpu(cpu_devices, cpu); @@ -392,6 +706,8 @@ static void unregister_cpu_online(unsigned int cpu) if (cpu_has_feature(CPU_FTR_DSCR)) sysdev_remove_file(s, &attr_dscr); + + remove_cache_info(s); } #endif /* CONFIG_HOTPLUG_CPU */ @@ -522,7 +838,8 @@ static void register_nodes(void) #endif /* Only valid if CPU is present. */ -static ssize_t show_physical_id(struct sys_device *dev, char *buf) +static ssize_t show_physical_id(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct cpu *cpu = container_of(dev, struct cpu, sysdev); diff --git a/arch/powerpc/kernel/tau_6xx.c b/arch/powerpc/kernel/tau_6xx.c index 368a4934f7eec026eb1779e17443e0a9039cf92e..c3a56d65c5a9ed9afdeec83c8d7e6ae47935dc72 100644 --- a/arch/powerpc/kernel/tau_6xx.c +++ b/arch/powerpc/kernel/tau_6xx.c @@ -192,7 +192,7 @@ static void tau_timeout_smp(unsigned long unused) /* schedule ourselves to be run again */ mod_timer(&tau_timer, jiffies + shrink_timer) ; - on_each_cpu(tau_timeout, NULL, 1, 0); + on_each_cpu(tau_timeout, NULL, 0); } /* @@ -234,7 +234,7 @@ int __init TAU_init(void) tau_timer.expires = jiffies + shrink_timer; add_timer(&tau_timer); - on_each_cpu(TAU_init_smp, NULL, 1, 0); + on_each_cpu(TAU_init_smp, NULL, 0); printk("Thermal assist unit "); #ifdef CONFIG_TAU_INT diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 73401e83739a09b4dcefdaecc84451c018607ca5..e2ee66b5831d9f86cf41704784863cd74bbc3c91 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c @@ -129,7 +129,7 @@ static unsigned long __initdata iSeries_recal_titan; static signed long __initdata iSeries_recal_tb; /* Forward declaration is only needed for iSereis compiles */ -void __init clocksource_init(void); +static void __init clocksource_init(void); #endif #define XSEC_PER_SEC (1024*1024) @@ -150,8 +150,8 @@ u64 tb_to_xs; unsigned tb_to_us; #define TICKLEN_SCALE NTP_SCALE_SHIFT -u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ -u64 ticklen_to_xs; /* 0.64 fraction */ +static u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ +static u64 ticklen_to_xs; /* 0.64 fraction */ /* If last_tick_len corresponds to about 1/HZ seconds, then last_tick_len << TICKLEN_SHIFT will be about 2^63. */ @@ -164,7 +164,7 @@ static u64 tb_to_ns_scale __read_mostly; static unsigned tb_to_ns_shift __read_mostly; static unsigned long boot_tb __read_mostly; -struct gettimeofday_struct do_gtod; +static struct gettimeofday_struct do_gtod; extern struct timezone sys_tz; static long timezone_offset; @@ -322,7 +322,7 @@ void snapshot_timebases(void) { if (!cpu_has_feature(CPU_FTR_PURR)) return; - on_each_cpu(snapshot_tb_and_purr, NULL, 0, 1); + on_each_cpu(snapshot_tb_and_purr, NULL, 1); } /* @@ -742,10 +742,6 @@ void __init generic_calibrate_decr(void) } #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) - /* Set the time base to zero */ - mtspr(SPRN_TBWL, 0); - mtspr(SPRN_TBWU, 0); - /* Clear any pending timer interrupts */ mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); @@ -832,7 +828,7 @@ void update_vsyscall_tz(void) ++vdso_data->tb_update_count; } -void __init clocksource_init(void) +static void __init clocksource_init(void) { struct clocksource *clock; diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 4b5b7ff4f78bb0e4564718fd7836f3a1542dae9f..81ccb8dd1a54d8f95b0ed84f357d6e64e5395ab1 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -967,6 +967,20 @@ void altivec_unavailable_exception(struct pt_regs *regs) die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); } +void vsx_unavailable_exception(struct pt_regs *regs) +{ + if (user_mode(regs)) { + /* A user program has executed an vsx instruction, + but this kernel doesn't support vsx. */ + _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); + return; + } + + printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception " + "%lx at %lx\n", regs->trap, regs->nip); + die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT); +} + void performance_monitor_exception(struct pt_regs *regs) { perf_irq(regs); @@ -1030,21 +1044,45 @@ void SoftwareEmulation(struct pt_regs *regs) #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) -void DebugException(struct pt_regs *regs, unsigned long debug_status) +void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) { if (debug_status & DBSR_IC) { /* instruction completion */ regs->msr &= ~MSR_DE; + + /* Disable instruction completion */ + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); + /* Clear the instruction completion event */ + mtspr(SPRN_DBSR, DBSR_IC); + + if (notify_die(DIE_SSTEP, "single_step", regs, 5, + 5, SIGTRAP) == NOTIFY_STOP) { + return; + } + + if (debugger_sstep(regs)) + return; + if (user_mode(regs)) { current->thread.dbcr0 &= ~DBCR0_IC; + } + + _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); + } else if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) { + regs->msr &= ~MSR_DE; + + if (user_mode(regs)) { + current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | + DBCR0_IDM); } else { - /* Disable instruction completion */ - mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); - /* Clear the instruction completion event */ - mtspr(SPRN_DBSR, DBSR_IC); - if (debugger_sstep(regs)) - return; + /* Disable DAC interupts */ + mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | + DBSR_DAC1W | DBCR0_IDM)); + + /* Clear the DAC event */ + mtspr(SPRN_DBSR, (DBSR_DAC1R | DBSR_DAC1W)); } - _exception(SIGTRAP, regs, TRAP_TRACE, 0); + /* Setup and send the trap to the handler */ + do_dabr(regs, mfspr(SPRN_DAC1), debug_status); } } #endif /* CONFIG_4xx || CONFIG_BOOKE */ @@ -1091,6 +1129,21 @@ void altivec_assist_exception(struct pt_regs *regs) } #endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_VSX +void vsx_assist_exception(struct pt_regs *regs) +{ + if (!user_mode(regs)) { + printk(KERN_EMERG "VSX assist exception in kernel mode" + " at %lx\n", regs->nip); + die("Kernel VSX assist exception", regs, SIGILL); + } + + flush_vsx_to_thread(current); + printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip); + _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); +} +#endif /* CONFIG_VSX */ + #ifdef CONFIG_FSL_BOOKE void CacheLockingException(struct pt_regs *regs, unsigned long address, unsigned long error_code) diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c index ce245a850db2b8d90d0d35dcd98a2e1fa39d97b7..f177c60ea766a746893ca6de4707cd95b01181f8 100644 --- a/arch/powerpc/kernel/vdso.c +++ b/arch/powerpc/kernel/vdso.c @@ -571,6 +571,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32, if (start64) do_feature_fixups(powerpc_firmware_features, start64, start64 + size64); + + start64 = find_section64(v64->hdr, "__lwsync_fixup", &size64); + if (start64) + do_lwsync_fixups(cur_cpu_spec->cpu_features, + start64, start64 + size64); #endif /* CONFIG_PPC64 */ start32 = find_section32(v32->hdr, "__ftr_fixup", &size32); @@ -585,6 +590,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32, start32, start32 + size32); #endif /* CONFIG_PPC64 */ + start32 = find_section32(v32->hdr, "__lwsync_fixup", &size32); + if (start32) + do_lwsync_fixups(cur_cpu_spec->cpu_features, + start32, start32 + size32); + return 0; } diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S index 9352ab5200e591ba2a0b2cb551f125a2b29dc652..be3b6a41dc09f7c78402405182502eff3f360dd4 100644 --- a/arch/powerpc/kernel/vdso32/vdso32.lds.S +++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S @@ -24,7 +24,7 @@ SECTIONS . = ALIGN(16); .text : { - *(.text .stub .text.* .gnu.linkonce.t.*) + *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*) } PROVIDE(__etext = .); PROVIDE(_etext = .); @@ -33,6 +33,9 @@ SECTIONS . = ALIGN(8); __ftr_fixup : { *(__ftr_fixup) } + . = ALIGN(8); + __lwsync_fixup : { *(__lwsync_fixup) } + #ifdef CONFIG_PPC64 . = ALIGN(8); __fw_ftr_fixup : { *(__fw_ftr_fixup) } diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S index 932b3fdb34b93ced7bd2c10da184f67ff906a66b..d0b2526dd38d05e0dda9870d4dd1eea529845bea 100644 --- a/arch/powerpc/kernel/vdso64/vdso64.lds.S +++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S @@ -24,7 +24,7 @@ SECTIONS . = ALIGN(16); .text : { - *(.text .stub .text.* .gnu.linkonce.t.*) + *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*) *(.sfpr .glink) } :text PROVIDE(__etext = .); @@ -34,6 +34,9 @@ SECTIONS . = ALIGN(8); __ftr_fixup : { *(__ftr_fixup) } + . = ALIGN(8); + __lwsync_fixup : { *(__lwsync_fixup) } + . = ALIGN(8); __fw_ftr_fixup : { *(__fw_ftr_fixup) } @@ -43,15 +46,15 @@ SECTIONS .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } .rodata1 : { *(.rodata1) } + .dynamic : { *(.dynamic) } :text :dynamic + .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr .eh_frame : { KEEP (*(.eh_frame)) } :text .gcc_except_table : { *(.gcc_except_table) } + .rela.dyn ALIGN(8) : { *(.rela.dyn) } .opd ALIGN(8) : { KEEP (*(.opd)) } .got ALIGN(8) : { *(.got .toc) } - .rela.dyn ALIGN(8) : { *(.rela.dyn) } - - .dynamic : { *(.dynamic) } :text :dynamic _end = .; PROVIDE(end = .); diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c index b77f8af7ddde7e5a4b2228065eddbae361fc05a5..22a3c33fd7513c5288cef156f931f62a1c4f41df 100644 --- a/arch/powerpc/kernel/vio.c +++ b/arch/powerpc/kernel/vio.c @@ -1,11 +1,12 @@ /* * IBM PowerPC Virtual I/O Infrastructure Support. * - * Copyright (c) 2003-2005 IBM Corp. + * Copyright (c) 2003,2008 IBM Corp. * Dave Engebretsen engebret@us.ibm.com * Santiago Leon santil@us.ibm.com * Hollis Blanchard * Stephen Rothwell + * Robert Jennings * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -46,6 +47,996 @@ static struct vio_dev vio_bus_device = { /* fake "parent" device */ .dev.bus = &vio_bus_type, }; +#ifdef CONFIG_PPC_SMLPAR +/** + * vio_cmo_pool - A pool of IO memory for CMO use + * + * @size: The size of the pool in bytes + * @free: The amount of free memory in the pool + */ +struct vio_cmo_pool { + size_t size; + size_t free; +}; + +/* How many ms to delay queued balance work */ +#define VIO_CMO_BALANCE_DELAY 100 + +/* Portion out IO memory to CMO devices by this chunk size */ +#define VIO_CMO_BALANCE_CHUNK 131072 + +/** + * vio_cmo_dev_entry - A device that is CMO-enabled and requires entitlement + * + * @vio_dev: struct vio_dev pointer + * @list: pointer to other devices on bus that are being tracked + */ +struct vio_cmo_dev_entry { + struct vio_dev *viodev; + struct list_head list; +}; + +/** + * vio_cmo - VIO bus accounting structure for CMO entitlement + * + * @lock: spinlock for entire structure + * @balance_q: work queue for balancing system entitlement + * @device_list: list of CMO-enabled devices requiring entitlement + * @entitled: total system entitlement in bytes + * @reserve: pool of memory from which devices reserve entitlement, incl. spare + * @excess: pool of excess entitlement not needed for device reserves or spare + * @spare: IO memory for device hotplug functionality + * @min: minimum necessary for system operation + * @desired: desired memory for system operation + * @curr: bytes currently allocated + * @high: high water mark for IO data usage + */ +struct vio_cmo { + spinlock_t lock; + struct delayed_work balance_q; + struct list_head device_list; + size_t entitled; + struct vio_cmo_pool reserve; + struct vio_cmo_pool excess; + size_t spare; + size_t min; + size_t desired; + size_t curr; + size_t high; +} vio_cmo; + +/** + * vio_cmo_OF_devices - Count the number of OF devices that have DMA windows + */ +static int vio_cmo_num_OF_devs(void) +{ + struct device_node *node_vroot; + int count = 0; + + /* + * Count the number of vdevice entries with an + * ibm,my-dma-window OF property + */ + node_vroot = of_find_node_by_name(NULL, "vdevice"); + if (node_vroot) { + struct device_node *of_node; + struct property *prop; + + for_each_child_of_node(node_vroot, of_node) { + prop = of_find_property(of_node, "ibm,my-dma-window", + NULL); + if (prop) + count++; + } + } + of_node_put(node_vroot); + return count; +} + +/** + * vio_cmo_alloc - allocate IO memory for CMO-enable devices + * + * @viodev: VIO device requesting IO memory + * @size: size of allocation requested + * + * Allocations come from memory reserved for the devices and any excess + * IO memory available to all devices. The spare pool used to service + * hotplug must be equal to %VIO_CMO_MIN_ENT for the excess pool to be + * made available. + * + * Return codes: + * 0 for successful allocation and -ENOMEM for a failure + */ +static inline int vio_cmo_alloc(struct vio_dev *viodev, size_t size) +{ + unsigned long flags; + size_t reserve_free = 0; + size_t excess_free = 0; + int ret = -ENOMEM; + + spin_lock_irqsave(&vio_cmo.lock, flags); + + /* Determine the amount of free entitlement available in reserve */ + if (viodev->cmo.entitled > viodev->cmo.allocated) + reserve_free = viodev->cmo.entitled - viodev->cmo.allocated; + + /* If spare is not fulfilled, the excess pool can not be used. */ + if (vio_cmo.spare >= VIO_CMO_MIN_ENT) + excess_free = vio_cmo.excess.free; + + /* The request can be satisfied */ + if ((reserve_free + excess_free) >= size) { + vio_cmo.curr += size; + if (vio_cmo.curr > vio_cmo.high) + vio_cmo.high = vio_cmo.curr; + viodev->cmo.allocated += size; + size -= min(reserve_free, size); + vio_cmo.excess.free -= size; + ret = 0; + } + + spin_unlock_irqrestore(&vio_cmo.lock, flags); + return ret; +} + +/** + * vio_cmo_dealloc - deallocate IO memory from CMO-enable devices + * @viodev: VIO device freeing IO memory + * @size: size of deallocation + * + * IO memory is freed by the device back to the correct memory pools. + * The spare pool is replenished first from either memory pool, then + * the reserve pool is used to reduce device entitlement, the excess + * pool is used to increase the reserve pool toward the desired entitlement + * target, and then the remaining memory is returned to the pools. + * + */ +static inline void vio_cmo_dealloc(struct vio_dev *viodev, size_t size) +{ + unsigned long flags; + size_t spare_needed = 0; + size_t excess_freed = 0; + size_t reserve_freed = size; + size_t tmp; + int balance = 0; + + spin_lock_irqsave(&vio_cmo.lock, flags); + vio_cmo.curr -= size; + + /* Amount of memory freed from the excess pool */ + if (viodev->cmo.allocated > viodev->cmo.entitled) { + excess_freed = min(reserve_freed, (viodev->cmo.allocated - + viodev->cmo.entitled)); + reserve_freed -= excess_freed; + } + + /* Remove allocation from device */ + viodev->cmo.allocated -= (reserve_freed + excess_freed); + + /* Spare is a subset of the reserve pool, replenish it first. */ + spare_needed = VIO_CMO_MIN_ENT - vio_cmo.spare; + + /* + * Replenish the spare in the reserve pool from the excess pool. + * This moves entitlement into the reserve pool. + */ + if (spare_needed && excess_freed) { + tmp = min(excess_freed, spare_needed); + vio_cmo.excess.size -= tmp; + vio_cmo.reserve.size += tmp; + vio_cmo.spare += tmp; + excess_freed -= tmp; + spare_needed -= tmp; + balance = 1; + } + + /* + * Replenish the spare in the reserve pool from the reserve pool. + * This removes entitlement from the device down to VIO_CMO_MIN_ENT, + * if needed, and gives it to the spare pool. The amount of used + * memory in this pool does not change. + */ + if (spare_needed && reserve_freed) { + tmp = min(spare_needed, min(reserve_freed, + (viodev->cmo.entitled - + VIO_CMO_MIN_ENT))); + + vio_cmo.spare += tmp; + viodev->cmo.entitled -= tmp; + reserve_freed -= tmp; + spare_needed -= tmp; + balance = 1; + } + + /* + * Increase the reserve pool until the desired allocation is met. + * Move an allocation freed from the excess pool into the reserve + * pool and schedule a balance operation. + */ + if (excess_freed && (vio_cmo.desired > vio_cmo.reserve.size)) { + tmp = min(excess_freed, (vio_cmo.desired - vio_cmo.reserve.size)); + + vio_cmo.excess.size -= tmp; + vio_cmo.reserve.size += tmp; + excess_freed -= tmp; + balance = 1; + } + + /* Return memory from the excess pool to that pool */ + if (excess_freed) + vio_cmo.excess.free += excess_freed; + + if (balance) + schedule_delayed_work(&vio_cmo.balance_q, VIO_CMO_BALANCE_DELAY); + spin_unlock_irqrestore(&vio_cmo.lock, flags); +} + +/** + * vio_cmo_entitlement_update - Manage system entitlement changes + * + * @new_entitlement: new system entitlement to attempt to accommodate + * + * Increases in entitlement will be used to fulfill the spare entitlement + * and the rest is given to the excess pool. Decreases, if they are + * possible, come from the excess pool and from unused device entitlement + * + * Returns: 0 on success, -ENOMEM when change can not be made + */ +int vio_cmo_entitlement_update(size_t new_entitlement) +{ + struct vio_dev *viodev; + struct vio_cmo_dev_entry *dev_ent; + unsigned long flags; + size_t avail, delta, tmp; + + spin_lock_irqsave(&vio_cmo.lock, flags); + + /* Entitlement increases */ + if (new_entitlement > vio_cmo.entitled) { + delta = new_entitlement - vio_cmo.entitled; + + /* Fulfill spare allocation */ + if (vio_cmo.spare < VIO_CMO_MIN_ENT) { + tmp = min(delta, (VIO_CMO_MIN_ENT - vio_cmo.spare)); + vio_cmo.spare += tmp; + vio_cmo.reserve.size += tmp; + delta -= tmp; + } + + /* Remaining new allocation goes to the excess pool */ + vio_cmo.entitled += delta; + vio_cmo.excess.size += delta; + vio_cmo.excess.free += delta; + + goto out; + } + + /* Entitlement decreases */ + delta = vio_cmo.entitled - new_entitlement; + avail = vio_cmo.excess.free; + + /* + * Need to check how much unused entitlement each device can + * sacrifice to fulfill entitlement change. + */ + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) { + if (avail >= delta) + break; + + viodev = dev_ent->viodev; + if ((viodev->cmo.entitled > viodev->cmo.allocated) && + (viodev->cmo.entitled > VIO_CMO_MIN_ENT)) + avail += viodev->cmo.entitled - + max_t(size_t, viodev->cmo.allocated, + VIO_CMO_MIN_ENT); + } + + if (delta <= avail) { + vio_cmo.entitled -= delta; + + /* Take entitlement from the excess pool first */ + tmp = min(vio_cmo.excess.free, delta); + vio_cmo.excess.size -= tmp; + vio_cmo.excess.free -= tmp; + delta -= tmp; + + /* + * Remove all but VIO_CMO_MIN_ENT bytes from devices + * until entitlement change is served + */ + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) { + if (!delta) + break; + + viodev = dev_ent->viodev; + tmp = 0; + if ((viodev->cmo.entitled > viodev->cmo.allocated) && + (viodev->cmo.entitled > VIO_CMO_MIN_ENT)) + tmp = viodev->cmo.entitled - + max_t(size_t, viodev->cmo.allocated, + VIO_CMO_MIN_ENT); + viodev->cmo.entitled -= min(tmp, delta); + delta -= min(tmp, delta); + } + } else { + spin_unlock_irqrestore(&vio_cmo.lock, flags); + return -ENOMEM; + } + +out: + schedule_delayed_work(&vio_cmo.balance_q, 0); + spin_unlock_irqrestore(&vio_cmo.lock, flags); + return 0; +} + +/** + * vio_cmo_balance - Balance entitlement among devices + * + * @work: work queue structure for this operation + * + * Any system entitlement above the minimum needed for devices, or + * already allocated to devices, can be distributed to the devices. + * The list of devices is iterated through to recalculate the desired + * entitlement level and to determine how much entitlement above the + * minimum entitlement is allocated to devices. + * + * Small chunks of the available entitlement are given to devices until + * their requirements are fulfilled or there is no entitlement left to give. + * Upon completion sizes of the reserve and excess pools are calculated. + * + * The system minimum entitlement level is also recalculated here. + * Entitlement will be reserved for devices even after vio_bus_remove to + * accommodate reloading the driver. The OF tree is walked to count the + * number of devices present and this will remove entitlement for devices + * that have actually left the system after having vio_bus_remove called. + */ +static void vio_cmo_balance(struct work_struct *work) +{ + struct vio_cmo *cmo; + struct vio_dev *viodev; + struct vio_cmo_dev_entry *dev_ent; + unsigned long flags; + size_t avail = 0, level, chunk, need; + int devcount = 0, fulfilled; + + cmo = container_of(work, struct vio_cmo, balance_q.work); + + spin_lock_irqsave(&vio_cmo.lock, flags); + + /* Calculate minimum entitlement and fulfill spare */ + cmo->min = vio_cmo_num_OF_devs() * VIO_CMO_MIN_ENT; + BUG_ON(cmo->min > cmo->entitled); + cmo->spare = min_t(size_t, VIO_CMO_MIN_ENT, (cmo->entitled - cmo->min)); + cmo->min += cmo->spare; + cmo->desired = cmo->min; + + /* + * Determine how much entitlement is available and reset device + * entitlements + */ + avail = cmo->entitled - cmo->spare; + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) { + viodev = dev_ent->viodev; + devcount++; + viodev->cmo.entitled = VIO_CMO_MIN_ENT; + cmo->desired += (viodev->cmo.desired - VIO_CMO_MIN_ENT); + avail -= max_t(size_t, viodev->cmo.allocated, VIO_CMO_MIN_ENT); + } + + /* + * Having provided each device with the minimum entitlement, loop + * over the devices portioning out the remaining entitlement + * until there is nothing left. + */ + level = VIO_CMO_MIN_ENT; + while (avail) { + fulfilled = 0; + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) { + viodev = dev_ent->viodev; + + if (viodev->cmo.desired <= level) { + fulfilled++; + continue; + } + + /* + * Give the device up to VIO_CMO_BALANCE_CHUNK + * bytes of entitlement, but do not exceed the + * desired level of entitlement for the device. + */ + chunk = min_t(size_t, avail, VIO_CMO_BALANCE_CHUNK); + chunk = min(chunk, (viodev->cmo.desired - + viodev->cmo.entitled)); + viodev->cmo.entitled += chunk; + + /* + * If the memory for this entitlement increase was + * already allocated to the device it does not come + * from the available pool being portioned out. + */ + need = max(viodev->cmo.allocated, viodev->cmo.entitled)- + max(viodev->cmo.allocated, level); + avail -= need; + + } + if (fulfilled == devcount) + break; + level += VIO_CMO_BALANCE_CHUNK; + } + + /* Calculate new reserve and excess pool sizes */ + cmo->reserve.size = cmo->min; + cmo->excess.free = 0; + cmo->excess.size = 0; + need = 0; + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) { + viodev = dev_ent->viodev; + /* Calculated reserve size above the minimum entitlement */ + if (viodev->cmo.entitled) + cmo->reserve.size += (viodev->cmo.entitled - + VIO_CMO_MIN_ENT); + /* Calculated used excess entitlement */ + if (viodev->cmo.allocated > viodev->cmo.entitled) + need += viodev->cmo.allocated - viodev->cmo.entitled; + } + cmo->excess.size = cmo->entitled - cmo->reserve.size; + cmo->excess.free = cmo->excess.size - need; + + cancel_delayed_work(container_of(work, struct delayed_work, work)); + spin_unlock_irqrestore(&vio_cmo.lock, flags); +} + +static void *vio_dma_iommu_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + struct vio_dev *viodev = to_vio_dev(dev); + void *ret; + + if (vio_cmo_alloc(viodev, roundup(size, IOMMU_PAGE_SIZE))) { + atomic_inc(&viodev->cmo.allocs_failed); + return NULL; + } + + ret = dma_iommu_ops.alloc_coherent(dev, size, dma_handle, flag); + if (unlikely(ret == NULL)) { + vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE)); + atomic_inc(&viodev->cmo.allocs_failed); + } + + return ret; +} + +static void vio_dma_iommu_free_coherent(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + struct vio_dev *viodev = to_vio_dev(dev); + + dma_iommu_ops.free_coherent(dev, size, vaddr, dma_handle); + + vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE)); +} + +static dma_addr_t vio_dma_iommu_map_single(struct device *dev, void *vaddr, + size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + struct vio_dev *viodev = to_vio_dev(dev); + dma_addr_t ret = DMA_ERROR_CODE; + + if (vio_cmo_alloc(viodev, roundup(size, IOMMU_PAGE_SIZE))) { + atomic_inc(&viodev->cmo.allocs_failed); + return ret; + } + + ret = dma_iommu_ops.map_single(dev, vaddr, size, direction, attrs); + if (unlikely(dma_mapping_error(dev, ret))) { + vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE)); + atomic_inc(&viodev->cmo.allocs_failed); + } + + return ret; +} + +static void vio_dma_iommu_unmap_single(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + struct vio_dev *viodev = to_vio_dev(dev); + + dma_iommu_ops.unmap_single(dev, dma_handle, size, direction, attrs); + + vio_cmo_dealloc(viodev, roundup(size, IOMMU_PAGE_SIZE)); +} + +static int vio_dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist, + int nelems, enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + struct vio_dev *viodev = to_vio_dev(dev); + struct scatterlist *sgl; + int ret, count = 0; + size_t alloc_size = 0; + + for (sgl = sglist; count < nelems; count++, sgl++) + alloc_size += roundup(sgl->length, IOMMU_PAGE_SIZE); + + if (vio_cmo_alloc(viodev, alloc_size)) { + atomic_inc(&viodev->cmo.allocs_failed); + return 0; + } + + ret = dma_iommu_ops.map_sg(dev, sglist, nelems, direction, attrs); + + if (unlikely(!ret)) { + vio_cmo_dealloc(viodev, alloc_size); + atomic_inc(&viodev->cmo.allocs_failed); + } + + for (sgl = sglist, count = 0; count < ret; count++, sgl++) + alloc_size -= roundup(sgl->dma_length, IOMMU_PAGE_SIZE); + if (alloc_size) + vio_cmo_dealloc(viodev, alloc_size); + + return ret; +} + +static void vio_dma_iommu_unmap_sg(struct device *dev, + struct scatterlist *sglist, int nelems, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + struct vio_dev *viodev = to_vio_dev(dev); + struct scatterlist *sgl; + size_t alloc_size = 0; + int count = 0; + + for (sgl = sglist; count < nelems; count++, sgl++) + alloc_size += roundup(sgl->dma_length, IOMMU_PAGE_SIZE); + + dma_iommu_ops.unmap_sg(dev, sglist, nelems, direction, attrs); + + vio_cmo_dealloc(viodev, alloc_size); +} + +struct dma_mapping_ops vio_dma_mapping_ops = { + .alloc_coherent = vio_dma_iommu_alloc_coherent, + .free_coherent = vio_dma_iommu_free_coherent, + .map_single = vio_dma_iommu_map_single, + .unmap_single = vio_dma_iommu_unmap_single, + .map_sg = vio_dma_iommu_map_sg, + .unmap_sg = vio_dma_iommu_unmap_sg, +}; + +/** + * vio_cmo_set_dev_desired - Set desired entitlement for a device + * + * @viodev: struct vio_dev for device to alter + * @new_desired: new desired entitlement level in bytes + * + * For use by devices to request a change to their entitlement at runtime or + * through sysfs. The desired entitlement level is changed and a balancing + * of system resources is scheduled to run in the future. + */ +void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired) +{ + unsigned long flags; + struct vio_cmo_dev_entry *dev_ent; + int found = 0; + + if (!firmware_has_feature(FW_FEATURE_CMO)) + return; + + spin_lock_irqsave(&vio_cmo.lock, flags); + if (desired < VIO_CMO_MIN_ENT) + desired = VIO_CMO_MIN_ENT; + + /* + * Changes will not be made for devices not in the device list. + * If it is not in the device list, then no driver is loaded + * for the device and it can not receive entitlement. + */ + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) + if (viodev == dev_ent->viodev) { + found = 1; + break; + } + if (!found) + return; + + /* Increase/decrease in desired device entitlement */ + if (desired >= viodev->cmo.desired) { + /* Just bump the bus and device values prior to a balance*/ + vio_cmo.desired += desired - viodev->cmo.desired; + viodev->cmo.desired = desired; + } else { + /* Decrease bus and device values for desired entitlement */ + vio_cmo.desired -= viodev->cmo.desired - desired; + viodev->cmo.desired = desired; + /* + * If less entitlement is desired than current entitlement, move + * any reserve memory in the change region to the excess pool. + */ + if (viodev->cmo.entitled > desired) { + vio_cmo.reserve.size -= viodev->cmo.entitled - desired; + vio_cmo.excess.size += viodev->cmo.entitled - desired; + /* + * If entitlement moving from the reserve pool to the + * excess pool is currently unused, add to the excess + * free counter. + */ + if (viodev->cmo.allocated < viodev->cmo.entitled) + vio_cmo.excess.free += viodev->cmo.entitled - + max(viodev->cmo.allocated, desired); + viodev->cmo.entitled = desired; + } + } + schedule_delayed_work(&vio_cmo.balance_q, 0); + spin_unlock_irqrestore(&vio_cmo.lock, flags); +} + +/** + * vio_cmo_bus_probe - Handle CMO specific bus probe activities + * + * @viodev - Pointer to struct vio_dev for device + * + * Determine the devices IO memory entitlement needs, attempting + * to satisfy the system minimum entitlement at first and scheduling + * a balance operation to take care of the rest at a later time. + * + * Returns: 0 on success, -EINVAL when device doesn't support CMO, and + * -ENOMEM when entitlement is not available for device or + * device entry. + * + */ +static int vio_cmo_bus_probe(struct vio_dev *viodev) +{ + struct vio_cmo_dev_entry *dev_ent; + struct device *dev = &viodev->dev; + struct vio_driver *viodrv = to_vio_driver(dev->driver); + unsigned long flags; + size_t size; + + /* + * Check to see that device has a DMA window and configure + * entitlement for the device. + */ + if (of_get_property(viodev->dev.archdata.of_node, + "ibm,my-dma-window", NULL)) { + /* Check that the driver is CMO enabled and get desired DMA */ + if (!viodrv->get_desired_dma) { + dev_err(dev, "%s: device driver does not support CMO\n", + __func__); + return -EINVAL; + } + + viodev->cmo.desired = IOMMU_PAGE_ALIGN(viodrv->get_desired_dma(viodev)); + if (viodev->cmo.desired < VIO_CMO_MIN_ENT) + viodev->cmo.desired = VIO_CMO_MIN_ENT; + size = VIO_CMO_MIN_ENT; + + dev_ent = kmalloc(sizeof(struct vio_cmo_dev_entry), + GFP_KERNEL); + if (!dev_ent) + return -ENOMEM; + + dev_ent->viodev = viodev; + spin_lock_irqsave(&vio_cmo.lock, flags); + list_add(&dev_ent->list, &vio_cmo.device_list); + } else { + viodev->cmo.desired = 0; + size = 0; + spin_lock_irqsave(&vio_cmo.lock, flags); + } + + /* + * If the needs for vio_cmo.min have not changed since they + * were last set, the number of devices in the OF tree has + * been constant and the IO memory for this is already in + * the reserve pool. + */ + if (vio_cmo.min == ((vio_cmo_num_OF_devs() + 1) * + VIO_CMO_MIN_ENT)) { + /* Updated desired entitlement if device requires it */ + if (size) + vio_cmo.desired += (viodev->cmo.desired - + VIO_CMO_MIN_ENT); + } else { + size_t tmp; + + tmp = vio_cmo.spare + vio_cmo.excess.free; + if (tmp < size) { + dev_err(dev, "%s: insufficient free " + "entitlement to add device. " + "Need %lu, have %lu\n", __func__, + size, (vio_cmo.spare + tmp)); + spin_unlock_irqrestore(&vio_cmo.lock, flags); + return -ENOMEM; + } + + /* Use excess pool first to fulfill request */ + tmp = min(size, vio_cmo.excess.free); + vio_cmo.excess.free -= tmp; + vio_cmo.excess.size -= tmp; + vio_cmo.reserve.size += tmp; + + /* Use spare if excess pool was insufficient */ + vio_cmo.spare -= size - tmp; + + /* Update bus accounting */ + vio_cmo.min += size; + vio_cmo.desired += viodev->cmo.desired; + } + spin_unlock_irqrestore(&vio_cmo.lock, flags); + return 0; +} + +/** + * vio_cmo_bus_remove - Handle CMO specific bus removal activities + * + * @viodev - Pointer to struct vio_dev for device + * + * Remove the device from the cmo device list. The minimum entitlement + * will be reserved for the device as long as it is in the system. The + * rest of the entitlement the device had been allocated will be returned + * to the system. + */ +static void vio_cmo_bus_remove(struct vio_dev *viodev) +{ + struct vio_cmo_dev_entry *dev_ent; + unsigned long flags; + size_t tmp; + + spin_lock_irqsave(&vio_cmo.lock, flags); + if (viodev->cmo.allocated) { + dev_err(&viodev->dev, "%s: device had %lu bytes of IO " + "allocated after remove operation.\n", + __func__, viodev->cmo.allocated); + BUG(); + } + + /* + * Remove the device from the device list being maintained for + * CMO enabled devices. + */ + list_for_each_entry(dev_ent, &vio_cmo.device_list, list) + if (viodev == dev_ent->viodev) { + list_del(&dev_ent->list); + kfree(dev_ent); + break; + } + + /* + * Devices may not require any entitlement and they do not need + * to be processed. Otherwise, return the device's entitlement + * back to the pools. + */ + if (viodev->cmo.entitled) { + /* + * This device has not yet left the OF tree, it's + * minimum entitlement remains in vio_cmo.min and + * vio_cmo.desired + */ + vio_cmo.desired -= (viodev->cmo.desired - VIO_CMO_MIN_ENT); + + /* + * Save min allocation for device in reserve as long + * as it exists in OF tree as determined by later + * balance operation + */ + viodev->cmo.entitled -= VIO_CMO_MIN_ENT; + + /* Replenish spare from freed reserve pool */ + if (viodev->cmo.entitled && (vio_cmo.spare < VIO_CMO_MIN_ENT)) { + tmp = min(viodev->cmo.entitled, (VIO_CMO_MIN_ENT - + vio_cmo.spare)); + vio_cmo.spare += tmp; + viodev->cmo.entitled -= tmp; + } + + /* Remaining reserve goes to excess pool */ + vio_cmo.excess.size += viodev->cmo.entitled; + vio_cmo.excess.free += viodev->cmo.entitled; + vio_cmo.reserve.size -= viodev->cmo.entitled; + + /* + * Until the device is removed it will keep a + * minimum entitlement; this will guarantee that + * a module unload/load will result in a success. + */ + viodev->cmo.entitled = VIO_CMO_MIN_ENT; + viodev->cmo.desired = VIO_CMO_MIN_ENT; + atomic_set(&viodev->cmo.allocs_failed, 0); + } + + spin_unlock_irqrestore(&vio_cmo.lock, flags); +} + +static void vio_cmo_set_dma_ops(struct vio_dev *viodev) +{ + vio_dma_mapping_ops.dma_supported = dma_iommu_ops.dma_supported; + viodev->dev.archdata.dma_ops = &vio_dma_mapping_ops; +} + +/** + * vio_cmo_bus_init - CMO entitlement initialization at bus init time + * + * Set up the reserve and excess entitlement pools based on available + * system entitlement and the number of devices in the OF tree that + * require entitlement in the reserve pool. + */ +static void vio_cmo_bus_init(void) +{ + struct hvcall_mpp_data mpp_data; + int err; + + memset(&vio_cmo, 0, sizeof(struct vio_cmo)); + spin_lock_init(&vio_cmo.lock); + INIT_LIST_HEAD(&vio_cmo.device_list); + INIT_DELAYED_WORK(&vio_cmo.balance_q, vio_cmo_balance); + + /* Get current system entitlement */ + err = h_get_mpp(&mpp_data); + + /* + * On failure, continue with entitlement set to 0, will panic() + * later when spare is reserved. + */ + if (err != H_SUCCESS) { + printk(KERN_ERR "%s: unable to determine system IO "\ + "entitlement. (%d)\n", __func__, err); + vio_cmo.entitled = 0; + } else { + vio_cmo.entitled = mpp_data.entitled_mem; + } + + /* Set reservation and check against entitlement */ + vio_cmo.spare = VIO_CMO_MIN_ENT; + vio_cmo.reserve.size = vio_cmo.spare; + vio_cmo.reserve.size += (vio_cmo_num_OF_devs() * + VIO_CMO_MIN_ENT); + if (vio_cmo.reserve.size > vio_cmo.entitled) { + printk(KERN_ERR "%s: insufficient system entitlement\n", + __func__); + panic("%s: Insufficient system entitlement", __func__); + } + + /* Set the remaining accounting variables */ + vio_cmo.excess.size = vio_cmo.entitled - vio_cmo.reserve.size; + vio_cmo.excess.free = vio_cmo.excess.size; + vio_cmo.min = vio_cmo.reserve.size; + vio_cmo.desired = vio_cmo.reserve.size; +} + +/* sysfs device functions and data structures for CMO */ + +#define viodev_cmo_rd_attr(name) \ +static ssize_t viodev_cmo_##name##_show(struct device *dev, \ + struct device_attribute *attr, \ + char *buf) \ +{ \ + return sprintf(buf, "%lu\n", to_vio_dev(dev)->cmo.name); \ +} + +static ssize_t viodev_cmo_allocs_failed_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct vio_dev *viodev = to_vio_dev(dev); + return sprintf(buf, "%d\n", atomic_read(&viodev->cmo.allocs_failed)); +} + +static ssize_t viodev_cmo_allocs_failed_reset(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct vio_dev *viodev = to_vio_dev(dev); + atomic_set(&viodev->cmo.allocs_failed, 0); + return count; +} + +static ssize_t viodev_cmo_desired_set(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + struct vio_dev *viodev = to_vio_dev(dev); + size_t new_desired; + int ret; + + ret = strict_strtoul(buf, 10, &new_desired); + if (ret) + return ret; + + vio_cmo_set_dev_desired(viodev, new_desired); + return count; +} + +viodev_cmo_rd_attr(desired); +viodev_cmo_rd_attr(entitled); +viodev_cmo_rd_attr(allocated); + +static ssize_t name_show(struct device *, struct device_attribute *, char *); +static ssize_t devspec_show(struct device *, struct device_attribute *, char *); +static struct device_attribute vio_cmo_dev_attrs[] = { + __ATTR_RO(name), + __ATTR_RO(devspec), + __ATTR(cmo_desired, S_IWUSR|S_IRUSR|S_IWGRP|S_IRGRP|S_IROTH, + viodev_cmo_desired_show, viodev_cmo_desired_set), + __ATTR(cmo_entitled, S_IRUGO, viodev_cmo_entitled_show, NULL), + __ATTR(cmo_allocated, S_IRUGO, viodev_cmo_allocated_show, NULL), + __ATTR(cmo_allocs_failed, S_IWUSR|S_IRUSR|S_IWGRP|S_IRGRP|S_IROTH, + viodev_cmo_allocs_failed_show, viodev_cmo_allocs_failed_reset), + __ATTR_NULL +}; + +/* sysfs bus functions and data structures for CMO */ + +#define viobus_cmo_rd_attr(name) \ +static ssize_t \ +viobus_cmo_##name##_show(struct bus_type *bt, char *buf) \ +{ \ + return sprintf(buf, "%lu\n", vio_cmo.name); \ +} + +#define viobus_cmo_pool_rd_attr(name, var) \ +static ssize_t \ +viobus_cmo_##name##_pool_show_##var(struct bus_type *bt, char *buf) \ +{ \ + return sprintf(buf, "%lu\n", vio_cmo.name.var); \ +} + +static ssize_t viobus_cmo_high_reset(struct bus_type *bt, const char *buf, + size_t count) +{ + unsigned long flags; + + spin_lock_irqsave(&vio_cmo.lock, flags); + vio_cmo.high = vio_cmo.curr; + spin_unlock_irqrestore(&vio_cmo.lock, flags); + + return count; +} + +viobus_cmo_rd_attr(entitled); +viobus_cmo_pool_rd_attr(reserve, size); +viobus_cmo_pool_rd_attr(excess, size); +viobus_cmo_pool_rd_attr(excess, free); +viobus_cmo_rd_attr(spare); +viobus_cmo_rd_attr(min); +viobus_cmo_rd_attr(desired); +viobus_cmo_rd_attr(curr); +viobus_cmo_rd_attr(high); + +static struct bus_attribute vio_cmo_bus_attrs[] = { + __ATTR(cmo_entitled, S_IRUGO, viobus_cmo_entitled_show, NULL), + __ATTR(cmo_reserve_size, S_IRUGO, viobus_cmo_reserve_pool_show_size, NULL), + __ATTR(cmo_excess_size, S_IRUGO, viobus_cmo_excess_pool_show_size, NULL), + __ATTR(cmo_excess_free, S_IRUGO, viobus_cmo_excess_pool_show_free, NULL), + __ATTR(cmo_spare, S_IRUGO, viobus_cmo_spare_show, NULL), + __ATTR(cmo_min, S_IRUGO, viobus_cmo_min_show, NULL), + __ATTR(cmo_desired, S_IRUGO, viobus_cmo_desired_show, NULL), + __ATTR(cmo_curr, S_IRUGO, viobus_cmo_curr_show, NULL), + __ATTR(cmo_high, S_IWUSR|S_IRUSR|S_IWGRP|S_IRGRP|S_IROTH, + viobus_cmo_high_show, viobus_cmo_high_reset), + __ATTR_NULL +}; + +static void vio_cmo_sysfs_init(void) +{ + vio_bus_type.dev_attrs = vio_cmo_dev_attrs; + vio_bus_type.bus_attrs = vio_cmo_bus_attrs; +} +#else /* CONFIG_PPC_SMLPAR */ +/* Dummy functions for iSeries platform */ +int vio_cmo_entitlement_update(size_t new_entitlement) { return 0; } +void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired) {} +static int vio_cmo_bus_probe(struct vio_dev *viodev) { return 0; } +static void vio_cmo_bus_remove(struct vio_dev *viodev) {} +static void vio_cmo_set_dma_ops(struct vio_dev *viodev) {} +static void vio_cmo_bus_init(void) {} +static void vio_cmo_sysfs_init(void) { } +#endif /* CONFIG_PPC_SMLPAR */ +EXPORT_SYMBOL(vio_cmo_entitlement_update); +EXPORT_SYMBOL(vio_cmo_set_dev_desired); + static struct iommu_table *vio_build_iommu_table(struct vio_dev *dev) { const unsigned char *dma_window; @@ -114,8 +1105,17 @@ static int vio_bus_probe(struct device *dev) return error; id = vio_match_device(viodrv->id_table, viodev); - if (id) + if (id) { + memset(&viodev->cmo, 0, sizeof(viodev->cmo)); + if (firmware_has_feature(FW_FEATURE_CMO)) { + error = vio_cmo_bus_probe(viodev); + if (error) + return error; + } error = viodrv->probe(viodev, id); + if (error) + vio_cmo_bus_remove(viodev); + } return error; } @@ -125,12 +1125,23 @@ static int vio_bus_remove(struct device *dev) { struct vio_dev *viodev = to_vio_dev(dev); struct vio_driver *viodrv = to_vio_driver(dev->driver); + struct device *devptr; + int ret = 1; + + /* + * Hold a reference to the device after the remove function is called + * to allow for CMO accounting cleanup for the device. + */ + devptr = get_device(dev); if (viodrv->remove) - return viodrv->remove(viodev); + ret = viodrv->remove(viodev); + + if (!ret && firmware_has_feature(FW_FEATURE_CMO)) + vio_cmo_bus_remove(viodev); - /* driver can't remove */ - return 1; + put_device(devptr); + return ret; } /** @@ -215,7 +1226,11 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node) viodev->unit_address = *unit_address; } viodev->dev.archdata.of_node = of_node_get(of_node); - viodev->dev.archdata.dma_ops = &dma_iommu_ops; + + if (firmware_has_feature(FW_FEATURE_CMO)) + vio_cmo_set_dma_ops(viodev); + else + viodev->dev.archdata.dma_ops = &dma_iommu_ops; viodev->dev.archdata.dma_data = vio_build_iommu_table(viodev); viodev->dev.archdata.numa_node = of_node_to_nid(of_node); @@ -245,6 +1260,9 @@ static int __init vio_bus_init(void) int err; struct device_node *node_vroot; + if (firmware_has_feature(FW_FEATURE_CMO)) + vio_cmo_sysfs_init(); + err = bus_register(&vio_bus_type); if (err) { printk(KERN_ERR "failed to register VIO bus\n"); @@ -262,6 +1280,9 @@ static int __init vio_bus_init(void) return err; } + if (firmware_has_feature(FW_FEATURE_CMO)) + vio_cmo_bus_init(); + node_vroot = of_find_node_by_name(NULL, "vdevice"); if (node_vroot) { struct device_node *of_node; diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index 0c3000bf8d75d8919e20df3e44ba9a99d7bb7d14..4a8ce62fe1121c1a774f04a9af6223a96f945c23 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S @@ -9,6 +9,25 @@ ENTRY(_stext) +PHDRS { + kernel PT_LOAD FLAGS(7); /* RWX */ + notes PT_NOTE FLAGS(0); + dummy PT_NOTE FLAGS(0); + + /* binutils < 2.18 has a bug that makes it misbehave when taking an + ELF file with all segments at load address 0 as input. This + happens when running "strip" on vmlinux, because of the AT() magic + in this linker script. People using GCC >= 4.2 won't run into + this problem, because the "build-id" support will put some data + into the "notes" segment (at a non-zero load address). + + To work around this, we force some data into both the "dummy" + segment and the kernel segment, so the dummy segment will get a + non-zero load address. It's not enough to always create the + "notes" segment, since if nothing gets assigned to it, its load + address will be zero. */ +} + #ifdef CONFIG_PPC64 OUTPUT_ARCH(powerpc:common64) jiffies = jiffies_64; @@ -35,7 +54,7 @@ SECTIONS ALIGN_FUNCTION(); *(.text.head) _text = .; - *(.text .fixup .text.init.refok .exit.text.refok) + *(.text .fixup .text.init.refok .exit.text.refok __ftr_alt_*) SCHED_TEXT LOCK_TEXT KPROBES_TEXT @@ -50,7 +69,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); _etext = .; PROVIDE32 (etext = .); - } + } :kernel /* Read-only data */ RODATA @@ -62,9 +81,13 @@ SECTIONS __stop___ex_table = .; } - NOTES + NOTES :kernel :notes - BUG_TABLE + /* The dummy segment contents for the bug workaround mentioned above + near PHDRS. */ + .dummy : AT(ADDR(.dummy) - LOAD_OFFSET) { + LONG(0xf177) + } :kernel :dummy /* * Init sections discarded at runtime @@ -76,7 +99,7 @@ SECTIONS _sinittext = .; INIT_TEXT _einittext = .; - } + } :kernel /* .exit.text is discarded at runtime, not link time, * to deal with references from __bug_table @@ -127,6 +150,12 @@ SECTIONS *(__ftr_fixup) __stop___ftr_fixup = .; } + . = ALIGN(8); + __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) { + __start___lwsync_fixup = .; + *(__lwsync_fixup) + __stop___lwsync_fixup = .; + } #ifdef CONFIG_PPC64 . = ALIGN(8); __fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) { diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c index 75dff7cfa814130a465098ea880c1f05cbf882e5..5a5602da50910d441f806c6b0a111fcd3e19aab3 100644 --- a/arch/powerpc/kvm/44x_tlb.c +++ b/arch/powerpc/kvm/44x_tlb.c @@ -177,7 +177,8 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid, vcpu->arch.msr & MSR_PR); } -void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, u64 eaddr, u64 asid) +void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr, + gva_t eend, u32 asid) { unsigned int pid = asid & 0xff; int i; @@ -191,7 +192,7 @@ void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, u64 eaddr, u64 asid) if (!get_tlb_v(stlbe)) continue; - if (eaddr < get_tlb_eaddr(stlbe)) + if (eend < get_tlb_eaddr(stlbe)) continue; if (eaddr > get_tlb_end(stlbe)) diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile index d0d358d367ecaa359ffed9a351971a5748620fa0..04e3449e1f427f0ee644443a6a66c233afef58fc 100644 --- a/arch/powerpc/kvm/Makefile +++ b/arch/powerpc/kvm/Makefile @@ -4,7 +4,7 @@ EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm -common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o) +common-objs = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o) kvm-objs := $(common-objs) powerpc.o emulate.o booke_guest.o obj-$(CONFIG_KVM) += kvm.o diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c index 0000974612834121aa9c6a4048e0e89e09695374..8c605d0a5488fdce0268cbbdf3055d9404028f7b 100644 --- a/arch/powerpc/kvm/emulate.c +++ b/arch/powerpc/kvm/emulate.c @@ -137,7 +137,7 @@ static int kvmppc_emul_tlbwe(struct kvm_vcpu *vcpu, u32 inst) if (tlbe->word0 & PPC44x_TLB_VALID) { eaddr = get_tlb_eaddr(tlbe); asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid; - kvmppc_mmu_invalidate(vcpu, eaddr, asid); + kvmppc_mmu_invalidate(vcpu, eaddr, get_tlb_end(tlbe), asid); } switch (ws) { diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 777e0f34e0ea12d60e643a47f0b68af5a6bdc930..53826a5f6c06d406bb7a95ebb8017f0b4d1a1185 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c @@ -145,6 +145,9 @@ int kvm_dev_ioctl_check_extension(long ext) case KVM_CAP_USER_MEMORY: r = 1; break; + case KVM_CAP_COALESCED_MMIO: + r = KVM_COALESCED_MMIO_PAGE_OFFSET; + break; default: r = 0; break; @@ -167,6 +170,10 @@ int kvm_arch_set_memory_region(struct kvm *kvm, return 0; } +void kvm_arch_flush_shadow(struct kvm *kvm) +{ +} + struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) { struct kvm_vcpu *vcpu; @@ -240,10 +247,6 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) { } -void decache_vcpus_on_cpu(int cpu) -{ -} - int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg) { diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index e522b06cc42ff7eed9faca3e7a663749f0f7ecdd..2a88e8b9a3c6b4d31bef5514996bfbae43a7b9c0 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile @@ -24,3 +24,7 @@ obj-$(CONFIG_SMP) += locks.o endif obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o + +obj-y += code-patching.o +obj-y += feature-fixups.o +obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c new file mode 100644 index 0000000000000000000000000000000000000000..7c975d43e3f388d50152bbdcb42a72adfcb50a13 --- /dev/null +++ b/arch/powerpc/lib/code-patching.c @@ -0,0 +1,449 @@ +/* + * Copyright 2008 Michael Ellerman, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include +#include + + +void patch_instruction(unsigned int *addr, unsigned int instr) +{ + *addr = instr; + asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr)); +} + +void patch_branch(unsigned int *addr, unsigned long target, int flags) +{ + patch_instruction(addr, create_branch(addr, target, flags)); +} + +unsigned int create_branch(const unsigned int *addr, + unsigned long target, int flags) +{ + unsigned int instruction; + long offset; + + offset = target; + if (! (flags & BRANCH_ABSOLUTE)) + offset = offset - (unsigned long)addr; + + /* Check we can represent the target in the instruction format */ + if (offset < -0x2000000 || offset > 0x1fffffc || offset & 0x3) + return 0; + + /* Mask out the flags and target, so they don't step on each other. */ + instruction = 0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC); + + return instruction; +} + +unsigned int create_cond_branch(const unsigned int *addr, + unsigned long target, int flags) +{ + unsigned int instruction; + long offset; + + offset = target; + if (! (flags & BRANCH_ABSOLUTE)) + offset = offset - (unsigned long)addr; + + /* Check we can represent the target in the instruction format */ + if (offset < -0x8000 || offset > 0x7FFF || offset & 0x3) + return 0; + + /* Mask out the flags and target, so they don't step on each other. */ + instruction = 0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC); + + return instruction; +} + +static unsigned int branch_opcode(unsigned int instr) +{ + return (instr >> 26) & 0x3F; +} + +static int instr_is_branch_iform(unsigned int instr) +{ + return branch_opcode(instr) == 18; +} + +static int instr_is_branch_bform(unsigned int instr) +{ + return branch_opcode(instr) == 16; +} + +int instr_is_relative_branch(unsigned int instr) +{ + if (instr & BRANCH_ABSOLUTE) + return 0; + + return instr_is_branch_iform(instr) || instr_is_branch_bform(instr); +} + +static unsigned long branch_iform_target(const unsigned int *instr) +{ + signed long imm; + + imm = *instr & 0x3FFFFFC; + + /* If the top bit of the immediate value is set this is negative */ + if (imm & 0x2000000) + imm -= 0x4000000; + + if ((*instr & BRANCH_ABSOLUTE) == 0) + imm += (unsigned long)instr; + + return (unsigned long)imm; +} + +static unsigned long branch_bform_target(const unsigned int *instr) +{ + signed long imm; + + imm = *instr & 0xFFFC; + + /* If the top bit of the immediate value is set this is negative */ + if (imm & 0x8000) + imm -= 0x10000; + + if ((*instr & BRANCH_ABSOLUTE) == 0) + imm += (unsigned long)instr; + + return (unsigned long)imm; +} + +unsigned long branch_target(const unsigned int *instr) +{ + if (instr_is_branch_iform(*instr)) + return branch_iform_target(instr); + else if (instr_is_branch_bform(*instr)) + return branch_bform_target(instr); + + return 0; +} + +int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr) +{ + if (instr_is_branch_iform(*instr) || instr_is_branch_bform(*instr)) + return branch_target(instr) == addr; + + return 0; +} + +unsigned int translate_branch(const unsigned int *dest, const unsigned int *src) +{ + unsigned long target; + + target = branch_target(src); + + if (instr_is_branch_iform(*src)) + return create_branch(dest, target, *src); + else if (instr_is_branch_bform(*src)) + return create_cond_branch(dest, target, *src); + + return 0; +} + + +#ifdef CONFIG_CODE_PATCHING_SELFTEST + +static void __init test_trampoline(void) +{ + asm ("nop;\n"); +} + +#define check(x) \ + if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__); + +static void __init test_branch_iform(void) +{ + unsigned int instr; + unsigned long addr; + + addr = (unsigned long)&instr; + + /* The simplest case, branch to self, no flags */ + check(instr_is_branch_iform(0x48000000)); + /* All bits of target set, and flags */ + check(instr_is_branch_iform(0x4bffffff)); + /* High bit of opcode set, which is wrong */ + check(!instr_is_branch_iform(0xcbffffff)); + /* Middle bits of opcode set, which is wrong */ + check(!instr_is_branch_iform(0x7bffffff)); + + /* Simplest case, branch to self with link */ + check(instr_is_branch_iform(0x48000001)); + /* All bits of targets set */ + check(instr_is_branch_iform(0x4bfffffd)); + /* Some bits of targets set */ + check(instr_is_branch_iform(0x4bff00fd)); + /* Must be a valid branch to start with */ + check(!instr_is_branch_iform(0x7bfffffd)); + + /* Absolute branch to 0x100 */ + instr = 0x48000103; + check(instr_is_branch_to_addr(&instr, 0x100)); + /* Absolute branch to 0x420fc */ + instr = 0x480420ff; + check(instr_is_branch_to_addr(&instr, 0x420fc)); + /* Maximum positive relative branch, + 20MB - 4B */ + instr = 0x49fffffc; + check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC)); + /* Smallest negative relative branch, - 4B */ + instr = 0x4bfffffc; + check(instr_is_branch_to_addr(&instr, addr - 4)); + /* Largest negative relative branch, - 32 MB */ + instr = 0x4a000000; + check(instr_is_branch_to_addr(&instr, addr - 0x2000000)); + + /* Branch to self, with link */ + instr = create_branch(&instr, addr, BRANCH_SET_LINK); + check(instr_is_branch_to_addr(&instr, addr)); + + /* Branch to self - 0x100, with link */ + instr = create_branch(&instr, addr - 0x100, BRANCH_SET_LINK); + check(instr_is_branch_to_addr(&instr, addr - 0x100)); + + /* Branch to self + 0x100, no link */ + instr = create_branch(&instr, addr + 0x100, 0); + check(instr_is_branch_to_addr(&instr, addr + 0x100)); + + /* Maximum relative negative offset, - 32 MB */ + instr = create_branch(&instr, addr - 0x2000000, BRANCH_SET_LINK); + check(instr_is_branch_to_addr(&instr, addr - 0x2000000)); + + /* Out of range relative negative offset, - 32 MB + 4*/ + instr = create_branch(&instr, addr - 0x2000004, BRANCH_SET_LINK); + check(instr == 0); + + /* Out of range relative positive offset, + 32 MB */ + instr = create_branch(&instr, addr + 0x2000000, BRANCH_SET_LINK); + check(instr == 0); + + /* Unaligned target */ + instr = create_branch(&instr, addr + 3, BRANCH_SET_LINK); + check(instr == 0); + + /* Check flags are masked correctly */ + instr = create_branch(&instr, addr, 0xFFFFFFFC); + check(instr_is_branch_to_addr(&instr, addr)); + check(instr == 0x48000000); +} + +static void __init test_create_function_call(void) +{ + unsigned int *iptr; + unsigned long dest; + + /* Check we can create a function call */ + iptr = (unsigned int *)ppc_function_entry(test_trampoline); + dest = ppc_function_entry(test_create_function_call); + patch_instruction(iptr, create_branch(iptr, dest, BRANCH_SET_LINK)); + check(instr_is_branch_to_addr(iptr, dest)); +} + +static void __init test_branch_bform(void) +{ + unsigned long addr; + unsigned int *iptr, instr, flags; + + iptr = &instr; + addr = (unsigned long)iptr; + + /* The simplest case, branch to self, no flags */ + check(instr_is_branch_bform(0x40000000)); + /* All bits of target set, and flags */ + check(instr_is_branch_bform(0x43ffffff)); + /* High bit of opcode set, which is wrong */ + check(!instr_is_branch_bform(0xc3ffffff)); + /* Middle bits of opcode set, which is wrong */ + check(!instr_is_branch_bform(0x7bffffff)); + + /* Absolute conditional branch to 0x100 */ + instr = 0x43ff0103; + check(instr_is_branch_to_addr(&instr, 0x100)); + /* Absolute conditional branch to 0x20fc */ + instr = 0x43ff20ff; + check(instr_is_branch_to_addr(&instr, 0x20fc)); + /* Maximum positive relative conditional branch, + 32 KB - 4B */ + instr = 0x43ff7ffc; + check(instr_is_branch_to_addr(&instr, addr + 0x7FFC)); + /* Smallest negative relative conditional branch, - 4B */ + instr = 0x43fffffc; + check(instr_is_branch_to_addr(&instr, addr - 4)); + /* Largest negative relative conditional branch, - 32 KB */ + instr = 0x43ff8000; + check(instr_is_branch_to_addr(&instr, addr - 0x8000)); + + /* All condition code bits set & link */ + flags = 0x3ff000 | BRANCH_SET_LINK; + + /* Branch to self */ + instr = create_cond_branch(iptr, addr, flags); + check(instr_is_branch_to_addr(&instr, addr)); + + /* Branch to self - 0x100 */ + instr = create_cond_branch(iptr, addr - 0x100, flags); + check(instr_is_branch_to_addr(&instr, addr - 0x100)); + + /* Branch to self + 0x100 */ + instr = create_cond_branch(iptr, addr + 0x100, flags); + check(instr_is_branch_to_addr(&instr, addr + 0x100)); + + /* Maximum relative negative offset, - 32 KB */ + instr = create_cond_branch(iptr, addr - 0x8000, flags); + check(instr_is_branch_to_addr(&instr, addr - 0x8000)); + + /* Out of range relative negative offset, - 32 KB + 4*/ + instr = create_cond_branch(iptr, addr - 0x8004, flags); + check(instr == 0); + + /* Out of range relative positive offset, + 32 KB */ + instr = create_cond_branch(iptr, addr + 0x8000, flags); + check(instr == 0); + + /* Unaligned target */ + instr = create_cond_branch(iptr, addr + 3, flags); + check(instr == 0); + + /* Check flags are masked correctly */ + instr = create_cond_branch(iptr, addr, 0xFFFFFFFC); + check(instr_is_branch_to_addr(&instr, addr)); + check(instr == 0x43FF0000); +} + +static void __init test_translate_branch(void) +{ + unsigned long addr; + unsigned int *p, *q; + void *buf; + + buf = vmalloc(PAGE_ALIGN(0x2000000 + 1)); + check(buf); + if (!buf) + return; + + /* Simple case, branch to self moved a little */ + p = buf; + addr = (unsigned long)p; + patch_branch(p, addr, 0); + check(instr_is_branch_to_addr(p, addr)); + q = p + 1; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(q, addr)); + + /* Maximum negative case, move b . to addr + 32 MB */ + p = buf; + addr = (unsigned long)p; + patch_branch(p, addr, 0); + q = buf + 0x2000000; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + check(*q == 0x4a000000); + + /* Maximum positive case, move x to x - 32 MB + 4 */ + p = buf + 0x2000000; + addr = (unsigned long)p; + patch_branch(p, addr, 0); + q = buf + 4; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + check(*q == 0x49fffffc); + + /* Jump to x + 16 MB moved to x + 20 MB */ + p = buf; + addr = 0x1000000 + (unsigned long)buf; + patch_branch(p, addr, BRANCH_SET_LINK); + q = buf + 0x1400000; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + + /* Jump to x + 16 MB moved to x - 16 MB + 4 */ + p = buf + 0x1000000; + addr = 0x2000000 + (unsigned long)buf; + patch_branch(p, addr, 0); + q = buf + 4; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + + + /* Conditional branch tests */ + + /* Simple case, branch to self moved a little */ + p = buf; + addr = (unsigned long)p; + patch_instruction(p, create_cond_branch(p, addr, 0)); + check(instr_is_branch_to_addr(p, addr)); + q = p + 1; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(q, addr)); + + /* Maximum negative case, move b . to addr + 32 KB */ + p = buf; + addr = (unsigned long)p; + patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC)); + q = buf + 0x8000; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + check(*q == 0x43ff8000); + + /* Maximum positive case, move x to x - 32 KB + 4 */ + p = buf + 0x8000; + addr = (unsigned long)p; + patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC)); + q = buf + 4; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + check(*q == 0x43ff7ffc); + + /* Jump to x + 12 KB moved to x + 20 KB */ + p = buf; + addr = 0x3000 + (unsigned long)buf; + patch_instruction(p, create_cond_branch(p, addr, BRANCH_SET_LINK)); + q = buf + 0x5000; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + + /* Jump to x + 8 KB moved to x - 8 KB + 4 */ + p = buf + 0x2000; + addr = 0x4000 + (unsigned long)buf; + patch_instruction(p, create_cond_branch(p, addr, 0)); + q = buf + 4; + patch_instruction(q, translate_branch(q, p)); + check(instr_is_branch_to_addr(p, addr)); + check(instr_is_branch_to_addr(q, addr)); + + /* Free the buffer we were using */ + vfree(buf); +} + +static int __init test_code_patching(void) +{ + printk(KERN_DEBUG "Running code patching self-tests ...\n"); + + test_branch_iform(); + test_branch_bform(); + test_create_function_call(); + test_translate_branch(); + + return 0; +} +late_initcall(test_code_patching); + +#endif /* CONFIG_CODE_PATCHING_SELFTEST */ diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c index 6656d47841d06e02ae07d794349075dd30794ecb..5d83907f6591dbf9cf68b32dbceaa99ddaf3563e 100644 --- a/arch/powerpc/lib/dma-noncoherent.c +++ b/arch/powerpc/lib/dma-noncoherent.c @@ -348,8 +348,15 @@ void __dma_sync(void *vaddr, size_t size, int direction) switch (direction) { case DMA_NONE: BUG(); - case DMA_FROM_DEVICE: /* invalidate only */ - invalidate_dcache_range(start, end); + case DMA_FROM_DEVICE: + /* + * invalidate only when cache-line aligned otherwise there is + * the potential for discarding uncommitted data from the cache + */ + if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1))) + flush_dcache_range(start, end); + else + invalidate_dcache_range(start, end); break; case DMA_TO_DEVICE: /* writeback only */ clean_dcache_range(start, end); diff --git a/arch/powerpc/lib/feature-fixups-test.S b/arch/powerpc/lib/feature-fixups-test.S new file mode 100644 index 0000000000000000000000000000000000000000..cb737484c5aa2aa74f38df054143b208c4d74312 --- /dev/null +++ b/arch/powerpc/lib/feature-fixups-test.S @@ -0,0 +1,742 @@ +/* + * Copyright 2008 Michael Ellerman, IBM Corporation. + * + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include + + .text + +#define globl(x) \ + .globl x; \ +x: + +globl(ftr_fixup_test1) + or 1,1,1 + or 2,2,2 /* fixup will nop out this instruction */ + or 3,3,3 + +globl(end_ftr_fixup_test1) + +globl(ftr_fixup_test1_orig) + or 1,1,1 + or 2,2,2 + or 3,3,3 + +globl(ftr_fixup_test1_expected) + or 1,1,1 + nop + or 3,3,3 + +globl(ftr_fixup_test2) + or 1,1,1 + or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */ + or 3,3,3 + +globl(end_ftr_fixup_test2) + +globl(ftr_fixup_test2_orig) + or 1,1,1 + or 2,2,2 + or 3,3,3 + +globl(ftr_fixup_test2_alt) + or 31,31,31 + +globl(ftr_fixup_test2_expected) + or 1,1,1 + or 31,31,31 + or 3,3,3 + +globl(ftr_fixup_test3) + or 1,1,1 + or 2,2,2 /* fixup will fail to replace this */ + or 3,3,3 + +globl(end_ftr_fixup_test3) + +globl(ftr_fixup_test3_orig) + or 1,1,1 + or 2,2,2 + or 3,3,3 + +globl(ftr_fixup_test3_alt) + or 31,31,31 + or 31,31,31 + +globl(ftr_fixup_test4) + or 1,1,1 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 3,3,3 + +globl(end_ftr_fixup_test4) + +globl(ftr_fixup_test4_expected) + or 1,1,1 + or 31,31,31 + or 31,31,31 + nop + nop + or 3,3,3 + +globl(ftr_fixup_test4_orig) + or 1,1,1 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 3,3,3 + +globl(ftr_fixup_test4_alt) + or 31,31,31 + or 31,31,31 + + +globl(ftr_fixup_test5) + or 1,1,1 +BEGIN_FTR_SECTION + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 + or 2,2,2 +FTR_SECTION_ELSE +2: b 3f +3: or 5,5,5 + beq 3b + b 1f + or 6,6,6 + b 2b +1: bdnz 3b +ALT_FTR_SECTION_END(0, 1) + or 1,1,1 + +globl(end_ftr_fixup_test5) + +globl(ftr_fixup_test5_expected) + or 1,1,1 +2: b 3f +3: or 5,5,5 + beq 3b + b 1f + or 6,6,6 + b 2b +1: bdnz 3b + or 1,1,1 + +globl(ftr_fixup_test6) +1: or 1,1,1 +BEGIN_FTR_SECTION + or 5,5,5 +2: PPC_LCMPI r3,0 + beq 4f + blt 2b + b 1b + b 4f +FTR_SECTION_ELSE +2: or 2,2,2 + PPC_LCMPI r3,1 + beq 3f + blt 2b + b 3f + b 1b +ALT_FTR_SECTION_END(0, 1) +3: or 1,1,1 + or 2,2,2 +4: or 3,3,3 + +globl(end_ftr_fixup_test6) + +globl(ftr_fixup_test6_expected) +1: or 1,1,1 +2: or 2,2,2 + PPC_LCMPI r3,1 + beq 3f + blt 2b + b 3f + b 1b +2: or 1,1,1 + or 2,2,2 +3: or 3,3,3 + + +#define MAKE_MACRO_TEST(TYPE) \ +globl(ftr_fixup_test_ ##TYPE##_macros) \ + or 1,1,1; \ + /* Basic test, this section should all be nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic test, this section should NOT be nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, inner section should be nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(80) \ + or 3,3,3; \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 1, 80) \ + or 2,2,2; \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, whole section should be nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(80) \ + or 3,3,3; \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 0, 80) \ + or 2,2,2; \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, none should be nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(80) \ + or 3,3,3; \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 0, 80) \ + or 2,2,2; \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic alt section test, default case should be taken */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 5,5,5; \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic alt section test, else case should be taken */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ + or 31,31,31; \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt with smaller else case, should be padded with nops */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in default case */ \ + /* Default case should be taken, with nop'ed inner section */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 3,3,3; \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 1, 95) \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 2,2,2; \ + or 2,2,2; \ +ALT_##TYPE##_SECTION_END(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in else, default taken */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 5,5,5; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 1, 95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in else, else taken & nop */ \ +BEGIN_##TYPE##_SECTION \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +##TYPE##_SECTION_ELSE \ + or 5,5,5; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 3,3,3; \ +END_##TYPE##_SECTION_NESTED(0, 1, 95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, default taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, else taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, all nop'ed */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \ + or 2,2,2; \ +END_##TYPE##_SECTION(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, default with inner default taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \ + or 2,2,2; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ +BEGIN_##TYPE##_SECTION_NESTED(94) \ + or 5,5,5; \ +##TYPE##_SECTION_ELSE_NESTED(94) \ + or 1,1,1; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, default with inner else taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \ + or 2,2,2; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ +BEGIN_##TYPE##_SECTION_NESTED(94) \ + or 5,5,5; \ +##TYPE##_SECTION_ELSE_NESTED(94) \ + or 1,1,1; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 0) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else with inner default taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \ + or 2,2,2; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ +BEGIN_##TYPE##_SECTION_NESTED(94) \ + or 5,5,5; \ +##TYPE##_SECTION_ELSE_NESTED(94) \ + or 1,1,1; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else with inner else taken */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ +BEGIN_##TYPE##_SECTION_NESTED(95) \ + or 1,1,1; \ +##TYPE##_SECTION_ELSE_NESTED(95) \ + or 5,5,5; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \ + or 2,2,2; \ +##TYPE##_SECTION_ELSE \ + or 31,31,31; \ +BEGIN_##TYPE##_SECTION_NESTED(94) \ + or 5,5,5; \ +##TYPE##_SECTION_ELSE_NESTED(94) \ + or 1,1,1; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \ + or 31,31,31; \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else can have large else case */ \ +BEGIN_##TYPE##_SECTION \ + or 2,2,2; \ + or 2,2,2; \ + or 2,2,2; \ + or 2,2,2; \ +##TYPE##_SECTION_ELSE \ +BEGIN_##TYPE##_SECTION_NESTED(94) \ + or 5,5,5; \ + or 5,5,5; \ + or 5,5,5; \ + or 5,5,5; \ +##TYPE##_SECTION_ELSE_NESTED(94) \ + or 1,1,1; \ + or 1,1,1; \ + or 1,1,1; \ + or 1,1,1; \ +ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \ +ALT_##TYPE##_SECTION_END(0, 1) \ + or 1,1,1; \ + or 1,1,1; + +#define MAKE_MACRO_TEST_EXPECTED(TYPE) \ +globl(ftr_fixup_test_ ##TYPE##_macros_expected) \ + or 1,1,1; \ + /* Basic test, this section should all be nop'ed */ \ +/* BEGIN_##TYPE##_SECTION */ \ + nop; \ + nop; \ + nop; \ +/* END_##TYPE##_SECTION(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic test, this section should NOT be nop'ed */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ + or 2,2,2; \ + or 2,2,2; \ +/* END_##TYPE##_SECTION(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, inner section should be nop'ed */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \ + nop; \ + nop; \ +/* END_##TYPE##_SECTION_NESTED(0, 1, 80) */ \ + or 2,2,2; \ + or 2,2,2; \ +/* END_##TYPE##_SECTION(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, whole section should be nop'ed */ \ + /* NB. inner section is not nop'ed, but then entire outer is */ \ +/* BEGIN_##TYPE##_SECTION */ \ + nop; \ + nop; \ +/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \ + nop; \ + nop; \ +/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \ + nop; \ + nop; \ +/* END_##TYPE##_SECTION(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nesting test, none should be nop'ed */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \ + or 3,3,3; \ + or 3,3,3; \ +/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \ + or 2,2,2; \ + or 2,2,2; \ +/* END_##TYPE##_SECTION(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic alt section test, default case should be taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +/* ##TYPE##_SECTION_ELSE */ \ + /* or 5,5,5; */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Basic alt section test, else case should be taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ +/* ##TYPE##_SECTION_ELSE */ \ + or 31,31,31; \ + or 31,31,31; \ + or 31,31,31; \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt with smaller else case, should be padded with nops */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ +/* ##TYPE##_SECTION_ELSE */ \ + or 31,31,31; \ + nop; \ + nop; \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in default case */ \ + /* Default case should be taken, with nop'ed inner section */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 3,3,3; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + nop; \ + nop; \ +/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \ + or 3,3,3; \ +/* ##TYPE##_SECTION_ELSE */ \ + /* or 2,2,2; */ \ + /* or 2,2,2; */ \ +/* ALT_##TYPE##_SECTION_END(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in else, default taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 3,3,3; \ + or 3,3,3; \ + or 3,3,3; \ +/* ##TYPE##_SECTION_ELSE */ \ + /* or 5,5,5; */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + /* or 3,3,3; */ \ +/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Alt section with nested section in else, else taken & nop */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ + /* or 3,3,3; */ \ +/* ##TYPE##_SECTION_ELSE */ \ + or 5,5,5; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + nop; \ +/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \ + or 5,5,5; \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, default taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + or 1,1,1; \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \ + or 2,2,2; \ +/* END_##TYPE##_SECTION(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, else taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + /* or 1,1,1; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + or 5,5,5; \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \ + or 2,2,2; \ +/* END_##TYPE##_SECTION(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Feature section with nested alt section, all nop'ed */ \ +/* BEGIN_##TYPE##_SECTION */ \ + nop; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + nop; \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \ + nop; \ +/* END_##TYPE##_SECTION(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, default with inner default taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + or 1,1,1; \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \ + or 2,2,2; \ +/* ##TYPE##_SECTION_ELSE */ \ + /* or 31,31,31; */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \ + /* or 5,5,5; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \ + /* or 1,1,1; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \ + /* or 31,31,31; */ \ +/* ALT_##TYPE##_SECTION_END(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, default with inner else taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + or 2,2,2; \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + /* or 1,1,1; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + or 5,5,5; \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \ + or 2,2,2; \ +/* ##TYPE##_SECTION_ELSE */ \ + /* or 31,31,31; */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \ + /* or 5,5,5; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \ + /* or 1,1,1; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \ + /* or 31,31,31; */ \ +/* ALT_##TYPE##_SECTION_END(0, 0) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else with inner default taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 2,2,2; */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + /* or 1,1,1; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \ + /* or 2,2,2; */ \ +/* ##TYPE##_SECTION_ELSE */ \ + or 31,31,31; \ +/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \ + or 5,5,5; \ +/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \ + /* or 1,1,1; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \ + or 31,31,31; \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else with inner else taken */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 2,2,2; */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \ + /* or 1,1,1; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \ + /* or 5,5,5; */ \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \ + /* or 2,2,2; */ \ +/* ##TYPE##_SECTION_ELSE */ \ + or 31,31,31; \ +/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \ + /* or 5,5,5; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \ + or 1,1,1; \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \ + or 31,31,31; \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; \ + /* Nested alt sections, else can have large else case */ \ +/* BEGIN_##TYPE##_SECTION */ \ + /* or 2,2,2; */ \ + /* or 2,2,2; */ \ + /* or 2,2,2; */ \ + /* or 2,2,2; */ \ +/* ##TYPE##_SECTION_ELSE */ \ +/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \ + /* or 5,5,5; */ \ + /* or 5,5,5; */ \ + /* or 5,5,5; */ \ + /* or 5,5,5; */ \ +/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \ + or 1,1,1; \ + or 1,1,1; \ + or 1,1,1; \ + or 1,1,1; \ +/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \ +/* ALT_##TYPE##_SECTION_END(0, 1) */ \ + or 1,1,1; \ + or 1,1,1; + +MAKE_MACRO_TEST(FTR); +MAKE_MACRO_TEST_EXPECTED(FTR); + +#ifdef CONFIG_PPC64 +MAKE_MACRO_TEST(FW_FTR); +MAKE_MACRO_TEST_EXPECTED(FW_FTR); +#endif + +globl(lwsync_fixup_test) +1: or 1,1,1 + LWSYNC +globl(end_lwsync_fixup_test) + +globl(lwsync_fixup_test_expected_LWSYNC) +1: or 1,1,1 + lwsync + +globl(lwsync_fixup_test_expected_SYNC) +1: or 1,1,1 + sync + diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c new file mode 100644 index 0000000000000000000000000000000000000000..8c5a03be31e07766d123460cf8b273ed6dab6d0b --- /dev/null +++ b/arch/powerpc/lib/feature-fixups.c @@ -0,0 +1,351 @@ +/* + * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) + * + * Modifications for ppc64: + * Copyright (C) 2003 Dave Engebretsen + * + * Copyright 2008 Michael Ellerman, IBM Corporation. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include +#include +#include +#include +#include + + +struct fixup_entry { + unsigned long mask; + unsigned long value; + long start_off; + long end_off; + long alt_start_off; + long alt_end_off; +}; + +static unsigned int *calc_addr(struct fixup_entry *fcur, long offset) +{ + /* + * We store the offset to the code as a negative offset from + * the start of the alt_entry, to support the VDSO. This + * routine converts that back into an actual address. + */ + return (unsigned int *)((unsigned long)fcur + offset); +} + +static int patch_alt_instruction(unsigned int *src, unsigned int *dest, + unsigned int *alt_start, unsigned int *alt_end) +{ + unsigned int instr; + + instr = *src; + + if (instr_is_relative_branch(*src)) { + unsigned int *target = (unsigned int *)branch_target(src); + + /* Branch within the section doesn't need translating */ + if (target < alt_start || target >= alt_end) { + instr = translate_branch(dest, src); + if (!instr) + return 1; + } + } + + patch_instruction(dest, instr); + + return 0; +} + +static int patch_feature_section(unsigned long value, struct fixup_entry *fcur) +{ + unsigned int *start, *end, *alt_start, *alt_end, *src, *dest; + + start = calc_addr(fcur, fcur->start_off); + end = calc_addr(fcur, fcur->end_off); + alt_start = calc_addr(fcur, fcur->alt_start_off); + alt_end = calc_addr(fcur, fcur->alt_end_off); + + if ((alt_end - alt_start) > (end - start)) + return 1; + + if ((value & fcur->mask) == fcur->value) + return 0; + + src = alt_start; + dest = start; + + for (; src < alt_end; src++, dest++) { + if (patch_alt_instruction(src, dest, alt_start, alt_end)) + return 1; + } + + for (; dest < end; dest++) + patch_instruction(dest, PPC_NOP_INSTR); + + return 0; +} + +void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end) +{ + struct fixup_entry *fcur, *fend; + + fcur = fixup_start; + fend = fixup_end; + + for (; fcur < fend; fcur++) { + if (patch_feature_section(value, fcur)) { + WARN_ON(1); + printk("Unable to patch feature section at %p - %p" \ + " with %p - %p\n", + calc_addr(fcur, fcur->start_off), + calc_addr(fcur, fcur->end_off), + calc_addr(fcur, fcur->alt_start_off), + calc_addr(fcur, fcur->alt_end_off)); + } + } +} + +void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) +{ + unsigned int *start, *end, *dest; + + if (!(value & CPU_FTR_LWSYNC)) + return ; + + start = fixup_start; + end = fixup_end; + + for (; start < end; start++) { + dest = (void *)start + *start; + patch_instruction(dest, PPC_LWSYNC_INSTR); + } +} + +#ifdef CONFIG_FTR_FIXUP_SELFTEST + +#define check(x) \ + if (!(x)) printk("feature-fixups: test failed at line %d\n", __LINE__); + +/* This must be after the text it fixes up, vmlinux.lds.S enforces that atm */ +static struct fixup_entry fixup; + +static long calc_offset(struct fixup_entry *entry, unsigned int *p) +{ + return (unsigned long)p - (unsigned long)entry; +} + +void test_basic_patching(void) +{ + extern unsigned int ftr_fixup_test1; + extern unsigned int end_ftr_fixup_test1; + extern unsigned int ftr_fixup_test1_orig; + extern unsigned int ftr_fixup_test1_expected; + int size = &end_ftr_fixup_test1 - &ftr_fixup_test1; + + fixup.value = fixup.mask = 8; + fixup.start_off = calc_offset(&fixup, &ftr_fixup_test1 + 1); + fixup.end_off = calc_offset(&fixup, &ftr_fixup_test1 + 2); + fixup.alt_start_off = fixup.alt_end_off = 0; + + /* Sanity check */ + check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0); + + /* Check we don't patch if the value matches */ + patch_feature_section(8, &fixup); + check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0); + + /* Check we do patch if the value doesn't match */ + patch_feature_section(0, &fixup); + check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0); + + /* Check we do patch if the mask doesn't match */ + memcpy(&ftr_fixup_test1, &ftr_fixup_test1_orig, size); + check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0); + patch_feature_section(~8, &fixup); + check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0); +} + +static void test_alternative_patching(void) +{ + extern unsigned int ftr_fixup_test2; + extern unsigned int end_ftr_fixup_test2; + extern unsigned int ftr_fixup_test2_orig; + extern unsigned int ftr_fixup_test2_alt; + extern unsigned int ftr_fixup_test2_expected; + int size = &end_ftr_fixup_test2 - &ftr_fixup_test2; + + fixup.value = fixup.mask = 0xF; + fixup.start_off = calc_offset(&fixup, &ftr_fixup_test2 + 1); + fixup.end_off = calc_offset(&fixup, &ftr_fixup_test2 + 2); + fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test2_alt); + fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test2_alt + 1); + + /* Sanity check */ + check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0); + + /* Check we don't patch if the value matches */ + patch_feature_section(0xF, &fixup); + check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0); + + /* Check we do patch if the value doesn't match */ + patch_feature_section(0, &fixup); + check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0); + + /* Check we do patch if the mask doesn't match */ + memcpy(&ftr_fixup_test2, &ftr_fixup_test2_orig, size); + check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0); + patch_feature_section(~0xF, &fixup); + check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0); +} + +static void test_alternative_case_too_big(void) +{ + extern unsigned int ftr_fixup_test3; + extern unsigned int end_ftr_fixup_test3; + extern unsigned int ftr_fixup_test3_orig; + extern unsigned int ftr_fixup_test3_alt; + int size = &end_ftr_fixup_test3 - &ftr_fixup_test3; + + fixup.value = fixup.mask = 0xC; + fixup.start_off = calc_offset(&fixup, &ftr_fixup_test3 + 1); + fixup.end_off = calc_offset(&fixup, &ftr_fixup_test3 + 2); + fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test3_alt); + fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test3_alt + 2); + + /* Sanity check */ + check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0); + + /* Expect nothing to be patched, and the error returned to us */ + check(patch_feature_section(0xF, &fixup) == 1); + check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0); + check(patch_feature_section(0, &fixup) == 1); + check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0); + check(patch_feature_section(~0xF, &fixup) == 1); + check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0); +} + +static void test_alternative_case_too_small(void) +{ + extern unsigned int ftr_fixup_test4; + extern unsigned int end_ftr_fixup_test4; + extern unsigned int ftr_fixup_test4_orig; + extern unsigned int ftr_fixup_test4_alt; + extern unsigned int ftr_fixup_test4_expected; + int size = &end_ftr_fixup_test4 - &ftr_fixup_test4; + unsigned long flag; + + /* Check a high-bit flag */ + flag = 1UL << ((sizeof(unsigned long) - 1) * 8); + fixup.value = fixup.mask = flag; + fixup.start_off = calc_offset(&fixup, &ftr_fixup_test4 + 1); + fixup.end_off = calc_offset(&fixup, &ftr_fixup_test4 + 5); + fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test4_alt); + fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test4_alt + 2); + + /* Sanity check */ + check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0); + + /* Check we don't patch if the value matches */ + patch_feature_section(flag, &fixup); + check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0); + + /* Check we do patch if the value doesn't match */ + patch_feature_section(0, &fixup); + check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0); + + /* Check we do patch if the mask doesn't match */ + memcpy(&ftr_fixup_test4, &ftr_fixup_test4_orig, size); + check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0); + patch_feature_section(~flag, &fixup); + check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0); +} + +static void test_alternative_case_with_branch(void) +{ + extern unsigned int ftr_fixup_test5; + extern unsigned int end_ftr_fixup_test5; + extern unsigned int ftr_fixup_test5_expected; + int size = &end_ftr_fixup_test5 - &ftr_fixup_test5; + + check(memcmp(&ftr_fixup_test5, &ftr_fixup_test5_expected, size) == 0); +} + +static void test_alternative_case_with_external_branch(void) +{ + extern unsigned int ftr_fixup_test6; + extern unsigned int end_ftr_fixup_test6; + extern unsigned int ftr_fixup_test6_expected; + int size = &end_ftr_fixup_test6 - &ftr_fixup_test6; + + check(memcmp(&ftr_fixup_test6, &ftr_fixup_test6_expected, size) == 0); +} + +static void test_cpu_macros(void) +{ + extern void ftr_fixup_test_FTR_macros; + extern void ftr_fixup_test_FTR_macros_expected; + unsigned long size = &ftr_fixup_test_FTR_macros_expected - + &ftr_fixup_test_FTR_macros; + + /* The fixups have already been done for us during boot */ + check(memcmp(&ftr_fixup_test_FTR_macros, + &ftr_fixup_test_FTR_macros_expected, size) == 0); +} + +static void test_fw_macros(void) +{ +#ifdef CONFIG_PPC64 + extern void ftr_fixup_test_FW_FTR_macros; + extern void ftr_fixup_test_FW_FTR_macros_expected; + unsigned long size = &ftr_fixup_test_FW_FTR_macros_expected - + &ftr_fixup_test_FW_FTR_macros; + + /* The fixups have already been done for us during boot */ + check(memcmp(&ftr_fixup_test_FW_FTR_macros, + &ftr_fixup_test_FW_FTR_macros_expected, size) == 0); +#endif +} + +static void test_lwsync_macros(void) +{ + extern void lwsync_fixup_test; + extern void end_lwsync_fixup_test; + extern void lwsync_fixup_test_expected_LWSYNC; + extern void lwsync_fixup_test_expected_SYNC; + unsigned long size = &end_lwsync_fixup_test - + &lwsync_fixup_test; + + /* The fixups have already been done for us during boot */ + if (cur_cpu_spec->cpu_features & CPU_FTR_LWSYNC) { + check(memcmp(&lwsync_fixup_test, + &lwsync_fixup_test_expected_LWSYNC, size) == 0); + } else { + check(memcmp(&lwsync_fixup_test, + &lwsync_fixup_test_expected_SYNC, size) == 0); + } +} + +static int __init test_feature_fixups(void) +{ + printk(KERN_DEBUG "Running feature fixup self-tests ...\n"); + + test_basic_patching(); + test_alternative_patching(); + test_alternative_case_too_big(); + test_alternative_case_too_small(); + test_alternative_case_with_branch(); + test_alternative_case_with_external_branch(); + test_cpu_macros(); + test_fw_macros(); + test_lwsync_macros(); + + return 0; +} +late_initcall(test_feature_fixups); + +#endif /* CONFIG_FTR_FIXUP_SELFTEST */ diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S index 49eb1f1a2bb4f5a240ff45a0d807bae129718155..64e2e499e32a6fecacf81cb6eba2d03a32c8e50d 100644 --- a/arch/powerpc/lib/string.S +++ b/arch/powerpc/lib/string.S @@ -13,13 +13,7 @@ #include .section __ex_table,"a" -#ifdef CONFIG_PPC64 - .align 3 -#define EXTBL .llong -#else - .align 2 -#define EXTBL .long -#endif + PPC_LONG_ALIGN .text _GLOBAL(strcpy) @@ -160,9 +154,9 @@ _GLOBAL(__clear_user) blr .section __ex_table,"a" - EXTBL 11b,90b - EXTBL 1b,91b - EXTBL 8b,92b + PPC_LONG 11b,90b + PPC_LONG 1b,91b + PPC_LONG 8b,92b .text _GLOBAL(__strncpy_from_user) @@ -183,7 +177,7 @@ _GLOBAL(__strncpy_from_user) blr .section __ex_table,"a" - EXTBL 1b,99b + PPC_LONG 1b,99b .text /* r3 = str, r4 = len (> 0), r5 = top (highest addr) */ @@ -208,4 +202,4 @@ _GLOBAL(__strnlen_user) blr .section __ex_table,"a" - EXTBL 1b,99b + PPC_LONG 1b,99b diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c index 381306bb1590ec62e198ebf16efbb024208c7273..29e545e0272e62abd85ec7cf3d4933b882ce6da8 100644 --- a/arch/powerpc/math-emu/math.c +++ b/arch/powerpc/math-emu/math.c @@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs) case LFD: idx = (insn >> 16) & 0x1f; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); lfd(op0, op1, op2, op3); break; case LFDU: idx = (insn >> 16) & 0x1f; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); lfd(op0, op1, op2, op3); regs->gpr[idx] = (unsigned long)op1; @@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs) case STFD: idx = (insn >> 16) & 0x1f; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); stfd(op0, op1, op2, op3); break; case STFDU: idx = (insn >> 16) & 0x1f; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); stfd(op0, op1, op2, op3); regs->gpr[idx] = (unsigned long)op1; break; case OP63: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); fmr(op0, op1, op2, op3); break; default: @@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs) switch (type) { case AB: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; - op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); + op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); break; case AC: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; - op2 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); + op2 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); break; case ABC: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; - op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; - op3 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); + op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); + op3 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f); break; case D: idx = (insn >> 16) & 0x1f; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); break; @@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs) goto illegal; sdisp = (insn & 0xffff); - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)(regs->gpr[idx] + sdisp); break; case X: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); break; case XA: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); break; case XB: - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; - op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); + op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); break; case XE: idx = (insn >> 16) & 0x1f; - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); if (!idx) { if (((insn >> 1) & 0x3ff) == STFIWX) op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]); @@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs) case XEU: idx = (insn >> 16) & 0x1f; - op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f]; + op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f); op1 = (void *)((idx ? regs->gpr[idx] : 0) + regs->gpr[(insn >> 11) & 0x1f]); break; @@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs) case XCR: op0 = (void *)®s->ccr; op1 = (void *)((insn >> 23) & 0x7); - op2 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f]; - op3 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; + op2 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f); + op3 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); break; case XCRL: @@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs) case XFLB: op0 = (void *)((insn >> 17) & 0xff); - op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f]; + op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f); break; default: diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c index 953fb919eb06da65f004f18943490028cd93538a..98052ac96580d69dc0566fb711594625f2f470b2 100644 --- a/arch/powerpc/mm/44x_mmu.c +++ b/arch/powerpc/mm/44x_mmu.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "mmu_decl.h" @@ -37,11 +38,35 @@ unsigned int tlb_44x_index; /* = 0 */ unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS; int icache_44x_need_flush; +static void __init ppc44x_update_tlb_hwater(void) +{ + extern unsigned int tlb_44x_patch_hwater_D[]; + extern unsigned int tlb_44x_patch_hwater_I[]; + + /* The TLB miss handlers hard codes the watermark in a cmpli + * instruction to improve performances rather than loading it + * from the global variable. Thus, we patch the instructions + * in the 2 TLB miss handlers when updating the value + */ + tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) | + tlb_44x_hwater; + flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0], + (unsigned long)&tlb_44x_patch_hwater_D[1]); + tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) | + tlb_44x_hwater; + flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0], + (unsigned long)&tlb_44x_patch_hwater_I[1]); +} + /* * "Pins" a 256MB TLB entry in AS0 for kernel lowmem */ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) { + unsigned int entry = tlb_44x_hwater--; + + ppc44x_update_tlb_hwater(); + __asm__ __volatile__( "tlbwe %2,%3,%4\n" "tlbwe %1,%3,%5\n" @@ -50,7 +75,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), "r" (phys), "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M), - "r" (tlb_44x_hwater--), /* slot for this TLB entry */ + "r" (entry), "i" (PPC44x_TLB_PAGEID), "i" (PPC44x_TLB_XLAT), "i" (PPC44x_TLB_ATTRIB)); @@ -58,6 +83,8 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) void __init MMU_init_hw(void) { + ppc44x_update_tlb_hwater(); + flush_instruction_cache(); } diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c index 7b2510799266654e4fb8ec1283adfbbbfb159158..565b7a237c847929e885eb5597fe4cdb14746cf3 100644 --- a/arch/powerpc/mm/fault.c +++ b/arch/powerpc/mm/fault.c @@ -100,31 +100,6 @@ static int store_updates_sp(struct pt_regs *regs) return 0; } -#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) -static void do_dabr(struct pt_regs *regs, unsigned long address, - unsigned long error_code) -{ - siginfo_t info; - - if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code, - 11, SIGSEGV) == NOTIFY_STOP) - return; - - if (debugger_dabr_match(regs)) - return; - - /* Clear the DABR */ - set_dabr(0); - - /* Deliver the signal to userspace */ - info.si_signo = SIGTRAP; - info.si_errno = 0; - info.si_code = TRAP_HWBKPT; - info.si_addr = (void __user *)address; - force_sig_info(SIGTRAP, &info, current); -} -#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/ - /* * For 600- and 800-family processors, the error_code parameter is DSISR * for a data fault, SRR1 for an instruction fault. For 400-family processors @@ -306,7 +281,8 @@ good_area: flush_dcache_icache_page(page); set_bit(PG_arch_1, &page->flags); } - pte_update(ptep, 0, _PAGE_HWEXEC); + pte_update(ptep, 0, _PAGE_HWEXEC | + _PAGE_ACCESSED); _tlbie(address, mm->context.id); pte_unmap_unlock(ptep, ptl); up_read(&mm->mmap_sem); diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S index 70f4c833fa32c51b300c3a69bb53b00f4925e3a9..a719f53921a57c390503b708c38cb4e1146a176b 100644 --- a/arch/powerpc/mm/hash_low_64.S +++ b/arch/powerpc/mm/hash_low_64.S @@ -388,7 +388,7 @@ _GLOBAL(__hash_page_4K) */ rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */ or r30,r30,r31 - ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE + ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED oris r30,r30,_PAGE_COMBO@h /* Write the linux PTE atomically (setting busy) */ stdcx. r30,0,r6 @@ -468,7 +468,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE) * go to out-of-line code to try to modify the HPTE. We look for * the bit at (1 >> (index + 32)) */ - andi. r0,r31,_PAGE_HASHPTE + rldicl. r0,r31,64-12,48 li r26,0 /* Default hidx */ beq htab_insert_pte @@ -726,11 +726,11 @@ BEGIN_FTR_SECTION bne- ht64_bail_ok END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE) /* Prepare new PTE value (turn access RW into DIRTY, then - * add BUSY,HASHPTE and ACCESSED) + * add BUSY and ACCESSED) */ rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */ or r30,r30,r31 - ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE + ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED /* Write the linux PTE atomically (setting busy) */ stdcx. r30,0,r6 bne- 1b @@ -798,18 +798,21 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE) /* Check if we may already be in the hashtable, in this case, we * go to out-of-line code to try to modify the HPTE */ - andi. r0,r31,_PAGE_HASHPTE + rldicl. r0,r31,64-12,48 bne ht64_modify_pte ht64_insert_pte: /* Clear hpte bits in new pte (we also clear BUSY btw) and - * add _PAGE_HASHPTE + * add _PAGE_HPTE_SUB0 */ lis r0,_PAGE_HPTEFLAGS@h ori r0,r0,_PAGE_HPTEFLAGS@l andc r30,r30,r0 +#ifdef CONFIG_PPC_64K_PAGES + oris r30,r30,_PAGE_HPTE_SUB0@h +#else ori r30,r30,_PAGE_HASHPTE - +#endif /* Phyical address in r5 */ rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT sldi r5,r5,PAGE_SHIFT diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 0f2d239d94c440608dadf79671b4b95f6cf4e0e9..5ce5a4dcd00823c17447737f18ad5ad03c820185 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -68,6 +68,7 @@ #define KB (1024) #define MB (1024*KB) +#define GB (1024L*MB) /* * Note: pte --> Linux PTE @@ -102,7 +103,6 @@ int mmu_kernel_ssize = MMU_SEGSIZE_256M; int mmu_highuser_ssize = MMU_SEGSIZE_256M; u16 mmu_slb_size = 64; #ifdef CONFIG_HUGETLB_PAGE -int mmu_huge_psize = MMU_PAGE_16M; unsigned int HPAGE_SHIFT; #endif #ifdef CONFIG_PPC_64K_PAGES @@ -120,7 +120,7 @@ static DEFINE_SPINLOCK(linear_map_hash_lock); /* Pre-POWER4 CPUs (4k pages only) */ -struct mmu_psize_def mmu_psize_defaults_old[] = { +static struct mmu_psize_def mmu_psize_defaults_old[] = { [MMU_PAGE_4K] = { .shift = 12, .sllp = 0, @@ -134,7 +134,7 @@ struct mmu_psize_def mmu_psize_defaults_old[] = { * * Support for 16Mb large pages */ -struct mmu_psize_def mmu_psize_defaults_gp[] = { +static struct mmu_psize_def mmu_psize_defaults_gp[] = { [MMU_PAGE_4K] = { .shift = 12, .sllp = 0, @@ -329,6 +329,44 @@ static int __init htab_dt_scan_page_sizes(unsigned long node, return 0; } +/* Scan for 16G memory blocks that have been set aside for huge pages + * and reserve those blocks for 16G huge pages. + */ +static int __init htab_dt_scan_hugepage_blocks(unsigned long node, + const char *uname, int depth, + void *data) { + char *type = of_get_flat_dt_prop(node, "device_type", NULL); + unsigned long *addr_prop; + u32 *page_count_prop; + unsigned int expected_pages; + long unsigned int phys_addr; + long unsigned int block_size; + + /* We are scanning "memory" nodes only */ + if (type == NULL || strcmp(type, "memory") != 0) + return 0; + + /* This property is the log base 2 of the number of virtual pages that + * will represent this memory block. */ + page_count_prop = of_get_flat_dt_prop(node, "ibm,expected#pages", NULL); + if (page_count_prop == NULL) + return 0; + expected_pages = (1 << page_count_prop[0]); + addr_prop = of_get_flat_dt_prop(node, "reg", NULL); + if (addr_prop == NULL) + return 0; + phys_addr = addr_prop[0]; + block_size = addr_prop[1]; + if (block_size != (16 * GB)) + return 0; + printk(KERN_INFO "Huge page(16GB) memory: " + "addr = 0x%lX size = 0x%lX pages = %d\n", + phys_addr, block_size, expected_pages); + lmb_reserve(phys_addr, block_size * expected_pages); + add_gpage(phys_addr, block_size, expected_pages); + return 0; +} + static void __init htab_init_page_sizes(void) { int rc; @@ -418,15 +456,18 @@ static void __init htab_init_page_sizes(void) ); #ifdef CONFIG_HUGETLB_PAGE - /* Init large page size. Currently, we pick 16M or 1M depending + /* Reserve 16G huge page memory sections for huge pages */ + of_scan_flat_dt(htab_dt_scan_hugepage_blocks, NULL); + +/* Set default large page size. Currently, we pick 16M or 1M depending * on what is available */ if (mmu_psize_defs[MMU_PAGE_16M].shift) - set_huge_psize(MMU_PAGE_16M); + HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_16M].shift; /* With 4k/4level pagetables, we can't (for now) cope with a * huge page size < PMD_SIZE */ else if (mmu_psize_defs[MMU_PAGE_1M].shift) - set_huge_psize(MMU_PAGE_1M); + HPAGE_SHIFT = mmu_psize_defs[MMU_PAGE_1M].shift; #endif /* CONFIG_HUGETLB_PAGE */ } @@ -533,8 +574,6 @@ void __init htab_initialize(void) unsigned long base = 0, size = 0, limit; int i; - extern unsigned long tce_alloc_start, tce_alloc_end; - DBG(" -> htab_initialize()\n"); /* Initialize segment sizes */ @@ -697,6 +736,28 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) return pp; } +#ifdef CONFIG_PPC_MM_SLICES +unsigned int get_paca_psize(unsigned long addr) +{ + unsigned long index, slices; + + if (addr < SLICE_LOW_TOP) { + slices = get_paca()->context.low_slices_psize; + index = GET_LOW_SLICE_INDEX(addr); + } else { + slices = get_paca()->context.high_slices_psize; + index = GET_HIGH_SLICE_INDEX(addr); + } + return (slices >> (index * 4)) & 0xF; +} + +#else +unsigned int get_paca_psize(unsigned long addr) +{ + return get_paca()->context.user_psize; +} +#endif + /* * Demote a segment to using 4k pages. * For now this makes the whole process use 4k pages. @@ -704,13 +765,13 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) #ifdef CONFIG_PPC_64K_PAGES void demote_segment_4k(struct mm_struct *mm, unsigned long addr) { - if (mm->context.user_psize == MMU_PAGE_4K) + if (get_slice_psize(mm, addr) == MMU_PAGE_4K) return; - slice_set_user_psize(mm, MMU_PAGE_4K); + slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K); #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif - if (get_paca()->context.user_psize != MMU_PAGE_4K) { + if (get_paca_psize(addr) != MMU_PAGE_4K) { get_paca()->context = mm->context; slb_flush_and_rebolt(); } @@ -794,11 +855,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) DBG_LOW(" user region with no mm !\n"); return 1; } -#ifdef CONFIG_PPC_MM_SLICES psize = get_slice_psize(mm, ea); -#else - psize = mm->context.user_psize; -#endif ssize = user_segment_size(ea); vsid = get_vsid(mm->context.id, ea, ssize); break; @@ -831,7 +888,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) #ifdef CONFIG_HUGETLB_PAGE /* Handle hugepage regions */ - if (HPAGE_SHIFT && psize == mmu_huge_psize) { + if (HPAGE_SHIFT && mmu_huge_psizes[psize]) { DBG_LOW(" -> huge page !\n"); return hash_huge_page(mm, access, ea, vsid, local, trap); } @@ -870,7 +927,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) /* Do actual hashing */ #ifdef CONFIG_PPC_64K_PAGES /* If _PAGE_4K_PFN is set, make sure this is a 4k segment */ - if (pte_val(*ptep) & _PAGE_4K_PFN) { + if ((pte_val(*ptep) & _PAGE_4K_PFN) && psize == MMU_PAGE_64K) { demote_segment_4k(mm, ea); psize = MMU_PAGE_4K; } @@ -899,7 +956,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap) } } if (user_region) { - if (psize != get_paca()->context.user_psize) { + if (psize != get_paca_psize(ea)) { get_paca()->context = mm->context; slb_flush_and_rebolt(); } diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index a02266dad215cc3d1065b69e542bf48f8e2e27be..f1c2d55b4377c1a09af0e860316e80d56f6557e2 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c @@ -24,21 +24,43 @@ #include #include -#define HPAGE_SHIFT_64K 16 -#define HPAGE_SHIFT_16M 24 +#define PAGE_SHIFT_64K 16 +#define PAGE_SHIFT_16M 24 +#define PAGE_SHIFT_16G 34 #define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT) #define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT) +#define MAX_NUMBER_GPAGES 1024 -unsigned int hugepte_shift; -#define PTRS_PER_HUGEPTE (1 << hugepte_shift) -#define HUGEPTE_TABLE_SIZE (sizeof(pte_t) << hugepte_shift) +/* Tracks the 16G pages after the device tree is scanned and before the + * huge_boot_pages list is ready. */ +static unsigned long gpage_freearray[MAX_NUMBER_GPAGES]; +static unsigned nr_gpages; -#define HUGEPD_SHIFT (HPAGE_SHIFT + hugepte_shift) -#define HUGEPD_SIZE (1UL << HUGEPD_SHIFT) -#define HUGEPD_MASK (~(HUGEPD_SIZE-1)) +/* Array of valid huge page sizes - non-zero value(hugepte_shift) is + * stored for the huge page sizes that are valid. + */ +unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */ + +#define hugepte_shift mmu_huge_psizes +#define PTRS_PER_HUGEPTE(psize) (1 << hugepte_shift[psize]) +#define HUGEPTE_TABLE_SIZE(psize) (sizeof(pte_t) << hugepte_shift[psize]) + +#define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \ + + hugepte_shift[psize]) +#define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize)) +#define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1)) + +/* Subtract one from array size because we don't need a cache for 4K since + * is not a huge page size */ +#define huge_pgtable_cache(psize) (pgtable_cache[HUGEPTE_CACHE_NUM \ + + psize-1]) +#define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize]) -#define huge_pgtable_cache (pgtable_cache[HUGEPTE_CACHE_NUM]) +static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = { + "unused_4K", "hugepte_cache_64K", "unused_64K_AP", + "hugepte_cache_1M", "hugepte_cache_16M", "hugepte_cache_16G" +}; /* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad() * will choke on pointers to hugepte tables, which is handy for @@ -49,24 +71,49 @@ typedef struct { unsigned long pd; } hugepd_t; #define hugepd_none(hpd) ((hpd).pd == 0) +static inline int shift_to_mmu_psize(unsigned int shift) +{ + switch (shift) { +#ifndef CONFIG_PPC_64K_PAGES + case PAGE_SHIFT_64K: + return MMU_PAGE_64K; +#endif + case PAGE_SHIFT_16M: + return MMU_PAGE_16M; + case PAGE_SHIFT_16G: + return MMU_PAGE_16G; + } + return -1; +} + +static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize) +{ + if (mmu_psize_defs[mmu_psize].shift) + return mmu_psize_defs[mmu_psize].shift; + BUG(); +} + static inline pte_t *hugepd_page(hugepd_t hpd) { BUG_ON(!(hpd.pd & HUGEPD_OK)); return (pte_t *)(hpd.pd & ~HUGEPD_OK); } -static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr) +static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr, + struct hstate *hstate) { - unsigned long idx = ((addr >> HPAGE_SHIFT) & (PTRS_PER_HUGEPTE-1)); + unsigned int shift = huge_page_shift(hstate); + int psize = shift_to_mmu_psize(shift); + unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1)); pte_t *dir = hugepd_page(*hpdp); return dir + idx; } static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp, - unsigned long address) + unsigned long address, unsigned int psize) { - pte_t *new = kmem_cache_alloc(huge_pgtable_cache, + pte_t *new = kmem_cache_zalloc(huge_pgtable_cache(psize), GFP_KERNEL|__GFP_REPEAT); if (! new) @@ -74,7 +121,7 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp, spin_lock(&mm->page_table_lock); if (!hugepd_none(*hpdp)) - kmem_cache_free(huge_pgtable_cache, new); + kmem_cache_free(huge_pgtable_cache(psize), new); else hpdp->pd = (unsigned long)new | HUGEPD_OK; spin_unlock(&mm->page_table_lock); @@ -83,27 +130,60 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp, /* Base page size affects how we walk hugetlb page tables */ #ifdef CONFIG_PPC_64K_PAGES -#define hpmd_offset(pud, addr) pmd_offset(pud, addr) -#define hpmd_alloc(mm, pud, addr) pmd_alloc(mm, pud, addr) +#define hpmd_offset(pud, addr, h) pmd_offset(pud, addr) +#define hpmd_alloc(mm, pud, addr, h) pmd_alloc(mm, pud, addr) #else static inline -pmd_t *hpmd_offset(pud_t *pud, unsigned long addr) +pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate) { - if (HPAGE_SHIFT == HPAGE_SHIFT_64K) + if (huge_page_shift(hstate) == PAGE_SHIFT_64K) return pmd_offset(pud, addr); else return (pmd_t *) pud; } static inline -pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr) +pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr, + struct hstate *hstate) { - if (HPAGE_SHIFT == HPAGE_SHIFT_64K) + if (huge_page_shift(hstate) == PAGE_SHIFT_64K) return pmd_alloc(mm, pud, addr); else return (pmd_t *) pud; } #endif +/* Build list of addresses of gigantic pages. This function is used in early + * boot before the buddy or bootmem allocator is setup. + */ +void add_gpage(unsigned long addr, unsigned long page_size, + unsigned long number_of_pages) +{ + if (!addr) + return; + while (number_of_pages > 0) { + gpage_freearray[nr_gpages] = addr; + nr_gpages++; + number_of_pages--; + addr += page_size; + } +} + +/* Moves the gigantic page addresses from the temporary list to the + * huge_boot_pages list. + */ +int alloc_bootmem_huge_page(struct hstate *hstate) +{ + struct huge_bootmem_page *m; + if (nr_gpages == 0) + return 0; + m = phys_to_virt(gpage_freearray[--nr_gpages]); + gpage_freearray[nr_gpages] = 0; + list_add(&m->list, &huge_boot_pages); + m->hstate = hstate; + return 1; +} + + /* Modelled after find_linux_pte() */ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) { @@ -111,39 +191,52 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr) pud_t *pu; pmd_t *pm; - BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize); + unsigned int psize; + unsigned int shift; + unsigned long sz; + struct hstate *hstate; + psize = get_slice_psize(mm, addr); + shift = mmu_psize_to_shift(psize); + sz = ((1UL) << shift); + hstate = size_to_hstate(sz); - addr &= HPAGE_MASK; + addr &= hstate->mask; pg = pgd_offset(mm, addr); if (!pgd_none(*pg)) { pu = pud_offset(pg, addr); if (!pud_none(*pu)) { - pm = hpmd_offset(pu, addr); + pm = hpmd_offset(pu, addr, hstate); if (!pmd_none(*pm)) - return hugepte_offset((hugepd_t *)pm, addr); + return hugepte_offset((hugepd_t *)pm, addr, + hstate); } } return NULL; } -pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) +pte_t *huge_pte_alloc(struct mm_struct *mm, + unsigned long addr, unsigned long sz) { pgd_t *pg; pud_t *pu; pmd_t *pm; hugepd_t *hpdp = NULL; + struct hstate *hstate; + unsigned int psize; + hstate = size_to_hstate(sz); - BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize); + psize = get_slice_psize(mm, addr); + BUG_ON(!mmu_huge_psizes[psize]); - addr &= HPAGE_MASK; + addr &= hstate->mask; pg = pgd_offset(mm, addr); pu = pud_alloc(mm, pg, addr); if (pu) { - pm = hpmd_alloc(mm, pu, addr); + pm = hpmd_alloc(mm, pu, addr, hstate); if (pm) hpdp = (hugepd_t *)pm; } @@ -151,10 +244,10 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) if (! hpdp) return NULL; - if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr)) + if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, psize)) return NULL; - return hugepte_offset(hpdp, addr); + return hugepte_offset(hpdp, addr, hstate); } int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep) @@ -162,19 +255,22 @@ int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep) return 0; } -static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp) +static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp, + unsigned int psize) { pte_t *hugepte = hugepd_page(*hpdp); hpdp->pd = 0; tlb->need_flush = 1; - pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, + pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, + HUGEPTE_CACHE_NUM+psize-1, PGF_CACHENUM_MASK)); } static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud, unsigned long addr, unsigned long end, - unsigned long floor, unsigned long ceiling) + unsigned long floor, unsigned long ceiling, + unsigned int psize) { pmd_t *pmd; unsigned long next; @@ -186,7 +282,7 @@ static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud, next = pmd_addr_end(addr, end); if (pmd_none(*pmd)) continue; - free_hugepte_range(tlb, (hugepd_t *)pmd); + free_hugepte_range(tlb, (hugepd_t *)pmd, psize); } while (pmd++, addr = next, addr != end); start &= PUD_MASK; @@ -212,6 +308,9 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd, pud_t *pud; unsigned long next; unsigned long start; + unsigned int shift; + unsigned int psize = get_slice_psize(tlb->mm, addr); + shift = mmu_psize_to_shift(psize); start = addr; pud = pud_offset(pgd, addr); @@ -220,16 +319,18 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd, #ifdef CONFIG_PPC_64K_PAGES if (pud_none_or_clear_bad(pud)) continue; - hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling); + hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling, + psize); #else - if (HPAGE_SHIFT == HPAGE_SHIFT_64K) { + if (shift == PAGE_SHIFT_64K) { if (pud_none_or_clear_bad(pud)) continue; - hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling); + hugetlb_free_pmd_range(tlb, pud, addr, next, floor, + ceiling, psize); } else { if (pud_none(*pud)) continue; - free_hugepte_range(tlb, (hugepd_t *)pud); + free_hugepte_range(tlb, (hugepd_t *)pud, psize); } #endif } while (pud++, addr = next, addr != end); @@ -255,7 +356,7 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd, * * Must be called with pagetable lock held. */ -void hugetlb_free_pgd_range(struct mmu_gather **tlb, +void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, unsigned long end, unsigned long floor, unsigned long ceiling) { @@ -297,31 +398,33 @@ void hugetlb_free_pgd_range(struct mmu_gather **tlb, * now has no other vmas using it, so can be freed, we don't * bother to round floor or end up - the tests don't need that. */ + unsigned int psize = get_slice_psize(tlb->mm, addr); - addr &= HUGEPD_MASK; + addr &= HUGEPD_MASK(psize); if (addr < floor) { - addr += HUGEPD_SIZE; + addr += HUGEPD_SIZE(psize); if (!addr) return; } if (ceiling) { - ceiling &= HUGEPD_MASK; + ceiling &= HUGEPD_MASK(psize); if (!ceiling) return; } if (end - 1 > ceiling - 1) - end -= HUGEPD_SIZE; + end -= HUGEPD_SIZE(psize); if (addr > end - 1) return; start = addr; - pgd = pgd_offset((*tlb)->mm, addr); + pgd = pgd_offset(tlb->mm, addr); do { - BUG_ON(get_slice_psize((*tlb)->mm, addr) != mmu_huge_psize); + psize = get_slice_psize(tlb->mm, addr); + BUG_ON(!mmu_huge_psizes[psize]); next = pgd_addr_end(addr, end); if (pgd_none_or_clear_bad(pgd)) continue; - hugetlb_free_pud_range(*tlb, pgd, addr, next, floor, ceiling); + hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling); } while (pgd++, addr = next, addr != end); } @@ -334,7 +437,11 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, * necessary anymore if we make hpte_need_flush() get the * page size from the slices */ - pte_update(mm, addr & HPAGE_MASK, ptep, ~0UL, 1); + unsigned int psize = get_slice_psize(mm, addr); + unsigned int shift = mmu_psize_to_shift(psize); + unsigned long sz = ((1UL) << shift); + struct hstate *hstate = size_to_hstate(sz); + pte_update(mm, addr & hstate->mask, ptep, ~0UL, 1); } *ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); } @@ -351,14 +458,19 @@ follow_huge_addr(struct mm_struct *mm, unsigned long address, int write) { pte_t *ptep; struct page *page; + unsigned int mmu_psize = get_slice_psize(mm, address); - if (get_slice_psize(mm, address) != mmu_huge_psize) + /* Verify it is a huge page else bail. */ + if (!mmu_huge_psizes[mmu_psize]) return ERR_PTR(-EINVAL); ptep = huge_pte_offset(mm, address); page = pte_page(*ptep); - if (page) - page += (address % HPAGE_SIZE) / PAGE_SIZE; + if (page) { + unsigned int shift = mmu_psize_to_shift(mmu_psize); + unsigned long sz = ((1UL) << shift); + page += (address % sz) / PAGE_SIZE; + } return page; } @@ -368,6 +480,11 @@ int pmd_huge(pmd_t pmd) return 0; } +int pud_huge(pud_t pud) +{ + return 0; +} + struct page * follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmd, int write) @@ -381,15 +498,16 @@ unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr, unsigned long len, unsigned long pgoff, unsigned long flags) { - return slice_get_unmapped_area(addr, len, flags, - mmu_huge_psize, 1, 0); + struct hstate *hstate = hstate_file(file); + int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate)); + return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0); } /* * Called by asm hashtable.S for doing lazy icache flush */ static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags, - pte_t pte, int trap) + pte_t pte, int trap, unsigned long sz) { struct page *page; int i; @@ -402,7 +520,7 @@ static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags, /* page is dirty */ if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) { if (trap == 0x400) { - for (i = 0; i < (HPAGE_SIZE / PAGE_SIZE); i++) + for (i = 0; i < (sz / PAGE_SIZE); i++) __flush_dcache_icache(page_address(page+i)); set_bit(PG_arch_1, &page->flags); } else { @@ -418,11 +536,16 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access, { pte_t *ptep; unsigned long old_pte, new_pte; - unsigned long va, rflags, pa; + unsigned long va, rflags, pa, sz; long slot; int err = 1; int ssize = user_segment_size(ea); + unsigned int mmu_psize; + int shift; + mmu_psize = get_slice_psize(mm, ea); + if (!mmu_huge_psizes[mmu_psize]) + goto out; ptep = huge_pte_offset(mm, ea); /* Search the Linux page table for a match with va */ @@ -458,38 +581,39 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access, old_pte = pte_val(*ptep); if (old_pte & _PAGE_BUSY) goto out; - new_pte = old_pte | _PAGE_BUSY | - _PAGE_ACCESSED | _PAGE_HASHPTE; + new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED; } while(old_pte != __cmpxchg_u64((unsigned long *)ptep, old_pte, new_pte)); rflags = 0x2 | (!(new_pte & _PAGE_RW)); /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */ rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N); + shift = mmu_psize_to_shift(mmu_psize); + sz = ((1UL) << shift); if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) /* No CPU has hugepages but lacks no execute, so we * don't need to worry about that case */ rflags = hash_huge_page_do_lazy_icache(rflags, __pte(old_pte), - trap); + trap, sz); /* Check if pte already has an hpte (case 2) */ if (unlikely(old_pte & _PAGE_HASHPTE)) { /* There MIGHT be an HPTE for this pte */ unsigned long hash, slot; - hash = hpt_hash(va, HPAGE_SHIFT, ssize); + hash = hpt_hash(va, shift, ssize); if (old_pte & _PAGE_F_SECOND) hash = ~hash; slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; slot += (old_pte & _PAGE_F_GIX) >> 12; - if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_huge_psize, + if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize, ssize, local) == -1) old_pte &= ~_PAGE_HPTEFLAGS; } if (likely(!(old_pte & _PAGE_HASHPTE))) { - unsigned long hash = hpt_hash(va, HPAGE_SHIFT, ssize); + unsigned long hash = hpt_hash(va, shift, ssize); unsigned long hpte_group; pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT; @@ -499,16 +623,18 @@ repeat: HPTES_PER_GROUP) & ~0x7UL; /* clear HPTE slot informations in new PTE */ +#ifdef CONFIG_PPC_64K_PAGES + new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0; +#else new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE; - +#endif /* Add in WIMG bits */ - /* XXX We should store these in the pte */ - /* --BenH: I think they are ... */ - rflags |= _PAGE_COHERENT; + rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE | + _PAGE_COHERENT | _PAGE_GUARDED)); /* Insert into the hash table, primary slot */ slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0, - mmu_huge_psize, ssize); + mmu_psize, ssize); /* Primary is full, try the secondary */ if (unlikely(slot == -1)) { @@ -516,7 +642,7 @@ repeat: HPTES_PER_GROUP) & ~0x7UL; slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, HPTE_V_SECONDARY, - mmu_huge_psize, ssize); + mmu_psize, ssize); if (slot == -1) { if (mftb() & 0x1) hpte_group = ((hash & htab_hash_mask) * @@ -548,45 +674,54 @@ void set_huge_psize(int psize) { /* Check that it is a page size supported by the hardware and * that it fits within pagetable limits. */ - if (mmu_psize_defs[psize].shift && mmu_psize_defs[psize].shift < SID_SHIFT && + if (mmu_psize_defs[psize].shift && + mmu_psize_defs[psize].shift < SID_SHIFT_1T && (mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT || - mmu_psize_defs[psize].shift == HPAGE_SHIFT_64K)) { - HPAGE_SHIFT = mmu_psize_defs[psize].shift; - mmu_huge_psize = psize; -#ifdef CONFIG_PPC_64K_PAGES - hugepte_shift = (PMD_SHIFT-HPAGE_SHIFT); -#else - if (HPAGE_SHIFT == HPAGE_SHIFT_64K) - hugepte_shift = (PMD_SHIFT-HPAGE_SHIFT); - else - hugepte_shift = (PUD_SHIFT-HPAGE_SHIFT); -#endif - + mmu_psize_defs[psize].shift == PAGE_SHIFT_64K || + mmu_psize_defs[psize].shift == PAGE_SHIFT_16G)) { + /* Return if huge page size has already been setup or is the + * same as the base page size. */ + if (mmu_huge_psizes[psize] || + mmu_psize_defs[psize].shift == PAGE_SHIFT) + return; + hugetlb_add_hstate(mmu_psize_defs[psize].shift - PAGE_SHIFT); + + switch (mmu_psize_defs[psize].shift) { + case PAGE_SHIFT_64K: + /* We only allow 64k hpages with 4k base page, + * which was checked above, and always put them + * at the PMD */ + hugepte_shift[psize] = PMD_SHIFT; + break; + case PAGE_SHIFT_16M: + /* 16M pages can be at two different levels + * of pagestables based on base page size */ + if (PAGE_SHIFT == PAGE_SHIFT_64K) + hugepte_shift[psize] = PMD_SHIFT; + else /* 4k base page */ + hugepte_shift[psize] = PUD_SHIFT; + break; + case PAGE_SHIFT_16G: + /* 16G pages are always at PGD level */ + hugepte_shift[psize] = PGDIR_SHIFT; + break; + } + hugepte_shift[psize] -= mmu_psize_defs[psize].shift; } else - HPAGE_SHIFT = 0; + hugepte_shift[psize] = 0; } static int __init hugepage_setup_sz(char *str) { unsigned long long size; - int mmu_psize = -1; + int mmu_psize; int shift; size = memparse(str, &str); shift = __ffs(size); - switch (shift) { -#ifndef CONFIG_PPC_64K_PAGES - case HPAGE_SHIFT_64K: - mmu_psize = MMU_PAGE_64K; - break; -#endif - case HPAGE_SHIFT_16M: - mmu_psize = MMU_PAGE_16M; - break; - } - - if (mmu_psize >=0 && mmu_psize_defs[mmu_psize].shift) + mmu_psize = shift_to_mmu_psize(shift); + if (mmu_psize >= 0 && mmu_psize_defs[mmu_psize].shift) set_huge_psize(mmu_psize); else printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size); @@ -595,23 +730,40 @@ static int __init hugepage_setup_sz(char *str) } __setup("hugepagesz=", hugepage_setup_sz); -static void zero_ctor(struct kmem_cache *cache, void *addr) -{ - memset(addr, 0, kmem_cache_size(cache)); -} - static int __init hugetlbpage_init(void) { + unsigned int psize; + if (!cpu_has_feature(CPU_FTR_16M_PAGE)) return -ENODEV; - huge_pgtable_cache = kmem_cache_create("hugepte_cache", - HUGEPTE_TABLE_SIZE, - HUGEPTE_TABLE_SIZE, - 0, - zero_ctor); - if (! huge_pgtable_cache) - panic("hugetlbpage_init(): could not create hugepte cache\n"); + /* Add supported huge page sizes. Need to change HUGE_MAX_HSTATE + * and adjust PTE_NONCACHE_NUM if the number of supported huge page + * sizes changes. + */ + set_huge_psize(MMU_PAGE_16M); + set_huge_psize(MMU_PAGE_16G); + + /* Temporarily disable support for 64K huge pages when 64K SPU local + * store support is enabled as the current implementation conflicts. + */ +#ifndef CONFIG_SPU_FS_64K_LS + set_huge_psize(MMU_PAGE_64K); +#endif + + for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) { + if (mmu_huge_psizes[psize]) { + huge_pgtable_cache(psize) = kmem_cache_create( + HUGEPTE_CACHE_NAME(psize), + HUGEPTE_TABLE_SIZE(psize), + HUGEPTE_TABLE_SIZE(psize), + 0, + NULL); + if (!huge_pgtable_cache(psize)) + panic("hugetlbpage_init(): could not create %s"\ + "\n", HUGEPTE_CACHE_NAME(psize)); + } + } return 0; } diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 1952b4d3fa7f562eeec7d272205e4393870ab4c5..388ceda632f346fa5314c4254512807b414802b3 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c @@ -43,6 +43,7 @@ #include #include #include +#include #include "mmu_decl.h" @@ -56,8 +57,8 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); -unsigned long total_memory; -unsigned long total_lowmem; +phys_addr_t total_memory; +phys_addr_t total_lowmem; phys_addr_t memstart_addr = (phys_addr_t)~0ull; EXPORT_SYMBOL(memstart_addr); @@ -76,8 +77,6 @@ void MMU_init(void); /* XXX should be in current.h -- paulus */ extern struct task_struct *current_set[NR_CPUS]; -extern int init_bootmem_done; - /* * this tells the system to map all of ram with the segregs * (i.e. page tables) instead of the bats. diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c index 6aa65375abf5919ce2b02c0efe309dd8d39c893c..4f7df85129d837202df55df241aaa9223a3a9d72 100644 --- a/arch/powerpc/mm/init_64.c +++ b/arch/powerpc/mm/init_64.c @@ -136,9 +136,14 @@ static int __init setup_kcore(void) module_init(setup_kcore); #endif -static void zero_ctor(struct kmem_cache *cache, void *addr) +static void pgd_ctor(void *addr) { - memset(addr, 0, kmem_cache_size(cache)); + memset(addr, 0, PGD_TABLE_SIZE); +} + +static void pmd_ctor(void *addr) +{ + memset(addr, 0, PMD_TABLE_SIZE); } static const unsigned int pgtable_cache_size[2] = { @@ -153,29 +158,18 @@ static const char *pgtable_cache_name[ARRAY_SIZE(pgtable_cache_size)] = { }; #ifdef CONFIG_HUGETLB_PAGE -/* Hugepages need one extra cache, initialized in hugetlbpage.c. We - * can't put into the tables above, because HPAGE_SHIFT is not compile - * time constant. */ -struct kmem_cache *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)+1]; +/* Hugepages need an extra cache per hugepagesize, initialized in + * hugetlbpage.c. We can't put into the tables above, because HPAGE_SHIFT + * is not compile time constant. */ +struct kmem_cache *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)+MMU_PAGE_COUNT]; #else struct kmem_cache *pgtable_cache[ARRAY_SIZE(pgtable_cache_size)]; #endif void pgtable_cache_init(void) { - int i; - - for (i = 0; i < ARRAY_SIZE(pgtable_cache_size); i++) { - int size = pgtable_cache_size[i]; - const char *name = pgtable_cache_name[i]; - - pr_debug("Allocating page table cache %s (#%d) " - "for size: %08x...\n", name, i, size); - pgtable_cache[i] = kmem_cache_create(name, - size, size, - SLAB_PANIC, - zero_ctor); - } + pgtable_cache[0] = kmem_cache_create(pgtable_cache_name[0], PGD_TABLE_SIZE, PGD_TABLE_SIZE, SLAB_PANIC, pgd_ctor); + pgtable_cache[1] = kmem_cache_create(pgtable_cache_name[1], PMD_TABLE_SIZE, PMD_TABLE_SIZE, SLAB_PANIC, pmd_ctor); } #ifdef CONFIG_SPARSEMEM_VMEMMAP @@ -185,7 +179,7 @@ void pgtable_cache_init(void) * do this by hand as the proffered address may not be correctly aligned. * Subtraction of non-aligned pointers produces undefined results. */ -unsigned long __meminit vmemmap_section_start(unsigned long page) +static unsigned long __meminit vmemmap_section_start(unsigned long page) { unsigned long offset = page - ((unsigned long)(vmemmap)); @@ -198,7 +192,7 @@ unsigned long __meminit vmemmap_section_start(unsigned long page) * which overlaps this vmemmap page is initialised then this page is * initialised already. */ -int __meminit vmemmap_populated(unsigned long start, int page_size) +static int __meminit vmemmap_populated(unsigned long start, int page_size) { unsigned long end = start + page_size; diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 51f82d83bf140b1099df6b42ee148aae6ef87951..702691cb9e82361bd5de91cc8c0445411aea6c37 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -44,6 +44,7 @@ #include #include #include +#include #include #include @@ -185,45 +186,6 @@ walk_memory_resource(unsigned long start_pfn, unsigned long nr_pages, void *arg, } EXPORT_SYMBOL_GPL(walk_memory_resource); -void show_mem(void) -{ - unsigned long total = 0, reserved = 0; - unsigned long shared = 0, cached = 0; - unsigned long highmem = 0; - struct page *page; - pg_data_t *pgdat; - unsigned long i; - - printk("Mem-info:\n"); - show_free_areas(); - for_each_online_pgdat(pgdat) { - unsigned long flags; - pgdat_resize_lock(pgdat, &flags); - for (i = 0; i < pgdat->node_spanned_pages; i++) { - if (!pfn_valid(pgdat->node_start_pfn + i)) - continue; - page = pgdat_page_nr(pgdat, i); - total++; - if (PageHighMem(page)) - highmem++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (page_count(page)) - shared += page_count(page) - 1; - } - pgdat_resize_unlock(pgdat, &flags); - } - printk("%ld pages of RAM\n", total); -#ifdef CONFIG_HIGHMEM - printk("%ld pages of HIGHMEM\n", highmem); -#endif - printk("%ld reserved pages\n", reserved); - printk("%ld pages shared\n", shared); - printk("%ld pages swap cached\n", cached); -} - /* * Initialize the bootmem system and give it all the memory we * have available. If we are using highmem, we only put the @@ -329,7 +291,7 @@ static int __init mark_nonram_nosave(void) void __init paging_init(void) { unsigned long total_ram = lmb_phys_mem_size(); - unsigned long top_of_ram = lmb_end_of_DRAM(); + phys_addr_t top_of_ram = lmb_end_of_DRAM(); unsigned long max_zone_pfns[MAX_NR_ZONES]; #ifdef CONFIG_PPC32 @@ -348,10 +310,10 @@ void __init paging_init(void) kmap_prot = PAGE_KERNEL; #endif /* CONFIG_HIGHMEM */ - printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n", - top_of_ram, total_ram); + printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n", + (u64)top_of_ram, total_ram); printk(KERN_DEBUG "Memory hole size: %ldMB\n", - (top_of_ram - total_ram) >> 20); + (long int)((top_of_ram - total_ram) >> 20)); memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); #ifdef CONFIG_HIGHMEM max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT; diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h index 04802252a64fceec63820c6d7bd581f7ba430e83..fab3cfad40992d45dcae4113b862497dfea42632 100644 --- a/arch/powerpc/mm/mmu_decl.h +++ b/arch/powerpc/mm/mmu_decl.h @@ -29,7 +29,7 @@ extern void hash_preload(struct mm_struct *mm, unsigned long ea, #ifdef CONFIG_PPC32 extern void mapin_ram(void); extern int map_page(unsigned long va, phys_addr_t pa, int flags); -extern void setbat(int index, unsigned long virt, unsigned long phys, +extern void setbat(int index, unsigned long virt, phys_addr_t phys, unsigned int size, int flags); extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, unsigned int size, int flags, unsigned int pid); @@ -49,8 +49,8 @@ extern unsigned int num_tlbcam_entries; extern unsigned long ioremap_bot; extern unsigned long __max_low_memory; extern phys_addr_t __initial_memory_limit_addr; -extern unsigned long total_memory; -extern unsigned long total_lowmem; +extern phys_addr_t total_memory; +extern phys_addr_t total_lowmem; extern phys_addr_t memstart_addr; extern phys_addr_t lowmem_end_addr; diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index dc704da363eb77897d392781591bf87ac337a8dd..d9a1813513322889af782dd71625f46db3bab1c4 100644 --- a/arch/powerpc/mm/numa.c +++ b/arch/powerpc/mm/numa.c @@ -39,7 +39,6 @@ EXPORT_SYMBOL(numa_cpu_lookup_table); EXPORT_SYMBOL(numa_cpumask_lookup_table); EXPORT_SYMBOL(node_data); -static bootmem_data_t __initdata plat_node_bdata[MAX_NUMNODES]; static int min_common_depth; static int n_mem_addr_cells, n_mem_size_cells; @@ -268,6 +267,144 @@ static unsigned long __devinit read_n_cells(int n, const unsigned int **buf) return result; } +struct of_drconf_cell { + u64 base_addr; + u32 drc_index; + u32 reserved; + u32 aa_index; + u32 flags; +}; + +#define DRCONF_MEM_ASSIGNED 0x00000008 +#define DRCONF_MEM_AI_INVALID 0x00000040 +#define DRCONF_MEM_RESERVED 0x00000080 + +/* + * Read the next lmb list entry from the ibm,dynamic-memory property + * and return the information in the provided of_drconf_cell structure. + */ +static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp) +{ + const u32 *cp; + + drmem->base_addr = read_n_cells(n_mem_addr_cells, cellp); + + cp = *cellp; + drmem->drc_index = cp[0]; + drmem->reserved = cp[1]; + drmem->aa_index = cp[2]; + drmem->flags = cp[3]; + + *cellp = cp + 4; +} + +/* + * Retreive and validate the ibm,dynamic-memory property of the device tree. + * + * The layout of the ibm,dynamic-memory property is a number N of lmb + * list entries followed by N lmb list entries. Each lmb list entry + * contains information as layed out in the of_drconf_cell struct above. + */ +static int of_get_drconf_memory(struct device_node *memory, const u32 **dm) +{ + const u32 *prop; + u32 len, entries; + + prop = of_get_property(memory, "ibm,dynamic-memory", &len); + if (!prop || len < sizeof(unsigned int)) + return 0; + + entries = *prop++; + + /* Now that we know the number of entries, revalidate the size + * of the property read in to ensure we have everything + */ + if (len < (entries * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int)) + return 0; + + *dm = prop; + return entries; +} + +/* + * Retreive and validate the ibm,lmb-size property for drconf memory + * from the device tree. + */ +static u64 of_get_lmb_size(struct device_node *memory) +{ + const u32 *prop; + u32 len; + + prop = of_get_property(memory, "ibm,lmb-size", &len); + if (!prop || len < sizeof(unsigned int)) + return 0; + + return read_n_cells(n_mem_size_cells, &prop); +} + +struct assoc_arrays { + u32 n_arrays; + u32 array_sz; + const u32 *arrays; +}; + +/* + * Retreive and validate the list of associativity arrays for drconf + * memory from the ibm,associativity-lookup-arrays property of the + * device tree.. + * + * The layout of the ibm,associativity-lookup-arrays property is a number N + * indicating the number of associativity arrays, followed by a number M + * indicating the size of each associativity array, followed by a list + * of N associativity arrays. + */ +static int of_get_assoc_arrays(struct device_node *memory, + struct assoc_arrays *aa) +{ + const u32 *prop; + u32 len; + + prop = of_get_property(memory, "ibm,associativity-lookup-arrays", &len); + if (!prop || len < 2 * sizeof(unsigned int)) + return -1; + + aa->n_arrays = *prop++; + aa->array_sz = *prop++; + + /* Now that we know the number of arrrays and size of each array, + * revalidate the size of the property read in. + */ + if (len < (aa->n_arrays * aa->array_sz + 2) * sizeof(unsigned int)) + return -1; + + aa->arrays = prop; + return 0; +} + +/* + * This is like of_node_to_nid_single() for memory represented in the + * ibm,dynamic-reconfiguration-memory node. + */ +static int of_drconf_to_nid_single(struct of_drconf_cell *drmem, + struct assoc_arrays *aa) +{ + int default_nid = 0; + int nid = default_nid; + int index; + + if (min_common_depth > 0 && min_common_depth <= aa->array_sz && + !(drmem->flags & DRCONF_MEM_AI_INVALID) && + drmem->aa_index < aa->n_arrays) { + index = drmem->aa_index * aa->array_sz + min_common_depth - 1; + nid = aa->arrays[index]; + + if (nid == 0xffff || nid >= MAX_NUMNODES) + nid = default_nid; + } + + return nid; +} + /* * Figure out to which domain a cpu belongs and stick it there. * Return the id of the domain used. @@ -355,57 +492,50 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start, */ static void __init parse_drconf_memory(struct device_node *memory) { - const unsigned int *lm, *dm, *aa; - unsigned int ls, ld, la; - unsigned int n, aam, aalen; - unsigned long lmb_size, size, start; - int nid, default_nid = 0; - unsigned int ai, flags; - - lm = of_get_property(memory, "ibm,lmb-size", &ls); - dm = of_get_property(memory, "ibm,dynamic-memory", &ld); - aa = of_get_property(memory, "ibm,associativity-lookup-arrays", &la); - if (!lm || !dm || !aa || - ls < sizeof(unsigned int) || ld < sizeof(unsigned int) || - la < 2 * sizeof(unsigned int)) + const u32 *dm; + unsigned int n, rc; + unsigned long lmb_size, size; + int nid; + struct assoc_arrays aa; + + n = of_get_drconf_memory(memory, &dm); + if (!n) + return; + + lmb_size = of_get_lmb_size(memory); + if (!lmb_size) return; - lmb_size = read_n_cells(n_mem_size_cells, &lm); - n = *dm++; /* number of LMBs */ - aam = *aa++; /* number of associativity lists */ - aalen = *aa++; /* length of each associativity list */ - if (ld < (n * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int) || - la < (aam * aalen + 2) * sizeof(unsigned int)) + rc = of_get_assoc_arrays(memory, &aa); + if (rc) return; for (; n != 0; --n) { - start = read_n_cells(n_mem_addr_cells, &dm); - ai = dm[2]; - flags = dm[3]; - dm += 4; - /* 0x80 == reserved, 0x8 = assigned to us */ - if ((flags & 0x80) || !(flags & 0x8)) + struct of_drconf_cell drmem; + + read_drconf_cell(&drmem, &dm); + + /* skip this block if the reserved bit is set in flags (0x80) + or if the block is not assigned to this partition (0x8) */ + if ((drmem.flags & DRCONF_MEM_RESERVED) + || !(drmem.flags & DRCONF_MEM_ASSIGNED)) continue; - nid = default_nid; - /* flags & 0x40 means associativity index is invalid */ - if (min_common_depth > 0 && min_common_depth <= aalen && - (flags & 0x40) == 0 && ai < aam) { - /* this is like of_node_to_nid_single */ - nid = aa[ai * aalen + min_common_depth - 1]; - if (nid == 0xffff || nid >= MAX_NUMNODES) - nid = default_nid; - } - fake_numa_create_new_node(((start + lmb_size) >> PAGE_SHIFT), - &nid); + nid = of_drconf_to_nid_single(&drmem, &aa); + + fake_numa_create_new_node( + ((drmem.base_addr + lmb_size) >> PAGE_SHIFT), + &nid); + node_set_online(nid); - size = numa_enforce_memory_limit(start, lmb_size); + size = numa_enforce_memory_limit(drmem.base_addr, lmb_size); if (!size) continue; - add_active_range(nid, start >> PAGE_SHIFT, - (start >> PAGE_SHIFT) + (size >> PAGE_SHIFT)); + add_active_range(nid, drmem.base_addr >> PAGE_SHIFT, + (drmem.base_addr >> PAGE_SHIFT) + + (size >> PAGE_SHIFT)); } } @@ -685,7 +815,7 @@ void __init do_init_bootmem(void) dbg("node %d\n", nid); dbg("NODE_DATA() = %p\n", NODE_DATA(nid)); - NODE_DATA(nid)->bdata = &plat_node_bdata[nid]; + NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; NODE_DATA(nid)->node_start_pfn = start_pfn; NODE_DATA(nid)->node_spanned_pages = end_pfn - start_pfn; @@ -769,6 +899,79 @@ static int __init early_numa(char *p) early_param("numa", early_numa); #ifdef CONFIG_MEMORY_HOTPLUG +/* + * Validate the node associated with the memory section we are + * trying to add. + */ +int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size, + unsigned long scn_addr) +{ + nodemask_t nodes; + + if (*nid < 0 || !node_online(*nid)) + *nid = any_online_node(NODE_MASK_ALL); + + if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) { + nodes_setall(nodes); + while (NODE_DATA(*nid)->node_spanned_pages == 0) { + node_clear(*nid, nodes); + *nid = any_online_node(nodes); + } + + return 1; + } + + return 0; +} + +/* + * Find the node associated with a hot added memory section represented + * by the ibm,dynamic-reconfiguration-memory node. + */ +static int hot_add_drconf_scn_to_nid(struct device_node *memory, + unsigned long scn_addr) +{ + const u32 *dm; + unsigned int n, rc; + unsigned long lmb_size; + int default_nid = any_online_node(NODE_MASK_ALL); + int nid; + struct assoc_arrays aa; + + n = of_get_drconf_memory(memory, &dm); + if (!n) + return default_nid;; + + lmb_size = of_get_lmb_size(memory); + if (!lmb_size) + return default_nid; + + rc = of_get_assoc_arrays(memory, &aa); + if (rc) + return default_nid; + + for (; n != 0; --n) { + struct of_drconf_cell drmem; + + read_drconf_cell(&drmem, &dm); + + /* skip this block if it is reserved or not assigned to + * this partition */ + if ((drmem.flags & DRCONF_MEM_RESERVED) + || !(drmem.flags & DRCONF_MEM_ASSIGNED)) + continue; + + nid = of_drconf_to_nid_single(&drmem, &aa); + + if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size, + scn_addr)) + return nid; + } + + BUG(); /* section address should be found above */ + return 0; +} + /* * Find the node associated with a hot added memory section. Section * corresponds to a SPARSEMEM section, not an LMB. It is assumed that @@ -777,12 +980,17 @@ early_param("numa", early_numa); int hot_add_scn_to_nid(unsigned long scn_addr) { struct device_node *memory = NULL; - nodemask_t nodes; - int default_nid = any_online_node(NODE_MASK_ALL); int nid; if (!numa_enabled || (min_common_depth < 0)) - return default_nid; + return any_online_node(NODE_MASK_ALL); + + memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory"); + if (memory) { + nid = hot_add_drconf_scn_to_nid(memory, scn_addr); + of_node_put(memory); + return nid; + } while ((memory = of_find_node_by_type(memory, "memory")) != NULL) { unsigned long start, size; @@ -801,13 +1009,9 @@ ha_new_range: size = read_n_cells(n_mem_size_cells, &memcell_buf); nid = of_node_to_nid_single(memory); - /* Domains not present at boot default to 0 */ - if (nid < 0 || !node_online(nid)) - nid = default_nid; - - if ((scn_addr >= start) && (scn_addr < (start + size))) { + if (valid_hot_add_scn(&nid, start, size, scn_addr)) { of_node_put(memory); - goto got_nid; + return nid; } if (--ranges) /* process all ranges in cell */ @@ -815,14 +1019,5 @@ ha_new_range: } BUG(); /* section address should be found above */ return 0; - - /* Temporary code to ensure that returned node is not empty */ -got_nid: - nodes_setall(nodes); - while (NODE_DATA(nid)->node_spanned_pages == 0) { - node_clear(nid, nodes); - nid = any_online_node(nodes); - } - return nid; } #endif /* CONFIG_MEMORY_HOTPLUG */ diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index e0ff59f21135f53e4cb45a0ff4471bc5d3e289f0..2001abdb1912bec23dfa6635010359edddf4423b 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c @@ -53,9 +53,9 @@ extern void hash_page_sync(void); #endif #ifdef HAVE_BATS -extern unsigned long v_mapped_by_bats(unsigned long va); -extern unsigned long p_mapped_by_bats(unsigned long pa); -void setbat(int index, unsigned long virt, unsigned long phys, +extern phys_addr_t v_mapped_by_bats(unsigned long va); +extern unsigned long p_mapped_by_bats(phys_addr_t pa); +void setbat(int index, unsigned long virt, phys_addr_t phys, unsigned int size, int flags); #else /* !HAVE_BATS */ @@ -145,13 +145,20 @@ void pte_free(struct mm_struct *mm, pgtable_t ptepage) void __iomem * ioremap(phys_addr_t addr, unsigned long size) { - return __ioremap(addr, size, _PAGE_NO_CACHE); + return __ioremap(addr, size, _PAGE_NO_CACHE | _PAGE_GUARDED); } EXPORT_SYMBOL(ioremap); void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags) { + /* writeable implies dirty for kernel addresses */ + if (flags & _PAGE_RW) + flags |= _PAGE_DIRTY | _PAGE_HWWRITE; + + /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */ + flags &= ~(_PAGE_USER | _PAGE_EXEC | _PAGE_HWEXEC); + return __ioremap(addr, size, flags); } EXPORT_SYMBOL(ioremap_flags); @@ -163,6 +170,14 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) phys_addr_t p; int err; + /* Make sure we have the base flags */ + if ((flags & _PAGE_PRESENT) == 0) + flags |= _PAGE_KERNEL; + + /* Non-cacheable page cannot be coherent */ + if (flags & _PAGE_NO_CACHE) + flags &= ~_PAGE_COHERENT; + /* * Choose an address to map it to. * Once the vmalloc system is running, we use it. @@ -219,11 +234,6 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) v = (ioremap_bot -= size); } - if ((flags & _PAGE_PRESENT) == 0) - flags |= _PAGE_KERNEL; - if (flags & _PAGE_NO_CACHE) - flags |= _PAGE_GUARDED; - /* * Should check if it is a candidate for a BAT mapping */ diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index 3ef0ad2f9ca0a6f1e1edb15effa10b3c7a558ec6..365e61ae5dbcf54f7f4789d2cfed5bb7072201e3 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c @@ -107,9 +107,18 @@ void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size, { unsigned long i; + /* Make sure we have the base flags */ if ((flags & _PAGE_PRESENT) == 0) flags |= pgprot_val(PAGE_KERNEL); + /* Non-cacheable page cannot be coherent */ + if (flags & _PAGE_NO_CACHE) + flags &= ~_PAGE_COHERENT; + + /* We don't support the 4K PFN hack with ioremap */ + if (flags & _PAGE_4K_PFN) + return NULL; + WARN_ON(pa & ~PAGE_MASK); WARN_ON(((unsigned long)ea) & ~PAGE_MASK); WARN_ON(size & ~PAGE_MASK); @@ -190,6 +199,13 @@ void __iomem * ioremap(phys_addr_t addr, unsigned long size) void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags) { + /* writeable implies dirty for kernel addresses */ + if (flags & _PAGE_RW) + flags |= _PAGE_DIRTY; + + /* we don't want to let _PAGE_USER and _PAGE_EXEC leak out */ + flags &= ~(_PAGE_USER | _PAGE_EXEC); + if (ppc_md.ioremap) return ppc_md.ioremap(addr, size, flags); return __ioremap(addr, size, flags); diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c index cef9f156874befc8716003c046edb4c9c53c7334..c53145f619427e6bf3ba20605de27f8a32a027c9 100644 --- a/arch/powerpc/mm/ppc_mmu_32.c +++ b/arch/powerpc/mm/ppc_mmu_32.c @@ -38,21 +38,18 @@ struct hash_pte *Hash, *Hash_end; unsigned long Hash_size, Hash_mask; unsigned long _SDR1; -union ubat { /* BAT register values to be loaded */ - struct ppc_bat bat; - u32 word[2]; -} BATS[8][2]; /* 8 pairs of IBAT, DBAT */ +struct ppc_bat BATS[8][2]; /* 8 pairs of IBAT, DBAT */ struct batrange { /* stores address ranges mapped by BATs */ unsigned long start; unsigned long limit; - unsigned long phys; + phys_addr_t phys; } bat_addrs[8]; /* * Return PA for this VA if it is mapped by a BAT, or 0 */ -unsigned long v_mapped_by_bats(unsigned long va) +phys_addr_t v_mapped_by_bats(unsigned long va) { int b; for (b = 0; b < 4; ++b) @@ -64,7 +61,7 @@ unsigned long v_mapped_by_bats(unsigned long va) /* * Return VA for a given PA or 0 if not mapped */ -unsigned long p_mapped_by_bats(unsigned long pa) +unsigned long p_mapped_by_bats(phys_addr_t pa) { int b; for (b = 0; b < 4; ++b) @@ -119,12 +116,12 @@ unsigned long __init mmu_mapin_ram(void) * The parameters are not checked; in particular size must be a power * of 2 between 128k and 256M. */ -void __init setbat(int index, unsigned long virt, unsigned long phys, +void __init setbat(int index, unsigned long virt, phys_addr_t phys, unsigned int size, int flags) { unsigned int bl; int wimgxpp; - union ubat *bat = BATS[index]; + struct ppc_bat *bat = BATS[index]; if (((flags & _PAGE_NO_CACHE) == 0) && cpu_has_feature(CPU_FTR_NEED_COHERENT)) @@ -137,15 +134,15 @@ void __init setbat(int index, unsigned long virt, unsigned long phys, wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT | _PAGE_GUARDED); wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; - bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ - bat[1].word[1] = phys | wimgxpp; + bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ + bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp; #ifndef CONFIG_KGDB /* want user access for breakpoints */ if (flags & _PAGE_USER) #endif - bat[1].bat.batu.vp = 1; + bat[1].batu |= 1; /* Vp = 1 */ if (flags & _PAGE_GUARDED) { /* G bit must be zero in IBATs */ - bat[0].word[0] = bat[0].word[1] = 0; + bat[0].batu = bat[0].batl = 0; } else { /* make IBAT same as DBAT */ bat[0] = bat[1]; @@ -158,8 +155,8 @@ void __init setbat(int index, unsigned long virt, unsigned long phys, | _PAGE_COHERENT); wimgxpp |= (flags & _PAGE_RW)? ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX; - bat->word[0] = virt | wimgxpp | 4; /* Ks=0, Ku=1 */ - bat->word[1] = phys | bl | 0x40; /* V=1 */ + bat->batu = virt | wimgxpp | 4; /* Ks=0, Ku=1 */ + bat->batl = phys | bl | 0x40; /* V=1 */ } bat_addrs[index].start = virt; diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c index ad928edafb0aae614f1f7f121c5a2fb18fba7941..db44e02e045b2b7a058844ac5dfdfacfdbb4fd01 100644 --- a/arch/powerpc/mm/slice.c +++ b/arch/powerpc/mm/slice.c @@ -215,10 +215,7 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz mm->context.high_slices_psize); spin_unlock_irqrestore(&slice_convert_lock, flags); - mb(); - /* XXX this is sub-optimal but will do for now */ - on_each_cpu(slice_flush_segments, mm, 0, 1); #ifdef CONFIG_SPU_BASE spu_flush_all_slbs(mm); #endif @@ -384,17 +381,34 @@ static unsigned long slice_find_area(struct mm_struct *mm, unsigned long len, return slice_find_area_bottomup(mm, len, mask, psize, use_cache); } +#define or_mask(dst, src) do { \ + (dst).low_slices |= (src).low_slices; \ + (dst).high_slices |= (src).high_slices; \ +} while (0) + +#define andnot_mask(dst, src) do { \ + (dst).low_slices &= ~(src).low_slices; \ + (dst).high_slices &= ~(src).high_slices; \ +} while (0) + +#ifdef CONFIG_PPC_64K_PAGES +#define MMU_PAGE_BASE MMU_PAGE_64K +#else +#define MMU_PAGE_BASE MMU_PAGE_4K +#endif + unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, unsigned long flags, unsigned int psize, int topdown, int use_cache) { - struct slice_mask mask; + struct slice_mask mask = {0, 0}; struct slice_mask good_mask; struct slice_mask potential_mask = {0,0} /* silence stupid warning */; - int pmask_set = 0; + struct slice_mask compat_mask = {0, 0}; int fixed = (flags & MAP_FIXED); int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); struct mm_struct *mm = current->mm; + unsigned long newaddr; /* Sanity checks */ BUG_ON(mm->task_size == 0); @@ -416,21 +430,48 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, if (!fixed && addr) { addr = _ALIGN_UP(addr, 1ul << pshift); slice_dbg(" aligned addr=%lx\n", addr); + /* Ignore hint if it's too large or overlaps a VMA */ + if (addr > mm->task_size - len || + !slice_area_is_free(mm, addr, len)) + addr = 0; } - /* First makeup a "good" mask of slices that have the right size + /* First make up a "good" mask of slices that have the right size * already */ good_mask = slice_mask_for_size(mm, psize); slice_print_mask(" good_mask", good_mask); - /* First check hint if it's valid or if we have MAP_FIXED */ - if ((addr != 0 || fixed) && (mm->task_size - len) >= addr) { + /* + * Here "good" means slices that are already the right page size, + * "compat" means slices that have a compatible page size (i.e. + * 4k in a 64k pagesize kernel), and "free" means slices without + * any VMAs. + * + * If MAP_FIXED: + * check if fits in good | compat => OK + * check if fits in good | compat | free => convert free + * else bad + * If have hint: + * check if hint fits in good => OK + * check if hint fits in good | free => convert free + * Otherwise: + * search in good, found => OK + * search in good | free, found => convert free + * search in good | compat | free, found => convert free. + */ - /* Don't bother with hint if it overlaps a VMA */ - if (!fixed && !slice_area_is_free(mm, addr, len)) - goto search; +#ifdef CONFIG_PPC_64K_PAGES + /* If we support combo pages, we can allow 64k pages in 4k slices */ + if (psize == MMU_PAGE_64K) { + compat_mask = slice_mask_for_size(mm, MMU_PAGE_4K); + if (fixed) + or_mask(good_mask, compat_mask); + } +#endif + /* First check hint if it's valid or if we have MAP_FIXED */ + if (addr != 0 || fixed) { /* Build a mask for the requested range */ mask = slice_range_to_mask(addr, len); slice_print_mask(" mask", mask); @@ -442,54 +483,66 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, slice_dbg(" fits good !\n"); return addr; } - - /* We don't fit in the good mask, check what other slices are - * empty and thus can be converted + } else { + /* Now let's see if we can find something in the existing + * slices for that size */ - potential_mask = slice_mask_for_free(mm); - potential_mask.low_slices |= good_mask.low_slices; - potential_mask.high_slices |= good_mask.high_slices; - pmask_set = 1; - slice_print_mask(" potential", potential_mask); - if (slice_check_fit(mask, potential_mask)) { - slice_dbg(" fits potential !\n"); - goto convert; + newaddr = slice_find_area(mm, len, good_mask, psize, topdown, + use_cache); + if (newaddr != -ENOMEM) { + /* Found within the good mask, we don't have to setup, + * we thus return directly + */ + slice_dbg(" found area at 0x%lx\n", newaddr); + return newaddr; } } - /* If we have MAP_FIXED and failed the above step, then error out */ + /* We don't fit in the good mask, check what other slices are + * empty and thus can be converted + */ + potential_mask = slice_mask_for_free(mm); + or_mask(potential_mask, good_mask); + slice_print_mask(" potential", potential_mask); + + if ((addr != 0 || fixed) && slice_check_fit(mask, potential_mask)) { + slice_dbg(" fits potential !\n"); + goto convert; + } + + /* If we have MAP_FIXED and failed the above steps, then error out */ if (fixed) return -EBUSY; - search: slice_dbg(" search...\n"); - /* Now let's see if we can find something in the existing slices - * for that size + /* If we had a hint that didn't work out, see if we can fit + * anywhere in the good area. */ - addr = slice_find_area(mm, len, good_mask, psize, topdown, use_cache); - if (addr != -ENOMEM) { - /* Found within the good mask, we don't have to setup, - * we thus return directly - */ - slice_dbg(" found area at 0x%lx\n", addr); - return addr; - } - - /* Won't fit, check what can be converted */ - if (!pmask_set) { - potential_mask = slice_mask_for_free(mm); - potential_mask.low_slices |= good_mask.low_slices; - potential_mask.high_slices |= good_mask.high_slices; - pmask_set = 1; - slice_print_mask(" potential", potential_mask); + if (addr) { + addr = slice_find_area(mm, len, good_mask, psize, topdown, + use_cache); + if (addr != -ENOMEM) { + slice_dbg(" found area at 0x%lx\n", addr); + return addr; + } } /* Now let's see if we can find something in the existing slices - * for that size + * for that size plus free slices */ addr = slice_find_area(mm, len, potential_mask, psize, topdown, use_cache); + +#ifdef CONFIG_PPC_64K_PAGES + if (addr == -ENOMEM && psize == MMU_PAGE_64K) { + /* retry the search with 4k-page slices included */ + or_mask(potential_mask, compat_mask); + addr = slice_find_area(mm, len, potential_mask, psize, + topdown, use_cache); + } +#endif + if (addr == -ENOMEM) return -ENOMEM; @@ -498,7 +551,13 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, slice_print_mask(" mask", mask); convert: - slice_convert(mm, mask, psize); + andnot_mask(mask, good_mask); + andnot_mask(mask, compat_mask); + if (mask.low_slices || mask.high_slices) { + slice_convert(mm, mask, psize); + if (psize > MMU_PAGE_BASE) + on_each_cpu(slice_flush_segments, mm, 1); + } return addr; } @@ -598,6 +657,36 @@ void slice_set_user_psize(struct mm_struct *mm, unsigned int psize) spin_unlock_irqrestore(&slice_convert_lock, flags); } +void slice_set_psize(struct mm_struct *mm, unsigned long address, + unsigned int psize) +{ + unsigned long i, flags; + u64 *p; + + spin_lock_irqsave(&slice_convert_lock, flags); + if (address < SLICE_LOW_TOP) { + i = GET_LOW_SLICE_INDEX(address); + p = &mm->context.low_slices_psize; + } else { + i = GET_HIGH_SLICE_INDEX(address); + p = &mm->context.high_slices_psize; + } + *p = (*p & ~(0xful << (i * 4))) | ((unsigned long) psize << (i * 4)); + spin_unlock_irqrestore(&slice_convert_lock, flags); + +#ifdef CONFIG_SPU_BASE + spu_flush_all_slbs(mm); +#endif +} + +void slice_set_range_psize(struct mm_struct *mm, unsigned long start, + unsigned long len, unsigned int psize) +{ + struct slice_mask mask = slice_range_to_mask(start, len); + + slice_convert(mm, mask, psize); +} + /* * is_hugepage_only_range() is used by generic code to verify wether * a normal mmap mapping (non hugetlbfs) is valid on a given area. diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c index efbbd13d93e519bcfd30ebb5da48f0f87b2672f0..60e6032a8088eb8197eab6c0505ec18bb5cd4e20 100644 --- a/arch/powerpc/mm/stab.c +++ b/arch/powerpc/mm/stab.c @@ -30,8 +30,8 @@ struct stab_entry { }; #define NR_STAB_CACHE_ENTRIES 8 -DEFINE_PER_CPU(long, stab_cache_ptr); -DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); +static DEFINE_PER_CPU(long, stab_cache_ptr); +static DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); /* * Create a segment table entry for the given esid/vsid pair. diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c index e2d867ce1c7eb46fb259993ebf8f99c0a177bca9..409fcc7b63ce410872a2e6a58ca1f95f41bdf9e2 100644 --- a/arch/powerpc/mm/tlb_64.c +++ b/arch/powerpc/mm/tlb_64.c @@ -37,8 +37,8 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); * include/asm-powerpc/tlb.h file -- tgall */ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); -DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); -unsigned long pte_freelist_forced_free; +static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); +static unsigned long pte_freelist_forced_free; struct pte_freelist_batch { @@ -47,9 +47,6 @@ struct pte_freelist_batch pgtable_free_t tables[0]; }; -DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); -unsigned long pte_freelist_forced_free; - #define PTE_FREELIST_SIZE \ ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ / sizeof(pgtable_free_t)) @@ -66,7 +63,7 @@ static void pgtable_free_now(pgtable_free_t pgf) { pte_freelist_forced_free++; - smp_call_function(pte_free_smp_sync, NULL, 0, 1); + smp_call_function(pte_free_smp_sync, NULL, 1); pgtable_free(pgf); } @@ -150,7 +147,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr, */ if (huge) { #ifdef CONFIG_HUGETLB_PAGE - psize = mmu_huge_psize; + psize = get_slice_psize(mm, addr);; #else BUG(); psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */ diff --git a/arch/powerpc/oprofile/common.c b/arch/powerpc/oprofile/common.c index 4908dc98f9caa2368129a7c7f16ed477ec1bebec..17807acb05d998da3fdf6e9af0f459b00bb0d8f0 100644 --- a/arch/powerpc/oprofile/common.c +++ b/arch/powerpc/oprofile/common.c @@ -65,7 +65,7 @@ static int op_powerpc_setup(void) /* Configure the registers on all cpus. If an error occurs on one * of the cpus, op_per_cpu_rc will be set to the error */ - on_each_cpu(op_powerpc_cpu_setup, NULL, 0, 1); + on_each_cpu(op_powerpc_cpu_setup, NULL, 1); out: if (op_per_cpu_rc) { /* error on setup release the performance counter hardware */ @@ -100,7 +100,7 @@ static int op_powerpc_start(void) if (model->global_start) return model->global_start(ctr); if (model->start) { - on_each_cpu(op_powerpc_cpu_start, NULL, 0, 1); + on_each_cpu(op_powerpc_cpu_start, NULL, 1); return op_per_cpu_rc; } return -EIO; /* No start function is defined for this @@ -115,7 +115,7 @@ static inline void op_powerpc_cpu_stop(void *dummy) static void op_powerpc_stop(void) { if (model->stop) - on_each_cpu(op_powerpc_cpu_stop, NULL, 0, 1); + on_each_cpu(op_powerpc_cpu_stop, NULL, 1); if (model->global_stop) model->global_stop(); } diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 6abe91357eee742afbeb5efc32472064339c7aff..249ba01c667416cfb62f8743f2701f087732b088 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -17,6 +17,15 @@ config EBONY help This option enables support for the IBM PPC440GP evaluation board. +config SAM440EP + bool "Sam440ep" + depends on 44x + default n + select 440EP + select PCI + help + This option enables support for the ACube Sam440ep board. + config SEQUOIA bool "Sequoia" depends on 44x @@ -102,6 +111,22 @@ config YOSEMITE # help # This option enables support for the IBM PPC440GX evaluation board. +config XILINX_VIRTEX440_GENERIC_BOARD + bool "Generic Xilinx Virtex 440 board" + depends on 44x + default n + select XILINX_VIRTEX_5_FXT + help + This option enables generic support for Xilinx Virtex based boards + that use a 440 based processor in the Virtex 5 FXT FPGA architecture. + + The generic virtex board support matches any device tree which + specifies 'xlnx,virtex440' in its compatible field. This includes + the Xilinx ML5xx reference designs using the powerpc core. + + Most Virtex 5 designs should use this unless it needs to do some + special configuration at board probe time. + # 44x specific CPU modules, selected based on the board above. config 440EP bool @@ -152,3 +177,13 @@ config 460EX # 44x errata/workaround config symbols, selected by the CPU models above config IBM440EP_ERR42 bool + +# Xilinx specific config options. +config XILINX_VIRTEX + bool + +# Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above +config XILINX_VIRTEX_5_FXT + bool + select XILINX_VIRTEX + diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile index 774165f9acdde26378651c0afb6daf0466fb0031..8d0b1a192d626826a60dd9c6128b0423b472c60b 100644 --- a/arch/powerpc/platforms/44x/Makefile +++ b/arch/powerpc/platforms/44x/Makefile @@ -3,9 +3,11 @@ obj-$(CONFIG_EBONY) += ebony.o obj-$(CONFIG_TAISHAN) += taishan.o obj-$(CONFIG_BAMBOO) += bamboo.o obj-$(CONFIG_YOSEMITE) += bamboo.o +obj-$(CONFIG_SAM440EP) += sam440ep.o obj-$(CONFIG_SEQUOIA) += sequoia.o obj-$(CONFIG_KATMAI) += katmai.o obj-$(CONFIG_RAINIER) += rainier.o obj-$(CONFIG_WARP) += warp.o obj-$(CONFIG_WARP) += warp-nand.o obj-$(CONFIG_CANYONLANDS) += canyonlands.o +obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c new file mode 100644 index 0000000000000000000000000000000000000000..47f10e6477350887ae74f4ef5875fc8d4d1c34d8 --- /dev/null +++ b/arch/powerpc/platforms/44x/sam440ep.c @@ -0,0 +1,79 @@ +/* + * Sam440ep board specific routines based off bamboo.c code + * original copyrights below + * + * Wade Farnsworth + * Copyright 2004 MontaVista Software Inc. + * + * Rewritten and ported to the merged powerpc tree: + * Josh Boyer + * Copyright 2007 IBM Corporation + * + * Modified from bamboo.c for sam440ep: + * Copyright 2008 Giuseppe Coviello + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +static __initdata struct of_device_id sam440ep_of_bus[] = { + { .compatible = "ibm,plb4", }, + { .compatible = "ibm,opb", }, + { .compatible = "ibm,ebc", }, + {}, +}; + +static int __init sam440ep_device_probe(void) +{ + of_platform_bus_probe(NULL, sam440ep_of_bus, NULL); + + return 0; +} +machine_device_initcall(sam440ep, sam440ep_device_probe); + +static int __init sam440ep_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + if (!of_flat_dt_is_compatible(root, "acube,sam440ep")) + return 0; + + ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; + + return 1; +} + +define_machine(sam440ep) { + .name = "Sam440ep", + .probe = sam440ep_probe, + .progress = udbg_progress, + .init_IRQ = uic_init_tree, + .get_irq = uic_get_irq, + .restart = ppc4xx_reset_system, + .calibrate_decr = generic_calibrate_decr, +}; + +static struct i2c_board_info sam440ep_rtc_info = { + .type = "m41st85", + .addr = 0x68, + .irq = -1, +}; + +static int sam440ep_setup_rtc(void) +{ + return i2c_register_board_info(0, &sam440ep_rtc_info, 1); +} +machine_device_initcall(sam440ep, sam440ep_setup_rtc); diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c new file mode 100644 index 0000000000000000000000000000000000000000..68637faf70ae91b8fcadc48496a1b47e8c042f09 --- /dev/null +++ b/arch/powerpc/platforms/44x/virtex.c @@ -0,0 +1,60 @@ +/* + * Xilinx Virtex 5FXT based board support, derived from + * the Xilinx Virtex (IIpro & 4FX) based board support + * + * Copyright 2007 Secret Lab Technologies Ltd. + * Copyright 2008 Xilinx, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "44x.h" + +static struct of_device_id xilinx_of_bus_ids[] __initdata = { + { .compatible = "simple-bus", }, + { .compatible = "xlnx,plb-v46-1.00.a", }, + { .compatible = "xlnx,plb-v46-1.02.a", }, + { .compatible = "xlnx,plb-v34-1.01.a", }, + { .compatible = "xlnx,plb-v34-1.02.a", }, + { .compatible = "xlnx,opb-v20-1.10.c", }, + { .compatible = "xlnx,dcr-v29-1.00.a", }, + { .compatible = "xlnx,compound", }, + {} +}; + +static int __init virtex_device_probe(void) +{ + of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL); + + return 0; +} +machine_device_initcall(virtex, virtex_device_probe); + +static int __init virtex_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + if (!of_flat_dt_is_compatible(root, "xlnx,virtex440")) + return 0; + + return 1; +} + +define_machine(virtex) { + .name = "Xilinx Virtex440", + .probe = virtex_probe, + .init_IRQ = xilinx_intc_init_tree, + .get_irq = xilinx_intc_get_irq, + .calibrate_decr = generic_calibrate_decr, + .restart = ppc4xx_reset_system, +}; diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c index 9150318cfc5668fa4cd7c8597bb699389065d777..e55746b824b4a78ca08b336e3c613b3a41c96670 100644 --- a/arch/powerpc/platforms/44x/warp-nand.c +++ b/arch/powerpc/platforms/44x/warp-nand.c @@ -11,8 +11,10 @@ #include #include #include +#include #include + #ifdef CONFIG_MTD_NAND_NDFC #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ @@ -35,13 +37,23 @@ static struct mtd_partition nand_parts[] = { { .name = "root", .offset = 0x0200000, - .size = 0x3400000 + .size = 0x3E00000 + }, + { + .name = "persistent", + .offset = 0x4000000, + .size = 0x4000000 }, { - .name = "user", - .offset = 0x3600000, - .size = 0x0A00000 + .name = "persistent1", + .offset = 0x8000000, + .size = 0x4000000 }, + { + .name = "persistent2", + .offset = 0xC000000, + .size = 0x4000000 + } }; struct ndfc_controller_settings warp_ndfc_settings = { @@ -67,27 +79,22 @@ static struct platform_device warp_ndfc_device = { .resource = &warp_ndfc, }; -static struct nand_ecclayout nand_oob_16 = { - .eccbytes = 3, - .eccpos = { 0, 1, 2, 3, 6, 7 }, - .oobfree = { {.offset = 8, .length = 16} } -}; - +/* Do NOT set the ecclayout: let it default so it is correct for both + * 64M and 256M flash chips. + */ static struct platform_nand_chip warp_nand_chip0 = { .nr_chips = 1, .chip_offset = CS_NAND_0, .nr_partitions = ARRAY_SIZE(nand_parts), .partitions = nand_parts, - .chip_delay = 50, - .ecclayout = &nand_oob_16, + .chip_delay = 20, .priv = &warp_chip0_settings, }; static struct platform_device warp_nand_device = { .name = "ndfc-chip", .id = 0, - .num_resources = 1, - .resource = &warp_ndfc, + .num_resources = 0, .dev = { .platform_data = &warp_nand_chip0, .parent = &warp_ndfc_device.dev, @@ -96,6 +103,28 @@ static struct platform_device warp_nand_device = { static int warp_setup_nand_flash(void) { + struct device_node *np; + + /* Try to detect a rev A based on NOR size. */ + np = of_find_compatible_node(NULL, NULL, "cfi-flash"); + if (np) { + struct property *pp; + + pp = of_find_property(np, "reg", NULL); + if (pp && (pp->length == 12)) { + u32 *v = pp->value; + if (v[2] == 0x4000000) { + /* Rev A = 64M NAND */ + warp_nand_chip0.nr_partitions = 3; + + nand_parts[1].size = 0x3000000; + nand_parts[2].offset = 0x3200000; + nand_parts[2].size = 0x0e00000; + } + } + of_node_put(np); + } + platform_device_register(&warp_ndfc_device); platform_device_register(&warp_nand_device); diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index 39cf6150a72b2701af6eb62348ce364b3d88ce26..9565995cba7f8226f14f388a7bcee2dec06c247b 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c @@ -12,6 +12,9 @@ #include #include #include +#include +#include +#include #include #include @@ -27,6 +30,18 @@ static __initdata struct of_device_id warp_of_bus[] = { {}, }; +static __initdata struct i2c_board_info warp_i2c_info[] = { + { I2C_BOARD_INFO("ad7414", 0x4a) } +}; + +static int __init warp_arch_init(void) +{ + /* This should go away once support is moved to the dts. */ + i2c_register_board_info(0, warp_i2c_info, ARRAY_SIZE(warp_i2c_info)); + return 0; +} +machine_arch_initcall(warp, warp_arch_init); + static int __init warp_device_probe(void) { of_platform_bus_probe(NULL, warp_of_bus, NULL); @@ -52,61 +67,232 @@ define_machine(warp) { }; -#define LED_GREEN (0x80000000 >> 0) -#define LED_RED (0x80000000 >> 1) +/* I am not sure this is the best place for this... */ +static int __init warp_post_info(void) +{ + struct device_node *np; + void __iomem *fpga; + u32 post1, post2; + + /* Sighhhh... POST information is in the sd area. */ + np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd"); + if (np == NULL) + return -ENOENT; + + fpga = of_iomap(np, 0); + of_node_put(np); + if (fpga == NULL) + return -ENOENT; + + post1 = in_be32(fpga + 0x40); + post2 = in_be32(fpga + 0x44); + + iounmap(fpga); + + if (post1 || post2) + printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2); + else + printk(KERN_INFO "Warp POST OK\n"); + + return 0; +} +machine_late_initcall(warp, warp_post_info); + + +#ifdef CONFIG_SENSORS_AD7414 + +static LIST_HEAD(dtm_shutdown_list); +static void __iomem *dtm_fpga; +static void __iomem *gpio_base; + + +struct dtm_shutdown { + struct list_head list; + void (*func)(void *arg); + void *arg; +}; -/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */ -void warp_set_power_leds(int green, int red) +int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) { - static void __iomem *gpio_base = NULL; - unsigned leds; - - if (gpio_base == NULL) { - struct device_node *np; - - /* Power LEDS are on the second GPIO controller */ - np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP"); - if (np) - np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP"); - if (np == NULL) { - printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); - return; + struct dtm_shutdown *shutdown; + + shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL); + if (shutdown == NULL) + return -ENOMEM; + + shutdown->func = func; + shutdown->arg = arg; + + list_add(&shutdown->list, &dtm_shutdown_list); + + return 0; +} + +int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) +{ + struct dtm_shutdown *shutdown; + + list_for_each_entry(shutdown, &dtm_shutdown_list, list) + if (shutdown->func == func && shutdown->arg == arg) { + list_del(&shutdown->list); + kfree(shutdown); + return 0; + } + + return -EINVAL; +} + +static irqreturn_t temp_isr(int irq, void *context) +{ + struct dtm_shutdown *shutdown; + + local_irq_disable(); + + /* Run through the shutdown list. */ + list_for_each_entry(shutdown, &dtm_shutdown_list, list) + shutdown->func(shutdown->arg); + + printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n"); + + while (1) { + if (dtm_fpga) { + unsigned reset = in_be32(dtm_fpga + 0x14); + out_be32(dtm_fpga + 0x14, reset); } - gpio_base = of_iomap(np, 0); - of_node_put(np); - if (gpio_base == NULL) { - printk(KERN_ERR __FILE__ ": Unable to map gpio"); - return; + if (gpio_base) { + unsigned leds = in_be32(gpio_base); + + /* green off, red toggle */ + leds &= ~0x80000000; + leds ^= 0x40000000; + + out_be32(gpio_base, leds); } + + mdelay(500); + } +} + +static int pika_setup_leds(void) +{ + struct device_node *np; + const u32 *gpios; + int len; + + np = of_find_compatible_node(NULL, NULL, "linux,gpio-led"); + if (!np) { + printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n"); + return -ENOENT; } - leds = in_be32(gpio_base); + gpios = of_get_property(np, "gpios", &len); + of_node_put(np); + if (!gpios || len < 4) { + printk(KERN_ERR __FILE__ + ": Unable to get gpios property (%d)\n", len); + return -ENOENT; + } - switch (green) { - case 0: leds &= ~LED_GREEN; break; - case 1: leds |= LED_GREEN; break; + np = of_find_node_by_phandle(gpios[0]); + if (!np) { + printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); + return -ENOENT; } - switch (red) { - case 0: leds &= ~LED_RED; break; - case 1: leds |= LED_RED; break; + + gpio_base = of_iomap(np, 0); + of_node_put(np); + if (!gpio_base) { + printk(KERN_ERR __FILE__ ": Unable to map gpio"); + return -ENOMEM; } - out_be32(gpio_base, leds); + return 0; } -EXPORT_SYMBOL(warp_set_power_leds); +static void pika_setup_critical_temp(struct i2c_client *client) +{ + struct device_node *np; + int irq, rc; + + /* Do this before enabling critical temp interrupt since we + * may immediately interrupt. + */ + pika_setup_leds(); + + /* These registers are in 1 degree increments. */ + i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */ + i2c_smbus_write_byte_data(client, 3, 55); /* Tlow */ + + np = of_find_compatible_node(NULL, NULL, "adi,ad7414"); + if (np == NULL) { + printk(KERN_ERR __FILE__ ": Unable to find ad7414\n"); + return; + } + + irq = irq_of_parse_and_map(np, 0); + of_node_put(np); + if (irq == NO_IRQ) { + printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n"); + return; + } + + rc = request_irq(irq, temp_isr, 0, "ad7414", NULL); + if (rc) { + printk(KERN_ERR __FILE__ + ": Unable to request ad7414 irq %d = %d\n", irq, rc); + return; + } +} + +static inline void pika_dtm_check_fan(void __iomem *fpga) +{ + static int fan_state; + u32 fan = in_be32(fpga + 0x34) & (1 << 14); + + if (fan_state != fan) { + fan_state = fan; + if (fan) + printk(KERN_WARNING "Fan rotation error detected." + " Please check hardware.\n"); + } +} -#ifdef CONFIG_SENSORS_AD7414 static int pika_dtm_thread(void __iomem *fpga) { - extern int ad7414_get_temp(int index); + struct i2c_adapter *adap; + struct i2c_client *client; + + /* We loop in case either driver was compiled as a module and + * has not been insmoded yet. + */ + while (!(adap = i2c_get_adapter(0))) { + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ); + } + + while (1) { + list_for_each_entry(client, &adap->clients, list) + if (client->addr == 0x4a) + goto found_it; + + set_current_state(TASK_INTERRUPTIBLE); + schedule_timeout(HZ); + } + +found_it: + i2c_put_adapter(adap); + + pika_setup_critical_temp(client); + + printk(KERN_INFO "PIKA DTM thread running.\n"); while (!kthread_should_stop()) { - int temp = ad7414_get_temp(0); + u16 temp = swab16(i2c_smbus_read_word_data(client, 0)); + out_be32(fpga + 0x20, temp); - out_be32(fpga, temp); + pika_dtm_check_fan(fpga); set_current_state(TASK_INTERRUPTIBLE); schedule_timeout(HZ); @@ -115,37 +301,44 @@ static int pika_dtm_thread(void __iomem *fpga) return 0; } + static int __init pika_dtm_start(void) { struct task_struct *dtm_thread; struct device_node *np; - struct resource res; - void __iomem *fpga; np = of_find_compatible_node(NULL, NULL, "pika,fpga"); if (np == NULL) return -ENOENT; - /* We do not call of_iomap here since it would map in the entire - * fpga space, which is over 8k. - */ - if (of_address_to_resource(np, 0, &res)) { - of_node_put(np); - return -ENOENT; - } + dtm_fpga = of_iomap(np, 0); of_node_put(np); - - fpga = ioremap(res.start, 0x24); - if (fpga == NULL) + if (dtm_fpga == NULL) return -ENOENT; - dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm"); + dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm"); if (IS_ERR(dtm_thread)) { - iounmap(fpga); + iounmap(dtm_fpga); return PTR_ERR(dtm_thread); } return 0; } -device_initcall(pika_dtm_start); +machine_late_initcall(warp, pika_dtm_start); + +#else /* !CONFIG_SENSORS_AD7414 */ + +int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) +{ + return 0; +} + +int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) +{ + return 0; +} + #endif + +EXPORT_SYMBOL(pika_dtm_register_shutdown); +EXPORT_SYMBOL(pika_dtm_unregister_shutdown); diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig index 4c0da0c079e9666fbe412a8d419b9b2e79854462..c62f893ede190f984c6d235304b196651fb3b3c6 100644 --- a/arch/powerpc/platforms/512x/Kconfig +++ b/arch/powerpc/platforms/512x/Kconfig @@ -2,18 +2,29 @@ config PPC_MPC512x bool select FSL_SOC select IPIC - default n + select PPC_CLOCK config PPC_MPC5121 bool select PPC_MPC512x - default n config MPC5121_ADS bool "Freescale MPC5121E ADS" depends on PPC_MULTIPLATFORM && PPC32 select DEFAULT_UIMAGE select PPC_MPC5121 + select MPC5121_ADS_CPLD help This option enables support for the MPC5121E ADS board. - default n + +config MPC5121_GENERIC + bool "Generic support for simple MPC5121 based boards" + depends on PPC_MULTIPLATFORM && PPC32 + select DEFAULT_UIMAGE + select PPC_MPC5121 + help + This option enables support for simple MPC5121 based boards + which do not need custom platform specific setup. + + Compatible boards include: Protonic LVT base boards (ZANMCU + and VICVT2). diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile index 232c89f2039ac31ce25b630cbd69e649280d66ec..90be2f5717e67287b1e4014373e7f9cf400ed439 100644 --- a/arch/powerpc/platforms/512x/Makefile +++ b/arch/powerpc/platforms/512x/Makefile @@ -1,4 +1,6 @@ # # Makefile for the Freescale PowerPC 512x linux kernel. # -obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o +obj-y += clock.o mpc512x_shared.o +obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o +obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c new file mode 100644 index 0000000000000000000000000000000000000000..f416014ee727b99813017554dd654e5495210053 --- /dev/null +++ b/arch/powerpc/platforms/512x/clock.c @@ -0,0 +1,729 @@ +/* + * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: John Rigby + * + * Implements the clk api defined in include/linux/clk.h + * + * Original based on linux/arch/arm/mach-integrator/clock.c + * + * Copyright (C) 2004 ARM Limited. + * Written by Deep Blue Solutions Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#undef CLK_DEBUG + +static int clocks_initialized; + +#define CLK_HAS_RATE 0x1 /* has rate in MHz */ +#define CLK_HAS_CTRL 0x2 /* has control reg and bit */ + +struct clk { + struct list_head node; + char name[32]; + int flags; + struct device *dev; + unsigned long rate; + struct module *owner; + void (*calc) (struct clk *); + struct clk *parent; + int reg, bit; /* CLK_HAS_CTRL */ + int div_shift; /* only used by generic_div_clk_calc */ +}; + +static LIST_HEAD(clocks); +static DEFINE_MUTEX(clocks_mutex); + +static struct clk *mpc5121_clk_get(struct device *dev, const char *id) +{ + struct clk *p, *clk = ERR_PTR(-ENOENT); + int dev_match = 0; + int id_match = 0; + + if (dev == NULL && id == NULL) + return NULL; + + mutex_lock(&clocks_mutex); + list_for_each_entry(p, &clocks, node) { + if (dev && dev == p->dev) + dev_match++; + if (strcmp(id, p->name) == 0) + id_match++; + if ((dev_match || id_match) && try_module_get(p->owner)) { + clk = p; + break; + } + } + mutex_unlock(&clocks_mutex); + + return clk; +} + +#ifdef CLK_DEBUG +static void dump_clocks(void) +{ + struct clk *p; + + mutex_lock(&clocks_mutex); + printk(KERN_INFO "CLOCKS:\n"); + list_for_each_entry(p, &clocks, node) { + printk(KERN_INFO " %s %ld", p->name, p->rate); + if (p->parent) + printk(KERN_INFO " %s %ld", p->parent->name, + p->parent->rate); + if (p->flags & CLK_HAS_CTRL) + printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit); + printk("\n"); + } + mutex_unlock(&clocks_mutex); +} +#define DEBUG_CLK_DUMP() dump_clocks() +#else +#define DEBUG_CLK_DUMP() +#endif + + +static void mpc5121_clk_put(struct clk *clk) +{ + module_put(clk->owner); +} + +#define NRPSC 12 + +struct mpc512x_clockctl { + u32 spmr; /* System PLL Mode Reg */ + u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */ + u32 scfr1; /* System Clk Freq Reg 1 */ + u32 scfr2; /* System Clk Freq Reg 2 */ + u32 reserved; + u32 bcr; /* Bread Crumb Reg */ + u32 pccr[NRPSC]; /* PSC Clk Ctrl Reg 0-11 */ + u32 spccr; /* SPDIF Clk Ctrl Reg */ + u32 cccr; /* CFM Clk Ctrl Reg */ + u32 dccr; /* DIU Clk Cnfg Reg */ +}; + +struct mpc512x_clockctl __iomem *clockctl; + +static int mpc5121_clk_enable(struct clk *clk) +{ + unsigned int mask; + + if (clk->flags & CLK_HAS_CTRL) { + mask = in_be32(&clockctl->sccr[clk->reg]); + mask |= 1 << clk->bit; + out_be32(&clockctl->sccr[clk->reg], mask); + } + return 0; +} + +static void mpc5121_clk_disable(struct clk *clk) +{ + unsigned int mask; + + if (clk->flags & CLK_HAS_CTRL) { + mask = in_be32(&clockctl->sccr[clk->reg]); + mask &= ~(1 << clk->bit); + out_be32(&clockctl->sccr[clk->reg], mask); + } +} + +static unsigned long mpc5121_clk_get_rate(struct clk *clk) +{ + if (clk->flags & CLK_HAS_RATE) + return clk->rate; + else + return 0; +} + +static long mpc5121_clk_round_rate(struct clk *clk, unsigned long rate) +{ + return rate; +} + +static int mpc5121_clk_set_rate(struct clk *clk, unsigned long rate) +{ + return 0; +} + +static int clk_register(struct clk *clk) +{ + mutex_lock(&clocks_mutex); + list_add(&clk->node, &clocks); + mutex_unlock(&clocks_mutex); + return 0; +} + +static unsigned long spmf_mult(void) +{ + /* + * Convert spmf to multiplier + */ + static int spmf_to_mult[] = { + 68, 1, 12, 16, + 20, 24, 28, 32, + 36, 40, 44, 48, + 52, 56, 60, 64 + }; + int spmf = (clockctl->spmr >> 24) & 0xf; + return spmf_to_mult[spmf]; +} + +static unsigned long sysdiv_div_x_2(void) +{ + /* + * Convert sysdiv to divisor x 2 + * Some divisors have fractional parts so + * multiply by 2 then divide by this value + */ + static int sysdiv_to_div_x_2[] = { + 4, 5, 6, 7, + 8, 9, 10, 14, + 12, 16, 18, 22, + 20, 24, 26, 30, + 28, 32, 34, 38, + 36, 40, 42, 46, + 44, 48, 50, 54, + 52, 56, 58, 62, + 60, 64, 66, + }; + int sysdiv = (clockctl->scfr2 >> 26) & 0x3f; + return sysdiv_to_div_x_2[sysdiv]; +} + +static unsigned long ref_to_sys(unsigned long rate) +{ + rate *= spmf_mult(); + rate *= 2; + rate /= sysdiv_div_x_2(); + + return rate; +} + +static unsigned long sys_to_ref(unsigned long rate) +{ + rate *= sysdiv_div_x_2(); + rate /= 2; + rate /= spmf_mult(); + + return rate; +} + +static long ips_to_ref(unsigned long rate) +{ + int ips_div = (clockctl->scfr1 >> 23) & 0x7; + + rate *= ips_div; /* csb_clk = ips_clk * ips_div */ + rate *= 2; /* sys_clk = csb_clk * 2 */ + return sys_to_ref(rate); +} + +static unsigned long devtree_getfreq(char *clockname) +{ + struct device_node *np; + const unsigned int *prop; + unsigned int val = 0; + + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr"); + if (np) { + prop = of_get_property(np, clockname, NULL); + if (prop) + val = *prop; + of_node_put(np); + } + return val; +} + +static void ref_clk_calc(struct clk *clk) +{ + unsigned long rate; + + rate = devtree_getfreq("bus-frequency"); + if (rate == 0) { + printk(KERN_ERR "No bus-frequency in dev tree\n"); + clk->rate = 0; + return; + } + clk->rate = ips_to_ref(rate); +} + +static struct clk ref_clk = { + .name = "ref_clk", + .calc = ref_clk_calc, +}; + + +static void sys_clk_calc(struct clk *clk) +{ + clk->rate = ref_to_sys(ref_clk.rate); +} + +static struct clk sys_clk = { + .name = "sys_clk", + .calc = sys_clk_calc, +}; + +static void diu_clk_calc(struct clk *clk) +{ + int diudiv_x_2 = clockctl->scfr1 & 0xff; + unsigned long rate; + + rate = sys_clk.rate; + + rate *= 2; + rate /= diudiv_x_2; + + clk->rate = rate; +} + +static void half_clk_calc(struct clk *clk) +{ + clk->rate = clk->parent->rate / 2; +} + +static void generic_div_clk_calc(struct clk *clk) +{ + int div = (clockctl->scfr1 >> clk->div_shift) & 0x7; + + clk->rate = clk->parent->rate / div; +} + +static void unity_clk_calc(struct clk *clk) +{ + clk->rate = clk->parent->rate; +} + +static struct clk csb_clk = { + .name = "csb_clk", + .calc = half_clk_calc, + .parent = &sys_clk, +}; + +static void e300_clk_calc(struct clk *clk) +{ + int spmf = (clockctl->spmr >> 16) & 0xf; + int ratex2 = clk->parent->rate * spmf; + + clk->rate = ratex2 / 2; +} + +static struct clk e300_clk = { + .name = "e300_clk", + .calc = e300_clk_calc, + .parent = &csb_clk, +}; + +static struct clk ips_clk = { + .name = "ips_clk", + .calc = generic_div_clk_calc, + .parent = &csb_clk, + .div_shift = 23, +}; + +/* + * Clocks controlled by SCCR1 (.reg = 0) + */ +static struct clk lpc_clk = { + .name = "lpc_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 30, + .calc = generic_div_clk_calc, + .parent = &ips_clk, + .div_shift = 11, +}; + +static struct clk nfc_clk = { + .name = "nfc_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 29, + .calc = generic_div_clk_calc, + .parent = &ips_clk, + .div_shift = 8, +}; + +static struct clk pata_clk = { + .name = "pata_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 28, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +/* + * PSC clocks (bits 27 - 16) + * are setup elsewhere + */ + +static struct clk sata_clk = { + .name = "sata_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 14, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +static struct clk fec_clk = { + .name = "fec_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 13, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +static struct clk pci_clk = { + .name = "pci_clk", + .flags = CLK_HAS_CTRL, + .reg = 0, + .bit = 11, + .calc = generic_div_clk_calc, + .parent = &csb_clk, + .div_shift = 20, +}; + +/* + * Clocks controlled by SCCR2 (.reg = 1) + */ +static struct clk diu_clk = { + .name = "diu_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 31, + .calc = diu_clk_calc, +}; + +static struct clk axe_clk = { + .name = "axe_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 30, + .calc = unity_clk_calc, + .parent = &csb_clk, +}; + +static struct clk usb1_clk = { + .name = "usb1_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 28, + .calc = unity_clk_calc, + .parent = &csb_clk, +}; + +static struct clk usb2_clk = { + .name = "usb2_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 27, + .calc = unity_clk_calc, + .parent = &csb_clk, +}; + +static struct clk i2c_clk = { + .name = "i2c_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 26, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +static struct clk mscan_clk = { + .name = "mscan_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 25, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +static struct clk sdhc_clk = { + .name = "sdhc_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 24, + .calc = unity_clk_calc, + .parent = &ips_clk, +}; + +static struct clk mbx_bus_clk = { + .name = "mbx_bus_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 22, + .calc = half_clk_calc, + .parent = &csb_clk, +}; + +static struct clk mbx_clk = { + .name = "mbx_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 21, + .calc = unity_clk_calc, + .parent = &csb_clk, +}; + +static struct clk mbx_3d_clk = { + .name = "mbx_3d_clk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 20, + .calc = generic_div_clk_calc, + .parent = &mbx_bus_clk, + .div_shift = 14, +}; + +static void psc_mclk_in_calc(struct clk *clk) +{ + clk->rate = devtree_getfreq("psc_mclk_in"); + if (!clk->rate) + clk->rate = 25000000; +} + +static struct clk psc_mclk_in = { + .name = "psc_mclk_in", + .calc = psc_mclk_in_calc, +}; + +static struct clk spdif_txclk = { + .name = "spdif_txclk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 23, +}; + +static struct clk spdif_rxclk = { + .name = "spdif_rxclk", + .flags = CLK_HAS_CTRL, + .reg = 1, + .bit = 23, +}; + +static void ac97_clk_calc(struct clk *clk) +{ + /* ac97 bit clock is always 24.567 MHz */ + clk->rate = 24567000; +} + +static struct clk ac97_clk = { + .name = "ac97_clk_in", + .calc = ac97_clk_calc, +}; + +struct clk *rate_clks[] = { + &ref_clk, + &sys_clk, + &diu_clk, + &csb_clk, + &e300_clk, + &ips_clk, + &fec_clk, + &sata_clk, + &pata_clk, + &nfc_clk, + &lpc_clk, + &mbx_bus_clk, + &mbx_clk, + &mbx_3d_clk, + &axe_clk, + &usb1_clk, + &usb2_clk, + &i2c_clk, + &mscan_clk, + &sdhc_clk, + &pci_clk, + &psc_mclk_in, + &spdif_txclk, + &spdif_rxclk, + &ac97_clk, + NULL +}; + +static void rate_clk_init(struct clk *clk) +{ + if (clk->calc) { + clk->calc(clk); + clk->flags |= CLK_HAS_RATE; + clk_register(clk); + } else { + printk(KERN_WARNING + "Could not initialize clk %s without a calc routine\n", + clk->name); + } +} + +static void rate_clks_init(void) +{ + struct clk **cpp, *clk; + + cpp = rate_clks; + while ((clk = *cpp++)) + rate_clk_init(clk); +} + +/* + * There are two clk enable registers with 32 enable bits each + * psc clocks and device clocks are all stored in dev_clks + */ +struct clk dev_clks[2][32]; + +/* + * Given a psc number return the dev_clk + * associated with it + */ +static struct clk *psc_dev_clk(int pscnum) +{ + int reg, bit; + struct clk *clk; + + reg = 0; + bit = 27 - pscnum; + + clk = &dev_clks[reg][bit]; + clk->reg = 0; + clk->bit = bit; + return clk; +} + +/* + * PSC clock rate calculation + */ +static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np) +{ + unsigned long mclk_src = sys_clk.rate; + unsigned long mclk_div; + + /* + * Can only change value of mclk divider + * when the divider is disabled. + * + * Zero is not a valid divider so minimum + * divider is 1 + * + * disable/set divider/enable + */ + out_be32(&clockctl->pccr[pscnum], 0); + out_be32(&clockctl->pccr[pscnum], 0x00020000); + out_be32(&clockctl->pccr[pscnum], 0x00030000); + + if (clockctl->pccr[pscnum] & 0x80) { + clk->rate = spdif_rxclk.rate; + return; + } + + switch ((clockctl->pccr[pscnum] >> 14) & 0x3) { + case 0: + mclk_src = sys_clk.rate; + break; + case 1: + mclk_src = ref_clk.rate; + break; + case 2: + mclk_src = psc_mclk_in.rate; + break; + case 3: + mclk_src = spdif_txclk.rate; + break; + } + + mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1; + clk->rate = mclk_src / mclk_div; +} + +/* + * Find all psc nodes in device tree and assign a clock + * with name "psc%d_mclk" and dev pointing at the device + * returned from of_find_device_by_node + */ +static void psc_clks_init(void) +{ + struct device_node *np; + const u32 *cell_index; + struct of_device *ofdev; + + for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") { + cell_index = of_get_property(np, "cell-index", NULL); + if (cell_index) { + int pscnum = *cell_index; + struct clk *clk = psc_dev_clk(pscnum); + + clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL; + ofdev = of_find_device_by_node(np); + clk->dev = &ofdev->dev; + /* + * AC97 is special rate clock does + * not go through normal path + */ + if (strcmp("ac97", np->name) == 0) + clk->rate = ac97_clk.rate; + else + psc_calc_rate(clk, pscnum, np); + sprintf(clk->name, "psc%d_mclk", pscnum); + clk_register(clk); + clk_enable(clk); + } + } +} + +static struct clk_interface mpc5121_clk_functions = { + .clk_get = mpc5121_clk_get, + .clk_enable = mpc5121_clk_enable, + .clk_disable = mpc5121_clk_disable, + .clk_get_rate = mpc5121_clk_get_rate, + .clk_put = mpc5121_clk_put, + .clk_round_rate = mpc5121_clk_round_rate, + .clk_set_rate = mpc5121_clk_set_rate, + .clk_set_parent = NULL, + .clk_get_parent = NULL, +}; + +static int +mpc5121_clk_init(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock"); + if (np) { + clockctl = of_iomap(np, 0); + of_node_put(np); + } + + if (!clockctl) { + printk(KERN_ERR "Could not map clock control registers\n"); + return 0; + } + + rate_clks_init(); + psc_clks_init(); + + /* leave clockctl mapped forever */ + /*iounmap(clockctl); */ + DEBUG_CLK_DUMP(); + clocks_initialized++; + clk_functions = mpc5121_clk_functions; + return 0; +} + + +arch_initcall(mpc5121_clk_init); diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c index 50bd3a31902206a31954d767b06662ed6b1fdbac..5ebf6939a6975ba593b1d4b1372a5ebd19c68a11 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved. * * Author: John Rigby, , Thur Mar 29 2007 * @@ -15,7 +15,6 @@ #include #include -#include #include #include @@ -23,65 +22,22 @@ #include #include -/** - * mpc512x_find_ips_freq - Find the IPS bus frequency for a device - * @node: device node - * - * Returns IPS bus frequency, or 0 if the bus frequency cannot be found. - */ -unsigned long -mpc512x_find_ips_freq(struct device_node *node) -{ - struct device_node *np; - const unsigned int *p_ips_freq = NULL; - - of_node_get(node); - while (node) { - p_ips_freq = of_get_property(node, "bus-frequency", NULL); - if (p_ips_freq) - break; - - np = of_get_parent(node); - of_node_put(node); - node = np; - } - if (node) - of_node_put(node); - - return p_ips_freq ? *p_ips_freq : 0; -} -EXPORT_SYMBOL(mpc512x_find_ips_freq); - -static struct of_device_id __initdata of_bus_ids[] = { - { .name = "soc", }, - { .name = "localbus", }, - {}, -}; +#include "mpc512x.h" +#include "mpc5121_ads.h" -static void __init mpc5121_ads_declare_of_platform_devices(void) +static void __init mpc5121_ads_setup_arch(void) { - /* Find every child of the SOC node and add it to of_platform */ - if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) - printk(KERN_ERR __FILE__ ": " - "Error while probing of_platform bus\n"); + printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n"); + /* + * cpld regs are needed early + */ + mpc5121_ads_cpld_map(); } static void __init mpc5121_ads_init_IRQ(void) { - struct device_node *np; - - np = of_find_compatible_node(NULL, NULL, "fsl,ipic"); - if (!np) - return; - - ipic_init(np, 0); - of_node_put(np); - - /* - * Initialize the default interrupt mapping priorities, - * in case the boot rom changed something on us. - */ - ipic_set_default_priority(); + mpc512x_init_IRQ(); + mpc5121_ads_cpld_pic_init(); } /* @@ -97,7 +53,8 @@ static int __init mpc5121_ads_probe(void) define_machine(mpc5121_ads) { .name = "MPC5121 ADS", .probe = mpc5121_ads_probe, - .init = mpc5121_ads_declare_of_platform_devices, + .setup_arch = mpc5121_ads_setup_arch, + .init = mpc512x_declare_of_platform_devices, .init_IRQ = mpc5121_ads_init_IRQ, .get_irq = ipic_get_irq, .calibrate_decr = generic_calibrate_decr, diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.h b/arch/powerpc/platforms/512x/mpc5121_ads.h new file mode 100644 index 0000000000000000000000000000000000000000..662076cfee2fe510ed6169a8882c969dd766ce9a --- /dev/null +++ b/arch/powerpc/platforms/512x/mpc5121_ads.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Prototypes for ADS5121 specific code + */ + +#ifndef __MPC512ADS_H__ +#define __MPC512ADS_H__ +extern void __init mpc5121_ads_cpld_map(void); +extern void __init mpc5121_ads_cpld_pic_init(void); +#endif /* __MPC512ADS_H__ */ diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c new file mode 100644 index 0000000000000000000000000000000000000000..a6ce805666253d938fbfc986127d24ace67e3fda --- /dev/null +++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: John Rigby, + * + * Description: + * MPC5121ADS CPLD irq handling + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#undef DEBUG + +#include +#include +#include +#include +#include + +static struct device_node *cpld_pic_node; +static struct irq_host *cpld_pic_host; + +/* + * Bits to ignore in the misc_status register + * 0x10 touch screen pendown is hard routed to irq1 + * 0x02 pci status is read from pci status register + */ +#define MISC_IGNORE 0x12 + +/* + * Nothing to ignore in pci status register + */ +#define PCI_IGNORE 0x00 + +struct cpld_pic { + u8 pci_mask; + u8 pci_status; + u8 route; + u8 misc_mask; + u8 misc_status; + u8 misc_control; +}; + +static struct cpld_pic __iomem *cpld_regs; + +static void __iomem * +irq_to_pic_mask(unsigned int irq) +{ + return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask; +} + +static unsigned int +irq_to_pic_bit(unsigned int irq) +{ + return 1 << (irq & 0x7); +} + +static void +cpld_mask_irq(unsigned int irq) +{ + unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq; + void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); + + out_8(pic_mask, + in_8(pic_mask) | irq_to_pic_bit(cpld_irq)); +} + +static void +cpld_unmask_irq(unsigned int irq) +{ + unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq; + void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); + + out_8(pic_mask, + in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq)); +} + +static struct irq_chip cpld_pic = { + .typename = " CPLD PIC ", + .mask = cpld_mask_irq, + .ack = cpld_mask_irq, + .unmask = cpld_unmask_irq, +}; + +static int +cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp, + u8 __iomem *maskp) +{ + int cpld_irq; + u8 status = in_8(statusp); + u8 mask = in_8(maskp); + + /* ignore don't cares and masked irqs */ + status |= (ignore | mask); + + if (status == 0xff) + return NO_IRQ_IGNORE; + + cpld_irq = ffz(status) + offset; + + return irq_linear_revmap(cpld_pic_host, cpld_irq); +} + +static void +cpld_pic_cascade(unsigned int irq, struct irq_desc *desc) +{ + irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status, + &cpld_regs->pci_mask); + if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { + generic_handle_irq(irq); + return; + } + + irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status, + &cpld_regs->misc_mask); + if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) { + generic_handle_irq(irq); + return; + } +} + +static int +cpld_pic_host_match(struct irq_host *h, struct device_node *node) +{ + return cpld_pic_node == node; +} + +static int +cpld_pic_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + get_irq_desc(virq)->status |= IRQ_LEVEL; + set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); + return 0; +} + +static struct +irq_host_ops cpld_pic_host_ops = { + .match = cpld_pic_host_match, + .map = cpld_pic_host_map, +}; + +void __init +mpc5121_ads_cpld_map(void) +{ + struct device_node *np = NULL; + + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); + if (!np) { + printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); + return; + } + + cpld_regs = of_iomap(np, 0); + of_node_put(np); +} + +void __init +mpc5121_ads_cpld_pic_init(void) +{ + unsigned int cascade_irq; + struct device_node *np = NULL; + + pr_debug("cpld_ic_init\n"); + + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic"); + if (!np) { + printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n"); + return; + } + + if (!cpld_regs) + goto end; + + cascade_irq = irq_of_parse_and_map(np, 0); + if (cascade_irq == NO_IRQ) + goto end; + + /* + * statically route touch screen pendown through 1 + * and ignore it here + * route all others through our cascade irq + */ + out_8(&cpld_regs->route, 0xfd); + out_8(&cpld_regs->pci_mask, 0xff); + /* unmask pci ints in misc mask */ + out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE)); + + cpld_pic_node = of_node_get(np); + + cpld_pic_host = + irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16); + if (!cpld_pic_host) { + printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n"); + goto end; + } + + set_irq_chained_handler(cascade_irq, cpld_pic_cascade); +end: + of_node_put(np); +} diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c new file mode 100644 index 0000000000000000000000000000000000000000..2479de9e2d12ac2f757312ca68220123d5e84b43 --- /dev/null +++ b/arch/powerpc/platforms/512x/mpc5121_generic.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: John Rigby, + * + * Description: + * MPC5121 SoC setup + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include + +#include +#include +#include +#include + +#include "mpc512x.h" + +/* + * list of supported boards + */ +static char *board[] __initdata = { + "prt,prtlvt", + NULL +}; + +/* + * Called very early, MMU is off, device-tree isn't unflattened + */ +static int __init mpc5121_generic_probe(void) +{ + unsigned long node = of_get_flat_dt_root(); + int i = 0; + + while (board[i]) { + if (of_flat_dt_is_compatible(node, board[i])) + break; + i++; + } + + return board[i] != NULL; +} + +define_machine(mpc5121_generic) { + .name = "MPC5121 generic", + .probe = mpc5121_generic_probe, + .init = mpc512x_declare_of_platform_devices, + .init_IRQ = mpc512x_init_IRQ, + .get_irq = ipic_get_irq, + .calibrate_decr = generic_calibrate_decr, +}; diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h new file mode 100644 index 0000000000000000000000000000000000000000..9c03693cb0097ae1c6a5dd7ece523ad36fbaddd5 --- /dev/null +++ b/arch/powerpc/platforms/512x/mpc512x.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Prototypes for MPC512x shared code + */ + +#ifndef __MPC512X_H__ +#define __MPC512X_H__ +extern unsigned long mpc512x_find_ips_freq(struct device_node *node); +extern void __init mpc512x_init_IRQ(void); +void __init mpc512x_declare_of_platform_devices(void); +#endif /* __MPC512X_H__ */ diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c new file mode 100644 index 0000000000000000000000000000000000000000..d8cd579f3191b8955e897f7be21d0912105763ae --- /dev/null +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c @@ -0,0 +1,83 @@ +/* + * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: John Rigby + * + * Description: + * MPC512x Shared code + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "mpc512x.h" + +unsigned long +mpc512x_find_ips_freq(struct device_node *node) +{ + struct device_node *np; + const unsigned int *p_ips_freq = NULL; + + of_node_get(node); + while (node) { + p_ips_freq = of_get_property(node, "bus-frequency", NULL); + if (p_ips_freq) + break; + + np = of_get_parent(node); + of_node_put(node); + node = np; + } + if (node) + of_node_put(node); + + return p_ips_freq ? *p_ips_freq : 0; +} +EXPORT_SYMBOL(mpc512x_find_ips_freq); + +void __init mpc512x_init_IRQ(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic"); + if (!np) + return; + + ipic_init(np, 0); + of_node_put(np); + + /* + * Initialize the default interrupt mapping priorities, + * in case the boot rom changed something on us. + */ + ipic_set_default_priority(); +} + +/* + * Nodes to do bus probe on, soc and localbus + */ +static struct of_device_id __initdata of_bus_ids[] = { + { .compatible = "fsl,mpc5121-immr", }, + { .compatible = "fsl,mpc5121-localbus", }, + {}, +}; + +void __init mpc512x_declare_of_platform_devices(void) +{ + if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) + printk(KERN_ERR __FILE__ ": " + "Error while probing of_platform bus\n"); +} + diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig index acd2fc8cf492086c83fecc7f69469c62b7c03c06..696a5ee4962d20c81737b5a36db3ece5a13041bd 100644 --- a/arch/powerpc/platforms/52xx/Kconfig +++ b/arch/powerpc/platforms/52xx/Kconfig @@ -1,8 +1,8 @@ config PPC_MPC52xx bool "52xx-based boards" depends on PPC_MULTIPLATFORM && PPC32 - select FSL_SOC select PPC_CLOCK + select PPC_PCI_CHOICE config PPC_MPC5200_SIMPLE bool "Generic support for simple MPC5200 based boards" @@ -47,6 +47,7 @@ config PPC_MPC5200_BUGFIX config PPC_MPC5200_GPIO bool "MPC5200 GPIO support" depends on PPC_MPC52xx - select HAVE_GPIO_LIB + select ARCH_REQUIRE_GPIOLIB + select GENERIC_GPIO help Enable gpiolib support for mpc5200 based boards diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c index e3428ddd9040df88e77380775a0f9cc688fb7824..5a382bb15f6266a8c8835c9e8eef4d2951dc84ae 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c @@ -63,6 +63,7 @@ #define MPC52xx_PCI_TCR_P 0x01000000 #define MPC52xx_PCI_TCR_LD 0x00010000 +#define MPC52xx_PCI_TCR_WCT8 0x00000008 #define MPC52xx_PCI_TBATR_DISABLE 0x0 #define MPC52xx_PCI_TBATR_ENABLE 0x1 @@ -313,7 +314,7 @@ mpc52xx_pci_setup(struct pci_controller *hose, out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM ); - out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD); + out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8); tmp = in_be32(&pci_regs->gscr); #if 0 diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig index 917ac889155531eae452b8f39d20ece1385b6154..75eb1ede54978a26af11f5fc791febbb459aa647 100644 --- a/arch/powerpc/platforms/82xx/Kconfig +++ b/arch/powerpc/platforms/82xx/Kconfig @@ -1,7 +1,8 @@ -choice - prompt "82xx Board Type" - depends on PPC_82xx - default MPC8272_ADS +menuconfig PPC_82xx + bool "82xx-based boards (PQ II)" + depends on 6xx && PPC_MULTIPLATFORM + +if PPC_82xx config MPC8272_ADS bool "Freescale MPC8272 ADS" @@ -29,6 +30,7 @@ config EP8248E select 8272 select 8260 select FSL_SOC + select PHYLIB select MDIO_BITBANG help This enables support for the Embedded Planet EP8248E board. @@ -36,7 +38,7 @@ config EP8248E This board is also resold by Freescale as the QUICCStart MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE. -endchoice +endif config PQ2ADS bool diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c index 7d3018751988b4994d9024dca1dc38ce88b934f0..8054c685d323a50c90fc7506db4faa76447a6a1f 100644 --- a/arch/powerpc/platforms/82xx/mpc8272_ads.c +++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c @@ -96,6 +96,10 @@ static struct cpm_pin mpc8272_ads_pins[] = { {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + + /* I2C */ + {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, + {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, }; static void __init init_ioports(void) diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c index a8013816125c2df40ab5ca5fd25e9da0d60460c7..9876d7e072f46b3f825dc9df9683ac2b573cf1ae 100644 --- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c @@ -109,7 +109,7 @@ static int pci_pic_host_map(struct irq_host *h, unsigned int virq, { get_irq_desc(virq)->status |= IRQ_LEVEL; set_irq_chip_data(virq, h->host_data); - set_irq_chip(virq, &pq2ads_pci_ic); + set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); return 0; } diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 13587e2e8680cc29263bf10d485b5b034270ffc7..6159c5d4e5f1335d2fd3e7f44dbe887885dab183 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -1,10 +1,13 @@ -menuconfig MPC83xx - bool "83xx Board Type" - depends on PPC_83xx +menuconfig PPC_83xx + bool "83xx-based boards" + depends on 6xx && PPC_MULTIPLATFORM select PPC_UDBG_16550 - select PPC_INDIRECT_PCI + select PPC_PCI_CHOICE + select FSL_PCI if PCI + select FSL_SOC + select IPIC -if MPC83xx +if PPC_83xx config MPC831x_RDB bool "Freescale MPC831x RDB" @@ -58,6 +61,17 @@ config MPC836x_MDS help This option enables support for the MPC836x MDS Processor Board. +config MPC836x_RDK + bool "Freescale/Logic MPC836x RDK" + select DEFAULT_UIMAGE + select QUICC_ENGINE + select QE_GPIO + select FSL_GTM + select FSL_LBC + help + This option enables support for the MPC836x RDK Processor Board, + also known as ZOOM PowerQUICC Kit. + config MPC837x_MDS bool "Freescale MPC837x MDS" select DEFAULT_UIMAGE @@ -79,6 +93,15 @@ config SBC834x help This option enables support for the Wind River SBC834x board. +config ASP834x + bool "Analogue & Micro ASP 834x" + select PPC_MPC834x + select REDBOOT + help + This enables support for the Analogue & Micro ASP 83xx + board. + + endif # used for usb diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 7e6dd3e259d83c5f5edb7a218c3dfdbb82f9b6c4..ba5028e2989065a7484733b0833fda94fdf78354 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile @@ -2,13 +2,15 @@ # Makefile for the PowerPC 83xx linux kernel. # obj-y := misc.o usb.o -obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o +obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o obj-$(CONFIG_SBC834x) += sbc834x.o obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o +obj-$(CONFIG_ASP834x) += asp834x.o diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c new file mode 100644 index 0000000000000000000000000000000000000000..bb30d67ad0a28dfd2aa86a75114f402a6e368445 --- /dev/null +++ b/arch/powerpc/platforms/83xx/asp834x.c @@ -0,0 +1,90 @@ +/* + * arch/powerpc/platforms/83xx/asp834x.c + * + * Analogue & Micro ASP8347 board specific routines + * clone of mpc834x_itx + * + * Copyright 2008 Codehermit + * + * Maintainer: Bryan O'Donoghue + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include + +#include +#include +#include + +#include "mpc83xx.h" + +/* ************************************************************************ + * + * Setup the architecture + * + */ +static void __init asp834x_setup_arch(void) +{ + if (ppc_md.progress) + ppc_md.progress("asp834x_setup_arch()", 0); + + mpc834x_usb_cfg(); +} + +static void __init asp834x_init_IRQ(void) +{ + struct device_node *np; + + np = of_find_node_by_type(NULL, "ipic"); + if (!np) + return; + + ipic_init(np, 0); + + of_node_put(np); + + /* Initialize the default interrupt mapping priorities, + * in case the boot rom changed something on us. + */ + ipic_set_default_priority(); +} + +static struct __initdata of_device_id asp8347_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + { .compatible = "simple-bus", }, + {}, +}; + +static int __init asp8347_declare_of_platform_devices(void) +{ + of_platform_bus_probe(NULL, asp8347_ids, NULL); + return 0; +} +machine_device_initcall(asp834x, asp8347_declare_of_platform_devices); + +/* + * Called very early, MMU is off, device-tree isn't unflattened + */ +static int __init asp834x_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e"); +} + +define_machine(asp834x) { + .name = "ASP8347E", + .probe = asp834x_probe, + .setup_arch = asp834x_setup_arch, + .init_IRQ = asp834x_init_IRQ, + .get_irq = ipic_get_irq, + .restart = mpc83xx_restart, + .time_init = mpc83xx_time_init, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c index c4db5172b27ab34de9af690f8a1af8075565def8..a428f8d1ac80c0d1a8b16964f99286c6b36a5397 100644 --- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c index 6dbc6eabcb02a9465580e1b683e83f8fbf4c3ca4..dd4be4aee3149a3063ef002f6252373ea9c728aa 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c index e7f706b624feeb574a3e7f3a91d34c5b39192c0e..f049d692d4c82c16984abcb7ee935c7fd3773ce2 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 50e8f632061c88397321d8808ecfbf0093f40626..7301d77a08eec283184c30362bc1585c0427fed4 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c @@ -35,6 +35,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index 2b8a0a3f85573341749bdcc05fdb5b125d214d73..30d509aa9f082f610d59691e5031f25d78e40e89 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c @@ -35,6 +35,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c index c2e5de60c055242ac6384402fe177825fd0313cd..75b80e836576c1b214724653bab4c4d30c833fd6 100644 --- a/arch/powerpc/platforms/83xx/mpc836x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c @@ -42,6 +42,7 @@ #include #include #include +#include #include #include diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c new file mode 100644 index 0000000000000000000000000000000000000000..a5273bb28e1bcaa23d5fd19b3f2342d5b056adbb --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c @@ -0,0 +1,103 @@ +/* + * MPC8360E-RDK board file. + * + * Copyright (c) 2006 Freescale Semicondutor, Inc. + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mpc83xx.h" + +static struct of_device_id __initdata mpc836x_rdk_ids[] = { + { .compatible = "simple-bus", }, + {}, +}; + +static int __init mpc836x_rdk_declare_of_platform_devices(void) +{ + return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL); +} +machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices); + +static void __init mpc836x_rdk_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("mpc836x_rdk_setup_arch()", 0); + +#ifdef CONFIG_PCI + for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") + mpc83xx_add_bridge(np); +#endif + + qe_reset(); +} + +static void __init mpc836x_rdk_init_IRQ(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,ipic"); + if (!np) + return; + + ipic_init(np, 0); + + /* + * Initialize the default interrupt mapping priorities, + * in case the boot rom changed something on us. + */ + ipic_set_default_priority(); + of_node_put(np); + + np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); + if (!np) + return; + + qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); + of_node_put(np); +} + +/* + * Called very early, MMU is off, device-tree isn't unflattened. + */ +static int __init mpc836x_rdk_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk"); +} + +define_machine(mpc836x_rdk) { + .name = "MPC836x RDK", + .probe = mpc836x_rdk_probe, + .setup_arch = mpc836x_rdk_setup_arch, + .init_IRQ = mpc836x_rdk_init_IRQ, + .get_irq = ipic_get_irq, + .restart = mpc83xx_restart, + .time_init = mpc83xx_time_init, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c index 64d17b0d64555cbd4a29271b7f7122abed2caba0..be62de23beadc1748a3d391c51578ddb74c0a4fc 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_mds.c +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index c00356bdb1dda4d293d3dc57d97e8eaba0c2773f..da030afa2e2cd92039c82fe34f890cfb46f132c4 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index 88a3b5cabb18c5f18834110d62aa99952d940c78..2a7cbabb410a89ead86b06b481eedd8b3673a8ba 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h @@ -26,6 +26,8 @@ #define MPC834X_SICRL_USB1 0x20000000 #define MPC831X_SICRL_USB_MASK 0x00000c00 #define MPC831X_SICRL_USB_ULPI 0x00000800 +#define MPC8315_SICRL_USB_MASK 0x000000fc +#define MPC8315_SICRL_USB_ULPI 0x00000054 #define MPC837X_SICRL_USB_MASK 0xf0000000 #define MPC837X_SICRL_USB_ULPI 0x50000000 @@ -34,6 +36,8 @@ #define MPC834X_SICRH_USB_UTMI 0x00020000 #define MPC831X_SICRH_USB_MASK 0x000000e0 #define MPC831X_SICRH_USB_ULPI 0x000000a0 +#define MPC8315_SICRH_USB_MASK 0x0000ff00 +#define MPC8315_SICRH_USB_ULPI 0x00000000 /* USB Control Register */ #define FSL_USB2_CONTROL_OFFS 0x500 @@ -55,7 +59,6 @@ * mpc83xx_* files. Mostly for use by mpc83xx_setup */ -extern int mpc83xx_add_bridge(struct device_node *dev); extern void mpc83xx_restart(char *cmd); extern long mpc83xx_time_init(void); extern int mpc834x_usb_cfg(void); diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c deleted file mode 100644 index 14f1080c6c9d40c616eebbfbd37f0e26ead5b781..0000000000000000000000000000000000000000 --- a/arch/powerpc/platforms/83xx/pci.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * FSL SoC setup code - * - * Maintained by Kumar Gala (see MAINTAINERS for contact information) - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -int __init mpc83xx_add_bridge(struct device_node *dev) -{ - int len; - struct pci_controller *hose; - struct resource rsrc; - const int *bus_range; - int primary = 1, has_address = 0; - phys_addr_t immr = get_immrbase(); - - DBG("Adding PCI host bridge %s\n", dev->full_name); - - /* Fetch host bridge registers address */ - has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); - - /* Get bus range if any */ - bus_range = of_get_property(dev, "bus-range", &len); - if (bus_range == NULL || len < 2 * sizeof(int)) { - printk(KERN_WARNING "Can't get bus-range for %s, assume" - " bus 0\n", dev->full_name); - } - - ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; - hose = pcibios_alloc_controller(dev); - if (!hose) - return -ENOMEM; - - hose->first_busno = bus_range ? bus_range[0] : 0; - hose->last_busno = bus_range ? bus_range[1] : 0xff; - - /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar - * the other at 0x8600, we consider the 0x8500 the primary controller - */ - /* PCI 1 */ - if ((rsrc.start & 0xfffff) == 0x8500) { - setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0); - } - /* PCI 2 */ - if ((rsrc.start & 0xfffff) == 0x8600) { - setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0); - primary = 0; - } - - printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " - "Firmware bus number: %d->%d\n", - (unsigned long long)rsrc.start, hose->first_busno, - hose->last_busno); - - DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", - hose, hose->cfg_addr, hose->cfg_data); - - /* Interpret the "ranges" property */ - /* This also maps the I/O region and sets isa_io/mem_base */ - pci_process_bridge_OF_ranges(hose, dev, primary); - - return 0; -} diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c index cf382474a83d0cd92cdbe87a236df3b0384dcd9b..fc21f5c15bab43e30b3612ada5510020adfe3bc4 100644 --- a/arch/powerpc/platforms/83xx/sbc834x.c +++ b/arch/powerpc/platforms/83xx/sbc834x.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "mpc83xx.h" diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/powerpc/platforms/83xx/suspend-asm.S new file mode 100644 index 0000000000000000000000000000000000000000..1930543c98d3e5ba7028d5dc1310d1171605b521 --- /dev/null +++ b/arch/powerpc/platforms/83xx/suspend-asm.S @@ -0,0 +1,533 @@ +/* + * Enter and leave deep sleep state on MPC83xx + * + * Copyright (c) 2006-2008 Freescale Semiconductor, Inc. + * Author: Scott Wood + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#define SS_MEMSAVE 0x00 /* First 8 bytes of RAM */ +#define SS_HID 0x08 /* 3 HIDs */ +#define SS_IABR 0x14 /* 2 IABRs */ +#define SS_IBCR 0x1c +#define SS_DABR 0x20 /* 2 DABRs */ +#define SS_DBCR 0x28 +#define SS_SP 0x2c +#define SS_SR 0x30 /* 16 segment registers */ +#define SS_R2 0x70 +#define SS_MSR 0x74 +#define SS_SDR1 0x78 +#define SS_LR 0x7c +#define SS_SPRG 0x80 /* 4 SPRGs */ +#define SS_DBAT 0x90 /* 8 DBATs */ +#define SS_IBAT 0xd0 /* 8 IBATs */ +#define SS_TB 0x110 +#define SS_CR 0x118 +#define SS_GPREG 0x11c /* r12-r31 */ +#define STATE_SAVE_SIZE 0x16c + + .section .data + .align 5 + +mpc83xx_sleep_save_area: + .space STATE_SAVE_SIZE +immrbase: + .long 0 + + .section .text + .align 5 + + /* r3 = physical address of IMMR */ +_GLOBAL(mpc83xx_enter_deep_sleep) + lis r4, immrbase@ha + stw r3, immrbase@l(r4) + + /* The first 2 words of memory are used to communicate with the + * bootloader, to tell it how to resume. + * + * The first word is the magic number 0xf5153ae5, and the second + * is the pointer to mpc83xx_deep_resume. + * + * The original content of these two words is saved in SS_MEMSAVE. + */ + + lis r3, mpc83xx_sleep_save_area@h + ori r3, r3, mpc83xx_sleep_save_area@l + + lis r4, KERNELBASE@h + lwz r5, 0(r4) + lwz r6, 4(r4) + + stw r5, SS_MEMSAVE+0(r3) + stw r6, SS_MEMSAVE+4(r3) + + mfspr r5, SPRN_HID0 + mfspr r6, SPRN_HID1 + mfspr r7, SPRN_HID2 + + stw r5, SS_HID+0(r3) + stw r6, SS_HID+4(r3) + stw r7, SS_HID+8(r3) + + mfspr r4, SPRN_IABR + mfspr r5, SPRN_IABR2 + mfspr r6, SPRN_IBCR + mfspr r7, SPRN_DABR + mfspr r8, SPRN_DABR2 + mfspr r9, SPRN_DBCR + + stw r4, SS_IABR+0(r3) + stw r5, SS_IABR+4(r3) + stw r6, SS_IBCR(r3) + stw r7, SS_DABR+0(r3) + stw r8, SS_DABR+4(r3) + stw r9, SS_DBCR(r3) + + mfspr r4, SPRN_SPRG0 + mfspr r5, SPRN_SPRG1 + mfspr r6, SPRN_SPRG2 + mfspr r7, SPRN_SPRG3 + mfsdr1 r8 + + stw r4, SS_SPRG+0(r3) + stw r5, SS_SPRG+4(r3) + stw r6, SS_SPRG+8(r3) + stw r7, SS_SPRG+12(r3) + stw r8, SS_SDR1(r3) + + mfspr r4, SPRN_DBAT0U + mfspr r5, SPRN_DBAT0L + mfspr r6, SPRN_DBAT1U + mfspr r7, SPRN_DBAT1L + + stw r4, SS_DBAT+0x00(r3) + stw r5, SS_DBAT+0x04(r3) + stw r6, SS_DBAT+0x08(r3) + stw r7, SS_DBAT+0x0c(r3) + + mfspr r4, SPRN_DBAT2U + mfspr r5, SPRN_DBAT2L + mfspr r6, SPRN_DBAT3U + mfspr r7, SPRN_DBAT3L + + stw r4, SS_DBAT+0x10(r3) + stw r5, SS_DBAT+0x14(r3) + stw r6, SS_DBAT+0x18(r3) + stw r7, SS_DBAT+0x1c(r3) + + mfspr r4, SPRN_DBAT4U + mfspr r5, SPRN_DBAT4L + mfspr r6, SPRN_DBAT5U + mfspr r7, SPRN_DBAT5L + + stw r4, SS_DBAT+0x20(r3) + stw r5, SS_DBAT+0x24(r3) + stw r6, SS_DBAT+0x28(r3) + stw r7, SS_DBAT+0x2c(r3) + + mfspr r4, SPRN_DBAT6U + mfspr r5, SPRN_DBAT6L + mfspr r6, SPRN_DBAT7U + mfspr r7, SPRN_DBAT7L + + stw r4, SS_DBAT+0x30(r3) + stw r5, SS_DBAT+0x34(r3) + stw r6, SS_DBAT+0x38(r3) + stw r7, SS_DBAT+0x3c(r3) + + mfspr r4, SPRN_IBAT0U + mfspr r5, SPRN_IBAT0L + mfspr r6, SPRN_IBAT1U + mfspr r7, SPRN_IBAT1L + + stw r4, SS_IBAT+0x00(r3) + stw r5, SS_IBAT+0x04(r3) + stw r6, SS_IBAT+0x08(r3) + stw r7, SS_IBAT+0x0c(r3) + + mfspr r4, SPRN_IBAT2U + mfspr r5, SPRN_IBAT2L + mfspr r6, SPRN_IBAT3U + mfspr r7, SPRN_IBAT3L + + stw r4, SS_IBAT+0x10(r3) + stw r5, SS_IBAT+0x14(r3) + stw r6, SS_IBAT+0x18(r3) + stw r7, SS_IBAT+0x1c(r3) + + mfspr r4, SPRN_IBAT4U + mfspr r5, SPRN_IBAT4L + mfspr r6, SPRN_IBAT5U + mfspr r7, SPRN_IBAT5L + + stw r4, SS_IBAT+0x20(r3) + stw r5, SS_IBAT+0x24(r3) + stw r6, SS_IBAT+0x28(r3) + stw r7, SS_IBAT+0x2c(r3) + + mfspr r4, SPRN_IBAT6U + mfspr r5, SPRN_IBAT6L + mfspr r6, SPRN_IBAT7U + mfspr r7, SPRN_IBAT7L + + stw r4, SS_IBAT+0x30(r3) + stw r5, SS_IBAT+0x34(r3) + stw r6, SS_IBAT+0x38(r3) + stw r7, SS_IBAT+0x3c(r3) + + mfmsr r4 + mflr r5 + mfcr r6 + + stw r4, SS_MSR(r3) + stw r5, SS_LR(r3) + stw r6, SS_CR(r3) + stw r1, SS_SP(r3) + stw r2, SS_R2(r3) + +1: mftbu r4 + mftb r5 + mftbu r6 + cmpw r4, r6 + bne 1b + + stw r4, SS_TB+0(r3) + stw r5, SS_TB+4(r3) + + stmw r12, SS_GPREG(r3) + + li r4, 0 + addi r6, r3, SS_SR-4 +1: mfsrin r5, r4 + stwu r5, 4(r6) + addis r4, r4, 0x1000 + cmpwi r4, 0 + bne 1b + + /* Disable machine checks and critical exceptions */ + mfmsr r4 + rlwinm r4, r4, 0, ~MSR_CE + rlwinm r4, r4, 0, ~MSR_ME + mtmsr r4 + isync + +#define TMP_VIRT_IMMR 0xf0000000 +#define DEFAULT_IMMR_VALUE 0xff400000 +#define IMMRBAR_BASE 0x0000 + + lis r4, immrbase@ha + lwz r4, immrbase@l(r4) + + /* Use DBAT0 to address the current IMMR space */ + + ori r4, r4, 0x002a + mtspr SPRN_DBAT0L, r4 + lis r8, TMP_VIRT_IMMR@h + ori r4, r8, 0x001e /* 1 MByte accessable from Kernel Space only */ + mtspr SPRN_DBAT0U, r4 + isync + + /* Use DBAT1 to address the original IMMR space */ + + lis r4, DEFAULT_IMMR_VALUE@h + ori r4, r4, 0x002a + mtspr SPRN_DBAT1L, r4 + lis r9, (TMP_VIRT_IMMR + 0x01000000)@h + ori r4, r9, 0x001e /* 1 MByte accessable from Kernel Space only */ + mtspr SPRN_DBAT1U, r4 + isync + + /* Use DBAT2 to address the beginning of RAM. This isn't done + * using the normal virtual mapping, because with page debugging + * enabled it will be read-only. + */ + + li r4, 0x0002 + mtspr SPRN_DBAT2L, r4 + lis r4, KERNELBASE@h + ori r4, r4, 0x001e /* 1 MByte accessable from Kernel Space only */ + mtspr SPRN_DBAT2U, r4 + isync + + /* Flush the cache with our BAT, as there will be TLB misses + * otherwise if page debugging is enabled, and these misses + * will disturb the PLRU algorithm. + */ + + bl __flush_disable_L1 + + /* Keep the i-cache enabled, so the hack below for low-boot + * flash will work. + */ + mfspr r3, SPRN_HID0 + ori r3, r3, HID0_ICE + mtspr SPRN_HID0, r3 + isync + + lis r6, 0xf515 + ori r6, r6, 0x3ae5 + + lis r7, mpc83xx_deep_resume@h + ori r7, r7, mpc83xx_deep_resume@l + tophys(r7, r7) + + lis r5, KERNELBASE@h + stw r6, 0(r5) + stw r7, 4(r5) + + /* Reset BARs */ + + li r4, 0 + stw r4, 0x0024(r8) + stw r4, 0x002c(r8) + stw r4, 0x0034(r8) + stw r4, 0x003c(r8) + stw r4, 0x0064(r8) + stw r4, 0x006c(r8) + + /* Rev 1 of the 8313 has problems with wakeup events that are + * pending during the transition to deep sleep state (such as if + * the PCI host sets the state to D3 and then D0 in rapid + * succession). This check shrinks the race window somewhat. + * + * See erratum PCI23, though the problem is not limited + * to PCI. + */ + + lwz r3, 0x0b04(r8) + andi. r3, r3, 1 + bne- mpc83xx_deep_resume + + /* Move IMMR back to the default location, following the + * procedure specified in the MPC8313 manual. + */ + lwz r4, IMMRBAR_BASE(r8) + isync + lis r4, DEFAULT_IMMR_VALUE@h + stw r4, IMMRBAR_BASE(r8) + lis r4, KERNELBASE@h + lwz r4, 0(r4) + isync + lwz r4, IMMRBAR_BASE(r9) + mr r8, r9 + isync + + /* Check the Reset Configuration Word to see whether flash needs + * to be mapped at a low address or a high address. + */ + + lwz r4, 0x0904(r8) + andis. r4, r4, 0x0400 + li r4, 0 + beq boot_low + lis r4, 0xff80 +boot_low: + stw r4, 0x0020(r8) + lis r7, 0x8000 + ori r7, r7, 0x0016 + + mfspr r5, SPRN_HID0 + rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) + oris r5, r5, HID0_SLEEP@h + mtspr SPRN_HID0, r5 + isync + + mfmsr r5 + oris r5, r5, MSR_POW@h + + /* Enable the flash mapping at the appropriate address. This + * mapping will override the RAM mapping if booting low, so there's + * no need to disable the latter. This must be done inside the same + * cache line as setting MSR_POW, so that no instruction fetches + * from RAM happen after the flash mapping is turned on. + */ + + .align 5 + stw r7, 0x0024(r8) + sync + isync + mtmsr r5 + isync +1: b 1b + +mpc83xx_deep_resume: + lis r4, 1f@h + ori r4, r4, 1f@l + tophys(r4, r4) + mtsrr0 r4 + + mfmsr r4 + rlwinm r4, r4, 0, ~(MSR_IR | MSR_DR) + mtsrr1 r4 + + rfi + +1: tlbia + bl __inval_enable_L1 + + lis r3, mpc83xx_sleep_save_area@h + ori r3, r3, mpc83xx_sleep_save_area@l + tophys(r3, r3) + + lwz r5, SS_MEMSAVE+0(r3) + lwz r6, SS_MEMSAVE+4(r3) + + stw r5, 0(0) + stw r6, 4(0) + + lwz r5, SS_HID+0(r3) + lwz r6, SS_HID+4(r3) + lwz r7, SS_HID+8(r3) + + mtspr SPRN_HID0, r5 + mtspr SPRN_HID1, r6 + mtspr SPRN_HID2, r7 + + lwz r4, SS_IABR+0(r3) + lwz r5, SS_IABR+4(r3) + lwz r6, SS_IBCR(r3) + lwz r7, SS_DABR+0(r3) + lwz r8, SS_DABR+4(r3) + lwz r9, SS_DBCR(r3) + + mtspr SPRN_IABR, r4 + mtspr SPRN_IABR2, r5 + mtspr SPRN_IBCR, r6 + mtspr SPRN_DABR, r7 + mtspr SPRN_DABR2, r8 + mtspr SPRN_DBCR, r9 + + li r4, 0 + addi r6, r3, SS_SR-4 +1: lwzu r5, 4(r6) + mtsrin r5, r4 + addis r4, r4, 0x1000 + cmpwi r4, 0 + bne 1b + + lwz r4, SS_DBAT+0x00(r3) + lwz r5, SS_DBAT+0x04(r3) + lwz r6, SS_DBAT+0x08(r3) + lwz r7, SS_DBAT+0x0c(r3) + + mtspr SPRN_DBAT0U, r4 + mtspr SPRN_DBAT0L, r5 + mtspr SPRN_DBAT1U, r6 + mtspr SPRN_DBAT1L, r7 + + lwz r4, SS_DBAT+0x10(r3) + lwz r5, SS_DBAT+0x14(r3) + lwz r6, SS_DBAT+0x18(r3) + lwz r7, SS_DBAT+0x1c(r3) + + mtspr SPRN_DBAT2U, r4 + mtspr SPRN_DBAT2L, r5 + mtspr SPRN_DBAT3U, r6 + mtspr SPRN_DBAT3L, r7 + + lwz r4, SS_DBAT+0x20(r3) + lwz r5, SS_DBAT+0x24(r3) + lwz r6, SS_DBAT+0x28(r3) + lwz r7, SS_DBAT+0x2c(r3) + + mtspr SPRN_DBAT4U, r4 + mtspr SPRN_DBAT4L, r5 + mtspr SPRN_DBAT5U, r6 + mtspr SPRN_DBAT5L, r7 + + lwz r4, SS_DBAT+0x30(r3) + lwz r5, SS_DBAT+0x34(r3) + lwz r6, SS_DBAT+0x38(r3) + lwz r7, SS_DBAT+0x3c(r3) + + mtspr SPRN_DBAT6U, r4 + mtspr SPRN_DBAT6L, r5 + mtspr SPRN_DBAT7U, r6 + mtspr SPRN_DBAT7L, r7 + + lwz r4, SS_IBAT+0x00(r3) + lwz r5, SS_IBAT+0x04(r3) + lwz r6, SS_IBAT+0x08(r3) + lwz r7, SS_IBAT+0x0c(r3) + + mtspr SPRN_IBAT0U, r4 + mtspr SPRN_IBAT0L, r5 + mtspr SPRN_IBAT1U, r6 + mtspr SPRN_IBAT1L, r7 + + lwz r4, SS_IBAT+0x10(r3) + lwz r5, SS_IBAT+0x14(r3) + lwz r6, SS_IBAT+0x18(r3) + lwz r7, SS_IBAT+0x1c(r3) + + mtspr SPRN_IBAT2U, r4 + mtspr SPRN_IBAT2L, r5 + mtspr SPRN_IBAT3U, r6 + mtspr SPRN_IBAT3L, r7 + + lwz r4, SS_IBAT+0x20(r3) + lwz r5, SS_IBAT+0x24(r3) + lwz r6, SS_IBAT+0x28(r3) + lwz r7, SS_IBAT+0x2c(r3) + + mtspr SPRN_IBAT4U, r4 + mtspr SPRN_IBAT4L, r5 + mtspr SPRN_IBAT5U, r6 + mtspr SPRN_IBAT5L, r7 + + lwz r4, SS_IBAT+0x30(r3) + lwz r5, SS_IBAT+0x34(r3) + lwz r6, SS_IBAT+0x38(r3) + lwz r7, SS_IBAT+0x3c(r3) + + mtspr SPRN_IBAT6U, r4 + mtspr SPRN_IBAT6L, r5 + mtspr SPRN_IBAT7U, r6 + mtspr SPRN_IBAT7L, r7 + + lwz r4, SS_SPRG+0(r3) + lwz r5, SS_SPRG+4(r3) + lwz r6, SS_SPRG+8(r3) + lwz r7, SS_SPRG+12(r3) + lwz r8, SS_SDR1(r3) + + mtspr SPRN_SPRG0, r4 + mtspr SPRN_SPRG1, r5 + mtspr SPRN_SPRG2, r6 + mtspr SPRN_SPRG3, r7 + mtsdr1 r8 + + lwz r4, SS_MSR(r3) + lwz r5, SS_LR(r3) + lwz r6, SS_CR(r3) + lwz r1, SS_SP(r3) + lwz r2, SS_R2(r3) + + mtsrr1 r4 + mtsrr0 r5 + mtcr r6 + + li r4, 0 + mtspr SPRN_TBWL, r4 + + lwz r4, SS_TB+0(r3) + lwz r5, SS_TB+4(r3) + + mtspr SPRN_TBWU, r4 + mtspr SPRN_TBWL, r5 + + lmw r12, SS_GPREG(r3) + + /* Kick decrementer */ + li r0, 1 + mtdec r0 + + rfi diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c new file mode 100644 index 0000000000000000000000000000000000000000..08e65fc8b98cfd4382f626b90badd3ddddf4e995 --- /dev/null +++ b/arch/powerpc/platforms/83xx/suspend.c @@ -0,0 +1,388 @@ +/* + * MPC83xx suspend support + * + * Author: Scott Wood + * + * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */ +#define PMCCR1_NEXT_STATE_SHIFT 2 +#define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/ +#define IMMR_RCW_OFFSET 0x900 +#define RCW_PCI_HOST 0x80000000 + +void mpc83xx_enter_deep_sleep(phys_addr_t immrbase); + +struct mpc83xx_pmc { + u32 config; +#define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */ +#define PMCCR_SLPEN 1 /* System low power enable */ + + u32 event; + u32 mask; +/* All but PMCI are deep-sleep only */ +#define PMCER_GPIO 0x100 +#define PMCER_PCI 0x080 +#define PMCER_USB 0x040 +#define PMCER_ETSEC1 0x020 +#define PMCER_ETSEC2 0x010 +#define PMCER_TIMER 0x008 +#define PMCER_INT1 0x004 +#define PMCER_INT2 0x002 +#define PMCER_PMCI 0x001 +#define PMCER_ALL 0x1FF + + /* deep-sleep only */ + u32 config1; +#define PMCCR1_USE_STATE 0x80000000 +#define PMCCR1_PME_EN 0x00000080 +#define PMCCR1_ASSERT_PME 0x00000040 +#define PMCCR1_POWER_OFF 0x00000020 + + /* deep-sleep only */ + u32 config2; +}; + +struct mpc83xx_rcw { + u32 rcwlr; + u32 rcwhr; +}; + +struct mpc83xx_clock { + u32 spmr; + u32 occr; + u32 sccr; +}; + +struct pmc_type { + int has_deep_sleep; +}; + +static struct of_device *pmc_dev; +static int has_deep_sleep, deep_sleeping; +static int pmc_irq; +static struct mpc83xx_pmc __iomem *pmc_regs; +static struct mpc83xx_clock __iomem *clock_regs; +static int is_pci_agent, wake_from_pci; +static phys_addr_t immrbase; +static int pci_pm_state; +static DECLARE_WAIT_QUEUE_HEAD(agent_wq); + +int fsl_deep_sleep(void) +{ + return deep_sleeping; +} + +static int mpc83xx_change_state(void) +{ + u32 curr_state; + u32 reg_cfg1 = in_be32(&pmc_regs->config1); + + if (is_pci_agent) { + pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >> + PMCCR1_NEXT_STATE_SHIFT; + curr_state = reg_cfg1 & PMCCR1_CURR_STATE; + + if (curr_state != pci_pm_state) { + reg_cfg1 &= ~PMCCR1_CURR_STATE; + reg_cfg1 |= pci_pm_state; + out_be32(&pmc_regs->config1, reg_cfg1); + + wake_up(&agent_wq); + return 1; + } + } + + return 0; +} + +static irqreturn_t pmc_irq_handler(int irq, void *dev_id) +{ + u32 event = in_be32(&pmc_regs->event); + int ret = IRQ_NONE; + + if (mpc83xx_change_state()) + ret = IRQ_HANDLED; + + if (event) { + out_be32(&pmc_regs->event, event); + ret = IRQ_HANDLED; + } + + return ret; +} + +static int mpc83xx_suspend_enter(suspend_state_t state) +{ + int ret = -EAGAIN; + + /* Don't go to sleep if there's a race where pci_pm_state changes + * between the agent thread checking it and the PM code disabling + * interrupts. + */ + if (wake_from_pci) { + if (pci_pm_state != (deep_sleeping ? 3 : 2)) + goto out; + + out_be32(&pmc_regs->config1, + in_be32(&pmc_regs->config1) | PMCCR1_PME_EN); + } + + /* Put the system into low-power mode and the RAM + * into self-refresh mode once the core goes to + * sleep. + */ + + out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN); + + /* If it has deep sleep (i.e. it's an 831x or compatible), + * disable power to the core upon entering sleep mode. This will + * require going through the boot firmware upon a wakeup event. + */ + + if (deep_sleeping) { + out_be32(&pmc_regs->mask, PMCER_ALL); + + out_be32(&pmc_regs->config1, + in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF); + + enable_kernel_fp(); + + mpc83xx_enter_deep_sleep(immrbase); + + out_be32(&pmc_regs->config1, + in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF); + + out_be32(&pmc_regs->mask, PMCER_PMCI); + } else { + out_be32(&pmc_regs->mask, PMCER_PMCI); + + mpc6xx_enter_standby(); + } + + ret = 0; + +out: + out_be32(&pmc_regs->config1, + in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN); + + return ret; +} + +static void mpc83xx_suspend_finish(void) +{ + deep_sleeping = 0; +} + +static int mpc83xx_suspend_valid(suspend_state_t state) +{ + return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM; +} + +static int mpc83xx_suspend_begin(suspend_state_t state) +{ + switch (state) { + case PM_SUSPEND_STANDBY: + deep_sleeping = 0; + return 0; + + case PM_SUSPEND_MEM: + if (has_deep_sleep) + deep_sleeping = 1; + + return 0; + + default: + return -EINVAL; + } +} + +static int agent_thread_fn(void *data) +{ + while (1) { + wait_event_interruptible(agent_wq, pci_pm_state >= 2); + try_to_freeze(); + + if (signal_pending(current) || pci_pm_state < 2) + continue; + + /* With a preemptible kernel (or SMP), this could race with + * a userspace-driven suspend request. It's probably best + * to avoid mixing the two with such a configuration (or + * else fix it by adding a mutex to state_store that we can + * synchronize with). + */ + + wake_from_pci = 1; + + pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM : + PM_SUSPEND_STANDBY); + + wake_from_pci = 0; + } + + return 0; +} + +static void mpc83xx_set_agent(void) +{ + out_be32(&pmc_regs->config1, PMCCR1_USE_STATE); + out_be32(&pmc_regs->mask, PMCER_PMCI); + + kthread_run(agent_thread_fn, NULL, "PCI power mgt"); +} + +static int mpc83xx_is_pci_agent(void) +{ + struct mpc83xx_rcw __iomem *rcw_regs; + int ret; + + rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET, + sizeof(struct mpc83xx_rcw)); + + if (!rcw_regs) + return -ENOMEM; + + ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST); + + iounmap(rcw_regs); + return ret; +} + +static struct platform_suspend_ops mpc83xx_suspend_ops = { + .valid = mpc83xx_suspend_valid, + .begin = mpc83xx_suspend_begin, + .enter = mpc83xx_suspend_enter, + .finish = mpc83xx_suspend_finish, +}; + +static int pmc_probe(struct of_device *ofdev, + const struct of_device_id *match) +{ + struct device_node *np = ofdev->node; + struct resource res; + struct pmc_type *type = match->data; + int ret = 0; + + if (!of_device_is_available(np)) + return -ENODEV; + + has_deep_sleep = type->has_deep_sleep; + immrbase = get_immrbase(); + pmc_dev = ofdev; + + is_pci_agent = mpc83xx_is_pci_agent(); + if (is_pci_agent < 0) + return is_pci_agent; + + ret = of_address_to_resource(np, 0, &res); + if (ret) + return -ENODEV; + + pmc_irq = irq_of_parse_and_map(np, 0); + if (pmc_irq != NO_IRQ) { + ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED, + "pmc", ofdev); + + if (ret) + return -EBUSY; + } + + pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc)); + + if (!pmc_regs) { + ret = -ENOMEM; + goto out; + } + + ret = of_address_to_resource(np, 1, &res); + if (ret) { + ret = -ENODEV; + goto out_pmc; + } + + clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc)); + + if (!clock_regs) { + ret = -ENOMEM; + goto out_pmc; + } + + if (is_pci_agent) + mpc83xx_set_agent(); + + suspend_set_ops(&mpc83xx_suspend_ops); + return 0; + +out_pmc: + iounmap(pmc_regs); +out: + if (pmc_irq != NO_IRQ) + free_irq(pmc_irq, ofdev); + + return ret; +} + +static int pmc_remove(struct of_device *ofdev) +{ + return -EPERM; +}; + +static struct pmc_type pmc_types[] = { + { + .has_deep_sleep = 1, + }, + { + .has_deep_sleep = 0, + } +}; + +static struct of_device_id pmc_match[] = { + { + .compatible = "fsl,mpc8313-pmc", + .data = &pmc_types[0], + }, + { + .compatible = "fsl,mpc8349-pmc", + .data = &pmc_types[1], + }, + {} +}; + +static struct of_platform_driver pmc_driver = { + .name = "mpc83xx-pmc", + .match_table = pmc_match, + .probe = pmc_probe, + .remove = pmc_remove +}; + +static int pmc_init(void) +{ + return of_register_platform_driver(&pmc_driver); +} + +module_init(pmc_init); diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c index 64bcf0a33c71903fa3978de2c28d9b4df8c4bbba..cc99c280aad943ea93631a51de1399db5a90565a 100644 --- a/arch/powerpc/platforms/83xx/usb.c +++ b/arch/powerpc/platforms/83xx/usb.c @@ -137,15 +137,21 @@ int mpc831x_usb_cfg(void) /* Configure pin mux for ULPI. There is no pin mux for UTMI */ if (prop && !strcmp(prop, "ulpi")) { - temp = in_be32(immap + MPC83XX_SICRL_OFFS); - temp &= ~MPC831X_SICRL_USB_MASK; - temp |= MPC831X_SICRL_USB_ULPI; - out_be32(immap + MPC83XX_SICRL_OFFS, temp); - - temp = in_be32(immap + MPC83XX_SICRH_OFFS); - temp &= ~MPC831X_SICRH_USB_MASK; - temp |= MPC831X_SICRH_USB_ULPI; - out_be32(immap + MPC83XX_SICRH_OFFS, temp); + if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) { + clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, + MPC8315_SICRL_USB_MASK, + MPC8315_SICRL_USB_ULPI); + clrsetbits_be32(immap + MPC83XX_SICRH_OFFS, + MPC8315_SICRH_USB_MASK, + MPC8315_SICRH_USB_ULPI); + } else { + clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, + MPC831X_SICRL_USB_MASK, + MPC831X_SICRL_USB_ULPI); + clrsetbits_be32(immap + MPC83XX_SICRH_OFFS, + MPC831X_SICRH_USB_MASK, + MPC831X_SICRH_USB_ULPI); + } } iounmap(immap); diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index ecbe580c3f32f056152186a1c292bfc370215a95..291675b0097a902d620b9f203857d925ce919127 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -2,8 +2,8 @@ menuconfig MPC85xx bool "Machine Type" depends on PPC_85xx select PPC_UDBG_16550 - select PPC_INDIRECT_PCI if PCI select MPIC + select PPC_PCI_CHOICE select FSL_PCI if PCI select SERIAL_8250_SHARE_IRQ if SERIAL_8250 default y @@ -38,6 +38,12 @@ config MPC85xx_MDS help This option enables support for the MPC85xx MDS board +config MPC8536_DS + bool "Freescale MPC8536 DS" + select DEFAULT_UIMAGE + help + This option enables support for the MPC8536 DS board + config MPC85xx_DS bool "Freescale MPC85xx DS" select PPC_I8259 @@ -75,6 +81,13 @@ config TQM8541 select TQM85xx select CPM2 +config TQM8548 + bool "TQ Components TQM8548" + help + This option enables support for the TQ Components TQM8548 board. + select DEFAULT_UIMAGE + select TQM85xx + config TQM8555 bool "TQ Components TQM8555" help diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 6cea185f62b29fb5252a69fc14e6b7f52842f600..cb3054e1001d406661c8e6791e668b5f082494db 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o +obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o obj-$(CONFIG_STX_GP3) += stx_gp3.o diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c new file mode 100644 index 0000000000000000000000000000000000000000..6b846aa1ced92e18cb383da73f0371e08b4f0fdb --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c @@ -0,0 +1,125 @@ +/* + * MPC8536 DS Board Setup + * + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +void __init mpc8536_ds_pic_init(void) +{ + struct mpic *mpic; + struct resource r; + struct device_node *np; + + np = of_find_node_by_type(NULL, "open-pic"); + if (np == NULL) { + printk(KERN_ERR "Could not find open-pic node\n"); + return; + } + + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Failed to map mpic register space\n"); + of_node_put(np); + return; + } + + mpic = mpic_alloc(np, r.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, + 0, 256, " OpenPIC "); + BUG_ON(mpic == NULL); + of_node_put(np); + + mpic_init(mpic); +} + +/* + * Setup the architecture + */ +static void __init mpc8536_ds_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("mpc8536_ds_setup_arch()", 0); + +#ifdef CONFIG_PCI + for_each_node_by_type(np, "pci") { + if (of_device_is_compatible(np, "fsl,mpc8540-pci") || + of_device_is_compatible(np, "fsl,mpc8548-pcie")) { + struct resource rsrc; + of_address_to_resource(np, 0, &rsrc); + if ((rsrc.start & 0xfffff) == 0x8000) + fsl_add_bridge(np, 1); + else + fsl_add_bridge(np, 0); + } + } + +#endif + + printk("MPC8536 DS board from Freescale Semiconductor\n"); +} + +static struct of_device_id __initdata mpc8536_ds_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + {}, +}; + +static int __init mpc8536_ds_publish_devices(void) +{ + return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL); +} +machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices); + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init mpc8536_ds_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "fsl,mpc8536ds"); +} + +define_machine(mpc8536_ds) { + .name = "MPC8536 DS", + .probe = mpc8536_ds_probe, + .setup_arch = mpc8536_ds_setup_arch, + .init_IRQ = mpc8536_ds_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif + .get_irq = mpic_get_irq, + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 3582c841844b377c76a1e55d53a4a10df6920080..ba498d6f2d024c118a78bd6cfa1fb49f554c064f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -119,6 +119,8 @@ static const struct cpm_pin mpc8560_ads_pins[] = { {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* SCC2 */ + {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, @@ -145,7 +147,6 @@ static const struct cpm_pin mpc8560_ads_pins[] = { {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, - {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, @@ -156,8 +157,9 @@ static const struct cpm_pin mpc8560_ads_pins[] = { {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ - {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ + {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */ + {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */ + {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, }; static void __init init_ioports(void) diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 8b1de7884be6e8d8e0d2182ec5fc04149f8209a8..50d7ea8f922b4d0addd159af5e518f6cb05b2f30 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -335,6 +336,19 @@ static int __init mpc85xx_cds_probe(void) return of_flat_dt_is_compatible(root, "MPC85xxCDS"); } +static struct of_device_id __initdata of_bus_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + { .compatible = "simple-bus", }, + {}, +}; + +static int __init declare_of_platform_devices(void) +{ + return of_platform_bus_probe(NULL, of_bus_ids, NULL); +} +machine_device_initcall(mpc85xx_cds, declare_of_platform_devices); + define_machine(mpc85xx_cds) { .name = "MPC85xx CDS", .probe = mpc85xx_cds_probe, diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index dfd8b4ad9b2854835ad27b9fe794a60b20537a81..00c535806647993b6de07ff5e14eb5e06ddd109f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -58,14 +58,13 @@ void __init mpc85xx_ds_pic_init(void) { struct mpic *mpic; struct resource r; - struct device_node *np = NULL; + struct device_node *np; #ifdef CONFIG_PPC_I8259 struct device_node *cascade_node = NULL; int cascade_irq; #endif - np = of_find_node_by_type(np, "open-pic"); - + np = of_find_node_by_type(NULL, "open-pic"); if (np == NULL) { printk(KERN_ERR "Could not find open-pic node\n"); return; @@ -78,9 +77,11 @@ void __init mpc85xx_ds_pic_init(void) } mpic = mpic_alloc(np, r.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, + MPIC_PRIMARY | MPIC_WANTS_RESET | + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, 0, 256, " OpenPIC "); BUG_ON(mpic == NULL); + of_node_put(np); mpic_init(mpic); @@ -114,7 +115,6 @@ void __init mpc85xx_ds_pic_init(void) #ifdef CONFIG_PCI static int primary_phb_addr; -extern int uses_fsl_uli_m1575; extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); @@ -160,7 +160,6 @@ static void __init mpc85xx_ds_setup_arch(void) } } - uses_fsl_uli_m1575 = 1; ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif @@ -184,7 +183,7 @@ static int __init mpc8544_ds_probe(void) } } -static struct of_device_id mpc85xxds_ids[] = { +static struct of_device_id __initdata mpc85xxds_ids[] = { { .type = "soc", }, { .compatible = "soc", }, {}, @@ -195,6 +194,7 @@ static int __init mpc85xxds_publish_devices(void) return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); } machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); +machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 77681acf1bae1474ec64e5335d1b4cde7e2ff33c..d850880d6964b12d6b620746cb5f73e24945a4fe 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c @@ -120,8 +120,18 @@ static void __init tqm85xx_setup_arch(void) #endif #ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); + for_each_node_by_type(np, "pci") { + if (of_device_is_compatible(np, "fsl,mpc8540-pci") || + of_device_is_compatible(np, "fsl,mpc8548-pcie")) { + struct resource rsrc; + if (!of_address_to_resource(np, 0, &rsrc)) { + if ((rsrc.start & 0xfffff) == 0x8000) + fsl_add_bridge(np, 1); + else + fsl_add_bridge(np, 0); + } + } + } #endif } @@ -165,10 +175,11 @@ static int __init tqm85xx_probe(void) { unsigned long root = of_get_flat_dt_root(); - if ((of_flat_dt_is_compatible(root, "tqm,8540")) || - (of_flat_dt_is_compatible(root, "tqm,8541")) || - (of_flat_dt_is_compatible(root, "tqm,8555")) || - (of_flat_dt_is_compatible(root, "tqm,8560"))) + if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) || + (of_flat_dt_is_compatible(root, "tqc,tqm8541")) || + (of_flat_dt_is_compatible(root, "tqc,tqm8548")) || + (of_flat_dt_is_compatible(root, "tqc,tqm8555")) || + (of_flat_dt_is_compatible(root, "tqc,tqm8560"))) return 1; return 0; diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 053f49a1dcae6ca2a366ff03f77ab5421e5cced2..9355a52694314573d9960ccb292ef42d22b7e704 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig @@ -1,7 +1,13 @@ -choice - prompt "86xx Board Type" - depends on PPC_86xx - default MPC8641_HPCN +config PPC_86xx +menuconfig PPC_86xx + bool "86xx-based boards" + depends on 6xx && PPC_MULTIPLATFORM + select FSL_SOC + select ALTIVEC + help + The Freescale E600 SoCs have 74xx cores. + +if PPC_86xx config MPC8641_HPCN bool "Freescale MPC8641 HPCN" @@ -21,13 +27,15 @@ config SBC8641D config MPC8610_HPCD bool "Freescale MPC8610 HPCD" select DEFAULT_UIMAGE + select FSL_ULI1575 help This option enables support for the MPC8610 HPCD board. -endchoice +endif config MPC8641 bool + select PPC_PCI_CHOICE select FSL_PCI if PCI select PPC_UDBG_16550 select MPIC @@ -35,6 +43,7 @@ config MPC8641 config MPC8610 bool + select PPC_PCI_CHOICE select FSL_PCI if PCI select PPC_UDBG_16550 select MPIC diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile index 1b9b4a9b2525cd3a7bd0ae2117d9fba50c03fb81..8fee37dec79517ffb344f20398e34361df748e34 100644 --- a/arch/powerpc/platforms/86xx/Makefile +++ b/arch/powerpc/platforms/86xx/Makefile @@ -2,6 +2,7 @@ # Makefile for the PowerPC 86xx linux kernel. # +obj-y := pic.o obj-$(CONFIG_SMP) += mpc86xx_smp.o obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o obj-$(CONFIG_SBC8641D) += sbc8641d.o diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index dea13208bf64d618f787ad748115814995dcad4a..5eedb710896e7568b8fc29cb1c78b1f7f5def81b 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c @@ -39,6 +39,8 @@ #include #include +#include "mpc86xx.h" + static unsigned char *pixis_bdcfg0, *pixis_arch; static struct of_device_id __initdata mpc8610_ids[] = { @@ -56,114 +58,6 @@ static int __init mpc8610_declare_of_platform_devices(void) } machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); -static void __init mpc86xx_hpcd_init_irq(void) -{ - struct mpic *mpic1; - struct device_node *np; - struct resource res; - - /* Determine PIC address. */ - np = of_find_node_by_type(NULL, "open-pic"); - if (np == NULL) - return; - of_address_to_resource(np, 0, &res); - - /* Alloc mpic structure and per isu has 16 INT entries. */ - mpic1 = mpic_alloc(np, res.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, - 0, 256, " MPIC "); - BUG_ON(mpic1 == NULL); - - mpic_init(mpic1); -} - -#ifdef CONFIG_PCI -static void __devinit quirk_uli1575(struct pci_dev *dev) -{ - u32 temp32; - - /* Disable INTx */ - pci_read_config_dword(dev, 0x48, &temp32); - pci_write_config_dword(dev, 0x48, (temp32 | 1<<26)); - - /* Enable sideband interrupt */ - pci_read_config_dword(dev, 0x90, &temp32); - pci_write_config_dword(dev, 0x90, (temp32 | 1<<22)); -} - -static void __devinit quirk_uli5288(struct pci_dev *dev) -{ - unsigned char c; - unsigned short temp; - - /* Interrupt Disable, Needed when SATA disabled */ - pci_read_config_word(dev, PCI_COMMAND, &temp); - temp |= 1<<10; - pci_write_config_word(dev, PCI_COMMAND, temp); - - pci_read_config_byte(dev, 0x83, &c); - c |= 0x80; - pci_write_config_byte(dev, 0x83, c); - - pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01); - pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06); - - pci_read_config_byte(dev, 0x83, &c); - c &= 0x7f; - pci_write_config_byte(dev, 0x83, c); -} - -/* - * Since 8259PIC was disabled on the board, the IDE device can not - * use the legacy IRQ, we need to let the IDE device work under - * native mode and use the interrupt line like other PCI devices. - * IRQ14 is a sideband interrupt from IDE device to CPU and we use this - * as the interrupt for IDE device. - */ -static void __devinit quirk_uli5229(struct pci_dev *dev) -{ - unsigned char c; - - pci_read_config_byte(dev, 0x4b, &c); - c |= 0x10; - pci_write_config_byte(dev, 0x4b, c); -} - -/* - * SATA interrupt pin bug fix - * There's a chip bug for 5288, The interrupt pin should be 2, - * not the read only value 1, So it use INTB#, not INTA# which - * actually used by the IDE device 5229. - * As of this bug, during the PCI initialization, 5288 read the - * irq of IDE device from the device tree, this function fix this - * bug by re-assigning a correct irq to 5288. - * - */ -static void __devinit final_uli5288(struct pci_dev *dev) -{ - struct pci_controller *hose = pci_bus_to_host(dev->bus); - struct device_node *hosenode = hose ? hose->dn : NULL; - struct of_irq oirq; - int virq, pin = 2; - u32 laddr[3]; - - if (!hosenode) - return; - - laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8); - laddr[1] = laddr[2] = 0; - of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq); - virq = irq_create_of_mapping(oirq.controller, oirq.specifier, - oirq.size); - dev->irq = virq; -} - -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, final_uli5288); -#endif /* CONFIG_PCI */ - #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) static u32 get_busfreq(void) @@ -404,7 +298,7 @@ define_machine(mpc86xx_hpcd) { .name = "MPC86xx HPCD", .probe = mpc86xx_hpcd_probe, .setup_arch = mpc86xx_hpcd_setup_arch, - .init_IRQ = mpc86xx_hpcd_init_irq, + .init_IRQ = mpc86xx_init_irq, .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, .time_init = mpc86xx_time_init, diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h index 525ffa1904f939bd6582c3d85b9f935c67257183..08efb57559d1ceaa7c230e7eddaf10c31dcfc23b 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx.h +++ b/arch/powerpc/platforms/86xx/mpc86xx.h @@ -15,6 +15,7 @@ * mpc86xx_* files. Mostly for use by mpc86xx_setup(). */ -extern void __init mpc86xx_smp_init(void); +extern void mpc86xx_smp_init(void); +extern void mpc86xx_init_irq(void); #endif /* __MPC86XX_H__ */ diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index f13704aabbea401fdd177b753f816961f0d1cffb..f712d9c0991be7ef9c6c0cc3cdccec2e98e1094e 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c @@ -28,7 +28,6 @@ #include #include #include -#include #include @@ -46,68 +45,6 @@ #endif #ifdef CONFIG_PCI -static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc) -{ - unsigned int cascade_irq = i8259_irq(); - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); - desc->chip->eoi(irq); -} -#endif /* CONFIG_PCI */ - -static void __init -mpc86xx_hpcn_init_irq(void) -{ - struct mpic *mpic1; - struct device_node *np; - struct resource res; -#ifdef CONFIG_PCI - struct device_node *cascade_node = NULL; - int cascade_irq; -#endif - - /* Determine PIC address. */ - np = of_find_node_by_type(NULL, "open-pic"); - if (np == NULL) - return; - of_address_to_resource(np, 0, &res); - - /* Alloc mpic structure and per isu has 16 INT entries. */ - mpic1 = mpic_alloc(np, res.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, - 0, 256, " MPIC "); - BUG_ON(mpic1 == NULL); - - mpic_init(mpic1); - -#ifdef CONFIG_PCI - /* Initialize i8259 controller */ - for_each_node_by_type(np, "interrupt-controller") - if (of_device_is_compatible(np, "chrp,iic")) { - cascade_node = np; - break; - } - if (cascade_node == NULL) { - printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n"); - return; - } - - cascade_irq = irq_of_parse_and_map(cascade_node, 0); - if (cascade_irq == NO_IRQ) { - printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt"); - return; - } - DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq); - - i8259_init(cascade_node, 0); - of_node_put(cascade_node); - - set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); -#endif -} - -#ifdef CONFIG_PCI -extern int uses_fsl_uli_m1575; extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); @@ -149,7 +86,6 @@ mpc86xx_hpcn_setup_arch(void) fsl_add_bridge(np, 0); } - uses_fsl_uli_m1575 = 1; ppc_md.pci_exclude_device = mpc86xx_exclude_device; #endif @@ -237,7 +173,7 @@ define_machine(mpc86xx_hpcn) { .name = "MPC86xx HPCN", .probe = mpc86xx_hpcn_probe, .setup_arch = mpc86xx_hpcn_setup_arch, - .init_IRQ = mpc86xx_hpcn_init_irq, + .init_IRQ = mpc86xx_init_irq, .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c index ba55b0ff0f746a4c60dd848c06bfb41faa97d026..835f2dc24dc9a7b5c9d277bf5350cc1fec159b74 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -56,8 +57,7 @@ smp_86xx_kick_cpu(int nr) unsigned int save_vector; unsigned long target, flags; int n = 0; - volatile unsigned int *vector - = (volatile unsigned int *)(KERNELBASE + 0x100); + unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100); if (nr < 0 || nr >= NR_CPUS) return; @@ -71,7 +71,7 @@ smp_86xx_kick_cpu(int nr) /* Setup fake reset vector to call __secondary_start_mpc86xx. */ target = (unsigned long) __secondary_start_mpc86xx; - create_branch((unsigned long)vector, target, BRANCH_SET_LINK); + patch_branch(vector, target, BRANCH_SET_LINK); /* Kick that CPU */ smp_86xx_release_core(nr); diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c new file mode 100644 index 0000000000000000000000000000000000000000..8881c5de500da0530d43b43c8519645ffba853f0 --- /dev/null +++ b/arch/powerpc/platforms/86xx/pic.c @@ -0,0 +1,78 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include + +#include +#include +#include + +#ifdef CONFIG_PPC_I8259 +static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc) +{ + unsigned int cascade_irq = i8259_irq(); + if (cascade_irq != NO_IRQ) + generic_handle_irq(cascade_irq); + desc->chip->eoi(irq); +} +#endif /* CONFIG_PPC_I8259 */ + +void __init mpc86xx_init_irq(void) +{ + struct mpic *mpic; + struct device_node *np; + struct resource res; +#ifdef CONFIG_PPC_I8259 + struct device_node *cascade_node = NULL; + int cascade_irq; +#endif + + /* Determine PIC address. */ + np = of_find_node_by_type(NULL, "open-pic"); + if (np == NULL) + return; + of_address_to_resource(np, 0, &res); + + mpic = mpic_alloc(np, res.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, + 0, 256, " MPIC "); + of_node_put(np); + BUG_ON(mpic == NULL); + + mpic_init(mpic); + +#ifdef CONFIG_PPC_I8259 + /* Initialize i8259 controller */ + for_each_node_by_type(np, "interrupt-controller") + if (of_device_is_compatible(np, "chrp,iic")) { + cascade_node = np; + break; + } + + if (cascade_node == NULL) { + printk(KERN_DEBUG "Could not find i8259 PIC\n"); + return; + } + + cascade_irq = irq_of_parse_and_map(cascade_node, 0); + if (cascade_irq == NO_IRQ) { + printk(KERN_ERR "Failed to map cascade interrupt\n"); + return; + } + + i8259_init(cascade_node, 0); + of_node_put(cascade_node); + + set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); +#endif +} diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index 510a06ef0b55cd6b4420b1dd7be208ed421153df..00e6fad3b3ca99f155350617d8838f33abe1069a 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c @@ -37,29 +37,6 @@ #include "mpc86xx.h" -static void __init -sbc8641_init_irq(void) -{ - struct mpic *mpic1; - struct device_node *np; - struct resource res; - - /* Determine PIC address. */ - np = of_find_node_by_type(NULL, "open-pic"); - if (np == NULL) - return; - of_address_to_resource(np, 0, &res); - - /* Alloc mpic structure and per isu has 16 INT entries. */ - mpic1 = mpic_alloc(np, res.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, - 0, 256, " MPIC "); - of_node_put(np); - BUG_ON(mpic1 == NULL); - - mpic_init(mpic1); -} - static void __init sbc8641_setup_arch(void) { @@ -151,7 +128,7 @@ define_machine(sbc8641) { .name = "SBC8641D", .probe = sbc8641_probe, .setup_arch = sbc8641_setup_arch, - .init_IRQ = sbc8641_init_irq, + .init_IRQ = mpc86xx_init_irq, .show_cpuinfo = sbc8641_show_cpuinfo, .get_irq = mpic_get_irq, .restart = fsl_rstcr_restart, diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c index c028a5b71bbb8a52ef454f90cc1cdf260eac88ad..caaec29796b748fab111247fdfa85cf1e5b1874f 100644 --- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c @@ -65,6 +65,10 @@ static struct cpm_pin mpc866ads_pins[] = { {CPM_PORTD, 13, CPM_PIN_OUTPUT}, {CPM_PORTD, 14, CPM_PIN_OUTPUT}, {CPM_PORTD, 15, CPM_PIN_OUTPUT}, + + /* I2C */ + {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, + {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, }; static void __init init_ioports(void) diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c index 6e7ded0233f678c08f98c1ab077bc6b8ff934876..45ed6cdc1310ffa5373cc72784805335464a5451 100644 --- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c +++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c @@ -158,6 +158,9 @@ static struct cpm_pin mpc885ads_pins[] = { {CPM_PORTE, 28, CPM_PIN_OUTPUT}, {CPM_PORTE, 29, CPM_PIN_OUTPUT}, #endif + /* I2C */ + {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, + {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, }; static void __init init_ioports(void) diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 87454c52697326e9173b4f695b46b9e705a77e97..1d0968775c0a855a84c8eee2b2366301f0de9950 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -1,36 +1,9 @@ menu "Platform support" -choice - prompt "Machine type" - depends on PPC64 || 6xx - default PPC_MULTIPLATFORM - config PPC_MULTIPLATFORM - bool "Generic desktop/server/laptop" - help - Select this option if configuring for an IBM pSeries or - RS/6000 machine, an Apple machine, or a PReP, CHRP, - Maple or Cell-based machine. - -config PPC_82xx - bool "Freescale 82xx" - depends on 6xx - -config PPC_83xx - bool "Freescale 83xx" - depends on 6xx - select FSL_SOC - select MPC83xx - select IPIC - -config PPC_86xx - bool "Freescale 86xx" - depends on 6xx - select FSL_SOC - select ALTIVEC - help - The Freescale E600 SoCs have 74xx cores. -endchoice + bool + depends on PPC64 || 6xx + default y config CLASSIC32 def_bool y @@ -280,17 +253,13 @@ config CPM2 depends on MPC85xx || 8260 select CPM select PPC_LIB_RHEAP + select PPC_PCI_CHOICE help The CPM2 (Communications Processor Module) is a coprocessor on embedded CPUs made by Freescale. Selecting this option means that you wish to build a kernel for a machine with a CPM2 coprocessor on it (826x, 827x, 8560). -config PPC_CPM_NEW_BINDING - bool - depends on CPM1 || CPM2 - default y - config AXON_RAM tristate "Axon DDR2 memory device driver" depends on PPC_IBM_CELL_BLADE diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index f7efaa925a1350f8c9e157b1c8a31d45ea34047a..7f6512733862b02138f4e0370a994a223a1e9a07 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -42,12 +42,14 @@ config 40x select PPC_DCR_NATIVE select PPC_UDBG_16550 select 4xx_SOC + select PPC_PCI_CHOICE config 44x bool "AMCC 44x" select PPC_DCR_NATIVE select PPC_UDBG_16550 select 4xx_SOC + select PPC_PCI_CHOICE config E200 bool "Freescale e200" @@ -84,9 +86,6 @@ config TUNE_CELL machines. When building a kernel that is supposed to run only on Cell, you should also select the POWER4_ONLY option. -config 6xx - bool - # this is temp to handle compat with arch=ppc config 8xx bool @@ -95,6 +94,11 @@ config E500 select FSL_EMB_PERFMON bool +config PPC_E500MC + bool "e500mc Support" + select PPC_FPU + depends on E500 + config PPC_FPU bool default y if PPC64 @@ -155,9 +159,25 @@ config ALTIVEC If in doubt, say Y here. +config VSX + bool "VSX Support" + depends on POWER4 && ALTIVEC && PPC_FPU + ---help--- + + This option enables kernel support for the Vector Scaler extensions + to the PowerPC processor. The kernel currently supports saving and + restoring VSX registers, and turning on the 'VSX enable' bit so user + processes can execute VSX instructions. + + This option is only useful if you have a processor that supports + VSX (P7 and above), but does not have any affect on a non-VSX + CPUs (it does, however add code to the kernel). + + If in doubt, say Y here. + config SPE bool "SPE Support" - depends on E200 || E500 + depends on E200 || (E500 && !PPC_E500MC) default y ---help--- This option enables kernel support for the Signal Processing @@ -182,7 +202,7 @@ config PPC_STD_MMU_32 config PPC_MM_SLICES bool - default y if HUGETLB_PAGE + default y if HUGETLB_PAGE || PPC_64K_PAGES default n config VIRT_CPU_ACCOUNTING diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig index 3959fcfe731c4a99e01ed7a124a067de85bf4e1a..c14d7d8d96c853441a2bc6e4bbfac3b7753d558a 100644 --- a/arch/powerpc/platforms/cell/Kconfig +++ b/arch/powerpc/platforms/cell/Kconfig @@ -83,6 +83,22 @@ config CBE_RAS depends on PPC_CELL_NATIVE default y +config PPC_IBM_CELL_RESETBUTTON + bool "IBM Cell Blade Pinhole reset button" + depends on CBE_RAS && PPC_IBM_CELL_BLADE + default y + help + Support Pinhole Resetbutton on IBM Cell blades. + This adds a method to trigger system reset via front panel pinhole button. + +config PPC_IBM_CELL_POWERBUTTON + tristate "IBM Cell Blade power button" + depends on PPC_IBM_CELL_BLADE && PPC_PMI && INPUT_EVDEV + default y + help + Support Powerbutton on IBM Cell blades. + This will enable the powerbutton as an input device. + config CBE_THERM tristate "CBE thermal support" default m @@ -107,6 +123,15 @@ config CBE_CPUFREQ_PMI processor will not only be able to run at lower speed, but also at lower core voltage. +config CBE_CPUFREQ_SPU_GOVERNOR + tristate "CBE frequency scaling based on SPU usage" + depends on SPU_FS && CPU_FREQ + default m + help + This governor checks for spu usage to adjust the cpu frequency. + If no spu is running on a given cpu, that cpu will be throttled to + the minimal possible frequency. + endmenu config OPROFILE_CELL diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile index c2a7e4e5ddf983e5dacfbe45af4925a16d2dc122..7fd830872c43bf458bd68de22ff9384c411bed19 100644 --- a/arch/powerpc/platforms/cell/Makefile +++ b/arch/powerpc/platforms/cell/Makefile @@ -8,6 +8,9 @@ obj-$(CONFIG_CBE_THERM) += cbe_thermal.o obj-$(CONFIG_CBE_CPUFREQ_PMI) += cbe_cpufreq_pmi.o obj-$(CONFIG_CBE_CPUFREQ) += cbe-cpufreq.o cbe-cpufreq-y += cbe_cpufreq_pervasive.o cbe_cpufreq.o +obj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR) += cpufreq_spudemand.o + +obj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON) += cbe_powerbutton.o ifeq ($(CONFIG_SMP),y) obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index c39f5c225f2e6420b45fc8afd1bbc2a0c379fa8b..896548ba1ca12f4eb07c7984a8b1f7d01d232a4f 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -69,8 +70,19 @@ struct axon_msic { dma_addr_t fifo_phys; dcr_host_t dcr_host; u32 read_offset; +#ifdef DEBUG + u32 __iomem *trigger; +#endif }; +#ifdef DEBUG +void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic); +#else +static inline void axon_msi_debug_setup(struct device_node *dn, + struct axon_msic *msic) { } +#endif + + static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) { pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); @@ -346,7 +358,14 @@ static int axon_msi_probe(struct of_device *device, goto out_free_msic; } - msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP, + virq = irq_of_parse_and_map(dn, 0); + if (virq == NO_IRQ) { + printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n", + dn->full_name); + goto out_free_fifo; + } + + msic->irq_host = irq_alloc_host(dn, IRQ_HOST_MAP_NOMAP, NR_IRQS, &msic_host_ops, 0); if (!msic->irq_host) { printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n", @@ -356,13 +375,6 @@ static int axon_msi_probe(struct of_device *device, msic->irq_host->host_data = msic; - virq = irq_of_parse_and_map(dn, 0); - if (virq == NO_IRQ) { - printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n", - dn->full_name); - goto out_free_host; - } - set_irq_data(virq, msic); set_irq_chained_handler(virq, axon_msi_cascade); pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq); @@ -381,12 +393,12 @@ static int axon_msi_probe(struct of_device *device, ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; ppc_md.msi_check_device = axon_msi_check_device; + axon_msi_debug_setup(dn, msic); + printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); return 0; -out_free_host: - kfree(msic->irq_host); out_free_fifo: dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt, msic->fifo_phys); @@ -418,3 +430,47 @@ static int __init axon_msi_init(void) return of_register_platform_driver(&axon_msi_driver); } subsys_initcall(axon_msi_init); + + +#ifdef DEBUG +static int msic_set(void *data, u64 val) +{ + struct axon_msic *msic = data; + out_le32(msic->trigger, val); + return 0; +} + +static int msic_get(void *data, u64 *val) +{ + *val = 0; + return 0; +} + +DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n"); + +void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic) +{ + char name[8]; + u64 addr; + + addr = of_translate_address(dn, of_get_property(dn, "reg", NULL)); + if (addr == OF_BAD_ADDR) { + pr_debug("axon_msi: couldn't translate reg property\n"); + return; + } + + msic->trigger = ioremap(addr, 0x4); + if (!msic->trigger) { + pr_debug("axon_msi: ioremap failed\n"); + return; + } + + snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn)); + + if (!debugfs_create_file(name, 0600, powerpc_debugfs_root, + msic, &fops_msic)) { + pr_debug("axon_msi: debugfs_create_file failed!\n"); + return; + } +} +#endif /* DEBUG */ diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c index 81467ff055c8313152862f02eb8d828d3f349951..2e67bd840e011f6b10a284441c83ea2ac467dde7 100644 --- a/arch/powerpc/platforms/cell/beat_htab.c +++ b/arch/powerpc/platforms/cell/beat_htab.c @@ -112,7 +112,7 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, if (!(vflags & HPTE_V_BOLTED)) DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r); - if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) + if (rflags & _PAGE_NO_CACHE) hpte_r &= ~_PAGE_COHERENT; spin_lock(&beat_htab_lock); @@ -334,7 +334,7 @@ static long beat_lpar_hpte_insert_v3(unsigned long hpte_group, if (!(vflags & HPTE_V_BOLTED)) DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r); - if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) + if (rflags & _PAGE_NO_CACHE) hpte_r &= ~_PAGE_COHERENT; /* insert into not-volted entry */ diff --git a/arch/powerpc/platforms/cell/cbe_powerbutton.c b/arch/powerpc/platforms/cell/cbe_powerbutton.c new file mode 100644 index 0000000000000000000000000000000000000000..dcddaa5fcb665164bcd0b25370f28bd3fb9d934c --- /dev/null +++ b/arch/powerpc/platforms/cell/cbe_powerbutton.c @@ -0,0 +1,117 @@ +/* + * driver for powerbutton on IBM cell blades + * + * (C) Copyright IBM Corp. 2005-2008 + * + * Author: Christian Krafft + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include + +static struct input_dev *button_dev; +static struct platform_device *button_pdev; + +static void cbe_powerbutton_handle_pmi(pmi_message_t pmi_msg) +{ + BUG_ON(pmi_msg.type != PMI_TYPE_POWER_BUTTON); + + input_report_key(button_dev, KEY_POWER, 1); + input_sync(button_dev); + input_report_key(button_dev, KEY_POWER, 0); + input_sync(button_dev); +} + +static struct pmi_handler cbe_pmi_handler = { + .type = PMI_TYPE_POWER_BUTTON, + .handle_pmi_message = cbe_powerbutton_handle_pmi, +}; + +static int __init cbe_powerbutton_init(void) +{ + int ret = 0; + struct input_dev *dev; + + if (!machine_is_compatible("IBM,CBPLUS-1.0")) { + printk(KERN_ERR "%s: Not a cell blade.\n", __func__); + ret = -ENODEV; + goto out; + } + + dev = input_allocate_device(); + if (!dev) { + ret = -ENOMEM; + printk(KERN_ERR "%s: Not enough memory.\n", __func__); + goto out; + } + + set_bit(EV_KEY, dev->evbit); + set_bit(KEY_POWER, dev->keybit); + + dev->name = "Power Button"; + dev->id.bustype = BUS_HOST; + + /* this makes the button look like an acpi power button + * no clue whether anyone relies on that though */ + dev->id.product = 0x02; + dev->phys = "LNXPWRBN/button/input0"; + + button_pdev = platform_device_register_simple("power_button", 0, NULL, 0); + if (IS_ERR(button_pdev)) { + ret = PTR_ERR(button_pdev); + goto out_free_input; + } + + dev->dev.parent = &button_pdev->dev; + ret = input_register_device(dev); + if (ret) { + printk(KERN_ERR "%s: Failed to register device\n", __func__); + goto out_free_pdev; + } + + button_dev = dev; + + ret = pmi_register_handler(&cbe_pmi_handler); + if (ret) { + printk(KERN_ERR "%s: Failed to register with pmi.\n", __func__); + goto out_free_pdev; + } + + goto out; + +out_free_pdev: + platform_device_unregister(button_pdev); +out_free_input: + input_free_device(dev); +out: + return ret; +} + +static void __exit cbe_powerbutton_exit(void) +{ + pmi_unregister_handler(&cbe_pmi_handler); + platform_device_unregister(button_pdev); + input_free_device(button_dev); +} + +module_init(cbe_powerbutton_init); +module_exit(cbe_powerbutton_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Christian Krafft "); diff --git a/arch/powerpc/platforms/cell/cbe_thermal.c b/arch/powerpc/platforms/cell/cbe_thermal.c index 4852bf312d83c0d60a224eb9ab292dd832c96a64..4d4c8c169124eb8899315bf97c895c4e22a8919f 100644 --- a/arch/powerpc/platforms/cell/cbe_thermal.c +++ b/arch/powerpc/platforms/cell/cbe_thermal.c @@ -97,7 +97,8 @@ static u8 spu_read_register_value(struct sys_device *sysdev, union spe_reg __iom return value.spe[spu->spe_id]; } -static ssize_t spu_show_temp(struct sys_device *sysdev, char *buf) +static ssize_t spu_show_temp(struct sys_device *sysdev, struct sysdev_attribute *attr, + char *buf) { u8 value; struct cbe_pmd_regs __iomem *pmd_regs; @@ -146,32 +147,38 @@ static ssize_t store_throttle(struct cbe_pmd_regs __iomem *pmd_regs, const char return size; } -static ssize_t spu_show_throttle_end(struct sys_device *sysdev, char *buf) +static ssize_t spu_show_throttle_end(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(get_pmd_regs(sysdev), buf, 0); } -static ssize_t spu_show_throttle_begin(struct sys_device *sysdev, char *buf) +static ssize_t spu_show_throttle_begin(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(get_pmd_regs(sysdev), buf, 8); } -static ssize_t spu_show_throttle_full_stop(struct sys_device *sysdev, char *buf) +static ssize_t spu_show_throttle_full_stop(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(get_pmd_regs(sysdev), buf, 16); } -static ssize_t spu_store_throttle_end(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t spu_store_throttle_end(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(get_pmd_regs(sysdev), buf, size, 0); } -static ssize_t spu_store_throttle_begin(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t spu_store_throttle_begin(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(get_pmd_regs(sysdev), buf, size, 8); } -static ssize_t spu_store_throttle_full_stop(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t spu_store_throttle_full_stop(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(get_pmd_regs(sysdev), buf, size, 16); } @@ -192,43 +199,51 @@ static ssize_t ppe_show_temp(struct sys_device *sysdev, char *buf, int pos) /* shows the temperature of the DTS on the PPE, * located near the linear thermal sensor */ -static ssize_t ppe_show_temp0(struct sys_device *sysdev, char *buf) +static ssize_t ppe_show_temp0(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return ppe_show_temp(sysdev, buf, 32); } /* shows the temperature of the second DTS on the PPE */ -static ssize_t ppe_show_temp1(struct sys_device *sysdev, char *buf) +static ssize_t ppe_show_temp1(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return ppe_show_temp(sysdev, buf, 0); } -static ssize_t ppe_show_throttle_end(struct sys_device *sysdev, char *buf) +static ssize_t ppe_show_throttle_end(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 32); } -static ssize_t ppe_show_throttle_begin(struct sys_device *sysdev, char *buf) +static ssize_t ppe_show_throttle_begin(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 40); } -static ssize_t ppe_show_throttle_full_stop(struct sys_device *sysdev, char *buf) +static ssize_t ppe_show_throttle_full_stop(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { return show_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, 48); } -static ssize_t ppe_store_throttle_end(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t ppe_store_throttle_end(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 32); } -static ssize_t ppe_store_throttle_begin(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t ppe_store_throttle_begin(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 40); } -static ssize_t ppe_store_throttle_full_stop(struct sys_device *sysdev, const char *buf, size_t size) +static ssize_t ppe_store_throttle_full_stop(struct sys_device *sysdev, + struct sysdev_attribute *attr, const char *buf, size_t size) { return store_throttle(cbe_get_cpu_pmd_regs(sysdev->id), buf, size, 48); } diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c index 0e04f8fb152a55a9e5ad0aa9c97bd164738392ea..3e7e0f1568ef50d705de43fa889ce8722c2fd352 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c +++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c @@ -281,7 +281,7 @@ static int __init scc_pciex_iowa_init(struct iowa_bus *bus, void *data) dummy_page_da = dma_map_single(bus->phb->parent, dummy_page_va, PAGE_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(dummy_page_da)) { + if (dma_mapping_error(bus->phb->parent, dummy_page_da)) { pr_err("PCIEX:Map dummy page failed.\n"); kfree(dummy_page_va); return -1; diff --git a/arch/powerpc/platforms/cell/cpufreq_spudemand.c b/arch/powerpc/platforms/cell/cpufreq_spudemand.c new file mode 100644 index 0000000000000000000000000000000000000000..a3c6c01bd6db2cc139c4c753cd641e336f4ccf5f --- /dev/null +++ b/arch/powerpc/platforms/cell/cpufreq_spudemand.c @@ -0,0 +1,184 @@ +/* + * spu aware cpufreq governor for the cell processor + * + * © Copyright IBM Corporation 2006-2008 + * + * Author: Christian Krafft + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define POLL_TIME 100000 /* in µs */ +#define EXP 753 /* exp(-1) in fixed-point */ + +struct spu_gov_info_struct { + unsigned long busy_spus; /* fixed-point */ + struct cpufreq_policy *policy; + struct delayed_work work; + unsigned int poll_int; /* µs */ +}; +static DEFINE_PER_CPU(struct spu_gov_info_struct, spu_gov_info); + +static struct workqueue_struct *kspugov_wq; + +static int calc_freq(struct spu_gov_info_struct *info) +{ + int cpu; + int busy_spus; + + cpu = info->policy->cpu; + busy_spus = atomic_read(&cbe_spu_info[cpu_to_node(cpu)].busy_spus); + + CALC_LOAD(info->busy_spus, EXP, busy_spus * FIXED_1); + pr_debug("cpu %d: busy_spus=%d, info->busy_spus=%ld\n", + cpu, busy_spus, info->busy_spus); + + return info->policy->max * info->busy_spus / FIXED_1; +} + +static void spu_gov_work(struct work_struct *work) +{ + struct spu_gov_info_struct *info; + int delay; + unsigned long target_freq; + + info = container_of(work, struct spu_gov_info_struct, work.work); + + /* after cancel_delayed_work_sync we unset info->policy */ + BUG_ON(info->policy == NULL); + + target_freq = calc_freq(info); + __cpufreq_driver_target(info->policy, target_freq, CPUFREQ_RELATION_H); + + delay = usecs_to_jiffies(info->poll_int); + queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay); +} + +static void spu_gov_init_work(struct spu_gov_info_struct *info) +{ + int delay = usecs_to_jiffies(info->poll_int); + INIT_DELAYED_WORK_DEFERRABLE(&info->work, spu_gov_work); + queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay); +} + +static void spu_gov_cancel_work(struct spu_gov_info_struct *info) +{ + cancel_delayed_work_sync(&info->work); +} + +static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) +{ + unsigned int cpu = policy->cpu; + struct spu_gov_info_struct *info, *affected_info; + int i; + int ret = 0; + + info = &per_cpu(spu_gov_info, cpu); + + switch (event) { + case CPUFREQ_GOV_START: + if (!cpu_online(cpu)) { + printk(KERN_ERR "cpu %d is not online\n", cpu); + ret = -EINVAL; + break; + } + + if (!policy->cur) { + printk(KERN_ERR "no cpu specified in policy\n"); + ret = -EINVAL; + break; + } + + /* initialize spu_gov_info for all affected cpus */ + for_each_cpu_mask(i, policy->cpus) { + affected_info = &per_cpu(spu_gov_info, i); + affected_info->policy = policy; + } + + info->poll_int = POLL_TIME; + + /* setup timer */ + spu_gov_init_work(info); + + break; + + case CPUFREQ_GOV_STOP: + /* cancel timer */ + spu_gov_cancel_work(info); + + /* clean spu_gov_info for all affected cpus */ + for_each_cpu_mask (i, policy->cpus) { + info = &per_cpu(spu_gov_info, i); + info->policy = NULL; + } + + break; + } + + return ret; +} + +static struct cpufreq_governor spu_governor = { + .name = "spudemand", + .governor = spu_gov_govern, + .owner = THIS_MODULE, +}; + +/* + * module init and destoy + */ + +static int __init spu_gov_init(void) +{ + int ret; + + kspugov_wq = create_workqueue("kspugov"); + if (!kspugov_wq) { + printk(KERN_ERR "creation of kspugov failed\n"); + ret = -EFAULT; + goto out; + } + + ret = cpufreq_register_governor(&spu_governor); + if (ret) { + printk(KERN_ERR "registration of governor failed\n"); + destroy_workqueue(kspugov_wq); + goto out; + } +out: + return ret; +} + +static void __exit spu_gov_exit(void) +{ + cpufreq_unregister_governor(&spu_governor); + destroy_workqueue(kspugov_wq); +} + + +module_init(spu_gov_init); +module_exit(spu_gov_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Christian Krafft "); + diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 5bf7df14602288b1d4daafb79e1116ac92066864..2d5bb22d6c092419cd4582bdbdd8f364135db833 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c @@ -218,6 +218,7 @@ void iic_request_IPIs(void) { iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call"); iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched"); + iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE, "IPI-call-single"); #ifdef CONFIG_DEBUGGER iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug"); #endif /* CONFIG_DEBUGGER */ diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index 45646b2b4af468b794931548f922bf435f0975df..e06420af5fe9116cd007645594ee6cd0a962a6ea 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c @@ -172,8 +172,9 @@ static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, } } -static void tce_build_cell(struct iommu_table *tbl, long index, long npages, - unsigned long uaddr, enum dma_data_direction direction) +static int tce_build_cell(struct iommu_table *tbl, long index, long npages, + unsigned long uaddr, enum dma_data_direction direction, + struct dma_attrs *attrs) { int i; unsigned long *io_pte, base_pte; @@ -198,6 +199,8 @@ static void tce_build_cell(struct iommu_table *tbl, long index, long npages, base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW | (window->ioid & IOPTE_IOID_Mask); #endif + if (unlikely(dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs))) + base_pte &= ~IOPTE_SO_RW; io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset); @@ -210,6 +213,7 @@ static void tce_build_cell(struct iommu_table *tbl, long index, long npages, pr_debug("tce_build_cell(index=%lx,n=%lx,dir=%d,base_pte=%lx)\n", index, npages, direction, base_pte); + return 0; } static void tce_free_cell(struct iommu_table *tbl, long index, long npages) @@ -519,7 +523,7 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np, __set_bit(0, window->table.it_map); tce_build_cell(&window->table, window->table.it_offset, 1, - (unsigned long)iommu->pad_page, DMA_TO_DEVICE); + (unsigned long)iommu->pad_page, DMA_TO_DEVICE, NULL); window->table.it_hint = window->table.it_blocksize; return window; @@ -538,9 +542,11 @@ static struct cbe_iommu *cell_iommu_for_node(int nid) static unsigned long cell_dma_direct_offset; static unsigned long dma_iommu_fixed_base; -struct dma_mapping_ops dma_iommu_fixed_ops; -static void cell_dma_dev_setup_iommu(struct device *dev) +/* iommu_fixed_is_weak is set if booted with iommu_fixed=weak */ +static int iommu_fixed_is_weak; + +static struct iommu_table *cell_get_iommu_table(struct device *dev) { struct iommu_window *window; struct cbe_iommu *iommu; @@ -555,13 +561,105 @@ static void cell_dma_dev_setup_iommu(struct device *dev) printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", archdata->of_node ? archdata->of_node->full_name : "?", archdata->numa_node); - return; + return NULL; } window = list_entry(iommu->windows.next, struct iommu_window, list); - archdata->dma_data = &window->table; + return &window->table; +} + +/* A coherent allocation implies strong ordering */ + +static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + if (iommu_fixed_is_weak) + return iommu_alloc_coherent(dev, cell_get_iommu_table(dev), + size, dma_handle, + device_to_mask(dev), flag, + dev->archdata.numa_node); + else + return dma_direct_ops.alloc_coherent(dev, size, dma_handle, + flag); +} + +static void dma_fixed_free_coherent(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + if (iommu_fixed_is_weak) + iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr, + dma_handle); + else + dma_direct_ops.free_coherent(dev, size, vaddr, dma_handle); +} + +static dma_addr_t dma_fixed_map_single(struct device *dev, void *ptr, + size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + if (iommu_fixed_is_weak == dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs)) + return dma_direct_ops.map_single(dev, ptr, size, direction, + attrs); + else + return iommu_map_single(dev, cell_get_iommu_table(dev), ptr, + size, device_to_mask(dev), direction, + attrs); } +static void dma_fixed_unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + if (iommu_fixed_is_weak == dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs)) + dma_direct_ops.unmap_single(dev, dma_addr, size, direction, + attrs); + else + iommu_unmap_single(cell_get_iommu_table(dev), dma_addr, size, + direction, attrs); +} + +static int dma_fixed_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + if (iommu_fixed_is_weak == dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs)) + return dma_direct_ops.map_sg(dev, sg, nents, direction, attrs); + else + return iommu_map_sg(dev, cell_get_iommu_table(dev), sg, nents, + device_to_mask(dev), direction, attrs); +} + +static void dma_fixed_unmap_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) +{ + if (iommu_fixed_is_weak == dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs)) + dma_direct_ops.unmap_sg(dev, sg, nents, direction, attrs); + else + iommu_unmap_sg(cell_get_iommu_table(dev), sg, nents, direction, + attrs); +} + +static int dma_fixed_dma_supported(struct device *dev, u64 mask) +{ + return mask == DMA_64BIT_MASK; +} + +static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask); + +struct dma_mapping_ops dma_iommu_fixed_ops = { + .alloc_coherent = dma_fixed_alloc_coherent, + .free_coherent = dma_fixed_free_coherent, + .map_single = dma_fixed_map_single, + .unmap_single = dma_fixed_unmap_single, + .map_sg = dma_fixed_map_sg, + .unmap_sg = dma_fixed_unmap_sg, + .dma_supported = dma_fixed_dma_supported, + .set_dma_mask = dma_set_mask_and_switch, +}; + static void cell_dma_dev_setup_fixed(struct device *dev); static void cell_dma_dev_setup(struct device *dev) @@ -572,7 +670,7 @@ static void cell_dma_dev_setup(struct device *dev) if (get_dma_ops(dev) == &dma_iommu_fixed_ops) cell_dma_dev_setup_fixed(dev); else if (get_pci_dma_ops() == &dma_iommu_ops) - cell_dma_dev_setup_iommu(dev); + archdata->dma_data = cell_get_iommu_table(dev); else if (get_pci_dma_ops() == &dma_direct_ops) archdata->dma_data = (void *)cell_dma_direct_offset; else @@ -918,9 +1016,16 @@ static void cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu, pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase); - base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW + base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | (cell_iommu_get_ioid(np) & IOPTE_IOID_Mask); + if (iommu_fixed_is_weak) + pr_info("IOMMU: Using weak ordering for fixed mapping\n"); + else { + pr_info("IOMMU: Using strong ordering for fixed mapping\n"); + base_pte |= IOPTE_SO_RW; + } + for (uaddr = 0; uaddr < fsize; uaddr += (1 << 24)) { /* Don't touch the dynamic region */ ioaddr = uaddr + fbase; @@ -1036,9 +1141,6 @@ static int __init cell_iommu_fixed_mapping_init(void) cell_iommu_setup_window(iommu, np, dbase, dsize, 0); } - dma_iommu_fixed_ops = dma_direct_ops; - dma_iommu_fixed_ops.set_dma_mask = dma_set_mask_and_switch; - dma_iommu_ops.set_dma_mask = dma_set_mask_and_switch; set_pci_dma_ops(&dma_iommu_ops); @@ -1049,9 +1151,23 @@ static int iommu_fixed_disabled; static int __init setup_iommu_fixed(char *str) { + struct device_node *pciep; + if (strcmp(str, "off") == 0) iommu_fixed_disabled = 1; + /* If we can find a pcie-endpoint in the device tree assume that + * we're on a triblade or a CAB so by default the fixed mapping + * should be set to be weakly ordered; but only if the boot + * option WASN'T set for strong ordering + */ + pciep = of_find_node_by_type(NULL, "pcie-endpoint"); + + if (strcmp(str, "weak") == 0 || (pciep && strcmp(str, "strong") != 0)) + iommu_fixed_is_weak = 1; + + of_node_put(pciep); + return 1; } __setup("iommu_fixed=", setup_iommu_fixed); diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c index 8a3631ce912ba52782640bd41b41e7f20e8c56f6..efdacc829576582a0b4da52384f80ad62082cd4e 100644 --- a/arch/powerpc/platforms/cell/pervasive.c +++ b/arch/powerpc/platforms/cell/pervasive.c @@ -38,8 +38,6 @@ #include "pervasive.h" -static int sysreset_hack; - static void cbe_power_save(void) { unsigned long ctrl, thread_switch_control; @@ -87,9 +85,6 @@ static void cbe_power_save(void) static int cbe_system_reset_exception(struct pt_regs *regs) { - int cpu; - struct cbe_pmd_regs __iomem *pmd; - switch (regs->msr & SRR1_WAKEMASK) { case SRR1_WAKEEE: do_IRQ(regs); @@ -98,19 +93,7 @@ static int cbe_system_reset_exception(struct pt_regs *regs) timer_interrupt(regs); break; case SRR1_WAKEMT: - /* - * The BMC can inject user triggered system reset exceptions, - * but cannot set the system reset reason in srr1, - * so check an extra register here. - */ - if (sysreset_hack && (cpu = smp_processor_id()) == 0) { - pmd = cbe_get_cpu_pmd_regs(cpu); - if (in_be64(&pmd->ras_esc_0) & 0xffff) { - out_be64(&pmd->ras_esc_0, 0); - return 0; - } - } - break; + return cbe_sysreset_hack(); #ifdef CONFIG_CBE_RAS case SRR1_WAKESYSERR: cbe_system_error_exception(regs); @@ -134,8 +117,6 @@ void __init cbe_pervasive_init(void) if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO)) return; - sysreset_hack = machine_is_compatible("IBM,CBPLUS-1.0"); - for_each_possible_cpu(cpu) { struct cbe_pmd_regs __iomem *regs = cbe_get_cpu_pmd_regs(cpu); if (!regs) @@ -144,12 +125,6 @@ void __init cbe_pervasive_init(void) /* Enable Pause(0) control bit */ out_be64(®s->pmcr, in_be64(®s->pmcr) | CBE_PMD_PAUSE_ZERO_CONTROL); - - /* Enable JTAG system-reset hack */ - if (sysreset_hack) - out_be32(®s->fir_mode_reg, - in_be32(®s->fir_mode_reg) | - CBE_PMD_FIR_MODE_M8); } ppc_md.power_save = cbe_power_save; diff --git a/arch/powerpc/platforms/cell/pervasive.h b/arch/powerpc/platforms/cell/pervasive.h index 7b50947f8044418969aba9f48f1999b184a1300f..fd4d7b7092b43ad1c1d64a2dc460cb0f8a92e2eb 100644 --- a/arch/powerpc/platforms/cell/pervasive.h +++ b/arch/powerpc/platforms/cell/pervasive.h @@ -30,4 +30,13 @@ extern void cbe_system_error_exception(struct pt_regs *regs); extern void cbe_maintenance_exception(struct pt_regs *regs); extern void cbe_thermal_exception(struct pt_regs *regs); +#ifdef CONFIG_PPC_IBM_CELL_RESETBUTTON +extern int cbe_sysreset_hack(void); +#else +static inline int cbe_sysreset_hack(void) +{ + return 1; +} +#endif /* CONFIG_PPC_IBM_CELL_RESETBUTTON */ + #endif diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c index 655704ad03cf84d3e2a21eeb927e20ea87a836bc..2a14b052abcd7617b251d1e69555e0233b773d3d 100644 --- a/arch/powerpc/platforms/cell/ras.c +++ b/arch/powerpc/platforms/cell/ras.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -226,10 +227,61 @@ static int cbe_ptcal_notify_reboot(struct notifier_block *nb, return cbe_ptcal_disable(); } +static void cbe_ptcal_crash_shutdown(void) +{ + cbe_ptcal_disable(); +} + static struct notifier_block cbe_ptcal_reboot_notifier = { .notifier_call = cbe_ptcal_notify_reboot }; +#ifdef CONFIG_PPC_IBM_CELL_RESETBUTTON +static int sysreset_hack; + +static int __init cbe_sysreset_init(void) +{ + struct cbe_pmd_regs __iomem *regs; + + sysreset_hack = machine_is_compatible("IBM,CBPLUS-1.0"); + if (!sysreset_hack) + return 0; + + regs = cbe_get_cpu_pmd_regs(0); + if (!regs) + return 0; + + /* Enable JTAG system-reset hack */ + out_be32(®s->fir_mode_reg, + in_be32(®s->fir_mode_reg) | + CBE_PMD_FIR_MODE_M8); + + return 0; +} +device_initcall(cbe_sysreset_init); + +int cbe_sysreset_hack(void) +{ + struct cbe_pmd_regs __iomem *regs; + + /* + * The BMC can inject user triggered system reset exceptions, + * but cannot set the system reset reason in srr1, + * so check an extra register here. + */ + if (sysreset_hack && (smp_processor_id() == 0)) { + regs = cbe_get_cpu_pmd_regs(0); + if (!regs) + return 0; + if (in_be64(®s->ras_esc_0) & 0x0000ffff) { + out_be64(®s->ras_esc_0, 0); + return 0; + } + } + return 1; +} +#endif /* CONFIG_PPC_IBM_CELL_RESETBUTTON */ + int __init cbe_ptcal_init(void) { int ret; @@ -241,12 +293,20 @@ int __init cbe_ptcal_init(void) return -ENODEV; ret = register_reboot_notifier(&cbe_ptcal_reboot_notifier); - if (ret) { - printk(KERN_ERR "Can't disable PTCAL, so not enabling\n"); - return ret; - } + if (ret) + goto out1; + + ret = crash_shutdown_register(&cbe_ptcal_crash_shutdown); + if (ret) + goto out2; return cbe_ptcal_enable(); + +out2: + unregister_reboot_notifier(&cbe_ptcal_reboot_notifier); +out1: + printk(KERN_ERR "Can't disable PTCAL, so not enabling\n"); + return ret; } arch_initcall(cbe_ptcal_init); diff --git a/arch/powerpc/platforms/cell/spider-pci.c b/arch/powerpc/platforms/cell/spider-pci.c index 418b605ac35aefff35224aaabccc1d086473ac44..5122ec145271e0e65608718a0233138144a77561 100644 --- a/arch/powerpc/platforms/cell/spider-pci.c +++ b/arch/powerpc/platforms/cell/spider-pci.c @@ -111,7 +111,7 @@ static int __init spiderpci_pci_setup_chip(struct pci_controller *phb, dummy_page_da = dma_map_single(phb->parent, dummy_page_va, PAGE_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(dummy_page_da)) { + if (dma_mapping_error(phb->parent, dummy_page_da)) { pr_err("SPIDER-IOWA:Map dummy page filed.\n"); kfree(dummy_page_va); return -1; diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 3f4b4aef756d8821139c1def2b7b666041a516ad..4e5655624ae877f1e0c8de8eaac716fba9db4f21 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c @@ -300,7 +300,7 @@ static void __init spider_init_one(struct device_node *of_node, int chip, panic("spider_pic: can't map registers !"); /* Allocate a host */ - pic->host = irq_alloc_host(of_node_get(of_node), IRQ_HOST_MAP_LINEAR, + pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR, SPIDER_SRC_COUNT, &spider_host_ops, SPIDER_IRQ_INVALID); if (pic->host == NULL) diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 78f905bc6a42dd7774edca80287a58bd921c01dd..a5bdb89a17c3bf4b40894a0e7025877579398a06 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -703,7 +703,8 @@ static unsigned long long spu_acct_time(struct spu *spu, } -static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf) +static ssize_t spu_stat_show(struct sys_device *sysdev, + struct sysdev_attribute *attr, char *buf) { struct spu *spu = container_of(sysdev, struct spu, sysdev); diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c index 177735f793179ef4aed1bea211593611728dd4eb..6653ddbed0483c4679755ee23b132fbc57091cb3 100644 --- a/arch/powerpc/platforms/cell/spufs/context.c +++ b/arch/powerpc/platforms/cell/spufs/context.c @@ -130,17 +130,17 @@ void spu_unmap_mappings(struct spu_context *ctx) if (ctx->local_store) unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1); if (ctx->mfc) - unmap_mapping_range(ctx->mfc, 0, 0x1000, 1); + unmap_mapping_range(ctx->mfc, 0, SPUFS_MFC_MAP_SIZE, 1); if (ctx->cntl) - unmap_mapping_range(ctx->cntl, 0, 0x1000, 1); + unmap_mapping_range(ctx->cntl, 0, SPUFS_CNTL_MAP_SIZE, 1); if (ctx->signal1) - unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1); + unmap_mapping_range(ctx->signal1, 0, SPUFS_SIGNAL_MAP_SIZE, 1); if (ctx->signal2) - unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1); + unmap_mapping_range(ctx->signal2, 0, SPUFS_SIGNAL_MAP_SIZE, 1); if (ctx->mss) - unmap_mapping_range(ctx->mss, 0, 0x1000, 1); + unmap_mapping_range(ctx->mss, 0, SPUFS_MSS_MAP_SIZE, 1); if (ctx->psmap) - unmap_mapping_range(ctx->psmap, 0, 0x20000, 1); + unmap_mapping_range(ctx->psmap, 0, SPUFS_PS_MAP_SIZE, 1); mutex_unlock(&ctx->mapping_lock); } diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index c81341ff75b548be96daf09ba55eac4e2cda539c..010a51f59796b7a9068103bb6598843f9195fff4 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c @@ -238,11 +238,13 @@ spufs_mem_write(struct file *file, const char __user *buffer, return size; } -static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { struct spu_context *ctx = vma->vm_file->private_data; - unsigned long pfn, offset, addr0 = address; + unsigned long address = (unsigned long)vmf->virtual_address; + unsigned long pfn, offset; + #ifdef CONFIG_SPU_FS_64K_LS struct spu_state *csa = &ctx->csa; int psize; @@ -260,15 +262,15 @@ static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma, } #endif /* CONFIG_SPU_FS_64K_LS */ - offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT); + offset = vmf->pgoff << PAGE_SHIFT; if (offset >= LS_SIZE) - return NOPFN_SIGBUS; + return VM_FAULT_SIGBUS; - pr_debug("spufs_mem_mmap_nopfn address=0x%lx -> 0x%lx, offset=0x%lx\n", - addr0, address, offset); + pr_debug("spufs_mem_mmap_fault address=0x%lx, offset=0x%lx\n", + address, offset); if (spu_acquire(ctx)) - return NOPFN_REFAULT; + return VM_FAULT_NOPAGE; if (ctx->state == SPU_STATE_SAVED) { vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) @@ -283,12 +285,35 @@ static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma, spu_release(ctx); - return NOPFN_REFAULT; + return VM_FAULT_NOPAGE; } +static int spufs_mem_mmap_access(struct vm_area_struct *vma, + unsigned long address, + void *buf, int len, int write) +{ + struct spu_context *ctx = vma->vm_file->private_data; + unsigned long offset = address - vma->vm_start; + char *local_store; + + if (write && !(vma->vm_flags & VM_WRITE)) + return -EACCES; + if (spu_acquire(ctx)) + return -EINTR; + if ((offset + len) > vma->vm_end) + len = vma->vm_end - offset; + local_store = ctx->ops->get_ls(ctx); + if (write) + memcpy_toio(local_store + offset, buf, len); + else + memcpy_fromio(buf, local_store + offset, len); + spu_release(ctx); + return len; +} static struct vm_operations_struct spufs_mem_mmap_vmops = { - .nopfn = spufs_mem_mmap_nopfn, + .fault = spufs_mem_mmap_fault, + .access = spufs_mem_mmap_access, }; static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma) @@ -351,20 +376,19 @@ static const struct file_operations spufs_mem_fops = { #endif }; -static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, - unsigned long address, +static int spufs_ps_fault(struct vm_area_struct *vma, + struct vm_fault *vmf, unsigned long ps_offs, unsigned long ps_size) { struct spu_context *ctx = vma->vm_file->private_data; - unsigned long area, offset = address - vma->vm_start; + unsigned long area, offset = vmf->pgoff << PAGE_SHIFT; int ret = 0; - spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx); + spu_context_nospu_trace(spufs_ps_fault__enter, ctx); - offset += vma->vm_pgoff << PAGE_SHIFT; if (offset >= ps_size) - return NOPFN_SIGBUS; + return VM_FAULT_SIGBUS; /* * Because we release the mmap_sem, the context may be destroyed while @@ -378,7 +402,7 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, * pages to hand out to the user, but we don't want to wait * with the mmap_sem held. * It is possible to drop the mmap_sem here, but then we need - * to return NOPFN_REFAULT because the mappings may have + * to return VM_FAULT_NOPAGE because the mappings may have * hanged. */ if (spu_acquire(ctx)) @@ -386,14 +410,15 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, if (ctx->state == SPU_STATE_SAVED) { up_read(¤t->mm->mmap_sem); - spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx); + spu_context_nospu_trace(spufs_ps_fault__sleep, ctx); ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE); - spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu); + spu_context_trace(spufs_ps_fault__wake, ctx, ctx->spu); down_read(¤t->mm->mmap_sem); } else { area = ctx->spu->problem_phys + ps_offs; - vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT); - spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu); + vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, + (area + offset) >> PAGE_SHIFT); + spu_context_trace(spufs_ps_fault__insert, ctx, ctx->spu); } if (!ret) @@ -401,18 +426,18 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, refault: put_spu_context(ctx); - return NOPFN_REFAULT; + return VM_FAULT_NOPAGE; } #if SPUFS_MMAP_4K -static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int spufs_cntl_mmap_fault(struct vm_area_struct *vma, + struct vm_fault *vmf) { - return spufs_ps_nopfn(vma, address, 0x4000, 0x1000); + return spufs_ps_fault(vma, vmf, 0x4000, SPUFS_CNTL_MAP_SIZE); } static struct vm_operations_struct spufs_cntl_mmap_vmops = { - .nopfn = spufs_cntl_mmap_nopfn, + .fault = spufs_cntl_mmap_fault, }; /* @@ -1097,23 +1122,23 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf, return 4; } -static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_signal1_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { -#if PAGE_SIZE == 0x1000 - return spufs_ps_nopfn(vma, address, 0x14000, 0x1000); -#elif PAGE_SIZE == 0x10000 +#if SPUFS_SIGNAL_MAP_SIZE == 0x1000 + return spufs_ps_fault(vma, vmf, 0x14000, SPUFS_SIGNAL_MAP_SIZE); +#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole * signal 1 and 2 area */ - return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); + return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE); #else #error unsupported page size #endif } static struct vm_operations_struct spufs_signal1_mmap_vmops = { - .nopfn = spufs_signal1_mmap_nopfn, + .fault = spufs_signal1_mmap_fault, }; static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) @@ -1234,23 +1259,23 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf, } #if SPUFS_MMAP_4K -static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_signal2_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { -#if PAGE_SIZE == 0x1000 - return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000); -#elif PAGE_SIZE == 0x10000 +#if SPUFS_SIGNAL_MAP_SIZE == 0x1000 + return spufs_ps_fault(vma, vmf, 0x1c000, SPUFS_SIGNAL_MAP_SIZE); +#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole * signal 1 and 2 area */ - return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); + return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE); #else #error unsupported page size #endif } static struct vm_operations_struct spufs_signal2_mmap_vmops = { - .nopfn = spufs_signal2_mmap_nopfn, + .fault = spufs_signal2_mmap_fault, }; static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) @@ -1362,14 +1387,14 @@ DEFINE_SPUFS_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get, spufs_signal2_type_set, "%llu\n", SPU_ATTR_ACQUIRE); #if SPUFS_MMAP_4K -static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_mss_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { - return spufs_ps_nopfn(vma, address, 0x0000, 0x1000); + return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_MSS_MAP_SIZE); } static struct vm_operations_struct spufs_mss_mmap_vmops = { - .nopfn = spufs_mss_mmap_nopfn, + .fault = spufs_mss_mmap_fault, }; /* @@ -1424,14 +1449,14 @@ static const struct file_operations spufs_mss_fops = { .mmap = spufs_mss_mmap, }; -static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_psmap_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { - return spufs_ps_nopfn(vma, address, 0x0000, 0x20000); + return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_PS_MAP_SIZE); } static struct vm_operations_struct spufs_psmap_mmap_vmops = { - .nopfn = spufs_psmap_mmap_nopfn, + .fault = spufs_psmap_mmap_fault, }; /* @@ -1484,14 +1509,14 @@ static const struct file_operations spufs_psmap_fops = { #if SPUFS_MMAP_4K -static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma, - unsigned long address) +static int +spufs_mfc_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf) { - return spufs_ps_nopfn(vma, address, 0x3000, 0x1000); + return spufs_ps_fault(vma, vmf, 0x3000, SPUFS_MFC_MAP_SIZE); } static struct vm_operations_struct spufs_mfc_mmap_vmops = { - .nopfn = spufs_mfc_mmap_nopfn, + .fault = spufs_mfc_mmap_fault, }; /* @@ -2553,22 +2578,74 @@ void spu_switch_log_notify(struct spu *spu, struct spu_context *ctx, wake_up(&ctx->switch_log->wait); } -struct tree_descr spufs_dir_contents[] = { +static int spufs_show_ctx(struct seq_file *s, void *private) +{ + struct spu_context *ctx = s->private; + u64 mfc_control_RW; + + mutex_lock(&ctx->state_mutex); + if (ctx->spu) { + struct spu *spu = ctx->spu; + struct spu_priv2 __iomem *priv2 = spu->priv2; + + spin_lock_irq(&spu->register_lock); + mfc_control_RW = in_be64(&priv2->mfc_control_RW); + spin_unlock_irq(&spu->register_lock); + } else { + struct spu_state *csa = &ctx->csa; + + mfc_control_RW = csa->priv2.mfc_control_RW; + } + + seq_printf(s, "%c flgs(%lx) sflgs(%lx) pri(%d) ts(%d) spu(%02d)" + " %c %lx %lx %lx %lx %x %x\n", + ctx->state == SPU_STATE_SAVED ? 'S' : 'R', + ctx->flags, + ctx->sched_flags, + ctx->prio, + ctx->time_slice, + ctx->spu ? ctx->spu->number : -1, + !list_empty(&ctx->rq) ? 'q' : ' ', + ctx->csa.class_0_pending, + ctx->csa.class_0_dar, + ctx->csa.class_1_dsisr, + mfc_control_RW, + ctx->ops->runcntl_read(ctx), + ctx->ops->status_read(ctx)); + + mutex_unlock(&ctx->state_mutex); + + return 0; +} + +static int spufs_ctx_open(struct inode *inode, struct file *file) +{ + return single_open(file, spufs_show_ctx, SPUFS_I(inode)->i_ctx); +} + +static const struct file_operations spufs_ctx_fops = { + .open = spufs_ctx_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; + +struct spufs_tree_descr spufs_dir_contents[] = { { "capabilities", &spufs_caps_fops, 0444, }, - { "mem", &spufs_mem_fops, 0666, }, - { "regs", &spufs_regs_fops, 0666, }, + { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, + { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), }, { "mbox", &spufs_mbox_fops, 0444, }, { "ibox", &spufs_ibox_fops, 0444, }, { "wbox", &spufs_wbox_fops, 0222, }, - { "mbox_stat", &spufs_mbox_stat_fops, 0444, }, - { "ibox_stat", &spufs_ibox_stat_fops, 0444, }, - { "wbox_stat", &spufs_wbox_stat_fops, 0444, }, + { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), }, + { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), }, + { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), }, { "signal1", &spufs_signal1_fops, 0666, }, { "signal2", &spufs_signal2_fops, 0666, }, { "signal1_type", &spufs_signal1_type, 0666, }, { "signal2_type", &spufs_signal2_type, 0666, }, { "cntl", &spufs_cntl_fops, 0666, }, - { "fpcr", &spufs_fpcr_fops, 0666, }, + { "fpcr", &spufs_fpcr_fops, 0666, sizeof(struct spu_reg128), }, { "lslr", &spufs_lslr_ops, 0444, }, { "mfc", &spufs_mfc_fops, 0666, }, { "mss", &spufs_mss_fops, 0666, }, @@ -2578,29 +2655,31 @@ struct tree_descr spufs_dir_contents[] = { { "decr_status", &spufs_decr_status_ops, 0666, }, { "event_mask", &spufs_event_mask_ops, 0666, }, { "event_status", &spufs_event_status_ops, 0444, }, - { "psmap", &spufs_psmap_fops, 0666, }, + { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, }, { "phys-id", &spufs_id_ops, 0666, }, { "object-id", &spufs_object_id_ops, 0666, }, - { "mbox_info", &spufs_mbox_info_fops, 0444, }, - { "ibox_info", &spufs_ibox_info_fops, 0444, }, - { "wbox_info", &spufs_wbox_info_fops, 0444, }, - { "dma_info", &spufs_dma_info_fops, 0444, }, - { "proxydma_info", &spufs_proxydma_info_fops, 0444, }, + { "mbox_info", &spufs_mbox_info_fops, 0444, sizeof(u32), }, + { "ibox_info", &spufs_ibox_info_fops, 0444, sizeof(u32), }, + { "wbox_info", &spufs_wbox_info_fops, 0444, sizeof(u32), }, + { "dma_info", &spufs_dma_info_fops, 0444, + sizeof(struct spu_dma_info), }, + { "proxydma_info", &spufs_proxydma_info_fops, 0444, + sizeof(struct spu_proxydma_info)}, { "tid", &spufs_tid_fops, 0444, }, { "stat", &spufs_stat_fops, 0444, }, { "switch_log", &spufs_switch_log_fops, 0444 }, {}, }; -struct tree_descr spufs_dir_nosched_contents[] = { +struct spufs_tree_descr spufs_dir_nosched_contents[] = { { "capabilities", &spufs_caps_fops, 0444, }, - { "mem", &spufs_mem_fops, 0666, }, + { "mem", &spufs_mem_fops, 0666, LS_SIZE, }, { "mbox", &spufs_mbox_fops, 0444, }, { "ibox", &spufs_ibox_fops, 0444, }, { "wbox", &spufs_wbox_fops, 0222, }, - { "mbox_stat", &spufs_mbox_stat_fops, 0444, }, - { "ibox_stat", &spufs_ibox_stat_fops, 0444, }, - { "wbox_stat", &spufs_wbox_stat_fops, 0444, }, + { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), }, + { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), }, + { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), }, { "signal1", &spufs_signal1_nosched_fops, 0222, }, { "signal2", &spufs_signal2_nosched_fops, 0222, }, { "signal1_type", &spufs_signal1_type, 0666, }, @@ -2609,7 +2688,7 @@ struct tree_descr spufs_dir_nosched_contents[] = { { "mfc", &spufs_mfc_fops, 0666, }, { "cntl", &spufs_cntl_fops, 0666, }, { "npc", &spufs_npc_ops, 0666, }, - { "psmap", &spufs_psmap_fops, 0666, }, + { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, }, { "phys-id", &spufs_id_ops, 0666, }, { "object-id", &spufs_object_id_ops, 0666, }, { "tid", &spufs_tid_fops, 0444, }, @@ -2617,6 +2696,11 @@ struct tree_descr spufs_dir_nosched_contents[] = { {}, }; +struct spufs_tree_descr spufs_dir_debug_contents[] = { + { ".ctx", &spufs_ctx_fops, 0444, }, + {}, +}; + struct spufs_coredump_reader spufs_coredump_read[] = { { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])}, { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) }, diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c index f407b24718554f474a153dc9a66e93d88518739f..690ca7b0dcf68e5f96562efef97b092b4a5433c6 100644 --- a/arch/powerpc/platforms/cell/spufs/inode.c +++ b/arch/powerpc/platforms/cell/spufs/inode.c @@ -42,10 +42,19 @@ #include "spufs.h" +struct spufs_sb_info { + int debug; +}; + static struct kmem_cache *spufs_inode_cache; char *isolated_loader; static int isolated_loader_size; +static struct spufs_sb_info *spufs_get_sb_info(struct super_block *sb) +{ + return sb->s_fs_info; +} + static struct inode * spufs_alloc_inode(struct super_block *sb) { @@ -69,7 +78,7 @@ spufs_destroy_inode(struct inode *inode) } static void -spufs_init_once(struct kmem_cache *cachep, void *p) +spufs_init_once(void *p) { struct spufs_inode_info *ei = p; @@ -109,7 +118,7 @@ spufs_setattr(struct dentry *dentry, struct iattr *attr) static int spufs_new_file(struct super_block *sb, struct dentry *dentry, const struct file_operations *fops, int mode, - struct spu_context *ctx) + size_t size, struct spu_context *ctx) { static struct inode_operations spufs_file_iops = { .setattr = spufs_setattr, @@ -125,6 +134,7 @@ spufs_new_file(struct super_block *sb, struct dentry *dentry, ret = 0; inode->i_op = &spufs_file_iops; inode->i_fop = fops; + inode->i_size = size; inode->i_private = SPUFS_I(inode)->i_ctx = get_spu_context(ctx); d_add(dentry, inode); out: @@ -177,7 +187,7 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir) return simple_rmdir(parent, dir); } -static int spufs_fill_dir(struct dentry *dir, struct tree_descr *files, +static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files, int mode, struct spu_context *ctx) { struct dentry *dentry, *tmp; @@ -189,7 +199,7 @@ static int spufs_fill_dir(struct dentry *dir, struct tree_descr *files, if (!dentry) goto out; ret = spufs_new_file(dir->d_sb, dentry, files->ops, - files->mode & mode, ctx); + files->mode & mode, files->size, ctx); if (ret) goto out; files++; @@ -279,6 +289,13 @@ spufs_mkdir(struct inode *dir, struct dentry *dentry, unsigned int flags, if (ret) goto out_free_ctx; + if (spufs_get_sb_info(dir->i_sb)->debug) + ret = spufs_fill_dir(dentry, spufs_dir_debug_contents, + mode, ctx); + + if (ret) + goto out_free_ctx; + d_instantiate(dentry, inode); dget(dentry); dir->i_nlink++; @@ -639,18 +656,19 @@ out: /* File system initialization */ enum { - Opt_uid, Opt_gid, Opt_mode, Opt_err, + Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err, }; static match_table_t spufs_tokens = { - { Opt_uid, "uid=%d" }, - { Opt_gid, "gid=%d" }, - { Opt_mode, "mode=%o" }, - { Opt_err, NULL }, + { Opt_uid, "uid=%d" }, + { Opt_gid, "gid=%d" }, + { Opt_mode, "mode=%o" }, + { Opt_debug, "debug" }, + { Opt_err, NULL }, }; static int -spufs_parse_options(char *options, struct inode *root) +spufs_parse_options(struct super_block *sb, char *options, struct inode *root) { char *p; substring_t args[MAX_OPT_ARGS]; @@ -678,6 +696,9 @@ spufs_parse_options(char *options, struct inode *root) return 0; root->i_mode = option | S_IFDIR; break; + case Opt_debug: + spufs_get_sb_info(sb)->debug = 1; + break; default: return 0; } @@ -736,7 +757,7 @@ spufs_create_root(struct super_block *sb, void *data) SPUFS_I(inode)->i_ctx = NULL; ret = -EINVAL; - if (!spufs_parse_options(data, inode)) + if (!spufs_parse_options(sb, data, inode)) goto out_iput; ret = -ENOMEM; @@ -754,6 +775,7 @@ out: static int spufs_fill_super(struct super_block *sb, void *data, int silent) { + struct spufs_sb_info *info; static struct super_operations s_ops = { .alloc_inode = spufs_alloc_inode, .destroy_inode = spufs_destroy_inode, @@ -765,11 +787,16 @@ spufs_fill_super(struct super_block *sb, void *data, int silent) save_mount_options(sb, data); + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) + return -ENOMEM; + sb->s_maxbytes = MAX_LFS_FILESIZE; sb->s_blocksize = PAGE_CACHE_SIZE; sb->s_blocksize_bits = PAGE_CACHE_SHIFT; sb->s_magic = SPUFS_MAGIC; sb->s_op = &s_ops; + sb->s_fs_info = info; return spufs_create_root(sb, data); } diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index e929e70a84e3c96af13da6d7730d14276b5e6874..2deeeba7eccfc9c555d5d32aca370507f08268be 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c @@ -312,10 +312,27 @@ static struct spu *aff_ref_location(struct spu_context *ctx, int mem_aff, */ node = cpu_to_node(raw_smp_processor_id()); for (n = 0; n < MAX_NUMNODES; n++, node++) { + int available_spus; + node = (node < MAX_NUMNODES) ? node : 0; if (!node_allowed(ctx, node)) continue; + + available_spus = 0; mutex_lock(&cbe_spu_info[node].list_mutex); + list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) { + if (spu->ctx && spu->ctx->gang + && spu->ctx->aff_offset == 0) + available_spus -= + (spu->ctx->gang->contexts - 1); + else + available_spus++; + } + if (available_spus < ctx->gang->contexts) { + mutex_unlock(&cbe_spu_info[node].list_mutex); + continue; + } + list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list) { if ((!mem_aff || spu->has_mem_affinity) && sched_spu(spu)) { @@ -389,6 +406,9 @@ static int has_affinity(struct spu_context *ctx) if (list_empty(&ctx->aff_list)) return 0; + if (atomic_read(&ctx->gang->aff_sched_count) == 0) + ctx->gang->aff_ref_spu = NULL; + if (!gang->aff_ref_spu) { if (!(gang->aff_flags & AFF_MERGED)) aff_merge_remaining_ctxs(gang); @@ -416,14 +436,8 @@ static void spu_unbind_context(struct spu *spu, struct spu_context *ctx) if (spu->ctx->flags & SPU_CREATE_NOSCHED) atomic_dec(&cbe_spu_info[spu->node].reserved_spus); - if (ctx->gang){ - mutex_lock(&ctx->gang->aff_mutex); - if (has_affinity(ctx)) { - if (atomic_dec_and_test(&ctx->gang->aff_sched_count)) - ctx->gang->aff_ref_spu = NULL; - } - mutex_unlock(&ctx->gang->aff_mutex); - } + if (ctx->gang) + atomic_dec_if_positive(&ctx->gang->aff_sched_count); spu_switch_notify(spu, NULL); spu_unmap_mappings(ctx); @@ -562,10 +576,7 @@ static struct spu *spu_get_idle(struct spu_context *ctx) goto found; mutex_unlock(&cbe_spu_info[node].list_mutex); - mutex_lock(&ctx->gang->aff_mutex); - if (atomic_dec_and_test(&ctx->gang->aff_sched_count)) - ctx->gang->aff_ref_spu = NULL; - mutex_unlock(&ctx->gang->aff_mutex); + atomic_dec(&ctx->gang->aff_sched_count); goto not_found; } mutex_unlock(&ctx->gang->aff_mutex); @@ -899,7 +910,8 @@ static noinline void spusched_tick(struct spu_context *ctx) spu_add_to_rq(ctx); } else { spu_context_nospu_trace(spusched_tick__newslice, ctx); - ctx->time_slice++; + if (!ctx->time_slice) + ctx->time_slice++; } out: spu_release(ctx); @@ -993,6 +1005,7 @@ void spuctx_switch_state(struct spu_context *ctx, struct timespec ts; struct spu *spu; enum spu_utilization_state old_state; + int node; ktime_get_ts(&ts); curtime = timespec_to_ns(&ts); @@ -1014,6 +1027,11 @@ void spuctx_switch_state(struct spu_context *ctx, spu->stats.times[old_state] += delta; spu->stats.util_state = new_state; spu->stats.tstamp = curtime; + node = spu->node; + if (old_state == SPU_UTIL_USER) + atomic_dec(&cbe_spu_info[node].busy_spus); + if (new_state == SPU_UTIL_USER); + atomic_inc(&cbe_spu_info[node].busy_spus); } } diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h index 454c277c1457deaf4034b084cf95e438241c295c..8ae8ef9dfc22dd5a73bfba0899ddffa7d375b693 100644 --- a/arch/powerpc/platforms/cell/spufs/spufs.h +++ b/arch/powerpc/platforms/cell/spufs/spufs.h @@ -32,6 +32,13 @@ #include #include +#define SPUFS_PS_MAP_SIZE 0x20000 +#define SPUFS_MFC_MAP_SIZE 0x1000 +#define SPUFS_CNTL_MAP_SIZE 0x1000 +#define SPUFS_CNTL_MAP_SIZE 0x1000 +#define SPUFS_SIGNAL_MAP_SIZE PAGE_SIZE +#define SPUFS_MSS_MAP_SIZE 0x1000 + /* The magic number for our file system */ enum { SPUFS_MAGIC = 0x23c9b64e, @@ -228,8 +235,16 @@ struct spufs_inode_info { #define SPUFS_I(inode) \ container_of(inode, struct spufs_inode_info, vfs_inode) -extern struct tree_descr spufs_dir_contents[]; -extern struct tree_descr spufs_dir_nosched_contents[]; +struct spufs_tree_descr { + const char *name; + const struct file_operations *ops; + int mode; + size_t size; +}; + +extern struct spufs_tree_descr spufs_dir_contents[]; +extern struct spufs_tree_descr spufs_dir_nosched_contents[]; +extern struct spufs_tree_descr spufs_dir_debug_contents[]; /* system call implementation */ extern struct spufs_calls spufs_calls; diff --git a/arch/powerpc/platforms/cell/spufs/sputrace.c b/arch/powerpc/platforms/cell/spufs/sputrace.c index 53202422ba727c8ec9a9f95a80fb1db95181e12c..92d20e993ede097d5e732a2bf0b751f9931eb7d1 100644 --- a/arch/powerpc/platforms/cell/spufs/sputrace.c +++ b/arch/powerpc/platforms/cell/spufs/sputrace.c @@ -182,10 +182,10 @@ struct spu_probe spu_probes[] = { { "spu_yield__enter", "ctx %p", spu_context_nospu_event }, { "spu_deactivate__enter", "ctx %p", spu_context_nospu_event }, { "__spu_deactivate__unload", "ctx %p spu %p", spu_context_event }, - { "spufs_ps_nopfn__enter", "ctx %p", spu_context_nospu_event }, - { "spufs_ps_nopfn__sleep", "ctx %p", spu_context_nospu_event }, - { "spufs_ps_nopfn__wake", "ctx %p spu %p", spu_context_event }, - { "spufs_ps_nopfn__insert", "ctx %p spu %p", spu_context_event }, + { "spufs_ps_fault__enter", "ctx %p", spu_context_nospu_event }, + { "spufs_ps_fault__sleep", "ctx %p", spu_context_nospu_event }, + { "spufs_ps_fault__wake", "ctx %p spu %p", spu_context_event }, + { "spufs_ps_fault__insert", "ctx %p spu %p", spu_context_event }, { "spu_acquire_saved__enter", "ctx %p", spu_context_nospu_event }, { "destroy_spu_context__enter", "ctx %p", spu_context_nospu_event }, { "spufs_stop_callback__enter", "ctx %p spu %p", spu_context_event }, @@ -196,8 +196,7 @@ static int __init sputrace_init(void) struct proc_dir_entry *entry; int i, error = -ENOMEM; - sputrace_log = kcalloc(sizeof(struct sputrace), - bufsize, GFP_KERNEL); + sputrace_log = kcalloc(bufsize, sizeof(struct sputrace), GFP_KERNEL); if (!sputrace_log) goto out; diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c index 609c46db4a1bc36e493250ee9231697656bd4da8..768c262b936891eeaebb361a1c2612e8ef429588 100644 --- a/arch/powerpc/platforms/chrp/pci.c +++ b/arch/powerpc/platforms/chrp/pci.c @@ -367,7 +367,7 @@ static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide) viaisa = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, NULL); if (!viaisa) return; - printk("Fixing VIA IDE, force legacy mode on '%s'\n", viaide->dev.bus_id); + dev_info(&viaide->dev, "Fixing VIA IDE, force legacy mode on\n"); pci_read_config_byte(viaide, PCI_CLASS_PROG, &progif); pci_write_config_byte(viaide, PCI_CLASS_PROG, progif & ~0x5); diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 116babbaaf81f6ea77c6e405da8b71699f187bfd..1ba7ce5aafaed24ef6cae57e36dcd21d454c1d94 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c @@ -63,13 +63,6 @@ static struct mpic *chrp_mpic; DEFINE_PER_CPU(struct timer_list, heartbeat_timer); unsigned long event_scan_interval; -/* - * XXX this should be in xmon.h, but putting it there means xmon.h - * has to include (to get irqreturn_t), which - * causes all sorts of problems. -- paulus - */ -extern irqreturn_t xmon_irq(int, void *); - extern unsigned long loops_per_jiffy; /* To be replaced by RTAS when available */ diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 4290889678137f1fc20ad3a7f9550e844c7568a7..4f9f8184d164146a577727e67ab1999f74a9e963 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig @@ -59,6 +59,16 @@ config PPC_PRPMC2800 help This option enables support for the Motorola PrPMC2800 board +config PPC_C2K + bool "SBS/GEFanuc C2K board" + depends on EMBEDDED6xx + select MV64X60 + select NOT_COHERENT_CACHE + select MTD_CFI_I4 + help + This option enables support for the GE Fanuc C2K board (formerly + an SBS board). + config TSI108_BRIDGE bool select PCI diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile index 06524d3ffd2ef2bbbbdec0f0c06c54641956c579..0773c08bd444994a6a450e94f8d474adcedf22b6 100644 --- a/arch/powerpc/platforms/embedded6xx/Makefile +++ b/arch/powerpc/platforms/embedded6xx/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o obj-$(CONFIG_STORCENTER) += storcenter.o obj-$(CONFIG_PPC_HOLLY) += holly.o obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o +obj-$(CONFIG_PPC_C2K) += c2k.o diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c new file mode 100644 index 0000000000000000000000000000000000000000..d0b25b8c39d11bdaab0db206266af0d77beb944a --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/c2k.c @@ -0,0 +1,158 @@ +/* + * Board setup routines for the GEFanuc C2K board + * + * Author: Remi Machet + * + * Originated from prpmc2800.c + * + * 2008 (c) Stanford University + * 2007 (c) MontaVista, Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include + +#define MV64x60_MPP_CNTL_0 0x0000 +#define MV64x60_MPP_CNTL_2 0x0008 + +#define MV64x60_GPP_IO_CNTL 0x0000 +#define MV64x60_GPP_LEVEL_CNTL 0x0010 +#define MV64x60_GPP_VALUE_SET 0x0018 + +static void __iomem *mv64x60_mpp_reg_base; +static void __iomem *mv64x60_gpp_reg_base; + +static void __init c2k_setup_arch(void) +{ + struct device_node *np; + phys_addr_t paddr; + const unsigned int *reg; + + /* + * ioremap mpp and gpp registers in case they are later + * needed by c2k_reset_board(). + */ + np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp"); + reg = of_get_property(np, "reg", NULL); + paddr = of_translate_address(np, reg); + of_node_put(np); + mv64x60_mpp_reg_base = ioremap(paddr, reg[1]); + + np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp"); + reg = of_get_property(np, "reg", NULL); + paddr = of_translate_address(np, reg); + of_node_put(np); + mv64x60_gpp_reg_base = ioremap(paddr, reg[1]); + +#ifdef CONFIG_PCI + mv64x60_pci_init(); +#endif +} + +static void c2k_reset_board(void) +{ + u32 temp; + + local_irq_disable(); + + temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); + temp &= 0xFFFF0FFF; + out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp); + + temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); + temp |= 0x00000004; + out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); + + temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); + temp |= 0x00000004; + out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); + + temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); + temp &= 0xFFFF0FFF; + out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp); + + temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); + temp |= 0x00080000; + out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); + + temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); + temp |= 0x00080000; + out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); + + out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); +} + +static void c2k_restart(char *cmd) +{ + c2k_reset_board(); + msleep(100); + panic("restart failed\n"); +} + +#ifdef CONFIG_NOT_COHERENT_CACHE +#define COHERENCY_SETTING "off" +#else +#define COHERENCY_SETTING "on" +#endif + +void c2k_show_cpuinfo(struct seq_file *m) +{ + uint memsize = total_memory; + + seq_printf(m, "Vendor\t\t: GEFanuc\n"); + seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); + seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING); +} + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init c2k_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K")) + return 0; + + printk(KERN_INFO "Detected a GEFanuc C2K board\n"); + + _set_L2CR(0); + _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); + return 1; +} + +define_machine(c2k) { + .name = "C2K", + .probe = c2k_probe, + .setup_arch = c2k_setup_arch, + .init_early = mv64x60_init_early, + .show_cpuinfo = c2k_show_cpuinfo, + .init_IRQ = mv64x60_init_irq, + .get_irq = mv64x60_get_irq, + .restart = c2k_restart, + .calibrate_decr = generic_calibrate_decr, +#ifdef CONFIG_KEXEC + .machine_kexec = default_machine_kexec, + .machine_kexec_prepare = default_machine_kexec_prepare, + .machine_crash_shutdown = default_machine_crash_shutdown, +#endif +}; diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c index afc9141be63eaf5f72d31ad82c155e45e2fc127e..ef74a0763ec124a063c67992b99ac9e8f6d6f316 100644 --- a/arch/powerpc/platforms/fsl_uli1575.c +++ b/arch/powerpc/platforms/fsl_uli1575.c @@ -51,15 +51,13 @@ u8 uli_pirq_to_irq[8] = { ULI_8259_NONE, /* PIRQH */ }; -/* set in board code if you want this quirks to do something */ -int uses_fsl_uli_m1575; - /* Bridge */ static void __devinit early_uli5249(struct pci_dev *dev) { unsigned char temp; - if (!uses_fsl_uli_m1575) + if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && + !machine_is(mpc8572_ds)) return; pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO | @@ -82,7 +80,8 @@ static void __devinit quirk_uli1575(struct pci_dev *dev) { int i; - if (!uses_fsl_uli_m1575) + if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && + !machine_is(mpc8572_ds)) return; /* @@ -150,7 +149,8 @@ static void __devinit quirk_final_uli1575(struct pci_dev *dev) * IRQ 14: Edge * IRQ 15: Edge */ - if (!uses_fsl_uli_m1575) + if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && + !machine_is(mpc8572_ds)) return; outb(0xfa, 0x4d0); @@ -176,7 +176,8 @@ static void __devinit quirk_uli5288(struct pci_dev *dev) unsigned char c; unsigned int d; - if (!uses_fsl_uli_m1575) + if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && + !machine_is(mpc8572_ds)) return; /* read/write lock */ @@ -200,7 +201,8 @@ static void __devinit quirk_uli5229(struct pci_dev *dev) { unsigned short temp; - if (!uses_fsl_uli_m1575) + if (!machine_is(mpc86xx_hpcn) && !machine_is(mpc8544_ds) && + !machine_is(mpc8572_ds)) return; pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE | @@ -221,7 +223,7 @@ static void __devinit quirk_final_uli5249(struct pci_dev *dev) for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { if ((bus->resource[i]) && (bus->resource[i]->flags & IORESOURCE_MEM)) { - dummy = ioremap(bus->resource[i]->start, 0x4); + dummy = ioremap(bus->resource[i]->end - 3, 0x4); if (dummy) { in_8(dummy); iounmap(dummy); @@ -238,6 +240,103 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5249, quirk_final_uli5249); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x1575, quirk_final_uli1575); +static void __devinit hpcd_quirk_uli1575(struct pci_dev *dev) +{ + u32 temp32; + + if (!machine_is(mpc86xx_hpcd)) + return; + + /* Disable INTx */ + pci_read_config_dword(dev, 0x48, &temp32); + pci_write_config_dword(dev, 0x48, (temp32 | 1<<26)); + + /* Enable sideband interrupt */ + pci_read_config_dword(dev, 0x90, &temp32); + pci_write_config_dword(dev, 0x90, (temp32 | 1<<22)); +} + +static void __devinit hpcd_quirk_uli5288(struct pci_dev *dev) +{ + unsigned char c; + unsigned short temp; + + if (!machine_is(mpc86xx_hpcd)) + return; + + /* Interrupt Disable, Needed when SATA disabled */ + pci_read_config_word(dev, PCI_COMMAND, &temp); + temp |= 1<<10; + pci_write_config_word(dev, PCI_COMMAND, temp); + + pci_read_config_byte(dev, 0x83, &c); + c |= 0x80; + pci_write_config_byte(dev, 0x83, c); + + pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01); + pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06); + + pci_read_config_byte(dev, 0x83, &c); + c &= 0x7f; + pci_write_config_byte(dev, 0x83, c); +} + +/* + * Since 8259PIC was disabled on the board, the IDE device can not + * use the legacy IRQ, we need to let the IDE device work under + * native mode and use the interrupt line like other PCI devices. + * IRQ14 is a sideband interrupt from IDE device to CPU and we use this + * as the interrupt for IDE device. + */ +static void __devinit hpcd_quirk_uli5229(struct pci_dev *dev) +{ + unsigned char c; + + if (!machine_is(mpc86xx_hpcd)) + return; + + pci_read_config_byte(dev, 0x4b, &c); + c |= 0x10; + pci_write_config_byte(dev, 0x4b, c); +} + +/* + * SATA interrupt pin bug fix + * There's a chip bug for 5288, The interrupt pin should be 2, + * not the read only value 1, So it use INTB#, not INTA# which + * actually used by the IDE device 5229. + * As of this bug, during the PCI initialization, 5288 read the + * irq of IDE device from the device tree, this function fix this + * bug by re-assigning a correct irq to 5288. + * + */ +static void __devinit hpcd_final_uli5288(struct pci_dev *dev) +{ + struct pci_controller *hose = pci_bus_to_host(dev->bus); + struct device_node *hosenode = hose ? hose->dn : NULL; + struct of_irq oirq; + int virq, pin = 2; + u32 laddr[3]; + + if (!machine_is(mpc86xx_hpcd)) + return; + + if (!hosenode) + return; + + laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8); + laddr[1] = laddr[2] = 0; + of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq); + virq = irq_create_of_mapping(oirq.controller, oirq.specifier, + oirq.size); + dev->irq = virq; +} + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, hpcd_quirk_uli1575); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, hpcd_quirk_uli5288); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, hpcd_quirk_uli5229); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, hpcd_final_uli5288); + int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig index 761d9e971fc4bacb5413efc9dd4b02cb3da4bd8c..ea3e541ac74f306d1dee49cedc96dad2d8ebbdad 100644 --- a/arch/powerpc/platforms/iseries/Kconfig +++ b/arch/powerpc/platforms/iseries/Kconfig @@ -2,6 +2,7 @@ config PPC_ISERIES bool "IBM Legacy iSeries" depends on PPC_MULTIPLATFORM && PPC64 select PPC_INDIRECT_IO + select PPC_PCI_CHOICE if EMBEDDED menu "iSeries device drivers" depends on PPC_ISERIES diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c index 11fa3c772ed567f8ba907b024dc3ef8010713777..bb464d1211b2f5842bdb6d09862396600b6d9e33 100644 --- a/arch/powerpc/platforms/iseries/iommu.c +++ b/arch/powerpc/platforms/iseries/iommu.c @@ -41,8 +41,9 @@ #include #include -static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages, - unsigned long uaddr, enum dma_data_direction direction) +static int tce_build_iSeries(struct iommu_table *tbl, long index, long npages, + unsigned long uaddr, enum dma_data_direction direction, + struct dma_attrs *attrs) { u64 rc; u64 tce, rpn; @@ -70,6 +71,7 @@ static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages, index++; uaddr += TCE_PAGE_SIZE; } + return 0; } static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages) @@ -214,13 +216,13 @@ dma_addr_t iseries_hv_map(void *vaddr, size_t size, enum dma_data_direction direction) { return iommu_map_single(NULL, &vio_iommu_table, vaddr, size, - DMA_32BIT_MASK, direction); + DMA_32BIT_MASK, direction, NULL); } void iseries_hv_unmap(dma_addr_t dma_handle, size_t size, enum dma_data_direction direction) { - iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction); + iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction, NULL); } void __init iommu_vio_init(void) diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c index 1dc7295746dac6471503b098182c9f1e128239d8..731d7b157749e29547c0a615e66b35e0329ea72d 100644 --- a/arch/powerpc/platforms/iseries/mf.c +++ b/arch/powerpc/platforms/iseries/mf.c @@ -871,7 +871,7 @@ static int proc_mf_dump_cmdline(char *page, char **start, off_t off, count = 256 - off; dma_addr = iseries_hv_map(page, off + count, DMA_FROM_DEVICE); - if (dma_mapping_error(dma_addr)) + if (dma_mapping_error(NULL, dma_addr)) return -ENOMEM; memset(page, 0, off + count); memset(&vsp_cmd, 0, sizeof(vsp_cmd)); diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index b72120751bbed16460b9f3c87c3e849b59228c2c..70b688c1aefb9f7512c74d0d20d1583454328c70 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c @@ -561,7 +561,7 @@ static void yield_shared_processor(void) static void iseries_shared_idle(void) { while (1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched() && !hvlpevent_is_pending()) { local_irq_disable(); ppc64_runlatch_off(); @@ -591,7 +591,7 @@ static void iseries_dedicated_idle(void) set_thread_flag(TIF_POLLING_NRFLAG); while (1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); if (!need_resched()) { while (!need_resched()) { ppc64_runlatch_off(); diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c index 9f7579b38c72db2f5df5d80af6a493bbba80371e..53bca132fb484d413aa27020a8596f58a9409cf6 100644 --- a/arch/powerpc/platforms/maple/time.c +++ b/arch/powerpc/platforms/maple/time.c @@ -41,8 +41,6 @@ #define DBG(x...) #endif -extern void GregorianDay(struct rtc_time * tm); - static int maple_rtc_addr; static int maple_clock_read(int addr) diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c index 86967bdd8774db20ae04d13fb7f4b65c80482192..a0ff03a3d8daf566350a2ead9e05131df36b65e7 100644 --- a/arch/powerpc/platforms/pasemi/iommu.c +++ b/arch/powerpc/platforms/pasemi/iommu.c @@ -83,9 +83,10 @@ static u32 *iob_l2_base; static struct iommu_table iommu_table_iobmap; static int iommu_table_iobmap_inited; -static void iobmap_build(struct iommu_table *tbl, long index, +static int iobmap_build(struct iommu_table *tbl, long index, long npages, unsigned long uaddr, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { u32 *ip; u32 rpn; @@ -107,6 +108,7 @@ static void iobmap_build(struct iommu_table *tbl, long index, uaddr += IOBMAP_PAGE_SIZE; bus_addr += IOBMAP_PAGE_SIZE; } + return 0; } diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile index 4d72c8f721598d77c60c68ec74799fd75920e931..89774177b209e25465ae9d5648166a1c2ff72840 100644 --- a/arch/powerpc/platforms/powermac/Makefile +++ b/arch/powerpc/platforms/powermac/Makefile @@ -1,5 +1,10 @@ CFLAGS_bootx_init.o += -fPIC +ifdef CONFIG_FTRACE +# Do not trace early boot code +CFLAGS_REMOVE_bootx_init.o = -pg +endif + obj-y += pic.o setup.o time.o feature.o pci.o \ sleep.o low_i2c.o cache.o pfunc_core.o \ pfunc_base.o diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 829b8b02527bfb4f5d2a388256687ee10a2847a0..6d149ae8ffa71c02928e3bdf52d9b6573e65283b 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c @@ -34,16 +34,10 @@ #include #include #include +#include #include "pmac.h" -/* - * XXX this should be in xmon.h, but putting it there means xmon.h - * has to include (to get irqreturn_t), which - * causes all sorts of problems. -- paulus - */ -extern irqreturn_t xmon_irq(int, void *); - #ifdef CONFIG_PPC32 struct pmac_irq_hw { unsigned int event; diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index 00bd0166d07fd78261a4230bbcb30555f313a356..88ccf3a08a9c387ef13ac373d3f08e2368460350 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c @@ -97,8 +97,6 @@ extern struct machdep_calls pmac_md; int sccdbg; #endif -extern void zs_kgdb_hook(int tty_num); - sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN; EXPORT_SYMBOL(sys_ctrler); @@ -329,10 +327,6 @@ static void __init pmac_setup_arch(void) l2cr_init(); #endif /* CONFIG_PPC32 */ -#ifdef CONFIG_KGDB - zs_kgdb_hook(0); -#endif - find_via_cuda(); find_via_pmu(); smu_init(); @@ -547,6 +541,78 @@ static int __init pmac_declare_of_platform_devices(void) } machine_device_initcall(powermac, pmac_declare_of_platform_devices); +#ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE +/* + * This is called very early, as part of console_init() (typically just after + * time_init()). This function is respondible for trying to find a good + * default console on serial ports. It tries to match the open firmware + * default output with one of the available serial console drivers. + */ +static int __init check_pmac_serial_console(void) +{ + struct device_node *prom_stdout = NULL; + int offset = 0; + const char *name; +#ifdef CONFIG_SERIAL_PMACZILOG_TTYS + char *devname = "ttyS"; +#else + char *devname = "ttyPZ"; +#endif + + pr_debug(" -> check_pmac_serial_console()\n"); + + /* The user has requested a console so this is already set up. */ + if (strstr(boot_command_line, "console=")) { + pr_debug(" console was specified !\n"); + return -EBUSY; + } + + if (!of_chosen) { + pr_debug(" of_chosen is NULL !\n"); + return -ENODEV; + } + + /* We are getting a weird phandle from OF ... */ + /* ... So use the full path instead */ + name = of_get_property(of_chosen, "linux,stdout-path", NULL); + if (name == NULL) { + pr_debug(" no linux,stdout-path !\n"); + return -ENODEV; + } + prom_stdout = of_find_node_by_path(name); + if (!prom_stdout) { + pr_debug(" can't find stdout package %s !\n", name); + return -ENODEV; + } + pr_debug("stdout is %s\n", prom_stdout->full_name); + + name = of_get_property(prom_stdout, "name", NULL); + if (!name) { + pr_debug(" stdout package has no name !\n"); + goto not_found; + } + + if (strcmp(name, "ch-a") == 0) + offset = 0; + else if (strcmp(name, "ch-b") == 0) + offset = 1; + else + goto not_found; + of_node_put(prom_stdout); + + pr_debug("Found serial console at %s%d\n", devname, offset); + + return add_preferred_console(devname, offset, NULL); + + not_found: + pr_debug("No preferred console found !\n"); + of_node_put(prom_stdout); + return -ENODEV; +} +console_initcall(check_pmac_serial_console); + +#endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */ + /* * Called very early, MMU is off, device-tree isn't unflattened */ diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index cb2d894541c642609d3e9f408fd91484daa99fa4..4ae3d00e0bdd9bc98dde1368cd2abc226e6cf1d9 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c @@ -36,6 +36,7 @@ #include #include +#include #include #include #include @@ -786,8 +787,7 @@ static void __devinit smp_core99_kick_cpu(int nr) { unsigned int save_vector; unsigned long target, flags; - volatile unsigned int *vector - = ((volatile unsigned int *)(KERNELBASE+0x100)); + unsigned int *vector = (unsigned int *)(KERNELBASE+0x100); if (nr < 0 || nr > 3) return; @@ -804,7 +804,7 @@ static void __devinit smp_core99_kick_cpu(int nr) * b __secondary_start_pmac_0 + nr*8 - KERNELBASE */ target = (unsigned long) __secondary_start_pmac_0 + nr * 8; - create_branch((unsigned long)vector, target, BRANCH_SET_LINK); + patch_branch(vector, target, BRANCH_SET_LINK); /* Put some life in our friend */ pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0); diff --git a/arch/powerpc/platforms/powermac/udbg_scc.c b/arch/powerpc/platforms/powermac/udbg_scc.c index 47de4d3fc1674008f90dbf380e0971c6cb2417ac..572771fd84636aaaece971daa9a6648005b862ca 100644 --- a/arch/powerpc/platforms/powermac/udbg_scc.c +++ b/arch/powerpc/platforms/powermac/udbg_scc.c @@ -125,13 +125,23 @@ void udbg_scc_init(int force_scc) out_8(sccc, 0xc0); /* If SCC was the OF output port, read the BRG value, else - * Setup for 57600 8N1 + * Setup for 38400 or 57600 8N1 depending on the machine */ if (ch_def != NULL) { out_8(sccc, 13); scc_inittab[1] = in_8(sccc); out_8(sccc, 12); scc_inittab[3] = in_8(sccc); + } else if (machine_is_compatible("RackMac1,1") + || machine_is_compatible("RackMac1,2") + || machine_is_compatible("MacRISC4")) { + /* Xserves and G5s default to 57600 */ + scc_inittab[1] = 0; + scc_inittab[3] = 0; + } else { + /* Others default to 38400 */ + scc_inittab[1] = 0; + scc_inittab[3] = 1; } for (i = 0; i < sizeof(scc_inittab); ++i) diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig index a5f4e95dfc3d277732767f2c887ac56bd0e56187..920cf7a454b1d26df440baf93409dad33c9b2394 100644 --- a/arch/powerpc/platforms/ps3/Kconfig +++ b/arch/powerpc/platforms/ps3/Kconfig @@ -8,6 +8,7 @@ config PPC_PS3 select USB_ARCH_HAS_EHCI select USB_EHCI_BIG_ENDIAN_MMIO select MEMORY_HOTPLUG + select PPC_PCI_CHOICE help This option enables support for the Sony PS3 game console and other platforms using the PS3 hypervisor. Enabling this diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c index 3866debfa3c41d0062851f0fcfdbb47ab7cc7c8e..ffdd8e963fbdf04032b79afcd640748c4f4b77a9 100644 --- a/arch/powerpc/platforms/ps3/device-init.c +++ b/arch/powerpc/platforms/ps3/device-init.c @@ -486,6 +486,7 @@ static int __init ps3_register_graphics_devices(void) return -ENOMEM; p->dev.match_id = PS3_MATCH_ID_GRAPHICS; + p->dev.match_sub_id = PS3_MATCH_SUB_ID_FB; p->dev.dev_type = PS3_DEVICE_TYPE_IOC0; result = ps3_system_bus_device_register(&p->dev); diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c index f0b12f212363589a69cc104d7d2df1a484a27c7d..a0927a3bacb79eee1a571d526e0c56236c27017d 100644 --- a/arch/powerpc/platforms/ps3/smp.c +++ b/arch/powerpc/platforms/ps3/smp.c @@ -105,9 +105,10 @@ static void __init ps3_smp_setup_cpu(int cpu) * to index needs to be setup. */ - BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0); - BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1); - BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3); + BUILD_BUG_ON(PPC_MSG_CALL_FUNCTION != 0); + BUILD_BUG_ON(PPC_MSG_RESCHEDULE != 1); + BUILD_BUG_ON(PPC_MSG_CALL_FUNC_SINGLE != 2); + BUILD_BUG_ON(PPC_MSG_DEBUGGER_BREAK != 3); for (i = 0; i < MSG_COUNT; i++) { result = ps3_event_receive_port_setup(cpu, &virqs[i]); diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c index 43c493fca2d03811c6c2c619e411d1a186bc38d2..280ee88cb0b001c21449c18694d498a9c58e6de0 100644 --- a/arch/powerpc/platforms/ps3/system-bus.c +++ b/arch/powerpc/platforms/ps3/system-bus.c @@ -347,11 +347,23 @@ static int ps3_system_bus_match(struct device *_dev, struct ps3_system_bus_driver *drv = ps3_drv_to_system_bus_drv(_drv); struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); - result = dev->match_id == drv->match_id; + if (!dev->match_sub_id) + result = dev->match_id == drv->match_id; + else + result = dev->match_sub_id == drv->match_sub_id && + dev->match_id == drv->match_id; + + if (result) + pr_info("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): match\n", + __func__, __LINE__, + dev->match_id, dev->match_sub_id, dev->core.bus_id, + drv->match_id, drv->match_sub_id, drv->core.name); + else + pr_debug("%s:%d: dev=%u.%u(%s), drv=%u.%u(%s): miss\n", + __func__, __LINE__, + dev->match_id, dev->match_sub_id, dev->core.bus_id, + drv->match_id, drv->match_sub_id, drv->core.name); - pr_info("%s:%d: dev=%u(%s), drv=%u(%s): %s\n", __func__, __LINE__, - dev->match_id, dev->core.bus_id, drv->match_id, drv->core.name, - (result ? "match" : "miss")); return result; } @@ -362,7 +374,7 @@ static int ps3_system_bus_probe(struct device *_dev) struct ps3_system_bus_driver *drv; BUG_ON(!dev); - pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); + pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); drv = ps3_system_bus_dev_to_system_bus_drv(dev); BUG_ON(!drv); @@ -370,10 +382,10 @@ static int ps3_system_bus_probe(struct device *_dev) if (drv->probe) result = drv->probe(dev); else - pr_info("%s:%d: %s no probe method\n", __func__, __LINE__, + pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__, dev->core.bus_id); - pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); + pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); return result; } @@ -384,7 +396,7 @@ static int ps3_system_bus_remove(struct device *_dev) struct ps3_system_bus_driver *drv; BUG_ON(!dev); - pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); + pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); drv = ps3_system_bus_dev_to_system_bus_drv(dev); BUG_ON(!drv); @@ -395,7 +407,7 @@ static int ps3_system_bus_remove(struct device *_dev) dev_dbg(&dev->core, "%s:%d %s: no remove method\n", __func__, __LINE__, drv->core.name); - pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); + pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); return result; } @@ -550,7 +562,7 @@ static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr, */ static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, struct dma_attrs *attrs) { struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); int result; @@ -570,7 +582,8 @@ static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size, static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr, size_t size, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); int result; @@ -603,7 +616,7 @@ static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr, } static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction) + size_t size, enum dma_data_direction direction, struct dma_attrs *attrs) { struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); int result; @@ -617,7 +630,7 @@ static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr, } static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, struct dma_attrs *attrs) { #if defined(CONFIG_PS3_DYNAMIC_DMA) BUG_ON("do"); @@ -646,14 +659,15 @@ static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl, static int ps3_ioc0_map_sg(struct device *_dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { BUG(); return 0; } static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, struct dma_attrs *attrs) { #if defined(CONFIG_PS3_DYNAMIC_DMA) BUG_ON("do"); @@ -661,7 +675,8 @@ static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg, } static void ps3_ioc0_unmap_sg(struct device *_dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) + int nents, enum dma_data_direction direction, + struct dma_attrs *attrs) { BUG(); } diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index 07fe5b69b9e25f8c1c930c18a28a29920e525c89..97619fd51e393870d1c0c1da8a6bdb1926a52a57 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig @@ -7,6 +7,7 @@ config PPC_PSERIES select RTAS_ERROR_LOGGING select PPC_UDBG_16550 select PPC_NATIVE + select PPC_PCI_CHOICE if EMBEDDED default y config PPC_SPLPAR @@ -39,3 +40,26 @@ config PPC_PSERIES_DEBUG depends on PPC_PSERIES && PPC_EARLY_DEBUG bool "Enable extra debug logging in platforms/pseries" default y + +config PPC_SMLPAR + bool "Support for shared-memory logical partitions" + depends on PPC_PSERIES + select LPARCFG + default n + help + Select this option to enable shared memory partition support. + With this option a system running in an LPAR can be given more + memory than physically available and will allow firmware to + balance memory across many LPARs. + +config CMM + tristate "Collaborative memory management" + depends on PPC_SMLPAR + default y + help + Select this option, if you want to enable the kernel interface + to reduce the memory size of the system. This is accomplished + by allocating pages of memory and put them "on hold". This only + makes sense for a system running in an LPAR where the unused pages + will be reused for other LPARs. The interface allows firmware to + balance memory across many LPARs. diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile index 554c6e42ef2a9ff1f78340a0d5a9c49f5d46b611..dfe574af2dc090bd5ce3aaac503fef02e8bddb91 100644 --- a/arch/powerpc/platforms/pseries/Makefile +++ b/arch/powerpc/platforms/pseries/Makefile @@ -24,3 +24,4 @@ obj-$(CONFIG_HVC_CONSOLE) += hvconsole.o obj-$(CONFIG_HVCS) += hvcserver.o obj-$(CONFIG_HCALL_STATS) += hvCall_inst.o obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o +obj-$(CONFIG_CMM) += cmm.o diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c new file mode 100644 index 0000000000000000000000000000000000000000..38fe32a7cc7007b2c3a24a5ed688db7c1a9d7dd2 --- /dev/null +++ b/arch/powerpc/platforms/pseries/cmm.c @@ -0,0 +1,472 @@ +/* + * Collaborative memory management interface. + * + * Copyright (C) 2008 IBM Corporation + * Author(s): Brian King (brking@linux.vnet.ibm.com), + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "plpar_wrappers.h" + +#define CMM_DRIVER_VERSION "1.0.0" +#define CMM_DEFAULT_DELAY 1 +#define CMM_DEBUG 0 +#define CMM_DISABLE 0 +#define CMM_OOM_KB 1024 +#define CMM_MIN_MEM_MB 256 +#define KB2PAGES(_p) ((_p)>>(PAGE_SHIFT-10)) +#define PAGES2KB(_p) ((_p)<<(PAGE_SHIFT-10)) + +static unsigned int delay = CMM_DEFAULT_DELAY; +static unsigned int oom_kb = CMM_OOM_KB; +static unsigned int cmm_debug = CMM_DEBUG; +static unsigned int cmm_disabled = CMM_DISABLE; +static unsigned long min_mem_mb = CMM_MIN_MEM_MB; +static struct sys_device cmm_sysdev; + +MODULE_AUTHOR("Brian King "); +MODULE_DESCRIPTION("IBM System p Collaborative Memory Manager"); +MODULE_LICENSE("GPL"); +MODULE_VERSION(CMM_DRIVER_VERSION); + +module_param_named(delay, delay, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(delay, "Delay (in seconds) between polls to query hypervisor paging requests. " + "[Default=" __stringify(CMM_DEFAULT_DELAY) "]"); +module_param_named(oom_kb, oom_kb, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(oom_kb, "Amount of memory in kb to free on OOM. " + "[Default=" __stringify(CMM_OOM_KB) "]"); +module_param_named(min_mem_mb, min_mem_mb, ulong, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(min_mem_mb, "Minimum amount of memory (in MB) to not balloon. " + "[Default=" __stringify(CMM_MIN_MEM_MB) "]"); +module_param_named(debug, cmm_debug, uint, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(debug, "Enable module debugging logging. Set to 1 to enable. " + "[Default=" __stringify(CMM_DEBUG) "]"); + +#define CMM_NR_PAGES ((PAGE_SIZE - sizeof(void *) - sizeof(unsigned long)) / sizeof(unsigned long)) + +#define cmm_dbg(...) if (cmm_debug) { printk(KERN_INFO "cmm: "__VA_ARGS__); } + +struct cmm_page_array { + struct cmm_page_array *next; + unsigned long index; + unsigned long page[CMM_NR_PAGES]; +}; + +static unsigned long loaned_pages; +static unsigned long loaned_pages_target; +static unsigned long oom_freed_pages; + +static struct cmm_page_array *cmm_page_list; +static DEFINE_SPINLOCK(cmm_lock); + +static struct task_struct *cmm_thread_ptr; + +/** + * cmm_alloc_pages - Allocate pages and mark them as loaned + * @nr: number of pages to allocate + * + * Return value: + * number of pages requested to be allocated which were not + **/ +static long cmm_alloc_pages(long nr) +{ + struct cmm_page_array *pa, *npa; + unsigned long addr; + long rc; + + cmm_dbg("Begin request for %ld pages\n", nr); + + while (nr) { + addr = __get_free_page(GFP_NOIO | __GFP_NOWARN | + __GFP_NORETRY | __GFP_NOMEMALLOC); + if (!addr) + break; + spin_lock(&cmm_lock); + pa = cmm_page_list; + if (!pa || pa->index >= CMM_NR_PAGES) { + /* Need a new page for the page list. */ + spin_unlock(&cmm_lock); + npa = (struct cmm_page_array *)__get_free_page(GFP_NOIO | __GFP_NOWARN | + __GFP_NORETRY | __GFP_NOMEMALLOC); + if (!npa) { + pr_info("%s: Can not allocate new page list\n", __FUNCTION__); + free_page(addr); + break; + } + spin_lock(&cmm_lock); + pa = cmm_page_list; + + if (!pa || pa->index >= CMM_NR_PAGES) { + npa->next = pa; + npa->index = 0; + pa = npa; + cmm_page_list = pa; + } else + free_page((unsigned long) npa); + } + + if ((rc = plpar_page_set_loaned(__pa(addr)))) { + pr_err("%s: Can not set page to loaned. rc=%ld\n", __FUNCTION__, rc); + spin_unlock(&cmm_lock); + free_page(addr); + break; + } + + pa->page[pa->index++] = addr; + loaned_pages++; + totalram_pages--; + spin_unlock(&cmm_lock); + nr--; + } + + cmm_dbg("End request with %ld pages unfulfilled\n", nr); + return nr; +} + +/** + * cmm_free_pages - Free pages and mark them as active + * @nr: number of pages to free + * + * Return value: + * number of pages requested to be freed which were not + **/ +static long cmm_free_pages(long nr) +{ + struct cmm_page_array *pa; + unsigned long addr; + + cmm_dbg("Begin free of %ld pages.\n", nr); + spin_lock(&cmm_lock); + pa = cmm_page_list; + while (nr) { + if (!pa || pa->index <= 0) + break; + addr = pa->page[--pa->index]; + + if (pa->index == 0) { + pa = pa->next; + free_page((unsigned long) cmm_page_list); + cmm_page_list = pa; + } + + plpar_page_set_active(__pa(addr)); + free_page(addr); + loaned_pages--; + nr--; + totalram_pages++; + } + spin_unlock(&cmm_lock); + cmm_dbg("End request with %ld pages unfulfilled\n", nr); + return nr; +} + +/** + * cmm_oom_notify - OOM notifier + * @self: notifier block struct + * @dummy: not used + * @parm: returned - number of pages freed + * + * Return value: + * NOTIFY_OK + **/ +static int cmm_oom_notify(struct notifier_block *self, + unsigned long dummy, void *parm) +{ + unsigned long *freed = parm; + long nr = KB2PAGES(oom_kb); + + cmm_dbg("OOM processing started\n"); + nr = cmm_free_pages(nr); + loaned_pages_target = loaned_pages; + *freed += KB2PAGES(oom_kb) - nr; + oom_freed_pages += KB2PAGES(oom_kb) - nr; + cmm_dbg("OOM processing complete\n"); + return NOTIFY_OK; +} + +/** + * cmm_get_mpp - Read memory performance parameters + * + * Makes hcall to query the current page loan request from the hypervisor. + * + * Return value: + * nothing + **/ +static void cmm_get_mpp(void) +{ + int rc; + struct hvcall_mpp_data mpp_data; + unsigned long active_pages_target; + signed long page_loan_request; + + rc = h_get_mpp(&mpp_data); + + if (rc != H_SUCCESS) + return; + + page_loan_request = div_s64((s64)mpp_data.loan_request, PAGE_SIZE); + loaned_pages_target = page_loan_request + loaned_pages; + if (loaned_pages_target > oom_freed_pages) + loaned_pages_target -= oom_freed_pages; + else + loaned_pages_target = 0; + + active_pages_target = totalram_pages + loaned_pages - loaned_pages_target; + + if ((min_mem_mb * 1024 * 1024) > (active_pages_target * PAGE_SIZE)) + loaned_pages_target = totalram_pages + loaned_pages - + ((min_mem_mb * 1024 * 1024) / PAGE_SIZE); + + cmm_dbg("delta = %ld, loaned = %lu, target = %lu, oom = %lu, totalram = %lu\n", + page_loan_request, loaned_pages, loaned_pages_target, + oom_freed_pages, totalram_pages); +} + +static struct notifier_block cmm_oom_nb = { + .notifier_call = cmm_oom_notify +}; + +/** + * cmm_thread - CMM task thread + * @dummy: not used + * + * Return value: + * 0 + **/ +static int cmm_thread(void *dummy) +{ + unsigned long timeleft; + + while (1) { + timeleft = msleep_interruptible(delay * 1000); + + if (kthread_should_stop() || timeleft) { + loaned_pages_target = loaned_pages; + break; + } + + cmm_get_mpp(); + + if (loaned_pages_target > loaned_pages) { + if (cmm_alloc_pages(loaned_pages_target - loaned_pages)) + loaned_pages_target = loaned_pages; + } else if (loaned_pages_target < loaned_pages) + cmm_free_pages(loaned_pages - loaned_pages_target); + } + return 0; +} + +#define CMM_SHOW(name, format, args...) \ + static ssize_t show_##name(struct sys_device *dev, \ + struct sysdev_attribute *attr, \ + char *buf) \ + { \ + return sprintf(buf, format, ##args); \ + } \ + static SYSDEV_ATTR(name, S_IRUGO, show_##name, NULL) + +CMM_SHOW(loaned_kb, "%lu\n", PAGES2KB(loaned_pages)); +CMM_SHOW(loaned_target_kb, "%lu\n", PAGES2KB(loaned_pages_target)); + +static ssize_t show_oom_pages(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) +{ + return sprintf(buf, "%lu\n", PAGES2KB(oom_freed_pages)); +} + +static ssize_t store_oom_pages(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t count) +{ + unsigned long val = simple_strtoul (buf, NULL, 10); + + if (!capable(CAP_SYS_ADMIN)) + return -EPERM; + if (val != 0) + return -EBADMSG; + + oom_freed_pages = 0; + return count; +} + +static SYSDEV_ATTR(oom_freed_kb, S_IWUSR| S_IRUGO, + show_oom_pages, store_oom_pages); + +static struct sysdev_attribute *cmm_attrs[] = { + &attr_loaned_kb, + &attr_loaned_target_kb, + &attr_oom_freed_kb, +}; + +static struct sysdev_class cmm_sysdev_class = { + .name = "cmm", +}; + +/** + * cmm_sysfs_register - Register with sysfs + * + * Return value: + * 0 on success / other on failure + **/ +static int cmm_sysfs_register(struct sys_device *sysdev) +{ + int i, rc; + + if ((rc = sysdev_class_register(&cmm_sysdev_class))) + return rc; + + sysdev->id = 0; + sysdev->cls = &cmm_sysdev_class; + + if ((rc = sysdev_register(sysdev))) + goto class_unregister; + + for (i = 0; i < ARRAY_SIZE(cmm_attrs); i++) { + if ((rc = sysdev_create_file(sysdev, cmm_attrs[i]))) + goto fail; + } + + return 0; + +fail: + while (--i >= 0) + sysdev_remove_file(sysdev, cmm_attrs[i]); + sysdev_unregister(sysdev); +class_unregister: + sysdev_class_unregister(&cmm_sysdev_class); + return rc; +} + +/** + * cmm_unregister_sysfs - Unregister from sysfs + * + **/ +static void cmm_unregister_sysfs(struct sys_device *sysdev) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(cmm_attrs); i++) + sysdev_remove_file(sysdev, cmm_attrs[i]); + sysdev_unregister(sysdev); + sysdev_class_unregister(&cmm_sysdev_class); +} + +/** + * cmm_init - Module initialization + * + * Return value: + * 0 on success / other on failure + **/ +static int cmm_init(void) +{ + int rc = -ENOMEM; + + if (!firmware_has_feature(FW_FEATURE_CMO)) + return -EOPNOTSUPP; + + if ((rc = register_oom_notifier(&cmm_oom_nb)) < 0) + return rc; + + if ((rc = cmm_sysfs_register(&cmm_sysdev))) + goto out_oom_notifier; + + if (cmm_disabled) + return rc; + + cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); + if (IS_ERR(cmm_thread_ptr)) { + rc = PTR_ERR(cmm_thread_ptr); + goto out_unregister_sysfs; + } + + return rc; + +out_unregister_sysfs: + cmm_unregister_sysfs(&cmm_sysdev); +out_oom_notifier: + unregister_oom_notifier(&cmm_oom_nb); + return rc; +} + +/** + * cmm_exit - Module exit + * + * Return value: + * nothing + **/ +static void cmm_exit(void) +{ + if (cmm_thread_ptr) + kthread_stop(cmm_thread_ptr); + unregister_oom_notifier(&cmm_oom_nb); + cmm_free_pages(loaned_pages); + cmm_unregister_sysfs(&cmm_sysdev); +} + +/** + * cmm_set_disable - Disable/Enable CMM + * + * Return value: + * 0 on success / other on failure + **/ +static int cmm_set_disable(const char *val, struct kernel_param *kp) +{ + int disable = simple_strtoul(val, NULL, 10); + + if (disable != 0 && disable != 1) + return -EINVAL; + + if (disable && !cmm_disabled) { + if (cmm_thread_ptr) + kthread_stop(cmm_thread_ptr); + cmm_thread_ptr = NULL; + cmm_free_pages(loaned_pages); + } else if (!disable && cmm_disabled) { + cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); + if (IS_ERR(cmm_thread_ptr)) + return PTR_ERR(cmm_thread_ptr); + } + + cmm_disabled = disable; + return 0; +} + +module_param_call(disable, cmm_set_disable, param_get_uint, + &cmm_disabled, S_IRUGO | S_IWUSR); +MODULE_PARM_DESC(disable, "Disable CMM. Set to 1 to disable. " + "[Default=" __stringify(CMM_DISABLE) "]"); + +module_init(cmm_init); +module_exit(cmm_exit); diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c index 6f544ba4b37feebfdd0be835b4cbf397c74783de..54816d75b5787b8d0f134c4de71f78854fd5d27a 100644 --- a/arch/powerpc/platforms/pseries/eeh.c +++ b/arch/powerpc/platforms/pseries/eeh.c @@ -75,9 +75,9 @@ */ /* If a device driver keeps reading an MMIO register in an interrupt - * handler after a slot isolation event has occurred, we assume it - * is broken and panic. This sets the threshold for how many read - * attempts we allow before panicking. + * handler after a slot isolation event, it might be broken. + * This sets the threshold for how many read attempts we allow + * before printing an error message. */ #define EEH_MAX_FAILS 2100000 @@ -470,6 +470,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) unsigned long flags; struct pci_dn *pdn; int rc = 0; + const char *location; total_mmio_ffs++; @@ -509,18 +510,15 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) rc = 1; if (pdn->eeh_mode & EEH_MODE_ISOLATED) { pdn->eeh_check_count ++; - if (pdn->eeh_check_count >= EEH_MAX_FAILS) { - printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n", - pdn->eeh_check_count); + if (pdn->eeh_check_count % EEH_MAX_FAILS == 0) { + location = of_get_property(dn, "ibm,loc-code", NULL); + printk (KERN_ERR "EEH: %d reads ignored for recovering device at " + "location=%s driver=%s pci addr=%s\n", + pdn->eeh_check_count, location, + dev->driver->name, pci_name(dev)); + printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n", + dev->driver->name); dump_stack(); - msleep(5000); - - /* re-read the slot reset state */ - if (read_slot_reset_state(pdn, rets) != 0) - rets[0] = -1; /* reset state unknown */ - - /* If we are here, then we hit an infinite loop. Stop. */ - panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev)); } goto dn_unlock; } @@ -812,6 +810,7 @@ int rtas_set_slot_reset(struct pci_dn *pdn) static inline void __restore_bars (struct pci_dn *pdn) { int i; + u32 cmd; if (NULL==pdn->phb) return; for (i=4; i<10; i++) { @@ -832,6 +831,19 @@ static inline void __restore_bars (struct pci_dn *pdn) /* max latency, min grant, interrupt pin and line */ rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]); + + /* Restore PERR & SERR bits, some devices require it, + don't touch the other command bits */ + rtas_read_config(pdn, PCI_COMMAND, 4, &cmd); + if (pdn->config_space[1] & PCI_COMMAND_PARITY) + cmd |= PCI_COMMAND_PARITY; + else + cmd &= ~PCI_COMMAND_PARITY; + if (pdn->config_space[1] & PCI_COMMAND_SERR) + cmd |= PCI_COMMAND_SERR; + else + cmd &= ~PCI_COMMAND_SERR; + rtas_write_config(pdn, PCI_COMMAND, 4, cmd); } /** diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c index 9d3a40f459747c2ab8077a21a23cb794893f9652..5a707da3f5c2b037aec5654133c90dd82dba4e30 100644 --- a/arch/powerpc/platforms/pseries/firmware.c +++ b/arch/powerpc/platforms/pseries/firmware.c @@ -26,6 +26,7 @@ #include #include +#include "pseries.h" typedef struct { unsigned long val; diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c index 3c5727dd5aa5daa9a269c56b95761d89a7ac075b..a1a368dd2d992adb57f4b99942ffdb1e6e55a87b 100644 --- a/arch/powerpc/platforms/pseries/hotplug-memory.c +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c @@ -15,34 +15,13 @@ #include #include -static int pseries_remove_memory(struct device_node *np) +static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size) { - const char *type; - const unsigned int *my_index; - const unsigned int *regs; - u64 start_pfn, start; + unsigned long start, start_pfn; struct zone *zone; - int ret = -EINVAL; - - /* - * Check to see if we are actually removing memory - */ - type = of_get_property(np, "device_type", NULL); - if (type == NULL || strcmp(type, "memory") != 0) - return 0; + int ret; - /* - * Find the memory index and size of the removing section - */ - my_index = of_get_property(np, "ibm,my-drc-index", NULL); - if (!my_index) - return ret; - - regs = of_get_property(np, "reg", NULL); - if (!regs) - return ret; - - start_pfn = section_nr_to_pfn(*my_index & 0xffff); + start_pfn = base >> PFN_SECTION_SHIFT; zone = page_zone(pfn_to_page(start_pfn)); /* @@ -54,56 +33,111 @@ static int pseries_remove_memory(struct device_node *np) * to sysfs "state" file and we can't remove sysfs entries * while writing to it. So we have to defer it to here. */ - ret = __remove_pages(zone, start_pfn, regs[3] >> PAGE_SHIFT); + ret = __remove_pages(zone, start_pfn, lmb_size >> PAGE_SHIFT); if (ret) return ret; /* * Update memory regions for memory remove */ - lmb_remove(start_pfn << PAGE_SHIFT, regs[3]); + lmb_remove(base, lmb_size); /* * Remove htab bolted mappings for this section of memory */ - start = (unsigned long)__va(start_pfn << PAGE_SHIFT); - ret = remove_section_mapping(start, start + regs[3]); + start = (unsigned long)__va(base); + ret = remove_section_mapping(start, start + lmb_size); return ret; } -static int pseries_add_memory(struct device_node *np) +static int pseries_remove_memory(struct device_node *np) { const char *type; - const unsigned int *my_index; const unsigned int *regs; - u64 start_pfn; + unsigned long base; + unsigned int lmb_size; int ret = -EINVAL; /* - * Check to see if we are actually adding memory + * Check to see if we are actually removing memory */ type = of_get_property(np, "device_type", NULL); if (type == NULL || strcmp(type, "memory") != 0) return 0; /* - * Find the memory index and size of the added section + * Find the bae address and size of the lmb */ - my_index = of_get_property(np, "ibm,my-drc-index", NULL); - if (!my_index) + regs = of_get_property(np, "reg", NULL); + if (!regs) return ret; + base = *(unsigned long *)regs; + lmb_size = regs[3]; + + ret = pseries_remove_lmb(base, lmb_size); + return ret; +} + +static int pseries_add_memory(struct device_node *np) +{ + const char *type; + const unsigned int *regs; + unsigned long base; + unsigned int lmb_size; + int ret = -EINVAL; + + /* + * Check to see if we are actually adding memory + */ + type = of_get_property(np, "device_type", NULL); + if (type == NULL || strcmp(type, "memory") != 0) + return 0; + + /* + * Find the base and size of the lmb + */ regs = of_get_property(np, "reg", NULL); if (!regs) return ret; - start_pfn = section_nr_to_pfn(*my_index & 0xffff); + base = *(unsigned long *)regs; + lmb_size = regs[3]; /* * Update memory region to represent the memory add */ - lmb_add(start_pfn << PAGE_SHIFT, regs[3]); - return 0; + ret = lmb_add(base, lmb_size); + return (ret < 0) ? -EINVAL : 0; +} + +static int pseries_drconf_memory(unsigned long *base, unsigned int action) +{ + struct device_node *np; + const unsigned long *lmb_size; + int rc; + + np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory"); + if (!np) + return -EINVAL; + + lmb_size = of_get_property(np, "ibm,lmb-size", NULL); + if (!lmb_size) { + of_node_put(np); + return -EINVAL; + } + + if (action == PSERIES_DRCONF_MEM_ADD) { + rc = lmb_add(*base, *lmb_size); + rc = (rc < 0) ? -EINVAL : 0; + } else if (action == PSERIES_DRCONF_MEM_REMOVE) { + rc = pseries_remove_lmb(*base, *lmb_size); + } else { + rc = -EINVAL; + } + + of_node_put(np); + return rc; } static int pseries_memory_notifier(struct notifier_block *nb, @@ -120,6 +154,11 @@ static int pseries_memory_notifier(struct notifier_block *nb, if (pseries_remove_memory(node)) err = NOTIFY_BAD; break; + case PSERIES_DRCONF_MEM_ADD: + case PSERIES_DRCONF_MEM_REMOVE: + if (pseries_drconf_memory(node, action)) + err = NOTIFY_BAD; + break; default: err = NOTIFY_DONE; break; diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 176f1f39d2d5c2f25416a651c58f2d82e267d19a..a8c446697f9e3b0e737b418f1f966fbec3bd1f49 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c @@ -48,9 +48,10 @@ #include "plpar_wrappers.h" -static void tce_build_pSeries(struct iommu_table *tbl, long index, +static int tce_build_pSeries(struct iommu_table *tbl, long index, long npages, unsigned long uaddr, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { u64 proto_tce; u64 *tcep; @@ -71,6 +72,7 @@ static void tce_build_pSeries(struct iommu_table *tbl, long index, uaddr += TCE_PAGE_SIZE; tcep++; } + return 0; } @@ -93,13 +95,19 @@ static unsigned long tce_get_pseries(struct iommu_table *tbl, long index) return *tcep; } -static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, +static void tce_free_pSeriesLP(struct iommu_table*, long, long); +static void tce_freemulti_pSeriesLP(struct iommu_table*, long, long); + +static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages, unsigned long uaddr, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { - u64 rc; + u64 rc = 0; u64 proto_tce, tce; u64 rpn; + int ret = 0; + long tcenum_start = tcenum, npages_start = npages; rpn = (virt_to_abs(uaddr)) >> TCE_SHIFT; proto_tce = TCE_PCI_READ; @@ -110,6 +118,13 @@ static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, tce = proto_tce | (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT; rc = plpar_tce_put((u64)tbl->it_index, (u64)tcenum << 12, tce); + if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) { + ret = (int)rc; + tce_free_pSeriesLP(tbl, tcenum_start, + (npages_start - (npages + 1))); + break; + } + if (rc && printk_ratelimit()) { printk("tce_build_pSeriesLP: plpar_tce_put failed. rc=%ld\n", rc); printk("\tindex = 0x%lx\n", (u64)tbl->it_index); @@ -121,23 +136,28 @@ static void tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum, tcenum++; rpn++; } + return ret; } static DEFINE_PER_CPU(u64 *, tce_page) = NULL; -static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, +static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages, unsigned long uaddr, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { - u64 rc; + u64 rc = 0; u64 proto_tce; u64 *tcep; u64 rpn; long l, limit; + long tcenum_start = tcenum, npages_start = npages; + int ret = 0; - if (npages == 1) + if (npages == 1) { return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, - direction); + direction, attrs); + } tcep = __get_cpu_var(tce_page); @@ -147,9 +167,10 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, if (!tcep) { tcep = (u64 *)__get_free_page(GFP_ATOMIC); /* If allocation fails, fall back to the loop implementation */ - if (!tcep) - return tce_build_pSeriesLP(tbl, tcenum, npages, - uaddr, direction); + if (!tcep) { + return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, + direction, attrs); + } __get_cpu_var(tce_page) = tcep; } @@ -180,6 +201,13 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, tcenum += limit; } while (npages > 0 && !rc); + if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) { + ret = (int)rc; + tce_freemulti_pSeriesLP(tbl, tcenum_start, + (npages_start - (npages + limit))); + return ret; + } + if (rc && printk_ratelimit()) { printk("tce_buildmulti_pSeriesLP: plpar_tce_put failed. rc=%ld\n", rc); printk("\tindex = 0x%lx\n", (u64)tbl->it_index); @@ -187,6 +215,7 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, printk("\ttce[0] val = 0x%lx\n", tcep[0]); show_stack(current, (unsigned long *)__get_SP()); } + return ret; } static void tce_free_pSeriesLP(struct iommu_table *tbl, long tcenum, long npages) diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c index e9dd5fe081c94bd66fad46ac416c0504699a0ca6..53cbd53d8740537d86b7fe5ab13e19dfcdcecd75 100644 --- a/arch/powerpc/platforms/pseries/kexec.c +++ b/arch/powerpc/platforms/pseries/kexec.c @@ -70,4 +70,4 @@ static int __init pseries_kexec_setup(void) return 0; } -__initcall(pseries_kexec_setup); +machine_device_initcall(pseries, pseries_kexec_setup); diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 2cbaedb17f3ebc2396c23154153d4abf8c8badc1..52a80e5840e87ee51c6ff33eea5fbdc83d9c7205 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c @@ -52,7 +52,7 @@ EXPORT_SYMBOL(plpar_hcall_norets); extern void pSeries_find_serial_port(void); -int vtermno; /* virtual terminal# for udbg */ +static int vtermno; /* virtual terminal# for udbg */ #define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) static void udbg_hvsi_putc(char c) @@ -305,7 +305,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group, flags = 0; /* Make pHyp happy */ - if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) + if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU)) hpte_r &= ~_PAGE_COHERENT; lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot); diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h index d8680b589dc96c325afb09725c47f5c6a008a3e6..a437267c6bf86efb7443a44bfbf9ed693614371a 100644 --- a/arch/powerpc/platforms/pseries/plpar_wrappers.h +++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h @@ -42,6 +42,16 @@ static inline long register_slb_shadow(unsigned long cpu, unsigned long vpa) return vpa_call(0x3, cpu, vpa); } +static inline long plpar_page_set_loaned(unsigned long vpa) +{ + return plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_LOANED, vpa, 0); +} + +static inline long plpar_page_set_active(unsigned long vpa) +{ + return plpar_hcall_norets(H_PAGE_INIT, H_PAGE_SET_ACTIVE, vpa, 0); +} + extern void vpa_init(int cpu); static inline long plpar_pte_enter(unsigned long flags, diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 2b548afd10031166166d77f58ae9939be0a6ae1a..d20b96e22c2ed763aa583cd2e387b29b1927f146 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c @@ -55,7 +55,7 @@ static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; static DEFINE_SPINLOCK(ras_log_buf_lock); -char mce_data_buf[RTAS_ERROR_LOG_MAX]; +static char mce_data_buf[RTAS_ERROR_LOG_MAX]; static int ras_get_sensor_state_token; static int ras_check_exception_token; diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c index 75769aae41d5ec7e67ee31dfc5b552971a7b1f77..7637bd38c7957d77d50d01c5f70a8597f3a4ddad 100644 --- a/arch/powerpc/platforms/pseries/reconfig.c +++ b/arch/powerpc/platforms/pseries/reconfig.c @@ -365,7 +365,7 @@ static char *parse_node(char *buf, size_t bufsize, struct device_node **npp) *buf = '\0'; buf++; - handle = simple_strtoul(handle_str, NULL, 10); + handle = simple_strtoul(handle_str, NULL, 0); *npp = of_find_node_by_phandle(handle); return buf; @@ -422,8 +422,8 @@ static int do_update_property(char *buf, size_t bufsize) { struct device_node *np; unsigned char *value; - char *name, *end; - int length; + char *name, *end, *next_prop; + int rc, length; struct property *newprop, *oldprop; buf = parse_node(buf, bufsize, &np); end = buf + bufsize; @@ -431,7 +431,8 @@ static int do_update_property(char *buf, size_t bufsize) if (!np) return -ENODEV; - if (parse_next_property(buf, end, &name, &length, &value) == NULL) + next_prop = parse_next_property(buf, end, &name, &length, &value); + if (!next_prop) return -EINVAL; newprop = new_property(name, length, value, NULL); @@ -442,7 +443,34 @@ static int do_update_property(char *buf, size_t bufsize) if (!oldprop) return -ENODEV; - return prom_update_property(np, newprop, oldprop); + rc = prom_update_property(np, newprop, oldprop); + if (rc) + return rc; + + /* For memory under the ibm,dynamic-reconfiguration-memory node + * of the device tree, adding and removing memory is just an update + * to the ibm,dynamic-memory property instead of adding/removing a + * memory node in the device tree. For these cases we still need to + * involve the notifier chain. + */ + if (!strcmp(name, "ibm,dynamic-memory")) { + int action; + + next_prop = parse_next_property(next_prop, end, &name, + &length, &value); + if (!next_prop) + return -EINVAL; + + if (!strcmp(name, "add")) + action = PSERIES_DRCONF_MEM_ADD; + else + action = PSERIES_DRCONF_MEM_REMOVE; + + blocking_notifier_call_chain(&pSeries_reconfig_chain, + action, value); + } + + return 0; } /** diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c index 7d3e2b0bd4d299d5f467fde2a014dec0fb835fdb..c9ffd8c225f1a7b1b2e852bf86899bd8d785e3b4 100644 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ b/arch/powerpc/platforms/pseries/rtasd.c @@ -32,7 +32,7 @@ static DEFINE_SPINLOCK(rtasd_log_lock); -DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); +static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); static char *rtas_log_buf; static unsigned long rtas_log_start; @@ -329,7 +329,7 @@ static unsigned int rtas_log_poll(struct file *file, poll_table * wait) return 0; } -const struct file_operations proc_rtas_log_operations = { +static const struct file_operations proc_rtas_log_operations = { .read = rtas_log_read, .poll = rtas_log_poll, .open = rtas_log_open, diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index f5d29f5b13c1b0afb1ec3f67e3fb9eabd6c4a2f2..063a0d2fba30e2576771a300460220c4e21c4cec 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -109,7 +109,7 @@ static void __init fwnmi_init(void) fwnmi_active = 1; } -void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) +static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) { unsigned int cascade_irq = i8259_irq(); if (cascade_irq != NO_IRQ) @@ -314,6 +314,76 @@ static int pseries_set_xdabr(unsigned long dabr) H_DABRX_KERNEL | H_DABRX_USER); } +#define CMO_CHARACTERISTICS_TOKEN 44 +#define CMO_MAXLENGTH 1026 + +/** + * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions, + * handle that here. (Stolen from parse_system_parameter_string) + */ +void pSeries_cmo_feature_init(void) +{ + char *ptr, *key, *value, *end; + int call_status; + int PrPSP = -1; + int SecPSP = -1; + + pr_debug(" -> fw_cmo_feature_init()\n"); + spin_lock(&rtas_data_buf_lock); + memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); + call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, + NULL, + CMO_CHARACTERISTICS_TOKEN, + __pa(rtas_data_buf), + RTAS_DATA_BUF_SIZE); + + if (call_status != 0) { + spin_unlock(&rtas_data_buf_lock); + pr_debug("CMO not available\n"); + pr_debug(" <- fw_cmo_feature_init()\n"); + return; + } + + end = rtas_data_buf + CMO_MAXLENGTH - 2; + ptr = rtas_data_buf + 2; /* step over strlen value */ + key = value = ptr; + + while (*ptr && (ptr <= end)) { + /* Separate the key and value by replacing '=' with '\0' and + * point the value at the string after the '=' + */ + if (ptr[0] == '=') { + ptr[0] = '\0'; + value = ptr + 1; + } else if (ptr[0] == '\0' || ptr[0] == ',') { + /* Terminate the string containing the key/value pair */ + ptr[0] = '\0'; + + if (key == value) { + pr_debug("Malformed key/value pair\n"); + /* Never found a '=', end processing */ + break; + } + + if (0 == strcmp(key, "PrPSP")) + PrPSP = simple_strtol(value, NULL, 10); + else if (0 == strcmp(key, "SecPSP")) + SecPSP = simple_strtol(value, NULL, 10); + value = key = ptr + 1; + } + ptr++; + } + + if (PrPSP != -1 || SecPSP != -1) { + pr_info("CMO enabled\n"); + pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", PrPSP, SecPSP); + powerpc_firmware_features |= FW_FEATURE_CMO; + } else + pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", PrPSP, SecPSP); + spin_unlock(&rtas_data_buf_lock); + pr_debug(" <- fw_cmo_feature_init()\n"); +} + /* * Early initialization. Relocation is on but do not reference unbolted pages */ @@ -329,6 +399,7 @@ static void __init pSeries_init_early(void) else if (firmware_has_feature(FW_FEATURE_XDABR)) ppc_md.set_dabr = pseries_set_xdabr; + pSeries_cmo_feature_init(); iommu_init_early_pSeries(); pr_debug(" <- pSeries_init_early()\n"); @@ -482,7 +553,7 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus) * possible with power button press. If ibm,power-off-ups token is used * it will allow auto poweron after power is restored. */ -void pSeries_power_off(void) +static void pSeries_power_off(void) { int rc; int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index ebebc28fe89545c8658c6410bb70203fe51bcda3..0fc830f576f5532870157af81cdaf4c65625b67d 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c @@ -383,13 +383,11 @@ static irqreturn_t xics_ipi_dispatch(int cpu) mb(); smp_message_recv(PPC_MSG_RESCHEDULE); } -#if 0 - if (test_and_clear_bit(PPC_MSG_MIGRATE_TASK, + if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, &xics_ipi_message[cpu].value)) { mb(); - smp_message_recv(PPC_MSG_MIGRATE_TASK); + smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE); } -#endif #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, &xics_ipi_message[cpu].value)) { diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S new file mode 100644 index 0000000000000000000000000000000000000000..21cda085d926417eed53992f711c9d843c99a7a2 --- /dev/null +++ b/arch/powerpc/sysdev/6xx-suspend.S @@ -0,0 +1,52 @@ +/* + * Enter and leave sleep state on chips with 6xx-style HID0 + * power management bits, which don't leave sleep state via reset. + * + * Author: Scott Wood + * + * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +_GLOBAL(mpc6xx_enter_standby) + mflr r4 + + mfspr r5, SPRN_HID0 + rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) + oris r5, r5, HID0_SLEEP@h + mtspr SPRN_HID0, r5 + isync + + lis r5, ret_from_standby@h + ori r5, r5, ret_from_standby@l + mtlr r5 + + rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT + lwz r6, TI_LOCAL_FLAGS(r5) + ori r6, r6, _TLF_SLEEPING + stw r6, TI_LOCAL_FLAGS(r5) + + mfmsr r5 + ori r5, r5, MSR_EE + oris r5, r5, MSR_POW@h + sync + mtmsr r5 + isync + +1: b 1b + +ret_from_standby: + mfspr r5, SPRN_HID0 + rlwinm r5, r5, 0, ~HID0_SLEEP + mtspr SPRN_HID0, r5 + + mtlr r4 + blr diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 6d386d0071a07e5bb59571d57b8a46e9793ae3ed..16a0ed28eb003d8e3bc7d50309c119871fff5cec 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -4,6 +4,7 @@ endif mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) +fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o obj-$(CONFIG_PPC_MPC106) += grackle.o obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o @@ -11,8 +12,9 @@ obj-$(CONFIG_PPC_PMI) += pmi.o obj-$(CONFIG_U3_DART) += dart_iommu.o obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o obj-$(CONFIG_FSL_SOC) += fsl_soc.o -obj-$(CONFIG_FSL_PCI) += fsl_pci.o +obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) obj-$(CONFIG_FSL_LBC) += fsl_lbc.o +obj-$(CONFIG_FSL_GTM) += fsl_gtm.o obj-$(CONFIG_RAPIDIO) += fsl_rio.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ @@ -40,7 +42,12 @@ endif ifeq ($(ARCH),powerpc) obj-$(CONFIG_CPM) += cpm_common.o obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o +obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o obj-$(CONFIG_PPC_DCR) += dcr.o obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o obj-$(CONFIG_UCODE_PATCH) += micropatch.o endif + +ifeq ($(CONFIG_SUSPEND),y) +obj-$(CONFIG_6xx) += 6xx-suspend.o +endif diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c index 7f59188cd9a111fdb89cd36a9ae0dfafb3d8cff6..9e105cbc5e5f4c3fb3f10654485d009cb37bb111 100644 --- a/arch/powerpc/sysdev/axonram.c +++ b/arch/powerpc/sysdev/axonram.c @@ -57,6 +57,8 @@ #define AXON_RAM_SECTOR_SIZE 1 << AXON_RAM_SECTOR_SHIFT #define AXON_RAM_IRQ_FLAGS IRQF_SHARED | IRQF_TRIGGER_RISING +static int azfs_major, azfs_minor; + struct axon_ram_bank { struct of_device *device; struct gendisk *disk; @@ -148,7 +150,10 @@ axon_ram_direct_access(struct block_device *device, sector_t sector, struct axon_ram_bank *bank = device->bd_disk->private_data; loff_t offset; - offset = sector << AXON_RAM_SECTOR_SHIFT; + offset = sector; + if (device->bd_part != NULL) + offset += device->bd_part->start_sect; + offset <<= AXON_RAM_SECTOR_SHIFT; if (offset >= bank->size) { dev_err(&bank->device->dev, "Access outside of address space\n"); return -ERANGE; @@ -227,19 +232,14 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id) goto failed; } - bank->disk->first_minor = 0; + bank->disk->major = azfs_major; + bank->disk->first_minor = azfs_minor; bank->disk->fops = &axon_ram_devops; bank->disk->private_data = bank; bank->disk->driverfs_dev = &device->dev; sprintf(bank->disk->disk_name, "%s%d", AXON_RAM_DEVICE_NAME, axon_ram_bank_id); - bank->disk->major = register_blkdev(0, bank->disk->disk_name); - if (bank->disk->major < 0) { - dev_err(&device->dev, "Cannot register block device\n"); - rc = -EFAULT; - goto failed; - } bank->disk->queue = blk_alloc_queue(GFP_KERNEL); if (bank->disk->queue == NULL) { @@ -276,6 +276,8 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id) goto failed; } + azfs_minor += bank->disk->minors; + return 0; failed: @@ -310,7 +312,6 @@ axon_ram_remove(struct of_device *device) device_remove_file(&device->dev, &dev_attr_ecc); free_irq(bank->irq_id, device); - unregister_blkdev(bank->disk->major, bank->disk->disk_name); del_gendisk(bank->disk); iounmap((void __iomem *) bank->io_addr); kfree(bank); @@ -341,6 +342,14 @@ static struct of_platform_driver axon_ram_driver = { static int __init axon_ram_init(void) { + azfs_major = register_blkdev(azfs_major, AXON_RAM_DEVICE_NAME); + if (azfs_major < 0) { + printk(KERN_ERR "%s cannot become block device major number\n", + AXON_RAM_MODULE_NAME); + return -EFAULT; + } + azfs_minor = 0; + return of_register_platform_driver(&axon_ram_driver); } @@ -351,6 +360,7 @@ static void __exit axon_ram_exit(void) { of_unregister_platform_driver(&axon_ram_driver); + unregister_blkdev(azfs_major, AXON_RAM_DEVICE_NAME); } module_init(axon_ram_init); diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c index 64ec7d6293633822f8c8afd000068d73a4160442..446c9ea85b3018b10a07fb55a9d1d86bff55c2db 100644 --- a/arch/powerpc/sysdev/bestcomm/bestcomm.c +++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c @@ -443,7 +443,7 @@ mpc52xx_bcom_probe(struct of_device *op, const struct of_device_id *match) /* Done ! */ printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n", - bcom_eng->regs_base); + (long)bcom_eng->regs_base); return 0; diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.c b/arch/powerpc/sysdev/bestcomm/gen_bd.c index 8d33eafbb3f4d5188fc5234cc5645f567effc532..a3a134c35b0ab436f1e54bdf7e41c67f3e4b294e 100644 --- a/arch/powerpc/sysdev/bestcomm/gen_bd.c +++ b/arch/powerpc/sysdev/bestcomm/gen_bd.c @@ -20,6 +20,7 @@ #include #include +#include #include "bestcomm.h" #include "bestcomm_priv.h" @@ -253,6 +254,100 @@ bcom_gen_bd_tx_release(struct bcom_task *tsk) } EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release); +/* --------------------------------------------------------------------- + * PSC support code + */ + +/** + * bcom_psc_parameters - Bestcomm initialization value table for PSC devices + * + * This structure is only used internally. It is a lookup table for PSC + * specific parameters to bestcomm tasks. + */ +static struct bcom_psc_params { + int rx_initiator; + int rx_ipr; + int tx_initiator; + int tx_ipr; +} bcom_psc_params[] = { + [0] = { + .rx_initiator = BCOM_INITIATOR_PSC1_RX, + .rx_ipr = BCOM_IPR_PSC1_RX, + .tx_initiator = BCOM_INITIATOR_PSC1_TX, + .tx_ipr = BCOM_IPR_PSC1_TX, + }, + [1] = { + .rx_initiator = BCOM_INITIATOR_PSC2_RX, + .rx_ipr = BCOM_IPR_PSC2_RX, + .tx_initiator = BCOM_INITIATOR_PSC2_TX, + .tx_ipr = BCOM_IPR_PSC2_TX, + }, + [2] = { + .rx_initiator = BCOM_INITIATOR_PSC3_RX, + .rx_ipr = BCOM_IPR_PSC3_RX, + .tx_initiator = BCOM_INITIATOR_PSC3_TX, + .tx_ipr = BCOM_IPR_PSC3_TX, + }, + [3] = { + .rx_initiator = BCOM_INITIATOR_PSC4_RX, + .rx_ipr = BCOM_IPR_PSC4_RX, + .tx_initiator = BCOM_INITIATOR_PSC4_TX, + .tx_ipr = BCOM_IPR_PSC4_TX, + }, + [4] = { + .rx_initiator = BCOM_INITIATOR_PSC5_RX, + .rx_ipr = BCOM_IPR_PSC5_RX, + .tx_initiator = BCOM_INITIATOR_PSC5_TX, + .tx_ipr = BCOM_IPR_PSC5_TX, + }, + [5] = { + .rx_initiator = BCOM_INITIATOR_PSC6_RX, + .rx_ipr = BCOM_IPR_PSC6_RX, + .tx_initiator = BCOM_INITIATOR_PSC6_TX, + .tx_ipr = BCOM_IPR_PSC6_TX, + }, +}; + +/** + * bcom_psc_gen_bd_rx_init - Allocate a receive bcom_task for a PSC port + * @psc_num: Number of the PSC to allocate a task for + * @queue_len: number of buffer descriptors to allocate for the task + * @fifo: physical address of FIFO register + * @maxbufsize: Maximum receive data size in bytes. + * + * Allocate a bestcomm task structure for receiving data from a PSC. + */ +struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len, + phys_addr_t fifo, int maxbufsize) +{ + if (psc_num >= MPC52xx_PSC_MAXNUM) + return NULL; + + return bcom_gen_bd_rx_init(queue_len, fifo, + bcom_psc_params[psc_num].rx_initiator, + bcom_psc_params[psc_num].rx_ipr, + maxbufsize); +} +EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_rx_init); + +/** + * bcom_psc_gen_bd_tx_init - Allocate a transmit bcom_task for a PSC port + * @psc_num: Number of the PSC to allocate a task for + * @queue_len: number of buffer descriptors to allocate for the task + * @fifo: physical address of FIFO register + * + * Allocate a bestcomm task structure for transmitting data to a PSC. + */ +struct bcom_task * +bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, phys_addr_t fifo) +{ + struct psc; + return bcom_gen_bd_tx_init(queue_len, fifo, + bcom_psc_params[psc_num].tx_initiator, + bcom_psc_params[psc_num].tx_ipr); +} +EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_tx_init); + MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver"); MODULE_AUTHOR("Jeff Gibbons "); diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.h b/arch/powerpc/sysdev/bestcomm/gen_bd.h index 5b6fa803c6aa697729c9aca9d61ae32241718d8e..de47260e69daa6423be73d990f83fa8115baba88 100644 --- a/arch/powerpc/sysdev/bestcomm/gen_bd.h +++ b/arch/powerpc/sysdev/bestcomm/gen_bd.h @@ -44,5 +44,10 @@ extern void bcom_gen_bd_tx_release(struct bcom_task *tsk); +/* PSC support utility wrappers */ +struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len, + phys_addr_t fifo, int maxbufsize); +struct bcom_task * bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, + phys_addr_t fifo); #endif /* __BESTCOMM_GEN_BD_H__ */ diff --git a/arch/powerpc/sysdev/bestcomm/sram.c b/arch/powerpc/sysdev/bestcomm/sram.c index 99784383a84335fcd0ffd065dc271bc66bc80bbb..5d74ef7a651f6e6f4fb38837fe914bcbe4c0297c 100644 --- a/arch/powerpc/sysdev/bestcomm/sram.c +++ b/arch/powerpc/sysdev/bestcomm/sram.c @@ -86,7 +86,7 @@ int bcom_sram_init(struct device_node *sram_node, char *owner) if (!bcom_sram->base_virt) { printk(KERN_ERR "%s: bcom_sram_init: " "Map error SRAM zone 0x%08lx (0x%0x)!\n", - owner, bcom_sram->base_phys, bcom_sram->size ); + owner, (long)bcom_sram->base_phys, bcom_sram->size ); rv = -ENOMEM; goto error_release; } diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 58292a086c164059e5d37a7de347003d436c7230..661df42830b912fc304783ac2b0aea135b9daaa3 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -159,7 +159,7 @@ unsigned int cpm_pic_init(void) out_be32(&cpic_reg->cpic_cimr, 0); - cpm_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR, + cpm_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 64, &cpm_pic_host_ops, 64); if (cpm_pic_host == NULL) { printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 5fe65b2f8f3a7a2c8d9079940f2eb1fdc79dac4e..b16ca3ed65d25bbee94aaeb82809c6810e60db97 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -266,7 +266,7 @@ void cpm2_pic_init(struct device_node *node) out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); /* create a legacy host */ - cpm2_pic_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, + cpm2_pic_host = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 64, &cpm2_pic_host_ops, 64); if (cpm2_pic_host == NULL) { printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index cb7df2dce44fd2a1467a123fde6480fa3a9c90ea..e4b7296acb2c7cbc9aa14ce3b9cf56641688f18d 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c @@ -37,7 +37,7 @@ static void udbg_putc_cpm(char c) u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]); if (c == '\n') - udbg_putc('\r'); + udbg_putc_cpm('\r'); while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000) ; @@ -53,7 +53,6 @@ void __init udbg_init_cpm(void) setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO); #endif udbg_putc = udbg_putc_cpm; - udbg_putc('X'); } } #endif @@ -85,9 +84,13 @@ int __init cpm_muram_init(void) np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); if (!np) { - printk(KERN_ERR "Cannot find CPM muram data node"); - ret = -ENODEV; - goto out; + /* try legacy bindings */ + np = of_find_node_by_name(NULL, "data-only"); + if (!np) { + printk(KERN_ERR "Cannot find CPM muram data node"); + ret = -ENODEV; + goto out; + } } muram_pbase = of_translate_address(np, zero); @@ -189,6 +192,12 @@ void __iomem *cpm_muram_addr(unsigned long offset) } EXPORT_SYMBOL(cpm_muram_addr); +unsigned long cpm_muram_offset(void __iomem *addr) +{ + return addr - (void __iomem *)muram_vbase; +} +EXPORT_SYMBOL(cpm_muram_offset); + /** * cpm_muram_dma - turn a muram virtual address into a DMA address * @offset: virtual address from cpm_muram_addr() to convert diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c index 005c2ecf976fe810f2f02ddee3f78200d8d3f010..89639ecbf38162621ca3d57654866ff08f4033d5 100644 --- a/arch/powerpc/sysdev/dart_iommu.c +++ b/arch/powerpc/sysdev/dart_iommu.c @@ -147,9 +147,10 @@ static void dart_flush(struct iommu_table *tbl) } } -static void dart_build(struct iommu_table *tbl, long index, +static int dart_build(struct iommu_table *tbl, long index, long npages, unsigned long uaddr, - enum dma_data_direction direction) + enum dma_data_direction direction, + struct dma_attrs *attrs) { unsigned int *dp; unsigned int rpn; @@ -183,6 +184,7 @@ static void dart_build(struct iommu_table *tbl, long index, } else { dart_dirty = 1; } + return 0; } diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c index 437e48d3ae3340d5817c10f20d2a6dfc8276daeb..a8ba9983dd5a8ab0ccc8e04bd82816796e02282b 100644 --- a/arch/powerpc/sysdev/dcr.c +++ b/arch/powerpc/sysdev/dcr.c @@ -23,6 +23,107 @@ #include #include +#ifdef CONFIG_PPC_DCR_MMIO +static struct device_node *find_dcr_parent(struct device_node *node) +{ + struct device_node *par, *tmp; + const u32 *p; + + for (par = of_node_get(node); par;) { + if (of_get_property(par, "dcr-controller", NULL)) + break; + p = of_get_property(par, "dcr-parent", NULL); + tmp = par; + if (p == NULL) + par = of_get_parent(par); + else + par = of_find_node_by_phandle(*p); + of_node_put(tmp); + } + return par; +} +#endif + +#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) + +bool dcr_map_ok_generic(dcr_host_t host) +{ + if (host.type == DCR_HOST_NATIVE) + return dcr_map_ok_native(host.host.native); + else if (host.type == DCR_HOST_MMIO) + return dcr_map_ok_mmio(host.host.mmio); + else + return 0; +} +EXPORT_SYMBOL_GPL(dcr_map_ok_generic); + +dcr_host_t dcr_map_generic(struct device_node *dev, + unsigned int dcr_n, + unsigned int dcr_c) +{ + dcr_host_t host; + struct device_node *dp; + const char *prop; + + host.type = DCR_HOST_INVALID; + + dp = find_dcr_parent(dev); + if (dp == NULL) + return host; + + prop = of_get_property(dp, "dcr-access-method", NULL); + + pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop); + + if (!strcmp(prop, "native")) { + host.type = DCR_HOST_NATIVE; + host.host.native = dcr_map_native(dev, dcr_n, dcr_c); + } else if (!strcmp(prop, "mmio")) { + host.type = DCR_HOST_MMIO; + host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c); + } + + of_node_put(dp); + return host; +} +EXPORT_SYMBOL_GPL(dcr_map_generic); + +void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c) +{ + if (host.type == DCR_HOST_NATIVE) + dcr_unmap_native(host.host.native, dcr_c); + else if (host.type == DCR_HOST_MMIO) + dcr_unmap_mmio(host.host.mmio, dcr_c); + else /* host.type == DCR_HOST_INVALID */ + WARN_ON(true); +} +EXPORT_SYMBOL_GPL(dcr_unmap_generic); + +u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n) +{ + if (host.type == DCR_HOST_NATIVE) + return dcr_read_native(host.host.native, dcr_n); + else if (host.type == DCR_HOST_MMIO) + return dcr_read_mmio(host.host.mmio, dcr_n); + else /* host.type == DCR_HOST_INVALID */ + WARN_ON(true); + return 0; +} +EXPORT_SYMBOL_GPL(dcr_read_generic); + +void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value) +{ + if (host.type == DCR_HOST_NATIVE) + dcr_write_native(host.host.native, dcr_n, value); + else if (host.type == DCR_HOST_MMIO) + dcr_write_mmio(host.host.mmio, dcr_n, value); + else /* host.type == DCR_HOST_INVALID */ + WARN_ON(true); +} +EXPORT_SYMBOL_GPL(dcr_write_generic); + +#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ + unsigned int dcr_resource_start(struct device_node *np, unsigned int index) { unsigned int ds; @@ -47,26 +148,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index) } EXPORT_SYMBOL_GPL(dcr_resource_len); -#ifndef CONFIG_PPC_DCR_NATIVE - -static struct device_node * find_dcr_parent(struct device_node * node) -{ - struct device_node *par, *tmp; - const u32 *p; - - for (par = of_node_get(node); par;) { - if (of_get_property(par, "dcr-controller", NULL)) - break; - p = of_get_property(par, "dcr-parent", NULL); - tmp = par; - if (p == NULL) - par = of_get_parent(par); - else - par = of_find_node_by_phandle(*p); - of_node_put(tmp); - } - return par; -} +#ifdef CONFIG_PPC_DCR_MMIO u64 of_translate_dcr_address(struct device_node *dev, unsigned int dcr_n, @@ -75,7 +157,7 @@ u64 of_translate_dcr_address(struct device_node *dev, struct device_node *dp; const u32 *p; unsigned int stride; - u64 ret; + u64 ret = OF_BAD_ADDR; dp = find_dcr_parent(dev); if (dp == NULL) @@ -90,7 +172,7 @@ u64 of_translate_dcr_address(struct device_node *dev, if (p == NULL) p = of_get_property(dp, "dcr-mmio-space", NULL); if (p == NULL) - return OF_BAD_ADDR; + goto done; /* Maybe could do some better range checking here */ ret = of_translate_address(dp, p); @@ -98,21 +180,25 @@ u64 of_translate_dcr_address(struct device_node *dev, ret += (u64)(stride) * (u64)dcr_n; if (out_stride) *out_stride = stride; + + done: + of_node_put(dp); return ret; } -dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, - unsigned int dcr_c) +dcr_host_mmio_t dcr_map_mmio(struct device_node *dev, + unsigned int dcr_n, + unsigned int dcr_c) { - dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; + dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; u64 addr; pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", dev->full_name, dcr_n, dcr_c); addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); - pr_debug("translates to addr: 0x%lx, stride: 0x%x\n", - addr, ret.stride); + pr_debug("translates to addr: 0x%llx, stride: 0x%x\n", + (unsigned long long) addr, ret.stride); if (addr == OF_BAD_ADDR) return ret; pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); @@ -124,11 +210,11 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, ret.token -= dcr_n * ret.stride; return ret; } -EXPORT_SYMBOL_GPL(dcr_map); +EXPORT_SYMBOL_GPL(dcr_map_mmio); -void dcr_unmap(dcr_host_t host, unsigned int dcr_c) +void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c) { - dcr_host_t h = host; + dcr_host_mmio_t h = host; if (h.token == NULL) return; @@ -136,7 +222,11 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c) iounmap(h.token); h.token = NULL; } -EXPORT_SYMBOL_GPL(dcr_unmap); -#else /* defined(CONFIG_PPC_DCR_NATIVE) */ +EXPORT_SYMBOL_GPL(dcr_unmap_mmio); + +#endif /* defined(CONFIG_PPC_DCR_MMIO) */ + +#ifdef CONFIG_PPC_DCR_NATIVE DEFINE_SPINLOCK(dcr_ind_lock); -#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */ +#endif /* defined(CONFIG_PPC_DCR_NATIVE) */ + diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c new file mode 100644 index 0000000000000000000000000000000000000000..714ec02fed2ea84b8f5825c3197b4af44fa49c0b --- /dev/null +++ b/arch/powerpc/sysdev/fsl_gtm.c @@ -0,0 +1,434 @@ +/* + * Freescale General-purpose Timers Module + * + * Copyright (c) Freescale Semicondutor, Inc. 2006. + * Shlomi Gridish + * Jerry Huang + * Copyright (c) MontaVista Software, Inc. 2008. + * Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) +#define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0) + +#define GTMDR_ICLK_MASK (3 << 1) +#define GTMDR_ICLK_ICAS (0 << 1) +#define GTMDR_ICLK_ICLK (1 << 1) +#define GTMDR_ICLK_SLGO (2 << 1) +#define GTMDR_FRR (1 << 3) +#define GTMDR_ORI (1 << 4) +#define GTMDR_SPS(x) ((x) << 8) + +struct gtm_timers_regs { + u8 gtcfr1; /* Timer 1, Timer 2 global config register */ + u8 res0[0x3]; + u8 gtcfr2; /* Timer 3, timer 4 global config register */ + u8 res1[0xB]; + __be16 gtmdr1; /* Timer 1 mode register */ + __be16 gtmdr2; /* Timer 2 mode register */ + __be16 gtrfr1; /* Timer 1 reference register */ + __be16 gtrfr2; /* Timer 2 reference register */ + __be16 gtcpr1; /* Timer 1 capture register */ + __be16 gtcpr2; /* Timer 2 capture register */ + __be16 gtcnr1; /* Timer 1 counter */ + __be16 gtcnr2; /* Timer 2 counter */ + __be16 gtmdr3; /* Timer 3 mode register */ + __be16 gtmdr4; /* Timer 4 mode register */ + __be16 gtrfr3; /* Timer 3 reference register */ + __be16 gtrfr4; /* Timer 4 reference register */ + __be16 gtcpr3; /* Timer 3 capture register */ + __be16 gtcpr4; /* Timer 4 capture register */ + __be16 gtcnr3; /* Timer 3 counter */ + __be16 gtcnr4; /* Timer 4 counter */ + __be16 gtevr1; /* Timer 1 event register */ + __be16 gtevr2; /* Timer 2 event register */ + __be16 gtevr3; /* Timer 3 event register */ + __be16 gtevr4; /* Timer 4 event register */ + __be16 gtpsr1; /* Timer 1 prescale register */ + __be16 gtpsr2; /* Timer 2 prescale register */ + __be16 gtpsr3; /* Timer 3 prescale register */ + __be16 gtpsr4; /* Timer 4 prescale register */ + u8 res2[0x40]; +} __attribute__ ((packed)); + +struct gtm { + unsigned int clock; + struct gtm_timers_regs __iomem *regs; + struct gtm_timer timers[4]; + spinlock_t lock; + struct list_head list_node; +}; + +static LIST_HEAD(gtms); + +/** + * gtm_get_timer - request GTM timer to use it with the rest of GTM API + * Context: non-IRQ + * + * This function reserves GTM timer for later use. It returns gtm_timer + * structure to use with the rest of GTM API, you should use timer->irq + * to manage timer interrupt. + */ +struct gtm_timer *gtm_get_timer16(void) +{ + struct gtm *gtm = NULL; + int i; + + list_for_each_entry(gtm, >ms, list_node) { + spin_lock_irq(>m->lock); + + for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { + if (!gtm->timers[i].requested) { + gtm->timers[i].requested = true; + spin_unlock_irq(>m->lock); + return >m->timers[i]; + } + } + + spin_unlock_irq(>m->lock); + } + + if (gtm) + return ERR_PTR(-EBUSY); + return ERR_PTR(-ENODEV); +} +EXPORT_SYMBOL(gtm_get_timer16); + +/** + * gtm_get_specific_timer - request specific GTM timer + * @gtm: specific GTM, pass here GTM's device_node->data + * @timer: specific timer number, Timer1 is 0. + * Context: non-IRQ + * + * This function reserves GTM timer for later use. It returns gtm_timer + * structure to use with the rest of GTM API, you should use timer->irq + * to manage timer interrupt. + */ +struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm, + unsigned int timer) +{ + struct gtm_timer *ret = ERR_PTR(-EBUSY); + + if (timer > 3) + return ERR_PTR(-EINVAL); + + spin_lock_irq(>m->lock); + + if (gtm->timers[timer].requested) + goto out; + + ret = >m->timers[timer]; + ret->requested = true; + +out: + spin_unlock_irq(>m->lock); + return ret; +} +EXPORT_SYMBOL(gtm_get_specific_timer16); + +/** + * gtm_put_timer16 - release 16 bits GTM timer + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * Context: any + * + * This function releases GTM timer so others may request it. + */ +void gtm_put_timer16(struct gtm_timer *tmr) +{ + gtm_stop_timer16(tmr); + + spin_lock_irq(&tmr->gtm->lock); + tmr->requested = false; + spin_unlock_irq(&tmr->gtm->lock); +} +EXPORT_SYMBOL(gtm_put_timer16); + +/* + * This is back-end for the exported functions, it's used to reset single + * timer in reference mode. + */ +static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency, + int reference_value, bool free_run) +{ + struct gtm *gtm = tmr->gtm; + int num = tmr - >m->timers[0]; + unsigned int prescaler; + u8 iclk = GTMDR_ICLK_ICLK; + u8 psr; + u8 sps; + unsigned long flags; + int max_prescaler = 256 * 256 * 16; + + /* CPM2 doesn't have primary prescaler */ + if (!tmr->gtpsr) + max_prescaler /= 256; + + prescaler = gtm->clock / frequency; + /* + * We have two 8 bit prescalers -- primary and secondary (psr, sps), + * plus "slow go" mode (clk / 16). So, total prescale value is + * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr. + */ + if (prescaler > max_prescaler) + return -EINVAL; + + if (prescaler > max_prescaler / 16) { + iclk = GTMDR_ICLK_SLGO; + prescaler /= 16; + } + + if (prescaler <= 256) { + psr = 0; + sps = prescaler - 1; + } else { + psr = 256 - 1; + sps = prescaler / 256 - 1; + } + + spin_lock_irqsave(>m->lock, flags); + + /* + * Properly reset timers: stop, reset, set up prescalers, reference + * value and clear event register. + */ + clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)), + GTCFR_STP(num) | GTCFR_RST(num)); + + setbits8(tmr->gtcfr, GTCFR_STP(num)); + + if (tmr->gtpsr) + out_be16(tmr->gtpsr, psr); + clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) | + GTMDR_ORI | (free_run ? GTMDR_FRR : 0)); + out_be16(tmr->gtcnr, 0); + out_be16(tmr->gtrfr, reference_value); + out_be16(tmr->gtevr, 0xFFFF); + + /* Let it be. */ + clrbits8(tmr->gtcfr, GTCFR_STP(num)); + + spin_unlock_irqrestore(>m->lock, flags); + + return 0; +} + +/** + * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * @usec: timer interval in microseconds + * @reload: if set, the timer will reset upon expiry rather than + * continue running free. + * Context: any + * + * This function (re)sets the GTM timer so that it counts up to the requested + * interval value, and fires the interrupt when the value is reached. This + * function will reduce the precision of the timer as needed in order for the + * requested timeout to fit in a 16-bit register. + */ +int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload) +{ + /* quite obvious, frequency which is enough for µSec precision */ + int freq = 1000000; + unsigned int bit; + + bit = fls_long(usec); + if (bit > 15) { + freq >>= bit - 15; + usec >>= bit - 15; + } + + if (!freq) + return -EINVAL; + + return gtm_set_ref_timer16(tmr, freq, usec, reload); +} +EXPORT_SYMBOL(gtm_set_timer16); + +/** + * gtm_set_exact_utimer16 - (re)set 16 bits timer + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * @usec: timer interval in microseconds + * @reload: if set, the timer will reset upon expiry rather than + * continue running free. + * Context: any + * + * This function (re)sets GTM timer so that it counts up to the requested + * interval value, and fires the interrupt when the value is reached. If reload + * flag was set, timer will also reset itself upon reference value, otherwise + * it continues to increment. + * + * The _exact_ bit in the function name states that this function will not + * crop precision of the "usec" argument, thus usec is limited to 16 bits + * (single timer width). + */ +int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload) +{ + /* quite obvious, frequency which is enough for µSec precision */ + const int freq = 1000000; + + /* + * We can lower the frequency (and probably power consumption) by + * dividing both frequency and usec by 2 until there is no remainder. + * But we won't bother with this unless savings are measured, so just + * run the timer as is. + */ + + return gtm_set_ref_timer16(tmr, freq, usec, reload); +} +EXPORT_SYMBOL(gtm_set_exact_timer16); + +/** + * gtm_stop_timer16 - stop single timer + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * Context: any + * + * This function simply stops the GTM timer. + */ +void gtm_stop_timer16(struct gtm_timer *tmr) +{ + struct gtm *gtm = tmr->gtm; + int num = tmr - >m->timers[0]; + unsigned long flags; + + spin_lock_irqsave(>m->lock, flags); + + setbits8(tmr->gtcfr, GTCFR_STP(num)); + out_be16(tmr->gtevr, 0xFFFF); + + spin_unlock_irqrestore(>m->lock, flags); +} +EXPORT_SYMBOL(gtm_stop_timer16); + +/** + * gtm_ack_timer16 - acknowledge timer event (free-run timers only) + * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer + * @events: events mask to ack + * Context: any + * + * Thus function used to acknowledge timer interrupt event, use it inside the + * interrupt handler. + */ +void gtm_ack_timer16(struct gtm_timer *tmr, u16 events) +{ + out_be16(tmr->gtevr, events); +} +EXPORT_SYMBOL(gtm_ack_timer16); + +static void __init gtm_set_shortcuts(struct device_node *np, + struct gtm_timer *timers, + struct gtm_timers_regs __iomem *regs) +{ + /* + * Yeah, I don't like this either, but timers' registers a bit messed, + * so we have to provide shortcuts to write timer independent code. + * Alternative option is to create gt*() accessors, but that will be + * even uglier and cryptic. + */ + timers[0].gtcfr = ®s->gtcfr1; + timers[0].gtmdr = ®s->gtmdr1; + timers[0].gtcnr = ®s->gtcnr1; + timers[0].gtrfr = ®s->gtrfr1; + timers[0].gtevr = ®s->gtevr1; + + timers[1].gtcfr = ®s->gtcfr1; + timers[1].gtmdr = ®s->gtmdr2; + timers[1].gtcnr = ®s->gtcnr2; + timers[1].gtrfr = ®s->gtrfr2; + timers[1].gtevr = ®s->gtevr2; + + timers[2].gtcfr = ®s->gtcfr2; + timers[2].gtmdr = ®s->gtmdr3; + timers[2].gtcnr = ®s->gtcnr3; + timers[2].gtrfr = ®s->gtrfr3; + timers[2].gtevr = ®s->gtevr3; + + timers[3].gtcfr = ®s->gtcfr2; + timers[3].gtmdr = ®s->gtmdr4; + timers[3].gtcnr = ®s->gtcnr4; + timers[3].gtrfr = ®s->gtrfr4; + timers[3].gtevr = ®s->gtevr4; + + /* CPM2 doesn't have primary prescaler */ + if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) { + timers[0].gtpsr = ®s->gtpsr1; + timers[1].gtpsr = ®s->gtpsr2; + timers[2].gtpsr = ®s->gtpsr3; + timers[3].gtpsr = ®s->gtpsr4; + } +} + +static int __init fsl_gtm_init(void) +{ + struct device_node *np; + + for_each_compatible_node(np, NULL, "fsl,gtm") { + int i; + struct gtm *gtm; + const u32 *clock; + int size; + + gtm = kzalloc(sizeof(*gtm), GFP_KERNEL); + if (!gtm) { + pr_err("%s: unable to allocate memory\n", + np->full_name); + continue; + } + + spin_lock_init(>m->lock); + + clock = of_get_property(np, "clock-frequency", &size); + if (!clock || size != sizeof(*clock)) { + pr_err("%s: no clock-frequency\n", np->full_name); + goto err; + } + gtm->clock = *clock; + + for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { + int ret; + struct resource irq; + + ret = of_irq_to_resource(np, i, &irq); + if (ret == NO_IRQ) { + pr_err("%s: not enough interrupts specified\n", + np->full_name); + goto err; + } + gtm->timers[i].irq = irq.start; + gtm->timers[i].gtm = gtm; + } + + gtm->regs = of_iomap(np, 0); + if (!gtm->regs) { + pr_err("%s: unable to iomap registers\n", + np->full_name); + goto err; + } + + gtm_set_shortcuts(np, gtm->timers, gtm->regs); + list_add(>m->list_node, >ms); + + /* We don't want to lose the node and its ->data */ + np->data = gtm; + of_node_get(np); + + continue; +err: + kfree(gtm); + } + return 0; +} +arch_initcall(fsl_gtm_init); diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c new file mode 100644 index 0000000000000000000000000000000000000000..2c5187cc8a24e31e45aaf2a107677fbd9ce81d3f --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.c @@ -0,0 +1,429 @@ +/* + * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: Tony Li + * Jason Jin + * + * The hwirq alloc and free code reuse from sysdev/mpic_msi.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 of the + * License. + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "fsl_msi.h" + +struct fsl_msi_feature { + u32 fsl_pic_ip; + u32 msiir_offset; +}; + +static struct fsl_msi *fsl_msi; + +static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg) +{ + return in_be32(base + (reg >> 2)); +} + +/* + * We do not need this actually. The MSIR register has been read once + * in the cascade interrupt. So, this MSI interrupt has been acked +*/ +static void fsl_msi_end_irq(unsigned int virq) +{ +} + +static struct irq_chip fsl_msi_chip = { + .mask = mask_msi_irq, + .unmask = unmask_msi_irq, + .ack = fsl_msi_end_irq, + .typename = " FSL-MSI ", +}; + +static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct irq_chip *chip = &fsl_msi_chip; + + get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; + + set_irq_chip_and_handler(virq, chip, handle_edge_irq); + + return 0; +} + +static struct irq_host_ops fsl_msi_host_ops = { + .map = fsl_msi_host_map, +}; + +static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num) +{ + unsigned long flags; + int order = get_count_order(num); + int offset; + + spin_lock_irqsave(&msi->bitmap_lock, flags); + + offset = bitmap_find_free_region(msi->fsl_msi_bitmap, + NR_MSI_IRQS, order); + + spin_unlock_irqrestore(&msi->bitmap_lock, flags); + + pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n", + __func__, num, order, offset); + + return offset; +} + +static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num) +{ + unsigned long flags; + int order = get_count_order(num); + + pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n", + __func__, num, order, offset); + + spin_lock_irqsave(&msi->bitmap_lock, flags); + bitmap_release_region(msi->fsl_msi_bitmap, offset, order); + spin_unlock_irqrestore(&msi->bitmap_lock, flags); +} + +static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) +{ + int i; + int len; + const u32 *p; + + bitmap_allocate_region(msi->fsl_msi_bitmap, 0, + get_count_order(NR_MSI_IRQS)); + + p = of_get_property(msi->of_node, "msi-available-ranges", &len); + + if (!p) { + /* No msi-available-ranges property, + * All the 256 MSI interrupts can be used + */ + fsl_msi_free_hwirqs(msi, 0, 0x100); + return 0; + } + + if ((len % (2 * sizeof(u32))) != 0) { + printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges " + "property on %s\n", msi->of_node->full_name); + return -EINVAL; + } + + /* Format is: ( )+ */ + len /= 2 * sizeof(u32); + for (i = 0; i < len; i++, p += 2) + fsl_msi_free_hwirqs(msi, *p, *(p + 1)); + + return 0; +} + +static int fsl_msi_init_allocator(struct fsl_msi *msi_data) +{ + int rc; + int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32); + + msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); + + if (msi_data->fsl_msi_bitmap == NULL) { + pr_debug("%s: ENOMEM allocating allocator bitmap!\n", + __func__); + return -ENOMEM; + } + + rc = fsl_msi_free_dt_hwirqs(msi_data); + if (rc) + goto out_free; + + return 0; +out_free: + kfree(msi_data->fsl_msi_bitmap); + + msi_data->fsl_msi_bitmap = NULL; + return rc; + +} + +static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) +{ + if (type == PCI_CAP_ID_MSIX) + pr_debug("fslmsi: MSI-X untested, trying anyway.\n"); + + return 0; +} + +static void fsl_teardown_msi_irqs(struct pci_dev *pdev) +{ + struct msi_desc *entry; + struct fsl_msi *msi_data = fsl_msi; + + list_for_each_entry(entry, &pdev->msi_list, list) { + if (entry->irq == NO_IRQ) + continue; + set_irq_msi(entry->irq, NULL); + fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1); + irq_dispose_mapping(entry->irq); + } + + return; +} + +static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, + struct msi_msg *msg) +{ + struct fsl_msi *msi_data = fsl_msi; + + msg->address_lo = msi_data->msi_addr_lo; + msg->address_hi = msi_data->msi_addr_hi; + msg->data = hwirq; + + pr_debug("%s: allocated srs: %d, ibs: %d\n", + __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG); +} + +static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) +{ + irq_hw_number_t hwirq; + int rc; + unsigned int virq; + struct msi_desc *entry; + struct msi_msg msg; + struct fsl_msi *msi_data = fsl_msi; + + list_for_each_entry(entry, &pdev->msi_list, list) { + hwirq = fsl_msi_alloc_hwirqs(msi_data, 1); + if (hwirq < 0) { + rc = hwirq; + pr_debug("%s: fail allocating msi interrupt\n", + __func__); + goto out_free; + } + + virq = irq_create_mapping(msi_data->irqhost, hwirq); + + if (virq == NO_IRQ) { + pr_debug("%s: fail mapping hwirq 0x%lx\n", + __func__, hwirq); + fsl_msi_free_hwirqs(msi_data, hwirq, 1); + rc = -ENOSPC; + goto out_free; + } + set_irq_msi(virq, entry); + + fsl_compose_msi_msg(pdev, hwirq, &msg); + write_msi_msg(virq, &msg); + } + return 0; + +out_free: + return rc; +} + +static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) +{ + unsigned int cascade_irq; + struct fsl_msi *msi_data = fsl_msi; + int msir_index = -1; + u32 msir_value = 0; + u32 intr_index; + u32 have_shift = 0; + + spin_lock(&desc->lock); + if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { + if (desc->chip->mask_ack) + desc->chip->mask_ack(irq); + else { + desc->chip->mask(irq); + desc->chip->ack(irq); + } + } + + if (unlikely(desc->status & IRQ_INPROGRESS)) + goto unlock; + + msir_index = (int)desc->handler_data; + + if (msir_index >= NR_MSI_REG) + cascade_irq = NO_IRQ; + + desc->status |= IRQ_INPROGRESS; + switch (fsl_msi->feature & FSL_PIC_IP_MASK) { + case FSL_PIC_IP_MPIC: + msir_value = fsl_msi_read(msi_data->msi_regs, + msir_index * 0x10); + break; + case FSL_PIC_IP_IPIC: + msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4); + break; + } + + while (msir_value) { + intr_index = ffs(msir_value) - 1; + + cascade_irq = irq_linear_revmap(msi_data->irqhost, + msir_index * IRQS_PER_MSI_REG + + intr_index + have_shift); + if (cascade_irq != NO_IRQ) + generic_handle_irq(cascade_irq); + have_shift += intr_index + 1; + msir_value = msir_value >> (intr_index + 1); + } + desc->status &= ~IRQ_INPROGRESS; + + switch (msi_data->feature & FSL_PIC_IP_MASK) { + case FSL_PIC_IP_MPIC: + desc->chip->eoi(irq); + break; + case FSL_PIC_IP_IPIC: + if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) + desc->chip->unmask(irq); + break; + } +unlock: + spin_unlock(&desc->lock); +} + +static int __devinit fsl_of_msi_probe(struct of_device *dev, + const struct of_device_id *match) +{ + struct fsl_msi *msi; + struct resource res; + int err, i, count; + int rc; + int virt_msir; + const u32 *p; + struct fsl_msi_feature *features = match->data; + + printk(KERN_DEBUG "Setting up Freescale MSI support\n"); + + msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL); + if (!msi) { + dev_err(&dev->dev, "No memory for MSI structure\n"); + err = -ENOMEM; + goto error_out; + } + + msi->of_node = of_node_get(dev->node); + + msi->irqhost = irq_alloc_host(of_node_get(dev->node), + IRQ_HOST_MAP_LINEAR, + NR_MSI_IRQS, &fsl_msi_host_ops, 0); + if (msi->irqhost == NULL) { + dev_err(&dev->dev, "No memory for MSI irqhost\n"); + of_node_put(dev->node); + err = -ENOMEM; + goto error_out; + } + + /* Get the MSI reg base */ + err = of_address_to_resource(dev->node, 0, &res); + if (err) { + dev_err(&dev->dev, "%s resource error!\n", + dev->node->full_name); + goto error_out; + } + + msi->msi_regs = ioremap(res.start, res.end - res.start + 1); + if (!msi->msi_regs) { + dev_err(&dev->dev, "ioremap problem failed\n"); + goto error_out; + } + + msi->feature = features->fsl_pic_ip; + + msi->irqhost->host_data = msi; + + msi->msi_addr_hi = 0x0; + msi->msi_addr_lo = res.start + features->msiir_offset; + + rc = fsl_msi_init_allocator(msi); + if (rc) { + dev_err(&dev->dev, "Error allocating MSI bitmap\n"); + goto error_out; + } + + p = of_get_property(dev->node, "interrupts", &count); + if (!p) { + dev_err(&dev->dev, "no interrupts property found on %s\n", + dev->node->full_name); + err = -ENODEV; + goto error_out; + } + if (count % 8 != 0) { + dev_err(&dev->dev, "Malformed interrupts property on %s\n", + dev->node->full_name); + err = -EINVAL; + goto error_out; + } + + count /= sizeof(u32); + for (i = 0; i < count / 2; i++) { + if (i > NR_MSI_REG) + break; + virt_msir = irq_of_parse_and_map(dev->node, i); + if (virt_msir != NO_IRQ) { + set_irq_data(virt_msir, (void *)i); + set_irq_chained_handler(virt_msir, fsl_msi_cascade); + } + } + + fsl_msi = msi; + + WARN_ON(ppc_md.setup_msi_irqs); + ppc_md.setup_msi_irqs = fsl_setup_msi_irqs; + ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs; + ppc_md.msi_check_device = fsl_msi_check_device; + return 0; +error_out: + kfree(msi); + return err; +} + +static const struct fsl_msi_feature mpic_msi_feature = { + .fsl_pic_ip = FSL_PIC_IP_MPIC, + .msiir_offset = 0x140, +}; + +static const struct fsl_msi_feature ipic_msi_feature = { + .fsl_pic_ip = FSL_PIC_IP_IPIC, + .msiir_offset = 0x38, +}; + +static const struct of_device_id fsl_of_msi_ids[] = { + { + .compatible = "fsl,mpic-msi", + .data = (void *)&mpic_msi_feature, + }, + { + .compatible = "fsl,ipic-msi", + .data = (void *)&ipic_msi_feature, + }, + {} +}; + +static struct of_platform_driver fsl_of_msi_driver = { + .name = "fsl-msi", + .match_table = fsl_of_msi_ids, + .probe = fsl_of_msi_probe, +}; + +static __init int fsl_of_msi_init(void) +{ + return of_register_platform_driver(&fsl_of_msi_driver); +} + +subsys_initcall(fsl_of_msi_init); diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h new file mode 100644 index 0000000000000000000000000000000000000000..a653468521fa36b1050e32ba5032b4ed686fee6f --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. + * + * Author: Tony Li + * Jason Jin + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 of the + * License. + * + */ +#ifndef _POWERPC_SYSDEV_FSL_MSI_H +#define _POWERPC_SYSDEV_FSL_MSI_H + +#define NR_MSI_REG 8 +#define IRQS_PER_MSI_REG 32 +#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG) + +#define FSL_PIC_IP_MASK 0x0000000F +#define FSL_PIC_IP_MPIC 0x00000001 +#define FSL_PIC_IP_IPIC 0x00000002 + +struct fsl_msi { + /* Device node of the MSI interrupt*/ + struct device_node *of_node; + + struct irq_host *irqhost; + + unsigned long cascade_irq; + + u32 msi_addr_lo; + u32 msi_addr_hi; + void __iomem *msi_regs; + u32 feature; + + unsigned long *fsl_msi_bitmap; + spinlock_t bitmap_lock; +}; + +#endif /* _POWERPC_SYSDEV_FSL_MSI_H */ + diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index bf13c2174a4eb306024246f6c33f5ed764c91e3c..61e6d77efa4fcec7d17fe31d6b5763786ba58319 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -27,6 +27,7 @@ #include #include +#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) /* atmu setup for fsl pci/pcie controller */ void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc) { @@ -106,6 +107,16 @@ void __init setup_pci_cmd(struct pci_controller *hose) } } +static void __init setup_pci_pcsrbar(struct pci_controller *hose) +{ +#ifdef CONFIG_PCI_MSI + phys_addr_t immr_base; + + immr_base = get_immrbase(); + early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base); +#endif +} + static int fsl_pcie_bus_fixup; static void __init quirk_fsl_pcie_header(struct pci_dev *dev) @@ -211,6 +222,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) /* Setup PEX window registers */ setup_pci_atmu(hose, &rsrc); + /* Setup PEXCSRBAR */ + setup_pci_pcsrbar(hose); return 0; } @@ -231,6 +244,68 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header); +DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536E, quirk_fsl_pcie_header); +DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); +#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ + +#if defined(CONFIG_PPC_83xx) +int __init mpc83xx_add_bridge(struct device_node *dev) +{ + int len; + struct pci_controller *hose; + struct resource rsrc; + const int *bus_range; + int primary = 1, has_address = 0; + phys_addr_t immr = get_immrbase(); + + pr_debug("Adding PCI host bridge %s\n", dev->full_name); + + /* Fetch host bridge registers address */ + has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); + + /* Get bus range if any */ + bus_range = of_get_property(dev, "bus-range", &len); + if (bus_range == NULL || len < 2 * sizeof(int)) { + printk(KERN_WARNING "Can't get bus-range for %s, assume" + " bus 0\n", dev->full_name); + } + + ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS; + hose = pcibios_alloc_controller(dev); + if (!hose) + return -ENOMEM; + + hose->first_busno = bus_range ? bus_range[0] : 0; + hose->last_busno = bus_range ? bus_range[1] : 0xff; + + /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar + * the other at 0x8600, we consider the 0x8500 the primary controller + */ + /* PCI 1 */ + if ((rsrc.start & 0xfffff) == 0x8500) { + setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0); + } + /* PCI 2 */ + if ((rsrc.start & 0xfffff) == 0x8600) { + setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0); + primary = 0; + } + + printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " + "Firmware bus number: %d->%d\n", + (unsigned long long)rsrc.start, hose->first_busno, + hose->last_busno); + + pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", + hose, hose->cfg_addr, hose->cfg_data); + + /* Interpret the "ranges" property */ + /* This also maps the I/O region and sets isa_io/mem_base */ + pci_process_bridge_OF_ranges(hose, dev, primary); + + return 0; +} +#endif /* CONFIG_PPC_83xx */ diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index 37b04ad26571cd4fc59920ba615a4ed869428646..13f30c2a61e76a906684cff73f60709e5b5ccff4 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -83,6 +83,7 @@ struct ccsr_pci { extern int fsl_add_bridge(struct device_node *dev, int is_primary); extern void fsl_pcibios_fixup_bus(struct pci_bus *bus); +extern int mpc83xx_add_bridge(struct device_node *dev); #endif /* __POWERPC_FSL_PCI_H */ #endif /* __KERNEL__ */ diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 019657c110b6feb2745750827904189181ee6f46..214388e11807a039d05a9d6baf4fcf1a25b2f18a 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c @@ -207,66 +207,58 @@ static int __init of_add_fixed_phys(void) arch_initcall(of_add_fixed_phys); #endif /* CONFIG_FIXED_PHY */ -static int __init gfar_mdio_of_init(void) +static int gfar_mdio_of_init_one(struct device_node *np) { - struct device_node *np = NULL; + int k; + struct device_node *child = NULL; + struct gianfar_mdio_data mdio_data; struct platform_device *mdio_dev; struct resource res; int ret; - np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio"); - - /* try the deprecated version */ - if (!np) - np = of_find_compatible_node(np, "mdio", "gianfar"); + memset(&res, 0, sizeof(res)); + memset(&mdio_data, 0, sizeof(mdio_data)); - if (np) { - int k; - struct device_node *child = NULL; - struct gianfar_mdio_data mdio_data; + ret = of_address_to_resource(np, 0, &res); + if (ret) + return ret; - memset(&res, 0, sizeof(res)); - memset(&mdio_data, 0, sizeof(mdio_data)); + mdio_dev = platform_device_register_simple("fsl-gianfar_mdio", + res.start&0xfffff, &res, 1); + if (IS_ERR(mdio_dev)) + return PTR_ERR(mdio_dev); - ret = of_address_to_resource(np, 0, &res); - if (ret) - goto err; + for (k = 0; k < 32; k++) + mdio_data.irq[k] = PHY_POLL; - mdio_dev = - platform_device_register_simple("fsl-gianfar_mdio", - res.start, &res, 1); - if (IS_ERR(mdio_dev)) { - ret = PTR_ERR(mdio_dev); - goto err; + while ((child = of_get_next_child(np, child)) != NULL) { + int irq = irq_of_parse_and_map(child, 0); + if (irq != NO_IRQ) { + const u32 *id = of_get_property(child, "reg", NULL); + mdio_data.irq[*id] = irq; } + } - for (k = 0; k < 32; k++) - mdio_data.irq[k] = PHY_POLL; + ret = platform_device_add_data(mdio_dev, &mdio_data, + sizeof(struct gianfar_mdio_data)); + if (ret) + platform_device_unregister(mdio_dev); - while ((child = of_get_next_child(np, child)) != NULL) { - int irq = irq_of_parse_and_map(child, 0); - if (irq != NO_IRQ) { - const u32 *id = of_get_property(child, - "reg", NULL); - mdio_data.irq[*id] = irq; - } - } + return ret; +} - ret = - platform_device_add_data(mdio_dev, &mdio_data, - sizeof(struct gianfar_mdio_data)); - if (ret) - goto unreg; - } +static int __init gfar_mdio_of_init(void) +{ + struct device_node *np = NULL; - of_node_put(np); - return 0; + for_each_compatible_node(np, NULL, "fsl,gianfar-mdio") + gfar_mdio_of_init_one(np); -unreg: - platform_device_unregister(mdio_dev); -err: - of_node_put(np); - return ret; + /* try the deprecated version */ + for_each_compatible_node(np, "mdio", "gianfar"); + gfar_mdio_of_init_one(np); + + return 0; } arch_initcall(gfar_mdio_of_init); @@ -296,6 +288,9 @@ static int __init gfar_of_init(void) const phandle *ph; int n_res = 2; + if (!of_device_is_available(np)) + continue; + memset(r, 0, sizeof(r)); memset(&gfar_data, 0, sizeof(gfar_data)); @@ -357,6 +352,9 @@ static int __init gfar_of_init(void) else gfar_data.interface = PHY_INTERFACE_MODE_MII; + if (of_get_property(np, "fsl,magic-packet", NULL)) + gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET; + ph = of_get_property(np, "phy-handle", NULL); if (ph == NULL) { u32 *fixed_link; @@ -390,7 +388,7 @@ static int __init gfar_of_init(void) gfar_data.phy_id = *id; snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx", - (unsigned long long)res.start); + (unsigned long long)res.start&0xfffff); of_node_put(phy); of_node_put(mdio); @@ -414,128 +412,6 @@ err: arch_initcall(gfar_of_init); -#ifdef CONFIG_I2C_BOARDINFO -#include -struct i2c_driver_device { - char *of_device; - char *i2c_type; -}; - -static struct i2c_driver_device i2c_devices[] __initdata = { - {"ricoh,rs5c372a", "rs5c372a"}, - {"ricoh,rs5c372b", "rs5c372b"}, - {"ricoh,rv5c386", "rv5c386"}, - {"ricoh,rv5c387a", "rv5c387a"}, - {"dallas,ds1307", "ds1307"}, - {"dallas,ds1337", "ds1337"}, - {"dallas,ds1338", "ds1338"}, - {"dallas,ds1339", "ds1339"}, - {"dallas,ds1340", "ds1340"}, - {"stm,m41t00", "m41t00"}, - {"dallas,ds1374", "ds1374"}, -}; - -static int __init of_find_i2c_driver(struct device_node *node, - struct i2c_board_info *info) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { - if (!of_device_is_compatible(node, i2c_devices[i].of_device)) - continue; - if (strlcpy(info->type, i2c_devices[i].i2c_type, - I2C_NAME_SIZE) >= I2C_NAME_SIZE) - return -ENOMEM; - return 0; - } - return -ENODEV; -} - -static void __init of_register_i2c_devices(struct device_node *adap_node, - int bus_num) -{ - struct device_node *node = NULL; - - while ((node = of_get_next_child(adap_node, node))) { - struct i2c_board_info info = {}; - const u32 *addr; - int len; - - addr = of_get_property(node, "reg", &len); - if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) { - printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n"); - continue; - } - - info.irq = irq_of_parse_and_map(node, 0); - if (info.irq == NO_IRQ) - info.irq = -1; - - if (of_find_i2c_driver(node, &info) < 0) - continue; - - info.addr = *addr; - - i2c_register_board_info(bus_num, &info, 1); - } -} - -static int __init fsl_i2c_of_init(void) -{ - struct device_node *np; - unsigned int i = 0; - struct platform_device *i2c_dev; - int ret; - - for_each_compatible_node(np, NULL, "fsl-i2c") { - struct resource r[2]; - struct fsl_i2c_platform_data i2c_data; - const unsigned char *flags = NULL; - - memset(&r, 0, sizeof(r)); - memset(&i2c_data, 0, sizeof(i2c_data)); - - ret = of_address_to_resource(np, 0, &r[0]); - if (ret) - goto err; - - of_irq_to_resource(np, 0, &r[1]); - - i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); - if (IS_ERR(i2c_dev)) { - ret = PTR_ERR(i2c_dev); - goto err; - } - - i2c_data.device_flags = 0; - flags = of_get_property(np, "dfsrr", NULL); - if (flags) - i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR; - - flags = of_get_property(np, "fsl5200-clocking", NULL); - if (flags) - i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200; - - ret = - platform_device_add_data(i2c_dev, &i2c_data, - sizeof(struct - fsl_i2c_platform_data)); - if (ret) - goto unreg; - - of_register_i2c_devices(np, i++); - } - - return 0; - -unreg: - platform_device_unregister(i2c_dev); -err: - return ret; -} - -arch_initcall(fsl_i2c_of_init); -#endif #ifdef CONFIG_PPC_83xx static int __init mpc83xx_wdt_init(void) diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h index 52c831fa1886f544f5b389b31a3aaecf78262698..0242998873526c32ada0e52e3b3f45283f407395 100644 --- a/arch/powerpc/sysdev/fsl_soc.h +++ b/arch/powerpc/sysdev/fsl_soc.h @@ -10,6 +10,7 @@ extern u32 get_baudrate(void); extern u32 fsl_get_sys_freq(void); struct spi_board_info; +struct device_node; extern int fsl_spi_init(struct spi_board_info *board_infos, unsigned int num_board_infos, diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 216c0f5680d25ee0b5411e6dd30ecddfb2311ed5..a96584ab33dda7e9e8140bf1db9bae897364545d 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c @@ -276,7 +276,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) spin_unlock_irqrestore(&i8259_lock, flags); /* create a legacy host */ - i8259_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, + i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, 0, &i8259_host_ops, 0); if (i8259_host == NULL) { printk(KERN_ERR "i8259: failed to allocate irq host !\n"); diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index cfbd2aae93e8a178e665242f415894b34fce3b41..7fd49c97501aa965058a12d9b62f484fdde0cc56 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -123,6 +123,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, (bus->number == hose->first_busno)) val &= 0xffffff00; + /* Workaround for PCI_28 Errata in 440EPx/GRx */ + if ((hose->indirect_type & PPC_INDIRECT_TYPE_BROKEN_MRM) && + offset == PCI_CACHE_LINE_SIZE) { + val = 0; + } + /* * Note: the caller has already checked that offset is * suitably aligned and that len is 1, 2 or 4. diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 0f2dfb0aaa6adaa77e6e1232d1951a4fe3d7382d..88a983ece5c9aa4e25749072f962c3317dba3a34 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -725,25 +726,21 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) struct resource res; u32 temp = 0, ret; + ret = of_address_to_resource(node, 0, &res); + if (ret) + return NULL; + ipic = alloc_bootmem(sizeof(struct ipic)); if (ipic == NULL) return NULL; memset(ipic, 0, sizeof(struct ipic)); - ipic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, + ipic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, NR_IPIC_INTS, &ipic_host_ops, 0); - if (ipic->irqhost == NULL) { - of_node_put(node); - return NULL; - } - - ret = of_address_to_resource(node, 0, &res); - if (ret) { - of_node_put(node); + if (ipic->irqhost == NULL) return NULL; - } ipic->regs = ioremap(res.start, res.end - res.start + 1); @@ -893,8 +890,78 @@ unsigned int ipic_get_irq(void) return irq_linear_revmap(primary_ipic->irqhost, irq); } +#ifdef CONFIG_PM +static struct { + u32 sicfr; + u32 siprr[2]; + u32 simsr[2]; + u32 sicnr; + u32 smprr[2]; + u32 semsr; + u32 secnr; + u32 sermr; + u32 sercr; +} ipic_saved_state; + +static int ipic_suspend(struct sys_device *sdev, pm_message_t state) +{ + struct ipic *ipic = primary_ipic; + + ipic_saved_state.sicfr = ipic_read(ipic->regs, IPIC_SICFR); + ipic_saved_state.siprr[0] = ipic_read(ipic->regs, IPIC_SIPRR_A); + ipic_saved_state.siprr[1] = ipic_read(ipic->regs, IPIC_SIPRR_D); + ipic_saved_state.simsr[0] = ipic_read(ipic->regs, IPIC_SIMSR_H); + ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L); + ipic_saved_state.sicnr = ipic_read(ipic->regs, IPIC_SICNR); + ipic_saved_state.smprr[0] = ipic_read(ipic->regs, IPIC_SMPRR_A); + ipic_saved_state.smprr[1] = ipic_read(ipic->regs, IPIC_SMPRR_B); + ipic_saved_state.semsr = ipic_read(ipic->regs, IPIC_SEMSR); + ipic_saved_state.secnr = ipic_read(ipic->regs, IPIC_SECNR); + ipic_saved_state.sermr = ipic_read(ipic->regs, IPIC_SERMR); + ipic_saved_state.sercr = ipic_read(ipic->regs, IPIC_SERCR); + + if (fsl_deep_sleep()) { + /* In deep sleep, make sure there can be no + * pending interrupts, as this can cause + * problems on 831x. + */ + ipic_write(ipic->regs, IPIC_SIMSR_H, 0); + ipic_write(ipic->regs, IPIC_SIMSR_L, 0); + ipic_write(ipic->regs, IPIC_SEMSR, 0); + ipic_write(ipic->regs, IPIC_SERMR, 0); + } + + return 0; +} + +static int ipic_resume(struct sys_device *sdev) +{ + struct ipic *ipic = primary_ipic; + + ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr); + ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]); + ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]); + ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]); + ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]); + ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr); + ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]); + ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]); + ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr); + ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr); + ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr); + ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr); + + return 0; +} +#else +#define ipic_suspend NULL +#define ipic_resume NULL +#endif + static struct sysdev_class ipic_sysclass = { .name = "ipic", + .suspend = ipic_suspend, + .resume = ipic_resume, }; static struct sys_device device_ipic = { diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7680001676a6ee076627fbc214528750c098efc6..8e3478c995ef6ebc34d30a150dde4b6533730393 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -1016,13 +1016,11 @@ struct mpic * __init mpic_alloc(struct device_node *node, memset(mpic, 0, sizeof(struct mpic)); mpic->name = name; - mpic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, + mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, isu_size, &mpic_host_ops, flags & MPIC_LARGE_VECTORS ? 2048 : 256); - if (mpic->irqhost == NULL) { - of_node_put(node); + if (mpic->irqhost == NULL) return NULL; - } mpic->irqhost->host_data = mpic; mpic->hc_irq = mpic_irq_chip; @@ -1143,10 +1141,14 @@ struct mpic * __init mpic_alloc(struct device_node *node, greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; - if (isu_size == 0) - mpic->num_sources = - ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) - >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; + if (isu_size == 0) { + if (flags & MPIC_BROKEN_FRR_NIRQS) + mpic->num_sources = mpic->irq_count; + else + mpic->num_sources = + ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) + >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; + } /* Map the per-CPU registers */ for (i = 0; i < mpic->num_cpus; i++) { @@ -1494,7 +1496,7 @@ void mpic_request_ipis(void) static char *ipi_names[] = { "IPI0 (call function)", "IPI1 (reschedule)", - "IPI2 (unused)", + "IPI2 (call function single)", "IPI3 (debugger break)", }; BUG_ON(mpic == NULL); diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c index d272a52ecd24ace9af35e8f3758e60165fed9c49..de3e5e8bc3241e297ed321b240fb95edaa4350e2 100644 --- a/arch/powerpc/sysdev/mpic_msi.c +++ b/arch/powerpc/sysdev/mpic_msi.c @@ -16,6 +16,7 @@ #include #include +#include static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) { diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 33cbfb22ce3e3d32abf75fe8241fe05862f418fe..68aff6076675a433fe1144c20eff86e85e4c37c1 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c @@ -95,6 +95,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) unsigned int virq; struct msi_desc *entry; struct msi_msg msg; + int ret; pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", pdev, nvec, type); @@ -108,8 +109,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) * few MSIs for someone, but restrictions will apply to how the * sources can be changed independently. */ - hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); - if (hwirq < 0) { + ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); + hwirq = ret; + if (ret < 0) { pr_debug("pasemi_msi: failed allocating hwirq\n"); return hwirq; } diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 1d5a40899b74fac796ac814aad3d1a1c2c805a89..6e2f8686fdfc0471946b8344f75ed70c042150e3 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c @@ -115,17 +115,19 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) struct msi_desc *entry; struct msi_msg msg; u64 addr; + int ret; addr = find_ht_magic_addr(pdev); msg.address_lo = addr & 0xFFFFFFFF; msg.address_hi = addr >> 32; list_for_each_entry(entry, &pdev->msi_list, list) { - hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1); - if (hwirq < 0) { + ret = mpic_msi_alloc_hwirqs(msi_mpic, 1); + if (ret < 0) { pr_debug("u3msi: failed allocating hwirq\n"); - return hwirq; + return ret; } + hwirq = ret; virq = irq_create_mapping(msi_mpic->irqhost, hwirq); if (virq == NO_IRQ) { diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index a132e0de8ca5a056ac1f7803c7fe5925a037cf31..32e0ad0ebea8286af9b5b3b8cc1bd18ac1a42ed0 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c @@ -15,6 +15,7 @@ #include #include #include +#include #include @@ -25,6 +26,11 @@ * PowerPC of_platform_bus_type. They support platform_bus_type instead. */ +static struct of_device_id __initdata of_mv64x60_devices[] = { + { .compatible = "marvell,mv64306-devctrl", }, + {} +}; + /* * Create MPSC platform devices */ @@ -484,6 +490,10 @@ static int __init mv64x60_device_setup(void) of_node_put(np); } + /* Now add every node that is on the device bus */ + for_each_compatible_node(np, NULL, "marvell,mv64360") + of_platform_bus_probe(np, of_mv64x60_devices, NULL); + return 0; } arch_initcall(mv64x60_device_setup); diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index b4a54c52e8805cac1fb32af31d85d0168ff41bda..fb368dfde5d472403a67c33ec88d8cde55beec6f 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -75,6 +75,11 @@ static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev) !of_device_is_compatible(hose->dn, "ibm,plb-pci")) return; + if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") || + of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) { + hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM; + } + /* Hide the PCI host BARs from the kernel as their content doesn't * fit well in the resource management */ @@ -1634,6 +1639,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np) } port = &ppc4xx_pciex_ports[portno]; port->index = portno; + + /* + * Check if device is enabled + */ + if (!of_device_is_available(np)) { + printk(KERN_INFO "PCIE%d: Port disabled via device-tree\n", port->index); + return; + } + port->node = of_node_get(np); pval = of_get_property(np, "sdr-base", NULL); if (pval == NULL) { diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig index adc66212a419047cfb7d7f9e402ddbc73a7b4970..1ce546462be5af559539fb00314c8fc89d0c03b1 100644 --- a/arch/powerpc/sysdev/qe_lib/Kconfig +++ b/arch/powerpc/sysdev/qe_lib/Kconfig @@ -20,3 +20,16 @@ config UCC bool default y if UCC_FAST || UCC_SLOW +config QE_USB + bool + help + QE USB Host Controller support + +config QE_GPIO + bool "QE GPIO support" + depends on QUICC_ENGINE + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Say Y here if you're going to use hardware that connects to the + QE GPIOs. diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile index 874fe1a5b1cfe9840ac8a6638b0df3b1e61fd1da..f1855c185291aa923b02dff0b668ae2e061c8f34 100644 --- a/arch/powerpc/sysdev/qe_lib/Makefile +++ b/arch/powerpc/sysdev/qe_lib/Makefile @@ -6,3 +6,5 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o obj-$(CONFIG_UCC) += ucc.o obj-$(CONFIG_UCC_SLOW) += ucc_slow.o obj-$(CONFIG_UCC_FAST) += ucc_fast.o +obj-$(CONFIG_QE_USB) += usb.o +obj-$(CONFIG_QE_GPIO) += gpio.o diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c new file mode 100644 index 0000000000000000000000000000000000000000..8e5a0bc36d0be40c1da806b91cb3a721348e84d6 --- /dev/null +++ b/arch/powerpc/sysdev/qe_lib/gpio.c @@ -0,0 +1,149 @@ +/* + * QUICC Engine GPIOs + * + * Copyright (c) MontaVista Software, Inc. 2008. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +struct qe_gpio_chip { + struct of_mm_gpio_chip mm_gc; + spinlock_t lock; + + /* shadowed data register to clear/set bits safely */ + u32 cpdata; +}; + +static inline struct qe_gpio_chip * +to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc) +{ + return container_of(mm_gc, struct qe_gpio_chip, mm_gc); +} + +static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) +{ + struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); + struct qe_pio_regs __iomem *regs = mm_gc->regs; + + qe_gc->cpdata = in_be32(®s->cpdata); +} + +static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct qe_pio_regs __iomem *regs = mm_gc->regs; + u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); + + return in_be32(®s->cpdata) & pin_mask; +} + +static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); + struct qe_pio_regs __iomem *regs = mm_gc->regs; + unsigned long flags; + u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); + + spin_lock_irqsave(&qe_gc->lock, flags); + + if (val) + qe_gc->cpdata |= pin_mask; + else + qe_gc->cpdata &= ~pin_mask; + + out_be32(®s->cpdata, qe_gc->cpdata); + + spin_unlock_irqrestore(&qe_gc->lock, flags); +} + +static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); + unsigned long flags; + + spin_lock_irqsave(&qe_gc->lock, flags); + + __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_IN, 0, 0, 0); + + spin_unlock_irqrestore(&qe_gc->lock, flags); + + return 0; +} + +static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +{ + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); + struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); + unsigned long flags; + + spin_lock_irqsave(&qe_gc->lock, flags); + + __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_OUT, 0, 0, 0); + + spin_unlock_irqrestore(&qe_gc->lock, flags); + + qe_gpio_set(gc, gpio, val); + + return 0; +} + +static int __init qe_add_gpiochips(void) +{ + struct device_node *np; + + for_each_compatible_node(np, NULL, "fsl,mpc8323-qe-pario-bank") { + int ret; + struct qe_gpio_chip *qe_gc; + struct of_mm_gpio_chip *mm_gc; + struct of_gpio_chip *of_gc; + struct gpio_chip *gc; + + qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL); + if (!qe_gc) { + ret = -ENOMEM; + goto err; + } + + spin_lock_init(&qe_gc->lock); + + mm_gc = &qe_gc->mm_gc; + of_gc = &mm_gc->of_gc; + gc = &of_gc->gc; + + mm_gc->save_regs = qe_gpio_save_regs; + of_gc->gpio_cells = 2; + gc->ngpio = QE_PIO_PINS; + gc->direction_input = qe_gpio_dir_in; + gc->direction_output = qe_gpio_dir_out; + gc->get = qe_gpio_get; + gc->set = qe_gpio_set; + + ret = of_mm_gpiochip_add(np, mm_gc); + if (ret) + goto err; + continue; +err: + pr_err("%s: registration failed with status %d\n", + np->full_name, ret); + kfree(qe_gc); + /* try others anyway */ + } + return 0; +} +arch_initcall(qe_add_gpiochips); diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index cff550eec7e8d3054659d608c89405b0c1d658d4..b3b73ae57d6d6ba96974732f04d81c11956d8fe5 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c @@ -35,7 +35,6 @@ #include static void qe_snums_init(void); -static void qe_muram_init(void); static int qe_sdma_init(void); static DEFINE_SPINLOCK(qe_lock); @@ -65,7 +64,7 @@ static phys_addr_t qebase = -1; phys_addr_t get_qe_base(void) { struct device_node *qe; - unsigned int size; + int size; const u32 *prop; if (qebase != -1) @@ -88,7 +87,7 @@ phys_addr_t get_qe_base(void) EXPORT_SYMBOL(get_qe_base); -void qe_reset(void) +void __init qe_reset(void) { if (qe_immr == NULL) qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); @@ -159,7 +158,7 @@ static unsigned int brg_clk = 0; unsigned int qe_get_brg_clk(void) { struct device_node *qe; - unsigned int size; + int size; const u32 *prop; if (brg_clk) @@ -306,7 +305,7 @@ EXPORT_SYMBOL(qe_put_snum); static int qe_sdma_init(void) { - struct sdma *sdma = &qe_immr->sdma; + struct sdma __iomem *sdma = &qe_immr->sdma; unsigned long sdma_buf_offset; if (!sdma) @@ -325,97 +324,6 @@ static int qe_sdma_init(void) return 0; } -/* - * muram_alloc / muram_free bits. - */ -static DEFINE_SPINLOCK(qe_muram_lock); - -/* 16 blocks should be enough to satisfy all requests - * until the memory subsystem goes up... */ -static rh_block_t qe_boot_muram_rh_block[16]; -static rh_info_t qe_muram_info; - -static void qe_muram_init(void) -{ - struct device_node *np; - const u32 *address; - u64 size; - unsigned int flags; - - /* initialize the info header */ - rh_init(&qe_muram_info, 1, - sizeof(qe_boot_muram_rh_block) / - sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block); - - /* Attach the usable muram area */ - /* XXX: This is a subset of the available muram. It - * varies with the processor and the microcode patches activated. - */ - np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data"); - if (!np) { - np = of_find_node_by_name(NULL, "data-only"); - if (!np) { - WARN_ON(1); - return; - } - } - - address = of_get_address(np, 0, &size, &flags); - WARN_ON(!address); - - of_node_put(np); - if (address) - rh_attach_region(&qe_muram_info, *address, (int)size); -} - -/* This function returns an index into the MURAM area. - */ -unsigned long qe_muram_alloc(int size, int align) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&qe_muram_lock, flags); - start = rh_alloc_align(&qe_muram_info, size, align, "QE"); - spin_unlock_irqrestore(&qe_muram_lock, flags); - - return start; -} -EXPORT_SYMBOL(qe_muram_alloc); - -int qe_muram_free(unsigned long offset) -{ - int ret; - unsigned long flags; - - spin_lock_irqsave(&qe_muram_lock, flags); - ret = rh_free(&qe_muram_info, offset); - spin_unlock_irqrestore(&qe_muram_lock, flags); - - return ret; -} -EXPORT_SYMBOL(qe_muram_free); - -/* not sure if this is ever needed */ -unsigned long qe_muram_alloc_fixed(unsigned long offset, int size) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&qe_muram_lock, flags); - start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc"); - spin_unlock_irqrestore(&qe_muram_lock, flags); - - return start; -} -EXPORT_SYMBOL(qe_muram_alloc_fixed); - -void qe_muram_dump(void) -{ - rh_dump(&qe_muram_info); -} -EXPORT_SYMBOL(qe_muram_dump); - /* The maximum number of RISCs we support */ #define MAX_QE_RISC 2 diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index f59444d3be752aa9580d751a9a76c0cd008a5f85..63cdf9887f3672dd4e16310b591b91d564de20bd 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c @@ -329,21 +329,19 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, struct resource res; u32 temp = 0, ret, high_active = 0; + ret = of_address_to_resource(node, 0, &res); + if (ret) + return; + qe_ic = alloc_bootmem(sizeof(struct qe_ic)); if (qe_ic == NULL) return; memset(qe_ic, 0, sizeof(struct qe_ic)); - qe_ic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, + qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, NR_QE_IC_INTS, &qe_ic_host_ops, 0); - if (qe_ic->irqhost == NULL) { - of_node_put(node); - return; - } - - ret = of_address_to_resource(node, 0, &res); - if (ret) + if (qe_ic->irqhost == NULL) return; qe_ic->regs = ioremap(res.start, res.end - res.start + 1); diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 93916a48afec56578acb3f403fe1034b0d0846e4..7c87460179ef9767afd8401c63947bc1f56b4ac6 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c @@ -28,21 +28,7 @@ #undef DEBUG -#define NUM_OF_PINS 32 - -struct port_regs { - __be32 cpodr; /* Open drain register */ - __be32 cpdata; /* Data register */ - __be32 cpdir1; /* Direction register */ - __be32 cpdir2; /* Direction register */ - __be32 cppar1; /* Pin assignment register */ - __be32 cppar2; /* Pin assignment register */ -#ifdef CONFIG_PPC_85xx - u8 pad[8]; -#endif -}; - -static struct port_regs __iomem *par_io; +static struct qe_pio_regs __iomem *par_io; static int num_par_io_ports = 0; int par_io_init(struct device_node *np) @@ -64,69 +50,79 @@ int par_io_init(struct device_node *np) return 0; } -int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, - int assignment, int has_irq) +void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir, + int open_drain, int assignment, int has_irq) { - u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val; - - if (!par_io) - return -1; + u32 pin_mask1bit; + u32 pin_mask2bits; + u32 new_mask2bits; + u32 tmp_val; /* calculate pin location for single and 2 bits information */ - pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1))); + pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1))); /* Set open drain, if required */ - tmp_val = in_be32(&par_io[port].cpodr); + tmp_val = in_be32(&par_io->cpodr); if (open_drain) - out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val); + out_be32(&par_io->cpodr, pin_mask1bit | tmp_val); else - out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val); + out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val); /* define direction */ - tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? - in_be32(&par_io[port].cpdir2) : - in_be32(&par_io[port].cpdir1); + tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ? + in_be32(&par_io->cpdir2) : + in_be32(&par_io->cpdir1); /* get all bits mask for 2 bit per port */ - pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS - - (pin % (NUM_OF_PINS / 2) + 1) * 2)); + pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS - + (pin % (QE_PIO_PINS / 2) + 1) * 2)); /* Get the final mask we need for the right definition */ - new_mask2bits = (u32) (dir << (NUM_OF_PINS - - (pin % (NUM_OF_PINS / 2) + 1) * 2)); + new_mask2bits = (u32) (dir << (QE_PIO_PINS - + (pin % (QE_PIO_PINS / 2) + 1) * 2)); /* clear and set 2 bits mask */ - if (pin > (NUM_OF_PINS / 2) - 1) { - out_be32(&par_io[port].cpdir2, + if (pin > (QE_PIO_PINS / 2) - 1) { + out_be32(&par_io->cpdir2, ~pin_mask2bits & tmp_val); tmp_val &= ~pin_mask2bits; - out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val); + out_be32(&par_io->cpdir2, new_mask2bits | tmp_val); } else { - out_be32(&par_io[port].cpdir1, + out_be32(&par_io->cpdir1, ~pin_mask2bits & tmp_val); tmp_val &= ~pin_mask2bits; - out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val); + out_be32(&par_io->cpdir1, new_mask2bits | tmp_val); } /* define pin assignment */ - tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? - in_be32(&par_io[port].cppar2) : - in_be32(&par_io[port].cppar1); + tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ? + in_be32(&par_io->cppar2) : + in_be32(&par_io->cppar1); - new_mask2bits = (u32) (assignment << (NUM_OF_PINS - - (pin % (NUM_OF_PINS / 2) + 1) * 2)); + new_mask2bits = (u32) (assignment << (QE_PIO_PINS - + (pin % (QE_PIO_PINS / 2) + 1) * 2)); /* clear and set 2 bits mask */ - if (pin > (NUM_OF_PINS / 2) - 1) { - out_be32(&par_io[port].cppar2, + if (pin > (QE_PIO_PINS / 2) - 1) { + out_be32(&par_io->cppar2, ~pin_mask2bits & tmp_val); tmp_val &= ~pin_mask2bits; - out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val); + out_be32(&par_io->cppar2, new_mask2bits | tmp_val); } else { - out_be32(&par_io[port].cppar1, + out_be32(&par_io->cppar1, ~pin_mask2bits & tmp_val); tmp_val &= ~pin_mask2bits; - out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val); + out_be32(&par_io->cppar1, new_mask2bits | tmp_val); } +} +EXPORT_SYMBOL(__par_io_config_pin); + +int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, + int assignment, int has_irq) +{ + if (!par_io || port >= num_par_io_ports) + return -EINVAL; + __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment, + has_irq); return 0; } EXPORT_SYMBOL(par_io_config_pin); @@ -137,10 +133,10 @@ int par_io_data_set(u8 port, u8 pin, u8 val) if (port >= num_par_io_ports) return -EINVAL; - if (pin >= NUM_OF_PINS) + if (pin >= QE_PIO_PINS) return -EINVAL; /* calculate pin location */ - pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin)); + pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin)); tmp_val = in_be32(&par_io[port].cpdata); diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c index 0e348d9af8a67ba2bec9e36da49fc2c2bfb44e58..1d78071aad7d9c80ebaa6a88c78d7cd6752709eb 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/arch/powerpc/sysdev/qe_lib/ucc.c @@ -26,7 +26,8 @@ #include #include -static DEFINE_SPINLOCK(ucc_lock); +DEFINE_SPINLOCK(cmxgcr_lock); +EXPORT_SYMBOL(cmxgcr_lock); int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) { @@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) if (ucc_num > UCC_MAX_NUM - 1) return -EINVAL; - spin_lock_irqsave(&ucc_lock, flags); + spin_lock_irqsave(&cmxgcr_lock, flags); clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT); - spin_unlock_irqrestore(&ucc_lock, flags); + spin_unlock_irqrestore(&cmxgcr_lock, flags); return 0; } @@ -87,7 +88,7 @@ int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed) return 0; } -static void get_cmxucr_reg(unsigned int ucc_num, __be32 **cmxucr, +static void get_cmxucr_reg(unsigned int ucc_num, __be32 __iomem **cmxucr, unsigned int *reg_num, unsigned int *shift) { unsigned int cmx = ((ucc_num & 1) << 1) + (ucc_num > 3); @@ -99,7 +100,7 @@ static void get_cmxucr_reg(unsigned int ucc_num, __be32 **cmxucr, int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask) { - __be32 *cmxucr; + __be32 __iomem *cmxucr; unsigned int reg_num; unsigned int shift; @@ -120,7 +121,7 @@ int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask) int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, enum comm_dir mode) { - __be32 *cmxucr; + __be32 __iomem *cmxucr; unsigned int reg_num; unsigned int shift; u32 clock_bits = 0; diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c index bcf88e6ce962c872819d86cde1cfd22fb76f0953..1aecb075a72e693f70f2d91a97b91117e281ba3d 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c @@ -46,7 +46,7 @@ void ucc_fast_dump_regs(struct ucc_fast_private * uccf) printk(KERN_INFO "uccm : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); printk(KERN_INFO "uccs : addr=0x%p, val=0x%02x\n", - &uccf->uf_regs->uccs, uccf->uf_regs->uccs); + &uccf->uf_regs->uccs, in_8(&uccf->uf_regs->uccs)); printk(KERN_INFO "urfb : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); printk(KERN_INFO "urfs : addr=0x%p, val=0x%04x\n", @@ -68,7 +68,7 @@ void ucc_fast_dump_regs(struct ucc_fast_private * uccf) printk(KERN_INFO "urtry : addr=0x%p, val=0x%08x\n", &uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); printk(KERN_INFO "guemr : addr=0x%p, val=0x%02x\n", - &uccf->uf_regs->guemr, uccf->uf_regs->guemr); + &uccf->uf_regs->guemr, in_8(&uccf->uf_regs->guemr)); } EXPORT_SYMBOL(ucc_fast_dump_regs); @@ -96,7 +96,7 @@ EXPORT_SYMBOL(ucc_fast_transmit_on_demand); void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode) { - struct ucc_fast *uf_regs; + struct ucc_fast __iomem *uf_regs; u32 gumr; uf_regs = uccf->uf_regs; @@ -117,7 +117,7 @@ EXPORT_SYMBOL(ucc_fast_enable); void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode) { - struct ucc_fast *uf_regs; + struct ucc_fast __iomem *uf_regs; u32 gumr; uf_regs = uccf->uf_regs; @@ -139,7 +139,7 @@ EXPORT_SYMBOL(ucc_fast_disable); int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret) { struct ucc_fast_private *uccf; - struct ucc_fast *uf_regs; + struct ucc_fast __iomem *uf_regs; u32 gumr; int ret; @@ -216,10 +216,10 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc uccf->stopped_tx = 0; uccf->stopped_rx = 0; uf_regs = uccf->uf_regs; - uccf->p_ucce = (u32 *) & (uf_regs->ucce); - uccf->p_uccm = (u32 *) & (uf_regs->uccm); + uccf->p_ucce = &uf_regs->ucce; + uccf->p_uccm = &uf_regs->uccm; #ifdef CONFIG_UGETH_TX_ON_DEMAND - uccf->p_utodr = (u16 *) & (uf_regs->utodr); + uccf->p_utodr = &uf_regs->utodr; #endif #ifdef STATISTICS uccf->tx_frames = 0; diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c new file mode 100644 index 0000000000000000000000000000000000000000..8105462078eb1596353f4525940cf2c2cc4c6278 --- /dev/null +++ b/arch/powerpc/sysdev/qe_lib/usb.c @@ -0,0 +1,55 @@ +/* + * QE USB routines + * + * Copyright (c) Freescale Semicondutor, Inc. 2006. + * Shlomi Gridish + * Jerry Huang + * Copyright (c) MontaVista Software, Inc. 2008. + * Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include + +int qe_usb_clock_set(enum qe_clock clk, int rate) +{ + struct qe_mux __iomem *mux = &qe_immr->qmx; + unsigned long flags; + u32 val; + + switch (clk) { + case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break; + case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break; + case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break; + case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break; + case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break; + case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break; + case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break; + case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break; + case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break; + case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break; + default: + pr_err("%s: requested unknown clock %d\n", __func__, clk); + return -EINVAL; + } + + if (qe_clock_is_brg(clk)) + qe_setbrg(clk, rate, 1); + + spin_lock_irqsave(&cmxgcr_lock, flags); + + clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val); + + spin_unlock_irqrestore(&cmxgcr_lock, flags); + + return 0; +} +EXPORT_SYMBOL(qe_usb_clock_set); diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index ac1a72dc21e576b51a849aa540fad165568481b2..24e1f5a197ae31d3de4377a23e936449072e5e80 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c @@ -426,11 +426,10 @@ void __init tsi108_pci_int_init(struct device_node *node) { DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); - pci_irq_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, + pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, 0, &pci_irq_host_ops, 0); if (pci_irq_host == NULL) { printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n"); - of_node_put(node); return; } diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 625b275c37950296ea93fd0506dcbefca92b2bb8..d35405c5943482c86efea86739099ed8c2f3da1e 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c @@ -280,12 +280,10 @@ static struct uic * __init uic_init_one(struct device_node *node) } uic->dcrbase = *dcrreg; - uic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, + uic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, NR_UIC_INTS, &uic_host_ops, -1); - if (! uic->irqhost) { - of_node_put(node); + if (! uic->irqhost) return NULL; /* FIXME: panic? */ - } uic->irqhost->host_data = uic; diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index bfcf70ee8959357dd3d76250e435160883734c67..34c3d0688fe025a788db37ead595b62a3ccee57f 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -54,7 +54,7 @@ #define skipbl xmon_skipbl #ifdef CONFIG_SMP -cpumask_t cpus_in_xmon = CPU_MASK_NONE; +static cpumask_t cpus_in_xmon = CPU_MASK_NONE; static unsigned long xmon_taken = 1; static int xmon_owner; static int xmon_gate; @@ -154,7 +154,7 @@ static int do_spu_cmd(void); static void dump_tlb_44x(void); #endif -int xmon_no_auto_backtrace; +static int xmon_no_auto_backtrace; extern void xmon_enter(void); extern void xmon_leave(void); @@ -327,6 +327,11 @@ static void release_output_lock(void) { xmon_speaker = 0; } + +int cpus_are_in_xmon(void) +{ + return !cpus_empty(cpus_in_xmon); +} #endif static int xmon_core(struct pt_regs *regs, int fromipi) @@ -593,7 +598,7 @@ static int xmon_iabr_match(struct pt_regs *regs) { if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) return 0; - if (iabr == 0) + if (iabr == NULL) return 0; xmon_core(regs, 0); return 1; @@ -1142,7 +1147,7 @@ bpt_cmds(void) } else { /* assume a breakpoint address */ bp = at_breakpoint(a); - if (bp == 0) { + if (bp == NULL) { printf("No breakpoint at %x\n", a); break; } @@ -1370,7 +1375,7 @@ static void print_bug_trap(struct pt_regs *regs) #endif } -void excprint(struct pt_regs *fp) +static void excprint(struct pt_regs *fp) { unsigned long trap; @@ -1408,7 +1413,7 @@ void excprint(struct pt_regs *fp) print_bug_trap(fp); } -void prregs(struct pt_regs *fp) +static void prregs(struct pt_regs *fp) { int n, trap; unsigned long base; @@ -1463,7 +1468,7 @@ void prregs(struct pt_regs *fp) printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); } -void cacheflush(void) +static void cacheflush(void) { int cmd; unsigned long nflush; @@ -1495,7 +1500,7 @@ void cacheflush(void) catch_memory_errors = 0; } -unsigned long +static unsigned long read_spr(int n) { unsigned int instrs[2]; @@ -1533,7 +1538,7 @@ read_spr(int n) return ret; } -void +static void write_spr(int n, unsigned long val) { unsigned int instrs[2]; @@ -1571,7 +1576,7 @@ static unsigned long regno; extern char exc_prolog; extern char dec_exc; -void super_regs(void) +static void super_regs(void) { int cmd; unsigned long val; @@ -1629,7 +1634,7 @@ void super_regs(void) /* * Stuff for reading and writing memory safely */ -int +static int mread(unsigned long adrs, void *buf, int size) { volatile int n; @@ -1666,7 +1671,7 @@ mread(unsigned long adrs, void *buf, int size) return n; } -int +static int mwrite(unsigned long adrs, void *buf, int size) { volatile int n; @@ -1731,7 +1736,7 @@ static int handle_fault(struct pt_regs *regs) #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) -void +static void byterev(unsigned char *val, int size) { int t; @@ -1793,7 +1798,7 @@ static char *memex_subcmd_help_string = " x exit this mode\n" ""; -void +static void memex(void) { int cmd, inc, i, nslash; @@ -1944,7 +1949,7 @@ memex(void) } } -int +static int bsesc(void) { int c; @@ -1984,7 +1989,7 @@ static void xmon_rawdump (unsigned long adrs, long ndump) #define isxdigit(c) (('0' <= (c) && (c) <= '9') \ || ('a' <= (c) && (c) <= 'f') \ || ('A' <= (c) && (c) <= 'F')) -void +static void dump(void) { int c; @@ -2022,7 +2027,7 @@ dump(void) } } -void +static void prdump(unsigned long adrs, long ndump) { long n, m, c, r, nr; @@ -2066,7 +2071,7 @@ prdump(unsigned long adrs, long ndump) typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); -int +static int generic_inst_dump(unsigned long adr, long count, int praddr, instruction_dump_func dump_func) { @@ -2104,7 +2109,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, return adr - first_adr; } -int +static int ppc_inst_dump(unsigned long adr, long count, int praddr) { return generic_inst_dump(adr, count, praddr, print_insn_powerpc); @@ -2126,7 +2131,7 @@ static unsigned long mval; /* byte value to set memory to */ static unsigned long mcount; /* # bytes to affect */ static unsigned long mdiffs; /* max # differences to print */ -void +static void memops(int cmd) { scanhex((void *)&mdest); @@ -2152,7 +2157,7 @@ memops(int cmd) } } -void +static void memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) { unsigned n, prt; @@ -2170,7 +2175,7 @@ memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) static unsigned mend; static unsigned mask; -void +static void memlocate(void) { unsigned a, n; @@ -2203,7 +2208,7 @@ memlocate(void) static unsigned long mskip = 0x1000; static unsigned long mlim = 0xffffffff; -void +static void memzcan(void) { unsigned char v; @@ -2230,7 +2235,7 @@ memzcan(void) printf("%.8x\n", a - mskip); } -void proccall(void) +static void proccall(void) { unsigned long args[8]; unsigned long ret; @@ -2388,7 +2393,7 @@ scanhex(unsigned long *vp) return 1; } -void +static void scannl(void) { int c; @@ -2399,7 +2404,7 @@ scannl(void) c = inchar(); } -int hexdigit(int c) +static int hexdigit(int c) { if( '0' <= c && c <= '9' ) return c - '0'; @@ -2430,13 +2435,13 @@ getstring(char *s, int size) static char line[256]; static char *lineptr; -void +static void flush_input(void) { lineptr = NULL; } -int +static int inchar(void) { if (lineptr == NULL || *lineptr == 0) { @@ -2449,7 +2454,7 @@ inchar(void) return *lineptr++; } -void +static void take_input(char *str) { lineptr = str; @@ -2618,7 +2623,8 @@ static void dump_tlb_44x(void) } } #endif /* CONFIG_44x */ -void xmon_init(int enable) + +static void xmon_init(int enable) { #ifdef CONFIG_PPC_ISERIES if (firmware_has_feature(FW_FEATURE_ISERIES)) diff --git a/arch/ppc/.gitignore b/arch/ppc/.gitignore deleted file mode 100644 index 1e79a0ae44737b6a2b01360d5df25b2baf04b9e4..0000000000000000000000000000000000000000 --- a/arch/ppc/.gitignore +++ /dev/null @@ -1 +0,0 @@ -/include diff --git a/arch/ppc/4xx_io/Makefile b/arch/ppc/4xx_io/Makefile deleted file mode 100644 index 6a8cd575f382d7948d1e44ceeade345cc61f7b9f..0000000000000000000000000000000000000000 --- a/arch/ppc/4xx_io/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile for the linux MPC4xx ppc-specific parts -# - - -obj-$(CONFIG_SERIAL_SICC) += serial_sicc.o diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c deleted file mode 100644 index efa0a56e230bfe2880cdee863921fb1f7e9fec49..0000000000000000000000000000000000000000 --- a/arch/ppc/4xx_io/serial_sicc.c +++ /dev/null @@ -1,2005 +0,0 @@ -/* - * Driver for IBM STB3xxx SICC serial port - * - * Based on drivers/char/serial_amba.c, by ARM Ltd. - * - * Copyright 2001 IBM Corp. - * Author: IBM China Research Lab - * Yudong Yang - * Yi Ge - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * - * This is a driver for SICC serial port on IBM Redwood 4 evaluation board. - * The driver support both as a console device and normal serial device and - * is compatible with normal ttyS* devices. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -#include - - -/* ----------------------------------------------------------------------------- - * From STB03xxx SICC UART Specification - * ----------------------------------------------------------------------------- - * UART Register Offsets. - */ - -#define BL_SICC_LSR 0x0000000 /* line status register read/clear */ -#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */ -#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */ -#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */ -#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */ -#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */ -#define BL_SICC_LCR 0x0000006 /* control register r/w */ -#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */ -#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */ -#define BL_SICC_RBR 0x0000009 /* receive buffer r */ -#define BL_SICC_TBR 0x0000009 /* transmit buffer w */ -#define BL_SICC_CTL2 0x000000A /* added for Vesta */ -#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */ - -/* masks and definitions for serial port control register */ - -#define _LCR_LM_MASK 0xc0 /* loop back modes */ -#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */ -#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */ -#define _LCR_DB_MASK 0x08 /* data bits mask */ -#define _LCR_PE_MASK 0x04 /* parity enable */ -#define _LCR_PTY_MASK 0x02 /* parity */ -#define _LCR_SB_MASK 0x01 /* stop bit mask */ - -#define _LCR_LM_NORM 0x00 /* normal operation */ -#define _LCR_LM_LOOP 0x40 /* internal loopback mode */ -#define _LCR_LM_ECHO 0x80 /* automatic echo mode */ -#define _LCR_LM_RES 0xc0 /* reserved */ - -#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */ -#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */ -#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */ -#define _LCR_DB_7_BITS 0x00 /* 7 data bits */ -#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */ -#define _LCR_PE_DISABLE 0x00 /* parity disabled */ -#define _LCR_PTY_EVEN 0x00 /* even parity */ -#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */ -#define _LCR_SB_1_BIT 0x00 /* one stop bit */ -#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */ - -/* serial port handshake register */ - -#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */ -#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */ -#define _HSR_DIS_ACT 0x00 /* dsr input is active */ -#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */ -#define _HSR_CS_ACT 0x00 /* cts input is active */ -#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */ - -/* serial port line status register */ - -#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */ -#define _LSR_FE_MASK 0x40 /* framing error */ -#define _LSR_OE_MASK 0x20 /* overrun error */ -#define _LSR_PE_MASK 0x10 /* parity error */ -#define _LSR_LB_MASK 0x08 /* line break */ -#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */ -#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */ - -#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */ -#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */ -#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */ -#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */ -#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */ -#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */ -#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */ -#define _LSR_TX_ALL 0x06 /* all physical transmit is done */ - -#define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \ - _LSR_PE_MASK ) - -/* serial port receiver command register */ - -#define _RCR_ER_MASK 0x80 /* enable receiver mask */ -#define _RCR_DME_MASK 0x60 /* dma mode */ -#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */ -#define _RCR_PME_MASK 0x08 /* pause mode mask */ - -#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */ -#define _RCR_DME_DISABLE 0x00 /* dma disabled */ -#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/ -#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */ -#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */ -#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */ -#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */ - -/* serial port transmit command register */ - -#define _TxCR_ET_MASK 0x80 /* transmitter enable mask */ -#define _TxCR_DME_MASK 0x60 /* dma mode mask */ -#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */ -#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */ -#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */ -#define _TxCR_TB_MASK 0x02 /* transmit break mask */ - -#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmitter enabled */ -#define _TxCR_DME_DISABLE 0x00 /* transmitter disabled, TBR intr disabled */ -#define _TxCR_DME_TBR 0x20 /* transmitter disabled, TBR intr enabled */ -#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */ -#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */ - -/* serial ctl reg 2 - added for Vesta */ - -#define _CTL2_EXTERN 0x80 /* */ -#define _CTL2_USEFIFO 0x40 /* */ -#define _CTL2_RESETRF 0x08 /* */ -#define _CTL2_RESETTF 0x04 /* */ - - - -#define SERIAL_SICC_NAME "ttySICC" -#define SERIAL_SICC_MAJOR 150 -#define SERIAL_SICC_MINOR 1 -#define SERIAL_SICC_NR 1 - -#ifndef TRUE -#define TRUE 1 -#endif -#ifndef FALSE -#define FALSE 0 -#endif - -/* - * Things needed by tty driver - */ -static struct tty_driver *siccnormal_driver; - -#if defined(CONFIG_SERIAL_SICC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) -#define SUPPORT_SYSRQ -#endif - -/* - * Things needed internally to this driver - */ - -/* - * tmp_buf is used as a temporary buffer by serial_write. We need to - * lock it in case the copy_from_user blocks while swapping in a page, - * and some other program tries to do a serial write at the same time. - * Since the lock will only come under contention when the system is - * swapping and available memory is low, it makes sense to share one - * buffer across all the serial ports, since it significantly saves - * memory if large numbers of serial ports are open. - */ -static u_char *tmp_buf; - -#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) - -/* number of characters left in xmit buffer before we ask for more */ -#define WAKEUP_CHARS 256 -#define SICC_ISR_PASS_LIMIT 256 - -#define EVT_WRITE_WAKEUP 0 - -struct SICC_icount { - __u32 cts; - __u32 dsr; - __u32 rng; - __u32 dcd; - __u32 rx; - __u32 tx; - __u32 frame; - __u32 overrun; - __u32 parity; - __u32 brk; - __u32 buf_overrun; -}; - -/* - * Static information about the port - */ -struct SICC_port { - unsigned int uart_base; - unsigned int uart_base_phys; - unsigned int irqrx; - unsigned int irqtx; - unsigned int uartclk; - unsigned int fifosize; - unsigned int tiocm_support; - void (*set_mctrl)(struct SICC_port *, u_int mctrl); -}; - -/* - * This is the state information which is persistent across opens - */ -struct SICC_state { - struct SICC_icount icount; - unsigned int line; - unsigned int close_delay; - unsigned int closing_wait; - unsigned int custom_divisor; - unsigned int flags; - int count; - struct SICC_info *info; - spinlock_t sicc_lock; -}; - -#define SICC_XMIT_SIZE 1024 -/* - * This is the state information which is only valid when the port is open. - */ -struct SICC_info { - struct SICC_port *port; - struct SICC_state *state; - struct tty_struct *tty; - unsigned char x_char; - unsigned char old_status; - unsigned char read_status_mask; - unsigned char ignore_status_mask; - struct circ_buf xmit; - unsigned int flags; -#ifdef SUPPORT_SYSRQ - unsigned long sysrq; -#endif - - unsigned int event; - unsigned int timeout; - unsigned int lcr_h; - unsigned int mctrl; - int blocked_open; - - struct tasklet_struct tlet; - - wait_queue_head_t open_wait; - wait_queue_head_t close_wait; - wait_queue_head_t delta_msr_wait; -}; - -#ifdef CONFIG_SERIAL_SICC_CONSOLE -static struct console siccuart_cons; -#endif -static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios); -static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout); - - - -static void powerpcMtcic_cr(unsigned long value) -{ - mtdcr(DCRN_CICCR, value); -} - -static unsigned long powerpcMfcic_cr(void) -{ - return mfdcr(DCRN_CICCR); -} - -static unsigned long powerpcMfclkgpcr(void) -{ - return mfdcr(DCRN_SCCR); -} - -static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl) -{ -} - -static struct SICC_port sicc_ports[SERIAL_SICC_NR] = { - { - .uart_base = 0, - .uart_base_phys = SICC0_IO_BASE, - .irqrx = SICC0_INTRX, - .irqtx = SICC0_INTTX, -// .uartclk = 0, - .fifosize = 1, - .set_mctrl = sicc_set_mctrl_null, - } -}; - -static struct SICC_state sicc_state[SERIAL_SICC_NR]; - -static void siccuart_enable_rx_interrupt(struct SICC_info *info) -{ - unsigned char cr; - - cr = readb(info->port->uart_base+BL_SICC_RCR); - cr &= ~_RCR_DME_MASK; - cr |= _RCR_DME_RXRDY; - writeb(cr, info->port->uart_base+BL_SICC_RCR); -} - -static void siccuart_disable_rx_interrupt(struct SICC_info *info) -{ - unsigned char cr; - - cr = readb(info->port->uart_base+BL_SICC_RCR); - cr &= ~_RCR_DME_MASK; - cr |= _RCR_DME_DISABLE; - writeb(cr, info->port->uart_base+BL_SICC_RCR); -} - - -static void siccuart_enable_tx_interrupt(struct SICC_info *info) -{ - unsigned char cr; - - cr = readb(info->port->uart_base+BL_SICC_TxCR); - cr &= ~_TxCR_DME_MASK; - cr |= _TxCR_DME_TBR; - writeb(cr, info->port->uart_base+BL_SICC_TxCR); -} - -static void siccuart_disable_tx_interrupt(struct SICC_info *info) -{ - unsigned char cr; - - cr = readb(info->port->uart_base+BL_SICC_TxCR); - cr &= ~_TxCR_DME_MASK; - cr |= _TxCR_DME_DISABLE; - writeb(cr, info->port->uart_base+BL_SICC_TxCR); -} - - -static void siccuart_stop(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - /* disable interrupts while stopping serial port interrupts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - siccuart_disable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - -static void siccuart_start(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - /* disable interrupts while starting serial port interrupts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (info->xmit.head != info->xmit.tail - && info->xmit.buf) - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - - -/* - * This routine is used by the interrupt handler to schedule - * processing in the software interrupt portion of the driver. - */ -static void siccuart_event(struct SICC_info *info, int event) -{ - info->event |= 1 << event; - tasklet_schedule(&info->tlet); -} - -static void -siccuart_rx_chars(struct SICC_info *info) -{ - struct tty_struct *tty = info->tty; - unsigned int status, ch, rsr, flg, ignored = 0; - struct SICC_icount *icount = &info->state->icount; - struct SICC_port *port = info->port; - - status = readb(port->uart_base+BL_SICC_LSR ); - while (status & _LSR_RBR_FULL) { - ch = readb(port->uart_base+BL_SICC_RBR); - - if (tty->flip.count >= TTY_FLIPBUF_SIZE) - goto ignore_char; - icount->rx++; - - flg = TTY_NORMAL; - - /* - * Note that the error handling code is - * out of the main execution path - */ - rsr = readb(port->uart_base+BL_SICC_LSR); - if (rsr & _LSR_RX_ERR) - goto handle_error; -#ifdef SUPPORT_SYSRQ - if (info->sysrq) { - if (ch && time_before(jiffies, info->sysrq)) { - handle_sysrq(ch, NULL); - info->sysrq = 0; - goto ignore_char; - } - info->sysrq = 0; - } -#endif - error_return: - *tty->flip.flag_buf_ptr++ = flg; - *tty->flip.char_buf_ptr++ = ch; - tty->flip.count++; - ignore_char: - status = readb(port->uart_base+BL_SICC_LSR ); - } -out: - tty_flip_buffer_push(tty); - return; - -handle_error: - if (rsr & _LSR_LB_BREAK) { - rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK); - icount->brk++; - -#ifdef SUPPORT_SYSRQ - if (info->state->line == siccuart_cons.index) { - if (!info->sysrq) { - info->sysrq = jiffies + HZ*5; - goto ignore_char; - } - } -#endif - } else if (rsr & _LSR_PE_MASK) - icount->parity++; - else if (rsr & _LSR_FE_MASK) - icount->frame++; - if (rsr & _LSR_OE_MASK) - icount->overrun++; - - if (rsr & info->ignore_status_mask) { - if (++ignored > 100) - goto out; - goto ignore_char; - } - rsr &= info->read_status_mask; - - if (rsr & _LSR_LB_BREAK) - flg = TTY_BREAK; - else if (rsr & _LSR_PE_MASK) - flg = TTY_PARITY; - else if (rsr & _LSR_FE_MASK) - flg = TTY_FRAME; - - if (rsr & _LSR_OE_MASK) { - /* - * CHECK: does overrun affect the current character? - * ASSUMPTION: it does not. - */ - *tty->flip.flag_buf_ptr++ = flg; - *tty->flip.char_buf_ptr++ = ch; - tty->flip.count++; - if (tty->flip.count >= TTY_FLIPBUF_SIZE) - goto ignore_char; - ch = 0; - flg = TTY_OVERRUN; - } -#ifdef SUPPORT_SYSRQ - info->sysrq = 0; -#endif - goto error_return; -} - -static void siccuart_tx_chars(struct SICC_info *info) -{ - struct SICC_port *port = info->port; - int count; - unsigned char status; - - - if (info->x_char) { - writeb(info->x_char, port->uart_base+ BL_SICC_TBR); - info->state->icount.tx++; - info->x_char = 0; - return; - } - if (info->xmit.head == info->xmit.tail - || info->tty->stopped - || info->tty->hw_stopped) { - siccuart_disable_tx_interrupt(info); - writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR); - return; - } - - count = port->fifosize; - do { - writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR); - info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1); - info->state->icount.tx++; - if (info->xmit.head == info->xmit.tail) - break; - } while (--count > 0); - - if (CIRC_CNT(info->xmit.head, - info->xmit.tail, - SICC_XMIT_SIZE) < WAKEUP_CHARS) - siccuart_event(info, EVT_WRITE_WAKEUP); - - if (info->xmit.head == info->xmit.tail) { - siccuart_disable_tx_interrupt(info); - } -} - - -static irqreturn_t siccuart_int_rx(int irq, void *dev_id) -{ - struct SICC_info *info = dev_id; - siccuart_rx_chars(info) - return IRQ_HANDLED; -} - - -static irqreturn_t siccuart_int_tx(int irq, void *dev_id) -{ - struct SICC_info *info = dev_id; - siccuart_tx_chars(info); - return IRQ_HANDLED; -} - -static void siccuart_tasklet_action(unsigned long data) -{ - struct SICC_info *info = (struct SICC_info *)data; - struct tty_struct *tty; - - tty = info->tty; - if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event)) - return; - - if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && - tty->ldisc.write_wakeup) - (tty->ldisc.write_wakeup)(tty); - wake_up_interruptible(&tty->write_wait); -} - -static int siccuart_startup(struct SICC_info *info) -{ - unsigned long flags; - unsigned long page; - int retval = 0; - - if (info->flags & ASYNC_INITIALIZED) { - return 0; - } - - page = get_zeroed_page(GFP_KERNEL); - if (!page) - return -ENOMEM; - - if (info->port->uart_base == 0) - info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE); - if (info->port->uart_base == 0) { - free_page(page); - return -ENOMEM; - } - - /* lock access to info while doing setup */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - - if (info->xmit.buf) - free_page(page); - else - info->xmit.buf = (unsigned char *) page; - - - info->mctrl = 0; - if (info->tty->termios->c_cflag & CBAUD) - info->mctrl = TIOCM_RTS | TIOCM_DTR; - info->port->set_mctrl(info->port, info->mctrl); - - /* - * initialise the old status of the modem signals - */ - info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY; - - - if (info->tty) - clear_bit(TTY_IO_ERROR, &info->tty->flags); - info->xmit.head = info->xmit.tail = 0; - - /* - * Set up the tty->alt_speed kludge - */ - if (info->tty) { - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - info->tty->alt_speed = 57600; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - info->tty->alt_speed = 115200; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - info->tty->alt_speed = 230400; - if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - info->tty->alt_speed = 460800; - } - - - writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA - - - /* - * and set the speed of the serial port - */ - siccuart_change_speed(info, 0); - - // enable rx/tx ports - writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR); - writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR); - - readb(info->port->uart_base + BL_SICC_RBR); // clear rx port - - writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */ - - /* - * Finally, enable interrupts - */ - - /* - * Allocate the IRQ - */ - retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info); - if (retval) { - if (capable(CAP_SYS_ADMIN)) { - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - retval = 0; - } - goto errout; - } - retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info); - if (retval) { - if (capable(CAP_SYS_ADMIN)) { - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - retval = 0; - } - free_irq(info->port->irqrx, info); - goto errout; - } - - siccuart_enable_rx_interrupt(info); - - info->flags |= ASYNC_INITIALIZED; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return 0; - - -errout: - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return retval; -} - -/* - * This routine will shutdown a serial port; interrupts are disabled, and - * DTR is dropped if the hangup on close termio flag is on. - */ -static void siccuart_shutdown(struct SICC_info *info) -{ - unsigned long flags; - - if (!(info->flags & ASYNC_INITIALIZED)) - return; - - /* lock while shutting down port */ - spin_lock_irqsave(&info->state->sicc_lock,flags); /* Disable interrupts */ - - /* - * clear delta_msr_wait queue to avoid mem leaks: we may free the irq - * here so the queue might never be woken up - */ - wake_up_interruptible(&info->delta_msr_wait); - - /* - * disable all interrupts, disable the port - */ - siccuart_disable_rx_interrupt(info); - siccuart_disable_tx_interrupt(info); - - /* - * Free the IRQ - */ - free_irq(info->port->irqtx, info); - free_irq(info->port->irqrx, info); - - if (info->xmit.buf) { - unsigned long pg = (unsigned long) info->xmit.buf; - info->xmit.buf = NULL; - free_page(pg); - } - - - if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) - info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS); - info->port->set_mctrl(info->port, info->mctrl); - - /* kill off our tasklet */ - tasklet_kill(&info->tlet); - if (info->tty) - set_bit(TTY_IO_ERROR, &info->tty->flags); - - info->flags &= ~ASYNC_INITIALIZED; - - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - - -static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios) -{ - unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits; - unsigned long flags; - - if (!info->tty || !info->tty->termios) - return; - - cflag = info->tty->termios->c_cflag; - - pr_debug("siccuart_set_cflag(0x%x) called\n", cflag); - /* byte size and parity */ - switch (cflag & CSIZE) { - case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break; - default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8 - } - if (cflag & CSTOPB) { - lcr_h |= _LCR_SB_2_BIT; - bits ++; - } - if (cflag & PARENB) { - lcr_h |= _LCR_PE_ENABLE; - bits++; - if (!(cflag & PARODD)) - lcr_h |= _LCR_PTY_ODD; - else - lcr_h |= _LCR_PTY_EVEN; - } - - do { - /* Determine divisor based on baud rate */ - baud = tty_get_baud_rate(info->tty); - if (!baud) - baud = 9600; - - - { - // here is ppc403SetBaud(com_port, baud); - unsigned long divisor, clockSource, temp; - - /* Ensure CICCR[7] is 0 to select Internal Baud Clock */ - powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF)); - - /* Determine Internal Baud Clock Frequency */ - /* powerpcMfclkgpcr() reads DCR 0x120 - the*/ - /* SCCR (Serial Clock Control Register) on Vesta */ - temp = powerpcMfclkgpcr(); - - if(temp & 0x00000080) { - clockSource = 324000000; - } - else { - clockSource = 216000000; - } - clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18); - divisor = clockSource/(16*baud) - 1; - /* divisor has only 12 bits of resolution */ - if(divisor>0x00000FFF){ - divisor=0x00000FFF; - } - - quot = divisor; - } - - if (baud == 38400 && - ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)) - quot = info->state->custom_divisor; - - if (!quot && old_termios) { - info->tty->termios->c_cflag &= ~CBAUD; - info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD); - old_termios = NULL; - } - } while (quot == 0 && old_termios); - - /* As a last resort, if the quotient is zero, default to 9600 bps */ - if (!quot) - quot = (info->port->uartclk / (16 * 9600)) - 1; - - info->timeout = info->port->fifosize * HZ * bits / baud; - info->timeout += HZ/50; /* Add .02 seconds of slop */ - - if (cflag & CRTSCTS) - info->flags |= ASYNC_CTS_FLOW; - else - info->flags &= ~ASYNC_CTS_FLOW; - if (cflag & CLOCAL) - info->flags &= ~ASYNC_CHECK_CD; - else - info->flags |= ASYNC_CHECK_CD; - - /* - * Set up parity check flag - */ -#define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) - - info->read_status_mask = _LSR_OE_MASK; - if (I_INPCK(info->tty)) - info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; - if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) - info->read_status_mask |= _LSR_LB_MASK; - - /* - * Characters to ignore - */ - info->ignore_status_mask = 0; - if (I_IGNPAR(info->tty)) - info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK; - if (I_IGNBRK(info->tty)) { - info->ignore_status_mask |= _LSR_LB_MASK; - /* - * If we're ignoring parity and break indicators, - * ignore overruns to (for real raw support). - */ - if (I_IGNPAR(info->tty)) - info->ignore_status_mask |= _LSR_OE_MASK; - } - - /* disable interrupts while reading and clearing registers */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - - old_rcr = readb(info->port->uart_base + BL_SICC_RCR); - old_tcr = readb(info->port->uart_base + BL_SICC_TxCR); - - - writeb(0, info->port->uart_base + BL_SICC_RCR); - writeb(0, info->port->uart_base + BL_SICC_TxCR); - - /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/ - - - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - - - /* Set baud rate */ - writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH ); - writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL ); - - /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */ - /* For now, do NOT use FIFOs since 403 UART did not have this */ - /* capability and this driver was inherited from 403UART. */ - writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2); - - writeb(lcr_h, info->port->uart_base + BL_SICC_LCR); - - writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr - writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr - -} - - -static void siccuart_put_char(struct tty_struct *tty, u_char ch) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - if (!tty || !info->xmit.buf) - return; - - /* lock info->xmit while adding character to tx buffer */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) { - info->xmit.buf[info->xmit.head] = ch; - info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1); - } - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - -static void siccuart_flush_chars(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - if (info->xmit.head == info->xmit.tail - || tty->stopped - || tty->hw_stopped - || !info->xmit.buf) - return; - - /* disable interrupts while transmitting characters */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - -static int siccuart_write(struct tty_struct *tty, - const u_char * buf, int count) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - int c, ret = 0; - - if (!tty || !info->xmit.buf || !tmp_buf) - return 0; - - /* lock info->xmit while removing characters from buffer */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - while (1) { - c = CIRC_SPACE_TO_END(info->xmit.head, - info->xmit.tail, - SICC_XMIT_SIZE); - if (count < c) - c = count; - if (c <= 0) - break; - memcpy(info->xmit.buf + info->xmit.head, buf, c); - info->xmit.head = (info->xmit.head + c) & - (SICC_XMIT_SIZE - 1); - buf += c; - count -= c; - ret += c; - } - if (info->xmit.head != info->xmit.tail - && !tty->stopped - && !tty->hw_stopped) - siccuart_enable_tx_interrupt(info); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return ret; -} - -static int siccuart_write_room(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - - return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); -} - -static int siccuart_chars_in_buffer(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - - return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE); -} - -static void siccuart_flush_buffer(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - pr_debug("siccuart_flush_buffer(%d) called\n", tty->index); - /* lock info->xmit while zeroing buffer counts */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->xmit.head = info->xmit.tail = 0; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - wake_up_interruptible(&tty->write_wait); - if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && - tty->ldisc.write_wakeup) - (tty->ldisc.write_wakeup)(tty); -} - -/* - * This function is used to send a high-priority XON/XOFF character to - * the device - */ -static void siccuart_send_xchar(struct tty_struct *tty, char ch) -{ - struct SICC_info *info = tty->driver_data; - - info->x_char = ch; - if (ch) - siccuart_enable_tx_interrupt(info); -} - -static void siccuart_throttle(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - - if (I_IXOFF(tty)) - siccuart_send_xchar(tty, STOP_CHAR(tty)); - - if (tty->termios->c_cflag & CRTSCTS) { - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl &= ~TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } -} - -static void siccuart_unthrottle(struct tty_struct *tty) -{ - struct SICC_info *info = (struct SICC_info *) tty->driver_data; - unsigned long flags; - - if (I_IXOFF(tty)) { - if (info->x_char) - info->x_char = 0; - else - siccuart_send_xchar(tty, START_CHAR(tty)); - } - - if (tty->termios->c_cflag & CRTSCTS) { - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl |= TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } -} - -static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo) -{ - struct SICC_state *state = info->state; - struct SICC_port *port = info->port; - struct serial_struct tmp; - - memset(&tmp, 0, sizeof(tmp)); - tmp.type = 0; - tmp.line = state->line; - tmp.port = port->uart_base; - if (HIGH_BITS_OFFSET) - tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET; - tmp.irq = port->irqrx; - tmp.flags = 0; - tmp.xmit_fifo_size = port->fifosize; - tmp.baud_base = port->uartclk / 16; - tmp.close_delay = state->close_delay; - tmp.closing_wait = state->closing_wait; - tmp.custom_divisor = state->custom_divisor; - - if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) - return -EFAULT; - return 0; -} - -static int set_serial_info(struct SICC_info *info, - struct serial_struct *newinfo) -{ - struct serial_struct new_serial; - struct SICC_state *state, old_state; - struct SICC_port *port; - unsigned long new_port; - unsigned int i, change_irq, change_port; - int retval = 0; - - if (copy_from_user(&new_serial, newinfo, sizeof(new_serial))) - return -EFAULT; - - state = info->state; - old_state = *state; - port = info->port; - - new_port = new_serial.port; - if (HIGH_BITS_OFFSET) - new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET; - - change_irq = new_serial.irq != port->irqrx; - change_port = new_port != port->uart_base; - - if (!capable(CAP_SYS_ADMIN)) { - if (change_irq || change_port || - (new_serial.baud_base != port->uartclk / 16) || - (new_serial.close_delay != state->close_delay) || - (new_serial.xmit_fifo_size != port->fifosize) || - ((new_serial.flags & ~ASYNC_USR_MASK) != - (state->flags & ~ASYNC_USR_MASK))) - return -EPERM; - state->flags = ((state->flags & ~ASYNC_USR_MASK) | - (new_serial.flags & ASYNC_USR_MASK)); - info->flags = ((info->flags & ~ASYNC_USR_MASK) | - (new_serial.flags & ASYNC_USR_MASK)); - state->custom_divisor = new_serial.custom_divisor; - goto check_and_exit; - } - - if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) || - (new_serial.baud_base < 9600)) - return -EINVAL; - - if (new_serial.type && change_port) { - for (i = 0; i < SERIAL_SICC_NR; i++) - if ((port != sicc_ports + i) && - sicc_ports[i].uart_base != new_port) - return -EADDRINUSE; - } - - if ((change_port || change_irq) && (state->count > 1)) - return -EBUSY; - - /* - * OK, past this point, all the error checking has been done. - * At this point, we start making changes..... - */ - port->uartclk = new_serial.baud_base * 16; - state->flags = ((state->flags & ~ASYNC_FLAGS) | - (new_serial.flags & ASYNC_FLAGS)); - info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) | - (info->flags & ASYNC_INTERNAL_FLAGS)); - state->custom_divisor = new_serial.custom_divisor; - state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay); - state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait); - info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; - port->fifosize = new_serial.xmit_fifo_size; - - if (change_port || change_irq) { - /* - * We need to shutdown the serial port at the old - * port/irq combination. - */ - siccuart_shutdown(info); - port->irqrx = new_serial.irq; - port->uart_base = new_port; - } - -check_and_exit: - if (!port->uart_base) - return 0; - if (info->flags & ASYNC_INITIALIZED) { - if ((old_state.flags & ASYNC_SPD_MASK) != - (state->flags & ASYNC_SPD_MASK) || - (old_state.custom_divisor != state->custom_divisor)) { - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI) - info->tty->alt_speed = 57600; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI) - info->tty->alt_speed = 115200; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI) - info->tty->alt_speed = 230400; - if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP) - info->tty->alt_speed = 460800; - siccuart_change_speed(info, NULL); - } - } else - retval = siccuart_startup(info); - return retval; -} - - -/* - * get_lsr_info - get line status register info - */ -static int get_lsr_info(struct SICC_info *info, unsigned int *value) -{ - unsigned int result, status; - unsigned long flags; - - /* disable interrupts while reading status from port */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - status = readb(info->port->uart_base + BL_SICC_LSR); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - result = status & _LSR_TSR_EMPTY ? TIOCSER_TEMT : 0; - - /* - * If we're about to load something into the transmit - * register, we'll pretend the transmitter isn't empty to - * avoid a race condition (depending on when the transmit - * interrupt happens). - */ - if (info->x_char || - ((CIRC_CNT(info->xmit.head, info->xmit.tail, - SICC_XMIT_SIZE) > 0) && - !info->tty->stopped && !info->tty->hw_stopped)) - result &= TIOCSER_TEMT; - - return put_user(result, value); -} - -static int get_modem_info(struct SICC_info *info, unsigned int *value) -{ - unsigned int result = info->mctrl; - - return put_user(result, value); -} - -static int set_modem_info(struct SICC_info *info, unsigned int cmd, - unsigned int *value) -{ - unsigned int arg, old; - unsigned long flags; - - if (get_user(arg, value)) - return -EFAULT; - - old = info->mctrl; - switch (cmd) { - case TIOCMBIS: - info->mctrl |= arg; - break; - - case TIOCMBIC: - info->mctrl &= ~arg; - break; - - case TIOCMSET: - info->mctrl = arg; - break; - - default: - return -EINVAL; - } - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (old != info->mctrl) - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return 0; -} - -static void siccuart_break_ctl(struct tty_struct *tty, int break_state) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - unsigned int lcr_h; - - - /* disable interrupts while setting break state */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - lcr_h = readb(info->port + BL_SICC_LSR); - if (break_state == -1) - lcr_h |= _LSR_LB_MASK; - else - lcr_h &= ~_LSR_LB_MASK; - writeb(lcr_h, info->port + BL_SICC_LSRS); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); -} - -static int siccuart_ioctl(struct tty_struct *tty, struct file *file, - unsigned int cmd, unsigned long arg) -{ - struct SICC_info *info = tty->driver_data; - struct SICC_icount cnow; - struct serial_icounter_struct icount; - unsigned long flags; - - if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) && - (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) && - (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { - if (tty->flags & (1 << TTY_IO_ERROR)) - return -EIO; - } - - switch (cmd) { - case TIOCMGET: - return get_modem_info(info, (unsigned int *)arg); - case TIOCMBIS: - case TIOCMBIC: - case TIOCMSET: - return set_modem_info(info, cmd, (unsigned int *)arg); - case TIOCGSERIAL: - return get_serial_info(info, - (struct serial_struct *)arg); - case TIOCSSERIAL: - return set_serial_info(info, - (struct serial_struct *)arg); - case TIOCSERGETLSR: /* Get line status register */ - return get_lsr_info(info, (unsigned int *)arg); - /* - * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change - * - mask passed in arg for lines of interest - * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) - * Caller should use TIOCGICOUNT to see which one it was - */ - case TIOCMIWAIT: - return 0; - /* - * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) - * Return: write counters to the user passed counter struct - * NB: both 1->0 and 0->1 transitions are counted except for - * RI where only 0->1 is counted. - */ - case TIOCGICOUNT: - /* disable interrupts while getting interrupt count */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - cnow = info->state->icount; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - icount.cts = cnow.cts; - icount.dsr = cnow.dsr; - icount.rng = cnow.rng; - icount.dcd = cnow.dcd; - icount.rx = cnow.rx; - icount.tx = cnow.tx; - icount.frame = cnow.frame; - icount.overrun = cnow.overrun; - icount.parity = cnow.parity; - icount.brk = cnow.brk; - icount.buf_overrun = cnow.buf_overrun; - - return copy_to_user((void *)arg, &icount, sizeof(icount)) - ? -EFAULT : 0; - - default: - return -ENOIOCTLCMD; - } - return 0; -} - -static void siccuart_set_termios(struct tty_struct *tty, struct termios *old_termios) -{ - struct SICC_info *info = tty->driver_data; - unsigned long flags; - unsigned int cflag = tty->termios->c_cflag; - - if ((cflag ^ old_termios->c_cflag) == 0 && - RELEVENT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0) - return; - - siccuart_change_speed(info, old_termios); - - /* Handle transition to B0 status */ - if ((old_termios->c_cflag & CBAUD) && - !(cflag & CBAUD)) { - /* disable interrupts while setting break state */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl &= ~(TIOCM_RTS | TIOCM_DTR); - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } - - /* Handle transition away from B0 status */ - if (!(old_termios->c_cflag & CBAUD) && - (cflag & CBAUD)) { - /* disable interrupts while setting break state */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - info->mctrl |= TIOCM_DTR; - if (!(cflag & CRTSCTS) || - !test_bit(TTY_THROTTLED, &tty->flags)) - info->mctrl |= TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - } - - /* Handle turning off CRTSCTS */ - if ((old_termios->c_cflag & CRTSCTS) && - !(cflag & CRTSCTS)) { - tty->hw_stopped = 0; - siccuart_start(tty); - } - -#if 0 - /* - * No need to wake up processes in open wait, since they - * sample the CLOCAL flag once, and don't recheck it. - * XXX It's not clear whether the current behavior is correct - * or not. Hence, this may change..... - */ - if (!(old_termios->c_cflag & CLOCAL) && - (tty->termios->c_cflag & CLOCAL)) - wake_up_interruptible(&info->open_wait); -#endif -} - -static void siccuart_close(struct tty_struct *tty, struct file *filp) -{ - struct SICC_info *info = tty->driver_data; - struct SICC_state *state; - unsigned long flags; - - if (!info) - return; - - state = info->state; - - //pr_debug("siccuart_close() called\n"); - - /* lock tty->driver_data while closing port */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - - if (tty_hung_up_p(filp)) { - goto quick_close; - } - - if ((tty->count == 1) && (state->count != 1)) { - /* - * Uh, oh. tty->count is 1, which means that the tty - * structure will be freed. state->count should always - * be one in these conditions. If it's greater than - * one, we've got real problems, since it means the - * serial port won't be shutdown. - */ - printk("siccuart_close: bad serial port count; tty->count is 1, state->count is %d\n", state->count); - state->count = 1; - } - if (--state->count < 0) { - printk("rs_close: bad serial port count for %s: %d\n", tty->name, state->count); - state->count = 0; - } - if (state->count) { - goto quick_close; - } - info->flags |= ASYNC_CLOSING; - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - /* - * Now we wait for the transmit buffer to clear; and we notify - * the line discipline to only process XON/XOFF characters. - */ - tty->closing = 1; - if (info->state->closing_wait != ASYNC_CLOSING_WAIT_NONE) - tty_wait_until_sent(tty, info->state->closing_wait); - /* - * At this point, we stop accepting input. To do this, we - * disable the receive line status interrupts. - */ - if (info->flags & ASYNC_INITIALIZED) { - siccuart_disable_rx_interrupt(info); - /* - * Before we drop DTR, make sure the UART transmitter - * has completely drained; this is especially - * important if there is a transmit FIFO! - */ - siccuart_wait_until_sent(tty, info->timeout); - } - siccuart_shutdown(info); - if (tty->driver->flush_buffer) - tty->driver->flush_buffer(tty); - if (tty->ldisc.flush_buffer) - tty->ldisc.flush_buffer(tty); - tty->closing = 0; - info->event = 0; - info->tty = NULL; - if (info->blocked_open) { - if (info->state->close_delay) - schedule_timeout_interruptible(info->state->close_delay); - wake_up_interruptible(&info->open_wait); - } - info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); - wake_up_interruptible(&info->close_wait); - return; - -quick_close: - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - return; -} - -static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout) -{ - struct SICC_info *info = (struct SICC_info *) tty->driver_data; - unsigned long char_time, expire; - - if (info->port->fifosize == 0) - return; - - /* - * Set the check interval to be 1/5 of the estimated time to - * send a single character, and make it at least 1. The check - * interval should also be less than the timeout. - * - * Note: we have to use pretty tight timings here to satisfy - * the NIST-PCTS. - */ - char_time = (info->timeout - msecs_to_jiffies(20)) / info->port->fifosize; - char_time = char_time / 5; - if (char_time == 0) - char_time = 1; - - // Crazy!! sometimes the input arg 'timeout' can be negtive numbers :-( - if (timeout >= 0 && timeout < char_time) - char_time = timeout; - /* - * If the transmitter hasn't cleared in twice the approximate - * amount of time to send the entire FIFO, it probably won't - * ever clear. This assumes the UART isn't doing flow - * control, which is currently the case. Hence, if it ever - * takes longer than info->timeout, this is probably due to a - * UART bug of some kind. So, we clamp the timeout parameter at - * 2*info->timeout. - */ - if (!timeout || timeout > 2 * info->timeout) - timeout = 2 * info->timeout; - - expire = jiffies + timeout; - pr_debug("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n", - tty->index, jiffies, - expire, char_time); - while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) { - schedule_timeout_interruptible(char_time); - if (signal_pending(current)) - break; - if (timeout && time_after(jiffies, expire)) - break; - } - set_current_state(TASK_RUNNING); -} - -static void siccuart_hangup(struct tty_struct *tty) -{ - struct SICC_info *info = tty->driver_data; - struct SICC_state *state = info->state; - - siccuart_flush_buffer(tty); - if (info->flags & ASYNC_CLOSING) - return; - siccuart_shutdown(info); - info->event = 0; - state->count = 0; - info->flags &= ~ASYNC_NORMAL_ACTIVE; - info->tty = NULL; - wake_up_interruptible(&info->open_wait); -} - -static int block_til_ready(struct tty_struct *tty, struct file *filp, - struct SICC_info *info) -{ - DECLARE_WAITQUEUE(wait, current); - struct SICC_state *state = info->state; - unsigned long flags; - int do_clocal = 0, extra_count = 0, retval; - - /* - * If the device is in the middle of being closed, then block - * until it's done, and then try again. - */ - if (tty_hung_up_p(filp) || - (info->flags & ASYNC_CLOSING)) { - if (info->flags & ASYNC_CLOSING) - interruptible_sleep_on(&info->close_wait); - return (info->flags & ASYNC_HUP_NOTIFY) ? - -EAGAIN : -ERESTARTSYS; - } - - /* - * If non-blocking mode is set, or the port is not enabled, - * then make the check up front and then exit. - */ - if ((filp->f_flags & O_NONBLOCK) || - (tty->flags & (1 << TTY_IO_ERROR))) { - info->flags |= ASYNC_NORMAL_ACTIVE; - return 0; - } - - if (tty->termios->c_cflag & CLOCAL) - do_clocal = 1; - - /* - * Block waiting for the carrier detect and the line to become - * free (i.e., not in use by the callout). While we are in - * this loop, state->count is dropped by one, so that - * rs_close() knows when to free things. We restore it upon - * exit, either normal or abnormal. - */ - retval = 0; - add_wait_queue(&info->open_wait, &wait); - /* lock while decrementing state->count */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (!tty_hung_up_p(filp)) { - extra_count = 1; - state->count--; - } - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - info->blocked_open++; - while (1) { - /* disable interrupts while setting modem control lines */ - spin_lock_irqsave(&info->state->sicc_lock,flags); - if (tty->termios->c_cflag & CBAUD) { - info->mctrl = TIOCM_DTR | TIOCM_RTS; - info->port->set_mctrl(info->port, info->mctrl); - } - spin_unlock_irqrestore(&info->state->sicc_lock,flags); - set_current_state(TASK_INTERRUPTIBLE); - if (tty_hung_up_p(filp) || - !(info->flags & ASYNC_INITIALIZED)) { - if (info->flags & ASYNC_HUP_NOTIFY) - retval = -EAGAIN; - else - retval = -ERESTARTSYS; - break; - } - if (!(info->flags & ASYNC_CLOSING) && - (do_clocal /*|| (UART_GET_FR(info->port) & SICC_UARTFR_DCD)*/)) - break; - if (signal_pending(current)) { - retval = -ERESTARTSYS; - break; - } - schedule(); - } - set_current_state(TASK_RUNNING); - remove_wait_queue(&info->open_wait, &wait); - if (extra_count) - state->count++; - info->blocked_open--; - if (retval) - return retval; - info->flags |= ASYNC_NORMAL_ACTIVE; - return 0; -} - -static struct SICC_info *siccuart_get(int line) -{ - struct SICC_info *info; - struct SICC_state *state = sicc_state + line; - - state->count++; - if (state->info) - return state->info; - info = kzalloc(sizeof(struct SICC_info), GFP_KERNEL); - if (info) { - init_waitqueue_head(&info->open_wait); - init_waitqueue_head(&info->close_wait); - init_waitqueue_head(&info->delta_msr_wait); - info->flags = state->flags; - info->state = state; - info->port = sicc_ports + line; - tasklet_init(&info->tlet, siccuart_tasklet_action, - (unsigned long)info); - } - if (state->info) { - kfree(info); - return state->info; - } - state->info = info; - return info; -} - -static int siccuart_open(struct tty_struct *tty, struct file *filp) -{ - struct SICC_info *info; - int retval, line = tty->index; - - - // is this a line that we've got? - if (line >= SERIAL_SICC_NR) { - return -ENODEV; - } - - info = siccuart_get(line); - if (!info) - return -ENOMEM; - - tty->driver_data = info; - info->tty = tty; - info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; - - /* - * Make sure we have the temporary buffer allocated - */ - if (!tmp_buf) { - unsigned long page = get_zeroed_page(GFP_KERNEL); - if (tmp_buf) - free_page(page); - else if (!page) { - return -ENOMEM; - } - tmp_buf = (u_char *)page; - } - - /* - * If the port is in the middle of closing, bail out now. - */ - if (tty_hung_up_p(filp) || - (info->flags & ASYNC_CLOSING)) { - if (info->flags & ASYNC_CLOSING) - interruptible_sleep_on(&info->close_wait); - return -EAGAIN; - } - - /* - * Start up the serial port - */ - retval = siccuart_startup(info); - if (retval) { - return retval; - } - - retval = block_til_ready(tty, filp, info); - if (retval) { - return retval; - } - -#ifdef CONFIG_SERIAL_SICC_CONSOLE - if (siccuart_cons.cflag && siccuart_cons.index == line) { - tty->termios->c_cflag = siccuart_cons.cflag; - siccuart_cons.cflag = 0; - siccuart_change_speed(info, NULL); - } -#endif - return 0; -} - -static const struct tty_operations sicc_ops = { - .open = siccuart_open, - .close = siccuart_close, - .write = siccuart_write, - .put_char = siccuart_put_char, - .flush_chars = siccuart_flush_chars, - .write_room = siccuart_write_room, - .chars_in_buffer = siccuart_chars_in_buffer, - .flush_buffer = siccuart_flush_buffer, - .ioctl = siccuart_ioctl, - .throttle = siccuart_throttle, - .unthrottle = siccuart_unthrottle, - .send_xchar = siccuart_send_xchar, - .set_termios = siccuart_set_termios, - .stop = siccuart_stop, - .start = siccuart_start, - .hangup = siccuart_hangup, - .break_ctl = siccuart_break_ctl, - .wait_until_sent = siccuart_wait_until_sent, -}; - -int __init siccuart_init(void) -{ - int i; - siccnormal_driver = alloc_tty_driver(SERIAL_SICC_NR); - if (!siccnormal_driver) - return -ENOMEM; - printk("IBM Vesta SICC serial port driver V 0.1 by Yudong Yang and Yi Ge / IBM CRL .\n"); - siccnormal_driver->driver_name = "serial_sicc"; - siccnormal_driver->owner = THIS_MODULE; - siccnormal_driver->name = SERIAL_SICC_NAME; - siccnormal_driver->major = SERIAL_SICC_MAJOR; - siccnormal_driver->minor_start = SERIAL_SICC_MINOR; - siccnormal_driver->type = TTY_DRIVER_TYPE_SERIAL; - siccnormal_driver->subtype = SERIAL_TYPE_NORMAL; - siccnormal_driver->init_termios = tty_std_termios; - siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL; - siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV; - tty_set_operations(siccnormal_driver, &sicc_ops); - - if (tty_register_driver(siccnormal_driver)) - panic("Couldn't register SICC serial driver\n"); - - for (i = 0; i < SERIAL_SICC_NR; i++) { - struct SICC_state *state = sicc_state + i; - state->line = i; - state->close_delay = msecs_to_jiffies(500); - state->closing_wait = 30 * HZ; - spin_lock_init(&state->sicc_lock); - } - - - return 0; -} - -__initcall(siccuart_init); - -#ifdef CONFIG_SERIAL_SICC_CONSOLE -/************** console driver *****************/ - -/* - * This code is currently never used; console->read is never called. - * Therefore, although we have an implementation, we don't use it. - * FIXME: the "const char *s" should be fixed to "char *s" some day. - * (when the definition in include/linux/console.h is also fixed) - */ -#ifdef used_and_not_const_char_pointer -static int siccuart_console_read(struct console *co, const char *s, u_int count) -{ - struct SICC_port *port = &sicc_ports[co->index]; - unsigned int status; - char *w; - int c; - - pr_debug("siccuart_console_read() called\n"); - - c = 0; - w = s; - while (c < count) { - if(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL) { - *w++ = readb(port->uart_base + BL_SICC_RBR); - c++; - } else { - // nothing more to get, return - return c; - } - } - // return the count - return c; -} -#endif - -/* - * Print a string to the serial port trying not to disturb - * any possible real use of the port... - * - * The console_lock must be held when we get here. - */ -static void siccuart_console_write(struct console *co, const char *s, u_int count) -{ - struct SICC_port *port = &sicc_ports[co->index]; - unsigned int old_cr; - int i; - - /* - * First save the CR then disable the interrupts - */ - old_cr = readb(port->uart_base + BL_SICC_TxCR); - writeb(old_cr & ~_TxCR_DME_MASK, port->uart_base + BL_SICC_TxCR); - - /* - * Now, do each character - */ - for (i = 0; i < count; i++) { - while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL); - writeb(s[i], port->uart_base + BL_SICC_TBR); - if (s[i] == '\n') { - while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL); - writeb('\r', port->uart_base + BL_SICC_TBR); - } - } - - /* - * Finally, wait for transmitter to become empty - * and restore the TCR - */ - while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL); - writeb(old_cr, port->uart_base + BL_SICC_TxCR); -} - -/* - * Receive character from the serial port - */ -static int siccuart_console_wait_key(struct console *co) -{ - struct SICC_port *port = &sicc_ports[co->index]; - int c; - - while(!(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL)); - c = readb(port->uart_base + BL_SICC_RBR); - return c; -} - -static struct tty_driver *siccuart_console_device(struct console *c, int *index) -{ - *index = c->index; - return siccnormal_driver; -} - -static int __init siccuart_console_setup(struct console *co, char *options) -{ - struct SICC_port *port; - int baud = 9600; - int bits = 8; - int parity = 'n'; - u_int cflag = CREAD | HUPCL | CLOCAL; - u_int lcr_h, quot; - - - if (co->index >= SERIAL_SICC_NR) - co->index = 0; - - port = &sicc_ports[co->index]; - - if (port->uart_base == 0) - port->uart_base = (int)ioremap(port->uart_base_phys, PAGE_SIZE); - - if (options) { - char *s = options; - baud = simple_strtoul(s, NULL, 10); - while (*s >= '0' && *s <= '9') - s++; - if (*s) parity = *s++; - if (*s) bits = *s - '0'; - } - - /* - * Now construct a cflag setting. - */ - switch (baud) { - case 1200: cflag |= B1200; break; - case 2400: cflag |= B2400; break; - case 4800: cflag |= B4800; break; - default: cflag |= B9600; baud = 9600; break; - case 19200: cflag |= B19200; break; - case 38400: cflag |= B38400; break; - case 57600: cflag |= B57600; break; - case 115200: cflag |= B115200; break; - } - switch (bits) { - case 7: cflag |= CS7; lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; break; - default: cflag |= CS8; lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; break; - } - switch (parity) { - case 'o': - case 'O': cflag |= PARODD; lcr_h |= _LCR_PTY_ODD; break; - case 'e': - case 'E': cflag |= PARENB; lcr_h |= _LCR_PE_ENABLE | _LCR_PTY_ODD; break; - } - - co->cflag = cflag; - - - { - // a copy of is inserted here ppc403SetBaud(com_port, (int)9600); - unsigned long divisor, clockSource, temp; - unsigned int rate = baud; - - /* Ensure CICCR[7] is 0 to select Internal Baud Clock */ - powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF)); - - /* Determine Internal Baud Clock Frequency */ - /* powerpcMfclkgpcr() reads DCR 0x120 - the*/ - /* SCCR (Serial Clock Control Register) on Vesta */ - temp = powerpcMfclkgpcr(); - - if(temp & 0x00000080) { - clockSource = 324000000; - } - else { - clockSource = 216000000; - } - clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18); - divisor = clockSource/(16*rate) - 1; - /* divisor has only 12 bits of resolution */ - if(divisor>0x00000FFF){ - divisor=0x00000FFF; - } - - quot = divisor; - } - - writeb((quot & 0x00000F00)>>8, port->uart_base + BL_SICC_BRDH ); - writeb( quot & 0x00000FF, port->uart_base + BL_SICC_BRDL ); - - /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */ - /* For now, do NOT use FIFOs since 403 UART did not have this */ - /* capability and this driver was inherited from 403UART. */ - writeb(_CTL2_EXTERN, port->uart_base + BL_SICC_CTL2); - - writeb(lcr_h, port->uart_base + BL_SICC_LCR); - writeb(_RCR_ER_ENABLE | _RCR_PME_HARD, port->uart_base + BL_SICC_RCR); - writeb( _TxCR_ET_ENABLE , port->uart_base + BL_SICC_TxCR); - - // writeb(, info->port->uart_base + BL_SICC_RCR ); - /* - * Transmitter Command Register: Transmitter enabled & DMA + TBR interrupt - * + Transmitter Empty interrupt + Transmitter error interrupt disabled & - * Stop mode when CTS active enabled & Transmit Break + Pattern Generation - * mode disabled. - */ - - writeb( 0x00, port->uart_base + BL_SICC_IrCR ); // disable IrDA - - readb(port->uart_base + BL_SICC_RBR); - - writeb(0xf8, port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */ - - /* we will enable the port as we need it */ - - return 0; -} - -static struct console siccuart_cons = -{ - .name = SERIAL_SICC_NAME, - .write = siccuart_console_write, -#ifdef used_and_not_const_char_pointer - .read = siccuart_console_read, -#endif - .device = siccuart_console_device, - .wait_key = siccuart_console_wait_key, - .setup = siccuart_console_setup, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -void __init sicc_console_init(void) -{ - register_console(&siccuart_cons); -} - -#endif /* CONFIG_SERIAL_SICC_CONSOLE */ diff --git a/arch/ppc/8260_io/Kconfig b/arch/ppc/8260_io/Kconfig deleted file mode 100644 index ea9651e2dd6a7eaab43a077b8f0f588043de5717..0000000000000000000000000000000000000000 --- a/arch/ppc/8260_io/Kconfig +++ /dev/null @@ -1,65 +0,0 @@ -# -# CPM2 Communication options -# - -menu "CPM2 Options" - depends on CPM2 - -config SCC_ENET - bool "CPM SCC Ethernet" - depends on NET_ETHERNET - -# -# CONFIG_FEC_ENET is only used to get netdevices to call our init -# function. Any combination of FCC1,2,3 are supported. -# -config FEC_ENET - bool "FCC Ethernet" - depends on NET_ETHERNET - -config FCC1_ENET - bool "Ethernet on FCC1" - depends on FEC_ENET - help - Use CPM2 fast Ethernet controller 1 to drive Ethernet (default). - -config FCC2_ENET - bool "Ethernet on FCC2" - depends on FEC_ENET - help - Use CPM2 fast Ethernet controller 2 to drive Ethernet. - -config FCC3_ENET - bool "Ethernet on FCC3" - depends on FEC_ENET - help - Use CPM2 fast Ethernet controller 3 to drive Ethernet. - -config USE_MDIO - bool "Use MDIO for PHY configuration" - depends on FEC_ENET - -choice - prompt "Type of PHY" - depends on 8260 && USE_MDIO - default FCC_GENERIC_PHY - -config FCC_LXT970 - bool "LXT970" - -config FCC_LXT971 - bool "LXT971" - -config FCC_QS6612 - bool "QS6612" - -config FCC_DM9131 - bool "DM9131" - -config FCC_DM9161 - bool "DM9161" - -config FCC_GENERIC_PHY - bool "Generic" -endchoice -endmenu diff --git a/arch/ppc/8260_io/Makefile b/arch/ppc/8260_io/Makefile deleted file mode 100644 index 971f292c5d48bc5c1bc65311552f75cd7f76b78e..0000000000000000000000000000000000000000 --- a/arch/ppc/8260_io/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile for the linux ppc-specific parts of comm processor (v2) -# - -obj-$(CONFIG_FEC_ENET) += fcc_enet.o -obj-$(CONFIG_SCC_ENET) += enet.o diff --git a/arch/ppc/8260_io/enet.c b/arch/ppc/8260_io/enet.c deleted file mode 100644 index ec1defea9c1e4885fe974722c8dc8cb00d45eac3..0000000000000000000000000000000000000000 --- a/arch/ppc/8260_io/enet.c +++ /dev/null @@ -1,865 +0,0 @@ -/* - * Ethernet driver for Motorola MPC8260. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2000 MontaVista Software Inc. (source@mvista.com) - * 2.3.99 Updates - * - * I copied this from the 8xx CPM Ethernet driver, so follow the - * credits back through that. - * - * This version of the driver is somewhat selectable for the different - * processor/board combinations. It works for the boards I know about - * now, and should be easily modified to include others. Some of the - * configuration information is contained in and the - * remainder is here. - * - * Buffer descriptors are kept in the CPM dual port RAM, and the frame - * buffers are in the host memory. - * - * Right now, I am very watseful with the buffers. I allocate memory - * pages and then divide them into 2K frame buffers. This way I know I - * have buffers large enough to hold one frame within one buffer descriptor. - * Once I get this working, I will use 64 or 128 byte CPM buffers, which - * will be much more memory efficient and will easily handle lots of - * small packets. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -/* - * Theory of Operation - * - * The MPC8260 CPM performs the Ethernet processing on an SCC. It can use - * an aribtrary number of buffers on byte boundaries, but must have at - * least two receive buffers to prevent constant overrun conditions. - * - * The buffer descriptors are allocated from the CPM dual port memory - * with the data buffers allocated from host memory, just like all other - * serial communication protocols. The host memory buffers are allocated - * from the free page pool, and then divided into smaller receive and - * transmit buffers. The size of the buffers should be a power of two, - * since that nicely divides the page. This creates a ring buffer - * structure similar to the LANCE and other controllers. - * - * Like the LANCE driver: - * The driver runs as two independent, single-threaded flows of control. One - * is the send-packet routine, which enforces single-threaded use by the - * cep->tx_busy flag. The other thread is the interrupt handler, which is - * single threaded by the hardware and other software. - */ - -/* The transmitter timeout - */ -#define TX_TIMEOUT (2*HZ) - -/* The number of Tx and Rx buffers. These are allocated from the page - * pool. The code may assume these are power of two, so it is best - * to keep them that size. - * We don't need to allocate pages for the transmitter. We just use - * the skbuffer directly. - */ -#define CPM_ENET_RX_PAGES 4 -#define CPM_ENET_RX_FRSIZE 2048 -#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE) -#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES) -#define TX_RING_SIZE 8 /* Must be power of two */ -#define TX_RING_MOD_MASK 7 /* for this to work */ - -/* The CPM stores dest/src/type, data, and checksum for receive packets. - */ -#define PKT_MAXBUF_SIZE 1518 -#define PKT_MINBUF_SIZE 64 -#define PKT_MAXBLR_SIZE 1520 - -/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and - * tx_bd_base always point to the base of the buffer descriptors. The - * cur_rx and cur_tx point to the currently available buffer. - * The dirty_tx tracks the current buffer that is being sent by the - * controller. The cur_tx and dirty_tx are equal under both completely - * empty and completely full conditions. The empty/ready indicator in - * the buffer descriptor determines the actual condition. - */ -struct scc_enet_private { - /* The saved address of a sent-in-place packet/buffer, for skfree(). */ - struct sk_buff* tx_skbuff[TX_RING_SIZE]; - ushort skb_cur; - ushort skb_dirty; - - /* CPM dual port RAM relative addresses. - */ - cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ - cbd_t *tx_bd_base; - cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ - cbd_t *dirty_tx; /* The ring entries to be free()ed. */ - scc_t *sccp; - struct net_device_stats stats; - uint tx_full; - spinlock_t lock; -}; - -static int scc_enet_open(struct net_device *dev); -static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); -static int scc_enet_rx(struct net_device *dev); -static irqreturn_t scc_enet_interrupt(int irq, void *dev_id); -static int scc_enet_close(struct net_device *dev); -static struct net_device_stats *scc_enet_get_stats(struct net_device *dev); -static void set_multicast_list(struct net_device *dev); - -/* These will be configurable for the SCC choice. -*/ -#define CPM_ENET_BLOCK CPM_CR_SCC1_SBLOCK -#define CPM_ENET_PAGE CPM_CR_SCC1_PAGE -#define PROFF_ENET PROFF_SCC1 -#define SCC_ENET 0 -#define SIU_INT_ENET SIU_INT_SCC1 - -/* These are both board and SCC dependent.... -*/ -#define PD_ENET_RXD ((uint)0x00000001) -#define PD_ENET_TXD ((uint)0x00000002) -#define PD_ENET_TENA ((uint)0x00000004) -#define PC_ENET_RENA ((uint)0x00020000) -#define PC_ENET_CLSN ((uint)0x00000004) -#define PC_ENET_TXCLK ((uint)0x00000800) -#define PC_ENET_RXCLK ((uint)0x00000400) -#define CMX_CLK_ROUTE ((uint)0x25000000) -#define CMX_CLK_MASK ((uint)0xff000000) - -/* Specific to a board. -*/ -#define PC_EST8260_ENET_LOOPBACK ((uint)0x80000000) -#define PC_EST8260_ENET_SQE ((uint)0x40000000) -#define PC_EST8260_ENET_NOTFD ((uint)0x20000000) - -static int -scc_enet_open(struct net_device *dev) -{ - - /* I should reset the ring buffers here, but I don't yet know - * a simple way to do that. - */ - netif_start_queue(dev); - return 0; /* Always succeed */ -} - -static int -scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - volatile cbd_t *bdp; - - - /* Fill in a Tx ring entry */ - bdp = cep->cur_tx; - -#ifndef final_version - if (bdp->cbd_sc & BD_ENET_TX_READY) { - /* Ooops. All transmit buffers are full. Bail out. - * This should not happen, since cep->tx_full should be set. - */ - printk("%s: tx queue full!.\n", dev->name); - return 1; - } -#endif - - /* Clear all of the status flags. - */ - bdp->cbd_sc &= ~BD_ENET_TX_STATS; - - /* If the frame is short, tell CPM to pad it. - */ - if (skb->len <= ETH_ZLEN) - bdp->cbd_sc |= BD_ENET_TX_PAD; - else - bdp->cbd_sc &= ~BD_ENET_TX_PAD; - - /* Set buffer length and buffer pointer. - */ - bdp->cbd_datlen = skb->len; - bdp->cbd_bufaddr = __pa(skb->data); - - /* Save skb pointer. - */ - cep->tx_skbuff[cep->skb_cur] = skb; - - cep->stats.tx_bytes += skb->len; - cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK; - - spin_lock_irq(&cep->lock); - - /* Send it on its way. Tell CPM its ready, interrupt when done, - * its the last BD of the frame, and to put the CRC on the end. - */ - bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC); - - dev->trans_start = jiffies; - - /* If this was the last BD in the ring, start at the beginning again. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - if (bdp->cbd_sc & BD_ENET_TX_READY) { - netif_stop_queue(dev); - cep->tx_full = 1; - } - - cep->cur_tx = (cbd_t *)bdp; - - spin_unlock_irq(&cep->lock); - - return 0; -} - -static void -scc_enet_timeout(struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - - printk("%s: transmit timed out.\n", dev->name); - cep->stats.tx_errors++; -#ifndef final_version - { - int i; - cbd_t *bdp; - printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n", - cep->cur_tx, cep->tx_full ? " (full)" : "", - cep->cur_rx); - bdp = cep->tx_bd_base; - printk(" Tx @base %p :\n", bdp); - for (i = 0 ; i < TX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - bdp = cep->rx_bd_base; - printk(" Rx @base %p :\n", bdp); - for (i = 0 ; i < RX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - } -#endif - if (!cep->tx_full) - netif_wake_queue(dev); -} - -/* The interrupt handler. - * This is called from the CPM handler, not the MPC core interrupt. - */ -static irqreturn_t -scc_enet_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - volatile struct scc_enet_private *cep; - volatile cbd_t *bdp; - ushort int_events; - int must_restart; - - cep = dev->priv; - - /* Get the interrupt events that caused us to be here. - */ - int_events = cep->sccp->scc_scce; - cep->sccp->scc_scce = int_events; - must_restart = 0; - - /* Handle receive event in its own function. - */ - if (int_events & SCCE_ENET_RXF) - scc_enet_rx(dev_id); - - /* Check for a transmit error. The manual is a little unclear - * about this, so the debug code until I get it figured out. It - * appears that if TXE is set, then TXB is not set. However, - * if carrier sense is lost during frame transmission, the TXE - * bit is set, "and continues the buffer transmission normally." - * I don't know if "normally" implies TXB is set when the buffer - * descriptor is closed.....trial and error :-). - */ - - /* Transmit OK, or non-fatal error. Update the buffer descriptors. - */ - if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) { - spin_lock(&cep->lock); - bdp = cep->dirty_tx; - while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) { - if ((bdp==cep->cur_tx) && (cep->tx_full == 0)) - break; - - if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */ - cep->stats.tx_heartbeat_errors++; - if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */ - cep->stats.tx_window_errors++; - if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */ - cep->stats.tx_aborted_errors++; - if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */ - cep->stats.tx_fifo_errors++; - if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */ - cep->stats.tx_carrier_errors++; - - - /* No heartbeat or Lost carrier are not really bad errors. - * The others require a restart transmit command. - */ - if (bdp->cbd_sc & - (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) { - must_restart = 1; - cep->stats.tx_errors++; - } - - cep->stats.tx_packets++; - - /* Deferred means some collisions occurred during transmit, - * but we eventually sent the packet OK. - */ - if (bdp->cbd_sc & BD_ENET_TX_DEF) - cep->stats.collisions++; - - /* Free the sk buffer associated with this last transmit. - */ - dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]); - cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK; - - /* Update pointer to next buffer descriptor to be transmitted. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - /* I don't know if we can be held off from processing these - * interrupts for more than one frame time. I really hope - * not. In such a case, we would now want to check the - * currently available BD (cur_tx) and determine if any - * buffers between the dirty_tx and cur_tx have also been - * sent. We would want to process anything in between that - * does not have BD_ENET_TX_READY set. - */ - - /* Since we have freed up a buffer, the ring is no longer - * full. - */ - if (cep->tx_full) { - cep->tx_full = 0; - if (netif_queue_stopped(dev)) { - netif_wake_queue(dev); - } - } - - cep->dirty_tx = (cbd_t *)bdp; - } - - if (must_restart) { - volatile cpm_cpm2_t *cp; - - /* Some transmit errors cause the transmitter to shut - * down. We now issue a restart transmit. Since the - * errors close the BD and update the pointers, the restart - * _should_ pick up without having to reset any of our - * pointers either. - */ - - cp = cpmp; - cp->cp_cpcr = - mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0, - CPM_CR_RESTART_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - } - spin_unlock(&cep->lock); - } - - /* Check for receive busy, i.e. packets coming but no place to - * put them. This "can't happen" because the receive interrupt - * is tossing previous frames. - */ - if (int_events & SCCE_ENET_BSY) { - cep->stats.rx_dropped++; - printk("SCC ENET: BSY can't happen.\n"); - } - - return IRQ_HANDLED; -} - -/* During a receive, the cur_rx points to the current incoming buffer. - * When we update through the ring, if the next incoming buffer has - * not been given to the system, we just set the empty indicator, - * effectively tossing the packet. - */ -static int -scc_enet_rx(struct net_device *dev) -{ - struct scc_enet_private *cep; - volatile cbd_t *bdp; - struct sk_buff *skb; - ushort pkt_len; - - cep = dev->priv; - - /* First, grab all of the stats for the incoming packet. - * These get messed up if we get called due to a busy condition. - */ - bdp = cep->cur_rx; - -for (;;) { - if (bdp->cbd_sc & BD_ENET_RX_EMPTY) - break; - -#ifndef final_version - /* Since we have allocated space to hold a complete frame, both - * the first and last indicators should be set. - */ - if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) != - (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) - printk("CPM ENET: rcv is not first+last\n"); -#endif - - /* Frame too long or too short. - */ - if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) - cep->stats.rx_length_errors++; - if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */ - cep->stats.rx_frame_errors++; - if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */ - cep->stats.rx_crc_errors++; - if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */ - cep->stats.rx_crc_errors++; - - /* Report late collisions as a frame error. - * On this error, the BD is closed, but we don't know what we - * have in the buffer. So, just drop this frame on the floor. - */ - if (bdp->cbd_sc & BD_ENET_RX_CL) { - cep->stats.rx_frame_errors++; - } - else { - - /* Process the incoming frame. - */ - cep->stats.rx_packets++; - pkt_len = bdp->cbd_datlen; - cep->stats.rx_bytes += pkt_len; - - /* This does 16 byte alignment, much more than we need. - * The packet length includes FCS, but we don't want to - * include that when passing upstream as it messes up - * bridging applications. - */ - skb = dev_alloc_skb(pkt_len-4); - - if (skb == NULL) { - printk("%s: Memory squeeze, dropping packet.\n", dev->name); - cep->stats.rx_dropped++; - } - else { - skb_put(skb,pkt_len-4); /* Make room */ - skb_copy_to_linear_data(skb, - (unsigned char *)__va(bdp->cbd_bufaddr), - pkt_len-4); - skb->protocol=eth_type_trans(skb,dev); - netif_rx(skb); - } - } - - /* Clear the status flags for this buffer. - */ - bdp->cbd_sc &= ~BD_ENET_RX_STATS; - - /* Mark the buffer empty. - */ - bdp->cbd_sc |= BD_ENET_RX_EMPTY; - - /* Update BD pointer to next entry. - */ - if (bdp->cbd_sc & BD_ENET_RX_WRAP) - bdp = cep->rx_bd_base; - else - bdp++; - - } - cep->cur_rx = (cbd_t *)bdp; - - return 0; -} - -static int -scc_enet_close(struct net_device *dev) -{ - /* Don't know what to do yet. - */ - netif_stop_queue(dev); - - return 0; -} - -static struct net_device_stats *scc_enet_get_stats(struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - - return &cep->stats; -} - -/* Set or clear the multicast filter for this adaptor. - * Skeleton taken from sunlance driver. - * The CPM Ethernet implementation allows Multicast as well as individual - * MAC address filtering. Some of the drivers check to make sure it is - * a group multicast address, and discard those that are not. I guess I - * will do the same for now, but just remove the test if you want - * individual filtering as well (do the upper net layers want or support - * this kind of feature?). - */ - -static void set_multicast_list(struct net_device *dev) -{ - struct scc_enet_private *cep; - struct dev_mc_list *dmi; - u_char *mcptr, *tdptr; - volatile scc_enet_t *ep; - int i, j; - cep = (struct scc_enet_private *)dev->priv; - - /* Get pointer to SCC area in parameter RAM. - */ - ep = (scc_enet_t *)dev->base_addr; - - if (dev->flags&IFF_PROMISC) { - - /* Log any net taps. */ - printk("%s: Promiscuous mode enabled.\n", dev->name); - cep->sccp->scc_psmr |= SCC_PSMR_PRO; - } else { - - cep->sccp->scc_psmr &= ~SCC_PSMR_PRO; - - if (dev->flags & IFF_ALLMULTI) { - /* Catch all multicast addresses, so set the - * filter to all 1's. - */ - ep->sen_gaddr1 = 0xffff; - ep->sen_gaddr2 = 0xffff; - ep->sen_gaddr3 = 0xffff; - ep->sen_gaddr4 = 0xffff; - } - else { - /* Clear filter and add the addresses in the list. - */ - ep->sen_gaddr1 = 0; - ep->sen_gaddr2 = 0; - ep->sen_gaddr3 = 0; - ep->sen_gaddr4 = 0; - - dmi = dev->mc_list; - - for (i=0; imc_count; i++) { - - /* Only support group multicast for now. - */ - if (!(dmi->dmi_addr[0] & 1)) - continue; - - /* The address in dmi_addr is LSB first, - * and taddr is MSB first. We have to - * copy bytes MSB first from dmi_addr. - */ - mcptr = (u_char *)dmi->dmi_addr + 5; - tdptr = (u_char *)&ep->sen_taddrh; - for (j=0; j<6; j++) - *tdptr++ = *mcptr--; - - /* Ask CPM to run CRC and set bit in - * filter mask. - */ - cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE, - CPM_ENET_BLOCK, 0, - CPM_CR_SET_GADDR) | CPM_CR_FLG; - /* this delay is necessary here -- Cort */ - udelay(10); - while (cpmp->cp_cpcr & CPM_CR_FLG); - } - } - } -} - -/* Initialize the CPM Ethernet on SCC. - */ -static int __init scc_enet_init(void) -{ - struct net_device *dev; - struct scc_enet_private *cep; - int i, j, err; - uint dp_offset; - unsigned char *eap; - unsigned long mem_addr; - bd_t *bd; - volatile cbd_t *bdp; - volatile cpm_cpm2_t *cp; - volatile scc_t *sccp; - volatile scc_enet_t *ep; - volatile cpm2_map_t *immap; - volatile iop_cpm2_t *io; - - cp = cpmp; /* Get pointer to Communication Processor */ - - immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */ - io = &immap->im_ioport; - - bd = (bd_t *)__res; - - /* Create an Ethernet device instance. - */ - dev = alloc_etherdev(sizeof(*cep)); - if (!dev) - return -ENOMEM; - - cep = dev->priv; - spin_lock_init(&cep->lock); - - /* Get pointer to SCC area in parameter RAM. - */ - ep = (scc_enet_t *)(&immap->im_dprambase[PROFF_ENET]); - - /* And another to the SCC register area. - */ - sccp = (volatile scc_t *)(&immap->im_scc[SCC_ENET]); - cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */ - - /* Disable receive and transmit in case someone left it running. - */ - sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - /* Configure port C and D pins for SCC Ethernet. This - * won't work for all SCC possibilities....it will be - * board/port specific. - */ - io->iop_pparc |= - (PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK); - io->iop_pdirc &= - ~(PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK); - io->iop_psorc &= - ~(PC_ENET_RENA | PC_ENET_TXCLK | PC_ENET_RXCLK); - io->iop_psorc |= PC_ENET_CLSN; - - io->iop_ppard |= (PD_ENET_RXD | PD_ENET_TXD | PD_ENET_TENA); - io->iop_pdird |= (PD_ENET_TXD | PD_ENET_TENA); - io->iop_pdird &= ~PD_ENET_RXD; - io->iop_psord |= PD_ENET_TXD; - io->iop_psord &= ~(PD_ENET_RXD | PD_ENET_TENA); - - /* Configure Serial Interface clock routing. - * First, clear all SCC bits to zero, then set the ones we want. - */ - immap->im_cpmux.cmx_scr &= ~CMX_CLK_MASK; - immap->im_cpmux.cmx_scr |= CMX_CLK_ROUTE; - - /* Allocate space for the buffer descriptors in the DP ram. - * These are relative offsets in the DP ram address space. - * Initialize base addresses for the buffer descriptors. - */ - dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8); - ep->sen_genscc.scc_rbase = dp_offset; - cep->rx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset); - - dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8); - ep->sen_genscc.scc_tbase = dp_offset; - cep->tx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset); - - cep->dirty_tx = cep->cur_tx = cep->tx_bd_base; - cep->cur_rx = cep->rx_bd_base; - - ep->sen_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB; - ep->sen_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB; - - /* Set maximum bytes per receive buffer. - * This appears to be an Ethernet frame size, not the buffer - * fragment size. It must be a multiple of four. - */ - ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE; - - /* Set CRC preset and mask. - */ - ep->sen_cpres = 0xffffffff; - ep->sen_cmask = 0xdebb20e3; - - ep->sen_crcec = 0; /* CRC Error counter */ - ep->sen_alec = 0; /* alignment error counter */ - ep->sen_disfc = 0; /* discard frame counter */ - - ep->sen_pads = 0x8888; /* Tx short frame pad character */ - ep->sen_retlim = 15; /* Retry limit threshold */ - - ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */ - ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */ - - ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */ - ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */ - - /* Clear hash tables. - */ - ep->sen_gaddr1 = 0; - ep->sen_gaddr2 = 0; - ep->sen_gaddr3 = 0; - ep->sen_gaddr4 = 0; - ep->sen_iaddr1 = 0; - ep->sen_iaddr2 = 0; - ep->sen_iaddr3 = 0; - ep->sen_iaddr4 = 0; - - /* Set Ethernet station address. - * - * This is supplied in the board information structure, so we - * copy that into the controller. - */ - eap = (unsigned char *)&(ep->sen_paddrh); - for (i=5; i>=0; i--) - *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i]; - - ep->sen_pper = 0; /* 'cause the book says so */ - ep->sen_taddrl = 0; /* temp address (LSB) */ - ep->sen_taddrm = 0; - ep->sen_taddrh = 0; /* temp address (MSB) */ - - /* Now allocate the host memory pages and initialize the - * buffer descriptors. - */ - bdp = cep->tx_bd_base; - for (i=0; icbd_sc = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - bdp = cep->rx_bd_base; - for (i=0; icbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR; - bdp->cbd_bufaddr = __pa(mem_addr); - mem_addr += CPM_ENET_RX_FRSIZE; - bdp++; - } - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* Let's re-initialize the channel now. We have to do it later - * than the manual describes because we have just now finished - * the BD initialization. - */ - cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0, - CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - cep->skb_cur = cep->skb_dirty = 0; - - sccp->scc_scce = 0xffff; /* Clear any pending events */ - - /* Enable interrupts for transmit error, complete frame - * received, and any transmit buffer we have also set the - * interrupt flag. - */ - sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); - - /* Install our interrupt handler. - */ - request_irq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev); - /* BUG: no check for failure */ - - /* Set GSMR_H to enable all normal operating modes. - * Set GSMR_L to enable Ethernet to MC68160. - */ - sccp->scc_gsmrh = 0; - sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET); - - /* Set sync/delimiters. - */ - sccp->scc_dsr = 0xd555; - - /* Set processing mode. Use Ethernet CRC, catch broadcast, and - * start frame search 22 bit times after RENA. - */ - sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22); - - /* It is now OK to enable the Ethernet transmitter. - * Unfortunately, there are board implementation differences here. - */ - io->iop_pparc &= ~(PC_EST8260_ENET_LOOPBACK | - PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD); - io->iop_psorc &= ~(PC_EST8260_ENET_LOOPBACK | - PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD); - io->iop_pdirc |= (PC_EST8260_ENET_LOOPBACK | - PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD); - io->iop_pdatc &= ~(PC_EST8260_ENET_LOOPBACK | PC_EST8260_ENET_SQE); - io->iop_pdatc |= PC_EST8260_ENET_NOTFD; - - dev->base_addr = (unsigned long)ep; - - /* The CPM Ethernet specific entries in the device structure. */ - dev->open = scc_enet_open; - dev->hard_start_xmit = scc_enet_start_xmit; - dev->tx_timeout = scc_enet_timeout; - dev->watchdog_timeo = TX_TIMEOUT; - dev->stop = scc_enet_close; - dev->get_stats = scc_enet_get_stats; - dev->set_multicast_list = set_multicast_list; - - /* And last, enable the transmit and receive processing. - */ - sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - err = register_netdev(dev); - if (err) { - free_netdev(dev); - return err; - } - - printk("%s: SCC ENET Version 0.1, ", dev->name); - for (i=0; i<5; i++) - printk("%02x:", dev->dev_addr[i]); - printk("%02x\n", dev->dev_addr[5]); - - return 0; -} - -module_init(scc_enet_init); diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c deleted file mode 100644 index d38b57e24ceefc94b29d9a82cde473dac6dd86f2..0000000000000000000000000000000000000000 --- a/arch/ppc/8260_io/fcc_enet.c +++ /dev/null @@ -1,2379 +0,0 @@ -/* - * Fast Ethernet Controller (FCC) driver for Motorola MPC8260. - * Copyright (c) 2000 MontaVista Software, Inc. Dan Malek (dmalek@jlc.net) - * - * This version of the driver is a combination of the 8xx fec and - * 8260 SCC Ethernet drivers. This version has some additional - * configuration options, which should probably be moved out of - * here. This driver currently works for the EST SBC8260, - * SBS Diablo/BCM, Embedded Planet RPX6, TQM8260, and others. - * - * Right now, I am very watseful with the buffers. I allocate memory - * pages and then divide them into 2K frame buffers. This way I know I - * have buffers large enough to hold one frame within one buffer descriptor. - * Once I get this working, I will use 64 or 128 byte CPM buffers, which - * will be much more memory efficient and will easily handle lots of - * small packets. Since this is a cache coherent processor and CPM, - * I could also preallocate SKB's and use them directly on the interface. - * - * 2004-12 Leo Li (leoli@freescale.com) - * - Rework the FCC clock configuration part, make it easier to configure. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -/* We can't use the PHY interrupt if we aren't using MDIO. */ -#if !defined(CONFIG_USE_MDIO) -#undef PHY_INTERRUPT -#endif - -/* If we have a PHY interrupt, we will advertise both full-duplex and half- - * duplex capabilities. If we don't have a PHY interrupt, then we will only - * advertise half-duplex capabilities. - */ -#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | ADVERTISE_10HALF | \ - ADVERTISE_CSMA) -#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ - MII_ADVERTISE_HALF) -#ifdef PHY_INTERRUPT -#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_ALL -#else -#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_HALF -#endif -#include - -/* The transmitter timeout - */ -#define TX_TIMEOUT (2*HZ) - -#ifdef CONFIG_USE_MDIO -/* Forward declarations of some structures to support different PHYs */ - -typedef struct { - uint mii_data; - void (*funct)(uint mii_reg, struct net_device *dev); -} phy_cmd_t; - -typedef struct { - uint id; - char *name; - - const phy_cmd_t *config; - const phy_cmd_t *startup; - const phy_cmd_t *ack_int; - const phy_cmd_t *shutdown; -} phy_info_t; - -/* values for phy_status */ - -#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ -#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ -#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ -#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ -#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ -#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ -#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ - -#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ -#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ -#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ -#define PHY_STAT_SPMASK 0xf000 /* mask for speed */ -#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ -#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ -#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ -#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ -#endif /* CONFIG_USE_MDIO */ - -/* The number of Tx and Rx buffers. These are allocated from the page - * pool. The code may assume these are power of two, so it is best - * to keep them that size. - * We don't need to allocate pages for the transmitter. We just use - * the skbuffer directly. - */ -#define FCC_ENET_RX_PAGES 16 -#define FCC_ENET_RX_FRSIZE 2048 -#define FCC_ENET_RX_FRPPG (PAGE_SIZE / FCC_ENET_RX_FRSIZE) -#define RX_RING_SIZE (FCC_ENET_RX_FRPPG * FCC_ENET_RX_PAGES) -#define TX_RING_SIZE 16 /* Must be power of two */ -#define TX_RING_MOD_MASK 15 /* for this to work */ - -/* The FCC stores dest/src/type, data, and checksum for receive packets. - * size includes support for VLAN - */ -#define PKT_MAXBUF_SIZE 1522 -#define PKT_MINBUF_SIZE 64 - -/* Maximum input DMA size. Must be a should(?) be a multiple of 4. - * size includes support for VLAN - */ -#define PKT_MAXDMA_SIZE 1524 - -/* Maximum input buffer size. Must be a multiple of 32. -*/ -#define PKT_MAXBLR_SIZE 1536 - -static int fcc_enet_open(struct net_device *dev); -static int fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); -static int fcc_enet_rx(struct net_device *dev); -static irqreturn_t fcc_enet_interrupt(int irq, void *dev_id); -static int fcc_enet_close(struct net_device *dev); -static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev); -/* static void set_multicast_list(struct net_device *dev); */ -static void fcc_restart(struct net_device *dev, int duplex); -static void fcc_stop(struct net_device *dev); -static int fcc_enet_set_mac_address(struct net_device *dev, void *addr); - -/* These will be configurable for the FCC choice. - * Multiple ports can be configured. There is little choice among the - * I/O pins to the PHY, except the clocks. We will need some board - * dependent clock selection. - * Why in the hell did I put these inside #ifdef's? I dunno, maybe to - * help show what pins are used for each device. - */ - -/* Since the CLK setting changes greatly from board to board, I changed - * it to a easy way. You just need to specify which CLK number to use. - * Note that only limited choices can be make on each port. - */ - -/* FCC1 Clock Source Configuration. There are board specific. - Can only choose from CLK9-12 */ -#ifdef CONFIG_SBC82xx -#define F1_RXCLK 9 -#define F1_TXCLK 10 -#else -#define F1_RXCLK 12 -#define F1_TXCLK 11 -#endif - -/* FCC2 Clock Source Configuration. There are board specific. - Can only choose from CLK13-16 */ -#define F2_RXCLK 13 -#define F2_TXCLK 14 - -/* FCC3 Clock Source Configuration. There are board specific. - Can only choose from CLK13-16 */ -#define F3_RXCLK 15 -#define F3_TXCLK 16 - -/* Automatically generates register configurations */ -#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ - -#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ -#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ -#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ -#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ -#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ -#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ - -#define PC_F1RXCLK PC_CLK(F1_RXCLK) -#define PC_F1TXCLK PC_CLK(F1_TXCLK) -#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) -#define CMX1_CLK_MASK ((uint)0xff000000) - -#define PC_F2RXCLK PC_CLK(F2_RXCLK) -#define PC_F2TXCLK PC_CLK(F2_TXCLK) -#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) -#define CMX2_CLK_MASK ((uint)0x00ff0000) - -#define PC_F3RXCLK PC_CLK(F3_RXCLK) -#define PC_F3TXCLK PC_CLK(F3_TXCLK) -#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) -#define CMX3_CLK_MASK ((uint)0x0000ff00) - - -/* I/O Pin assignment for FCC1. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PA1_COL ((uint)0x00000001) -#define PA1_CRS ((uint)0x00000002) -#define PA1_TXER ((uint)0x00000004) -#define PA1_TXEN ((uint)0x00000008) -#define PA1_RXDV ((uint)0x00000010) -#define PA1_RXER ((uint)0x00000020) -#define PA1_TXDAT ((uint)0x00003c00) -#define PA1_RXDAT ((uint)0x0003c000) -#define PA1_PSORA_BOUT (PA1_RXDAT | PA1_TXDAT) -#define PA1_PSORA_BIN (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \ - PA1_RXDV | PA1_RXER) -#define PA1_DIRA_BOUT (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV) -#define PA1_DIRA_BIN (PA1_TXDAT | PA1_TXEN | PA1_TXER) - - -/* I/O Pin assignment for FCC2. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PB2_TXER ((uint)0x00000001) -#define PB2_RXDV ((uint)0x00000002) -#define PB2_TXEN ((uint)0x00000004) -#define PB2_RXER ((uint)0x00000008) -#define PB2_COL ((uint)0x00000010) -#define PB2_CRS ((uint)0x00000020) -#define PB2_TXDAT ((uint)0x000003c0) -#define PB2_RXDAT ((uint)0x00003c00) -#define PB2_PSORB_BOUT (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \ - PB2_RXER | PB2_RXDV | PB2_TXER) -#define PB2_PSORB_BIN (PB2_TXEN) -#define PB2_DIRB_BOUT (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV) -#define PB2_DIRB_BIN (PB2_TXDAT | PB2_TXEN | PB2_TXER) - - -/* I/O Pin assignment for FCC3. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PB3_RXDV ((uint)0x00004000) -#define PB3_RXER ((uint)0x00008000) -#define PB3_TXER ((uint)0x00010000) -#define PB3_TXEN ((uint)0x00020000) -#define PB3_COL ((uint)0x00040000) -#define PB3_CRS ((uint)0x00080000) -#ifndef CONFIG_RPX8260 -#define PB3_TXDAT ((uint)0x0f000000) -#define PC3_TXDAT ((uint)0x00000000) -#else -#define PB3_TXDAT ((uint)0x0f000000) -#define PC3_TXDAT 0 -#endif -#define PB3_RXDAT ((uint)0x00f00000) -#define PB3_PSORB_BOUT (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \ - PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN) -#define PB3_PSORB_BIN (0) -#define PB3_DIRB_BOUT (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV) -#define PB3_DIRB_BIN (PB3_TXDAT | PB3_TXEN | PB3_TXER) - -#define PC3_PSORC_BOUT (PC3_TXDAT) -#define PC3_PSORC_BIN (0) -#define PC3_DIRC_BOUT (0) -#define PC3_DIRC_BIN (PC3_TXDAT) - - -/* MII status/control serial interface. -*/ -#if defined(CONFIG_RPX8260) -/* The EP8260 doesn't use Port C for MDIO */ -#define PC_MDIO ((uint)0x00000000) -#define PC_MDCK ((uint)0x00000000) -#elif defined(CONFIG_TQM8260) -/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */ -#define PC_MDIO ((uint)0x00000002) -#define PC_MDCK ((uint)0x00000001) -#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260) -#define PC_MDIO ((uint)0x00400000) -#define PC_MDCK ((uint)0x00200000) -#else -#define PC_MDIO ((uint)0x00000004) -#define PC_MDCK ((uint)0x00000020) -#endif - -#if defined(CONFIG_USE_MDIO) && (!defined(PC_MDIO) || !defined(PC_MDCK)) -#error "Must define PC_MDIO and PC_MDCK if using MDIO" -#endif - -/* PHY addresses */ -/* default to dynamic config of phy addresses */ -#define FCC1_PHY_ADDR 0 -#ifdef CONFIG_PQ2FADS -#define FCC2_PHY_ADDR 0 -#else -#define FCC2_PHY_ADDR 2 -#endif -#define FCC3_PHY_ADDR 3 - -/* A table of information for supporting FCCs. This does two things. - * First, we know how many FCCs we have and they are always externally - * numbered from zero. Second, it holds control register and I/O - * information that could be different among board designs. - */ -typedef struct fcc_info { - uint fc_fccnum; - uint fc_phyaddr; - uint fc_cpmblock; - uint fc_cpmpage; - uint fc_proff; - uint fc_interrupt; - uint fc_trxclocks; - uint fc_clockroute; - uint fc_clockmask; - uint fc_mdio; - uint fc_mdck; -} fcc_info_t; - -static fcc_info_t fcc_ports[] = { -#ifdef CONFIG_FCC1_ENET - { 0, FCC1_PHY_ADDR, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1, - (PC_F1RXCLK | PC_F1TXCLK), CMX1_CLK_ROUTE, CMX1_CLK_MASK, - PC_MDIO, PC_MDCK }, -#endif -#ifdef CONFIG_FCC2_ENET - { 1, FCC2_PHY_ADDR, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2, - (PC_F2RXCLK | PC_F2TXCLK), CMX2_CLK_ROUTE, CMX2_CLK_MASK, - PC_MDIO, PC_MDCK }, -#endif -#ifdef CONFIG_FCC3_ENET - { 2, FCC3_PHY_ADDR, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3, - (PC_F3RXCLK | PC_F3TXCLK), CMX3_CLK_ROUTE, CMX3_CLK_MASK, - PC_MDIO, PC_MDCK }, -#endif -}; - -/* The FCC buffer descriptors track the ring buffers. The rx_bd_base and - * tx_bd_base always point to the base of the buffer descriptors. The - * cur_rx and cur_tx point to the currently available buffer. - * The dirty_tx tracks the current buffer that is being sent by the - * controller. The cur_tx and dirty_tx are equal under both completely - * empty and completely full conditions. The empty/ready indicator in - * the buffer descriptor determines the actual condition. - */ -struct fcc_enet_private { - /* The saved address of a sent-in-place packet/buffer, for skfree(). */ - struct sk_buff* tx_skbuff[TX_RING_SIZE]; - ushort skb_cur; - ushort skb_dirty; - - /* CPM dual port RAM relative addresses. - */ - cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ - cbd_t *tx_bd_base; - cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ - cbd_t *dirty_tx; /* The ring entries to be free()ed. */ - volatile fcc_t *fccp; - volatile fcc_enet_t *ep; - struct net_device_stats stats; - uint tx_free; - spinlock_t lock; - -#ifdef CONFIG_USE_MDIO - uint phy_id; - uint phy_id_done; - uint phy_status; - phy_info_t *phy; - struct work_struct phy_relink; - struct work_struct phy_display_config; - struct net_device *dev; - - uint sequence_done; - - uint phy_addr; -#endif /* CONFIG_USE_MDIO */ - - int link; - int old_link; - int full_duplex; - - fcc_info_t *fip; -}; - -static void init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep, - volatile cpm2_map_t *immap); -static void init_fcc_startup(fcc_info_t *fip, struct net_device *dev); -static void init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io, - volatile cpm2_map_t *immap); -static void init_fcc_param(fcc_info_t *fip, struct net_device *dev, - volatile cpm2_map_t *immap); - -#ifdef CONFIG_USE_MDIO -static int mii_queue(struct net_device *dev, int request, void (*func)(uint, struct net_device *)); -static uint mii_send_receive(fcc_info_t *fip, uint cmd); -static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c); - -/* Make MII read/write commands for the FCC. -*/ -#define mk_mii_read(REG) (0x60020000 | (((REG) & 0x1f) << 18)) -#define mk_mii_write(REG, VAL) (0x50020000 | (((REG) & 0x1f) << 18) | \ - ((VAL) & 0xffff)) -#define mk_mii_end 0 -#endif /* CONFIG_USE_MDIO */ - - -static int -fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv; - volatile cbd_t *bdp; - - /* Fill in a Tx ring entry */ - bdp = cep->cur_tx; - -#ifndef final_version - if (!cep->tx_free || (bdp->cbd_sc & BD_ENET_TX_READY)) { - /* Ooops. All transmit buffers are full. Bail out. - * This should not happen, since the tx queue should be stopped. - */ - printk("%s: tx queue full!.\n", dev->name); - return 1; - } -#endif - - /* Clear all of the status flags. */ - bdp->cbd_sc &= ~BD_ENET_TX_STATS; - - /* If the frame is short, tell CPM to pad it. */ - if (skb->len <= ETH_ZLEN) - bdp->cbd_sc |= BD_ENET_TX_PAD; - else - bdp->cbd_sc &= ~BD_ENET_TX_PAD; - - /* Set buffer length and buffer pointer. */ - bdp->cbd_datlen = skb->len; - bdp->cbd_bufaddr = __pa(skb->data); - - spin_lock_irq(&cep->lock); - - /* Save skb pointer. */ - cep->tx_skbuff[cep->skb_cur] = skb; - - cep->stats.tx_bytes += skb->len; - cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK; - - /* Send it on its way. Tell CPM its ready, interrupt when done, - * its the last BD of the frame, and to put the CRC on the end. - */ - bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC); - -#if 0 - /* Errata says don't do this. */ - cep->fccp->fcc_ftodr = 0x8000; -#endif - dev->trans_start = jiffies; - - /* If this was the last BD in the ring, start at the beginning again. */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - if (!--cep->tx_free) - netif_stop_queue(dev); - - cep->cur_tx = (cbd_t *)bdp; - - spin_unlock_irq(&cep->lock); - - return 0; -} - - -static void -fcc_enet_timeout(struct net_device *dev) -{ - struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv; - - printk("%s: transmit timed out.\n", dev->name); - cep->stats.tx_errors++; -#ifndef final_version - { - int i; - cbd_t *bdp; - printk(" Ring data dump: cur_tx %p tx_free %d cur_rx %p.\n", - cep->cur_tx, cep->tx_free, - cep->cur_rx); - bdp = cep->tx_bd_base; - printk(" Tx @base %p :\n", bdp); - for (i = 0 ; i < TX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - bdp = cep->rx_bd_base; - printk(" Rx @base %p :\n", bdp); - for (i = 0 ; i < RX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - } -#endif - if (cep->tx_free) - netif_wake_queue(dev); -} - -/* The interrupt handler. */ -static irqreturn_t -fcc_enet_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - volatile struct fcc_enet_private *cep; - volatile cbd_t *bdp; - ushort int_events; - int must_restart; - - cep = dev->priv; - - /* Get the interrupt events that caused us to be here. - */ - int_events = cep->fccp->fcc_fcce; - cep->fccp->fcc_fcce = (int_events & cep->fccp->fcc_fccm); - must_restart = 0; - -#ifdef PHY_INTERRUPT - /* We have to be careful here to make sure that we aren't - * interrupted by a PHY interrupt. - */ - disable_irq_nosync(PHY_INTERRUPT); -#endif - - /* Handle receive event in its own function. - */ - if (int_events & FCC_ENET_RXF) - fcc_enet_rx(dev_id); - - /* Check for a transmit error. The manual is a little unclear - * about this, so the debug code until I get it figured out. It - * appears that if TXE is set, then TXB is not set. However, - * if carrier sense is lost during frame transmission, the TXE - * bit is set, "and continues the buffer transmission normally." - * I don't know if "normally" implies TXB is set when the buffer - * descriptor is closed.....trial and error :-). - */ - - /* Transmit OK, or non-fatal error. Update the buffer descriptors. - */ - if (int_events & (FCC_ENET_TXE | FCC_ENET_TXB)) { - spin_lock(&cep->lock); - bdp = cep->dirty_tx; - while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) { - if (cep->tx_free == TX_RING_SIZE) - break; - - if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */ - cep->stats.tx_heartbeat_errors++; - if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */ - cep->stats.tx_window_errors++; - if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */ - cep->stats.tx_aborted_errors++; - if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */ - cep->stats.tx_fifo_errors++; - if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */ - cep->stats.tx_carrier_errors++; - - - /* No heartbeat or Lost carrier are not really bad errors. - * The others require a restart transmit command. - */ - if (bdp->cbd_sc & - (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) { - must_restart = 1; - cep->stats.tx_errors++; - } - - cep->stats.tx_packets++; - - /* Deferred means some collisions occurred during transmit, - * but we eventually sent the packet OK. - */ - if (bdp->cbd_sc & BD_ENET_TX_DEF) - cep->stats.collisions++; - - /* Free the sk buffer associated with this last transmit. */ - dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]); - cep->tx_skbuff[cep->skb_dirty] = NULL; - cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK; - - /* Update pointer to next buffer descriptor to be transmitted. */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - /* I don't know if we can be held off from processing these - * interrupts for more than one frame time. I really hope - * not. In such a case, we would now want to check the - * currently available BD (cur_tx) and determine if any - * buffers between the dirty_tx and cur_tx have also been - * sent. We would want to process anything in between that - * does not have BD_ENET_TX_READY set. - */ - - /* Since we have freed up a buffer, the ring is no longer - * full. - */ - if (!cep->tx_free++) { - if (netif_queue_stopped(dev)) { - netif_wake_queue(dev); - } - } - - cep->dirty_tx = (cbd_t *)bdp; - } - - if (must_restart) { - volatile cpm_cpm2_t *cp; - - /* Some transmit errors cause the transmitter to shut - * down. We now issue a restart transmit. Since the - * errors close the BD and update the pointers, the restart - * _should_ pick up without having to reset any of our - * pointers either. Also, To workaround 8260 device erratum - * CPM37, we must disable and then re-enable the transmitter - * following a Late Collision, Underrun, or Retry Limit error. - */ - cep->fccp->fcc_gfmr &= ~FCC_GFMR_ENT; - udelay(10); /* wait a few microseconds just on principle */ - cep->fccp->fcc_gfmr |= FCC_GFMR_ENT; - - cp = cpmp; - cp->cp_cpcr = - mk_cr_cmd(cep->fip->fc_cpmpage, cep->fip->fc_cpmblock, - 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - } - spin_unlock(&cep->lock); - } - - /* Check for receive busy, i.e. packets coming but no place to - * put them. - */ - if (int_events & FCC_ENET_BSY) { - cep->fccp->fcc_fcce = FCC_ENET_BSY; - cep->stats.rx_dropped++; - } - -#ifdef PHY_INTERRUPT - enable_irq(PHY_INTERRUPT); -#endif - return IRQ_HANDLED; -} - -/* During a receive, the cur_rx points to the current incoming buffer. - * When we update through the ring, if the next incoming buffer has - * not been given to the system, we just set the empty indicator, - * effectively tossing the packet. - */ -static int -fcc_enet_rx(struct net_device *dev) -{ - struct fcc_enet_private *cep; - volatile cbd_t *bdp; - struct sk_buff *skb; - ushort pkt_len; - - cep = dev->priv; - - /* First, grab all of the stats for the incoming packet. - * These get messed up if we get called due to a busy condition. - */ - bdp = cep->cur_rx; - -for (;;) { - if (bdp->cbd_sc & BD_ENET_RX_EMPTY) - break; - -#ifndef final_version - /* Since we have allocated space to hold a complete frame, both - * the first and last indicators should be set. - */ - if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) != - (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) - printk("CPM ENET: rcv is not first+last\n"); -#endif - - /* Frame too long or too short. */ - if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) - cep->stats.rx_length_errors++; - if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */ - cep->stats.rx_frame_errors++; - if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */ - cep->stats.rx_crc_errors++; - if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */ - cep->stats.rx_crc_errors++; - if (bdp->cbd_sc & BD_ENET_RX_CL) /* Late Collision */ - cep->stats.rx_frame_errors++; - - if (!(bdp->cbd_sc & - (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | BD_ENET_RX_CR - | BD_ENET_RX_OV | BD_ENET_RX_CL))) - { - /* Process the incoming frame. */ - cep->stats.rx_packets++; - - /* Remove the FCS from the packet length. */ - pkt_len = bdp->cbd_datlen - 4; - cep->stats.rx_bytes += pkt_len; - - /* This does 16 byte alignment, much more than we need. */ - skb = dev_alloc_skb(pkt_len); - - if (skb == NULL) { - printk("%s: Memory squeeze, dropping packet.\n", dev->name); - cep->stats.rx_dropped++; - } - else { - skb_put(skb,pkt_len); /* Make room */ - skb_copy_to_linear_data(skb, - (unsigned char *)__va(bdp->cbd_bufaddr), - pkt_len); - skb->protocol=eth_type_trans(skb,dev); - netif_rx(skb); - } - } - - /* Clear the status flags for this buffer. */ - bdp->cbd_sc &= ~BD_ENET_RX_STATS; - - /* Mark the buffer empty. */ - bdp->cbd_sc |= BD_ENET_RX_EMPTY; - - /* Update BD pointer to next entry. */ - if (bdp->cbd_sc & BD_ENET_RX_WRAP) - bdp = cep->rx_bd_base; - else - bdp++; - - } - cep->cur_rx = (cbd_t *)bdp; - - return 0; -} - -static int -fcc_enet_close(struct net_device *dev) -{ -#ifdef CONFIG_USE_MDIO - struct fcc_enet_private *fep = dev->priv; -#endif - - netif_stop_queue(dev); - fcc_stop(dev); -#ifdef CONFIG_USE_MDIO - if (fep->phy) - mii_do_cmd(dev, fep->phy->shutdown); -#endif - - return 0; -} - -static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev) -{ - struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv; - - return &cep->stats; -} - -#ifdef CONFIG_USE_MDIO - -/* NOTE: Most of the following comes from the FEC driver for 860. The - * overall structure of MII code has been retained (as it's proved stable - * and well-tested), but actual transfer requests are processed "at once" - * instead of being queued (there's no interrupt-driven MII transfer - * mechanism, one has to toggle the data/clock bits manually). - */ -static int -mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *)) -{ - struct fcc_enet_private *fep; - int retval, tmp; - - /* Add PHY address to register command. */ - fep = dev->priv; - regval |= fep->phy_addr << 23; - - retval = 0; - - tmp = mii_send_receive(fep->fip, regval); - if (func) - func(tmp, dev); - - return retval; -} - -static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c) -{ - int k; - - if(!c) - return; - - for(k = 0; (c+k)->mii_data != mk_mii_end; k++) - mii_queue(dev, (c+k)->mii_data, (c+k)->funct); -} - -static void mii_parse_sr(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC); - - if (mii_reg & BMSR_LSTATUS) - s |= PHY_STAT_LINK; - if (mii_reg & BMSR_RFAULT) - s |= PHY_STAT_FAULT; - if (mii_reg & BMSR_ANEGCOMPLETE) - s |= PHY_STAT_ANC; - - fep->phy_status = s; -} - -static void mii_parse_cr(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP); - - if (mii_reg & BMCR_ANENABLE) - s |= PHY_CONF_ANE; - if (mii_reg & BMCR_LOOPBACK) - s |= PHY_CONF_LOOP; - - fep->phy_status = s; -} - -static void mii_parse_anar(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_CONF_SPMASK); - - if (mii_reg & ADVERTISE_10HALF) - s |= PHY_CONF_10HDX; - if (mii_reg & ADVERTISE_10FULL) - s |= PHY_CONF_10FDX; - if (mii_reg & ADVERTISE_100HALF) - s |= PHY_CONF_100HDX; - if (mii_reg & ADVERTISE_100FULL) - s |= PHY_CONF_100FDX; - - fep->phy_status = s; -} - -/* ------------------------------------------------------------------------- */ -/* Generic PHY support. Should work for all PHYs, but does not support link - * change interrupts. - */ -#ifdef CONFIG_FCC_GENERIC_PHY - -static phy_info_t phy_info_generic = { - 0x00000000, /* 0-->match any PHY */ - "GENERIC", - - (const phy_cmd_t []) { /* config */ - /* advertise only half-duplex capabilities */ - { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_HALF), - mii_parse_anar }, - - /* enable auto-negotiation */ - { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup */ - /* restart auto-negotiation */ - { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART), - NULL }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* We don't actually use the ack_int table with a generic - * PHY, but putting a reference to mii_parse_sr here keeps - * us from getting a compiler warning about unused static - * functions in the case where we only compile in generic - * PHY support. - */ - { mk_mii_read(MII_BMSR), mii_parse_sr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown */ - { mk_mii_end, } - }, -}; -#endif /* ifdef CONFIG_FCC_GENERIC_PHY */ - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT970 is used by many boards */ - -#ifdef CONFIG_FCC_LXT970 - -#define MII_LXT970_MIRROR 16 /* Mirror register */ -#define MII_LXT970_IER 17 /* Interrupt Enable Register */ -#define MII_LXT970_ISR 18 /* Interrupt Status Register */ -#define MII_LXT970_CONFIG 19 /* Configuration Register */ -#define MII_LXT970_CSR 20 /* Chip Status Register */ - -static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - - if (mii_reg & 0x0800) { - if (mii_reg & 0x1000) - s |= PHY_STAT_100FDX; - else - s |= PHY_STAT_100HDX; - } else { - if (mii_reg & 0x1000) - s |= PHY_STAT_10FDX; - else - s |= PHY_STAT_10HDX; - } - - fep->phy_status = s; -} - -static phy_info_t phy_info_lxt970 = { - 0x07810000, - "LXT970", - - (const phy_cmd_t []) { /* config */ -#if 0 -// { mk_mii_write(MII_ADVERTISE, 0x0021), NULL }, - - /* Set default operation of 100-TX....for some reason - * some of these bits are set on power up, which is wrong. - */ - { mk_mii_write(MII_LXT970_CONFIG, 0), NULL }, -#endif - { mk_mii_read(MII_BMCR), mii_parse_cr }, - { mk_mii_read(MII_ADVERTISE), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0002), NULL }, - { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* read SR and ISR to acknowledge */ - - { mk_mii_read(MII_BMSR), mii_parse_sr }, - { mk_mii_read(MII_LXT970_ISR), NULL }, - - /* find out the current status */ - - { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FEC_LXT970 */ - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT971 is used on some of my custom boards */ - -#ifdef CONFIG_FCC_LXT971 - -/* register definitions for the 971 */ - -#define MII_LXT971_PCR 16 /* Port Control Register */ -#define MII_LXT971_SR2 17 /* Status Register 2 */ -#define MII_LXT971_IER 18 /* Interrupt Enable Register */ -#define MII_LXT971_ISR 19 /* Interrupt Status Register */ -#define MII_LXT971_LCR 20 /* LED Control Register */ -#define MII_LXT971_TCR 30 /* Transmit Control Register */ - -/* - * I had some nice ideas of running the MDIO faster... - * The 971 should support 8MHz and I tried it, but things acted really - * weird, so 2.5 MHz ought to be enough for anyone... - */ - -static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - - if (mii_reg & 0x4000) { - if (mii_reg & 0x0200) - s |= PHY_STAT_100FDX; - else - s |= PHY_STAT_100HDX; - } else { - if (mii_reg & 0x0200) - s |= PHY_STAT_10FDX; - else - s |= PHY_STAT_10HDX; - } - if (mii_reg & 0x0008) - s |= PHY_STAT_FAULT; - - fep->phy_status = s; -} - -static phy_info_t phy_info_lxt971 = { - 0x0001378e, - "LXT971", - - (const phy_cmd_t []) { /* config */ - /* configure link capabilities to advertise */ - { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_DEFAULT), - mii_parse_anar }, - - /* enable auto-negotiation */ - { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL }, - - /* restart auto-negotiation */ - { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART), - NULL }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* find out the current status */ - { mk_mii_read(MII_BMSR), NULL }, - { mk_mii_read(MII_BMSR), mii_parse_sr }, - { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, - - /* we only need to read ISR to acknowledge */ - { mk_mii_read(MII_LXT971_ISR), NULL }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FCC_LXT971 */ - -/* ------------------------------------------------------------------------- */ -/* The Quality Semiconductor QS6612 is used on the RPX CLLF */ - -#ifdef CONFIG_FCC_QS6612 - -/* register definitions */ - -#define MII_QS6612_MCR 17 /* Mode Control Register */ -#define MII_QS6612_FTR 27 /* Factory Test Register */ -#define MII_QS6612_MCO 28 /* Misc. Control Register */ -#define MII_QS6612_ISR 29 /* Interrupt Source Register */ -#define MII_QS6612_IMR 30 /* Interrupt Mask Register */ -#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ - -static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - - switch((mii_reg >> 2) & 7) { - case 1: s |= PHY_STAT_10HDX; break; - case 2: s |= PHY_STAT_100HDX; break; - case 5: s |= PHY_STAT_10FDX; break; - case 6: s |= PHY_STAT_100FDX; break; - } - - fep->phy_status = s; -} - -static phy_info_t phy_info_qs6612 = { - 0x00181440, - "QS6612", - - (const phy_cmd_t []) { /* config */ -// { mk_mii_write(MII_ADVERTISE, 0x061), NULL }, /* 10 Mbps */ - - /* The PHY powers up isolated on the RPX, - * so send a command to allow operation. - */ - - { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, - - /* parse cr and anar to get some info */ - - { mk_mii_read(MII_BMCR), mii_parse_cr }, - { mk_mii_read(MII_ADVERTISE), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL }, - { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - - /* we need to read ISR, SR and ANER to acknowledge */ - - { mk_mii_read(MII_QS6612_ISR), NULL }, - { mk_mii_read(MII_BMSR), mii_parse_sr }, - { mk_mii_read(MII_EXPANSION), NULL }, - - /* read pcr to get info */ - - { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - - -#endif /* CONFIG_FEC_QS6612 */ - - -/* ------------------------------------------------------------------------- */ -/* The Davicom DM9131 is used on the HYMOD board */ - -#ifdef CONFIG_FCC_DM9131 - -/* register definitions */ - -#define MII_DM9131_ACR 16 /* Aux. Config Register */ -#define MII_DM9131_ACSR 17 /* Aux. Config/Status Register */ -#define MII_DM9131_10TCSR 18 /* 10BaseT Config/Status Reg. */ -#define MII_DM9131_INTR 21 /* Interrupt Register */ -#define MII_DM9131_RECR 22 /* Receive Error Counter Reg. */ -#define MII_DM9131_DISCR 23 /* Disconnect Counter Register */ - -static void mii_parse_dm9131_acsr(uint mii_reg, struct net_device *dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - - switch ((mii_reg >> 12) & 0xf) { - case 1: s |= PHY_STAT_10HDX; break; - case 2: s |= PHY_STAT_10FDX; break; - case 4: s |= PHY_STAT_100HDX; break; - case 8: s |= PHY_STAT_100FDX; break; - } - - fep->phy_status = s; -} - -static phy_info_t phy_info_dm9131 = { - 0x00181b80, - "DM9131", - - (const phy_cmd_t []) { /* config */ - /* parse cr and anar to get some info */ - { mk_mii_read(MII_BMCR), mii_parse_cr }, - { mk_mii_read(MII_ADVERTISE), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_DM9131_INTR, 0x0002), NULL }, - { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - - /* we need to read INTR, SR and ANER to acknowledge */ - - { mk_mii_read(MII_DM9131_INTR), NULL }, - { mk_mii_read(MII_BMSR), mii_parse_sr }, - { mk_mii_read(MII_EXPANSION), NULL }, - - /* read acsr to get info */ - - { mk_mii_read(MII_DM9131_ACSR), mii_parse_dm9131_acsr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_DM9131_INTR, 0x0f00), NULL }, - { mk_mii_end, } - }, -}; - - -#endif /* CONFIG_FEC_DM9131 */ -#ifdef CONFIG_FCC_DM9161 -/* ------------------------------------------------------------------------- */ -/* DM9161 Control register values */ -#define MIIM_DM9161_CR_STOP 0x0400 -#define MIIM_DM9161_CR_RSTAN 0x1200 - -#define MIIM_DM9161_SCR 0x10 -#define MIIM_DM9161_SCR_INIT 0x0610 - -/* DM9161 Specified Configuration and Status Register */ -#define MIIM_DM9161_SCSR 0x11 -#define MIIM_DM9161_SCSR_100F 0x8000 -#define MIIM_DM9161_SCSR_100H 0x4000 -#define MIIM_DM9161_SCSR_10F 0x2000 -#define MIIM_DM9161_SCSR_10H 0x1000 -/* DM9161 10BT register */ -#define MIIM_DM9161_10BTCSR 0x12 -#define MIIM_DM9161_10BTCSR_INIT 0x7800 -/* DM9161 Interrupt Register */ -#define MIIM_DM9161_INTR 0x15 -#define MIIM_DM9161_INTR_PEND 0x8000 -#define MIIM_DM9161_INTR_DPLX_MASK 0x0800 -#define MIIM_DM9161_INTR_SPD_MASK 0x0400 -#define MIIM_DM9161_INTR_LINK_MASK 0x0200 -#define MIIM_DM9161_INTR_MASK 0x0100 -#define MIIM_DM9161_INTR_DPLX_CHANGE 0x0010 -#define MIIM_DM9161_INTR_SPD_CHANGE 0x0008 -#define MIIM_DM9161_INTR_LINK_CHANGE 0x0004 -#define MIIM_DM9161_INTR_INIT 0x0000 -#define MIIM_DM9161_INTR_STOP \ -(MIIM_DM9161_INTR_DPLX_MASK | MIIM_DM9161_INTR_SPD_MASK \ - | MIIM_DM9161_INTR_LINK_MASK | MIIM_DM9161_INTR_MASK) - -static void mii_parse_dm9161_sr(uint mii_reg, struct net_device * dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint regstat, timeout=0xffff; - - while(!(mii_reg & 0x0020) && timeout--) - { - regstat=mk_mii_read(MII_BMSR); - regstat |= fep->phy_addr <<23; - mii_reg = mii_send_receive(fep->fip,regstat); - } - - mii_parse_sr(mii_reg, dev); -} - -static void mii_parse_dm9161_scsr(uint mii_reg, struct net_device * dev) -{ - volatile struct fcc_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - switch((mii_reg >>12) & 0xf) { - case 1: - { - s |= PHY_STAT_10HDX; - printk("10BaseT Half Duplex\n"); - break; - } - case 2: - { - s |= PHY_STAT_10FDX; - printk("10BaseT Full Duplex\n"); - break; - } - case 4: - { - s |= PHY_STAT_100HDX; - printk("100BaseT Half Duplex\n"); - break; - } - case 8: - { - s |= PHY_STAT_100FDX; - printk("100BaseT Full Duplex\n"); - break; - } - } - - fep->phy_status = s; - -} - -static void mii_dm9161_wait(uint mii_reg, struct net_device *dev) -{ - int timeout = HZ; - - /* Davicom takes a bit to come up after a reset, - * so wait here for a bit */ - schedule_timeout_uninterruptible(timeout); -} - -static phy_info_t phy_info_dm9161 = { - 0x00181b88, - "Davicom DM9161E", - (const phy_cmd_t[]) { /* config */ - { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_STOP), NULL}, - /* Do not bypass the scrambler/descrambler */ - { mk_mii_write(MIIM_DM9161_SCR, MIIM_DM9161_SCR_INIT), NULL}, - /* Configure 10BTCSR register */ - { mk_mii_write(MIIM_DM9161_10BTCSR, MIIM_DM9161_10BTCSR_INIT),NULL}, - /* Configure some basic stuff */ - { mk_mii_write(MII_BMCR, 0x1000), NULL}, - { mk_mii_read(MII_BMCR), mii_parse_cr }, - { mk_mii_read(MII_ADVERTISE), mii_parse_anar }, - { mk_mii_end,} - }, - (const phy_cmd_t[]) { /* startup */ - /* Restart Auto Negotiation */ - { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_RSTAN), NULL}, - /* Status is read once to clear old link state */ - { mk_mii_read(MII_BMSR), mii_dm9161_wait}, - /* Auto-negotiate */ - { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr}, - /* Read the status */ - { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr}, - /* Clear any pending interrupts */ - { mk_mii_read(MIIM_DM9161_INTR), NULL}, - /* Enable Interrupts */ - { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_INIT), NULL}, - { mk_mii_end,} - }, - (const phy_cmd_t[]) { /* ack_int */ - { mk_mii_read(MIIM_DM9161_INTR), NULL}, -#if 0 - { mk_mii_read(MII_BMSR), NULL}, - { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr}, - { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr}, -#endif - { mk_mii_end,} - }, - (const phy_cmd_t[]) { /* shutdown */ - { mk_mii_read(MIIM_DM9161_INTR),NULL}, - { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_STOP), NULL}, - { mk_mii_end,} - }, -}; -#endif /* CONFIG_FCC_DM9161 */ - -static phy_info_t *phy_info[] = { - -#ifdef CONFIG_FCC_LXT970 - &phy_info_lxt970, -#endif /* CONFIG_FEC_LXT970 */ - -#ifdef CONFIG_FCC_LXT971 - &phy_info_lxt971, -#endif /* CONFIG_FEC_LXT971 */ - -#ifdef CONFIG_FCC_QS6612 - &phy_info_qs6612, -#endif /* CONFIG_FEC_QS6612 */ - -#ifdef CONFIG_FCC_DM9131 - &phy_info_dm9131, -#endif /* CONFIG_FEC_DM9131 */ - -#ifdef CONFIG_FCC_DM9161 - &phy_info_dm9161, -#endif /* CONFIG_FCC_DM9161 */ - -#ifdef CONFIG_FCC_GENERIC_PHY - /* Generic PHY support. This must be the last PHY in the table. - * It will be used to support any PHY that doesn't match a previous - * entry in the table. - */ - &phy_info_generic, -#endif /* CONFIG_FCC_GENERIC_PHY */ - - NULL -}; - -static void mii_display_status(struct work_struct *work) -{ - volatile struct fcc_enet_private *fep = - container_of(work, struct fcc_enet_private, phy_relink); - struct net_device *dev = fep->dev; - uint s = fep->phy_status; - - if (!fep->link && !fep->old_link) { - /* Link is still down - don't print anything */ - return; - } - - printk("%s: status: ", dev->name); - - if (!fep->link) { - printk("link down"); - } else { - printk("link up"); - - switch(s & PHY_STAT_SPMASK) { - case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break; - case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break; - case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break; - case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break; - default: - printk(", Unknown speed/duplex"); - } - - if (s & PHY_STAT_ANC) - printk(", auto-negotiation complete"); - } - - if (s & PHY_STAT_FAULT) - printk(", remote fault"); - - printk(".\n"); -} - -static void mii_display_config(struct work_struct *work) -{ - volatile struct fcc_enet_private *fep = - container_of(work, struct fcc_enet_private, - phy_display_config); - struct net_device *dev = fep->dev; - uint s = fep->phy_status; - - printk("%s: config: auto-negotiation ", dev->name); - - if (s & PHY_CONF_ANE) - printk("on"); - else - printk("off"); - - if (s & PHY_CONF_100FDX) - printk(", 100FDX"); - if (s & PHY_CONF_100HDX) - printk(", 100HDX"); - if (s & PHY_CONF_10FDX) - printk(", 10FDX"); - if (s & PHY_CONF_10HDX) - printk(", 10HDX"); - if (!(s & PHY_CONF_SPMASK)) - printk(", No speed/duplex selected?"); - - if (s & PHY_CONF_LOOP) - printk(", loopback enabled"); - - printk(".\n"); - - fep->sequence_done = 1; -} - -static void mii_relink(struct net_device *dev) -{ - struct fcc_enet_private *fep = dev->priv; - int duplex = 0; - - fep->old_link = fep->link; - fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; - -#ifdef MDIO_DEBUG - printk(" mii_relink: link=%d\n", fep->link); -#endif - - if (fep->link) { - if (fep->phy_status - & (PHY_STAT_100FDX | PHY_STAT_10FDX)) - duplex = 1; - fcc_restart(dev, duplex); -#ifdef MDIO_DEBUG - printk(" mii_relink: duplex=%d\n", duplex); -#endif - } -} - -static void mii_queue_relink(uint mii_reg, struct net_device *dev) -{ - struct fcc_enet_private *fep = dev->priv; - - mii_relink(dev); - - schedule_work(&fep->phy_relink); -} - -static void mii_queue_config(uint mii_reg, struct net_device *dev) -{ - struct fcc_enet_private *fep = dev->priv; - - schedule_work(&fep->phy_display_config); -} - -phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_BMCR), mii_queue_relink }, - { mk_mii_end, } }; -phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_BMCR), mii_queue_config }, - { mk_mii_end, } }; - - -/* Read remainder of PHY ID. -*/ -static void -mii_discover_phy3(uint mii_reg, struct net_device *dev) -{ - struct fcc_enet_private *fep; - int i; - - fep = dev->priv; - printk("mii_reg: %08x\n", mii_reg); - fep->phy_id |= (mii_reg & 0xffff); - - for(i = 0; phy_info[i]; i++) - if((phy_info[i]->id == (fep->phy_id >> 4)) || !phy_info[i]->id) - break; - - if(!phy_info[i]) - panic("%s: PHY id 0x%08x is not supported!\n", - dev->name, fep->phy_id); - - fep->phy = phy_info[i]; - fep->phy_id_done = 1; - - printk("%s: Phy @ 0x%x, type %s (0x%08x)\n", - dev->name, fep->phy_addr, fep->phy->name, fep->phy_id); -} - -/* Scan all of the MII PHY addresses looking for someone to respond - * with a valid ID. This usually happens quickly. - */ -static void -mii_discover_phy(uint mii_reg, struct net_device *dev) -{ - struct fcc_enet_private *fep; - uint phytype; - - fep = dev->priv; - - if ((phytype = (mii_reg & 0xffff)) != 0xffff) { - - /* Got first part of ID, now get remainder. */ - fep->phy_id = phytype << 16; - mii_queue(dev, mk_mii_read(MII_PHYSID2), mii_discover_phy3); - } else { - fep->phy_addr++; - if (fep->phy_addr < 32) { - mii_queue(dev, mk_mii_read(MII_PHYSID1), - mii_discover_phy); - } else { - printk("fec: No PHY device found.\n"); - } - } -} -#endif /* CONFIG_USE_MDIO */ - -#ifdef PHY_INTERRUPT -/* This interrupt occurs when the PHY detects a link change. */ -static irqreturn_t -mii_link_interrupt(int irq, void * dev_id) -{ - struct net_device *dev = dev_id; - struct fcc_enet_private *fep = dev->priv; - fcc_info_t *fip = fep->fip; - - if (fep->phy) { - /* We don't want to be interrupted by an FCC - * interrupt here. - */ - disable_irq_nosync(fip->fc_interrupt); - - mii_do_cmd(dev, fep->phy->ack_int); - /* restart and display status */ - mii_do_cmd(dev, phy_cmd_relink); - - enable_irq(fip->fc_interrupt); - } - return IRQ_HANDLED; -} -#endif /* ifdef PHY_INTERRUPT */ - -#if 0 /* This should be fixed someday */ -/* Set or clear the multicast filter for this adaptor. - * Skeleton taken from sunlance driver. - * The CPM Ethernet implementation allows Multicast as well as individual - * MAC address filtering. Some of the drivers check to make sure it is - * a group multicast address, and discard those that are not. I guess I - * will do the same for now, but just remove the test if you want - * individual filtering as well (do the upper net layers want or support - * this kind of feature?). - */ -static void -set_multicast_list(struct net_device *dev) -{ - struct fcc_enet_private *cep; - struct dev_mc_list *dmi; - u_char *mcptr, *tdptr; - volatile fcc_enet_t *ep; - int i, j; - - cep = (struct fcc_enet_private *)dev->priv; - -return; - /* Get pointer to FCC area in parameter RAM. - */ - ep = (fcc_enet_t *)dev->base_addr; - - if (dev->flags&IFF_PROMISC) { - - /* Log any net taps. */ - printk("%s: Promiscuous mode enabled.\n", dev->name); - cep->fccp->fcc_fpsmr |= FCC_PSMR_PRO; - } else { - - cep->fccp->fcc_fpsmr &= ~FCC_PSMR_PRO; - - if (dev->flags & IFF_ALLMULTI) { - /* Catch all multicast addresses, so set the - * filter to all 1's. - */ - ep->fen_gaddrh = 0xffffffff; - ep->fen_gaddrl = 0xffffffff; - } - else { - /* Clear filter and add the addresses in the list. - */ - ep->fen_gaddrh = 0; - ep->fen_gaddrl = 0; - - dmi = dev->mc_list; - - for (i=0; imc_count; i++, dmi = dmi->next) { - - /* Only support group multicast for now. - */ - if (!(dmi->dmi_addr[0] & 1)) - continue; - - /* The address in dmi_addr is LSB first, - * and taddr is MSB first. We have to - * copy bytes MSB first from dmi_addr. - */ - mcptr = (u_char *)dmi->dmi_addr + 5; - tdptr = (u_char *)&ep->fen_taddrh; - for (j=0; j<6; j++) - *tdptr++ = *mcptr--; - - /* Ask CPM to run CRC and set bit in - * filter mask. - */ - cpmp->cp_cpcr = mk_cr_cmd(cep->fip->fc_cpmpage, - cep->fip->fc_cpmblock, 0x0c, - CPM_CR_SET_GADDR) | CPM_CR_FLG; - udelay(10); - while (cpmp->cp_cpcr & CPM_CR_FLG); - } - } - } -} -#endif /* if 0 */ - - -/* Set the individual MAC address. - */ -int fcc_enet_set_mac_address(struct net_device *dev, void *p) -{ - struct sockaddr *addr= (struct sockaddr *) p; - struct fcc_enet_private *cep; - volatile fcc_enet_t *ep; - unsigned char *eap; - int i; - - cep = (struct fcc_enet_private *)(dev->priv); - ep = cep->ep; - - if (netif_running(dev)) - return -EBUSY; - - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); - - eap = (unsigned char *) &(ep->fen_paddrh); - for (i=5; i>=0; i--) - *eap++ = addr->sa_data[i]; - - return 0; -} - - -/* Initialize the CPM Ethernet on FCC. - */ -static int __init fec_enet_init(void) -{ - struct net_device *dev; - struct fcc_enet_private *cep; - fcc_info_t *fip; - int i, np, err; - volatile cpm2_map_t *immap; - volatile iop_cpm2_t *io; - - immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */ - io = &immap->im_ioport; - - np = sizeof(fcc_ports) / sizeof(fcc_info_t); - fip = fcc_ports; - - while (np-- > 0) { - /* Create an Ethernet device instance. - */ - dev = alloc_etherdev(sizeof(*cep)); - if (!dev) - return -ENOMEM; - - cep = dev->priv; - spin_lock_init(&cep->lock); - cep->fip = fip; - - init_fcc_shutdown(fip, cep, immap); - init_fcc_ioports(fip, io, immap); - init_fcc_param(fip, dev, immap); - - dev->base_addr = (unsigned long)(cep->ep); - - /* The CPM Ethernet specific entries in the device - * structure. - */ - dev->open = fcc_enet_open; - dev->hard_start_xmit = fcc_enet_start_xmit; - dev->tx_timeout = fcc_enet_timeout; - dev->watchdog_timeo = TX_TIMEOUT; - dev->stop = fcc_enet_close; - dev->get_stats = fcc_enet_get_stats; - /* dev->set_multicast_list = set_multicast_list; */ - dev->set_mac_address = fcc_enet_set_mac_address; - - init_fcc_startup(fip, dev); - - err = register_netdev(dev); - if (err) { - free_netdev(dev); - return err; - } - - printk("%s: FCC ENET Version 0.3, ", dev->name); - for (i=0; i<5; i++) - printk("%02x:", dev->dev_addr[i]); - printk("%02x\n", dev->dev_addr[5]); - -#ifdef CONFIG_USE_MDIO - /* Queue up command to detect the PHY and initialize the - * remainder of the interface. - */ - cep->phy_id_done = 0; - cep->phy_addr = fip->fc_phyaddr; - mii_queue(dev, mk_mii_read(MII_PHYSID1), mii_discover_phy); - INIT_WORK(&cep->phy_relink, mii_display_status); - INIT_WORK(&cep->phy_display_config, mii_display_config); - cep->dev = dev; -#endif /* CONFIG_USE_MDIO */ - - fip++; - } - - return 0; -} -module_init(fec_enet_init); - -/* Make sure the device is shut down during initialization. -*/ -static void __init -init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep, - volatile cpm2_map_t *immap) -{ - volatile fcc_enet_t *ep; - volatile fcc_t *fccp; - - /* Get pointer to FCC area in parameter RAM. - */ - ep = (fcc_enet_t *)(&immap->im_dprambase[fip->fc_proff]); - - /* And another to the FCC register area. - */ - fccp = (volatile fcc_t *)(&immap->im_fcc[fip->fc_fccnum]); - cep->fccp = fccp; /* Keep the pointers handy */ - cep->ep = ep; - - /* Disable receive and transmit in case someone left it running. - */ - fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT); -} - -/* Initialize the I/O pins for the FCC Ethernet. -*/ -static void __init -init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io, - volatile cpm2_map_t *immap) -{ - - /* FCC1 pins are on port A/C. FCC2/3 are port B/C. - */ - if (fip->fc_proff == PROFF_FCC1) { - /* Configure port A and C pins for FCC1 Ethernet. - */ - io->iop_pdira &= ~PA1_DIRA_BOUT; - io->iop_pdira |= PA1_DIRA_BIN; - io->iop_psora &= ~PA1_PSORA_BOUT; - io->iop_psora |= PA1_PSORA_BIN; - io->iop_ppara |= (PA1_DIRA_BOUT | PA1_DIRA_BIN); - } - if (fip->fc_proff == PROFF_FCC2) { - /* Configure port B and C pins for FCC Ethernet. - */ - io->iop_pdirb &= ~PB2_DIRB_BOUT; - io->iop_pdirb |= PB2_DIRB_BIN; - io->iop_psorb &= ~PB2_PSORB_BOUT; - io->iop_psorb |= PB2_PSORB_BIN; - io->iop_pparb |= (PB2_DIRB_BOUT | PB2_DIRB_BIN); - } - if (fip->fc_proff == PROFF_FCC3) { - /* Configure port B and C pins for FCC Ethernet. - */ - io->iop_pdirb &= ~PB3_DIRB_BOUT; - io->iop_pdirb |= PB3_DIRB_BIN; - io->iop_psorb &= ~PB3_PSORB_BOUT; - io->iop_psorb |= PB3_PSORB_BIN; - io->iop_pparb |= (PB3_DIRB_BOUT | PB3_DIRB_BIN); - - io->iop_pdirc &= ~PC3_DIRC_BOUT; - io->iop_pdirc |= PC3_DIRC_BIN; - io->iop_psorc &= ~PC3_PSORC_BOUT; - io->iop_psorc |= PC3_PSORC_BIN; - io->iop_pparc |= (PC3_DIRC_BOUT | PC3_DIRC_BIN); - - } - - /* Port C has clocks...... - */ - io->iop_psorc &= ~(fip->fc_trxclocks); - io->iop_pdirc &= ~(fip->fc_trxclocks); - io->iop_pparc |= fip->fc_trxclocks; - -#ifdef CONFIG_USE_MDIO - /* ....and the MII serial clock/data. - */ - io->iop_pdatc |= (fip->fc_mdio | fip->fc_mdck); - io->iop_podrc &= ~(fip->fc_mdio | fip->fc_mdck); - io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck); - io->iop_pparc &= ~(fip->fc_mdio | fip->fc_mdck); -#endif /* CONFIG_USE_MDIO */ - - /* Configure Serial Interface clock routing. - * First, clear all FCC bits to zero, - * then set the ones we want. - */ - immap->im_cpmux.cmx_fcr &= ~(fip->fc_clockmask); - immap->im_cpmux.cmx_fcr |= fip->fc_clockroute; -} - -static void __init -init_fcc_param(fcc_info_t *fip, struct net_device *dev, - volatile cpm2_map_t *immap) -{ - unsigned char *eap; - unsigned long mem_addr; - bd_t *bd; - int i, j; - struct fcc_enet_private *cep; - volatile fcc_enet_t *ep; - volatile cbd_t *bdp; - volatile cpm_cpm2_t *cp; - - cep = (struct fcc_enet_private *)(dev->priv); - ep = cep->ep; - cp = cpmp; - - bd = (bd_t *)__res; - - /* Zero the whole thing.....I must have missed some individually. - * It works when I do this. - */ - memset((char *)ep, 0, sizeof(fcc_enet_t)); - - /* Allocate space for the buffer descriptors from regular memory. - * Initialize base addresses for the buffer descriptors. - */ - cep->rx_bd_base = kmalloc(sizeof(cbd_t) * RX_RING_SIZE, - GFP_KERNEL | GFP_DMA); - ep->fen_genfcc.fcc_rbase = __pa(cep->rx_bd_base); - cep->tx_bd_base = kmalloc(sizeof(cbd_t) * TX_RING_SIZE, - GFP_KERNEL | GFP_DMA); - ep->fen_genfcc.fcc_tbase = __pa(cep->tx_bd_base); - - cep->dirty_tx = cep->cur_tx = cep->tx_bd_base; - cep->cur_rx = cep->rx_bd_base; - - ep->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB) << 24; - ep->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB) << 24; - - /* Set maximum bytes per receive buffer. - * It must be a multiple of 32. - */ - ep->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE; - - /* Allocate space in the reserved FCC area of DPRAM for the - * internal buffers. No one uses this space (yet), so we - * can do this. Later, we will add resource management for - * this area. - */ - mem_addr = CPM_FCC_SPECIAL_BASE + (fip->fc_fccnum * 128); - ep->fen_genfcc.fcc_riptr = mem_addr; - ep->fen_genfcc.fcc_tiptr = mem_addr+32; - ep->fen_padptr = mem_addr+64; - memset((char *)(&(immap->im_dprambase[(mem_addr+64)])), 0x88, 32); - - ep->fen_genfcc.fcc_rbptr = 0; - ep->fen_genfcc.fcc_tbptr = 0; - ep->fen_genfcc.fcc_rcrc = 0; - ep->fen_genfcc.fcc_tcrc = 0; - ep->fen_genfcc.fcc_res1 = 0; - ep->fen_genfcc.fcc_res2 = 0; - - ep->fen_camptr = 0; /* CAM isn't used in this driver */ - - /* Set CRC preset and mask. - */ - ep->fen_cmask = 0xdebb20e3; - ep->fen_cpres = 0xffffffff; - - ep->fen_crcec = 0; /* CRC Error counter */ - ep->fen_alec = 0; /* alignment error counter */ - ep->fen_disfc = 0; /* discard frame counter */ - ep->fen_retlim = 15; /* Retry limit threshold */ - ep->fen_pper = 0; /* Normal persistence */ - - /* Clear hash filter tables. - */ - ep->fen_gaddrh = 0; - ep->fen_gaddrl = 0; - ep->fen_iaddrh = 0; - ep->fen_iaddrl = 0; - - /* Clear the Out-of-sequence TxBD. - */ - ep->fen_tfcstat = 0; - ep->fen_tfclen = 0; - ep->fen_tfcptr = 0; - - ep->fen_mflr = PKT_MAXBUF_SIZE; /* maximum frame length register */ - ep->fen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */ - - /* Set Ethernet station address. - * - * This is supplied in the board information structure, so we - * copy that into the controller. - * So, far we have only been given one Ethernet address. We make - * it unique by setting a few bits in the upper byte of the - * non-static part of the address. - */ - eap = (unsigned char *)&(ep->fen_paddrh); - for (i=5; i>=0; i--) { - -/* - * The EP8260 only uses FCC3, so we can safely give it the real - * MAC address. - */ -#ifdef CONFIG_SBC82xx - if (i == 5) { - /* bd->bi_enetaddr holds the SCC0 address; the FCC - devices count up from there */ - dev->dev_addr[i] = bd->bi_enetaddr[i] & ~3; - dev->dev_addr[i] += 1 + fip->fc_fccnum; - *eap++ = dev->dev_addr[i]; - } -#else -#ifndef CONFIG_RPX8260 - if (i == 3) { - dev->dev_addr[i] = bd->bi_enetaddr[i]; - dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum)); - *eap++ = dev->dev_addr[i]; - } else -#endif - { - *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i]; - } -#endif - } - - ep->fen_taddrh = 0; - ep->fen_taddrm = 0; - ep->fen_taddrl = 0; - - ep->fen_maxd1 = PKT_MAXDMA_SIZE; /* maximum DMA1 length */ - ep->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length */ - - /* Clear stat counters, in case we ever enable RMON. - */ - ep->fen_octc = 0; - ep->fen_colc = 0; - ep->fen_broc = 0; - ep->fen_mulc = 0; - ep->fen_uspc = 0; - ep->fen_frgc = 0; - ep->fen_ospc = 0; - ep->fen_jbrc = 0; - ep->fen_p64c = 0; - ep->fen_p65c = 0; - ep->fen_p128c = 0; - ep->fen_p256c = 0; - ep->fen_p512c = 0; - ep->fen_p1024c = 0; - - ep->fen_rfthr = 0; /* Suggested by manual */ - ep->fen_rfcnt = 0; - ep->fen_cftype = 0; - - /* Now allocate the host memory pages and initialize the - * buffer descriptors. - */ - bdp = cep->tx_bd_base; - for (i=0; icbd_sc = 0; - bdp->cbd_datlen = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - bdp = cep->rx_bd_base; - for (i=0; icbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR; - bdp->cbd_datlen = 0; - bdp->cbd_bufaddr = __pa(mem_addr); - mem_addr += FCC_ENET_RX_FRSIZE; - bdp++; - } - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* Let's re-initialize the channel now. We have to do it later - * than the manual describes because we have just now finished - * the BD initialization. - */ - cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, 0x0c, - CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - cep->skb_cur = cep->skb_dirty = 0; -} - -/* Let 'er rip. -*/ -static void __init -init_fcc_startup(fcc_info_t *fip, struct net_device *dev) -{ - volatile fcc_t *fccp; - struct fcc_enet_private *cep; - - cep = (struct fcc_enet_private *)(dev->priv); - fccp = cep->fccp; - -#ifdef CONFIG_RPX8260 -#ifdef PHY_INTERRUPT - /* Route PHY interrupt to IRQ. The following code only works for - * IRQ1 - IRQ7. It does not work for Port C interrupts. - */ - *((volatile u_char *) (RPX_CSR_ADDR + 13)) &= ~BCSR13_FETH_IRQMASK; - *((volatile u_char *) (RPX_CSR_ADDR + 13)) |= - ((PHY_INTERRUPT - SIU_INT_IRQ1 + 1) << 4); -#endif - /* Initialize MDIO pins. */ - *((volatile u_char *) (RPX_CSR_ADDR + 4)) &= ~BCSR4_MII_MDC; - *((volatile u_char *) (RPX_CSR_ADDR + 4)) |= - BCSR4_MII_READ | BCSR4_MII_MDIO; - /* Enable external LXT971 PHY. */ - *((volatile u_char *) (RPX_CSR_ADDR + 4)) |= BCSR4_EN_PHY; - udelay(1000); - *((volatile u_char *) (RPX_CSR_ADDR+ 4)) |= BCSR4_EN_MII; - udelay(1000); -#endif /* ifdef CONFIG_RPX8260 */ - - fccp->fcc_fcce = 0xffff; /* Clear any pending events */ - - /* Leave FCC interrupts masked for now. Will be unmasked by - * fcc_restart(). - */ - fccp->fcc_fccm = 0; - - /* Install our interrupt handler. - */ - if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0, "fenet", - dev) < 0) - printk("Can't get FCC IRQ %d\n", fip->fc_interrupt); - -#ifdef PHY_INTERRUPT - /* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is - * on Port C. - */ - ((volatile cpm2_map_t *) CPM_MAP_ADDR)->im_intctl.ic_siexr |= - (1 << (14 - (PHY_INTERRUPT - SIU_INT_IRQ1))); - - if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0, - "mii", dev) < 0) - printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT); -#endif /* PHY_INTERRUPT */ - - /* Set GFMR to enable Ethernet operating mode. - */ - fccp->fcc_gfmr = (FCC_GFMR_TCI | FCC_GFMR_MODE_ENET); - - /* Set sync/delimiters. - */ - fccp->fcc_fdsr = 0xd555; - - /* Set protocol specific processing mode for Ethernet. - * This has to be adjusted for Full Duplex operation after we can - * determine how to detect that. - */ - fccp->fcc_fpsmr = FCC_PSMR_ENCRC; - -#ifdef CONFIG_PQ2ADS - /* Enable the PHY. */ - *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_FETHIEN; - *(volatile uint *)(BCSR_ADDR + 4) |= BCSR1_FETH_RST; -#endif -#if defined(CONFIG_PQ2ADS) || defined(CONFIG_PQ2FADS) - /* Enable the 2nd PHY. */ - *(volatile uint *)(BCSR_ADDR + 12) &= ~BCSR3_FETHIEN2; - *(volatile uint *)(BCSR_ADDR + 12) |= BCSR3_FETH2_RST; -#endif - -#if defined(CONFIG_USE_MDIO) || defined(CONFIG_TQM8260) - /* start in full duplex mode, and negotiate speed - */ - fcc_restart (dev, 1); -#else - /* start in half duplex mode - */ - fcc_restart (dev, 0); -#endif -} - -#ifdef CONFIG_USE_MDIO -/* MII command/status interface. - * I'm not going to describe all of the details. You can find the - * protocol definition in many other places, including the data sheet - * of most PHY parts. - * I wonder what "they" were thinking (maybe weren't) when they leave - * the I2C in the CPM but I have to toggle these bits...... - */ -#ifdef CONFIG_RPX8260 - /* The EP8260 has the MDIO pins in a BCSR instead of on Port C - * like most other boards. - */ -#define MDIO_ADDR ((volatile u_char *)(RPX_CSR_ADDR + 4)) -#define MAKE_MDIO_OUTPUT *MDIO_ADDR &= ~BCSR4_MII_READ -#define MAKE_MDIO_INPUT *MDIO_ADDR |= BCSR4_MII_READ | BCSR4_MII_MDIO -#define OUT_MDIO(bit) \ - if (bit) \ - *MDIO_ADDR |= BCSR4_MII_MDIO; \ - else \ - *MDIO_ADDR &= ~BCSR4_MII_MDIO; -#define IN_MDIO (*MDIO_ADDR & BCSR4_MII_MDIO) -#define OUT_MDC(bit) \ - if (bit) \ - *MDIO_ADDR |= BCSR4_MII_MDC; \ - else \ - *MDIO_ADDR &= ~BCSR4_MII_MDC; -#else /* ifdef CONFIG_RPX8260 */ - /* This is for the usual case where the MDIO pins are on Port C. - */ -#define MDIO_ADDR (((volatile cpm2_map_t *)CPM_MAP_ADDR)->im_ioport) -#define MAKE_MDIO_OUTPUT MDIO_ADDR.iop_pdirc |= fip->fc_mdio -#define MAKE_MDIO_INPUT MDIO_ADDR.iop_pdirc &= ~fip->fc_mdio -#define OUT_MDIO(bit) \ - if (bit) \ - MDIO_ADDR.iop_pdatc |= fip->fc_mdio; \ - else \ - MDIO_ADDR.iop_pdatc &= ~fip->fc_mdio; -#define IN_MDIO ((MDIO_ADDR.iop_pdatc) & fip->fc_mdio) -#define OUT_MDC(bit) \ - if (bit) \ - MDIO_ADDR.iop_pdatc |= fip->fc_mdck; \ - else \ - MDIO_ADDR.iop_pdatc &= ~fip->fc_mdck; -#endif /* ifdef CONFIG_RPX8260 */ - -static uint -mii_send_receive(fcc_info_t *fip, uint cmd) -{ - uint retval; - int read_op, i, off; - const int us = 1; - - read_op = ((cmd & 0xf0000000) == 0x60000000); - - /* Write preamble - */ - OUT_MDIO(1); - MAKE_MDIO_OUTPUT; - OUT_MDIO(1); - for (i = 0; i < 32; i++) - { - udelay(us); - OUT_MDC(1); - udelay(us); - OUT_MDC(0); - } - - /* Write data - */ - for (i = 0, off = 31; i < (read_op ? 14 : 32); i++, --off) - { - OUT_MDIO((cmd >> off) & 0x00000001); - udelay(us); - OUT_MDC(1); - udelay(us); - OUT_MDC(0); - } - - retval = cmd; - - if (read_op) - { - retval >>= 16; - - MAKE_MDIO_INPUT; - udelay(us); - OUT_MDC(1); - udelay(us); - OUT_MDC(0); - - for (i = 0; i < 16; i++) - { - udelay(us); - OUT_MDC(1); - udelay(us); - retval <<= 1; - if (IN_MDIO) - retval++; - OUT_MDC(0); - } - } - - MAKE_MDIO_INPUT; - udelay(us); - OUT_MDC(1); - udelay(us); - OUT_MDC(0); - - return retval; -} -#endif /* CONFIG_USE_MDIO */ - -static void -fcc_stop(struct net_device *dev) -{ - struct fcc_enet_private *fep= (struct fcc_enet_private *)(dev->priv); - volatile fcc_t *fccp = fep->fccp; - fcc_info_t *fip = fep->fip; - volatile fcc_enet_t *ep = fep->ep; - volatile cpm_cpm2_t *cp = cpmp; - volatile cbd_t *bdp; - int i; - - if ((fccp->fcc_gfmr & (FCC_GFMR_ENR | FCC_GFMR_ENT)) == 0) - return; /* already down */ - - fccp->fcc_fccm = 0; - - /* issue the graceful stop tx command */ - while (cp->cp_cpcr & CPM_CR_FLG); - cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, - 0x0c, CPM_CR_GRA_STOP_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* Disable transmit/receive */ - fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT); - - /* issue the restart tx command */ - fccp->fcc_fcce = FCC_ENET_GRA; - while (cp->cp_cpcr & CPM_CR_FLG); - cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, - 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* free tx buffers */ - fep->skb_cur = fep->skb_dirty = 0; - for (i=0; i<=TX_RING_MOD_MASK; i++) { - if (fep->tx_skbuff[i] != NULL) { - dev_kfree_skb(fep->tx_skbuff[i]); - fep->tx_skbuff[i] = NULL; - } - } - fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; - fep->tx_free = TX_RING_SIZE; - ep->fen_genfcc.fcc_tbptr = ep->fen_genfcc.fcc_tbase; - - /* Initialize the tx buffer descriptors. */ - bdp = fep->tx_bd_base; - for (i=0; icbd_sc = 0; - bdp->cbd_datlen = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - /* Set the last buffer to wrap. */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; -} - -static void -fcc_restart(struct net_device *dev, int duplex) -{ - struct fcc_enet_private *fep = (struct fcc_enet_private *)(dev->priv); - volatile fcc_t *fccp = fep->fccp; - - /* stop any transmissions in progress */ - fcc_stop(dev); - - if (duplex) - fccp->fcc_fpsmr |= FCC_PSMR_FDE | FCC_PSMR_LPB; - else - fccp->fcc_fpsmr &= ~(FCC_PSMR_FDE | FCC_PSMR_LPB); - - /* Enable interrupts for transmit error, complete frame - * received, and any transmit buffer we have also set the - * interrupt flag. - */ - fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB); - - /* Enable transmit/receive */ - fccp->fcc_gfmr |= FCC_GFMR_ENR | FCC_GFMR_ENT; -} - -static int -fcc_enet_open(struct net_device *dev) -{ - struct fcc_enet_private *fep = dev->priv; - -#ifdef CONFIG_USE_MDIO - fep->sequence_done = 0; - fep->link = 0; - - if (fep->phy) { - fcc_restart(dev, 0); /* always start in half-duplex */ - mii_do_cmd(dev, fep->phy->ack_int); - mii_do_cmd(dev, fep->phy->config); - mii_do_cmd(dev, phy_cmd_config); /* display configuration */ - while(!fep->sequence_done) - schedule(); - - mii_do_cmd(dev, fep->phy->startup); - netif_start_queue(dev); - return 0; /* Success */ - } - return -ENODEV; /* No PHY we understand */ -#else - fep->link = 1; - fcc_restart(dev, 0); /* always start in half-duplex */ - netif_start_queue(dev); - return 0; /* Always succeed */ -#endif /* CONFIG_USE_MDIO */ -} - diff --git a/arch/ppc/8xx_io/Kconfig b/arch/ppc/8xx_io/Kconfig deleted file mode 100644 index c623e44f01ad253477e7cac3f5a5db0ee03831f3..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/Kconfig +++ /dev/null @@ -1,134 +0,0 @@ -# -# MPC8xx Communication options -# - -menu "MPC8xx CPM Options" - depends on 8xx - -config SCC_ENET - bool "CPM SCC Ethernet" - depends on NET_ETHERNET - help - Enable Ethernet support via the Motorola MPC8xx serial - communications controller. - -choice - prompt "SCC used for Ethernet" - depends on SCC_ENET - default SCC1_ENET - -config SCC1_ENET - bool "SCC1" - help - Use MPC8xx serial communications controller 1 to drive Ethernet - (default). - -config SCC2_ENET - bool "SCC2" - help - Use MPC8xx serial communications controller 2 to drive Ethernet. - -config SCC3_ENET - bool "SCC3" - help - Use MPC8xx serial communications controller 3 to drive Ethernet. - -endchoice - -config FEC_ENET - bool "860T FEC Ethernet" - depends on NET_ETHERNET - help - Enable Ethernet support via the Fast Ethernet Controller (FCC) on - the Motorola MPC8260. - -config USE_MDIO - bool "Use MDIO for PHY configuration" - depends on FEC_ENET - help - On some boards the hardware configuration of the ethernet PHY can be - used without any software interaction over the MDIO interface, so - all MII code can be omitted. Say N here if unsure or if you don't - need link status reports. - -config FEC_AM79C874 - bool "Support AMD79C874 PHY" - depends on USE_MDIO - -config FEC_LXT970 - bool "Support LXT970 PHY" - depends on USE_MDIO - -config FEC_LXT971 - bool "Support LXT971 PHY" - depends on USE_MDIO - -config FEC_QS6612 - bool "Support QS6612 PHY" - depends on USE_MDIO - -config ENET_BIG_BUFFERS - bool "Use Big CPM Ethernet Buffers" - depends on SCC_ENET || FEC_ENET - help - Allocate large buffers for MPC8xx Ethernet. Increases throughput - and decreases the likelihood of dropped packets, but costs memory. - -# This doesn't really belong here, but it is convenient to ask -# 8xx specific questions. -comment "Generic MPC8xx Options" - -config 8xx_COPYBACK - bool "Copy-Back Data Cache (else Writethrough)" - help - Saying Y here will cause the cache on an MPC8xx processor to be used - in Copy-Back mode. If you say N here, it is used in Writethrough - mode. - - If in doubt, say Y here. - -config 8xx_CPU6 - bool "CPU6 Silicon Errata (860 Pre Rev. C)" - help - MPC860 CPUs, prior to Rev C have some bugs in the silicon, which - require workarounds for Linux (and most other OSes to work). If you - get a BUG() very early in boot, this might fix the problem. For - more details read the document entitled "MPC860 Family Device Errata - Reference" on Motorola's website. This option also incurs a - performance hit. - - If in doubt, say N here. - -choice - prompt "Microcode patch selection" - default NO_UCODE_PATCH - help - Help not implemented yet, coming soon. - -config NO_UCODE_PATCH - bool "None" - -config USB_SOF_UCODE_PATCH - bool "USB SOF patch" - help - Help not implemented yet, coming soon. - -config I2C_SPI_UCODE_PATCH - bool "I2C/SPI relocation patch" - help - Help not implemented yet, coming soon. - -config I2C_SPI_SMC1_UCODE_PATCH - bool "I2C/SPI/SMC1 relocation patch" - help - Help not implemented yet, coming soon. - -endchoice - -config UCODE_PATCH - bool - default y - depends on !NO_UCODE_PATCH - -endmenu - diff --git a/arch/ppc/8xx_io/Makefile b/arch/ppc/8xx_io/Makefile deleted file mode 100644 index 1051a06df7e04b96a41d00ffd6e168f1052ed660..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# Makefile for the linux MPC8xx ppc-specific parts of comm processor -# - -obj-y := commproc.o - -obj-$(CONFIG_FEC_ENET) += fec.o -obj-$(CONFIG_SCC_ENET) += enet.o -obj-$(CONFIG_UCODE_PATCH) += micropatch.o diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c deleted file mode 100644 index 752443df5ecf270ea67ca0e3c44dafd22d62a678..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/commproc.c +++ /dev/null @@ -1,432 +0,0 @@ -/* - * General Purpose functions for the global management of the - * Communication Processor Module. - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * In addition to the individual control of the communication - * channels, there are a few functions that globally affect the - * communication processor. - * - * Buffer descriptors must be allocated from the dual ported memory - * space. The allocator for that is here. When the communication - * process is reset, we reclaim the memory available. There is - * currently no deallocator for this memory. - * The amount of space available is platform dependent. On the - * MBX, the EPPC software loads additional microcode into the - * communication processor, and uses some of the DP ram for this - * purpose. Current, the first 512 bytes and the last 256 bytes of - * memory are used. Right now I am conservative and only use the - * memory that can never be used for microcode. If there are - * applications that require more DP ram, we can expand the boundaries - * but then we have to be careful of any downloaded microcode. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define immr_map(member) \ -({ \ - u32 offset = offsetof(immap_t, member); \ - void *addr = ioremap (IMAP_ADDR + offset, \ - FIELD_SIZEOF(immap_t, member)); \ - addr; \ -}) - -#define immr_map_size(member, size) \ -({ \ - u32 offset = offsetof(immap_t, member); \ - void *addr = ioremap (IMAP_ADDR + offset, size); \ - addr; \ -}) - -static void m8xx_cpm_dpinit(void); -cpm8xx_t *cpmp; /* Pointer to comm processor space */ - -/* CPM interrupt vector functions. -*/ -struct cpm_action { - void (*handler)(void *); - void *dev_id; -}; -static struct cpm_action cpm_vecs[CPMVEC_NR]; -static irqreturn_t cpm_interrupt(int irq, void * dev); -static irqreturn_t cpm_error_interrupt(int irq, void *dev); -/* Define a table of names to identify CPM interrupt handlers in - * /proc/interrupts. - */ -const char *cpm_int_name[] = - { "error", "PC4", "PC5", "SMC2", - "SMC1", "SPI", "PC6", "Timer 4", - "", "PC7", "PC8", "PC9", - "Timer 3", "", "PC10", "PC11", - "I2C", "RISC Timer", "Timer 2", "", - "IDMA2", "IDMA1", "SDMA error", "PC12", - "PC13", "Timer 1", "PC14", "SCC4", - "SCC3", "SCC2", "SCC1", "PC15" - }; - -static void -cpm_mask_irq(unsigned int irq) -{ - int cpm_vec = irq - CPM_IRQ_OFFSET; - - clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec)); -} - -static void -cpm_unmask_irq(unsigned int irq) -{ - int cpm_vec = irq - CPM_IRQ_OFFSET; - - setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec)); -} - -static void -cpm_ack(unsigned int irq) -{ - /* We do not need to do anything here. */ -} - -static void -cpm_eoi(unsigned int irq) -{ - int cpm_vec = irq - CPM_IRQ_OFFSET; - - out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec)); -} - -struct hw_interrupt_type cpm_pic = { - .typename = " CPM ", - .enable = cpm_unmask_irq, - .disable = cpm_mask_irq, - .ack = cpm_ack, - .end = cpm_eoi, -}; - -void -m8xx_cpm_reset(void) -{ - volatile immap_t *imp; - volatile cpm8xx_t *commproc; - - imp = (immap_t *)IMAP_ADDR; - commproc = (cpm8xx_t *)&imp->im_cpm; - -#ifdef CONFIG_UCODE_PATCH - /* Perform a reset. - */ - commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG); - - /* Wait for it. - */ - while (commproc->cp_cpcr & CPM_CR_FLG); - - cpm_load_patch(imp); -#endif - - /* Set SDMA Bus Request priority 5. - * On 860T, this also enables FEC priority 6. I am not sure - * this is what we really want for some applications, but the - * manual recommends it. - * Bit 25, FAM can also be set to use FEC aggressive mode (860T). - */ - out_be32(&imp->im_siu_conf.sc_sdcr, 1), - - /* Reclaim the DP memory for our use. */ - m8xx_cpm_dpinit(); - - /* Tell everyone where the comm processor resides. - */ - cpmp = (cpm8xx_t *)commproc; -} - -/* This is called during init_IRQ. We used to do it above, but this - * was too early since init_IRQ was not yet called. - */ -static struct irqaction cpm_error_irqaction = { - .handler = cpm_error_interrupt, - .mask = CPU_MASK_NONE, -}; -static struct irqaction cpm_interrupt_irqaction = { - .handler = cpm_interrupt, - .mask = CPU_MASK_NONE, - .name = "CPM cascade", -}; - -void -cpm_interrupt_init(void) -{ - int i; - - /* Initialize the CPM interrupt controller. - */ - out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, - (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | - ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK); - out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0); - - /* install the CPM interrupt controller routines for the CPM - * interrupt vectors - */ - for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ ) - irq_desc[i].chip = &cpm_pic; - - /* Set our interrupt handler with the core CPU. */ - if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction)) - panic("Could not allocate CPM IRQ!"); - - /* Install our own error handler. */ - cpm_error_irqaction.name = cpm_int_name[CPMVEC_ERROR]; - if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) - panic("Could not allocate CPM error IRQ!"); - - setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN); -} - -/* - * Get the CPM interrupt vector. - */ -int -cpm_get_irq(void) -{ - int cpm_vec; - - /* Get the vector by setting the ACK bit and then reading - * the register. - */ - out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1); - cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr); - cpm_vec >>= 11; - - return cpm_vec; -} - -/* CPM interrupt controller cascade interrupt. -*/ -static irqreturn_t -cpm_interrupt(int irq, void * dev) -{ - /* This interrupt handler never actually gets called. It is - * installed only to unmask the CPM cascade interrupt in the SIU - * and to make the CPM cascade interrupt visible in /proc/interrupts. - */ - return IRQ_HANDLED; -} - -/* The CPM can generate the error interrupt when there is a race condition - * between generating and masking interrupts. All we have to do is ACK it - * and return. This is a no-op function so we don't need any special - * tests in the interrupt handler. - */ -static irqreturn_t -cpm_error_interrupt(int irq, void *dev) -{ - return IRQ_HANDLED; -} - -/* A helper function to translate the handler prototype required by - * request_irq() to the handler prototype required by cpm_install_handler(). - */ -static irqreturn_t -cpm_handler_helper(int irq, void *dev_id) -{ - int cpm_vec = irq - CPM_IRQ_OFFSET; - - (*cpm_vecs[cpm_vec].handler)(dev_id); - - return IRQ_HANDLED; -} - -/* Install a CPM interrupt handler. - * This routine accepts a CPM interrupt vector in the range 0 to 31. - * This routine is retained for backward compatibility. Rather than using - * this routine to install a CPM interrupt handler, you can now use - * request_irq() with an IRQ in the range CPM_IRQ_OFFSET to - * CPM_IRQ_OFFSET + NR_CPM_INTS - 1 (16 to 47). - * - * Notice that the prototype of the interrupt handler function must be - * different depending on whether you install the handler with - * request_irq() or cpm_install_handler(). - */ -void -cpm_install_handler(int cpm_vec, void (*handler)(void *), void *dev_id) -{ - int err; - - /* If null handler, assume we are trying to free the IRQ. - */ - if (!handler) { - free_irq(CPM_IRQ_OFFSET + cpm_vec, dev_id); - return; - } - - if (cpm_vecs[cpm_vec].handler != 0) - printk(KERN_INFO "CPM interrupt %x replacing %x\n", - (uint)handler, (uint)cpm_vecs[cpm_vec].handler); - cpm_vecs[cpm_vec].handler = handler; - cpm_vecs[cpm_vec].dev_id = dev_id; - - if ((err = request_irq(CPM_IRQ_OFFSET + cpm_vec, cpm_handler_helper, - 0, cpm_int_name[cpm_vec], dev_id))) - printk(KERN_ERR "request_irq() returned %d for CPM vector %d\n", - err, cpm_vec); -} - -/* Free a CPM interrupt handler. - * This routine accepts a CPM interrupt vector in the range 0 to 31. - * This routine is retained for backward compatibility. - */ -void -cpm_free_handler(int cpm_vec) -{ - request_irq(CPM_IRQ_OFFSET + cpm_vec, NULL, 0, 0, - cpm_vecs[cpm_vec].dev_id); - - cpm_vecs[cpm_vec].handler = NULL; - cpm_vecs[cpm_vec].dev_id = NULL; -} - -/* Set a baud rate generator. This needs lots of work. There are - * four BRGs, any of which can be wired to any channel. - * The internal baud rate clock is the system clock divided by 16. - * This assumes the baudrate is 16x oversampled by the uart. - */ -#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq) -#define BRG_UART_CLK (BRG_INT_CLK/16) -#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16) - -void -cpm_setbrg(uint brg, uint rate) -{ - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - bp = (uint *)&cpmp->cp_brgc1; - bp += brg; - /* The BRG has a 12-bit counter. For really slow baud rates (or - * really fast processors), we may have to further divide by 16. - */ - if (((BRG_UART_CLK / rate) - 1) < 4096) - *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN; - else - *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) | - CPM_BRG_EN | CPM_BRG_DIV16; -} - -/* - * dpalloc / dpfree bits. - */ -static spinlock_t cpm_dpmem_lock; -/* - * 16 blocks should be enough to satisfy all requests - * until the memory subsystem goes up... - */ -static rh_block_t cpm_boot_dpmem_rh_block[16]; -static rh_info_t cpm_dpmem_info; - -#define CPM_DPMEM_ALIGNMENT 8 -static u8* dpram_vbase; -static uint dpram_pbase; - -void m8xx_cpm_dpinit(void) -{ - spin_lock_init(&cpm_dpmem_lock); - - dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE); - dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem; - - /* Initialize the info header */ - rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT, - sizeof(cpm_boot_dpmem_rh_block) / - sizeof(cpm_boot_dpmem_rh_block[0]), - cpm_boot_dpmem_rh_block); - - /* - * Attach the usable dpmem area. - * XXX: This is actually crap. CPM_DATAONLY_BASE and - * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies - * with the processor and the microcode patches applied / activated. - * But the following should be at least safe. - */ - rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); -} - -/* - * Allocate the requested size worth of DP memory. - * This function returns an offset into the DPRAM area. - * Use cpm_dpram_addr() to get the virtual address of the area. - */ -unsigned long cpm_dpalloc(uint size, uint align) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - cpm_dpmem_info.alignment = align; - start = rh_alloc(&cpm_dpmem_info, size, "commproc"); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return start; -} -EXPORT_SYMBOL(cpm_dpalloc); - -int cpm_dpfree(unsigned long offset) -{ - int ret; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - ret = rh_free(&cpm_dpmem_info, offset); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return ret; -} -EXPORT_SYMBOL(cpm_dpfree); - -unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - cpm_dpmem_info.alignment = align; - start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc"); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return start; -} -EXPORT_SYMBOL(cpm_dpalloc_fixed); - -void cpm_dpdump(void) -{ - rh_dump(&cpm_dpmem_info); -} -EXPORT_SYMBOL(cpm_dpdump); - -void *cpm_dpram_addr(unsigned long offset) -{ - return (void *)(dpram_vbase + offset); -} -EXPORT_SYMBOL(cpm_dpram_addr); - -uint cpm_dpram_phys(u8* addr) -{ - return (dpram_pbase + (uint)(addr - dpram_vbase)); -} -EXPORT_SYMBOL(cpm_dpram_phys); diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c deleted file mode 100644 index 5899aea1644b332460f0a5c9b410ee03d3e68c44..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/enet.c +++ /dev/null @@ -1,982 +0,0 @@ -/* - * Ethernet driver for Motorola MPC8xx. - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * I copied the basic skeleton from the lance driver, because I did not - * know how to write the Linux driver, but I did know how the LANCE worked. - * - * This version of the driver is somewhat selectable for the different - * processor/board combinations. It works for the boards I know about - * now, and should be easily modified to include others. Some of the - * configuration information is contained in and the - * remainder is here. - * - * Buffer descriptors are kept in the CPM dual port RAM, and the frame - * buffers are in the host memory. - * - * Right now, I am very watseful with the buffers. I allocate memory - * pages and then divide them into 2K frame buffers. This way I know I - * have buffers large enough to hold one frame within one buffer descriptor. - * Once I get this working, I will use 64 or 128 byte CPM buffers, which - * will be much more memory efficient and will easily handle lots of - * small packets. - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -/* - * Theory of Operation - * - * The MPC8xx CPM performs the Ethernet processing on SCC1. It can use - * an aribtrary number of buffers on byte boundaries, but must have at - * least two receive buffers to prevent constant overrun conditions. - * - * The buffer descriptors are allocated from the CPM dual port memory - * with the data buffers allocated from host memory, just like all other - * serial communication protocols. The host memory buffers are allocated - * from the free page pool, and then divided into smaller receive and - * transmit buffers. The size of the buffers should be a power of two, - * since that nicely divides the page. This creates a ring buffer - * structure similar to the LANCE and other controllers. - * - * Like the LANCE driver: - * The driver runs as two independent, single-threaded flows of control. One - * is the send-packet routine, which enforces single-threaded use by the - * cep->tx_busy flag. The other thread is the interrupt handler, which is - * single threaded by the hardware and other software. - * - * The send packet thread has partial control over the Tx ring and the - * 'cep->tx_busy' flag. It sets the tx_busy flag whenever it's queuing a Tx - * packet. If the next queue slot is empty, it clears the tx_busy flag when - * finished otherwise it sets the 'lp->tx_full' flag. - * - * The MBX has a control register external to the MPC8xx that has some - * control of the Ethernet interface. Information is in the manual for - * your board. - * - * The RPX boards have an external control/status register. Consult the - * programming documents for details unique to your board. - * - * For the TQM8xx(L) modules, there is no control register interface. - * All functions are directly controlled using I/O pins. See . - */ - -/* The transmitter timeout - */ -#define TX_TIMEOUT (2*HZ) - -/* The number of Tx and Rx buffers. These are allocated from the page - * pool. The code may assume these are power of two, so it is best - * to keep them that size. - * We don't need to allocate pages for the transmitter. We just use - * the skbuffer directly. - */ -#ifdef CONFIG_ENET_BIG_BUFFERS -#define CPM_ENET_RX_PAGES 32 -#define CPM_ENET_RX_FRSIZE 2048 -#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE) -#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES) -#define TX_RING_SIZE 64 /* Must be power of two */ -#define TX_RING_MOD_MASK 63 /* for this to work */ -#else -#define CPM_ENET_RX_PAGES 4 -#define CPM_ENET_RX_FRSIZE 2048 -#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE) -#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES) -#define TX_RING_SIZE 8 /* Must be power of two */ -#define TX_RING_MOD_MASK 7 /* for this to work */ -#endif - -/* The CPM stores dest/src/type, data, and checksum for receive packets. - */ -#define PKT_MAXBUF_SIZE 1518 -#define PKT_MINBUF_SIZE 64 -#define PKT_MAXBLR_SIZE 1520 - -/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and - * tx_bd_base always point to the base of the buffer descriptors. The - * cur_rx and cur_tx point to the currently available buffer. - * The dirty_tx tracks the current buffer that is being sent by the - * controller. The cur_tx and dirty_tx are equal under both completely - * empty and completely full conditions. The empty/ready indicator in - * the buffer descriptor determines the actual condition. - */ -struct scc_enet_private { - /* The saved address of a sent-in-place packet/buffer, for skfree(). */ - struct sk_buff* tx_skbuff[TX_RING_SIZE]; - ushort skb_cur; - ushort skb_dirty; - - /* CPM dual port RAM relative addresses. - */ - cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ - cbd_t *tx_bd_base; - cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ - cbd_t *dirty_tx; /* The ring entries to be free()ed. */ - scc_t *sccp; - - /* Virtual addresses for the receive buffers because we can't - * do a __va() on them anymore. - */ - unsigned char *rx_vaddr[RX_RING_SIZE]; - struct net_device_stats stats; - uint tx_full; - spinlock_t lock; -}; - -static int scc_enet_open(struct net_device *dev); -static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); -static int scc_enet_rx(struct net_device *dev); -static void scc_enet_interrupt(void *dev_id); -static int scc_enet_close(struct net_device *dev); -static struct net_device_stats *scc_enet_get_stats(struct net_device *dev); -static void set_multicast_list(struct net_device *dev); - -/* Get this from various configuration locations (depends on board). -*/ -/*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/ - -/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards - * use SCC2. Some even may use SCC3. - * This is easily extended if necessary. - */ -#if defined(CONFIG_SCC3_ENET) -#define CPM_CR_ENET CPM_CR_CH_SCC3 -#define PROFF_ENET PROFF_SCC3 -#define SCC_ENET 2 /* Index, not number! */ -#define CPMVEC_ENET CPMVEC_SCC3 -#elif defined(CONFIG_SCC2_ENET) -#define CPM_CR_ENET CPM_CR_CH_SCC2 -#define PROFF_ENET PROFF_SCC2 -#define SCC_ENET 1 /* Index, not number! */ -#define CPMVEC_ENET CPMVEC_SCC2 -#elif defined(CONFIG_SCC1_ENET) -#define CPM_CR_ENET CPM_CR_CH_SCC1 -#define PROFF_ENET PROFF_SCC1 -#define SCC_ENET 0 /* Index, not number! */ -#define CPMVEC_ENET CPMVEC_SCC1 -#else -#error CONFIG_SCCx_ENET not defined -#endif - -static int -scc_enet_open(struct net_device *dev) -{ - - /* I should reset the ring buffers here, but I don't yet know - * a simple way to do that. - */ - - netif_start_queue(dev); - return 0; /* Always succeed */ -} - -static int -scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - volatile cbd_t *bdp; - - /* Fill in a Tx ring entry */ - bdp = cep->cur_tx; - -#ifndef final_version - if (bdp->cbd_sc & BD_ENET_TX_READY) { - /* Ooops. All transmit buffers are full. Bail out. - * This should not happen, since cep->tx_busy should be set. - */ - printk("%s: tx queue full!.\n", dev->name); - return 1; - } -#endif - - /* Clear all of the status flags. - */ - bdp->cbd_sc &= ~BD_ENET_TX_STATS; - - /* If the frame is short, tell CPM to pad it. - */ - if (skb->len <= ETH_ZLEN) - bdp->cbd_sc |= BD_ENET_TX_PAD; - else - bdp->cbd_sc &= ~BD_ENET_TX_PAD; - - /* Set buffer length and buffer pointer. - */ - bdp->cbd_datlen = skb->len; - bdp->cbd_bufaddr = __pa(skb->data); - - /* Save skb pointer. - */ - cep->tx_skbuff[cep->skb_cur] = skb; - - cep->stats.tx_bytes += skb->len; - cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK; - - /* Push the data cache so the CPM does not get stale memory - * data. - */ - flush_dcache_range((unsigned long)(skb->data), - (unsigned long)(skb->data + skb->len)); - - spin_lock_irq(&cep->lock); - - /* Send it on its way. Tell CPM its ready, interrupt when done, - * its the last BD of the frame, and to put the CRC on the end. - */ - bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC); - - dev->trans_start = jiffies; - - /* If this was the last BD in the ring, start at the beginning again. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - if (bdp->cbd_sc & BD_ENET_TX_READY) { - netif_stop_queue(dev); - cep->tx_full = 1; - } - - cep->cur_tx = (cbd_t *)bdp; - - spin_unlock_irq(&cep->lock); - - return 0; -} - -static void -scc_enet_timeout(struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - - printk("%s: transmit timed out.\n", dev->name); - cep->stats.tx_errors++; -#ifndef final_version - { - int i; - cbd_t *bdp; - printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n", - cep->cur_tx, cep->tx_full ? " (full)" : "", - cep->cur_rx); - bdp = cep->tx_bd_base; - for (i = 0 ; i < TX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - bdp = cep->rx_bd_base; - for (i = 0 ; i < RX_RING_SIZE; i++, bdp++) - printk("%04x %04x %08x\n", - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - } -#endif - if (!cep->tx_full) - netif_wake_queue(dev); -} - -/* The interrupt handler. - * This is called from the CPM handler, not the MPC core interrupt. - */ -static void -scc_enet_interrupt(void *dev_id) -{ - struct net_device *dev = dev_id; - volatile struct scc_enet_private *cep; - volatile cbd_t *bdp; - ushort int_events; - int must_restart; - - cep = (struct scc_enet_private *)dev->priv; - - /* Get the interrupt events that caused us to be here. - */ - int_events = cep->sccp->scc_scce; - cep->sccp->scc_scce = int_events; - must_restart = 0; - - /* Handle receive event in its own function. - */ - if (int_events & SCCE_ENET_RXF) - scc_enet_rx(dev_id); - - /* Check for a transmit error. The manual is a little unclear - * about this, so the debug code until I get it figured out. It - * appears that if TXE is set, then TXB is not set. However, - * if carrier sense is lost during frame transmission, the TXE - * bit is set, "and continues the buffer transmission normally." - * I don't know if "normally" implies TXB is set when the buffer - * descriptor is closed.....trial and error :-). - */ - - /* Transmit OK, or non-fatal error. Update the buffer descriptors. - */ - if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) { - spin_lock(&cep->lock); - bdp = cep->dirty_tx; - while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) { - if ((bdp==cep->cur_tx) && (cep->tx_full == 0)) - break; - - if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */ - cep->stats.tx_heartbeat_errors++; - if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */ - cep->stats.tx_window_errors++; - if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */ - cep->stats.tx_aborted_errors++; - if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */ - cep->stats.tx_fifo_errors++; - if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */ - cep->stats.tx_carrier_errors++; - - - /* No heartbeat or Lost carrier are not really bad errors. - * The others require a restart transmit command. - */ - if (bdp->cbd_sc & - (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) { - must_restart = 1; - cep->stats.tx_errors++; - } - - cep->stats.tx_packets++; - - /* Deferred means some collisions occurred during transmit, - * but we eventually sent the packet OK. - */ - if (bdp->cbd_sc & BD_ENET_TX_DEF) - cep->stats.collisions++; - - /* Free the sk buffer associated with this last transmit. - */ - dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]); - cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK; - - /* Update pointer to next buffer descriptor to be transmitted. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = cep->tx_bd_base; - else - bdp++; - - /* I don't know if we can be held off from processing these - * interrupts for more than one frame time. I really hope - * not. In such a case, we would now want to check the - * currently available BD (cur_tx) and determine if any - * buffers between the dirty_tx and cur_tx have also been - * sent. We would want to process anything in between that - * does not have BD_ENET_TX_READY set. - */ - - /* Since we have freed up a buffer, the ring is no longer - * full. - */ - if (cep->tx_full) { - cep->tx_full = 0; - if (netif_queue_stopped(dev)) - netif_wake_queue(dev); - } - - cep->dirty_tx = (cbd_t *)bdp; - } - - if (must_restart) { - volatile cpm8xx_t *cp; - - /* Some transmit errors cause the transmitter to shut - * down. We now issue a restart transmit. Since the - * errors close the BD and update the pointers, the restart - * _should_ pick up without having to reset any of our - * pointers either. - */ - cp = cpmp; - cp->cp_cpcr = - mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - } - spin_unlock(&cep->lock); - } - - /* Check for receive busy, i.e. packets coming but no place to - * put them. This "can't happen" because the receive interrupt - * is tossing previous frames. - */ - if (int_events & SCCE_ENET_BSY) { - cep->stats.rx_dropped++; - printk("CPM ENET: BSY can't happen.\n"); - } - - return; -} - -/* During a receive, the cur_rx points to the current incoming buffer. - * When we update through the ring, if the next incoming buffer has - * not been given to the system, we just set the empty indicator, - * effectively tossing the packet. - */ -static int -scc_enet_rx(struct net_device *dev) -{ - struct scc_enet_private *cep; - volatile cbd_t *bdp; - struct sk_buff *skb; - ushort pkt_len; - - cep = (struct scc_enet_private *)dev->priv; - - /* First, grab all of the stats for the incoming packet. - * These get messed up if we get called due to a busy condition. - */ - bdp = cep->cur_rx; - -for (;;) { - if (bdp->cbd_sc & BD_ENET_RX_EMPTY) - break; - -#ifndef final_version - /* Since we have allocated space to hold a complete frame, both - * the first and last indicators should be set. - */ - if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) != - (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) - printk("CPM ENET: rcv is not first+last\n"); -#endif - - /* Frame too long or too short. - */ - if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) - cep->stats.rx_length_errors++; - if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */ - cep->stats.rx_frame_errors++; - if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */ - cep->stats.rx_crc_errors++; - if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */ - cep->stats.rx_crc_errors++; - - /* Report late collisions as a frame error. - * On this error, the BD is closed, but we don't know what we - * have in the buffer. So, just drop this frame on the floor. - */ - if (bdp->cbd_sc & BD_ENET_RX_CL) { - cep->stats.rx_frame_errors++; - } - else { - - /* Process the incoming frame. - */ - cep->stats.rx_packets++; - pkt_len = bdp->cbd_datlen; - cep->stats.rx_bytes += pkt_len; - - /* This does 16 byte alignment, much more than we need. - * The packet length includes FCS, but we don't want to - * include that when passing upstream as it messes up - * bridging applications. - */ - skb = dev_alloc_skb(pkt_len-4); - - if (skb == NULL) { - printk("%s: Memory squeeze, dropping packet.\n", dev->name); - cep->stats.rx_dropped++; - } - else { - skb_put(skb,pkt_len-4); /* Make room */ - skb_copy_to_linear_data(skb, - cep->rx_vaddr[bdp - cep->rx_bd_base], - pkt_len-4); - skb->protocol=eth_type_trans(skb,dev); - netif_rx(skb); - } - } - - /* Clear the status flags for this buffer. - */ - bdp->cbd_sc &= ~BD_ENET_RX_STATS; - - /* Mark the buffer empty. - */ - bdp->cbd_sc |= BD_ENET_RX_EMPTY; - - /* Update BD pointer to next entry. - */ - if (bdp->cbd_sc & BD_ENET_RX_WRAP) - bdp = cep->rx_bd_base; - else - bdp++; - - } - cep->cur_rx = (cbd_t *)bdp; - - return 0; -} - -static int -scc_enet_close(struct net_device *dev) -{ - /* Don't know what to do yet. - */ - netif_stop_queue(dev); - - return 0; -} - -static struct net_device_stats *scc_enet_get_stats(struct net_device *dev) -{ - struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv; - - return &cep->stats; -} - -/* Set or clear the multicast filter for this adaptor. - * Skeleton taken from sunlance driver. - * The CPM Ethernet implementation allows Multicast as well as individual - * MAC address filtering. Some of the drivers check to make sure it is - * a group multicast address, and discard those that are not. I guess I - * will do the same for now, but just remove the test if you want - * individual filtering as well (do the upper net layers want or support - * this kind of feature?). - */ - -static void set_multicast_list(struct net_device *dev) -{ - struct scc_enet_private *cep; - struct dev_mc_list *dmi; - u_char *mcptr, *tdptr; - volatile scc_enet_t *ep; - int i, j; - cep = (struct scc_enet_private *)dev->priv; - - /* Get pointer to SCC area in parameter RAM. - */ - ep = (scc_enet_t *)dev->base_addr; - - if (dev->flags&IFF_PROMISC) { - - /* Log any net taps. */ - printk("%s: Promiscuous mode enabled.\n", dev->name); - cep->sccp->scc_psmr |= SCC_PSMR_PRO; - } else { - - cep->sccp->scc_psmr &= ~SCC_PSMR_PRO; - - if (dev->flags & IFF_ALLMULTI) { - /* Catch all multicast addresses, so set the - * filter to all 1's. - */ - ep->sen_gaddr1 = 0xffff; - ep->sen_gaddr2 = 0xffff; - ep->sen_gaddr3 = 0xffff; - ep->sen_gaddr4 = 0xffff; - } - else { - /* Clear filter and add the addresses in the list. - */ - ep->sen_gaddr1 = 0; - ep->sen_gaddr2 = 0; - ep->sen_gaddr3 = 0; - ep->sen_gaddr4 = 0; - - dmi = dev->mc_list; - - for (i=0; imc_count; i++) { - - /* Only support group multicast for now. - */ - if (!(dmi->dmi_addr[0] & 1)) - continue; - - /* The address in dmi_addr is LSB first, - * and taddr is MSB first. We have to - * copy bytes MSB first from dmi_addr. - */ - mcptr = (u_char *)dmi->dmi_addr + 5; - tdptr = (u_char *)&ep->sen_taddrh; - for (j=0; j<6; j++) - *tdptr++ = *mcptr--; - - /* Ask CPM to run CRC and set bit in - * filter mask. - */ - cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG; - /* this delay is necessary here -- Cort */ - udelay(10); - while (cpmp->cp_cpcr & CPM_CR_FLG); - } - } - } -} - -/* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed - * some other network I/O, a whole bunch of this has already been set up. - * It is no big deal if we do it again, we just have to disable the - * transmit and receive to make sure we don't catch the CPM with some - * inconsistent control information. - */ -static int __init scc_enet_init(void) -{ - struct net_device *dev; - struct scc_enet_private *cep; - int i, j, k, err; - uint dp_offset; - unsigned char *eap, *ba; - dma_addr_t mem_addr; - bd_t *bd; - volatile cbd_t *bdp; - volatile cpm8xx_t *cp; - volatile scc_t *sccp; - volatile scc_enet_t *ep; - volatile immap_t *immap; - - cp = cpmp; /* Get pointer to Communication Processor */ - - immap = (immap_t *)(mfspr(SPRN_IMMR) & 0xFFFF0000); /* and to internal registers */ - - bd = (bd_t *)__res; - - dev = alloc_etherdev(sizeof(*cep)); - if (!dev) - return -ENOMEM; - - cep = dev->priv; - spin_lock_init(&cep->lock); - - /* Get pointer to SCC area in parameter RAM. - */ - ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]); - - /* And another to the SCC register area. - */ - sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]); - cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */ - - /* Disable receive and transmit in case EPPC-Bug started it. - */ - sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - /* Cookbook style from the MPC860 manual..... - * Not all of this is necessary if EPPC-Bug has initialized - * the network. - * So far we are lucky, all board configurations use the same - * pins, or at least the same I/O Port for these functions..... - * It can't last though...... - */ - -#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD)) - /* Configure port A pins for Txd and Rxd. - */ - immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD); - immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD); - immap->im_ioport.iop_paodr &= ~PA_ENET_TXD; -#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD)) - /* Configure port B pins for Txd and Rxd. - */ - immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD); - immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD); - immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD; -#else -#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined -#endif - -#if defined(PC_ENET_LBK) - /* Configure port C pins to disable External Loopback - */ - immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK; - immap->im_ioport.iop_pcdir |= PC_ENET_LBK; - immap->im_ioport.iop_pcso &= ~PC_ENET_LBK; - immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */ -#endif /* PC_ENET_LBK */ - -#ifdef PE_ENET_TCLK - /* Configure port E for TCLK and RCLK. - */ - cp->cp_pepar |= (PE_ENET_TCLK | PE_ENET_RCLK); - cp->cp_pedir &= ~(PE_ENET_TCLK | PE_ENET_RCLK); - cp->cp_peso &= ~(PE_ENET_TCLK | PE_ENET_RCLK); -#else - /* Configure port A for TCLK and RCLK. - */ - immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK); - immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK); -#endif - - /* Configure port C pins to enable CLSN and RENA. - */ - immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA); - immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA); - immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA); - - /* Configure Serial Interface clock routing. - * First, clear all SCC bits to zero, then set the ones we want. - */ - cp->cp_sicr &= ~SICR_ENET_MASK; - cp->cp_sicr |= SICR_ENET_CLKRT; - - /* Manual says set SDDR, but I can't find anything with that - * name. I think it is a misprint, and should be SDCR. This - * has already been set by the communication processor initialization. - */ - - /* Allocate space for the buffer descriptors in the DP ram. - * These are relative offsets in the DP ram address space. - * Initialize base addresses for the buffer descriptors. - */ - dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8); - ep->sen_genscc.scc_rbase = dp_offset; - cep->rx_bd_base = cpm_dpram_addr(dp_offset); - - dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8); - ep->sen_genscc.scc_tbase = dp_offset; - cep->tx_bd_base = cpm_dpram_addr(dp_offset); - - cep->dirty_tx = cep->cur_tx = cep->tx_bd_base; - cep->cur_rx = cep->rx_bd_base; - - /* Issue init Rx BD command for SCC. - * Manual says to perform an Init Rx parameters here. We have - * to perform both Rx and Tx because the SCC may have been - * already running. - * In addition, we have to do it later because we don't yet have - * all of the BD control/status set properly. - cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - */ - - /* Initialize function code registers for big-endian. - */ - ep->sen_genscc.scc_rfcr = SCC_EB; - ep->sen_genscc.scc_tfcr = SCC_EB; - - /* Set maximum bytes per receive buffer. - * This appears to be an Ethernet frame size, not the buffer - * fragment size. It must be a multiple of four. - */ - ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE; - - /* Set CRC preset and mask. - */ - ep->sen_cpres = 0xffffffff; - ep->sen_cmask = 0xdebb20e3; - - ep->sen_crcec = 0; /* CRC Error counter */ - ep->sen_alec = 0; /* alignment error counter */ - ep->sen_disfc = 0; /* discard frame counter */ - - ep->sen_pads = 0x8888; /* Tx short frame pad character */ - ep->sen_retlim = 15; /* Retry limit threshold */ - - ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */ - ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */ - - ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */ - ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */ - - /* Clear hash tables. - */ - ep->sen_gaddr1 = 0; - ep->sen_gaddr2 = 0; - ep->sen_gaddr3 = 0; - ep->sen_gaddr4 = 0; - ep->sen_iaddr1 = 0; - ep->sen_iaddr2 = 0; - ep->sen_iaddr3 = 0; - ep->sen_iaddr4 = 0; - - /* Set Ethernet station address. - */ - eap = (unsigned char *)&(ep->sen_paddrh); - for (i=5; i>=0; i--) - *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i]; - - ep->sen_pper = 0; /* 'cause the book says so */ - ep->sen_taddrl = 0; /* temp address (LSB) */ - ep->sen_taddrm = 0; - ep->sen_taddrh = 0; /* temp address (MSB) */ - - /* Now allocate the host memory pages and initialize the - * buffer descriptors. - */ - bdp = cep->tx_bd_base; - for (i=0; icbd_sc = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - bdp = cep->rx_bd_base; - k = 0; - for (i=0; icbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR; - bdp->cbd_bufaddr = mem_addr; - cep->rx_vaddr[k++] = ba; - mem_addr += CPM_ENET_RX_FRSIZE; - ba += CPM_ENET_RX_FRSIZE; - bdp++; - } - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* Let's re-initialize the channel now. We have to do it later - * than the manual describes because we have just now finished - * the BD initialization. - */ - cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - cep->skb_cur = cep->skb_dirty = 0; - - sccp->scc_scce = 0xffff; /* Clear any pending events */ - - /* Enable interrupts for transmit error, complete frame - * received, and any transmit buffer we have also set the - * interrupt flag. - */ - sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); - - /* Install our interrupt handler. - */ - cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev); - - /* Set GSMR_H to enable all normal operating modes. - * Set GSMR_L to enable Ethernet to MC68160. - */ - sccp->scc_gsmrh = 0; - sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET); - - /* Set sync/delimiters. - */ - sccp->scc_dsr = 0xd555; - - /* Set processing mode. Use Ethernet CRC, catch broadcast, and - * start frame search 22 bit times after RENA. - */ - sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22); - - /* It is now OK to enable the Ethernet transmitter. - * Unfortunately, there are board implementation differences here. - */ -#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA) && !defined (PE_ENET_TENA)) - immap->im_ioport.iop_pcpar |= PC_ENET_TENA; - immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA; -#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && !defined (PE_ENET_TENA)) - cp->cp_pbpar |= PB_ENET_TENA; - cp->cp_pbdir |= PB_ENET_TENA; -#elif ( !defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && defined (PE_ENET_TENA)) - cp->cp_pepar |= PE_ENET_TENA; - cp->cp_pedir &= ~PE_ENET_TENA; - cp->cp_peso |= PE_ENET_TENA; -#else -#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA, PE_ENET_TENA -#endif - -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) - /* And while we are here, set the configuration to enable ethernet. - */ - *((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK; - *((volatile uint *)RPX_CSR_ADDR) |= - (BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS); -#endif - -#ifdef CONFIG_BSEIP - /* BSE uses port B and C for PHY control. - */ - cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS); - cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS); - cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS); - - immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK; - immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK; - immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK; - immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK; -#endif - -#ifdef CONFIG_FADS - cp->cp_pbpar |= PB_ENET_TENA; - cp->cp_pbdir |= PB_ENET_TENA; - - /* Enable the EEST PHY. - */ - *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN; -#endif - - dev->base_addr = (unsigned long)ep; -#if 0 - dev->name = "CPM_ENET"; -#endif - - /* The CPM Ethernet specific entries in the device structure. */ - dev->open = scc_enet_open; - dev->hard_start_xmit = scc_enet_start_xmit; - dev->tx_timeout = scc_enet_timeout; - dev->watchdog_timeo = TX_TIMEOUT; - dev->stop = scc_enet_close; - dev->get_stats = scc_enet_get_stats; - dev->set_multicast_list = set_multicast_list; - - err = register_netdev(dev); - if (err) { - free_netdev(dev); - return err; - } - - /* And last, enable the transmit and receive processing. - */ - sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1); - for (i=0; i<5; i++) - printk("%02x:", dev->dev_addr[i]); - printk("%02x\n", dev->dev_addr[5]); - - return 0; -} - -module_init(scc_enet_init); - diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c deleted file mode 100644 index 2c604d4f6e8b40f56c26767fcd5c2275b608b2ca..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/fec.c +++ /dev/null @@ -1,1983 +0,0 @@ -/* - * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * This version of the driver is specific to the FADS implementation, - * since the board contains control registers external to the processor - * for the control of the LevelOne LXT970 transceiver. The MPC860T manual - * describes connections using the internal parallel port I/O, which - * is basically all of Port D. - * - * Includes support for the following PHYs: QS6612, LXT970, LXT971/2. - * - * Right now, I am very wasteful with the buffers. I allocate memory - * pages and then divide them into 2K frame buffers. This way I know I - * have buffers large enough to hold one frame within one buffer descriptor. - * Once I get this working, I will use 64 or 128 byte CPM buffers, which - * will be much more memory efficient and will easily handle lots of - * small packets. - * - * Much better multiple PHY support by Magnus Damm. - * Copyright (c) 2000 Ericsson Radio Systems AB. - * - * Make use of MII for PHY control configurable. - * Some fixes. - * Copyright (c) 2000-2002 Wolfgang Denk, DENX Software Engineering. - * - * Support for AMD AM79C874 added. - * Thomas Lange, thomas@corelatus.com - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_FEC_PACKETHOOK -#include -#endif - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_USE_MDIO -/* Forward declarations of some structures to support different PHYs -*/ - -typedef struct { - uint mii_data; - void (*funct)(uint mii_reg, struct net_device *dev); -} phy_cmd_t; - -typedef struct { - uint id; - char *name; - - const phy_cmd_t *config; - const phy_cmd_t *startup; - const phy_cmd_t *ack_int; - const phy_cmd_t *shutdown; -} phy_info_t; -#endif /* CONFIG_USE_MDIO */ - -/* The number of Tx and Rx buffers. These are allocated from the page - * pool. The code may assume these are power of two, so it is best - * to keep them that size. - * We don't need to allocate pages for the transmitter. We just use - * the skbuffer directly. - */ -#ifdef CONFIG_ENET_BIG_BUFFERS -#define FEC_ENET_RX_PAGES 16 -#define FEC_ENET_RX_FRSIZE 2048 -#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) -#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) -#define TX_RING_SIZE 16 /* Must be power of two */ -#define TX_RING_MOD_MASK 15 /* for this to work */ -#else -#define FEC_ENET_RX_PAGES 4 -#define FEC_ENET_RX_FRSIZE 2048 -#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) -#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) -#define TX_RING_SIZE 8 /* Must be power of two */ -#define TX_RING_MOD_MASK 7 /* for this to work */ -#endif - -/* Interrupt events/masks. -*/ -#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */ -#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */ -#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */ -#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */ -#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */ -#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */ -#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */ -#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */ -#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ -#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ - -/* -*/ -#define FEC_ECNTRL_PINMUX 0x00000004 -#define FEC_ECNTRL_ETHER_EN 0x00000002 -#define FEC_ECNTRL_RESET 0x00000001 - -#define FEC_RCNTRL_BC_REJ 0x00000010 -#define FEC_RCNTRL_PROM 0x00000008 -#define FEC_RCNTRL_MII_MODE 0x00000004 -#define FEC_RCNTRL_DRT 0x00000002 -#define FEC_RCNTRL_LOOP 0x00000001 - -#define FEC_TCNTRL_FDEN 0x00000004 -#define FEC_TCNTRL_HBC 0x00000002 -#define FEC_TCNTRL_GTS 0x00000001 - -/* Delay to wait for FEC reset command to complete (in us) -*/ -#define FEC_RESET_DELAY 50 - -/* The FEC stores dest/src/type, data, and checksum for receive packets. - */ -#define PKT_MAXBUF_SIZE 1518 -#define PKT_MINBUF_SIZE 64 -#define PKT_MAXBLR_SIZE 1520 - -/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and - * tx_bd_base always point to the base of the buffer descriptors. The - * cur_rx and cur_tx point to the currently available buffer. - * The dirty_tx tracks the current buffer that is being sent by the - * controller. The cur_tx and dirty_tx are equal under both completely - * empty and completely full conditions. The empty/ready indicator in - * the buffer descriptor determines the actual condition. - */ -struct fec_enet_private { - /* The saved address of a sent-in-place packet/buffer, for skfree(). */ - struct sk_buff* tx_skbuff[TX_RING_SIZE]; - ushort skb_cur; - ushort skb_dirty; - - /* CPM dual port RAM relative addresses. - */ - cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ - cbd_t *tx_bd_base; - cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ - cbd_t *dirty_tx; /* The ring entries to be free()ed. */ - - /* Virtual addresses for the receive buffers because we can't - * do a __va() on them anymore. - */ - unsigned char *rx_vaddr[RX_RING_SIZE]; - - struct net_device_stats stats; - uint tx_full; - spinlock_t lock; - -#ifdef CONFIG_USE_MDIO - uint phy_id; - uint phy_id_done; - uint phy_status; - uint phy_speed; - phy_info_t *phy; - struct work_struct phy_task; - struct net_device *dev; - - uint sequence_done; - - uint phy_addr; -#endif /* CONFIG_USE_MDIO */ - - int link; - int old_link; - int full_duplex; - -#ifdef CONFIG_FEC_PACKETHOOK - unsigned long ph_lock; - fec_ph_func *ph_rxhandler; - fec_ph_func *ph_txhandler; - __u16 ph_proto; - volatile __u32 *ph_regaddr; - void *ph_priv; -#endif -}; - -static int fec_enet_open(struct net_device *dev); -static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); -#ifdef CONFIG_USE_MDIO -static void fec_enet_mii(struct net_device *dev); -#endif /* CONFIG_USE_MDIO */ -#ifdef CONFIG_FEC_PACKETHOOK -static void fec_enet_tx(struct net_device *dev, __u32 regval); -static void fec_enet_rx(struct net_device *dev, __u32 regval); -#else -static void fec_enet_tx(struct net_device *dev); -static void fec_enet_rx(struct net_device *dev); -#endif -static int fec_enet_close(struct net_device *dev); -static struct net_device_stats *fec_enet_get_stats(struct net_device *dev); -static void set_multicast_list(struct net_device *dev); -static void fec_restart(struct net_device *dev, int duplex); -static void fec_stop(struct net_device *dev); -static ushort my_enet_addr[3]; - -#ifdef CONFIG_USE_MDIO -/* MII processing. We keep this as simple as possible. Requests are - * placed on the list (if there is room). When the request is finished - * by the MII, an optional function may be called. - */ -typedef struct mii_list { - uint mii_regval; - void (*mii_func)(uint val, struct net_device *dev); - struct mii_list *mii_next; -} mii_list_t; - -#define NMII 20 -mii_list_t mii_cmds[NMII]; -mii_list_t *mii_free; -mii_list_t *mii_head; -mii_list_t *mii_tail; - -static int mii_queue(struct net_device *dev, int request, - void (*func)(uint, struct net_device *)); - -/* Make MII read/write commands for the FEC. -*/ -#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) -#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ - (VAL & 0xffff)) -#define mk_mii_end 0 -#endif /* CONFIG_USE_MDIO */ - -/* Transmitter timeout. -*/ -#define TX_TIMEOUT (2*HZ) - -#ifdef CONFIG_USE_MDIO -/* Register definitions for the PHY. -*/ - -#define MII_REG_CR 0 /* Control Register */ -#define MII_REG_SR 1 /* Status Register */ -#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ -#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ -#define MII_REG_ANAR 4 /* A-N Advertisement Register */ -#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ -#define MII_REG_ANER 6 /* A-N Expansion Register */ -#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ -#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */ - -/* values for phy_status */ - -#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ -#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ -#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ -#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ -#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ -#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ -#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ - -#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ -#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ -#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ -#define PHY_STAT_SPMASK 0xf000 /* mask for speed */ -#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ -#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ -#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ -#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ -#endif /* CONFIG_USE_MDIO */ - -#ifdef CONFIG_FEC_PACKETHOOK -int -fec_register_ph(struct net_device *dev, fec_ph_func *rxfun, fec_ph_func *txfun, - __u16 proto, volatile __u32 *regaddr, void *priv) -{ - struct fec_enet_private *fep; - int retval = 0; - - fep = dev->priv; - - if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) { - /* Someone is messing with the packet hook */ - return -EAGAIN; - } - if (fep->ph_rxhandler != NULL || fep->ph_txhandler != NULL) { - retval = -EBUSY; - goto out; - } - fep->ph_rxhandler = rxfun; - fep->ph_txhandler = txfun; - fep->ph_proto = proto; - fep->ph_regaddr = regaddr; - fep->ph_priv = priv; - - out: - fep->ph_lock = 0; - - return retval; -} - - -int -fec_unregister_ph(struct net_device *dev) -{ - struct fec_enet_private *fep; - int retval = 0; - - fep = dev->priv; - - if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) { - /* Someone is messing with the packet hook */ - return -EAGAIN; - } - - fep->ph_rxhandler = fep->ph_txhandler = NULL; - fep->ph_proto = 0; - fep->ph_regaddr = NULL; - fep->ph_priv = NULL; - - fep->ph_lock = 0; - - return retval; -} - -EXPORT_SYMBOL(fec_register_ph); -EXPORT_SYMBOL(fec_unregister_ph); - -#endif /* CONFIG_FEC_PACKETHOOK */ - -static int -fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct fec_enet_private *fep; - volatile fec_t *fecp; - volatile cbd_t *bdp; - - fep = dev->priv; - fecp = (volatile fec_t*)dev->base_addr; - - if (!fep->link) { - /* Link is down or autonegotiation is in progress. */ - return 1; - } - - /* Fill in a Tx ring entry */ - bdp = fep->cur_tx; - -#ifndef final_version - if (bdp->cbd_sc & BD_ENET_TX_READY) { - /* Ooops. All transmit buffers are full. Bail out. - * This should not happen, since dev->tbusy should be set. - */ - printk("%s: tx queue full!.\n", dev->name); - return 1; - } -#endif - - /* Clear all of the status flags. - */ - bdp->cbd_sc &= ~BD_ENET_TX_STATS; - - /* Set buffer length and buffer pointer. - */ - bdp->cbd_bufaddr = __pa(skb->data); - bdp->cbd_datlen = skb->len; - - /* Save skb pointer. - */ - fep->tx_skbuff[fep->skb_cur] = skb; - - fep->stats.tx_bytes += skb->len; - fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; - - /* Push the data cache so the CPM does not get stale memory - * data. - */ - flush_dcache_range((unsigned long)skb->data, - (unsigned long)skb->data + skb->len); - - /* disable interrupts while triggering transmit */ - spin_lock_irq(&fep->lock); - - /* Send it on its way. Tell FEC its ready, interrupt when done, - * its the last BD of the frame, and to put the CRC on the end. - */ - - bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR - | BD_ENET_TX_LAST | BD_ENET_TX_TC); - - dev->trans_start = jiffies; - - /* Trigger transmission start */ - fecp->fec_x_des_active = 0x01000000; - - /* If this was the last BD in the ring, start at the beginning again. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) { - bdp = fep->tx_bd_base; - } else { - bdp++; - } - - if (bdp->cbd_sc & BD_ENET_TX_READY) { - netif_stop_queue(dev); - fep->tx_full = 1; - } - - fep->cur_tx = (cbd_t *)bdp; - - spin_unlock_irq(&fep->lock); - - return 0; -} - -static void -fec_timeout(struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - - printk("%s: transmit timed out.\n", dev->name); - fep->stats.tx_errors++; -#ifndef final_version - { - int i; - cbd_t *bdp; - - printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n", - (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "", - (unsigned long)fep->dirty_tx, - (unsigned long)fep->cur_rx); - - bdp = fep->tx_bd_base; - printk(" tx: %u buffers\n", TX_RING_SIZE); - for (i = 0 ; i < TX_RING_SIZE; i++) { - printk(" %08x: %04x %04x %08x\n", - (uint) bdp, - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - bdp++; - } - - bdp = fep->rx_bd_base; - printk(" rx: %lu buffers\n", RX_RING_SIZE); - for (i = 0 ; i < RX_RING_SIZE; i++) { - printk(" %08x: %04x %04x %08x\n", - (uint) bdp, - bdp->cbd_sc, - bdp->cbd_datlen, - bdp->cbd_bufaddr); - bdp++; - } - } -#endif - if (!fep->tx_full) - netif_wake_queue(dev); -} - -/* The interrupt handler. - * This is called from the MPC core interrupt. - */ -static irqreturn_t -fec_enet_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - volatile fec_t *fecp; - uint int_events; -#ifdef CONFIG_FEC_PACKETHOOK - struct fec_enet_private *fep = dev->priv; - __u32 regval; - - if (fep->ph_regaddr) regval = *fep->ph_regaddr; -#endif - fecp = (volatile fec_t*)dev->base_addr; - - /* Get the interrupt events that caused us to be here. - */ - while ((int_events = fecp->fec_ievent) != 0) { - fecp->fec_ievent = int_events; - if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR | - FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) { - printk("FEC ERROR %x\n", int_events); - } - - /* Handle receive event in its own function. - */ - if (int_events & FEC_ENET_RXF) { -#ifdef CONFIG_FEC_PACKETHOOK - fec_enet_rx(dev, regval); -#else - fec_enet_rx(dev); -#endif - } - - /* Transmit OK, or non-fatal error. Update the buffer - descriptors. FEC handles all errors, we just discover - them as part of the transmit process. - */ - if (int_events & FEC_ENET_TXF) { -#ifdef CONFIG_FEC_PACKETHOOK - fec_enet_tx(dev, regval); -#else - fec_enet_tx(dev); -#endif - } - - if (int_events & FEC_ENET_MII) { -#ifdef CONFIG_USE_MDIO - fec_enet_mii(dev); -#else -printk("%s[%d] %s: unexpected FEC_ENET_MII event\n", __FILE__, __LINE__, __func__); -#endif /* CONFIG_USE_MDIO */ - } - - } - return IRQ_RETVAL(IRQ_HANDLED); -} - - -static void -#ifdef CONFIG_FEC_PACKETHOOK -fec_enet_tx(struct net_device *dev, __u32 regval) -#else -fec_enet_tx(struct net_device *dev) -#endif -{ - struct fec_enet_private *fep; - volatile cbd_t *bdp; - struct sk_buff *skb; - - fep = dev->priv; - /* lock while transmitting */ - spin_lock(&fep->lock); - bdp = fep->dirty_tx; - - while ((bdp->cbd_sc&BD_ENET_TX_READY) == 0) { - if (bdp == fep->cur_tx && fep->tx_full == 0) break; - - skb = fep->tx_skbuff[fep->skb_dirty]; - /* Check for errors. */ - if (bdp->cbd_sc & (BD_ENET_TX_HB | BD_ENET_TX_LC | - BD_ENET_TX_RL | BD_ENET_TX_UN | - BD_ENET_TX_CSL)) { - fep->stats.tx_errors++; - if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */ - fep->stats.tx_heartbeat_errors++; - if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */ - fep->stats.tx_window_errors++; - if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */ - fep->stats.tx_aborted_errors++; - if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */ - fep->stats.tx_fifo_errors++; - if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */ - fep->stats.tx_carrier_errors++; - } else { -#ifdef CONFIG_FEC_PACKETHOOK - /* Packet hook ... */ - if (fep->ph_txhandler && - ((struct ethhdr *)skb->data)->h_proto - == fep->ph_proto) { - fep->ph_txhandler((__u8*)skb->data, skb->len, - regval, fep->ph_priv); - } -#endif - fep->stats.tx_packets++; - } - -#ifndef final_version - if (bdp->cbd_sc & BD_ENET_TX_READY) - printk("HEY! Enet xmit interrupt and TX_READY.\n"); -#endif - /* Deferred means some collisions occurred during transmit, - * but we eventually sent the packet OK. - */ - if (bdp->cbd_sc & BD_ENET_TX_DEF) - fep->stats.collisions++; - - /* Free the sk buffer associated with this last transmit. - */ -#if 0 -printk("TXI: %x %x %x\n", bdp, skb, fep->skb_dirty); -#endif - dev_kfree_skb_irq (skb/*, FREE_WRITE*/); - fep->tx_skbuff[fep->skb_dirty] = NULL; - fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; - - /* Update pointer to next buffer descriptor to be transmitted. - */ - if (bdp->cbd_sc & BD_ENET_TX_WRAP) - bdp = fep->tx_bd_base; - else - bdp++; - - /* Since we have freed up a buffer, the ring is no longer - * full. - */ - if (fep->tx_full) { - fep->tx_full = 0; - if (netif_queue_stopped(dev)) - netif_wake_queue(dev); - } -#ifdef CONFIG_FEC_PACKETHOOK - /* Re-read register. Not exactly guaranteed to be correct, - but... */ - if (fep->ph_regaddr) regval = *fep->ph_regaddr; -#endif - } - fep->dirty_tx = (cbd_t *)bdp; - spin_unlock(&fep->lock); -} - - -/* During a receive, the cur_rx points to the current incoming buffer. - * When we update through the ring, if the next incoming buffer has - * not been given to the system, we just set the empty indicator, - * effectively tossing the packet. - */ -static void -#ifdef CONFIG_FEC_PACKETHOOK -fec_enet_rx(struct net_device *dev, __u32 regval) -#else -fec_enet_rx(struct net_device *dev) -#endif -{ - struct fec_enet_private *fep; - volatile fec_t *fecp; - volatile cbd_t *bdp; - struct sk_buff *skb; - ushort pkt_len; - __u8 *data; - - fep = dev->priv; - fecp = (volatile fec_t*)dev->base_addr; - - /* First, grab all of the stats for the incoming packet. - * These get messed up if we get called due to a busy condition. - */ - bdp = fep->cur_rx; - -while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) { - -#ifndef final_version - /* Since we have allocated space to hold a complete frame, - * the last indicator should be set. - */ - if ((bdp->cbd_sc & BD_ENET_RX_LAST) == 0) - printk("FEC ENET: rcv is not +last\n"); -#endif - - /* Check for errors. */ - if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | - BD_ENET_RX_CR | BD_ENET_RX_OV)) { - fep->stats.rx_errors++; - if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { - /* Frame too long or too short. */ - fep->stats.rx_length_errors++; - } - if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */ - fep->stats.rx_frame_errors++; - if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */ - fep->stats.rx_crc_errors++; - if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */ - fep->stats.rx_crc_errors++; - } - - /* Report late collisions as a frame error. - * On this error, the BD is closed, but we don't know what we - * have in the buffer. So, just drop this frame on the floor. - */ - if (bdp->cbd_sc & BD_ENET_RX_CL) { - fep->stats.rx_errors++; - fep->stats.rx_frame_errors++; - goto rx_processing_done; - } - - /* Process the incoming frame. - */ - fep->stats.rx_packets++; - pkt_len = bdp->cbd_datlen; - fep->stats.rx_bytes += pkt_len; - data = fep->rx_vaddr[bdp - fep->rx_bd_base]; - -#ifdef CONFIG_FEC_PACKETHOOK - /* Packet hook ... */ - if (fep->ph_rxhandler) { - if (((struct ethhdr *)data)->h_proto == fep->ph_proto) { - switch (fep->ph_rxhandler(data, pkt_len, regval, - fep->ph_priv)) { - case 1: - goto rx_processing_done; - break; - case 0: - break; - default: - fep->stats.rx_errors++; - goto rx_processing_done; - } - } - } - - /* If it wasn't filtered - copy it to an sk buffer. */ -#endif - - /* This does 16 byte alignment, exactly what we need. - * The packet length includes FCS, but we don't want to - * include that when passing upstream as it messes up - * bridging applications. - */ - skb = dev_alloc_skb(pkt_len-4); - - if (skb == NULL) { - printk("%s: Memory squeeze, dropping packet.\n", dev->name); - fep->stats.rx_dropped++; - } else { - skb_put(skb,pkt_len-4); /* Make room */ - skb_copy_to_linear_data(skb, data, pkt_len-4); - skb->protocol=eth_type_trans(skb,dev); - netif_rx(skb); - } - rx_processing_done: - - /* Clear the status flags for this buffer. - */ - bdp->cbd_sc &= ~BD_ENET_RX_STATS; - - /* Mark the buffer empty. - */ - bdp->cbd_sc |= BD_ENET_RX_EMPTY; - - /* Update BD pointer to next entry. - */ - if (bdp->cbd_sc & BD_ENET_RX_WRAP) - bdp = fep->rx_bd_base; - else - bdp++; - -#if 1 - /* Doing this here will keep the FEC running while we process - * incoming frames. On a heavily loaded network, we should be - * able to keep up at the expense of system resources. - */ - fecp->fec_r_des_active = 0x01000000; -#endif -#ifdef CONFIG_FEC_PACKETHOOK - /* Re-read register. Not exactly guaranteed to be correct, - but... */ - if (fep->ph_regaddr) regval = *fep->ph_regaddr; -#endif - } /* while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) */ - fep->cur_rx = (cbd_t *)bdp; - -#if 0 - /* Doing this here will allow us to process all frames in the - * ring before the FEC is allowed to put more there. On a heavily - * loaded network, some frames may be lost. Unfortunately, this - * increases the interrupt overhead since we can potentially work - * our way back to the interrupt return only to come right back - * here. - */ - fecp->fec_r_des_active = 0x01000000; -#endif -} - - -#ifdef CONFIG_USE_MDIO -static void -fec_enet_mii(struct net_device *dev) -{ - struct fec_enet_private *fep; - volatile fec_t *ep; - mii_list_t *mip; - uint mii_reg; - - fep = (struct fec_enet_private *)dev->priv; - ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec); - mii_reg = ep->fec_mii_data; - - if ((mip = mii_head) == NULL) { - printk("MII and no head!\n"); - return; - } - - if (mip->mii_func != NULL) - (*(mip->mii_func))(mii_reg, dev); - - mii_head = mip->mii_next; - mip->mii_next = mii_free; - mii_free = mip; - - if ((mip = mii_head) != NULL) { - ep->fec_mii_data = mip->mii_regval; - - } -} - -static int -mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *)) -{ - struct fec_enet_private *fep; - unsigned long flags; - mii_list_t *mip; - int retval; - - /* Add PHY address to register command. - */ - fep = dev->priv; - regval |= fep->phy_addr << 23; - - retval = 0; - - /* lock while modifying mii_list */ - spin_lock_irqsave(&fep->lock, flags); - - if ((mip = mii_free) != NULL) { - mii_free = mip->mii_next; - mip->mii_regval = regval; - mip->mii_func = func; - mip->mii_next = NULL; - if (mii_head) { - mii_tail->mii_next = mip; - mii_tail = mip; - } else { - mii_head = mii_tail = mip; - (&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec))->fec_mii_data = regval; - } - } else { - retval = 1; - } - - spin_unlock_irqrestore(&fep->lock, flags); - - return(retval); -} - -static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c) -{ - int k; - - if(!c) - return; - - for(k = 0; (c+k)->mii_data != mk_mii_end; k++) - mii_queue(dev, (c+k)->mii_data, (c+k)->funct); -} - -static void mii_parse_sr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC); - - if (mii_reg & 0x0004) - *s |= PHY_STAT_LINK; - if (mii_reg & 0x0010) - *s |= PHY_STAT_FAULT; - if (mii_reg & 0x0020) - *s |= PHY_STAT_ANC; - - fep->link = (*s & PHY_STAT_LINK) ? 1 : 0; -} - -static void mii_parse_cr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP); - - if (mii_reg & 0x1000) - *s |= PHY_CONF_ANE; - if (mii_reg & 0x4000) - *s |= PHY_CONF_LOOP; -} - -static void mii_parse_anar(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_CONF_SPMASK); - - if (mii_reg & 0x0020) - *s |= PHY_CONF_10HDX; - if (mii_reg & 0x0040) - *s |= PHY_CONF_10FDX; - if (mii_reg & 0x0080) - *s |= PHY_CONF_100HDX; - if (mii_reg & 0x00100) - *s |= PHY_CONF_100FDX; -} -#if 0 -static void mii_disp_reg(uint mii_reg, struct net_device *dev) -{ - printk("reg %u = 0x%04x\n", (mii_reg >> 18) & 0x1f, mii_reg & 0xffff); -} -#endif - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT970 is used by many boards */ - -#ifdef CONFIG_FEC_LXT970 - -#define MII_LXT970_MIRROR 16 /* Mirror register */ -#define MII_LXT970_IER 17 /* Interrupt Enable Register */ -#define MII_LXT970_ISR 18 /* Interrupt Status Register */ -#define MII_LXT970_CONFIG 19 /* Configuration Register */ -#define MII_LXT970_CSR 20 /* Chip Status Register */ - -static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_STAT_SPMASK); - - if (mii_reg & 0x0800) { - if (mii_reg & 0x1000) - *s |= PHY_STAT_100FDX; - else - *s |= PHY_STAT_100HDX; - } - else { - if (mii_reg & 0x1000) - *s |= PHY_STAT_10FDX; - else - *s |= PHY_STAT_10HDX; - } -} - -static phy_info_t phy_info_lxt970 = { - 0x07810000, - "LXT970", - - (const phy_cmd_t []) { /* config */ -#if 0 -// { mk_mii_write(MII_REG_ANAR, 0x0021), NULL }, - - /* Set default operation of 100-TX....for some reason - * some of these bits are set on power up, which is wrong. - */ - { mk_mii_write(MII_LXT970_CONFIG, 0), NULL }, -#endif - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0002), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* read SR and ISR to acknowledge */ - - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_LXT970_ISR), NULL }, - - /* find out the current status */ - - { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_LXT970_IER, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FEC_LXT970 */ - -/* ------------------------------------------------------------------------- */ -/* The Level one LXT971 is used on some of my custom boards */ - -#ifdef CONFIG_FEC_LXT971 - -/* register definitions for the 971 */ - -#define MII_LXT971_PCR 16 /* Port Control Register */ -#define MII_LXT971_SR2 17 /* Status Register 2 */ -#define MII_LXT971_IER 18 /* Interrupt Enable Register */ -#define MII_LXT971_ISR 19 /* Interrupt Status Register */ -#define MII_LXT971_LCR 20 /* LED Control Register */ -#define MII_LXT971_TCR 30 /* Transmit Control Register */ - -/* - * I had some nice ideas of running the MDIO faster... - * The 971 should support 8MHz and I tried it, but things acted really - * weird, so 2.5 MHz ought to be enough for anyone... - */ - -static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_STAT_SPMASK); - - if (mii_reg & 0x4000) { - if (mii_reg & 0x0200) - *s |= PHY_STAT_100FDX; - else - *s |= PHY_STAT_100HDX; - } - else { - if (mii_reg & 0x0200) - *s |= PHY_STAT_10FDX; - else - *s |= PHY_STAT_10HDX; - } - if (mii_reg & 0x0008) - *s |= PHY_STAT_FAULT; -} - -static phy_info_t phy_info_lxt971 = { - 0x0001378e, - "LXT971", - - (const phy_cmd_t []) { /* config */ -// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */ - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - - /* Somehow does the 971 tell me that the link is down - * the first read after power-up. - * read here to get a valid value in ack_int */ - - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* find out the current status */ - - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 }, - - /* we only need to read ISR to acknowledge */ - - { mk_mii_read(MII_LXT971_ISR), NULL }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_LXT971_IER, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FEC_LXT970 */ - - -/* ------------------------------------------------------------------------- */ -/* The Quality Semiconductor QS6612 is used on the RPX CLLF */ - -#ifdef CONFIG_FEC_QS6612 - -/* register definitions */ - -#define MII_QS6612_MCR 17 /* Mode Control Register */ -#define MII_QS6612_FTR 27 /* Factory Test Register */ -#define MII_QS6612_MCO 28 /* Misc. Control Register */ -#define MII_QS6612_ISR 29 /* Interrupt Source Register */ -#define MII_QS6612_IMR 30 /* Interrupt Mask Register */ -#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ - -static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - *s &= ~(PHY_STAT_SPMASK); - - switch((mii_reg >> 2) & 7) { - case 1: *s |= PHY_STAT_10HDX; break; - case 2: *s |= PHY_STAT_100HDX; break; - case 5: *s |= PHY_STAT_10FDX; break; - case 6: *s |= PHY_STAT_100FDX; break; - } -} - -static phy_info_t phy_info_qs6612 = { - 0x00181440, - "QS6612", - - (const phy_cmd_t []) { /* config */ -// { mk_mii_write(MII_REG_ANAR, 0x061), NULL }, /* 10 Mbps */ - - /* The PHY powers up isolated on the RPX, - * so send a command to allow operation. - */ - - { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL }, - - /* parse cr and anar to get some info */ - - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - - /* we need to read ISR, SR and ANER to acknowledge */ - - { mk_mii_read(MII_QS6612_ISR), NULL }, - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_REG_ANER), NULL }, - - /* read pcr to get info */ - - { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FEC_QS6612 */ - -/* ------------------------------------------------------------------------- */ -/* The Advanced Micro Devices AM79C874 is used on the ICU862 */ - -#ifdef CONFIG_FEC_AM79C874 - -/* register definitions for the 79C874 */ - -#define MII_AM79C874_MFR 16 /* Miscellaneous Features Register */ -#define MII_AM79C874_ICSR 17 /* Interrupt Control/Status Register */ -#define MII_AM79C874_DR 18 /* Diagnostic Register */ -#define MII_AM79C874_PMLR 19 /* Power Management & Loopback Register */ -#define MII_AM79C874_MCR 21 /* Mode Control Register */ -#define MII_AM79C874_DC 23 /* Disconnect Counter */ -#define MII_AM79C874_REC 24 /* Receiver Error Counter */ - -static void mii_parse_amd79c874_dr(uint mii_reg, struct net_device *dev, uint data) -{ - volatile struct fec_enet_private *fep = dev->priv; - uint s = fep->phy_status; - - s &= ~(PHY_STAT_SPMASK); - - /* Register 18: Bit 10 is data rate, 11 is Duplex */ - switch ((mii_reg >> 10) & 3) { - case 0: s |= PHY_STAT_10HDX; break; - case 1: s |= PHY_STAT_100HDX; break; - case 2: s |= PHY_STAT_10FDX; break; - case 3: s |= PHY_STAT_100FDX; break; - } - - fep->phy_status = s; -} - -static phy_info_t phy_info_amd79c874 = { - 0x00022561, - "AM79C874", - - (const phy_cmd_t []) { /* config */ -// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */ - { mk_mii_read(MII_REG_CR), mii_parse_cr }, - { mk_mii_read(MII_REG_ANAR), mii_parse_anar }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* startup - enable interrupts */ - { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL }, - { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */ - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* ack_int */ - /* find out the current status */ - - { mk_mii_read(MII_REG_SR), mii_parse_sr }, - { mk_mii_read(MII_AM79C874_DR), mii_parse_amd79c874_dr }, - - /* we only need to read ICSR to acknowledge */ - - { mk_mii_read(MII_AM79C874_ICSR), NULL }, - { mk_mii_end, } - }, - (const phy_cmd_t []) { /* shutdown - disable interrupts */ - { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL }, - { mk_mii_end, } - }, -}; - -#endif /* CONFIG_FEC_AM79C874 */ - -static phy_info_t *phy_info[] = { - -#ifdef CONFIG_FEC_LXT970 - &phy_info_lxt970, -#endif /* CONFIG_FEC_LXT970 */ - -#ifdef CONFIG_FEC_LXT971 - &phy_info_lxt971, -#endif /* CONFIG_FEC_LXT971 */ - -#ifdef CONFIG_FEC_QS6612 - &phy_info_qs6612, -#endif /* CONFIG_FEC_QS6612 */ - -#ifdef CONFIG_FEC_AM79C874 - &phy_info_amd79c874, -#endif /* CONFIG_FEC_AM79C874 */ - - NULL -}; - -static void mii_display_status(struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - volatile uint *s = &(fep->phy_status); - - if (!fep->link && !fep->old_link) { - /* Link is still down - don't print anything */ - return; - } - - printk("%s: status: ", dev->name); - - if (!fep->link) { - printk("link down"); - } else { - printk("link up"); - - switch(*s & PHY_STAT_SPMASK) { - case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break; - case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break; - case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break; - case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break; - default: - printk(", Unknown speed/duplex"); - } - - if (*s & PHY_STAT_ANC) - printk(", auto-negotiation complete"); - } - - if (*s & PHY_STAT_FAULT) - printk(", remote fault"); - - printk(".\n"); -} - -static void mii_display_config(struct work_struct *work) -{ - struct fec_enet_private *fep = - container_of(work, struct fec_enet_private, phy_task); - struct net_device *dev = fep->dev; - volatile uint *s = &(fep->phy_status); - - printk("%s: config: auto-negotiation ", dev->name); - - if (*s & PHY_CONF_ANE) - printk("on"); - else - printk("off"); - - if (*s & PHY_CONF_100FDX) - printk(", 100FDX"); - if (*s & PHY_CONF_100HDX) - printk(", 100HDX"); - if (*s & PHY_CONF_10FDX) - printk(", 10FDX"); - if (*s & PHY_CONF_10HDX) - printk(", 10HDX"); - if (!(*s & PHY_CONF_SPMASK)) - printk(", No speed/duplex selected?"); - - if (*s & PHY_CONF_LOOP) - printk(", loopback enabled"); - - printk(".\n"); - - fep->sequence_done = 1; -} - -static void mii_relink(struct work_struct *work) -{ - struct fec_enet_private *fep = - container_of(work, struct fec_enet_private, phy_task); - struct net_device *dev = fep->dev; - int duplex; - - fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; - mii_display_status(dev); - fep->old_link = fep->link; - - if (fep->link) { - duplex = 0; - if (fep->phy_status - & (PHY_STAT_100FDX | PHY_STAT_10FDX)) - duplex = 1; - fec_restart(dev, duplex); - } - else - fec_stop(dev); - -#if 0 - enable_irq(fep->mii_irq); -#endif - -} - -static void mii_queue_relink(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - - fep->dev = dev; - INIT_WORK(&fep->phy_task, mii_relink); - schedule_work(&fep->phy_task); -} - -static void mii_queue_config(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - - fep->dev = dev; - INIT_WORK(&fep->phy_task, mii_display_config); - schedule_work(&fep->phy_task); -} - - - -phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink }, - { mk_mii_end, } }; -phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config }, - { mk_mii_end, } }; - - - -/* Read remainder of PHY ID. -*/ -static void -mii_discover_phy3(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep; - int i; - - fep = dev->priv; - fep->phy_id |= (mii_reg & 0xffff); - - for(i = 0; phy_info[i]; i++) - if(phy_info[i]->id == (fep->phy_id >> 4)) - break; - - if(!phy_info[i]) - panic("%s: PHY id 0x%08x is not supported!\n", - dev->name, fep->phy_id); - - fep->phy = phy_info[i]; - fep->phy_id_done = 1; - - printk("%s: Phy @ 0x%x, type %s (0x%08x)\n", - dev->name, fep->phy_addr, fep->phy->name, fep->phy_id); -} - -/* Scan all of the MII PHY addresses looking for someone to respond - * with a valid ID. This usually happens quickly. - */ -static void -mii_discover_phy(uint mii_reg, struct net_device *dev) -{ - struct fec_enet_private *fep; - uint phytype; - - fep = dev->priv; - - if ((phytype = (mii_reg & 0xffff)) != 0xffff) { - - /* Got first part of ID, now get remainder. - */ - fep->phy_id = phytype << 16; - mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3); - } else { - fep->phy_addr++; - if (fep->phy_addr < 32) { - mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), - mii_discover_phy); - } else { - printk("fec: No PHY device found.\n"); - } - } -} -#endif /* CONFIG_USE_MDIO */ - -/* This interrupt occurs when the PHY detects a link change. -*/ -static -#ifdef CONFIG_RPXCLASSIC -void mii_link_interrupt(void *dev_id) -#else -irqreturn_t mii_link_interrupt(int irq, void * dev_id) -#endif -{ -#ifdef CONFIG_USE_MDIO - struct net_device *dev = dev_id; - struct fec_enet_private *fep = dev->priv; - volatile immap_t *immap = (immap_t *)IMAP_ADDR; - volatile fec_t *fecp = &(immap->im_cpm.cp_fec); - unsigned int ecntrl = fecp->fec_ecntrl; - - /* We need the FEC enabled to access the MII - */ - if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) { - fecp->fec_ecntrl |= FEC_ECNTRL_ETHER_EN; - } -#endif /* CONFIG_USE_MDIO */ - -#if 0 - disable_irq(fep->mii_irq); /* disable now, enable later */ -#endif - - -#ifdef CONFIG_USE_MDIO - mii_do_cmd(dev, fep->phy->ack_int); - mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ - - if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) { - fecp->fec_ecntrl = ecntrl; /* restore old settings */ - } -#else -printk("%s[%d] %s: unexpected Link interrupt\n", __FILE__, __LINE__, __func__); -#endif /* CONFIG_USE_MDIO */ - -#ifndef CONFIG_RPXCLASSIC - return IRQ_RETVAL(IRQ_HANDLED); -#endif /* CONFIG_RPXCLASSIC */ -} - -static int -fec_enet_open(struct net_device *dev) -{ - struct fec_enet_private *fep = dev->priv; - - /* I should reset the ring buffers here, but I don't yet know - * a simple way to do that. - */ - -#ifdef CONFIG_USE_MDIO - fep->sequence_done = 0; - fep->link = 0; - - if (fep->phy) { - mii_do_cmd(dev, fep->phy->ack_int); - mii_do_cmd(dev, fep->phy->config); - mii_do_cmd(dev, phy_cmd_config); /* display configuration */ - while(!fep->sequence_done) - schedule(); - - mii_do_cmd(dev, fep->phy->startup); - netif_start_queue(dev); - return 0; /* Success */ - } - return -ENODEV; /* No PHY we understand */ -#else - fep->link = 1; - netif_start_queue(dev); - return 0; /* Success */ -#endif /* CONFIG_USE_MDIO */ - -} - -static int -fec_enet_close(struct net_device *dev) -{ - /* Don't know what to do yet. - */ - netif_stop_queue(dev); - fec_stop(dev); - - return 0; -} - -static struct net_device_stats *fec_enet_get_stats(struct net_device *dev) -{ - struct fec_enet_private *fep = (struct fec_enet_private *)dev->priv; - - return &fep->stats; -} - -/* Set or clear the multicast filter for this adaptor. - * Skeleton taken from sunlance driver. - * The CPM Ethernet implementation allows Multicast as well as individual - * MAC address filtering. Some of the drivers check to make sure it is - * a group multicast address, and discard those that are not. I guess I - * will do the same for now, but just remove the test if you want - * individual filtering as well (do the upper net layers want or support - * this kind of feature?). - */ - -static void set_multicast_list(struct net_device *dev) -{ - struct fec_enet_private *fep; - volatile fec_t *ep; - - fep = (struct fec_enet_private *)dev->priv; - ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec); - - if (dev->flags&IFF_PROMISC) { - - /* Log any net taps. */ - printk("%s: Promiscuous mode enabled.\n", dev->name); - ep->fec_r_cntrl |= FEC_RCNTRL_PROM; - } else { - - ep->fec_r_cntrl &= ~FEC_RCNTRL_PROM; - - if (dev->flags & IFF_ALLMULTI) { - /* Catch all multicast addresses, so set the - * filter to all 1's. - */ - ep->fec_hash_table_high = 0xffffffff; - ep->fec_hash_table_low = 0xffffffff; - } -#if 0 - else { - /* Clear filter and add the addresses in the list. - */ - ep->sen_gaddr1 = 0; - ep->sen_gaddr2 = 0; - ep->sen_gaddr3 = 0; - ep->sen_gaddr4 = 0; - - dmi = dev->mc_list; - - for (i=0; imc_count; i++) { - - /* Only support group multicast for now. - */ - if (!(dmi->dmi_addr[0] & 1)) - continue; - - /* The address in dmi_addr is LSB first, - * and taddr is MSB first. We have to - * copy bytes MSB first from dmi_addr. - */ - mcptr = (u_char *)dmi->dmi_addr + 5; - tdptr = (u_char *)&ep->sen_taddrh; - for (j=0; j<6; j++) - *tdptr++ = *mcptr--; - - /* Ask CPM to run CRC and set bit in - * filter mask. - */ - cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC1, CPM_CR_SET_GADDR) | CPM_CR_FLG; - /* this delay is necessary here -- Cort */ - udelay(10); - while (cpmp->cp_cpcr & CPM_CR_FLG); - } - } -#endif - } -} - -/* Initialize the FEC Ethernet on 860T. - */ -static int __init fec_enet_init(void) -{ - struct net_device *dev; - struct fec_enet_private *fep; - int i, j, k, err; - unsigned char *eap, *iap, *ba; - dma_addr_t mem_addr; - volatile cbd_t *bdp; - cbd_t *cbd_base; - volatile immap_t *immap; - volatile fec_t *fecp; - bd_t *bd; -#ifdef CONFIG_SCC_ENET - unsigned char tmpaddr[6]; -#endif - - immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ - - bd = (bd_t *)__res; - - dev = alloc_etherdev(sizeof(*fep)); - if (!dev) - return -ENOMEM; - - fep = dev->priv; - - fecp = &(immap->im_cpm.cp_fec); - - /* Whack a reset. We should wait for this. - */ - fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET; - for (i = 0; - (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY); - ++i) { - udelay(1); - } - if (i == FEC_RESET_DELAY) { - printk ("FEC Reset timeout!\n"); - } - - /* Set the Ethernet address. If using multiple Enets on the 8xx, - * this needs some work to get unique addresses. - */ - eap = (unsigned char *)my_enet_addr; - iap = bd->bi_enetaddr; - -#ifdef CONFIG_SCC_ENET - /* - * If a board has Ethernet configured both on a SCC and the - * FEC, it needs (at least) 2 MAC addresses (we know that Sun - * disagrees, but anyway). For the FEC port, we create - * another address by setting one of the address bits above - * something that would have (up to now) been allocated. - */ - for (i=0; i<6; i++) - tmpaddr[i] = *iap++; - tmpaddr[3] |= 0x80; - iap = tmpaddr; -#endif - - for (i=0; i<6; i++) { - dev->dev_addr[i] = *eap++ = *iap++; - } - - /* Allocate memory for buffer descriptors. - */ - if (((RX_RING_SIZE + TX_RING_SIZE) * sizeof(cbd_t)) > PAGE_SIZE) { - printk("FEC init error. Need more space.\n"); - printk("FEC initialization failed.\n"); - return 1; - } - cbd_base = (cbd_t *)dma_alloc_coherent(dev->class_dev.dev, PAGE_SIZE, - &mem_addr, GFP_KERNEL); - - /* Set receive and transmit descriptor base. - */ - fep->rx_bd_base = cbd_base; - fep->tx_bd_base = cbd_base + RX_RING_SIZE; - - fep->skb_cur = fep->skb_dirty = 0; - - /* Initialize the receive buffer descriptors. - */ - bdp = fep->rx_bd_base; - k = 0; - for (i=0; iclass_dev.dev, - PAGE_SIZE, - &mem_addr, - GFP_KERNEL); - /* BUG: no check for failure */ - - /* Initialize the BD for every fragment in the page. - */ - for (j=0; jcbd_sc = BD_ENET_RX_EMPTY; - bdp->cbd_bufaddr = mem_addr; - fep->rx_vaddr[k++] = ba; - mem_addr += FEC_ENET_RX_FRSIZE; - ba += FEC_ENET_RX_FRSIZE; - bdp++; - } - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - -#ifdef CONFIG_FEC_PACKETHOOK - fep->ph_lock = 0; - fep->ph_rxhandler = fep->ph_txhandler = NULL; - fep->ph_proto = 0; - fep->ph_regaddr = NULL; - fep->ph_priv = NULL; -#endif - - /* Install our interrupt handler. - */ - if (request_irq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0) - panic("Could not allocate FEC IRQ!"); - -#ifdef CONFIG_RPXCLASSIC - /* Make Port C, bit 15 an input that causes interrupts. - */ - immap->im_ioport.iop_pcpar &= ~0x0001; - immap->im_ioport.iop_pcdir &= ~0x0001; - immap->im_ioport.iop_pcso &= ~0x0001; - immap->im_ioport.iop_pcint |= 0x0001; - cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev); - - /* Make LEDS reflect Link status. - */ - *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE; -#endif - -#ifdef PHY_INTERRUPT - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel |= - (0x80000000 >> PHY_INTERRUPT); - - if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0, "mii", dev) != 0) - panic("Could not allocate MII IRQ!"); -#endif - - dev->base_addr = (unsigned long)fecp; - - /* The FEC Ethernet specific entries in the device structure. */ - dev->open = fec_enet_open; - dev->hard_start_xmit = fec_enet_start_xmit; - dev->tx_timeout = fec_timeout; - dev->watchdog_timeo = TX_TIMEOUT; - dev->stop = fec_enet_close; - dev->get_stats = fec_enet_get_stats; - dev->set_multicast_list = set_multicast_list; - -#ifdef CONFIG_USE_MDIO - for (i=0; iim_ioport.iop_pdpar = 0x1fff; - - /* Bits moved from Rev. D onward. - */ - if ((mfspr(SPRN_IMMR) & 0xffff) < 0x0501) - immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */ - else - immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */ - -#ifdef CONFIG_USE_MDIO - /* Set MII speed to 2.5 MHz - */ - fecp->fec_mii_speed = fep->phy_speed = - (( (bd->bi_intfreq + 500000) / 2500000 / 2 ) & 0x3F ) << 1; -#else - fecp->fec_mii_speed = 0; /* turn off MDIO */ -#endif /* CONFIG_USE_MDIO */ - - err = register_netdev(dev); - if (err) { - free_netdev(dev); - return err; - } - - printk ("%s: FEC ENET Version 0.2, FEC irq %d" -#ifdef PHY_INTERRUPT - ", MII irq %d" -#endif - ", addr ", - dev->name, FEC_INTERRUPT -#ifdef PHY_INTERRUPT - , PHY_INTERRUPT -#endif - ); - for (i=0; i<6; i++) - printk("%02x%c", dev->dev_addr[i], (i==5) ? '\n' : ':'); - -#ifdef CONFIG_USE_MDIO /* start in full duplex mode, and negotiate speed */ - fec_restart (dev, 1); -#else /* always use half duplex mode only */ - fec_restart (dev, 0); -#endif - -#ifdef CONFIG_USE_MDIO - /* Queue up command to detect the PHY and initialize the - * remainder of the interface. - */ - fep->phy_id_done = 0; - fep->phy_addr = 0; - mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); -#endif /* CONFIG_USE_MDIO */ - - return 0; -} -module_init(fec_enet_init); - -/* This function is called to start or restart the FEC during a link - * change. This only happens when switching between half and full - * duplex. - */ -static void -fec_restart(struct net_device *dev, int duplex) -{ - struct fec_enet_private *fep; - int i; - volatile cbd_t *bdp; - volatile immap_t *immap; - volatile fec_t *fecp; - - immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ - - fecp = &(immap->im_cpm.cp_fec); - - fep = dev->priv; - - /* Whack a reset. We should wait for this. - */ - fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET; - for (i = 0; - (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY); - ++i) { - udelay(1); - } - if (i == FEC_RESET_DELAY) { - printk ("FEC Reset timeout!\n"); - } - - /* Set station address. - */ - fecp->fec_addr_low = (my_enet_addr[0] << 16) | my_enet_addr[1]; - fecp->fec_addr_high = my_enet_addr[2]; - - /* Reset all multicast. - */ - fecp->fec_hash_table_high = 0; - fecp->fec_hash_table_low = 0; - - /* Set maximum receive buffer size. - */ - fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; - fecp->fec_r_hash = PKT_MAXBUF_SIZE; - - /* Set receive and transmit descriptor base. - */ - fecp->fec_r_des_start = iopa((uint)(fep->rx_bd_base)); - fecp->fec_x_des_start = iopa((uint)(fep->tx_bd_base)); - - fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; - fep->cur_rx = fep->rx_bd_base; - - /* Reset SKB transmit buffers. - */ - fep->skb_cur = fep->skb_dirty = 0; - for (i=0; i<=TX_RING_MOD_MASK; i++) { - if (fep->tx_skbuff[i] != NULL) { - dev_kfree_skb(fep->tx_skbuff[i]); - fep->tx_skbuff[i] = NULL; - } - } - - /* Initialize the receive buffer descriptors. - */ - bdp = fep->rx_bd_base; - for (i=0; icbd_sc = BD_ENET_RX_EMPTY; - bdp++; - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* ...and the same for transmit. - */ - bdp = fep->tx_bd_base; - for (i=0; icbd_sc = 0; - bdp->cbd_bufaddr = 0; - bdp++; - } - - /* Set the last buffer to wrap. - */ - bdp--; - bdp->cbd_sc |= BD_SC_WRAP; - - /* Enable MII mode. - */ - if (duplex) { - fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; /* MII enable */ - fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; /* FD enable */ - } - else { - fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; - fecp->fec_x_cntrl = 0; - } - fep->full_duplex = duplex; - - /* Enable big endian and don't care about SDMA FC. - */ - fecp->fec_fun_code = 0x78000000; - -#ifdef CONFIG_USE_MDIO - /* Set MII speed. - */ - fecp->fec_mii_speed = fep->phy_speed; -#endif /* CONFIG_USE_MDIO */ - - /* Clear any outstanding interrupt. - */ - fecp->fec_ievent = 0xffc0; - - fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; - - /* Enable interrupts we wish to service. - */ - fecp->fec_imask = ( FEC_ENET_TXF | FEC_ENET_TXB | - FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII ); - - /* And last, enable the transmit and receive processing. - */ - fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN; - fecp->fec_r_des_active = 0x01000000; -} - -static void -fec_stop(struct net_device *dev) -{ - volatile immap_t *immap; - volatile fec_t *fecp; - struct fec_enet_private *fep; - int i; - - immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ - - fecp = &(immap->im_cpm.cp_fec); - - if ((fecp->fec_ecntrl & FEC_ECNTRL_ETHER_EN) == 0) - return; /* already down */ - - fep = dev->priv; - - - fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */ - - for (i = 0; - ((fecp->fec_ievent & 0x10000000) == 0) && (i < FEC_RESET_DELAY); - ++i) { - udelay(1); - } - if (i == FEC_RESET_DELAY) { - printk ("FEC timeout on graceful transmit stop\n"); - } - - /* Clear outstanding MII command interrupts. - */ - fecp->fec_ievent = FEC_ENET_MII; - - /* Enable MII command finished interrupt - */ - fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; - fecp->fec_imask = FEC_ENET_MII; - -#ifdef CONFIG_USE_MDIO - /* Set MII speed. - */ - fecp->fec_mii_speed = fep->phy_speed; -#endif /* CONFIG_USE_MDIO */ - - /* Disable FEC - */ - fecp->fec_ecntrl &= ~(FEC_ECNTRL_ETHER_EN); -} diff --git a/arch/ppc/8xx_io/micropatch.c b/arch/ppc/8xx_io/micropatch.c deleted file mode 100644 index 9a5d95da7c286c6763c8682fb6c186ae4c9974be..0000000000000000000000000000000000000000 --- a/arch/ppc/8xx_io/micropatch.c +++ /dev/null @@ -1,743 +0,0 @@ - -/* Microcode patches for the CPM as supplied by Motorola. - * This is the one for IIC/SPI. There is a newer one that - * also relocates SMC2, but this would require additional changes - * to uart.c, so I am holding off on that for a moment. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * I2C/SPI relocation patch arrays. - */ - -#ifdef CONFIG_I2C_SPI_UCODE_PATCH - -uint patch_2000[] = { - 0x7FFFEFD9, - 0x3FFD0000, - 0x7FFB49F7, - 0x7FF90000, - 0x5FEFADF7, - 0x5F89ADF7, - 0x5FEFAFF7, - 0x5F89AFF7, - 0x3A9CFBC8, - 0xE7C0EDF0, - 0x77C1E1BB, - 0xF4DC7F1D, - 0xABAD932F, - 0x4E08FDCF, - 0x6E0FAFF8, - 0x7CCF76CF, - 0xFD1FF9CF, - 0xABF88DC6, - 0xAB5679F7, - 0xB0937383, - 0xDFCE79F7, - 0xB091E6BB, - 0xE5BBE74F, - 0xB3FA6F0F, - 0x6FFB76CE, - 0xEE0DF9CF, - 0x2BFBEFEF, - 0xCFEEF9CF, - 0x76CEAD24, - 0x90B2DF9A, - 0x7FDDD0BF, - 0x4BF847FD, - 0x7CCF76CE, - 0xCFEF7E1F, - 0x7F1D7DFD, - 0xF0B6EF71, - 0x7FC177C1, - 0xFBC86079, - 0xE722FBC8, - 0x5FFFDFFF, - 0x5FB2FFFB, - 0xFBC8F3C8, - 0x94A67F01, - 0x7F1D5F39, - 0xAFE85F5E, - 0xFFDFDF96, - 0xCB9FAF7D, - 0x5FC1AFED, - 0x8C1C5FC1, - 0xAFDD5FC3, - 0xDF9A7EFD, - 0xB0B25FB2, - 0xFFFEABAD, - 0x5FB2FFFE, - 0x5FCE600B, - 0xE6BB600B, - 0x5FCEDFC6, - 0x27FBEFDF, - 0x5FC8CFDE, - 0x3A9CE7C0, - 0xEDF0F3C8, - 0x7F0154CD, - 0x7F1D2D3D, - 0x363A7570, - 0x7E0AF1CE, - 0x37EF2E68, - 0x7FEE10EC, - 0xADF8EFDE, - 0xCFEAE52F, - 0x7D0FE12B, - 0xF1CE5F65, - 0x7E0A4DF8, - 0xCFEA5F72, - 0x7D0BEFEE, - 0xCFEA5F74, - 0xE522EFDE, - 0x5F74CFDA, - 0x0B627385, - 0xDF627E0A, - 0x30D8145B, - 0xBFFFF3C8, - 0x5FFFDFFF, - 0xA7F85F5E, - 0xBFFE7F7D, - 0x10D31450, - 0x5F36BFFF, - 0xAF785F5E, - 0xBFFDA7F8, - 0x5F36BFFE, - 0x77FD30C0, - 0x4E08FDCF, - 0xE5FF6E0F, - 0xAFF87E1F, - 0x7E0FFD1F, - 0xF1CF5F1B, - 0xABF80D5E, - 0x5F5EFFEF, - 0x79F730A2, - 0xAFDD5F34, - 0x47F85F34, - 0xAFED7FDD, - 0x50B24978, - 0x47FD7F1D, - 0x7DFD70AD, - 0xEF717EC1, - 0x6BA47F01, - 0x2D267EFD, - 0x30DE5F5E, - 0xFFFD5F5E, - 0xFFEF5F5E, - 0xFFDF0CA0, - 0xAFED0A9E, - 0xAFDD0C3A, - 0x5F3AAFBD, - 0x7FBDB082, - 0x5F8247F8 -}; - -uint patch_2f00[] = { - 0x3E303430, - 0x34343737, - 0xABF7BF9B, - 0x994B4FBD, - 0xBD599493, - 0x349FFF37, - 0xFB9B177D, - 0xD9936956, - 0xBBFDD697, - 0xBDD2FD11, - 0x31DB9BB3, - 0x63139637, - 0x93733693, - 0x193137F7, - 0x331737AF, - 0x7BB9B999, - 0xBB197957, - 0x7FDFD3D5, - 0x73B773F7, - 0x37933B99, - 0x1D115316, - 0x99315315, - 0x31694BF4, - 0xFBDBD359, - 0x31497353, - 0x76956D69, - 0x7B9D9693, - 0x13131979, - 0x79376935 -}; -#endif - -/* - * I2C/SPI/SMC1 relocation patch arrays. - */ - -#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH - -uint patch_2000[] = { - 0x3fff0000, - 0x3ffd0000, - 0x3ffb0000, - 0x3ff90000, - 0x5f13eff8, - 0x5eb5eff8, - 0x5f88adf7, - 0x5fefadf7, - 0x3a9cfbc8, - 0x77cae1bb, - 0xf4de7fad, - 0xabae9330, - 0x4e08fdcf, - 0x6e0faff8, - 0x7ccf76cf, - 0xfdaff9cf, - 0xabf88dc8, - 0xab5879f7, - 0xb0925d8d, - 0xdfd079f7, - 0xb090e6bb, - 0xe5bbe74f, - 0x9e046f0f, - 0x6ffb76ce, - 0xee0cf9cf, - 0x2bfbefef, - 0xcfeef9cf, - 0x76cead23, - 0x90b3df99, - 0x7fddd0c1, - 0x4bf847fd, - 0x7ccf76ce, - 0xcfef77ca, - 0x7eaf7fad, - 0x7dfdf0b7, - 0xef7a7fca, - 0x77cafbc8, - 0x6079e722, - 0xfbc85fff, - 0xdfff5fb3, - 0xfffbfbc8, - 0xf3c894a5, - 0xe7c9edf9, - 0x7f9a7fad, - 0x5f36afe8, - 0x5f5bffdf, - 0xdf95cb9e, - 0xaf7d5fc3, - 0xafed8c1b, - 0x5fc3afdd, - 0x5fc5df99, - 0x7efdb0b3, - 0x5fb3fffe, - 0xabae5fb3, - 0xfffe5fd0, - 0x600be6bb, - 0x600b5fd0, - 0xdfc827fb, - 0xefdf5fca, - 0xcfde3a9c, - 0xe7c9edf9, - 0xf3c87f9e, - 0x54ca7fed, - 0x2d3a3637, - 0x756f7e9a, - 0xf1ce37ef, - 0x2e677fee, - 0x10ebadf8, - 0xefdecfea, - 0xe52f7d9f, - 0xe12bf1ce, - 0x5f647e9a, - 0x4df8cfea, - 0x5f717d9b, - 0xefeecfea, - 0x5f73e522, - 0xefde5f73, - 0xcfda0b61, - 0x5d8fdf61, - 0xe7c9edf9, - 0x7e9a30d5, - 0x1458bfff, - 0xf3c85fff, - 0xdfffa7f8, - 0x5f5bbffe, - 0x7f7d10d0, - 0x144d5f33, - 0xbfffaf78, - 0x5f5bbffd, - 0xa7f85f33, - 0xbffe77fd, - 0x30bd4e08, - 0xfdcfe5ff, - 0x6e0faff8, - 0x7eef7e9f, - 0xfdeff1cf, - 0x5f17abf8, - 0x0d5b5f5b, - 0xffef79f7, - 0x309eafdd, - 0x5f3147f8, - 0x5f31afed, - 0x7fdd50af, - 0x497847fd, - 0x7f9e7fed, - 0x7dfd70a9, - 0xef7e7ece, - 0x6ba07f9e, - 0x2d227efd, - 0x30db5f5b, - 0xfffd5f5b, - 0xffef5f5b, - 0xffdf0c9c, - 0xafed0a9a, - 0xafdd0c37, - 0x5f37afbd, - 0x7fbdb081, - 0x5f8147f8, - 0x3a11e710, - 0xedf0ccdd, - 0xf3186d0a, - 0x7f0e5f06, - 0x7fedbb38, - 0x3afe7468, - 0x7fedf4fc, - 0x8ffbb951, - 0xb85f77fd, - 0xb0df5ddd, - 0xdefe7fed, - 0x90e1e74d, - 0x6f0dcbf7, - 0xe7decfed, - 0xcb74cfed, - 0xcfeddf6d, - 0x91714f74, - 0x5dd2deef, - 0x9e04e7df, - 0xefbb6ffb, - 0xe7ef7f0e, - 0x9e097fed, - 0xebdbeffa, - 0xeb54affb, - 0x7fea90d7, - 0x7e0cf0c3, - 0xbffff318, - 0x5fffdfff, - 0xac59efea, - 0x7fce1ee5, - 0xe2ff5ee1, - 0xaffbe2ff, - 0x5ee3affb, - 0xf9cc7d0f, - 0xaef8770f, - 0x7d0fb0c6, - 0xeffbbfff, - 0xcfef5ede, - 0x7d0fbfff, - 0x5ede4cf8, - 0x7fddd0bf, - 0x49f847fd, - 0x7efdf0bb, - 0x7fedfffd, - 0x7dfdf0b7, - 0xef7e7e1e, - 0x5ede7f0e, - 0x3a11e710, - 0xedf0ccab, - 0xfb18ad2e, - 0x1ea9bbb8, - 0x74283b7e, - 0x73c2e4bb, - 0x2ada4fb8, - 0xdc21e4bb, - 0xb2a1ffbf, - 0x5e2c43f8, - 0xfc87e1bb, - 0xe74ffd91, - 0x6f0f4fe8, - 0xc7ba32e2, - 0xf396efeb, - 0x600b4f78, - 0xe5bb760b, - 0x53acaef8, - 0x4ef88b0e, - 0xcfef9e09, - 0xabf8751f, - 0xefef5bac, - 0x741f4fe8, - 0x751e760d, - 0x7fdbf081, - 0x741cafce, - 0xefcc7fce, - 0x751e70ac, - 0x741ce7bb, - 0x3372cfed, - 0xafdbefeb, - 0xe5bb760b, - 0x53f2aef8, - 0xafe8e7eb, - 0x4bf8771e, - 0x7e247fed, - 0x4fcbe2cc, - 0x7fbc30a9, - 0x7b0f7a0f, - 0x34d577fd, - 0x308b5db7, - 0xde553e5f, - 0xaf78741f, - 0x741f30f0, - 0xcfef5e2c, - 0x741f3eac, - 0xafb8771e, - 0x5e677fed, - 0x0bd3e2cc, - 0x741ccfec, - 0xe5ca53cd, - 0x6fcb4f74, - 0x5dadde4b, - 0x2ab63d38, - 0x4bb3de30, - 0x751f741c, - 0x6c42effa, - 0xefea7fce, - 0x6ffc30be, - 0xefec3fca, - 0x30b3de2e, - 0xadf85d9e, - 0xaf7daefd, - 0x5d9ede2e, - 0x5d9eafdd, - 0x761f10ac, - 0x1da07efd, - 0x30adfffe, - 0x4908fb18, - 0x5fffdfff, - 0xafbb709b, - 0x4ef85e67, - 0xadf814ad, - 0x7a0f70ad, - 0xcfef50ad, - 0x7a0fde30, - 0x5da0afed, - 0x3c12780f, - 0xefef780f, - 0xefef790f, - 0xa7f85e0f, - 0xffef790f, - 0xefef790f, - 0x14adde2e, - 0x5d9eadfd, - 0x5e2dfffb, - 0xe79addfd, - 0xeff96079, - 0x607ae79a, - 0xddfceff9, - 0x60795dff, - 0x607acfef, - 0xefefefdf, - 0xefbfef7f, - 0xeeffedff, - 0xebffe7ff, - 0xafefafdf, - 0xafbfaf7f, - 0xaeffadff, - 0xabffa7ff, - 0x6fef6fdf, - 0x6fbf6f7f, - 0x6eff6dff, - 0x6bff67ff, - 0x2fef2fdf, - 0x2fbf2f7f, - 0x2eff2dff, - 0x2bff27ff, - 0x4e08fd1f, - 0xe5ff6e0f, - 0xaff87eef, - 0x7e0ffdef, - 0xf11f6079, - 0xabf8f542, - 0x7e0af11c, - 0x37cfae3a, - 0x7fec90be, - 0xadf8efdc, - 0xcfeae52f, - 0x7d0fe12b, - 0xf11c6079, - 0x7e0a4df8, - 0xcfea5dc4, - 0x7d0befec, - 0xcfea5dc6, - 0xe522efdc, - 0x5dc6cfda, - 0x4e08fd1f, - 0x6e0faff8, - 0x7c1f761f, - 0xfdeff91f, - 0x6079abf8, - 0x761cee24, - 0xf91f2bfb, - 0xefefcfec, - 0xf91f6079, - 0x761c27fb, - 0xefdf5da7, - 0xcfdc7fdd, - 0xd09c4bf8, - 0x47fd7c1f, - 0x761ccfcf, - 0x7eef7fed, - 0x7dfdf093, - 0xef7e7f1e, - 0x771efb18, - 0x6079e722, - 0xe6bbe5bb, - 0xae0ae5bb, - 0x600bae85, - 0xe2bbe2bb, - 0xe2bbe2bb, - 0xaf02e2bb, - 0xe2bb2ff9, - 0x6079e2bb -}; - -uint patch_2f00[] = { - 0x30303030, - 0x3e3e3434, - 0xabbf9b99, - 0x4b4fbdbd, - 0x59949334, - 0x9fff37fb, - 0x9b177dd9, - 0x936956bb, - 0xfbdd697b, - 0xdd2fd113, - 0x1db9f7bb, - 0x36313963, - 0x79373369, - 0x3193137f, - 0x7331737a, - 0xf7bb9b99, - 0x9bb19795, - 0x77fdfd3d, - 0x573b773f, - 0x737933f7, - 0xb991d115, - 0x31699315, - 0x31531694, - 0xbf4fbdbd, - 0x35931497, - 0x35376956, - 0xbd697b9d, - 0x96931313, - 0x19797937, - 0x6935af78, - 0xb9b3baa3, - 0xb8788683, - 0x368f78f7, - 0x87778733, - 0x3ffffb3b, - 0x8e8f78b8, - 0x1d118e13, - 0xf3ff3f8b, - 0x6bd8e173, - 0xd1366856, - 0x68d1687b, - 0x3daf78b8, - 0x3a3a3f87, - 0x8f81378f, - 0xf876f887, - 0x77fd8778, - 0x737de8d6, - 0xbbf8bfff, - 0xd8df87f7, - 0xfd876f7b, - 0x8bfff8bd, - 0x8683387d, - 0xb873d87b, - 0x3b8fd7f8, - 0xf7338883, - 0xbb8ee1f8, - 0xef837377, - 0x3337b836, - 0x817d11f8, - 0x7378b878, - 0xd3368b7d, - 0xed731b7d, - 0x833731f3, - 0xf22f3f23 -}; - -uint patch_2e00[] = { - 0x27eeeeee, - 0xeeeeeeee, - 0xeeeeeeee, - 0xeeeeeeee, - 0xee4bf4fb, - 0xdbd259bb, - 0x1979577f, - 0xdfd2d573, - 0xb773f737, - 0x4b4fbdbd, - 0x25b9b177, - 0xd2d17376, - 0x956bbfdd, - 0x697bdd2f, - 0xff9f79ff, - 0xff9ff22f -}; -#endif - -/* - * USB SOF patch arrays. - */ - -#ifdef CONFIG_USB_SOF_UCODE_PATCH - -uint patch_2000[] = { - 0x7fff0000, - 0x7ffd0000, - 0x7ffb0000, - 0x49f7ba5b, - 0xba383ffb, - 0xf9b8b46d, - 0xe5ab4e07, - 0xaf77bffe, - 0x3f7bbf79, - 0xba5bba38, - 0xe7676076, - 0x60750000 -}; - -uint patch_2f00[] = { - 0x3030304c, - 0xcab9e441, - 0xa1aaf220 -}; -#endif - -void -cpm_load_patch(volatile immap_t *immr) -{ - volatile uint *dp; /* Dual-ported RAM. */ - volatile cpm8xx_t *commproc; - volatile iic_t *iip; - volatile spi_t *spp; - volatile smc_uart_t *smp; - int i; - - commproc = (cpm8xx_t *)&immr->im_cpm; - -#ifdef CONFIG_USB_SOF_UCODE_PATCH - commproc->cp_rccr = 0; - - dp = (uint *)(commproc->cp_dpmem); - for (i=0; i<(sizeof(patch_2000)/4); i++) - *dp++ = patch_2000[i]; - - dp = (uint *)&(commproc->cp_dpmem[0x0f00]); - for (i=0; i<(sizeof(patch_2f00)/4); i++) - *dp++ = patch_2f00[i]; - - commproc->cp_rccr = 0x0009; - - printk("USB SOF microcode patch installed\n"); -#endif /* CONFIG_USB_SOF_UCODE_PATCH */ - -#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \ - defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH) - - commproc->cp_rccr = 0; - - dp = (uint *)(commproc->cp_dpmem); - for (i=0; i<(sizeof(patch_2000)/4); i++) - *dp++ = patch_2000[i]; - - dp = (uint *)&(commproc->cp_dpmem[0x0f00]); - for (i=0; i<(sizeof(patch_2f00)/4); i++) - *dp++ = patch_2f00[i]; - - iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC]; -# define RPBASE 0x0500 - iip->iic_rpbase = RPBASE; - - /* Put SPI above the IIC, also 32-byte aligned. - */ - i = (RPBASE + sizeof(iic_t) + 31) & ~31; - spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI]; - spp->spi_rpbase = i; - -# if defined(CONFIG_I2C_SPI_UCODE_PATCH) - commproc->cp_cpmcr1 = 0x802a; - commproc->cp_cpmcr2 = 0x8028; - commproc->cp_cpmcr3 = 0x802e; - commproc->cp_cpmcr4 = 0x802c; - commproc->cp_rccr = 1; - - printk("I2C/SPI microcode patch installed.\n"); -# endif /* CONFIG_I2C_SPI_UCODE_PATCH */ - -# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH) - - dp = (uint *)&(commproc->cp_dpmem[0x0e00]); - for (i=0; i<(sizeof(patch_2e00)/4); i++) - *dp++ = patch_2e00[i]; - - commproc->cp_cpmcr1 = 0x8080; - commproc->cp_cpmcr2 = 0x808a; - commproc->cp_cpmcr3 = 0x8028; - commproc->cp_cpmcr4 = 0x802a; - commproc->cp_rccr = 3; - - smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1]; - smp->smc_rpbase = 0x1FC0; - - printk("I2C/SPI/SMC1 microcode patch installed.\n"); -# endif /* CONFIG_I2C_SPI_SMC1_UCODE_PATCH) */ - -#endif /* some variation of the I2C/SPI patch was selected */ -} - -/* - * Take this entire routine out, since no one calls it and its - * logic is suspect. - */ - -#if 0 -void -verify_patch(volatile immap_t *immr) -{ - volatile uint *dp; - volatile cpm8xx_t *commproc; - int i; - - commproc = (cpm8xx_t *)&immr->im_cpm; - - printk("cp_rccr %x\n", commproc->cp_rccr); - commproc->cp_rccr = 0; - - dp = (uint *)(commproc->cp_dpmem); - for (i=0; i<(sizeof(patch_2000)/4); i++) - if (*dp++ != patch_2000[i]) { - printk("patch_2000 bad at %d\n", i); - dp--; - printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]); - break; - } - - dp = (uint *)&(commproc->cp_dpmem[0x0f00]); - for (i=0; i<(sizeof(patch_2f00)/4); i++) - if (*dp++ != patch_2f00[i]) { - printk("patch_2f00 bad at %d\n", i); - dp--; - printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]); - break; - } - - commproc->cp_rccr = 0x0009; -} -#endif diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig deleted file mode 100644 index 0f1863ed9c1c814abf1509566489b02ab651d664..0000000000000000000000000000000000000000 --- a/arch/ppc/Kconfig +++ /dev/null @@ -1,1186 +0,0 @@ -# For a description of the syntax of this configuration file, -# see Documentation/kbuild/kconfig-language.txt. -# - -mainmenu "Linux/PowerPC Kernel Configuration" - -config WORD_SIZE - int - default 32 - -config MMU - bool - default y - -config GENERIC_HARDIRQS - bool - default y - -config RWSEM_GENERIC_SPINLOCK - bool - -config RWSEM_XCHGADD_ALGORITHM - bool - default y - -config ARCH_HAS_ILOG2_U32 - bool - default y - -config ARCH_HAS_ILOG2_U64 - bool - default n - -config GENERIC_HWEIGHT - bool - default y - -config GENERIC_CALIBRATE_DELAY - bool - default y - -config PPC - bool - default y - select HAVE_IDE - select HAVE_OPROFILE - select HAVE_KPROBES - -config PPC32 - bool - default y - -# All PPCs use generic nvram driver through ppc_md -config GENERIC_NVRAM - bool - default y - -config GENERIC_FIND_NEXT_BIT - bool - default y - -config SCHED_NO_NO_OMIT_FRAME_POINTER - bool - default y - -config ARCH_MAY_HAVE_PC_FDC - bool - default y - -config GENERIC_BUG - bool - default y - depends on BUG - -source "init/Kconfig" - -menu "Processor" - -choice - prompt "Processor Type" - default 6xx - -config 6xx - bool "6xx/7xx/74xx/52xx/82xx" - select PPC_FPU - help - There are four types of PowerPC chips supported. The more common - types (601, 603, 604, 740, 750, 7400), the older Freescale - (formerly Motorola) embedded versions (821, 823, 850, 855, 860, - 52xx, 82xx), the IBM embedded versions (403 and 405) and - the Book E embedded processors from IBM (44x) and Freescale (85xx). - For support for 64-bit processors, set ARCH=powerpc. - Unless you are building a kernel for one of the embedded processor - systems, choose 6xx. - Also note that because the 52xx, 82xx family have a 603e - core, specific support for that chipset is asked later on. - -config 40x - bool "40x" - select PPC_DCR_NATIVE - -config 44x - bool "44x" - select PPC_DCR_NATIVE - -config 8xx - bool "8xx" - select PPC_LIB_RHEAP - -endchoice - -config PPC_FPU - bool - -config PPC_DCR_NATIVE - bool - default n - -config PPC_DCR - bool - depends on PPC_DCR_NATIVE - default y - -config PTE_64BIT - bool - depends on 44x - default y if 44x - -config PHYS_64BIT - bool - depends on 44x - default y if 44x - ---help--- - This option enables kernel support for larger than 32-bit physical - addresses. This features is not be available on all e500 cores. - - If in doubt, say N here. - -config ALTIVEC - bool "AltiVec Support" - depends on 6xx - depends on !8260 - ---help--- - This option enables kernel support for the Altivec extensions to the - PowerPC processor. The kernel currently supports saving and restoring - altivec registers, and turning on the 'altivec enable' bit so user - processes can execute altivec instructions. - - This option is only usefully if you have a processor that supports - altivec (G4, otherwise known as 74xx series), but does not have - any affect on a non-altivec cpu (it does, however add code to the - kernel). - - If in doubt, say Y here. - -config TAU - bool "Thermal Management Support" - depends on 6xx && !8260 - help - G3 and G4 processors have an on-chip temperature sensor called the - 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die - temperature within 2-4 degrees Celsius. This option shows the current - on-die temperature in /proc/cpuinfo if the cpu supports it. - - Unfortunately, on some chip revisions, this sensor is very inaccurate - and in some cases, does not work at all, so don't assume the cpu - temp is actually what /proc/cpuinfo says it is. - -config TAU_INT - bool "Interrupt driven TAU driver (DANGEROUS)" - depends on TAU - ---help--- - The TAU supports an interrupt driven mode which causes an interrupt - whenever the temperature goes out of range. This is the fastest way - to get notified the temp has exceeded a range. With this option off, - a timer is used to re-check the temperature periodically. - - However, on some cpus it appears that the TAU interrupt hardware - is buggy and can cause a situation which would lead unexplained hard - lockups. - - Unless you are extending the TAU driver, or enjoy kernel/hardware - debugging, leave this option off. - -config TAU_AVERAGE - bool "Average high and low temp" - depends on TAU - ---help--- - The TAU hardware can compare the temperature to an upper and lower - bound. The default behavior is to show both the upper and lower - bound in /proc/cpuinfo. If the range is large, the temperature is - either changing a lot, or the TAU hardware is broken (likely on some - G4's). If the range is small (around 4 degrees), the temperature is - relatively stable. If you say Y here, a single temperature value, - halfway between the upper and lower bounds, will be reported in - /proc/cpuinfo. - - If in doubt, say N here. - -config MATH_EMULATION - bool "Math emulation" - depends on 4xx || 8xx - ---help--- - Some PowerPC chips designed for embedded applications do not have - a floating-point unit and therefore do not implement the - floating-point instructions in the PowerPC instruction set. If you - say Y here, the kernel will include code to emulate a floating-point - unit, which will allow programs that use floating-point - instructions to run. - - If you have an Apple machine or an IBM RS/6000 or pSeries machine, - or any machine with a 6xx, 7xx or 7xxx series processor, say N - here. Saying Y here will not hurt performance (on any machine) but - will increase the size of the kernel. - -config KEXEC - bool "kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL - help - kexec is a system call that implements the ability to shutdown your - current kernel, and to start another kernel. It is like a reboot - but it is independent of the system firmware. And like a reboot - you can start any kernel with it, not just Linux. - - The name comes from the similarity to the exec system call. - - It is an ongoing process to be certain the hardware in a machine - is properly shutdown, so do not be surprised if this code does not - initially work for you. It may help to enable device hotplugging - support. As of this writing the exact hardware interface is - strongly in flux, so no good recommendation can be made. - - In the GameCube implementation, kexec allows you to load and - run DOL files, including kernel and homebrew DOLs. - -source "drivers/cpufreq/Kconfig" - -config PPC601_SYNC_FIX - bool "Workarounds for PPC601 bugs" - depends on 6xx && PPC_PREP - help - Some versions of the PPC601 (the first PowerPC chip) have bugs which - mean that extra synchronization instructions are required near - certain instructions, typically those that make major changes to the - CPU state. These extra instructions reduce performance slightly. - If you say N here, these extra instructions will not be included, - resulting in a kernel which will run faster but may not run at all - on some systems with the PPC601 chip. - - If in doubt, say Y here. - -source arch/ppc/platforms/4xx/Kconfig - -config PPC_STD_MMU - bool - depends on 6xx - default y - -config NOT_COHERENT_CACHE - bool - depends on 4xx || 8xx - default y - -endmenu - -menu "Platform options" - -config FADS - bool - -choice - prompt "8xx Machine Type" - depends on 8xx - default RPXLITE - -config RPXLITE - bool "RPX-Lite" - ---help--- - Single-board computers based around the PowerPC MPC8xx chips and - intended for embedded applications. The following types are - supported: - - RPX-Lite: - Embedded Planet RPX Lite. PC104 form-factor SBC based on the MPC823. - - RPX-Classic: - Embedded Planet RPX Classic Low-fat. Credit-card-size SBC based on - the MPC 860 - - BSE-IP: - Bright Star Engineering ip-Engine. - - TQM823L: - TQM850L: - TQM855L: - TQM860L: - MPC8xx based family of mini modules, half credit card size, - up to 64 MB of RAM, 8 MB Flash, (Fast) Ethernet, 2 x serial ports, - 2 x CAN bus interface, ... - Manufacturer: TQ Components, www.tq-group.de - Date of Release: October (?) 1999 - End of Life: not yet :-) - URL: - - module: - - starter kit: - - images: - - FPS850L: - FingerPrint Sensor System (based on TQM850L) - Manufacturer: IKENDI AG, - Date of Release: November 1999 - End of life: end 2000 ? - URL: see TQM850L - - IVMS8: - MPC860 based board used in the "Integrated Voice Mail System", - Small Version (8 voice channels) - Manufacturer: Speech Design, - Date of Release: December 2000 (?) - End of life: - - URL: - - IVML24: - MPC860 based board used in the "Integrated Voice Mail System", - Large Version (24 voice channels) - Manufacturer: Speech Design, - Date of Release: March 2001 (?) - End of life: - - URL: - - HERMES: - Hermes-Pro ISDN/LAN router with integrated 8 x hub - Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik - - Date of Release: 2000 (?) - End of life: - - URL: - - IP860: - VMEBus IP (Industry Pack) carrier board with MPC860 - Manufacturer: MicroSys GmbH, - Date of Release: ? - End of life: - - URL: - - PCU_E: - PCU = Peripheral Controller Unit, Extended - Manufacturer: Siemens AG, ICN (Information and Communication Networks) - - Date of Release: April 2001 - End of life: August 2001 - URL: n. a. - -config RPXCLASSIC - bool "RPX-Classic" - help - The RPX-Classic is a single-board computer based on the Motorola - MPC860. It features 16MB of DRAM and a variable amount of flash, - I2C EEPROM, thermal monitoring, a PCMCIA slot, a DIP switch and two - LEDs. Variants with Ethernet ports exist. Say Y here to support it - directly. - -config BSEIP - bool "BSE-IP" - help - Say Y here to support the Bright Star Engineering ipEngine SBC. - This is a credit-card-sized device featuring a MPC823 processor, - 26MB DRAM, 4MB flash, Ethernet, a 16K-gate FPGA, USB, an LCD/video - controller, and two RS232 ports. - -config MPC8XXFADS - bool "FADS" - select FADS - -config TQM823L - bool "TQM823L" - help - Say Y here to support the TQM823L, one of an MPC8xx-based family of - mini SBCs (half credit-card size) from TQ Components first released - in late 1999. Technical references are at - , and - , and an image at - . - -config TQM850L - bool "TQM850L" - help - Say Y here to support the TQM850L, one of an MPC8xx-based family of - mini SBCs (half credit-card size) from TQ Components first released - in late 1999. Technical references are at - , and - , and an image at - . - -config TQM855L - bool "TQM855L" - help - Say Y here to support the TQM855L, one of an MPC8xx-based family of - mini SBCs (half credit-card size) from TQ Components first released - in late 1999. Technical references are at - , and - , and an image at - . - -config TQM860L - bool "TQM860L" - help - Say Y here to support the TQM860L, one of an MPC8xx-based family of - mini SBCs (half credit-card size) from TQ Components first released - in late 1999. Technical references are at - , and - , and an image at - . - -config FPS850L - bool "FPS850L" - -config IVMS8 - bool "IVMS8" - help - Say Y here to support the Integrated Voice-Mail Small 8-channel SBC - from Speech Design, released March 2001. The manufacturer's website - is at . - -config IVML24 - bool "IVML24" - help - Say Y here to support the Integrated Voice-Mail Large 24-channel SBC - from Speech Design, released March 2001. The manufacturer's website - is at . - -config HERMES_PRO - bool "HERMES" - -config IP860 - bool "IP860" - -config LWMON - bool "LWMON" - -config PCU_E - bool "PCU_E" - -config CCM - bool "CCM" - -config LANTEC - bool "LANTEC" - -config MBX - bool "MBX" - help - MBX is a line of Motorola single-board computer based around the - MPC821 and MPC860 processors, and intended for embedded-controller - applications. Say Y here to support these boards directly. - -config WINCEPT - bool "WinCept" - help - The Wincept 100/110 is a Motorola single-board computer based on the - MPC821 PowerPC, introduced in 1998 and designed to be used in - thin-client machines. Say Y to support it directly. - -endchoice - -choice - prompt "Machine Type" - depends on 6xx - default PPC_PREP - ---help--- - Linux currently supports several different kinds of PowerPC-based - machines: Apple Power Macintoshes and clones (such as the Motorola - Starmax series), PReP (PowerPC Reference Platform) machines (such - as the Motorola PowerStacks, Motorola cPCI/VME embedded systems, - and some IBM RS/6000 systems), CHRP (Common Hardware Reference - Platform) machines (including all of the recent IBM RS/6000 and - pSeries machines), and several embedded PowerPC systems containing - 4xx, 6xx, 7xx, 8xx, 74xx, and 82xx processors. Currently, the - default option is to build a kernel which works on PReP. - - Note that support for Apple and CHRP machines is now only available - with ARCH=powerpc, and has been removed from this menu. If you - wish to build a kernel for an Apple or CHRP machine, exit this - configuration process and re-run it with ARCH=powerpc. - - Select PReP if configuring for a PReP machine. - -config PPC_PREP - bool "PReP" - -config KATANA - bool "Artesyn-Katana" - help - Select KATANA if configuring an Artesyn KATANA 750i or 3750 - cPCI board. - -config WILLOW - bool "Cogent-Willow" - -config CPCI690 - bool "Force-CPCI690" - help - Select CPCI690 if configuring a Force CPCI690 cPCI board. - -config POWERPMC250 - bool "Force-PowerPMC250" - -config CHESTNUT - bool "IBM 750FX Eval board or 750GX Eval board" - help - Select CHESTNUT if configuring an IBM 750FX Eval Board or a - IBM 750GX Eval board. - -config SPRUCE - bool "IBM-Spruce" - select PPC_INDIRECT_PCI - -config HDPU - bool "Sky-HDPU" - help - Select HDPU if configuring a Sky Computers Compute Blade. - -config HDPU_FEATURES - depends on HDPU - tristate "HDPU-Features" - help - Select to enable HDPU enhanced features. - -config EV64260 - bool "Marvell-EV64260BP" - help - Select EV64260 if configuring a Marvell (formerly Galileo) - EV64260BP Evaluation platform. - -config LOPEC - bool "Motorola-LoPEC" - select PPC_I8259 - -config MVME5100 - bool "Motorola-MVME5100" - select PPC_INDIRECT_PCI - -config PPLUS - bool "Motorola-PowerPlus" - select PPC_I8259 - select PPC_INDIRECT_PCI - -config PRPMC750 - bool "Motorola-PrPMC750" - select PPC_INDIRECT_PCI - -config PRPMC800 - bool "Motorola-PrPMC800" - select PPC_INDIRECT_PCI - -config SANDPOINT - bool "Motorola-Sandpoint" - select PPC_I8259 - help - Select SANDPOINT if configuring for a Motorola Sandpoint X3 - (any flavor). - -config RADSTONE_PPC7D - bool "Radstone Technology PPC7D board" - select PPC_I8259 - -config PAL4 - bool "SBS-Palomar4" - -config EST8260 - bool "EST8260" - ---help--- - The EST8260 is a single-board computer manufactured by Wind River - Systems, Inc. (formerly Embedded Support Tools Corp.) and based on - the MPC8260. Wind River Systems has a website at - , but the EST8260 cannot be found on it - and has probably been discontinued or rebadged. - -config SBC82xx - bool "SBC82xx" - ---help--- - SBC PowerQUICC II, single-board computer with MPC82xx CPU - Manufacturer: Wind River Systems, Inc. - Date of Release: May 2003 - End of Life: - - URL: - -config SBS8260 - bool "SBS8260" - -config RPX8260 - bool "RPXSUPER" - -config TQM8260 - bool "TQM8260" - ---help--- - MPC8260 based module, little larger than credit card, - up to 128 MB global + 64 MB local RAM, 32 MB Flash, - 32 kB EEPROM, 256 kB L@ Cache, 10baseT + 100baseT Ethernet, - 2 x serial ports, ... - Manufacturer: TQ Components, www.tq-group.de - Date of Release: June 2001 - End of Life: not yet :-) - URL: - -config PQ2FADS - bool "Freescale-PQ2FADS" - help - Select PQ2FADS if you wish to configure for a Freescale - PQ2FADS board (-VR or -ZU). - -config LITE5200 - bool "Freescale LITE5200 / (IceCube)" - select PPC_MPC52xx - help - Support for the LITE5200 dev board for the MPC5200 from Freescale. - This is for the LITE5200 version 2.0 board. Don't know if it changes - much but it's only been tested on this board version. I think this - board is also known as IceCube. - -config LITE5200B - bool "Freescale LITE5200B" - depends on LITE5200 - help - Support for the LITE5200B dev board for the MPC5200 from Freescale. - This is the new board with 2 PCI slots. - -config EV64360 - bool "Marvell-EV64360BP" - help - Select EV64360 if configuring a Marvell EV64360BP Evaluation - platform. -endchoice - -config TQM8xxL - bool - depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L) - default y - -config EMBEDDEDBOOT - bool - depends on 8xx || 8260 - default y - -config PPC_MPC52xx - bool - -config 8260 - bool "CPM2 Support" if WILLOW - depends on 6xx - default y if TQM8260 || RPX8260 || EST8260 || SBS8260 || SBC82xx || PQ2FADS - help - The MPC8260 is a typical embedded CPU made by Motorola. Selecting - this option means that you wish to build a kernel for a machine with - an 8260 class CPU. - -config CPM1 - bool - depends on 8xx - default y - help - The CPM1 (Communications Processor Module) is a coprocessor on - embedded CPUs made by Motorola. Selecting this option means that - you wish to build a kernel for a machine with a CPM1 coprocessor - on it (8xx, 827x, 8560). - -config CPM2 - bool - depends on 8260 || MPC8560 || MPC8555 - select PPC_LIB_RHEAP - default y - help - The CPM2 (Communications Processor Module) is a coprocessor on - embedded CPUs made by Motorola. Selecting this option means that - you wish to build a kernel for a machine with a CPM2 coprocessor - on it (826x, 827x, 8560). - -config PPC_GEN550 - bool - depends on SANDPOINT || SPRUCE || PPLUS || \ - PRPMC750 || PRPMC800 || LOPEC || \ - (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D - default y - -config FORCE - bool - depends on 6xx && POWERPMC250 - default y - -config GT64260 - bool - depends on EV64260 || CPCI690 - default y - -config MV64360 # Really MV64360 & MV64460 - bool - depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU || EV64360 - default y - -config MV64X60 - bool - depends on (GT64260 || MV64360) - select PPC_INDIRECT_PCI - default y - -config MV643XX_ETH_0 - bool - depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360 || HDPU) - default y - -config MV643XX_ETH_1 - bool - depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360) - default y - -config MV643XX_ETH_2 - bool - depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360) - default y - -menu "Set bridge options" - depends on MV64X60 - -config NOT_COHERENT_CACHE - bool "Turn off Cache Coherency" - default n - help - Some 64x60 bridges lock up when trying to enforce cache coherency. - When this option is selected, cache coherency will be turned off. - Note that this can cause other problems (e.g., stale data being - speculatively loaded via a cached mapping). Use at your own risk. - -config MV64X60_BASE - hex "Set bridge base used by firmware" - default "0xf1000000" - help - A firmware can leave the base address of the bridge's registers at - a non-standard location. If so, set this value to reflect the - address of that non-standard location. - -config MV64X60_NEW_BASE - hex "Set bridge base used by kernel" - default "0xf1000000" - help - If the current base address of the bridge's registers is not where - you want it, set this value to the address that you want it moved to. - -endmenu - -config NONMONARCH_SUPPORT - bool "Enable Non-Monarch Support" - depends on PRPMC800 - -config HARRIER - bool - depends on PRPMC800 - default y - -config EPIC_SERIAL_MODE - bool - depends on 6xx && (LOPEC || SANDPOINT) - default y - -config MPC10X_BRIDGE - bool - depends on POWERPMC250 || LOPEC || SANDPOINT - select PPC_INDIRECT_PCI - default y - -config MPC10X_OPENPIC - bool - depends on POWERPMC250 || LOPEC || SANDPOINT - default y - -config MPC10X_STORE_GATHERING - bool "Enable MPC10x store gathering" - depends on MPC10X_BRIDGE - -config SANDPOINT_ENABLE_UART1 - bool "Enable DUART mode on Sandpoint" - depends on SANDPOINT - help - If this option is enabled then the MPC824x processor will run - in DUART mode instead of UART mode. - -config HARRIER_STORE_GATHERING - bool "Enable Harrier store gathering" - depends on HARRIER - -config MVME5100_IPMC761_PRESENT - bool "MVME5100 configured with an IPMC761" - depends on MVME5100 - select PPC_I8259 - -config SPRUCE_BAUD_33M - bool "Spruce baud clock support" - depends on SPRUCE - -config PC_KEYBOARD - bool "PC PS/2 style Keyboard" - depends on 4xx || CPM2 - -config PPCBUG_NVRAM - bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC - default y if PPC_PREP - -config SMP - depends on PPC_STD_MMU - bool "Symmetric multi-processing support" - ---help--- - This enables support for systems with more than one CPU. If you have - a system with only one CPU, say N. If you have a system with more - than one CPU, say Y. Note that the kernel does not currently - support SMP machines with 603/603e/603ev or PPC750 ("G3") processors - since they have inadequate hardware support for multiprocessor - operation. - - If you say N here, the kernel will run on single and multiprocessor - machines, but will use only one CPU of a multiprocessor machine. If - you say Y here, the kernel will run on single-processor machines. - On a single-processor machine, the kernel will run faster if you say - N here. - - If you don't know what to do here, say N. - -config IRQ_ALL_CPUS - bool "Distribute interrupts on all CPUs by default" - depends on SMP && !MV64360 - help - This option gives the kernel permission to distribute IRQs across - multiple CPUs. Saying N here will route all IRQs to the first - CPU. Generally saying Y is safe, although some problems have been - reported with SMP Power Macintoshes with this option enabled. - -config NR_CPUS - int "Maximum number of CPUs (2-32)" - range 2 32 - depends on SMP - default "4" - -config HIGHMEM - bool "High memory support" - -config ARCH_POPULATES_NODE_MAP - def_bool y - -source kernel/Kconfig.hz -source kernel/Kconfig.preempt -source "mm/Kconfig" - -source "fs/Kconfig.binfmt" - -config PREP_RESIDUAL - bool "Support for PReP Residual Data" - depends on PPC_PREP - help - Some PReP systems have residual data passed to the kernel by the - firmware. This allows detection of memory size, devices present and - other useful pieces of information. Sometimes this information is - not present or incorrect, in which case it could lead to the machine - behaving incorrectly. If this happens, either disable PREP_RESIDUAL - or pass the 'noresidual' option to the kernel. - - If you are running a PReP system, say Y here, otherwise say N. - -config PROC_PREPRESIDUAL - bool "Support for reading of PReP Residual Data in /proc" - depends on PREP_RESIDUAL && PROC_FS - help - Enabling this option will create a /proc/residual file which allows - you to get at the residual data on PReP systems. You will need a tool - (lsresidual) to parse it. If you aren't on a PReP system, you don't - want this. - -config CMDLINE_BOOL - bool "Default bootloader kernel arguments" - -config CMDLINE - string "Initial kernel command string" - depends on CMDLINE_BOOL - default "console=ttyS0,9600 console=tty0 root=/dev/sda2" - help - On some platforms, there is currently no way for the boot loader to - pass arguments to the kernel. For these platforms, you can supply - some command-line options at build time by entering them here. In - most cases you will need to specify the root device here. - -if BROKEN -source kernel/power/Kconfig -endif - -config SECCOMP - bool "Enable seccomp to safely compute untrusted bytecode" - depends on PROC_FS - default y - help - This kernel feature is useful for number crunching applications - that may need to compute untrusted bytecode during their - execution. By using pipes or other transports made available to - the process as file descriptors supporting the read/write - syscalls, it's possible to isolate those applications in - their own address space using seccomp. Once seccomp is - enabled via /proc//seccomp, it cannot be disabled - and the task is only allowed to execute a few safe syscalls - defined by each seccomp mode. - - If unsure, say Y. Only embedded should say N here. - -endmenu - -config ISA_DMA_API - bool - default y - -menu "Bus options" - -config ISA - bool "Support for ISA-bus hardware" - depends on PPC_PREP - help - Find out whether you have ISA slots on your motherboard. ISA is the - name of a bus system, i.e. the way the CPU talks to the other stuff - inside your box. If you have an Apple machine, say N here; if you - have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If - you have an embedded board, consult your board documentation. - -config ZONE_DMA - bool - default y - -config GENERIC_ISA_DMA - bool - depends on 6xx && !CPM2 - default y - -config PPC_I8259 - bool - default y if PPC_PREP - default n - -config PPC_INDIRECT_PCI - bool - depends on PCI - default y if 40x || 44x || PPC_PREP - default n - -config EISA - bool - help - The Extended Industry Standard Architecture (EISA) bus is a bus - architecture used on some older intel-based PCs. - -config SBUS - bool - -# Yes MCA RS/6000s exist but Linux-PPC does not currently support any -config MCA - bool - -config PCI - bool "PCI support" if 40x || CPM2 || PPC_MPC52xx - default y if !40x && !CPM2 && !8xx - default PCI_QSPAN if !4xx && !CPM2 && 8xx - help - Find out whether your system includes a PCI bus. PCI is the name of - a bus system, i.e. the way the CPU talks to the other stuff inside - your box. If you say Y here, the kernel will include drivers and - infrastructure code to support PCI bus devices. - -config PCI_DOMAINS - def_bool PCI - -config PCI_SYSCALL - def_bool PCI - -config PCI_QSPAN - bool "QSpan PCI" - depends on !4xx && !CPM2 && 8xx - select PPC_I8259 - help - Say Y here if you have a system based on a Motorola 8xx-series - embedded processor with a QSPAN PCI interface, otherwise say N. - -config PCI_8260 - bool - depends on PCI && 8260 - select PPC_INDIRECT_PCI - default y - -config 8260_PCI9 - bool "Enable workaround for MPC826x erratum PCI 9" - depends on PCI_8260 - default y - -choice - prompt "IDMA channel for PCI 9 workaround" - depends on 8260_PCI9 - -config 8260_PCI9_IDMA1 - bool "IDMA1" - -config 8260_PCI9_IDMA2 - bool "IDMA2" - -config 8260_PCI9_IDMA3 - bool "IDMA3" - -config 8260_PCI9_IDMA4 - bool "IDMA4" - -endchoice - -source "drivers/pci/Kconfig" - -source "drivers/pcmcia/Kconfig" - -config RAPIDIO - bool "RapidIO support" if MPC8540 || MPC8560 - help - If you say Y here, the kernel will include drivers and - infrastructure code to support RapidIO interconnect devices. - -source "drivers/rapidio/Kconfig" - -endmenu - -menu "Advanced setup" - -config ADVANCED_OPTIONS - bool "Prompt for advanced kernel configuration options" - help - This option will enable prompting for a variety of advanced kernel - configuration options. These options can cause the kernel to not - work if they are set incorrectly, but can be used to optimize certain - aspects of kernel memory management. - - Unless you know what you are doing, say N here. - -comment "Default settings for advanced configuration options are used" - depends on !ADVANCED_OPTIONS - -config HIGHMEM_START_BOOL - bool "Set high memory pool address" - depends on ADVANCED_OPTIONS && HIGHMEM - help - This option allows you to set the base address of the kernel virtual - area used to map high memory pages. This can be useful in - optimizing the layout of kernel virtual memory. - - Say N here unless you know what you are doing. - -config HIGHMEM_START - hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL - default "0xfe000000" - -config LOWMEM_SIZE_BOOL - bool "Set maximum low memory" - depends on ADVANCED_OPTIONS - help - This option allows you to set the maximum amount of memory which - will be used as "low memory", that is, memory which the kernel can - access directly, without having to set up a kernel virtual mapping. - This can be useful in optimizing the layout of kernel virtual - memory. - - Say N here unless you know what you are doing. - -config LOWMEM_SIZE - hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL - default "0x30000000" - -config KERNEL_START_BOOL - bool "Set custom kernel base address" - depends on ADVANCED_OPTIONS - help - This option allows you to set the kernel virtual address at which - the kernel will map low memory (the kernel image will be linked at - this address). This can be useful in optimizing the virtual memory - layout of the system. - - Say N here unless you know what you are doing. - -config KERNEL_START - hex "Virtual address of kernel base" if KERNEL_START_BOOL - default "0xc0000000" - -config TASK_SIZE_BOOL - bool "Set custom user task size" - depends on ADVANCED_OPTIONS - help - This option allows you to set the amount of virtual address space - allocated to user tasks. This can be useful in optimizing the - virtual memory layout of the system. - - Say N here unless you know what you are doing. - -config TASK_SIZE - hex "Size of user task space" if TASK_SIZE_BOOL - default "0x80000000" - -config CONSISTENT_START_BOOL - bool "Set custom consistent memory pool address" - depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE - help - This option allows you to set the base virtual address - of the consistent memory pool. This pool of virtual - memory is used to make consistent memory allocations. - -config CONSISTENT_START - hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL - default "0xff100000" if NOT_COHERENT_CACHE - -config CONSISTENT_SIZE_BOOL - bool "Set custom consistent memory pool size" - depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE - help - This option allows you to set the size of the - consistent memory pool. This pool of virtual memory - is used to make consistent memory allocations. - -config CONSISTENT_SIZE - hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL - default "0x00200000" if NOT_COHERENT_CACHE - -config BOOT_LOAD_BOOL - bool "Set the boot link/load address" - depends on ADVANCED_OPTIONS && !PPC_PREP - help - This option allows you to set the initial load address of the zImage - or zImage.initrd file. This can be useful if you are on a board - which has a small amount of memory. - - Say N here unless you know what you are doing. - -config BOOT_LOAD - hex "Link/load address for booting" if BOOT_LOAD_BOOL - default "0x00400000" if 40x || 8xx || 8260 - default "0x01000000" if 44x - default "0x00800000" - -config PIN_TLB - bool "Pinned Kernel TLBs (860 ONLY)" - depends on ADVANCED_OPTIONS && 8xx - -config PPC_LIB_RHEAP - bool - -endmenu - -source "net/Kconfig" - -source "drivers/Kconfig" - -source "fs/Kconfig" - -source "arch/ppc/8xx_io/Kconfig" - -source "arch/ppc/8260_io/Kconfig" - - -menu "IBM 40x options" - depends on 40x - -config SERIAL_SICC - bool "SICC Serial port" - depends on STB03xxx - -config UART1_DFLT_CONSOLE - bool - depends on SERIAL_SICC && UART0_TTYS1 - default y - -config SERIAL_SICC_CONSOLE - bool - depends on SERIAL_SICC && UART0_TTYS1 - default y - -endmenu - -source "lib/Kconfig" - -source "arch/ppc/Kconfig.debug" - -source "security/Kconfig" - -source "crypto/Kconfig" diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug deleted file mode 100644 index f94b87740973832adc8b9aee6c951ab46c36963c..0000000000000000000000000000000000000000 --- a/arch/ppc/Kconfig.debug +++ /dev/null @@ -1,66 +0,0 @@ -menu "Kernel hacking" - -source "lib/Kconfig.debug" - -config KGDB - bool "Include kgdb kernel debugger" - depends on DEBUG_KERNEL && (BROKEN || PPC_GEN550 || 4xx) - select DEBUG_INFO - help - Include in-kernel hooks for kgdb, the Linux kernel source level - debugger. See for more information. - Unless you are intending to debug the kernel, say N here. - -choice - prompt "Serial Port" - depends on KGDB - default KGDB_TTYS1 - -config KGDB_TTYS0 - bool "ttyS0" - -config KGDB_TTYS1 - bool "ttyS1" - -config KGDB_TTYS2 - bool "ttyS2" - -config KGDB_TTYS3 - bool "ttyS3" - -endchoice - -config KGDB_CONSOLE - bool "Enable serial console thru kgdb port" - depends on KGDB && 8xx || CPM2 - help - If you enable this, all serial console messages will be sent - over the gdb stub. - If unsure, say N. - -config XMON - bool "Include xmon kernel debugger" - depends on DEBUG_KERNEL - help - Include in-kernel hooks for the xmon kernel monitor/debugger. - Unless you are intending to debug the kernel, say N here. - -config BDI_SWITCH - bool "Include BDI-2000 user context switcher" - depends on DEBUG_KERNEL - help - Include in-kernel support for the Abatron BDI2000 debugger. - Unless you are intending to debug the kernel with one of these - machines, say N here. - -config SERIAL_TEXT_DEBUG - bool "Support for early boot texts over serial port" - depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \ - PPC_GEN550 || PPC_MPC52xx - -config PPC_OCP - bool - depends on IBM_OCP - default y - -endmenu diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile deleted file mode 100644 index 2352d139b262bd378434987782bf1c5b0592404c..0000000000000000000000000000000000000000 --- a/arch/ppc/Makefile +++ /dev/null @@ -1,135 +0,0 @@ -# This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 1994 by Linus Torvalds -# Changes for PPC by Gary Thomas -# Rewritten by Cort Dougan and Paul Mackerras -# - -# This must match PAGE_OFFSET in include/asm-ppc/page.h. -KERNELLOAD := $(CONFIG_KERNEL_START) - -HAS_BIARCH := $(call cc-option-yn, -m32) -ifeq ($(HAS_BIARCH),y) -AS := $(AS) -a32 -LD := $(LD) -m elf32ppc -CC := $(CC) -m32 -endif - -LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic -# The -Iarch/$(ARCH)/include is temporary while we are merging -KBUILD_CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include -KBUILD_AFLAGS += -Iarch/$(ARCH) -KBUILD_CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \ - -ffixed-r2 -mmultiple - -# No AltiVec instruction when building kernel -KBUILD_CFLAGS += $(call cc-option, -mno-altivec) - -CPP = $(CC) -E $(KBUILD_CFLAGS) -# Temporary hack until we have migrated to asm-powerpc -LINUXINCLUDE += -Iarch/$(ARCH)/include - -CHECKFLAGS += -D__powerpc__ - -cpu-as-$(CONFIG_4xx) += -Wa,-m405 -cpu-as-$(CONFIG_6xx) += -Wa,-maltivec - -KBUILD_AFLAGS += $(cpu-as-y) -KBUILD_CFLAGS += $(cpu-as-y) - -# Default to the common case. -KBUILD_DEFCONFIG := ebony_defconfig - -head-y := arch/ppc/kernel/head.o -head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o -head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o -head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o - -head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o - -core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \ - arch/ppc/platforms/ \ - arch/ppc/mm/ arch/ppc/lib/ \ - arch/ppc/syslib/ arch/powerpc/sysdev/ \ - arch/powerpc/lib/ -core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ -core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/ -core-$(CONFIG_XMON) += arch/ppc/xmon/ -drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/ -drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/ -drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/ - -drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/ - -BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm - -PHONY += $(BOOT_TARGETS) - -all: uImage zImage - -CPPFLAGS_vmlinux.lds := -Upowerpc - -# All the instructions talk about "make bzImage". -bzImage: zImage - -boot := arch/$(ARCH)/boot - -$(BOOT_TARGETS): vmlinux - $(Q)$(MAKE) $(build)=$(boot) $@ - -uImage: vmlinux - $(Q)$(MAKE) $(build)=$(boot)/images $(boot)/images/$@ - -define archhelp - @echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)' - @echo ' uImage - Create a bootable image for U-Boot / PPCBoot' - @echo ' install - Install kernel using' - @echo ' (your) ~/bin/installkernel or' - @echo ' (distribution) /sbin/installkernel or' - @echo ' install to $$(INSTALL_PATH) and run lilo' - @echo ' *_defconfig - Select default config from arch/$(ARCH)/ppc/configs' -endef - -archclean: - $(Q)$(MAKE) $(clean)=arch/ppc/boot - # Temporary hack until we have migrated to asm-powerpc - $(Q)rm -rf arch/$(ARCH)/include - -archprepare: checkbin - -# Temporary hack until we have migrated to asm-powerpc -include/asm: arch/$(ARCH)/include/asm -arch/$(ARCH)/include/asm: - $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi - $(Q)ln -fsn $(srctree)/include/asm-powerpc arch/$(ARCH)/include/asm - -# Use the file '.tmp_gas_check' for binutils tests, as gas won't output -# to stdout and these checks are run even on install targets. -TOUT := .tmp_gas_check -# Ensure this is binutils 2.12.1 (or 2.12.90.0.7) or later for altivec -# instructions. -# gcc-3.4 and binutils-2.14 are a fatal combination. - -checkbin: - @if test "$(call cc-version)" = "0304" ; then \ - if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) >/dev/null 2>&1 ; then \ - echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build '; \ - echo 'correctly with gcc-3.4 and your version of binutils.'; \ - echo '*** Please upgrade your binutils or downgrade your gcc'; \ - false; \ - fi ; \ - fi - @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \ - echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \ - echo 'correctly with old versions of binutils.' ; \ - echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \ - false ; \ - fi - -CLEAN_FILES += $(TOUT) - diff --git a/arch/ppc/boot/Makefile b/arch/ppc/boot/Makefile deleted file mode 100644 index 500497e3c72dde5096673c2f4fc893135cfa49ea..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/Makefile +++ /dev/null @@ -1,37 +0,0 @@ -# -# arch/ppc/boot/Makefile -# -# This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Copyright (C) 1994 by Linus Torvalds -# Adapted for PowerPC by Gary Thomas -# modified by Cort (cort@cs.nmt.edu) -# - -# KBUILD_CFLAGS used when building rest of boot (takes effect recursively) -KBUILD_CFLAGS += -fno-builtin -D__BOOTER__ -Iarch/$(ARCH)/boot/include -HOSTCFLAGS += -Iarch/$(ARCH)/boot/include - -BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd - -bootdir-y := simple -subdir-y := lib common images -subdir-$(CONFIG_PPC_PREP) += of1275 - -# for cleaning -subdir- += simple - -hostprogs-y := $(addprefix utils/, mkprep mkbugboot mktree) - -PHONY += $(BOOT_TARGETS) $(bootdir-y) - -$(BOOT_TARGETS): $(bootdir-y) - -$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \ - $(addprefix $(obj)/,$(hostprogs-y)) - $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS) diff --git a/arch/ppc/boot/common/Makefile b/arch/ppc/boot/common/Makefile deleted file mode 100644 index a2e85e3beb880418cee3f10b80df3ebe338bac95..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# -# Tom Rini January 2001 -# - -lib-y := string.o util.o misc-common.o \ - serial_stub.o bootinfo.o -lib-$(CONFIG_SERIAL_8250_CONSOLE) += ns16550.o diff --git a/arch/ppc/boot/common/bootinfo.c b/arch/ppc/boot/common/bootinfo.c deleted file mode 100644 index f4dc9b9fab9c1d8e5110bec55fe57a82b87c8c9b..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/bootinfo.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * General bootinfo record utilities - * Author: Randy Vinson - * - * 2002 (c) MontaVista Software, Inc. This file is licensed under the terms - * of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#include -#include -#include - -#include "nonstdio.h" - -static struct bi_record * birec = NULL; - -static struct bi_record * -__bootinfo_build(struct bi_record *rec, unsigned long tag, unsigned long size, - void *data) -{ - /* set the tag */ - rec->tag = tag; - - /* if the caller has any data, copy it */ - if (size) - memcpy(rec->data, (char *)data, size); - - /* set the record size */ - rec->size = sizeof(struct bi_record) + size; - - /* advance to the next available space */ - rec = (struct bi_record *)((unsigned long)rec + rec->size); - - return rec; -} - -void -bootinfo_init(struct bi_record *rec) -{ - - /* save start of birec area */ - birec = rec; - - /* create an empty list */ - rec = __bootinfo_build(rec, BI_FIRST, 0, NULL); - (void) __bootinfo_build(rec, BI_LAST, 0, NULL); - -} - -void -bootinfo_append(unsigned long tag, unsigned long size, void * data) -{ - - struct bi_record *rec = birec; - - /* paranoia */ - if ((rec == NULL) || (rec->tag != BI_FIRST)) - return; - - /* find the last entry in the list */ - while (rec->tag != BI_LAST) - rec = (struct bi_record *)((ulong)rec + rec->size); - - /* overlay BI_LAST record with new one and tag on a new BI_LAST */ - rec = __bootinfo_build(rec, tag, size, data); - (void) __bootinfo_build(rec, BI_LAST, 0, NULL); -} diff --git a/arch/ppc/boot/common/crt0.S b/arch/ppc/boot/common/crt0.S deleted file mode 100644 index 8f0ef04b8de509b8ccf86caded71640ee912e0f6..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/crt0.S +++ /dev/null @@ -1,80 +0,0 @@ -/* Copyright (c) 1997 Paul Mackerras - * Initial Power Macintosh COFF version. - * Copyright (c) 1999 Grant Erickson - * Modifications for IBM PowerPC 400-class processor evaluation - * boards. - * - * Module name: crt0.S - * - * Description: - * Boot loader execution entry point. Clears out .bss section as per - * ANSI C requirements. Invalidates and flushes the caches over the - * range covered by the boot loader's .text section. Sets up a stack - * below the .text section entry point. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - - .text - - .globl _start -_start: -#ifdef XCOFF - .long __start,0,0 - - .globl __start -__start: -#endif - - ## Flush and invalidate the caches for the range in memory covering - ## the .text section of the boot loader - - lis r9,_start@h # r9 = &_start - lis r8,_etext@ha # - addi r8,r8,_etext@l # r8 = &_etext -3: dcbf r0,r9 # Flush the data cache - icbi r0,r9 # Invalidate the instruction cache - addi r9,r9,0x10 # Increment by one cache line - cmplw cr0,r9,r8 # Are we at the end yet? - blt 3b # No, keep flushing and invalidating - sync # sync ; isync after flushing the icache - isync - - ## Clear out the BSS as per ANSI C requirements - - lis r7,_end@ha - addi r7,r7,_end@l # r7 = &_end - lis r8,__bss_start@ha # - addi r8,r8,__bss_start@l # r8 = &_bss_start - - ## Determine how large an area, in number of words, to clear - - subf r7,r8,r7 # r7 = &_end - &_bss_start + 1 - addi r7,r7,3 # r7 += 3 - srwi. r7,r7,2 # r7 = size in words. - beq 2f # If the size is zero, do not bother - addi r8,r8,-4 # r8 -= 4 - mtctr r7 # SPRN_CTR = number of words to clear - li r0,0 # r0 = 0 -1: stwu r0,4(r8) # Clear out a word - bdnz 1b # If we are not done yet, keep clearing -2: - -#ifdef CONFIG_40x - ## Set up the stack - - lis r9,_start@h # r9 = &_start (text section entry) - ori r9,r9,_start@l - subi r1,r9,64 # Start the stack 64 bytes below _start - clrrwi r1,r1,4 # Make sure it is aligned on 16 bytes. - li r0,0 - stwu r0,-16(r1) - mtlr r9 -#endif - - b start # All done, start the real work. diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c deleted file mode 100644 index 9589969cec725d86b1817d0248efc244ec8b73ae..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/misc-common.c +++ /dev/null @@ -1,555 +0,0 @@ -/* - * Misc. bootloader code (almost) all platforms can use - * - * Author: Johnnie Peters - * Editor: Tom Rini - * - * Derived from arch/ppc/boot/prep/misc.c - * - * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include /* for va_ bits */ -#include -#include -#include "nonstdio.h" - -/* If we're on a PReP, assume we have a keyboard controller - * Also note, if we're not PReP, we assume you are a serial - * console - Tom */ -#if defined(CONFIG_PPC_PREP) && defined(CONFIG_VGA_CONSOLE) -extern void cursor(int x, int y); -extern void scroll(void); -extern char *vidmem; -extern int lines, cols; -extern int orig_x, orig_y; -extern int keyb_present; -extern int CRT_tstc(void); -extern int CRT_getc(void); -#else -int cursor(int x, int y) {return 0;} -void scroll(void) {} -char vidmem[1]; -#define lines 0 -#define cols 0 -int orig_x = 0; -int orig_y = 0; -#define keyb_present 0 -int CRT_tstc(void) {return 0;} -int CRT_getc(void) {return 0;} -#endif - -extern char *avail_ram; -extern char *end_avail; -extern char _end[]; - -void puts(const char *); -void putc(const char c); -void puthex(unsigned long val); -void gunzip(void *, int, unsigned char *, int *); -static int _cvt(unsigned long val, char *buf, long radix, char *digits); - -void _vprintk(void(*putc)(const char), const char *fmt0, va_list ap); -unsigned char *ISA_io = NULL; - -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE) \ - || defined(CONFIG_SERIAL_UARTLITE_CONSOLE) -extern unsigned long com_port; - -extern int serial_tstc(unsigned long com_port); -extern unsigned char serial_getc(unsigned long com_port); -extern void serial_putc(unsigned long com_port, unsigned char c); -#endif - -void pause(void) -{ - puts("pause\n"); -} - -void exit(void) -{ - puts("exit\n"); - while(1); -} - -int tstc(void) -{ -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE) \ - || defined(CONFIG_SERIAL_UARTLITE_CONSOLE) - if(keyb_present) - return (CRT_tstc() || serial_tstc(com_port)); - else - return (serial_tstc(com_port)); -#else - return CRT_tstc(); -#endif -} - -int getc(void) -{ - while (1) { -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE) \ - || defined(CONFIG_SERIAL_UARTLITE_CONSOLE) - if (serial_tstc(com_port)) - return (serial_getc(com_port)); -#endif /* serial console */ - if (keyb_present) - if(CRT_tstc()) - return (CRT_getc()); - } -} - -void -putc(const char c) -{ - int x,y; - -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE) \ - || defined(CONFIG_SERIAL_UARTLITE_CONSOLE) - serial_putc(com_port, c); - if ( c == '\n' ) - serial_putc(com_port, '\r'); -#endif /* serial console */ - - x = orig_x; - y = orig_y; - - if ( c == '\n' ) { - x = 0; - if ( ++y >= lines ) { - scroll(); - y--; - } - } else if (c == '\r') { - x = 0; - } else if (c == '\b') { - if (x > 0) { - x--; - } - } else { - vidmem [ ( x + cols * y ) * 2 ] = c; - if ( ++x >= cols ) { - x = 0; - if ( ++y >= lines ) { - scroll(); - y--; - } - } - } - - cursor(x, y); - - orig_x = x; - orig_y = y; -} - -void puts(const char *s) -{ - int x,y; - char c; - - x = orig_x; - y = orig_y; - - while ( ( c = *s++ ) != '\0' ) { -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE) \ - || defined(CONFIG_SERIAL_UARTLITE_CONSOLE) - serial_putc(com_port, c); - if ( c == '\n' ) serial_putc(com_port, '\r'); -#endif /* serial console */ - - if ( c == '\n' ) { - x = 0; - if ( ++y >= lines ) { - scroll(); - y--; - } - } else if (c == '\b') { - if (x > 0) { - x--; - } - } else { - vidmem [ ( x + cols * y ) * 2 ] = c; - if ( ++x >= cols ) { - x = 0; - if ( ++y >= lines ) { - scroll(); - y--; - } - } - } - } - - cursor(x, y); - - orig_x = x; - orig_y = y; -} - -void error(char *x) -{ - puts("\n\n"); - puts(x); - puts("\n\n -- System halted"); - - while(1); /* Halt */ -} - -static void *zalloc(unsigned size) -{ - void *p = avail_ram; - - size = (size + 7) & -8; - avail_ram += size; - if (avail_ram > end_avail) { - puts("oops... out of memory\n"); - pause(); - } - return p; -} - -#define HEAD_CRC 2 -#define EXTRA_FIELD 4 -#define ORIG_NAME 8 -#define COMMENT 0x10 -#define RESERVED 0xe0 - -void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp) -{ - z_stream s; - int r, i, flags; - - /* skip header */ - i = 10; - flags = src[3]; - if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) { - puts("bad gzipped data\n"); - exit(); - } - if ((flags & EXTRA_FIELD) != 0) - i = 12 + src[10] + (src[11] << 8); - if ((flags & ORIG_NAME) != 0) - while (src[i++] != 0) - ; - if ((flags & COMMENT) != 0) - while (src[i++] != 0) - ; - if ((flags & HEAD_CRC) != 0) - i += 2; - if (i >= *lenp) { - puts("gunzip: ran out of data in header\n"); - exit(); - } - - /* Initialize ourself. */ - s.workspace = zalloc(zlib_inflate_workspacesize()); - r = zlib_inflateInit2(&s, -MAX_WBITS); - if (r != Z_OK) { - puts("zlib_inflateInit2 returned "); puthex(r); puts("\n"); - exit(); - } - s.next_in = src + i; - s.avail_in = *lenp - i; - s.next_out = dst; - s.avail_out = dstlen; - r = zlib_inflate(&s, Z_FINISH); - if (r != Z_OK && r != Z_STREAM_END) { - puts("inflate returned "); puthex(r); puts("\n"); - exit(); - } - *lenp = s.next_out - (unsigned char *) dst; - zlib_inflateEnd(&s); -} - -void -puthex(unsigned long val) -{ - - unsigned char buf[10]; - int i; - for (i = 7; i >= 0; i--) - { - buf[i] = "0123456789ABCDEF"[val & 0x0F]; - val >>= 4; - } - buf[8] = '\0'; - puts(buf); -} - -#define FALSE 0 -#define TRUE 1 - -void -_printk(char const *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - _vprintk(putc, fmt, ap); - va_end(ap); - return; -} - -#define is_digit(c) ((c >= '0') && (c <= '9')) - -void -_vprintk(void(*putc)(const char), const char *fmt0, va_list ap) -{ - char c, sign, *cp = 0; - int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right; - char buf[32]; - long val; - while ((c = *fmt0++)) - { - if (c == '%') - { - c = *fmt0++; - left_prec = right_prec = pad_on_right = 0; - if (c == '-') - { - c = *fmt0++; - pad_on_right++; - } - if (c == '0') - { - zero_fill = TRUE; - c = *fmt0++; - } else - { - zero_fill = FALSE; - } - while (is_digit(c)) - { - left_prec = (left_prec * 10) + (c - '0'); - c = *fmt0++; - } - if (c == '.') - { - c = *fmt0++; - zero_fill++; - while (is_digit(c)) - { - right_prec = (right_prec * 10) + (c - '0'); - c = *fmt0++; - } - } else - { - right_prec = left_prec; - } - sign = '\0'; - switch (c) - { - case 'd': - case 'x': - case 'X': - val = va_arg(ap, long); - switch (c) - { - case 'd': - if (val < 0) - { - sign = '-'; - val = -val; - } - length = _cvt(val, buf, 10, "0123456789"); - break; - case 'x': - length = _cvt(val, buf, 16, "0123456789abcdef"); - break; - case 'X': - length = _cvt(val, buf, 16, "0123456789ABCDEF"); - break; - } - cp = buf; - break; - case 's': - cp = va_arg(ap, char *); - length = strlen(cp); - break; - case 'c': - c = va_arg(ap, long /*char*/); - (*putc)(c); - continue; - default: - (*putc)('?'); - } - pad = left_prec - length; - if (sign != '\0') - { - pad--; - } - if (zero_fill) - { - c = '0'; - if (sign != '\0') - { - (*putc)(sign); - sign = '\0'; - } - } else - { - c = ' '; - } - if (!pad_on_right) - { - while (pad-- > 0) - { - (*putc)(c); - } - } - if (sign != '\0') - { - (*putc)(sign); - } - while (length-- > 0) - { - (*putc)(c = *cp++); - if (c == '\n') - { - (*putc)('\r'); - } - } - if (pad_on_right) - { - while (pad-- > 0) - { - (*putc)(c); - } - } - } else - { - (*putc)(c); - if (c == '\n') - { - (*putc)('\r'); - } - } - } -} - -int -_cvt(unsigned long val, char *buf, long radix, char *digits) -{ - char temp[80]; - char *cp = temp; - int length = 0; - if (val == 0) - { /* Special case */ - *cp++ = '0'; - } else - while (val) - { - *cp++ = digits[val % radix]; - val /= radix; - } - while (cp != temp) - { - *buf++ = *--cp; - length++; - } - *buf = '\0'; - return (length); -} - -void -_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base) -{ - int i, c; - if ((unsigned int)s > (unsigned int)p) - { - s = (unsigned int)s - (unsigned int)p; - } - while (s > 0) - { - if (base) - { - _printk("%06X: ", (int)p - (int)base); - } else - { - _printk("%06X: ", p); - } - for (i = 0; i < 16; i++) - { - if (i < s) - { - _printk("%02X", p[i] & 0xFF); - } else - { - _printk(" "); - } - if ((i % 2) == 1) _printk(" "); - if ((i % 8) == 7) _printk(" "); - } - _printk(" |"); - for (i = 0; i < 16; i++) - { - if (i < s) - { - c = p[i] & 0xFF; - if ((c < 0x20) || (c >= 0x7F)) c = '.'; - } else - { - c = ' '; - } - _printk("%c", c); - } - _printk("|\n"); - s -= 16; - p += 16; - } -} - -void -_dump_buf(unsigned char *p, int s) -{ - _printk("\n"); - _dump_buf_with_offset(p, s, 0); -} - -/* Very simple inb/outb routines. We declare ISA_io to be 0 above, and - * then modify it on platforms which need to. We do it like this - * because on some platforms we give inb/outb an exact location, and - * on others it's an offset from a given location. -- Tom - */ - -void ISA_init(unsigned long base) -{ - ISA_io = (unsigned char *)base; -} - -void -outb(int port, unsigned char val) -{ - /* Ensure I/O operations complete */ - __asm__ volatile("eieio"); - ISA_io[port] = val; -} - -unsigned char -inb(int port) -{ - /* Ensure I/O operations complete */ - __asm__ volatile("eieio"); - return (ISA_io[port]); -} - -/* - * Local variables: - * c-indent-level: 8 - * c-basic-offset: 8 - * tab-width: 8 - * End: - */ diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c deleted file mode 100644 index fc5b7204194802db616c2271208eaadc79fc219f..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/ns16550.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * COM1 NS16550 support - */ - -#include -#include -#include -#include - -#if defined(CONFIG_XILINX_VIRTEX) -#include -#endif -#include "nonstdio.h" -#include "serial.h" - -#define SERIAL_BAUD 9600 - -extern unsigned long ISA_io; - -static struct serial_state rs_table[RS_TABLE_SIZE] = { - SERIAL_PORT_DFNS /* Defined in */ -}; - -static int shift; - -unsigned long serial_init(int chan, void *ignored) -{ - unsigned long com_port, base_baud; - unsigned char lcr, dlm; - - /* We need to find out which type io we're expecting. If it's - * 'SERIAL_IO_PORT', we get an offset from the isa_io_base. - * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */ - switch (rs_table[chan].io_type) { - case SERIAL_IO_PORT: - com_port = rs_table[chan].port; - break; - case SERIAL_IO_MEM: - com_port = (unsigned long)rs_table[chan].iomem_base; - break; - default: - /* We can't deal with it. */ - return -1; - } - - /* How far apart the registers are. */ - shift = rs_table[chan].iomem_reg_shift; - /* Base baud.. */ - base_baud = rs_table[chan].baud_base; - - /* save the LCR */ - lcr = inb(com_port + (UART_LCR << shift)); - /* Access baud rate */ - outb(com_port + (UART_LCR << shift), 0x80); - dlm = inb(com_port + (UART_DLM << shift)); - /* - * Test if serial port is unconfigured. - * We assume that no-one uses less than 110 baud or - * less than 7 bits per character these days. - * -- paulus. - */ - - if ((dlm <= 4) && (lcr & 2)) - /* port is configured, put the old LCR back */ - outb(com_port + (UART_LCR << shift), lcr); - else { - /* Input clock. */ - outb(com_port + (UART_DLL << shift), - (base_baud / SERIAL_BAUD) & 0xFF); - outb(com_port + (UART_DLM << shift), - (base_baud / SERIAL_BAUD) >> 8); - /* 8 data, 1 stop, no parity */ - outb(com_port + (UART_LCR << shift), 0x03); - /* RTS/DTR */ - outb(com_port + (UART_MCR << shift), 0x03); - } - /* Clear & enable FIFOs */ - outb(com_port + (UART_FCR << shift), 0x07); - - return (com_port); -} - -void -serial_putc(unsigned long com_port, unsigned char c) -{ - while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0) - ; - outb(com_port, c); -} - -unsigned char -serial_getc(unsigned long com_port) -{ - while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0) - ; - return inb(com_port); -} - -int -serial_tstc(unsigned long com_port) -{ - return ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0); -} diff --git a/arch/ppc/boot/common/serial_stub.c b/arch/ppc/boot/common/serial_stub.c deleted file mode 100644 index 5cc9ae66a8ba4425cf3efed3b507bd57a5405faa..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/serial_stub.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This is a few stub routines to make the boot code cleaner looking when - * there is no serial port support doesn't need to be closed, for example. - * - * Author: Tom Rini - * - * 2003 (c) MontaVista, Software, Inc. This file is licensed under the terms - * of the GNU General Public License version 2. This program is licensed "as - * is" without any warranty of any kind, whether express or implied. - */ - -unsigned long __attribute__ ((weak)) -serial_init(int chan, void *ignored) -{ - return 0; -} - -void __attribute__ ((weak)) -serial_close(unsigned long com_port) -{ -} diff --git a/arch/ppc/boot/common/string.S b/arch/ppc/boot/common/string.S deleted file mode 100644 index 8016e43c4771cd151337abbb33af245a8252e73f..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/string.S +++ /dev/null @@ -1,150 +0,0 @@ -/* - * String handling functions for PowerPC. - * - * Copyright (C) 1996 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#define r0 0 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 - - .globl strlen -strlen: - addi r4,r3,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - bne 1b - subf r3,r3,r4 - blr - - .globl memset -memset: - rlwimi r4,r4,8,16,23 - rlwimi r4,r4,16,0,15 - addi r6,r3,-4 - cmplwi 0,r5,4 - blt 7f - stwu r4,4(r6) - beqlr - andi. r0,r6,3 - add r5,r0,r5 - subf r6,r0,r6 - rlwinm r0,r5,32-2,2,31 - mtctr r0 - bdz 6f -1: stwu r4,4(r6) - bdnz 1b -6: andi. r5,r5,3 -7: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r6,3 -8: stbu r4,1(r6) - bdnz 8b - blr - - .globl memmove -memmove: - cmplw 0,r3,r4 - bgt backwards_memcpy - /* fall through */ - - .globl memcpy -memcpy: - rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */ - addi r6,r3,-4 - addi r4,r4,-4 - beq 2f /* if less than 8 bytes to do */ - andi. r0,r6,3 /* get dest word aligned */ - mtctr r7 - bne 5f -1: lwz r7,4(r4) - lwzu r8,8(r4) - stw r7,4(r6) - stwu r8,8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,4(r4) - addi r5,r5,-4 - stwu r0,4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r4,r4,3 - addi r6,r6,3 -4: lbzu r0,1(r4) - stbu r0,1(r6) - bdnz 4b - blr -5: subfic r0,r0,4 - mtctr r0 -6: lbz r7,4(r4) - addi r4,r4,1 - stb r7,4(r6) - addi r6,r6,1 - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - - .globl backwards_memcpy -backwards_memcpy: - rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */ - add r6,r3,r5 - add r4,r4,r5 - beq 2f - andi. r0,r6,3 - mtctr r7 - bne 5f -1: lwz r7,-4(r4) - lwzu r8,-8(r4) - stw r7,-4(r6) - stwu r8,-8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,-4(r4) - subi r5,r5,4 - stwu r0,-4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 -4: lbzu r0,-1(r4) - stbu r0,-1(r6) - bdnz 4b - blr -5: mtctr r0 -6: lbzu r7,-1(r4) - stbu r7,-1(r6) - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - - .globl memcmp -memcmp: - cmpwi 0,r5,0 - blelr - mtctr r5 - addi r6,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r6) - lbzu r0,1(r4) - subf. r3,r0,r3 - bdnzt 2,1b - blr diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S deleted file mode 100644 index 0c5e43c4ae06c39fdbce750fde4707c3a27d9e14..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/common/util.S +++ /dev/null @@ -1,293 +0,0 @@ -/* - * Useful bootup functions, which are more easily done in asm than C. - * - * NOTE: Be very very careful about the registers you use here. - * We don't follow any ABI calling convention among the - * assembler functions that call each other, especially early - * in the initialization. Please preserve at least r3 and r4 - * for these early functions, as they often contain information - * passed from boot roms into the C decompress function. - * - * Author: Tom Rini - * trini@mvista.com - * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others). - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - - - .text - -#ifdef CONFIG_6xx - .globl disable_6xx_mmu -disable_6xx_mmu: - /* Establish default MSR value, exception prefix 0xFFF. - * If necessary, this function must fix up the LR if we - * return to a different address space once the MMU is - * disabled. - */ - li r8,MSR_IP|MSR_FP - mtmsr r8 - isync - - /* Test for a 601 */ - mfpvr r10 - srwi r10,r10,16 - cmpwi 0,r10,1 /* 601 ? */ - beq .clearbats_601 - - /* Clear BATs */ - li r8,0 - mtspr SPRN_DBAT0U,r8 - mtspr SPRN_DBAT0L,r8 - mtspr SPRN_DBAT1U,r8 - mtspr SPRN_DBAT1L,r8 - mtspr SPRN_DBAT2U,r8 - mtspr SPRN_DBAT2L,r8 - mtspr SPRN_DBAT3U,r8 - mtspr SPRN_DBAT3L,r8 -.clearbats_601: - mtspr SPRN_IBAT0U,r8 - mtspr SPRN_IBAT0L,r8 - mtspr SPRN_IBAT1U,r8 - mtspr SPRN_IBAT1L,r8 - mtspr SPRN_IBAT2U,r8 - mtspr SPRN_IBAT2L,r8 - mtspr SPRN_IBAT3U,r8 - mtspr SPRN_IBAT3L,r8 - isync - sync - sync - - /* Set segment registers */ - li r8,16 /* load up segment register values */ - mtctr r8 /* for context 0 */ - lis r8,0x2000 /* Ku = 1, VSID = 0 */ - li r10,0 -3: mtsrin r8,r10 - addi r8,r8,0x111 /* increment VSID */ - addis r10,r10,0x1000 /* address of next segment */ - bdnz 3b - blr - - .globl disable_6xx_l1cache -disable_6xx_l1cache: - /* Enable, invalidate and then disable the L1 icache/dcache. */ - li r8,0 - ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI) - mfspr r11,SPRN_HID0 - or r11,r11,r8 - andc r10,r11,r8 - isync - mtspr SPRN_HID0,r8 - sync - isync - mtspr SPRN_HID0,r10 - sync - isync - blr -#endif - - .globl _setup_L2CR -_setup_L2CR: -/* - * We should be skipping this section on CPUs where this results in an - * illegal instruction. If not, please send trini@kernel.crashing.org - * the PVR of your CPU. - */ - /* Invalidate/disable L2 cache */ - sync - isync - mfspr r8,SPRN_L2CR - rlwinm r8,r8,0,1,31 - oris r8,r8,L2CR_L2I@h - sync - isync - mtspr SPRN_L2CR,r8 - sync - isync - - /* Wait for the invalidation to complete */ - mfspr r8,SPRN_PVR - srwi r8,r8,16 - cmplwi cr0,r8,0x8000 /* 7450 */ - cmplwi cr1,r8,0x8001 /* 7455 */ - cmplwi cr2,r8,0x8002 /* 7457 */ - cror 4*cr0+eq,4*cr0+eq,4*cr1+eq /* Now test if any are true. */ - cror 4*cr0+eq,4*cr0+eq,4*cr2+eq - bne 2f - -1: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */ - rlwinm. r9,r8,0,10,10 - bne 1b - b 3f - -2: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */ - rlwinm. r9,r8,0,31,31 - bne 2b - -3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */ - sync - isync - mtspr SPRN_L2CR,r8 - sync - isync - blr - - .globl _setup_L3CR -_setup_L3CR: - /* Invalidate/disable L3 cache */ - sync - isync - mfspr r8,SPRN_L3CR - rlwinm r8,r8,0,1,31 - ori r8,r8,L3CR_L3I@l - sync - isync - mtspr SPRN_L3CR,r8 - sync - isync - - /* Wait for the invalidation to complete */ -1: mfspr r8,SPRN_L3CR - rlwinm. r9,r8,0,21,21 - bne 1b - - rlwinm r8,r8,0,22,20 /* Turn off L3I bit */ - sync - isync - mtspr SPRN_L3CR,r8 - sync - isync - blr - - -/* udelay (on non-601 processors) needs to know the period of the - * timebase in nanoseconds. This used to be hardcoded to be 60ns - * (period of 66MHz/4). Now a variable is used that is initialized to - * 60 for backward compatibility, but it can be overridden as necessary - * with code something like this: - * extern unsigned long timebase_period_ns; - * timebase_period_ns = 1000000000 / bd->bi_tbfreq; - */ - .data - .globl timebase_period_ns -timebase_period_ns: - .long 60 - - .text -/* - * Delay for a number of microseconds - */ - .globl udelay -udelay: - mfspr r4,SPRN_PVR - srwi r4,r4,16 - cmpwi 0,r4,1 /* 601 ? */ - bne .udelay_not_601 -00: li r0,86 /* Instructions / microsecond? */ - mtctr r0 -10: addi r0,r0,0 /* NOP */ - bdnz 10b - subic. r3,r3,1 - bne 00b - blr - -.udelay_not_601: - mulli r4,r3,1000 /* nanoseconds */ - /* Change r4 to be the number of ticks using: - * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns - * timebase_period_ns defaults to 60 (16.6MHz) */ - lis r5,timebase_period_ns@ha - lwz r5,timebase_period_ns@l(r5) - add r4,r4,r5 - addi r4,r4,-1 - divw r4,r4,r5 /* BUS ticks */ -1: mftbu r5 - mftb r6 - mftbu r7 - cmpw 0,r5,r7 - bne 1b /* Get [synced] base time */ - addc r9,r6,r4 /* Compute end time */ - addze r8,r5 -2: mftbu r5 - cmpw 0,r5,r8 - blt 2b - bgt 3f - mftb r6 - cmpw 0,r6,r9 - blt 2b -3: blr - - .section ".relocate_code","xa" -/* - * Flush and enable instruction cache - * First, flush the data cache in case it was enabled and may be - * holding instructions for copy back. - */ - .globl flush_instruction_cache -flush_instruction_cache: - mflr r6 - bl flush_data_cache - -#ifdef CONFIG_8xx - lis r3, IDC_INVALL@h - mtspr SPRN_IC_CST, r3 - lis r3, IDC_ENABLE@h - mtspr SPRN_IC_CST, r3 - lis r3, IDC_DISABLE@h - mtspr SPRN_DC_CST, r3 -#elif CONFIG_4xx - lis r3,start@h # r9 = &_start - lis r4,_etext@ha - addi r4,r4,_etext@l # r8 = &_etext -1: dcbf r0,r3 # Flush the data cache - icbi r0,r3 # Invalidate the instruction cache - addi r3,r3,0x10 # Increment by one cache line - cmplw cr0,r3,r4 # Are we at the end yet? - blt 1b # No, keep flushing and invalidating -#else - /* Enable, invalidate and then disable the L1 icache/dcache. */ - li r3,0 - ori r3,r3,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI) - mfspr r4,SPRN_HID0 - or r5,r4,r3 - isync - mtspr SPRN_HID0,r5 - sync - isync - ori r5,r4,HID0_ICE /* Enable cache */ - mtspr SPRN_HID0,r5 - sync - isync -#endif - mtlr r6 - blr - -#define NUM_CACHE_LINES 128*8 -#define cache_flush_buffer 0x1000 - -/* - * Flush data cache - * Do this by just reading lots of stuff into the cache. - */ - .globl flush_data_cache -flush_data_cache: - lis r3,cache_flush_buffer@h - ori r3,r3,cache_flush_buffer@l - li r4,NUM_CACHE_LINES - mtctr r4 -00: lwz r4,0(r3) - addi r3,r3,L1_CACHE_BYTES /* Next line, please */ - bdnz 00b -10: blr - - .previous - diff --git a/arch/ppc/boot/images/.gitignore b/arch/ppc/boot/images/.gitignore deleted file mode 100644 index 21c2dc5b6b780ba792cfe51adfd58879ab5f0b8e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/images/.gitignore +++ /dev/null @@ -1,6 +0,0 @@ -sImage -vmapus -vmlinux* -miboot* -zImage* -uImage diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile deleted file mode 100644 index 58415d5718e35eab594c118d81d98aa3f4d4c9b2..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/images/Makefile +++ /dev/null @@ -1,34 +0,0 @@ -# -# This dir holds all of the images for PPC machines. -# Tom Rini January 2001 - -MKIMAGE := $(srctree)/scripts/mkuboot.sh - -extra-y := vmlinux.bin vmlinux.gz - -# two make processes may write to vmlinux.gz at the same time with make -j -quiet_cmd_mygzip = GZIP $@ -cmd_mygzip = gzip -f -9 < $< > $@.$$$$ && mv $@.$$$$ $@ - - -OBJCOPYFLAGS_vmlinux.bin := -O binary -$(obj)/vmlinux.bin: vmlinux FORCE - $(call if_changed,objcopy) - -$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE - $(call if_changed,mygzip) - -quiet_cmd_uimage = UIMAGE $@ - cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \ - -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \ - -d $< $@ - -targets += uImage -$(obj)/uImage: $(obj)/vmlinux.gz - $(Q)rm -f $@ - $(call cmd,uimage) - @echo -n ' Image: $@ ' - @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi - -# Files generated that shall be removed upon make clean -clean-files := sImage vmapus vmlinux* miboot* zImage* uImage diff --git a/arch/ppc/boot/include/cpc700.h b/arch/ppc/boot/include/cpc700.h deleted file mode 100644 index 28cfcde44909224d5138b0b4c17ae39ba37d5442..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/cpc700.h +++ /dev/null @@ -1,26 +0,0 @@ - -#ifndef __PPC_BOOT_CPC700_H -#define __PPC_BOOT_CPC700_H - -#define CPC700_MEM_CFGADDR 0xff500008 -#define CPC700_MEM_CFGDATA 0xff50000c - -#define CPC700_MB0SA 0x38 -#define CPC700_MB0EA 0x58 -#define CPC700_MB1SA 0x3c -#define CPC700_MB1EA 0x5c -#define CPC700_MB2SA 0x40 -#define CPC700_MB2EA 0x60 -#define CPC700_MB3SA 0x44 -#define CPC700_MB3EA 0x64 -#define CPC700_MB4SA 0x48 -#define CPC700_MB4EA 0x68 - -static inline long -cpc700_read_memreg(int reg) -{ - out_be32((volatile unsigned int *) CPC700_MEM_CFGADDR, reg); - return in_be32((volatile unsigned int *) CPC700_MEM_CFGDATA); -} - -#endif diff --git a/arch/ppc/boot/include/iso_font.h b/arch/ppc/boot/include/iso_font.h deleted file mode 100644 index bff050e002b71f4ba7a84f5ae40d1a538c46d096..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/iso_font.h +++ /dev/null @@ -1,257 +0,0 @@ -static const unsigned char font[] = { -/* 0x00 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x01 */ 0x00,0x00,0x7E,0x81,0xA5,0x81,0x81,0xBD,0x99,0x81,0x81,0x7E,0x00,0x00,0x00,0x00, -/* 0x02 */ 0x00,0x00,0x7E,0xFF,0xDB,0xFF,0xFF,0xC3,0xC3,0xE7,0xFF,0x7E,0x00,0x00,0x00,0x00, -/* 0x03 */ 0x00,0x00,0x00,0x00,0x6C,0xFE,0xFE,0xFE,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00, -/* 0x04 */ 0x00,0x00,0x00,0x00,0x10,0x38,0x7C,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,0x00, -/* 0x05 */ 0x00,0x00,0x00,0x18,0x3C,0x3C,0xE7,0xE7,0xE7,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x06 */ 0x00,0x00,0x00,0x18,0x3C,0x7E,0xFF,0xFF,0x7E,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x07 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x08 */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xC3,0xC3,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, -/* 0x09 */ 0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,0x00,0x00, -/* 0x0A */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0x99,0xBD,0xBD,0x99,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF, -/* 0x0B */ 0x00,0x00,0x3E,0x0E,0x1A,0x32,0x78,0xCC,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00, -/* 0x0C */ 0x00,0x00,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x0D */ 0x00,0x00,0x30,0x38,0x3C,0x36,0x33,0x30,0x30,0x70,0xF0,0xE0,0x00,0x00,0x00,0x00, -/* 0x0E */ 0x00,0x00,0x7F,0x63,0x7F,0x63,0x63,0x63,0x63,0x67,0xE7,0xE6,0xC0,0x00,0x00,0x00, -/* 0x0F */ 0x00,0x00,0x00,0x18,0x18,0xDB,0x3C,0xE7,0x3C,0xDB,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x10 */ 0x00,0x80,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00, -/* 0x11 */ 0x00,0x02,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x02,0x00,0x00,0x00,0x00, -/* 0x12 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00, -/* 0x13 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x66,0x66,0x00,0x00,0x00,0x00, -/* 0x14 */ 0x00,0x00,0x7F,0xDB,0xDB,0xDB,0x7B,0x1B,0x1B,0x1B,0x1B,0x1B,0x00,0x00,0x00,0x00, -/* 0x15 */ 0x00,0x7C,0xC6,0x60,0x38,0x6C,0xC6,0xC6,0x6C,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00, -/* 0x16 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0xFE,0xFE,0x00,0x00,0x00,0x00, -/* 0x17 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00, -/* 0x18 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x19 */ 0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00, -/* 0x1A */ 0x00,0x00,0x00,0x00,0x00,0x18,0x0C,0xFE,0x0C,0x18,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x1B */ 0x00,0x00,0x00,0x00,0x00,0x30,0x60,0xFE,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x1C */ 0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0xC0,0xC0,0xFE,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x1D */ 0x00,0x00,0x00,0x00,0x00,0x28,0x6C,0xFE,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x1E */ 0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00, -/* 0x1F */ 0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00, -/* 0x20 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x21 */ 0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x22 */ 0x00,0x66,0x66,0x66,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x23 */ 0x00,0x00,0x00,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x00,0x00,0x00,0x00, -/* 0x24 */ 0x18,0x18,0x7C,0xC6,0xC2,0xC0,0x7C,0x06,0x06,0x86,0xC6,0x7C,0x18,0x18,0x00,0x00, -/* 0x25 */ 0x00,0x00,0x00,0x00,0xC2,0xC6,0x0C,0x18,0x30,0x60,0xC6,0x86,0x00,0x00,0x00,0x00, -/* 0x26 */ 0x00,0x00,0x38,0x6C,0x6C,0x38,0x76,0xDC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x27 */ 0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x28 */ 0x00,0x00,0x0C,0x18,0x30,0x30,0x30,0x30,0x30,0x30,0x18,0x0C,0x00,0x00,0x00,0x00, -/* 0x29 */ 0x00,0x00,0x30,0x18,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x18,0x30,0x00,0x00,0x00,0x00, -/* 0x2A */ 0x00,0x00,0x00,0x00,0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x2B */ 0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x2C */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00, -/* 0x2D */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x2E */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x2F */ 0x00,0x00,0x00,0x00,0x02,0x06,0x0C,0x18,0x30,0x60,0xC0,0x80,0x00,0x00,0x00,0x00, -/* 0x30 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00, -/* 0x31 */ 0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00, -/* 0x32 */ 0x00,0x00,0x7C,0xC6,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC6,0xFE,0x00,0x00,0x00,0x00, -/* 0x33 */ 0x00,0x00,0x7C,0xC6,0x06,0x06,0x3C,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x34 */ 0x00,0x00,0x0C,0x1C,0x3C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00, -/* 0x35 */ 0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x36 */ 0x00,0x00,0x38,0x60,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x37 */ 0x00,0x00,0xFE,0xC6,0x06,0x06,0x0C,0x18,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00, -/* 0x38 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x39 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00, -/* 0x3A */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00, -/* 0x3B */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00, -/* 0x3C */ 0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00, -/* 0x3D */ 0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x3E */ 0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00, -/* 0x3F */ 0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x40 */ 0x00,0x00,0x00,0x7C,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0x7C,0x00,0x00,0x00,0x00, -/* 0x41 */ 0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x42 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00, -/* 0x43 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00, -/* 0x44 */ 0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00, -/* 0x45 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00, -/* 0x46 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00, -/* 0x47 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xDE,0xC6,0xC6,0x66,0x3A,0x00,0x00,0x00,0x00, -/* 0x48 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x49 */ 0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x4A */ 0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00, -/* 0x4B */ 0x00,0x00,0xE6,0x66,0x66,0x6C,0x78,0x78,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00, -/* 0x4C */ 0x00,0x00,0xF0,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00, -/* 0x4D */ 0x00,0x00,0xC6,0xEE,0xFE,0xFE,0xD6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x4E */ 0x00,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x4F */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x50 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00, -/* 0x51 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xDE,0x7C,0x0C,0x0E,0x00,0x00, -/* 0x52 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x6C,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00, -/* 0x53 */ 0x00,0x00,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x54 */ 0x00,0x00,0x7E,0x7E,0x5A,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x55 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x56 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x6C,0x38,0x10,0x00,0x00,0x00,0x00, -/* 0x57 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0xEE,0x6C,0x00,0x00,0x00,0x00, -/* 0x58 */ 0x00,0x00,0xC6,0xC6,0x6C,0x7C,0x38,0x38,0x7C,0x6C,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x59 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x5A */ 0x00,0x00,0xFE,0xC6,0x86,0x0C,0x18,0x30,0x60,0xC2,0xC6,0xFE,0x00,0x00,0x00,0x00, -/* 0x5B */ 0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00, -/* 0x5C */ 0x00,0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x06,0x02,0x00,0x00,0x00,0x00, -/* 0x5D */ 0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00, -/* 0x5E */ 0x10,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x5F */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00, -/* 0x60 */ 0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x61 */ 0x00,0x00,0x00,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x62 */ 0x00,0x00,0xE0,0x60,0x60,0x78,0x6C,0x66,0x66,0x66,0x66,0x7C,0x00,0x00,0x00,0x00, -/* 0x63 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC0,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x64 */ 0x00,0x00,0x1C,0x0C,0x0C,0x3C,0x6C,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x65 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xFE,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x66 */ 0x00,0x00,0x38,0x6C,0x64,0x60,0xF0,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00, -/* 0x67 */ 0x00,0x00,0x00,0x00,0x00,0x3E,0x66,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00, -/* 0x68 */ 0x00,0x00,0xE0,0x60,0x60,0x6C,0x76,0x66,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00, -/* 0x69 */ 0x00,0x00,0x18,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x6A */ 0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00, -/* 0x6B */ 0x00,0x00,0xE0,0x60,0x60,0x66,0x6C,0x78,0x78,0x6C,0x66,0xE6,0x00,0x00,0x00,0x00, -/* 0x6C */ 0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x6D */ 0x00,0x00,0x00,0x00,0x00,0x6C,0xFE,0xD6,0xD6,0xD6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x6E */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00, -/* 0x6F */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x70 */ 0x00,0x00,0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0xF0,0x00, -/* 0x71 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xCC,0xCC,0xCC,0xCC,0xCC,0x7C,0x0C,0x0C,0x1E,0x00, -/* 0x72 */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x76,0x66,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00, -/* 0x73 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0x60,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x74 */ 0x00,0x00,0x10,0x30,0x30,0xFC,0x30,0x30,0x30,0x30,0x36,0x1C,0x00,0x00,0x00,0x00, -/* 0x75 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x76 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00,0x00,0x00,0x00, -/* 0x77 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0x6C,0x00,0x00,0x00,0x00, -/* 0x78 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0x6C,0x38,0x38,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00, -/* 0x79 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0xF8,0x00, -/* 0x7A */ 0x00,0x00,0x00,0x00,0x00,0xFE,0xCC,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00, -/* 0x7B */ 0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00, -/* 0x7C */ 0x00,0x00,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x7D */ 0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00, -/* 0x7E */ 0x00,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0x7F */ 0x00,0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0x00,0x00,0x00,0x00,0x00, -/* 0x80 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x0C,0x06,0x7C,0x00,0x00, -/* 0x81 */ 0x00,0x00,0xCC,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x82 */ 0x00,0x0C,0x18,0x30,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x83 */ 0x00,0x10,0x38,0x6C,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x84 */ 0x00,0x00,0xCC,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x85 */ 0x00,0x60,0x30,0x18,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x86 */ 0x00,0x38,0x6C,0x38,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x87 */ 0x00,0x00,0x00,0x00,0x3C,0x66,0x60,0x60,0x66,0x3C,0x0C,0x06,0x3C,0x00,0x00,0x00, -/* 0x88 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x89 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x8A */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x8B */ 0x00,0x00,0x66,0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x8C */ 0x00,0x18,0x3C,0x66,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x8D */ 0x00,0x60,0x30,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0x8E */ 0x00,0xC6,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x8F */ 0x38,0x6C,0x38,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0x90 */ 0x18,0x30,0x60,0x00,0xFE,0x66,0x60,0x7C,0x60,0x60,0x66,0xFE,0x00,0x00,0x00,0x00, -/* 0x91 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0x76,0x36,0x7E,0xD8,0xD8,0x6E,0x00,0x00,0x00,0x00, -/* 0x92 */ 0x00,0x00,0x3E,0x6C,0xCC,0xCC,0xFE,0xCC,0xCC,0xCC,0xCC,0xCE,0x00,0x00,0x00,0x00, -/* 0x93 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x94 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x95 */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x96 */ 0x00,0x30,0x78,0xCC,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x97 */ 0x00,0x60,0x30,0x18,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0x98 */ 0x00,0x00,0xC6,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0x78,0x00, -/* 0x99 */ 0x00,0xC6,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x9A */ 0x00,0xC6,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0x9B */ 0x00,0x18,0x18,0x3C,0x66,0x60,0x60,0x60,0x66,0x3C,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x9C */ 0x00,0x38,0x6C,0x64,0x60,0xF8,0x60,0x60,0x60,0x60,0xE6,0xFC,0x00,0x00,0x00,0x00, -/* 0x9D */ 0x00,0x00,0x66,0x66,0x3C,0x18,0x7E,0x18,0x7E,0x18,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0x9E */ 0x00,0xF8,0xCC,0xCC,0xF8,0xC4,0xCC,0xDE,0xCC,0xCC,0xCC,0xC6,0x00,0x00,0x00,0x00, -/* 0x9F */ 0x00,0x0E,0x1B,0x18,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x18,0xD8,0x70,0x00,0x00, -/* 0xA0 */ 0x00,0x18,0x30,0x60,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0xA1 */ 0x00,0x0C,0x18,0x30,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00, -/* 0xA2 */ 0x00,0x18,0x30,0x60,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0xA3 */ 0x00,0x18,0x30,0x60,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00, -/* 0xA4 */ 0x00,0x00,0x76,0xDC,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00, -/* 0xA5 */ 0x76,0xDC,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0xA6 */ 0x00,0x3C,0x6C,0x6C,0x3E,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xA7 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xA8 */ 0x00,0x00,0x30,0x30,0x00,0x30,0x30,0x60,0xC0,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00, -/* 0xA9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00, -/* 0xAA */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0x06,0x06,0x06,0x00,0x00,0x00,0x00,0x00, -/* 0xAB */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x60,0xDC,0x86,0x0C,0x18,0x3E,0x00,0x00, -/* 0xAC */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x66,0xCE,0x9E,0x3E,0x06,0x06,0x00,0x00, -/* 0xAD */ 0x00,0x00,0x18,0x18,0x00,0x18,0x18,0x18,0x3C,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00, -/* 0xAE */ 0x00,0x00,0x00,0x00,0x00,0x36,0x6C,0xD8,0x6C,0x36,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xAF */ 0x00,0x00,0x00,0x00,0x00,0xD8,0x6C,0x36,0x6C,0xD8,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xB0 */ 0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44, -/* 0xB1 */ 0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA, -/* 0xB2 */ 0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77, -/* 0xB3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xB4 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xB5 */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xB6 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xB7 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xB8 */ 0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xB9 */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xBA */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xBB */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xBC */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xBD */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xBE */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xBF */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xC0 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xC1 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xC2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xC3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xC4 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xC5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xC6 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xC7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xC8 */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xC9 */ 0x00,0x00,0x00,0x00,0x00,0x3F,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xCA */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xCB */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xCC */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xCD */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xCE */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xCF */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xD0 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xD1 */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xD2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xD3 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xD4 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xD5 */ 0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xD6 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xD7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36, -/* 0xD8 */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xD9 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xDA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xDB */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, -/* 0xDC */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, -/* 0xDD */ 0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0, -/* 0xDE */ 0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F, -/* 0xDF */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xE0 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0xD8,0xD8,0xD8,0xDC,0x76,0x00,0x00,0x00,0x00, -/* 0xE1 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xFC,0xC6,0xC6,0xC6,0xC6,0xDC,0xC0,0xC0,0x00,0x00, -/* 0xE2 */ 0x00,0x00,0xFE,0xC6,0xC6,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00, -/* 0xE3 */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x6C,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00, -/* 0xE4 */ 0x00,0x00,0xFE,0xC6,0x60,0x30,0x18,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00, -/* 0xE5 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xD8,0xD8,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00, -/* 0xE6 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0xC0,0x00,0x00,0x00, -/* 0xE7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00, -/* 0xE8 */ 0x00,0x00,0x7E,0x18,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00, -/* 0xE9 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00, -/* 0xEA */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0x6C,0x6C,0x6C,0x6C,0xEE,0x00,0x00,0x00,0x00, -/* 0xEB */ 0x00,0x00,0x1E,0x30,0x18,0x0C,0x3E,0x66,0x66,0x66,0x66,0x3C,0x00,0x00,0x00,0x00, -/* 0xEC */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xDB,0xDB,0xDB,0x7E,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xED */ 0x00,0x00,0x00,0x03,0x06,0x7E,0xDB,0xDB,0xF3,0x7E,0x60,0xC0,0x00,0x00,0x00,0x00, -/* 0xEE */ 0x00,0x00,0x1C,0x30,0x60,0x60,0x7C,0x60,0x60,0x60,0x30,0x1C,0x00,0x00,0x00,0x00, -/* 0xEF */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00, -/* 0xF0 */ 0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00, -/* 0xF1 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0xFF,0x00,0x00,0x00,0x00, -/* 0xF2 */ 0x00,0x00,0x00,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00,0x7E,0x00,0x00,0x00,0x00, -/* 0xF3 */ 0x00,0x00,0x00,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00,0x7E,0x00,0x00,0x00,0x00, -/* 0xF4 */ 0x00,0x0E,0x1B,0x1B,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18, -/* 0xF5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00, -/* 0xF6 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x7E,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00, -/* 0xF7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xF8 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xF9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xFA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xFB */ 0x00,0x0F,0x0C,0x0C,0x0C,0x0C,0x0C,0xEC,0x6C,0x6C,0x3C,0x1C,0x00,0x00,0x00,0x00, -/* 0xFC */ 0x00,0xD8,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xFD */ 0x00,0x70,0xD8,0x30,0x60,0xC8,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -/* 0xFE */ 0x00,0x00,0x00,0x00,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x00,0x00,0x00,0x00,0x00, -}; diff --git a/arch/ppc/boot/include/mpc10x.h b/arch/ppc/boot/include/mpc10x.h deleted file mode 100644 index 6e5d540d8d3e528ab441f0031830e3c53c46e094..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/mpc10x.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem - * ctrl/EPIC/etc. - * - * Author: Tom Rini - * - * This is a heavily stripped down version of: - * include/asm-ppc/mpc10x.h - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __BOOT_MPC10X_H__ -#define __BOOT_MPC10X_H__ - -/* - * The values here don't completely map everything but should work in most - * cases. - * - * MAP A (PReP Map) - * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff - * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff - * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000 - * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB) - * - * MAP B (CHRP Map) - * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff - * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff - * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000 - * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB) - */ - -/* Define the type of map to use */ -#define MPC10X_MEM_MAP_A 1 -#define MPC10X_MEM_MAP_B 2 - -/* Map A (PReP Map) Defines */ -#define MPC10X_MAPA_CNFG_ADDR 0x80000cf8 -#define MPC10X_MAPA_CNFG_DATA 0x80000cfc - -/* Map B (CHRP Map) Defines */ -#define MPC10X_MAPB_CNFG_ADDR 0xfec00000 -#define MPC10X_MAPB_CNFG_DATA 0xfee00000 - -/* Define offsets for the memory controller registers in the config space */ -#define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */ -#define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */ -#define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */ -#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */ - -#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */ -#define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */ -#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */ -#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */ - -#define MPC10X_MCTLR_MEM_BANK_ENABLES 0xa0 - -#endif /* __BOOT_MPC10X_H__ */ diff --git a/arch/ppc/boot/include/mpsc_defs.h b/arch/ppc/boot/include/mpsc_defs.h deleted file mode 100644 index 9f37e1355b17d50034f42710bb98a0ae2058dc7b..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/mpsc_defs.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * arch/ppc/boot/include/mpsc_defs.h - * - * Register definitions for the Marvell Multi-Protocol Serial Controller (MPSC), - * Serial DMA Controller (SDMA), and Baud Rate Generator (BRG). - * - * Author: Mark A. Greer - * - * 2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef _PPC_BOOT_MPSC_DEFS_H__ -#define _PPC_BOOT_MPSC_DEFS_H__ - -#define MPSC_NUM_CTLRS 2 - -/* - ***************************************************************************** - * - * Multi-Protocol Serial Controller Interface Registers - * - ***************************************************************************** - */ - -/* Main Configuratino Register Offsets */ -#define MPSC_MMCRL 0x0000 -#define MPSC_MMCRH 0x0004 -#define MPSC_MPCR 0x0008 -#define MPSC_CHR_1 0x000c -#define MPSC_CHR_2 0x0010 -#define MPSC_CHR_3 0x0014 -#define MPSC_CHR_4 0x0018 -#define MPSC_CHR_5 0x001c -#define MPSC_CHR_6 0x0020 -#define MPSC_CHR_7 0x0024 -#define MPSC_CHR_8 0x0028 -#define MPSC_CHR_9 0x002c -#define MPSC_CHR_10 0x0030 -#define MPSC_CHR_11 0x0034 - -#define MPSC_MPCR_CL_5 0 -#define MPSC_MPCR_CL_6 1 -#define MPSC_MPCR_CL_7 2 -#define MPSC_MPCR_CL_8 3 -#define MPSC_MPCR_SBL_1 0 -#define MPSC_MPCR_SBL_2 3 - -#define MPSC_CHR_2_TEV (1<<1) -#define MPSC_CHR_2_TA (1<<7) -#define MPSC_CHR_2_TTCS (1<<9) -#define MPSC_CHR_2_REV (1<<17) -#define MPSC_CHR_2_RA (1<<23) -#define MPSC_CHR_2_CRD (1<<25) -#define MPSC_CHR_2_EH (1<<31) -#define MPSC_CHR_2_PAR_ODD 0 -#define MPSC_CHR_2_PAR_SPACE 1 -#define MPSC_CHR_2_PAR_EVEN 2 -#define MPSC_CHR_2_PAR_MARK 3 - -/* MPSC Signal Routing */ -#define MPSC_MRR 0x0000 -#define MPSC_RCRR 0x0004 -#define MPSC_TCRR 0x0008 - -/* - ***************************************************************************** - * - * Serial DMA Controller Interface Registers - * - ***************************************************************************** - */ - -#define SDMA_SDC 0x0000 -#define SDMA_SDCM 0x0008 -#define SDMA_RX_DESC 0x0800 -#define SDMA_RX_BUF_PTR 0x0808 -#define SDMA_SCRDP 0x0810 -#define SDMA_TX_DESC 0x0c00 -#define SDMA_SCTDP 0x0c10 -#define SDMA_SFTDP 0x0c14 - -#define SDMA_DESC_CMDSTAT_PE (1<<0) -#define SDMA_DESC_CMDSTAT_CDL (1<<1) -#define SDMA_DESC_CMDSTAT_FR (1<<3) -#define SDMA_DESC_CMDSTAT_OR (1<<6) -#define SDMA_DESC_CMDSTAT_BR (1<<9) -#define SDMA_DESC_CMDSTAT_MI (1<<10) -#define SDMA_DESC_CMDSTAT_A (1<<11) -#define SDMA_DESC_CMDSTAT_AM (1<<12) -#define SDMA_DESC_CMDSTAT_CT (1<<13) -#define SDMA_DESC_CMDSTAT_C (1<<14) -#define SDMA_DESC_CMDSTAT_ES (1<<15) -#define SDMA_DESC_CMDSTAT_L (1<<16) -#define SDMA_DESC_CMDSTAT_F (1<<17) -#define SDMA_DESC_CMDSTAT_P (1<<18) -#define SDMA_DESC_CMDSTAT_EI (1<<23) -#define SDMA_DESC_CMDSTAT_O (1<<31) - -#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O | \ - SDMA_DESC_CMDSTAT_EI) - -#define SDMA_SDC_RFT (1<<0) -#define SDMA_SDC_SFM (1<<1) -#define SDMA_SDC_BLMR (1<<6) -#define SDMA_SDC_BLMT (1<<7) -#define SDMA_SDC_POVR (1<<8) -#define SDMA_SDC_RIFB (1<<9) - -#define SDMA_SDCM_ERD (1<<7) -#define SDMA_SDCM_AR (1<<15) -#define SDMA_SDCM_STD (1<<16) -#define SDMA_SDCM_TXD (1<<23) -#define SDMA_SDCM_AT (1<<31) - -#define SDMA_0_CAUSE_RXBUF (1<<0) -#define SDMA_0_CAUSE_RXERR (1<<1) -#define SDMA_0_CAUSE_TXBUF (1<<2) -#define SDMA_0_CAUSE_TXEND (1<<3) -#define SDMA_1_CAUSE_RXBUF (1<<8) -#define SDMA_1_CAUSE_RXERR (1<<9) -#define SDMA_1_CAUSE_TXBUF (1<<10) -#define SDMA_1_CAUSE_TXEND (1<<11) - -#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR | \ - SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR) -#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND | \ - SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND) - -/* SDMA Interrupt registers */ -#define SDMA_INTR_CAUSE 0x0000 -#define SDMA_INTR_MASK 0x0080 - -/* - ***************************************************************************** - * - * Baud Rate Generator Interface Registers - * - ***************************************************************************** - */ - -#define BRG_BCR 0x0000 -#define BRG_BTR 0x0004 - -#endif /*_PPC_BOOT_MPSC_DEFS_H__ */ diff --git a/arch/ppc/boot/include/nonstdio.h b/arch/ppc/boot/include/nonstdio.h deleted file mode 100644 index f2b5526faef310dd1a446b2f4d2a97bd6300fd7c..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/nonstdio.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * This is sort of a catchall for I/O related functions. Stuff that - * wouldn't be in 'stdio.h' normally is here, and it's 'nonstdio.h' - * for a reason. -- Tom - */ -typedef int FILE; -extern FILE *stdin, *stdout; -#define NULL ((void *)0) -#define EOF (-1) -#define fopen(n, m) NULL -#define fflush(f) 0 -#define fclose(f) 0 -#define perror(s) printf("%s: no files!\n", (s)) - -extern int getc(void); -extern int printf(const char *format, ...); -extern int sprintf(char *str, const char *format, ...); -extern int tstc(void); -extern void exit(void); -extern void outb(int port, unsigned char val); -extern void putc(const char c); -extern void puthex(unsigned long val); -extern void puts(const char *); -extern void udelay(long delay); -extern unsigned char inb(int port); -extern void board_isa_init(void); -extern void ISA_init(unsigned long base); diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h deleted file mode 100644 index 4ed88acfa73a20f956f2287ba9f226491387201e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/of1275.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -typedef void *prom_handle; -typedef void *ihandle; -typedef void *phandle; -typedef int (*prom_entry)(void *); - -#define OF_INVALID_HANDLE ((prom_handle)-1UL) - -extern prom_entry of_prom_entry; - -/* function declarations */ - -int call_prom(const char *service, int nargs, int nret, ...); -int call_prom_ret(const char *service, int nargs, int nret, - unsigned int *rets, ...); -void * claim(unsigned int virt, unsigned int size, unsigned int align); -int map(unsigned int phys, unsigned int virt, unsigned int size); -void enter(void); -void exit(void); -phandle finddevice(const char *name); -int getprop(phandle node, const char *name, void *buf, int buflen); -void ofinit(prom_entry entry); -int ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr); -int read(ihandle instance, void *buf, int buflen); -void release(void *virt, unsigned int size); -int write(ihandle instance, void *buf, int buflen); - -/* inlines */ - -extern inline void pause(void) -{ - enter(); -} diff --git a/arch/ppc/boot/include/rs6000.h b/arch/ppc/boot/include/rs6000.h deleted file mode 100644 index 433f45084e416a3f1e094ed8e58d7c50f6b883fa..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/rs6000.h +++ /dev/null @@ -1,243 +0,0 @@ -/* IBM RS/6000 "XCOFF" file definitions for BFD. - Copyright (C) 1990, 1991 Free Software Foundation, Inc. - FIXME: Can someone provide a transliteration of this name into ASCII? - Using the following chars caused a compiler warning on HIUX (so I replaced - them with octal escapes), and isn't useful without an understanding of what - character set it is. - Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM - and John Gilmore of Cygnus Support. */ - -/********************** FILE HEADER **********************/ - -struct external_filehdr { - char f_magic[2]; /* magic number */ - char f_nscns[2]; /* number of sections */ - char f_timdat[4]; /* time & date stamp */ - char f_symptr[4]; /* file pointer to symtab */ - char f_nsyms[4]; /* number of symtab entries */ - char f_opthdr[2]; /* sizeof(optional hdr) */ - char f_flags[2]; /* flags */ -}; - - /* IBM RS/6000 */ -#define U802WRMAGIC 0730 /* writeable text segments **chh** */ -#define U802ROMAGIC 0735 /* readonly sharable text segments */ -#define U802TOCMAGIC 0737 /* readonly text segments and TOC */ - -#define BADMAG(x) \ - ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \ - (x).f_magic != U802TOCMAGIC) - -#define FILHDR struct external_filehdr -#define FILHSZ 20 - - -/********************** AOUT "OPTIONAL HEADER" **********************/ - - -typedef struct -{ - unsigned char magic[2]; /* type of file */ - unsigned char vstamp[2]; /* version stamp */ - unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */ - unsigned char dsize[4]; /* initialized data " " */ - unsigned char bsize[4]; /* uninitialized data " " */ - unsigned char entry[4]; /* entry pt. */ - unsigned char text_start[4]; /* base of text used for this file */ - unsigned char data_start[4]; /* base of data used for this file */ - unsigned char o_toc[4]; /* address of TOC */ - unsigned char o_snentry[2]; /* section number of entry point */ - unsigned char o_sntext[2]; /* section number of .text section */ - unsigned char o_sndata[2]; /* section number of .data section */ - unsigned char o_sntoc[2]; /* section number of TOC */ - unsigned char o_snloader[2]; /* section number of .loader section */ - unsigned char o_snbss[2]; /* section number of .bss section */ - unsigned char o_algntext[2]; /* .text alignment */ - unsigned char o_algndata[2]; /* .data alignment */ - unsigned char o_modtype[2]; /* module type (??) */ - unsigned char o_cputype[2]; /* cpu type */ - unsigned char o_maxstack[4]; /* max stack size (??) */ - unsigned char o_maxdata[4]; /* max data size (??) */ - unsigned char o_resv2[12]; /* reserved */ -} -AOUTHDR; - -#define AOUTSZ 72 -#define SMALL_AOUTSZ (28) -#define AOUTHDRSZ 72 - -#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */ -#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */ -#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */ - - -/********************** SECTION HEADER **********************/ - - -struct external_scnhdr { - char s_name[8]; /* section name */ - char s_paddr[4]; /* physical address, aliased s_nlib */ - char s_vaddr[4]; /* virtual address */ - char s_size[4]; /* section size */ - char s_scnptr[4]; /* file ptr to raw data for section */ - char s_relptr[4]; /* file ptr to relocation */ - char s_lnnoptr[4]; /* file ptr to line numbers */ - char s_nreloc[2]; /* number of relocation entries */ - char s_nlnno[2]; /* number of line number entries*/ - char s_flags[4]; /* flags */ -}; - -/* - * names of "special" sections - */ -#define _TEXT ".text" -#define _DATA ".data" -#define _BSS ".bss" -#define _PAD ".pad" -#define _LOADER ".loader" - -#define SCNHDR struct external_scnhdr -#define SCNHSZ 40 - -/* XCOFF uses a special .loader section with type STYP_LOADER. */ -#define STYP_LOADER 0x1000 - -/* XCOFF uses a special .debug section with type STYP_DEBUG. */ -#define STYP_DEBUG 0x2000 - -/* XCOFF handles line number or relocation overflow by creating - another section header with STYP_OVRFLO set. */ -#define STYP_OVRFLO 0x8000 - -/********************** LINE NUMBERS **********************/ - -/* 1 line number entry for every "breakpointable" source line in a section. - * Line numbers are grouped on a per function basis; first entry in a function - * grouping will have l_lnno = 0 and in place of physical address will be the - * symbol table index of the function name. - */ -struct external_lineno { - union { - char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/ - char l_paddr[4]; /* (physical) address of line number */ - } l_addr; - char l_lnno[2]; /* line number */ -}; - - -#define LINENO struct external_lineno -#define LINESZ 6 - - -/********************** SYMBOLS **********************/ - -#define E_SYMNMLEN 8 /* # characters in a symbol name */ -#define E_FILNMLEN 14 /* # characters in a file name */ -#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */ - -struct external_syment -{ - union { - char e_name[E_SYMNMLEN]; - struct { - char e_zeroes[4]; - char e_offset[4]; - } e; - } e; - char e_value[4]; - char e_scnum[2]; - char e_type[2]; - char e_sclass[1]; - char e_numaux[1]; -}; - - - -#define N_BTMASK (017) -#define N_TMASK (060) -#define N_BTSHFT (4) -#define N_TSHIFT (2) - - -union external_auxent { - struct { - char x_tagndx[4]; /* str, un, or enum tag indx */ - union { - struct { - char x_lnno[2]; /* declaration line number */ - char x_size[2]; /* str/union/array size */ - } x_lnsz; - char x_fsize[4]; /* size of function */ - } x_misc; - union { - struct { /* if ISFCN, tag, or .bb */ - char x_lnnoptr[4]; /* ptr to fcn line # */ - char x_endndx[4]; /* entry ndx past block end */ - } x_fcn; - struct { /* if ISARY, up to 4 dimen. */ - char x_dimen[E_DIMNUM][2]; - } x_ary; - } x_fcnary; - char x_tvndx[2]; /* tv index */ - } x_sym; - - union { - char x_fname[E_FILNMLEN]; - struct { - char x_zeroes[4]; - char x_offset[4]; - } x_n; - } x_file; - - struct { - char x_scnlen[4]; /* section length */ - char x_nreloc[2]; /* # relocation entries */ - char x_nlinno[2]; /* # line numbers */ - } x_scn; - - struct { - char x_tvfill[4]; /* tv fill value */ - char x_tvlen[2]; /* length of .tv */ - char x_tvran[2][2]; /* tv range */ - } x_tv; /* info about .tv section (in auxent of symbol .tv)) */ - - struct { - unsigned char x_scnlen[4]; - unsigned char x_parmhash[4]; - unsigned char x_snhash[2]; - unsigned char x_smtyp[1]; - unsigned char x_smclas[1]; - unsigned char x_stab[4]; - unsigned char x_snstab[2]; - } x_csect; - -}; - -#define SYMENT struct external_syment -#define SYMESZ 18 -#define AUXENT union external_auxent -#define AUXESZ 18 -#define DBXMASK 0x80 /* for dbx storage mask */ -#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK) - - - -/********************** RELOCATION DIRECTIVES **********************/ - - -struct external_reloc { - char r_vaddr[4]; - char r_symndx[4]; - char r_size[1]; - char r_type[1]; -}; - - -#define RELOC struct external_reloc -#define RELSZ 10 - -#define DEFAULT_DATA_SECTION_ALIGNMENT 4 -#define DEFAULT_BSS_SECTION_ALIGNMENT 4 -#define DEFAULT_TEXT_SECTION_ALIGNMENT 4 -/* For new sections we havn't heard of before */ -#define DEFAULT_SECTION_ALIGNMENT 4 diff --git a/arch/ppc/boot/include/serial.h b/arch/ppc/boot/include/serial.h deleted file mode 100644 index d710eabb42562ebd9b6460c473adba45dbbb48f7..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/include/serial.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * A really private header file for the (dumb) serial driver in arch/ppc/boot - * - * Shamelessly taken from include/linux/serialP.h: - * - * Copyright (C) 1997 by Theodore Ts'o. - * - * Redistribution of this file is permitted under the terms of the GNU - * Public License (GPL) - */ - -#ifndef _PPC_BOOT_SERIALP_H -#define _PPC_BOOT_SERIALP_H - -/* - * This is our internal structure for each serial port's state. - * - * Many fields are paralleled by the structure used by the serial_struct - * structure. - * - * Given that this is how SERIAL_PORT_DFNS are done, and that we need - * to use a few of their fields, we need to have our own copy of it. - */ -struct serial_state { - int magic; - int baud_base; - unsigned long port; - int irq; - int flags; - int hub6; - int type; - int line; - int revision; /* Chip revision (950) */ - int xmit_fifo_size; - int custom_divisor; - int count; - u8 *iomem_base; - u16 iomem_reg_shift; - unsigned short close_delay; - unsigned short closing_wait; /* time to wait before closing */ - unsigned long icount; - int io_type; - void *info; - void *dev; -}; -#endif /* _PPC_BOOT_SERIAL_H */ diff --git a/arch/ppc/boot/ld.script b/arch/ppc/boot/ld.script deleted file mode 100644 index d4dd8f15395ecb3495289f6ce8bb91c9da6162d1..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/ld.script +++ /dev/null @@ -1,85 +0,0 @@ -OUTPUT_ARCH(powerpc:common) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .plt : { *(.plt) } - .text : - { - *(.text) - *(.fixup) - __relocate_start = .; - *(.relocate_code) - __relocate_end = .; - } - _etext = .; - PROVIDE (etext = .); - - /* Read-write section, merged into data segment: */ - . = ALIGN(4096); - .data : - { - *(.data) - *(.data1) - *(.data.boot) - *(.sdata) - *(.sdata2) - *(.got.plt) *(.got) - *(.dynamic) - *(.rodata) - *(.rodata.*) - *(.rodata1) - *(.got1) - __image_begin = .; - *(.image) - __image_end = .; - . = ALIGN(4096); - __ramdisk_begin = .; - *(.ramdisk) - __ramdisk_end = .; - . = ALIGN(4096); - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = ALIGN(4096); - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); - - /DISCARD/ : { - *(__ksymtab) - *(__ksymtab_strings) - *(__bug_table) - *(__kcrctab) - } - -} diff --git a/arch/ppc/boot/lib/.gitignore b/arch/ppc/boot/lib/.gitignore deleted file mode 100644 index 1629a6167755894073de49361690ce2585323d6e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/lib/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -inffast.c -inflate.c -inftrees.c diff --git a/arch/ppc/boot/lib/Makefile b/arch/ppc/boot/lib/Makefile deleted file mode 100644 index 2f995f712ec55c90857bd71539f5f34b90df64f7..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/lib/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# -# Makefile for some libs needed by zImage. -# - -CFLAGS_kbd.o := -Idrivers/char -CFLAGS_vreset.o := -Iarch/ppc/boot/include - -zlib := inffast.c inflate.c inftrees.c - -lib-y += $(zlib:.c=.o) div64.o -lib-$(CONFIG_VGA_CONSOLE) += vreset.o kbd.o - - -# zlib files needs header from their original place -EXTRA_CFLAGS += -Ilib/zlib_inflate - -quiet_cmd_copy_zlib = COPY $@ - cmd_copy_zlib = cat $< > $@ - -$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/% - $(call cmd,copy_zlib) - -clean-files := $(zlib) diff --git a/arch/ppc/boot/lib/div64.S b/arch/ppc/boot/lib/div64.S deleted file mode 100644 index 3527569e992685e728c3e9e6902e6ec06a2e4145..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/lib/div64.S +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Divide a 64-bit unsigned number by a 32-bit unsigned number. - * This routine assumes that the top 32 bits of the dividend are - * non-zero to start with. - * On entry, r3 points to the dividend, which get overwritten with - * the 64-bit quotient, and r4 contains the divisor. - * On exit, r3 contains the remainder. - * - * Copyright (C) 2002 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include - -_GLOBAL(__div64_32) - lwz r5,0(r3) # get the dividend into r5/r6 - lwz r6,4(r3) - cmplw r5,r4 - li r7,0 - li r8,0 - blt 1f - divwu r7,r5,r4 # if dividend.hi >= divisor, - mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor - subf. r5,r0,r5 # dividend.hi %= divisor - beq 3f -1: mr r11,r5 # here dividend.hi != 0 - andis. r0,r5,0xc000 - bne 2f - cntlzw r0,r5 # we are shifting the dividend right - li r10,-1 # to make it < 2^32, and shifting - srw r10,r10,r0 # the divisor right the same amount, - add r9,r4,r10 # rounding up (so the estimate cannot - andc r11,r6,r10 # ever be too large, only too small) - andc r9,r9,r10 - or r11,r5,r11 - rotlw r9,r9,r0 - rotlw r11,r11,r0 - divwu r11,r11,r9 # then we divide the shifted quantities -2: mullw r10,r11,r4 # to get an estimate of the quotient, - mulhwu r9,r11,r4 # multiply the estimate by the divisor, - subfc r6,r10,r6 # take the product from the divisor, - add r8,r8,r11 # and add the estimate to the accumulated - subfe. r5,r9,r5 # quotient - bne 1b -3: cmplw r6,r4 - blt 4f - divwu r0,r6,r4 # perform the remaining 32-bit division - mullw r10,r0,r4 # and get the remainder - add r8,r8,r0 - subf r6,r10,r6 -4: stw r7,0(r3) # return the quotient in *r3 - stw r8,4(r3) - mr r3,r6 # return the remainder in r3 - blr diff --git a/arch/ppc/boot/lib/kbd.c b/arch/ppc/boot/lib/kbd.c deleted file mode 100644 index 3931727434de1f64491684fcf08e2b1368a8ceec..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/lib/kbd.c +++ /dev/null @@ -1,248 +0,0 @@ -#include - -#include "defkeymap.c" /* yeah I know it's bad -- Cort */ - - -unsigned char shfts, ctls, alts, caps; - -#define KBDATAP 0x60 /* kbd data port */ -#define KBSTATUSPORT 0x61 /* kbd status */ -#define KBSTATP 0x64 /* kbd status port */ -#define KBINRDY 0x01 -#define KBOUTRDY 0x02 - -extern unsigned char inb(int port); -extern void outb(int port, char val); -extern void puts(const char *); -extern void puthex(unsigned long val); -extern void udelay(long x); - -static int kbd(int noblock) -{ - unsigned char dt, brk, val; - unsigned code; -loop: - if (noblock) { - if ((inb(KBSTATP) & KBINRDY) == 0) - return (-1); - } else while((inb(KBSTATP) & KBINRDY) == 0) ; - - dt = inb(KBDATAP); - - brk = dt & 0x80; /* brk == 1 on key release */ - dt = dt & 0x7f; /* keycode */ - - if (shfts) - code = shift_map[dt]; - else if (ctls) - code = ctrl_map[dt]; - else - code = plain_map[dt]; - - val = KVAL(code); - switch (KTYP(code) & 0x0f) { - case KT_LATIN: - if (brk) - break; - if (alts) - val |= 0x80; - if (val == 0x7f) /* map delete to backspace */ - val = '\b'; - return val; - - case KT_LETTER: - if (brk) - break; - if (caps) - val -= 'a'-'A'; - return val; - - case KT_SPEC: - if (brk) - break; - if (val == KVAL(K_CAPS)) - caps = !caps; - else if (val == KVAL(K_ENTER)) { -enter: /* Wait for key up */ - while (1) { - while((inb(KBSTATP) & KBINRDY) == 0) ; - dt = inb(KBDATAP); - if (dt & 0x80) /* key up */ break; - } - return 10; - } - break; - - case KT_PAD: - if (brk) - break; - if (val < 10) - return val; - if (val == KVAL(K_PENTER)) - goto enter; - break; - - case KT_SHIFT: - switch (val) { - case KG_SHIFT: - case KG_SHIFTL: - case KG_SHIFTR: - shfts = brk ? 0 : 1; - break; - case KG_ALT: - case KG_ALTGR: - alts = brk ? 0 : 1; - break; - case KG_CTRL: - case KG_CTRLL: - case KG_CTRLR: - ctls = brk ? 0 : 1; - break; - } - break; - - case KT_LOCK: - switch (val) { - case KG_SHIFT: - case KG_SHIFTL: - case KG_SHIFTR: - if (brk) - shfts = !shfts; - break; - case KG_ALT: - case KG_ALTGR: - if (brk) - alts = !alts; - break; - case KG_CTRL: - case KG_CTRLL: - case KG_CTRLR: - if (brk) - ctls = !ctls; - break; - } - break; - } - if (brk) return (-1); /* Ignore initial 'key up' codes */ - goto loop; -} - -static int __kbdreset(void) -{ - unsigned char c; - int i, t; - - /* flush input queue */ - t = 2000; - while ((inb(KBSTATP) & KBINRDY)) - { - (void)inb(KBDATAP); - if (--t == 0) - return 1; - } - /* Send self-test */ - t = 20000; - while (inb(KBSTATP) & KBOUTRDY) - if (--t == 0) - return 2; - outb(KBSTATP,0xAA); - t = 200000; - while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */ - if (--t == 0) - return 3; - if ((c = inb(KBDATAP)) != 0x55) - { - puts("Keyboard self test failed - result:"); - puthex(c); - puts("\n"); - } - /* Enable interrupts and keyboard controller */ - t = 20000; - while (inb(KBSTATP) & KBOUTRDY) - if (--t == 0) return 4; - outb(KBSTATP,0x60); - t = 20000; - while (inb(KBSTATP) & KBOUTRDY) - if (--t == 0) return 5; - outb(KBDATAP,0x45); - for (i = 0; i < 10000; i++) udelay(1); - - t = 20000; - while (inb(KBSTATP) & KBOUTRDY) - if (--t == 0) return 6; - outb(KBSTATP,0x20); - t = 200000; - while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */ - if (--t == 0) return 7; - if (! (inb(KBDATAP) & 0x40)) { - /* - * Quote from PS/2 System Reference Manual: - * - * "Address hex 0060 and address hex 0064 should be - * written only when the input-buffer-full bit and - * output-buffer-full bit in the Controller Status - * register are set 0." (KBINRDY and KBOUTRDY) - */ - t = 200000; - while (inb(KBSTATP) & (KBINRDY | KBOUTRDY)) - if (--t == 0) return 8; - outb(KBDATAP,0xF0); - t = 200000; - while (inb(KBSTATP) & (KBINRDY | KBOUTRDY)) - if (--t == 0) return 9; - outb(KBDATAP,0x01); - } - t = 20000; - while (inb(KBSTATP) & KBOUTRDY) - if (--t == 0) return 10; - outb(KBSTATP,0xAE); - return 0; -} - -static void kbdreset(void) -{ - int ret = __kbdreset(); - - if (ret) { - puts("__kbdreset failed: "); - puthex(ret); - puts("\n"); - } -} - -/* We have to actually read the keyboard when CRT_tstc is called, - * since the pending data might be a key release code, and therefore - * not valid data. In this case, kbd() will return -1, even though there's - * data to be read. Of course, we might actually read a valid key press, - * in which case it gets queued into key_pending for use by CRT_getc. - */ - -static int kbd_reset = 0; - -static int key_pending = -1; - -int CRT_getc(void) -{ - int c; - if (!kbd_reset) {kbdreset(); kbd_reset++; } - - if (key_pending != -1) { - c = key_pending; - key_pending = -1; - return c; - } else { - while ((c = kbd(0)) == 0) ; - return c; - } -} - -int CRT_tstc(void) -{ - if (!kbd_reset) {kbdreset(); kbd_reset++; } - - while (key_pending == -1 && ((inb(KBSTATP) & KBINRDY) != 0)) { - key_pending = kbd(1); - } - - return (key_pending != -1); -} diff --git a/arch/ppc/boot/lib/vreset.c b/arch/ppc/boot/lib/vreset.c deleted file mode 100644 index 98539e9f7f96a25e68773c8174d79e8e0cb07975..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/lib/vreset.c +++ /dev/null @@ -1,805 +0,0 @@ -/* - * vreset.c - * - * Initialize the VGA control registers to 80x25 text mode. - * - * Adapted from a program by: - * Steve Sellgren - * San Francisco Indigo Company - * sfindigo!sellgren@uunet.uu.net - * - * Original concept by: - * Gary Thomas - * Adapted for Moto boxes by: - * Pat Kane & Mark Scott, 1996 - * Adapted for IBM portables by: - * Takeshi Ishimoto - * Multi-console support: - * Terje Malmedal - */ - -#include "iso_font.h" -#include "nonstdio.h" - -extern char *vidmem; -extern int lines, cols; -struct VaRegs; - -/* - * VGA Register - */ -struct VgaRegs -{ - unsigned short io_port; - unsigned char io_index; - unsigned char io_value; -}; - -void unlockVideo(int slot); -void setTextRegs(struct VgaRegs *svp); -void setTextCLUT(int shift); -void clearVideoMemory(void); -void loadFont(unsigned char *ISA_mem); - -static void mdelay(int ms) -{ - for (; ms > 0; --ms) - udelay(1000); -} - -/* - * Default console text mode registers used to reset - * graphics adapter. - */ -#define NREGS 54 -#define ENDMK 0xFFFF /* End marker */ - -#define S3Vendor 0x5333 -#define CirrusVendor 0x1013 -#define DiamondVendor 0x100E -#define MatroxVendor 0x102B -#define ParadiseVendor 0x101C - -struct VgaRegs GenVgaTextRegs[NREGS+1] = { - /* port index value */ - /* SR Regs */ - { 0x3c4, 0x1, 0x0 }, - { 0x3c4, 0x2, 0x3 }, - { 0x3c4, 0x3, 0x0 }, - { 0x3c4, 0x4, 0x2 }, - /* CR Regs */ - { 0x3d4, 0x0, 0x5f }, - { 0x3d4, 0x1, 0x4f }, - { 0x3d4, 0x2, 0x50 }, - { 0x3d4, 0x3, 0x82 }, - { 0x3d4, 0x4, 0x55 }, - { 0x3d4, 0x5, 0x81 }, - { 0x3d4, 0x6, 0xbf }, - { 0x3d4, 0x7, 0x1f }, - { 0x3d4, 0x8, 0x00 }, - { 0x3d4, 0x9, 0x4f }, - { 0x3d4, 0xa, 0x0d }, - { 0x3d4, 0xb, 0x0e }, - { 0x3d4, 0xc, 0x00 }, - { 0x3d4, 0xd, 0x00 }, - { 0x3d4, 0xe, 0x00 }, - { 0x3d4, 0xf, 0x00 }, - { 0x3d4, 0x10, 0x9c }, - { 0x3d4, 0x11, 0x8e }, - { 0x3d4, 0x12, 0x8f }, - { 0x3d4, 0x13, 0x28 }, - { 0x3d4, 0x14, 0x1f }, - { 0x3d4, 0x15, 0x96 }, - { 0x3d4, 0x16, 0xb9 }, - { 0x3d4, 0x17, 0xa3 }, - /* GR Regs */ - { 0x3ce, 0x0, 0x0 }, - { 0x3ce, 0x1, 0x0 }, - { 0x3ce, 0x2, 0x0 }, - { 0x3ce, 0x3, 0x0 }, - { 0x3ce, 0x4, 0x0 }, - { 0x3ce, 0x5, 0x10 }, - { 0x3ce, 0x6, 0xe }, - { 0x3ce, 0x7, 0x0 }, - { 0x3ce, 0x8, 0xff }, - { ENDMK } -}; - -struct RGBColors -{ - unsigned char r, g, b; -}; - -/* - * Default console text mode color table. - * These values were obtained by booting Linux with - * text mode firmware & then dumping the registers. - */ -struct RGBColors TextCLUT[256] = -{ - /* red green blue */ - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x2a }, - { 0x0, 0x2a, 0x0 }, - { 0x0, 0x2a, 0x2a }, - { 0x2a, 0x0, 0x0 }, - { 0x2a, 0x0, 0x2a }, - { 0x2a, 0x2a, 0x0 }, - { 0x2a, 0x2a, 0x2a }, - { 0x0, 0x0, 0x15 }, - { 0x0, 0x0, 0x3f }, - { 0x0, 0x2a, 0x15 }, - { 0x0, 0x2a, 0x3f }, - { 0x2a, 0x0, 0x15 }, - { 0x2a, 0x0, 0x3f }, - { 0x2a, 0x2a, 0x15 }, - { 0x2a, 0x2a, 0x3f }, - { 0x0, 0x15, 0x0 }, - { 0x0, 0x15, 0x2a }, - { 0x0, 0x3f, 0x0 }, - { 0x0, 0x3f, 0x2a }, - { 0x2a, 0x15, 0x0 }, - { 0x2a, 0x15, 0x2a }, - { 0x2a, 0x3f, 0x0 }, - { 0x2a, 0x3f, 0x2a }, - { 0x0, 0x15, 0x15 }, - { 0x0, 0x15, 0x3f }, - { 0x0, 0x3f, 0x15 }, - { 0x0, 0x3f, 0x3f }, - { 0x2a, 0x15, 0x15 }, - { 0x2a, 0x15, 0x3f }, - { 0x2a, 0x3f, 0x15 }, - { 0x2a, 0x3f, 0x3f }, - { 0x15, 0x0, 0x0 }, - { 0x15, 0x0, 0x2a }, - { 0x15, 0x2a, 0x0 }, - { 0x15, 0x2a, 0x2a }, - { 0x3f, 0x0, 0x0 }, - { 0x3f, 0x0, 0x2a }, - { 0x3f, 0x2a, 0x0 }, - { 0x3f, 0x2a, 0x2a }, - { 0x15, 0x0, 0x15 }, - { 0x15, 0x0, 0x3f }, - { 0x15, 0x2a, 0x15 }, - { 0x15, 0x2a, 0x3f }, - { 0x3f, 0x0, 0x15 }, - { 0x3f, 0x0, 0x3f }, - { 0x3f, 0x2a, 0x15 }, - { 0x3f, 0x2a, 0x3f }, - { 0x15, 0x15, 0x0 }, - { 0x15, 0x15, 0x2a }, - { 0x15, 0x3f, 0x0 }, - { 0x15, 0x3f, 0x2a }, - { 0x3f, 0x15, 0x0 }, - { 0x3f, 0x15, 0x2a }, - { 0x3f, 0x3f, 0x0 }, - { 0x3f, 0x3f, 0x2a }, - { 0x15, 0x15, 0x15 }, - { 0x15, 0x15, 0x3f }, - { 0x15, 0x3f, 0x15 }, - { 0x15, 0x3f, 0x3f }, - { 0x3f, 0x15, 0x15 }, - { 0x3f, 0x15, 0x3f }, - { 0x3f, 0x3f, 0x15 }, - { 0x3f, 0x3f, 0x3f }, - { 0x39, 0xc, 0x5 }, - { 0x15, 0x2c, 0xf }, - { 0x26, 0x10, 0x3d }, - { 0x29, 0x29, 0x38 }, - { 0x4, 0x1a, 0xe }, - { 0x2, 0x1e, 0x3a }, - { 0x3c, 0x25, 0x33 }, - { 0x3c, 0xc, 0x2c }, - { 0x3f, 0x3, 0x2b }, - { 0x1c, 0x9, 0x13 }, - { 0x25, 0x2a, 0x35 }, - { 0x1e, 0xa, 0x38 }, - { 0x24, 0x8, 0x3 }, - { 0x3, 0xe, 0x36 }, - { 0xc, 0x6, 0x2a }, - { 0x26, 0x3, 0x32 }, - { 0x5, 0x2f, 0x33 }, - { 0x3c, 0x35, 0x2f }, - { 0x2d, 0x26, 0x3e }, - { 0xd, 0xa, 0x10 }, - { 0x25, 0x3c, 0x11 }, - { 0xd, 0x4, 0x2e }, - { 0x5, 0x19, 0x3e }, - { 0xc, 0x13, 0x34 }, - { 0x2b, 0x6, 0x24 }, - { 0x4, 0x3, 0xd }, - { 0x2f, 0x3c, 0xc }, - { 0x2a, 0x37, 0x1f }, - { 0xf, 0x12, 0x38 }, - { 0x38, 0xe, 0x2a }, - { 0x12, 0x2f, 0x19 }, - { 0x29, 0x2e, 0x31 }, - { 0x25, 0x13, 0x3e }, - { 0x33, 0x3e, 0x33 }, - { 0x1d, 0x2c, 0x25 }, - { 0x15, 0x15, 0x5 }, - { 0x32, 0x25, 0x39 }, - { 0x1a, 0x7, 0x1f }, - { 0x13, 0xe, 0x1d }, - { 0x36, 0x17, 0x34 }, - { 0xf, 0x15, 0x23 }, - { 0x2, 0x35, 0xd }, - { 0x15, 0x3f, 0xc }, - { 0x14, 0x2f, 0xf }, - { 0x19, 0x21, 0x3e }, - { 0x27, 0x11, 0x2f }, - { 0x38, 0x3f, 0x3c }, - { 0x36, 0x2d, 0x15 }, - { 0x16, 0x17, 0x2 }, - { 0x1, 0xa, 0x3d }, - { 0x1b, 0x11, 0x3f }, - { 0x21, 0x3c, 0xd }, - { 0x1a, 0x39, 0x3d }, - { 0x8, 0xe, 0xe }, - { 0x22, 0x21, 0x23 }, - { 0x1e, 0x30, 0x5 }, - { 0x1f, 0x22, 0x3d }, - { 0x1e, 0x2f, 0xa }, - { 0x0, 0x1c, 0xe }, - { 0x0, 0x1c, 0x15 }, - { 0x0, 0x1c, 0x1c }, - { 0x0, 0x15, 0x1c }, - { 0x0, 0xe, 0x1c }, - { 0x0, 0x7, 0x1c }, - { 0xe, 0xe, 0x1c }, - { 0x11, 0xe, 0x1c }, - { 0x15, 0xe, 0x1c }, - { 0x18, 0xe, 0x1c }, - { 0x1c, 0xe, 0x1c }, - { 0x1c, 0xe, 0x18 }, - { 0x1c, 0xe, 0x15 }, - { 0x1c, 0xe, 0x11 }, - { 0x1c, 0xe, 0xe }, - { 0x1c, 0x11, 0xe }, - { 0x1c, 0x15, 0xe }, - { 0x1c, 0x18, 0xe }, - { 0x1c, 0x1c, 0xe }, - { 0x18, 0x1c, 0xe }, - { 0x15, 0x1c, 0xe }, - { 0x11, 0x1c, 0xe }, - { 0xe, 0x1c, 0xe }, - { 0xe, 0x1c, 0x11 }, - { 0xe, 0x1c, 0x15 }, - { 0xe, 0x1c, 0x18 }, - { 0xe, 0x1c, 0x1c }, - { 0xe, 0x18, 0x1c }, - { 0xe, 0x15, 0x1c }, - { 0xe, 0x11, 0x1c }, - { 0x14, 0x14, 0x1c }, - { 0x16, 0x14, 0x1c }, - { 0x18, 0x14, 0x1c }, - { 0x1a, 0x14, 0x1c }, - { 0x1c, 0x14, 0x1c }, - { 0x1c, 0x14, 0x1a }, - { 0x1c, 0x14, 0x18 }, - { 0x1c, 0x14, 0x16 }, - { 0x1c, 0x14, 0x14 }, - { 0x1c, 0x16, 0x14 }, - { 0x1c, 0x18, 0x14 }, - { 0x1c, 0x1a, 0x14 }, - { 0x1c, 0x1c, 0x14 }, - { 0x1a, 0x1c, 0x14 }, - { 0x18, 0x1c, 0x14 }, - { 0x16, 0x1c, 0x14 }, - { 0x14, 0x1c, 0x14 }, - { 0x14, 0x1c, 0x16 }, - { 0x14, 0x1c, 0x18 }, - { 0x14, 0x1c, 0x1a }, - { 0x14, 0x1c, 0x1c }, - { 0x14, 0x1a, 0x1c }, - { 0x14, 0x18, 0x1c }, - { 0x14, 0x16, 0x1c }, - { 0x0, 0x0, 0x10 }, - { 0x4, 0x0, 0x10 }, - { 0x8, 0x0, 0x10 }, - { 0xc, 0x0, 0x10 }, - { 0x10, 0x0, 0x10 }, - { 0x10, 0x0, 0xc }, - { 0x10, 0x0, 0x8 }, - { 0x10, 0x0, 0x4 }, - { 0x10, 0x0, 0x0 }, - { 0x10, 0x4, 0x0 }, - { 0x10, 0x8, 0x0 }, - { 0x10, 0xc, 0x0 }, - { 0x10, 0x10, 0x0 }, - { 0xc, 0x10, 0x0 }, - { 0x8, 0x10, 0x0 }, - { 0x4, 0x10, 0x0 }, - { 0x0, 0x10, 0x0 }, - { 0x0, 0x10, 0x4 }, - { 0x0, 0x10, 0x8 }, - { 0x0, 0x10, 0xc }, - { 0x0, 0x10, 0x10 }, - { 0x0, 0xc, 0x10 }, - { 0x0, 0x8, 0x10 }, - { 0x0, 0x4, 0x10 }, - { 0x8, 0x8, 0x10 }, - { 0xa, 0x8, 0x10 }, - { 0xc, 0x8, 0x10 }, - { 0xe, 0x8, 0x10 }, - { 0x10, 0x8, 0x10 }, - { 0x10, 0x8, 0xe }, - { 0x10, 0x8, 0xc }, - { 0x10, 0x8, 0xa }, - { 0x10, 0x8, 0x8 }, - { 0x10, 0xa, 0x8 }, - { 0x10, 0xc, 0x8 }, - { 0x10, 0xe, 0x8 }, - { 0x10, 0x10, 0x8 }, - { 0xe, 0x10, 0x8 }, - { 0xc, 0x10, 0x8 }, - { 0xa, 0x10, 0x8 }, - { 0x8, 0x10, 0x8 }, - { 0x8, 0x10, 0xa }, - { 0x8, 0x10, 0xc }, - { 0x8, 0x10, 0xe }, - { 0x8, 0x10, 0x10 }, - { 0x8, 0xe, 0x10 }, - { 0x8, 0xc, 0x10 }, - { 0x8, 0xa, 0x10 }, - { 0xb, 0xb, 0x10 }, - { 0xc, 0xb, 0x10 }, - { 0xd, 0xb, 0x10 }, - { 0xf, 0xb, 0x10 }, - { 0x10, 0xb, 0x10 }, - { 0x10, 0xb, 0xf }, - { 0x10, 0xb, 0xd }, - { 0x10, 0xb, 0xc }, - { 0x10, 0xb, 0xb }, - { 0x10, 0xc, 0xb }, - { 0x10, 0xd, 0xb }, - { 0x10, 0xf, 0xb }, - { 0x10, 0x10, 0xb }, - { 0xf, 0x10, 0xb }, - { 0xd, 0x10, 0xb }, - { 0xc, 0x10, 0xb }, - { 0xb, 0x10, 0xb }, - { 0xb, 0x10, 0xc }, - { 0xb, 0x10, 0xd }, - { 0xb, 0x10, 0xf }, - { 0xb, 0x10, 0x10 }, - { 0xb, 0xf, 0x10 }, - { 0xb, 0xd, 0x10 }, - { 0xb, 0xc, 0x10 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 }, - { 0x0, 0x0, 0x0 } -}; - -unsigned char AC[21] = { - 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07, - 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, - 0x0C, 0x00, 0x0F, 0x08, 0x00}; - -static int scanPCI(int start_slt); -static int PCIVendor(int); -#ifdef DEBUG -static void printslots(void); -#endif -extern void puthex(unsigned long); -extern void puts(const char *); -static void unlockS3(void); - -static inline void -outw(int port, unsigned short val) -{ - outb(port, val >> 8); - outb(port+1, val); -} - -int -vga_init(unsigned char *ISA_mem) -{ - int slot; - struct VgaRegs *VgaTextRegs; - - /* See if VGA already in TEXT mode - exit if so! */ - outb(0x3CE, 0x06); - if ((inb(0x3CF) & 0x01) == 0){ - puts("VGA already in text mode\n"); - return 0; - } - - /* If no VGA responding in text mode, then we have some work to do... - */ - slot = -1; - while((slot = scanPCI(slot)) > -1) { /* find video card in use */ - unlockVideo(slot); /* enable I/O to card */ - VgaTextRegs = GenVgaTextRegs; - - switch (PCIVendor(slot)) { - default: - break; - case(S3Vendor): - unlockS3(); - break; - - case(CirrusVendor): - outw(0x3C4, 0x0612); /* unlock ext regs */ - outw(0x3C4, 0x0700); /* reset ext sequence mode */ - break; - - case(ParadiseVendor): /* IBM Portable 850 */ - outw(0x3ce, 0x0f05); /* unlock pardise registers */ - outw(0x3c4, 0x0648); - outw(0x3d4, 0x2985); - outw(0x3d4, 0x34a6); - outb(0x3ce, 0x0b); /* disable linear addressing */ - outb(0x3cf, inb(0x3cf) & ~0x30); - outw(0x3c4, 0x1400); - outb(0x3ce, 0x0e); /* disable 256 color mode */ - outb(0x3cf, inb(0x3cf) & ~0x01); - outb(0xd00, 0xff); /* enable auto-centering */ - if (!(inb(0xd01) & 0x03)) { - outb(0x3d4, 0x33); - outb(0x3d5, inb(0x3d5) & ~0x90); - outb(0x3d4, 0x32); - outb(0x3d5, inb(0x3d5) | 0x04); - outw(0x3d4, 0x0250); - outw(0x3d4, 0x07ba); - outw(0x3d4, 0x0900); - outw(0x3d4, 0x15e7); - outw(0x3d4, 0x2a95); - } - outw(0x3d4, 0x34a0); - break; - - #if 0 /* Untested - probably doesn't work */ - case(MatroxVendor): - case(DiamondVendor): - puts("VGA Chip Vendor ID: "); - puthex(PCIVendor(slot)); - puts("\n"); - mdelay(1000); - #endif - }; - - outw(0x3C4, 0x0120); /* disable video */ - setTextRegs(VgaTextRegs); /* initial register setup */ - setTextCLUT(0); /* load color lookup table */ - loadFont(ISA_mem); /* load font */ - setTextRegs(VgaTextRegs); /* reload registers */ - outw(0x3C4, 0x0100); /* re-enable video */ - clearVideoMemory(); - - if (PCIVendor(slot) == S3Vendor) { - outb(0x3c2, 0x63); /* MISC */ - } /* endif */ - - #ifdef DEBUG - printslots(); - mdelay(5000); - #endif - - mdelay(1000); /* give time for the video monitor to come up */ - } - return (1); /* 'CRT' I/O supported */ -} - -/* - * Write to VGA Attribute registers. - */ -void -writeAttr(unsigned char index, unsigned char data, unsigned char videoOn) -{ - unsigned char v; - v = inb(0x3da); /* reset attr. address toggle */ - if (videoOn) - outb(0x3c0, (index & 0x1F) | 0x20); - else - outb(0x3c0, (index & 0x1F)); - outb(0x3c0, data); -} - -void -setTextRegs(struct VgaRegs *svp) -{ - int i; - - /* - * saved settings - */ - while( svp->io_port != ENDMK ) { - outb(svp->io_port, svp->io_index); - outb(svp->io_port+1, svp->io_value); - svp++; - } - - outb(0x3c2, 0x67); /* MISC */ - outb(0x3c6, 0xff); /* MASK */ - - for ( i = 0; i < 0x10; i++) - writeAttr(i, AC[i], 0); /* palette */ - writeAttr(0x10, 0x0c, 0); /* text mode */ - writeAttr(0x11, 0x00, 0); /* overscan color (border) */ - writeAttr(0x12, 0x0f, 0); /* plane enable */ - writeAttr(0x13, 0x08, 0); /* pixel panning */ - writeAttr(0x14, 0x00, 1); /* color select; video on */ -} - -void -setTextCLUT(int shift) -{ - int i; - - outb(0x3C6, 0xFF); - i = inb(0x3C7); - outb(0x3C8, 0); - i = inb(0x3C7); - - for ( i = 0; i < 256; i++) { - outb(0x3C9, TextCLUT[i].r << shift); - outb(0x3C9, TextCLUT[i].g << shift); - outb(0x3C9, TextCLUT[i].b << shift); - } -} - -void -loadFont(unsigned char *ISA_mem) -{ - int i, j; - unsigned char *font_page = (unsigned char *) &ISA_mem[0xA0000]; - - outb(0x3C2, 0x67); - /* - * Load font - */ - i = inb(0x3DA); /* Reset Attr toggle */ - - outb(0x3C0,0x30); - outb(0x3C0, 0x01); /* graphics mode */ - - outw(0x3C4, 0x0001); /* reset sequencer */ - outw(0x3C4, 0x0204); /* write to plane 2 */ - outw(0x3C4, 0x0406); /* enable plane graphics */ - outw(0x3C4, 0x0003); /* reset sequencer */ - outw(0x3CE, 0x0402); /* read plane 2 */ - outw(0x3CE, 0x0500); /* write mode 0, read mode 0 */ - outw(0x3CE, 0x0605); /* set graphics mode */ - - for (i = 0; i < sizeof(font); i += 16) { - for (j = 0; j < 16; j++) { - __asm__ volatile("eieio"); - font_page[(2*i)+j] = font[i+j]; - } - } -} - -static void -unlockS3(void) -{ - int s3_device_id; - outw(0x3d4, 0x3848); - outw(0x3d4, 0x39a5); - outb(0x3d4, 0x2d); - s3_device_id = inb(0x3d5) << 8; - outb(0x3d4, 0x2e); - s3_device_id |= inb(0x3d5); - - if (s3_device_id != 0x8812) { - /* From the S3 manual */ - outb(0x46E8, 0x10); /* Put into setup mode */ - outb(0x3C3, 0x10); - outb(0x102, 0x01); /* Enable registers */ - outb(0x46E8, 0x08); /* Enable video */ - outb(0x3C3, 0x08); - outb(0x4AE8, 0x00); - -#if 0 - outb(0x42E8, 0x80); /* Reset graphics engine? */ -#endif - - outb(0x3D4, 0x38); /* Unlock all registers */ - outb(0x3D5, 0x48); - outb(0x3D4, 0x39); - outb(0x3D5, 0xA5); - outb(0x3D4, 0x40); - outb(0x3D5, inb(0x3D5)|0x01); - outb(0x3D4, 0x33); - outb(0x3D5, inb(0x3D5)&~0x52); - outb(0x3D4, 0x35); - outb(0x3D5, inb(0x3D5)&~0x30); - outb(0x3D4, 0x3A); - outb(0x3D5, 0x00); - outb(0x3D4, 0x53); - outb(0x3D5, 0x00); - outb(0x3D4, 0x31); - outb(0x3D5, inb(0x3D5)&~0x4B); - outb(0x3D4, 0x58); - - outb(0x3D5, 0); - - outb(0x3D4, 0x54); - outb(0x3D5, 0x38); - outb(0x3D4, 0x60); - outb(0x3D5, 0x07); - outb(0x3D4, 0x61); - outb(0x3D5, 0x80); - outb(0x3D4, 0x62); - outb(0x3D5, 0xA1); - outb(0x3D4, 0x69); /* High order bits for cursor address */ - outb(0x3D5, 0); - - outb(0x3D4, 0x32); - outb(0x3D5, inb(0x3D5)&~0x10); - } else { - outw(0x3c4, 0x0806); /* IBM Portable 860 */ - outw(0x3c4, 0x1041); - outw(0x3c4, 0x1128); - outw(0x3d4, 0x4000); - outw(0x3d4, 0x3100); - outw(0x3d4, 0x3a05); - outw(0x3d4, 0x6688); - outw(0x3d4, 0x5800); /* disable linear addressing */ - outw(0x3d4, 0x4500); /* disable H/W cursor */ - outw(0x3c4, 0x5410); /* enable auto-centering */ - outw(0x3c4, 0x561f); - outw(0x3c4, 0x1b80); /* lock DCLK selection */ - outw(0x3d4, 0x3900); /* lock S3 registers */ - outw(0x3d4, 0x3800); - } /* endif */ -} - -/* - * cursor() sets an offset (0-1999) into the 80x25 text area. - */ -void -cursor(int x, int y) -{ - int pos = (y*cols)+x; - outb(0x3D4, 14); - outb(0x3D5, pos >> 8); - outb(0x3D4, 15); - outb(0x3D5, pos); -} - -void -clearVideoMemory(void) -{ - int i, j; - for (i = 0; i < lines; i++) { - for (j = 0; j < cols; j++) { - vidmem[((i*cols)+j)*2] = 0x20; /* fill with space character */ - vidmem[((i*cols)+j)*2+1] = 0x07; /* set bg & fg attributes */ - } - } -} - -/* ============ */ - - -#define NSLOTS 8 -#define NPCIREGS 5 - - -/* - should use devfunc number/indirect method to be totally safe on - all machines, this works for now on 3 slot Moto boxes -*/ - -struct PCI_ConfigInfo { - unsigned long * config_addr; - unsigned long regs[NPCIREGS]; -} PCI_slots [NSLOTS] = { - - { (unsigned long *)0x80808000, {0xDEADBEEF,} }, /* onboard */ - { (unsigned long *)0x80800800, {0xDEADBEEF,} }, /* onboard */ - { (unsigned long *)0x80801000, {0xDEADBEEF,} }, /* onboard */ - { (unsigned long *)0x80802000, {0xDEADBEEF,} }, /* onboard */ - { (unsigned long *)0x80804000, {0xDEADBEEF,} }, /* onboard */ - { (unsigned long *)0x80810000, {0xDEADBEEF,} }, /* slot A/1 */ - { (unsigned long *)0x80820000, {0xDEADBEEF,} }, /* slot B/2 */ - { (unsigned long *)0x80840000, {0xDEADBEEF,} } /* slot C/3 */ -}; - - - -/* - * The following code modifies the PCI Command register - * to enable memory and I/O accesses. - */ -void -unlockVideo(int slot) -{ - volatile unsigned char * ppci; - - ppci = (unsigned char * )PCI_slots[slot].config_addr; - ppci[4] = 0x0003; /* enable memory and I/O accesses */ - ppci[0x10] = 0x00000; /* turn off memory mapping */ - ppci[0x11] = 0x00000; /* mem_base = 0 */ - ppci[0x12] = 0x00000; - ppci[0x13] = 0x00000; - __asm__ volatile("eieio"); - - outb(0x3d4, 0x11); - outb(0x3d5, 0x0e); /* unlock CR0-CR7 */ -} - -long -SwapBytes(long lv) /* turn little endian into big indian long */ -{ - long t; - t = (lv&0x000000FF) << 24; - t |= (lv&0x0000FF00) << 8; - t |= (lv&0x00FF0000) >> 8; - t |= (lv&0xFF000000) >> 24; - return(t); -} - - -#define DEVID 0 -#define CMD 1 -#define CLASS 2 -#define MEMBASE 4 - -int -scanPCI(int start_slt) -{ - int slt, r; - struct PCI_ConfigInfo *pslot; - int theSlot = -1; - int highVgaSlot = 0; - - for ( slt = start_slt + 1; slt < NSLOTS; slt++) { - pslot = &PCI_slots[slt]; - for ( r = 0; r < NPCIREGS; r++) { - pslot->regs[r] = SwapBytes ( pslot->config_addr[r] ); - } - /* card in slot ? */ - if ( pslot->regs[DEVID] != 0xFFFFFFFF ) { - /* VGA ? */ - if ( ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x03000000) || - ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x00010000)) { - highVgaSlot = slt; - /* did firmware enable it ? */ - if ( (pslot->regs[CMD] & 0x03) ) { - theSlot = slt; - break; - } - } - } - } - - return ( theSlot ); -} - -/* return Vendor ID of card in the slot */ -static -int PCIVendor(int slotnum) { - struct PCI_ConfigInfo *pslot; - - pslot = &PCI_slots[slotnum]; - -return (pslot->regs[DEVID] & 0xFFFF); -} - -#ifdef DEBUG -static -void printslots(void) -{ - int i; -#if 0 - struct PCI_ConfigInfo *pslot; -#endif - for(i=0; i < NSLOTS; i++) { -#if 0 - pslot = &PCI_slots[i]; - printf("Slot: %d, Addr: %x, Vendor: %08x, Class: %08x\n", - i, pslot->config_addr, pslot->regs[0], pslot->regs[2]); -#else - puts("PCI Slot number: "); puthex(i); - puts(" Vendor ID: "); - puthex(PCIVendor(i)); puts("\n"); -#endif - } -} -#endif /* DEBUG */ diff --git a/arch/ppc/boot/of1275/Makefile b/arch/ppc/boot/of1275/Makefile deleted file mode 100644 index 0b979c0049729351a75931e38eb85a93d126bb9a..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# Makefile of1275 stuff -# - -lib-y := claim.o enter.o exit.o finddevice.o getprop.o ofinit.o \ - ofstdio.o read.o release.o write.o map.o call_prom.o diff --git a/arch/ppc/boot/of1275/call_prom.c b/arch/ppc/boot/of1275/call_prom.c deleted file mode 100644 index 9479a3a2b8c7a8ae7eef0dfdd0bd9e6ab2c9f503..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/call_prom.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 1996-2005 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" -#include - -int call_prom(const char *service, int nargs, int nret, ...) -{ - int i; - struct prom_args { - const char *service; - int nargs; - int nret; - unsigned int args[12]; - } args; - va_list list; - - args.service = service; - args.nargs = nargs; - args.nret = nret; - - va_start(list, nret); - for (i = 0; i < nargs; i++) - args.args[i] = va_arg(list, unsigned int); - va_end(list); - - for (i = 0; i < nret; i++) - args.args[nargs+i] = 0; - - if (of_prom_entry(&args) < 0) - return -1; - - return (nret > 0)? args.args[nargs]: 0; -} - -int call_prom_ret(const char *service, int nargs, int nret, - unsigned int *rets, ...) -{ - int i; - struct prom_args { - const char *service; - int nargs; - int nret; - unsigned int args[12]; - } args; - va_list list; - - args.service = service; - args.nargs = nargs; - args.nret = nret; - - va_start(list, rets); - for (i = 0; i < nargs; i++) - args.args[i] = va_arg(list, unsigned int); - va_end(list); - - for (i = 0; i < nret; i++) - args.args[nargs+i] = 0; - - if (of_prom_entry(&args) < 0) - return -1; - - if (rets != (void *) 0) - for (i = 1; i < nret; ++i) - rets[i-1] = args.args[nargs+i]; - - return (nret > 0)? args.args[nargs]: 0; -} diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c deleted file mode 100644 index 1ed3aeeff8ae469d00ae21afa7a3575810b92aeb..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/claim.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" -#include "nonstdio.h" - -/* - * Older OF's require that when claiming a specific range of addresses, - * we claim the physical space in the /memory node and the virtual - * space in the chosen mmu node, and then do a map operation to - * map virtual to physical. - */ -static int need_map = -1; -static ihandle chosen_mmu; -static phandle memory; - -/* returns true if s2 is a prefix of s1 */ -static int string_match(const char *s1, const char *s2) -{ - for (; *s2; ++s2) - if (*s1++ != *s2) - return 0; - return 1; -} - -static int check_of_version(void) -{ - phandle oprom, chosen; - char version[64]; - - oprom = finddevice("/openprom"); - if (oprom == OF_INVALID_HANDLE) - return 0; - if (getprop(oprom, "model", version, sizeof(version)) <= 0) - return 0; - version[sizeof(version)-1] = 0; - printf("OF version = '%s'\n", version); - if (!string_match(version, "Open Firmware, 1.") - && !string_match(version, "FirmWorks,3.")) - return 0; - chosen = finddevice("/chosen"); - if (chosen == OF_INVALID_HANDLE) { - chosen = finddevice("/chosen@0"); - if (chosen == OF_INVALID_HANDLE) { - printf("no chosen\n"); - return 0; - } - } - if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) { - printf("no mmu\n"); - return 0; - } - memory = (ihandle) call_prom("open", 1, 1, "/memory"); - if (memory == OF_INVALID_HANDLE) { - memory = (ihandle) call_prom("open", 1, 1, "/memory@0"); - if (memory == OF_INVALID_HANDLE) { - printf("no memory node\n"); - return 0; - } - } - printf("old OF detected\n"); - return 1; -} - -void *claim(unsigned int virt, unsigned int size, unsigned int align) -{ - int ret; - unsigned int result; - - if (need_map < 0) - need_map = check_of_version(); - if (align || !need_map) - return (void *) call_prom("claim", 3, 1, virt, size, align); - - ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory, - align, size, virt); - if (ret != 0 || result == -1) - return (void *) -1; - ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu, - align, size, virt); - /* 0x12 == coherent + read/write */ - ret = call_prom("call-method", 6, 1, "map", chosen_mmu, - 0x12, size, virt, virt); - return virt; -} diff --git a/arch/ppc/boot/of1275/enter.c b/arch/ppc/boot/of1275/enter.c deleted file mode 100644 index abe87a8fe2dbd1ec3ec64e91270d0c3907c82bf2..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/enter.c +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -void -enter(void) -{ - struct prom_args { - char *service; - } args; - - args.service = "enter"; - (*of_prom_entry)(&args); -} diff --git a/arch/ppc/boot/of1275/exit.c b/arch/ppc/boot/of1275/exit.c deleted file mode 100644 index b9f89b6a8b45801f0364754ae9cf6799f9ecf976..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/exit.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -void -exit(void) -{ - struct prom_args { - char *service; - } args; - - for (;;) { - args.service = "exit"; - (*of_prom_entry)(&args); - } -} diff --git a/arch/ppc/boot/of1275/finddevice.c b/arch/ppc/boot/of1275/finddevice.c deleted file mode 100644 index 0dcb1201b7722f7811370a51debb28b2e0361115..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/finddevice.c +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -phandle finddevice(const char *name) -{ - return (phandle) call_prom("finddevice", 1, 1, name); -} diff --git a/arch/ppc/boot/of1275/getprop.c b/arch/ppc/boot/of1275/getprop.c deleted file mode 100644 index 0cf75f035e4ea3f448ea4b217a4e0866a85f52b2..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/getprop.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -int -getprop(phandle node, const char *name, void *buf, int buflen) -{ - struct prom_args { - char *service; - int nargs; - int nret; - phandle node; - const char *name; - void *buf; - int buflen; - int size; - } args; - - args.service = "getprop"; - args.nargs = 4; - args.nret = 1; - args.node = node; - args.name = name; - args.buf = buf; - args.buflen = buflen; - args.size = -1; - (*of_prom_entry)(&args); - return args.size; -} diff --git a/arch/ppc/boot/of1275/map.c b/arch/ppc/boot/of1275/map.c deleted file mode 100644 index 443256c6f6d6ad80d556f67fbb09522285f7c2b4..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/map.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" -#include "nonstdio.h" - -extern ihandle of_prom_mmu; - -int -map(unsigned int phys, unsigned int virt, unsigned int size) -{ - struct prom_args { - char *service; - int nargs; - int nret; - char *method; - ihandle mmu_ihandle; - int misc; - unsigned int size; - unsigned int virt; - unsigned int phys; - int ret0; - } args; - - if (of_prom_mmu == 0) { - printf("map() called, no MMU found\n"); - return -1; - } - args.service = "call-method"; - args.nargs = 6; - args.nret = 1; - args.method = "map"; - args.mmu_ihandle = of_prom_mmu; - args.misc = 0; - args.phys = phys; - args.virt = virt; - args.size = size; - (*of_prom_entry)(&args); - - return (int)args.ret0; -} diff --git a/arch/ppc/boot/of1275/ofinit.c b/arch/ppc/boot/of1275/ofinit.c deleted file mode 100644 index 0ee8af7639e96a5f300e5a3a37708d07d8cb0305..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/ofinit.c +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -prom_entry of_prom_entry; -ihandle of_prom_mmu; - -void -ofinit(prom_entry prom_ptr) -{ - phandle chosen; - - of_prom_entry = prom_ptr; - - if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE) - return; - if (getprop(chosen, "mmu", &of_prom_mmu, sizeof(ihandle)) != 4) - return; -} diff --git a/arch/ppc/boot/of1275/ofstdio.c b/arch/ppc/boot/of1275/ofstdio.c deleted file mode 100644 index 10abbe32b31f6603835b7e15ab204f4e5715cc83..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/ofstdio.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -int -ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr) -{ - ihandle in, out; - phandle chosen; - - if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE) - goto err; - if (getprop(chosen, "stdout", &out, sizeof(out)) != 4) - goto err; - if (getprop(chosen, "stdin", &in, sizeof(in)) != 4) - goto err; - - *stdin = in; - *stdout = out; - *stderr = out; - return 0; -err: - return -1; -} diff --git a/arch/ppc/boot/of1275/read.c b/arch/ppc/boot/of1275/read.c deleted file mode 100644 index 122813649fce0e5e631b3582b362f7d94fc5e166..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/read.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -int -read(ihandle instance, void *buf, int buflen) -{ - struct prom_args { - char *service; - int nargs; - int nret; - ihandle instance; - void *buf; - int buflen; - int actual; - } args; - - args.service = "read"; - args.nargs = 3; - args.nret = 1; - args.instance = instance; - args.buf = buf; - args.buflen = buflen; - args.actual = -1; - (*of_prom_entry)(&args); - return args.actual; -} diff --git a/arch/ppc/boot/of1275/release.c b/arch/ppc/boot/of1275/release.c deleted file mode 100644 index 28032d37145d4cbcbebabfe6365cd4498813fcd6..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/release.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -void -release(void *virt, unsigned int size) -{ - struct prom_args { - char *service; - int nargs; - int nret; - void *virt; - unsigned int size; - } args; - - args.service = "release"; - args.nargs = 2; - args.nret = 0; - args.virt = virt; - args.size = size; - (*of_prom_entry)(&args); -} diff --git a/arch/ppc/boot/of1275/write.c b/arch/ppc/boot/of1275/write.c deleted file mode 100644 index 7361b9b2fca54185ee8fdc715fcac28f4df32ea5..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/of1275/write.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) Paul Mackerras 1997. - * Copyright (C) Leigh Brown 2002. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include "of1275.h" - -int -write(ihandle instance, void *buf, int buflen) -{ - struct prom_args { - char *service; - int nargs; - int nret; - ihandle instance; - void *buf; - int buflen; - int actual; - } args; - - args.service = "write"; - args.nargs = 3; - args.nret = 1; - args.instance = instance; - args.buf = buf; - args.buflen = buflen; - args.actual = -1; - (*of_prom_entry)(&args); - return args.actual; -} diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile deleted file mode 100644 index 5b877792d14f6566feee08f21cb9b5ce8d000451..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/Makefile +++ /dev/null @@ -1,277 +0,0 @@ -# This is far from simple, but I couldn't think of a good name. This is -# for making the 'zImage' or 'zImage.initrd' on a number of targets. -# -# Author: Tom Rini -# -# Notes: -# (1) For machines that do not want to use the ELF image directly (including -# stripping just the ELF header off), they must set the variables -# zimage-$(CONFIG_MACHINE) and zimagerd-$(CONFIG_MACHINE) to the target -# that produces the desired image and they must set end-$(CONFIG_MACHINE) -# to what will be suffixed to the image filename. -# (2) Regardless of (1), to have the resulting image be something other -# than 'zImage.elf', set end-$(CONFIG_MACHINE) to be the suffix used for -# the zImage, znetboot, and znetbootrd targets. -# (3) For machine targets which use the mktree program, you can optionally -# set entrypoint-$(CONFIG_MACHINE) to the location which the image should be -# loaded at. The optimal setting for entrypoint-$(CONFIG_MACHINE) is the link -# address. -# (4) It is advisable to pass in the memory size using BI_MEMSIZE and -# get_mem_size(), which is memory controller dependent. Add in the correct -# XXX_memory.o file for this to work, as well as editing the -# misc-$(CONFIG_MACHINE) variable. - -boot := arch/ppc/boot -common := $(boot)/common -utils := $(boot)/utils -bootlib := $(boot)/lib -images := $(boot)/images -of1275 := $(boot)/of1275 -tftpboot := /tftpboot - -# Normally, we use the 'misc.c' file for decompress_kernel and -# whatnot. Sometimes we need to override this however. -misc-y := misc.o - -# Normally, we have our images end in .elf, but something we want to -# change this. -end-y := elf - -# Additionally, we normally don't need to mess with the L2 / L3 caches -# if present on 'classic' PPC. -cacheflag-y := -DCLEAR_CACHES="" -# This file will flush / disable the L2, and L3 if present. -clear_L2_L3 := $(srctree)/$(boot)/simple/clear.S - -# -# See arch/ppc/kconfig and arch/ppc/platforms/Kconfig -# for definition of what platform each config option refer to. -#---------------------------------------------------------------------------- - zimage-$(CONFIG_CPCI690) := zImage-STRIPELF -zimageinitrd-$(CONFIG_CPCI690) := zImage.initrd-STRIPELF - extra.o-$(CONFIG_CPCI690) := misc-cpci690.o - end-$(CONFIG_CPCI690) := cpci690 - cacheflag-$(CONFIG_CPCI690) := -include $(clear_L2_L3) - - zimage-$(CONFIG_IBM_OPENBIOS) := zImage-TREE -zimageinitrd-$(CONFIG_IBM_OPENBIOS) := zImage.initrd-TREE - end-$(CONFIG_IBM_OPENBIOS) := treeboot - misc-$(CONFIG_IBM_OPENBIOS) := misc-embedded.o - - end-$(CONFIG_EMBEDDEDBOOT) := embedded - misc-$(CONFIG_EMBEDDEDBOOT) := misc-embedded.o - - zimage-$(CONFIG_BAMBOO) := zImage-TREE -zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE - end-$(CONFIG_BAMBOO) := bamboo - entrypoint-$(CONFIG_BAMBOO) := 0x01000000 - extra.o-$(CONFIG_BAMBOO) := pibs.o - - zimage-$(CONFIG_BUBINGA) := zImage-TREE -zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE - end-$(CONFIG_BUBINGA) := bubinga - entrypoint-$(CONFIG_BUBINGA) := 0x01000000 - extra.o-$(CONFIG_BUBINGA) := openbios.o - - zimage-$(CONFIG_EBONY) := zImage-TREE -zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE - end-$(CONFIG_EBONY) := ebony - entrypoint-$(CONFIG_EBONY) := 0x01000000 - extra.o-$(CONFIG_EBONY) := openbios.o - - zimage-$(CONFIG_LUAN) := zImage-TREE -zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE - end-$(CONFIG_LUAN) := luan - entrypoint-$(CONFIG_LUAN) := 0x01000000 - extra.o-$(CONFIG_LUAN) := pibs.o - - zimage-$(CONFIG_YUCCA) := zImage-TREE -zimageinitrd-$(CONFIG_YUCCA) := zImage.initrd-TREE - end-$(CONFIG_YUCCA) := yucca - entrypoint-$(CONFIG_YUCCA) := 0x01000000 - extra.o-$(CONFIG_YUCCA) := pibs.o - - zimage-$(CONFIG_OCOTEA) := zImage-TREE -zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE - end-$(CONFIG_OCOTEA) := ocotea - entrypoint-$(CONFIG_OCOTEA) := 0x01000000 - extra.o-$(CONFIG_OCOTEA) := pibs.o - - zimage-$(CONFIG_SYCAMORE) := zImage-TREE -zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE - end-$(CONFIG_SYCAMORE) := sycamore - entrypoint-$(CONFIG_SYCAMORE) := 0x01000000 - extra.o-$(CONFIG_SYCAMORE) := openbios.o - - zimage-$(CONFIG_WALNUT) := zImage-TREE -zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE - end-$(CONFIG_WALNUT) := walnut - entrypoint-$(CONFIG_WALNUT) := 0x01000000 - extra.o-$(CONFIG_WALNUT) := openbios.o - - extra.o-$(CONFIG_EV64260) := misc-ev64260.o - end-$(CONFIG_EV64260) := ev64260 - cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3) - - extra.o-$(CONFIG_CHESTNUT) := misc-chestnut.o - end-$(CONFIG_CHESTNUT) := chestnut - - extra.o-$(CONFIG_KATANA) := misc-katana.o - end-$(CONFIG_KATANA) := katana - cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3) - - extra.o-$(CONFIG_RADSTONE_PPC7D) := misc-radstone_ppc7d.o - end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d - cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3) - - extra.o-$(CONFIG_EV64360) := misc-ev64360.o - end-$(CONFIG_EV64360) := ev64360 - cacheflag-$(CONFIG_EV64360) := -include $(clear_L2_L3) - -# kconfig 'feature', only one of these will ever be 'y' at a time. -# The rest will be unset. -motorola := $(CONFIG_MVME5100)$(CONFIG_PRPMC750) \ -$(CONFIG_PRPMC800)$(CONFIG_LOPEC)$(CONFIG_PPLUS) -motorola := $(strip $(motorola)) - - zimage-$(motorola) := zImage-PPLUS -zimageinitrd-$(motorola) := zImage.initrd-PPLUS - end-$(motorola) := pplus - -# Overrides previous assingment - extra.o-$(CONFIG_PPLUS) := prepmap.o - extra.o-$(CONFIG_LOPEC) := mpc10x_memory.o - -# Really only valid if CONFIG_6xx=y - zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS -zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS -ifeq ($(CONFIG_6xx),y) - extra.o-$(CONFIG_PPC_PREP) := prepmap.o - misc-$(CONFIG_PPC_PREP) += misc-prep.o mpc10x_memory.o -endif - end-$(CONFIG_PPC_PREP) := prep - - end-$(CONFIG_SANDPOINT) := sandpoint - cacheflag-$(CONFIG_SANDPOINT) := -include $(clear_L2_L3) - - zimage-$(CONFIG_SPRUCE) := zImage-TREE -zimageinitrd-$(CONFIG_SPRUCE) := zImage.initrd-TREE - end-$(CONFIG_SPRUCE) := spruce - entrypoint-$(CONFIG_SPRUCE) := 0x00800000 - misc-$(CONFIG_SPRUCE) += misc-spruce.o - - zimage-$(CONFIG_LITE5200) := zImage-STRIPELF -zimageinitrd-$(CONFIG_LITE5200) := zImage.initrd-STRIPELF - end-$(CONFIG_LITE5200) := lite5200 - cacheflag-$(CONFIG_LITE5200) := -include $(clear_L2_L3) - - -# SMP images should have a '.smp' suffix. - end-$(CONFIG_SMP) := $(end-y).smp - -# This is a treeboot that needs init functions until the -# boot rom is sorted out (i.e. this is short lived) -EXTRA_AFLAGS := $(extra-aflags-y) -# head.o needs to get the cacheflags defined. -AFLAGS_head.o += $(cacheflag-y) - -# Linker args. This specifies where the image will be run at. -LD_ARGS := -T $(srctree)/$(boot)/ld.script \ - -Ttext $(CONFIG_BOOT_LOAD) -Bstatic -OBJCOPY_ARGS := -O elf32-powerpc - -# head.o and relocate.o must be at the start. -boot-y := head.o relocate.o $(extra.o-y) $(misc-y) -boot-$(CONFIG_REDWOOD_5) += embed_config.o -boot-$(CONFIG_REDWOOD_6) += embed_config.o -boot-$(CONFIG_8xx) += embed_config.o -boot-$(CONFIG_8260) += embed_config.o -boot-$(CONFIG_EP405) += embed_config.o -boot-$(CONFIG_XILINX_ML300) += embed_config.o -boot-$(CONFIG_XILINX_ML403) += embed_config.o -boot-$(CONFIG_BSEIP) += iic.o -boot-$(CONFIG_MBX) += iic.o pci.o qspan_pci.o -boot-$(CONFIG_MV64X60) += misc-mv64x60.o -boot-$(CONFIG_RPXCLASSIC) += iic.o pci.o qspan_pci.o -boot-$(CONFIG_RPXLITE) += iic.o -# Different boards need different serial implementations. -ifeq ($(CONFIG_SERIAL_CPM_CONSOLE),y) -boot-$(CONFIG_8xx) += m8xx_tty.o -boot-$(CONFIG_8260) += m8260_tty.o -endif -boot-$(CONFIG_SERIAL_MPC52xx_CONSOLE) += mpc52xx_tty.o -boot-$(CONFIG_SERIAL_MPSC_CONSOLE) += mv64x60_tty.o -boot-$(CONFIG_SERIAL_UARTLITE_CONSOLE) += uartlite_tty.o - -LIBS := $(common)/lib.a $(bootlib)/lib.a -ifeq ($(CONFIG_PPC_PREP),y) -LIBS += $(of1275)/lib.a -endif - -OBJS := $(addprefix $(obj)/,$(boot-y)) - -# Tools -MKBUGBOOT := $(utils)/mkbugboot -MKPREP := $(utils)/mkprep -MKTREE := $(utils)/mktree - -targets := dummy.o - -$(obj)/zvmlinux: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \ - $(images)/vmlinux.gz $(obj)/dummy.o - $(OBJCOPY) $(OBJCOPY_ARGS) \ - --add-section=.image=$(images)/vmlinux.gz \ - --set-section-flags=.image=contents,alloc,load,readonly,data \ - $(obj)/dummy.o $(obj)/image.o - $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS) - $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \ - -R .stabstr -R .ramdisk - -$(obj)/zvmlinux.initrd: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \ - $(images)/vmlinux.gz $(obj)/dummy.o - $(OBJCOPY) $(OBJCOPY_ARGS) \ - --add-section=.ramdisk=$(images)/ramdisk.image.gz \ - --set-section-flags=.ramdisk=contents,alloc,load,readonly,data \ - --add-section=.image=$(images)/vmlinux.gz \ - --set-section-flags=.image=contents,alloc,load,readonly,data \ - $(obj)/dummy.o $(obj)/image.o - $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS) - $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \ - -R .stabstr - -# Sort-of dummy rules, that let us format the image we want. -zImage: $(images)/$(zimage-y) $(obj)/zvmlinux - cp -f $(obj)/zvmlinux $(images)/zImage.elf - rm -f $(obj)/zvmlinux - -zImage.initrd: $(images)/$(zimageinitrd-y) $(obj)/zvmlinux.initrd - cp -f $(obj)/zvmlinux.initrd $(images)/zImage.initrd.elf - rm -f $(obj)/zvmlinux.initrd - -znetboot: zImage - cp $(images)/zImage.$(end-y) $(tftpboot)/zImage.$(end-y) - -znetboot.initrd: zImage.initrd - cp $(images)/zImage.initrd.$(end-y) $(tftpboot)/zImage.initrd.$(end-y) - -$(images)/zImage-STRIPELF: $(obj)/zvmlinux - dd if=$(obj)/zvmlinux of=$(images)/zImage.$(end-y) skip=64 bs=1k - -$(images)/zImage.initrd-STRIPELF: $(obj)/zvmlinux.initrd - dd if=$(obj)/zvmlinux.initrd of=$(images)/zImage.initrd.$(end-y) \ - skip=64 bs=1k - -$(images)/zImage-TREE: $(obj)/zvmlinux $(MKTREE) - $(MKTREE) $(obj)/zvmlinux $(images)/zImage.$(end-y) $(entrypoint-y) - -$(images)/zImage.initrd-TREE: $(obj)/zvmlinux.initrd $(MKTREE) - $(MKTREE) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y) \ - $(entrypoint-y) - -$(images)/zImage-PPLUS: $(obj)/zvmlinux $(MKPREP) $(MKBUGBOOT) - $(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.$(end-y) - $(MKBUGBOOT) $(obj)/zvmlinux $(images)/zImage.bugboot - -$(images)/zImage.initrd-PPLUS: $(obj)/zvmlinux.initrd $(MKPREP) $(MKBUGBOOT) - $(MKPREP) -pbp $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y) - $(MKBUGBOOT) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.bugboot diff --git a/arch/ppc/boot/simple/chrpmap.c b/arch/ppc/boot/simple/chrpmap.c deleted file mode 100644 index 14d9e05d98bbb760db4cd59457c6873bb72b6d5a..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/chrpmap.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * 2004 (C) IBM. This file is licensed under the terms of the GNU General - * Public License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - -void board_isa_init(void) -{ - ISA_init(0xFE000000); -} diff --git a/arch/ppc/boot/simple/clear.S b/arch/ppc/boot/simple/clear.S deleted file mode 100644 index 95c5647a0f51180db74b34eacf6580e5587c52eb..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/clear.S +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Code to call _setup_L2CR to flus, invalidate and disable the L2, - * and if present, do the same to the L3. - */ - -#define CLEAR_CACHES \ - bl _setup_L2CR; \ - \ - /* If 745x, turn off L3CR as well */ \ - mfspr r8,SPRN_PVR; \ - srwi r8,r8,16; \ - \ - cmpli cr0,r8,0x8000; /* 7450 */ \ - cmpli cr1,r8,0x8001; /* 7455 */ \ - cmpli cr2,r8,0x8002; /* 7457 */ \ - /* Now test if any are true. */ \ - cror 4*cr0+eq,4*cr0+eq,4*cr1+eq; \ - cror 4*cr0+eq,4*cr0+eq,4*cr2+eq; \ - beql _setup_L3CR diff --git a/arch/ppc/boot/simple/cpc700_memory.c b/arch/ppc/boot/simple/cpc700_memory.c deleted file mode 100644 index d75420a45a59b8355fb3ab5ebf43f4efd29cb5e9..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/cpc700_memory.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Find memory based upon settings in the CPC700 bridge - * - * Author: Dan Cox - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include "cpc700.h" - -unsigned long -cpc700_get_mem_size(void) -{ - int i; - unsigned long len, amt; - - /* Start at MB1EA, since MB0EA will most likely be the ending address - for ROM space. */ - for(len = 0, i = CPC700_MB1EA; i <= CPC700_MB4EA; i+=4) { - amt = cpc700_read_memreg(i); - if (amt == 0) - break; - len = amt; - } - - return len; -} - - diff --git a/arch/ppc/boot/simple/dummy.c b/arch/ppc/boot/simple/dummy.c deleted file mode 100644 index 31dbf45bf99c5996ca0ee62cba186d912b08e666..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/dummy.c +++ /dev/null @@ -1,4 +0,0 @@ -int main(void) -{ - return 0; -} diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c deleted file mode 100644 index 3b46792d7b8b45c66b6e302a8b4611e12b4ce23f..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/embed_config.c +++ /dev/null @@ -1,938 +0,0 @@ -/* Board specific functions for those embedded 8xx boards that do - * not have boot monitor support for board information. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#ifdef CONFIG_8xx -#include -#endif -#ifdef CONFIG_8260 -#include -#include -#endif -#ifdef CONFIG_40x -#include -#endif -#ifdef CONFIG_XILINX_VIRTEX -#include -#endif -extern unsigned long timebase_period_ns; - -/* For those boards that don't provide one. -*/ -#if !defined(CONFIG_MBX) -static bd_t bdinfo; -#endif - -/* IIC functions. - * These are just the basic master read/write operations so we can - * examine serial EEPROM. - */ -extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count); - -/* Supply a default Ethernet address for those eval boards that don't - * ship with one. This is an address from the MBX board I have, so - * it is unlikely you will find it on your network. - */ -static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 }; - -#if defined(CONFIG_MBX) - -/* The MBX hands us a pretty much ready to go board descriptor. This - * is where the idea started in the first place. - */ -void -embed_config(bd_t **bdp) -{ - u_char *mp; - u_char eebuf[128]; - int i = 8; - bd_t *bd; - - bd = *bdp; - - /* Read the first 128 bytes of the EEPROM. There is more, - * but this is all we need. - */ - iic_read(0xa4, eebuf, 0, 128); - - /* All we are looking for is the Ethernet MAC address. The - * first 8 bytes are 'MOTOROLA', so check for part of that. - * Next, the VPD describes a MAC 'packet' as being of type 08 - * and size 06. So we look for that and the MAC must follow. - * If there are more than one, we still only care about the first. - * If it's there, assume we have a valid MAC address. If not, - * grab our default one. - */ - if ((*(uint *)eebuf) == 0x4d4f544f) { - while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06)) - i += eebuf[i + 1] + 2; /* skip this packet */ - - if (i == 127) /* Couldn't find. */ - mp = (u_char *)def_enet_addr; - else - mp = &eebuf[i + 2]; - } - else - mp = (u_char *)def_enet_addr; - - for (i=0; i<6; i++) - bd->bi_enetaddr[i] = *mp++; - - /* The boot rom passes these to us in MHz. Linux now expects - * them to be in Hz. - */ - bd->bi_intfreq *= 1000000; - bd->bi_busfreq *= 1000000; - - /* Stuff a baud rate here as well. - */ - bd->bi_baudrate = 9600; -} -#endif /* CONFIG_MBX */ - -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \ - defined(CONFIG_RPX8260) || defined(CONFIG_EP405) -/* Helper functions for Embedded Planet boards. -*/ -/* Because I didn't find anything that would do this....... -*/ -u_char -aschex_to_byte(u_char *cp) -{ - u_char byte, c; - - c = *cp++; - - if ((c >= 'A') && (c <= 'F')) { - c -= 'A'; - c += 10; - } else if ((c >= 'a') && (c <= 'f')) { - c -= 'a'; - c += 10; - } else - c -= '0'; - - byte = c * 16; - - c = *cp; - - if ((c >= 'A') && (c <= 'F')) { - c -= 'A'; - c += 10; - } else if ((c >= 'a') && (c <= 'f')) { - c -= 'a'; - c += 10; - } else - c -= '0'; - - byte += c; - - return(byte); -} - -static void -rpx_eth(bd_t *bd, u_char *cp) -{ - int i; - - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = aschex_to_byte(cp); - cp += 2; - } -} - -#ifdef CONFIG_RPX8260 -static uint -rpx_baseten(u_char *cp) -{ - uint retval; - - retval = 0; - - while (*cp != '\n') { - retval *= 10; - retval += (*cp) - '0'; - cp++; - } - return(retval); -} -#endif - -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) -static void -rpx_brate(bd_t *bd, u_char *cp) -{ - uint rate; - - rate = 0; - - while (*cp != '\n') { - rate *= 10; - rate += (*cp) - '0'; - cp++; - } - - bd->bi_baudrate = rate * 100; -} - -static void -rpx_cpuspeed(bd_t *bd, u_char *cp) -{ - uint num, den; - - num = den = 0; - - while (*cp != '\n') { - num *= 10; - num += (*cp) - '0'; - cp++; - if (*cp == '/') { - cp++; - den = (*cp) - '0'; - break; - } - } - - /* I don't know why the RPX just can't state the actual - * CPU speed..... - */ - if (den) { - num /= den; - num *= den; - } - bd->bi_intfreq = bd->bi_busfreq = num * 1000000; - - /* The 8xx can only run a maximum 50 MHz bus speed (until - * Motorola changes this :-). Greater than 50 MHz parts - * run internal/2 for bus speed. - */ - if (num > 50) - bd->bi_busfreq /= 2; -} -#endif - -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405) -static void -rpx_memsize(bd_t *bd, u_char *cp) -{ - uint size; - - size = 0; - - while (*cp != '\n') { - size *= 10; - size += (*cp) - '0'; - cp++; - } - - bd->bi_memsize = size * 1024 * 1024; -} -#endif /* LITE || CLASSIC || EP405 */ -#if defined(CONFIG_EP405) -static void -rpx_nvramsize(bd_t *bd, u_char *cp) -{ - uint size; - - size = 0; - - while (*cp != '\n') { - size *= 10; - size += (*cp) - '0'; - cp++; - } - - bd->bi_nvramsize = size * 1024; -} -#endif /* CONFIG_EP405 */ - -#endif /* Embedded Planet boards */ - -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) - -/* Read the EEPROM on the RPX-Lite board. -*/ -void -embed_config(bd_t **bdp) -{ - u_char eebuf[256], *cp; - bd_t *bd; - - /* Read the first 256 bytes of the EEPROM. I think this - * is really all there is, and I hope if it gets bigger the - * info we want is still up front. - */ - bd = &bdinfo; - *bdp = bd; - -#if 1 - iic_read(0xa8, eebuf, 0, 128); - iic_read(0xa8, &eebuf[128], 128, 128); - - /* We look for two things, the Ethernet address and the - * serial baud rate. The records are separated by - * newlines. - */ - cp = eebuf; - for (;;) { - if (*cp == 'E') { - cp++; - if (*cp == 'A') { - cp += 2; - rpx_eth(bd, cp); - } - } - if (*cp == 'S') { - cp++; - if (*cp == 'B') { - cp += 2; - rpx_brate(bd, cp); - } - } - if (*cp == 'D') { - cp++; - if (*cp == '1') { - cp += 2; - rpx_memsize(bd, cp); - } - } - if (*cp == 'H') { - cp++; - if (*cp == 'Z') { - cp += 2; - rpx_cpuspeed(bd, cp); - } - } - - /* Scan to the end of the record. - */ - while ((*cp != '\n') && (*cp != 0xff)) - cp++; - - /* If the next character is a 0 or ff, we are done. - */ - cp++; - if ((*cp == 0) || (*cp == 0xff)) - break; - } - bd->bi_memstart = 0; -#else - /* For boards without initialized EEPROM. - */ - bd->bi_memstart = 0; - bd->bi_memsize = (8 * 1024 * 1024); - bd->bi_intfreq = 48000000; - bd->bi_busfreq = 48000000; - bd->bi_baudrate = 9600; -#endif -} -#endif /* RPXLITE || RPXCLASSIC */ - -#ifdef CONFIG_BSEIP -/* Build a board information structure for the BSE ip-Engine. - * There is more to come since we will add some environment - * variables and a function to read them. - */ -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - bd = &bdinfo; - *bdp = bd; - - /* Baud rate and processor speed will eventually come - * from the environment variables. - */ - bd->bi_baudrate = 9600; - - /* Get the Ethernet station address from the Flash ROM. - */ - cp = (u_char *)0xfe003ffa; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } - - /* The rest of this should come from the environment as well. - */ - bd->bi_memstart = 0; - bd->bi_memsize = (16 * 1024 * 1024); - bd->bi_intfreq = 48000000; - bd->bi_busfreq = 48000000; -} -#endif /* BSEIP */ - -#ifdef CONFIG_FADS -/* Build a board information structure for the FADS. - */ -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - bd = &bdinfo; - *bdp = bd; - - /* Just fill in some known values. - */ - bd->bi_baudrate = 9600; - - /* Use default enet. - */ - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } - - bd->bi_memstart = 0; - bd->bi_memsize = (8 * 1024 * 1024); - bd->bi_intfreq = 40000000; - bd->bi_busfreq = 40000000; -} -#endif /* FADS */ - -#ifdef CONFIG_8260 -/* Compute 8260 clock values if the rom doesn't provide them. - */ -static unsigned char bus2core_8260[] = { -/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ - 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2, - 6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2, -}; - -static void -clk_8260(bd_t *bd) -{ - uint scmr, vco_out, clkin; - uint plldf, pllmf, corecnf; - volatile cpm2_map_t *ip; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; - scmr = ip->im_clkrst.car_scmr; - - /* The clkin is always bus frequency. - */ - clkin = bd->bi_busfreq; - - /* Collect the bits from the scmr. - */ - plldf = (scmr >> 12) & 1; - pllmf = scmr & 0xfff; - corecnf = (scmr >> 24) &0x1f; - - /* This is arithmetic from the 8260 manual. - */ - vco_out = clkin / (plldf + 1); - vco_out *= 2 * (pllmf + 1); - bd->bi_vco = vco_out; /* Save for later */ - - bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */ - bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2; - - /* Set Baud rate divisor. The power up default is divide by 16, - * but we set it again here in case it was changed. - */ - ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */ - bd->bi_brgfreq = vco_out / 16; -} - -static unsigned char bus2core_8280[] = { -/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ - 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2, - 6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2, -}; - -static void -clk_8280(bd_t *bd) -{ - uint scmr, main_clk, clkin; - uint pllmf, corecnf; - volatile cpm2_map_t *ip; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; - scmr = ip->im_clkrst.car_scmr; - - /* The clkin is always bus frequency. - */ - clkin = bd->bi_busfreq; - - /* Collect the bits from the scmr. - */ - pllmf = scmr & 0xf; - corecnf = (scmr >> 24) & 0x1f; - - /* This is arithmetic from the 8280 manual. - */ - main_clk = clkin * (pllmf + 1); - - bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */ - bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2; - - /* Set Baud rate divisor. The power up default is divide by 16, - * but we set it again here in case it was changed. - */ - ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1; - bd->bi_brgfreq = main_clk / 16; -} -#endif - -#ifdef CONFIG_SBC82xx -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - unsigned long pvr; - - bd = *bdp; - - bd = &bdinfo; - *bdp = bd; - bd->bi_baudrate = 9600; - bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */ - - cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1; - memcpy(bd->bi_enetaddr, cp, 6); - - /* can busfreq be calculated? */ - pvr = mfspr(SPRN_PVR); - if ((pvr & 0xffff0000) == 0x80820000) { - bd->bi_busfreq = 100000000; - clk_8280(bd); - } else { - bd->bi_busfreq = 66000000; - clk_8260(bd); - } - -} -#endif /* SBC82xx */ - -#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260) -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - bd = *bdp; -#if 0 - /* This is actually provided by my boot rom. I have it - * here for those people that may load the kernel with - * a JTAG/COP tool and not the rom monitor. - */ - bd->bi_baudrate = 115200; - bd->bi_intfreq = 200000000; - bd->bi_busfreq = 66666666; - bd->bi_cpmfreq = 66666666; - bd->bi_brgfreq = 33333333; - bd->bi_memsize = 16 * 1024 * 1024; -#else - /* The boot rom passes these to us in MHz. Linux now expects - * them to be in Hz. - */ - bd->bi_intfreq *= 1000000; - bd->bi_busfreq *= 1000000; - bd->bi_cpmfreq *= 1000000; - bd->bi_brgfreq *= 1000000; -#endif - - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } -} -#endif /* EST8260 */ - -#ifdef CONFIG_SBS8260 -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - /* This should provided by the boot rom. - */ - bd = &bdinfo; - *bdp = bd; - bd->bi_baudrate = 9600; - bd->bi_memsize = 64 * 1024 * 1024; - - /* Set all of the clocks. We have to know the speed of the - * external clock. The development board had 66 MHz. - */ - bd->bi_busfreq = 66666666; - clk_8260(bd); - - /* I don't know how to compute this yet. - */ - bd->bi_intfreq = 133000000; - - - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } -} -#endif /* SBS8260 */ - -#ifdef CONFIG_RPX8260 -void -embed_config(bd_t **bdp) -{ - u_char *cp, *keyvals; - int i; - bd_t *bd; - - keyvals = (u_char *)*bdp; - - bd = &bdinfo; - *bdp = bd; - - /* This is almost identical to the RPX-Lite/Classic functions - * on the 8xx boards. It would be nice to have a key lookup - * function in a string, but the format of all of the fields - * is slightly different. - */ - cp = keyvals; - for (;;) { - if (*cp == 'E') { - cp++; - if (*cp == 'A') { - cp += 2; - rpx_eth(bd, cp); - } - } - if (*cp == 'S') { - cp++; - if (*cp == 'B') { - cp += 2; - bd->bi_baudrate = rpx_baseten(cp); - } - } - if (*cp == 'D') { - cp++; - if (*cp == '1') { - cp += 2; - bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024; - } - } - if (*cp == 'X') { - cp++; - if (*cp == 'T') { - cp += 2; - bd->bi_busfreq = rpx_baseten(cp); - } - } - if (*cp == 'N') { - cp++; - if (*cp == 'V') { - cp += 2; - bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024; - } - } - - /* Scan to the end of the record. - */ - while ((*cp != '\n') && (*cp != 0xff)) - cp++; - - /* If the next character is a 0 or ff, we are done. - */ - cp++; - if ((*cp == 0) || (*cp == 0xff)) - break; - } - bd->bi_memstart = 0; - - /* The memory size includes both the 60x and local bus DRAM. - * I don't want to use the local bus DRAM for real memory, - * so subtract it out. It would be nice if they were separate - * keys. - */ - bd->bi_memsize -= 32 * 1024 * 1024; - - /* Set all of the clocks. We have to know the speed of the - * external clock. - */ - clk_8260(bd); - - /* I don't know how to compute this yet. - */ - bd->bi_intfreq = 200000000; -} -#endif /* RPX6 for testing */ - -#ifdef CONFIG_ADS8260 -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - /* This should provided by the boot rom. - */ - bd = &bdinfo; - *bdp = bd; - bd->bi_baudrate = 9600; - bd->bi_memsize = 16 * 1024 * 1024; - - /* Set all of the clocks. We have to know the speed of the - * external clock. The development board had 66 MHz. - */ - bd->bi_busfreq = 66666666; - clk_8260(bd); - - /* I don't know how to compute this yet. - */ - bd->bi_intfreq = 200000000; - - - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } -} -#endif /* ADS8260 */ - -#ifdef CONFIG_WILLOW -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd; - - /* Willow has Open Firmware....I should learn how to get this - * information from it. - */ - bd = &bdinfo; - *bdp = bd; - bd->bi_baudrate = 9600; - bd->bi_memsize = 32 * 1024 * 1024; - - /* Set all of the clocks. We have to know the speed of the - * external clock. The development board had 66 MHz. - */ - bd->bi_busfreq = 66666666; - clk_8260(bd); - - /* I don't know how to compute this yet. - */ - bd->bi_intfreq = 200000000; - - - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - bd->bi_enetaddr[i] = *cp++; - } -} -#endif /* WILLOW */ - -#if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403) -void -embed_config(bd_t ** bdp) -{ - static const unsigned long line_size = 32; - static const unsigned long congruence_classes = 256; - unsigned long addr; - unsigned long dccr; - uint8_t* cp; - bd_t *bd; - int i; - - /* - * Invalidate the data cache if the data cache is turned off. - * - The 405 core does not invalidate the data cache on power-up - * or reset but does turn off the data cache. We cannot assume - * that the cache contents are valid. - * - If the data cache is turned on this must have been done by - * a bootloader and we assume that the cache contents are - * valid. - */ - __asm__("mfdccr %0": "=r" (dccr)); - if (dccr == 0) { - for (addr = 0; - addr < (congruence_classes * line_size); - addr += line_size) { - __asm__("dccci 0,%0": :"b"(addr)); - } - } - - bd = &bdinfo; - *bdp = bd; - bd->bi_memsize = XPAR_DDR_0_SIZE; - bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ; - bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ; - bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ; - - /* Copy the default ethernet address */ - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) - bd->bi_enetaddr[i] = *cp++; - - timebase_period_ns = 1000000000 / bd->bi_tbfreq; - /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */ -} -#endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */ - -#ifdef CONFIG_IBM_OPENBIOS -/* This could possibly work for all treeboot roms. -*/ -#if defined(CONFIG_BUBINGA) -#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */ -#else -#define BOARD_INFO_VECTOR 0xFFFE0B50 -#endif - -void -embed_config(bd_t **bdp) -{ - u_char *cp; - int i; - bd_t *bd, *treeboot_bd; - bd_t *(*get_board_info)(void) = - (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR); -#if !defined(CONFIG_STB03xxx) - - /* shut down the Ethernet controller that the boot rom - * sometimes leaves running. - */ - mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */ - while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */ - out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */ -#endif - - bd = &bdinfo; - *bdp = bd; - if ((treeboot_bd = get_board_info()) != NULL) { - memcpy(bd, treeboot_bd, sizeof(bd_t)); - } - else { - /* Hmmm...better try to stuff some defaults. - */ - bd->bi_memsize = 16 * 1024 * 1024; - cp = (u_char *)def_enet_addr; - for (i=0; i<6; i++) { - /* I should probably put different ones here, - * hopefully only one is used. - */ - bd->BD_EMAC_ADDR(0,i) = *cp; - -#ifdef CONFIG_PCI - bd->bi_pci_enetaddr[i] = *cp++; -#endif - } - bd->bi_tbfreq = 200 * 1000 * 1000; - bd->bi_intfreq = 200000000; - bd->bi_busfreq = 100000000; -#ifdef CONFIG_PCI - bd->bi_pci_busfreq = 66666666; -#endif - } - /* Yeah, this look weird, but on Redwood 4 they are - * different object in the structure. Sincr Redwwood 5 - * and Redwood 6 use OpenBIOS, it requires a special value. - */ -#if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6) - bd->bi_tbfreq = 27 * 1000 * 1000; -#endif - timebase_period_ns = 1000000000 / bd->bi_tbfreq; -} -#endif /* CONFIG_IBM_OPENBIOS */ - -#ifdef CONFIG_EP405 -#include - -void -embed_config(bd_t **bdp) -{ - u32 chcr0; - u_char *cp; - bd_t *bd; - - /* Different versions of the PlanetCore firmware vary in how - they set up the serial port - in particular whether they - use the internal or external serial clock for UART0. Make - sure the UART is in a known state. */ - /* FIXME: We should use the board's 11.0592MHz external serial - clock - it will be more accurate for serial rates. For - now, however the baud rates in ep405.h are for the internal - clock. */ - chcr0 = mfdcr(DCRN_CHCR0); - if ( (chcr0 & 0x1fff) != 0x103e ) { - mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e); - /* The following tricks serial_init() into resetting the baud rate */ - writeb(0, UART0_IO_BASE + UART_LCR); - } - - /* We haven't seen actual problems with the EP405 leaving the - * EMAC running (as we have on Walnut). But the registers - * suggest it may not be left completely quiescent. Reset it - * just to be sure. */ - mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */ - while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */ - out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */ - - bd = &bdinfo; - *bdp = bd; -#if 1 - cp = (u_char *)0xF0000EE0; - for (;;) { - if (*cp == 'E') { - cp++; - if (*cp == 'A') { - cp += 2; - rpx_eth(bd, cp); - } - } - - if (*cp == 'D') { - cp++; - if (*cp == '1') { - cp += 2; - rpx_memsize(bd, cp); - } - } - - if (*cp == 'N') { - cp++; - if (*cp == 'V') { - cp += 2; - rpx_nvramsize(bd, cp); - } - } - while ((*cp != '\n') && (*cp != 0xff)) - cp++; - - cp++; - if ((*cp == 0) || (*cp == 0xff)) - break; - } - bd->bi_intfreq = 200000000; - bd->bi_busfreq = 100000000; - bd->bi_pci_busfreq= 33000000 ; -#else - - bd->bi_memsize = 64000000; - bd->bi_intfreq = 200000000; - bd->bi_busfreq = 100000000; - bd->bi_pci_busfreq= 33000000 ; -#endif -} -#endif diff --git a/arch/ppc/boot/simple/head.S b/arch/ppc/boot/simple/head.S deleted file mode 100644 index 1b4d7b1d4ec173740cdc275cd6702853df064240..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/head.S +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Initial board bringup code for many different boards. - * - * Author: Tom Rini - * trini@mvista.com - * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others). - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - - .text - -/* - * Begin at some arbitrary location in RAM or Flash - * Initialize core registers - * Configure memory controller (Not executing from RAM) - * Move the boot code to the link address (8M) - * Setup C stack - * Initialize UART - * Decompress the kernel to 0x0 - * Jump to the kernel entry - * - */ - - .globl start -start: - bl start_ -#ifdef CONFIG_IBM_OPENBIOS - /* The IBM "Tree" bootrom knows that the address of the bootrom - * read only structure is 4 bytes after _start. - */ - .long 0x62726f6d # structure ID - "brom" - .long 0x5f726f00 # - "_ro\0" - .long 1 # structure version - .long bootrom_cmdline # address of *bootrom_cmdline -#endif - -start_: -#ifdef CONFIG_FORCE - /* We have some really bad firmware. We must disable the L1 - * icache/dcache now or the board won't boot. - */ - li r4,0x0000 - isync - mtspr SPRN_HID0,r4 - sync - isync -#endif - -#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP) - mr r29,r3 /* On the MBX860, r3 is the board info pointer. - * On the RPXSUPER, r3 points to the NVRAM - * configuration keys. - * On PReP, r3 is the pointer to the residual data. - */ -#endif - -#if defined(CONFIG_XILINX_VIRTEX_4_FX) - /* PPC errata 213: only for Virtex-4 FX */ - mfccr0 0 - oris 0,0,0x50000000@h - mtccr0 0 -#endif - - mflr r3 /* Save our actual starting address. */ - - /* The following functions we call must not modify r3 or r4..... - */ -#ifdef CONFIG_6xx - /* On PReP we must look at the OpenFirmware pointer and sanity - * test it. On other platforms, we disable the MMU right now - * and other bits. - */ -#ifdef CONFIG_PPC_PREP -/* - * Save the OF pointer to r25, but only if the entry point is in a sane - * location; if not we store 0. If there is no entry point, or it is - * invalid, we establish the default MSR value immediately. Otherwise, - * we defer doing that, to allow OF functions to be called, until we - * begin uncompressing the kernel. - */ - lis r8,0x0fff /* r8 = 0x0fffffff */ - ori r8,r8,0xffff - - subc r8,r8,r5 /* r8 = (r5 <= r8) ? ~0 : 0 */ - subfe r8,r8,r8 - nand r8,r8,r8 - - and. r5,r5,r8 /* r5 will be cleared if (r5 > r8) */ - bne+ haveOF - - li r8,MSR_IP|MSR_FP /* Not OF: set MSR immediately */ - mtmsr r8 - isync -haveOF: - mr r25,r5 -#else - bl disable_6xx_mmu -#endif - bl disable_6xx_l1cache - - CLEAR_CACHES -#endif - -#ifdef CONFIG_8xx - mfmsr r8 /* Turn off interrupts */ - li r9,0 - ori r9,r9,MSR_EE - andc r8,r8,r9 - mtmsr r8 - - /* We do this because some boot roms don't initialize the - * processor correctly. Don't do this if you want to debug - * using a BDM device. - */ - li r4,0 /* Zero DER to prevent FRZ */ - mtspr SPRN_DER,r4 -#endif - -#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP) - mr r4,r29 /* put the board info pointer where the relocate - * routine will find it - */ -#endif - - /* Get the load address. - */ - subi r3, r3, 4 /* Get the actual IP, not NIP */ - b relocate - diff --git a/arch/ppc/boot/simple/iic.c b/arch/ppc/boot/simple/iic.c deleted file mode 100644 index 5e91489426b46485a787a51520f7b207e6aaa3d5..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/iic.c +++ /dev/null @@ -1,214 +0,0 @@ -/* Minimal support functions to read configuration from IIC EEPROMS - * on MPC8xx boards. Originally written for RPGC RPX-Lite. - * Dan Malek (dmalek@jlc.net). - */ -#include -#include -#include -#include - - -/* IIC functions. - * These are just the basic master read/write operations so we can - * examine serial EEPROM. - */ -void iic_read(uint devaddr, u_char *buf, uint offset, uint count); - -static int iic_init_done; - -static void -iic_init(void) -{ - volatile iic_t *iip; - volatile i2c8xx_t *i2c; - volatile cpm8xx_t *cp; - volatile immap_t *immap; - uint dpaddr; - - immap = (immap_t *)IMAP_ADDR; - cp = (cpm8xx_t *)&(immap->im_cpm); - - /* Reset the CPM. This is necessary on the 860 processors - * that may have started the SCC1 ethernet without relocating - * the IIC. - * This also stops the Ethernet in case we were loaded by a - * BOOTP rom monitor. - */ - cp->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG); - - /* Wait for it. - */ - while (cp->cp_cpcr & (CPM_CR_RST | CPM_CR_FLG)); - - /* Remove any microcode patches. We will install our own - * later. - */ - cp->cp_cpmcr1 = 0; - cp->cp_cpmcr2 = 0; - cp->cp_cpmcr3 = 0; - cp->cp_cpmcr4 = 0; - cp->cp_rccr = 0; - - iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; - i2c = (i2c8xx_t *)&(immap->im_i2c); - - /* Initialize Port B IIC pins. - */ - cp->cp_pbpar |= 0x00000030; - cp->cp_pbdir |= 0x00000030; - cp->cp_pbodr |= 0x00000030; - - /* Initialize the parameter ram. - */ - - /* Allocate space for a two transmit and one receive buffer - * descriptor in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. - */ - dpaddr = 0x0840; - - /* Set up the IIC parameters in the parameter ram. - */ - iip->iic_tbase = dpaddr; - iip->iic_rbase = dpaddr + (2 * sizeof(cbd_t)); - - iip->iic_tfcr = SMC_EB; - iip->iic_rfcr = SMC_EB; - - /* This should really be done by the reader/writer. - */ - iip->iic_mrblr = 128; - - /* Initialize Tx/Rx parameters. - */ - cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* Select an arbitrary address. Just make sure it is unique. - */ - i2c->i2c_i2add = 0x34; - - /* Make clock run maximum slow. - */ - i2c->i2c_i2brg = 7; - - /* Disable interrupts. - */ - i2c->i2c_i2cmr = 0; - i2c->i2c_i2cer = 0xff; - - /* Enable SDMA. - */ - immap->im_siu_conf.sc_sdcr = 1; - - iic_init_done = 1; -} - -/* Read from IIC. - * Caller provides device address, memory buffer, and byte count. - */ -static u_char iitemp[32]; - -void -iic_read(uint devaddr, u_char *buf, uint offset, uint count) -{ - volatile iic_t *iip; - volatile i2c8xx_t *i2c; - volatile cbd_t *tbdf, *rbdf; - volatile cpm8xx_t *cp; - volatile immap_t *immap; - u_char *tb; - uint temp; - - /* If the interface has not been initialized, do that now. - */ - if (!iic_init_done) - iic_init(); - - immap = (immap_t *)IMAP_ADDR; - cp = (cpm8xx_t *)&(immap->im_cpm); - - iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; - i2c = (i2c8xx_t *)&(immap->im_i2c); - - tbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_tbase]; - rbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_rbase]; - - /* Send a "dummy write" operation. This is a write request with - * only the offset sent, followed by another start condition. - * This will ensure we start reading from the first location - * of the EEPROM. - */ - tb = iitemp; - tb = (u_char *)(((uint)tb + 15) & ~15); - tbdf->cbd_bufaddr = (int)tb; - *tb = devaddr & 0xfe; /* Device address */ - *(tb+1) = offset; /* Offset */ - tbdf->cbd_datlen = 2; /* Length */ - tbdf->cbd_sc = - BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START; - - i2c->i2c_i2mod = 1; /* Enable */ - i2c->i2c_i2cer = 0xff; - i2c->i2c_i2com = 0x81; /* Start master */ - - /* Wait for IIC transfer. - */ -#if 0 - while ((i2c->i2c_i2cer & 3) == 0); - - if (tbdf->cbd_sc & BD_SC_READY) - printf("IIC ra complete but tbuf ready\n"); -#else - temp = 10000000; - while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0)) - temp--; -#if 0 - /* We can't do this...there is no serial port yet! - */ - if (temp == 0) { - printf("Timeout reading EEPROM\n"); - return; - } -#endif -#endif - - /* Chip errata, clear enable. - */ - i2c->i2c_i2mod = 0; - - /* To read, we need an empty buffer of the proper length. - * All that is used is the first byte for address, the remainder - * is just used for timing (and doesn't really have to exist). - */ - tbdf->cbd_bufaddr = (int)tb; - *tb = devaddr | 1; /* Device address */ - rbdf->cbd_bufaddr = (uint)buf; /* Desination buffer */ - tbdf->cbd_datlen = rbdf->cbd_datlen = count + 1; /* Length */ - tbdf->cbd_sc = BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START; - rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP; - - /* Chip bug, set enable here. - */ - i2c->i2c_i2mod = 1; /* Enable */ - i2c->i2c_i2cer = 0xff; - i2c->i2c_i2com = 0x81; /* Start master */ - - /* Wait for IIC transfer. - */ -#if 0 - while ((i2c->i2c_i2cer & 1) == 0); - - if (rbdf->cbd_sc & BD_SC_EMPTY) - printf("IIC read complete but rbuf empty\n"); -#else - temp = 10000000; - while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0)) - temp--; -#endif - - /* Chip errata, clear enable. - */ - i2c->i2c_i2mod = 0; -} diff --git a/arch/ppc/boot/simple/m8260_tty.c b/arch/ppc/boot/simple/m8260_tty.c deleted file mode 100644 index d770947e9b8fe186ab4fbea0c94426feb601772c..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/m8260_tty.c +++ /dev/null @@ -1,325 +0,0 @@ -/* Minimal serial functions needed to send messages out the serial - * port on SMC1. - */ -#include -#include -#include -#include - -uint no_print; -extern char *params[]; -extern int nparams; -static u_char cons_hold[128], *sgptr; -static int cons_hold_cnt; - -/* If defined, enables serial console. The value (1 through 4) - * should designate which SCC is used, but this isn't complete. Only - * SCC1 is known to work at this time. - * We're only linked if SERIAL_CPM_CONSOLE=y, so we only need to test - * SERIAL_CPM_SCC1. - */ -#ifdef CONFIG_SERIAL_CPM_SCC1 -#define SCC_CONSOLE 1 -#endif - -unsigned long -serial_init(int ignored, bd_t *bd) -{ -#ifdef SCC_CONSOLE - volatile scc_t *sccp; - volatile scc_uart_t *sup; -#else - volatile smc_t *sp; - volatile smc_uart_t *up; -#endif - volatile cbd_t *tbdf, *rbdf; - volatile cpm2_map_t *ip; - volatile iop_cpm2_t *io; - volatile cpm_cpm2_t *cp; - uint dpaddr, memaddr; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; - cp = &ip->im_cpm; - io = &ip->im_ioport; - - /* Perform a reset. - */ - cp->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG); - - /* Wait for it. - */ - while (cp->cp_cpcr & CPM_CR_FLG); - -#ifdef CONFIG_ADS8260 - /* Enable the RS-232 transceivers. - */ - *(volatile uint *)(BCSR_ADDR + 4) &= - ~(BCSR1_RS232_EN1 | BCSR1_RS232_EN2); -#endif - -#ifdef SCC_CONSOLE - sccp = (scc_t *)&(ip->im_scc[SCC_CONSOLE-1]); - sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)]; - sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX); - sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - /* Use Port D for SCC1 instead of other functions. - */ - io->iop_ppard |= 0x00000003; - io->iop_psord &= ~0x00000001; /* Rx */ - io->iop_psord |= 0x00000002; /* Tx */ - io->iop_pdird &= ~0x00000001; /* Rx */ - io->iop_pdird |= 0x00000002; /* Tx */ - -#else - sp = (smc_t*)&(ip->im_smc[0]); - *(ushort *)(&ip->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1; - up = (smc_uart_t *)&ip->im_dprambase[PROFF_SMC1]; - - /* Disable transmitter/receiver. - */ - sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); - - /* Use Port D for SMC1 instead of other functions. - */ - io->iop_ppard |= 0x00c00000; - io->iop_pdird |= 0x00400000; - io->iop_pdird &= ~0x00800000; - io->iop_psord &= ~0x00c00000; -#endif - - /* Allocate space for two buffer descriptors in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. - */ - dpaddr = 0x0800; - - /* Grab a few bytes from the top of memory. - */ - memaddr = (bd->bi_memsize - 256) & ~15; - - /* Set the physical address of the host memory buffers in - * the buffer descriptors. - */ - rbdf = (cbd_t *)&ip->im_dprambase[dpaddr]; - rbdf->cbd_bufaddr = memaddr; - rbdf->cbd_sc = 0; - tbdf = rbdf + 1; - tbdf->cbd_bufaddr = memaddr+128; - tbdf->cbd_sc = 0; - - /* Set up the uart parameters in the parameter ram. - */ -#ifdef SCC_CONSOLE - sup->scc_genscc.scc_rbase = dpaddr; - sup->scc_genscc.scc_tbase = dpaddr + sizeof(cbd_t); - - /* Set up the uart parameters in the - * parameter ram. - */ - sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB; - sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB; - - sup->scc_genscc.scc_mrblr = 128; - sup->scc_maxidl = 8; - sup->scc_brkcr = 1; - sup->scc_parec = 0; - sup->scc_frmec = 0; - sup->scc_nosec = 0; - sup->scc_brkec = 0; - sup->scc_uaddr1 = 0; - sup->scc_uaddr2 = 0; - sup->scc_toseq = 0; - sup->scc_char1 = 0x8000; - sup->scc_char2 = 0x8000; - sup->scc_char3 = 0x8000; - sup->scc_char4 = 0x8000; - sup->scc_char5 = 0x8000; - sup->scc_char6 = 0x8000; - sup->scc_char7 = 0x8000; - sup->scc_char8 = 0x8000; - sup->scc_rccm = 0xc0ff; - - /* Send the CPM an initialize command. - */ - cp->cp_cpcr = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0, - CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* Set UART mode, 8 bit, no parity, one stop. - * Enable receive and transmit. - */ - sccp->scc_gsmrh = 0; - sccp->scc_gsmrl = - (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); - - /* Disable all interrupts and clear all pending - * events. - */ - sccp->scc_sccm = 0; - sccp->scc_scce = 0xffff; - sccp->scc_dsr = 0x7e7e; - sccp->scc_psmr = 0x3000; - - /* Wire BRG1 to SCC1. The console driver will take care of - * others. - */ - ip->im_cpmux.cmx_scr = 0; -#else - up->smc_rbase = dpaddr; - up->smc_tbase = dpaddr+sizeof(cbd_t); - up->smc_rfcr = CPMFCR_EB; - up->smc_tfcr = CPMFCR_EB; - up->smc_brklen = 0; - up->smc_brkec = 0; - up->smc_brkcr = 0; - up->smc_mrblr = 128; - up->smc_maxidl = 8; - - /* Set UART mode, 8 bit, no parity, one stop. - * Enable receive and transmit. - */ - sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; - - /* Mask all interrupts and remove anything pending. - */ - sp->smc_smcm = 0; - sp->smc_smce = 0xff; - - /* Set up the baud rate generator. - */ - ip->im_cpmux.cmx_smr = 0; -#endif - - /* The baud rate divisor needs to be coordinated with clk_8260(). - */ - ip->im_brgc1 = - (((bd->bi_brgfreq/16) / bd->bi_baudrate) << 1) | - CPM_BRG_EN; - - /* Make the first buffer the only buffer. - */ - tbdf->cbd_sc |= BD_SC_WRAP; - rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP; - - /* Initialize Tx/Rx parameters. - */ -#ifdef SCC_CONSOLE - sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); -#else - cp->cp_cpcr = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0, CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* Enable transmitter/receiver. - */ - sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; -#endif - - /* This is ignored. - */ - return 0; -} - -int -serial_readbuf(u_char *cbuf) -{ - volatile cbd_t *rbdf; - volatile char *buf; -#ifdef SCC_CONSOLE - volatile scc_uart_t *sup; -#else - volatile smc_uart_t *up; -#endif - volatile cpm2_map_t *ip; - int i, nc; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; - -#ifdef SCC_CONSOLE - sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)]; - rbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_rbase]; -#else - up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]); - rbdf = (cbd_t *)&ip->im_dprambase[up->smc_rbase]; -#endif - - /* Wait for character to show up. - */ - buf = (char *)rbdf->cbd_bufaddr; - while (rbdf->cbd_sc & BD_SC_EMPTY); - nc = rbdf->cbd_datlen; - for (i=0; icbd_sc |= BD_SC_EMPTY; - - return(nc); -} - -void -serial_putc(void *ignored, const char c) -{ - volatile cbd_t *tbdf; - volatile char *buf; -#ifdef SCC_CONSOLE - volatile scc_uart_t *sup; -#else - volatile smc_uart_t *up; -#endif - volatile cpm2_map_t *ip; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; -#ifdef SCC_CONSOLE - sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)]; - tbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_tbase]; -#else - up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]); - tbdf = (cbd_t *)&ip->im_dprambase[up->smc_tbase]; -#endif - - /* Wait for last character to go. - */ - buf = (char *)tbdf->cbd_bufaddr; - while (tbdf->cbd_sc & BD_SC_READY); - - *buf = c; - tbdf->cbd_datlen = 1; - tbdf->cbd_sc |= BD_SC_READY; -} - -char -serial_getc(void *ignored) -{ - char c; - - if (cons_hold_cnt <= 0) { - cons_hold_cnt = serial_readbuf(cons_hold); - sgptr = cons_hold; - } - c = *sgptr++; - cons_hold_cnt--; - - return(c); -} - -int -serial_tstc(void *ignored) -{ - volatile cbd_t *rbdf; -#ifdef SCC_CONSOLE - volatile scc_uart_t *sup; -#else - volatile smc_uart_t *up; -#endif - volatile cpm2_map_t *ip; - - ip = (cpm2_map_t *)CPM_MAP_ADDR; -#ifdef SCC_CONSOLE - sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)]; - rbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_rbase]; -#else - up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]); - rbdf = (cbd_t *)&ip->im_dprambase[up->smc_rbase]; -#endif - - return(!(rbdf->cbd_sc & BD_SC_EMPTY)); -} diff --git a/arch/ppc/boot/simple/m8xx_tty.c b/arch/ppc/boot/simple/m8xx_tty.c deleted file mode 100644 index f28924e6aeb430803df7442e15b5c8d0842ba1df..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/m8xx_tty.c +++ /dev/null @@ -1,289 +0,0 @@ -/* Minimal serial functions needed to send messages out the serial - * port on the MBX console. - * - * The MBX uses SMC1 for the serial port. We reset the port and use - * only the first BD that EPPC-Bug set up as a character FIFO. - * - * Later versions (at least 1.4, maybe earlier) of the MBX EPPC-Bug - * use COM1 instead of SMC1 as the console port. This kinda sucks - * for the rest of the kernel, so here we force the use of SMC1 again. - */ -#include -#include -#include -#include - -#ifdef CONFIG_MBX -#define MBX_CSR1 ((volatile u_char *)0xfa100000) -#define CSR1_COMEN (u_char)0x02 -#endif - -#ifdef TQM_SMC2_CONSOLE -#define PROFF_CONS PROFF_SMC2 -#define CPM_CR_CH_CONS CPM_CR_CH_SMC2 -#define SMC_INDEX 1 -static volatile iop8xx_t *iopp = (iop8xx_t *)&(((immap_t *)IMAP_ADDR)->im_ioport); -#else -#define PROFF_CONS PROFF_SMC1 -#define CPM_CR_CH_CONS CPM_CR_CH_SMC1 -#define SMC_INDEX 0 -#endif - -static cpm8xx_t *cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm); - -unsigned long -serial_init(int ignored, bd_t *bd) -{ - volatile smc_t *sp; - volatile smc_uart_t *up; - volatile cbd_t *tbdf, *rbdf; - volatile cpm8xx_t *cp; - uint dpaddr, memaddr; -#ifndef CONFIG_MBX - uint ui; -#endif - - cp = cpmp; - sp = (smc_t*)&(cp->cp_smc[SMC_INDEX]); - up = (smc_uart_t *)&cp->cp_dparam[PROFF_CONS]; - - /* Disable transmitter/receiver. - */ - sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); - -#ifdef CONFIG_FADS - /* Enable SMC1/2 transceivers. - */ - *((volatile uint *)BCSR1) &= ~(BCSR1_RS232EN_1|BCSR1_RS232EN_2); -#endif - -#ifndef CONFIG_MBX - { - /* Initialize SMCx and use it for the console port. - */ - - /* Enable SDMA. - */ - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1; - -#ifdef TQM_SMC2_CONSOLE - /* Use Port A for SMC2 instead of other functions. - */ - iopp->iop_papar |= 0x00c0; - iopp->iop_padir &= ~0x00c0; - iopp->iop_paodr &= ~0x00c0; -#else - /* Use Port B for SMCs instead of other functions. - */ - cp->cp_pbpar |= 0x00000cc0; - cp->cp_pbdir &= ~0x00000cc0; - cp->cp_pbodr &= ~0x00000cc0; -#endif - - /* Allocate space for two buffer descriptors in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. - */ - dpaddr = 0x0800; - - /* Grab a few bytes from the top of memory for SMC FIFOs. - */ - memaddr = (bd->bi_memsize - 32) & ~15; - - /* Set the physical address of the host memory buffers in - * the buffer descriptors. - */ - rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr]; - rbdf->cbd_bufaddr = memaddr; - rbdf->cbd_sc = 0; - tbdf = rbdf + 1; - tbdf->cbd_bufaddr = memaddr+4; - tbdf->cbd_sc = 0; - - /* Set up the uart parameters in the parameter ram. - */ - up->smc_rbase = dpaddr; - up->smc_tbase = dpaddr+sizeof(cbd_t); - up->smc_rfcr = SMC_EB; - up->smc_tfcr = SMC_EB; - - /* Set UART mode, 8 bit, no parity, one stop. - * Enable receive and transmit. - */ - sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; - - /* Mask all interrupts and remove anything pending. - */ - sp->smc_smcm = 0; - sp->smc_smce = 0xff; - - /* Set up the baud rate generator. - * See 8xx_io/commproc.c for details. - * This wires BRG1 to SMC1 and BRG2 to SMC2; - */ - cp->cp_simode = 0x10000000; - ui = bd->bi_intfreq / 16 / bd->bi_baudrate; -#ifdef TQM_SMC2_CONSOLE - cp->cp_brgc2 = -#else - cp->cp_brgc1 = -#endif - ((ui - 1) < 4096) - ? (((ui - 1) << 1) | CPM_BRG_EN) - : ((((ui / 16) - 1) << 1) | CPM_BRG_EN | CPM_BRG_DIV16); - -#else /* CONFIG_MBX */ - if (*MBX_CSR1 & CSR1_COMEN) { - /* COM1 is enabled. Initialize SMC1 and use it for - * the console port. - */ - - /* Enable SDMA. - */ - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1; - - /* Use Port B for SMCs instead of other functions. - */ - cp->cp_pbpar |= 0x00000cc0; - cp->cp_pbdir &= ~0x00000cc0; - cp->cp_pbodr &= ~0x00000cc0; - - /* Allocate space for two buffer descriptors in the DP ram. - * For now, this address seems OK, but it may have to - * change with newer versions of the firmware. - */ - dpaddr = 0x0800; - - /* Grab a few bytes from the top of memory. EPPC-Bug isn't - * running any more, so we can do this. - */ - memaddr = (bd->bi_memsize - 32) & ~15; - - /* Set the physical address of the host memory buffers in - * the buffer descriptors. - */ - rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr]; - rbdf->cbd_bufaddr = memaddr; - rbdf->cbd_sc = 0; - tbdf = rbdf + 1; - tbdf->cbd_bufaddr = memaddr+4; - tbdf->cbd_sc = 0; - - /* Set up the uart parameters in the parameter ram. - */ - up->smc_rbase = dpaddr; - up->smc_tbase = dpaddr+sizeof(cbd_t); - up->smc_rfcr = SMC_EB; - up->smc_tfcr = SMC_EB; - - /* Set UART mode, 8 bit, no parity, one stop. - * Enable receive and transmit. - */ - sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART; - - /* Mask all interrupts and remove anything pending. - */ - sp->smc_smcm = 0; - sp->smc_smce = 0xff; - - /* Set up the baud rate generator. - * See 8xx_io/commproc.c for details. - */ - cp->cp_simode = 0x10000000; - cp->cp_brgc1 = - (((bd->bi_intfreq/16) / 9600) << 1) | CPM_BRG_EN; - - /* Enable SMC1 for console output. - */ - *MBX_CSR1 &= ~CSR1_COMEN; - } - else { -#endif /* ndef CONFIG_MBX */ - /* SMCx is used as console port. - */ - tbdf = (cbd_t *)&cp->cp_dpmem[up->smc_tbase]; - rbdf = (cbd_t *)&cp->cp_dpmem[up->smc_rbase]; - - /* Issue a stop transmit, and wait for it. - */ - cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS, - CPM_CR_STOP_TX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - } - - /* Make the first buffer the only buffer. - */ - tbdf->cbd_sc |= BD_SC_WRAP; - rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP; - - /* Single character receive. - */ - up->smc_mrblr = 1; - up->smc_maxidl = 0; - - /* Initialize Tx/Rx parameters. - */ - cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS, CPM_CR_INIT_TRX) | CPM_CR_FLG; - while (cp->cp_cpcr & CPM_CR_FLG); - - /* Enable transmitter/receiver. - */ - sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; - - /* This is ignored. - */ - return 0; -} - -void -serial_putc(void *ignored, const char c) -{ - volatile cbd_t *tbdf; - volatile char *buf; - volatile smc_uart_t *up; - - up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS]; - tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase]; - - /* Wait for last character to go. - */ - buf = (char *)tbdf->cbd_bufaddr; - while (tbdf->cbd_sc & BD_SC_READY); - - *buf = c; - tbdf->cbd_datlen = 1; - tbdf->cbd_sc |= BD_SC_READY; -} - -char -serial_getc(void *ignored) -{ - volatile cbd_t *rbdf; - volatile char *buf; - volatile smc_uart_t *up; - char c; - - up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS]; - rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase]; - - /* Wait for character to show up. - */ - buf = (char *)rbdf->cbd_bufaddr; - while (rbdf->cbd_sc & BD_SC_EMPTY); - c = *buf; - rbdf->cbd_sc |= BD_SC_EMPTY; - - return(c); -} - -int -serial_tstc(void *ignored) -{ - volatile cbd_t *rbdf; - volatile smc_uart_t *up; - - up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS]; - rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase]; - - return(!(rbdf->cbd_sc & BD_SC_EMPTY)); -} diff --git a/arch/ppc/boot/simple/misc-chestnut.c b/arch/ppc/boot/simple/misc-chestnut.c deleted file mode 100644 index 14a4b56d4f8493343ae76108aacce2da66f5eb5f..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-chestnut.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Setup for the IBM Chestnut (ibm-750fxgx_eval) - * - * Author: Mark A. Greer - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include - -/* Not in the kernel so won't include kernel.h to get its 'max' definition */ -#define max(a,b) (((a) > (b)) ? (a) : (b)) - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ -#ifdef CONFIG_SERIAL_8250_CONSOLE - /* - * Change device bus 2 window so that bootoader can do I/O thru - * 8250/16550 UART that's mapped in that window. - */ - out_le32(new_base + MV64x60_CPU2DEV_2_BASE, CHESTNUT_UART_BASE >> 16); - out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, CHESTNUT_UART_SIZE >> 16); - __asm__ __volatile__("sync"); -#endif -} diff --git a/arch/ppc/boot/simple/misc-cpci690.c b/arch/ppc/boot/simple/misc-cpci690.c deleted file mode 100644 index 8a8614d11a32f0a7355dd03243931a062df984ab..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-cpci690.c +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Add birec data for Force CPCI690 board. - * - * Author: Mark A. Greer - * - * 2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - -#define KB (1024UL) -#define MB (1024UL*KB) -#define GB (1024UL*MB) - -extern u32 mv64x60_console_baud; -extern u32 mv64x60_mpsc_clk_src; -extern u32 mv64x60_mpsc_clk_freq; - -u32 mag = 0xffff; - -unsigned long -get_mem_size(void) -{ - u32 size; - - switch (in_8(((void __iomem *)CPCI690_BR_BASE + CPCI690_BR_MEM_CTLR)) - & 0x07) { - case 0x01: - size = 256*MB; - break; - case 0x02: - size = 512*MB; - break; - case 0x03: - size = 768*MB; - break; - case 0x04: - size = 1*GB; - break; - case 0x05: - size = 1*GB + 512*MB; - break; - case 0x06: - size = 2*GB; - break; - default: - size = 0; - } - - return size; -} - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ - mv64x60_console_baud = CPCI690_MPSC_BAUD; - mv64x60_mpsc_clk_src = CPCI690_MPSC_CLK_SRC; - mv64x60_mpsc_clk_freq = - (get_mem_size() >= (1*GB)) ? 100000000 : 133333333; -} diff --git a/arch/ppc/boot/simple/misc-embedded.c b/arch/ppc/boot/simple/misc-embedded.c deleted file mode 100644 index d5a00eb0e4eb973d7ae913bcdf6b9dd306d8b7f7..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-embedded.c +++ /dev/null @@ -1,276 +0,0 @@ -/* - * Originally adapted by Gary Thomas. Much additional work by - * Cort Dougan . On top of that still more work by - * Dan Malek . - * - * Currently maintained by: Tom Rini - */ - -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_4xx) -#include -#elif defined(CONFIG_8xx) -#include -#elif defined(CONFIG_8260) -#include -#endif - -#include "nonstdio.h" - -/* The linker tells us where the image is. */ -extern char __image_begin, __image_end; -extern char __ramdisk_begin, __ramdisk_end; -extern char _end[]; - -/* Because of the limited amount of memory on embedded, it presents - * loading problems. The biggest is that we load this boot program - * into a relatively low memory address, and the Linux kernel Bss often - * extends into this space when it get loaded. When the kernel starts - * and zeros the BSS space, it also writes over the information we - * save here and pass to the kernel (usually board info). - * On these boards, we grab some known memory holes to hold this information. - */ -char cmd_buf[256]; -char *cmd_line = cmd_buf; -char *avail_ram; -char *end_avail; -char *zimage_start; - -/* This is for 4xx treeboot. It provides a place for the bootrom - * give us a pointer to a rom environment command line. - */ -char *bootrom_cmdline = ""; - -/* This is the default cmdline that will be given to the user at boot time.. - * If none was specified at compile time, we'll give it one that should work. - * -- Tom */ -#ifdef CONFIG_CMDLINE_BOOL -char compiled_string[] = CONFIG_CMDLINE; -#endif -char ramroot_string[] = "root=/dev/ram"; -char netroot_string[] = "root=/dev/nfs rw ip=on"; - -/* Serial port to use. */ -unsigned long com_port; - -/* We need to make sure that this is before the images to ensure - * that it's in a mapped location. - Tom */ -bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot"))); -bd_t *hold_residual = &hold_resid_buf; - -extern unsigned long serial_init(int chan, bd_t *bp); -extern void serial_close(unsigned long com_port); -extern unsigned long start; -extern void flush_instruction_cache(void); -extern void gunzip(void *, int, unsigned char *, int *); -extern void embed_config(bd_t **bp); - -/* Weak function for boards which don't need to build the - * board info struct because they are using PPCBoot/U-Boot. - */ -void __attribute__ ((weak)) -embed_config(bd_t **bdp) -{ -} - -unsigned long -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, bd_t *bp) -{ - char *cp, ch; - int timer = 0, zimage_size; - unsigned long initrd_size; - - /* First, capture the embedded board information. Then - * initialize the serial console port. - */ - embed_config(&bp); -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || \ - defined(CONFIG_SERIAL_8250_CONSOLE) || \ - defined(CONFIG_SERIAL_UARTLITE_CONSOLE) - com_port = serial_init(0, bp); -#endif - - /* Grab some space for the command line and board info. Since - * we no longer use the ELF header, but it was loaded, grab - * that space. - */ -#ifdef CONFIG_MBX - /* Because of the way the MBX loads the ELF image, we can't - * tell where we started. We read a magic variable from the NVRAM - * that gives us the intermediate buffer load address. - */ - load_addr = *(uint *)0xfa000020; - load_addr += 0x10000; /* Skip ELF header */ -#endif - /* copy board data */ - if (bp) - memcpy(hold_residual,bp,sizeof(bd_t)); - - /* Set end of memory available to us. It is always the highest - * memory address provided by the board information. - */ - end_avail = (char *)(bp->bi_memsize); - - puts("\nloaded at: "); puthex(load_addr); - puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n"); - if ( (unsigned long)load_addr != (unsigned long)&start ) { - puts("relocated to: "); puthex((unsigned long)&start); - puts(" "); - puthex((unsigned long)((unsigned long)&start + (4*num_words))); - puts("\n"); - } - - if ( bp ) { - puts("board data at: "); puthex((unsigned long)bp); - puts(" "); - puthex((unsigned long)((unsigned long)bp + sizeof(bd_t))); - puts("\nrelocated to: "); - puthex((unsigned long)hold_residual); - puts(" "); - puthex((unsigned long)((unsigned long)hold_residual + sizeof(bd_t))); - puts("\n"); - } - - /* - * We link ourself to an arbitrary low address. When we run, we - * relocate ourself to that address. __image_being points to - * the part of the image where the zImage is. -- Tom - */ - zimage_start = (char *)(unsigned long)(&__image_begin); - zimage_size = (unsigned long)(&__image_end) - - (unsigned long)(&__image_begin); - - initrd_size = (unsigned long)(&__ramdisk_end) - - (unsigned long)(&__ramdisk_begin); - - /* - * The zImage and initrd will be between start and _end, so they've - * already been moved once. We're good to go now. -- Tom - */ - puts("zimage at: "); puthex((unsigned long)zimage_start); - puts(" "); puthex((unsigned long)(zimage_size+zimage_start)); - puts("\n"); - - if ( initrd_size ) { - puts("initrd at: "); - puthex((unsigned long)(&__ramdisk_begin)); - puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n"); - } - - /* - * setup avail_ram - this is the first part of ram usable - * by the uncompress code. Anything after this program in RAM - * is now fair game. -- Tom - */ - avail_ram = (char *)PAGE_ALIGN((unsigned long)_end); - - puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" "); - puthex((unsigned long)end_avail); puts("\n"); - puts("\nLinux/PPC load: "); - cp = cmd_line; - /* This is where we try and pick the right command line for booting. - * If we were given one at compile time, use it. It Is Right. - * If we weren't, see if we have a ramdisk. If so, thats root. - * When in doubt, give them the netroot (root=/dev/nfs rw) -- Tom - */ -#ifdef CONFIG_CMDLINE_BOOL - memcpy (cmd_line, compiled_string, sizeof(compiled_string)); -#else - if ( initrd_size ) - memcpy (cmd_line, ramroot_string, sizeof(ramroot_string)); - else - memcpy (cmd_line, netroot_string, sizeof(netroot_string)); -#endif - while ( *cp ) - putc(*cp++); - while (timer++ < 5*1000) { - if (tstc()) { - while ((ch = getc()) != '\n' && ch != '\r') { - if (ch == '\b' || ch == '\177') { - if (cp != cmd_line) { - cp--; - puts("\b \b"); - } - } else if (ch == '\030' /* ^x */ - || ch == '\025') { /* ^u */ - while (cp != cmd_line) { - cp--; - puts("\b \b"); - } - } else { - *cp++ = ch; - putc(ch); - } - } - break; /* Exit 'timer' loop */ - } - udelay(1000); /* 1 msec */ - } - *cp = 0; - puts("\nUncompressing Linux..."); - - gunzip(0, 0x400000, zimage_start, &zimage_size); - flush_instruction_cache(); - puts("done.\n"); - { - struct bi_record *rec; - unsigned long initrd_loc = 0; - unsigned long rec_loc = _ALIGN((unsigned long)(zimage_size) + - (1 << 20) - 1, (1 << 20)); - rec = (struct bi_record *)rec_loc; - - /* We need to make sure that the initrd and bi_recs do not - * overlap. */ - if ( initrd_size ) { - initrd_loc = (unsigned long)(&__ramdisk_begin); - /* If the bi_recs are in the middle of the current - * initrd, move the initrd to the next MB - * boundary. */ - if ((rec_loc > initrd_loc) && - ((initrd_loc + initrd_size) - > rec_loc)) { - initrd_loc = _ALIGN((unsigned long)(zimage_size) - + (2 << 20) - 1, (2 << 20)); - memmove((void *)initrd_loc, &__ramdisk_begin, - initrd_size); - puts("initrd moved: "); puthex(initrd_loc); - puts(" "); puthex(initrd_loc + initrd_size); - puts("\n"); - } - } - - rec->tag = BI_FIRST; - rec->size = sizeof(struct bi_record); - rec = (struct bi_record *)((unsigned long)rec + rec->size); - - rec->tag = BI_CMD_LINE; - memcpy( (char *)rec->data, cmd_line, strlen(cmd_line)+1); - rec->size = sizeof(struct bi_record) + strlen(cmd_line) + 1; - rec = (struct bi_record *)((unsigned long)rec + rec->size); - - if ( initrd_size ) { - rec->tag = BI_INITRD; - rec->data[0] = initrd_loc; - rec->data[1] = initrd_size; - rec->size = sizeof(struct bi_record) + 2 * - sizeof(unsigned long); - rec = (struct bi_record *)((unsigned long)rec + - rec->size); - } - - rec->tag = BI_LAST; - rec->size = sizeof(struct bi_record); - rec = (struct bi_record *)((unsigned long)rec + rec->size); - } - puts("Now booting the kernel\n"); -#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) - serial_close(com_port); -#endif - - return (unsigned long)hold_residual; -} diff --git a/arch/ppc/boot/simple/misc-ev64260.c b/arch/ppc/boot/simple/misc-ev64260.c deleted file mode 100644 index 0b3978632acaed1ea89558dd542b58794cba68c1..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-ev64260.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board - * with a GT64260 onboard. - * - * Author: Mark A. Greer - * - * 2001 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include - -#ifdef CONFIG_SERIAL_MPSC_CONSOLE -extern u32 mv64x60_console_baud; -extern u32 mv64x60_mpsc_clk_src; -extern u32 mv64x60_mpsc_clk_freq; -#endif - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ - u32 p, v; - - /* DINK doesn't enable 745x timebase, so enable here (Adrian Cox) */ - p = mfspr(SPRN_PVR); - p >>= 16; - - /* Reasonable SWAG at a 745x PVR value */ - if (((p & 0xfff0) == 0x8000) && (p != 0x800c)) { - v = mfspr(SPRN_HID0); - v |= HID0_TBEN; - mtspr(SPRN_HID0, v); - } - -#ifdef CONFIG_SERIAL_8250_CONSOLE - /* - * Change device bus 2 window so that bootoader can do I/O thru - * 8250/16550 UART that's mapped in that window. - */ - out_le32(new_base + MV64x60_CPU2DEV_2_BASE, EV64260_UART_BASE >> 20); - out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, EV64260_UART_END >> 20); - __asm__ __volatile__("sync"); -#elif defined(CONFIG_SERIAL_MPSC_CONSOLE) - mv64x60_console_baud = EV64260_DEFAULT_BAUD; - mv64x60_mpsc_clk_src = EV64260_MPSC_CLK_SRC; - mv64x60_mpsc_clk_freq = EV64260_MPSC_CLK_FREQ; -#endif -} diff --git a/arch/ppc/boot/simple/misc-ev64360.c b/arch/ppc/boot/simple/misc-ev64360.c deleted file mode 100644 index 96eaebb78df58498cd9934bc23dd9e19cef06c83..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-ev64360.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2005 Lee Nicks - * - * Based on arch/ppc/boot/simple/misc-katana.c from: - * Mark A. Greer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#include -#include -#include -#include - -extern u32 mv64x60_console_baud; -extern u32 mv64x60_mpsc_clk_src; -extern u32 mv64x60_mpsc_clk_freq; - -/* Not in the kernel so won't include kernel.h to get its 'min' definition */ -#ifndef min -#define min(a,b) (((a) < (b)) ? (a) : (b)) -#endif - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ - mv64x60_console_baud = EV64360_DEFAULT_BAUD; - mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC; - mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ; -} diff --git a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c deleted file mode 100644 index 79a1bbcbc6c5f30da0d39a68924e2f9f8ddf548e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-katana.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Set up MPSC values to bootwrapper can prompt user. - * - * Author: Mark A. Greer - * - * 2004 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include - -extern u32 mv64x60_console_baud; -extern u32 mv64x60_mpsc_clk_src; -extern u32 mv64x60_mpsc_clk_freq; - -/* Not in the kernel so won't include kernel.h to get its 'min' definition */ -#ifndef min -#define min(a,b) (((a) < (b)) ? (a) : (b)) -#endif - -unsigned long mv64360_get_mem_size(void); - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ - mv64x60_console_baud = KATANA_DEFAULT_BAUD; - mv64x60_mpsc_clk_src = KATANA_MPSC_CLK_SRC; - mv64x60_mpsc_clk_freq = - min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE), - MV64x60_TCLK_FREQ_MAX); -} - -unsigned long -get_mem_size(void) -{ - return mv64360_get_mem_size(); -} diff --git a/arch/ppc/boot/simple/misc-mv64x60.c b/arch/ppc/boot/simple/misc-mv64x60.c deleted file mode 100644 index 28b3108083edd691c65aa24efc5b3304198c4881..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-mv64x60.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Relocate bridge's register base and call board specific routine. - * - * Author: Mark A. Greer - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - -extern struct bi_record *decompress_kernel(unsigned long load_addr, - int num_words, unsigned long cksum); - - -u32 size_reg[MV64x60_CPU2MEM_WINDOWS] = { - MV64x60_CPU2MEM_0_SIZE, MV64x60_CPU2MEM_1_SIZE, - MV64x60_CPU2MEM_2_SIZE, MV64x60_CPU2MEM_3_SIZE -}; - -/* Read mem ctlr to get the amount of mem in system */ -unsigned long -mv64360_get_mem_size(void) -{ - u32 enables, i, v; - u32 mem = 0; - - enables = in_le32((void __iomem *)CONFIG_MV64X60_NEW_BASE + - MV64360_CPU_BAR_ENABLE) & 0xf; - - for (i=0; i> (32 - bits)); - out_le32(old_base + MV64x60_INTERNAL_SPACE_DECODE, b); - - __asm__ __volatile__("sync"); - - /* Wait for change to happen (in accordance with the manual) */ - while (in_le32(new_base + MV64x60_INTERNAL_SPACE_DECODE) != b); - } -} - -void __attribute__ ((weak)) -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ -} - -void * -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - void *ign1, void *ign2) -{ - mv64x60_move_base((void __iomem *)CONFIG_MV64X60_BASE, - (void __iomem *)CONFIG_MV64X60_NEW_BASE); - mv64x60_board_init((void __iomem *)CONFIG_MV64X60_BASE, - (void __iomem *)CONFIG_MV64X60_NEW_BASE); - return decompress_kernel(load_addr, num_words, cksum); -} diff --git a/arch/ppc/boot/simple/misc-prep.c b/arch/ppc/boot/simple/misc-prep.c deleted file mode 100644 index 0086e1cfb48cbb1f66442e2c31a77d9de94b3668..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-prep.c +++ /dev/null @@ -1,209 +0,0 @@ -/* - * Maintainer: Tom Rini - * - * In the past: Gary Thomas, Cort Dougan - */ - -#include -#include -#include -#include -#include -#include "mpc10x.h" -#include "of1275.h" -#include "nonstdio.h" - -extern int keyb_present; /* keyboard controller is present by default */ -RESIDUAL hold_resid_buf; -RESIDUAL *hold_residual = &hold_resid_buf; -static void *OFW_interface; /* Pointer to OF, if available. */ - -#ifdef CONFIG_VGA_CONSOLE -char *vidmem = (char *)0xC00B8000; -int lines = 25, cols = 80; -int orig_x, orig_y = 24; -#endif /* CONFIG_VGA_CONSOLE */ - -extern int CRT_tstc(void); -extern int vga_init(unsigned char *ISA_mem); -extern void gunzip(void *, int, unsigned char *, int *); -extern unsigned long serial_init(int chan, void *ignored); -extern void serial_fixups(void); -extern struct bi_record *decompress_kernel(unsigned long load_addr, - int num_words, unsigned long cksum); -extern void disable_6xx_mmu(void); -extern unsigned long mpc10x_get_mem_size(void); - -static void -writel(unsigned int val, unsigned int address) -{ - /* Ensure I/O operations complete */ - __asm__ volatile("eieio"); - *(unsigned int *)address = cpu_to_le32(val); -} - -#define PCI_CFG_ADDR(dev,off) ((0x80<<24) | (dev<<8) | (off&0xfc)) -#define PCI_CFG_DATA(off) (MPC10X_MAPA_CNFG_DATA+(off&3)) - -static void -pci_read_config_32(unsigned char devfn, - unsigned char offset, - unsigned int *val) -{ - /* Ensure I/O operations complete */ - __asm__ volatile("eieio"); - *(unsigned int *)PCI_CFG_ADDR(devfn,offset) = - cpu_to_le32(MPC10X_MAPA_CNFG_ADDR); - /* Ensure I/O operations complete */ - __asm__ volatile("eieio"); - *val = le32_to_cpu(*(unsigned int *)PCI_CFG_DATA(offset)); - return; -} - -#ifdef CONFIG_VGA_CONSOLE -void -scroll(void) -{ - int i; - - memcpy ( vidmem, vidmem + cols * 2, ( lines - 1 ) * cols * 2 ); - for ( i = ( lines - 1 ) * cols * 2; i < lines * cols * 2; i += 2 ) - vidmem[i] = ' '; -} -#endif /* CONFIG_VGA_CONSOLE */ - -unsigned long -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - RESIDUAL *residual, void *OFW) -{ - int start_multi = 0; - unsigned int pci_viddid, pci_did, tulip_pci_base, tulip_base; - - /* If we have Open Firmware, initialise it immediately */ - if (OFW) { - OFW_interface = OFW; - ofinit(OFW_interface); - } - - board_isa_init(); -#if defined(CONFIG_VGA_CONSOLE) - vga_init((unsigned char *)0xC0000000); -#endif /* CONFIG_VGA_CONSOLE */ - - if (residual) { - /* Is this Motorola PPCBug? */ - if ((1 & residual->VitalProductData.FirmwareSupports) && - (1 == residual->VitalProductData.FirmwareSupplier)) { - unsigned char base_mod; - unsigned char board_type = inb(0x801) & 0xF0; - - /* - * Reset the onboard 21x4x Ethernet - * Motorola Ethernet is at IDSEL 14 (devfn 0x70) - */ - pci_read_config_32(0x70, 0x00, &pci_viddid); - pci_did = (pci_viddid & 0xffff0000) >> 16; - /* Be sure we've really found a 21x4x chip */ - if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_DEC) && - ((pci_did == PCI_DEVICE_ID_DEC_TULIP_FAST) || - (pci_did == PCI_DEVICE_ID_DEC_TULIP) || - (pci_did == PCI_DEVICE_ID_DEC_TULIP_PLUS) || - (pci_did == PCI_DEVICE_ID_DEC_21142))) { - pci_read_config_32(0x70, - 0x10, - &tulip_pci_base); - /* Get the physical base address */ - tulip_base = - (tulip_pci_base & ~0x03UL) + 0x80000000; - /* Strobe the 21x4x reset bit in CSR0 */ - writel(0x1, tulip_base); - } - - /* If this is genesis 2 board then check for no - * keyboard controller and more than one processor. - */ - if (board_type == 0xe0) { - base_mod = inb(0x803); - /* if a MVME2300/2400 or a Sitka then no keyboard */ - if((base_mod == 0xFA) || (base_mod == 0xF9) || - (base_mod == 0xE1)) { - keyb_present = 0; /* no keyboard */ - } - } - /* If this is a multiprocessor system then - * park the other processor so that the - * kernel knows where to find them. - */ - if (residual->MaxNumCpus > 1) - start_multi = 1; - } - memcpy(hold_residual,residual,sizeof(RESIDUAL)); - } - - /* Call decompress_kernel */ - decompress_kernel(load_addr, num_words, cksum); - - if (start_multi) { - residual->VitalProductData.SmpIar = (unsigned long)0xc0; - residual->Cpus[1].CpuState = CPU_GOOD; - hold_residual->VitalProductData.Reserved5 = 0xdeadbeef; - } - - /* Now go and clear out the BATs and ensure that our MSR is - * correct .*/ - disable_6xx_mmu(); - - /* Make r3 be a pointer to the residual data. */ - return (unsigned long)hold_residual; -} - -unsigned long -get_mem_size(void) -{ - unsigned int pci_viddid, pci_did; - - /* First, figure out what kind of host bridge we are on. If it's - * an MPC10x, we can ask it directly how much memory it has. - * Otherwise, see if the residual data has anything. This isn't - * the best way, but it can be the only way. If there's nothing, - * assume 32MB. -- Tom. - */ - /* See what our host bridge is. */ - pci_read_config_32(0x00, 0x00, &pci_viddid); - pci_did = (pci_viddid & 0xffff0000) >> 16; - /* See if we are on an MPC10x. */ - if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA) - && ((pci_did == PCI_DEVICE_ID_MOTOROLA_MPC105) - || (pci_did == PCI_DEVICE_ID_MOTOROLA_MPC106) - || (pci_did == PCI_DEVICE_ID_MOTOROLA_MPC107))) - return mpc10x_get_mem_size(); - /* If it's not, see if we have anything in the residual data. */ - else if (hold_residual && hold_residual->TotalMemory) - return hold_residual->TotalMemory; - else if (OFW_interface) { - /* - * This is a 'best guess' check. We want to make sure - * we don't try this on a PReP box without OF - * -- Cort - */ - while (OFW_interface) - { - phandle dev_handle; - int mem_info[2]; - - /* get handle to memory description */ - if (!(dev_handle = finddevice("/memory@0"))) - break; - - /* get the info */ - if (getprop(dev_handle, "reg", mem_info, - sizeof(mem_info)) != 8) - break; - - return mem_info[1]; - } - } - - /* Fall back to hard-coding 32MB. */ - return 32*1024*1024; -} diff --git a/arch/ppc/boot/simple/misc-radstone_ppc7d.c b/arch/ppc/boot/simple/misc-radstone_ppc7d.c deleted file mode 100644 index 0f302ea9c3d1f35752106dcf3b72c227d63fe573..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-radstone_ppc7d.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Misc data for Radstone PPC7D board. - * - * Author: James Chapman - */ - -#include -#include - -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) -extern u32 mv64x60_console_baud; -extern u32 mv64x60_mpsc_clk_src; -extern u32 mv64x60_mpsc_clk_freq; -#endif - -void -mv64x60_board_init(void __iomem *old_base, void __iomem *new_base) -{ -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) - mv64x60_console_baud = PPC7D_DEFAULT_BAUD; - mv64x60_mpsc_clk_src = PPC7D_MPSC_CLK_SRC; - mv64x60_mpsc_clk_freq = PPC7D_MPSC_CLK_FREQ; -#endif -} diff --git a/arch/ppc/boot/simple/misc-spruce.c b/arch/ppc/boot/simple/misc-spruce.c deleted file mode 100644 index 5b3a6c6f113b28953487abd02008421da9729996..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc-spruce.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Misc. bootloader code for IBM Spruce reference platform - * - * Authors: Johnnie Peters - * Matt Porter - * - * Derived from arch/ppc/boot/prep/misc.c - * - * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include - -#include - -extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, - unsigned long cksum); - -/* Define some important locations of the Spruce. */ -#define SPRUCE_PCI_CONFIG_ADDR 0xfec00000 -#define SPRUCE_PCI_CONFIG_DATA 0xfec00004 - -/* PCI configuration space access routines. */ -unsigned int *pci_config_address = (unsigned int *)SPRUCE_PCI_CONFIG_ADDR; -unsigned char *pci_config_data = (unsigned char *)SPRUCE_PCI_CONFIG_DATA; - -void cpc700_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char *val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - *val= (in_le32((unsigned *)pci_config_data) >> (8 * (offset & 3))) & 0xff; -} - -void cpc700_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - out_8(pci_config_data + (offset&3), val); -} - -void cpc700_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short *val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - *val= in_le16((unsigned short *)(pci_config_data + (offset&3))); -} - -void cpc700_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - out_le16((unsigned short *)(pci_config_data + (offset&3)), val); -} - -void cpc700_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int *val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - *val= in_le32((unsigned *)pci_config_data); -} - -void cpc700_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int val) -{ - out_le32(pci_config_address, - (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000)); - - out_le32((unsigned *)pci_config_data, val); -} - -#define PCNET32_WIO_RDP 0x10 -#define PCNET32_WIO_RAP 0x12 -#define PCNET32_WIO_RESET 0x14 - -#define PCNET32_DWIO_RDP 0x10 -#define PCNET32_DWIO_RAP 0x14 -#define PCNET32_DWIO_RESET 0x18 - -/* Processor interface config register access */ -#define PIFCFGADDR 0xff500000 -#define PIFCFGDATA 0xff500004 - -#define PLBMIFOPT 0x18 /* PLB Master Interface Options */ - -#define MEM_MBEN 0x24 -#define MEM_TYPE 0x28 -#define MEM_B1SA 0x3c -#define MEM_B1EA 0x5c -#define MEM_B2SA 0x40 -#define MEM_B2EA 0x60 - -unsigned long -get_mem_size(void) -{ - int loop; - unsigned long mem_size = 0; - unsigned long mem_mben; - unsigned long mem_type; - unsigned long mem_start; - unsigned long mem_end; - volatile int *mem_addr = (int *)0xff500008; - volatile int *mem_data = (int *)0xff50000c; - - /* Get the size of memory from the memory controller. */ - *mem_addr = MEM_MBEN; - asm("sync"); - mem_mben = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - *mem_addr = MEM_TYPE; - asm("sync"); - mem_type = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - *mem_addr = MEM_TYPE; - /* Confirm bank 1 has DRAM memory */ - if ((mem_mben & 0x40000000) && - ((mem_type & 0x30000000) == 0x10000000)) { - *mem_addr = MEM_B1SA; - asm("sync"); - mem_start = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - *mem_addr = MEM_B1EA; - asm("sync"); - mem_end = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - mem_size = mem_end - mem_start + 0x100000; - } - - /* Confirm bank 2 has DRAM memory */ - if ((mem_mben & 0x20000000) && - ((mem_type & 0xc000000) == 0x4000000)) { - *mem_addr = MEM_B2SA; - asm("sync"); - mem_start = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - *mem_addr = MEM_B2EA; - asm("sync"); - mem_end = *mem_data; - asm("sync"); - for(loop = 0; loop < 1000; loop++); - - mem_size += mem_end - mem_start + 0x100000; - } - return mem_size; -} - -unsigned long -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - void *ign1, void *ign2) -{ - int csr0; - int csr_id; - int pci_devfn; - int found_multi = 0; - unsigned short vendor; - unsigned short device; - unsigned short command; - unsigned char header_type; - unsigned int bar0; - volatile int *pif_addr = (int *)0xff500000; - volatile int *pif_data = (int *)0xff500004; - - /* - * Gah, these firmware guys need to learn that hardware - * byte swapping is evil! Disable all hardware byte - * swapping so it doesn't hurt anyone. - */ - *pif_addr = PLBMIFOPT; - asm("sync"); - *pif_data = 0x00000000; - asm("sync"); - - /* Search out and turn off the PcNet ethernet boot device. */ - for (pci_devfn = 1; pci_devfn < 0xff; pci_devfn++) { - if (PCI_FUNC(pci_devfn) && !found_multi) - continue; - - cpc700_pcibios_read_config_byte(0, pci_devfn, - PCI_HEADER_TYPE, &header_type); - - if (!PCI_FUNC(pci_devfn)) - found_multi = header_type & 0x80; - - cpc700_pcibios_read_config_word(0, pci_devfn, PCI_VENDOR_ID, - &vendor); - - if (vendor != 0xffff) { - cpc700_pcibios_read_config_word(0, pci_devfn, - PCI_DEVICE_ID, &device); - - /* If this PCI device is the Lance PCNet board then turn it off */ - if ((vendor == PCI_VENDOR_ID_AMD) && - (device == PCI_DEVICE_ID_AMD_LANCE)) { - - /* Turn on I/O Space on the board. */ - cpc700_pcibios_read_config_word(0, pci_devfn, - PCI_COMMAND, &command); - command |= 0x1; - cpc700_pcibios_write_config_word(0, pci_devfn, - PCI_COMMAND, command); - - /* Get the I/O space address */ - cpc700_pcibios_read_config_dword(0, pci_devfn, - PCI_BASE_ADDRESS_0, &bar0); - bar0 &= 0xfffffffe; - - /* Reset the PCNet Board */ - inl (bar0+PCNET32_DWIO_RESET); - inw (bar0+PCNET32_WIO_RESET); - - /* First do a work oriented read of csr0. If the value is - * 4 then this is the correct mode to access the board. - * If not try a double word ortiented read. - */ - outw(0, bar0 + PCNET32_WIO_RAP); - csr0 = inw(bar0 + PCNET32_WIO_RDP); - - if (csr0 == 4) { - /* Check the Chip id register */ - outw(88, bar0 + PCNET32_WIO_RAP); - csr_id = inw(bar0 + PCNET32_WIO_RDP); - - if (csr_id) { - /* This is the valid mode - set the stop bit */ - outw(0, bar0 + PCNET32_WIO_RAP); - outw(csr0, bar0 + PCNET32_WIO_RDP); - } - } else { - outl(0, bar0 + PCNET32_DWIO_RAP); - csr0 = inl(bar0 + PCNET32_DWIO_RDP); - if (csr0 == 4) { - /* Check the Chip id register */ - outl(88, bar0 + PCNET32_WIO_RAP); - csr_id = inl(bar0 + PCNET32_WIO_RDP); - - if (csr_id) { - /* This is the valid mode - set the stop bit*/ - outl(0, bar0 + PCNET32_WIO_RAP); - outl(csr0, bar0 + PCNET32_WIO_RDP); - } - } - } - } - } - } - - return decompress_kernel(load_addr, num_words, cksum); -} diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c deleted file mode 100644 index c3d3305eb5ca33fbd4e68c93ade19e134942f181..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/misc.c +++ /dev/null @@ -1,278 +0,0 @@ -/* - * Misc. bootloader code for many machines. This assumes you have are using - * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory - * below 8MB is free. Finally, it assumes you have a NS16550-style uart for - * your serial console. If a machine meets these requirements, it can quite - * likely use this code during boot. - * - * Author: Matt Porter - * Derived from arch/ppc/boot/prep/misc.c - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include - -#include -#include -#include -#ifdef CONFIG_4xx -#include -#endif -#include - -#include "nonstdio.h" - -/* Default cmdline */ -#ifdef CONFIG_CMDLINE -#define CMDLINE CONFIG_CMDLINE -#else -#define CMDLINE "" -#endif - -/* Keyboard (and VGA console)? */ -#ifdef CONFIG_VGA_CONSOLE -#define HAS_KEYB 1 -#else -#define HAS_KEYB 0 -#endif - -/* Will / Can the user give input? - */ -#if (defined(CONFIG_SERIAL_8250_CONSOLE) \ - || defined(CONFIG_VGA_CONSOLE) \ - || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \ - || defined(CONFIG_SERIAL_MPSC_CONSOLE)) -#define INTERACTIVE_CONSOLE 1 -#endif - -char *avail_ram; -char *end_avail; -char *zimage_start; -char cmd_preset[] = CMDLINE; -char cmd_buf[256]; -char *cmd_line = cmd_buf; -int keyb_present = HAS_KEYB; -int zimage_size; - -unsigned long com_port; -unsigned long initrd_size = 0; - -/* The linker tells us various locations in the image */ -extern char __image_begin, __image_end; -extern char __ramdisk_begin, __ramdisk_end; -extern char _end[]; -/* Original location */ -extern unsigned long start; - -extern int CRT_tstc(void); -extern unsigned long serial_init(int chan, void *ignored); -extern void serial_close(unsigned long com_port); -extern void gunzip(void *, int, unsigned char *, int *); -extern void serial_fixups(void); - -/* Allow get_mem_size to be hooked into. This is the default. */ -unsigned long __attribute__ ((weak)) -get_mem_size(void) -{ - return 0; -} - -#if defined(CONFIG_40x) -#define PPC4xx_EMAC0_MR0 EMAC0_BASE -#endif - -#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0) -#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0 -#endif - -struct bi_record * -decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum) -{ -#ifdef INTERACTIVE_CONSOLE - int timer = 0; - char ch; -#endif - char *cp; - struct bi_record *rec; - unsigned long initrd_loc = 0, TotalMemory = 0; - -#if defined(CONFIG_SERIAL_8250_CONSOLE) || defined(CONFIG_SERIAL_MPSC_CONSOLE) - com_port = serial_init(0, NULL); -#endif - -#if defined(PPC4xx_EMAC0_MR0) - /* Reset MAL */ - mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); - /* Wait for reset */ - while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; - /* Reset EMAC */ - *(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000; - __asm__ __volatile__("eieio"); -#endif - - /* - * Call get_mem_size(), which is memory controller dependent, - * and we must have the correct file linked in here. - */ - TotalMemory = get_mem_size(); - - /* assume the chunk below 8M is free */ - end_avail = (char *)0x00800000; - - /* - * Reveal where we were loaded at and where we - * were relocated to. - */ - puts("loaded at: "); puthex(load_addr); - puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); - puts("\n"); - if ( (unsigned long)load_addr != (unsigned long)&start ) - { - puts("relocated to: "); puthex((unsigned long)&start); - puts(" "); - puthex((unsigned long)((unsigned long)&start + (4*num_words))); - puts("\n"); - } - - /* - * We link ourself to 0x00800000. When we run, we relocate - * ourselves there. So we just need __image_begin for the - * start. -- Tom - */ - zimage_start = (char *)(unsigned long)(&__image_begin); - zimage_size = (unsigned long)(&__image_end) - - (unsigned long)(&__image_begin); - - initrd_size = (unsigned long)(&__ramdisk_end) - - (unsigned long)(&__ramdisk_begin); - - /* - * The zImage and initrd will be between start and _end, so they've - * already been moved once. We're good to go now. -- Tom - */ - avail_ram = (char *)PAGE_ALIGN((unsigned long)_end); - puts("zimage at: "); puthex((unsigned long)zimage_start); - puts(" "); puthex((unsigned long)(zimage_size+zimage_start)); - puts("\n"); - - if ( initrd_size ) { - puts("initrd at: "); - puthex((unsigned long)(&__ramdisk_begin)); - puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n"); - } - -#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */ - avail_ram = (char *)0x00400000; -#endif - end_avail = (char *)0x00800000; - puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" "); - puthex((unsigned long)end_avail); puts("\n"); - - if (keyb_present) - CRT_tstc(); /* Forces keyboard to be initialized */ - - /* Display standard Linux/PPC boot prompt for kernel args */ - puts("\nLinux/PPC load: "); - cp = cmd_line; - memcpy (cmd_line, cmd_preset, sizeof(cmd_preset)); - while ( *cp ) putc(*cp++); - -#ifdef INTERACTIVE_CONSOLE - /* - * If they have a console, allow them to edit the command line. - * Otherwise, don't bother wasting the five seconds. - */ - while (timer++ < 5*1000) { - if (tstc()) { - while ((ch = getc()) != '\n' && ch != '\r') { - /* Test for backspace/delete */ - if (ch == '\b' || ch == '\177') { - if (cp != cmd_line) { - cp--; - puts("\b \b"); - } - /* Test for ^x/^u (and wipe the line) */ - } else if (ch == '\030' || ch == '\025') { - while (cp != cmd_line) { - cp--; - puts("\b \b"); - } - } else { - *cp++ = ch; - putc(ch); - } - } - break; /* Exit 'timer' loop */ - } - udelay(1000); /* 1 msec */ - } - *cp = 0; -#endif - puts("\n"); - - puts("Uncompressing Linux..."); - gunzip(NULL, 0x400000, zimage_start, &zimage_size); - puts("done.\n"); - - /* get the bi_rec address */ - rec = bootinfo_addr(zimage_size); - - /* We need to make sure that the initrd and bi_recs do not - * overlap. */ - if ( initrd_size ) { - unsigned long rec_loc = (unsigned long) rec; - initrd_loc = (unsigned long)(&__ramdisk_begin); - /* If the bi_recs are in the middle of the current - * initrd, move the initrd to the next MB - * boundary. */ - if ((rec_loc > initrd_loc) && - ((initrd_loc + initrd_size) > rec_loc)) { - initrd_loc = _ALIGN((unsigned long)(zimage_size) - + (2 << 20) - 1, (2 << 20)); - memmove((void *)initrd_loc, &__ramdisk_begin, - initrd_size); - puts("initrd moved: "); puthex(initrd_loc); - puts(" "); puthex(initrd_loc + initrd_size); - puts("\n"); - } - } - - bootinfo_init(rec); - if ( TotalMemory ) - bootinfo_append(BI_MEMSIZE, sizeof(int), (void*)&TotalMemory); - - bootinfo_append(BI_CMD_LINE, strlen(cmd_line)+1, (void*)cmd_line); - - /* add a bi_rec for the initrd if it exists */ - if (initrd_size) { - unsigned long initrd[2]; - - initrd[0] = initrd_loc; - initrd[1] = initrd_size; - - bootinfo_append(BI_INITRD, sizeof(initrd), &initrd); - } - puts("Now booting the kernel\n"); - serial_close(com_port); - - return rec; -} - -void __attribute__ ((weak)) -board_isa_init(void) -{ -} - -/* Allow decompress_kernel to be hooked into. This is the default. */ -void * __attribute__ ((weak)) -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - void *ign1, void *ign2) -{ - board_isa_init(); - return decompress_kernel(load_addr, num_words, cksum); -} diff --git a/arch/ppc/boot/simple/mpc10x_memory.c b/arch/ppc/boot/simple/mpc10x_memory.c deleted file mode 100644 index 8da8f576031d00f94c4a4cbfa324868ec2a153bf..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/mpc10x_memory.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * A routine to find out how much memory the machine has. - * - * Based on: - * arch/ppc/kernel/mpc10x_common.c - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include "mpc10x.h" - -/* - * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs *** - */ - -/* - * PCI config space macros, similar to indirect_xxx and early_xxx macros. - * We assume bus 0. - */ -#define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr)) -#define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val)) - -#define MPC10X_PCI_OP(rw, size, type, op, mask) \ -static void \ -mpc10x_##rw##_config_##size(unsigned int __iomem *cfg_addr, \ - unsigned int *cfg_data, int devfn, int offset, \ - type val) \ -{ \ - out_be32(cfg_addr, \ - ((offset & 0xfc) << 24) | (devfn << 16) \ - | (0 << 8) | 0x80); \ - MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \ - return; \ -} - -MPC10X_PCI_OP(read, byte, u8 *, in_8, 3) -MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0) - -/* - * Read the memory controller registers to determine the amount of memory in - * the system. This assumes that the firmware has correctly set up the memory - * controller registers. On CONFIG_PPC_PREP, we know we are being called - * under a PReP memory map. On all other machines, we assume we are under - * a CHRP memory map. Further, on CONFIG_PPC_PREP we must rename - * this function. - */ -#ifdef CONFIG_PPC_PREP -#define get_mem_size mpc10x_get_mem_size -#endif -unsigned long -get_mem_size(void) -{ - unsigned int *config_addr, *config_data, val; - unsigned long start, end, total, offset; - int i; - unsigned char bank_enables; - -#ifdef CONFIG_PPC_PREP - config_addr = (unsigned int *)MPC10X_MAPA_CNFG_ADDR; - config_data = (unsigned int *)MPC10X_MAPA_CNFG_DATA; -#else - config_addr = (unsigned int *)MPC10X_MAPB_CNFG_ADDR; - config_data = (unsigned int *)MPC10X_MAPB_CNFG_DATA; -#endif - - mpc10x_read_config_byte(config_addr, config_data, PCI_DEVFN(0,0), - MPC10X_MCTLR_MEM_BANK_ENABLES, &bank_enables); - - total = 0; - - for (i = 0; i < 8; i++) { - if (bank_enables & (1 << i)) { - offset = MPC10X_MCTLR_MEM_START_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, config_data, - PCI_DEVFN(0,0), offset, &val); - start = (val >> ((i & 3) << 3)) & 0xff; - - offset = MPC10X_MCTLR_EXT_MEM_START_1 + ((i>3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, config_data, - PCI_DEVFN(0,0), offset, &val); - val = (val >> ((i & 3) << 3)) & 0x03; - start = (val << 28) | (start << 20); - - offset = MPC10X_MCTLR_MEM_END_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, config_data, - PCI_DEVFN(0,0), offset, &val); - end = (val >> ((i & 3) << 3)) & 0xff; - - offset = MPC10X_MCTLR_EXT_MEM_END_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, config_data, - PCI_DEVFN(0,0), offset, &val); - val = (val >> ((i & 3) << 3)) & 0x03; - end = (val << 28) | (end << 20) | 0xfffff; - - total += (end - start + 1); - } - } - - return total; -} diff --git a/arch/ppc/boot/simple/mpc52xx_tty.c b/arch/ppc/boot/simple/mpc52xx_tty.c deleted file mode 100644 index 6955891fb03175017d09879b957d895125c7e580..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/mpc52xx_tty.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Minimal serial functions needed to send messages out a MPC52xx - * Programmable Serial Controller (PSC). - * - * Author: Dale Farnsworth - * - * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include - - -#ifdef MPC52xx_PF_CONSOLE_PORT -#define MPC52xx_CONSOLE MPC52xx_PSCx_OFFSET(MPC52xx_PF_CONSOLE_PORT) -#define MPC52xx_PSC_CONFIG_SHIFT ((MPC52xx_PF_CONSOLE_PORT-1)<<2) -#else -#error "MPC52xx_PF_CONSOLE_PORT not defined" -#endif - -static struct mpc52xx_psc __iomem *psc = - (struct mpc52xx_psc __iomem *) MPC52xx_PA(MPC52xx_CONSOLE); - -/* The decrementer counts at the system bus clock frequency - * divided by four. The most accurate time base is connected to the - * rtc. We read the decrementer change during one rtc tick - * and multiply by 4 to get the system bus clock frequency. Since a - * rtc tick is one seconds, and that's pretty long, we change the rtc - * dividers temporarily to set them 64x faster ;) - */ -static int -mpc52xx_ipbfreq(void) -{ - struct mpc52xx_rtc __iomem *rtc = - (struct mpc52xx_rtc __iomem *) MPC52xx_PA(MPC52xx_RTC_OFFSET); - struct mpc52xx_cdm __iomem *cdm = - (struct mpc52xx_cdm __iomem *) MPC52xx_PA(MPC52xx_CDM_OFFSET); - int current_time, previous_time; - int tbl_start, tbl_end; - int xlbfreq, ipbfreq; - - out_be32(&rtc->dividers, 0x8f1f0000); /* Set RTC 64x faster */ - previous_time = in_be32(&rtc->time); - while ((current_time = in_be32(&rtc->time)) == previous_time) ; - tbl_start = get_tbl(); - previous_time = current_time; - while ((current_time = in_be32(&rtc->time)) == previous_time) ; - tbl_end = get_tbl(); - out_be32(&rtc->dividers, 0xffff0000); /* Restore RTC */ - - xlbfreq = (tbl_end - tbl_start) << 8; - ipbfreq = (in_8(&cdm->ipb_clk_sel) & 1) ? xlbfreq / 2 : xlbfreq; - - return ipbfreq; -} - -unsigned long -serial_init(int ignored, void *ignored2) -{ - struct mpc52xx_gpio __iomem *gpio = - (struct mpc52xx_gpio __iomem *) MPC52xx_PA(MPC52xx_GPIO_OFFSET); - int divisor; - int mode1; - int mode2; - u32 val32; - - static int been_here = 0; - - if (been_here) - return 0; - - been_here = 1; - - val32 = in_be32(&gpio->port_config); - val32 &= ~(0x7 << MPC52xx_PSC_CONFIG_SHIFT); - val32 |= MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD - << MPC52xx_PSC_CONFIG_SHIFT; - out_be32(&gpio->port_config, val32); - - out_8(&psc->command, MPC52xx_PSC_RST_TX - | MPC52xx_PSC_RX_DISABLE | MPC52xx_PSC_TX_ENABLE); - out_8(&psc->command, MPC52xx_PSC_RST_RX); - - out_be32(&psc->sicr, 0x0); - out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); - out_be16(&psc->tfalarm, 0xf8); - - out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1 - | MPC52xx_PSC_RX_ENABLE - | MPC52xx_PSC_TX_ENABLE); - - divisor = ((mpc52xx_ipbfreq() - / (CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD * 16)) + 1) >> 1; - - mode1 = MPC52xx_PSC_MODE_8_BITS | MPC52xx_PSC_MODE_PARNONE - | MPC52xx_PSC_MODE_ERR; - mode2 = MPC52xx_PSC_MODE_ONE_STOP; - - out_8(&psc->ctur, divisor>>8); - out_8(&psc->ctlr, divisor); - out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); - out_8(&psc->mode, mode1); - out_8(&psc->mode, mode2); - - return 0; /* ignored */ -} - -void -serial_putc(void *ignored, const char c) -{ - serial_init(0, NULL); - - while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP)) ; - out_8(&psc->mpc52xx_psc_buffer_8, c); - while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP)) ; -} - -char -serial_getc(void *ignored) -{ - while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY)) ; - - return in_8(&psc->mpc52xx_psc_buffer_8); -} - -int -serial_tstc(void *ignored) -{ - return (in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY) != 0; -} diff --git a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c deleted file mode 100644 index 8a735787a6e9932798c3776acd3de53d8451ac8e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/mv64x60_tty.c +++ /dev/null @@ -1,364 +0,0 @@ -/* - * Bootloader version of the embedded MPSC/UART driver for the Marvell 64x60. - * Note: Due to a GT64260A erratum, DMA will be used for UART input (via SDMA). - * - * Author: Mark A. Greer - * - * 2001 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* This code assumes that the data cache has been disabled (L1, L2, L3). */ - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_EV64360 -#include -u32 mv64x60_console_baud = EV64360_DEFAULT_BAUD; -u32 mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC; /* TCLK */ -u32 mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ; -#else -u32 mv64x60_console_baud = 9600; -u32 mv64x60_mpsc_clk_src = 8; /* TCLK */ -u32 mv64x60_mpsc_clk_freq = 100000000; -#endif - -extern void udelay(long); -static void stop_dma(int chan); - -static void __iomem *mv64x60_base = (void __iomem *)CONFIG_MV64X60_NEW_BASE; - -struct sdma_regs { - u32 sdc; - u32 sdcm; - u32 rx_desc; - u32 rx_buf_ptr; - u32 scrdp; - u32 tx_desc; - u32 sctdp; - u32 sftdp; -}; - -static struct sdma_regs sdma_regs[2]; - -#define SDMA_REGS_INIT(s, reg_base) { \ - (s)->sdc = (reg_base) + SDMA_SDC; \ - (s)->sdcm = (reg_base) + SDMA_SDCM; \ - (s)->rx_desc = (reg_base) + SDMA_RX_DESC; \ - (s)->rx_buf_ptr = (reg_base) + SDMA_RX_BUF_PTR; \ - (s)->scrdp = (reg_base) + SDMA_SCRDP; \ - (s)->tx_desc = (reg_base) + SDMA_TX_DESC; \ - (s)->sctdp = (reg_base) + SDMA_SCTDP; \ - (s)->sftdp = (reg_base) + SDMA_SFTDP; \ -} - -static u32 mpsc_base[2] = { MV64x60_MPSC_0_OFFSET, MV64x60_MPSC_1_OFFSET }; - -struct mv64x60_rx_desc { - u16 bufsize; - u16 bytecnt; - u32 cmd_stat; - u32 next_desc_ptr; - u32 buffer; -}; - -struct mv64x60_tx_desc { - u16 bytecnt; - u16 shadow; - u32 cmd_stat; - u32 next_desc_ptr; - u32 buffer; -}; - -#define MAX_RESET_WAIT 10000 -#define MAX_TX_WAIT 10000 - -#define RX_NUM_DESC 2 -#define TX_NUM_DESC 2 - -#define RX_BUF_SIZE 32 -#define TX_BUF_SIZE 32 - -static struct mv64x60_rx_desc rd[2][RX_NUM_DESC] __attribute__ ((aligned(32))); -static struct mv64x60_tx_desc td[2][TX_NUM_DESC] __attribute__ ((aligned(32))); - -static char rx_buf[2][RX_NUM_DESC * RX_BUF_SIZE] __attribute__ ((aligned(32))); -static char tx_buf[2][TX_NUM_DESC * TX_BUF_SIZE] __attribute__ ((aligned(32))); - -static int cur_rd[2] = { 0, 0 }; -static int cur_td[2] = { 0, 0 }; - -static char chan_initialized[2] = { 0, 0 }; - - -#define RX_INIT_RDP(rdp) { \ - (rdp)->bufsize = 2; \ - (rdp)->bytecnt = 0; \ - (rdp)->cmd_stat = SDMA_DESC_CMDSTAT_L | SDMA_DESC_CMDSTAT_F | \ - SDMA_DESC_CMDSTAT_O; \ -} - -#ifdef CONFIG_MV64360 -static u32 cpu2mem_tab[MV64x60_CPU2MEM_WINDOWS][2] = { - { MV64x60_CPU2MEM_0_BASE, MV64x60_CPU2MEM_0_SIZE }, - { MV64x60_CPU2MEM_1_BASE, MV64x60_CPU2MEM_1_SIZE }, - { MV64x60_CPU2MEM_2_BASE, MV64x60_CPU2MEM_2_SIZE }, - { MV64x60_CPU2MEM_3_BASE, MV64x60_CPU2MEM_3_SIZE } -}; - -static u32 com2mem_tab[MV64x60_CPU2MEM_WINDOWS][2] = { - { MV64360_MPSC2MEM_0_BASE, MV64360_MPSC2MEM_0_SIZE }, - { MV64360_MPSC2MEM_1_BASE, MV64360_MPSC2MEM_1_SIZE }, - { MV64360_MPSC2MEM_2_BASE, MV64360_MPSC2MEM_2_SIZE }, - { MV64360_MPSC2MEM_3_BASE, MV64360_MPSC2MEM_3_SIZE } -}; - -static u32 dram_selects[MV64x60_CPU2MEM_WINDOWS] = { 0xe, 0xd, 0xb, 0x7 }; -#endif - -unsigned long -serial_init(int chan, void *ignored) -{ - u32 mpsc_routing_base, sdma_base, brg_bcr, cdv; - int i; - - chan = (chan == 1); /* default to chan 0 if anything but 1 */ - - if (chan_initialized[chan]) - return chan; - - chan_initialized[chan] = 1; - - if (chan == 0) { - sdma_base = MV64x60_SDMA_0_OFFSET; - brg_bcr = MV64x60_BRG_0_OFFSET + BRG_BCR; - SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_0_OFFSET); - } else { - sdma_base = MV64x60_SDMA_1_OFFSET; - brg_bcr = MV64x60_BRG_1_OFFSET + BRG_BCR; - SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_1_OFFSET); - } - - mpsc_routing_base = MV64x60_MPSC_ROUTING_OFFSET; - - stop_dma(chan); - - /* Set up ring buffers */ - for (i=0; i= TX_NUM_DESC) - cur_td[com_port] = 0; - - *(unchar *)(tdp->buffer ^ 7) = c; - tdp->bytecnt = 1; - tdp->shadow = 1; - tdp->cmd_stat = SDMA_DESC_CMDSTAT_L | SDMA_DESC_CMDSTAT_F | - SDMA_DESC_CMDSTAT_O; - - out_le32(mv64x60_base + sdma_regs[com_port].sctdp, (int)tdp); - out_le32(mv64x60_base + sdma_regs[com_port].sftdp, (int)tdp); - out_le32(mv64x60_base + sdma_regs[com_port].sdcm, - in_le32(mv64x60_base + sdma_regs[com_port].sdcm) | - SDMA_SDCM_TXD); -} - -unsigned char -serial_getc(unsigned long com_port) -{ - struct mv64x60_rx_desc *rdp; - unchar c = '\0'; - - rdp = &rd[com_port][cur_rd[com_port]]; - - if ((rdp->cmd_stat & (SDMA_DESC_CMDSTAT_O|SDMA_DESC_CMDSTAT_ES)) == 0) { - c = *(unchar *)(rdp->buffer ^ 7); - RX_INIT_RDP(rdp); - if (++cur_rd[com_port] >= RX_NUM_DESC) - cur_rd[com_port] = 0; - } - - return c; -} - -int -serial_tstc(unsigned long com_port) -{ - struct mv64x60_rx_desc *rdp; - int loop_count = 0; - int rc = 0; - - rdp = &rd[com_port][cur_rd[com_port]]; - - /* Go through rcv descs until empty looking for one with data (no error)*/ - while (((rdp->cmd_stat & SDMA_DESC_CMDSTAT_O) == 0) && - (loop_count++ < RX_NUM_DESC)) { - - /* If there was an error, reinit the desc & continue */ - if ((rdp->cmd_stat & SDMA_DESC_CMDSTAT_ES) != 0) { - RX_INIT_RDP(rdp); - if (++cur_rd[com_port] >= RX_NUM_DESC) - cur_rd[com_port] = 0; - rdp = (struct mv64x60_rx_desc *)rdp->next_desc_ptr; - } else { - rc = 1; - break; - } - } - - return rc; -} - -void -serial_close(unsigned long com_port) -{ - stop_dma(com_port); -} diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c deleted file mode 100644 index 6ff2701598f24c804415886a2a0e97daae886c99..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/openbios.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2005 DENX Software Engineering - * Stefan Roese - * - * Based on original work by - * 2005 (c) SYSGO AG - g.jaeger@sysgo.com - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - */ - -#include -#include -#include -#include -#include -#ifdef CONFIG_40x -#include -#endif - -#if defined(CONFIG_BUBINGA) -#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */ -#else -#define BOARD_INFO_VECTOR 0xFFFE0B50 -#endif - -#ifdef CONFIG_40x -/* Supply a default Ethernet address for those eval boards that don't - * ship with one. This is an address from the MBX board I have, so - * it is unlikely you will find it on your network. - */ -static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 }; - -extern unsigned long timebase_period_ns; -#endif /* CONFIG_40x */ - -extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, - unsigned long cksum); - -/* We need to make sure that this is before the images to ensure - * that it's in a mapped location. */ -bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot"))); -bd_t *hold_residual = &hold_resid_buf; - -typedef struct openbios_board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ -#ifdef CONFIG_405EP - unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ -#else /* CONFIG_405EP */ - unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ -#endif /* CONFIG_405EP */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ -#ifdef CONFIG_405EP - unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */ - unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ -#endif /* CONFIG_405EP */ -} openbios_bd_t; - -void * -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - void *ign1, void *ign2) -{ -#ifdef CONFIG_40x - openbios_bd_t *openbios_bd = NULL; - openbios_bd_t *(*get_board_info)(void) = - (openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR); - - /* - * On 40x platforms we not only need the MAC-addresses, but also the - * clocks and memsize. Now try to get all values using the OpenBIOS - * "get_board_info()" callback. - */ - if ((openbios_bd = get_board_info()) != NULL) { - /* - * Copy bd_info from OpenBIOS struct into U-Boot struct - * used by kernel - */ - hold_residual->bi_memsize = openbios_bd->bi_memsize; - hold_residual->bi_intfreq = openbios_bd->bi_intfreq; - hold_residual->bi_busfreq = openbios_bd->bi_busfreq; - hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq; - memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6); -#ifdef CONFIG_405EP - memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6); - memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6); - hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq; - hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq; -#else /* CONFIG_405EP */ - memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6); -#endif /* CONFIG_405EP */ - } else { - /* Hmmm...better try to stuff some defaults. - */ - hold_residual->bi_memsize = 16 * 1024 * 1024; - hold_residual->bi_intfreq = 200000000; - hold_residual->bi_busfreq = 100000000; - hold_residual->bi_pci_busfreq = 66666666; - - /* - * Only supply one mac-address in this fallback - */ - memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6); -#ifdef CONFIG_405EP - hold_residual->bi_opbfreq = 50000000; - hold_residual->bi_procfreq = 200000000; -#endif /* CONFIG_405EP */ - } - - timebase_period_ns = 1000000000 / hold_residual->bi_intfreq; -#endif /* CONFIG_40x */ - -#ifdef CONFIG_440GP - /* simply copy the MAC addresses */ - memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6); - memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6); -#endif /* CONFIG_440GP */ - - decompress_kernel(load_addr, num_words, cksum); - - return (void *)hold_residual; -} diff --git a/arch/ppc/boot/simple/pci.c b/arch/ppc/boot/simple/pci.c deleted file mode 100644 index b0f673c8b7d96c60461d8c5f201bc378541fd2fb..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/pci.c +++ /dev/null @@ -1,274 +0,0 @@ -/* Stand alone funtions for QSpan Tundra support. - */ -#include -#include -#include - -extern void puthex(unsigned long val); -extern void puts(const char *); - -/* To map PCI devices, you first write 0xffffffff into the device - * base address registers. When the register is read back, the - * number of most significant '1' bits describes the amount of address - * space needed for mapping. If the most significant bit is not set, - * either the device does not use that address register, or it has - * a fixed address that we can't change. After the address is assigned, - * the command register has to be written to enable the card. - */ -typedef struct { - u_char pci_bus; - u_char pci_devfn; - ushort pci_command; - uint pci_addrs[6]; -} pci_map_t; - -/* We should probably dynamically allocate these structures. -*/ -#define MAX_PCI_DEVS 32 -int pci_dev_cnt; -pci_map_t pci_map[MAX_PCI_DEVS]; - -void pci_conf_write(int bus, int device, int func, int reg, uint writeval); -void pci_conf_read(int bus, int device, int func, int reg, void *readval); -void probe_addresses(int bus, int devfn); -void map_pci_addrs(void); - -extern int -qs_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char *val); -extern int -qs_pci_read_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short *val); -extern int -qs_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int *val); -extern int -qs_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char val); -extern int -qs_pci_write_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short val); -extern int -qs_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int val); - - -/* This is a really stripped version of PCI bus scan. All we are - * looking for are devices that exist. - */ -void -pci_scanner(int addr_probe) -{ - unsigned int devfn, l, class, bus_number; - unsigned char hdr_type, is_multi; - - is_multi = 0; - bus_number = 0; - for (devfn = 0; devfn < 0xff; ++devfn) { - /* The device numbers are comprised of upper 5 bits of - * device number and lower 3 bits of multi-function number. - */ - if ((devfn & 7) && !is_multi) { - /* Don't scan multifunction addresses if this is - * not a multifunction device. - */ - continue; - } - - /* Read the header to determine card type. - */ - qs_pci_read_config_byte(bus_number, devfn, PCI_HEADER_TYPE, - &hdr_type); - - /* If this is a base device number, check the header to - * determine if it is mulifunction. - */ - if ((devfn & 7) == 0) - is_multi = hdr_type & 0x80; - - /* Check to see if the board is really in the slot. - */ - qs_pci_read_config_dword(bus_number, devfn, PCI_VENDOR_ID, &l); - /* some broken boards return 0 if a slot is empty: */ - if (l == 0xffffffff || l == 0x00000000 || l == 0x0000ffff || - l == 0xffff0000) { - /* Nothing there. - */ - is_multi = 0; - continue; - } - - /* If we are not performing an address probe, - * just simply print out some information. - */ - if (!addr_probe) { - qs_pci_read_config_dword(bus_number, devfn, - PCI_CLASS_REVISION, &class); - - class >>= 8; /* upper 3 bytes */ - -#if 0 - printf("Found (%3d:%d): vendor 0x%04x, device 0x%04x, class 0x%06x\n", - (devfn >> 3), (devfn & 7), - (l & 0xffff), (l >> 16) & 0xffff, class); -#else - puts("Found ("); puthex(devfn >> 3); - puts(":"); puthex(devfn & 7); - puts("): vendor "); puthex(l & 0xffff); - puts(", device "); puthex((l >> 16) & 0xffff); - puts(", class "); puthex(class); puts("\n"); -#endif - } - else { - /* If this is a "normal" device, build address list. - */ - if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_NORMAL) - probe_addresses(bus_number, devfn); - } - } - - /* Now map the boards. - */ - if (addr_probe) - map_pci_addrs(); -} - -/* Probe addresses for the specified device. This is a destructive - * operation because it writes the registers. - */ -void -probe_addresses(bus, devfn) -{ - int i; - uint pciaddr; - ushort pcicmd; - pci_map_t *pm; - - if (pci_dev_cnt >= MAX_PCI_DEVS) { - puts("Too many PCI devices\n"); - return; - } - - pm = &pci_map[pci_dev_cnt++]; - - pm->pci_bus = bus; - pm->pci_devfn = devfn; - - for (i=0; i<6; i++) { - qs_pci_write_config_dword(bus, devfn, PCI_BASE_ADDRESS_0 + (i * 4), -1); - qs_pci_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_0 + (i * 4), - &pciaddr); - pm->pci_addrs[i] = pciaddr; - qs_pci_read_config_word(bus, devfn, PCI_COMMAND, &pcicmd); - pm->pci_command = pcicmd; - } -} - -/* Map the cards into the PCI space. The PCI has separate memory - * and I/O spaces. In addition, some memory devices require mapping - * below 1M. The least significant 4 bits of the address register - * provide information. If this is an I/O device, only the LS bit - * is used to indicate that, so I/O devices can be mapped to a two byte - * boundard. Memory addresses can be mapped to a 32 byte boundary. - * The QSpan implementations usually have a 1Gbyte space for each - * memory and I/O spaces. - * - * This isn't a terribly fancy algorithm. I just map the spaces from - * the top starting with the largest address space. When finished, - * the registers are written and the card enabled. - * - * While the Tundra can map a large address space on most boards, we - * need to be careful because it may overlap other devices (like IMMR). - */ -#define MEMORY_SPACE_SIZE 0x20000000 -#define IO_SPACE_SIZE 0x20000000 - -void -map_pci_addrs() -{ - uint pci_mem_top, pci_mem_low; - uint pci_io_top; - uint addr_mask, reg_addr, space; - int i, j; - pci_map_t *pm; - - pci_mem_top = MEMORY_SPACE_SIZE; - pci_io_top = IO_SPACE_SIZE; - pci_mem_low = (1 * 1024 * 1024); /* Below one meg addresses */ - - /* We can't map anything more than the maximum space, but test - * for it anyway to catch devices out of range. - */ - addr_mask = 0x80000000; - - do { - space = (~addr_mask) + 1; /* Size of the space */ - for (i=0; ipci_addrs[j]; - if ((reg_addr & 0x80000000) == 0) - continue; - if (reg_addr & PCI_BASE_ADDRESS_SPACE_IO) { - if ((reg_addr & PCI_BASE_ADDRESS_IO_MASK) != addr_mask) - continue; - if (pci_io_top < space) { - puts("Out of PCI I/O space\n"); - } - else { - pci_io_top -= space; - pm->pci_addrs[j] = pci_io_top; - pm->pci_command |= PCI_COMMAND_IO; - } - } - else { - if ((reg_addr & PCI_BASE_ADDRESS_MEM_MASK) != addr_mask) - continue; - - /* Memory space. Test if below 1M. - */ - if (reg_addr & PCI_BASE_ADDRESS_MEM_TYPE_1M) { - if (pci_mem_low < space) { - puts("Out of PCI 1M space\n"); - } - else { - pci_mem_low -= space; - pm->pci_addrs[j] = pci_mem_low; - } - } - else { - if (pci_mem_top < space) { - puts("Out of PCI Mem space\n"); - } - else { - pci_mem_top -= space; - pm->pci_addrs[j] = pci_mem_top; - } - } - pm->pci_command |= PCI_COMMAND_MEMORY; - } - } - } - addr_mask >>= 1; - addr_mask |= 0x80000000; - } while (addr_mask != 0xfffffffe); - - /* Now, run the list one more time and map everything. - */ - for (i=0; ipci_bus, pm->pci_devfn, - PCI_BASE_ADDRESS_0 + (j * 4), pm->pci_addrs[j]); - } - - /* Enable memory or address mapping. - */ - qs_pci_write_config_word(pm->pci_bus, pm->pci_devfn, PCI_COMMAND, - pm->pci_command); - } -} - diff --git a/arch/ppc/boot/simple/pibs.c b/arch/ppc/boot/simple/pibs.c deleted file mode 100644 index f39d01e0619de89080c704086c85047b6c84e466..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/pibs.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * 2004-2005 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include - -extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, - unsigned long cksum); - -/* We need to make sure that this is before the images to ensure - * that it's in a mapped location. - Tom */ -bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot"))); -bd_t *hold_residual = &hold_resid_buf; - -/* String functions lifted from lib/vsprintf.c and lib/ctype.c */ -unsigned char _ctype[] = { -_C,_C,_C,_C,_C,_C,_C,_C, /* 0-7 */ -_C,_C|_S,_C|_S,_C|_S,_C|_S,_C|_S,_C,_C, /* 8-15 */ -_C,_C,_C,_C,_C,_C,_C,_C, /* 16-23 */ -_C,_C,_C,_C,_C,_C,_C,_C, /* 24-31 */ -_S|_SP,_P,_P,_P,_P,_P,_P,_P, /* 32-39 */ -_P,_P,_P,_P,_P,_P,_P,_P, /* 40-47 */ -_D,_D,_D,_D,_D,_D,_D,_D, /* 48-55 */ -_D,_D,_P,_P,_P,_P,_P,_P, /* 56-63 */ -_P,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U, /* 64-71 */ -_U,_U,_U,_U,_U,_U,_U,_U, /* 72-79 */ -_U,_U,_U,_U,_U,_U,_U,_U, /* 80-87 */ -_U,_U,_U,_P,_P,_P,_P,_P, /* 88-95 */ -_P,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L, /* 96-103 */ -_L,_L,_L,_L,_L,_L,_L,_L, /* 104-111 */ -_L,_L,_L,_L,_L,_L,_L,_L, /* 112-119 */ -_L,_L,_L,_P,_P,_P,_P,_C, /* 120-127 */ -0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 128-143 */ -0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 144-159 */ -_S|_SP,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P, /* 160-175 */ -_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P, /* 176-191 */ -_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U, /* 192-207 */ -_U,_U,_U,_U,_U,_U,_U,_P,_U,_U,_U,_U,_U,_U,_U,_L, /* 208-223 */ -_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L, /* 224-239 */ -_L,_L,_L,_L,_L,_L,_L,_P,_L,_L,_L,_L,_L,_L,_L,_L}; /* 240-255 */ - -/** - * simple_strtoull - convert a string to an unsigned long long - * @cp: The start of the string - * @endp: A pointer to the end of the parsed string will be placed here - * @base: The number base to use - */ -unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base) -{ - unsigned long long result = 0,value; - - if (!base) { - base = 10; - if (*cp == '0') { - base = 8; - cp++; - if ((toupper(*cp) == 'X') && isxdigit(cp[1])) { - cp++; - base = 16; - } - } - } else if (base == 16) { - if (cp[0] == '0' && toupper(cp[1]) == 'X') - cp += 2; - } - while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) - ? toupper(*cp) : *cp)-'A'+10) < base) { - result = result*base + value; - cp++; - } - if (endp) - *endp = (char *)cp; - return result; -} - -void * -load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, - void *ign1, void *ign2) -{ - unsigned long long mac64; - - decompress_kernel(load_addr, num_words, cksum); - - mac64 = simple_strtoull((char *)PIBS_MAC_BASE, 0, 16); - memcpy(hold_residual->bi_enetaddr, (char *)&mac64+2, 6); -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) - mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET), 0, 16); - memcpy(hold_residual->bi_enet1addr, (char *)&mac64+2, 6); -#endif -#ifdef CONFIG_440GX - mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*2), 0, 16); - memcpy(hold_residual->bi_enet2addr, (char *)&mac64+2, 6); - mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*3), 0, 16); - memcpy(hold_residual->bi_enet3addr, (char *)&mac64+2, 6); -#endif - return (void *)hold_residual; -} diff --git a/arch/ppc/boot/simple/prepmap.c b/arch/ppc/boot/simple/prepmap.c deleted file mode 100644 index c871a4db6e8cd8b29bfaf2135276c9221376dc52..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/prepmap.c +++ /dev/null @@ -1,12 +0,0 @@ -/* - * 2004 (C) IBM. This file is licensed under the terms of the GNU General - * Public License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - -void board_isa_init(void) -{ - ISA_init(0x80000000); -} diff --git a/arch/ppc/boot/simple/qspan_pci.c b/arch/ppc/boot/simple/qspan_pci.c deleted file mode 100644 index d2966d032a4c80b5383658b3b607676b013ff8a5..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/qspan_pci.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * LinuxPPC arch/ppc/kernel/qspan_pci.c Dan Malek (dmalek@jlc.net) - * - * QSpan Motorola bus to PCI bridge. The config address register - * is located 0x500 from the base of the bridge control/status registers. - * The data register is located at 0x504. - * This is a two step operation. First, the address register is written, - * then the data register is read/written as required. - * I don't know what to do about interrupts (yet). - */ - -#include -#include -#include -#include - -/* - * When reading the configuration space, if something does not respond - * the bus times out and we get a machine check interrupt. So, the - * good ol' exception tables come to mind to trap it and return some - * value. - * - * On an error we just return a -1, since that is what the caller wants - * returned if nothing is present. I copied this from __get_user_asm, - * with the only difference of returning -1 instead of EFAULT. - * There is an associated hack in the machine check trap code. - * - * The QSPAN is also a big endian device, that is it makes the PCI - * look big endian to us. This presents a problem for the Linux PCI - * functions, which assume little endian. For example, we see the - * first 32-bit word like this: - * ------------------------ - * | Device ID | Vendor ID | - * ------------------------ - * If we read/write as a double word, that's OK. But in our world, - * when read as a word, device ID is at location 0, not location 2 as - * the little endian PCI would believe. We have to switch bits in - * the PCI addresses given to us to get the data to/from the correct - * byte lanes. - * - * The QSPAN only supports 4 bits of "slot" in the dev_fn instead of 5. - * It always forces the MS bit to zero. Therefore, dev_fn values - * greater than 128 are returned as "no device found" errors. - * - * The QSPAN can only perform long word (32-bit) configuration cycles. - * The "offset" must have the two LS bits set to zero. Read operations - * require we read the entire word and then sort out what should be - * returned. Write operations other than long word require that we - * read the long word, update the proper word or byte, then write the - * entire long word back. - * - * PCI Bridge hack. We assume (correctly) that bus 0 is the primary - * PCI bus from the QSPAN. If we are called with a bus number other - * than zero, we create a Type 1 configuration access that a downstream - * PCI bridge will interpret. - */ - -#define __get_pci_config(x, addr, op) \ - __asm__ __volatile__( \ - "1: "op" %0,0(%1)\n" \ - " eieio\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r"(x) : "r"(addr)) - -#define QS_CONFIG_ADDR ((volatile uint *)(PCI_CSR_ADDR + 0x500)) -#define QS_CONFIG_DATA ((volatile uint *)(PCI_CSR_ADDR + 0x504)) - -#define mk_config_addr(bus, dev, offset) \ - (((bus)<<16) | ((dev)<<8) | (offset & 0xfc)) - -#define mk_config_type1(bus, dev, offset) \ - mk_config_addr(bus, dev, offset) | 1; - -/* Initialize the QSpan device registers after power up. -*/ -void -qspan_init(void) -{ - uint *qptr; - - - - qptr = (uint *)PCI_CSR_ADDR; - - /* PCI Configuration/status. Upper bits written to clear - * pending interrupt or status. Lower bits enable QSPAN as - * PCI master, enable memory and I/O cycles, and enable PCI - * parity error checking. - * IMPORTANT: The last two bits of this word enable PCI - * master cycles into the QBus. The QSpan is broken and can't - * meet the timing specs of the PQ bus for this to work. Therefore, - * if you don't have external bus arbitration, you can't use - * this function. - */ -#ifdef EXTERNAL_PQ_ARB - qptr[1] = 0xf9000147; -#else - qptr[1] = 0xf9000144; -#endif - - /* PCI Misc configuration. Set PCI latency timer resolution - * of 8 cycles, set cache size to 4 x 32. - */ - qptr[3] = 0; - - /* Set up PCI Target address mapping. Enable, Posted writes, - * 2Gbyte space (processor memory controller determines actual size). - */ - qptr[64] = 0x8f000080; - - /* Map processor 0x80000000 to PCI 0x00000000. - * Processor address bit 1 determines I/O type access (0x80000000) - * or memory type access (0xc0000000). - */ - qptr[65] = 0x80000000; - - /* Enable error logging and clear any pending error status. - */ - qptr[80] = 0x90000000; - - qptr[512] = 0x000c0003; - - /* Set up Qbus slave image. - */ - qptr[960] = 0x01000000; - qptr[961] = 0x000000d1; - qptr[964] = 0x00000000; - qptr[965] = 0x000000d1; - -} - -/* Functions to support PCI bios-like features to read/write configuration - * space. If the function fails for any reason, a -1 (0xffffffff) value - * must be returned. - */ -#define DEVICE_NOT_FOUND (-1) -#define SUCCESSFUL 0 - -int qs_pci_read_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char *val) -{ - uint temp; - u_char *cp; - - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xff; - return DEVICE_NOT_FOUND; - } - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_pci_config(temp, QS_CONFIG_DATA, "lwz"); - - offset ^= 0x03; - cp = ((u_char *)&temp) + (offset & 0x03); - *val = *cp; - return SUCCESSFUL; -} - -int qs_pci_read_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short *val) -{ - uint temp; - ushort *sp; - - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xffff; - return DEVICE_NOT_FOUND; - } - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_pci_config(temp, QS_CONFIG_DATA, "lwz"); - offset ^= 0x02; - - sp = ((ushort *)&temp) + ((offset >> 1) & 1); - *val = *sp; - return SUCCESSFUL; -} - -int qs_pci_read_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int *val) -{ - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xffffffff; - return DEVICE_NOT_FOUND; - } - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_pci_config(*val, QS_CONFIG_DATA, "lwz"); - return SUCCESSFUL; -} - -int qs_pci_write_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char val) -{ - uint temp; - u_char *cp; - - if ((bus > 7) || (dev_fn > 127)) - return DEVICE_NOT_FOUND; - - qs_pci_read_config_dword(bus, dev_fn, offset, &temp); - - offset ^= 0x03; - cp = ((u_char *)&temp) + (offset & 0x03); - *cp = val; - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *QS_CONFIG_DATA = temp; - - return SUCCESSFUL; -} - -int qs_pci_write_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short val) -{ - uint temp; - ushort *sp; - - if ((bus > 7) || (dev_fn > 127)) - return DEVICE_NOT_FOUND; - - qs_pci_read_config_dword(bus, dev_fn, offset, &temp); - - offset ^= 0x02; - sp = ((ushort *)&temp) + ((offset >> 1) & 1); - *sp = val; - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *QS_CONFIG_DATA = temp; - - return SUCCESSFUL; -} - -int qs_pci_write_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int val) -{ - if ((bus > 7) || (dev_fn > 127)) - return DEVICE_NOT_FOUND; - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *(unsigned int *)QS_CONFIG_DATA = val; - - return SUCCESSFUL; -} - diff --git a/arch/ppc/boot/simple/relocate.S b/arch/ppc/boot/simple/relocate.S deleted file mode 100644 index 1bbbcd2f2bcbd44c033329f479cc0def95ce7630..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/relocate.S +++ /dev/null @@ -1,213 +0,0 @@ -/* - * This is the common part of the loader relocation and initialization - * process. All of the board/processor specific initialization is - * done before we get here. - * - * Author: Tom Rini - * trini@mvista.com - * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others). - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include - -#define GETSYM(reg, sym) \ - lis reg, sym@h; ori reg, reg, sym@l - - .text - /* We get called from the early initialization code. - * Register 3 has the address where we were loaded, - * Register 4 contains any residual data passed from the - * boot rom. - */ - .globl relocate -relocate: - /* Save r3, r4 for later. - * The r8/r11 are legacy registers so I don't have to - * rewrite the code below :-). - */ - mr r8, r3 - mr r11, r4 - - /* compute the size of the whole image in words. */ - GETSYM(r4,start) - GETSYM(r5,end) - - addi r5,r5,3 /* round up */ - sub r5,r5,r4 /* end - start */ - srwi r5,r5,2 - mr r7,r5 /* Save for later use. */ - - /* - * Check if we need to relocate ourselves to the link addr or were - * we loaded there to begin with. - */ - cmpw cr0,r3,r4 - beq start_ldr /* If 0, we don't need to relocate */ - - /* Move this code somewhere safe. This is max(load + size, end) - * r8 == load address - */ - GETSYM(r4, start) - GETSYM(r5, end) - - sub r6,r5,r4 - add r6,r8,r6 /* r6 == phys(load + size) */ - - cmpw r5,r6 - bgt 1f - b 2f -1: - mr r6, r5 -2: - /* dest is in r6 */ - /* Ensure alignment --- this code is precautionary */ - addi r6,r6,4 - li r5,0x0003 - andc r6,r6,r5 - - /* Find physical address and size of do_relocate */ - GETSYM(r5, __relocate_start) - GETSYM(r4, __relocate_end) - GETSYM(r3, start) - - /* Size to copy */ - sub r4,r4,r5 - srwi r4,r4,2 - - /* Src addr to copy (= __relocate_start - start + where_loaded) */ - sub r3,r5,r3 - add r5,r8,r3 - - /* Save dest */ - mr r3, r6 - - /* Do the copy */ - mtctr r4 -3: lwz r4,0(r5) - stw r4,0(r3) - addi r3,r3,4 - addi r5,r5,4 - bdnz 3b - - GETSYM(r4, __relocate_start) - GETSYM(r5, do_relocate) - - sub r4,r5,r4 /* Get entry point for do_relocate in */ - add r6,r6,r4 /* relocated section */ - - /* This will return to the relocated do_relocate */ - mtlr r6 - b flush_instruction_cache - - .section ".relocate_code","xa" - -do_relocate: - /* We have 2 cases --- start < load, or start > load - * This determines whether we copy from the end, or the start. - * Its easier to have 2 loops than to have paramaterised - * loops. Sigh. - */ - li r6,0 /* Clear checksum */ - mtctr r7 /* Setup for a loop */ - - GETSYM(r4, start) - mr r3,r8 /* Get the load addr */ - - cmpw cr0,r4,r3 /* If we need to copy from the end, do so */ - bgt do_relocate_from_end - -do_relocate_from_start: -1: lwz r5,0(r3) /* Load and decrement */ - stw r5,0(r4) /* Store and decrement */ - addi r3,r3,4 - addi r4,r4,4 - xor r6,r6,r5 /* Update checksum */ - bdnz 1b /* Are we done? */ - b do_relocate_out /* Finished */ - -do_relocate_from_end: - GETSYM(r3, end) - slwi r4,r7,2 - add r4,r8,r4 /* Get the physical end */ -1: lwzu r5,-4(r4) - stwu r5, -4(r3) - xor r6,r6,r5 - bdnz 1b - -do_relocate_out: - GETSYM(r3,start_ldr) - mtlr r3 /* Easiest way to do an absolute jump */ -/* Some boards don't boot up with the I-cache enabled. Do that - * now because the decompress runs much faster that way. - * As a side effect, we have to ensure the data cache is not enabled - * so we can access the serial I/O without trouble. - */ - b flush_instruction_cache - - .previous - -start_ldr: -/* Clear all of BSS and set up stack for C calls */ - lis r3,__bss_start@h - ori r3,r3,__bss_start@l - lis r4,end@h - ori r4,r4,end@l - subi r3,r3,4 - subi r4,r4,4 - li r0,0 -50: stwu r0,4(r3) - cmpw cr0,r3,r4 - blt 50b -90: mr r9,r1 /* Save old stack pointer (in case it matters) */ - lis r1,.stack@h - ori r1,r1,.stack@l - addi r1,r1,4096*2 - subi r1,r1,256 - li r2,0x000F /* Mask pointer to 16-byte boundary */ - andc r1,r1,r2 - - /* - * Exec kernel loader - */ - mr r3,r8 /* Load point */ - mr r4,r7 /* Program length */ - mr r5,r6 /* Checksum */ - mr r6,r11 /* Residual data */ - mr r7,r25 /* Validated OFW interface */ - bl load_kernel - - /* - * Make sure the kernel knows we don't have things set in - * registers. -- Tom - */ - li r4,0 - li r5,0 - li r6,0 - - /* - * Start at the begining. - */ -#ifdef CONFIG_PPC_PREP - li r9,0xc - mtlr r9 - /* tell kernel we're prep, by putting 0xdeadc0de at KERNELLOAD, - * and tell the kernel to start on the 4th instruction since we - * overwrite the first 3 sometimes (which are 'nop'). - */ - lis r10,0xdeadc0de@h - ori r10,r10,0xdeadc0de@l - li r9,0 - stw r10,0(r9) -#else - li r9,0 - mtlr r9 -#endif - blr - - .comm .stack,4096*2,4 diff --git a/arch/ppc/boot/simple/rw4/ppc_40x.h b/arch/ppc/boot/simple/rw4/ppc_40x.h deleted file mode 100644 index 561fb26f5a93cbe720cd70445729ec7268c7c315..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/rw4/ppc_40x.h +++ /dev/null @@ -1,664 +0,0 @@ -/*----------------------------------------------------------------------------+ -| This source code has been made available to you by IBM on an AS-IS -| basis. Anyone receiving this source is licensed under IBM -| copyrights to use it in any way he or she deems fit, including -| copying it, modifying it, compiling it, and redistributing it either -| with or without modifications. No license under IBM patents or -| patent applications is to be implied by the copyright license. -| -| Any user of this software should understand that IBM cannot provide -| technical support for this software and will not be responsible for -| any consequences resulting from the use of this software. -| -| Any person who transfers this source code or any derivative work -| must include the IBM copyright notice, this paragraph, and the -| preceding two paragraphs in the transferred software. -| -| COPYRIGHT I B M CORPORATION 1997 -| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M -+----------------------------------------------------------------------------*/ -/*----------------------------------------------------------------------------+ -| Author: Tony J. Cerreto -| Component: Assembler include file. -| File: ppc_40x.h -| Purpose: Include file containing PPC DCR defines. -| -| Changes: -| Date Author Comment -| --------- ------ -------------------------------------------------------- -| 01-Mar-00 tjc Created -+----------------------------------------------------------------------------*/ -/* added by linguohui*/ -#define MW -/*----------------------------------------------------------------------------+ -| PPC Special purpose registers Numbers -+----------------------------------------------------------------------------*/ -#define ccr0 0x3b3 /* core configuration reg */ -#define ctr 0x009 /* count register */ -#define ctrreg 0x009 /* count register */ -#define dbcr0 0x3f2 /* debug control register 0 */ -#define dbcr1 0x3bd /* debug control register 1 */ -#define dbsr 0x3f0 /* debug status register */ -#define dccr 0x3fa /* data cache control reg. */ -#define dcwr 0x3ba /* data cache write-thru reg */ -#define dear 0x3d5 /* data exception address reg */ -#define esr 0x3d4 /* exception syndrome register */ -#define evpr 0x3d6 /* exception vector prefix reg */ -#define iccr 0x3fb /* instruction cache cntrl re */ -#define icdbdr 0x3d3 /* instr cache dbug data reg */ -#define lrreg 0x008 /* link register */ -#define pid 0x3b1 /* process id reg */ -#define pit 0x3db /* programmable interval time */ -#define pvr 0x11f /* processor version register */ -#define sgr 0x3b9 /* storage guarded reg */ -#define sler 0x3bb /* storage little endian reg */ -#define sprg0 0x110 /* special general purpose 0 */ -#define sprg1 0x111 /* special general purpose 1 */ -#define sprg2 0x112 /* special general purpose 2 */ -#define sprg3 0x113 /* special general purpose 3 */ -#define sprg4 0x114 /* special general purpose 4 */ -#define sprg5 0x115 /* special general purpose 5 */ -#define sprg6 0x116 /* special general purpose 6 */ -#define sprg7 0x117 /* special general purpose 7 */ -#define srr0 0x01a /* save/restore register 0 */ -#define srr1 0x01b /* save/restore register 1 */ -#define srr2 0x3de /* save/restore register 2 */ -#define srr3 0x3df /* save/restore register 3 */ -#define tbhi 0x11D -#define tblo 0x11C -#define tcr 0x3da /* timer control register */ -#define tsr 0x3d8 /* timer status register */ -#define xerreg 0x001 /* fixed point exception */ -#define xer 0x001 /* fixed point exception */ -#define zpr 0x3b0 /* zone protection reg */ - -/*----------------------------------------------------------------------------+ -| Decompression Controller -+----------------------------------------------------------------------------*/ -#define kiar 0x014 /* Decompression cntl addr reg */ -#define kidr 0x015 /* Decompression cntl data reg */ -#define kitor0 0x00 /* index table origin Reg 0 */ -#define kitor1 0x01 /* index table origin Reg 1 */ -#define kitor2 0x02 /* index table origin Reg 2 */ -#define kitor3 0x03 /* index table origin Reg 3 */ -#define kaddr0 0x04 /* addr decode Definition Reg 0 */ -#define kaddr1 0x05 /* addr decode Definition Reg 1 */ -#define kconf 0x40 /* Decompression cntl config reg */ -#define kid 0x41 /* Decompression cntl id reg */ -#define kver 0x42 /* Decompression cntl ver number */ -#define kpear 0x50 /* bus error addr reg (PLB) */ -#define kbear 0x51 /* bus error addr reg (DCP-EBC) */ -#define kesr0 0x52 /* bus error status reg 0 */ - -/*----------------------------------------------------------------------------+ -| Romeo Specific Device Control Register Numbers. -+----------------------------------------------------------------------------*/ -#ifndef VESTA -#define cdbcr 0x3d7 /* cache debug cntrl reg */ - -#define a_latcnt 0x1a9 /* PLB Latency count */ -#define a_tgval 0x1ac /* tone generation value */ -#define a_plb_pr 0x1bf /* PLB priority */ - -#define cic_sel1 0x031 /* select register 1 */ -#define cic_sel2 0x032 /* select register 2 */ - -#define clkgcrst 0x122 /* chip reset register */ - -#define cp_cpmsr 0x100 /*rstatus register */ -#define cp_cpmer 0x101 /* enable register */ - -#define dcp_kiar 0x190 /* indirect address register */ -#define dcp_kidr 0x191 /* indirect data register */ - -#define hsmc_mcgr 0x1c0 /* HSMC global register */ -#define hsmc_mcbesr 0x1c1 /* bus error status register */ -#define hsmc_mcbear 0x1c2 /* bus error address register*/ -#define hsmc_mcbr0 0x1c4 /* SDRAM sub-ctrl bank reg 0 */ -#define hsmc_mccr0 0x1c5 /* SDRAM sub-ctrl ctrl reg 0 */ -#define hsmc_mcbr1 0x1c7 /* SDRAM sub-ctrl bank reg 1 */ -#define hsmc_mccr1 0x1c8 /* SDRAM sub-ctrl ctrl reg 1 */ -#define hsmc_sysr 0x1d1 /* system register */ -#define hsmc_data 0x1d2 /* data register */ -#define hsmc_mccrr 0x1d3 /* refresh register */ - -#define ocm_pbar 0x1E0 /* base address register */ - -#define plb0_pacr0 0x057 /* PLB arbiter control reg */ -#define plb1_pacr1 0x067 /* PLB arbiter control reg */ - -#define v_displb 0x157 /* set left border of display*/ -#define v_disptb 0x158 /* top border of display */ -#define v_osd_la 0x159 /* first link address for OSD*/ -#define v_ptsdlta 0x15E /* PTS delta register */ -#define v_v0base 0x16C /* base mem add for VBI-0 */ -#define v_v1base 0x16D /* base mem add for VBI-1 */ -#define v_osbase 0x16E /* base mem add for OSD data */ -#endif - -/*----------------------------------------------------------------------------+ -| Vesta Device Control Register Numbers. -+----------------------------------------------------------------------------*/ -/*----------------------------------------------------------------------------+ -| Cross bar switch. -+----------------------------------------------------------------------------*/ -#define cbs0_cr 0x010 /* CBS configuration register */ - -/*----------------------------------------------------------------------------+ -| DCR external master (DCRX). -+----------------------------------------------------------------------------*/ -#define dcrx0_icr 0x020 /* internal control register */ -#define dcrx0_isr 0x021 /* internal status register */ -#define dcrx0_ecr 0x022 /* external control register */ -#define dcrx0_esr 0x023 /* external status register */ -#define dcrx0_tar 0x024 /* target address register */ -#define dcrx0_tdr 0x025 /* target data register */ -#define dcrx0_igr 0x026 /* interrupt generation register */ -#define dcrx0_bcr 0x027 /* buffer control register */ - -/*----------------------------------------------------------------------------+ -| Chip interconnect configuration. -+----------------------------------------------------------------------------*/ -#define cic0_cr 0x030 /* CIC control register */ -#define cic0_vcr 0x033 /* video macro control reg */ -#define cic0_sel3 0x035 /* select register 3 */ - -/*----------------------------------------------------------------------------+ -| Chip interconnect configuration. -+----------------------------------------------------------------------------*/ -#define sgpo0_sgpO 0x036 /* simplified GPIO output */ -#define sgpo0_gpod 0x037 /* simplified GPIO open drain */ -#define sgpo0_gptc 0x038 /* simplified GPIO tristate cntl */ -#define sgpo0_gpi 0x039 /* simplified GPIO input */ - -/*----------------------------------------------------------------------------+ -| Universal interrupt controller. -+----------------------------------------------------------------------------*/ -#define uic0_sr 0x040 /* status register */ -#define uic0_srs 0x041 /* status register set */ -#define uic0_er 0x042 /* enable register */ -#define uic0_cr 0x043 /* critical register */ -#define uic0_pr 0x044 /* parity register */ -#define uic0_tr 0x045 /* triggering register */ -#define uic0_msr 0x046 /* masked status register */ -#define uic0_vr 0x047 /* vector register */ -#define uic0_vcr 0x048 /* enable config register */ - -/*----------------------------------------------------------------------------+ -| PLB 0 and 1. -+----------------------------------------------------------------------------*/ -#define pb0_pesr 0x054 /* PLB error status reg 0 */ -#define pb0_pesrs 0x055 /* PLB error status reg 0 set */ -#define pb0_pear 0x056 /* PLB error address reg */ - -#define pb1_pesr 0x064 /* PLB error status reg 1 */ -#define pb1_pesrs 0x065 /* PLB error status reg 1 set */ -#define pb1_pear 0x066 /* PLB error address reg */ - -/*----------------------------------------------------------------------------+ -| EBIU DCR registers. -+----------------------------------------------------------------------------*/ -#define ebiu0_brcrh0 0x070 /* bus region register 0 high */ -#define ebiu0_brcrh1 0x071 /* bus region register 1 high */ -#define ebiu0_brcrh2 0x072 /* bus region register 2 high */ -#define ebiu0_brcrh3 0x073 /* bus region register 3 high */ -#define ebiu0_brcrh4 0x074 /* bus region register 4 high */ -#define ebiu0_brcrh5 0x075 /* bus region register 5 high */ -#define ebiu0_brcrh6 0x076 /* bus region register 6 high */ -#define ebiu0_brcrh7 0x077 /* bus region register 7 high */ -#define ebiu0_brcr0 0x080 /* bus region register 0 */ -#define ebiu0_brcr1 0x081 /* bus region register 1 */ -#define ebiu0_brcr2 0x082 /* bus region register 2 */ -#define ebiu0_brcr3 0x083 /* bus region register 3 */ -#define ebiu0_brcr4 0x084 /* bus region register 4 */ -#define ebiu0_brcr5 0x085 /* bus region register 5 */ -#define ebiu0_brcr6 0x086 /* bus region register 6 */ -#define ebiu0_brcr7 0x087 /* bus region register 7 */ -#define ebiu0_bear 0x090 /* bus error address register */ -#define ebiu0_besr 0x091 /* bus error syndrome reg */ -#define ebiu0_besr0s 0x093 /* bus error syndrome reg */ -#define ebiu0_biucr 0x09a /* bus interface control reg */ - -/*----------------------------------------------------------------------------+ -| OPB bridge. -+----------------------------------------------------------------------------*/ -#define opbw0_gesr 0x0b0 /* error status reg */ -#define opbw0_gesrs 0x0b1 /* error status reg */ -#define opbw0_gear 0x0b2 /* error address reg */ - -/*----------------------------------------------------------------------------+ -| DMA. -+----------------------------------------------------------------------------*/ -#define dma0_cr0 0x0c0 /* DMA channel control reg 0 */ -#define dma0_ct0 0x0c1 /* DMA count register 0 */ -#define dma0_da0 0x0c2 /* DMA destination addr reg 0 */ -#define dma0_sa0 0x0c3 /* DMA source addr register 0 */ -#define dma0_cc0 0x0c4 /* DMA chained count 0 */ -#define dma0_cr1 0x0c8 /* DMA channel control reg 1 */ -#define dma0_ct1 0x0c9 /* DMA count register 1 */ -#define dma0_da1 0x0ca /* DMA destination addr reg 1 */ -#define dma0_sa1 0x0cb /* DMA source addr register 1 */ -#define dma0_cc1 0x0cc /* DMA chained count 1 */ -#define dma0_cr2 0x0d0 /* DMA channel control reg 2 */ -#define dma0_ct2 0x0d1 /* DMA count register 2 */ -#define dma0_da2 0x0d2 /* DMA destination addr reg 2 */ -#define dma0_sa2 0x0d3 /* DMA source addr register 2 */ -#define dma0_cc2 0x0d4 /* DMA chained count 2 */ -#define dma0_cr3 0x0d8 /* DMA channel control reg 3 */ -#define dma0_ct3 0x0d9 /* DMA count register 3 */ -#define dma0_da3 0x0da /* DMA destination addr reg 3 */ -#define dma0_sa3 0x0db /* DMA source addr register 3 */ -#define dma0_cc3 0x0dc /* DMA chained count 3 */ -#define dma0_sr 0x0e0 /* DMA status register */ -#define dma0_srs 0x0e1 /* DMA status register */ -#define dma0_s1 0x031 /* DMA select1 register */ -#define dma0_s2 0x032 /* DMA select2 register */ - -/*---------------------------------------------------------------------------+ -| Clock and power management. -+----------------------------------------------------------------------------*/ -#define cpm0_fr 0x102 /* force register */ - -/*----------------------------------------------------------------------------+ -| Serial Clock Control. -+----------------------------------------------------------------------------*/ -#define ser0_ccr 0x120 /* serial clock control register */ - -/*----------------------------------------------------------------------------+ -| Audio Clock Control. -+----------------------------------------------------------------------------*/ -#define aud0_apcr 0x121 /* audio clock ctrl register */ - -/*----------------------------------------------------------------------------+ -| DENC. -+----------------------------------------------------------------------------*/ -#define denc0_idr 0x130 /* DENC ID register */ -#define denc0_cr1 0x131 /* control register 1 */ -#define denc0_rr1 0x132 /* microvision 1 (reserved 1) */ -#define denc0_cr2 0x133 /* control register 2 */ -#define denc0_rr2 0x134 /* microvision 2 (reserved 2) */ -#define denc0_rr3 0x135 /* microvision 3 (reserved 3) */ -#define denc0_rr4 0x136 /* microvision 4 (reserved 4) */ -#define denc0_rr5 0x137 /* microvision 5 (reserved 5) */ -#define denc0_ccdr 0x138 /* closed caption data */ -#define denc0_cccr 0x139 /* closed caption control */ -#define denc0_trr 0x13A /* teletext request register */ -#define denc0_tosr 0x13B /* teletext odd field line se */ -#define denc0_tesr 0x13C /* teletext even field line s */ -#define denc0_rlsr 0x13D /* RGB rhift left register */ -#define denc0_vlsr 0x13E /* video level shift register */ -#define denc0_vsr 0x13F /* video scaling register */ - -/*----------------------------------------------------------------------------+ -| Video decoder. Suspect 0x179, 0x169, 0x16a, 0x152 (rc). -+----------------------------------------------------------------------------*/ -#define vid0_ccntl 0x140 /* control decoder operation */ -#define vid0_cmode 0x141 /* video operational mode */ -#define vid0_sstc0 0x142 /* STC high order bits 31:0 */ -#define vid0_sstc1 0x143 /* STC low order bit 32 */ -#define vid0_spts0 0x144 /* PTS high order bits 31:0 */ -#define vid0_spts1 0x145 /* PTS low order bit 32 */ -#define vid0_fifo 0x146 /* FIFO data port */ -#define vid0_fifos 0x147 /* FIFO status */ -#define vid0_cmd 0x148 /* send command to decoder */ -#define vid0_cmdd 0x149 /* port for command params */ -#define vid0_cmdst 0x14A /* command status */ -#define vid0_cmdad 0x14B /* command address */ -#define vid0_procia 0x14C /* instruction store */ -#define vid0_procid 0x14D /* data port for I_Store */ -#define vid0_osdm 0x151 /* OSD mode control */ -#define vid0_hosti 0x152 /* base interrupt register */ -#define vid0_mask 0x153 /* interrupt mask register */ -#define vid0_dispm 0x154 /* operational mode for Disp */ -#define vid0_dispd 0x155 /* setting for 'Sync' delay */ -#define vid0_vbctl 0x156 /* VBI */ -#define vid0_ttxctl 0x157 /* teletext control */ -#define vid0_disptb 0x158 /* display left/top border */ -#define vid0_osdgla 0x159 /* Graphics plane link addr */ -#define vid0_osdila 0x15A /* Image plane link addr */ -#define vid0_rbthr 0x15B /* rate buffer threshold */ -#define vid0_osdcla 0x15C /* Cursor link addr */ -#define vid0_stcca 0x15D /* STC common address */ -#define vid0_ptsctl 0x15F /* PTS Control */ -#define vid0_wprot 0x165 /* write protect for I_Store */ -#define vid0_vcqa 0x167 /* video clip queued block Ad */ -#define vid0_vcql 0x168 /* video clip queued block Le */ -#define vid0_blksz 0x169 /* block size bytes for copy op */ -#define vid0_srcad 0x16a /* copy source address bits 6-31 */ -#define vid0_udbas 0x16B /* base mem add for user data */ -#define vid0_vbibas 0x16C /* base mem add for VBI 0/1 */ -#define vid0_osdibas 0x16D /* Image plane base address */ -#define vid0_osdgbas 0x16E /* Graphic plane base address */ -#define vid0_rbbase 0x16F /* base mem add for video buf */ -#define vid0_dramad 0x170 /* DRAM address */ -#define vid0_dramdt 0x171 /* data port for DRAM access */ -#define vid0_dramcs 0x172 /* DRAM command and statusa */ -#define vid0_vcwa 0x173 /* v clip work address */ -#define vid0_vcwl 0x174 /* v clip work length */ -#define vid0_mseg0 0x175 /* segment address 0 */ -#define vid0_mseg1 0x176 /* segment address 1 */ -#define vid0_mseg2 0x177 /* segment address 2 */ -#define vid0_mseg3 0x178 /* segment address 3 */ -#define vid0_fbbase 0x179 /* frame buffer base memory */ -#define vid0_osdcbas 0x17A /* Cursor base addr */ -#define vid0_lboxtb 0x17B /* top left border */ -#define vid0_trdly 0x17C /* transparency gate delay */ -#define vid0_sbord 0x17D /* left/top small pict. bord. */ -#define vid0_zoffs 0x17E /* hor/ver zoom window */ -#define vid0_rbsz 0x17F /* rate buffer size read */ - -/*----------------------------------------------------------------------------+ -| Transport demultiplexer. -+----------------------------------------------------------------------------*/ -#define xpt0_lr 0x180 /* demux location register */ -#define xpt0_data 0x181 /* demux data register */ -#define xpt0_ir 0x182 /* demux interrupt register */ - -#define xpt0_config1 0x0000 /* configuration 1 */ -#define xpt0_control1 0x0001 /* control 1 */ -#define xpt0_festat 0x0002 /* Front-end status */ -#define xpt0_feimask 0x0003 /* Front_end interrupt Mask */ -#define xpt0_ocmcnfg 0x0004 /* OCM Address */ -#define xpt0_settapi 0x0005 /* Set TAP Interrupt */ - -#define xpt0_pcrhi 0x0010 /* PCR High */ -#define xpt0_pcrlow 0x0011 /* PCR Low */ -#define xpt0_lstchi 0x0012 /* Latched STC High */ -#define xpt0_lstclow 0x0013 /* Latched STC Low */ -#define xpt0_stchi 0x0014 /* STC High */ -#define xpt0_stclow 0x0015 /* STC Low */ -#define xpt0_pwm 0x0016 /* PWM */ -#define xpt0_pcrstct 0x0017 /* PCR-STC Threshold */ -#define xpt0_pcrstcd 0x0018 /* PCR-STC Delta */ -#define xpt0_stccomp 0x0019 /* STC Compare */ -#define xpt0_stccmpd 0x001a /* STC Compare Disarm */ - -#define xpt0_dsstat 0x0048 /* Descrambler Status */ -#define xpt0_dsimask 0x0049 /* Descrambler Interrupt Mask */ - -#define xpt0_vcchng 0x01f0 /* Video Channel Change */ -#define xpt0_acchng 0x01f1 /* Audio Channel Change */ -#define xpt0_axenable 0x01fe /* Aux PID Enables */ -#define xpt0_pcrpid 0x01ff /* PCR PID */ - -#define xpt0_config2 0x1000 /* Configuration 2 */ -#define xpt0_pbuflvl 0x1002 /* Packet Buffer Level */ -#define xpt0_intmask 0x1003 /* Interrupt Mask */ -#define xpt0_plbcnfg 0x1004 /* PLB Configuration */ - -#define xpt0_qint 0x1010 /* Queues Interrupts */ -#define xpt0_qintmsk 0x1011 /* Queues Interrupts Mask */ -#define xpt0_astatus 0x1012 /* Audio Status */ -#define xpt0_aintmask 0x1013 /* Audio Interrupt Mask */ -#define xpt0_vstatus 0x1014 /* Video Status */ -#define xpt0_vintmask 0x1015 /* Video Interrupt Mask */ - -#define xpt0_qbase 0x1020 /* Queue Base */ -#define xpt0_bucketq 0x1021 /* Bucket Queue */ -#define xpt0_qstops 0x1024 /* Queue Stops */ -#define xpt0_qresets 0x1025 /* Queue Resets */ -#define xpt0_sfchng 0x1026 /* Section Filter Change */ - -/*----------------------------------------------------------------------------+ -| Audio decoder. Suspect 0x1ad, 0x1b4, 0x1a3, 0x1a5 (read/write status) -+----------------------------------------------------------------------------*/ -#define aud0_ctrl0 0x1a0 /* control 0 */ -#define aud0_ctrl1 0x1a1 /* control 1 */ -#define aud0_ctrl2 0x1a2 /* control 2 */ -#define aud0_cmd 0x1a3 /* command register */ -#define aud0_isr 0x1a4 /* interrupt status register */ -#define aud0_imr 0x1a5 /* interrupt mask register */ -#define aud0_dsr 0x1a6 /* decoder status register */ -#define aud0_stc 0x1a7 /* system time clock */ -#define aud0_csr 0x1a8 /* channel status register */ -#define aud0_lcnt 0x1a9 /* queued address register 2 */ -#define aud0_pts 0x1aa /* presentation time stamp */ -#define aud0_tgctrl 0x1ab /* tone generation control */ -#define aud0_qlr2 0x1ac /* queued length register 2 */ -#define aud0_auxd 0x1ad /* aux data */ -#define aud0_strmid 0x1ae /* stream ID */ -#define aud0_qar 0x1af /* queued address register */ -#define aud0_dsps 0x1b0 /* DSP status */ -#define aud0_qlr 0x1b1 /* queued len address */ -#define aud0_dspc 0x1b2 /* DSP control */ -#define aud0_wlr2 0x1b3 /* working length register 2 */ -#define aud0_instd 0x1b4 /* instruction download */ -#define aud0_war 0x1b5 /* working address register */ -#define aud0_seg1 0x1b6 /* segment 1 base register */ -#define aud0_seg2 0x1b7 /* segment 2 base register */ -#define aud0_avf 0x1b9 /* audio att value front */ -#define aud0_avr 0x1ba /* audio att value rear */ -#define aud0_avc 0x1bb /* audio att value center */ -#define aud0_seg3 0x1bc /* segment 3 base register */ -#define aud0_offset 0x1bd /* offset address */ -#define aud0_wrl 0x1be /* working length register */ -#define aud0_war2 0x1bf /* working address register 2 */ - -/*----------------------------------------------------------------------------+ -| High speed memory controller 0 and 1. -+----------------------------------------------------------------------------*/ -#define hsmc0_gr 0x1e0 /* HSMC global register */ -#define hsmc0_besr 0x1e1 /* bus error status register */ -#define hsmc0_bear 0x1e2 /* bus error address register */ -#define hsmc0_br0 0x1e4 /* SDRAM sub-ctrl bank reg 0 */ -#define hsmc0_cr0 0x1e5 /* SDRAM sub-ctrl ctrl reg 0 */ -#define hsmc0_br1 0x1e7 /* SDRAM sub-ctrl bank reg 1 */ -#define hsmc0_cr1 0x1e8 /* SDRAM sub-ctrl ctrl reg 1 */ -#define hsmc0_sysr 0x1f1 /* system register */ -#define hsmc0_data 0x1f2 /* data register */ -#define hsmc0_crr 0x1f3 /* refresh register */ - -#define hsmc1_gr 0x1c0 /* HSMC global register */ -#define hsmc1_besr 0x1c1 /* bus error status register */ -#define hsmc1_bear 0x1c2 /* bus error address register */ -#define hsmc1_br0 0x1c4 /* SDRAM sub-ctrl bank reg 0 */ -#define hsmc1_cr0 0x1c5 /* SDRAM sub-ctrl ctrl reg 0 */ -#define hsmc1_br1 0x1c7 /* SDRAM sub-ctrl bank reg 1 */ -#define hsmc1_cr1 0x1c8 /* SDRAM sub-ctrl ctrl reg 1 */ -#define hsmc1_sysr 0x1d1 /* system register */ -#define hsmc1_data 0x1d2 /* data register */ -#define hsmc1_crr 0x1d3 /* refresh register */ - -/*----------------------------------------------------------------------------+ -| Machine State Register bit definitions. -+----------------------------------------------------------------------------*/ -#define msr_ape 0x00100000 -#define msr_apa 0x00080000 -#define msr_we 0x00040000 -#define msr_ce 0x00020000 -#define msr_ile 0x00010000 -#define msr_ee 0x00008000 -#define msr_pr 0x00004000 -#define msr_me 0x00001000 -#define msr_de 0x00000200 -#define msr_ir 0x00000020 -#define msr_dr 0x00000010 -#define msr_le 0x00000001 - -/*----------------------------------------------------------------------------+ -| Used during interrupt processing. -+----------------------------------------------------------------------------*/ -#define stack_reg_image_size 160 - -/*----------------------------------------------------------------------------+ -| Function prolog definition and other Metaware (EABI) defines. -+----------------------------------------------------------------------------*/ -#ifdef MW - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - -#define function_prolog(func_name) .text; \ - .align 2; \ - .globl func_name; \ - func_name: -#define function_epilog(func_name) .type func_name,@function; \ - .size func_name,.-func_name - -#define function_call(func_name) bl func_name - -#define stack_frame_min 8 -#define stack_frame_bc 0 -#define stack_frame_lr 4 -#define stack_neg_off 0 - -#endif - -/*----------------------------------------------------------------------------+ -| Function prolog definition and other DIAB (Elf) defines. -+----------------------------------------------------------------------------*/ -#ifdef ELF_DIAB - -fprolog: macro f_name - .text - .align 2 - .globl f_name -f_name: - endm - -fepilog: macro f_name - .type f_name,@function - .size f_name,.-f_name - endm - -#define function_prolog(func_name) fprolog func_name -#define function_epilog(func_name) fepilog func_name -#define function_call(func_name) bl func_name - -#define stack_frame_min 8 -#define stack_frame_bc 0 -#define stack_frame_lr 4 -#define stack_neg_off 0 - -#endif - -/*----------------------------------------------------------------------------+ -| Function prolog definition and other Xlc (XCOFF) defines. -+----------------------------------------------------------------------------*/ -#ifdef XCOFF - -.machine "403ga" - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - -#define function_prolog(func_name) .csect .func_name[PR]; \ - .globl .func_name[PR]; \ - func_name: - -#define function_epilog(func_name) .toc; \ - .csect func_name[DS]; \ - .globl func_name[DS]; \ - .long .func_name[PR]; \ - .long TOC[tc0] - -#define function_call(func_name) .extern .func_name[PR]; \ - stw r2,stack_frame_toc(r1); \ - mfspr r2,sprg0; \ - bl .func_name[PR]; \ - lwz r2,stack_frame_toc(r1) - -#define stack_frame_min 56 -#define stack_frame_bc 0 -#define stack_frame_lr 8 -#define stack_frame_toc 20 -#define stack_neg_off 276 - -#endif -#define function_prolog(func_name) .text; \ - .align 2; \ - .globl func_name; \ - func_name: -#define function_epilog(func_name) .type func_name,@function; \ - .size func_name,.-func_name - -#define function_call(func_name) bl func_name - -/*----------------------------------------------------------------------------+ -| Function prolog definition for GNU -+----------------------------------------------------------------------------*/ -#ifdef _GNU_TOOL - -#define function_prolog(func_name) .globl func_name; \ - func_name: -#define function_epilog(func_name) - -#endif diff --git a/arch/ppc/boot/simple/rw4/rw4_init.S b/arch/ppc/boot/simple/rw4/rw4_init.S deleted file mode 100644 index b1061962e46ba30ddcab0b1bc262cafd85e658c0..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/rw4/rw4_init.S +++ /dev/null @@ -1,78 +0,0 @@ -#define VESTA -#include "ppc_40x.h" -# - .align 2 - .text -# -# added by linguohui - .extern initb_ebiu0, initb_config, hdw_init_finish - .extern initb_hsmc0, initb_hsmc1, initb_cache -# end added - .globl HdwInit -# -HdwInit: -# -#-----------------------------------------------------------------------* -# If we are not executing from the FLASH get out * -#-----------------------------------------------------------------------* -# SAW keep this or comment out a la Hawthorne? -# r3 contains NIP when used with Linux -# rlwinm r28, r3, 8, 24, 31 # if MSB == 0xFF -> FLASH address -# cmpwi r28, 0xff -# bne locn01 -# -# -#------------------------------------------------------------------------ -# Init_cpu. Bank registers are setup for the IBM STB. -#------------------------------------------------------------------------ -# -# Setup processor core clock to be driven off chip. This is GPI4 bit -# twenty. Setup Open Drain, Output Select, Three-State Control, and -# Three-State Select registers. -# - - - pb0pesr = 0x054 - pb0pear = 0x056 - - mflr r30 - -#----------------------------------------------------------------------------- -# Vectors will be at 0x1F000000 -# Dummy Machine check handler just does RFI before true handler gets installed -#----------------------------------------------------------------------------- -#if 1 /* xuwentao added*/ -#ifdef SDRAM16MB - lis r10,0x0000 - addi r10,r10,0x0000 -#else - lis r10,0x1F00 - addi r10,r10,0x0000 -#endif - - mtspr evpr,r10 #EVPR: 0x0 or 0x1f000000 depending - isync # on SDRAM memory model used. - - lis r10,0xFFFF # clear PB0_PESR because some - ori r10,r10,0xFFFF # transitions from flash,changed by linguohui - mtdcr pb0pesr,r10 # to load RAM image via RiscWatch - lis r10,0x0000 # cause PB0_PESR machine checks - mtdcr pb0pear,r10 - addis r10,r10,0x0000 # clear the - mtxer r10 # XER just in case... -#endif /* xuwentao*/ - - bl initb_ebiu0 # init EBIU - - bl initb_config # config PPC and board - - - - -#------------------------------------------------------------------------ -# EVPR setup moved to top of this function. -#------------------------------------------------------------------------ -# - mtlr r30 - blr - .end diff --git a/arch/ppc/boot/simple/rw4/rw4_init_brd.S b/arch/ppc/boot/simple/rw4/rw4_init_brd.S deleted file mode 100644 index 386afdaad6c75698e1388ad0a4b3fe6af7a14d24..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/rw4/rw4_init_brd.S +++ /dev/null @@ -1,1125 +0,0 @@ -/*----------------------------------------------------------------------------+ -| This source code has been made available to you by IBM on an AS-IS -| basis. Anyone receiving this source is licensed under IBM -| copyrights to use it in any way he or she deems fit, including -| copying it, modifying it, compiling it, and redistributing it either -| with or without modifications. No license under IBM patents or -| patent applications is to be implied by the copyright license. -| -| Any user of this software should understand that IBM cannot provide -| technical support for this software and will not be responsible for -| any consequences resulting from the use of this software. -| -| Any person who transfers this source code or any derivative work -| must include the IBM copyright notice, this paragraph, and the -| preceding two paragraphs in the transferred software. -| -| COPYRIGHT I B M CORPORATION 1997 -| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M -+----------------------------------------------------------------------------*/ -/*----------------------------------------------------------------------------+ -| Author: Tony J. Cerreto -| Component: BSPS -| File: init_brd.s -| Purpose: Vesta Evaluation Board initialization subroutines. The following -| routines are available: -| 1. INITB_EBIU0: Initialize EBIU0. -| 2. INITB_CONFIG: Configure board. -| 3. INITB_HSMC0: Initialize HSMC0 (SDRAM). -| 4. INITB_HSMC1: Initialize HSMC1 (SDRAM). -| 5. INITB_CACHE: Initialize Data and Instruction Cache. -| 6. INITB_DCACHE: Initialize Data Cache. -| 7. INITB_ICACHE: Initialize Instruction Cache. -| 8. INITB_GET_CSPD: Get CPU Speed (Bus Speed and Processor Speed) -| -| Changes: -| Date: Author Comment: -| --------- ------ -------- -| 01-Mar-00 tjc Created -| 04-Mar-00 jfh Modified CIC_SEL3_VAL to support 1284 (Mux3 & GPIO 21-28) -| 04-Mar-00 jfh Modified XILINIX Reg 0 to support 1284 (Mux3 & GPIO 21-28) -| 04-Mar-00 jfh Modified XILINIX Reg 1 to support 1284 (Mux3 & GPIO 21-28) -| 04-Mar-00 jfh Modified XILINIX Reg 4 to support 1284 (Mux3 & GPIO 21-28) -| 19-May-00 rlb Relcoated HSMC0 to 0x1F000000 to support 32MB of contiguous -| SDRAM space. Changed cache ctl regs to reflect this. -| 22-May-00 tjc Changed initb_get_cspd interface and eliminated -| initb_get_bspd routines. -| 26-May-00 tjc Added two nop instructions after all mtxxx/mfxxx -| instructions due to PPC405 bug. -+----------------------------------------------------------------------------*/ -#define VESTA -#include "ppc_40x.h" -#include "stb.h" - -/*----------------------------------------------------------------------------+ -| BOARD CONFIGURATION DEFINES -+----------------------------------------------------------------------------*/ -#define CBS0_CR_VAL 0x00000002 /* CBS control reg value */ -#define CIC0_CR_VAL 0xD0800448 /* CIC control reg value */ -#define CIC0_SEL3_VAL 0x11500000 /* CIC select 3 reg value */ -#define CIC0_VCR_VAL 0x00631700 /* CIC video cntl reg value */ - -/*----------------------------------------------------------------------------+ -| EBIU0 BANK REGISTERS DEFINES -+----------------------------------------------------------------------------*/ -#define EBIU0_BRCRH0_VAL 0x00000000 /* BR High 0 (Extension Reg)*/ -#define EBIU0_BRCRH1_VAL 0x00000000 /* BR High 1 (Extension Reg)*/ -#define EBIU0_BRCRH2_VAL 0x40000000 /* BR High 2 (Extension Reg)*/ -#define EBIU0_BRCRH3_VAL 0x40000000 /* BR High 3 (Extension Reg)*/ -#define EBIU0_BRCRH4_VAL 0x00000000 /* BR High 4 (Extension Reg)*/ -#define EBIU0_BRCRH5_VAL 0x00000000 /* BR High 5 (Extension Reg)*/ -#define EBIU0_BRCRH6_VAL 0x00000000 /* BR High 6 (Extension Reg)*/ -#define EBIU0_BRCRH7_VAL 0x40000000 /* BR High 7 (Extension Reg)*/ - -#define EBIU0_BRCR0_VAL 0xFC58BFFE /* BR 0: 16 bit Flash 4 MB */ -#define EBIU0_BRCR1_VAL 0xFF00BFFE /* BR 1: Ext Connector 1 MB */ -#if 1 -#define EBIU0_BRCR2_VAL 0x207CFFBE /* BR 2: Xilinx 8 MB */ - /* twt == 0x3f */ -#else -#define EBIU0_BRCR2_VAL 0x207CCFBE /* BR 2: Xilinx 8 MB */ - /* twt == 0x0f */ -#endif -#define EBIU0_BRCR3_VAL 0x407CBFBE /* BR 3: IDE Drive 8 MB */ -#define EBIU0_BRCR4_VAL 0xFF00BFFF /* BR 4: Disabled. 0 MB */ -#define EBIU0_BRCR5_VAL 0xFF00BFFF /* BR 5: Disabled. 0 MB */ -#define EBIU0_BRCR6_VAL 0xFF00BFFF /* BR 6: Disabled. 0 MB */ -#define EBIU0_BRCR7_VAL 0xCE3F0003 /* BR 7: Line Mode DMA 2 MB */ - -/*----------------------------------------------------------------------------+ -| GPIO DEFINES -+----------------------------------------------------------------------------*/ -#define STB_GPIO0_OUTPUT (STB_GPIO0_BASE_ADDRESS+ 0x00) -#define STB_GPIO0_TC (STB_GPIO0_BASE_ADDRESS+ 0x04) -#define STB_GPIO0_OS_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x08) -#define STB_GPIO0_OS_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x0C) -#define STB_GPIO0_TS_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x10) -#define STB_GPIO0_TS_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x14) -#define STB_GPIO0_OD (STB_GPIO0_BASE_ADDRESS+ 0x18) -#define STB_GPIO0_INPUT (STB_GPIO0_BASE_ADDRESS+ 0x1C) -#define STB_GPIO0_R1 (STB_GPIO0_BASE_ADDRESS+ 0x20) -#define STB_GPIO0_R2 (STB_GPIO0_BASE_ADDRESS+ 0x24) -#define STB_GPIO0_R3 (STB_GPIO0_BASE_ADDRESS+ 0x28) -#define STB_GPIO0_IS_1_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x30) -#define STB_GPIO0_IS_1_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x34) -#define STB_GPIO0_IS_2_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x38) -#define STB_GPIO0_IS_2_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x3C) -#define STB_GPIO0_IS_3_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x40) -#define STB_GPIO0_IS_3_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x44) -#define STB_GPIO0_SS_1 (STB_GPIO0_BASE_ADDRESS+ 0x50) -#define STB_GPIO0_SS_2 (STB_GPIO0_BASE_ADDRESS+ 0x54) -#define STB_GPIO0_SS_3 (STB_GPIO0_BASE_ADDRESS+ 0x58) - -#define GPIO0_TC_VAL 0x0C020004 /* three-state control val */ -#define GPIO0_OS_0_31_VAL 0x51A00004 /* output select 0-31 val */ -#define GPIO0_OS_32_63_VAL 0x0000002F /* output select 32-63 val */ -#define GPIO0_TS_0_31_VAL 0x51A00000 /* three-state sel 0-31 val*/ -#define GPIO0_TS_32_63_VAL 0x0000000F /* three-state sel 32-63 val*/ -#define GPIO0_OD_VAL 0xC0000004 /* open drain val */ -#define GPIO0_IS_1_0_31_VAL 0x50000151 /* input select 1 0-31 val */ -#define GPIO0_IS_1_32_63_VAL 0x00000000 /* input select 1 32-63 val */ -#define GPIO0_IS_2_0_31_VAL 0x00000000 /* input select 2 0-31 val */ -#define GPIO0_IS_2_32_63_VAL 0x00000000 /* input select 2 32-63 val */ -#define GPIO0_IS_3_0_31_VAL 0x00000440 /* input select 3 0-31 val */ -#define GPIO0_IS_3_32_63_VAL 0x00000000 /* input select 3 32-63 val */ -#define GPIO0_SS_1_VAL 0x00000000 /* sync select 1 val */ -#define GPIO0_SS_2_VAL 0x00000000 /* sync select 2 val */ -#define GPIO0_SS_3_VAL 0x00000000 /* sync select 3 val */ - -/*----------------------------------------------------------------------------+ -| XILINX DEFINES -+----------------------------------------------------------------------------*/ -#define STB_XILINX_LED (STB_FPGA_BASE_ADDRESS+ 0x0100) -#define STB_XILINX1_REG0 (STB_FPGA_BASE_ADDRESS+ 0x40000) -#define STB_XILINX1_REG1 (STB_FPGA_BASE_ADDRESS+ 0x40002) -#define STB_XILINX1_REG2 (STB_FPGA_BASE_ADDRESS+ 0x40004) -#define STB_XILINX1_REG3 (STB_FPGA_BASE_ADDRESS+ 0x40006) -#define STB_XILINX1_REG4 (STB_FPGA_BASE_ADDRESS+ 0x40008) -#define STB_XILINX1_REG5 (STB_FPGA_BASE_ADDRESS+ 0x4000A) -#define STB_XILINX1_REG6 (STB_FPGA_BASE_ADDRESS+ 0x4000C) -#define STB_XILINX1_ID (STB_FPGA_BASE_ADDRESS+ 0x4000E) -#define STB_XILINX1_FLUSH (STB_FPGA_BASE_ADDRESS+ 0x4000E) -#define STB_XILINX2_REG0 (STB_FPGA_BASE_ADDRESS+ 0x80000) -#define STB_XILINX2_REG1 (STB_FPGA_BASE_ADDRESS+ 0x80002) -#define STB_XILINX2_REG2 (STB_FPGA_BASE_ADDRESS+ 0x80004) - -#define XILINX1_R0_VAL 0x2440 /* Xilinx 1 Register 0 Val */ -#define XILINX1_R1_VAL 0x0025 /* Xilinx 1 Register 1 Val */ -#define XILINX1_R2_VAL 0x0441 /* Xilinx 1 Register 2 Val */ -#define XILINX1_R3_VAL 0x0008 /* Xilinx 1 Register 3 Val */ -#define XILINX1_R4_VAL 0x0100 /* Xilinx 1 Register 4 Val */ -#define XILINX1_R5_VAL 0x6810 /* Xilinx 1 Register 5 Val */ -#define XILINX1_R6_VAL 0x0000 /* Xilinx 1 Register 6 Val */ -#if 0 -#define XILINX2_R0_VAL 0x0008 /* Xilinx 2 Register 0 Val */ -#define XILINX2_R1_VAL 0x0000 /* Xilinx 2 Register 1 Val */ -#else -#define XILINX2_R0_VAL 0x0018 /* disable IBM IrDA RxD */ -#define XILINX2_R1_VAL 0x0008 /* enable SICC MAX chip */ -#endif -#define XILINX2_R2_VAL 0x0000 /* Xilinx 2 Register 2 Val */ - -/*----------------------------------------------------------------------------+ -| HSMC BANK REGISTERS DEFINES -+----------------------------------------------------------------------------*/ -#ifdef SDRAM16MB -#define HSMC0_BR0_VAL 0x000D2D55 /* 0x1F000000-007FFFFF R/W */ -#define HSMC0_BR1_VAL 0x008D2D55 /* 0x1F800000-1FFFFFFF R/W */ -#else -#define HSMC0_BR0_VAL 0x1F0D2D55 /* 0x1F000000-007FFFFF R/W */ -#define HSMC0_BR1_VAL 0x1F8D2D55 /* 0x1F800000-1FFFFFFF R/W */ -#endif -#define HSMC1_BR0_VAL 0xA00D2D55 /* 0xA0000000-A07FFFFF R/W */ -#define HSMC1_BR1_VAL 0xA08D2D55 /* 0xA0800000-A0FFFFFF R/W */ - -/*----------------------------------------------------------------------------+ -| CACHE DEFINES -+----------------------------------------------------------------------------*/ -#define DCACHE_NLINES 128 /* no. D-cache lines */ -#define DCACHE_NBYTES 32 /* no. bytes/ D-cache line */ -#define ICACHE_NLINES 256 /* no. I-cache lines */ -#define ICACHE_NBYTES 32 /* no. bytes/ I-cache line */ -#ifdef SDRAM16MB -#define DCACHE_ENABLE 0x80000000 /* D-cache regions to enable*/ -#define ICACHE_ENABLE 0x80000001 /* I-cache regions to enable*/ -#else -#define DCACHE_ENABLE 0x18000000 /* D-cache regions to enable*/ -#define ICACHE_ENABLE 0x18000001 /* I-cache regions to enable*/ -#endif - -/*----------------------------------------------------------------------------+ -| CPU CORE SPEED CALCULATION DEFINES -+----------------------------------------------------------------------------*/ -#define GCS_LCNT 500000 /* CPU speed loop count */ -#define GCS_TROW_BYTES 8 /* no. bytes in table row */ -#define GCS_CTICK_TOL 100 /* allowable clock tick tol */ -#define GCS_NMULT 4 /* no. of core speed mults */ - - /*--------------------------------------------------------------------+ - | No. 13.5Mhz - | Clock Ticks - | based on a - | loop count Bus - | of 100,000 Speed - +--------------------------------------------------------------------*/ -gcs_lookup_table: - .int 50000, 54000000 /* 54.0 Mhz */ - .int 66667, 40500000 /* 40.5 Mhz */ - .int 54545, 49500000 /* 49.5 Mhz */ - .int 46154, 58500000 /* 58.5 Mhz */ - .int 0, 0 /* end of table flag */ - - -/*****************************************************************************+ -| XXXXXXX XXX XXX XXXXXX XXXXXXX XXXXXX XX XX XX XXXX -| XX X XX XX X XX X XX X XX XX XXX XX XXXX XX -| XX X XXX XX XX X XX XX XXXX XX XX XX XX -| XXXX X XX XXXX XXXXX XX XXXX XX XX XX -| XX X XXX XX XX X XX XX XX XXX XXXXXX XX -| XX X XX XX XX XX X XX XX XX XX XX XX XX XX -| XXXXXXX XXX XXX XXXX XXXXXXX XXX XX XX XX XX XX XXXXXXX -+*****************************************************************************/ -/****************************************************************************** -| -| Routine: INITB_EBIU0. -| -| Purpose: Initialize all the EBIU0 Bank Registers -| Parameters: None. -| Returns: None. -| -******************************************************************************/ - function_prolog(initb_ebiu0) - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 0 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR0_VAL@h - ori r10,r10,EBIU0_BRCR0_VAL@l - mtdcr ebiu0_brcr0,r10 - lis r10,EBIU0_BRCRH0_VAL@h - ori r10,r10,EBIU0_BRCRH0_VAL@l - mtdcr ebiu0_brcrh0,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 1 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR1_VAL@h - ori r10,r10,EBIU0_BRCR1_VAL@l - mtdcr ebiu0_brcr1,r10 - lis r10,EBIU0_BRCRH1_VAL@h - ori r10,r10,EBIU0_BRCRH1_VAL@l - mtdcr ebiu0_brcrh1,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 2 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR2_VAL@h - ori r10,r10,EBIU0_BRCR2_VAL@l - mtdcr ebiu0_brcr2,r10 - lis r10,EBIU0_BRCRH2_VAL@h - ori r10,r10,EBIU0_BRCRH2_VAL@l - mtdcr ebiu0_brcrh2,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 3 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR3_VAL@h - ori r10,r10,EBIU0_BRCR3_VAL@l - mtdcr ebiu0_brcr3,r10 - lis r10,EBIU0_BRCRH3_VAL@h - ori r10,r10,EBIU0_BRCRH3_VAL@l - mtdcr ebiu0_brcrh3,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 4 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR4_VAL@h - ori r10,r10,EBIU0_BRCR4_VAL@l - mtdcr ebiu0_brcr4,r10 - lis r10,EBIU0_BRCRH4_VAL@h - ori r10,r10,EBIU0_BRCRH4_VAL@l - mtdcr ebiu0_brcrh4,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 5 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR5_VAL@h - ori r10,r10,EBIU0_BRCR5_VAL@l - mtdcr ebiu0_brcr5,r10 - lis r10,EBIU0_BRCRH5_VAL@h - ori r10,r10,EBIU0_BRCRH5_VAL@l - mtdcr ebiu0_brcrh5,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 6 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR6_VAL@h - ori r10,r10,EBIU0_BRCR6_VAL@l - mtdcr ebiu0_brcr6,r10 - lis r10,EBIU0_BRCRH6_VAL@h - ori r10,r10,EBIU0_BRCRH6_VAL@l - mtdcr ebiu0_brcrh6,r10 - - /*--------------------------------------------------------------------+ - | Set EBIU0 Bank 7 - +--------------------------------------------------------------------*/ - lis r10,EBIU0_BRCR7_VAL@h - ori r10,r10,EBIU0_BRCR7_VAL@l - mtdcr ebiu0_brcr7,r10 - lis r10,EBIU0_BRCRH7_VAL@h - ori r10,r10,EBIU0_BRCRH7_VAL@l - mtdcr ebiu0_brcrh7,r10 - - blr - function_epilog(initb_ebiu0) - - -/****************************************************************************** -| -| Routine: INITB_CONFIG -| -| Purpose: Configure the Vesta Evaluation Board. The following items -| will be configured: -| 1. Cross-Bar Switch. -| 2. Chip Interconnect. -| 3. Clear/reset key PPC registers. -| 4. Xilinx and GPIO Registers. -| -| Returns: None. -| -******************************************************************************/ - function_prolog(initb_config) - /*--------------------------------------------------------------------+ - | Init CROSS-BAR SWITCH - +--------------------------------------------------------------------*/ - lis r10,CBS0_CR_VAL@h /* r10 <- CBS Cntl Reg val */ - ori r10,r10,CBS0_CR_VAL@l - mtdcr cbs0_cr,r10 - - /*--------------------------------------------------------------------+ - | Init Chip-Interconnect (CIC) Registers - +--------------------------------------------------------------------*/ - lis r10,CIC0_CR_VAL@h /* r10 <- CIC Cntl Reg val */ - ori r10,r10,CIC0_CR_VAL@l - mtdcr cic0_cr,r10 - - lis r10,CIC0_SEL3_VAL@h /* r10 <- CIC SEL3 Reg val */ - ori r10,r10,CIC0_SEL3_VAL@l - mtdcr cic0_sel3,r10 - - lis r10,CIC0_VCR_VAL@h /* r10 <- CIC Vid C-Reg val */ - ori r10,r10,CIC0_VCR_VAL@l - mtdcr cic0_vcr,r10 - - /*--------------------------------------------------------------------+ - | Clear SGR and DCWR - +--------------------------------------------------------------------*/ - li r10,0x0000 - mtspr sgr,r10 - mtspr dcwr,r10 - - /*--------------------------------------------------------------------+ - | Clear/set up some machine state registers. - +--------------------------------------------------------------------*/ - li r10,0x0000 /* r10 <- 0 */ - mtdcr ebiu0_besr,r10 /* clr Bus Err Syndrome Reg */ - mtspr esr,r10 /* clr Exceptn Syndrome Reg */ - mttcr r10 /* timer control register */ - - mtdcr uic0_er,r10 /* disable all interrupts */ - - /* UIC_IIC0 | UIC_IIC1 | UIC_U0 | UIC_IR_RCV | UIC_IR_XMIT */ - lis r10, 0x00600e00@h - ori r10,r10,0x00600e00@l - mtdcr uic0_pr,r10 - - li r10,0x00000020 /* UIC_EIR1 */ - mtdcr uic0_tr,r10 - - lis r10,0xFFFF /* r10 <- 0xFFFFFFFF */ - ori r10,r10,0xFFFF /* */ - mtdbsr r10 /* clear/reset the dbsr */ - mtdcr uic0_sr,r10 /* clear pending interrupts */ - - li r10,0x1000 /* set Machine Exception bit*/ - oris r10,r10,0x2 /* set Criticl Exception bit*/ - mtmsr r10 /* change MSR */ - - /*--------------------------------------------------------------------+ - | Clear XER. - +--------------------------------------------------------------------*/ - li r10,0x0000 - mtxer r10 - - /*--------------------------------------------------------------------+ - | Init GPIO0 Registers - +--------------------------------------------------------------------*/ - lis r10, STB_GPIO0_TC@h /* Three-state control */ - ori r10,r10,STB_GPIO0_TC@l - lis r11, GPIO0_TC_VAL@h - ori r11,r11,GPIO0_TC_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_OS_0_31@h /* output select 0-31 */ - ori r10,r10,STB_GPIO0_OS_0_31@l - lis r11, GPIO0_OS_0_31_VAL@h - ori r11,r11,GPIO0_OS_0_31_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_OS_32_63@h /* output select 32-63 */ - ori r10,r10,STB_GPIO0_OS_32_63@l - lis r11, GPIO0_OS_32_63_VAL@h - ori r11,r11,GPIO0_OS_32_63_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_TS_0_31@h /* three-state select 0-31 */ - ori r10,r10,STB_GPIO0_TS_0_31@l - lis r11, GPIO0_TS_0_31_VAL@h - ori r11,r11,GPIO0_TS_0_31_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_TS_32_63@h /* three-state select 32-63 */ - ori r10,r10,STB_GPIO0_TS_32_63@l - lis r11, GPIO0_TS_32_63_VAL@h - ori r11,r11,GPIO0_TS_32_63_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_OD@h /* open drain */ - ori r10,r10,STB_GPIO0_OD@l - lis r11, GPIO0_OD_VAL@h - ori r11,r11,GPIO0_OD_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_1_0_31@h /* input select 1, 0-31 */ - ori r10,r10,STB_GPIO0_IS_1_0_31@l - lis r11, GPIO0_IS_1_0_31_VAL@h - ori r11,r11,GPIO0_IS_1_0_31_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_1_32_63@h /* input select 1, 32-63 */ - ori r10,r10,STB_GPIO0_IS_1_32_63@l - lis r11, GPIO0_IS_1_32_63_VAL@h - ori r11,r11,GPIO0_IS_1_32_63_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_2_0_31@h /* input select 2, 0-31 */ - ori r10,r10,STB_GPIO0_IS_2_0_31@l - lis r11, GPIO0_IS_2_0_31_VAL@h - ori r11,r11,GPIO0_IS_2_0_31_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_2_32_63@h /* input select 2, 32-63 */ - ori r10,r10,STB_GPIO0_IS_2_32_63@l - lis r11, GPIO0_IS_2_32_63_VAL@h - ori r11,r11,GPIO0_IS_2_32_63_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_3_0_31@h /* input select 3, 0-31 */ - ori r10,r10,STB_GPIO0_IS_3_0_31@l - lis r11, GPIO0_IS_3_0_31_VAL@h - ori r11,r11,GPIO0_IS_3_0_31_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_IS_3_32_63@h /* input select 3, 32-63 */ - ori r10,r10,STB_GPIO0_IS_3_32_63@l - lis r11, GPIO0_IS_3_32_63_VAL@h - ori r11,r11,GPIO0_IS_3_32_63_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_SS_1@h /* sync select 1 */ - ori r10,r10,STB_GPIO0_SS_1@l - lis r11, GPIO0_SS_1_VAL@h - ori r11,r11,GPIO0_SS_1_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_SS_2@h /* sync select 2 */ - ori r10,r10,STB_GPIO0_SS_2@l - lis r11, GPIO0_SS_2_VAL@h - ori r11,r11,GPIO0_SS_2_VAL@l - stw r11,0(r10) - - lis r10, STB_GPIO0_SS_3@h /* sync select 3 */ - ori r10,r10,STB_GPIO0_SS_3@l - lis r11, GPIO0_SS_3_VAL@h - ori r11,r11,GPIO0_SS_3_VAL@l - stw r11,0(r10) - - /*--------------------------------------------------------------------+ - | Init Xilinx #1 Registers - +--------------------------------------------------------------------*/ - lis r10, STB_XILINX1_REG0@h /* init Xilinx1 Reg 0 */ - ori r10,r10,STB_XILINX1_REG0@l - li r11,XILINX1_R0_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG1@h /* init Xilinx1 Reg 1 */ - ori r10,r10,STB_XILINX1_REG1@l - li r11,XILINX1_R1_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG2@h /* init Xilinx1 Reg 2 */ - ori r10,r10,STB_XILINX1_REG2@l - li r11,XILINX1_R2_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG3@h /* init Xilinx1 Reg 3 */ - ori r10,r10,STB_XILINX1_REG3@l - li r11,XILINX1_R3_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG4@h /* init Xilinx1 Reg 4 */ - ori r10,r10,STB_XILINX1_REG4@l - li r11,XILINX1_R4_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG5@h /* init Xilinx1 Reg 5 */ - ori r10,r10,STB_XILINX1_REG5@l - li r11,XILINX1_R5_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_REG6@h /* init Xilinx1 Reg 6 */ - ori r10,r10,STB_XILINX1_REG6@l - li r11,XILINX1_R6_VAL - sth r11,0(r10) - - lis r10, STB_XILINX1_FLUSH@h /* latch registers in Xilinx*/ - ori r10,r10,STB_XILINX1_FLUSH@l - li r11,0x0000 - sth r11,0(r10) - - /*--------------------------------------------------------------------+ - | Init Xilinx #2 Registers - +--------------------------------------------------------------------*/ - lis r10, STB_XILINX2_REG0@h /* init Xilinx2 Reg 0 */ - ori r10,r10,STB_XILINX2_REG0@l - li r11,XILINX2_R0_VAL - sth r11,0(r10) - - lis r10, STB_XILINX2_REG1@h /* init Xilinx2 Reg 1 */ - ori r10,r10,STB_XILINX2_REG1@l - li r11,XILINX2_R1_VAL - sth r11,0(r10) - - lis r10, STB_XILINX2_REG2@h /* init Xilinx2 Reg 2 */ - ori r10,r10,STB_XILINX2_REG2@l - li r11,XILINX2_R2_VAL - sth r11,0(r10) - - blr - function_epilog(initb_config) - - -/****************************************************************************** -| -| Routine: INITB_HSMC0. -| -| Purpose: Initialize the HSMC0 Registers for SDRAM -| Parameters: None. -| Returns: R3 = 0: Successful -| = -1: Unsuccessful, SDRAM did not reset properly. -| -******************************************************************************/ - function_prolog(initb_hsmc0) - mflr r0 /* Save return addr */ - - /*--------------------------------------------------------------------+ - | Set Global SDRAM Controller to recommended default - +--------------------------------------------------------------------*/ - lis r10,0x6C00 - ori r10,r10,0x0000 - mtdcr hsmc0_gr,r10 - - /*--------------------------------------------------------------------+ - | Set HSMC0 Data Register to recommended default - +--------------------------------------------------------------------*/ - lis r10,0x0037 - ori r10,r10,0x0000 - mtdcr hsmc0_data,r10 - - /*--------------------------------------------------------------------+ - | Init HSMC0 Bank Register 0 - +--------------------------------------------------------------------*/ - lis r10,HSMC0_BR0_VAL@h - ori r10,r10,HSMC0_BR0_VAL@l - mtdcr hsmc0_br0,r10 - - /*--------------------------------------------------------------------+ - | Init HSMC0 Bank Register 1 - +--------------------------------------------------------------------*/ - lis r10,HSMC0_BR1_VAL@h - ori r10,r10,HSMC0_BR1_VAL@l - mtdcr hsmc0_br1,r10 - - /*--------------------------------------------------------------------+ - | Set HSMC0 Control Reg 0 - +--------------------------------------------------------------------*/ - lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */ - ori r10,r10,0x0000 - mtdcr hsmc0_cr0,r10 - li r3,0x0000 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne cr0,hsmc0_err - - lis r10,0x8078 /* AUTO-REFRESH */ - ori r10,r10,0x0000 - mtdcr hsmc0_cr0,r10 - li r3,0x0000 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne cr0,hsmc0_err - - lis r10,0x8070 /* PROG MODE W/DATA REG VAL */ - ori r10,r10,0x8000 - mtdcr hsmc0_cr0,r10 - li r3,0x0000 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne hsmc0_err - - /*--------------------------------------------------------------------+ - | Set HSMC0 Control Reg 1 - +--------------------------------------------------------------------*/ - lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */ - ori r10,r10,0x0000 - mtdcr hsmc0_cr1,r10 - li r3,0x0001 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne cr0,hsmc0_err - - lis r10,0x8078 /* AUTO-REFRESH */ - ori r10,r10,0x0000 - mtdcr hsmc0_cr1,r10 - li r3,0x0001 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne cr0,hsmc0_err - - lis r10,0x8070 /* PROG MODE W/DATA REG VAL */ - ori r10,r10,0x8000 - mtdcr hsmc0_cr1,r10 - li r3,0x0001 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne cr0,hsmc0_err - - /*--------------------------------------------------------------------+ - | Set HSMC0 Refresh Register - +--------------------------------------------------------------------*/ - lis r10,0x0FE1 - ori r10,r10,0x0000 - mtdcr hsmc0_crr,r10 - li r3,0 - -hsmc0_err: - mtlr r0 - blr - function_epilog(initb_hsmc0) - - -/****************************************************************************** -| -| Routine: INITB_HSMC1. -| -| Purpose: Initialize the HSMC1 Registers for SDRAM -| Parameters: None. -| Returns: R3 = 0: Successful -| = -1: Unsuccessful, SDRAM did not reset properly. -| -******************************************************************************/ - function_prolog(initb_hsmc1) - mflr r0 /* Save return addr */ - - /*--------------------------------------------------------------------+ - | Set Global SDRAM Controller to recommended default - +--------------------------------------------------------------------*/ - lis r10,0x6C00 - ori r10,r10,0x0000 - mtdcr hsmc1_gr,r10 - - /*--------------------------------------------------------------------+ - | Set HSMC1 Data Register to recommended default - +--------------------------------------------------------------------*/ - lis r10,0x0037 - ori r10,r10,0x0000 - mtdcr hsmc1_data,r10 - - /*--------------------------------------------------------------------+ - | Init HSMC1 Bank Register 0 - +--------------------------------------------------------------------*/ - lis r10,HSMC1_BR0_VAL@h - ori r10,r10,HSMC1_BR0_VAL@l - mtdcr hsmc1_br0,r10 - - /*--------------------------------------------------------------------+ - | Init HSMC1 Bank Register 1 - +--------------------------------------------------------------------*/ - lis r10,HSMC1_BR1_VAL@h - ori r10,r10,HSMC1_BR1_VAL@l - mtdcr hsmc1_br1,r10 - - /*--------------------------------------------------------------------+ - | Set HSMC1 Control Reg 0 - +--------------------------------------------------------------------*/ - lis r10,0x8077 /* PRECHARGE ALL DEVICE BANKS */ - ori r10,r10,0x0000 - mtdcr hsmc1_cr0,r10 - li r3,0x0002 - bl hsmc_cr_wait /* wait for operation completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - lis r10,0x8078 /* AUTO-REFRESH */ - ori r10,r10,0x0000 - mtdcr hsmc1_cr0,r10 - li r3,0x0002 - bl hsmc_cr_wait /* wait for operation completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - lis r10,0x8070 /* PROGRAM MODE W/DATA REG VALUE */ - ori r10,r10,0x8000 - mtdcr hsmc1_cr0,r10 - li r3,0x0002 - bl hsmc_cr_wait /* wait for operation completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - /*--------------------------------------------------------------------+ - | Set HSMC1 Control Reg 1 - +--------------------------------------------------------------------*/ - lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */ - ori r10,r10,0x0000 - mtdcr hsmc1_cr1,r10 - li r3,0x0003 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - lis r10,0x8078 /* AUTO-REFRESH */ - ori r10,r10,0x0000 - mtdcr hsmc1_cr1,r10 - li r3,0x0003 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - lis r10,0x8070 /* PROG MODE W/DATA REG VAL */ - ori r10,r10,0x8000 - mtdcr hsmc1_cr1,r10 - li r3,0x0003 - bl hsmc_cr_wait /* wait for op completion */ - cmpwi cr0,r3,0x0000 - bne hsmc1_err - - /*--------------------------------------------------------------------+ - | Set HSMC1 Refresh Register - +--------------------------------------------------------------------*/ - lis r10,0x0FE1 - ori r10,r10,0x0000 - mtdcr hsmc1_crr,r10 - xor r3,r3,r3 - -hsmc1_err: - mtlr r0 - blr - function_epilog(initb_hsmc1) - - -/****************************************************************************** -| -| Routine: INITB_CACHE -| -| Purpose: This routine will enable Data and Instruction Cache. -| The Data Cache is an 8K two-way set associative and the -| Instruction Cache is an 16K two-way set associative cache. -| -| Parameters: None. -| -| Returns: None. -| -******************************************************************************/ - function_prolog(initb_cache) - mflr r0 /* Save return addr */ - - bl initb_Dcache /* enable D-Cache */ - bl initb_Icache /* enable I-Cache */ - - mtlr r0 - blr - function_epilog(initb_cache) - - -/****************************************************************************** -| -| Routine: INITB_DCACHE -| -| Purpose: This routine will invalidate all data in the Data Cache and -| then enable D-Cache. If cache is enabled already, the D-Cache -| will be flushed before the data is invalidated. -| -| Parameters: None. -| -| Returns: None. -| -******************************************************************************/ - function_prolog(initb_Dcache) - /*--------------------------------------------------------------------+ - | Flush Data Cache if enabled - +--------------------------------------------------------------------*/ - mfdccr r10 /* r10 <- DCCR */ - isync /* ensure prev insts done */ - cmpwi r10,0x00 - beq ic_dcinv /* D-cache off, invalidate */ - - /*--------------------------------------------------------------------+ - | Data Cache enabled, force known memory addresses to be Cached - +--------------------------------------------------------------------*/ - lis r10,HSMC0_BR0_VAL@h /* r10 <- first memory loc */ - andis. r10,r10,0xFFF0 - li r11,DCACHE_NLINES /* r11 <- # A-way addresses */ - addi r11,r11,DCACHE_NLINES /* r11 <- # B-way addresses */ - mtctr r11 /* set loop counter */ - -ic_dcload: - lwz r12,0(r10) /* force cache of address */ - addi r10,r10,DCACHE_NBYTES /* r10 <- next memory loc */ - bdnz ic_dcload - sync /* ensure prev insts done */ - isync - - /*--------------------------------------------------------------------+ - | Flush the known memory addresses from Cache - +--------------------------------------------------------------------*/ - lis r10,HSMC0_BR0_VAL@h /* r10 <- first memory loc */ - andis. r10,r10,0xFFF0 - mtctr r11 /* set loop counter */ - -ic_dcflush: - dcbf 0,r10 /* flush D-cache line */ - addi r10,r10,DCACHE_NBYTES /* r10 <- next memory loc */ - bdnz ic_dcflush - sync /* ensure prev insts done */ - isync - - /*--------------------------------------------------------------------+ - | Disable then invalidate Data Cache - +--------------------------------------------------------------------*/ - li r10,0 /* r10 <- 0 */ - mtdccr r10 /* disable the D-Cache */ - isync /* ensure prev insts done */ - -ic_dcinv: - li r10,0 /* r10 <- line address */ - li r11,DCACHE_NLINES /* r11 <- # lines in cache */ - mtctr r11 /* set loop counter */ - -ic_dcloop: - dccci 0,r10 /* invalidate A/B cache lns */ - addi r10,r10,DCACHE_NBYTES /* bump to next line */ - bdnz ic_dcloop - sync /* ensure prev insts done */ - isync - - /*--------------------------------------------------------------------+ - | Enable Data Cache - +--------------------------------------------------------------------*/ - lis r10,DCACHE_ENABLE@h /* r10 <- D-cache enable msk*/ - ori r10,r10,DCACHE_ENABLE@l - mtdccr r10 - sync /* ensure prev insts done */ - isync - - blr - function_epilog(initb_Dcache) - - -/****************************************************************************** -| -| Routine: INITB_ICACHE -| -| Purpose: This routine will invalidate all data in the Instruction -| Cache then enable I-Cache. -| -| Parameters: None. -| -| Returns: None. -| -******************************************************************************/ - function_prolog(initb_Icache) - /*--------------------------------------------------------------------+ - | Invalidate Instruction Cache - +--------------------------------------------------------------------*/ - li r10,0 /* r10 <- lines address */ - iccci 0,r10 /* invalidate all I-cache */ - sync /* ensure prev insts done */ - isync - - /*--------------------------------------------------------------------+ - | Enable Instruction Cache - +--------------------------------------------------------------------*/ - lis r10,ICACHE_ENABLE@h /* r10 <- I-cache enable msk*/ - ori r10,r10,ICACHE_ENABLE@l - mticcr r10 - sync /* ensure prev insts done */ - isync - - blr - function_epilog(initb_Icache) - -#if 0 -/****************************************************************************** -| -| Routine: INITB_GET_CSPD -| -| Purpose: Determine the CPU Core Speed. The 13.5 Mhz Time Base -| Counter (TBC) is used to measure a conditional branch -| instruction. -| -| Parameters: R3 = Address of Bus Speed -| R4 = Address of Core Speed -| -| Returns: (R3) = >0: Bus Speed. -| 0: Bus Speed not found in Look-Up Table. -| (R4) = >0: Core Speed. -| 0: Core Speed not found in Look-Up Table. -| -| Note: 1. This routine assumes the bdnz branch instruction takes -| two instruction cycles to complete. -| 2. This routine must be called before interrupts are enabled. -| -******************************************************************************/ - function_prolog(initb_get_cspd) - mflr r0 /* Save return address */ - /*--------------------------------------------------------------------+ - | Set-up timed loop - +--------------------------------------------------------------------*/ - lis r9,gcs_time_loop@h /* r9 <- addr loop instr */ - ori r9,r9,gcs_time_loop@l - lis r10,GCS_LCNT@h /* r10 <- loop count */ - ori r10,r10,GCS_LCNT@l - mtctr r10 /* ctr <- loop count */ - lis r11,STB_TIMERS_TBC@h /* r11 <- TBC register addr */ - ori r11,r11,STB_TIMERS_TBC@l - li r12,0 /* r12 <- 0 */ - - /*--------------------------------------------------------------------+ - | Cache timed-loop instruction - +--------------------------------------------------------------------*/ - icbt 0,r9 - sync - isync - - /*--------------------------------------------------------------------+ - | Get number of 13.5 Mhz cycles to execute time-loop - +--------------------------------------------------------------------*/ - stw r12,0(r11) /* reset TBC */ -gcs_time_loop: - bdnz+ gcs_time_loop /* force branch pred taken */ - lwz r5,0(r11) /* r5 <- num 13.5 Mhz ticks */ - li r6,5 /* LUT based on 1/5th the...*/ - divw r5,r5,r6 /*..loop count used */ - sync - isync - - /*--------------------------------------------------------------------+ - | Look-up core speed based on TBC value - +--------------------------------------------------------------------*/ - lis r6,gcs_lookup_table@h /* r6 <- pts at core spd LUT*/ - ori r6,r6,gcs_lookup_table@l - bl gcs_cspd_lookup /* find core speed in LUT */ - - mtlr r0 /* set return address */ - blr - function_epilog(initb_get_cspd) - -#endif -/*****************************************************************************+ -| XXXX XX XX XXXXXX XXXXXXX XXXXXX XX XX XX XXXX -| XX XXX XX X XX X XX X XX XX XXX XX XXXX XX -| XX XXXX XX XX XX X XX XX XXXX XX XX XX XX -| XX XX XXXX XX XXXX XXXXX XX XXXX XX XX XX -| XX XX XXX XX XX X XX XX XX XXX XXXXXX XX -| XX XX XX XX XX X XX XX XX XX XX XX XX XX -| XXXX XX XX XXXX XXXXXXX XXX XX XX XX XX XX XXXXXXX -+*****************************************************************************/ -/****************************************************************************** -| -| Routine: HSMC_CR_WAIT -| -| Purpose: Wait for the HSMC Control Register (bits 12-16) to be reset -| after an auto-refresh, pre-charge or program mode register -| command execution. -| -| Parameters: R3 = HSMC Control Register ID. -| 0: HSMC0 CR0 -| 1: HSMC0 CR1 -| 2: HSMC1 CR0 -| 3: HSMC1 CR1 -| -| Returns: R3 = 0: Successful -| -1: Unsuccessful -| -******************************************************************************/ -hsmc_cr_wait: - - li r11,10 /* r11 <- retry counter */ - mtctr r11 /* set retry counter */ - mr r11,r3 /* r11 <- HSMC CR reg id */ - -hsmc_cr_rep: - bdz hsmc_cr_err /* branch if max retries hit*/ - - /*--------------------------------------------------------------------+ - | GET HSMCx_CRx value based on HSMC Control Register ID - +--------------------------------------------------------------------*/ -try_hsmc0_cr0: /* CHECK IF ID=HSMC0 CR0 REG*/ - cmpwi cr0,r11,0x0000 - bne cr0,try_hsmc0_cr1 - mfdcr r10,hsmc0_cr0 /* r11 <- HSMC0 CR0 value */ - b hsmc_cr_read - -try_hsmc0_cr1: /* CHECK IF ID=HSMC0 CR1 REG*/ - cmpwi cr0,r11,0x0001 - bne cr0,try_hsmc1_cr0 - mfdcr r10,hsmc0_cr1 /* r10 <- HSMC0 CR1 value */ - b hsmc_cr_read - -try_hsmc1_cr0: /* CHECK IF ID=HSMC1 CR0 REG*/ - cmpwi cr0,r11,0x0002 - bne cr0,try_hsmc1_cr1 - mfdcr r10,hsmc1_cr0 /* r10 <- HSMC1 CR0 value */ - b hsmc_cr_read - -try_hsmc1_cr1: /* CHECK IF ID=HSMC1 CR1 REG*/ - cmpwi cr0,r11,0x0003 - bne cr0,hsmc_cr_err - mfdcr r10,hsmc1_cr1 /* r10 <- HSMC1 CR1 value */ - - /*--------------------------------------------------------------------+ - | Check if HSMC CR register was reset after command execution - +--------------------------------------------------------------------*/ -hsmc_cr_read: - lis r12,0x000F /* create "AND" mask */ - ori r12,r12,0x8000 - and. r10,r10,r12 /* r10 <- HSMC CR bits 12-16*/ - bne cr0,hsmc_cr_rep /* wait for bits to reset */ - li r3,0 /* set return code = success*/ - b hsmc_cr_done - -hsmc_cr_err: /* ERROR: SDRAM didn't reset*/ - li r3,-1 /* set RC=unsuccessful */ - -hsmc_cr_done: - blr - -#if 0 -/****************************************************************************** -| -| Routine: GCS_CSPD_LOOKUP -| -| Purpose: Uses the number of 13.5 Mhz clock ticks found after executing -| the branch instruction time loop to look-up the CPU Core Speed -| in the Core Speed Look-up Table. -| -| Parameters: R3 = Address of Bus Speed -| R4 = Address of Core Speed -| R5 = Number of 13.5 Mhz clock ticks found in time loop. -| R6 = Pointer to Core-Speed Look-Up Table -| -| Returns: (R3) = >0: Bus Speed. -| 0: Bus Speed not found in Look-Up Table. -| (R4) = >0: Core Speed. -| 0: Core Speed not found in Look-Up Table. -| -| Note: Core Speed = Bus Speed * Mult Factor (1-4x). -| -******************************************************************************/ -gcs_cspd_lookup: - - li r9,1 /* r9 <- core speed mult */ - /*--------------------------------------------------------------------+ - | Get theoritical number 13.5 Mhz ticks for a given Bus Speed from - | Look-up Table. Check all mult factors to determine if calculated - | value matches theoretical value (within a tolerance). - +--------------------------------------------------------------------*/ -gcs_cspd_loop: - lwz r10,0(r6) /* r10 <- no. ticks from LUT*/ - divw r10,r10,r9 /* r10 <- div mult (1-4x) */ - subi r11,r10,GCS_CTICK_TOL /* r11 <- no. tks low range */ - addi r12,r10,GCS_CTICK_TOL /* r12 <- no. tks high range*/ - - cmpw cr0,r5,r11 /* calc value within range? */ - blt gcs_cspd_retry /* less than low range */ - cmpw cr0,r5,r12 - bgt gcs_cspd_retry /* greater than high range */ - b gcs_cspd_fnd /* calc value within range */ - - /*--------------------------------------------------------------------+ - | SO FAR CORE SPEED NOT FOUND: Check next mult factor - +--------------------------------------------------------------------*/ -gcs_cspd_retry: - addi r9,r9,1 /* bump mult factor (1-4x) */ - cmpwi cr0,r9,GCS_NMULT - ble gcs_cspd_loop - - /*--------------------------------------------------------------------+ - | SO FAR CORE SPEED NOT FOUND: Point at next Bus Speed in LUT - +--------------------------------------------------------------------*/ - li r9,1 /* reset mult factor */ - addi r6,r6,GCS_TROW_BYTES /* point at next table entry*/ - lwz r10,0(r6) - cmpwi cr0,r10,0 /* check for EOT flag */ - bne gcs_cspd_loop - - /*--------------------------------------------------------------------+ - | COMPUTE CORE SPEED AND GET BUS SPEED FROM LOOK-UP TABLE - +--------------------------------------------------------------------*/ -gcs_cspd_fnd: - lwz r5,4(r6) /* r5 <- Bus Speed in LUT */ - mullw r6,r5,r9 /* r6 <- Core speed */ - stw r5,0(r3) /* (r3) <- Bus Speed */ - stw r6,0(r4) /* (r4) <- Core Speed */ - - blr -#endif diff --git a/arch/ppc/boot/simple/rw4/stb.h b/arch/ppc/boot/simple/rw4/stb.h deleted file mode 100644 index 9afa5ab24d260855f0fff8f1471af9e2733c30bf..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/rw4/stb.h +++ /dev/null @@ -1,239 +0,0 @@ -/*----------------------------------------------------------------------------+ -| This source code has been made available to you by IBM on an AS-IS -| basis. Anyone receiving this source is licensed under IBM -| copyrights to use it in any way he or she deems fit, including -| copying it, modifying it, compiling it, and redistributing it either -| with or without modifications. No license under IBM patents or -| patent applications is to be implied by the copyright license. -| -| Any user of this software should understand that IBM cannot provide -| technical support for this software and will not be responsible for -| any consequences resulting from the use of this software. -| -| Any person who transfers this source code or any derivative work -| must include the IBM copyright notice, this paragraph, and the -| preceding two paragraphs in the transferred software. -| -| COPYRIGHT I B M CORPORATION 1999 -| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M -+----------------------------------------------------------------------------*/ -/*----------------------------------------------------------------------------+ -| Author: Maciej P. Tyrlik -| Component: Include file. -| File: stb.h -| Purpose: Common Set-tob-box definitions. -| Changes: -| Date: Comment: -| ----- -------- -| 14-Jan-97 Created for ElPaso pass 1 MPT -| 13-May-97 Added function prototype and global variables MPT -| 08-Dec-98 Added RAW IR task information MPT -| 19-Jan-99 Port to Romeo MPT -| 19-May-00 Changed SDRAM to 32MB contiguous 0x1F000000 - 0x20FFFFFF RLB -+----------------------------------------------------------------------------*/ - -#ifndef _stb_h_ -#define _stb_h_ - -/*----------------------------------------------------------------------------+ -| Read/write from I/O macros. -+----------------------------------------------------------------------------*/ -#define inbyte(port) (*((unsigned char volatile *)(port))) -#define outbyte(port,data) *(unsigned char volatile *)(port)=\ - (unsigned char)(data) - -#define inshort(port) (*((unsigned short volatile *)(port))) -#define outshort(port,data) *(unsigned short volatile *)(port)=\ - (unsigned short)(data) - -#define inword(port) (*((unsigned long volatile *)(port))) -#define outword(port,data) *(unsigned long volatile *)(port)=\ - (unsigned long)(data) - -/*----------------------------------------------------------------------------+ -| STB interrupts. -+----------------------------------------------------------------------------*/ -#define STB_XP_TP_INT 0 -#define STB_XP_APP_INT 1 -#define STB_AUD_INT 2 -#define STB_VID_INT 3 -#define STB_DMA0_INT 4 -#define STB_DMA1_INT 5 -#define STB_DMA2_INT 6 -#define STB_DMA3_INT 7 -#define STB_SCI_INT 8 -#define STB_I2C1_INT 9 -#define STB_I2C2_INT 10 -#define STB_GPT_PWM0 11 -#define STB_GPT_PWM1 12 -#define STB_SCP_INT 13 -#define STB_SSP_INT 14 -#define STB_GPT_PWM2 15 -#define STB_EXT5_INT 16 -#define STB_EXT6_INT 17 -#define STB_EXT7_INT 18 -#define STB_EXT8_INT 19 -#define STB_SCC_INT 20 -#define STB_SICC_RECV_INT 21 -#define STB_SICC_TRAN_INT 22 -#define STB_PPU_INT 23 -#define STB_DCRX_INT 24 -#define STB_EXT0_INT 25 -#define STB_EXT1_INT 26 -#define STB_EXT2_INT 27 -#define STB_EXT3_INT 28 -#define STB_EXT4_INT 29 -#define STB_REDWOOD_ENET_INT STB_EXT1_INT - -/*----------------------------------------------------------------------------+ -| STB tasks, task stack sizes, and task priorities. The actual task priority -| is 1 more than the specified number since priority 0 is reserved (system -| internally adds 1 to supplied priority number). -+----------------------------------------------------------------------------*/ -#define STB_IDLE_TASK_SS (5* 1024) -#define STB_IDLE_TASK_PRIO 0 -#define STB_LEDTEST_SS (2* 1024) -#define STB_LEDTEST_PRIO 0 -#define STB_CURSOR_TASK_SS (10* 1024) -#define STB_CURSOR_TASK_PRIO 7 -#define STB_MPEG_TASK_SS (10* 1024) -#define STB_MPEG_TASK_PRIO 9 -#define STB_DEMUX_TASK_SS (10* 1024) -#define STB_DEMUX_TASK_PRIO 20 -#define RAW_STB_IR_TASK_SS (10* 1024) -#define RAW_STB_IR_TASK_PRIO 20 - -#define STB_SERIAL_ER_TASK_SS (10* 1024) -#define STB_SERIAL_ER_TASK_PRIO 1 -#define STB_CA_TASK_SS (10* 1024) -#define STB_CA_TASK_PRIO 8 - -#define INIT_DEFAULT_VIDEO_SS (10* 1024) -#define INIT_DEFAULT_VIDEO_PRIO 8 -#define INIT_DEFAULT_SERVI_SS (10* 1024) -#define INIT_DEFAULT_SERVI_PRIO 8 -#define INIT_DEFAULT_POST_SS (10* 1024) -#define INIT_DEFAULT_POST_PRIO 8 -#define INIT_DEFAULT_INTER_SS (10* 1024) -#define INIT_DEFAULT_INTER_PRIO 8 -#define INIT_DEFAULT_BR_SS (10* 1024) -#define INIT_DEFAULT_BR_PRIO 8 -#define INITIAL_TASK_STACK_SIZE (32* 1024) - -#ifdef VESTA -/*----------------------------------------------------------------------------+ -| Vesta Overall Address Map (all addresses are double mapped, bit 0 of the -| address is not decoded. Numbers below are dependent on board configuration. -| FLASH, SDRAM, DRAM numbers can be affected by actual board setup. -| -| FFE0,0000 - FFFF,FFFF FLASH -| F200,0000 - F210,FFFF FPGA logic -| Ethernet = F200,0000 -| LED Display = F200,0100 -| Xilinx #1 Regs = F204,0000 -| Xilinx #2 Regs = F208,0000 -| Spare = F20C,0000 -| IDE CS0 = F210,0000 -| F410,0000 - F410,FFFF IDE CS1 -| C000,0000 - C7FF,FFFF OBP -| C000,0000 - C000,0014 SICC (16550 + infra red) -| C001,0000 - C001,0018 PPU (Parallel Port) -| C002,0000 - C002,001B SC0 (Smart Card 0) -| C003,0000 - C003,000F I2C0 -| C004,0000 - C004,0009 SCC (16550 UART) -| C005,0000 - C005,0124 GPT (Timers) -| C006,0000 - C006,0058 GPIO0 -| C007,0000 - C007,001b SC1 (Smart Card 1) -| C008,0000 - C008,FFFF Unused -| C009,0000 - C009,FFFF Unused -| C00A,0000 - C00A,FFFF Unused -| C00B,0000 - C00B,000F I2C1 -| C00C,0000 - C00C,0006 SCP -| C00D,0000 - C00D,0010 SSP -| A000,0000 - A0FF,FFFF SDRAM1 (16M) -| 0000,0000 - 00FF,FFFF SDRAM0 (16M) -+----------------------------------------------------------------------------*/ -#define STB_FLASH_BASE_ADDRESS 0xFFE00000 -#define STB_FPGA_BASE_ADDRESS 0xF2000000 -#define STB_SICC_BASE_ADDRESS 0xC0000000 -#define STB_PPU_BASE_ADDR 0xC0010000 -#define STB_SC0_BASE_ADDRESS 0xC0020000 -#define STB_I2C1_BASE_ADDRESS 0xC0030000 -#define STB_SCC_BASE_ADDRESS 0xC0040000 -#define STB_TIMERS_BASE_ADDRESS 0xC0050000 -#define STB_GPIO0_BASE_ADDRESS 0xC0060000 -#define STB_SC1_BASE_ADDRESS 0xC0070000 -#define STB_I2C2_BASE_ADDRESS 0xC00B0000 -#define STB_SCP_BASE_ADDRESS 0xC00C0000 -#define STB_SSP_BASE_ADDRESS 0xC00D0000 -/*----------------------------------------------------------------------------+ -|The following are used by the IBM RTOS SW. -|15-May-00 Changed these values to reflect movement of base addresses in -|order to support 32MB of contiguous SDRAM space. -|Points to the cacheable region since these values are used in IBM RTOS -|to establish the vector address. -+----------------------------------------------------------------------------*/ -#define STB_SDRAM1_BASE_ADDRESS 0x20000000 -#define STB_SDRAM1_SIZE 0x01000000 -#define STB_SDRAM0_BASE_ADDRESS 0x1F000000 -#define STB_SDRAM0_SIZE 0x01000000 - -#else -/*----------------------------------------------------------------------------+ -| ElPaso Overall Address Map (all addresses are double mapped, bit 0 of the -| address is not decoded. Numbers below are dependent on board configuration. -| FLASH, SDRAM, DRAM numbers can be affected by actual board setup. OPB -| devices are inside the ElPaso chip. -| FFE0,0000 - FFFF,FFFF FLASH -| F144,0000 - F104,FFFF FPGA logic -| F140,0000 - F100,0000 ethernet (through FPGA logic) -| C000,0000 - C7FF,FFFF OBP -| C000,0000 - C000,0014 SICC (16550+ infra red) -| C001,0000 - C001,0016 PPU (parallel port) -| C002,0000 - C002,001B SC (smart card) -| C003,0000 - C003,000F I2C 1 -| C004,0000 - C004,0009 SCC (16550 UART) -| C005,0000 - C005,0124 Timers -| C006,0000 - C006,0058 GPIO0 -| C007,0000 - C007,0058 GPIO1 -| C008,0000 - C008,0058 GPIO2 -| C009,0000 - C009,0058 GPIO3 -| C00A,0000 - C00A,0058 GPIO4 -| C00B,0000 - C00B,000F I2C 2 -| C00C,0000 - C00C,0006 SCP -| C00D,0000 - C00D,0006 SSP -| A000,0000 - A0FF,FFFF SDRAM 16M -| 0000,0000 - 00FF,FFFF DRAM 16M -+----------------------------------------------------------------------------*/ -#define STB_FLASH_BASE_ADDRESS 0xFFE00000 -#define STB_FPGA_BASE_ADDRESS 0xF1440000 -#define STB_ENET_BASE_ADDRESS 0xF1400000 -#define STB_SICC_BASE_ADDRESS 0xC0000000 -#define STB_PPU_BASE_ADDR 0xC0010000 -#define STB_SC_BASE_ADDRESS 0xC0020000 -#define STB_I2C1_BASE_ADDRESS 0xC0030000 -#define STB_SCC_BASE_ADDRESS 0xC0040000 -#define STB_TIMERS_BASE_ADDRESS 0xC0050000 -#define STB_GPIO0_BASE_ADDRESS 0xC0060000 -#define STB_GPIO1_BASE_ADDRESS 0xC0070000 -#define STB_GPIO2_BASE_ADDRESS 0xC0080000 -#define STB_GPIO3_BASE_ADDRESS 0xC0090000 -#define STB_GPIO4_BASE_ADDRESS 0xC00A0000 -#define STB_I2C2_BASE_ADDRESS 0xC00B0000 -#define STB_SCP_BASE_ADDRESS 0xC00C0000 -#define STB_SSP_BASE_ADDRESS 0xC00D0000 -#define STB_SDRAM_BASE_ADDRESS 0xA0000000 -#endif - -/*----------------------------------------------------------------------------+ -| Other common defines. -+----------------------------------------------------------------------------*/ -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#endif /* _stb_h_ */ diff --git a/arch/ppc/boot/simple/uartlite_tty.c b/arch/ppc/boot/simple/uartlite_tty.c deleted file mode 100644 index ca1743e3e912d5ddc1ce0ee642a80530116ca4e1..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/simple/uartlite_tty.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Xilinx UARTLITE bootloader driver - * - * Copyright (c) 2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include - -#define UARTLITE_BASEADDR ((void*)(XPAR_UARTLITE_0_BASEADDR)) - -unsigned long -serial_init(int chan, void *ignored) -{ - /* Clear the RX FIFO */ - out_be32(UARTLITE_BASEADDR + 0x0C, 0x2); - return 0; -} - -void -serial_putc(unsigned long com_port, unsigned char c) -{ - while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x08) != 0); /* spin */ - out_be32(UARTLITE_BASEADDR + 0x4, c); -} - -unsigned char -serial_getc(unsigned long com_port) -{ - while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) == 0); /* spin */ - return in_be32(UARTLITE_BASEADDR); -} - -int -serial_tstc(unsigned long com_port) -{ - return ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) != 0); -} diff --git a/arch/ppc/boot/utils/.gitignore b/arch/ppc/boot/utils/.gitignore deleted file mode 100644 index bbdfb3b9c532467fc42b8f6f1d9267aa784e092a..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/utils/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -mkprep -mkbugboot -mktree diff --git a/arch/ppc/boot/utils/elf.pl b/arch/ppc/boot/utils/elf.pl deleted file mode 100644 index d3e9d9d5b84e43d2537c9b548d8c96b950cf0c7e..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/utils/elf.pl +++ /dev/null @@ -1,33 +0,0 @@ -# -# ELF header field numbers -# - -$e_ident = 0; # Identification bytes / magic number -$e_type = 1; # ELF file type -$e_machine = 2; # Target machine type -$e_version = 3; # File version -$e_entry = 4; # Start address -$e_phoff = 5; # Program header file offset -$e_shoff = 6; # Section header file offset -$e_flags = 7; # File flags -$e_ehsize = 8; # Size of ELF header -$e_phentsize = 9; # Size of program header -$e_phnum = 10; # Number of program header entries -$e_shentsize = 11; # Size of section header -$e_shnum = 12; # Number of section header entries -$e_shstrndx = 13; # Section header table string index - -# -# Section header field numbers -# - -$sh_name = 0; # Section name -$sh_type = 1; # Section header type -$sh_flags = 2; # Section header flags -$sh_addr = 3; # Virtual address -$sh_offset = 4; # File offset -$sh_size = 5; # Section size -$sh_link = 6; # Miscellaneous info -$sh_info = 7; # More miscellaneous info -$sh_addralign = 8; # Memory alignment -$sh_entsize = 9; # Entry size if this is a table diff --git a/arch/ppc/boot/utils/mkbugboot.c b/arch/ppc/boot/utils/mkbugboot.c deleted file mode 100644 index 1640c4199ca623294813f2dbee0d06d6b33590e6..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/utils/mkbugboot.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Makes a Motorola PPCBUG ROM bootable image which can be flashed - * into one of the FLASH banks on a Motorola PowerPlus board. - * - * Author: Matt Porter - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#define ELF_HEADER_SIZE 65536 - -#include -#include -#include -#include -#include -#include -#include -#include -#ifdef __sun__ -#include -#else -#include -#endif - -/* size of read buffer */ -#define SIZE 0x1000 - -/* PPCBUG ROM boot header */ -typedef struct bug_boot_header { - uint8_t magic_word[4]; /* "BOOT" */ - uint32_t entry_offset; /* Offset from top of header to code */ - uint32_t routine_length; /* Length of code */ - uint8_t routine_name[8]; /* Name of the boot code */ -} bug_boot_header_t; - -#define HEADER_SIZE sizeof(bug_boot_header_t) - -void update_checksum(void *buf, size_t size, uint16_t *sum) -{ - uint32_t csum = *sum; - - while (size) { - csum += *(uint16_t *)buf; - if (csum > 0xffff) - csum -= 0xffff; - buf = (uint16_t *)buf + 1; - size -= 2; - } - *sum = csum; -} - -uint32_t copy_image(int in_fd, int out_fd, uint16_t *sum) -{ - uint8_t buf[SIZE]; - int offset = 0; - int n; - uint32_t image_size = 0; - - lseek(in_fd, ELF_HEADER_SIZE, SEEK_SET); - - /* Copy an image while recording its size */ - while ( (n = read(in_fd, buf + offset, SIZE - offset)) > 0 ) { - n += offset; - offset = n & 1; - n -= offset; - image_size = image_size + n; - /* who's going to deal with short writes? */ - write(out_fd, buf, n); - update_checksum(buf, n, sum); - if (offset) - buf[0] = buf[n]; - } - - /* BUG romboot requires that our size is divisible by 2 */ - /* align image to 2 byte boundary */ - if (offset) { - image_size += 2; - buf[1] = '\0'; - write(out_fd, buf, 2); - update_checksum(buf, 2, sum); - } - return image_size; -} - -void write_bugboot_header(int out_fd, uint32_t boot_size, uint16_t *sum) -{ - static bug_boot_header_t bbh = { - .magic_word = "BOOT", - .routine_name = "LINUXROM" - }; - - /* Fill in the PPCBUG ROM boot header */ - bbh.entry_offset = htonl(HEADER_SIZE); /* Entry address */ - bbh.routine_length= htonl(HEADER_SIZE+boot_size+2); /* Routine length */ - - /* Output the header and bootloader to the file */ - write(out_fd, &bbh, sizeof(bug_boot_header_t)); - update_checksum(&bbh, sizeof(bug_boot_header_t), sum); -} - -int main(int argc, char *argv[]) -{ - int image_fd, bugboot_fd; - uint32_t kernel_size = 0; - uint16_t checksum = 0; - - if (argc != 3) { - fprintf(stderr, "usage: %s \n",argv[0]); - exit(-1); - } - - /* Get file args */ - - /* kernel image file */ - if ((image_fd = open(argv[1] , 0)) < 0) - exit(-1); - - /* bugboot file */ - if (!strcmp(argv[2], "-")) - bugboot_fd = 1; /* stdout */ - else if ((bugboot_fd = creat(argv[2] , 0755)) < 0) - exit(-1); - - /* Set file position after ROM header block where zImage will be written */ - lseek(bugboot_fd, HEADER_SIZE, SEEK_SET); - - /* Copy kernel image into bugboot image */ - kernel_size = copy_image(image_fd, bugboot_fd, &checksum); - - /* Set file position to beginning where header/romboot will be written */ - lseek(bugboot_fd, 0, SEEK_SET); - - /* Write out BUG header/romboot */ - write_bugboot_header(bugboot_fd, kernel_size, &checksum); - - /* Write out the calculated checksum */ - lseek(bugboot_fd, 0, SEEK_END); - write(bugboot_fd, &checksum, 2); - - /* Close bugboot file */ - close(bugboot_fd); - return 0; -} diff --git a/arch/ppc/boot/utils/mkprep.c b/arch/ppc/boot/utils/mkprep.c deleted file mode 100644 index 192bb397126fac25f5eae2901316252dc19803e6..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/utils/mkprep.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Makes a prep bootable image which can be dd'd onto - * a disk device to make a bootdisk. Will take - * as input a elf executable, strip off the header - * and write out a boot image as: - * 1) default - strips elf header - * suitable as a network boot image - * 2) -pbp - strips elf header and writes out prep boot partition image - * cat or dd onto disk for booting - * 3) -asm - strips elf header and writes out as asm data - * useful for generating data for a compressed image - * -- Cort - * - * Modified for x86 hosted builds by Matt Porter - * Modified for Sparc hosted builds by Peter Wahl - */ - -#include -#include -#include - -/* size of read buffer */ -#define SIZE 0x1000 - -/* - * Partition table entry - * - from the PReP spec - */ -typedef struct partition_entry { - unsigned char boot_indicator; - unsigned char starting_head; - unsigned char starting_sector; - unsigned char starting_cylinder; - - unsigned char system_indicator; - unsigned char ending_head; - unsigned char ending_sector; - unsigned char ending_cylinder; - - unsigned char beginning_sector[4]; - unsigned char number_of_sectors[4]; -} partition_entry_t; - -#define BootActive 0x80 -#define SystemPrep 0x41 - -void copy_image(FILE *, FILE *); -void write_prep_partition(FILE *, FILE *); -void write_asm_data(FILE *, FILE *); - -unsigned int elfhdr_size = 65536; - -int main(int argc, char *argv[]) -{ - FILE *in, *out; - int argptr = 1; - int prep = 0; - int asmoutput = 0; - - if (argc < 3 || argc > 4) { - fprintf(stderr, "usage: %s [-pbp] [-asm] \n", - argv[0]); - exit(-1); - } - -/* needs to handle args more elegantly -- but this is a small/simple program */ - - /* check for -pbp */ - if (!strcmp(argv[argptr], "-pbp")) { - prep = 1; - argptr++; - } - - /* check for -asm */ - if (!strcmp(argv[argptr], "-asm")) { - asmoutput = 1; - argptr++; - } - - /* input file */ - if (!strcmp(argv[argptr], "-")) - in = stdin; - else if (!(in = fopen(argv[argptr], "r"))) - exit(-1); - argptr++; - - /* output file */ - if (!strcmp(argv[argptr], "-")) - out = stdout; - else if (!(out = fopen(argv[argptr], "w"))) - exit(-1); - argptr++; - - /* skip elf header in input file */ - /*if ( !prep )*/ - fseek(in, elfhdr_size, SEEK_SET); - - /* write prep partition if necessary */ - if (prep) - write_prep_partition(in, out); - - /* write input image to bootimage */ - if (asmoutput) - write_asm_data(in, out); - else - copy_image(in, out); - - return 0; -} - -void store_le32(unsigned int v, unsigned char *p) -{ - p[0] = v; - p[1] = v >>= 8; - p[2] = v >>= 8; - p[3] = v >> 8; -} - -void write_prep_partition(FILE *in, FILE *out) -{ - unsigned char block[512]; - partition_entry_t pe; - unsigned char *entry = block; - unsigned char *length = block + 4; - long pos = ftell(in), size; - - if (fseek(in, 0, SEEK_END) < 0) { - fprintf(stderr,"info failed\n"); - exit(-1); - } - size = ftell(in); - if (fseek(in, pos, SEEK_SET) < 0) { - fprintf(stderr,"info failed\n"); - exit(-1); - } - - memset(block, '\0', sizeof(block)); - - /* set entry point and boot image size skipping over elf header */ - store_le32(0x400/*+65536*/, entry); - store_le32(size-elfhdr_size+0x400, length); - - /* sets magic number for msdos partition (used by linux) */ - block[510] = 0x55; - block[511] = 0xAA; - - /* - * Build a "PReP" partition table entry in the boot record - * - "PReP" may only look at the system_indicator - */ - pe.boot_indicator = BootActive; - pe.system_indicator = SystemPrep; - /* - * The first block of the diskette is used by this "boot record" which - * actually contains the partition table. (The first block of the - * partition contains the boot image, but I digress...) We'll set up - * one partition on the diskette and it shall contain the rest of the - * diskette. - */ - pe.starting_head = 0; /* zero-based */ - pe.starting_sector = 2; /* one-based */ - pe.starting_cylinder = 0; /* zero-based */ - pe.ending_head = 1; /* assumes two heads */ - pe.ending_sector = 18; /* assumes 18 sectors/track */ - pe.ending_cylinder = 79; /* assumes 80 cylinders/diskette */ - - /* - * The "PReP" software ignores the above fields and just looks at - * the next two. - * - size of the diskette is (assumed to be) - * (2 tracks/cylinder)(18 sectors/tracks)(80 cylinders/diskette) - * - unlike the above sector numbers, the beginning sector is zero-based! - */ -#if 0 - store_le32(1, pe.beginning_sector); -#else - /* This has to be 0 on the PowerStack? */ - store_le32(0, pe.beginning_sector); -#endif - - store_le32(2*18*80-1, pe.number_of_sectors); - - memcpy(&block[0x1BE], &pe, sizeof(pe)); - - fwrite(block, sizeof(block), 1, out); - fwrite(entry, 4, 1, out); - fwrite(length, 4, 1, out); - /* set file position to 2nd sector where image will be written */ - fseek( out, 0x400, SEEK_SET ); -} - - - -void copy_image(FILE *in, FILE *out) -{ - char buf[SIZE]; - int n; - - while ( (n = fread(buf, 1, SIZE, in)) > 0 ) - fwrite(buf, 1, n, out); -} - - -void -write_asm_data(FILE *in, FILE *out) -{ - int i, cnt, pos = 0; - unsigned int cksum = 0, val; - unsigned char *lp; - unsigned char buf[SIZE]; - size_t len; - - fputs("\t.data\n\t.globl input_data\ninput_data:\n", out); - while ((len = fread(buf, 1, sizeof(buf), in)) > 0) { - cnt = 0; - lp = buf; - /* Round up to longwords */ - while (len & 3) - buf[len++] = '\0'; - for (i = 0; i < len; i += 4) { - if (cnt == 0) - fputs("\t.long\t", out); - fprintf(out, "0x%02X%02X%02X%02X", - lp[0], lp[1], lp[2], lp[3]); - val = *(unsigned long *)lp; - cksum ^= val; - lp += 4; - if (++cnt == 4) { - cnt = 0; - fprintf(out, " # %x \n", pos+i-12); - } else { - fputs(",", out); - } - } - if (cnt) - fputs("0\n", out); - pos += len; - } - fprintf(out, "\t.globl input_len\ninput_len:\t.long\t0x%x\n", pos); - fprintf(stderr, "cksum = %x\n", cksum); -} diff --git a/arch/ppc/boot/utils/mktree.c b/arch/ppc/boot/utils/mktree.c deleted file mode 100644 index 2be22e28f2b316f416a89ccc70f219378233092b..0000000000000000000000000000000000000000 --- a/arch/ppc/boot/utils/mktree.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Makes a tree bootable image for IBM Evaluation boards. - * Basically, just take a zImage, skip the ELF header, and stuff - * a 32 byte header on the front. - * - * We use htonl, which is a network macro, to make sure we're doing - * The Right Thing on an LE machine. It's non-obvious, but it should - * work on anything BSD'ish. - */ - -#include -#include -#include -#include -#include -#include -#include -#ifdef __sun__ -#include -#else -#include -#endif - -/* This gets tacked on the front of the image. There are also a few - * bytes allocated after the _start label used by the boot rom (see - * head.S for details). - */ -typedef struct boot_block { - uint32_t bb_magic; /* 0x0052504F */ - uint32_t bb_dest; /* Target address of the image */ - uint32_t bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */ - uint32_t bb_debug_flag; /* Run debugger or image after load */ - uint32_t bb_entry_point; /* The image address to start */ - uint32_t bb_checksum; /* 32 bit checksum including header */ - uint32_t reserved[2]; -} boot_block_t; - -#define IMGBLK 512 -char tmpbuf[IMGBLK]; - -int main(int argc, char *argv[]) -{ - int in_fd, out_fd; - int nblks, i; - uint cksum, *cp; - struct stat st; - boot_block_t bt; - - if (argc < 3) { - fprintf(stderr, "usage: %s [entry-point]\n",argv[0]); - exit(1); - } - - if (stat(argv[1], &st) < 0) { - perror("stat"); - exit(2); - } - - nblks = (st.st_size + IMGBLK) / IMGBLK; - - bt.bb_magic = htonl(0x0052504F); - - /* If we have the optional entry point parameter, use it */ - if (argc == 4) - bt.bb_dest = bt.bb_entry_point = htonl(strtoul(argv[3], NULL, 0)); - else - bt.bb_dest = bt.bb_entry_point = htonl(0x500000); - - /* We know these from the linker command. - * ...and then move it up into memory a little more so the - * relocation can happen. - */ - bt.bb_num_512blocks = htonl(nblks); - bt.bb_debug_flag = 0; - - bt.bb_checksum = 0; - - /* To be neat and tidy :-). - */ - bt.reserved[0] = 0; - bt.reserved[1] = 0; - - if ((in_fd = open(argv[1], O_RDONLY)) < 0) { - perror("zImage open"); - exit(3); - } - - if ((out_fd = open(argv[2], (O_RDWR | O_CREAT | O_TRUNC), 0666)) < 0) { - perror("bootfile open"); - exit(3); - } - - cksum = 0; - cp = (void *)&bt; - for (i=0; i 0) { - if (read(in_fd, tmpbuf, IMGBLK) < 0) { - perror("zImage read"); - exit(5); - } - cp = (uint *)tmpbuf; - for (i=0; i kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0xff000000 -CONFIG_MTD_PHYSMAP_LEN=0x01000000 -CONFIG_MTD_PHYSMAP_BANKWIDTH=4 -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_MTD_PHRAM=y -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=32768 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# - -# -# Ethernet (10 or 100Mbit) -# -# CONFIG_NET_ETHERNET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_MV643XX_ETH=y -CONFIG_MV643XX_ETH_0=y -# CONFIG_MV643XX_ETH_1 is not set -# CONFIG_MV643XX_ETH_2 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_MPSC=y -CONFIG_SERIAL_MPSC_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_MV64X60_WDT=y - -# -# PCI-based Watchdog Cards -# -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Misc devices -# - -# -# Multimedia Capabilities Port drivers -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# SN Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/hdpu_defconfig b/arch/ppc/configs/hdpu_defconfig deleted file mode 100644 index 956a17897e331e2ef67066d37856e274a45eb70b..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/hdpu_defconfig +++ /dev/null @@ -1,890 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.11 -# Wed Mar 16 12:43:19 2005 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_LOCK_KERNEL=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_HOTPLUG=y -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -# CONFIG_CPUSETS is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y -CONFIG_STOP_MACHINE=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -# CONFIG_PM is not set -CONFIG_PPC_STD_MMU=y -# CONFIG_NOT_COHERENT_CACHE is not set - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_KATANA is not set -# CONFIG_WILLOW is not set -# CONFIG_CPCI690 is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_CHESTNUT is not set -# CONFIG_SPRUCE is not set -CONFIG_HDPU=y -# CONFIG_EV64260 is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_RADSTONE_PPC7D is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX8260 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -# CONFIG_PQ2FADS is not set -# CONFIG_LITE5200 is not set -# CONFIG_MPC834x_SYS is not set -CONFIG_MV64360=y -CONFIG_MV64X60=y - -# -# Set bridge options -# -CONFIG_MV64X60_BASE=0xf1000000 -CONFIG_MV64X60_NEW_BASE=0xf1000000 -# CONFIG_SMP is not set -# CONFIG_IRQ_ALL_CPUS is not set -# CONFIG_NR_CPUS is not set -CONFIG_PREEMPT=y -CONFIG_HIGHMEM=y -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=y -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="root=/dev/nfs ip=auto" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_LEGACY_PROC=y -CONFIG_PCI_NAMES=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Advanced setup -# -CONFIG_ADVANCED_OPTIONS=y -# CONFIG_HIGHMEM_START_BOOL is not set -CONFIG_HIGHMEM_START=0xfe000000 -# CONFIG_LOWMEM_SIZE_BOOL is not set -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START_BOOL=y -CONFIG_KERNEL_START=0x80000000 -# CONFIG_TASK_SIZE_BOOL is not set -CONFIG_TASK_SIZE=0x80000000 -# CONFIG_BOOT_LOAD_BOOL is not set -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -# CONFIG_MTD_BLOCK is not set -# CONFIG_MTD_BLOCK_RO is not set -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0xfc000000 -CONFIG_MTD_PHYSMAP_LEN=0x04000000 -CONFIG_MTD_PHYSMAP_BANKWIDTH=4 - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_CHR_DEV_SG=y - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -CONFIG_SCSI_CONSTANTS=y -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -CONFIG_SCSI_AIC7XXX=y -CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 -CONFIG_AIC7XXX_RESET_DELAY_MS=15000 -# CONFIG_AIC7XXX_DEBUG_ENABLE is not set -CONFIG_AIC7XXX_DEBUG_MASK=0 -# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_IP_TCPDIAG is not set -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set -CONFIG_MV643XX_ETH=y -CONFIG_MV643XX_ETH_0=y -# CONFIG_MV643XX_ETH_1 is not set -# CONFIG_MV643XX_ETH_2 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_MPSC=y -CONFIG_SERIAL_MPSC_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -# CONFIG_EXT3_FS_XATTR is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -CONFIG_JOLIET=y -# CONFIG_ZISOFS is not set -CONFIG_UDF_FS=y -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -# CONFIG_JFFS2_FS_NAND is not set -# CONFIG_JFFS2_FS_NOR_ECC is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V4=y -CONFIG_NFS_DIRECTIO=y -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V4=y -CONFIG_NFSD_TCP=y -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -CONFIG_RPCSEC_GSS_KRB5=y -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -# CONFIG_NLS_ISO8859_1 is not set -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=15 -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set -# CONFIG_CRYPTO_TGR192 is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/katana_defconfig b/arch/ppc/configs/katana_defconfig deleted file mode 100644 index 7311fe6b42decc55c810976594745f93d6d63edc..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/katana_defconfig +++ /dev/null @@ -1,948 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-mm1 -# Thu Sep 1 17:16:03 2005 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -CONFIG_PPC_FPU=y -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -# CONFIG_WANT_EARLY_SERIAL is not set -CONFIG_PPC_STD_MMU=y -CONFIG_NOT_COHERENT_CACHE=y - -# -# Performance-monitoring counters support -# -# CONFIG_PERFCTR is not set - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -CONFIG_KATANA=y -# CONFIG_WILLOW is not set -# CONFIG_CPCI690 is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_CHESTNUT is not set -# CONFIG_SPRUCE is not set -# CONFIG_HDPU is not set -# CONFIG_EV64260 is not set -# CONFIG_LOPEC is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_RADSTONE_PPC7D is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX8260 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -# CONFIG_PQ2FADS is not set -# CONFIG_LITE5200 is not set -# CONFIG_MPC834x_SYS is not set -# CONFIG_EV64360 is not set -CONFIG_MV64360=y -CONFIG_MV64X60=y - -# -# Set bridge options -# -CONFIG_MV64X60_BASE=0xf8100000 -CONFIG_MV64X60_NEW_BASE=0xf8100000 -# CONFIG_SMP is not set -CONFIG_HIGHMEM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=y -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyMM0 ip=on" -# CONFIG_PM is not set -CONFIG_SECCOMP=y -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_LEGACY_PROC=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Advanced setup -# -CONFIG_ADVANCED_OPTIONS=y -# CONFIG_HIGHMEM_START_BOOL is not set -CONFIG_HIGHMEM_START=0xfe000000 -# CONFIG_LOWMEM_SIZE_BOOL is not set -CONFIG_LOWMEM_SIZE=0x30000000 -# CONFIG_KERNEL_START_BOOL is not set -CONFIG_KERNEL_START=0xc0000000 -# CONFIG_TASK_SIZE_BOOL is not set -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START_BOOL=y -CONFIG_CONSISTENT_START=0xf0000000 -CONFIG_CONSISTENT_SIZE_BOOL=y -CONFIG_CONSISTENT_SIZE=0x00400000 -# CONFIG_BOOT_LOAD_BOOL is not set -CONFIG_BOOT_LOAD=0x00800000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETFILTER_NETLINK is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -# CONFIG_MTD_CFI_I1 is not set -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0xe0000000 -CONFIG_MTD_PHYSMAP_LEN=0x0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=4 -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -CONFIG_MTD_PHRAM=y -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_ULI526X is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -CONFIG_E1000=y -# CONFIG_E1000_NAPI is not set -# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -CONFIG_MV643XX_ETH=y -CONFIG_MV643XX_ETH_0=y -CONFIG_MV643XX_ETH_1=y -CONFIG_MV643XX_ETH_2=y - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_KGDBOE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NETPOLL_RX is not set -# CONFIG_NETPOLL_TRAP is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_MPSC=y -CONFIG_SERIAL_MPSC_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_SCx200_ACB is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VOODOO3 is not set -# CONFIG_I2C_PCA_ISA is not set -CONFIG_I2C_MV64XXX=y - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_RTC8564 is not set -CONFIG_SENSORS_M41T00=y -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Misc devices -# - -# -# Multimedia Capabilities Port drivers -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# SN Devices -# - -# -# Distributed Lock Manager -# -# CONFIG_DLM is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISER4_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set -# CONFIG_RELAYFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_ASFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/lite5200_defconfig b/arch/ppc/configs/lite5200_defconfig deleted file mode 100644 index 7e7a943d8cfe987158a49e01df80db86523bb9ce..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/lite5200_defconfig +++ /dev/null @@ -1,436 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -CONFIG_MODVERSIONS=y -CONFIG_KMOD=y -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -# CONFIG_ALTIVEC is not set -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_FSL_OCP=y -CONFIG_PPC_STD_MMU=y -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -CONFIG_LITE5200=y -CONFIG_PPC_MPC52xx=y -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0 root=/dev/ram0 rw" -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set -# -# Advanced setup -# -CONFIG_ADVANCED_OPTIONS=y -CONFIG_HIGHMEM_START=0xfe000000 -# CONFIG_LOWMEM_SIZE_BOOL is not set -CONFIG_LOWMEM_SIZE=0x30000000 -# CONFIG_KERNEL_START_BOOL is not set -CONFIG_KERNEL_START=0xc0000000 -# CONFIG_TASK_SIZE_BOOL is not set -CONFIG_TASK_SIZE=0x80000000 -# CONFIG_BOOT_LOAD_BOOL is not set -CONFIG_BOOT_LOAD=0x00800000 -# -# Device Drivers -# -# -# Generic Driver Options -# -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_DEBUG_DRIVER is not set -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set -# -# Parallel port support -# -# CONFIG_PARPORT is not set -# -# Plug and Play support -# -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set -# -# SCSI device support -# -# CONFIG_SCSI is not set -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set -# -# Fusion MPT device support -# -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set -# -# I2O device support -# -# CONFIG_I2O is not set -# -# Macintosh device drivers -# -# -# Networking support -# -# CONFIG_NET is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# -# ISDN subsystem -# -# -# Telephony Support -# -# CONFIG_PHONE is not set -# -# Input device support -# -CONFIG_INPUT=y -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=y -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_MPC52xx=y -CONFIG_SERIAL_MPC52xx_CONSOLE=y -CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=9600 -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set -# -# I2C support -# -# CONFIG_I2C is not set -# -# Misc devices -# -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -# -# Digital Video Broadcasting Devices -# -# -# Graphics support -# -# CONFIG_FB is not set -# -# Console display driver support -# -CONFIG_VGA_CONSOLE=y -# CONFIG_MDA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# -# Sound -# -# CONFIG_SOUND is not set -# -# USB support -# -# CONFIG_USB is not set -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -# CONFIG_NLS_CODEPAGE_437 is not set -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=m -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_UTF8 is not set -# -# Library routines -# -# CONFIG_CRC16 is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set -# -# Profiling support -# -# CONFIG_PROFILING is not set -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SLAB is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_SPINLOCK_SLEEP=y -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -# CONFIG_BDI_SWITCH is not set -CONFIG_DEBUG_INFO=y -CONFIG_SERIAL_TEXT_DEBUG=y -CONFIG_PPC_OCP=y -# -# Security options -# -# CONFIG_SECURITY is not set -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/lopec_defconfig b/arch/ppc/configs/lopec_defconfig deleted file mode 100644 index 85ea06b3b5c6b1c8eb65730e162be2e79aea2eed..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/lopec_defconfig +++ /dev/null @@ -1,814 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_HOTPLUG=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -CONFIG_LOPEC=y -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_EPIC_SERIAL_MODE=y -CONFIG_MPC10X_BRIDGE=y -# CONFIG_MPC10X_STORE_GATHERING is not set -CONFIG_PPCBUG_NVRAM=y -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=m -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -CONFIG_PCI_NAMES=y - -# -# PCMCIA/CardBus support -# -# CONFIG_PCMCIA is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -# CONFIG_FW_LOADER is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=m -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=m -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -CONFIG_BLK_DEV_IDEDISK=y -CONFIG_IDEDISK_MULTI_MODE=y -# CONFIG_IDEDISK_STROKE is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -CONFIG_BLK_DEV_IDEPCI=y -# CONFIG_IDEPCI_SHARE_IRQ is not set -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_BLK_DEV_GENERIC=y -# CONFIG_BLK_DEV_OPTI621 is not set -CONFIG_BLK_DEV_SL82C105=y -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -CONFIG_IDEDMA_PCI_AUTO=y -# CONFIG_IDEDMA_ONLYDISK is not set -CONFIG_BLK_DEV_ADMA=y -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -CONFIG_IDEDMA_AUTO=y -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set -CONFIG_SCSI_CONSTANTS=y -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INIA100 is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_QLA6322 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_E100_NAPI is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=1 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB=m -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set -# CONFIG_USB_DYNAMIC_MINORS is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_EHCI_HCD is not set -CONFIG_USB_OHCI_HCD=m -# CONFIG_USB_UHCI_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_BLUETOOTH_TTY is not set -CONFIG_USB_ACM=m -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_STORAGE is not set - -# -# USB Human Interface Devices (HID) -# -CONFIG_USB_HID=m - -# -# Input core support is needed for USB HID input layer or HIDBP support -# -# CONFIG_USB_HIDDEV is not set - -# -# USB HID Boot Protocol drivers -# - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set -# CONFIG_USB_HPUSBSCSI is not set - -# -# USB Multimedia devices -# -# CONFIG_USB_DABUSB is not set - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -CONFIG_USB_SERIAL_VISOR=m -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_TIGL is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGETSERVO is not set -# CONFIG_USB_TEST is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/luan_defconfig b/arch/ppc/configs/luan_defconfig deleted file mode 100644 index 71d7bf192e0e9b962e0e729e24bbc0edfd111b3f..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/luan_defconfig +++ /dev/null @@ -1,668 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.11-rc2 -# Mon Jan 31 16:26:31 2005 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_FUTEX=y -CONFIG_EPOLL=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -# CONFIG_TINY_SHMEM is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -# CONFIG_40x is not set -CONFIG_44x=y -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -CONFIG_BOOKE=y -CONFIG_PTE_64BIT=y -CONFIG_PHYS_64BIT=y -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_EBONY is not set -CONFIG_LUAN=y -# CONFIG_OCOTEA is not set -CONFIG_440SP=y -CONFIG_440=y -CONFIG_IBM_OCP=y -CONFIG_IBM_EMAC4=y -# CONFIG_PPC4xx_DMA is not set -CONFIG_PPC_GEN550=y -# CONFIG_PM is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on console=ttyS0,115200" - -# -# Bus options -# -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PC-card bridges -# - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x01000000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -# CONFIG_STANDALONE is not set -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_IP_TCPDIAG=y -# CONFIG_IP_TCPDIAG_IPV6 is not set - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_CONNTRACK_MARK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_IBM_EMAC=y -# CONFIG_IBM_EMAC_ERRMSG is not set -CONFIG_IBM_EMAC_RXB=128 -CONFIG_IBM_EMAC_TXB=128 -CONFIG_IBM_EMAC_FGAP=8 -CONFIG_IBM_EMAC_SKBRES=0 -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_MULTIPORT is not set -# CONFIG_SERIAL_8250_RSA is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -CONFIG_BDI_SWITCH=y -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_PPC_OCP=y - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/mbx_defconfig b/arch/ppc/configs/mbx_defconfig deleted file mode 100644 index 52c3799e67baf337f6306281d180bdeb5d7a7601..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/mbx_defconfig +++ /dev/null @@ -1,512 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_EMBEDDED=y -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Platform support -# -CONFIG_PPC=y -CONFIG_PPC32=y -# CONFIG_6xx is not set -# CONFIG_40x is not set -# CONFIG_POWER3 is not set -CONFIG_8xx=y - -# -# IBM 4xx options -# -CONFIG_EMBEDDEDBOOT=y -CONFIG_SERIAL_CONSOLE=y -CONFIG_NOT_COHERENT_CACHE=y -# CONFIG_RPXLITE is not set -# CONFIG_RPXCLASSIC is not set -# CONFIG_BSEIP is not set -# CONFIG_FADS is not set -# CONFIG_TQM823L is not set -# CONFIG_TQM850L is not set -# CONFIG_TQM855L is not set -# CONFIG_TQM860L is not set -# CONFIG_FPS850L is not set -# CONFIG_SPD823TS is not set -# CONFIG_IVMS8 is not set -# CONFIG_IVML24 is not set -# CONFIG_SM850 is not set -# CONFIG_HERMES_PRO is not set -# CONFIG_IP860 is not set -# CONFIG_LWMON is not set -# CONFIG_PCU_E is not set -# CONFIG_CCM is not set -# CONFIG_LANTEC is not set -CONFIG_MBX=y -# CONFIG_WINCEPT is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -CONFIG_MATH_EMULATION=y -# CONFIG_CPU_FREQ is not set - -# -# General setup -# -# CONFIG_HIGHMEM is not set -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set -# CONFIG_PCI_QSPAN is not set -CONFIG_KCORE_ELF=y -CONFIG_BINFMT_ELF=y -CONFIG_KERNEL_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_HOTPLUG is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set -# CONFIG_CMDLINE_BOOL is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Plug and Play support -# -# CONFIG_PNP is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# ATA/IDE/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI support -# -# CONFIG_SCSI is not set - -# -# Fusion MPT device support -# - -# -# I2O device support -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK_DEV is not set -# CONFIG_NETFILTER is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_XFRM_USER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -CONFIG_IPV6_SCTP__=y -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices (depends on LLC=y) -# -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# IrDA (infrared) support -# -# CONFIG_IRDA is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN_BOOL is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Old CD-ROM drivers (not SCSI, not IDE) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set - -# -# Input Device Drivers -# - -# -# Macintosh device drivers -# - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_CPM=y -CONFIG_SERIAL_CPM_CONSOLE=y -# CONFIG_SERIAL_CPM_SCC1 is not set -CONFIG_SERIAL_CPM_SCC2=y -CONFIG_SERIAL_CPM_SCC3=y -# CONFIG_SERIAL_CPM_SCC4 is not set -CONFIG_SERIAL_CPM_SMC1=y -CONFIG_SERIAL_CPM_SMC2=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# I2C Hardware Sensors Mainboard support -# - -# -# I2C Hardware Sensors Chip support -# -# CONFIG_I2C_SENSOR is not set - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_HANGCHECK_TIMER is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set -CONFIG_TMPFS=y -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_GSS is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_NEC98_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# MPC8xx CPM Options -# -CONFIG_SCC_ENET=y -CONFIG_SCC1_ENET=y -# CONFIG_SCC2_ENET is not set -# CONFIG_SCC3_ENET is not set -# CONFIG_FEC_ENET is not set -CONFIG_ENET_BIG_BUFFERS=y - -# -# Generic MPC8xx Options -# -CONFIG_8xx_COPYBACK=y -CONFIG_8xx_CPU6=y -# CONFIG_UCODE_PATCH is not set - -# -# USB support -# -# CONFIG_USB_GADGET is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# Library routines -# -# CONFIG_CRC32 is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_KALLSYMS is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/ml300_defconfig b/arch/ppc/configs/ml300_defconfig deleted file mode 100644 index d66cacdb95be69d0090e11ac27f4b8a665b9a5e9..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/ml300_defconfig +++ /dev/null @@ -1,739 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.16-rc1 -# Wed Jan 18 00:49:20 2006 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_SLAB=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_LBD=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y -# CONFIG_WANT_EARLY_SERIAL is not set - -# -# IBM 4xx options -# -# CONFIG_BUBINGA is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_REDWOOD_5 is not set -# CONFIG_REDWOOD_6 is not set -# CONFIG_SYCAMORE is not set -# CONFIG_WALNUT is not set -CONFIG_XILINX_ML300=y -CONFIG_IBM405_ERR77=y -CONFIG_IBM405_ERR51=y -CONFIG_XILINX_VIRTEX=y -CONFIG_EMBEDDEDBOOT=y -# CONFIG_PPC4xx_DMA is not set -CONFIG_PPC_GEN550=y -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_HIGHMEM is not set -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,9600" -# CONFIG_PM is not set -# CONFIG_HIBERNATION is not set -CONFIG_SECCOMP=y -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -# CONFIG_PPC_I8259 is not set -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Macintosh device drivers -# -# CONFIG_WINDFARM is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -CONFIG_TUN=y - -# -# PHY device support -# - -# -# Ethernet (10 or 100Mbit) -# -# CONFIG_NET_ETHERNET is not set -# CONFIG_IBM_EMAC is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Misc devices -# - -# -# Multimedia Capabilities Port drivers -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# - -# -# SN Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -# CONFIG_NFS_FS is not set -# CONFIG_NFSD is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=y - -# -# IBM 40x options -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_DEBUG_VM is not set -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -# CONFIG_BDI_SWITCH is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/ml403_defconfig b/arch/ppc/configs/ml403_defconfig deleted file mode 100644 index 71bcfa7ab7f7f11edde0c48128fa7b35dd4326d9..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/ml403_defconfig +++ /dev/null @@ -1,740 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.16-rc1 -# Wed Jan 18 01:11:41 2006 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_SLAB=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y -CONFIG_MODVERSIONS=y -CONFIG_MODULE_SRCVERSION_ALL=y -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_LBD=y - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y -# CONFIG_WANT_EARLY_SERIAL is not set - -# -# IBM 4xx options -# -# CONFIG_BUBINGA is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_REDWOOD_5 is not set -# CONFIG_REDWOOD_6 is not set -# CONFIG_SYCAMORE is not set -# CONFIG_WALNUT is not set -# CONFIG_XILINX_ML300 is not set -CONFIG_XILINX_ML403=y -CONFIG_IBM405_ERR77=y -CONFIG_IBM405_ERR51=y -CONFIG_XILINX_VIRTEX=y -CONFIG_EMBEDDEDBOOT=y -# CONFIG_PPC4xx_DMA is not set -CONFIG_PPC_GEN550=y -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_HIGHMEM is not set -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,9600" -# CONFIG_PM is not set -# CONFIG_HIBERNATION is not set -CONFIG_SECCOMP=y -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -# CONFIG_PPC_I8259 is not set -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Macintosh device drivers -# -# CONFIG_WINDFARM is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -CONFIG_TUN=y - -# -# PHY device support -# - -# -# Ethernet (10 or 100Mbit) -# -# CONFIG_NET_ETHERNET is not set -# CONFIG_IBM_EMAC is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Misc devices -# - -# -# Multimedia Capabilities Port drivers -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# - -# -# SN Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_RELAYFS_FS is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -# CONFIG_NFS_FS is not set -# CONFIG_NFSD is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=y - -# -# IBM 40x options -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_PRINTK_TIME=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_DEBUG_VM is not set -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -# CONFIG_BDI_SWITCH is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/mvme5100_defconfig b/arch/ppc/configs/mvme5100_defconfig deleted file mode 100644 index 46776b9c1a33dea8702e562ca5471ab438f3416b..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/mvme5100_defconfig +++ /dev/null @@ -1,746 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.9-rc2 -# Wed Sep 22 09:53:26 2004 -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_GENERIC_IOMAP=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SHMEM=y -# CONFIG_TINY_SHMEM is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -CONFIG_MVME5100=y -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX8260 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -# CONFIG_LITE5200 is not set -# CONFIG_MVME5100_IPMC761_PRESENT is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_IDE_ARM is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INIA100 is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=8 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=32 -# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_QLA6322 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -CONFIG_INET_TUNNEL=m - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# IP: Netfilter Configuration -# -CONFIG_IP_NF_CONNTRACK=m -# CONFIG_IP_NF_CT_ACCT is not set -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -# CONFIG_IP_NF_QUEUE is not set -CONFIG_IP_NF_IPTABLES=m -# CONFIG_IP_NF_MATCH_LIMIT is not set -# CONFIG_IP_NF_MATCH_IPRANGE is not set -# CONFIG_IP_NF_MATCH_MAC is not set -# CONFIG_IP_NF_MATCH_PKTTYPE is not set -# CONFIG_IP_NF_MATCH_MARK is not set -# CONFIG_IP_NF_MATCH_MULTIPORT is not set -# CONFIG_IP_NF_MATCH_TOS is not set -# CONFIG_IP_NF_MATCH_RECENT is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_DSCP is not set -# CONFIG_IP_NF_MATCH_AH_ESP is not set -# CONFIG_IP_NF_MATCH_LENGTH is not set -# CONFIG_IP_NF_MATCH_TTL is not set -# CONFIG_IP_NF_MATCH_TCPMSS is not set -CONFIG_IP_NF_MATCH_HELPER=m -# CONFIG_IP_NF_MATCH_STATE is not set -# CONFIG_IP_NF_MATCH_CONNTRACK is not set -# CONFIG_IP_NF_MATCH_OWNER is not set -# CONFIG_IP_NF_MATCH_ADDRTYPE is not set -# CONFIG_IP_NF_MATCH_REALM is not set -# CONFIG_IP_NF_MATCH_SCTP is not set -# CONFIG_IP_NF_FILTER is not set -# CONFIG_IP_NF_TARGET_LOG is not set -# CONFIG_IP_NF_TARGET_ULOG is not set -# CONFIG_IP_NF_TARGET_TCPMSS is not set -# CONFIG_IP_NF_NAT is not set -# CONFIG_IP_NF_MANGLE is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_ARPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set -CONFIG_XFRM=y -CONFIG_XFRM_USER=y - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_E100_NAPI is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_VIA_VELOCITY is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/ocotea_defconfig b/arch/ppc/configs/ocotea_defconfig deleted file mode 100644 index 9dcf575c706f89f77ffe2ddf5a5d9394dbabdafe..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/ocotea_defconfig +++ /dev/null @@ -1,599 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -# CONFIG_STANDALONE is not set -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -# CONFIG_40x is not set -CONFIG_44x=y -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -CONFIG_BOOKE=y -CONFIG_PTE_64BIT=y -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_EBONY is not set -CONFIG_OCOTEA=y -CONFIG_440GX=y -CONFIG_440A=y -CONFIG_IBM_OCP=y -CONFIG_IBM_EMAC4=y -# CONFIG_PM is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on console=ttyS0,115200" - -# -# Bus options -# -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x01000000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set -# CONFIG_IPV6 is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# IP: Netfilter Configuration -# -# CONFIG_IP_NF_CONNTRACK is not set -# CONFIG_IP_NF_QUEUE is not set -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set -# CONFIG_IP_NF_COMPAT_IPCHAINS is not set -# CONFIG_IP_NF_COMPAT_IPFWADM is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_IBM_EMAC=y -# CONFIG_IBM_EMAC_ERRMSG is not set -CONFIG_IBM_EMAC_RXB=128 -CONFIG_IBM_EMAC_TXB=128 -CONFIG_IBM_EMAC_FGAP=8 -CONFIG_IBM_EMAC_SKBRES=0 -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_MULTIPORT is not set -# CONFIG_SERIAL_8250_RSA is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SLAB is not set -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -CONFIG_BDI_SWITCH=y -CONFIG_DEBUG_INFO=y -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_PPC_OCP=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/pplus_defconfig b/arch/ppc/configs/pplus_defconfig deleted file mode 100644 index 5e459bcbf591074127bd38aab1f19c3c4010e211..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/pplus_defconfig +++ /dev/null @@ -1,720 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_ALTIVEC is not set -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -CONFIG_PPLUS=y -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_PPC_GEN550=y -# CONFIG_PPCBUG_NVRAM is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -CONFIG_BLK_DEV_FD=y -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -CONFIG_BLK_DEV_IDEFLOPPY=y -CONFIG_BLK_DEV_IDESCSI=y -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set -CONFIG_SCSI_CONSTANTS=y -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_QLA6322 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set -# CONFIG_IPV6 is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# IP: Netfilter Configuration -# -CONFIG_IP_NF_CONNTRACK=m -CONFIG_IP_NF_FTP=m -# CONFIG_IP_NF_IRC is not set -# CONFIG_IP_NF_TFTP is not set -# CONFIG_IP_NF_AMANDA is not set -# CONFIG_IP_NF_QUEUE is not set -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MATCH_LIMIT=m -# CONFIG_IP_NF_MATCH_IPRANGE is not set -CONFIG_IP_NF_MATCH_MAC=m -CONFIG_IP_NF_MATCH_PKTTYPE=m -CONFIG_IP_NF_MATCH_MARK=m -CONFIG_IP_NF_MATCH_MULTIPORT=m -CONFIG_IP_NF_MATCH_TOS=m -# CONFIG_IP_NF_MATCH_RECENT is not set -CONFIG_IP_NF_MATCH_ECN=m -CONFIG_IP_NF_MATCH_DSCP=m -CONFIG_IP_NF_MATCH_AH_ESP=m -# CONFIG_IP_NF_MATCH_LENGTH is not set -# CONFIG_IP_NF_MATCH_TTL is not set -# CONFIG_IP_NF_MATCH_TCPMSS is not set -CONFIG_IP_NF_MATCH_HELPER=m -CONFIG_IP_NF_MATCH_STATE=m -CONFIG_IP_NF_MATCH_CONNTRACK=m -CONFIG_IP_NF_MATCH_OWNER=m -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IP_NF_NAT=m -CONFIG_IP_NF_NAT_NEEDED=y -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_REDIRECT=m -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_SAME is not set -# CONFIG_IP_NF_NAT_SNMP_BASIC is not set -CONFIG_IP_NF_NAT_FTP=m -# CONFIG_IP_NF_MANGLE is not set -# CONFIG_IP_NF_TARGET_LOG is not set -CONFIG_IP_NF_TARGET_ULOG=m -# CONFIG_IP_NF_TARGET_TCPMSS is not set -CONFIG_IP_NF_ARPTABLES=m -CONFIG_IP_NF_ARPFILTER=m -# CONFIG_IP_NF_ARP_MANGLE is not set -CONFIG_IP_NF_COMPAT_IPCHAINS=m -# CONFIG_IP_NF_COMPAT_IPFWADM is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -CONFIG_IPV6_SCTP__=y -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_CRC32=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_EEPRO100_PIO is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# IrDA (infrared) support -# -# CONFIG_IRDA is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# Mice -# -# CONFIG_BUSMOUSE is not set -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_GSS is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/prep_defconfig b/arch/ppc/configs/prep_defconfig deleted file mode 100644 index b7cee2d714053622a64ae50ee8931136f47b804a..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/prep_defconfig +++ /dev/null @@ -1,1679 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.18-rc6 -# Wed Sep 6 15:09:32 2006 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="-prep" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -# CONFIG_RELAY is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -# CONFIG_EMBEDDED is not set -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_RT_MUTEXES=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_MODVERSIONS=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_LBD=y -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -CONFIG_PPC_FPU=y -# CONFIG_ALTIVEC is not set -# CONFIG_TAU is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC601_SYNC_FIX=y -# CONFIG_WANT_EARLY_SERIAL is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -CONFIG_PPC_PREP=y -# CONFIG_APUS is not set -# CONFIG_KATANA is not set -# CONFIG_WILLOW is not set -# CONFIG_CPCI690 is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_CHESTNUT is not set -# CONFIG_SPRUCE is not set -# CONFIG_HDPU is not set -# CONFIG_EV64260 is not set -# CONFIG_LOPEC is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_RADSTONE_PPC7D is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX8260 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -# CONFIG_PQ2FADS is not set -# CONFIG_LITE5200 is not set -# CONFIG_MPC834x_SYS is not set -# CONFIG_EV64360 is not set -CONFIG_PPCBUG_NVRAM=y -# CONFIG_SMP is not set -# CONFIG_HIGHMEM is not set -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=m -CONFIG_PREP_RESIDUAL=y -CONFIG_PROC_PREPRESIDUAL=y -# CONFIG_CMDLINE_BOOL is not set -CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set -CONFIG_HIBERNATION=y -CONFIG_PM_STD_PARTITION="" -# CONFIG_SECCOMP is not set -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -CONFIG_ISA=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PPC_I8259=y -CONFIG_PPC_INDIRECT_PCI=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -CONFIG_PCCARD=m -# CONFIG_PCMCIA_DEBUG is not set -# CONFIG_PCMCIA is not set -CONFIG_CARDBUS=y - -# -# PC-card bridges -# -CONFIG_YENTA=m -CONFIG_YENTA_O2=y -CONFIG_YENTA_RICOH=y -CONFIG_YENTA_TI=y -CONFIG_YENTA_ENE_TUNE=y -CONFIG_YENTA_TOSHIBA=y -CONFIG_PCMCIA_PROBE=y -CONFIG_PCCARD_NONSTATIC=m - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y - -# -# IP: Virtual Server Configuration -# -# CONFIG_IP_VS is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set - -# -# Core Netfilter Configuration -# -CONFIG_NETFILTER_NETLINK=m -CONFIG_NETFILTER_NETLINK_QUEUE=m -CONFIG_NETFILTER_NETLINK_LOG=m -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m -CONFIG_NETFILTER_XT_TARGET_MARK=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNMARK=m -CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_ESP=m -CONFIG_NETFILTER_XT_MATCH_HELPER=m -CONFIG_NETFILTER_XT_MATCH_LENGTH=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MARK=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m -CONFIG_NETFILTER_XT_MATCH_QUOTA=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_STATISTIC=m -CONFIG_NETFILTER_XT_MATCH_STRING=m -CONFIG_NETFILTER_XT_MATCH_TCPMSS=m - -# -# IP: Netfilter Configuration -# -CONFIG_IP_NF_CONNTRACK=m -# CONFIG_IP_NF_CT_ACCT is not set -CONFIG_IP_NF_CONNTRACK_MARK=y -# CONFIG_IP_NF_CONNTRACK_EVENTS is not set -# CONFIG_IP_NF_CONNTRACK_NETLINK is not set -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_NETBIOS_NS is not set -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -# CONFIG_IP_NF_PPTP is not set -# CONFIG_IP_NF_H323 is not set -# CONFIG_IP_NF_SIP is not set -CONFIG_IP_NF_QUEUE=m -# CONFIG_IP_NF_IPTABLES is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -CONFIG_NET_CLS_ROUTE=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set -CONFIG_WIRELESS_EXT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# -# CONFIG_STANDALONE is not set -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -CONFIG_PARPORT=m -CONFIG_PARPORT_PC=m -CONFIG_PARPORT_SERIAL=m -CONFIG_PARPORT_PC_FIFO=y -CONFIG_PARPORT_PC_SUPERIO=y -# CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_AX88796 is not set -CONFIG_PARPORT_1284=y - -# -# Plug and Play support -# -# CONFIG_PNP is not set - -# -# Block devices -# -CONFIG_BLK_DEV_FD=m -# CONFIG_BLK_DEV_XD is not set -# CONFIG_PARIDE is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -CONFIG_BLK_DEV_IDESCSI=y -# CONFIG_IDE_TASK_IOCTL is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -CONFIG_BLK_DEV_IDEPCI=y -CONFIG_IDEPCI_SHARE_IRQ=y -# CONFIG_BLK_DEV_OFFBOARD is not set -CONFIG_BLK_DEV_GENERIC=y -# CONFIG_BLK_DEV_OPTI621 is not set -CONFIG_BLK_DEV_SL82C105=y -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -CONFIG_IDEDMA_PCI_AUTO=y -# CONFIG_IDEDMA_ONLYDISK is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_AMD74XX is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_IDE_ARM is not set -# CONFIG_IDE_CHIPSETS is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -CONFIG_IDEDMA_AUTO=y -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y - -# -# SCSI Transport Attributes -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_7000FASST is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AHA152X is not set -# CONFIG_SCSI_AHA1542 is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_IN2000 is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_DTC3280 is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_GENERIC_NCR5380 is not set -# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_PPA is not set -# CONFIG_SCSI_IMM is not set -# CONFIG_SCSI_NCR53C406A is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -CONFIG_SCSI_SYM53C8XX_MMIO=y -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_PAS16 is not set -# CONFIG_SCSI_PSI240I is not set -# CONFIG_SCSI_QLOGIC_FAS is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_SYM53C416 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_T128 is not set -# CONFIG_SCSI_U14_34F is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Old CD-ROM drivers (not SCSI, not IDE) -# -# CONFIG_CD_NO_IDESCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set - -# -# IEEE 1394 (FireWire) support -# -CONFIG_IEEE1394=m - -# -# Subsystem Options -# -# CONFIG_IEEE1394_VERBOSEDEBUG is not set -CONFIG_IEEE1394_OUI_DB=y -CONFIG_IEEE1394_EXTRA_CONFIG_ROMS=y -CONFIG_IEEE1394_CONFIG_ROM_IP1394=y -# CONFIG_IEEE1394_EXPORT_FULL_API is not set - -# -# Device Drivers -# -# CONFIG_IEEE1394_PCILYNX is not set -CONFIG_IEEE1394_OHCI1394=m - -# -# Protocol Drivers -# -CONFIG_IEEE1394_VIDEO1394=m -CONFIG_IEEE1394_SBP2=m -CONFIG_IEEE1394_ETH1394=m -CONFIG_IEEE1394_DV1394=m -CONFIG_IEEE1394_RAWIO=m - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# -# CONFIG_WINDFARM is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -CONFIG_TUN=m - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_LANCE is not set -# CONFIG_NET_VENDOR_SMC is not set -# CONFIG_NET_VENDOR_RACAL is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -CONFIG_DE2104X=y -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -CONFIG_TULIP_MMIO=y -# CONFIG_TULIP_NAPI is not set -CONFIG_DE4X5=m -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_ULI526X is not set -# CONFIG_PCMCIA_XIRCOM is not set -# CONFIG_PCMCIA_XIRTULIP is not set -# CONFIG_AT1700 is not set -# CONFIG_DEPCA is not set -# CONFIG_HP100 is not set -# CONFIG_NET_ISA is not set -CONFIG_NET_PCI=y -CONFIG_PCNET32=y -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_AC3200 is not set -# CONFIG_APRICOT is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_CS89x0 is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_NET_POCKET is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y -# CONFIG_NET_WIRELESS_RTNETLINK is not set - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_ARLAN is not set -# CONFIG_WAVELAN is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -# CONFIG_AIRO is not set -CONFIG_HERMES=m -# CONFIG_PLX_HERMES is not set -# CONFIG_TMD_HERMES is not set -# CONFIG_NORTEL_HERMES is not set -# CONFIG_PCI_HERMES is not set -# CONFIG_ATMEL is not set - -# -# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support -# -# CONFIG_PRISM54 is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_HOSTAP is not set -CONFIG_NET_WIRELESS=y - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PLIP is not set -CONFIG_PPP=y -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=y -# CONFIG_PPP_SYNC_TTY is not set -CONFIG_PPP_DEFLATE=y -CONFIG_PPP_BSDCOMP=m -# CONFIG_PPP_MPPE is not set -CONFIG_PPPOE=m -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -CONFIG_NETCONSOLE=m -CONFIG_NETPOLL=y -# CONFIG_NETPOLL_RX is not set -# CONFIG_NETPOLL_TRAP is not set -CONFIG_NET_POLL_CONTROLLER=y - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_EVBUG=m - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_INPORT is not set -# CONFIG_MOUSE_LOGIBM is not set -# CONFIG_MOUSE_PC110PAD is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -CONFIG_INPUT_MISC=y -CONFIG_INPUT_PCSPKR=m -CONFIG_INPUT_UINPUT=m - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_PARKBD is not set -# CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_PRINTER is not set -# CONFIG_PPDEV is not set -# CONFIG_TIPAR is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_HW_RANDOM is not set -CONFIG_NVRAM=y -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=m - -# -# I2C Algorithms -# -CONFIG_I2C_ALGOBIT=y -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_ELEKTOR is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VOODOO3 is not set -# CONFIG_I2C_PCA_ISA is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_M41T00 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# - -# -# Hardware Monitoring support -# -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set -CONFIG_VIDEO_V4L2=y - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set -# CONFIG_USB_DABUSB is not set - -# -# Graphics support -# -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FB=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -CONFIG_FB_TILEBLITTING=y -# CONFIG_FB_CIRRUS is not set -# CONFIG_FB_PM2 is not set -# CONFIG_FB_CYBER2000 is not set -# CONFIG_FB_CT65550 is not set -# CONFIG_FB_ASILIANT is not set -# CONFIG_FB_IMSTT is not set -# CONFIG_FB_VGA16 is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_NVIDIA is not set -# CONFIG_FB_RIVA is not set -CONFIG_FB_MATROX=y -CONFIG_FB_MATROX_MILLENIUM=y -CONFIG_FB_MATROX_MYSTIQUE=y -CONFIG_FB_MATROX_G=y -CONFIG_FB_MATROX_I2C=y -CONFIG_FB_MATROX_MAVEN=m -# CONFIG_FB_MATROX_MULTIHEAD is not set -# CONFIG_FB_RADEON is not set -# CONFIG_FB_ATY128 is not set -# CONFIG_FB_ATY is not set -# CONFIG_FB_SAVAGE is not set -# CONFIG_FB_SIS is not set -# CONFIG_FB_NEOMAGIC is not set -# CONFIG_FB_KYRO is not set -# CONFIG_FB_3DFX is not set -# CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_TRIDENT is not set -# CONFIG_FB_VIRTUAL is not set - -# -# Console display driver support -# -CONFIG_VGA_CONSOLE=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set -# CONFIG_MDA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y - -# -# Logo configuration -# -CONFIG_LOGO=y -# CONFIG_LOGO_LINUX_MONO is not set -# CONFIG_LOGO_LINUX_VGA16 is not set -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -CONFIG_SND_HWDEP=m -CONFIG_SND_RAWMIDI=m -CONFIG_SND_SEQUENCER=m -# CONFIG_SND_SEQ_DUMMY is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -CONFIG_SND_SEQUENCER_OSS=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set - -# -# Generic devices -# -CONFIG_SND_MPU401_UART=m -CONFIG_SND_OPL3_LIB=m -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_VIRMIDI is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set - -# -# ISA devices -# -CONFIG_SND_CS4231_LIB=m -# CONFIG_SND_ADLIB is not set -# CONFIG_SND_AD1848 is not set -# CONFIG_SND_CMI8330 is not set -# CONFIG_SND_CS4231 is not set -CONFIG_SND_CS4232=m -# CONFIG_SND_CS4236 is not set -# CONFIG_SND_ES1688 is not set -# CONFIG_SND_ES18XX is not set -# CONFIG_SND_GUSCLASSIC is not set -# CONFIG_SND_GUSEXTREME is not set -# CONFIG_SND_GUSMAX is not set -# CONFIG_SND_OPL3SA2 is not set -# CONFIG_SND_OPTI92X_AD1848 is not set -# CONFIG_SND_OPTI92X_CS4231 is not set -# CONFIG_SND_OPTI93X is not set -# CONFIG_SND_MIRO is not set -# CONFIG_SND_SB8 is not set -# CONFIG_SND_SB16 is not set -# CONFIG_SND_SBAWE is not set -# CONFIG_SND_SGALAXY is not set -# CONFIG_SND_SSCAPE is not set -# CONFIG_SND_WAVEFRONT is not set - -# -# PCI devices -# -# CONFIG_SND_AD1889 is not set -# CONFIG_SND_ALS300 is not set -# CONFIG_SND_ALS4000 is not set -# CONFIG_SND_ALI5451 is not set -# CONFIG_SND_ATIIXP is not set -# CONFIG_SND_ATIIXP_MODEM is not set -# CONFIG_SND_AU8810 is not set -# CONFIG_SND_AU8820 is not set -# CONFIG_SND_AU8830 is not set -# CONFIG_SND_AZT3328 is not set -# CONFIG_SND_BT87X is not set -# CONFIG_SND_CA0106 is not set -# CONFIG_SND_CMIPCI is not set -# CONFIG_SND_CS4281 is not set -# CONFIG_SND_CS46XX is not set -# CONFIG_SND_DARLA20 is not set -# CONFIG_SND_GINA20 is not set -# CONFIG_SND_LAYLA20 is not set -# CONFIG_SND_DARLA24 is not set -# CONFIG_SND_GINA24 is not set -# CONFIG_SND_LAYLA24 is not set -# CONFIG_SND_MONA is not set -# CONFIG_SND_MIA is not set -# CONFIG_SND_ECHO3G is not set -# CONFIG_SND_INDIGO is not set -# CONFIG_SND_INDIGOIO is not set -# CONFIG_SND_INDIGODJ is not set -# CONFIG_SND_EMU10K1 is not set -# CONFIG_SND_EMU10K1X is not set -# CONFIG_SND_ENS1370 is not set -# CONFIG_SND_ENS1371 is not set -# CONFIG_SND_ES1938 is not set -# CONFIG_SND_ES1968 is not set -# CONFIG_SND_FM801 is not set -# CONFIG_SND_HDA_INTEL is not set -# CONFIG_SND_HDSP is not set -# CONFIG_SND_HDSPM is not set -# CONFIG_SND_ICE1712 is not set -# CONFIG_SND_ICE1724 is not set -# CONFIG_SND_INTEL8X0 is not set -# CONFIG_SND_INTEL8X0M is not set -# CONFIG_SND_KORG1212 is not set -# CONFIG_SND_MAESTRO3 is not set -# CONFIG_SND_MIXART is not set -# CONFIG_SND_NM256 is not set -# CONFIG_SND_PCXHR is not set -# CONFIG_SND_RIPTIDE is not set -# CONFIG_SND_RME32 is not set -# CONFIG_SND_RME96 is not set -# CONFIG_SND_RME9652 is not set -# CONFIG_SND_SONICVIBES is not set -# CONFIG_SND_TRIDENT is not set -# CONFIG_SND_VIA82XX is not set -# CONFIG_SND_VIA82XX_MODEM is not set -# CONFIG_SND_VX222 is not set -# CONFIG_SND_YMFPCI is not set - -# -# ALSA PowerMac devices -# - -# -# Apple Onboard Audio driver -# -# CONFIG_SND_AOA is not set -# CONFIG_SND_AOA_SOUNDBUS is not set - -# -# USB devices -# -CONFIG_SND_USB_AUDIO=m -# CONFIG_SND_USB_USX2Y is not set - -# -# Open Sound System -# -# CONFIG_SOUND_PRIME is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_OTG is not set - -# -# USB Host Controller Drivers -# -CONFIG_USB_EHCI_HCD=m -CONFIG_USB_EHCI_SPLIT_ISO=y -CONFIG_USB_EHCI_ROOT_HUB_TT=y -# CONFIG_USB_EHCI_TT_NEWSCHED is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_UHCI_HCD=m -# CONFIG_USB_SL811_HCD is not set - -# -# USB Device Class drivers -# -CONFIG_USB_ACM=m -CONFIG_USB_PRINTER=m - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=m -# CONFIG_USB_STORAGE_DEBUG is not set -CONFIG_USB_STORAGE_DATAFAB=y -CONFIG_USB_STORAGE_FREECOM=y -CONFIG_USB_STORAGE_ISD200=y -CONFIG_USB_STORAGE_DPCM=y -CONFIG_USB_STORAGE_USBAT=y -CONFIG_USB_STORAGE_SDDR09=y -CONFIG_USB_STORAGE_SDDR55=y -CONFIG_USB_STORAGE_JUMPSHOT=y -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -CONFIG_USB_HIDINPUT=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -CONFIG_USB_HIDDEV=y -# CONFIG_USB_AIPTEK is not set -# CONFIG_USB_WACOM is not set -# CONFIG_USB_ACECAD is not set -# CONFIG_USB_KBTAB is not set -# CONFIG_USB_POWERMATE is not set -# CONFIG_USB_TOUCHSCREEN is not set -# CONFIG_USB_YEALINK is not set -# CONFIG_USB_XPAD is not set -# CONFIG_USB_ATI_REMOTE is not set -# CONFIG_USB_ATI_REMOTE2 is not set -# CONFIG_USB_KEYSPAN_REMOTE is not set -# CONFIG_USB_APPLETOUCH is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -CONFIG_USB_PEGASUS=m -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_USB_MON is not set - -# -# USB port drivers -# -# CONFIG_USB_USS720 is not set - -# -# USB Serial Converter support -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_AIRPRIME is not set -# CONFIG_USB_SERIAL_ARK3116 is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_CP2101 is not set -# CONFIG_USB_SERIAL_CYPRESS_M8 is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -# CONFIG_USB_SERIAL_FUNSOFT is not set -CONFIG_USB_SERIAL_VISOR=m -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_GARMIN is not set -# CONFIG_USB_SERIAL_IPW is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -CONFIG_USB_SERIAL_KEYSPAN=m -CONFIG_USB_SERIAL_KEYSPAN_MPR=y -CONFIG_USB_SERIAL_KEYSPAN_USA28=y -CONFIG_USB_SERIAL_KEYSPAN_USA28X=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y -CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y -CONFIG_USB_SERIAL_KEYSPAN_USA19=y -CONFIG_USB_SERIAL_KEYSPAN_USA18X=y -CONFIG_USB_SERIAL_KEYSPAN_USA19W=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y -CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y -CONFIG_USB_SERIAL_KEYSPAN_USA49W=y -CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_NAVMAN is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_HP4X is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set -# CONFIG_USB_SERIAL_TI is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OPTION is not set -# CONFIG_USB_SERIAL_OMNINET is not set -CONFIG_USB_EZUSB=y - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGETKIT is not set -# CONFIG_USB_PHIDGETSERVO is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TEST is not set - -# -# USB DSL modem support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=y -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -CONFIG_REISERFS_FS_SECURITY=y -CONFIG_JFS_FS=m -CONFIG_JFS_POSIX_ACL=y -CONFIG_JFS_SECURITY=y -# CONFIG_JFS_DEBUG is not set -# CONFIG_JFS_STATISTICS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_XFS_FS=m -# CONFIG_XFS_QUOTA is not set -CONFIG_XFS_SECURITY=y -CONFIG_XFS_POSIX_ACL=y -# CONFIG_XFS_RT is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -CONFIG_AUTOFS4_FS=m -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -CONFIG_UDF_FS=m -CONFIG_UDF_NLS=y - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=m -CONFIG_MSDOS_FS=m -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -CONFIG_HFS_FS=m -CONFIG_HFSPLUS_FS=m -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_CRAMFS=m -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -CONFIG_UFS_FS=m -# CONFIG_UFS_FS_WRITE is not set -# CONFIG_UFS_DEBUG is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -CONFIG_NFSD_V2_ACL=y -CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y -# CONFIG_NFSD_V4 is not set -CONFIG_NFSD_TCP=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -CONFIG_MAC_PARTITION=y -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -CONFIG_NLS=m -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=m -CONFIG_NLS_CODEPAGE_737=m -CONFIG_NLS_CODEPAGE_775=m -CONFIG_NLS_CODEPAGE_850=m -CONFIG_NLS_CODEPAGE_852=m -CONFIG_NLS_CODEPAGE_855=m -CONFIG_NLS_CODEPAGE_857=m -CONFIG_NLS_CODEPAGE_860=m -CONFIG_NLS_CODEPAGE_861=m -CONFIG_NLS_CODEPAGE_862=m -CONFIG_NLS_CODEPAGE_863=m -CONFIG_NLS_CODEPAGE_864=m -CONFIG_NLS_CODEPAGE_865=m -CONFIG_NLS_CODEPAGE_866=m -CONFIG_NLS_CODEPAGE_869=m -CONFIG_NLS_CODEPAGE_936=m -CONFIG_NLS_CODEPAGE_950=m -CONFIG_NLS_CODEPAGE_932=m -CONFIG_NLS_CODEPAGE_949=m -CONFIG_NLS_CODEPAGE_874=m -CONFIG_NLS_ISO8859_8=m -CONFIG_NLS_CODEPAGE_1250=m -CONFIG_NLS_CODEPAGE_1251=m -CONFIG_NLS_ASCII=m -CONFIG_NLS_ISO8859_1=m -CONFIG_NLS_ISO8859_2=m -CONFIG_NLS_ISO8859_3=m -CONFIG_NLS_ISO8859_4=m -CONFIG_NLS_ISO8859_5=m -CONFIG_NLS_ISO8859_6=m -CONFIG_NLS_ISO8859_7=m -CONFIG_NLS_ISO8859_9=m -CONFIG_NLS_ISO8859_13=m -CONFIG_NLS_ISO8859_14=m -CONFIG_NLS_ISO8859_15=m -CONFIG_NLS_KOI8_R=m -CONFIG_NLS_KOI8_U=m -CONFIG_NLS_UTF8=m - -# -# Library routines -# -CONFIG_CRC_CCITT=y -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_TEXTSEARCH=y -CONFIG_TEXTSEARCH_KMP=m -CONFIG_TEXTSEARCH_BM=m -CONFIG_TEXTSEARCH_FSM=m -CONFIG_PLIST=y -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_KERNEL=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_RWSEMS is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_DEBUG_VM is not set -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_XMON is not set -# CONFIG_BDI_SWITCH is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/prpmc750_defconfig b/arch/ppc/configs/prpmc750_defconfig deleted file mode 100644 index 82d52f66b742373dcf32cced7ae3f0fe2ffa1c1e..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/prpmc750_defconfig +++ /dev/null @@ -1,594 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_ALTIVEC is not set -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -CONFIG_PRPMC750=y -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_PPC_GEN550=y -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -CONFIG_TULIP_MMIO=y -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_EEPRO100_PIO is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -CONFIG_CRC32=y - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/prpmc800_defconfig b/arch/ppc/configs/prpmc800_defconfig deleted file mode 100644 index 613c2664d3e86f691653dfc5de2fbce4182ae73a..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/prpmc800_defconfig +++ /dev/null @@ -1,656 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -CONFIG_PRPMC800=y -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_PPC_GEN550=y -# CONFIG_NONMONARCH_SUPPORT is not set -CONFIG_HARRIER=y -# CONFIG_HARRIER_STORE_GATHERING is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_ST=y -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -# CONFIG_CHR_DEV_SG is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_REPORT_LUNS is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set - -# -# SCSI Transport Attributes -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_MEGARAID is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_CPQFCTS is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INIA100 is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set -# CONFIG_SCSI_QLOGIC_ISP is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_QLA6322 is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_EEPRO100_PIO is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -# CONFIG_CRC32 is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/radstone_ppc7d_defconfig b/arch/ppc/configs/radstone_ppc7d_defconfig deleted file mode 100644 index 9f64532f2a816250f0c4bd05860615c3d82e685d..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/radstone_ppc7d_defconfig +++ /dev/null @@ -1,991 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-rc3 -# Tue Jul 26 00:02:09 2005 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -CONFIG_KALLSYMS_EXTRA_PASS=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SHMEM=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -CONFIG_PPC_FPU=y -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_GEN550=y -# CONFIG_PM is not set -CONFIG_PPC_STD_MMU=y -# CONFIG_NOT_COHERENT_CACHE is not set - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_KATANA is not set -# CONFIG_WILLOW is not set -# CONFIG_CPCI690 is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_CHESTNUT is not set -# CONFIG_SPRUCE is not set -# CONFIG_HDPU is not set -# CONFIG_EV64260 is not set -# CONFIG_LOPEC is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -CONFIG_RADSTONE_PPC7D=y -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX8260 is not set -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -# CONFIG_PQ2FADS is not set -# CONFIG_LITE5200 is not set -# CONFIG_MPC834x_SYS is not set -CONFIG_MV64360=y -CONFIG_MV64X60=y - -# -# Set bridge options -# -CONFIG_MV64X60_BASE=0xfef00000 -CONFIG_MV64X60_NEW_BASE=0xfef00000 -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=y -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="console=ttyS0,9600" -CONFIG_SECCOMP=y -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_LEGACY_PROC=y -CONFIG_PCI_NAMES=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# Advanced setup -# -CONFIG_ADVANCED_OPTIONS=y -CONFIG_HIGHMEM_START=0xfe000000 -# CONFIG_LOWMEM_SIZE_BOOL is not set -CONFIG_LOWMEM_SIZE=0x30000000 -# CONFIG_KERNEL_START_BOOL is not set -CONFIG_KERNEL_START=0xc0000000 -# CONFIG_TASK_SIZE_BOOL is not set -CONFIG_TASK_SIZE=0x80000000 -# CONFIG_BOOT_LOAD_BOOL is not set -CONFIG_BOOT_LOAD=0x00800000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_IP_TCPDIAG=y -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -CONFIG_BRIDGE=y -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_PARTITIONS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLOCK=y -CONFIG_FTL=y -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -# CONFIG_MTD_CFI_AMDSTD is not set -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -CONFIG_SCSI=y -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_CHR_DEV_SG=y -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -CONFIG_SCSI_MULTI_LUN=y -CONFIG_SCSI_CONSTANTS=y -CONFIG_SCSI_LOGGING=y - -# -# SCSI Transport Attributes -# -CONFIG_SCSI_SPI_ATTRS=y -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set - -# -# SCSI low-level drivers -# -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -# CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_SCSI_SATA is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -CONFIG_SCSI_SYM53C8XX_2=y -CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 -CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 -CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 -# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_FC is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -CONFIG_SCSI_QLA2XXX=y -# CONFIG_SCSI_QLA21XX is not set -# CONFIG_SCSI_QLA22XX is not set -# CONFIG_SCSI_QLA2300 is not set -# CONFIG_SCSI_QLA2322 is not set -# CONFIG_SCSI_QLA6312 is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set -# CONFIG_FUSION_SPI is not set -# CONFIG_FUSION_FC is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -CONFIG_R8169=y -CONFIG_R8169_NAPI=y -# CONFIG_SKGE is not set -CONFIG_SK98LIN=y -# CONFIG_VIA_VELOCITY is not set -CONFIG_TIGON3=y -# CONFIG_BNX2 is not set -CONFIG_MV643XX_ETH=y -CONFIG_MV643XX_ETH_0=y -CONFIG_MV643XX_ETH_1=y -# CONFIG_MV643XX_ETH_2 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -CONFIG_KEYBOARD_XTKBD=y -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -# CONFIG_VT_CONSOLE is not set -CONFIG_HW_CONSOLE=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_MPSC=y -# CONFIG_SERIAL_MPSC_CONSOLE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -CONFIG_WATCHDOG=y -CONFIG_WATCHDOG_NOWAYOUT=y - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set - -# -# PCI-based Watchdog Cards -# -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_SCx200_ACB is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VOODOO3 is not set -# CONFIG_I2C_PCA_ISA is not set -CONFIG_I2C_MV64XXX=y -CONFIG_I2C_SENSOR=y - -# -# Miscellaneous I2C Chip support -# -CONFIG_SENSORS_DS1337=y -# CONFIG_SENSORS_DS1374 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_RTC8564 is not set -# CONFIG_SENSORS_M41T00 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -CONFIG_HWMON=y -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -CONFIG_SENSORS_LM90=y -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# SN Devices -# - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -CONFIG_CRC_CCITT=y -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -# CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# diff --git a/arch/ppc/configs/redwood5_defconfig b/arch/ppc/configs/redwood5_defconfig deleted file mode 100644 index 4c5486da4139c83e8ab5ad041de5be7710bb1141..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/redwood5_defconfig +++ /dev/null @@ -1,557 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -# CONFIG_STANDALONE is not set -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_ASH is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_OAK is not set -CONFIG_REDWOOD_5=y -# CONFIG_REDWOOD_6 is not set -# CONFIG_SYCAMORE is not set -# CONFIG_WALNUT is not set -CONFIG_IBM405_ERR77=y -CONFIG_IBM405_ERR51=y -CONFIG_IBM_OCP=y -CONFIG_PPC_OCP=y -CONFIG_STB03xxx=y -CONFIG_IBM_OPENBIOS=y -# CONFIG_PM is not set -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -# CONFIG_SERIAL_SICC is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set -# CONFIG_BLK_DEV_IDECD is not set -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_IDE_TASK_IOCTL is not set -# CONFIG_IDE_TASKFILE_IO is not set - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IBM_EMAC is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# IrDA (infrared) support -# -# CONFIG_IRDA is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_CT82C710 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_UNIX98_PTYS is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -# CONFIG_DEVFS_FS is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# IBM 40x options -# - -# -# Library routines -# -# CONFIG_CRC32 is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_OCP=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/redwood6_defconfig b/arch/ppc/configs/redwood6_defconfig deleted file mode 100644 index 5752845c2601ec88cf82f4fb070b6d9960f66443..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/redwood6_defconfig +++ /dev/null @@ -1,535 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -# CONFIG_STANDALONE is not set -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -# CONFIG_MODULE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_ASH is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_OAK is not set -# CONFIG_REDWOOD_5 is not set -CONFIG_REDWOOD_6=y -# CONFIG_SYCAMORE is not set -# CONFIG_WALNUT is not set -CONFIG_IBM405_ERR77=y -CONFIG_IBM405_ERR51=y -CONFIG_IBM_OCP=y -CONFIG_PPC_OCP=y -CONFIG_STB03xxx=y -CONFIG_IBM_OPENBIOS=y -# CONFIG_PM is not set -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -# CONFIG_SERIAL_SICC is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IBM_EMAC is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# IrDA (infrared) support -# -# CONFIG_IRDA is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_CT82C710 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# IBM 40x options -# - -# -# Library routines -# -# CONFIG_CRC32 is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_OCP=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/rpx8260_defconfig b/arch/ppc/configs/rpx8260_defconfig deleted file mode 100644 index a9c4544ae5603ae7be00b42f5bc15b18143be387..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/rpx8260_defconfig +++ /dev/null @@ -1,555 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_E500 is not set -# CONFIG_CPU_FREQ is not set -CONFIG_EMBEDDEDBOOT=y -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBC82xx is not set -# CONFIG_SBS8260 is not set -CONFIG_RPX8260=y -# CONFIG_TQM8260 is not set -# CONFIG_ADS8272 is not set -CONFIG_8260=y -CONFIG_CPM2=y -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CMDLINE_BOOL is not set - -# -# Bus options -# -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_CPM=y -CONFIG_SERIAL_CPM_CONSOLE=y -# CONFIG_SERIAL_CPM_SCC1 is not set -# CONFIG_SERIAL_CPM_SCC2 is not set -# CONFIG_SERIAL_CPM_SCC3 is not set -# CONFIG_SERIAL_CPM_SCC4 is not set -CONFIG_SERIAL_CPM_SMC1=y -# CONFIG_SERIAL_CPM_SMC2 is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set -# CONFIG_SCC_ENET is not set -CONFIG_FEC_ENET=y -# CONFIG_USE_MDIO is not set - -# -# CPM2 Options -# -# CONFIG_FCC1_ENET is not set -# CONFIG_FCC2_ENET is not set -CONFIG_FCC3_ENET=y - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_KGDB_CONSOLE is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/rpxcllf_defconfig b/arch/ppc/configs/rpxcllf_defconfig deleted file mode 100644 index cf932f13fa869bcde7bc09417b0e7f210eaf8b95..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/rpxcllf_defconfig +++ /dev/null @@ -1,582 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc1 -# Mon Nov 1 16:41:04 2004 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -# CONFIG_CLEAN_COMPILE is not set -CONFIG_BROKEN=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_KOBJECT_UEVENT is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_SHMEM is not set -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_TINY_SHMEM=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Processor -# -# CONFIG_6xx is not set -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -CONFIG_8xx=y -# CONFIG_E500 is not set -CONFIG_MATH_EMULATION=y -# CONFIG_CPU_FREQ is not set -CONFIG_EMBEDDEDBOOT=y -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_RPXLITE is not set -CONFIG_RPXCLASSIC=y -# CONFIG_BSEIP is not set -# CONFIG_FADS is not set -# CONFIG_TQM823L is not set -# CONFIG_TQM850L is not set -# CONFIG_TQM855L is not set -# CONFIG_TQM860L is not set -# CONFIG_FPS850L is not set -# CONFIG_SPD823TS is not set -# CONFIG_IVMS8 is not set -# CONFIG_IVML24 is not set -# CONFIG_SM850 is not set -# CONFIG_HERMES_PRO is not set -# CONFIG_IP860 is not set -# CONFIG_LWMON is not set -# CONFIG_PCU_E is not set -# CONFIG_CCM is not set -# CONFIG_LANTEC is not set -# CONFIG_MBX is not set -# CONFIG_WINCEPT is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CMDLINE_BOOL is not set - -# -# Bus options -# -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set -# CONFIG_PCI_QSPAN is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_CPM=y -CONFIG_SERIAL_CPM_CONSOLE=y -# CONFIG_SERIAL_CPM_SCC1 is not set -CONFIG_SERIAL_CPM_SCC2=y -CONFIG_SERIAL_CPM_SCC3=y -# CONFIG_SERIAL_CPM_SCC4 is not set -CONFIG_SERIAL_CPM_SMC1=y -CONFIG_SERIAL_CPM_SMC2=y -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# MPC8xx CPM Options -# -CONFIG_SCC_ENET=y -CONFIG_SCC1_ENET=y -# CONFIG_SCC2_ENET is not set -# CONFIG_SCC3_ENET is not set -CONFIG_FEC_ENET=y -# CONFIG_USE_MDIO is not set -CONFIG_ENET_BIG_BUFFERS=y - -# -# Generic MPC8xx Options -# -CONFIG_8xx_COPYBACK=y -# CONFIG_8xx_CPU6 is not set -CONFIG_NO_UCODE_PATCH=y -# CONFIG_USB_SOF_UCODE_PATCH is not set -# CONFIG_I2C_SPI_UCODE_PATCH is not set -# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/rpxlite_defconfig b/arch/ppc/configs/rpxlite_defconfig deleted file mode 100644 index 828dd6eb5b43a930653a0e7a99855ff044e4dbd2..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/rpxlite_defconfig +++ /dev/null @@ -1,581 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.10-rc1 -# Mon Nov 1 16:41:09 2004 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -# CONFIG_CLEAN_COMPILE is not set -CONFIG_BROKEN=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_KOBJECT_UEVENT is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -# CONFIG_SHMEM is not set -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_TINY_SHMEM=y - -# -# Loadable module support -# -# CONFIG_MODULES is not set - -# -# Processor -# -# CONFIG_6xx is not set -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -CONFIG_8xx=y -# CONFIG_E500 is not set -CONFIG_MATH_EMULATION=y -# CONFIG_CPU_FREQ is not set -CONFIG_EMBEDDEDBOOT=y -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -CONFIG_RPXLITE=y -# CONFIG_RPXCLASSIC is not set -# CONFIG_BSEIP is not set -# CONFIG_FADS is not set -# CONFIG_TQM823L is not set -# CONFIG_TQM850L is not set -# CONFIG_TQM855L is not set -# CONFIG_TQM860L is not set -# CONFIG_FPS850L is not set -# CONFIG_SPD823TS is not set -# CONFIG_IVMS8 is not set -# CONFIG_IVML24 is not set -# CONFIG_SM850 is not set -# CONFIG_HERMES_PRO is not set -# CONFIG_IP860 is not set -# CONFIG_LWMON is not set -# CONFIG_PCU_E is not set -# CONFIG_CCM is not set -# CONFIG_LANTEC is not set -# CONFIG_MBX is not set -# CONFIG_WINCEPT is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -# CONFIG_CMDLINE_BOOL is not set - -# -# Bus options -# -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set -# CONFIG_PCI_QSPAN is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_LBD is not set -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -# CONFIG_MII is not set -# CONFIG_OAKNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_SERIAL_CPM=y -CONFIG_SERIAL_CPM_CONSOLE=y -# CONFIG_SERIAL_CPM_SCC1 is not set -# CONFIG_SERIAL_CPM_SCC2 is not set -# CONFIG_SERIAL_CPM_SCC3 is not set -# CONFIG_SERIAL_CPM_SCC4 is not set -CONFIG_SERIAL_CPM_SMC1=y -# CONFIG_SERIAL_CPM_SMC2 is not set -CONFIG_UNIX98_PTYS=y -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# MPC8xx CPM Options -# -CONFIG_SCC_ENET=y -# CONFIG_SCC1_ENET is not set -CONFIG_SCC2_ENET=y -# CONFIG_SCC3_ENET is not set -# CONFIG_FEC_ENET is not set -# CONFIG_ENET_BIG_BUFFERS is not set - -# -# Generic MPC8xx Options -# -CONFIG_8xx_COPYBACK=y -# CONFIG_8xx_CPU6 is not set -CONFIG_NO_UCODE_PATCH=y -# CONFIG_USB_SOF_UCODE_PATCH is not set -# CONFIG_I2C_SPI_UCODE_PATCH is not set -# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/sandpoint_defconfig b/arch/ppc/configs/sandpoint_defconfig deleted file mode 100644 index 9525e34138fc4a84bc2accc15d6800ec07e848e8..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/sandpoint_defconfig +++ /dev/null @@ -1,737 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_HOTPLUG=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -CONFIG_ALTIVEC=y -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -# CONFIG_SPRUCE is not set -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -CONFIG_SANDPOINT=y -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_PPC_GEN550=y -CONFIG_EPIC_SERIAL_MODE=y -CONFIG_MPC10X_BRIDGE=y -# CONFIG_MPC10X_STORE_GATHERING is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -CONFIG_BINFMT_MISC=m -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# PCMCIA/CardBus support -# -# CONFIG_PCMCIA is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# -# CONFIG_FW_LOADER is not set - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -CONFIG_BLK_DEV_IDEDISK=y -# CONFIG_IDEDISK_MULTI_MODE is not set -# CONFIG_IDEDISK_STROKE is not set -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_TASKFILE_IO=y - -# -# IDE chipset support/bugfixes -# -CONFIG_BLK_DEV_SL82C105=y -# CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set -# CONFIG_BLK_DEV_HD is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -CONFIG_DUMMY=m -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -CONFIG_NET_VENDOR_3COM=y -CONFIG_VORTEX=y -# CONFIG_TYPHOON is not set - -# -# Tulip family network device support -# -CONFIG_NET_TULIP=y -# CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set -# CONFIG_DE4X5 is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_DM9102 is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_E100_NAPI is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -CONFIG_8139TOO=y -CONFIG_8139TOO_PIO=y -# CONFIG_8139TOO_TUNE_TWISTER is not set -# CONFIG_8139TOO_8129 is not set -# CONFIG_8139_OLD_RX_RESET is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -CONFIG_PPP=m -# CONFIG_PPP_MULTILINK is not set -# CONFIG_PPP_FILTER is not set -CONFIG_PPP_ASYNC=m -CONFIG_PPP_SYNC_TTY=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -# CONFIG_PPPOE is not set -# CONFIG_SLIP is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set -# CONFIG_USB_DYNAMIC_MINORS is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_EHCI_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_UHCI_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_BLUETOOTH_TTY is not set -CONFIG_USB_ACM=m -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_STORAGE is not set - -# -# USB Human Interface Devices (HID) -# -# CONFIG_USB_HID is not set - -# -# Input core support is needed for USB HID input layer or HIDBP support -# - -# -# USB HID Boot Protocol drivers -# - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set - -# -# USB Multimedia devices -# -# CONFIG_USB_DABUSB is not set - -# -# Video4Linux support is needed for USB Multimedia device support -# - -# -# USB Network adaptors -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set - -# -# USB port drivers -# - -# -# USB Serial Converter support -# -CONFIG_USB_SERIAL=m -# CONFIG_USB_SERIAL_GENERIC is not set -# CONFIG_USB_SERIAL_BELKIN is not set -# CONFIG_USB_SERIAL_WHITEHEAT is not set -# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set -# CONFIG_USB_SERIAL_EMPEG is not set -# CONFIG_USB_SERIAL_FTDI_SIO is not set -CONFIG_USB_SERIAL_VISOR=m -# CONFIG_USB_SERIAL_IPAQ is not set -# CONFIG_USB_SERIAL_IR is not set -# CONFIG_USB_SERIAL_EDGEPORT is not set -# CONFIG_USB_SERIAL_EDGEPORT_TI is not set -# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set -# CONFIG_USB_SERIAL_KEYSPAN is not set -# CONFIG_USB_SERIAL_KLSI is not set -# CONFIG_USB_SERIAL_KOBIL_SCT is not set -# CONFIG_USB_SERIAL_MCT_U232 is not set -# CONFIG_USB_SERIAL_PL2303 is not set -# CONFIG_USB_SERIAL_SAFE is not set -# CONFIG_USB_SERIAL_CYBERJACK is not set -# CONFIG_USB_SERIAL_XIRCOM is not set -# CONFIG_USB_SERIAL_OMNINET is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_TIGL is not set -# CONFIG_USB_AUERSWALD is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGETSERVO is not set -# CONFIG_USB_TEST is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=m -CONFIG_ZLIB_DEFLATE=m - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/spruce_defconfig b/arch/ppc/configs/spruce_defconfig deleted file mode 100644 index 430dd9c59feb6cf4bb0254093c66ca756c7808d1..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/spruce_defconfig +++ /dev/null @@ -1,577 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -CONFIG_KALLSYMS=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -CONFIG_6xx=y -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_ALTIVEC is not set -# CONFIG_TAU is not set -# CONFIG_CPU_FREQ is not set -CONFIG_PPC_STD_MMU=y - -# -# Platform options -# -# CONFIG_PPC_MULTIPLATFORM is not set -# CONFIG_APUS is not set -# CONFIG_WILLOW is not set -# CONFIG_PCORE is not set -# CONFIG_POWERPMC250 is not set -# CONFIG_EV64260 is not set -CONFIG_SPRUCE=y -# CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set -# CONFIG_MVME5100 is not set -# CONFIG_PPLUS is not set -# CONFIG_PRPMC750 is not set -# CONFIG_PRPMC800 is not set -# CONFIG_SANDPOINT is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set -# CONFIG_PAL4 is not set -# CONFIG_GEMINI is not set -# CONFIG_EST8260 is not set -# CONFIG_SBS8260 is not set -# CONFIG_RPX6 is not set -# CONFIG_TQM8260 is not set -CONFIG_PPC_GEN550=y -CONFIG_SPRUCE_BAUD_33M=y -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_GENERIC_ISA_DMA=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_LEGACY_PROC=y -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00800000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -# CONFIG_BLK_DEV_RAM is not set -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_NET_PCI=y -CONFIG_PCNET32=y -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Userland interfaces -# - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -CONFIG_SERIO_PCIPS2=y - -# -# Input Device Drivers -# - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=2 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -CONFIG_GEN_RTC=y -# CONFIG_GEN_RTC_X is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Library routines -# -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/sycamore_defconfig b/arch/ppc/configs/sycamore_defconfig deleted file mode 100644 index 6996cca18f3e095d720ece424ad8eec9745fbc7e..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/sycamore_defconfig +++ /dev/null @@ -1,663 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -CONFIG_STANDALONE=y -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -CONFIG_MODVERSIONS=y -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_ASH is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_EVB405EP is not set -# CONFIG_OAK is not set -# CONFIG_REDWOOD_5 is not set -# CONFIG_REDWOOD_6 is not set -CONFIG_SYCAMORE=y -# CONFIG_WALNUT is not set -CONFIG_IBM_OCP=y -CONFIG_PPC_OCP=y -CONFIG_BIOS_FIXUP=y -CONFIG_405GPR=y -CONFIG_IBM_OPENBIOS=y -# CONFIG_PM is not set -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -CONFIG_NETDEVICES=y - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -CONFIG_IBM_EMAC=y -# CONFIG_IBM_EMAC_ERRMSG is not set -CONFIG_IBM_EMAC_RXB=64 -CONFIG_IBM_EMAC_TXB=8 -CONFIG_IBM_EMAC_FGAP=8 -CONFIG_IBM_EMAC_SKBRES=0 -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set - -# -# Amateur Radio support -# -# CONFIG_HAMRADIO is not set - -# -# IrDA (infrared) support -# -# CONFIG_IRDA is not set - -# -# Bluetooth support -# -# CONFIG_BT is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -# CONFIG_I2C_IBM_IIC is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_SCx200_ACB is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VOODOO3 is not set - -# -# Hardware Sensors Chip support -# -# CONFIG_I2C_SENSOR is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83627HF is not set - -# -# Other I2C Chip support -# -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_NEC98_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# IBM 40x options -# - -# -# Library routines -# -CONFIG_CRC32=y - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_OCP=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/taishan_defconfig b/arch/ppc/configs/taishan_defconfig deleted file mode 100644 index 1ca0204267b1e7171fe2c392f6d3035bcb868437..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/taishan_defconfig +++ /dev/null @@ -1,1077 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.20 -# Mon Feb 12 11:11:58 2007 -# -CONFIG_MMU=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_ARCH_HAS_ILOG2_U32=y -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_GENERIC_BUG=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_SYSFS_DEPRECATED=y -# CONFIG_RELAY is not set -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -# CONFIG_HOTPLUG is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SHMEM=y -CONFIG_SLAB=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Block layer -# -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" - -# -# Processor -# -# CONFIG_6xx is not set -# CONFIG_40x is not set -CONFIG_44x=y -# CONFIG_8xx is not set -# CONFIG_E200 is not set -# CONFIG_E500 is not set -CONFIG_PPC_DCR_NATIVE=y -CONFIG_PPC_DCR=y -CONFIG_BOOKE=y -CONFIG_PTE_64BIT=y -CONFIG_PHYS_64BIT=y -# CONFIG_MATH_EMULATION is not set -# CONFIG_KEXEC is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y -CONFIG_WANT_EARLY_SERIAL=y - -# -# IBM 4xx options -# -# CONFIG_BAMBOO is not set -# CONFIG_EBONY is not set -# CONFIG_LUAN is not set -# CONFIG_YUCCA is not set -# CONFIG_OCOTEA is not set -CONFIG_TAISHAN=y -CONFIG_440GX=y -CONFIG_440A=y -CONFIG_IBM_OCP=y -CONFIG_IBM_EMAC4=y -CONFIG_PPC4xx_DMA=y -CONFIG_PPC4xx_EDMA=y -CONFIG_PPC_GEN550=y -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_HIGHMEM is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_RESOURCES_64BIT=y -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on console=ttyS0,115200" -CONFIG_SECCOMP=y -CONFIG_ISA_DMA_API=y - -# -# Bus options -# -CONFIG_ZONE_DMA=y -# CONFIG_PPC_I8259 is not set -CONFIG_PPC_INDIRECT_PCI=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_CONSISTENT_START=0xff100000 -CONFIG_CONSISTENT_SIZE=0x00200000 -CONFIG_BOOT_LOAD=0x01000000 - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NETDEBUG is not set -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -CONFIG_IP_ADVANCED_ROUTER=y -CONFIG_ASK_IP_FIB_HASH=y -# CONFIG_IP_FIB_TRIE is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_MULTIPLE_TABLES is not set -# CONFIG_IP_ROUTE_MULTIPATH is not set -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -CONFIG_BRIDGE=y -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -CONFIG_LLC=y -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_IEEE80211 is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -# CONFIG_STANDALONE is not set -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# -# CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set - -# -# Mapping drivers for chip access -# -CONFIG_MTD_COMPLEX_MAPPINGS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0x0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_PCI is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_NAND_CAFE is not set - -# -# OneNAND Flash Device Drivers -# -# CONFIG_MTD_ONENAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=65536 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# Misc devices -# -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_NETLINK is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# -# CONFIG_MAC_EMUMOUSEBTN is not set -# CONFIG_WINDFARM is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# PHY device support -# -# CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -CONFIG_IBM_EMAC=y -CONFIG_IBM_EMAC_RXB=128 -CONFIG_IBM_EMAC_TXB=128 -CONFIG_IBM_EMAC_POLL_WEIGHT=32 -CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 -CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0 -CONFIG_IBM_EMAC_PHY_RX_CLK_FIX=y -# CONFIG_IBM_EMAC_DEBUG is not set -CONFIG_IBM_EMAC_ZMII=y -CONFIG_IBM_EMAC_RGMII=y -CONFIG_IBM_EMAC_TAH=y -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_B44 is not set -# CONFIG_FORCEDETH is not set -# CONFIG_DGRS is not set -# CONFIG_EEPRO100 is not set -CONFIG_E100=y -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139CP is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set -# CONFIG_SC92031 is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SIS190 is not set -# CONFIG_SKGE is not set -# CONFIG_SKY2 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set -# CONFIG_QLA3XXX is not set -# CONFIG_ATL1 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_CHELSIO_T1 is not set -# CONFIG_CHELSIO_T3 is not set -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NETXEN_NIC is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -CONFIG_PPP=y -# CONFIG_PPP_MULTILINK is not set -# CONFIG_PPP_FILTER is not set -# CONFIG_PPP_ASYNC is not set -# CONFIG_PPP_SYNC_TTY is not set -# CONFIG_PPP_DEFLATE is not set -# CONFIG_PPP_BSDCOMP is not set -# CONFIG_PPP_MPPE is not set -CONFIG_PPPOE=y -# CONFIG_SLIP is not set -CONFIG_SLHC=y -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -# CONFIG_SERIAL_8250_RSA is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_UARTLITE is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -CONFIG_HW_RANDOM=m -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# -# CONFIG_TCG_TPM is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set -# CONFIG_I2C_PIIX4 is not set -CONFIG_I2C_IBM_IIC=y -# CONFIG_I2C_MPC is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set -# CONFIG_I2C_VOODOO3 is not set -# CONFIG_I2C_PCA_ISA is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set -CONFIG_SENSORS_EEPROM=y -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_M41T00 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# SPI support -# -# CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# -# CONFIG_W1 is not set - -# -# Hardware Monitoring support -# -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_ABITUGURU is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ASB100 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_FSCHER is not set -# CONFIG_SENSORS_FSCPOS is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -CONFIG_FIRMWARE_EDID=y -# CONFIG_FB is not set -# CONFIG_FB_IBM_GXT4500 is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# -# CONFIG_MMC is not set - -# -# LED devices -# -# CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# -# CONFIG_INFINIBAND is not set - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# -# CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# - -# -# File systems -# -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT2_FS_XIP=y -CONFIG_FS_XIP=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -# CONFIG_EXT4DEV_FS is not set -CONFIG_JBD=y -CONFIG_JBD_DEBUG=y -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -CONFIG_FS_POSIX_ACL=y -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Distributed Lock Manager -# -# CONFIG_DLM is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -# CONFIG_PROFILING is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_MUST_CHECK=y -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_LIST is not set -CONFIG_FORCED_INLINING=y -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_KGDB is not set -# CONFIG_XMON is not set -CONFIG_BDI_SWITCH=y -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_PPC_OCP=y - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/configs/walnut_defconfig b/arch/ppc/configs/walnut_defconfig deleted file mode 100644 index bf9721a7a818818b67de45497aafa059235905d8..0000000000000000000000000000000000000000 --- a/arch/ppc/configs/walnut_defconfig +++ /dev/null @@ -1,578 +0,0 @@ -# -# Automatically generated make config: don't edit -# -CONFIG_MMU=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_HAVE_DEC_LOCK=y -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_GENERIC_NVRAM=y - -# -# Code maturity level options -# -CONFIG_EXPERIMENTAL=y -CONFIG_CLEAN_COMPILE=y -# CONFIG_STANDALONE is not set -CONFIG_BROKEN_ON_SMP=y - -# -# General setup -# -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -CONFIG_SYSCTL=y -# CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_FUTEX=y -# CONFIG_EPOLL is not set -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODVERSIONS is not set -CONFIG_KMOD=y - -# -# Processor -# -# CONFIG_6xx is not set -CONFIG_40x=y -# CONFIG_44x is not set -# CONFIG_POWER3 is not set -# CONFIG_POWER4 is not set -# CONFIG_8xx is not set -# CONFIG_MATH_EMULATION is not set -# CONFIG_CPU_FREQ is not set -CONFIG_4xx=y - -# -# IBM 4xx options -# -# CONFIG_ASH is not set -# CONFIG_BUBINGA is not set -# CONFIG_CPCI405 is not set -# CONFIG_EP405 is not set -# CONFIG_OAK is not set -# CONFIG_REDWOOD_5 is not set -# CONFIG_REDWOOD_6 is not set -# CONFIG_SYCAMORE is not set -CONFIG_WALNUT=y -CONFIG_IBM405_ERR77=y -CONFIG_IBM405_ERR51=y -CONFIG_IBM_OCP=y -CONFIG_BIOS_FIXUP=y -CONFIG_405GP=y -CONFIG_IBM_OPENBIOS=y -# CONFIG_PM is not set -CONFIG_UART0_TTYS0=y -# CONFIG_UART0_TTYS1 is not set -CONFIG_NOT_COHERENT_CACHE=y - -# -# Platform options -# -# CONFIG_PC_KEYBOARD is not set -# CONFIG_SMP is not set -# CONFIG_PREEMPT is not set -# CONFIG_HIGHMEM is not set -CONFIG_KERNEL_ELF=y -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_CMDLINE_BOOL=y -CONFIG_CMDLINE="ip=on" - -# -# Bus options -# -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_LEGACY_PROC=y -# CONFIG_PCI_NAMES is not set - -# -# Advanced setup -# -# CONFIG_ADVANCED_OPTIONS is not set - -# -# Default settings for advanced configuration options are used -# -CONFIG_HIGHMEM_START=0xfe000000 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_KERNEL_START=0xc0000000 -CONFIG_TASK_SIZE=0x80000000 -CONFIG_BOOT_LOAD=0x00400000 - -# -# Device Drivers -# - -# -# Generic Driver Options -# - -# -# Memory Technology Devices (MTD) -# -# CONFIG_MTD is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_CARMEL is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y -# CONFIG_LBD is not set - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Macintosh device drivers -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -# CONFIG_IP_PNP_DHCP is not set -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_OAKNET is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NET_PCI is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_YELLOWFIN is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_TIGON3 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_RCPCI is not set -# CONFIG_SHAPER is not set -# CONFIG_NETCONSOLE is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Telephony Support -# -# CONFIG_PHONE is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PCIPS2 is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_QIC02_TAPE is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# I2C support -# -# CONFIG_I2C is not set - -# -# Misc devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_FAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set -CONFIG_TMPFS=y -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -# CONFIG_NFS_V3 is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -# CONFIG_NFSD is not set -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -# CONFIG_EXPORTFS is not set -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -# CONFIG_MSDOS_PARTITION is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_NEC98_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_EFI_PARTITION is not set - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# IBM 40x options -# - -# -# Library routines -# -CONFIG_CRC32=y -# CONFIG_LIBCRC32C is not set - -# -# Kernel hacking -# -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_SERIAL_TEXT_DEBUG is not set -CONFIG_PPC_OCP=y - -# -# Security options -# -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile deleted file mode 100644 index 7b739054968f77bf5254b2aa676422f75af05fc1..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/Makefile +++ /dev/null @@ -1,21 +0,0 @@ -# -# Makefile for the linux kernel. -# -extra-$(CONFIG_PPC_STD_MMU) := head.o -extra-$(CONFIG_40x) := head_4xx.o -extra-$(CONFIG_44x) := head_44x.o -extra-$(CONFIG_8xx) := head_8xx.o -extra-y += vmlinux.lds - -obj-y := entry.o traps.o time.o misc.o \ - setup.o \ - ppc_htab.o -obj-$(CONFIG_MODULES) += ppc_ksyms.o -obj-$(CONFIG_PCI) += pci.o -obj-$(CONFIG_KGDB) += ppc-stub.o -obj-$(CONFIG_SMP) += smp.o smp-tbsync.o -obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o - -ifndef CONFIG_MATH_EMULATION -obj-$(CONFIG_8xx) += softemu8xx.o -endif diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c deleted file mode 100644 index 8dcbdd6c2d2c3bae19ef6f846f2f4b25b26c6c58..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/asm-offsets.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * This program is used to generate definitions needed by - * assembly language modules. - * - * We use the technique used in the OSF Mach kernel code: - * generate asm statements containing #defines, - * compile this file to assembler, and then extract the - * #defines from the assembly-language output. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -int -main(void) -{ - DEFINE(THREAD, offsetof(struct task_struct, thread)); - DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); - DEFINE(MM, offsetof(struct task_struct, mm)); - DEFINE(PTRACE, offsetof(struct task_struct, ptrace)); - DEFINE(KSP, offsetof(struct thread_struct, ksp)); - DEFINE(PGDIR, offsetof(struct thread_struct, pgdir)); - DEFINE(PT_REGS, offsetof(struct thread_struct, regs)); - DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode)); - DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0])); - DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr)); -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0)); - DEFINE(PT_PTRACED, PT_PTRACED); -#endif -#ifdef CONFIG_ALTIVEC - DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0])); - DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave)); - DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr)); - DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr)); -#endif /* CONFIG_ALTIVEC */ - /* Interrupt register frame */ - DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD); - DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs)); - /* in fact we only use gpr0 - gpr9 and gpr20 - gpr23 */ - DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0])); - DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1])); - DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2])); - DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3])); - DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4])); - DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5])); - DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6])); - DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7])); - DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8])); - DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9])); - DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10])); - DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11])); - DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12])); - DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13])); - DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14])); - DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15])); - DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16])); - DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17])); - DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18])); - DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19])); - DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20])); - DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21])); - DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22])); - DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23])); - DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24])); - DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25])); - DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26])); - DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27])); - DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28])); - DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29])); - DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30])); - DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31])); - /* Note: these symbols include _ because they overlap with special - * register names - */ - DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip)); - DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr)); - DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr)); - DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link)); - DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr)); - DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq)); - DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer)); - DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar)); - DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr)); - /* The PowerPC 400-class & Book-E processors have neither the DAR nor the DSISR - * SPRs. Hence, we overload them to hold the similar DEAR and ESR SPRs - * for such processors. For critical interrupts we use them to - * hold SRR0 and SRR1. - */ - DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar)); - DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr)); - DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3)); - DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result)); - DEFINE(TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap)); - DEFINE(CLONE_VM, CLONE_VM); - DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); - DEFINE(MM_PGD, offsetof(struct mm_struct, pgd)); - - /* About the CPU features table */ - DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec)); - DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask)); - DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value)); - DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); - DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); - - DEFINE(TI_TASK, offsetof(struct thread_info, task)); - DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain)); - DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); - DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); - DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); - - DEFINE(pbe_address, offsetof(struct pbe, address)); - DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); - DEFINE(pbe_next, offsetof(struct pbe, next)); - - DEFINE(TASK_SIZE, TASK_SIZE); - DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); - - /* datapage offsets for use by vdso */ - DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp)); - DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec)); - DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs)); - DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec)); - DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count)); - DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest)); - DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); - DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32)); - DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec)); - DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec)); - DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec)); - DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec)); - DEFINE(TSPEC32_TV_SEC, offsetof(struct timespec, tv_sec)); - DEFINE(TSPEC32_TV_NSEC, offsetof(struct timespec, tv_nsec)); - - /* timeval/timezone offsets for use by vdso */ - DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest)); - DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime)); - - /* Other bits used by the vdso */ - DEFINE(CLOCK_REALTIME, CLOCK_REALTIME); - DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC); - DEFINE(NSEC_PER_SEC, NSEC_PER_SEC); - DEFINE(CLOCK_REALTIME_RES, TICK_NSEC); - - return 0; -} diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S deleted file mode 100644 index 6a674e834eebbf65eccbaf25ff698cceccec81a4..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/cpu_setup_power4.S +++ /dev/null @@ -1,197 +0,0 @@ -/* - * This file contains low level CPU setup functions. - * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include - -_GLOBAL(__970_cpu_preinit) - /* - * Deal only with PPC970 and PPC970FX. - */ - mfspr r0,SPRN_PVR - srwi r0,r0,16 - cmpwi cr0,r0,0x39 - cmpwi cr1,r0,0x3c - cror 4*cr0+eq,4*cr0+eq,4*cr1+eq - bnelr - - /* Make sure HID4:rm_ci is off before MMU is turned off, that large - * pages are enabled with HID4:61 and clear HID5:DCBZ_size and - * HID5:DCBZ32_ill - */ - li r0,0 - mfspr r11,SPRN_HID4 - rldimi r11,r0,40,23 /* clear bit 23 (rm_ci) */ - rldimi r11,r0,2,61 /* clear bit 61 (lg_pg_en) */ - sync - mtspr SPRN_HID4,r11 - isync - sync - mfspr r11,SPRN_HID5 - rldimi r11,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */ - sync - mtspr SPRN_HID5,r11 - isync - sync - - /* Setup some basic HID1 features */ - mfspr r0,SPRN_HID1 - li r11,0x1200 /* enable i-fetch cacheability */ - sldi r11,r11,44 /* and prefetch */ - or r0,r0,r11 - mtspr SPRN_HID1,r0 - mtspr SPRN_HID1,r0 - isync - - /* Clear HIOR */ - li r0,0 - sync - mtspr SPRN_HIOR,0 /* Clear interrupt prefix */ - isync - blr - -_GLOBAL(__setup_cpu_ppc970) - mfspr r0,SPRN_HID0 - li r11,5 /* clear DOZE and SLEEP */ - rldimi r0,r11,52,8 /* set NAP and DPM */ - mtspr SPRN_HID0,r0 - mfspr r0,SPRN_HID0 - mfspr r0,SPRN_HID0 - mfspr r0,SPRN_HID0 - mfspr r0,SPRN_HID0 - mfspr r0,SPRN_HID0 - mfspr r0,SPRN_HID0 - sync - isync - blr - -/* Definitions for the table use to save CPU states */ -#define CS_HID0 0 -#define CS_HID1 8 -#define CS_HID4 16 -#define CS_HID5 24 -#define CS_SIZE 32 - - .data - .balign L1_CACHE_BYTES -cpu_state_storage: - .space CS_SIZE - .balign L1_CACHE_BYTES,0 - .text - -/* Called in normal context to backup CPU 0 state. This - * does not include cache settings. This function is also - * called for machine sleep. This does not include the MMU - * setup, BATs, etc... but rather the "special" registers - * like HID0, HID1, HID4, etc... - */ -_GLOBAL(__save_cpu_setup) - /* Some CR fields are volatile, we back it up all */ - mfcr r7 - - /* Get storage ptr */ - lis r5,cpu_state_storage@h - ori r5,r5,cpu_state_storage@l - - /* We only deal with 970 for now */ - mfspr r0,SPRN_PVR - srwi r0,r0,16 - cmpwi cr0,r0,0x39 - cmpwi cr1,r0,0x3c - cror 4*cr0+eq,4*cr0+eq,4*cr1+eq - bne 1f - - /* Save HID0,1,4 and 5 */ - mfspr r3,SPRN_HID0 - std r3,CS_HID0(r5) - mfspr r3,SPRN_HID1 - std r3,CS_HID1(r5) - mfspr r3,SPRN_HID4 - std r3,CS_HID4(r5) - mfspr r3,SPRN_HID5 - std r3,CS_HID5(r5) - -1: - mtcr r7 - blr - -/* Called with no MMU context (typically MSR:IR/DR off) to - * restore CPU state as backed up by the previous - * function. This does not include cache setting - */ -_GLOBAL(__restore_cpu_setup) - /* Some CR fields are volatile, we back it up all */ - mfcr r7 - - /* Get storage ptr */ - lis r5,(cpu_state_storage-KERNELBASE)@h - ori r5,r5,cpu_state_storage@l - - /* We only deal with 970 for now */ - mfspr r0,SPRN_PVR - srwi r0,r0,16 - cmpwi cr0,r0,0x39 - cmpwi cr1,r0,0x3c - cror 4*cr0+eq,4*cr0+eq,4*cr1+eq - bne 1f - - /* Clear interrupt prefix */ - li r0,0 - sync - mtspr SPRN_HIOR,0 - isync - - /* Restore HID0 */ - ld r3,CS_HID0(r5) - sync - isync - mtspr SPRN_HID0,r3 - mfspr r3,SPRN_HID0 - mfspr r3,SPRN_HID0 - mfspr r3,SPRN_HID0 - mfspr r3,SPRN_HID0 - mfspr r3,SPRN_HID0 - mfspr r3,SPRN_HID0 - sync - isync - - /* Restore HID1 */ - ld r3,CS_HID1(r5) - sync - isync - mtspr SPRN_HID1,r3 - mtspr SPRN_HID1,r3 - sync - isync - - /* Restore HID4 */ - ld r3,CS_HID4(r5) - sync - isync - mtspr SPRN_HID4,r3 - sync - isync - - /* Restore HID5 */ - ld r3,CS_HID5(r5) - sync - isync - mtspr SPRN_HID5,r3 - sync - isync -1: - mtcr r7 - blr - diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S deleted file mode 100644 index 5f3a5d068a5c6af9475babc8828d0e87f4290245..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/entry.S +++ /dev/null @@ -1,960 +0,0 @@ -/* - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP - * Copyright (C) 1996 Cort Dougan - * Adapted for Power Macintosh by Paul Mackerras. - * Low-level exception handlers and MMU support - * rewritten by Paul Mackerras. - * Copyright (C) 1996 Paul Mackerras. - * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net). - * - * This file contains the system call entry code, context switch - * code, and exception/interrupt return code for PowerPC. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef SHOW_SYSCALLS -#undef SHOW_SYSCALLS_TASK - -/* - * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE. - */ -#if MSR_KERNEL >= 0x10000 -#define LOAD_MSR_KERNEL(r, x) lis r,(x)@h; ori r,r,(x)@l -#else -#define LOAD_MSR_KERNEL(r, x) li r,(x) -#endif - -#ifdef CONFIG_BOOKE -#include "head_booke.h" -#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \ - mtspr exc_level##_SPRG,r8; \ - BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \ - lwz r0,GPR10-INT_FRAME_SIZE(r8); \ - stw r0,GPR10(r11); \ - lwz r0,GPR11-INT_FRAME_SIZE(r8); \ - stw r0,GPR11(r11); \ - mfspr r8,exc_level##_SPRG - - .globl mcheck_transfer_to_handler -mcheck_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) - b transfer_to_handler_full - - .globl debug_transfer_to_handler -debug_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) - b transfer_to_handler_full - - .globl crit_transfer_to_handler -crit_transfer_to_handler: - TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) - /* fall through */ -#endif - -#ifdef CONFIG_40x - .globl crit_transfer_to_handler -crit_transfer_to_handler: - lwz r0,crit_r10@l(0) - stw r0,GPR10(r11) - lwz r0,crit_r11@l(0) - stw r0,GPR11(r11) - /* fall through */ -#endif - -/* - * This code finishes saving the registers to the exception frame - * and jumps to the appropriate handler for the exception, turning - * on address translation. - * Note that we rely on the caller having set cr0.eq iff the exception - * occurred in kernel mode (i.e. MSR:PR = 0). - */ - .globl transfer_to_handler_full -transfer_to_handler_full: - SAVE_NVGPRS(r11) - /* fall through */ - - .globl transfer_to_handler -transfer_to_handler: - stw r2,GPR2(r11) - stw r12,_NIP(r11) - stw r9,_MSR(r11) - andi. r2,r9,MSR_PR - mfctr r12 - mfspr r2,SPRN_XER - stw r12,_CTR(r11) - stw r2,_XER(r11) - mfspr r12,SPRN_SPRG3 - addi r2,r12,-THREAD - tovirt(r2,r2) /* set r2 to current */ - beq 2f /* if from user, fix up THREAD.regs */ - addi r11,r1,STACK_FRAME_OVERHEAD - stw r11,PT_REGS(r12) -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - /* Check to see if the dbcr0 register is set up to debug. Use the - single-step bit to do this. */ - lwz r12,THREAD_DBCR0(r12) - andis. r12,r12,DBCR0_IC@h - beq+ 3f - /* From user and task is ptraced - load up global dbcr0 */ - li r12,-1 /* clear all pending debug events */ - mtspr SPRN_DBSR,r12 - lis r11,global_dbcr0@ha - tophys(r11,r11) - addi r11,r11,global_dbcr0@l - lwz r12,0(r11) - mtspr SPRN_DBCR0,r12 - lwz r12,4(r11) - addi r12,r12,-1 - stw r12,4(r11) -#endif - b 3f - -2: /* if from kernel, check interrupted DOZE/NAP mode and - * check for stack overflow - */ - lwz r9,THREAD_INFO-THREAD(r12) - cmplw r1,r9 /* if r1 <= current->thread_info */ - ble- stack_ovf /* then the kernel stack overflowed */ -5: -#ifdef CONFIG_6xx - tophys(r9,r9) /* check local flags */ - lwz r12,TI_LOCAL_FLAGS(r9) - mtcrf 0x01,r12 - bt- 31-TLF_NAPPING,4f -#endif /* CONFIG_6xx */ - .globl transfer_to_handler_cont -transfer_to_handler_cont: -3: - mflr r9 - lwz r11,0(r9) /* virtual address of handler */ - lwz r9,4(r9) /* where to go when done */ - mtspr SPRN_SRR0,r11 - mtspr SPRN_SRR1,r10 - mtlr r9 - SYNC - RFI /* jump to handler, enable MMU */ - -#ifdef CONFIG_6xx -4: rlwinm r12,r12,0,~_TLF_NAPPING - stw r12,TI_LOCAL_FLAGS(r9) - b power_save_6xx_restore -#endif - -/* - * On kernel stack overflow, load up an initial stack pointer - * and call StackOverflow(regs), which should not return. - */ -stack_ovf: - /* sometimes we use a statically-allocated stack, which is OK. */ - lis r12,_end@h - ori r12,r12,_end@l - cmplw r1,r12 - ble 5b /* r1 <= &_end is OK */ - SAVE_NVGPRS(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - lis r1,init_thread_union@ha - addi r1,r1,init_thread_union@l - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD - lis r9,StackOverflow@ha - addi r9,r9,StackOverflow@l - LOAD_MSR_KERNEL(r10,MSR_KERNEL) - FIX_SRR1(r10,r12) - mtspr SPRN_SRR0,r9 - mtspr SPRN_SRR1,r10 - SYNC - RFI - -/* - * Handle a system call. - */ - .stabs "arch/ppc/kernel/",N_SO,0,0,0f - .stabs "entry.S",N_SO,0,0,0f -0: - -_GLOBAL(DoSyscall) - stw r3,ORIG_GPR3(r1) - li r12,0 - stw r12,RESULT(r1) - lwz r11,_CCR(r1) /* Clear SO bit in CR */ - rlwinm r11,r11,0,4,2 - stw r11,_CCR(r1) -#ifdef SHOW_SYSCALLS - bl do_show_syscall -#endif /* SHOW_SYSCALLS */ - rlwinm r10,r1,0,0,18 /* current_thread_info() */ - lwz r11,TI_FLAGS(r10) - andi. r11,r11,_TIF_SYSCALL_T_OR_A - bne- syscall_dotrace -syscall_dotrace_cont: - cmplwi 0,r0,NR_syscalls - lis r10,sys_call_table@h - ori r10,r10,sys_call_table@l - slwi r0,r0,2 - bge- 66f - lwzx r10,r10,r0 /* Fetch system call handler [ptr] */ - mtlr r10 - addi r9,r1,STACK_FRAME_OVERHEAD - PPC440EP_ERR42 - blrl /* Call handler */ - .globl ret_from_syscall -ret_from_syscall: -#ifdef SHOW_SYSCALLS - bl do_show_syscall_exit -#endif - mr r6,r3 - rlwinm r12,r1,0,0,18 /* current_thread_info() */ - /* disable interrupts so current_thread_info()->flags can't change */ - LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */ - SYNC - MTMSRD(r10) - lwz r9,TI_FLAGS(r12) - li r8,-_LAST_ERRNO - andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK) - bne- syscall_exit_work - cmplw 0,r3,r8 - blt+ syscall_exit_cont - lwz r11,_CCR(r1) /* Load CR */ - neg r3,r3 - oris r11,r11,0x1000 /* Set SO bit in CR */ - stw r11,_CCR(r1) -syscall_exit_cont: -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - /* If the process has its own DBCR0 value, load it up. The single - step bit tells us that dbcr0 should be loaded. */ - lwz r0,THREAD+THREAD_DBCR0(r2) - andis. r10,r0,DBCR0_IC@h - bnel- load_dbcr0 -#endif -#ifdef CONFIG_44x - lis r4,icache_44x_need_flush@ha - lwz r5,icache_44x_need_flush@l(r4) - cmplwi cr0,r5,0 - bne- 2f -1: -#endif /* CONFIG_44x */ -BEGIN_FTR_SECTION - lwarx r7,0,r1 -END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) - stwcx. r0,0,r1 /* to clear the reservation */ - lwz r4,_LINK(r1) - lwz r5,_CCR(r1) - mtlr r4 - mtcr r5 - lwz r7,_NIP(r1) - lwz r8,_MSR(r1) - FIX_SRR1(r8, r0) - lwz r2,GPR2(r1) - lwz r1,GPR1(r1) - mtspr SPRN_SRR0,r7 - mtspr SPRN_SRR1,r8 - SYNC - RFI -#ifdef CONFIG_44x -2: li r7,0 - iccci r0,r0 - stw r7,icache_44x_need_flush@l(r4) - b 1b -#endif /* CONFIG_44x */ - -66: li r3,-ENOSYS - b ret_from_syscall - - .globl ret_from_fork -ret_from_fork: - REST_NVGPRS(r1) - bl schedule_tail - li r3,0 - b ret_from_syscall - -/* Traced system call support */ -syscall_dotrace: - SAVE_NVGPRS(r1) - li r0,0xc00 - stw r0,TRAP(r1) - addi r3,r1,STACK_FRAME_OVERHEAD - bl do_syscall_trace_enter - lwz r0,GPR0(r1) /* Restore original registers */ - lwz r3,GPR3(r1) - lwz r4,GPR4(r1) - lwz r5,GPR5(r1) - lwz r6,GPR6(r1) - lwz r7,GPR7(r1) - lwz r8,GPR8(r1) - REST_NVGPRS(r1) - b syscall_dotrace_cont - -syscall_exit_work: - andi. r0,r9,_TIF_RESTOREALL - beq+ 0f - REST_NVGPRS(r1) - b 2f -0: cmplw 0,r3,r8 - blt+ 1f - andi. r0,r9,_TIF_NOERROR - bne- 1f - lwz r11,_CCR(r1) /* Load CR */ - neg r3,r3 - oris r11,r11,0x1000 /* Set SO bit in CR */ - stw r11,_CCR(r1) - -1: stw r6,RESULT(r1) /* Save result */ - stw r3,GPR3(r1) /* Update return value */ -2: andi. r0,r9,(_TIF_PERSYSCALL_MASK) - beq 4f - - /* Clear per-syscall TIF flags if any are set. */ - - li r11,_TIF_PERSYSCALL_MASK - addi r12,r12,TI_FLAGS -3: lwarx r8,0,r12 - andc r8,r8,r11 -#ifdef CONFIG_IBM405_ERR77 - dcbt 0,r12 -#endif - stwcx. r8,0,r12 - bne- 3b - subi r12,r12,TI_FLAGS - -4: /* Anything which requires enabling interrupts? */ - andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP) - beq ret_from_except - - /* Re-enable interrupts */ - ori r10,r10,MSR_EE - SYNC - MTMSRD(r10) - - /* Save NVGPRS if they're not saved already */ - lwz r4,TRAP(r1) - andi. r4,r4,1 - beq 5f - SAVE_NVGPRS(r1) - li r4,0xc00 - stw r4,TRAP(r1) -5: - addi r3,r1,STACK_FRAME_OVERHEAD - bl do_syscall_trace_leave - b ret_from_except_full - -#ifdef SHOW_SYSCALLS -do_show_syscall: -#ifdef SHOW_SYSCALLS_TASK - lis r11,show_syscalls_task@ha - lwz r11,show_syscalls_task@l(r11) - cmp 0,r2,r11 - bnelr -#endif - stw r31,GPR31(r1) - mflr r31 - lis r3,7f@ha - addi r3,r3,7f@l - lwz r4,GPR0(r1) - lwz r5,GPR3(r1) - lwz r6,GPR4(r1) - lwz r7,GPR5(r1) - lwz r8,GPR6(r1) - lwz r9,GPR7(r1) - bl printk - lis r3,77f@ha - addi r3,r3,77f@l - lwz r4,GPR8(r1) - mr r5,r2 - bl printk - lwz r0,GPR0(r1) - lwz r3,GPR3(r1) - lwz r4,GPR4(r1) - lwz r5,GPR5(r1) - lwz r6,GPR6(r1) - lwz r7,GPR7(r1) - lwz r8,GPR8(r1) - mtlr r31 - lwz r31,GPR31(r1) - blr - -do_show_syscall_exit: -#ifdef SHOW_SYSCALLS_TASK - lis r11,show_syscalls_task@ha - lwz r11,show_syscalls_task@l(r11) - cmp 0,r2,r11 - bnelr -#endif - stw r31,GPR31(r1) - mflr r31 - stw r3,RESULT(r1) /* Save result */ - mr r4,r3 - lis r3,79f@ha - addi r3,r3,79f@l - bl printk - lwz r3,RESULT(r1) - mtlr r31 - lwz r31,GPR31(r1) - blr - -7: .string "syscall %d(%x, %x, %x, %x, %x, " -77: .string "%x), current=%p\n" -79: .string " -> %x\n" - .align 2,0 - -#ifdef SHOW_SYSCALLS_TASK - .data - .globl show_syscalls_task -show_syscalls_task: - .long -1 - .text -#endif -#endif /* SHOW_SYSCALLS */ - -/* - * The fork/clone functions need to copy the full register set into - * the child process. Therefore we need to save all the nonvolatile - * registers (r13 - r31) before calling the C code. - */ - .globl ppc_fork -ppc_fork: - SAVE_NVGPRS(r1) - lwz r0,TRAP(r1) - rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */ - stw r0,TRAP(r1) /* register set saved */ - b sys_fork - - .globl ppc_vfork -ppc_vfork: - SAVE_NVGPRS(r1) - lwz r0,TRAP(r1) - rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */ - stw r0,TRAP(r1) /* register set saved */ - b sys_vfork - - .globl ppc_clone -ppc_clone: - SAVE_NVGPRS(r1) - lwz r0,TRAP(r1) - rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */ - stw r0,TRAP(r1) /* register set saved */ - b sys_clone - - .globl ppc_swapcontext -ppc_swapcontext: - SAVE_NVGPRS(r1) - lwz r0,TRAP(r1) - rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */ - stw r0,TRAP(r1) /* register set saved */ - b sys_swapcontext - -/* - * Top-level page fault handling. - * This is in assembler because if do_page_fault tells us that - * it is a bad kernel page fault, we want to save the non-volatile - * registers before calling bad_page_fault. - */ - .globl handle_page_fault -handle_page_fault: - stw r4,_DAR(r1) - addi r3,r1,STACK_FRAME_OVERHEAD - bl do_page_fault - cmpwi r3,0 - beq+ ret_from_except - SAVE_NVGPRS(r1) - lwz r0,TRAP(r1) - clrrwi r0,r0,1 - stw r0,TRAP(r1) - mr r5,r3 - addi r3,r1,STACK_FRAME_OVERHEAD - lwz r4,_DAR(r1) - bl bad_page_fault - b ret_from_except_full - -/* - * This routine switches between two different tasks. The process - * state of one is saved on its kernel stack. Then the state - * of the other is restored from its kernel stack. The memory - * management hardware is updated to the second process's state. - * Finally, we can return to the second process. - * On entry, r3 points to the THREAD for the current task, r4 - * points to the THREAD for the new task. - * - * This routine is always called with interrupts disabled. - * - * Note: there are two ways to get to the "going out" portion - * of this code; either by coming in via the entry (_switch) - * or via "fork" which must set up an environment equivalent - * to the "_switch" path. If you change this , you'll have to - * change the fork code also. - * - * The code which creates the new task context is in 'copy_thread' - * in arch/ppc/kernel/process.c - */ -_GLOBAL(_switch) - stwu r1,-INT_FRAME_SIZE(r1) - mflr r0 - stw r0,INT_FRAME_SIZE+4(r1) - /* r3-r12 are caller saved -- Cort */ - SAVE_NVGPRS(r1) - stw r0,_NIP(r1) /* Return to switch caller */ - mfmsr r11 - li r0,MSR_FP /* Disable floating-point */ -#ifdef CONFIG_ALTIVEC -BEGIN_FTR_SECTION - oris r0,r0,MSR_VEC@h /* Disable altivec */ - mfspr r12,SPRN_VRSAVE /* save vrsave register value */ - stw r12,THREAD+THREAD_VRSAVE(r2) -END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) -#endif /* CONFIG_ALTIVEC */ - and. r0,r0,r11 /* FP or altivec enabled? */ - beq+ 1f - andc r11,r11,r0 - MTMSRD(r11) - isync -1: stw r11,_MSR(r1) - mfcr r10 - stw r10,_CCR(r1) - stw r1,KSP(r3) /* Set old stack pointer */ - -#ifdef CONFIG_SMP - /* We need a sync somewhere here to make sure that if the - * previous task gets rescheduled on another CPU, it sees all - * stores it has performed on this one. - */ - sync -#endif /* CONFIG_SMP */ - - tophys(r0,r4) - CLR_TOP32(r0) - mtspr SPRN_SPRG3,r0 /* Update current THREAD phys addr */ - lwz r1,KSP(r4) /* Load new stack pointer */ - - /* save the old current 'last' for return value */ - mr r3,r2 - addi r2,r4,-THREAD /* Update current */ - -#ifdef CONFIG_ALTIVEC -BEGIN_FTR_SECTION - lwz r0,THREAD+THREAD_VRSAVE(r2) - mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */ -END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) -#endif /* CONFIG_ALTIVEC */ - lwz r0,_CCR(r1) - mtcrf 0xFF,r0 - /* r3-r12 are destroyed -- Cort */ - REST_NVGPRS(r1) - - lwz r4,_NIP(r1) /* Return to _switch caller in new task */ - mtlr r4 - addi r1,r1,INT_FRAME_SIZE - blr - - .globl fast_exception_return -fast_exception_return: -#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) - andi. r10,r9,MSR_RI /* check for recoverable interrupt */ - beq 1f /* if not, we've got problems */ -#endif - -2: REST_4GPRS(3, r11) - lwz r10,_CCR(r11) - REST_GPR(1, r11) - mtcr r10 - lwz r10,_LINK(r11) - mtlr r10 - REST_GPR(10, r11) - mtspr SPRN_SRR1,r9 - mtspr SPRN_SRR0,r12 - REST_GPR(9, r11) - REST_GPR(12, r11) - lwz r11,GPR11(r11) - SYNC - RFI - -#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) -/* check if the exception happened in a restartable section */ -1: lis r3,exc_exit_restart_end@ha - addi r3,r3,exc_exit_restart_end@l - cmplw r12,r3 - bge 3f - lis r4,exc_exit_restart@ha - addi r4,r4,exc_exit_restart@l - cmplw r12,r4 - blt 3f - lis r3,fee_restarts@ha - tophys(r3,r3) - lwz r5,fee_restarts@l(r3) - addi r5,r5,1 - stw r5,fee_restarts@l(r3) - mr r12,r4 /* restart at exc_exit_restart */ - b 2b - - .section .bss - .align 2 -fee_restarts: - .space 4 - .previous - -/* aargh, a nonrecoverable interrupt, panic */ -/* aargh, we don't know which trap this is */ -/* but the 601 doesn't implement the RI bit, so assume it's OK */ -3: -BEGIN_FTR_SECTION - b 2b -END_FTR_SECTION_IFSET(CPU_FTR_601) - li r10,-1 - stw r10,TRAP(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - lis r10,MSR_KERNEL@h - ori r10,r10,MSR_KERNEL@l - bl transfer_to_handler_full - .long nonrecoverable_exception - .long ret_from_except -#endif - - .globl ret_from_except_full -ret_from_except_full: - REST_NVGPRS(r1) - /* fall through */ - - .globl ret_from_except -ret_from_except: - /* Hard-disable interrupts so that current_thread_info()->flags - * can't change between when we test it and when we return - * from the interrupt. */ - LOAD_MSR_KERNEL(r10,MSR_KERNEL) - SYNC /* Some chip revs have problems here... */ - MTMSRD(r10) /* disable interrupts */ - - lwz r3,_MSR(r1) /* Returning to user mode? */ - andi. r0,r3,MSR_PR - beq resume_kernel - -user_exc_return: /* r10 contains MSR_KERNEL here */ - /* Check current_thread_info()->flags */ - rlwinm r9,r1,0,0,18 - lwz r9,TI_FLAGS(r9) - andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) - bne do_work - -restore_user: -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - /* Check whether this process has its own DBCR0 value. The single - step bit tells us that dbcr0 should be loaded. */ - lwz r0,THREAD+THREAD_DBCR0(r2) - andis. r10,r0,DBCR0_IC@h - bnel- load_dbcr0 -#endif - -#ifdef CONFIG_PREEMPT - b restore - -/* N.B. the only way to get here is from the beq following ret_from_except. */ -resume_kernel: - /* check current_thread_info->preempt_count */ - rlwinm r9,r1,0,0,18 - lwz r0,TI_PREEMPT(r9) - cmpwi 0,r0,0 /* if non-zero, just restore regs and return */ - bne restore - lwz r0,TI_FLAGS(r9) - andi. r0,r0,_TIF_NEED_RESCHED - beq+ restore - andi. r0,r3,MSR_EE /* interrupts off? */ - beq restore /* don't schedule if so */ -1: bl preempt_schedule_irq - rlwinm r9,r1,0,0,18 - lwz r3,TI_FLAGS(r9) - andi. r0,r3,_TIF_NEED_RESCHED - bne- 1b -#else -resume_kernel: -#endif /* CONFIG_PREEMPT */ - - /* interrupts are hard-disabled at this point */ -restore: -#ifdef CONFIG_44x - lis r4,icache_44x_need_flush@ha - lwz r5,icache_44x_need_flush@l(r4) - cmplwi cr0,r5,0 - beq+ 1f - li r6,0 - iccci r0,r0 - stw r6,icache_44x_need_flush@l(r4) -1: -#endif /* CONFIG_44x */ - lwz r0,GPR0(r1) - lwz r2,GPR2(r1) - REST_4GPRS(3, r1) - REST_2GPRS(7, r1) - - lwz r10,_XER(r1) - lwz r11,_CTR(r1) - mtspr SPRN_XER,r10 - mtctr r11 - - PPC405_ERR77(0,r1) -BEGIN_FTR_SECTION - lwarx r11,0,r1 -END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX) - stwcx. r0,0,r1 /* to clear the reservation */ - -#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) - lwz r9,_MSR(r1) - andi. r10,r9,MSR_RI /* check if this exception occurred */ - beql nonrecoverable /* at a bad place (MSR:RI = 0) */ - - lwz r10,_CCR(r1) - lwz r11,_LINK(r1) - mtcrf 0xFF,r10 - mtlr r11 - - /* - * Once we put values in SRR0 and SRR1, we are in a state - * where exceptions are not recoverable, since taking an - * exception will trash SRR0 and SRR1. Therefore we clear the - * MSR:RI bit to indicate this. If we do take an exception, - * we can't return to the point of the exception but we - * can restart the exception exit path at the label - * exc_exit_restart below. -- paulus - */ - LOAD_MSR_KERNEL(r10,MSR_KERNEL & ~MSR_RI) - SYNC - MTMSRD(r10) /* clear the RI bit */ - .globl exc_exit_restart -exc_exit_restart: - lwz r9,_MSR(r1) - lwz r12,_NIP(r1) - FIX_SRR1(r9,r10) - mtspr SPRN_SRR0,r12 - mtspr SPRN_SRR1,r9 - REST_4GPRS(9, r1) - lwz r1,GPR1(r1) - .globl exc_exit_restart_end -exc_exit_restart_end: - SYNC - RFI - -#else /* !(CONFIG_4xx || CONFIG_BOOKE) */ - /* - * This is a bit different on 4xx/Book-E because it doesn't have - * the RI bit in the MSR. - * The TLB miss handler checks if we have interrupted - * the exception exit path and restarts it if so - * (well maybe one day it will... :). - */ - lwz r11,_LINK(r1) - mtlr r11 - lwz r10,_CCR(r1) - mtcrf 0xff,r10 - REST_2GPRS(9, r1) - .globl exc_exit_restart -exc_exit_restart: - lwz r11,_NIP(r1) - lwz r12,_MSR(r1) -exc_exit_start: - mtspr SPRN_SRR0,r11 - mtspr SPRN_SRR1,r12 - REST_2GPRS(11, r1) - lwz r1,GPR1(r1) - .globl exc_exit_restart_end -exc_exit_restart_end: - PPC405_ERR77_SYNC - rfi - b . /* prevent prefetch past rfi */ - -/* - * Returning from a critical interrupt in user mode doesn't need - * to be any different from a normal exception. For a critical - * interrupt in the kernel, we just return (without checking for - * preemption) since the interrupt may have happened at some crucial - * place (e.g. inside the TLB miss handler), and because we will be - * running with r1 pointing into critical_stack, not the current - * process's kernel stack (and therefore current_thread_info() will - * give the wrong answer). - * We have to restore various SPRs that may have been in use at the - * time of the critical interrupt. - * - */ -#ifdef CONFIG_40x -#define PPC_40x_TURN_OFF_MSR_DR \ - /* avoid any possible TLB misses here by turning off MSR.DR, we \ - * assume the instructions here are mapped by a pinned TLB entry */ \ - li r10,MSR_IR; \ - mtmsr r10; \ - isync; \ - tophys(r1, r1); -#else -#define PPC_40x_TURN_OFF_MSR_DR -#endif - -#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \ - REST_NVGPRS(r1); \ - lwz r3,_MSR(r1); \ - andi. r3,r3,MSR_PR; \ - LOAD_MSR_KERNEL(r10,MSR_KERNEL); \ - bne user_exc_return; \ - lwz r0,GPR0(r1); \ - lwz r2,GPR2(r1); \ - REST_4GPRS(3, r1); \ - REST_2GPRS(7, r1); \ - lwz r10,_XER(r1); \ - lwz r11,_CTR(r1); \ - mtspr SPRN_XER,r10; \ - mtctr r11; \ - PPC405_ERR77(0,r1); \ - stwcx. r0,0,r1; /* to clear the reservation */ \ - lwz r11,_LINK(r1); \ - mtlr r11; \ - lwz r10,_CCR(r1); \ - mtcrf 0xff,r10; \ - PPC_40x_TURN_OFF_MSR_DR; \ - lwz r9,_DEAR(r1); \ - lwz r10,_ESR(r1); \ - mtspr SPRN_DEAR,r9; \ - mtspr SPRN_ESR,r10; \ - lwz r11,_NIP(r1); \ - lwz r12,_MSR(r1); \ - mtspr exc_lvl_srr0,r11; \ - mtspr exc_lvl_srr1,r12; \ - lwz r9,GPR9(r1); \ - lwz r12,GPR12(r1); \ - lwz r10,GPR10(r1); \ - lwz r11,GPR11(r1); \ - lwz r1,GPR1(r1); \ - PPC405_ERR77_SYNC; \ - exc_lvl_rfi; \ - b .; /* prevent prefetch past exc_lvl_rfi */ - - .globl ret_from_crit_exc -ret_from_crit_exc: - RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) - -#ifdef CONFIG_BOOKE - .globl ret_from_debug_exc -ret_from_debug_exc: - RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) - - .globl ret_from_mcheck_exc -ret_from_mcheck_exc: - RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) -#endif /* CONFIG_BOOKE */ - -/* - * Load the DBCR0 value for a task that is being ptraced, - * having first saved away the global DBCR0. Note that r0 - * has the dbcr0 value to set upon entry to this. - */ -load_dbcr0: - mfmsr r10 /* first disable debug exceptions */ - rlwinm r10,r10,0,~MSR_DE - mtmsr r10 - isync - mfspr r10,SPRN_DBCR0 - lis r11,global_dbcr0@ha - addi r11,r11,global_dbcr0@l - stw r10,0(r11) - mtspr SPRN_DBCR0,r0 - lwz r10,4(r11) - addi r10,r10,1 - stw r10,4(r11) - li r11,-1 - mtspr SPRN_DBSR,r11 /* clear all pending debug events */ - blr - - .section .bss - .align 4 -global_dbcr0: - .space 8 - .previous -#endif /* !(CONFIG_4xx || CONFIG_BOOKE) */ - -do_work: /* r10 contains MSR_KERNEL here */ - andi. r0,r9,_TIF_NEED_RESCHED - beq do_user_signal - -do_resched: /* r10 contains MSR_KERNEL here */ - ori r10,r10,MSR_EE - SYNC - MTMSRD(r10) /* hard-enable interrupts */ - bl schedule -recheck: - LOAD_MSR_KERNEL(r10,MSR_KERNEL) - SYNC - MTMSRD(r10) /* disable interrupts */ - rlwinm r9,r1,0,0,18 - lwz r9,TI_FLAGS(r9) - andi. r0,r9,_TIF_NEED_RESCHED - bne- do_resched - andi. r0,r9,_TIF_SIGPENDING - beq restore_user -do_user_signal: /* r10 contains MSR_KERNEL here */ - ori r10,r10,MSR_EE - SYNC - MTMSRD(r10) /* hard-enable interrupts */ - /* save r13-r31 in the exception frame, if not already done */ - lwz r3,TRAP(r1) - andi. r0,r3,1 - beq 2f - SAVE_NVGPRS(r1) - rlwinm r3,r3,0,0,30 - stw r3,TRAP(r1) -2: li r3,0 - addi r4,r1,STACK_FRAME_OVERHEAD - bl do_signal - REST_NVGPRS(r1) - b recheck - -/* - * We come here when we are at the end of handling an exception - * that occurred at a place where taking an exception will lose - * state information, such as the contents of SRR0 and SRR1. - */ -nonrecoverable: - lis r10,exc_exit_restart_end@ha - addi r10,r10,exc_exit_restart_end@l - cmplw r12,r10 - bge 3f - lis r11,exc_exit_restart@ha - addi r11,r11,exc_exit_restart@l - cmplw r12,r11 - blt 3f - lis r10,ee_restarts@ha - lwz r12,ee_restarts@l(r10) - addi r12,r12,1 - stw r12,ee_restarts@l(r10) - mr r12,r11 /* restart at exc_exit_restart */ - blr -3: /* OK, we can't recover, kill this process */ - /* but the 601 doesn't implement the RI bit, so assume it's OK */ -BEGIN_FTR_SECTION - blr -END_FTR_SECTION_IFSET(CPU_FTR_601) - lwz r3,TRAP(r1) - andi. r0,r3,1 - beq 4f - SAVE_NVGPRS(r1) - rlwinm r3,r3,0,0,30 - stw r3,TRAP(r1) -4: addi r3,r1,STACK_FRAME_OVERHEAD - bl nonrecoverable_exception - /* shouldn't return */ - b 4b - - .section .bss - .align 2 -ee_restarts: - .space 4 - .previous diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S deleted file mode 100644 index e7e642b95138c32e796c18720027893497a86376..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/head.S +++ /dev/null @@ -1,1220 +0,0 @@ -/* - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP - * Copyright (C) 1996 Cort Dougan - * Adapted for Power Macintosh by Paul Mackerras. - * Low-level exception handlers and MMU support - * rewritten by Paul Mackerras. - * Copyright (C) 1996 Paul Mackerras. - * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net). - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * This file contains the low-level support and setup for the - * PowerPC platform, including trap and interrupt dispatch. - * (The PPC 8xx embedded CPUs use head_8xx.S instead.) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */ -#define LOAD_BAT(n, reg, RA, RB) \ - /* see the comment for clear_bats() -- Cort */ \ - li RA,0; \ - mtspr SPRN_IBAT##n##U,RA; \ - mtspr SPRN_DBAT##n##U,RA; \ - lwz RA,(n*16)+0(reg); \ - lwz RB,(n*16)+4(reg); \ - mtspr SPRN_IBAT##n##U,RA; \ - mtspr SPRN_IBAT##n##L,RB; \ - beq 1f; \ - lwz RA,(n*16)+8(reg); \ - lwz RB,(n*16)+12(reg); \ - mtspr SPRN_DBAT##n##U,RA; \ - mtspr SPRN_DBAT##n##L,RB; \ -1: - - .text - .stabs "arch/ppc/kernel/",N_SO,0,0,0f - .stabs "head.S",N_SO,0,0,0f -0: - .globl _stext -_stext: - -/* - * _start is defined this way because the XCOFF loader in the OpenFirmware - * on the powermac expects the entry point to be a procedure descriptor. - */ - .text - .globl _start -_start: - /* - * These are here for legacy reasons, the kernel used to - * need to look like a coff function entry for the pmac - * but we're always started by some kind of bootloader now. - * -- Cort - */ - nop /* used by __secondary_hold on prep (mtx) and chrp smp */ - nop /* used by __secondary_hold on prep (mtx) and chrp smp */ - nop - -/* PMAC - * Enter here with the kernel text, data and bss loaded starting at - * 0, running with virtual == physical mapping. - * r5 points to the prom entry point (the client interface handler - * address). Address translation is turned on, with the prom - * managing the hash table. Interrupts are disabled. The stack - * pointer (r1) points to just below the end of the half-meg region - * from 0x380000 - 0x400000, which is mapped in already. - * - * If we are booted from MacOS via BootX, we enter with the kernel - * image loaded somewhere, and the following values in registers: - * r3: 'BooX' (0x426f6f58) - * r4: virtual address of boot_infos_t - * r5: 0 - * - * APUS - * r3: 'APUS' - * r4: physical address of memory base - * Linux/m68k style BootInfo structure at &_end. - * - * PREP - * This is jumped to on prep systems right after the kernel is relocated - * to its proper place in memory by the boot loader. The expected layout - * of the regs is: - * r3: ptr to residual data - * r4: initrd_start or if no initrd then 0 - * r5: initrd_end - unused if r4 is 0 - * r6: Start of command line string - * r7: End of command line string - * - * This just gets a minimal mmu environment setup so we can call - * start_here() to do the real work. - * -- Cort - */ - - .globl __start -__start: - mr r31,r3 /* save parameters */ - mr r30,r4 - mr r29,r5 - mr r28,r6 - mr r27,r7 - li r24,0 /* cpu # */ - -/* - * early_init() does the early machine identification and does - * the necessary low-level setup and clears the BSS - * -- Cort - */ - bl early_init - -/* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains - * the physical address we are running at, returned by early_init() - */ - bl mmu_off -__after_mmu_off: - bl clear_bats - bl flush_tlbs - - bl initial_bats -#ifdef CONFIG_BOOTX_TEXT - bl setup_disp_bat -#endif - -/* - * Call setup_cpu for CPU 0 and initialize 6xx Idle - */ - bl reloc_offset - li r24,0 /* cpu# */ - bl call_setup_cpu /* Call setup_cpu for this CPU */ -#ifdef CONFIG_6xx - bl reloc_offset - bl init_idle_6xx -#endif /* CONFIG_6xx */ - - -/* - * We need to run with _start at physical address 0. - * If the MMU is already turned on, we copy stuff to KERNELBASE, - * otherwise we copy it to 0. - */ - bl reloc_offset - mr r26,r3 - addis r4,r3,KERNELBASE@h /* current address of _start */ - cmpwi 0,r4,0 /* are we already running at 0? */ - bne relocate_kernel - -/* - * we now have the 1st 16M of ram mapped with the bats. - * prep needs the mmu to be turned on here, but pmac already has it on. - * this shouldn't bother the pmac since it just gets turned on again - * as we jump to our code at KERNELBASE. -- Cort - * Actually no, pmac doesn't have it on any more. BootX enters with MMU - * off, and in other cases, we now turn it off before changing BATs above. - */ -turn_on_mmu: - mfmsr r0 - ori r0,r0,MSR_DR|MSR_IR - mtspr SPRN_SRR1,r0 - lis r0,start_here@h - ori r0,r0,start_here@l - mtspr SPRN_SRR0,r0 - SYNC - RFI /* enables MMU */ - -/* - * We need __secondary_hold as a place to hold the other cpus on - * an SMP machine, even when we are running a UP kernel. - */ - . = 0xc0 /* for prep bootloader */ - li r3,1 /* MTX only has 1 cpu */ - .globl __secondary_hold -__secondary_hold: - /* tell the master we're here */ - stw r3,4(0) -#ifdef CONFIG_SMP -100: lwz r4,0(0) - /* wait until we're told to start */ - cmpw 0,r4,r3 - bne 100b - /* our cpu # was at addr 0 - go */ - mr r24,r3 /* cpu # */ - b __secondary_start -#else - b . -#endif /* CONFIG_SMP */ - -/* - * Exception entry code. This code runs with address translation - * turned off, i.e. using physical addresses. - * We assume sprg3 has the physical address of the current - * task's thread_struct. - */ -#define EXCEPTION_PROLOG \ - mtspr SPRN_SPRG0,r10; \ - mtspr SPRN_SPRG1,r11; \ - mfcr r10; \ - EXCEPTION_PROLOG_1; \ - EXCEPTION_PROLOG_2 - -#define EXCEPTION_PROLOG_1 \ - mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \ - andi. r11,r11,MSR_PR; \ - tophys(r11,r1); /* use tophys(r1) if kernel */ \ - beq 1f; \ - mfspr r11,SPRN_SPRG3; \ - lwz r11,THREAD_INFO-THREAD(r11); \ - addi r11,r11,THREAD_SIZE; \ - tophys(r11,r11); \ -1: subi r11,r11,INT_FRAME_SIZE /* alloc exc. frame */ - - -#define EXCEPTION_PROLOG_2 \ - CLR_TOP32(r11); \ - stw r10,_CCR(r11); /* save registers */ \ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mfspr r10,SPRN_SPRG0; \ - stw r10,GPR10(r11); \ - mfspr r12,SPRN_SPRG1; \ - stw r12,GPR11(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r12,SPRN_SRR0; \ - mfspr r9,SPRN_SRR1; \ - stw r1,GPR1(r11); \ - stw r1,0(r11); \ - tovirt(r1,r11); /* set new kernel sp */ \ - li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \ - MTMSRD(r10); /* (except for mach check in rtas) */ \ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - -/* - * Note: code which follows this uses cr0.eq (set if from kernel), - * r11, r12 (SRR0), and r9 (SRR1). - * - * Note2: once we have set r1 we are in a position to take exceptions - * again, and we could thus set MSR:RI at that point. - */ - -/* - * Exception vectors. - */ -#define EXCEPTION(n, label, hdlr, xfer) \ - . = n; \ -label: \ - EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - xfer(n, hdlr) - -#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret) \ - li r10,trap; \ - stw r10,TRAP(r11); \ - li r10,MSR_KERNEL; \ - copyee(r10, r9); \ - bl tfer; \ -i##n: \ - .long hdlr; \ - .long ret - -#define COPY_EE(d, s) rlwimi d,s,0,16,16 -#define NOCOPY(d, s) - -#define EXC_XFER_STD(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \ - ret_from_except) - -#define EXC_XFER_EE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_EE_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \ - ret_from_except) - -/* System reset */ -/* core99 pmac starts the seconary here by changing the vector, and - putting it back to what it was (unknown_exception) when done. */ - EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD) - -/* Machine check */ - . = 0x200 - mtspr SPRN_SPRG0,r10 - mtspr SPRN_SPRG1,r11 - mfcr r10 - EXCEPTION_PROLOG_1 -7: EXCEPTION_PROLOG_2 - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x200, machine_check_exception) - -/* Data access exception. */ - . = 0x300 -DataAccess: - EXCEPTION_PROLOG - mfspr r10,SPRN_DSISR - andis. r0,r10,0xa470 /* weird error? */ - bne 1f /* if not, try to put a PTE */ - mfspr r4,SPRN_DAR /* into the hash table */ - rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */ - bl hash_page -1: stw r10,_DSISR(r11) - mr r5,r10 - mfspr r4,SPRN_DAR - EXC_XFER_EE_LITE(0x300, handle_page_fault) - -/* Instruction access exception. */ - . = 0x400 -InstructionAccess: - EXCEPTION_PROLOG - andis. r0,r9,0x4000 /* no pte found? */ - beq 1f /* if so, try to put a PTE */ - li r3,0 /* into the hash table */ - mr r4,r12 /* SRR0 is fault address */ - bl hash_page -1: mr r4,r12 - mr r5,r9 - EXC_XFER_EE_LITE(0x400, handle_page_fault) - -/* External interrupt */ - EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE) - -/* Alignment exception */ - . = 0x600 -Alignment: - EXCEPTION_PROLOG - mfspr r4,SPRN_DAR - stw r4,_DAR(r11) - mfspr r5,SPRN_DSISR - stw r5,_DSISR(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, alignment_exception) - -/* Program check exception */ - EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD) - -/* Floating-point unavailable */ - . = 0x800 -FPUnavailable: - EXCEPTION_PROLOG - bne load_up_fpu /* if from user, just load it up */ - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) - -/* Decrementer */ - EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) - - EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE) - EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE) - -/* System call */ - . = 0xc00 -SystemCall: - EXCEPTION_PROLOG - EXC_XFER_EE_LITE(0xc00, DoSyscall) - -/* Single step - not used on 601 */ - EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD) - EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE) - -/* - * The Altivec unavailable trap is at 0x0f20. Foo. - * We effectively remap it to 0x3000. - * We include an altivec unavailable exception vector even if - * not configured for Altivec, so that you can't panic a - * non-altivec kernel running on a machine with altivec just - * by executing an altivec instruction. - */ - . = 0xf00 - b Trap_0f - - . = 0xf20 - b AltiVecUnavailable - -Trap_0f: - EXCEPTION_PROLOG - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0xf00, unknown_exception) - -/* - * Handle TLB miss for instruction on 603/603e. - * Note: we get an alternate set of r0 - r3 to use automatically. - */ - . = 0x1000 -InstructionTLBMiss: -/* - * r0: stored ctr - * r1: linux style pte ( later becomes ppc hardware pte ) - * r2: ptr to linux-style pte - * r3: scratch - */ - mfctr r0 - /* Get PTE (linux-style) and check access */ - mfspr r3,SPRN_IMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 - mfspr r2,SPRN_SPRG3 - li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ - lwz r2,PGDIR(r2) - blt+ 112f - lis r2,swapper_pg_dir@ha /* if kernel address, use */ - addi r2,r2,swapper_pg_dir@l /* kernel page table */ - mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ -112: tophys(r2,r2) - rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ - lwz r2,0(r2) /* get pmd entry */ - rlwinm. r2,r2,0,0,19 /* extract address of pte page */ - beq- InstructionAddressInvalid /* return if no mapping */ - rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ - lwz r3,0(r2) /* get linux-style pte */ - andc. r1,r1,r3 /* check access & ~permission */ - bne- InstructionAddressInvalid /* return if access not permitted */ - ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ - /* - * NOTE! We are assuming this is not an SMP system, otherwise - * we would need to update the pte atomically with lwarx/stwcx. - */ - stw r3,0(r2) /* update PTE (accessed bit) */ - /* Convert linux-style PTE to low word of PPC-style PTE */ - rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ - rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ - and r1,r1,r2 /* writable if _RW and _DIRTY */ - rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ - rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ - ori r1,r1,0xe14 /* clear out reserved bits and M */ - andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ - mtspr SPRN_RPA,r1 - mfspr r3,SPRN_IMISS - tlbli r3 - mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ - mtcrf 0x80,r3 - rfi -InstructionAddressInvalid: - mfspr r3,SPRN_SRR1 - rlwinm r1,r3,9,6,6 /* Get load/store bit */ - - addis r1,r1,0x2000 - mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */ - mtctr r0 /* Restore CTR */ - andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ - or r2,r2,r1 - mtspr SPRN_SRR1,r2 - mfspr r1,SPRN_IMISS /* Get failing address */ - rlwinm. r2,r2,0,31,31 /* Check for little endian access */ - rlwimi r2,r2,1,30,30 /* change 1 -> 3 */ - xor r1,r1,r2 - mtspr SPRN_DAR,r1 /* Set fault address */ - mfmsr r0 /* Restore "normal" registers */ - xoris r0,r0,MSR_TGPR>>16 - mtcrf 0x80,r3 /* Restore CR0 */ - mtmsr r0 - b InstructionAccess - -/* - * Handle TLB miss for DATA Load operation on 603/603e - */ - . = 0x1100 -DataLoadTLBMiss: -/* - * r0: stored ctr - * r1: linux style pte ( later becomes ppc hardware pte ) - * r2: ptr to linux-style pte - * r3: scratch - */ - mfctr r0 - /* Get PTE (linux-style) and check access */ - mfspr r3,SPRN_DMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 - mfspr r2,SPRN_SPRG3 - li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ - lwz r2,PGDIR(r2) - blt+ 112f - lis r2,swapper_pg_dir@ha /* if kernel address, use */ - addi r2,r2,swapper_pg_dir@l /* kernel page table */ - mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ -112: tophys(r2,r2) - rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ - lwz r2,0(r2) /* get pmd entry */ - rlwinm. r2,r2,0,0,19 /* extract address of pte page */ - beq- DataAddressInvalid /* return if no mapping */ - rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ - lwz r3,0(r2) /* get linux-style pte */ - andc. r1,r1,r3 /* check access & ~permission */ - bne- DataAddressInvalid /* return if access not permitted */ - ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */ - /* - * NOTE! We are assuming this is not an SMP system, otherwise - * we would need to update the pte atomically with lwarx/stwcx. - */ - stw r3,0(r2) /* update PTE (accessed bit) */ - /* Convert linux-style PTE to low word of PPC-style PTE */ - rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */ - rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ - and r1,r1,r2 /* writable if _RW and _DIRTY */ - rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ - rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */ - ori r1,r1,0xe14 /* clear out reserved bits and M */ - andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */ - mtspr SPRN_RPA,r1 - mfspr r3,SPRN_DMISS - tlbld r3 - mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ - mtcrf 0x80,r3 - rfi -DataAddressInvalid: - mfspr r3,SPRN_SRR1 - rlwinm r1,r3,9,6,6 /* Get load/store bit */ - addis r1,r1,0x2000 - mtspr SPRN_DSISR,r1 - mtctr r0 /* Restore CTR */ - andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ - mtspr SPRN_SRR1,r2 - mfspr r1,SPRN_DMISS /* Get failing address */ - rlwinm. r2,r2,0,31,31 /* Check for little endian access */ - beq 20f /* Jump if big endian */ - xori r1,r1,3 -20: mtspr SPRN_DAR,r1 /* Set fault address */ - mfmsr r0 /* Restore "normal" registers */ - xoris r0,r0,MSR_TGPR>>16 - mtcrf 0x80,r3 /* Restore CR0 */ - mtmsr r0 - b DataAccess - -/* - * Handle TLB miss for DATA Store on 603/603e - */ - . = 0x1200 -DataStoreTLBMiss: -/* - * r0: stored ctr - * r1: linux style pte ( later becomes ppc hardware pte ) - * r2: ptr to linux-style pte - * r3: scratch - */ - mfctr r0 - /* Get PTE (linux-style) and check access */ - mfspr r3,SPRN_DMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 - mfspr r2,SPRN_SPRG3 - li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ - lwz r2,PGDIR(r2) - blt+ 112f - lis r2,swapper_pg_dir@ha /* if kernel address, use */ - addi r2,r2,swapper_pg_dir@l /* kernel page table */ - mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ - rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ -112: tophys(r2,r2) - rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */ - lwz r2,0(r2) /* get pmd entry */ - rlwinm. r2,r2,0,0,19 /* extract address of pte page */ - beq- DataAddressInvalid /* return if no mapping */ - rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */ - lwz r3,0(r2) /* get linux-style pte */ - andc. r1,r1,r3 /* check access & ~permission */ - bne- DataAddressInvalid /* return if access not permitted */ - ori r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY - /* - * NOTE! We are assuming this is not an SMP system, otherwise - * we would need to update the pte atomically with lwarx/stwcx. - */ - stw r3,0(r2) /* update PTE (accessed/dirty bits) */ - /* Convert linux-style PTE to low word of PPC-style PTE */ - rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */ - li r1,0xe15 /* clear out reserved bits and M */ - andc r1,r3,r1 /* PP = user? 2: 0 */ - mtspr SPRN_RPA,r1 - mfspr r3,SPRN_DMISS - tlbld r3 - mfspr r3,SPRN_SRR1 /* Need to restore CR0 */ - mtcrf 0x80,r3 - rfi - -#ifndef CONFIG_ALTIVEC -#define altivec_assist_exception unknown_exception -#endif - - EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE) - EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE) - EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE) - EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD) - EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE) - EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE) - - .globl mol_trampoline - .set mol_trampoline, i0x2f00 - - . = 0x3000 - -AltiVecUnavailable: - EXCEPTION_PROLOG -#ifdef CONFIG_ALTIVEC - bne load_up_altivec /* if from user, just load it up */ -#endif /* CONFIG_ALTIVEC */ - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception) - -#ifdef CONFIG_ALTIVEC -/* Note that the AltiVec support is closely modeled after the FP - * support. Changes to one are likely to be applicable to the - * other! */ -load_up_altivec: -/* - * Disable AltiVec for the task which had AltiVec previously, - * and save its AltiVec registers in its thread_struct. - * Enables AltiVec for use in the kernel on return. - * On SMP we know the AltiVec units are free, since we give it up every - * switch. -- Kumar - */ - mfmsr r5 - oris r5,r5,MSR_VEC@h - MTMSRD(r5) /* enable use of AltiVec now */ - isync -/* - * For SMP, we don't do lazy AltiVec switching because it just gets too - * horrendously complex, especially when a task switches from one CPU - * to another. Instead we call giveup_altivec in switch_to. - */ -#ifndef CONFIG_SMP - tophys(r6,0) - addis r3,r6,last_task_used_altivec@ha - lwz r4,last_task_used_altivec@l(r3) - cmpwi 0,r4,0 - beq 1f - add r4,r4,r6 - addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ - SAVE_32VRS(0,r10,r4) - mfvscr vr0 - li r10,THREAD_VSCR - stvx vr0,r10,r4 - lwz r5,PT_REGS(r4) - add r5,r5,r6 - lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) - lis r10,MSR_VEC@h - andc r4,r4,r10 /* disable altivec for previous task */ - stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) -1: -#endif /* CONFIG_SMP */ - /* enable use of AltiVec after return */ - oris r9,r9,MSR_VEC@h - mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */ - li r4,1 - li r10,THREAD_VSCR - stw r4,THREAD_USED_VR(r5) - lvx vr0,r10,r5 - mtvscr vr0 - REST_32VRS(0,r10,r5) -#ifndef CONFIG_SMP - subi r4,r5,THREAD - sub r4,r4,r6 - stw r4,last_task_used_altivec@l(r3) -#endif /* CONFIG_SMP */ - /* restore registers and return */ - /* we haven't used ctr or xer or lr */ - b fast_exception_return - -/* - * giveup_altivec(tsk) - * Disable AltiVec for the task given as the argument, - * and save the AltiVec registers in its thread_struct. - * Enables AltiVec for use in the kernel on return. - */ - - .globl giveup_altivec -giveup_altivec: - mfmsr r5 - oris r5,r5,MSR_VEC@h - SYNC - MTMSRD(r5) /* enable use of AltiVec now */ - isync - cmpwi 0,r3,0 - beqlr- /* if no previous owner, done */ - addi r3,r3,THREAD /* want THREAD of task */ - lwz r5,PT_REGS(r3) - cmpwi 0,r5,0 - SAVE_32VRS(0, r4, r3) - mfvscr vr0 - li r4,THREAD_VSCR - stvx vr0,r4,r3 - beq 1f - lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) - lis r3,MSR_VEC@h - andc r4,r4,r3 /* disable AltiVec for previous task */ - stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) -1: -#ifndef CONFIG_SMP - li r5,0 - lis r4,last_task_used_altivec@ha - stw r5,last_task_used_altivec@l(r4) -#endif /* CONFIG_SMP */ - blr -#endif /* CONFIG_ALTIVEC */ - -/* - * This code is jumped to from the startup code to copy - * the kernel image to physical address 0. - */ -relocate_kernel: - addis r9,r26,klimit@ha /* fetch klimit */ - lwz r25,klimit@l(r9) - addis r25,r25,-KERNELBASE@h - li r3,0 /* Destination base address */ - li r6,0 /* Destination offset */ - li r5,0x4000 /* # bytes of memory to copy */ - bl copy_and_flush /* copy the first 0x4000 bytes */ - addi r0,r3,4f@l /* jump to the address of 4f */ - mtctr r0 /* in copy and do the rest. */ - bctr /* jump to the copy */ -4: mr r5,r25 - bl copy_and_flush /* copy the rest */ - b turn_on_mmu - -/* - * Copy routine used to copy the kernel to start at physical address 0 - * and flush and invalidate the caches as needed. - * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset - * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5. - */ -copy_and_flush: - addi r5,r5,-4 - addi r6,r6,-4 -4: li r0,L1_CACHE_BYTES/4 - mtctr r0 -3: addi r6,r6,4 /* copy a cache line */ - lwzx r0,r6,r4 - stwx r0,r6,r3 - bdnz 3b - dcbst r6,r3 /* write it to memory */ - sync - icbi r6,r3 /* flush the icache line */ - cmplw 0,r6,r5 - blt 4b - sync /* additional sync needed on g4 */ - isync - addi r5,r5,4 - addi r6,r6,4 - blr - -#ifdef CONFIG_SMP - .globl __secondary_start_pmac_0 -__secondary_start_pmac_0: - /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ - li r24,0 - b 1f - li r24,1 - b 1f - li r24,2 - b 1f - li r24,3 -1: - /* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0 - set to map the 0xf0000000 - 0xffffffff region */ - mfmsr r0 - rlwinm r0,r0,0,28,26 /* clear DR (0x10) */ - SYNC - mtmsr r0 - isync - - .globl __secondary_start -__secondary_start: - /* Copy some CPU settings from CPU 0 */ - bl __restore_cpu_setup - - lis r3,-KERNELBASE@h - mr r4,r24 - bl call_setup_cpu /* Call setup_cpu for this CPU */ -#ifdef CONFIG_6xx - lis r3,-KERNELBASE@h - bl init_idle_6xx -#endif /* CONFIG_6xx */ - - /* get current_thread_info and current */ - lis r1,secondary_ti@ha - tophys(r1,r1) - lwz r1,secondary_ti@l(r1) - tophys(r2,r1) - lwz r2,TI_TASK(r2) - - /* stack */ - addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD - li r0,0 - tophys(r3,r1) - stw r0,0(r3) - - /* load up the MMU */ - bl load_up_mmu - - /* ptr to phys current thread */ - tophys(r4,r2) - addi r4,r4,THREAD /* phys address of our thread_struct */ - CLR_TOP32(r4) - mtspr SPRN_SPRG3,r4 - li r3,0 - mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */ - - /* enable MMU and jump to start_secondary */ - li r4,MSR_KERNEL - FIX_SRR1(r4,r5) - lis r3,start_secondary@h - ori r3,r3,start_secondary@l - mtspr SPRN_SRR0,r3 - mtspr SPRN_SRR1,r4 - SYNC - RFI -#endif /* CONFIG_SMP */ - -/* - * Those generic dummy functions are kept for CPUs not - * included in CONFIG_6xx - */ -#if !defined(CONFIG_6xx) -_GLOBAL(__save_cpu_setup) - blr -_GLOBAL(__restore_cpu_setup) - blr -#endif /* !defined(CONFIG_6xx) */ - - -/* - * Load stuff into the MMU. Intended to be called with - * IR=0 and DR=0. - */ -load_up_mmu: - sync /* Force all PTE updates to finish */ - isync - tlbia /* Clear all TLB entries */ - sync /* wait for tlbia/tlbie to finish */ - TLBSYNC /* ... on all CPUs */ - /* Load the SDR1 register (hash table base & size) */ - lis r6,_SDR1@ha - tophys(r6,r6) - lwz r6,_SDR1@l(r6) - mtspr SPRN_SDR1,r6 - li r0,16 /* load up segment register values */ - mtctr r0 /* for context 0 */ - lis r3,0x2000 /* Ku = 1, VSID = 0 */ - li r4,0 -3: mtsrin r3,r4 - addi r3,r3,0x111 /* increment VSID */ - addis r4,r4,0x1000 /* address of next segment */ - bdnz 3b - -/* Load the BAT registers with the values set up by MMU_init. - MMU_init takes care of whether we're on a 601 or not. */ - mfpvr r3 - srwi r3,r3,16 - cmpwi r3,1 - lis r3,BATS@ha - addi r3,r3,BATS@l - tophys(r3,r3) - LOAD_BAT(0,r3,r4,r5) - LOAD_BAT(1,r3,r4,r5) - LOAD_BAT(2,r3,r4,r5) - LOAD_BAT(3,r3,r4,r5) - - blr - -/* - * This is where the main kernel code starts. - */ -start_here: - /* ptr to current */ - lis r2,init_task@h - ori r2,r2,init_task@l - /* Set up for using our exception vectors */ - /* ptr to phys current thread */ - tophys(r4,r2) - addi r4,r4,THREAD /* init task's THREAD */ - CLR_TOP32(r4) - mtspr SPRN_SPRG3,r4 - li r3,0 - mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */ - - /* stack */ - lis r1,init_thread_union@ha - addi r1,r1,init_thread_union@l - li r0,0 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) -/* - * Do early bootinfo parsing, platform-specific initialization, - * and set up the MMU. - */ - mr r3,r31 - mr r4,r30 - mr r5,r29 - mr r6,r28 - mr r7,r27 - bl machine_init - bl MMU_init - -/* - * Go back to running unmapped so we can load up new values - * for SDR1 (hash table pointer) and the segment registers - * and change to using our exception vectors. - */ - lis r4,2f@h - ori r4,r4,2f@l - tophys(r4,r4) - li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR) - FIX_SRR1(r3,r5) - mtspr SPRN_SRR0,r4 - mtspr SPRN_SRR1,r3 - SYNC - RFI -/* Load up the kernel context */ -2: bl load_up_mmu - -#ifdef CONFIG_BDI_SWITCH - /* Add helper information for the Abatron bdiGDB debugger. - * We do this here because we know the mmu is disabled, and - * will be enabled for real in just a few instructions. - */ - lis r5, abatron_pteptrs@h - ori r5, r5, abatron_pteptrs@l - stw r5, 0xf0(r0) /* This much match your Abatron config */ - lis r6, swapper_pg_dir@h - ori r6, r6, swapper_pg_dir@l - tophys(r5, r5) - stw r6, 0(r5) -#endif /* CONFIG_BDI_SWITCH */ - -/* Now turn on the MMU for real! */ - li r4,MSR_KERNEL - FIX_SRR1(r4,r5) - lis r3,start_kernel@h - ori r3,r3,start_kernel@l - mtspr SPRN_SRR0,r3 - mtspr SPRN_SRR1,r4 - SYNC - RFI - -/* - * Set up the segment registers for a new context. - */ -_GLOBAL(set_context) - mulli r3,r3,897 /* multiply context by skew factor */ - rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */ - addis r3,r3,0x6000 /* Set Ks, Ku bits */ - li r0,NUM_USER_SEGMENTS - mtctr r0 - -#ifdef CONFIG_BDI_SWITCH - /* Context switch the PTE pointer for the Abatron BDI2000. - * The PGDIR is passed as second argument. - */ - lis r5, KERNELBASE@h - lwz r5, 0xf0(r5) - stw r4, 0x4(r5) -#endif - li r4,0 - isync -3: - mtsrin r3,r4 - addi r3,r3,0x111 /* next VSID */ - rlwinm r3,r3,0,8,3 /* clear out any overflow from VSID field */ - addis r4,r4,0x1000 /* address of next segment */ - bdnz 3b - sync - isync - blr - -/* - * An undocumented "feature" of 604e requires that the v bit - * be cleared before changing BAT values. - * - * Also, newer IBM firmware does not clear bat3 and 4 so - * this makes sure it's done. - * -- Cort - */ -clear_bats: - li r10,0 - mfspr r9,SPRN_PVR - rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ - cmpwi r9, 1 - beq 1f - - mtspr SPRN_DBAT0U,r10 - mtspr SPRN_DBAT0L,r10 - mtspr SPRN_DBAT1U,r10 - mtspr SPRN_DBAT1L,r10 - mtspr SPRN_DBAT2U,r10 - mtspr SPRN_DBAT2L,r10 - mtspr SPRN_DBAT3U,r10 - mtspr SPRN_DBAT3L,r10 -1: - mtspr SPRN_IBAT0U,r10 - mtspr SPRN_IBAT0L,r10 - mtspr SPRN_IBAT1U,r10 - mtspr SPRN_IBAT1L,r10 - mtspr SPRN_IBAT2U,r10 - mtspr SPRN_IBAT2L,r10 - mtspr SPRN_IBAT3U,r10 - mtspr SPRN_IBAT3L,r10 -BEGIN_FTR_SECTION - /* Here's a tweak: at this point, CPU setup have - * not been called yet, so HIGH_BAT_EN may not be - * set in HID0 for the 745x processors. However, it - * seems that doesn't affect our ability to actually - * write to these SPRs. - */ - mtspr SPRN_DBAT4U,r10 - mtspr SPRN_DBAT4L,r10 - mtspr SPRN_DBAT5U,r10 - mtspr SPRN_DBAT5L,r10 - mtspr SPRN_DBAT6U,r10 - mtspr SPRN_DBAT6L,r10 - mtspr SPRN_DBAT7U,r10 - mtspr SPRN_DBAT7L,r10 - mtspr SPRN_IBAT4U,r10 - mtspr SPRN_IBAT4L,r10 - mtspr SPRN_IBAT5U,r10 - mtspr SPRN_IBAT5L,r10 - mtspr SPRN_IBAT6U,r10 - mtspr SPRN_IBAT6L,r10 - mtspr SPRN_IBAT7U,r10 - mtspr SPRN_IBAT7L,r10 -END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS) - blr - -flush_tlbs: - lis r10, 0x40 -1: addic. r10, r10, -0x1000 - tlbie r10 - blt 1b - sync - blr - -mmu_off: - addi r4, r3, __after_mmu_off - _start - mfmsr r3 - andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */ - beqlr - andc r3,r3,r0 - mtspr SPRN_SRR0,r4 - mtspr SPRN_SRR1,r3 - sync - RFI - -/* - * Use the first pair of BAT registers to map the 1st 16MB - * of RAM to KERNELBASE. From this point on we can't safely - * call OF any more. - */ -initial_bats: - lis r11,KERNELBASE@h - mfspr r9,SPRN_PVR - rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ - cmpwi 0,r9,1 - bne 4f - ori r11,r11,4 /* set up BAT registers for 601 */ - li r8,0x7f /* valid, block length = 8MB */ - oris r9,r11,0x800000@h /* set up BAT reg for 2nd 8M */ - oris r10,r8,0x800000@h /* set up BAT reg for 2nd 8M */ - mtspr SPRN_IBAT0U,r11 /* N.B. 601 has valid bit in */ - mtspr SPRN_IBAT0L,r8 /* lower BAT register */ - mtspr SPRN_IBAT1U,r9 - mtspr SPRN_IBAT1L,r10 - isync - blr - -4: tophys(r8,r11) -#ifdef CONFIG_SMP - ori r8,r8,0x12 /* R/W access, M=1 */ -#else - ori r8,r8,2 /* R/W access */ -#endif /* CONFIG_SMP */ - ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */ - - mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */ - mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */ - mtspr SPRN_IBAT0L,r8 - mtspr SPRN_IBAT0U,r11 - isync - blr - -#ifdef CONFIG_BOOTX_TEXT -setup_disp_bat: - /* - * setup the display bat prepared for us in prom.c - */ - mflr r8 - bl reloc_offset - mtlr r8 - addis r8,r3,disp_BAT@ha - addi r8,r8,disp_BAT@l - lwz r11,0(r8) - lwz r8,4(r8) - mfspr r9,SPRN_PVR - rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ - cmpwi 0,r9,1 - beq 1f - mtspr SPRN_DBAT3L,r8 - mtspr SPRN_DBAT3U,r11 - blr -1: mtspr SPRN_IBAT3L,r8 - mtspr SPRN_IBAT3U,r11 - blr - -#endif /* defined(CONFIG_BOOTX_TEXT) */ - -#ifdef CONFIG_8260 -/* Jump into the system reset for the rom. - * We first disable the MMU, and then jump to the ROM reset address. - * - * r3 is the board info structure, r4 is the location for starting. - * I use this for building a small kernel that can load other kernels, - * rather than trying to write or rely on a rom monitor that can tftp load. - */ - .globl m8260_gorom -m8260_gorom: - mfmsr r0 - rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */ - sync - mtmsr r0 - sync - mfspr r11, SPRN_HID0 - lis r10, 0 - ori r10,r10,HID0_ICE|HID0_DCE - andc r11, r11, r10 - mtspr SPRN_HID0, r11 - isync - li r5, MSR_ME|MSR_RI - lis r6,2f@h - addis r6,r6,-KERNELBASE@h - ori r6,r6,2f@l - mtspr SPRN_SRR0,r6 - mtspr SPRN_SRR1,r5 - isync - sync - rfi -2: - mtlr r4 - blr -#endif - - -/* - * We put a few things here that have to be page-aligned. - * This stuff goes at the beginning of the data segment, - * which is page-aligned. - */ - .data - .globl sdata -sdata: - .globl empty_zero_page -empty_zero_page: - .space 4096 - - .globl swapper_pg_dir -swapper_pg_dir: - .space 4096 - -/* - * This space gets a copy of optional info passed to us by the bootstrap - * Used to pass parameters into the kernel like root=/dev/sda1, etc. - */ - .globl cmd_line -cmd_line: - .space 512 - - .globl intercept_table -intercept_table: - .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700 - .long i0x800, 0, 0, 0, 0, i0xd00, 0, 0 - .long 0, 0, 0, i0x1300, 0, 0, 0, 0 - .long 0, 0, 0, 0, 0, 0, 0, 0 - .long 0, 0, 0, 0, 0, 0, 0, 0 - .long 0, 0, 0, 0, 0, 0, 0, 0 - -/* Room for two PTE pointers, usually the kernel and current user pointers - * to their respective root page table. - */ -abatron_pteptrs: - .space 8 diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S deleted file mode 100644 index ebb5a403829fdb64b6e66e1019e977c1f511d5ac..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/head_44x.S +++ /dev/null @@ -1,769 +0,0 @@ -/* - * Kernel execution entry point code. - * - * Copyright (c) 1995-1996 Gary Thomas - * Initial PowerPC version. - * Copyright (c) 1996 Cort Dougan - * Rewritten for PReP - * Copyright (c) 1996 Paul Mackerras - * Low-level exception handers, MMU support, and rewrite. - * Copyright (c) 1997 Dan Malek - * PowerPC 8xx modifications. - * Copyright (c) 1998-1999 TiVo, Inc. - * PowerPC 403GCX modifications. - * Copyright (c) 1999 Grant Erickson - * PowerPC 403GCX/405GP modifications. - * Copyright 2000 MontaVista Software Inc. - * PPC405 modifications - * PowerPC 403GCX/405GP modifications. - * Author: MontaVista Software, Inc. - * frank_rowand@mvista.com or source@mvista.com - * debbie_chu@mvista.com - * Copyright 2002-2005 MontaVista Software, Inc. - * PowerPC 44x support, Matt Porter - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "head_booke.h" - - -/* As with the other PowerPC ports, it is expected that when code - * execution begins here, the following registers contain valid, yet - * optional, information: - * - * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.) - * r4 - Starting address of the init RAM disk - * r5 - Ending address of the init RAM disk - * r6 - Start of kernel command line string (e.g. "mem=128") - * r7 - End of kernel command line string - * - */ - .text -_GLOBAL(_stext) -_GLOBAL(_start) - /* - * Reserve a word at a fixed location to store the address - * of abatron_pteptrs - */ - nop -/* - * Save parameters we are passed - */ - mr r31,r3 - mr r30,r4 - mr r29,r5 - mr r28,r6 - mr r27,r7 - li r24,0 /* CPU number */ - -/* - * Set up the initial MMU state - * - * We are still executing code at the virtual address - * mappings set by the firmware for the base of RAM. - * - * We first invalidate all TLB entries but the one - * we are running from. We then load the KERNELBASE - * mappings so we can begin to use kernel addresses - * natively and so the interrupt vector locations are - * permanently pinned (necessary since Book E - * implementations always have translation enabled). - * - * TODO: Use the known TLB entry we are running from to - * determine which physical region we are located - * in. This can be used to determine where in RAM - * (on a shared CPU system) or PCI memory space - * (on a DRAMless system) we are located. - * For now, we assume a perfect world which means - * we are located at the base of DRAM (physical 0). - */ - -/* - * Search TLB for entry that we are currently using. - * Invalidate all entries but the one we are using. - */ - /* Load our current PID->MMUCR TID and MSR IS->MMUCR STS */ - mfspr r3,SPRN_PID /* Get PID */ - mfmsr r4 /* Get MSR */ - andi. r4,r4,MSR_IS@l /* TS=1? */ - beq wmmucr /* If not, leave STS=0 */ - oris r3,r3,PPC44x_MMUCR_STS@h /* Set STS=1 */ -wmmucr: mtspr SPRN_MMUCR,r3 /* Put MMUCR */ - sync - - bl invstr /* Find our address */ -invstr: mflr r5 /* Make it accessible */ - tlbsx r23,0,r5 /* Find entry we are in */ - li r4,0 /* Start at TLB entry 0 */ - li r3,0 /* Set PAGEID inval value */ -1: cmpw r23,r4 /* Is this our entry? */ - beq skpinv /* If so, skip the inval */ - tlbwe r3,r4,PPC44x_TLB_PAGEID /* If not, inval the entry */ -skpinv: addi r4,r4,1 /* Increment */ - cmpwi r4,64 /* Are we done? */ - bne 1b /* If not, repeat */ - isync /* If so, context change */ - -/* - * Configure and load pinned entry into TLB slot 63. - */ - - lis r3,KERNELBASE@h /* Load the kernel virtual address */ - ori r3,r3,KERNELBASE@l - - /* Kernel is at the base of RAM */ - li r4, 0 /* Load the kernel physical address */ - - /* Load the kernel PID = 0 */ - li r0,0 - mtspr SPRN_PID,r0 - sync - - /* Initialize MMUCR */ - li r5,0 - mtspr SPRN_MMUCR,r5 - sync - - /* pageid fields */ - clrrwi r3,r3,10 /* Mask off the effective page number */ - ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M - - /* xlat fields */ - clrrwi r4,r4,10 /* Mask off the real page number */ - /* ERPN is 0 for first 4GB page */ - - /* attrib fields */ - /* Added guarded bit to protect against speculative loads/stores */ - li r5,0 - ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G) - - li r0,63 /* TLB slot 63 */ - - tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */ - tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */ - tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */ - - /* Force context change */ - mfmsr r0 - mtspr SPRN_SRR1, r0 - lis r0,3f@h - ori r0,r0,3f@l - mtspr SPRN_SRR0,r0 - sync - rfi - - /* If necessary, invalidate original entry we used */ -3: cmpwi r23,63 - beq 4f - li r6,0 - tlbwe r6,r23,PPC44x_TLB_PAGEID - isync - -4: -#ifdef CONFIG_SERIAL_TEXT_DEBUG - /* - * Add temporary UART mapping for early debug. - * We can map UART registers wherever we want as long as they don't - * interfere with other system mappings (e.g. with pinned entries). - * For an example of how we handle this - see ocotea.h. --ebs - */ - /* pageid fields */ - lis r3,UART0_IO_BASE@h - ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K - - /* xlat fields */ - lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */ -#ifdef UART0_PHYS_ERPN - ori r4,r4,UART0_PHYS_ERPN /* Add ERPN if above 4GB */ -#endif - - /* attrib fields */ - li r5,0 - ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G) - - li r0,62 /* TLB slot 62 */ - - tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */ - tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */ - tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */ - - /* Force context change */ - isync -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ - - /* Establish the interrupt vector offsets */ - SET_IVOR(0, CriticalInput); - SET_IVOR(1, MachineCheck); - SET_IVOR(2, DataStorage); - SET_IVOR(3, InstructionStorage); - SET_IVOR(4, ExternalInput); - SET_IVOR(5, Alignment); - SET_IVOR(6, Program); - SET_IVOR(7, FloatingPointUnavailable); - SET_IVOR(8, SystemCall); - SET_IVOR(9, AuxillaryProcessorUnavailable); - SET_IVOR(10, Decrementer); - SET_IVOR(11, FixedIntervalTimer); - SET_IVOR(12, WatchdogTimer); - SET_IVOR(13, DataTLBError); - SET_IVOR(14, InstructionTLBError); - SET_IVOR(15, Debug); - - /* Establish the interrupt vector base */ - lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ - mtspr SPRN_IVPR,r4 - - /* - * This is where the main kernel code starts. - */ - - /* ptr to current */ - lis r2,init_task@h - ori r2,r2,init_task@l - - /* ptr to current thread */ - addi r4,r2,THREAD /* init task's THREAD */ - mtspr SPRN_SPRG3,r4 - - /* stack */ - lis r1,init_thread_union@h - ori r1,r1,init_thread_union@l - li r0,0 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) - - bl early_init - -/* - * Decide what sort of machine this is and initialize the MMU. - */ - mr r3,r31 - mr r4,r30 - mr r5,r29 - mr r6,r28 - mr r7,r27 - bl machine_init - bl MMU_init - - /* Setup PTE pointers for the Abatron bdiGDB */ - lis r6, swapper_pg_dir@h - ori r6, r6, swapper_pg_dir@l - lis r5, abatron_pteptrs@h - ori r5, r5, abatron_pteptrs@l - lis r4, KERNELBASE@h - ori r4, r4, KERNELBASE@l - stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */ - stw r6, 0(r5) - - /* Let's move on */ - lis r4,start_kernel@h - ori r4,r4,start_kernel@l - lis r3,MSR_KERNEL@h - ori r3,r3,MSR_KERNEL@l - mtspr SPRN_SRR0,r4 - mtspr SPRN_SRR1,r3 - rfi /* change context and jump to start_kernel */ - -/* - * Interrupt vector entry code - * - * The Book E MMUs are always on so we don't need to handle - * interrupts in real mode as with previous PPC processors. In - * this case we handle interrupts in the kernel virtual address - * space. - * - * Interrupt vectors are dynamically placed relative to the - * interrupt prefix as determined by the address of interrupt_base. - * The interrupt vectors offsets are programmed using the labels - * for each interrupt vector entry. - * - * Interrupt vectors must be aligned on a 16 byte boundary. - * We align on a 32 byte cache line boundary for good measure. - */ - -interrupt_base: - /* Critical Input Interrupt */ - CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception) - - /* Machine Check Interrupt */ -#ifdef CONFIG_440A - MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception) -#else - CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) -#endif - - /* Data Storage Interrupt */ - START_EXCEPTION(DataStorage) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 - mtspr SPRN_SPRG4W, r12 - mtspr SPRN_SPRG5W, r13 - mfcr r11 - mtspr SPRN_SPRG7W, r11 - - /* - * Check if it was a store fault, if not then bail - * because a user tried to access a kernel or - * read-protected page. Otherwise, get the - * offending address and handle it. - */ - mfspr r10, SPRN_ESR - andis. r10, r10, ESR_ST@h - beq 2f - - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - - mfspr r12,SPRN_MMUCR - rlwinm r12,r12,0,0,23 /* Clear TID */ - - b 4f - - /* Get the PGD for the current thread */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) - - /* Load PID into MMUCR TID */ - mfspr r12,SPRN_MMUCR /* Get MMUCR */ - mfspr r13,SPRN_PID /* Get PID */ - rlwimi r12,r13,0,24,31 /* Set TID */ - -4: - mtspr SPRN_MMUCR,r12 - - rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ - lwzx r11, r12, r11 /* Get pgd/pmd entry */ - rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - - andi. r13, r11, _PAGE_RW /* Is it writeable? */ - beq 2f /* Bail if not */ - - /* Update 'changed'. - */ - ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE - stw r11, 4(r12) /* Update Linux page table */ - - li r13, PPC44x_TLB_SR@l /* Set SR */ - rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */ - rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */ - rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */ - rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */ - rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */ - and r12, r12, r11 /* HWEXEC/RW & USER */ - rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */ - rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */ - - rlwimi r11,r13,0,26,31 /* Insert static perms */ - - rlwinm r11,r11,0,20,15 /* Clear U0-U3 */ - - /* find the TLB index that caused the fault. It has to be here. */ - tlbsx r10, 0, r10 - - tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */ - - /* Done...restore registers and get out of here. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - rfi /* Force context change */ - -2: - /* - * The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b data_access - - /* Instruction Storage Interrupt */ - INSTRUCTION_STORAGE_EXCEPTION - - /* External Input Interrupt */ - EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE) - - /* Alignment Interrupt */ - ALIGNMENT_EXCEPTION - - /* Program Interrupt */ - PROGRAM_EXCEPTION - - /* Floating Point Unavailable Interrupt */ -#ifdef CONFIG_PPC_FPU - FP_UNAVAILABLE_EXCEPTION -#else - EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE) -#endif - - /* System Call Interrupt */ - START_EXCEPTION(SystemCall) - NORMAL_EXCEPTION_PROLOG - EXC_XFER_EE_LITE(0x0c00, DoSyscall) - - /* Auxillary Processor Unavailable Interrupt */ - EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) - - /* Decrementer Interrupt */ - DECREMENTER_EXCEPTION - - /* Fixed Internal Timer Interrupt */ - /* TODO: Add FIT support */ - EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE) - - /* Watchdog Timer Interrupt */ - /* TODO: Add watchdog support */ -#ifdef CONFIG_BOOKE_WDT - CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException) -#else - CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception) -#endif - - /* Data TLB Error Interrupt */ - START_EXCEPTION(DataTLBError) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 - mtspr SPRN_SPRG4W, r12 - mtspr SPRN_SPRG5W, r13 - mfcr r11 - mtspr SPRN_SPRG7W, r11 - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - - mfspr r12,SPRN_MMUCR - rlwinm r12,r12,0,0,23 /* Clear TID */ - - b 4f - - /* Get the PGD for the current thread */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) - - /* Load PID into MMUCR TID */ - mfspr r12,SPRN_MMUCR - mfspr r13,SPRN_PID /* Get PID */ - rlwimi r12,r13,0,24,31 /* Set TID */ - -4: - mtspr SPRN_MMUCR,r12 - - rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ - lwzx r11, r12, r11 /* Get pgd/pmd entry */ - rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ - - ori r11, r11, _PAGE_ACCESSED - stw r11, 4(r12) - - /* Jump to common tlb load */ - b finish_tlb_load - -2: - /* The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b data_access - - /* Instruction TLB Error Interrupt */ - /* - * Nearly the same as above, except we get our - * information from different registers and bailout - * to a different point. - */ - START_EXCEPTION(InstructionTLBError) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 - mtspr SPRN_SPRG4W, r12 - mtspr SPRN_SPRG5W, r13 - mfcr r11 - mtspr SPRN_SPRG7W, r11 - mfspr r10, SPRN_SRR0 /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - - mfspr r12,SPRN_MMUCR - rlwinm r12,r12,0,0,23 /* Clear TID */ - - b 4f - - /* Get the PGD for the current thread */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) - - /* Load PID into MMUCR TID */ - mfspr r12,SPRN_MMUCR - mfspr r13,SPRN_PID /* Get PID */ - rlwimi r12,r13,0,24,31 /* Set TID */ - -4: - mtspr SPRN_MMUCR,r12 - - rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ - lwzx r11, r12, r11 /* Get pgd/pmd entry */ - rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ - lwz r11, 4(r12) /* Get pte entry */ - andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ - beq 2f /* Bail if not present */ - - ori r11, r11, _PAGE_ACCESSED - stw r11, 4(r12) - - /* Jump to common TLB load point */ - b finish_tlb_load - -2: - /* The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b InstructionStorage - - /* Debug Interrupt */ - DEBUG_EXCEPTION - -/* - * Local functions - */ - /* - * Data TLB exceptions will bail out to this point - * if they can't resolve the lightweight TLB fault. - */ -data_access: - NORMAL_EXCEPTION_PROLOG - mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ - stw r5,_ESR(r11) - mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ - EXC_XFER_EE_LITE(0x0300, handle_page_fault) - -/* - - * Both the instruction and data TLB miss get to this - * point to load the TLB. - * r10 - EA of fault - * r11 - available to use - * r12 - Pointer to the 64-bit PTE - * r13 - available to use - * MMUCR - loaded with proper value when we get here - * Upon exit, we reload everything and RFI. - */ -finish_tlb_load: - /* - * We set execute, because we don't have the granularity to - * properly set this at the page level (Linux problem). - * If shared is set, we cause a zero PID->TID load. - * Many of these bits are software only. Bits we don't set - * here we (properly should) assume have the appropriate value. - */ - - /* Load the next available TLB index */ - lis r13, tlb_44x_index@ha - lwz r13, tlb_44x_index@l(r13) - /* Load the TLB high watermark */ - lis r11, tlb_44x_hwater@ha - lwz r11, tlb_44x_hwater@l(r11) - - /* Increment, rollover, and store TLB index */ - addi r13, r13, 1 - cmpw 0, r13, r11 /* reserve entries */ - ble 7f - li r13, 0 -7: - /* Store the next available TLB index */ - lis r11, tlb_44x_index@ha - stw r13, tlb_44x_index@l(r11) - - lwz r11, 0(r12) /* Get MS word of PTE */ - lwz r12, 4(r12) /* Get LS word of PTE */ - rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */ - tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */ - - /* - * Create PAGEID. This is the faulting address, - * page size, and valid flag. - */ - li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K - rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */ - tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */ - - li r10, PPC44x_TLB_SR@l /* Set SR */ - rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */ - rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */ - rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */ - rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */ - and r11, r12, r11 /* HWEXEC & USER */ - rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ - - rlwimi r12, r10, 0, 26, 31 /* Insert static perms */ - rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */ - tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */ - - /* Done...restore registers and get out of here. - */ - mfspr r11, SPRN_SPRG7R - mtcr r11 - mfspr r13, SPRN_SPRG5R - mfspr r12, SPRN_SPRG4R - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - rfi /* Force context change */ - -/* - * Global functions - */ - -/* - * extern void giveup_altivec(struct task_struct *prev) - * - * The 44x core does not have an AltiVec unit. - */ -_GLOBAL(giveup_altivec) - blr - -/* - * extern void giveup_fpu(struct task_struct *prev) - * - * The 44x core does not have an FPU. - */ -#ifndef CONFIG_PPC_FPU -_GLOBAL(giveup_fpu) - blr -#endif - -/* - * extern void abort(void) - * - * At present, this routine just applies a system reset. - */ -_GLOBAL(abort) - mfspr r13,SPRN_DBCR0 - oris r13,r13,DBCR0_RST_SYSTEM@h - mtspr SPRN_DBCR0,r13 - -_GLOBAL(set_context) - -#ifdef CONFIG_BDI_SWITCH - /* Context switch the PTE pointer for the Abatron BDI2000. - * The PGDIR is the second parameter. - */ - lis r5, abatron_pteptrs@h - ori r5, r5, abatron_pteptrs@l - stw r4, 0x4(r5) -#endif - mtspr SPRN_PID,r3 - isync /* Force context change */ - blr - -/* - * We put a few things here that have to be page-aligned. This stuff - * goes at the beginning of the data segment, which is page-aligned. - */ - .data - .align 12 - .globl sdata -sdata: - .globl empty_zero_page -empty_zero_page: - .space 4096 - -/* - * To support >32-bit physical addresses, we use an 8KB pgdir. - */ - .globl swapper_pg_dir -swapper_pg_dir: - .space 8192 - -/* Reserved 4k for the critical exception stack & 4k for the machine - * check stack per CPU for kernel mode exceptions */ - .section .bss - .align 12 -exception_stack_bottom: - .space BOOKE_EXCEPTION_STACK_SIZE - .globl exception_stack_top -exception_stack_top: - -/* - * This space gets a copy of optional info passed to us by the bootstrap - * which is used to pass parameters into the kernel like root=/dev/sda1, etc. - */ - .globl cmd_line -cmd_line: - .space 512 - -/* - * Room for two PTE pointers, usually the kernel and current user pointers - * to their respective root page table. - */ -abatron_pteptrs: - .space 8 diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S deleted file mode 100644 index 51da157a629e436e2b88c6df17c2c44f1637f3dd..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/head_4xx.S +++ /dev/null @@ -1,1021 +0,0 @@ -/* - * Copyright (c) 1995-1996 Gary Thomas - * Initial PowerPC version. - * Copyright (c) 1996 Cort Dougan - * Rewritten for PReP - * Copyright (c) 1996 Paul Mackerras - * Low-level exception handers, MMU support, and rewrite. - * Copyright (c) 1997 Dan Malek - * PowerPC 8xx modifications. - * Copyright (c) 1998-1999 TiVo, Inc. - * PowerPC 403GCX modifications. - * Copyright (c) 1999 Grant Erickson - * PowerPC 403GCX/405GP modifications. - * Copyright 2000 MontaVista Software Inc. - * PPC405 modifications - * PowerPC 403GCX/405GP modifications. - * Author: MontaVista Software, Inc. - * frank_rowand@mvista.com or source@mvista.com - * debbie_chu@mvista.com - * - * - * Module name: head_4xx.S - * - * Description: - * Kernel execution entry point code. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* As with the other PowerPC ports, it is expected that when code - * execution begins here, the following registers contain valid, yet - * optional, information: - * - * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.) - * r4 - Starting address of the init RAM disk - * r5 - Ending address of the init RAM disk - * r6 - Start of kernel command line string (e.g. "mem=96m") - * r7 - End of kernel command line string - * - * This is all going to change RSN when we add bi_recs....... -- Dan - */ - .text -_GLOBAL(_stext) -_GLOBAL(_start) - - /* Save parameters we are passed. - */ - mr r31,r3 - mr r30,r4 - mr r29,r5 - mr r28,r6 - mr r27,r7 - - /* We have to turn on the MMU right away so we get cache modes - * set correctly. - */ - bl initial_mmu - -/* We now have the lower 16 Meg mapped into TLB entries, and the caches - * ready to work. - */ -turn_on_mmu: - lis r0,MSR_KERNEL@h - ori r0,r0,MSR_KERNEL@l - mtspr SPRN_SRR1,r0 - lis r0,start_here@h - ori r0,r0,start_here@l - mtspr SPRN_SRR0,r0 - SYNC - rfi /* enables MMU */ - b . /* prevent prefetch past rfi */ - -/* - * This area is used for temporarily saving registers during the - * critical exception prolog. - */ - . = 0xc0 -crit_save: -_GLOBAL(crit_r10) - .space 4 -_GLOBAL(crit_r11) - .space 4 - -/* - * Exception vector entry code. This code runs with address translation - * turned off (i.e. using physical addresses). We assume SPRG3 has the - * physical address of the current task thread_struct. - * Note that we have to have decremented r1 before we write to any fields - * of the exception frame, since a critical interrupt could occur at any - * time, and it will write to the area immediately below the current r1. - */ -#define NORMAL_EXCEPTION_PROLOG \ - mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ - mtspr SPRN_SPRG1,r11; \ - mtspr SPRN_SPRG2,r1; \ - mfcr r10; /* save CR in r10 for now */\ - mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ - andi. r11,r11,MSR_PR; \ - beq 1f; \ - mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ - lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ - addi r1,r1,THREAD_SIZE; \ -1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ - tophys(r11,r1); \ - stw r10,_CCR(r11); /* save various registers */\ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mfspr r10,SPRN_SPRG0; \ - stw r10,GPR10(r11); \ - mfspr r12,SPRN_SPRG1; \ - stw r12,GPR11(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r10,SPRN_SPRG2; \ - mfspr r12,SPRN_SRR0; \ - stw r10,GPR1(r11); \ - mfspr r9,SPRN_SRR1; \ - stw r10,0(r11); \ - rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - -/* - * Exception prolog for critical exceptions. This is a little different - * from the normal exception prolog above since a critical exception - * can potentially occur at any point during normal exception processing. - * Thus we cannot use the same SPRG registers as the normal prolog above. - * Instead we use a couple of words of memory at low physical addresses. - * This is OK since we don't support SMP on these processors. - */ -#define CRITICAL_EXCEPTION_PROLOG \ - stw r10,crit_r10@l(0); /* save two registers to work with */\ - stw r11,crit_r11@l(0); \ - mfcr r10; /* save CR in r10 for now */\ - mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ - andi. r11,r11,MSR_PR; \ - lis r11,critical_stack_top@h; \ - ori r11,r11,critical_stack_top@l; \ - beq 1f; \ - /* COMING FROM USER MODE */ \ - mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ - lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ - addi r11,r11,THREAD_SIZE; \ -1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ - tophys(r11,r11); \ - stw r10,_CCR(r11); /* save various registers */\ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ - stw r12,_DEAR(r11); /* since they may have had stuff */\ - mfspr r9,SPRN_ESR; /* in them at the point where the */\ - stw r9,_ESR(r11); /* exception was taken */\ - mfspr r12,SPRN_SRR2; \ - stw r1,GPR1(r11); \ - mfspr r9,SPRN_SRR3; \ - stw r1,0(r11); \ - tovirt(r1,r11); \ - rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - - /* - * State at this point: - * r9 saved in stack frame, now saved SRR3 & ~MSR_WE - * r10 saved in crit_r10 and in stack frame, trashed - * r11 saved in crit_r11 and in stack frame, - * now phys stack/exception frame pointer - * r12 saved in stack frame, now saved SRR2 - * CR saved in stack frame, CR0.EQ = !SRR3.PR - * LR, DEAR, ESR in stack frame - * r1 saved in stack frame, now virt stack/excframe pointer - * r0, r3-r8 saved in stack frame - */ - -/* - * Exception vectors. - */ -#define START_EXCEPTION(n, label) \ - . = n; \ -label: - -#define EXCEPTION(n, label, hdlr, xfer) \ - START_EXCEPTION(n, label); \ - NORMAL_EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - xfer(n, hdlr) - -#define CRITICAL_EXCEPTION(n, label, hdlr) \ - START_EXCEPTION(n, label); \ - CRITICAL_EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ - NOCOPY, crit_transfer_to_handler, \ - ret_from_crit_exc) - -#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \ - li r10,trap; \ - stw r10,TRAP(r11); \ - lis r10,msr@h; \ - ori r10,r10,msr@l; \ - copyee(r10, r9); \ - bl tfer; \ - .long hdlr; \ - .long ret - -#define COPY_EE(d, s) rlwimi d,s,0,16,16 -#define NOCOPY(d, s) - -#define EXC_XFER_STD(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \ - ret_from_except) - -#define EXC_XFER_EE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_EE_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \ - ret_from_except) - - -/* - * 0x0100 - Critical Interrupt Exception - */ - CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception) - -/* - * 0x0200 - Machine Check Exception - */ - CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) - -/* - * 0x0300 - Data Storage Exception - * This happens for just a few reasons. U0 set (but we don't do that), - * or zone protection fault (user violation, write to protected page). - * If this is just an update of modified status, we do that quickly - * and exit. Otherwise, we call heavywight functions to do the work. - */ - START_EXCEPTION(0x0300, DataStorage) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 -#ifdef CONFIG_403GCX - stw r12, 0(r0) - stw r9, 4(r0) - mfcr r11 - mfspr r12, SPRN_PID - stw r11, 8(r0) - stw r12, 12(r0) -#else - mtspr SPRN_SPRG4, r12 - mtspr SPRN_SPRG5, r9 - mfcr r11 - mfspr r12, SPRN_PID - mtspr SPRN_SPRG7, r11 - mtspr SPRN_SPRG6, r12 -#endif - - /* First, check if it was a zone fault (which means a user - * tried to access a kernel or read-protected page - always - * a SEGV). All other faults here must be stores, so no - * need to check ESR_DST as well. */ - mfspr r10, SPRN_ESR - andis. r10, r10, ESR_DIZ@h - bne 2f - - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - li r9, 0 - mtspr SPRN_PID, r9 /* TLB will have 0 TID */ - b 4f - - /* Get the PGD for the current thread. - */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) -4: - tophys(r11, r11) - rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */ - lwz r11, 0(r11) /* Get L1 entry */ - rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */ - lwz r11, 0(r12) /* Get Linux PTE */ - - andi. r9, r11, _PAGE_RW /* Is it writeable? */ - beq 2f /* Bail if not */ - - /* Update 'changed'. - */ - ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE - stw r11, 0(r12) /* Update Linux page table */ - - /* Most of the Linux PTE is ready to load into the TLB LO. - * We set ZSEL, where only the LS-bit determines user access. - * We set execute, because we don't have the granularity to - * properly set this at the page level (Linux problem). - * If shared is set, we cause a zero PID->TID load. - * Many of these bits are software only. Bits we don't set - * here we (properly should) assume have the appropriate value. - */ - li r12, 0x0ce2 - andc r11, r11, r12 /* Make sure 20, 21 are zero */ - - /* find the TLB index that caused the fault. It has to be here. - */ - tlbsx r9, 0, r10 - - tlbwe r11, r9, TLB_DATA /* Load TLB LO */ - - /* Done...restore registers and get out of here. - */ -#ifdef CONFIG_403GCX - lwz r12, 12(r0) - lwz r11, 8(r0) - mtspr SPRN_PID, r12 - mtcr r11 - lwz r9, 4(r0) - lwz r12, 0(r0) -#else - mfspr r12, SPRN_SPRG6 - mfspr r11, SPRN_SPRG7 - mtspr SPRN_PID, r12 - mtcr r11 - mfspr r9, SPRN_SPRG5 - mfspr r12, SPRN_SPRG4 -#endif - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - PPC405_ERR77_SYNC - rfi /* Should sync shadow TLBs */ - b . /* prevent prefetch past rfi */ - -2: - /* The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ -#ifdef CONFIG_403GCX - lwz r12, 12(r0) - lwz r11, 8(r0) - mtspr SPRN_PID, r12 - mtcr r11 - lwz r9, 4(r0) - lwz r12, 0(r0) -#else - mfspr r12, SPRN_SPRG6 - mfspr r11, SPRN_SPRG7 - mtspr SPRN_PID, r12 - mtcr r11 - mfspr r9, SPRN_SPRG5 - mfspr r12, SPRN_SPRG4 -#endif - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b DataAccess - -/* - * 0x0400 - Instruction Storage Exception - * This is caused by a fetch from non-execute or guarded pages. - */ - START_EXCEPTION(0x0400, InstructionAccess) - NORMAL_EXCEPTION_PROLOG - mr r4,r12 /* Pass SRR0 as arg2 */ - li r5,0 /* Pass zero as arg3 */ - EXC_XFER_EE_LITE(0x400, handle_page_fault) - -/* 0x0500 - External Interrupt Exception */ - EXCEPTION(0x0500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE) - -/* 0x0600 - Alignment Exception */ - START_EXCEPTION(0x0600, Alignment) - NORMAL_EXCEPTION_PROLOG - mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */ - stw r4,_DEAR(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, alignment_exception) - -/* 0x0700 - Program Exception */ - START_EXCEPTION(0x0700, ProgramCheck) - NORMAL_EXCEPTION_PROLOG - mfspr r4,SPRN_ESR /* Grab the ESR and save it */ - stw r4,_ESR(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x700, program_check_exception) - - EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE) - -/* 0x0C00 - System Call Exception */ - START_EXCEPTION(0x0C00, SystemCall) - NORMAL_EXCEPTION_PROLOG - EXC_XFER_EE_LITE(0xc00, DoSyscall) - - EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE) - -/* 0x1000 - Programmable Interval Timer (PIT) Exception */ - START_EXCEPTION(0x1000, Decrementer) - NORMAL_EXCEPTION_PROLOG - lis r0,TSR_PIS@h - mtspr SPRN_TSR,r0 /* Clear the PIT exception */ - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_LITE(0x1000, timer_interrupt) - -#if 0 -/* NOTE: - * FIT and WDT handlers are not implemented yet. - */ - -/* 0x1010 - Fixed Interval Timer (FIT) Exception -*/ - STND_EXCEPTION(0x1010, FITException, unknown_exception) - -/* 0x1020 - Watchdog Timer (WDT) Exception -*/ -#ifdef CONFIG_BOOKE_WDT - CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException) -#else - CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception) -#endif -#endif - -/* 0x1100 - Data TLB Miss Exception - * As the name implies, translation is not in the MMU, so search the - * page tables and fix it. The only purpose of this function is to - * load TLB entries from the page table if they exist. - */ - START_EXCEPTION(0x1100, DTLBMiss) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 -#ifdef CONFIG_403GCX - stw r12, 0(r0) - stw r9, 4(r0) - mfcr r11 - mfspr r12, SPRN_PID - stw r11, 8(r0) - stw r12, 12(r0) -#else - mtspr SPRN_SPRG4, r12 - mtspr SPRN_SPRG5, r9 - mfcr r11 - mfspr r12, SPRN_PID - mtspr SPRN_SPRG7, r11 - mtspr SPRN_SPRG6, r12 -#endif - mfspr r10, SPRN_DEAR /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - li r9, 0 - mtspr SPRN_PID, r9 /* TLB will have 0 TID */ - b 4f - - /* Get the PGD for the current thread. - */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) -4: - tophys(r11, r11) - rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */ - lwz r12, 0(r11) /* Get L1 entry */ - andi. r9, r12, _PMD_PRESENT /* Check if it points to a PTE page */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */ - lwz r11, 0(r12) /* Get Linux PTE */ - andi. r9, r11, _PAGE_PRESENT - beq 5f - - ori r11, r11, _PAGE_ACCESSED - stw r11, 0(r12) - - /* Create TLB tag. This is the faulting address plus a static - * set of bits. These are size, valid, E, U0. - */ - li r12, 0x00c0 - rlwimi r10, r12, 0, 20, 31 - - b finish_tlb_load - -2: /* Check for possible large-page pmd entry */ - rlwinm. r9, r12, 2, 22, 24 - beq 5f - - /* Create TLB tag. This is the faulting address, plus a static - * set of bits (valid, E, U0) plus the size from the PMD. - */ - ori r9, r9, 0x40 - rlwimi r10, r9, 0, 20, 31 - mr r11, r12 - - b finish_tlb_load - -5: - /* The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ -#ifdef CONFIG_403GCX - lwz r12, 12(r0) - lwz r11, 8(r0) - mtspr SPRN_PID, r12 - mtcr r11 - lwz r9, 4(r0) - lwz r12, 0(r0) -#else - mfspr r12, SPRN_SPRG6 - mfspr r11, SPRN_SPRG7 - mtspr SPRN_PID, r12 - mtcr r11 - mfspr r9, SPRN_SPRG5 - mfspr r12, SPRN_SPRG4 -#endif - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b DataAccess - -/* 0x1200 - Instruction TLB Miss Exception - * Nearly the same as above, except we get our information from different - * registers and bailout to a different point. - */ - START_EXCEPTION(0x1200, ITLBMiss) - mtspr SPRN_SPRG0, r10 /* Save some working registers */ - mtspr SPRN_SPRG1, r11 -#ifdef CONFIG_403GCX - stw r12, 0(r0) - stw r9, 4(r0) - mfcr r11 - mfspr r12, SPRN_PID - stw r11, 8(r0) - stw r12, 12(r0) -#else - mtspr SPRN_SPRG4, r12 - mtspr SPRN_SPRG5, r9 - mfcr r11 - mfspr r12, SPRN_PID - mtspr SPRN_SPRG7, r11 - mtspr SPRN_SPRG6, r12 -#endif - mfspr r10, SPRN_SRR0 /* Get faulting address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - lis r11, TASK_SIZE@h - cmplw r10, r11 - blt+ 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - li r9, 0 - mtspr SPRN_PID, r9 /* TLB will have 0 TID */ - b 4f - - /* Get the PGD for the current thread. - */ -3: - mfspr r11,SPRN_SPRG3 - lwz r11,PGDIR(r11) -4: - tophys(r11, r11) - rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */ - lwz r12, 0(r11) /* Get L1 entry */ - andi. r9, r12, _PMD_PRESENT /* Check if it points to a PTE page */ - beq 2f /* Bail if no table */ - - rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */ - lwz r11, 0(r12) /* Get Linux PTE */ - andi. r9, r11, _PAGE_PRESENT - beq 5f - - ori r11, r11, _PAGE_ACCESSED - stw r11, 0(r12) - - /* Create TLB tag. This is the faulting address plus a static - * set of bits. These are size, valid, E, U0. - */ - li r12, 0x00c0 - rlwimi r10, r12, 0, 20, 31 - - b finish_tlb_load - -2: /* Check for possible large-page pmd entry */ - rlwinm. r9, r12, 2, 22, 24 - beq 5f - - /* Create TLB tag. This is the faulting address, plus a static - * set of bits (valid, E, U0) plus the size from the PMD. - */ - ori r9, r9, 0x40 - rlwimi r10, r9, 0, 20, 31 - mr r11, r12 - - b finish_tlb_load - -5: - /* The bailout. Restore registers to pre-exception conditions - * and call the heavyweights to help us out. - */ -#ifdef CONFIG_403GCX - lwz r12, 12(r0) - lwz r11, 8(r0) - mtspr SPRN_PID, r12 - mtcr r11 - lwz r9, 4(r0) - lwz r12, 0(r0) -#else - mfspr r12, SPRN_SPRG6 - mfspr r11, SPRN_SPRG7 - mtspr SPRN_PID, r12 - mtcr r11 - mfspr r9, SPRN_SPRG5 - mfspr r12, SPRN_SPRG4 -#endif - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - b InstructionAccess - - EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) -#ifdef CONFIG_IBM405_ERR51 - /* 405GP errata 51 */ - START_EXCEPTION(0x1700, Trap_17) - b DTLBMiss -#else - EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE) -#endif - EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE) - -/* Check for a single step debug exception while in an exception - * handler before state has been saved. This is to catch the case - * where an instruction that we are trying to single step causes - * an exception (eg ITLB/DTLB miss) and thus the first instruction of - * the exception handler generates a single step debug exception. - * - * If we get a debug trap on the first instruction of an exception handler, - * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is - * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR). - * The exception handler was handling a non-critical interrupt, so it will - * save (and later restore) the MSR via SPRN_SRR1, which will still have - * the MSR_DE bit set. - */ - /* 0x2000 - Debug Exception */ - START_EXCEPTION(0x2000, DebugTrap) - CRITICAL_EXCEPTION_PROLOG - - /* - * If this is a single step or branch-taken exception in an - * exception entry sequence, it was probably meant to apply to - * the code where the exception occurred (since exception entry - * doesn't turn off DE automatically). We simulate the effect - * of turning off DE on entry to an exception handler by turning - * off DE in the SRR3 value and clearing the debug status. - */ - mfspr r10,SPRN_DBSR /* check single-step/branch taken */ - andis. r10,r10,DBSR_IC@h - beq+ 2f - - andi. r10,r9,MSR_IR|MSR_PR /* check supervisor + MMU off */ - beq 1f /* branch and fix it up */ - - mfspr r10,SPRN_SRR2 /* Faulting instruction address */ - cmplwi r10,0x2100 - bgt+ 2f /* address above exception vectors */ - - /* here it looks like we got an inappropriate debug exception. */ -1: rlwinm r9,r9,0,~MSR_DE /* clear DE in the SRR3 value */ - lis r10,DBSR_IC@h /* clear the IC event */ - mtspr SPRN_DBSR,r10 - /* restore state and get out */ - lwz r10,_CCR(r11) - lwz r0,GPR0(r11) - lwz r1,GPR1(r11) - mtcrf 0x80,r10 - mtspr SPRN_SRR2,r12 - mtspr SPRN_SRR3,r9 - lwz r9,GPR9(r11) - lwz r12,GPR12(r11) - lwz r10,crit_r10@l(0) - lwz r11,crit_r11@l(0) - PPC405_ERR77_SYNC - rfci - b . - - /* continue normal handling for a critical exception... */ -2: mfspr r4,SPRN_DBSR - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_TEMPLATE(DebugException, 0x2002, \ - (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ - NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) - -/* - * The other Data TLB exceptions bail out to this point - * if they can't resolve the lightweight TLB fault. - */ -DataAccess: - NORMAL_EXCEPTION_PROLOG - mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ - stw r5,_ESR(r11) - mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ - EXC_XFER_EE_LITE(0x300, handle_page_fault) - -/* Other PowerPC processors, namely those derived from the 6xx-series - * have vectors from 0x2100 through 0x2F00 defined, but marked as reserved. - * However, for the 4xx-series processors these are neither defined nor - * reserved. - */ - - /* Damn, I came up one instruction too many to fit into the - * exception space :-). Both the instruction and data TLB - * miss get to this point to load the TLB. - * r10 - TLB_TAG value - * r11 - Linux PTE - * r12, r9 - avilable to use - * PID - loaded with proper value when we get here - * Upon exit, we reload everything and RFI. - * Actually, it will fit now, but oh well.....a common place - * to load the TLB. - */ -tlb_4xx_index: - .long 0 -finish_tlb_load: - /* load the next available TLB index. - */ - lwz r9, tlb_4xx_index@l(0) - addi r9, r9, 1 - andi. r9, r9, (PPC4XX_TLB_SIZE-1) - stw r9, tlb_4xx_index@l(0) - -6: - /* - * Clear out the software-only bits in the PTE to generate the - * TLB_DATA value. These are the bottom 2 bits of the RPM, the - * top 3 bits of the zone field, and M. - */ - li r12, 0x0ce2 - andc r11, r11, r12 - - tlbwe r11, r9, TLB_DATA /* Load TLB LO */ - tlbwe r10, r9, TLB_TAG /* Load TLB HI */ - - /* Done...restore registers and get out of here. - */ -#ifdef CONFIG_403GCX - lwz r12, 12(r0) - lwz r11, 8(r0) - mtspr SPRN_PID, r12 - mtcr r11 - lwz r9, 4(r0) - lwz r12, 0(r0) -#else - mfspr r12, SPRN_SPRG6 - mfspr r11, SPRN_SPRG7 - mtspr SPRN_PID, r12 - mtcr r11 - mfspr r9, SPRN_SPRG5 - mfspr r12, SPRN_SPRG4 -#endif - mfspr r11, SPRN_SPRG1 - mfspr r10, SPRN_SPRG0 - PPC405_ERR77_SYNC - rfi /* Should sync shadow TLBs */ - b . /* prevent prefetch past rfi */ - -/* extern void giveup_fpu(struct task_struct *prev) - * - * The PowerPC 4xx family of processors do not have an FPU, so this just - * returns. - */ -_GLOBAL(giveup_fpu) - blr - -/* This is where the main kernel code starts. - */ -start_here: - - /* ptr to current */ - lis r2,init_task@h - ori r2,r2,init_task@l - - /* ptr to phys current thread */ - tophys(r4,r2) - addi r4,r4,THREAD /* init task's THREAD */ - mtspr SPRN_SPRG3,r4 - - /* stack */ - lis r1,init_thread_union@ha - addi r1,r1,init_thread_union@l - li r0,0 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) - - bl early_init /* We have to do this with MMU on */ - -/* - * Decide what sort of machine this is and initialize the MMU. - */ - mr r3,r31 - mr r4,r30 - mr r5,r29 - mr r6,r28 - mr r7,r27 - bl machine_init - bl MMU_init - -/* Go back to running unmapped so we can load up new values - * and change to using our exception vectors. - * On the 4xx, all we have to do is invalidate the TLB to clear - * the old 16M byte TLB mappings. - */ - lis r4,2f@h - ori r4,r4,2f@l - tophys(r4,r4) - lis r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h - ori r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l - mtspr SPRN_SRR0,r4 - mtspr SPRN_SRR1,r3 - rfi - b . /* prevent prefetch past rfi */ - -/* Load up the kernel context */ -2: - sync /* Flush to memory before changing TLB */ - tlbia - isync /* Flush shadow TLBs */ - - /* set up the PTE pointers for the Abatron bdiGDB. - */ - lis r6, swapper_pg_dir@h - ori r6, r6, swapper_pg_dir@l - lis r5, abatron_pteptrs@h - ori r5, r5, abatron_pteptrs@l - stw r5, 0xf0(r0) /* Must match your Abatron config file */ - tophys(r5,r5) - stw r6, 0(r5) - -/* Now turn on the MMU for real! */ - lis r4,MSR_KERNEL@h - ori r4,r4,MSR_KERNEL@l - lis r3,start_kernel@h - ori r3,r3,start_kernel@l - mtspr SPRN_SRR0,r3 - mtspr SPRN_SRR1,r4 - rfi /* enable MMU and jump to start_kernel */ - b . /* prevent prefetch past rfi */ - -/* Set up the initial MMU state so we can do the first level of - * kernel initialization. This maps the first 16 MBytes of memory 1:1 - * virtual to physical and more importantly sets the cache mode. - */ -initial_mmu: - tlbia /* Invalidate all TLB entries */ - isync - - /* We should still be executing code at physical address 0x0000xxxx - * at this point. However, start_here is at virtual address - * 0xC000xxxx. So, set up a TLB mapping to cover this once - * translation is enabled. - */ - - lis r3,KERNELBASE@h /* Load the kernel virtual address */ - ori r3,r3,KERNELBASE@l - tophys(r4,r3) /* Load the kernel physical address */ - - iccci r0,r3 /* Invalidate the i-cache before use */ - - /* Load the kernel PID. - */ - li r0,0 - mtspr SPRN_PID,r0 - sync - - /* Configure and load two entries into TLB slots 62 and 63. - * In case we are pinning TLBs, these are reserved in by the - * other TLB functions. If not reserving, then it doesn't - * matter where they are loaded. - */ - clrrwi r4,r4,10 /* Mask off the real page number */ - ori r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */ - - clrrwi r3,r3,10 /* Mask off the effective page number */ - ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M)) - - li r0,63 /* TLB slot 63 */ - - tlbwe r4,r0,TLB_DATA /* Load the data portion of the entry */ - tlbwe r3,r0,TLB_TAG /* Load the tag portion of the entry */ - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(SERIAL_DEBUG_IO_BASE) - - /* Load a TLB entry for the UART, so that ppc4xx_progress() can use - * the UARTs nice and early. We use a 4k real==virtual mapping. */ - - lis r3,SERIAL_DEBUG_IO_BASE@h - ori r3,r3,SERIAL_DEBUG_IO_BASE@l - mr r4,r3 - clrrwi r4,r4,12 - ori r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G) - - clrrwi r3,r3,12 - ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K)) - - li r0,0 /* TLB slot 0 */ - tlbwe r4,r0,TLB_DATA - tlbwe r3,r0,TLB_TAG -#endif /* CONFIG_SERIAL_DEBUG_TEXT && SERIAL_DEBUG_IO_BASE */ - - isync - - /* Establish the exception vector base - */ - lis r4,KERNELBASE@h /* EVPR only uses the high 16-bits */ - tophys(r0,r4) /* Use the physical address */ - mtspr SPRN_EVPR,r0 - - blr - -_GLOBAL(abort) - mfspr r13,SPRN_DBCR0 - oris r13,r13,DBCR0_RST_SYSTEM@h - mtspr SPRN_DBCR0,r13 - -_GLOBAL(set_context) - -#ifdef CONFIG_BDI_SWITCH - /* Context switch the PTE pointer for the Abatron BDI2000. - * The PGDIR is the second parameter. - */ - lis r5, KERNELBASE@h - lwz r5, 0xf0(r5) - stw r4, 0x4(r5) -#endif - sync - mtspr SPRN_PID,r3 - isync /* Need an isync to flush shadow */ - /* TLBs after changing PID */ - blr - -/* We put a few things here that have to be page-aligned. This stuff - * goes at the beginning of the data segment, which is page-aligned. - */ - .data - .align 12 - .globl sdata -sdata: - .globl empty_zero_page -empty_zero_page: - .space 4096 - .globl swapper_pg_dir -swapper_pg_dir: - .space 4096 - - -/* Stack for handling critical exceptions from kernel mode */ - .section .bss - .align 12 -exception_stack_bottom: - .space 4096 -critical_stack_top: - .globl exception_stack_top -exception_stack_top: - -/* This space gets a copy of optional info passed to us by the bootstrap - * which is used to pass parameters into the kernel like root=/dev/sda1, etc. - */ - .globl cmd_line -cmd_line: - .space 512 - -/* Room for two PTE pointers, usually the kernel and current user pointers - * to their respective root page table. - */ -abatron_pteptrs: - .space 8 diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S deleted file mode 100644 index 321bda2de2cb8a40ab0600bb75da4676556edda3..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/head_8xx.S +++ /dev/null @@ -1,959 +0,0 @@ -/* - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP - * Copyright (C) 1996 Cort Dougan - * Low-level exception handlers and MMU support - * rewritten by Paul Mackerras. - * Copyright (C) 1996 Paul Mackerras. - * MPC8xx modifications by Dan Malek - * Copyright (C) 1997 Dan Malek (dmalek@jlc.net). - * - * This file contains low-level support and setup for PowerPC 8xx - * embedded processors, including trap and interrupt dispatch. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* Macro to make the code more readable. */ -#ifdef CONFIG_8xx_CPU6 -#define DO_8xx_CPU6(val, reg) \ - li reg, val; \ - stw reg, 12(r0); \ - lwz reg, 12(r0); -#else -#define DO_8xx_CPU6(val, reg) -#endif - .text - .globl _stext -_stext: - .text - .globl _start -_start: - -/* MPC8xx - * This port was done on an MBX board with an 860. Right now I only - * support an ELF compressed (zImage) boot from EPPC-Bug because the - * code there loads up some registers before calling us: - * r3: ptr to board info data - * r4: initrd_start or if no initrd then 0 - * r5: initrd_end - unused if r4 is 0 - * r6: Start of command line string - * r7: End of command line string - * - * I decided to use conditional compilation instead of checking PVR and - * adding more processor specific branches around code I don't need. - * Since this is an embedded processor, I also appreciate any memory - * savings I can get. - * - * The MPC8xx does not have any BATs, but it supports large page sizes. - * We first initialize the MMU to support 8M byte pages, then load one - * entry into each of the instruction and data TLBs to map the first - * 8M 1:1. I also mapped an additional I/O space 1:1 so we can get to - * the "internal" processor registers before MMU_init is called. - * - * The TLB code currently contains a major hack. Since I use the condition - * code register, I have to save and restore it. I am out of registers, so - * I just store it in memory location 0 (the TLB handlers are not reentrant). - * To avoid making any decisions, I need to use the "segment" valid bit - * in the first level table, but that would require many changes to the - * Linux page directory/table functions that I don't want to do right now. - * - * I used to use SPRG2 for a temporary register in the TLB handler, but it - * has since been put to other uses. I now use a hack to save a register - * and the CCR at memory location 0.....Someday I'll fix this..... - * -- Dan - */ - .globl __start -__start: - mr r31,r3 /* save parameters */ - mr r30,r4 - mr r29,r5 - mr r28,r6 - mr r27,r7 - - /* We have to turn on the MMU right away so we get cache modes - * set correctly. - */ - bl initial_mmu - -/* We now have the lower 8 Meg mapped into TLB entries, and the caches - * ready to work. - */ - -turn_on_mmu: - mfmsr r0 - ori r0,r0,MSR_DR|MSR_IR - mtspr SPRN_SRR1,r0 - lis r0,start_here@h - ori r0,r0,start_here@l - mtspr SPRN_SRR0,r0 - SYNC - rfi /* enables MMU */ - -/* - * Exception entry code. This code runs with address translation - * turned off, i.e. using physical addresses. - * We assume sprg3 has the physical address of the current - * task's thread_struct. - */ -#define EXCEPTION_PROLOG \ - mtspr SPRN_SPRG0,r10; \ - mtspr SPRN_SPRG1,r11; \ - mfcr r10; \ - EXCEPTION_PROLOG_1; \ - EXCEPTION_PROLOG_2 - -#define EXCEPTION_PROLOG_1 \ - mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \ - andi. r11,r11,MSR_PR; \ - tophys(r11,r1); /* use tophys(r1) if kernel */ \ - beq 1f; \ - mfspr r11,SPRN_SPRG3; \ - lwz r11,THREAD_INFO-THREAD(r11); \ - addi r11,r11,THREAD_SIZE; \ - tophys(r11,r11); \ -1: subi r11,r11,INT_FRAME_SIZE /* alloc exc. frame */ - - -#define EXCEPTION_PROLOG_2 \ - CLR_TOP32(r11); \ - stw r10,_CCR(r11); /* save registers */ \ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mfspr r10,SPRN_SPRG0; \ - stw r10,GPR10(r11); \ - mfspr r12,SPRN_SPRG1; \ - stw r12,GPR11(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r12,SPRN_SRR0; \ - mfspr r9,SPRN_SRR1; \ - stw r1,GPR1(r11); \ - stw r1,0(r11); \ - tovirt(r1,r11); /* set new kernel sp */ \ - li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \ - MTMSRD(r10); /* (except for mach check in rtas) */ \ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - -/* - * Note: code which follows this uses cr0.eq (set if from kernel), - * r11, r12 (SRR0), and r9 (SRR1). - * - * Note2: once we have set r1 we are in a position to take exceptions - * again, and we could thus set MSR:RI at that point. - */ - -/* - * Exception vectors. - */ -#define EXCEPTION(n, label, hdlr, xfer) \ - . = n; \ -label: \ - EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - xfer(n, hdlr) - -#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret) \ - li r10,trap; \ - stw r10,TRAP(r11); \ - li r10,MSR_KERNEL; \ - copyee(r10, r9); \ - bl tfer; \ -i##n: \ - .long hdlr; \ - .long ret - -#define COPY_EE(d, s) rlwimi d,s,0,16,16 -#define NOCOPY(d, s) - -#define EXC_XFER_STD(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \ - ret_from_except) - -#define EXC_XFER_EE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_EE_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \ - ret_from_except) - -/* System reset */ - EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD) - -/* Machine check */ - . = 0x200 -MachineCheck: - EXCEPTION_PROLOG - mfspr r4,SPRN_DAR - stw r4,_DAR(r11) - mfspr r5,SPRN_DSISR - stw r5,_DSISR(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x200, machine_check_exception) - -/* Data access exception. - * This is "never generated" by the MPC8xx. We jump to it for other - * translation errors. - */ - . = 0x300 -DataAccess: - EXCEPTION_PROLOG - mfspr r10,SPRN_DSISR - stw r10,_DSISR(r11) - mr r5,r10 - mfspr r4,SPRN_DAR - EXC_XFER_EE_LITE(0x300, handle_page_fault) - -/* Instruction access exception. - * This is "never generated" by the MPC8xx. We jump to it for other - * translation errors. - */ - . = 0x400 -InstructionAccess: - EXCEPTION_PROLOG - mr r4,r12 - mr r5,r9 - EXC_XFER_EE_LITE(0x400, handle_page_fault) - -/* External interrupt */ - EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE) - -/* Alignment exception */ - . = 0x600 -Alignment: - EXCEPTION_PROLOG - mfspr r4,SPRN_DAR - stw r4,_DAR(r11) - mfspr r5,SPRN_DSISR - stw r5,_DSISR(r11) - addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, alignment_exception) - -/* Program check exception */ - EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD) - -/* No FPU on MPC8xx. This exception is not supposed to happen. -*/ - EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD) - -/* Decrementer */ - EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) - - EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE) - EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE) - -/* System call */ - . = 0xc00 -SystemCall: - EXCEPTION_PROLOG - EXC_XFER_EE_LITE(0xc00, DoSyscall) - -/* Single step - not used on 601 */ - EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD) - EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE) - EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE) - -/* On the MPC8xx, this is a software emulation interrupt. It occurs - * for all unimplemented and illegal instructions. - */ - EXCEPTION(0x1000, SoftEmu, SoftwareEmulation, EXC_XFER_STD) - - . = 0x1100 -/* - * For the MPC8xx, this is a software tablewalk to load the instruction - * TLB. It is modelled after the example in the Motorola manual. The task - * switch loads the M_TWB register with the pointer to the first level table. - * If we discover there is no second level table (value is zero) or if there - * is an invalid pte, we load that into the TLB, which causes another fault - * into the TLB Error interrupt where we can handle such problems. - * We have to use the MD_xxx registers for the tablewalk because the - * equivalent MI_xxx registers only perform the attribute functions. - */ -InstructionTLBMiss: -#ifdef CONFIG_8xx_CPU6 - stw r3, 8(r0) -#endif - DO_8xx_CPU6(0x3f80, r3) - mtspr SPRN_M_TW, r10 /* Save a couple of working registers */ - mfcr r10 - stw r10, 0(r0) - stw r11, 4(r0) - mfspr r10, SPRN_SRR0 /* Get effective address of fault */ - DO_8xx_CPU6(0x3780, r3) - mtspr SPRN_MD_EPN, r10 /* Have to use MD_EPN for walk, MI_EPN can't */ - mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - andi. r11, r10, 0x0800 /* Address >= 0x80000000 */ - beq 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - rlwimi r10, r11, 0, 2, 19 -3: - lwz r11, 0(r10) /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 2f /* If zero, don't try to find a pte */ - - /* We have a pte table, so load the MI_TWC with the attributes - * for this "segment." - */ - ori r11,r11,1 /* Set valid bit */ - DO_8xx_CPU6(0x2b80, r3) - mtspr SPRN_MI_TWC, r11 /* Set segment attributes */ - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ - mfspr r11, SPRN_MD_TWC /* ....and get the pte address */ - lwz r10, 0(r11) /* Get the pte */ - -#ifdef CONFIG_SWAP - /* do not set the _PAGE_ACCESSED bit of a non-present page */ - andi. r11, r10, _PAGE_PRESENT - beq 4f - ori r10, r10, _PAGE_ACCESSED - mfspr r11, SPRN_MD_TWC /* get the pte address again */ - stw r10, 0(r11) -4: -#else - ori r10, r10, _PAGE_ACCESSED - stw r10, 0(r11) -#endif - - /* The Linux PTE won't go exactly into the MMU TLB. - * Software indicator bits 21, 22 and 28 must be clear. - * Software indicator bits 24, 25, 26, and 27 must be - * set. All other Linux PTE bits control the behavior - * of the MMU. - */ -2: li r11, 0x00f0 - rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ - DO_8xx_CPU6(0x2d80, r3) - mtspr SPRN_MI_RPN, r10 /* Update TLB entry */ - - mfspr r10, SPRN_M_TW /* Restore registers */ - lwz r11, 0(r0) - mtcr r11 - lwz r11, 4(r0) -#ifdef CONFIG_8xx_CPU6 - lwz r3, 8(r0) -#endif - rfi - - . = 0x1200 -DataStoreTLBMiss: - stw r3, 8(r0) - DO_8xx_CPU6(0x3f80, r3) - mtspr SPRN_M_TW, r10 /* Save a couple of working registers */ - mfcr r10 - stw r10, 0(r0) - stw r11, 4(r0) - mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - andi. r11, r10, 0x0800 - beq 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - rlwimi r10, r11, 0, 2, 19 - stw r12, 16(r0) - b LoadLargeDTLB -3: - lwz r11, 0(r10) /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 2f /* If zero, don't try to find a pte */ - - /* We have a pte table, so load fetch the pte from the table. - */ - ori r11, r11, 1 /* Set valid bit in physical L2 page */ - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ - mfspr r10, SPRN_MD_TWC /* ....and get the pte address */ - lwz r10, 0(r10) /* Get the pte */ - - /* Insert the Guarded flag into the TWC from the Linux PTE. - * It is bit 27 of both the Linux PTE and the TWC (at least - * I got that right :-). It will be better when we can put - * this into the Linux pgd/pmd and load it in the operation - * above. - */ - rlwimi r11, r10, 0, 27, 27 - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 - -#ifdef CONFIG_SWAP - /* do not set the _PAGE_ACCESSED bit of a non-present page */ - andi. r11, r10, _PAGE_PRESENT - beq 4f - ori r10, r10, _PAGE_ACCESSED -4: - /* and update pte in table */ -#else - ori r10, r10, _PAGE_ACCESSED -#endif - mfspr r11, SPRN_MD_TWC /* get the pte address again */ - stw r10, 0(r11) - - /* The Linux PTE won't go exactly into the MMU TLB. - * Software indicator bits 21, 22 and 28 must be clear. - * Software indicator bits 24, 25, 26, and 27 must be - * set. All other Linux PTE bits control the behavior - * of the MMU. - */ -2: li r11, 0x00f0 - rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ - DO_8xx_CPU6(0x3d80, r3) - mtspr SPRN_MD_RPN, r10 /* Update TLB entry */ - - mfspr r10, SPRN_M_TW /* Restore registers */ - lwz r11, 0(r0) - mtcr r11 - lwz r11, 4(r0) - lwz r3, 8(r0) - rfi - -/* This is an instruction TLB error on the MPC8xx. This could be due - * to many reasons, such as executing guarded memory or illegal instruction - * addresses. There is nothing to do but handle a big time error fault. - */ - . = 0x1300 -InstructionTLBError: - b InstructionAccess - -LoadLargeDTLB: - li r12, 0 - lwz r11, 0(r10) /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 3f /* If zero, don't try to find a pte */ - - /* We have a pte table, so load fetch the pte from the table. - */ - ori r11, r11, 1 /* Set valid bit in physical L2 page */ - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ - mfspr r10, SPRN_MD_TWC /* ....and get the pte address */ - lwz r10, 0(r10) /* Get the pte */ - - /* Insert the Guarded flag into the TWC from the Linux PTE. - * It is bit 27 of both the Linux PTE and the TWC (at least - * I got that right :-). It will be better when we can put - * this into the Linux pgd/pmd and load it in the operation - * above. - */ - rlwimi r11, r10, 0, 27, 27 - - rlwimi r12, r10, 0, 0, 9 /* extract phys. addr */ - mfspr r3, SPRN_MD_EPN - rlwinm r3, r3, 0, 0, 9 /* extract virtual address */ - tophys(r3, r3) - cmpw r3, r12 /* only use 8M page if it is a direct - kernel mapping */ - bne 1f - ori r11, r11, MD_PS8MEG - li r12, 1 - b 2f -1: - li r12, 0 /* can't use 8MB TLB, so zero r12. */ -2: - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 - - /* The Linux PTE won't go exactly into the MMU TLB. - * Software indicator bits 21, 22 and 28 must be clear. - * Software indicator bits 24, 25, 26, and 27 must be - * set. All other Linux PTE bits control the behavior - * of the MMU. - */ -3: li r11, 0x00f0 - rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ - cmpwi r12, 1 - bne 4f - ori r10, r10, 0x8 - - mfspr r12, SPRN_MD_EPN - lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */ - ori r3, r3, 0x0fff - and r12, r3, r12 - DO_8xx_CPU6(0x3780, r3) - mtspr SPRN_MD_EPN, r12 - - lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */ - ori r3, r3, 0x0fff - and r10, r3, r10 -4: - DO_8xx_CPU6(0x3d80, r3) - mtspr SPRN_MD_RPN, r10 /* Update TLB entry */ - - mfspr r10, SPRN_M_TW /* Restore registers */ - lwz r11, 0(r0) - mtcr r11 - lwz r11, 4(r0) - - lwz r12, 16(r0) - lwz r3, 8(r0) - rfi - -/* This is the data TLB error on the MPC8xx. This could be due to - * many reasons, including a dirty update to a pte. We can catch that - * one here, but anything else is an error. First, we track down the - * Linux pte. If it is valid, write access is allowed, but the - * page dirty bit is not set, we will set it and reload the TLB. For - * any other case, we bail out to a higher level function that can - * handle it. - */ - . = 0x1400 -DataTLBError: -#ifdef CONFIG_8xx_CPU6 - stw r3, 8(r0) -#endif - DO_8xx_CPU6(0x3f80, r3) - mtspr SPRN_M_TW, r10 /* Save a couple of working registers */ - mfcr r10 - stw r10, 0(r0) - stw r11, 4(r0) - - /* First, make sure this was a store operation. - */ - mfspr r10, SPRN_DSISR - andis. r11, r10, 0x0200 /* If set, indicates store op */ - beq 2f - - /* The EA of a data TLB miss is automatically stored in the MD_EPN - * register. The EA of a data TLB error is automatically stored in - * the DAR, but not the MD_EPN register. We must copy the 20 most - * significant bits of the EA from the DAR to MD_EPN before we - * start walking the page tables. We also need to copy the CASID - * value from the M_CASID register. - * Addendum: The EA of a data TLB error is _supposed_ to be stored - * in DAR, but it seems that this doesn't happen in some cases, such - * as when the error is due to a dcbi instruction to a page with a - * TLB that doesn't have the changed bit set. In such cases, there - * does not appear to be any way to recover the EA of the error - * since it is neither in DAR nor MD_EPN. As a workaround, the - * _PAGE_HWWRITE bit is set for all kernel data pages when the PTEs - * are initialized in mapin_ram(). This will avoid the problem, - * assuming we only use the dcbi instruction on kernel addresses. - */ - mfspr r10, SPRN_DAR - rlwinm r11, r10, 0, 0, 19 - ori r11, r11, MD_EVALID - mfspr r10, SPRN_M_CASID - rlwimi r11, r10, 0, 28, 31 - DO_8xx_CPU6(0x3780, r3) - mtspr SPRN_MD_EPN, r11 - - mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */ - - /* If we are faulting a kernel address, we have to use the - * kernel page tables. - */ - andi. r11, r10, 0x0800 - beq 3f - lis r11, swapper_pg_dir@h - ori r11, r11, swapper_pg_dir@l - rlwimi r10, r11, 0, 2, 19 -3: - lwz r11, 0(r10) /* Get the level 1 entry */ - rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */ - beq 2f /* If zero, bail */ - - /* We have a pte table, so fetch the pte from the table. - */ - ori r11, r11, 1 /* Set valid bit in physical L2 page */ - DO_8xx_CPU6(0x3b80, r3) - mtspr SPRN_MD_TWC, r11 /* Load pte table base address */ - mfspr r11, SPRN_MD_TWC /* ....and get the pte address */ - lwz r10, 0(r11) /* Get the pte */ - - andi. r11, r10, _PAGE_RW /* Is it writeable? */ - beq 2f /* Bail out if not */ - - /* Update 'changed', among others. - */ -#ifdef CONFIG_SWAP - ori r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE - /* do not set the _PAGE_ACCESSED bit of a non-present page */ - andi. r11, r10, _PAGE_PRESENT - beq 4f - ori r10, r10, _PAGE_ACCESSED -4: -#else - ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE -#endif - mfspr r11, SPRN_MD_TWC /* Get pte address again */ - stw r10, 0(r11) /* and update pte in table */ - - /* The Linux PTE won't go exactly into the MMU TLB. - * Software indicator bits 21, 22 and 28 must be clear. - * Software indicator bits 24, 25, 26, and 27 must be - * set. All other Linux PTE bits control the behavior - * of the MMU. - */ - li r11, 0x00f0 - rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */ - DO_8xx_CPU6(0x3d80, r3) - mtspr SPRN_MD_RPN, r10 /* Update TLB entry */ - - mfspr r10, SPRN_M_TW /* Restore registers */ - lwz r11, 0(r0) - mtcr r11 - lwz r11, 4(r0) -#ifdef CONFIG_8xx_CPU6 - lwz r3, 8(r0) -#endif - rfi -2: - mfspr r10, SPRN_M_TW /* Restore registers */ - lwz r11, 0(r0) - mtcr r11 - lwz r11, 4(r0) -#ifdef CONFIG_8xx_CPU6 - lwz r3, 8(r0) -#endif - b DataAccess - - EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE) - -/* On the MPC8xx, these next four traps are used for development - * support of breakpoints and such. Someday I will get around to - * using them. - */ - EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE) - EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE) - - . = 0x2000 - - .globl giveup_fpu -giveup_fpu: - blr - -/* - * This is where the main kernel code starts. - */ -start_here: - /* ptr to current */ - lis r2,init_task@h - ori r2,r2,init_task@l - - /* ptr to phys current thread */ - tophys(r4,r2) - addi r4,r4,THREAD /* init task's THREAD */ - mtspr SPRN_SPRG3,r4 - li r3,0 - mtspr SPRN_SPRG2,r3 /* 0 => r1 has kernel sp */ - - /* stack */ - lis r1,init_thread_union@ha - addi r1,r1,init_thread_union@l - li r0,0 - stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1) - - bl early_init /* We have to do this with MMU on */ - -/* - * Decide what sort of machine this is and initialize the MMU. - */ - mr r3,r31 - mr r4,r30 - mr r5,r29 - mr r6,r28 - mr r7,r27 - bl machine_init - bl MMU_init - -/* - * Go back to running unmapped so we can load up new values - * and change to using our exception vectors. - * On the 8xx, all we have to do is invalidate the TLB to clear - * the old 8M byte TLB mappings and load the page table base register. - */ - /* The right way to do this would be to track it down through - * init's THREAD like the context switch code does, but this is - * easier......until someone changes init's static structures. - */ - lis r6, swapper_pg_dir@h - ori r6, r6, swapper_pg_dir@l - tophys(r6,r6) -#ifdef CONFIG_8xx_CPU6 - lis r4, cpu6_errata_word@h - ori r4, r4, cpu6_errata_word@l - li r3, 0x3980 - stw r3, 12(r4) - lwz r3, 12(r4) -#endif - mtspr SPRN_M_TWB, r6 - lis r4,2f@h - ori r4,r4,2f@l - tophys(r4,r4) - li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR) - mtspr SPRN_SRR0,r4 - mtspr SPRN_SRR1,r3 - rfi -/* Load up the kernel context */ -2: - SYNC /* Force all PTE updates to finish */ - tlbia /* Clear all TLB entries */ - sync /* wait for tlbia/tlbie to finish */ - TLBSYNC /* ... on all CPUs */ - - /* set up the PTE pointers for the Abatron bdiGDB. - */ - tovirt(r6,r6) - lis r5, abatron_pteptrs@h - ori r5, r5, abatron_pteptrs@l - stw r5, 0xf0(r0) /* Must match your Abatron config file */ - tophys(r5,r5) - stw r6, 0(r5) - -/* Now turn on the MMU for real! */ - li r4,MSR_KERNEL - lis r3,start_kernel@h - ori r3,r3,start_kernel@l - mtspr SPRN_SRR0,r3 - mtspr SPRN_SRR1,r4 - rfi /* enable MMU and jump to start_kernel */ - -/* Set up the initial MMU state so we can do the first level of - * kernel initialization. This maps the first 8 MBytes of memory 1:1 - * virtual to physical. Also, set the cache mode since that is defined - * by TLB entries and perform any additional mapping (like of the IMMR). - * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel, - * 24 Mbytes of data, and the 8M IMMR space. Anything not covered by - * these mappings is mapped by page tables. - */ -initial_mmu: - tlbia /* Invalidate all TLB entries */ -#ifdef CONFIG_PIN_TLB - lis r8, MI_RSV4I@h - ori r8, r8, 0x1c00 -#else - li r8, 0 -#endif - mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */ - -#ifdef CONFIG_PIN_TLB - lis r10, (MD_RSV4I | MD_RESETVAL)@h - ori r10, r10, 0x1c00 - mr r8, r10 -#else - lis r10, MD_RESETVAL@h -#endif -#ifndef CONFIG_8xx_COPYBACK - oris r10, r10, MD_WTDEF@h -#endif - mtspr SPRN_MD_CTR, r10 /* Set data TLB control */ - - /* Now map the lower 8 Meg into the TLBs. For this quick hack, - * we can load the instruction and data TLB registers with the - * same values. - */ - lis r8, KERNELBASE@h /* Create vaddr for TLB */ - ori r8, r8, MI_EVALID /* Mark it valid */ - mtspr SPRN_MI_EPN, r8 - mtspr SPRN_MD_EPN, r8 - li r8, MI_PS8MEG /* Set 8M byte page */ - ori r8, r8, MI_SVALID /* Make it valid */ - mtspr SPRN_MI_TWC, r8 - mtspr SPRN_MD_TWC, r8 - li r8, MI_BOOTINIT /* Create RPN for address 0 */ - mtspr SPRN_MI_RPN, r8 /* Store TLB entry */ - mtspr SPRN_MD_RPN, r8 - lis r8, MI_Kp@h /* Set the protection mode */ - mtspr SPRN_MI_AP, r8 - mtspr SPRN_MD_AP, r8 - - /* Map another 8 MByte at the IMMR to get the processor - * internal registers (among other things). - */ -#ifdef CONFIG_PIN_TLB - addi r10, r10, 0x0100 - mtspr SPRN_MD_CTR, r10 -#endif - mfspr r9, 638 /* Get current IMMR */ - andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */ - - mr r8, r9 /* Create vaddr for TLB */ - ori r8, r8, MD_EVALID /* Mark it valid */ - mtspr SPRN_MD_EPN, r8 - li r8, MD_PS8MEG /* Set 8M byte page */ - ori r8, r8, MD_SVALID /* Make it valid */ - mtspr SPRN_MD_TWC, r8 - mr r8, r9 /* Create paddr for TLB */ - ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */ - mtspr SPRN_MD_RPN, r8 - -#ifdef CONFIG_PIN_TLB - /* Map two more 8M kernel data pages. - */ - addi r10, r10, 0x0100 - mtspr SPRN_MD_CTR, r10 - - lis r8, KERNELBASE@h /* Create vaddr for TLB */ - addis r8, r8, 0x0080 /* Add 8M */ - ori r8, r8, MI_EVALID /* Mark it valid */ - mtspr SPRN_MD_EPN, r8 - li r9, MI_PS8MEG /* Set 8M byte page */ - ori r9, r9, MI_SVALID /* Make it valid */ - mtspr SPRN_MD_TWC, r9 - li r11, MI_BOOTINIT /* Create RPN for address 0 */ - addis r11, r11, 0x0080 /* Add 8M */ - mtspr SPRN_MD_RPN, r11 - - addi r10, r10, 0x0100 - mtspr SPRN_MD_CTR, r10 - - addis r8, r8, 0x0080 /* Add 8M */ - mtspr SPRN_MD_EPN, r8 - mtspr SPRN_MD_TWC, r9 - addis r11, r11, 0x0080 /* Add 8M */ - mtspr SPRN_MD_RPN, r11 -#endif - - /* Since the cache is enabled according to the information we - * just loaded into the TLB, invalidate and enable the caches here. - * We should probably check/set other modes....later. - */ - lis r8, IDC_INVALL@h - mtspr SPRN_IC_CST, r8 - mtspr SPRN_DC_CST, r8 - lis r8, IDC_ENABLE@h - mtspr SPRN_IC_CST, r8 -#ifdef CONFIG_8xx_COPYBACK - mtspr SPRN_DC_CST, r8 -#else - /* For a debug option, I left this here to easily enable - * the write through cache mode - */ - lis r8, DC_SFWT@h - mtspr SPRN_DC_CST, r8 - lis r8, IDC_ENABLE@h - mtspr SPRN_DC_CST, r8 -#endif - blr - - -/* - * Set up to use a given MMU context. - * r3 is context number, r4 is PGD pointer. - * - * We place the physical address of the new task page directory loaded - * into the MMU base register, and set the ASID compare register with - * the new "context." - */ -_GLOBAL(set_context) - -#ifdef CONFIG_BDI_SWITCH - /* Context switch the PTE pointer for the Abatron BDI2000. - * The PGDIR is passed as second argument. - */ - lis r5, KERNELBASE@h - lwz r5, 0xf0(r5) - stw r4, 0x4(r5) -#endif - -#ifdef CONFIG_8xx_CPU6 - lis r6, cpu6_errata_word@h - ori r6, r6, cpu6_errata_word@l - tophys (r4, r4) - li r7, 0x3980 - stw r7, 12(r6) - lwz r7, 12(r6) - mtspr SPRN_M_TWB, r4 /* Update MMU base address */ - li r7, 0x3380 - stw r7, 12(r6) - lwz r7, 12(r6) - mtspr SPRN_M_CASID, r3 /* Update context */ -#else - mtspr SPRN_M_CASID,r3 /* Update context */ - tophys (r4, r4) - mtspr SPRN_M_TWB, r4 /* and pgd */ -#endif - SYNC - blr - -#ifdef CONFIG_8xx_CPU6 -/* It's here because it is unique to the 8xx. - * It is important we get called with interrupts disabled. I used to - * do that, but it appears that all code that calls this already had - * interrupt disabled. - */ - .globl set_dec_cpu6 -set_dec_cpu6: - lis r7, cpu6_errata_word@h - ori r7, r7, cpu6_errata_word@l - li r4, 0x2c00 - stw r4, 8(r7) - lwz r4, 8(r7) - mtspr 22, r3 /* Update Decrementer */ - SYNC - blr -#endif - -/* - * We put a few things here that have to be page-aligned. - * This stuff goes at the beginning of the data segment, - * which is page-aligned. - */ - .data - .globl sdata -sdata: - .globl empty_zero_page -empty_zero_page: - .space 4096 - - .globl swapper_pg_dir -swapper_pg_dir: - .space 4096 - -/* - * This space gets a copy of optional info passed to us by the bootstrap - * Used to pass parameters into the kernel like root=/dev/sda1, etc. - */ - .globl cmd_line -cmd_line: - .space 512 - -/* Room for two PTE table poiners, usually the kernel and current user - * pointer to their respective root page table (pgdir). - */ -abatron_pteptrs: - .space 8 - -#ifdef CONFIG_8xx_CPU6 - .globl cpu6_errata_word -cpu6_errata_word: - .space 16 -#endif - diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h deleted file mode 100644 index 166d597b6db247d75a5cc098a1e0bd8ec7d3fd2a..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/head_booke.h +++ /dev/null @@ -1,308 +0,0 @@ -#ifndef __HEAD_BOOKE_H__ -#define __HEAD_BOOKE_H__ - -/* - * Macros used for common Book-e exception handling - */ - -#define SET_IVOR(vector_number, vector_label) \ - li r26,vector_label@l; \ - mtspr SPRN_IVOR##vector_number,r26; \ - sync - -#define NORMAL_EXCEPTION_PROLOG \ - mtspr SPRN_SPRG0,r10; /* save two registers to work with */\ - mtspr SPRN_SPRG1,r11; \ - mtspr SPRN_SPRG4W,r1; \ - mfcr r10; /* save CR in r10 for now */\ - mfspr r11,SPRN_SRR1; /* check whether user or kernel */\ - andi. r11,r11,MSR_PR; \ - beq 1f; \ - mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\ - lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\ - addi r1,r1,THREAD_SIZE; \ -1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\ - mr r11,r1; \ - stw r10,_CCR(r11); /* save various registers */\ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mfspr r10,SPRN_SPRG0; \ - stw r10,GPR10(r11); \ - mfspr r12,SPRN_SPRG1; \ - stw r12,GPR11(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r10,SPRN_SPRG4R; \ - mfspr r12,SPRN_SRR0; \ - stw r10,GPR1(r11); \ - mfspr r9,SPRN_SRR1; \ - stw r10,0(r11); \ - rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - -/* To handle the additional exception priority levels on 40x and Book-E - * processors we allocate a 4k stack per additional priority level. The various - * head_xxx.S files allocate space (exception_stack_top) for each priority's - * stack times the number of CPUs - * - * On 40x critical is the only additional level - * On 44x/e500 we have critical and machine check - * On e200 we have critical and debug (machine check occurs via critical) - * - * Additionally we reserve a SPRG for each priority level so we can free up a - * GPR to use as the base for indirect access to the exception stacks. This - * is necessary since the MMU is always on, for Book-E parts, and the stacks - * are offset from KERNELBASE. - * - */ -#define BOOKE_EXCEPTION_STACK_SIZE (8192) - -/* CRIT_SPRG only used in critical exception handling */ -#define CRIT_SPRG SPRN_SPRG2 -/* MCHECK_SPRG only used in machine check exception handling */ -#define MCHECK_SPRG SPRN_SPRG6W - -#define MCHECK_STACK_TOP (exception_stack_top - 4096) -#define CRIT_STACK_TOP (exception_stack_top) - -/* only on e200 for now */ -#define DEBUG_STACK_TOP (exception_stack_top - 4096) -#define DEBUG_SPRG SPRN_SPRG6W - -#ifdef CONFIG_SMP -#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ - mfspr r8,SPRN_PIR; \ - mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \ - neg r8,r8; \ - addis r8,r8,level##_STACK_TOP@ha; \ - addi r8,r8,level##_STACK_TOP@l -#else -#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ - lis r8,level##_STACK_TOP@h; \ - ori r8,r8,level##_STACK_TOP@l -#endif - -/* - * Exception prolog for critical/machine check exceptions. This is a - * little different from the normal exception prolog above since a - * critical/machine check exception can potentially occur at any point - * during normal exception processing. Thus we cannot use the same SPRG - * registers as the normal prolog above. Instead we use a portion of the - * critical/machine check exception stack at low physical addresses. - */ -#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ - mtspr exc_level##_SPRG,r8; \ - BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ - stw r10,GPR10-INT_FRAME_SIZE(r8); \ - stw r11,GPR11-INT_FRAME_SIZE(r8); \ - mfcr r10; /* save CR in r10 for now */\ - mfspr r11,exc_level_srr1; /* check whether user or kernel */\ - andi. r11,r11,MSR_PR; \ - mr r11,r8; \ - mfspr r8,exc_level##_SPRG; \ - beq 1f; \ - /* COMING FROM USER MODE */ \ - mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ - lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ - addi r11,r11,THREAD_SIZE; \ -1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ - stw r10,_CCR(r11); /* save various registers */\ - stw r12,GPR12(r11); \ - stw r9,GPR9(r11); \ - mflr r10; \ - stw r10,_LINK(r11); \ - mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ - stw r12,_DEAR(r11); /* since they may have had stuff */\ - mfspr r9,SPRN_ESR; /* in them at the point where the */\ - stw r9,_ESR(r11); /* exception was taken */\ - mfspr r12,exc_level_srr0; \ - stw r1,GPR1(r11); \ - mfspr r9,exc_level_srr1; \ - stw r1,0(r11); \ - mr r1,r11; \ - rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\ - stw r0,GPR0(r11); \ - SAVE_4GPRS(3, r11); \ - SAVE_2GPRS(7, r11) - -#define CRITICAL_EXCEPTION_PROLOG \ - EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1) -#define DEBUG_EXCEPTION_PROLOG \ - EXC_LEVEL_EXCEPTION_PROLOG(DEBUG, SPRN_DSRR0, SPRN_DSRR1) -#define MCHECK_EXCEPTION_PROLOG \ - EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1) - -/* - * Exception vectors. - */ -#define START_EXCEPTION(label) \ - .align 5; \ -label: - -#define FINISH_EXCEPTION(func) \ - bl transfer_to_handler_full; \ - .long func; \ - .long ret_from_except_full - -#define EXCEPTION(n, label, hdlr, xfer) \ - START_EXCEPTION(label); \ - NORMAL_EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - xfer(n, hdlr) - -#define CRITICAL_EXCEPTION(n, label, hdlr) \ - START_EXCEPTION(label); \ - CRITICAL_EXCEPTION_PROLOG; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ - NOCOPY, crit_transfer_to_handler, \ - ret_from_crit_exc) - -#define MCHECK_EXCEPTION(n, label, hdlr) \ - START_EXCEPTION(label); \ - MCHECK_EXCEPTION_PROLOG; \ - mfspr r5,SPRN_ESR; \ - stw r5,_ESR(r11); \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \ - NOCOPY, mcheck_transfer_to_handler, \ - ret_from_mcheck_exc) - -#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \ - li r10,trap; \ - stw r10,TRAP(r11); \ - lis r10,msr@h; \ - ori r10,r10,msr@l; \ - copyee(r10, r9); \ - bl tfer; \ - .long hdlr; \ - .long ret - -#define COPY_EE(d, s) rlwimi d,s,0,16,16 -#define NOCOPY(d, s) - -#define EXC_XFER_STD(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \ - ret_from_except) - -#define EXC_XFER_EE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \ - ret_from_except_full) - -#define EXC_XFER_EE_LITE(n, hdlr) \ - EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \ - ret_from_except) - -/* Check for a single step debug exception while in an exception - * handler before state has been saved. This is to catch the case - * where an instruction that we are trying to single step causes - * an exception (eg ITLB/DTLB miss) and thus the first instruction of - * the exception handler generates a single step debug exception. - * - * If we get a debug trap on the first instruction of an exception handler, - * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is - * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR). - * The exception handler was handling a non-critical interrupt, so it will - * save (and later restore) the MSR via SPRN_CSRR1, which will still have - * the MSR_DE bit set. - */ -#define DEBUG_EXCEPTION \ - START_EXCEPTION(Debug); \ - CRITICAL_EXCEPTION_PROLOG; \ - \ - /* \ - * If there is a single step or branch-taken exception in an \ - * exception entry sequence, it was probably meant to apply to \ - * the code where the exception occurred (since exception entry \ - * doesn't turn off DE automatically). We simulate the effect \ - * of turning off DE on entry to an exception handler by turning \ - * off DE in the CSRR1 value and clearing the debug status. \ - */ \ - mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ - andis. r10,r10,DBSR_IC@h; \ - beq+ 2f; \ - \ - lis r10,KERNELBASE@h; /* check if exception in vectors */ \ - ori r10,r10,KERNELBASE@l; \ - cmplw r12,r10; \ - blt+ 2f; /* addr below exception vectors */ \ - \ - lis r10,Debug@h; \ - ori r10,r10,Debug@l; \ - cmplw r12,r10; \ - bgt+ 2f; /* addr above exception vectors */ \ - \ - /* here it looks like we got an inappropriate debug exception. */ \ -1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \ - lis r10,DBSR_IC@h; /* clear the IC event */ \ - mtspr SPRN_DBSR,r10; \ - /* restore state and get out */ \ - lwz r10,_CCR(r11); \ - lwz r0,GPR0(r11); \ - lwz r1,GPR1(r11); \ - mtcrf 0x80,r10; \ - mtspr SPRN_CSRR0,r12; \ - mtspr SPRN_CSRR1,r9; \ - lwz r9,GPR9(r11); \ - lwz r12,GPR12(r11); \ - mtspr CRIT_SPRG,r8; \ - BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ - lwz r10,GPR10-INT_FRAME_SIZE(r8); \ - lwz r11,GPR11-INT_FRAME_SIZE(r8); \ - mfspr r8,CRIT_SPRG; \ - \ - rfci; \ - b .; \ - \ - /* continue normal handling for a critical exception... */ \ -2: mfspr r4,SPRN_DBSR; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) - -#define INSTRUCTION_STORAGE_EXCEPTION \ - START_EXCEPTION(InstructionStorage) \ - NORMAL_EXCEPTION_PROLOG; \ - mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \ - stw r5,_ESR(r11); \ - mr r4,r12; /* Pass SRR0 as arg2 */ \ - li r5,0; /* Pass zero as arg3 */ \ - EXC_XFER_EE_LITE(0x0400, handle_page_fault) - -#define ALIGNMENT_EXCEPTION \ - START_EXCEPTION(Alignment) \ - NORMAL_EXCEPTION_PROLOG; \ - mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \ - stw r4,_DEAR(r11); \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_EE(0x0600, alignment_exception) - -#define PROGRAM_EXCEPTION \ - START_EXCEPTION(Program) \ - NORMAL_EXCEPTION_PROLOG; \ - mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \ - stw r4,_ESR(r11); \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_STD(0x0700, program_check_exception) - -#define DECREMENTER_EXCEPTION \ - START_EXCEPTION(Decrementer) \ - NORMAL_EXCEPTION_PROLOG; \ - lis r0,TSR_DIS@h; /* Setup the DEC interrupt mask */ \ - mtspr SPRN_TSR,r0; /* Clear the DEC interrupt */ \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_LITE(0x0900, timer_interrupt) - -#define FP_UNAVAILABLE_EXCEPTION \ - START_EXCEPTION(FloatingPointUnavailable) \ - NORMAL_EXCEPTION_PROLOG; \ - bne load_up_fpu; /* if from user, just load it up */ \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) - -#endif /* __HEAD_BOOKE_H__ */ diff --git a/arch/ppc/kernel/machine_kexec.c b/arch/ppc/kernel/machine_kexec.c deleted file mode 100644 index a469ba438cbea17fc8654407d42d2744f4d4a2fc..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/machine_kexec.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * machine_kexec.c - handle transition of Linux booting another kernel - * Copyright (C) 2002-2003 Eric Biederman - * - * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz - * - * This source code is licensed under the GNU General Public License, - * Version 2. See the file COPYING for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -typedef NORET_TYPE void (*relocate_new_kernel_t)( - unsigned long indirection_page, - unsigned long reboot_code_buffer, - unsigned long start_address) ATTRIB_NORET; - -extern const unsigned char relocate_new_kernel[]; -extern const unsigned int relocate_new_kernel_size; - -void machine_shutdown(void) -{ - if (ppc_md.machine_shutdown) - ppc_md.machine_shutdown(); -} - -void machine_crash_shutdown(struct pt_regs *regs) -{ - if (ppc_md.machine_crash_shutdown) - ppc_md.machine_crash_shutdown(); -} - -/* - * Do what every setup is needed on image and the - * reboot code buffer to allow us to avoid allocations - * later. - */ -int machine_kexec_prepare(struct kimage *image) -{ - if (ppc_md.machine_kexec_prepare) - return ppc_md.machine_kexec_prepare(image); - /* - * Fail if platform doesn't provide its own machine_kexec_prepare - * implementation. - */ - return -ENOSYS; -} - -void machine_kexec_cleanup(struct kimage *image) -{ - if (ppc_md.machine_kexec_cleanup) - ppc_md.machine_kexec_cleanup(image); -} - -/* - * Do not allocate memory (or fail in any way) in machine_kexec(). - * We are past the point of no return, committed to rebooting now. - */ -NORET_TYPE void machine_kexec(struct kimage *image) -{ - if (ppc_md.machine_kexec) - ppc_md.machine_kexec(image); - else { - /* - * Fall back to normal restart if platform doesn't provide - * its own kexec function, and user insist to kexec... - */ - machine_restart(NULL); - } - for(;;); -} - -/* - * This is a generic machine_kexec function suitable at least for - * non-OpenFirmware embedded platforms. - * It merely copies the image relocation code to the control page and - * jumps to it. - * A platform specific function may just call this one. - */ -void machine_kexec_simple(struct kimage *image) -{ - unsigned long page_list; - unsigned long reboot_code_buffer, reboot_code_buffer_phys; - relocate_new_kernel_t rnk; - - /* Interrupts aren't acceptable while we reboot */ - local_irq_disable(); - - page_list = image->head; - - /* we need both effective and real address here */ - reboot_code_buffer = - (unsigned long)page_address(image->control_code_page); - reboot_code_buffer_phys = virt_to_phys((void *)reboot_code_buffer); - - /* copy our kernel relocation code to the control code page */ - memcpy((void *)reboot_code_buffer, relocate_new_kernel, - relocate_new_kernel_size); - - flush_icache_range(reboot_code_buffer, - reboot_code_buffer + KEXEC_CONTROL_CODE_SIZE); - printk(KERN_INFO "Bye!\n"); - - /* now call it */ - rnk = (relocate_new_kernel_t) reboot_code_buffer; - (*rnk)(page_list, reboot_code_buffer_phys, image->start); -} - diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S deleted file mode 100644 index d5e0dfc9ffecc2ddd8a341fe6d634dee8bb5b379..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/misc.S +++ /dev/null @@ -1,868 +0,0 @@ -/* - * This file contains miscellaneous low-level functions. - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Largely rewritten by Cort Dougan (cort@cs.nmt.edu) - * and Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_8xx -#define ISYNC_8xx isync -#else -#define ISYNC_8xx -#endif - .text - - .align 5 -_GLOBAL(__delay) - cmpwi 0,r3,0 - mtctr r3 - beqlr -1: bdnz 1b - blr - -/* - * Returns (address we're running at) - (address we were linked at) - * for use before the text and data are mapped to KERNELBASE. - */ -_GLOBAL(reloc_offset) - mflr r0 - bl 1f -1: mflr r3 - lis r4,1b@ha - addi r4,r4,1b@l - subf r3,r4,r3 - mtlr r0 - blr - -/* - * add_reloc_offset(x) returns x + reloc_offset(). - */ -_GLOBAL(add_reloc_offset) - mflr r0 - bl 1f -1: mflr r5 - lis r4,1b@ha - addi r4,r4,1b@l - subf r5,r4,r5 - add r3,r3,r5 - mtlr r0 - blr - -/* - * sub_reloc_offset(x) returns x - reloc_offset(). - */ -_GLOBAL(sub_reloc_offset) - mflr r0 - bl 1f -1: mflr r5 - lis r4,1b@ha - addi r4,r4,1b@l - subf r5,r4,r5 - subf r3,r5,r3 - mtlr r0 - blr - -/* - * reloc_got2 runs through the .got2 section adding an offset - * to each entry. - */ -_GLOBAL(reloc_got2) - mflr r11 - lis r7,__got2_start@ha - addi r7,r7,__got2_start@l - lis r8,__got2_end@ha - addi r8,r8,__got2_end@l - subf r8,r7,r8 - srwi. r8,r8,2 - beqlr - mtctr r8 - bl 1f -1: mflr r0 - lis r4,1b@ha - addi r4,r4,1b@l - subf r0,r4,r0 - add r7,r0,r7 -2: lwz r0,0(r7) - add r0,r0,r3 - stw r0,0(r7) - addi r7,r7,4 - bdnz 2b - mtlr r11 - blr - -/* - * call_setup_cpu - call the setup_cpu function for this cpu - * r3 = data offset, r24 = cpu number - * - * Setup function is called with: - * r3 = data offset - * r4 = ptr to CPU spec (relocated) - */ -_GLOBAL(call_setup_cpu) - addis r4,r3,cur_cpu_spec@ha - addi r4,r4,cur_cpu_spec@l - lwz r4,0(r4) - add r4,r4,r3 - lwz r5,CPU_SPEC_SETUP(r4) - cmpi 0,r5,0 - add r5,r5,r3 - beqlr - mtctr r5 - bctr - -/* - * complement mask on the msr then "or" some values on. - * _nmask_and_or_msr(nmask, value_to_or) - */ -_GLOBAL(_nmask_and_or_msr) - mfmsr r0 /* Get current msr */ - andc r0,r0,r3 /* And off the bits set in r3 (first parm) */ - or r0,r0,r4 /* Or on the bits in r4 (second parm) */ - SYNC /* Some chip revs have problems here... */ - mtmsr r0 /* Update machine state */ - isync - blr /* Done */ - - -/* - * Flush MMU TLB - */ -_GLOBAL(_tlbia) -#if defined(CONFIG_40x) - sync /* Flush to memory before changing mapping */ - tlbia - isync /* Flush shadow TLB */ -#elif defined(CONFIG_44x) - li r3,0 - sync - - /* Load high watermark */ - lis r4,tlb_44x_hwater@ha - lwz r5,tlb_44x_hwater@l(r4) - -1: tlbwe r3,r3,PPC44x_TLB_PAGEID - addi r3,r3,1 - cmpw 0,r3,r5 - ble 1b - - isync -#else /* !(CONFIG_40x || CONFIG_44x) */ -#if defined(CONFIG_SMP) - rlwinm r8,r1,0,0,18 - lwz r8,TI_CPU(r8) - oris r8,r8,10 - mfmsr r10 - SYNC - rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ - rlwinm r0,r0,0,28,26 /* clear DR */ - mtmsr r0 - SYNC_601 - isync - lis r9,mmu_hash_lock@h - ori r9,r9,mmu_hash_lock@l - tophys(r9,r9) -10: lwarx r7,0,r9 - cmpwi 0,r7,0 - bne- 10b - stwcx. r8,0,r9 - bne- 10b - sync - tlbia - sync - TLBSYNC - li r0,0 - stw r0,0(r9) /* clear mmu_hash_lock */ - mtmsr r10 - SYNC_601 - isync -#else /* CONFIG_SMP */ - sync - tlbia - sync -#endif /* CONFIG_SMP */ -#endif /* ! defined(CONFIG_40x) */ - blr - -/* - * Flush MMU TLB for a particular address - */ -_GLOBAL(_tlbie) -#if defined(CONFIG_40x) - /* We run the search with interrupts disabled because we have to change - * the PID and I don't want to preempt when that happens. - */ - mfmsr r5 - mfspr r6,SPRN_PID - wrteei 0 - mtspr SPRN_PID,r4 - tlbsx. r3, 0, r3 - mtspr SPRN_PID,r6 - wrtee r5 - bne 10f - sync - /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear. - * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate - * the TLB entry. */ - tlbwe r3, r3, TLB_TAG - isync -10: -#elif defined(CONFIG_44x) - mfspr r5,SPRN_MMUCR - rlwimi r5,r4,0,24,31 /* Set TID */ - - /* We have to run the search with interrupts disabled, even critical - * and debug interrupts (in fact the only critical exceptions we have - * are debug and machine check). Otherwise an interrupt which causes - * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */ - mfmsr r4 - lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha - addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l - andc r6,r4,r6 - mtmsr r6 - mtspr SPRN_MMUCR,r5 - tlbsx. r3, 0, r3 - mtmsr r4 - bne 10f - sync - /* There are only 64 TLB entries, so r3 < 64, - * which means bit 22, is clear. Since 22 is - * the V bit in the TLB_PAGEID, loading this - * value will invalidate the TLB entry. - */ - tlbwe r3, r3, PPC44x_TLB_PAGEID - isync -10: -#else /* !(CONFIG_40x || CONFIG_44x) */ -#if defined(CONFIG_SMP) - rlwinm r8,r1,0,0,18 - lwz r8,TI_CPU(r8) - oris r8,r8,11 - mfmsr r10 - SYNC - rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ - rlwinm r0,r0,0,28,26 /* clear DR */ - mtmsr r0 - SYNC_601 - isync - lis r9,mmu_hash_lock@h - ori r9,r9,mmu_hash_lock@l - tophys(r9,r9) -10: lwarx r7,0,r9 - cmpwi 0,r7,0 - bne- 10b - stwcx. r8,0,r9 - bne- 10b - eieio - tlbie r3 - sync - TLBSYNC - li r0,0 - stw r0,0(r9) /* clear mmu_hash_lock */ - mtmsr r10 - SYNC_601 - isync -#else /* CONFIG_SMP */ - tlbie r3 - sync -#endif /* CONFIG_SMP */ -#endif /* ! CONFIG_40x */ - blr - -/* - * Flush instruction cache. - * This is a no-op on the 601. - */ -_GLOBAL(flush_instruction_cache) -#if defined(CONFIG_8xx) - isync - lis r5, IDC_INVALL@h - mtspr SPRN_IC_CST, r5 -#elif defined(CONFIG_4xx) -#ifdef CONFIG_403GCX - li r3, 512 - mtctr r3 - lis r4, KERNELBASE@h -1: iccci 0, r4 - addi r4, r4, 16 - bdnz 1b -#else - lis r3, KERNELBASE@h - iccci 0,r3 -#endif -#else - mfspr r3,SPRN_PVR - rlwinm r3,r3,16,16,31 - cmpwi 0,r3,1 - beqlr /* for 601, do nothing */ - /* 603/604 processor - use invalidate-all bit in HID0 */ - mfspr r3,SPRN_HID0 - ori r3,r3,HID0_ICFI - mtspr SPRN_HID0,r3 -#endif /* CONFIG_8xx/4xx */ - isync - blr - -/* - * Write any modified data cache blocks out to memory - * and invalidate the corresponding instruction cache blocks. - * This is a no-op on the 601. - * - * __flush_icache_range(unsigned long start, unsigned long stop) - */ -_GLOBAL(__flush_icache_range) -BEGIN_FTR_SECTION - blr /* for 601, do nothing */ -END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) - li r5,L1_CACHE_BYTES-1 - andc r3,r3,r5 - subf r4,r3,r4 - add r4,r4,r5 - srwi. r4,r4,L1_CACHE_SHIFT - beqlr - mtctr r4 - mr r6,r3 -1: dcbst 0,r3 - addi r3,r3,L1_CACHE_BYTES - bdnz 1b - sync /* wait for dcbst's to get to ram */ - mtctr r4 -2: icbi 0,r6 - addi r6,r6,L1_CACHE_BYTES - bdnz 2b - sync /* additional sync needed on g4 */ - isync - blr -/* - * Write any modified data cache blocks out to memory. - * Does not invalidate the corresponding cache lines (especially for - * any corresponding instruction cache). - * - * clean_dcache_range(unsigned long start, unsigned long stop) - */ -_GLOBAL(clean_dcache_range) - li r5,L1_CACHE_BYTES-1 - andc r3,r3,r5 - subf r4,r3,r4 - add r4,r4,r5 - srwi. r4,r4,L1_CACHE_SHIFT - beqlr - mtctr r4 - -1: dcbst 0,r3 - addi r3,r3,L1_CACHE_BYTES - bdnz 1b - sync /* wait for dcbst's to get to ram */ - blr - -/* - * Write any modified data cache blocks out to memory and invalidate them. - * Does not invalidate the corresponding instruction cache blocks. - * - * flush_dcache_range(unsigned long start, unsigned long stop) - */ -_GLOBAL(flush_dcache_range) - li r5,L1_CACHE_BYTES-1 - andc r3,r3,r5 - subf r4,r3,r4 - add r4,r4,r5 - srwi. r4,r4,L1_CACHE_SHIFT - beqlr - mtctr r4 - -1: dcbf 0,r3 - addi r3,r3,L1_CACHE_BYTES - bdnz 1b - sync /* wait for dcbst's to get to ram */ - blr - -/* - * Like above, but invalidate the D-cache. This is used by the 8xx - * to invalidate the cache so the PPC core doesn't get stale data - * from the CPM (no cache snooping here :-). - * - * invalidate_dcache_range(unsigned long start, unsigned long stop) - */ -_GLOBAL(invalidate_dcache_range) - li r5,L1_CACHE_BYTES-1 - andc r3,r3,r5 - subf r4,r3,r4 - add r4,r4,r5 - srwi. r4,r4,L1_CACHE_SHIFT - beqlr - mtctr r4 - -1: dcbi 0,r3 - addi r3,r3,L1_CACHE_BYTES - bdnz 1b - sync /* wait for dcbi's to get to ram */ - blr - -#ifdef CONFIG_NOT_COHERENT_CACHE -/* - * 40x cores have 8K or 16K dcache and 32 byte line size. - * 44x has a 32K dcache and 32 byte line size. - * 8xx has 1, 2, 4, 8K variants. - * For now, cover the worst case of the 44x. - * Must be called with external interrupts disabled. - */ -#define CACHE_NWAYS 64 -#define CACHE_NLINES 16 - -_GLOBAL(flush_dcache_all) - li r4, (2 * CACHE_NWAYS * CACHE_NLINES) - mtctr r4 - lis r5, KERNELBASE@h -1: lwz r3, 0(r5) /* Load one word from every line */ - addi r5, r5, L1_CACHE_BYTES - bdnz 1b - blr -#endif /* CONFIG_NOT_COHERENT_CACHE */ - -/* - * Flush a particular page from the data cache to RAM. - * Note: this is necessary because the instruction cache does *not* - * snoop from the data cache. - * This is a no-op on the 601 which has a unified cache. - * - * void __flush_dcache_icache(void *page) - */ -_GLOBAL(__flush_dcache_icache) -BEGIN_FTR_SECTION - blr /* for 601, do nothing */ -END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) - rlwinm r3,r3,0,0,19 /* Get page base address */ - li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ - mtctr r4 - mr r6,r3 -0: dcbst 0,r3 /* Write line to ram */ - addi r3,r3,L1_CACHE_BYTES - bdnz 0b - sync -#ifndef CONFIG_44x - /* We don't flush the icache on 44x. Those have a virtual icache - * and we don't have access to the virtual address here (it's - * not the page vaddr but where it's mapped in user space). The - * flushing of the icache on these is handled elsewhere, when - * a change in the address space occurs, before returning to - * user space - */ - mtctr r4 -1: icbi 0,r6 - addi r6,r6,L1_CACHE_BYTES - bdnz 1b - sync - isync -#endif /* CONFIG_44x */ - blr - -/* - * Flush a particular page from the data cache to RAM, identified - * by its physical address. We turn off the MMU so we can just use - * the physical address (this may be a highmem page without a kernel - * mapping). - * - * void __flush_dcache_icache_phys(unsigned long physaddr) - */ -_GLOBAL(__flush_dcache_icache_phys) -BEGIN_FTR_SECTION - blr /* for 601, do nothing */ -END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) - mfmsr r10 - rlwinm r0,r10,0,28,26 /* clear DR */ - mtmsr r0 - isync - rlwinm r3,r3,0,0,19 /* Get page base address */ - li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ - mtctr r4 - mr r6,r3 -0: dcbst 0,r3 /* Write line to ram */ - addi r3,r3,L1_CACHE_BYTES - bdnz 0b - sync - mtctr r4 -1: icbi 0,r6 - addi r6,r6,L1_CACHE_BYTES - bdnz 1b - sync - mtmsr r10 /* restore DR */ - isync - blr - -/* - * Clear pages using the dcbz instruction, which doesn't cause any - * memory traffic (except to write out any cache lines which get - * displaced). This only works on cacheable memory. - * - * void clear_pages(void *page, int order) ; - */ -_GLOBAL(clear_pages) - li r0,4096/L1_CACHE_BYTES - slw r0,r0,r4 - mtctr r0 -#ifdef CONFIG_8xx - li r4, 0 -1: stw r4, 0(r3) - stw r4, 4(r3) - stw r4, 8(r3) - stw r4, 12(r3) -#else -1: dcbz 0,r3 -#endif - addi r3,r3,L1_CACHE_BYTES - bdnz 1b - blr - -/* - * Copy a whole page. We use the dcbz instruction on the destination - * to reduce memory traffic (it eliminates the unnecessary reads of - * the destination into cache). This requires that the destination - * is cacheable. - */ -#define COPY_16_BYTES \ - lwz r6,4(r4); \ - lwz r7,8(r4); \ - lwz r8,12(r4); \ - lwzu r9,16(r4); \ - stw r6,4(r3); \ - stw r7,8(r3); \ - stw r8,12(r3); \ - stwu r9,16(r3) - -_GLOBAL(copy_page) - addi r3,r3,-4 - addi r4,r4,-4 - -#ifdef CONFIG_8xx - /* don't use prefetch on 8xx */ - li r0,4096/L1_CACHE_BYTES - mtctr r0 -1: COPY_16_BYTES - bdnz 1b - blr - -#else /* not 8xx, we can prefetch */ - li r5,4 - -#if MAX_COPY_PREFETCH > 1 - li r0,MAX_COPY_PREFETCH - li r11,4 - mtctr r0 -11: dcbt r11,r4 - addi r11,r11,L1_CACHE_BYTES - bdnz 11b -#else /* MAX_COPY_PREFETCH == 1 */ - dcbt r5,r4 - li r11,L1_CACHE_BYTES+4 -#endif /* MAX_COPY_PREFETCH */ - li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH - crclr 4*cr0+eq -2: - mtctr r0 -1: - dcbt r11,r4 - dcbz r5,r3 - COPY_16_BYTES -#if L1_CACHE_BYTES >= 32 - COPY_16_BYTES -#if L1_CACHE_BYTES >= 64 - COPY_16_BYTES - COPY_16_BYTES -#if L1_CACHE_BYTES >= 128 - COPY_16_BYTES - COPY_16_BYTES - COPY_16_BYTES - COPY_16_BYTES -#endif -#endif -#endif - bdnz 1b - beqlr - crnot 4*cr0+eq,4*cr0+eq - li r0,MAX_COPY_PREFETCH - li r11,4 - b 2b -#endif /* CONFIG_8xx */ - -/* - * void atomic_clear_mask(atomic_t mask, atomic_t *addr) - * void atomic_set_mask(atomic_t mask, atomic_t *addr); - */ -_GLOBAL(atomic_clear_mask) -10: lwarx r5,0,r4 - andc r5,r5,r3 - PPC405_ERR77(0,r4) - stwcx. r5,0,r4 - bne- 10b - blr -_GLOBAL(atomic_set_mask) -10: lwarx r5,0,r4 - or r5,r5,r3 - PPC405_ERR77(0,r4) - stwcx. r5,0,r4 - bne- 10b - blr - -/* - * I/O string operations - * - * insb(port, buf, len) - * outsb(port, buf, len) - * insw(port, buf, len) - * outsw(port, buf, len) - * insl(port, buf, len) - * outsl(port, buf, len) - * insw_ns(port, buf, len) - * outsw_ns(port, buf, len) - * insl_ns(port, buf, len) - * outsl_ns(port, buf, len) - * - * The *_ns versions don't do byte-swapping. - */ -_GLOBAL(_insb) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,1 - blelr- -00: lbz r5,0(r3) -01: eieio -02: stbu r5,1(r4) - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -_GLOBAL(_outsb) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,1 - blelr- -00: lbzu r5,1(r4) -01: stb r5,0(r3) -02: eieio - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -_GLOBAL(_insw_ns) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,2 - blelr- -00: lhz r5,0(r3) -01: eieio -02: sthu r5,2(r4) - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -_GLOBAL(_outsw_ns) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,2 - blelr- -00: lhzu r5,2(r4) -01: sth r5,0(r3) -02: eieio - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -_GLOBAL(_insl_ns) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,4 - blelr- -00: lwz r5,0(r3) -01: eieio -02: stwu r5,4(r4) - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -_GLOBAL(_outsl_ns) - cmpwi 0,r5,0 - mtctr r5 - subi r4,r4,4 - blelr- -00: lwzu r5,4(r4) -01: stw r5,0(r3) -02: eieio - ISYNC_8xx - .section .fixup,"ax" -03: blr - .text - .section __ex_table, "a" - .align 2 - .long 00b, 03b - .long 01b, 03b - .long 02b, 03b - .text - bdnz 00b - blr - -/* - * Extended precision shifts. - * - * Updated to be valid for shift counts from 0 to 63 inclusive. - * -- Gabriel - * - * R3/R4 has 64 bit value - * R5 has shift count - * result in R3/R4 - * - * ashrdi3: arithmetic right shift (sign propagation) - * lshrdi3: logical right shift - * ashldi3: left shift - */ -_GLOBAL(__ashrdi3) - subfic r6,r5,32 - srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count - addi r7,r5,32 # could be xori, or addi with -32 - slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) - rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0 - sraw r7,r3,r7 # t2 = MSW >> (count-32) - or r4,r4,r6 # LSW |= t1 - slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2 - sraw r3,r3,r5 # MSW = MSW >> count - or r4,r4,r7 # LSW |= t2 - blr - -_GLOBAL(__ashldi3) - subfic r6,r5,32 - slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count - addi r7,r5,32 # could be xori, or addi with -32 - srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count) - slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32) - or r3,r3,r6 # MSW |= t1 - slw r4,r4,r5 # LSW = LSW << count - or r3,r3,r7 # MSW |= t2 - blr - -_GLOBAL(__lshrdi3) - subfic r6,r5,32 - srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count - addi r7,r5,32 # could be xori, or addi with -32 - slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count) - srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32) - or r4,r4,r6 # LSW |= t1 - srw r3,r3,r5 # MSW = MSW >> count - or r4,r4,r7 # LSW |= t2 - blr - -_GLOBAL(abs) - srawi r4,r3,31 - xor r3,r3,r4 - sub r3,r3,r4 - blr - -_GLOBAL(_get_SP) - mr r3,r1 /* Close enough */ - blr - -/* - * Create a kernel thread - * kernel_thread(fn, arg, flags) - */ -_GLOBAL(kernel_thread) - stwu r1,-16(r1) - stw r30,8(r1) - stw r31,12(r1) - mr r30,r3 /* function */ - mr r31,r4 /* argument */ - ori r3,r5,CLONE_VM /* flags */ - oris r3,r3,CLONE_UNTRACED>>16 - li r4,0 /* new sp (unused) */ - li r0,__NR_clone - sc - cmpwi 0,r3,0 /* parent or child? */ - bne 1f /* return if parent */ - li r0,0 /* make top-level stack frame */ - stwu r0,-16(r1) - mtlr r30 /* fn addr in lr */ - mr r3,r31 /* load arg and call fn */ - PPC440EP_ERR42 - blrl - li r0,__NR_exit /* exit if function returns */ - li r3,0 - sc -1: lwz r30,8(r1) - lwz r31,12(r1) - addi r1,r1,16 - blr - -_GLOBAL(kernel_execve) - li r0,__NR_execve - sc - bnslr - neg r3,r3 - blr - -/* - * This routine is just here to keep GCC happy - sigh... - */ -_GLOBAL(__main) - blr - diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c deleted file mode 100644 index df3ef6db072c806b7295449ddf70a78499a6258c..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/pci.c +++ /dev/null @@ -1,1233 +0,0 @@ -/* - * Common prep/chrp pci routines. -- Cort - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -unsigned long isa_io_base = 0; -unsigned long isa_mem_base = 0; -unsigned long pci_dram_offset = 0; -int pcibios_assign_bus_offset = 1; - -void pcibios_make_OF_bus_map(void); - -static int pci_relocate_bridge_resource(struct pci_bus *bus, int i); -static int probe_resource(struct pci_bus *parent, struct resource *pr, - struct resource *res, struct resource **conflict); -static void update_bridge_base(struct pci_bus *bus, int i); -static void pcibios_fixup_resources(struct pci_dev* dev); -static void fixup_broken_pcnet32(struct pci_dev* dev); -static int reparent_resources(struct resource *parent, struct resource *res); -static void fixup_cpc710_pci64(struct pci_dev* dev); - -/* By default, we don't re-assign bus numbers. - */ -int pci_assign_all_buses; - -struct pci_controller* hose_head; -struct pci_controller** hose_tail = &hose_head; - -static int pci_bus_count; - -static void -fixup_broken_pcnet32(struct pci_dev* dev) -{ - if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { - dev->vendor = PCI_VENDOR_ID_AMD; - pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD); - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32); - -static void -fixup_cpc710_pci64(struct pci_dev* dev) -{ - /* Hide the PCI64 BARs from the kernel as their content doesn't - * fit well in the resource management - */ - dev->resource[0].start = dev->resource[0].end = 0; - dev->resource[0].flags = 0; - dev->resource[1].start = dev->resource[1].end = 0; - dev->resource[1].flags = 0; -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64); - -static void -pcibios_fixup_resources(struct pci_dev *dev) -{ - struct pci_controller* hose = (struct pci_controller *)dev->sysdata; - int i; - unsigned long offset; - - if (!hose) { - printk(KERN_ERR "No hose for PCI dev %s!\n", pci_name(dev)); - return; - } - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { - struct resource *res = dev->resource + i; - if (!res->flags) - continue; - if (res->end == 0xffffffff) { - DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n", - pci_name(dev), i, - (unsigned long long)res->start, - (unsigned long long)res->end); - res->end -= res->start; - res->start = 0; - res->flags |= IORESOURCE_UNSET; - continue; - } - offset = 0; - if (res->flags & IORESOURCE_MEM) { - offset = hose->pci_mem_offset; - } else if (res->flags & IORESOURCE_IO) { - offset = (unsigned long) hose->io_base_virt - - isa_io_base; - } - if (offset != 0) { - res->start += offset; - res->end += offset; -#ifdef DEBUG - printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n", - i, res->flags, pci_name(dev), - res->start - offset, res->start); -#endif - } - } - - /* Call machine specific resource fixup */ - if (ppc_md.pcibios_fixup_resources) - ppc_md.pcibios_fixup_resources(dev); -} -DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources); - -void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, - struct resource *res) -{ - unsigned long offset = 0; - struct pci_controller *hose = dev->sysdata; - - if (hose && res->flags & IORESOURCE_IO) - offset = (unsigned long)hose->io_base_virt - isa_io_base; - else if (hose && res->flags & IORESOURCE_MEM) - offset = hose->pci_mem_offset; - region->start = res->start - offset; - region->end = res->end - offset; -} -EXPORT_SYMBOL(pcibios_resource_to_bus); - -void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, - struct pci_bus_region *region) -{ - unsigned long offset = 0; - struct pci_controller *hose = dev->sysdata; - - if (hose && res->flags & IORESOURCE_IO) - offset = (unsigned long)hose->io_base_virt - isa_io_base; - else if (hose && res->flags & IORESOURCE_MEM) - offset = hose->pci_mem_offset; - res->start = region->start + offset; - res->end = region->end + offset; -} -EXPORT_SYMBOL(pcibios_bus_to_resource); - -/* - * We need to avoid collisions with `mirrored' VGA ports - * and other strange ISA hardware, so we always want the - * addresses to be allocated in the 0x000-0x0ff region - * modulo 0x400. - * - * Why? Because some silly external IO cards only decode - * the low 10 bits of the IO address. The 0x00-0xff region - * is reserved for motherboard devices that decode all 16 - * bits, so it's ok to allocate at, say, 0x2800-0x28ff, - * but we want to try to avoid allocating at 0x2900-0x2bff - * which might have be mirrored at 0x0100-0x03ff.. - */ -void pcibios_align_resource(void *data, struct resource *res, - resource_size_t size, resource_size_t align) -{ - struct pci_dev *dev = data; - - if (res->flags & IORESOURCE_IO) { - resource_size_t start = res->start; - - if (size > 0x100) { - printk(KERN_ERR "PCI: I/O Region %s/%d too large" - " (%lld bytes)\n", pci_name(dev), - dev->resource - res, (unsigned long long)size); - } - - if (start & 0x300) { - start = (start + 0x3ff) & ~0x3ff; - res->start = start; - } - } -} -EXPORT_SYMBOL(pcibios_align_resource); - -/* - * Handle resources of PCI devices. If the world were perfect, we could - * just allocate all the resource regions and do nothing more. It isn't. - * On the other hand, we cannot just re-allocate all devices, as it would - * require us to know lots of host bridge internals. So we attempt to - * keep as much of the original configuration as possible, but tweak it - * when it's found to be wrong. - * - * Known BIOS problems we have to work around: - * - I/O or memory regions not configured - * - regions configured, but not enabled in the command register - * - bogus I/O addresses above 64K used - * - expansion ROMs left enabled (this may sound harmless, but given - * the fact the PCI specs explicitly allow address decoders to be - * shared between expansion ROMs and other resource regions, it's - * at least dangerous) - * - * Our solution: - * (1) Allocate resources for all buses behind PCI-to-PCI bridges. - * This gives us fixed barriers on where we can allocate. - * (2) Allocate resources for all enabled devices. If there is - * a collision, just mark the resource as unallocated. Also - * disable expansion ROMs during this step. - * (3) Try to allocate resources for disabled devices. If the - * resources were assigned correctly, everything goes well, - * if they weren't, they won't disturb allocation of other - * resources. - * (4) Assign new addresses to resources which were either - * not configured at all or misconfigured. If explicitly - * requested by the user, configure expansion ROM address - * as well. - */ - -static void __init -pcibios_allocate_bus_resources(struct list_head *bus_list) -{ - struct pci_bus *bus; - int i; - struct resource *res, *pr; - - /* Depth-First Search on bus tree */ - list_for_each_entry(bus, bus_list, node) { - for (i = 0; i < 4; ++i) { - if ((res = bus->resource[i]) == NULL || !res->flags - || res->start > res->end) - continue; - if (bus->parent == NULL) - pr = (res->flags & IORESOURCE_IO)? - &ioport_resource: &iomem_resource; - else { - pr = pci_find_parent_resource(bus->self, res); - if (pr == res) { - /* this happens when the generic PCI - * code (wrongly) decides that this - * bridge is transparent -- paulus - */ - continue; - } - } - - DBG("PCI: bridge rsrc %llx..%llx (%lx), parent %p\n", - (unsigned long long)res->start, - (unsigned long long)res->end, res->flags, pr); - if (pr) { - if (request_resource(pr, res) == 0) - continue; - /* - * Must be a conflict with an existing entry. - * Move that entry (or entries) under the - * bridge resource and try again. - */ - if (reparent_resources(pr, res) == 0) - continue; - } - printk(KERN_ERR "PCI: Cannot allocate resource region " - "%d of PCI bridge %d\n", i, bus->number); - if (pci_relocate_bridge_resource(bus, i)) - bus->resource[i] = NULL; - } - pcibios_allocate_bus_resources(&bus->children); - } -} - -/* - * Reparent resource children of pr that conflict with res - * under res, and make res replace those children. - */ -static int __init -reparent_resources(struct resource *parent, struct resource *res) -{ - struct resource *p, **pp; - struct resource **firstpp = NULL; - - for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) { - if (p->end < res->start) - continue; - if (res->end < p->start) - break; - if (p->start < res->start || p->end > res->end) - return -1; /* not completely contained */ - if (firstpp == NULL) - firstpp = pp; - } - if (firstpp == NULL) - return -1; /* didn't find any conflicting entries? */ - res->parent = parent; - res->child = *firstpp; - res->sibling = *pp; - *firstpp = res; - *pp = NULL; - for (p = res->child; p != NULL; p = p->sibling) { - p->parent = res; - DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n", - p->name, (unsigned long long)p->start, - (unsigned long long)p->end, res->name); - } - return 0; -} - -/* - * A bridge has been allocated a range which is outside the range - * of its parent bridge, so it needs to be moved. - */ -static int __init -pci_relocate_bridge_resource(struct pci_bus *bus, int i) -{ - struct resource *res, *pr, *conflict; - unsigned long try, size; - int j; - struct pci_bus *parent = bus->parent; - - if (parent == NULL) { - /* shouldn't ever happen */ - printk(KERN_ERR "PCI: can't move host bridge resource\n"); - return -1; - } - res = bus->resource[i]; - if (res == NULL) - return -1; - pr = NULL; - for (j = 0; j < 4; j++) { - struct resource *r = parent->resource[j]; - if (!r) - continue; - if ((res->flags ^ r->flags) & (IORESOURCE_IO | IORESOURCE_MEM)) - continue; - if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH)) { - pr = r; - break; - } - if (res->flags & IORESOURCE_PREFETCH) - pr = r; - } - if (pr == NULL) - return -1; - size = res->end - res->start; - if (pr->start > pr->end || size > pr->end - pr->start) - return -1; - try = pr->end; - for (;;) { - res->start = try - size; - res->end = try; - if (probe_resource(bus->parent, pr, res, &conflict) == 0) - break; - if (conflict->start <= pr->start + size) - return -1; - try = conflict->start - 1; - } - if (request_resource(pr, res)) { - DBG(KERN_ERR "PCI: huh? couldn't move to %llx..%llx\n", - (unsigned long long)res->start, - (unsigned long long)res->end); - return -1; /* "can't happen" */ - } - update_bridge_base(bus, i); - printk(KERN_INFO "PCI: bridge %d resource %d moved to %llx..%llx\n", - bus->number, i, (unsigned long long)res->start, - (unsigned long long)res->end); - return 0; -} - -static int __init -probe_resource(struct pci_bus *parent, struct resource *pr, - struct resource *res, struct resource **conflict) -{ - struct pci_bus *bus; - struct pci_dev *dev; - struct resource *r; - int i; - - for (r = pr->child; r != NULL; r = r->sibling) { - if (r->end >= res->start && res->end >= r->start) { - *conflict = r; - return 1; - } - } - list_for_each_entry(bus, &parent->children, node) { - for (i = 0; i < 4; ++i) { - if ((r = bus->resource[i]) == NULL) - continue; - if (!r->flags || r->start > r->end || r == res) - continue; - if (pci_find_parent_resource(bus->self, r) != pr) - continue; - if (r->end >= res->start && res->end >= r->start) { - *conflict = r; - return 1; - } - } - } - list_for_each_entry(dev, &parent->devices, bus_list) { - for (i = 0; i < 6; ++i) { - r = &dev->resource[i]; - if (!r->flags || (r->flags & IORESOURCE_UNSET)) - continue; - if (pci_find_parent_resource(dev, r) != pr) - continue; - if (r->end >= res->start && res->end >= r->start) { - *conflict = r; - return 1; - } - } - } - return 0; -} - -static void __init -update_bridge_base(struct pci_bus *bus, int i) -{ - struct resource *res = bus->resource[i]; - u8 io_base_lo, io_limit_lo; - u16 mem_base, mem_limit; - u16 cmd; - unsigned long start, end, off; - struct pci_dev *dev = bus->self; - struct pci_controller *hose = dev->sysdata; - - if (!hose) { - printk("update_bridge_base: no hose?\n"); - return; - } - pci_read_config_word(dev, PCI_COMMAND, &cmd); - pci_write_config_word(dev, PCI_COMMAND, - cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)); - if (res->flags & IORESOURCE_IO) { - off = (unsigned long) hose->io_base_virt - isa_io_base; - start = res->start - off; - end = res->end - off; - io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK; - io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK; - if (end > 0xffff) { - pci_write_config_word(dev, PCI_IO_BASE_UPPER16, - start >> 16); - pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16, - end >> 16); - io_base_lo |= PCI_IO_RANGE_TYPE_32; - } else - io_base_lo |= PCI_IO_RANGE_TYPE_16; - pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo); - pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo); - - } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)) - == IORESOURCE_MEM) { - off = hose->pci_mem_offset; - mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK; - mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK; - pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base); - pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit); - - } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)) - == (IORESOURCE_MEM | IORESOURCE_PREFETCH)) { - off = hose->pci_mem_offset; - mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK; - mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK; - pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base); - pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit); - - } else { - DBG(KERN_ERR "PCI: ugh, bridge %s res %d has flags=%lx\n", - pci_name(dev), i, res->flags); - } - pci_write_config_word(dev, PCI_COMMAND, cmd); -} - -static inline void alloc_resource(struct pci_dev *dev, int idx) -{ - struct resource *pr, *r = &dev->resource[idx]; - - DBG("PCI:%s: Resource %d: %016llx-%016llx (f=%lx)\n", - pci_name(dev), idx, (unsigned long long)r->start, - (unsigned long long)r->end, r->flags); - pr = pci_find_parent_resource(dev, r); - if (!pr || request_resource(pr, r) < 0) { - printk(KERN_ERR "PCI: Cannot allocate resource region %d" - " of device %s\n", idx, pci_name(dev)); - if (pr) - DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n", - pr, (unsigned long long)pr->start, - (unsigned long long)pr->end, pr->flags); - /* We'll assign a new address later */ - r->flags |= IORESOURCE_UNSET; - r->end -= r->start; - r->start = 0; - } -} - -static void __init -pcibios_allocate_resources(int pass) -{ - struct pci_dev *dev = NULL; - int idx, disabled; - u16 command; - struct resource *r; - - for_each_pci_dev(dev) { - pci_read_config_word(dev, PCI_COMMAND, &command); - for (idx = 0; idx < 6; idx++) { - r = &dev->resource[idx]; - if (r->parent) /* Already allocated */ - continue; - if (!r->flags || (r->flags & IORESOURCE_UNSET)) - continue; /* Not assigned at all */ - if (r->flags & IORESOURCE_IO) - disabled = !(command & PCI_COMMAND_IO); - else - disabled = !(command & PCI_COMMAND_MEMORY); - if (pass == disabled) - alloc_resource(dev, idx); - } - if (pass) - continue; - r = &dev->resource[PCI_ROM_RESOURCE]; - if (r->flags & IORESOURCE_ROM_ENABLE) { - /* Turn the ROM off, leave the resource region, but keep it unregistered. */ - u32 reg; - DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); - r->flags &= ~IORESOURCE_ROM_ENABLE; - pci_read_config_dword(dev, dev->rom_base_reg, ®); - pci_write_config_dword(dev, dev->rom_base_reg, - reg & ~PCI_ROM_ADDRESS_ENABLE); - } - } -} - -static void __init -pcibios_assign_resources(void) -{ - struct pci_dev *dev = NULL; - int idx; - struct resource *r; - - for_each_pci_dev(dev) { - int class = dev->class >> 8; - - /* Don't touch classless devices and host bridges */ - if (!class || class == PCI_CLASS_BRIDGE_HOST) - continue; - - for (idx = 0; idx < 6; idx++) { - r = &dev->resource[idx]; - - /* - * We shall assign a new address to this resource, - * either because the BIOS (sic) forgot to do so - * or because we have decided the old address was - * unusable for some reason. - */ - if ((r->flags & IORESOURCE_UNSET) && r->end && - (!ppc_md.pcibios_enable_device_hook || - !ppc_md.pcibios_enable_device_hook(dev, 1))) { - r->flags &= ~IORESOURCE_UNSET; - pci_assign_resource(dev, idx); - } - } - -#if 0 /* don't assign ROMs */ - r = &dev->resource[PCI_ROM_RESOURCE]; - r->end -= r->start; - r->start = 0; - if (r->end) - pci_assign_resource(dev, PCI_ROM_RESOURCE); -#endif - } -} - - -static int next_controller_index; - -struct pci_controller * __init -pcibios_alloc_controller(void) -{ - struct pci_controller *hose; - - hose = (struct pci_controller *)alloc_bootmem(sizeof(*hose)); - memset(hose, 0, sizeof(struct pci_controller)); - - *hose_tail = hose; - hose_tail = &hose->next; - - hose->index = next_controller_index++; - - return hose; -} - -void pcibios_make_OF_bus_map(void) -{ -} - -static int __init -pcibios_init(void) -{ - struct pci_controller *hose; - struct pci_bus *bus; - int next_busno; - - printk(KERN_INFO "PCI: Probing PCI hardware\n"); - - /* Scan all of the recorded PCI controllers. */ - for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { - if (pci_assign_all_buses) - hose->first_busno = next_busno; - hose->last_busno = 0xff; - bus = pci_scan_bus(hose->first_busno, hose->ops, hose); - hose->last_busno = bus->subordinate; - if (pci_assign_all_buses || next_busno <= hose->last_busno) - next_busno = hose->last_busno + pcibios_assign_bus_offset; - } - pci_bus_count = next_busno; - - /* OpenFirmware based machines need a map of OF bus - * numbers vs. kernel bus numbers since we may have to - * remap them. - */ - if (pci_assign_all_buses && have_of) - pcibios_make_OF_bus_map(); - - /* Do machine dependent PCI interrupt routing */ - if (ppc_md.pci_swizzle && ppc_md.pci_map_irq) - pci_fixup_irqs(ppc_md.pci_swizzle, ppc_md.pci_map_irq); - - /* Call machine dependent fixup */ - if (ppc_md.pcibios_fixup) - ppc_md.pcibios_fixup(); - - /* Allocate and assign resources */ - pcibios_allocate_bus_resources(&pci_root_buses); - pcibios_allocate_resources(0); - pcibios_allocate_resources(1); - pcibios_assign_resources(); - - /* Call machine dependent post-init code */ - if (ppc_md.pcibios_after_init) - ppc_md.pcibios_after_init(); - - return 0; -} - -subsys_initcall(pcibios_init); - -unsigned char __init -common_swizzle(struct pci_dev *dev, unsigned char *pinp) -{ - struct pci_controller *hose = dev->sysdata; - - if (dev->bus->number != hose->first_busno) { - u8 pin = *pinp; - do { - pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn)); - /* Move up the chain of bridges. */ - dev = dev->bus->self; - } while (dev->bus->self); - *pinp = pin; - - /* The slot is the idsel of the last bridge. */ - } - return PCI_SLOT(dev->devfn); -} - -unsigned long resource_fixup(struct pci_dev * dev, struct resource * res, - unsigned long start, unsigned long size) -{ - return start; -} - -void __init pcibios_fixup_bus(struct pci_bus *bus) -{ - struct pci_controller *hose = (struct pci_controller *) bus->sysdata; - unsigned long io_offset; - struct resource *res; - int i; - - io_offset = (unsigned long)hose->io_base_virt - isa_io_base; - if (bus->parent == NULL) { - /* This is a host bridge - fill in its resources */ - hose->bus = bus; - - bus->resource[0] = res = &hose->io_resource; - if (!res->flags) { - if (io_offset) - printk(KERN_ERR "I/O resource not set for host" - " bridge %d\n", hose->index); - res->start = 0; - res->end = IO_SPACE_LIMIT; - res->flags = IORESOURCE_IO; - } - res->start += io_offset; - res->end += io_offset; - - for (i = 0; i < 3; ++i) { - res = &hose->mem_resources[i]; - if (!res->flags) { - if (i > 0) - continue; - printk(KERN_ERR "Memory resource not set for " - "host bridge %d\n", hose->index); - res->start = hose->pci_mem_offset; - res->end = ~0U; - res->flags = IORESOURCE_MEM; - } - bus->resource[i+1] = res; - } - } else { - /* This is a subordinate bridge */ - pci_read_bridge_bases(bus); - - for (i = 0; i < 4; ++i) { - if ((res = bus->resource[i]) == NULL) - continue; - if (!res->flags) - continue; - if (io_offset && (res->flags & IORESOURCE_IO)) { - res->start += io_offset; - res->end += io_offset; - } else if (hose->pci_mem_offset - && (res->flags & IORESOURCE_MEM)) { - res->start += hose->pci_mem_offset; - res->end += hose->pci_mem_offset; - } - } - } - - if (ppc_md.pcibios_fixup_bus) - ppc_md.pcibios_fixup_bus(bus); -} - -char __init *pcibios_setup(char *str) -{ - return str; -} - -/* the next one is stolen from the alpha port... */ -void __init -pcibios_update_irq(struct pci_dev *dev, int irq) -{ - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); - /* XXX FIXME - update OF device tree node interrupt property */ -} - -int pcibios_enable_device(struct pci_dev *dev, int mask) -{ - if (ppc_md.pcibios_enable_device_hook) - if (ppc_md.pcibios_enable_device_hook(dev, 0)) - return -EINVAL; - - return pci_enable_resources(dev, mask); -} - -struct pci_controller* -pci_bus_to_hose(int bus) -{ - struct pci_controller* hose = hose_head; - - for (; hose; hose = hose->next) - if (bus >= hose->first_busno && bus <= hose->last_busno) - return hose; - return NULL; -} - -void __iomem * -pci_bus_io_base(unsigned int bus) -{ - struct pci_controller *hose; - - hose = pci_bus_to_hose(bus); - if (!hose) - return NULL; - return hose->io_base_virt; -} - -unsigned long -pci_bus_io_base_phys(unsigned int bus) -{ - struct pci_controller *hose; - - hose = pci_bus_to_hose(bus); - if (!hose) - return 0; - return hose->io_base_phys; -} - -unsigned long -pci_bus_mem_base_phys(unsigned int bus) -{ - struct pci_controller *hose; - - hose = pci_bus_to_hose(bus); - if (!hose) - return 0; - return hose->pci_mem_offset; -} - -unsigned long -pci_resource_to_bus(struct pci_dev *pdev, struct resource *res) -{ - /* Hack alert again ! See comments in chrp_pci.c - */ - struct pci_controller* hose = - (struct pci_controller *)pdev->sysdata; - if (hose && res->flags & IORESOURCE_MEM) - return res->start - hose->pci_mem_offset; - /* We may want to do something with IOs here... */ - return res->start; -} - - -static struct resource *__pci_mmap_make_offset(struct pci_dev *dev, - resource_size_t *offset, - enum pci_mmap_state mmap_state) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - unsigned long io_offset = 0; - int i, res_bit; - - if (hose == 0) - return NULL; /* should never happen */ - - /* If memory, add on the PCI bridge address offset */ - if (mmap_state == pci_mmap_mem) { -#if 0 /* See comment in pci_resource_to_user() for why this is disabled */ - *offset += hose->pci_mem_offset; -#endif - res_bit = IORESOURCE_MEM; - } else { - io_offset = hose->io_base_virt - ___IO_BASE; - *offset += io_offset; - res_bit = IORESOURCE_IO; - } - - /* - * Check that the offset requested corresponds to one of the - * resources of the device. - */ - for (i = 0; i <= PCI_ROM_RESOURCE; i++) { - struct resource *rp = &dev->resource[i]; - int flags = rp->flags; - - /* treat ROM as memory (should be already) */ - if (i == PCI_ROM_RESOURCE) - flags |= IORESOURCE_MEM; - - /* Active and same type? */ - if ((flags & res_bit) == 0) - continue; - - /* In the range of this resource? */ - if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end) - continue; - - /* found it! construct the final physical address */ - if (mmap_state == pci_mmap_io) - *offset += hose->io_base_phys - io_offset; - return rp; - } - - return NULL; -} - -/* - * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci - * device mapping. - */ -static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, - pgprot_t protection, - enum pci_mmap_state mmap_state, - int write_combine) -{ - unsigned long prot = pgprot_val(protection); - - /* Write combine is always 0 on non-memory space mappings. On - * memory space, if the user didn't pass 1, we check for a - * "prefetchable" resource. This is a bit hackish, but we use - * this to workaround the inability of /sysfs to provide a write - * combine bit - */ - if (mmap_state != pci_mmap_mem) - write_combine = 0; - else if (write_combine == 0) { - if (rp->flags & IORESOURCE_PREFETCH) - write_combine = 1; - } - - /* XXX would be nice to have a way to ask for write-through */ - prot |= _PAGE_NO_CACHE; - if (write_combine) - prot &= ~_PAGE_GUARDED; - else - prot |= _PAGE_GUARDED; - - printk("PCI map for %s:%llx, prot: %lx\n", pci_name(dev), - (unsigned long long)rp->start, prot); - - return __pgprot(prot); -} - -/* - * This one is used by /dev/mem and fbdev who have no clue about the - * PCI device, it tries to find the PCI device first and calls the - * above routine - */ -pgprot_t pci_phys_mem_access_prot(struct file *file, - unsigned long pfn, - unsigned long size, - pgprot_t protection) -{ - struct pci_dev *pdev = NULL; - struct resource *found = NULL; - unsigned long prot = pgprot_val(protection); - unsigned long offset = pfn << PAGE_SHIFT; - int i; - - if (page_is_ram(pfn)) - return prot; - - prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; - - for_each_pci_dev(pdev) { - for (i = 0; i <= PCI_ROM_RESOURCE; i++) { - struct resource *rp = &pdev->resource[i]; - int flags = rp->flags; - - /* Active and same type? */ - if ((flags & IORESOURCE_MEM) == 0) - continue; - /* In the range of this resource? */ - if (offset < (rp->start & PAGE_MASK) || - offset > rp->end) - continue; - found = rp; - break; - } - if (found) - break; - } - if (found) { - if (found->flags & IORESOURCE_PREFETCH) - prot &= ~_PAGE_GUARDED; - pci_dev_put(pdev); - } - - DBG("non-PCI map for %lx, prot: %lx\n", offset, prot); - - return __pgprot(prot); -} - - -/* - * Perform the actual remap of the pages for a PCI device mapping, as - * appropriate for this architecture. The region in the process to map - * is described by vm_start and vm_end members of VMA, the base physical - * address is found in vm_pgoff. - * The pci device structure is provided so that architectures may make mapping - * decisions on a per-device or per-bus basis. - * - * Returns a negative error code on failure, zero on success. - */ -int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, - int write_combine) -{ - resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT; - struct resource *rp; - int ret; - - rp = __pci_mmap_make_offset(dev, &offset, mmap_state); - if (rp == NULL) - return -EINVAL; - - vma->vm_pgoff = offset >> PAGE_SHIFT; - vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp, - vma->vm_page_prot, - mmap_state, write_combine); - - ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, - vma->vm_end - vma->vm_start, vma->vm_page_prot); - - return ret; -} - -/* Obsolete functions. Should be removed once the symbios driver - * is fixed - */ -unsigned long -phys_to_bus(unsigned long pa) -{ - struct pci_controller *hose; - int i; - - for (hose = hose_head; hose; hose = hose->next) { - for (i = 0; i < 3; ++i) { - if (pa >= hose->mem_resources[i].start - && pa <= hose->mem_resources[i].end) { - /* - * XXX the hose->pci_mem_offset really - * only applies to mem_resources[0]. - * We need a way to store an offset for - * the others. -- paulus - */ - if (i == 0) - pa -= hose->pci_mem_offset; - return pa; - } - } - } - /* hmmm, didn't find it */ - return 0; -} - -unsigned long -pci_phys_to_bus(unsigned long pa, int busnr) -{ - struct pci_controller* hose = pci_bus_to_hose(busnr); - if (!hose) - return pa; - return pa - hose->pci_mem_offset; -} - -unsigned long -pci_bus_to_phys(unsigned int ba, int busnr) -{ - struct pci_controller* hose = pci_bus_to_hose(busnr); - if (!hose) - return ba; - return ba + hose->pci_mem_offset; -} - -/* Provide information on locations of various I/O regions in physical - * memory. Do this on a per-card basis so that we choose the right - * root bridge. - * Note that the returned IO or memory base is a physical address - */ - -long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) -{ - struct pci_controller* hose; - long result = -EOPNOTSUPP; - - hose = pci_bus_to_hose(bus); - if (!hose) - return -ENODEV; - - switch (which) { - case IOBASE_BRIDGE_NUMBER: - return (long)hose->first_busno; - case IOBASE_MEMORY: - return (long)hose->pci_mem_offset; - case IOBASE_IO: - return (long)hose->io_base_phys; - case IOBASE_ISA_IO: - return (long)isa_io_base; - case IOBASE_ISA_MEM: - return (long)isa_mem_base; - } - - return result; -} - -void pci_resource_to_user(const struct pci_dev *dev, int bar, - const struct resource *rsrc, - resource_size_t *start, resource_size_t *end) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - resource_size_t offset = 0; - - if (hose == NULL) - return; - - if (rsrc->flags & IORESOURCE_IO) - offset = (unsigned long)hose->io_base_virt - _IO_BASE; - - /* We pass a fully fixed up address to userland for MMIO instead of - * a BAR value because X is lame and expects to be able to use that - * to pass to /dev/mem ! - * - * That means that we'll have potentially 64 bits values where some - * userland apps only expect 32 (like X itself since it thinks only - * Sparc has 64 bits MMIO) but if we don't do that, we break it on - * 32 bits CHRPs :-( - * - * Hopefully, the sysfs insterface is immune to that gunk. Once X - * has been fixed (and the fix spread enough), we can re-enable the - * 2 lines below and pass down a BAR value to userland. In that case - * we'll also have to re-enable the matching code in - * __pci_mmap_make_offset(). - * - * BenH. - */ -#if 0 - else if (rsrc->flags & IORESOURCE_MEM) - offset = hose->pci_mem_offset; -#endif - - *start = rsrc->start - offset; - *end = rsrc->end - offset; -} - -void __init pci_init_resource(struct resource *res, resource_size_t start, - resource_size_t end, int flags, char *name) -{ - res->start = start; - res->end = end; - res->flags = flags; - res->name = name; - res->parent = NULL; - res->sibling = NULL; - res->child = NULL; -} - -void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max) -{ - resource_size_t start = pci_resource_start(dev, bar); - resource_size_t len = pci_resource_len(dev, bar); - unsigned long flags = pci_resource_flags(dev, bar); - - if (!len) - return NULL; - if (max && len > max) - len = max; - if (flags & IORESOURCE_IO) - return ioport_map(start, len); - if (flags & IORESOURCE_MEM) - /* Not checking IORESOURCE_CACHEABLE because PPC does - * not currently distinguish between ioremap and - * ioremap_nocache. - */ - return ioremap(start, len); - /* What? */ - return NULL; -} - -void pci_iounmap(struct pci_dev *dev, void __iomem *addr) -{ - /* Nothing to do */ -} -EXPORT_SYMBOL(pci_iomap); -EXPORT_SYMBOL(pci_iounmap); - -unsigned long pci_address_to_pio(phys_addr_t address) -{ - struct pci_controller* hose = hose_head; - - for (; hose; hose = hose->next) { - unsigned int size = hose->io_resource.end - - hose->io_resource.start + 1; - if (address >= hose->io_base_phys && - address < (hose->io_base_phys + size)) { - unsigned long base = - (unsigned long)hose->io_base_virt - _IO_BASE; - return base + (address - hose->io_base_phys); - } - } - return (unsigned int)-1; -} -EXPORT_SYMBOL(pci_address_to_pio); - -/* - * Null PCI config access functions, for the case when we can't - * find a hose. - */ -#define NULL_PCI_OP(rw, size, type) \ -static int \ -null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \ -{ \ - return PCIBIOS_DEVICE_NOT_FOUND; \ -} - -static int -null_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 *val) -{ - return PCIBIOS_DEVICE_NOT_FOUND; -} - -static int -null_write_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 val) -{ - return PCIBIOS_DEVICE_NOT_FOUND; -} - -static struct pci_ops null_pci_ops = -{ - null_read_config, - null_write_config -}; - -/* - * These functions are used early on before PCI scanning is done - * and all of the pci_dev and pci_bus structures have been created. - */ -static struct pci_bus * -fake_pci_bus(struct pci_controller *hose, int busnr) -{ - static struct pci_bus bus; - - if (hose == 0) { - hose = pci_bus_to_hose(busnr); - if (hose == 0) - printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr); - } - bus.number = busnr; - bus.sysdata = hose; - bus.ops = hose? hose->ops: &null_pci_ops; - return &bus; -} - -#define EARLY_PCI_OP(rw, size, type) \ -int early_##rw##_config_##size(struct pci_controller *hose, int bus, \ - int devfn, int offset, type value) \ -{ \ - return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \ - devfn, offset, value); \ -} - -EARLY_PCI_OP(read, byte, u8 *) -EARLY_PCI_OP(read, word, u16 *) -EARLY_PCI_OP(read, dword, u32 *) -EARLY_PCI_OP(write, byte, u8) -EARLY_PCI_OP(write, word, u16) -EARLY_PCI_OP(write, dword, u32) diff --git a/arch/ppc/kernel/ppc-stub.c b/arch/ppc/kernel/ppc-stub.c deleted file mode 100644 index 5f9ee7bb67ec32b7bca5557bde3dd0119a9b54d2..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/ppc-stub.c +++ /dev/null @@ -1,866 +0,0 @@ -/* - * ppc-stub.c: KGDB support for the Linux kernel. - * - * adapted from arch/sparc/kernel/sparc-stub.c for the PowerPC - * some stuff borrowed from Paul Mackerras' xmon - * Copyright (C) 1998 Michael AK Tesch (tesch@cs.wisc.edu) - * - * Modifications to run under Linux - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * - * This file originally came from the gdb sources, and the - * copyright notices have been retained below. - */ - -/**************************************************************************** - - THIS SOFTWARE IS NOT COPYRIGHTED - - HP offers the following for use in the public domain. HP makes no - warranty with regard to the software or its performance and the - user accepts the software "AS IS" with all faults. - - HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD - TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES - OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. - -****************************************************************************/ - -/**************************************************************************** - * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $ - * - * Module name: remcom.c $ - * Revision: 1.34 $ - * Date: 91/03/09 12:29:49 $ - * Contributor: Lake Stevens Instrument Division$ - * - * Description: low level support for gdb debugger. $ - * - * Considerations: only works on target hardware $ - * - * Written by: Glenn Engel $ - * ModuleState: Experimental $ - * - * NOTES: See Below $ - * - * Modified for SPARC by Stu Grossman, Cygnus Support. - * - * This code has been extensively tested on the Fujitsu SPARClite demo board. - * - * To enable debugger support, two things need to happen. One, a - * call to set_debug_traps() is necessary in order to allow any breakpoints - * or error conditions to be properly intercepted and reported to gdb. - * Two, a breakpoint needs to be generated to begin communication. This - * is most easily accomplished by a call to breakpoint(). Breakpoint() - * simulates a breakpoint by executing a trap #1. - * - ************* - * - * The following gdb commands are supported: - * - * command function Return value - * - * g return the value of the CPU registers hex data or ENN - * G set the value of the CPU registers OK or ENN - * qOffsets Get section offsets. Reply is Text=xxx;Data=yyy;Bss=zzz - * - * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN - * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN - * - * c Resume at current address SNN ( signal NN) - * cAA..AA Continue at address AA..AA SNN - * - * s Step one instruction SNN - * sAA..AA Step one instruction from AA..AA SNN - * - * k kill - * - * ? What was the last sigval ? SNN (signal NN) - * - * bBB..BB Set baud rate to BB..BB OK or BNN, then sets - * baud rate - * - * All commands and responses are sent with a packet which includes a - * checksum. A packet consists of - * - * $#. - * - * where - * :: - * :: > - * - * When a packet is received, it is first acknowledged with either '+' or '-'. - * '+' indicates a successful transfer. '-' indicates a failed transfer. - * - * Example: - * - * Host: Reply: - * $m0,10#2a +$00010203040506070809101112131415#42 - * - ****************************************************************************/ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -void breakinst(void); - -/* - * BUFMAX defines the maximum number of characters in inbound/outbound buffers - * at least NUMREGBYTES*2 are needed for register packets - */ -#define BUFMAX 2048 -static char remcomInBuffer[BUFMAX]; -static char remcomOutBuffer[BUFMAX]; - -static int initialized; -static int kgdb_active; -static int kgdb_started; -static u_int fault_jmp_buf[100]; -static int kdebug; - - -static const char hexchars[]="0123456789abcdef"; - -/* Place where we save old trap entries for restoration - sparc*/ -/* struct tt_entry kgdb_savettable[256]; */ -/* typedef void (*trapfunc_t)(void); */ - -static void kgdb_fault_handler(struct pt_regs *regs); -static int handle_exception (struct pt_regs *regs); - -#if 0 -/* Install an exception handler for kgdb */ -static void exceptionHandler(int tnum, unsigned int *tfunc) -{ - /* We are dorking with a live trap table, all irqs off */ -} -#endif - -int -kgdb_setjmp(long *buf) -{ - asm ("mflr 0; stw 0,0(%0);" - "stw 1,4(%0); stw 2,8(%0);" - "mfcr 0; stw 0,12(%0);" - "stmw 13,16(%0)" - : : "r" (buf)); - /* XXX should save fp regs as well */ - return 0; -} -void -kgdb_longjmp(long *buf, int val) -{ - if (val == 0) - val = 1; - asm ("lmw 13,16(%0);" - "lwz 0,12(%0); mtcrf 0x38,0;" - "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);" - "mtlr 0; mr 3,%1" - : : "r" (buf), "r" (val)); -} -/* Convert ch from a hex digit to an int */ -static int -hex(unsigned char ch) -{ - if (ch >= 'a' && ch <= 'f') - return ch-'a'+10; - if (ch >= '0' && ch <= '9') - return ch-'0'; - if (ch >= 'A' && ch <= 'F') - return ch-'A'+10; - return -1; -} - -/* Convert the memory pointed to by mem into hex, placing result in buf. - * Return a pointer to the last char put in buf (null), in case of mem fault, - * return 0. - */ -static unsigned char * -mem2hex(const char *mem, char *buf, int count) -{ - unsigned char ch; - unsigned short tmp_s; - unsigned long tmp_l; - - if (kgdb_setjmp((long*)fault_jmp_buf) == 0) { - debugger_fault_handler = kgdb_fault_handler; - - /* Accessing 16 bit and 32 bit objects in a single - ** load instruction is required to avoid bad side - ** effects for some IO registers. - */ - - if ((count == 2) && (((long)mem & 1) == 0)) { - tmp_s = *(unsigned short *)mem; - mem += 2; - *buf++ = hexchars[(tmp_s >> 12) & 0xf]; - *buf++ = hexchars[(tmp_s >> 8) & 0xf]; - *buf++ = hexchars[(tmp_s >> 4) & 0xf]; - *buf++ = hexchars[tmp_s & 0xf]; - - } else if ((count == 4) && (((long)mem & 3) == 0)) { - tmp_l = *(unsigned int *)mem; - mem += 4; - *buf++ = hexchars[(tmp_l >> 28) & 0xf]; - *buf++ = hexchars[(tmp_l >> 24) & 0xf]; - *buf++ = hexchars[(tmp_l >> 20) & 0xf]; - *buf++ = hexchars[(tmp_l >> 16) & 0xf]; - *buf++ = hexchars[(tmp_l >> 12) & 0xf]; - *buf++ = hexchars[(tmp_l >> 8) & 0xf]; - *buf++ = hexchars[(tmp_l >> 4) & 0xf]; - *buf++ = hexchars[tmp_l & 0xf]; - - } else { - while (count-- > 0) { - ch = *mem++; - *buf++ = hexchars[ch >> 4]; - *buf++ = hexchars[ch & 0xf]; - } - } - - } else { - /* error condition */ - } - debugger_fault_handler = NULL; - *buf = 0; - return buf; -} - -/* convert the hex array pointed to by buf into binary to be placed in mem - * return a pointer to the character AFTER the last byte written. -*/ -static char * -hex2mem(char *buf, char *mem, int count) -{ - unsigned char ch; - int i; - char *orig_mem; - unsigned short tmp_s; - unsigned long tmp_l; - - orig_mem = mem; - - if (kgdb_setjmp((long*)fault_jmp_buf) == 0) { - debugger_fault_handler = kgdb_fault_handler; - - /* Accessing 16 bit and 32 bit objects in a single - ** store instruction is required to avoid bad side - ** effects for some IO registers. - */ - - if ((count == 2) && (((long)mem & 1) == 0)) { - tmp_s = hex(*buf++) << 12; - tmp_s |= hex(*buf++) << 8; - tmp_s |= hex(*buf++) << 4; - tmp_s |= hex(*buf++); - - *(unsigned short *)mem = tmp_s; - mem += 2; - - } else if ((count == 4) && (((long)mem & 3) == 0)) { - tmp_l = hex(*buf++) << 28; - tmp_l |= hex(*buf++) << 24; - tmp_l |= hex(*buf++) << 20; - tmp_l |= hex(*buf++) << 16; - tmp_l |= hex(*buf++) << 12; - tmp_l |= hex(*buf++) << 8; - tmp_l |= hex(*buf++) << 4; - tmp_l |= hex(*buf++); - - *(unsigned long *)mem = tmp_l; - mem += 4; - - } else { - for (i=0; i# */ -static void -getpacket(char *buffer) -{ - unsigned char checksum; - unsigned char xmitcsum; - int i; - int count; - unsigned char ch; - - do { - /* wait around for the start character, ignore all other - * characters */ - while ((ch = (getDebugChar() & 0x7f)) != '$') ; - - checksum = 0; - xmitcsum = -1; - - count = 0; - - /* now, read until a # or end of buffer is found */ - while (count < BUFMAX) { - ch = getDebugChar() & 0x7f; - if (ch == '#') - break; - checksum = checksum + ch; - buffer[count] = ch; - count = count + 1; - } - - if (count >= BUFMAX) - continue; - - buffer[count] = 0; - - if (ch == '#') { - xmitcsum = hex(getDebugChar() & 0x7f) << 4; - xmitcsum |= hex(getDebugChar() & 0x7f); - if (checksum != xmitcsum) - putDebugChar('-'); /* failed checksum */ - else { - putDebugChar('+'); /* successful transfer */ - /* if a sequence char is present, reply the ID */ - if (buffer[2] == ':') { - putDebugChar(buffer[0]); - putDebugChar(buffer[1]); - /* remove sequence chars from buffer */ - count = strlen(buffer); - for (i=3; i <= count; i++) - buffer[i-3] = buffer[i]; - } - } - } - } while (checksum != xmitcsum); -} - -/* send the packet in buffer. */ -static void putpacket(unsigned char *buffer) -{ - unsigned char checksum; - int count; - unsigned char ch, recv; - - /* $#. */ - do { - putDebugChar('$'); - checksum = 0; - count = 0; - - while ((ch = buffer[count])) { - putDebugChar(ch); - checksum += ch; - count += 1; - } - - putDebugChar('#'); - putDebugChar(hexchars[checksum >> 4]); - putDebugChar(hexchars[checksum & 0xf]); - recv = getDebugChar(); - } while ((recv & 0x7f) != '+'); -} - -static void kgdb_flush_cache_all(void) -{ - flush_instruction_cache(); -} - -/* Set up exception handlers for tracing and breakpoints - * [could be called kgdb_init()] - */ -void set_debug_traps(void) -{ -#if 0 - unsigned char c; - - save_and_cli(flags); - - /* In case GDB is started before us, ack any packets (presumably - * "$?#xx") sitting there. - * - * I've found this code causes more problems than it solves, - * so that's why it's commented out. GDB seems to work fine - * now starting either before or after the kernel -bwb - */ - - while((c = getDebugChar()) != '$'); - while((c = getDebugChar()) != '#'); - c = getDebugChar(); /* eat first csum byte */ - c = getDebugChar(); /* eat second csum byte */ - putDebugChar('+'); /* ack it */ -#endif - debugger = kgdb; - debugger_bpt = kgdb_bpt; - debugger_sstep = kgdb_sstep; - debugger_iabr_match = kgdb_iabr_match; - debugger_dabr_match = kgdb_dabr_match; - - initialized = 1; -} - -static void kgdb_fault_handler(struct pt_regs *regs) -{ - kgdb_longjmp((long*)fault_jmp_buf, 1); -} - -int kgdb_bpt(struct pt_regs *regs) -{ - return handle_exception(regs); -} - -int kgdb_sstep(struct pt_regs *regs) -{ - return handle_exception(regs); -} - -void kgdb(struct pt_regs *regs) -{ - handle_exception(regs); -} - -int kgdb_iabr_match(struct pt_regs *regs) -{ - printk(KERN_ERR "kgdb doesn't support iabr, what?!?\n"); - return handle_exception(regs); -} - -int kgdb_dabr_match(struct pt_regs *regs) -{ - printk(KERN_ERR "kgdb doesn't support dabr, what?!?\n"); - return handle_exception(regs); -} - -/* Convert the hardware trap type code to a unix signal number. */ -/* - * This table contains the mapping between PowerPC hardware trap types, and - * signals, which are primarily what GDB understands. - */ -static struct hard_trap_info -{ - unsigned int tt; /* Trap type code for powerpc */ - unsigned char signo; /* Signal that we map this trap into */ -} hard_trap_info[] = { -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - { 0x100, SIGINT }, /* critical input interrupt */ - { 0x200, SIGSEGV }, /* machine check */ - { 0x300, SIGSEGV }, /* data storage */ - { 0x400, SIGBUS }, /* instruction storage */ - { 0x500, SIGINT }, /* interrupt */ - { 0x600, SIGBUS }, /* alignment */ - { 0x700, SIGILL }, /* program */ - { 0x800, SIGILL }, /* reserved */ - { 0x900, SIGILL }, /* reserved */ - { 0xa00, SIGILL }, /* reserved */ - { 0xb00, SIGILL }, /* reserved */ - { 0xc00, SIGCHLD }, /* syscall */ - { 0xd00, SIGILL }, /* reserved */ - { 0xe00, SIGILL }, /* reserved */ - { 0xf00, SIGILL }, /* reserved */ - /* - ** 0x1000 PIT - ** 0x1010 FIT - ** 0x1020 watchdog - ** 0x1100 data TLB miss - ** 0x1200 instruction TLB miss - */ - { 0x2002, SIGTRAP}, /* debug */ -#else - { 0x200, SIGSEGV }, /* machine check */ - { 0x300, SIGSEGV }, /* address error (store) */ - { 0x400, SIGBUS }, /* instruction bus error */ - { 0x500, SIGINT }, /* interrupt */ - { 0x600, SIGBUS }, /* alingment */ - { 0x700, SIGTRAP }, /* breakpoint trap */ - { 0x800, SIGFPE }, /* fpu unavail */ - { 0x900, SIGALRM }, /* decrementer */ - { 0xa00, SIGILL }, /* reserved */ - { 0xb00, SIGILL }, /* reserved */ - { 0xc00, SIGCHLD }, /* syscall */ - { 0xd00, SIGTRAP }, /* single-step/watch */ - { 0xe00, SIGFPE }, /* fp assist */ -#endif - { 0, 0} /* Must be last */ - -}; - -static int computeSignal(unsigned int tt) -{ - struct hard_trap_info *ht; - - for (ht = hard_trap_info; ht->tt && ht->signo; ht++) - if (ht->tt == tt) - return ht->signo; - - return SIGHUP; /* default for things we don't know about */ -} - -#define PC_REGNUM 64 -#define SP_REGNUM 1 - -/* - * This function does all command processing for interfacing to gdb. - */ -static int -handle_exception (struct pt_regs *regs) -{ - int sigval; - int addr; - int length; - char *ptr; - unsigned int msr; - - /* We don't handle user-mode breakpoints. */ - if (user_mode(regs)) - return 0; - - if (debugger_fault_handler) { - debugger_fault_handler(regs); - panic("kgdb longjump failed!\n"); - } - if (kgdb_active) { - printk(KERN_ERR "interrupt while in kgdb, returning\n"); - return 0; - } - - kgdb_active = 1; - kgdb_started = 1; - -#ifdef KGDB_DEBUG - printk("kgdb: entering handle_exception; trap [0x%x]\n", - (unsigned int)regs->trap); -#endif - - kgdb_interruptible(0); - lock_kernel(); - msr = mfmsr(); - mtmsr(msr & ~MSR_EE); /* disable interrupts */ - - if (regs->nip == (unsigned long)breakinst) { - /* Skip over breakpoint trap insn */ - regs->nip += 4; - } - - /* reply to host that an exception has occurred */ - sigval = computeSignal(regs->trap); - ptr = remcomOutBuffer; - - *ptr++ = 'T'; - *ptr++ = hexchars[sigval >> 4]; - *ptr++ = hexchars[sigval & 0xf]; - *ptr++ = hexchars[PC_REGNUM >> 4]; - *ptr++ = hexchars[PC_REGNUM & 0xf]; - *ptr++ = ':'; - ptr = mem2hex((char *)®s->nip, ptr, 4); - *ptr++ = ';'; - *ptr++ = hexchars[SP_REGNUM >> 4]; - *ptr++ = hexchars[SP_REGNUM & 0xf]; - *ptr++ = ':'; - ptr = mem2hex(((char *)regs) + SP_REGNUM*4, ptr, 4); - *ptr++ = ';'; - *ptr++ = 0; - - putpacket(remcomOutBuffer); - if (kdebug) - printk("remcomOutBuffer: %s\n", remcomOutBuffer); - - /* XXX We may want to add some features dealing with poking the - * XXX page tables, ... (look at sparc-stub.c for more info) - * XXX also required hacking to the gdb sources directly... - */ - - while (1) { - remcomOutBuffer[0] = 0; - - getpacket(remcomInBuffer); - switch (remcomInBuffer[0]) { - case '?': /* report most recent signal */ - remcomOutBuffer[0] = 'S'; - remcomOutBuffer[1] = hexchars[sigval >> 4]; - remcomOutBuffer[2] = hexchars[sigval & 0xf]; - remcomOutBuffer[3] = 0; - break; -#if 0 - case 'q': /* this screws up gdb for some reason...*/ - { - extern long _start, sdata, __bss_start; - - ptr = &remcomInBuffer[1]; - if (strncmp(ptr, "Offsets", 7) != 0) - break; - - ptr = remcomOutBuffer; - sprintf(ptr, "Text=%8.8x;Data=%8.8x;Bss=%8.8x", - &_start, &sdata, &__bss_start); - break; - } -#endif - case 'd': - /* toggle debug flag */ - kdebug ^= 1; - break; - - case 'g': /* return the value of the CPU registers. - * some of them are non-PowerPC names :( - * they are stored in gdb like: - * struct { - * u32 gpr[32]; - * f64 fpr[32]; - * u32 pc, ps, cnd, lr; (ps=msr) - * u32 cnt, xer, mq; - * } - */ - { - int i; - ptr = remcomOutBuffer; - /* General Purpose Regs */ - ptr = mem2hex((char *)regs, ptr, 32 * 4); - /* Floating Point Regs - FIXME */ - /*ptr = mem2hex((char *), ptr, 32 * 8);*/ - for(i=0; i<(32*8*2); i++) { /* 2chars/byte */ - ptr[i] = '0'; - } - ptr += 32*8*2; - /* pc, msr, cr, lr, ctr, xer, (mq is unused) */ - ptr = mem2hex((char *)®s->nip, ptr, 4); - ptr = mem2hex((char *)®s->msr, ptr, 4); - ptr = mem2hex((char *)®s->ccr, ptr, 4); - ptr = mem2hex((char *)®s->link, ptr, 4); - ptr = mem2hex((char *)®s->ctr, ptr, 4); - ptr = mem2hex((char *)®s->xer, ptr, 4); - } - break; - - case 'G': /* set the value of the CPU registers */ - { - ptr = &remcomInBuffer[1]; - - /* - * If the stack pointer has moved, you should pray. - * (cause only god can help you). - */ - - /* General Purpose Regs */ - hex2mem(ptr, (char *)regs, 32 * 4); - - /* Floating Point Regs - FIXME?? */ - /*ptr = hex2mem(ptr, ??, 32 * 8);*/ - ptr += 32*8*2; - - /* pc, msr, cr, lr, ctr, xer, (mq is unused) */ - ptr = hex2mem(ptr, (char *)®s->nip, 4); - ptr = hex2mem(ptr, (char *)®s->msr, 4); - ptr = hex2mem(ptr, (char *)®s->ccr, 4); - ptr = hex2mem(ptr, (char *)®s->link, 4); - ptr = hex2mem(ptr, (char *)®s->ctr, 4); - ptr = hex2mem(ptr, (char *)®s->xer, 4); - - strcpy(remcomOutBuffer,"OK"); - } - break; - case 'H': - /* don't do anything, yet, just acknowledge */ - hexToInt(&ptr, &addr); - strcpy(remcomOutBuffer,"OK"); - break; - - case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */ - /* Try to read %x,%x. */ - - ptr = &remcomInBuffer[1]; - - if (hexToInt(&ptr, &addr) && *ptr++ == ',' - && hexToInt(&ptr, &length)) { - if (mem2hex((char *)addr, remcomOutBuffer, - length)) - break; - strcpy(remcomOutBuffer, "E03"); - } else - strcpy(remcomOutBuffer, "E01"); - break; - - case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */ - /* Try to read '%x,%x:'. */ - - ptr = &remcomInBuffer[1]; - - if (hexToInt(&ptr, &addr) && *ptr++ == ',' - && hexToInt(&ptr, &length) - && *ptr++ == ':') { - if (hex2mem(ptr, (char *)addr, length)) - strcpy(remcomOutBuffer, "OK"); - else - strcpy(remcomOutBuffer, "E03"); - flush_icache_range(addr, addr+length); - } else - strcpy(remcomOutBuffer, "E02"); - break; - - - case 'k': /* kill the program, actually just continue */ - case 'c': /* cAA..AA Continue; address AA..AA optional */ - /* try to read optional parameter, pc unchanged if no parm */ - - ptr = &remcomInBuffer[1]; - if (hexToInt(&ptr, &addr)) - regs->nip = addr; - -/* Need to flush the instruction cache here, as we may have deposited a - * breakpoint, and the icache probably has no way of knowing that a data ref to - * some location may have changed something that is in the instruction cache. - */ - kgdb_flush_cache_all(); - mtmsr(msr); - - kgdb_interruptible(1); - unlock_kernel(); - kgdb_active = 0; - if (kdebug) { - printk("remcomInBuffer: %s\n", remcomInBuffer); - printk("remcomOutBuffer: %s\n", remcomOutBuffer); - } - return 1; - - case 's': - kgdb_flush_cache_all(); -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC); - regs->msr |= MSR_DE; -#else - regs->msr |= MSR_SE; -#endif - unlock_kernel(); - kgdb_active = 0; - if (kdebug) { - printk("remcomInBuffer: %s\n", remcomInBuffer); - printk("remcomOutBuffer: %s\n", remcomOutBuffer); - } - return 1; - - case 'r': /* Reset (if user process..exit ???)*/ - panic("kgdb reset."); - break; - } /* switch */ - if (remcomOutBuffer[0] && kdebug) { - printk("remcomInBuffer: %s\n", remcomInBuffer); - printk("remcomOutBuffer: %s\n", remcomOutBuffer); - } - /* reply to the request */ - putpacket(remcomOutBuffer); - } /* while(1) */ -} - -/* This function will generate a breakpoint exception. It is used at the - beginning of a program to sync up with a debugger and can be used - otherwise as a quick means to stop program execution and "break" into - the debugger. */ - -void -breakpoint(void) -{ - if (!initialized) { - printk("breakpoint() called b4 kgdb init\n"); - return; - } - - asm(" .globl breakinst \n\ - breakinst: .long 0x7d821008"); -} - -#ifdef CONFIG_KGDB_CONSOLE -/* Output string in GDB O-packet format if GDB has connected. If nothing - output, returns 0 (caller must then handle output). */ -int -kgdb_output_string (const char* s, unsigned int count) -{ - char buffer[512]; - - if (!kgdb_started) - return 0; - - count = (count <= (sizeof(buffer) / 2 - 2)) - ? count : (sizeof(buffer) / 2 - 2); - - buffer[0] = 'O'; - mem2hex (s, &buffer[1], count); - putpacket(buffer); - - return 1; -} -#endif - -static void sysrq_handle_gdb(int key, struct pt_regs *pt_regs, - struct tty_struct *tty) -{ - printk("Entering GDB stub\n"); - breakpoint(); -} -static struct sysrq_key_op sysrq_gdb_op = { - .handler = sysrq_handle_gdb, - .help_msg = "Gdb", - .action_msg = "GDB", -}; - -static int gdb_register_sysrq(void) -{ - printk("Registering GDB sysrq handler\n"); - register_sysrq_key('g', &sysrq_gdb_op); - return 0; -} -module_init(gdb_register_sysrq); diff --git a/arch/ppc/kernel/ppc_htab.c b/arch/ppc/kernel/ppc_htab.c deleted file mode 100644 index 9ed36dd9cbff3a08f4db0c79e4aa5f62fb68ae8f..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/ppc_htab.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - * PowerPC hash table management proc entry. Will show information - * about the current hash table and will allow changes to it. - * - * Written by Cort Dougan (cort@cs.nmt.edu) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -static int ppc_htab_show(struct seq_file *m, void *v); -static ssize_t ppc_htab_write(struct file * file, const char __user * buffer, - size_t count, loff_t *ppos); -extern PTE *Hash, *Hash_end; -extern unsigned long Hash_size, Hash_mask; -extern unsigned long _SDR1; -extern unsigned long htab_reloads; -extern unsigned long htab_preloads; -extern unsigned long htab_evicts; -extern unsigned long pte_misses; -extern unsigned long pte_errors; -extern unsigned int primary_pteg_full; -extern unsigned int htab_hash_searches; - -static int ppc_htab_open(struct inode *inode, struct file *file) -{ - return single_open(file, ppc_htab_show, NULL); -} - -const struct file_operations ppc_htab_operations = { - .open = ppc_htab_open, - .read = seq_read, - .llseek = seq_lseek, - .write = ppc_htab_write, - .release = single_release, -}; - -static char *pmc1_lookup(unsigned long mmcr0) -{ - switch ( mmcr0 & (0x7f<<7) ) - { - case 0x0: - return "none"; - case MMCR0_PMC1_CYCLES: - return "cycles"; - case MMCR0_PMC1_ICACHEMISS: - return "ic miss"; - case MMCR0_PMC1_DTLB: - return "dtlb miss"; - default: - return "unknown"; - } -} - -static char *pmc2_lookup(unsigned long mmcr0) -{ - switch ( mmcr0 & 0x3f ) - { - case 0x0: - return "none"; - case MMCR0_PMC2_CYCLES: - return "cycles"; - case MMCR0_PMC2_DCACHEMISS: - return "dc miss"; - case MMCR0_PMC2_ITLB: - return "itlb miss"; - case MMCR0_PMC2_LOADMISSTIME: - return "load miss time"; - default: - return "unknown"; - } -} - -/* - * print some useful info about the hash table. This function - * is _REALLY_ slow (see the nested for loops below) but nothing - * in here should be really timing critical. -- Cort - */ -static int ppc_htab_show(struct seq_file *m, void *v) -{ - unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0; -#if defined(CONFIG_PPC_STD_MMU) - unsigned int kptes = 0, uptes = 0; - PTE *ptr; -#endif /* CONFIG_PPC_STD_MMU */ - - if (cpu_has_feature(CPU_FTR_604_PERF_MON)) { - mmcr0 = mfspr(SPRN_MMCR0); - pmc1 = mfspr(SPRN_PMC1); - pmc2 = mfspr(SPRN_PMC2); - seq_printf(m, - "604 Performance Monitoring\n" - "MMCR0\t\t: %08lx %s%s ", - mmcr0, - ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "", - ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : ""); - seq_printf(m, - "\nPMC1\t\t: %08lx (%s)\n" - "PMC2\t\t: %08lx (%s)\n", - pmc1, pmc1_lookup(mmcr0), - pmc2, pmc2_lookup(mmcr0)); - } - -#ifdef CONFIG_PPC_STD_MMU - /* if we don't have a htab */ - if ( Hash_size == 0 ) { - seq_printf(m, "No Hash Table used\n"); - return 0; - } - - for (ptr = Hash; ptr < Hash_end; ptr++) { - unsigned int mctx, vsid; - - if (!ptr->v) - continue; - /* undo the esid skew */ - vsid = ptr->vsid; - mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff; - if (mctx == 0) - kptes++; - else - uptes++; - } - - seq_printf(m, - "PTE Hash Table Information\n" - "Size\t\t: %luKb\n" - "Buckets\t\t: %lu\n" - "Address\t\t: %08lx\n" - "Entries\t\t: %lu\n" - "User ptes\t: %u\n" - "Kernel ptes\t: %u\n" - "Percent full\t: %lu%%\n" - , (unsigned long)(Hash_size>>10), - (Hash_size/(sizeof(PTE)*8)), - (unsigned long)Hash, - Hash_size/sizeof(PTE) - , uptes, - kptes, - ((kptes+uptes)*100) / (Hash_size/sizeof(PTE)) - ); - - seq_printf(m, - "Reloads\t\t: %lu\n" - "Preloads\t: %lu\n" - "Searches\t: %u\n" - "Overflows\t: %u\n" - "Evicts\t\t: %lu\n", - htab_reloads, htab_preloads, htab_hash_searches, - primary_pteg_full, htab_evicts); -#endif /* CONFIG_PPC_STD_MMU */ - - seq_printf(m, - "Non-error misses: %lu\n" - "Error misses\t: %lu\n", - pte_misses, pte_errors); - return 0; -} - -/* - * Allow user to define performance counters and resize the hash table - */ -static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer, - size_t count, loff_t *ppos) -{ -#ifdef CONFIG_PPC_STD_MMU - unsigned long tmp; - char buffer[16]; - - if (!capable(CAP_SYS_ADMIN)) - return -EACCES; - if (strncpy_from_user(buffer, ubuffer, 15)) - return -EFAULT; - buffer[15] = 0; - - /* don't set the htab size for now */ - if ( !strncmp( buffer, "size ", 5) ) - return -EBUSY; - - if ( !strncmp( buffer, "reset", 5) ) - { - if (cpu_has_feature(CPU_FTR_604_PERF_MON)) { - /* reset PMC1 and PMC2 */ - mtspr(SPRN_PMC1, 0); - mtspr(SPRN_PMC2, 0); - } - htab_reloads = 0; - htab_evicts = 0; - pte_misses = 0; - pte_errors = 0; - } - - /* Everything below here requires the performance monitor feature. */ - if (!cpu_has_feature(CPU_FTR_604_PERF_MON)) - return count; - - /* turn off performance monitoring */ - if ( !strncmp( buffer, "off", 3) ) - { - mtspr(SPRN_MMCR0, 0); - mtspr(SPRN_PMC1, 0); - mtspr(SPRN_PMC2, 0); - } - - if ( !strncmp( buffer, "user", 4) ) - { - /* setup mmcr0 and clear the correct pmc */ - tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000; - mtspr(SPRN_MMCR0, tmp); - mtspr(SPRN_PMC1, 0); - mtspr(SPRN_PMC2, 0); - } - - if ( !strncmp( buffer, "kernel", 6) ) - { - /* setup mmcr0 and clear the correct pmc */ - tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000; - mtspr(SPRN_MMCR0, tmp); - mtspr(SPRN_PMC1, 0); - mtspr(SPRN_PMC2, 0); - } - - /* PMC1 values */ - if ( !strncmp( buffer, "dtlb", 4) ) - { - /* setup mmcr0 and clear the correct pmc */ - tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB; - mtspr(SPRN_MMCR0, tmp); - mtspr(SPRN_PMC1, 0); - } - - if ( !strncmp( buffer, "ic miss", 7) ) - { - /* setup mmcr0 and clear the correct pmc */ - tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS; - mtspr(SPRN_MMCR0, tmp); - mtspr(SPRN_PMC1, 0); - } - - /* PMC2 values */ - if ( !strncmp( buffer, "load miss time", 14) ) - { - /* setup mmcr0 and clear the correct pmc */ - asm volatile( - "mfspr %0,%1\n\t" /* get current mccr0 */ - "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */ - "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */ - "mtspr %1,%0 \n\t" /* set new mccr0 */ - "mtspr %3,%4 \n\t" /* reset the pmc */ - : "=r" (tmp) - : "i" (SPRN_MMCR0), - "i" (MMCR0_PMC2_LOADMISSTIME), - "i" (SPRN_PMC2), "r" (0) ); - } - - if ( !strncmp( buffer, "itlb", 4) ) - { - /* setup mmcr0 and clear the correct pmc */ - asm volatile( - "mfspr %0,%1\n\t" /* get current mccr0 */ - "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */ - "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */ - "mtspr %1,%0 \n\t" /* set new mccr0 */ - "mtspr %3,%4 \n\t" /* reset the pmc */ - : "=r" (tmp) - : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB), - "i" (SPRN_PMC2), "r" (0) ); - } - - if ( !strncmp( buffer, "dc miss", 7) ) - { - /* setup mmcr0 and clear the correct pmc */ - asm volatile( - "mfspr %0,%1\n\t" /* get current mccr0 */ - "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */ - "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */ - "mtspr %1,%0 \n\t" /* set new mccr0 */ - "mtspr %3,%4 \n\t" /* reset the pmc */ - : "=r" (tmp) - : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS), - "i" (SPRN_PMC2), "r" (0) ); - } - - return count; -#else /* CONFIG_PPC_STD_MMU */ - return 0; -#endif /* CONFIG_PPC_STD_MMU */ -} - -int proc_dol2crvec(ctl_table *table, int write, struct file *filp, - void __user *buffer_arg, size_t *lenp, loff_t *ppos) -{ - int vleft, first=1, len, left, val; - char __user *buffer = (char __user *) buffer_arg; - #define TMPBUFLEN 256 - char buf[TMPBUFLEN], *p; - static const char *sizestrings[4] = { - "2MB", "256KB", "512KB", "1MB" - }; - static const char *clockstrings[8] = { - "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)", - "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)" - }; - static const char *typestrings[4] = { - "flow-through burst SRAM", "reserved SRAM", - "pipelined burst SRAM", "pipelined late-write SRAM" - }; - static const char *holdstrings[4] = { - "0.5", "1.0", "(reserved2)", "(reserved3)" - }; - - if (!cpu_has_feature(CPU_FTR_L2CR)) - return -EFAULT; - - if ( /*!table->maxlen ||*/ (*ppos && !write)) { - *lenp = 0; - return 0; - } - - vleft = table->maxlen / sizeof(int); - left = *lenp; - - for (; left /*&& vleft--*/; first=0) { - if (write) { - while (left) { - char c; - if(get_user(c, buffer)) - return -EFAULT; - if (!isspace(c)) - break; - left--; - buffer++; - } - if (!left) - break; - len = left; - if (len > TMPBUFLEN-1) - len = TMPBUFLEN-1; - if(copy_from_user(buf, buffer, len)) - return -EFAULT; - buf[len] = 0; - p = buf; - if (*p < '0' || *p > '9') - break; - val = simple_strtoul(p, &p, 0); - len = p-buf; - if ((len < left) && *p && !isspace(*p)) - break; - buffer += len; - left -= len; - _set_L2CR(val); - } else { - p = buf; - if (!first) - *p++ = '\t'; - val = _get_L2CR(); - p += sprintf(p, "0x%08x: ", val); - p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" : - "disabled"); - p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no "); - p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]); - p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]); - p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]); - p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : ""); - p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": ""); - p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" : - "copy-back"); - p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : ""); - p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]); - p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : ""); - p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :""); - p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :""); - - p += sprintf(p,"\n"); - - len = strlen(buf); - if (len > left) - len = left; - if (copy_to_user(buffer, buf, len)) - return -EFAULT; - left -= len; - buffer += len; - break; - } - } - - if (!write && !first && left) { - if(put_user('\n', (char __user *) buffer)) - return -EFAULT; - left--, buffer++; - } - if (write) { - char __user *s = (char __user *) buffer; - while (left) { - char c; - if(get_user(c, s++)) - return -EFAULT; - if (!isspace(c)) - break; - left--; - } - } - if (write && first) - return -EINVAL; - *lenp -= left; - *ppos += *lenp; - return 0; -} - -#ifdef CONFIG_SYSCTL -/* - * Register our sysctl. - */ -static ctl_table htab_ctl_table[]={ - { - .procname = "l2cr", - .mode = 0644, - .proc_handler = &proc_dol2crvec, - }, - {} -}; -static ctl_table htab_sysctl_root[] = { - { - .ctl_name = CTL_KERN, - .procname = "kernel", - .mode = 0555, - .child = htab_ctl_table, - }, - {} -}; - -static int __init -register_ppc_htab_sysctl(void) -{ - register_sysctl_table(htab_sysctl_root); - - return 0; -} - -__initcall(register_ppc_htab_sysctl); -#endif diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c deleted file mode 100644 index 5d529bcbeee920d60724af074968d75309586188..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/ppc_ksyms.c +++ /dev/null @@ -1,258 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_8xx -#include -#endif - -extern void transfer_to_handler(void); -extern void do_IRQ(struct pt_regs *regs); -extern void machine_check_exception(struct pt_regs *regs); -extern void alignment_exception(struct pt_regs *regs); -extern void program_check_exception(struct pt_regs *regs); -extern void single_step_exception(struct pt_regs *regs); -extern int sys_sigreturn(struct pt_regs *regs); - -long long __ashrdi3(long long, int); -long long __ashldi3(long long, int); -long long __lshrdi3(long long, int); - -EXPORT_SYMBOL(empty_zero_page); -EXPORT_SYMBOL(clear_pages); -EXPORT_SYMBOL(clear_user_page); -EXPORT_SYMBOL(copy_page); -EXPORT_SYMBOL(transfer_to_handler); -EXPORT_SYMBOL(do_IRQ); -EXPORT_SYMBOL(machine_check_exception); -EXPORT_SYMBOL(alignment_exception); -EXPORT_SYMBOL(program_check_exception); -EXPORT_SYMBOL(single_step_exception); -EXPORT_SYMBOL(sys_sigreturn); -EXPORT_SYMBOL(ppc_n_lost_interrupts); - -EXPORT_SYMBOL(ISA_DMA_THRESHOLD); -EXPORT_SYMBOL(DMA_MODE_READ); -EXPORT_SYMBOL(DMA_MODE_WRITE); - -#if !defined(__INLINE_BITOPS) -EXPORT_SYMBOL(set_bit); -EXPORT_SYMBOL(clear_bit); -EXPORT_SYMBOL(change_bit); -EXPORT_SYMBOL(test_and_set_bit); -EXPORT_SYMBOL(test_and_clear_bit); -EXPORT_SYMBOL(test_and_change_bit); -#endif /* __INLINE_BITOPS */ - -EXPORT_SYMBOL(strcpy); -EXPORT_SYMBOL(strncpy); -EXPORT_SYMBOL(strcat); -EXPORT_SYMBOL(strlen); -EXPORT_SYMBOL(strcmp); -EXPORT_SYMBOL(strncmp); - -EXPORT_SYMBOL(csum_partial); -EXPORT_SYMBOL(csum_partial_copy_generic); -EXPORT_SYMBOL(ip_fast_csum); -EXPORT_SYMBOL(csum_tcpudp_magic); - -EXPORT_SYMBOL(__copy_tofrom_user); -EXPORT_SYMBOL(__clear_user); -EXPORT_SYMBOL(__strncpy_from_user); -EXPORT_SYMBOL(__strnlen_user); - -/* -EXPORT_SYMBOL(inb); -EXPORT_SYMBOL(inw); -EXPORT_SYMBOL(inl); -EXPORT_SYMBOL(outb); -EXPORT_SYMBOL(outw); -EXPORT_SYMBOL(outl); -EXPORT_SYMBOL(outsl);*/ - -EXPORT_SYMBOL(_insb); -EXPORT_SYMBOL(_outsb); -EXPORT_SYMBOL(_insw_ns); -EXPORT_SYMBOL(_outsw_ns); -EXPORT_SYMBOL(_insl_ns); -EXPORT_SYMBOL(_outsl_ns); -EXPORT_SYMBOL(iopa); -EXPORT_SYMBOL(ioremap); -#ifdef CONFIG_44x -EXPORT_SYMBOL(ioremap64); -#endif -EXPORT_SYMBOL(__ioremap); -EXPORT_SYMBOL(iounmap); -EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */ - -#ifdef CONFIG_PCI -EXPORT_SYMBOL(isa_io_base); -EXPORT_SYMBOL(isa_mem_base); -EXPORT_SYMBOL(pci_dram_offset); -EXPORT_SYMBOL(pci_alloc_consistent); -EXPORT_SYMBOL(pci_free_consistent); -EXPORT_SYMBOL(pci_bus_io_base); -EXPORT_SYMBOL(pci_bus_io_base_phys); -EXPORT_SYMBOL(pci_bus_mem_base_phys); -EXPORT_SYMBOL(pci_bus_to_hose); -EXPORT_SYMBOL(pci_resource_to_bus); -EXPORT_SYMBOL(pci_phys_to_bus); -EXPORT_SYMBOL(pci_bus_to_phys); -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_NOT_COHERENT_CACHE -extern void flush_dcache_all(void); -EXPORT_SYMBOL(flush_dcache_all); -#endif - -EXPORT_SYMBOL(start_thread); -EXPORT_SYMBOL(kernel_thread); - -EXPORT_SYMBOL(flush_instruction_cache); -EXPORT_SYMBOL(giveup_fpu); -EXPORT_SYMBOL(__flush_icache_range); -EXPORT_SYMBOL(flush_dcache_range); -EXPORT_SYMBOL(flush_icache_user_range); -EXPORT_SYMBOL(flush_dcache_page); -EXPORT_SYMBOL(flush_tlb_kernel_range); -EXPORT_SYMBOL(flush_tlb_page); -EXPORT_SYMBOL(_tlbie); -#ifdef CONFIG_ALTIVEC -#ifndef CONFIG_SMP -EXPORT_SYMBOL(last_task_used_altivec); -#endif -EXPORT_SYMBOL(giveup_altivec); -#endif /* CONFIG_ALTIVEC */ -#ifdef CONFIG_SMP -EXPORT_SYMBOL(smp_call_function); -EXPORT_SYMBOL(smp_hw_index); -#endif - -EXPORT_SYMBOL(ppc_md); - -#ifdef CONFIG_ADB -EXPORT_SYMBOL(adb_request); -EXPORT_SYMBOL(adb_register); -EXPORT_SYMBOL(adb_unregister); -EXPORT_SYMBOL(adb_poll); -EXPORT_SYMBOL(adb_try_handler_change); -#endif /* CONFIG_ADB */ -#ifdef CONFIG_ADB_CUDA -EXPORT_SYMBOL(cuda_request); -EXPORT_SYMBOL(cuda_poll); -#endif /* CONFIG_ADB_CUDA */ -#if defined(CONFIG_BOOTX_TEXT) -EXPORT_SYMBOL(btext_update_display); -#endif -EXPORT_SYMBOL(to_tm); - -EXPORT_SYMBOL(pm_power_off); - -EXPORT_SYMBOL(__ashrdi3); -EXPORT_SYMBOL(__ashldi3); -EXPORT_SYMBOL(__lshrdi3); -EXPORT_SYMBOL(memcpy); -EXPORT_SYMBOL(cacheable_memcpy); -EXPORT_SYMBOL(memset); -EXPORT_SYMBOL(memmove); -EXPORT_SYMBOL(memcmp); -EXPORT_SYMBOL(memchr); - -#if defined(CONFIG_FB_VGA16_MODULE) -EXPORT_SYMBOL(screen_info); -#endif - -EXPORT_SYMBOL(__delay); -EXPORT_SYMBOL(timer_interrupt); -EXPORT_SYMBOL(irq_desc); -EXPORT_SYMBOL(tb_ticks_per_jiffy); -EXPORT_SYMBOL(console_drivers); -#ifdef CONFIG_XMON -EXPORT_SYMBOL(xmon); -EXPORT_SYMBOL(xmon_printf); -#endif - -#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) -extern void (*debugger)(struct pt_regs *regs); -extern int (*debugger_bpt)(struct pt_regs *regs); -extern int (*debugger_sstep)(struct pt_regs *regs); -extern int (*debugger_iabr_match)(struct pt_regs *regs); -extern int (*debugger_dabr_match)(struct pt_regs *regs); -extern void (*debugger_fault_handler)(struct pt_regs *regs); - -EXPORT_SYMBOL(debugger); -EXPORT_SYMBOL(debugger_bpt); -EXPORT_SYMBOL(debugger_sstep); -EXPORT_SYMBOL(debugger_iabr_match); -EXPORT_SYMBOL(debugger_dabr_match); -EXPORT_SYMBOL(debugger_fault_handler); -#endif - -#ifdef CONFIG_8xx -EXPORT_SYMBOL(cpm_install_handler); -EXPORT_SYMBOL(cpm_free_handler); -#endif /* CONFIG_8xx */ -#if defined(CONFIG_8xx) || defined(CONFIG_40x) -EXPORT_SYMBOL(__res); -#endif - -EXPORT_SYMBOL(next_mmu_context); -EXPORT_SYMBOL(set_context); -EXPORT_SYMBOL(disarm_decr); -#ifdef CONFIG_PPC_STD_MMU -extern long mol_trampoline; -EXPORT_SYMBOL(mol_trampoline); /* For MOL */ -EXPORT_SYMBOL(flush_hash_pages); /* For MOL */ -#ifdef CONFIG_SMP -extern int mmu_hash_lock; -EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ -#endif /* CONFIG_SMP */ -extern long *intercept_table; -EXPORT_SYMBOL(intercept_table); -#endif /* CONFIG_PPC_STD_MMU */ -#ifdef CONFIG_PPC_DCR_NATIVE -EXPORT_SYMBOL(__mtdcr); -EXPORT_SYMBOL(__mfdcr); -#endif diff --git a/arch/ppc/kernel/relocate_kernel.S b/arch/ppc/kernel/relocate_kernel.S deleted file mode 100644 index 9b2ad48e988c45bc3e18c5dee7834788aa299e03..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/relocate_kernel.S +++ /dev/null @@ -1,123 +0,0 @@ -/* - * relocate_kernel.S - put the kernel image in place to boot - * Copyright (C) 2002-2003 Eric Biederman - * - * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz - * - * This source code is licensed under the GNU General Public License, - * Version 2. See the file COPYING for more details. - */ - -#include -#include -#include - -#include - -#define PAGE_SIZE 4096 /* must be same value as in */ - - /* - * Must be relocatable PIC code callable as a C function. - */ - .globl relocate_new_kernel -relocate_new_kernel: - /* r3 = page_list */ - /* r4 = reboot_code_buffer */ - /* r5 = start_address */ - - li r0, 0 - - /* - * Set Machine Status Register to a known status, - * switch the MMU off and jump to 1: in a single step. - */ - - mr r8, r0 - ori r8, r8, MSR_RI|MSR_ME - mtspr SPRN_SRR1, r8 - addi r8, r4, 1f - relocate_new_kernel - mtspr SPRN_SRR0, r8 - sync - rfi - -1: - /* from this point address translation is turned off */ - /* and interrupts are disabled */ - - /* set a new stack at the bottom of our page... */ - /* (not really needed now) */ - addi r1, r4, KEXEC_CONTROL_CODE_SIZE - 8 /* for LR Save+Back Chain */ - stw r0, 0(r1) - - /* Do the copies */ - li r6, 0 /* checksum */ - mr r0, r3 - b 1f - -0: /* top, read another word for the indirection page */ - lwzu r0, 4(r3) - -1: - /* is it a destination page? (r8) */ - rlwinm. r7, r0, 0, 31, 31 /* IND_DESTINATION (1<<0) */ - beq 2f - - rlwinm r8, r0, 0, 0, 19 /* clear kexec flags, page align */ - b 0b - -2: /* is it an indirection page? (r3) */ - rlwinm. r7, r0, 0, 30, 30 /* IND_INDIRECTION (1<<1) */ - beq 2f - - rlwinm r3, r0, 0, 0, 19 /* clear kexec flags, page align */ - subi r3, r3, 4 - b 0b - -2: /* are we done? */ - rlwinm. r7, r0, 0, 29, 29 /* IND_DONE (1<<2) */ - beq 2f - b 3f - -2: /* is it a source page? (r9) */ - rlwinm. r7, r0, 0, 28, 28 /* IND_SOURCE (1<<3) */ - beq 0b - - rlwinm r9, r0, 0, 0, 19 /* clear kexec flags, page align */ - - li r7, PAGE_SIZE / 4 - mtctr r7 - subi r9, r9, 4 - subi r8, r8, 4 -9: - lwzu r0, 4(r9) /* do the copy */ - xor r6, r6, r0 - stwu r0, 4(r8) - dcbst 0, r8 - sync - icbi 0, r8 - bdnz 9b - - addi r9, r9, 4 - addi r8, r8, 4 - b 0b - -3: - - /* To be certain of avoiding problems with self-modifying code - * execute a serializing instruction here. - */ - isync - sync - - /* jump to the entry point, usually the setup routine */ - mtlr r5 - blrl - -1: b 1b - -relocate_new_kernel_end: - - .globl relocate_new_kernel_size -relocate_new_kernel_size: - .long relocate_new_kernel_end - relocate_new_kernel - diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c deleted file mode 100644 index 51e8094f52d6e9f46f5ff71a806de653db578a4a..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/setup.c +++ /dev/null @@ -1,572 +0,0 @@ -/* - * Common prep boot and setup code. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \ - defined(CONFIG_PPC_MPC52xx)) - -#if USES_PPC_SYS -#include -#endif - -#if defined CONFIG_KGDB -#include -#endif - -extern void platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7); -extern void reloc_got2(unsigned long offset); - -extern void ppc6xx_idle(void); -extern void power4_idle(void); - -extern boot_infos_t *boot_infos; - -/* Used with the BI_MEMSIZE bootinfo parameter to store the memory - size value reported by the boot loader. */ -unsigned long boot_mem_size; - -unsigned long ISA_DMA_THRESHOLD; -unsigned int DMA_MODE_READ; -unsigned int DMA_MODE_WRITE; - -#ifdef CONFIG_PPC_PREP -extern void prep_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7); - -dev_t boot_dev; -#endif /* CONFIG_PPC_PREP */ - -int have_of; -EXPORT_SYMBOL(have_of); - -#ifdef __DO_IRQ_CANON -int ppc_do_canonicalize_irqs; -EXPORT_SYMBOL(ppc_do_canonicalize_irqs); -#endif - -#ifdef CONFIG_VGA_CONSOLE -unsigned long vgacon_remap_base; -#endif - -struct machdep_calls ppc_md; - -/* - * These are used in binfmt_elf.c to put aux entries on the stack - * for each elf executable being started. - */ -int dcache_bsize; -int icache_bsize; -int ucache_bsize; - -#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_FB_VGA16) || \ - defined(CONFIG_FB_VGA16_MODULE) || defined(CONFIG_FB_VESA) -struct screen_info screen_info = { - 0, 25, /* orig-x, orig-y */ - 0, /* unused */ - 0, /* orig-video-page */ - 0, /* orig-video-mode */ - 80, /* orig-video-cols */ - 0,0,0, /* ega_ax, ega_bx, ega_cx */ - 25, /* orig-video-lines */ - 1, /* orig-video-isVGA */ - 16 /* orig-video-points */ -}; -#endif /* CONFIG_VGA_CONSOLE || CONFIG_FB_VGA16 || CONFIG_FB_VESA */ - -void machine_restart(char *cmd) -{ -#ifdef CONFIG_NVRAM - nvram_sync(); -#endif - ppc_md.restart(cmd); -} - -static void ppc_generic_power_off(void) -{ - ppc_md.power_off(); -} - -void machine_halt(void) -{ -#ifdef CONFIG_NVRAM - nvram_sync(); -#endif - ppc_md.halt(); -} - -void (*pm_power_off)(void) = ppc_generic_power_off; - -void machine_power_off(void) -{ -#ifdef CONFIG_NVRAM - nvram_sync(); -#endif - if (pm_power_off) - pm_power_off(); - ppc_generic_power_off(); -} - -#ifdef CONFIG_TAU -extern u32 cpu_temp(unsigned long cpu); -extern u32 cpu_temp_both(unsigned long cpu); -#endif /* CONFIG_TAU */ - -int show_cpuinfo(struct seq_file *m, void *v) -{ - int i = (int) v - 1; - int err = 0; - unsigned int pvr; - unsigned short maj, min; - unsigned long lpj; - - if (i >= NR_CPUS) { - /* Show summary information */ -#ifdef CONFIG_SMP - unsigned long bogosum = 0; - for_each_online_cpu(i) - bogosum += cpu_data[i].loops_per_jiffy; - seq_printf(m, "total bogomips\t: %lu.%02lu\n", - bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); -#endif /* CONFIG_SMP */ - - if (ppc_md.show_cpuinfo != NULL) - err = ppc_md.show_cpuinfo(m); - return err; - } - -#ifdef CONFIG_SMP - if (!cpu_online(i)) - return 0; - pvr = cpu_data[i].pvr; - lpj = cpu_data[i].loops_per_jiffy; -#else - pvr = mfspr(SPRN_PVR); - lpj = loops_per_jiffy; -#endif - - seq_printf(m, "processor\t: %d\n", i); - seq_printf(m, "cpu\t\t: "); - - if (cur_cpu_spec->pvr_mask) - seq_printf(m, "%s", cur_cpu_spec->cpu_name); - else - seq_printf(m, "unknown (%08x)", pvr); -#ifdef CONFIG_ALTIVEC - if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) - seq_printf(m, ", altivec supported"); -#endif - seq_printf(m, "\n"); - -#ifdef CONFIG_TAU - if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { -#ifdef CONFIG_TAU_AVERAGE - /* more straightforward, but potentially misleading */ - seq_printf(m, "temperature \t: %u C (uncalibrated)\n", - cpu_temp(i)); -#else - /* show the actual temp sensor range */ - u32 temp; - temp = cpu_temp_both(i); - seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", - temp & 0xff, temp >> 16); -#endif - } -#endif /* CONFIG_TAU */ - - if (ppc_md.show_percpuinfo != NULL) { - err = ppc_md.show_percpuinfo(m, i); - if (err) - return err; - } - - /* If we are a Freescale core do a simple check so - * we dont have to keep adding cases in the future */ - if ((PVR_VER(pvr) & 0x8000) == 0x8000) { - maj = PVR_MAJ(pvr); - min = PVR_MIN(pvr); - } else { - switch (PVR_VER(pvr)) { - case 0x0020: /* 403 family */ - maj = PVR_MAJ(pvr) + 1; - min = PVR_MIN(pvr); - break; - case 0x1008: /* 740P/750P ?? */ - maj = ((pvr >> 8) & 0xFF) - 1; - min = pvr & 0xFF; - break; - default: - maj = (pvr >> 8) & 0xFF; - min = pvr & 0xFF; - break; - } - } - - seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", - maj, min, PVR_VER(pvr), PVR_REV(pvr)); - - seq_printf(m, "bogomips\t: %lu.%02lu\n", - lpj / (500000/HZ), (lpj / (5000/HZ)) % 100); - -#if USES_PPC_SYS - if (cur_ppc_sys_spec->ppc_sys_name) - seq_printf(m, "chipset\t\t: %s\n", - cur_ppc_sys_spec->ppc_sys_name); -#endif - -#ifdef CONFIG_SMP - seq_printf(m, "\n"); -#endif - - return 0; -} - -static void *c_start(struct seq_file *m, loff_t *pos) -{ - int i = *pos; - - return i <= NR_CPUS? (void *) (i + 1): NULL; -} - -static void *c_next(struct seq_file *m, void *v, loff_t *pos) -{ - ++*pos; - return c_start(m, pos); -} - -static void c_stop(struct seq_file *m, void *v) -{ -} - -const struct seq_operations cpuinfo_op = { - .start =c_start, - .next = c_next, - .stop = c_stop, - .show = show_cpuinfo, -}; - -/* - * We're called here very early in the boot. We determine the machine - * type and call the appropriate low-level setup functions. - * -- Cort - * - * Note that the kernel may be running at an address which is different - * from the address that it was linked at, so we must use RELOC/PTRRELOC - * to access static data (including strings). -- paulus - */ -__init -unsigned long -early_init(int r3, int r4, int r5) -{ - unsigned long phys; - unsigned long offset = reloc_offset(); - struct cpu_spec *spec; - - /* Default */ - phys = offset + KERNELBASE; - - /* First zero the BSS -- use memset, some arches don't have - * caches on yet */ - memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start); - - /* - * Identify the CPU type and fix up code sections - * that depend on which cpu we have. - */ -#if defined(CONFIG_440EP) && defined(CONFIG_PPC_FPU) - /* We pass the virtual PVR here for 440EP as 440EP and 440GR have - * identical PVRs and there is no reliable way to check for the FPU - */ - spec = identify_cpu(offset, (mfspr(SPRN_PVR) | 0x8)); -#else - spec = identify_cpu(offset, mfspr(SPRN_PVR)); -#endif - do_feature_fixups(spec->cpu_features, - PTRRELOC(&__start___ftr_fixup), - PTRRELOC(&__stop___ftr_fixup)); - - return phys; -} - -#ifdef CONFIG_PPC_PREP -/* - * The PPC_PREP version of platform_init... - */ -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ -#ifdef CONFIG_BOOTX_TEXT - if (boot_text_mapped) { - btext_clearscreen(); - btext_welcome(); - } -#endif - - parse_bootinfo(find_bootinfo()); - - prep_init(r3, r4, r5, r6, r7); -} -#endif /* CONFIG_PPC_PREP */ - -struct bi_record *find_bootinfo(void) -{ - struct bi_record *rec; - - rec = (struct bi_record *)_ALIGN((ulong)__bss_start+(1<<20)-1,(1<<20)); - if ( rec->tag != BI_FIRST ) { - /* - * This 0x10000 offset is a terrible hack but it will go away when - * we have the bootloader handle all the relocation and - * prom calls -- Cort - */ - rec = (struct bi_record *)_ALIGN((ulong)__bss_start+0x10000+(1<<20)-1,(1<<20)); - if ( rec->tag != BI_FIRST ) - return NULL; - } - return rec; -} - -void parse_bootinfo(struct bi_record *rec) -{ - if (rec == NULL || rec->tag != BI_FIRST) - return; - while (rec->tag != BI_LAST) { - ulong *data = rec->data; - switch (rec->tag) { - case BI_CMD_LINE: - strlcpy(cmd_line, (void *)data, sizeof(cmd_line)); - break; -#ifdef CONFIG_BLK_DEV_INITRD - case BI_INITRD: - initrd_start = data[0] + KERNELBASE; - initrd_end = data[0] + data[1] + KERNELBASE; - break; -#endif /* CONFIG_BLK_DEV_INITRD */ - case BI_MEMSIZE: - boot_mem_size = data[0]; - break; - } - rec = (struct bi_record *)((ulong)rec + rec->size); - } -} - -/* - * Find out what kind of machine we're on and save any data we need - * from the early boot process (devtree is copied on pmac by prom_init()). - * This is called very early on the boot process, after a minimal - * MMU environment has been set up but before MMU_init is called. - */ -void __init -machine_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ -#ifdef CONFIG_CMDLINE - strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line)); -#endif /* CONFIG_CMDLINE */ - -#ifdef CONFIG_6xx - ppc_md.power_save = ppc6xx_idle; -#endif - - platform_init(r3, r4, r5, r6, r7); - - if (ppc_md.progress) - ppc_md.progress("id mach(): done", 0x200); -} -#ifdef CONFIG_BOOKE_WDT -/* Checks wdt=x and wdt_period=xx command-line option */ -int __init early_parse_wdt(char *p) -{ - if (p && strncmp(p, "0", 1) != 0) - booke_wdt_enabled = 1; - - return 0; -} -early_param("wdt", early_parse_wdt); - -int __init early_parse_wdt_period (char *p) -{ - if (p) - booke_wdt_period = simple_strtoul(p, NULL, 0); - - return 0; -} -early_param("wdt_period", early_parse_wdt_period); -#endif /* CONFIG_BOOKE_WDT */ - -/* Checks "l2cr=xxxx" command-line option */ -int __init ppc_setup_l2cr(char *str) -{ - if (cpu_has_feature(CPU_FTR_L2CR)) { - unsigned long val = simple_strtoul(str, NULL, 0); - printk(KERN_INFO "l2cr set to %lx\n", val); - _set_L2CR(0); /* force invalidate by disable cache */ - _set_L2CR(val); /* and enable it */ - } - return 1; -} -__setup("l2cr=", ppc_setup_l2cr); - -#ifdef CONFIG_GENERIC_NVRAM - -/* Generic nvram hooks used by drivers/char/gen_nvram.c */ -unsigned char nvram_read_byte(int addr) -{ - if (ppc_md.nvram_read_val) - return ppc_md.nvram_read_val(addr); - return 0xff; -} -EXPORT_SYMBOL(nvram_read_byte); - -void nvram_write_byte(unsigned char val, int addr) -{ - if (ppc_md.nvram_write_val) - ppc_md.nvram_write_val(addr, val); -} -EXPORT_SYMBOL(nvram_write_byte); - -void nvram_sync(void) -{ - if (ppc_md.nvram_sync) - ppc_md.nvram_sync(); -} -EXPORT_SYMBOL(nvram_sync); - -#endif /* CONFIG_NVRAM */ - -static struct cpu cpu_devices[NR_CPUS]; - -int __init ppc_init(void) -{ - int i; - - /* clear the progress line */ - if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff); - - /* register CPU devices */ - for_each_possible_cpu(i) - register_cpu(&cpu_devices[i], i); - - /* call platform init */ - if (ppc_md.init != NULL) { - ppc_md.init(); - } - return 0; -} - -arch_initcall(ppc_init); - -/* Warning, IO base is not yet inited */ -void __init setup_arch(char **cmdline_p) -{ - extern char *klimit; - extern void do_init_bootmem(void); - - /* so udelay does something sensible, assume <= 1000 bogomips */ - loops_per_jiffy = 500000000 / HZ; - - if (ppc_md.init_early) - ppc_md.init_early(); - -#ifdef CONFIG_XMON - xmon_init(1); - if (strstr(cmd_line, "xmon")) - xmon(NULL); -#endif /* CONFIG_XMON */ - if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab); - -#if defined(CONFIG_KGDB) - if (ppc_md.kgdb_map_scc) - ppc_md.kgdb_map_scc(); - set_debug_traps(); - if (strstr(cmd_line, "gdb")) { - if (ppc_md.progress) - ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); - printk("kgdb breakpoint activated\n"); - breakpoint(); - } -#endif - - /* - * Set cache line size based on type of cpu as a default. - * Systems with OF can look in the properties on the cpu node(s) - * for a possibly more accurate value. - */ - if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) { - dcache_bsize = cur_cpu_spec->dcache_bsize; - icache_bsize = cur_cpu_spec->icache_bsize; - ucache_bsize = 0; - } else - ucache_bsize = dcache_bsize = icache_bsize - = cur_cpu_spec->dcache_bsize; - - /* reboot on panic */ - panic_timeout = 180; - - init_mm.start_code = PAGE_OFFSET; - init_mm.end_code = (unsigned long) _etext; - init_mm.end_data = (unsigned long) _edata; - init_mm.brk = (unsigned long) klimit; - - /* Save unparsed command line copy for /proc/cmdline */ - strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE); - *cmdline_p = cmd_line; - - parse_early_param(); - - /* set up the bootmem stuff with available memory */ - do_init_bootmem(); - if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); - -#ifdef CONFIG_PPC_OCP - /* Initialize OCP device list */ - ocp_early_init(); - if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab); -#endif - -#ifdef CONFIG_DUMMY_CONSOLE - conswitchp = &dummy_con; -#endif - - ppc_md.setup_arch(); - if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); - - paging_init(); -} diff --git a/arch/ppc/kernel/smp-tbsync.c b/arch/ppc/kernel/smp-tbsync.c deleted file mode 100644 index d0cf3f86931dbffae1aa6c0b182722be1376b089..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/smp-tbsync.c +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Smp timebase synchronization for ppc. - * - * Copyright (C) 2003 Samuel Rydh (samuel@ibrium.se) - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#define NUM_ITER 300 - -enum { - kExit=0, kSetAndTest, kTest -}; - -static struct { - volatile int tbu; - volatile int tbl; - volatile int mark; - volatile int cmd; - volatile int handshake; - int filler[3]; - - volatile int ack; - int filler2[7]; - - volatile int race_result; -} *tbsync; - -static volatile int running; - -static void __devinit -enter_contest( int mark, int add ) -{ - while( (int)(get_tbl() - mark) < 0 ) - tbsync->race_result = add; -} - -void __devinit -smp_generic_take_timebase( void ) -{ - int cmd, tbl, tbu; - unsigned long flags; - - local_irq_save(flags); - while( !running ) - ; - rmb(); - - for( ;; ) { - tbsync->ack = 1; - while( !tbsync->handshake ) - ; - rmb(); - - cmd = tbsync->cmd; - tbl = tbsync->tbl; - tbu = tbsync->tbu; - tbsync->ack = 0; - if( cmd == kExit ) - break; - - if( cmd == kSetAndTest ) { - while( tbsync->handshake ) - ; - asm volatile ("mttbl %0" :: "r" (tbl) ); - asm volatile ("mttbu %0" :: "r" (tbu) ); - } else { - while( tbsync->handshake ) - ; - } - enter_contest( tbsync->mark, -1 ); - } - local_irq_restore(flags); -} - -static int __devinit -start_contest( int cmd, int offset, int num ) -{ - int i, tbu, tbl, mark, score=0; - - tbsync->cmd = cmd; - - local_irq_disable(); - for( i=-3; itbu = tbu = get_tbu(); - tbsync->tbl = tbl + offset; - tbsync->mark = mark = tbl + 400; - - wmb(); - - tbsync->handshake = 1; - while( tbsync->ack ) - ; - - while( (int)(get_tbl() - tbl) <= 0 ) - ; - tbsync->handshake = 0; - enter_contest( mark, 1 ); - - while( !tbsync->ack ) - ; - - if( tbsync->tbu != get_tbu() || ((tbsync->tbl ^ get_tbl()) & 0x80000000) ) - continue; - if( i++ > 0 ) - score += tbsync->race_result; - } - local_irq_enable(); - return score; -} - -void __devinit -smp_generic_give_timebase( void ) -{ - int i, score, score2, old, min=0, max=5000, offset=1000; - - printk("Synchronizing timebase\n"); - - /* if this fails then this kernel won't work anyway... */ - tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL ); - mb(); - running = 1; - - while( !tbsync->ack ) - ; - - /* binary search */ - for( old=-1 ; old != offset ; offset=(min+max)/2 ) { - score = start_contest( kSetAndTest, offset, NUM_ITER ); - - printk("score %d, offset %d\n", score, offset ); - - if( score > 0 ) - max = offset; - else - min = offset; - old = offset; - } - score = start_contest( kSetAndTest, min, NUM_ITER ); - score2 = start_contest( kSetAndTest, max, NUM_ITER ); - - printk( "Min %d (score %d), Max %d (score %d)\n", min, score, max, score2 ); - score = abs( score ); - score2 = abs( score2 ); - offset = (score < score2) ? min : max; - - /* guard against inaccurate mttb */ - for( i=0; i<10; i++ ) { - start_contest( kSetAndTest, offset, NUM_ITER/10 ); - - if( (score2=start_contest(kTest, offset, NUM_ITER)) < 0 ) - score2 = -score2; - if( score2 <= score || score2 < 20 ) - break; - } - printk("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER ); - - /* exiting */ - tbsync->cmd = kExit; - wmb(); - tbsync->handshake = 1; - while( tbsync->ack ) - ; - tbsync->handshake = 0; - kfree( tbsync ); - tbsync = NULL; - running = 0; - - /* all done */ - smp_tb_synchronized = 1; -} diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c deleted file mode 100644 index 055998575cb48ec3d484bb2094a7c2aa8e119d08..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/smp.c +++ /dev/null @@ -1,414 +0,0 @@ -/* - * Smp support for ppc. - * - * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great - * deal of code from the sparc and intel versions. - * - * Copyright (C) 1999 Cort Dougan - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -volatile int smp_commenced; -int smp_tb_synchronized; -struct cpuinfo_PPC cpu_data[NR_CPUS]; -atomic_t ipi_recv; -atomic_t ipi_sent; -cpumask_t cpu_online_map; -cpumask_t cpu_possible_map; -int smp_hw_index[NR_CPUS]; -struct thread_info *secondary_ti; -static struct task_struct *idle_tasks[NR_CPUS]; - -EXPORT_SYMBOL(cpu_online_map); -EXPORT_SYMBOL(cpu_possible_map); - -/* SMP operations for this machine */ -struct smp_ops_t *smp_ops; - -/* all cpu mappings are 1-1 -- Cort */ -volatile unsigned long cpu_callin_map[NR_CPUS]; - -int start_secondary(void *); -void smp_call_function_interrupt(void); -static int __smp_call_function(void (*func) (void *info), void *info, - int wait, int target); - -/* Low level assembly function used to backup CPU 0 state */ -extern void __save_cpu_setup(void); - -/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. - * - * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up - * in /proc/interrupts will be wrong!!! --Troy */ -#define PPC_MSG_CALL_FUNCTION 0 -#define PPC_MSG_RESCHEDULE 1 -#define PPC_MSG_INVALIDATE_TLB 2 -#define PPC_MSG_XMON_BREAK 3 - -static inline void -smp_message_pass(int target, int msg) -{ - if (smp_ops) { - atomic_inc(&ipi_sent); - smp_ops->message_pass(target, msg); - } -} - -/* - * Common functions - */ -void smp_message_recv(int msg) -{ - atomic_inc(&ipi_recv); - - switch( msg ) { - case PPC_MSG_CALL_FUNCTION: - smp_call_function_interrupt(); - break; - case PPC_MSG_RESCHEDULE: - set_need_resched(); - break; - case PPC_MSG_INVALIDATE_TLB: - _tlbia(); - break; -#ifdef CONFIG_XMON - case PPC_MSG_XMON_BREAK: - xmon(get_irq_regs()); - break; -#endif /* CONFIG_XMON */ - default: - printk("SMP %d: smp_message_recv(): unknown msg %d\n", - smp_processor_id(), msg); - break; - } -} - -/* - * 750's don't broadcast tlb invalidates so - * we have to emulate that behavior. - * -- Cort - */ -void smp_send_tlb_invalidate(int cpu) -{ - if ( PVR_VER(mfspr(SPRN_PVR)) == 8 ) - smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB); -} - -void smp_send_reschedule(int cpu) -{ - /* - * This is only used if `cpu' is running an idle task, - * so it will reschedule itself anyway... - * - * This isn't the case anymore since the other CPU could be - * sleeping and won't reschedule until the next interrupt (such - * as the timer). - * -- Cort - */ - /* This is only used if `cpu' is running an idle task, - so it will reschedule itself anyway... */ - smp_message_pass(cpu, PPC_MSG_RESCHEDULE); -} - -#ifdef CONFIG_XMON -void smp_send_xmon_break(int cpu) -{ - smp_message_pass(cpu, PPC_MSG_XMON_BREAK); -} -#endif /* CONFIG_XMON */ - -static void stop_this_cpu(void *dummy) -{ - local_irq_disable(); - while (1) - ; -} - -void smp_send_stop(void) -{ - smp_call_function(stop_this_cpu, NULL, 1, 0); -} - -/* - * Structure and data for smp_call_function(). This is designed to minimise - * static memory requirements. It also looks cleaner. - * Stolen from the i386 version. - */ -static DEFINE_SPINLOCK(call_lock); - -static struct call_data_struct { - void (*func) (void *info); - void *info; - atomic_t started; - atomic_t finished; - int wait; -} *call_data; - -/* - * this function sends a 'generic call function' IPI to all other CPUs - * in the system. - */ - -int smp_call_function(void (*func) (void *info), void *info, int nonatomic, - int wait) -/* - * [SUMMARY] Run a function on all other CPUs. - * The function to run. This must be fast and non-blocking. - * An arbitrary pointer to pass to the function. - * currently unused. - * If true, wait (atomically) until function has completed on other CPUs. - * [RETURNS] 0 on success, else a negative status code. Does not return until - * remote CPUs are nearly ready to execute <> or are or have executed. - * - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ -{ - /* FIXME: get cpu lock with hotplug cpus, or change this to - bitmask. --RR */ - if (num_online_cpus() <= 1) - return 0; - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - return __smp_call_function(func, info, wait, MSG_ALL_BUT_SELF); -} - -static int __smp_call_function(void (*func) (void *info), void *info, - int wait, int target) -{ - struct call_data_struct data; - int ret = -1; - int timeout; - int ncpus = 1; - - if (target == MSG_ALL_BUT_SELF) - ncpus = num_online_cpus() - 1; - else if (target == MSG_ALL) - ncpus = num_online_cpus(); - - data.func = func; - data.info = info; - atomic_set(&data.started, 0); - data.wait = wait; - if (wait) - atomic_set(&data.finished, 0); - - spin_lock(&call_lock); - call_data = &data; - /* Send a message to all other CPUs and wait for them to respond */ - smp_message_pass(target, PPC_MSG_CALL_FUNCTION); - - /* Wait for response */ - timeout = 1000000; - while (atomic_read(&data.started) != ncpus) { - if (--timeout == 0) { - printk("smp_call_function on cpu %d: other cpus not responding (%d)\n", - smp_processor_id(), atomic_read(&data.started)); - goto out; - } - barrier(); - udelay(1); - } - - if (wait) { - timeout = 1000000; - while (atomic_read(&data.finished) != ncpus) { - if (--timeout == 0) { - printk("smp_call_function on cpu %d: other cpus not finishing (%d/%d)\n", - smp_processor_id(), atomic_read(&data.finished), atomic_read(&data.started)); - goto out; - } - barrier(); - udelay(1); - } - } - ret = 0; - - out: - spin_unlock(&call_lock); - return ret; -} - -void smp_call_function_interrupt(void) -{ - void (*func) (void *info) = call_data->func; - void *info = call_data->info; - int wait = call_data->wait; - - /* - * Notify initiating CPU that I've grabbed the data and am - * about to execute the function - */ - atomic_inc(&call_data->started); - /* - * At this point the info structure may be out of scope unless wait==1 - */ - (*func)(info); - if (wait) - atomic_inc(&call_data->finished); -} - -static void __devinit smp_store_cpu_info(int id) -{ - struct cpuinfo_PPC *c = &cpu_data[id]; - - /* assume bogomips are same for everything */ - c->loops_per_jiffy = loops_per_jiffy; - c->pvr = mfspr(SPRN_PVR); -} - -void __init smp_prepare_cpus(unsigned int max_cpus) -{ - int num_cpus, i, cpu; - struct task_struct *p; - - /* Fixup boot cpu */ - smp_store_cpu_info(smp_processor_id()); - cpu_callin_map[smp_processor_id()] = 1; - - if (smp_ops == NULL) { - printk("SMP not supported on this machine.\n"); - return; - } - - /* Probe platform for CPUs: always linear. */ - num_cpus = smp_ops->probe(); - - if (num_cpus < 2) - smp_tb_synchronized = 1; - - for (i = 0; i < num_cpus; ++i) - cpu_set(i, cpu_possible_map); - - /* Backup CPU 0 state */ - __save_cpu_setup(); - - for_each_possible_cpu(cpu) { - if (cpu == smp_processor_id()) - continue; - /* create a process for the processor */ - p = fork_idle(cpu); - if (IS_ERR(p)) - panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p)); - task_thread_info(p)->cpu = cpu; - idle_tasks[cpu] = p; - } -} - -void __devinit smp_prepare_boot_cpu(void) -{ - cpu_set(smp_processor_id(), cpu_online_map); - cpu_set(smp_processor_id(), cpu_possible_map); -} - -int __init setup_profiling_timer(unsigned int multiplier) -{ - return 0; -} - -/* Processor coming up starts here */ -int __devinit start_secondary(void *unused) -{ - int cpu; - - atomic_inc(&init_mm.mm_count); - current->active_mm = &init_mm; - - cpu = smp_processor_id(); - smp_store_cpu_info(cpu); - set_dec(tb_ticks_per_jiffy); - preempt_disable(); - cpu_callin_map[cpu] = 1; - - printk("CPU %d done callin...\n", cpu); - smp_ops->setup_cpu(cpu); - printk("CPU %d done setup...\n", cpu); - smp_ops->take_timebase(); - printk("CPU %d done timebase take...\n", cpu); - - spin_lock(&call_lock); - cpu_set(cpu, cpu_online_map); - spin_unlock(&call_lock); - - local_irq_enable(); - - cpu_idle(); - return 0; -} - -int __cpu_up(unsigned int cpu) -{ - char buf[32]; - int c; - - secondary_ti = task_thread_info(idle_tasks[cpu]); - mb(); - - /* - * There was a cache flush loop here to flush the cache - * to memory for the first 8MB of RAM. The cache flush - * has been pushed into the kick_cpu function for those - * platforms that need it. - */ - - /* wake up cpu */ - smp_ops->kick_cpu(cpu); - - /* - * wait to see if the cpu made a callin (is actually up). - * use this value that I found through experimentation. - * -- Cort - */ - for (c = 1000; c && !cpu_callin_map[cpu]; c--) - udelay(100); - - if (!cpu_callin_map[cpu]) { - sprintf(buf, "didn't find cpu %u", cpu); - if (ppc_md.progress) ppc_md.progress(buf, 0x360+cpu); - printk("Processor %u is stuck.\n", cpu); - return -ENOENT; - } - - sprintf(buf, "found cpu %u", cpu); - if (ppc_md.progress) ppc_md.progress(buf, 0x350+cpu); - printk("Processor %d found.\n", cpu); - - smp_ops->give_timebase(); - - /* Wait until cpu puts itself in the online map */ - while (!cpu_online(cpu)) - cpu_relax(); - - return 0; -} - -void smp_cpus_done(unsigned int max_cpus) -{ - smp_ops->setup_cpu(0); -} diff --git a/arch/ppc/kernel/softemu8xx.c b/arch/ppc/kernel/softemu8xx.c deleted file mode 100644 index 9bbb6bf7b6459b643bf0afbe9f06d30432380313..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/softemu8xx.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Software emulation of some PPC instructions for the 8xx core. - * - * Copyright (C) 1998 Dan Malek (dmalek@jlc.net) - * - * Software floating emuation for the MPC8xx processor. I did this mostly - * because it was easier than trying to get the libraries compiled for - * software floating point. The goal is still to get the libraries done, - * but I lost patience and needed some hacks to at least get init and - * shells running. The first problem is the setjmp/longjmp that save - * and restore the floating point registers. - * - * For this emulation, our working registers are found on the register - * save area. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -extern void -print_8xx_pte(struct mm_struct *mm, unsigned long addr); -extern int -get_8xx_pte(struct mm_struct *mm, unsigned long addr); - -/* Eventually we may need a look-up table, but this works for now. -*/ -#define LFS 48 -#define LFD 50 -#define LFDU 51 -#define STFD 54 -#define STFDU 55 -#define FMR 63 - -/* - * We return 0 on success, 1 on unimplemented instruction, and EFAULT - * if a load/store faulted. - */ -int -Soft_emulate_8xx(struct pt_regs *regs) -{ - uint inst, instword; - uint flreg, idxreg, disp; - uint retval; - signed short sdisp; - uint *ea, *ip; - - retval = 0; - - instword = *((uint *)regs->nip); - inst = instword >> 26; - - flreg = (instword >> 21) & 0x1f; - idxreg = (instword >> 16) & 0x1f; - disp = instword & 0xffff; - - ea = (uint *)(regs->gpr[idxreg] + disp); - ip = (uint *)¤t->thread.fpr[flreg]; - - switch ( inst ) - { - case LFD: - /* this is a 16 bit quantity that is sign extended - * so use a signed short here -- Cort - */ - sdisp = (instword & 0xffff); - ea = (uint *)(regs->gpr[idxreg] + sdisp); - if (copy_from_user(ip, ea, sizeof(double))) - retval = -EFAULT; - break; - - case LFDU: - if (copy_from_user(ip, ea, sizeof(double))) - retval = -EFAULT; - else - regs->gpr[idxreg] = (uint)ea; - break; - case LFS: - sdisp = (instword & 0xffff); - ea = (uint *)(regs->gpr[idxreg] + sdisp); - if (copy_from_user(ip, ea, sizeof(float))) - retval = -EFAULT; - break; - case STFD: - /* this is a 16 bit quantity that is sign extended - * so use a signed short here -- Cort - */ - sdisp = (instword & 0xffff); - ea = (uint *)(regs->gpr[idxreg] + sdisp); - if (copy_to_user(ea, ip, sizeof(double))) - retval = -EFAULT; - break; - - case STFDU: - if (copy_to_user(ea, ip, sizeof(double))) - retval = -EFAULT; - else - regs->gpr[idxreg] = (uint)ea; - break; - case FMR: - /* assume this is a fp move -- Cort */ - memcpy( ip, ¤t->thread.fpr[(instword>>11)&0x1f], - sizeof(double) ); - break; - default: - retval = 1; - printk("Bad emulation %s/%d\n" - " NIP: %08lx instruction: %08x opcode: %x " - "A: %x B: %x C: %x code: %x rc: %x\n", - current->comm,current->pid, - regs->nip, - instword,inst, - (instword>>16)&0x1f, - (instword>>11)&0x1f, - (instword>>6)&0x1f, - (instword>>1)&0x3ff, - instword&1); - { - int pa; - print_8xx_pte(current->mm,regs->nip); - pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK; - pa |= (regs->nip & ~PAGE_MASK); - pa = (unsigned long)__va(pa); - printk("Kernel VA for NIP %x ", pa); - print_8xx_pte(current->mm,pa); - } - - } - - if (retval == 0) - regs->nip += 4; - return(retval); -} - diff --git a/arch/ppc/kernel/time.c b/arch/ppc/kernel/time.c deleted file mode 100644 index 18ee851e33e387675ae6d9e7ab5fb18091732247..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/time.c +++ /dev/null @@ -1,445 +0,0 @@ -/* - * Common time routines among all ppc machines. - * - * Written by Cort Dougan (cort@cs.nmt.edu) to merge - * Paul Mackerras' version and mine for PReP and Pmac. - * MPC8xx/MBX changes by Dan Malek (dmalek@jlc.net). - * - * First round of bugfixes by Gabriel Paubert (paubert@iram.es) - * to make clock more stable (2.4.0-test5). The only thing - * that this code assumes is that the timebases have been synchronized - * by firmware on SMP and are never stopped (never do sleep - * on SMP then, nap and doze are OK). - * - * TODO (not necessarily in this file): - * - improve precision and reproducibility of timebase frequency - * measurement at boot time. - * - get rid of xtime_lock for gettimeofday (generic kernel problem - * to be implemented on all architectures for SMP scalability and - * eventually implementing gettimeofday without entering the kernel). - * - put all time/clock related variables in a single structure - * to minimize number of cache lines touched by gettimeofday() - * - for astronomical applications: add a new function to get - * non ambiguous timestamps even around leap seconds. This needs - * a new timestamp format and a good name. - * - * - * The following comment is partially obsolete (at least the long wait - * is no more a valid reason): - * Since the MPC8xx has a programmable interrupt timer, I decided to - * use that rather than the decrementer. Two reasons: 1.) the clock - * frequency is low, causing 2.) a long wait in the timer interrupt - * while ((d = get_dec()) == dval) - * loop. The MPC8xx can be driven from a variety of input clocks, - * so a number of assumptions have been made here because the kernel - * parameter HZ is a constant. We assume (correctly, today :-) that - * the MPC8xx on the MBX board is driven from a 32.768 kHz crystal. - * This is then divided by 4, providing a 8192 Hz clock into the PIT. - * Since it is not possible to get a nice 100 Hz clock out of this, without - * creating a software PLL, I have set HZ to 128. -- Dan - * - * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 - * "A Kernel Model for Precision Timekeeping" by Dave Mills - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -unsigned long disarm_decr[NR_CPUS]; - -extern struct timezone sys_tz; - -/* keep track of when we need to update the rtc */ -time_t last_rtc_update; - -/* The decrementer counts down by 128 every 128ns on a 601. */ -#define DECREMENTER_COUNT_601 (1000000000 / HZ) - -unsigned tb_ticks_per_jiffy; -unsigned tb_to_us; -unsigned tb_last_stamp; -unsigned long tb_to_ns_scale; - -/* used for timezone offset */ -static long timezone_offset; - -DEFINE_SPINLOCK(rtc_lock); - -EXPORT_SYMBOL(rtc_lock); - -/* Timer interrupt helper function */ -static inline int tb_delta(unsigned *jiffy_stamp) { - int delta; - if (__USE_RTC()) { - delta = get_rtcl(); - if (delta < *jiffy_stamp) *jiffy_stamp -= 1000000000; - delta -= *jiffy_stamp; - } else { - delta = get_tbl() - *jiffy_stamp; - } - return delta; -} - -#ifdef CONFIG_SMP -unsigned long profile_pc(struct pt_regs *regs) -{ - unsigned long pc = instruction_pointer(regs); - - if (in_lock_functions(pc)) - return regs->link; - - return pc; -} -EXPORT_SYMBOL(profile_pc); -#endif - -void wakeup_decrementer(void) -{ - set_dec(tb_ticks_per_jiffy); - /* No currently-supported powerbook has a 601, - * so use get_tbl, not native - */ - last_jiffy_stamp(0) = tb_last_stamp = get_tbl(); -} - -/* - * timer_interrupt - gets called when the decrementer overflows, - * with interrupts disabled. - * We set it up to overflow again in 1/HZ seconds. - */ -void timer_interrupt(struct pt_regs * regs) -{ - struct pt_regs *old_regs; - int next_dec; - unsigned long cpu = smp_processor_id(); - unsigned jiffy_stamp = last_jiffy_stamp(cpu); - extern void do_IRQ(struct pt_regs *); - - if (atomic_read(&ppc_n_lost_interrupts) != 0) - do_IRQ(regs); - - old_regs = set_irq_regs(regs); - irq_enter(); - - while ((next_dec = tb_ticks_per_jiffy - tb_delta(&jiffy_stamp)) <= 0) { - jiffy_stamp += tb_ticks_per_jiffy; - - profile_tick(CPU_PROFILING); - update_process_times(user_mode(regs)); - - if (smp_processor_id()) - continue; - - /* We are in an interrupt, no need to save/restore flags */ - write_seqlock(&xtime_lock); - tb_last_stamp = jiffy_stamp; - do_timer(1); - - /* - * update the rtc when needed, this should be performed on the - * right fraction of a second. Half or full second ? - * Full second works on mk48t59 clocks, others need testing. - * Note that this update is basically only used through - * the adjtimex system calls. Setting the HW clock in - * any other way is a /dev/rtc and userland business. - * This is still wrong by -0.5/+1.5 jiffies because of the - * timer interrupt resolution and possible delay, but here we - * hit a quantization limit which can only be solved by higher - * resolution timers and decoupling time management from timer - * interrupts. This is also wrong on the clocks - * which require being written at the half second boundary. - * We should have an rtc call that only sets the minutes and - * seconds like on Intel to avoid problems with non UTC clocks. - */ - if ( ppc_md.set_rtc_time && ntp_synced() && - xtime.tv_sec - last_rtc_update >= 659 && - abs((xtime.tv_nsec / 1000) - (1000000-1000000/HZ)) < 500000/HZ) { - if (ppc_md.set_rtc_time(xtime.tv_sec+1 + timezone_offset) == 0) - last_rtc_update = xtime.tv_sec+1; - else - /* Try again one minute later */ - last_rtc_update += 60; - } - write_sequnlock(&xtime_lock); - } - if ( !disarm_decr[smp_processor_id()] ) - set_dec(next_dec); - last_jiffy_stamp(cpu) = jiffy_stamp; - - if (ppc_md.heartbeat && !ppc_md.heartbeat_count--) - ppc_md.heartbeat(); - - irq_exit(); - set_irq_regs(old_regs); -} - -/* - * This version of gettimeofday has microsecond resolution. - */ -void do_gettimeofday(struct timeval *tv) -{ - unsigned long flags; - unsigned long seq; - unsigned delta, usec, sec; - - do { - seq = read_seqbegin_irqsave(&xtime_lock, flags); - sec = xtime.tv_sec; - usec = (xtime.tv_nsec / 1000); - delta = tb_ticks_since(tb_last_stamp); -#ifdef CONFIG_SMP - /* As long as timebases are not in sync, gettimeofday can only - * have jiffy resolution on SMP. - */ - if (!smp_tb_synchronized) - delta = 0; -#endif /* CONFIG_SMP */ - } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); - - usec += mulhwu(tb_to_us, delta); - while (usec >= 1000000) { - sec++; - usec -= 1000000; - } - tv->tv_sec = sec; - tv->tv_usec = usec; -} - -EXPORT_SYMBOL(do_gettimeofday); - -int do_settimeofday(struct timespec *tv) -{ - time_t wtm_sec, new_sec = tv->tv_sec; - long wtm_nsec, new_nsec = tv->tv_nsec; - unsigned long flags; - int tb_delta; - - if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) - return -EINVAL; - - write_seqlock_irqsave(&xtime_lock, flags); - /* Updating the RTC is not the job of this code. If the time is - * stepped under NTP, the RTC will be update after STA_UNSYNC - * is cleared. Tool like clock/hwclock either copy the RTC - * to the system time, in which case there is no point in writing - * to the RTC again, or write to the RTC but then they don't call - * settimeofday to perform this operation. Note also that - * we don't touch the decrementer since: - * a) it would lose timer interrupt synchronization on SMP - * (if it is working one day) - * b) it could make one jiffy spuriously shorter or longer - * which would introduce another source of uncertainty potentially - * harmful to relatively short timers. - */ - - /* This works perfectly on SMP only if the tb are in sync but - * guarantees an error < 1 jiffy even if they are off by eons, - * still reasonable when gettimeofday resolution is 1 jiffy. - */ - tb_delta = tb_ticks_since(last_jiffy_stamp(smp_processor_id())); - - new_nsec -= 1000 * mulhwu(tb_to_us, tb_delta); - - wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - new_sec); - wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - new_nsec); - - set_normalized_timespec(&xtime, new_sec, new_nsec); - set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); - - /* In case of a large backwards jump in time with NTP, we want the - * clock to be updated as soon as the PLL is again in lock. - */ - last_rtc_update = new_sec - 658; - - ntp_clear(); - write_sequnlock_irqrestore(&xtime_lock, flags); - clock_was_set(); - return 0; -} - -EXPORT_SYMBOL(do_settimeofday); - -/* This function is only called on the boot processor */ -void __init time_init(void) -{ - time_t sec, old_sec; - unsigned old_stamp, stamp, elapsed; - - if (ppc_md.time_init != NULL) - timezone_offset = ppc_md.time_init(); - - if (__USE_RTC()) { - /* 601 processor: dec counts down by 128 every 128ns */ - tb_ticks_per_jiffy = DECREMENTER_COUNT_601; - /* mulhwu_scale_factor(1000000000, 1000000) is 0x418937 */ - tb_to_us = 0x418937; - } else { - ppc_md.calibrate_decr(); - tb_to_ns_scale = mulhwu(tb_to_us, 1000 << 10); - } - - /* Now that the decrementer is calibrated, it can be used in case the - * clock is stuck, but the fact that we have to handle the 601 - * makes things more complex. Repeatedly read the RTC until the - * next second boundary to try to achieve some precision. If there - * is no RTC, we still need to set tb_last_stamp and - * last_jiffy_stamp(cpu 0) to the current stamp. - */ - stamp = get_native_tbl(); - if (ppc_md.get_rtc_time) { - sec = ppc_md.get_rtc_time(); - elapsed = 0; - do { - old_stamp = stamp; - old_sec = sec; - stamp = get_native_tbl(); - if (__USE_RTC() && stamp < old_stamp) - old_stamp -= 1000000000; - elapsed += stamp - old_stamp; - sec = ppc_md.get_rtc_time(); - } while ( sec == old_sec && elapsed < 2*HZ*tb_ticks_per_jiffy); - if (sec==old_sec) - printk("Warning: real time clock seems stuck!\n"); - xtime.tv_sec = sec; - xtime.tv_nsec = 0; - /* No update now, we just read the time from the RTC ! */ - last_rtc_update = xtime.tv_sec; - } - last_jiffy_stamp(0) = tb_last_stamp = stamp; - - /* Not exact, but the timer interrupt takes care of this */ - set_dec(tb_ticks_per_jiffy); - - /* If platform provided a timezone (pmac), we correct the time */ - if (timezone_offset) { - sys_tz.tz_minuteswest = -timezone_offset / 60; - sys_tz.tz_dsttime = 0; - xtime.tv_sec -= timezone_offset; - } - set_normalized_timespec(&wall_to_monotonic, - -xtime.tv_sec, -xtime.tv_nsec); -} - -#define FEBRUARY 2 -#define STARTOFTIME 1970 -#define SECDAY 86400L -#define SECYR (SECDAY * 365) - -/* - * Note: this is wrong for 2100, but our signed 32-bit time_t will - * have overflowed long before that, so who cares. -- paulus - */ -#define leapyear(year) ((year) % 4 == 0) -#define days_in_year(a) (leapyear(a) ? 366 : 365) -#define days_in_month(a) (month_days[(a) - 1]) - -static int month_days[12] = { - 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 -}; - -void to_tm(int tim, struct rtc_time * tm) -{ - register int i; - register long hms, day, gday; - - gday = day = tim / SECDAY; - hms = tim % SECDAY; - - /* Hours, minutes, seconds are easy */ - tm->tm_hour = hms / 3600; - tm->tm_min = (hms % 3600) / 60; - tm->tm_sec = (hms % 3600) % 60; - - /* Number of years in days */ - for (i = STARTOFTIME; day >= days_in_year(i); i++) - day -= days_in_year(i); - tm->tm_year = i; - - /* Number of months in days left */ - if (leapyear(tm->tm_year)) - days_in_month(FEBRUARY) = 29; - for (i = 1; day >= days_in_month(i); i++) - day -= days_in_month(i); - days_in_month(FEBRUARY) = 28; - tm->tm_mon = i; - - /* Days are what is left over (+1) from all that. */ - tm->tm_mday = day + 1; - - /* - * Determine the day of week. Jan. 1, 1970 was a Thursday. - */ - tm->tm_wday = (gday + 4) % 7; -} - -/* Auxiliary function to compute scaling factors */ -/* Actually the choice of a timebase running at 1/4 the of the bus - * frequency giving resolution of a few tens of nanoseconds is quite nice. - * It makes this computation very precise (27-28 bits typically) which - * is optimistic considering the stability of most processor clock - * oscillators and the precision with which the timebase frequency - * is measured but does not harm. - */ -unsigned mulhwu_scale_factor(unsigned inscale, unsigned outscale) { - unsigned mlt=0, tmp, err; - /* No concern for performance, it's done once: use a stupid - * but safe and compact method to find the multiplier. - */ - for (tmp = 1U<<31; tmp != 0; tmp >>= 1) { - if (mulhwu(inscale, mlt|tmp) < outscale) mlt|=tmp; - } - /* We might still be off by 1 for the best approximation. - * A side effect of this is that if outscale is too large - * the returned value will be zero. - * Many corner cases have been checked and seem to work, - * some might have been forgotten in the test however. - */ - err = inscale*(mlt+1); - if (err <= inscale/2) mlt++; - return mlt; -} - -unsigned long long sched_clock(void) -{ - unsigned long lo, hi, hi2; - unsigned long long tb; - - if (!__USE_RTC()) { - do { - hi = get_tbu(); - lo = get_tbl(); - hi2 = get_tbu(); - } while (hi2 != hi); - tb = ((unsigned long long) hi << 32) | lo; - tb = (tb * tb_to_ns_scale) >> 10; - } else { - do { - hi = get_rtcu(); - lo = get_rtcl(); - hi2 = get_rtcu(); - } while (hi2 != hi); - tb = ((unsigned long long) hi) * 1000000000 + lo; - } - return tb; -} diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c deleted file mode 100644 index a467a429c2fe9ebfcebe3185d9959fb548adfc94..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/traps.c +++ /dev/null @@ -1,826 +0,0 @@ -/* - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * Modified by Cort Dougan (cort@cs.nmt.edu) - * and Paul Mackerras (paulus@cs.anu.edu.au) - */ - -/* - * This file handles the architecture-dependent parts of hardware exceptions - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_XMON -extern int xmon_bpt(struct pt_regs *regs); -extern int xmon_sstep(struct pt_regs *regs); -extern int xmon_iabr_match(struct pt_regs *regs); -extern int xmon_dabr_match(struct pt_regs *regs); - -int (*debugger)(struct pt_regs *regs) = xmon; -int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt; -int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep; -int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match; -int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match; -void (*debugger_fault_handler)(struct pt_regs *regs); -#else -#ifdef CONFIG_KGDB -int (*debugger)(struct pt_regs *regs); -int (*debugger_bpt)(struct pt_regs *regs); -int (*debugger_sstep)(struct pt_regs *regs); -int (*debugger_iabr_match)(struct pt_regs *regs); -int (*debugger_dabr_match)(struct pt_regs *regs); -void (*debugger_fault_handler)(struct pt_regs *regs); -#else -#define debugger(regs) do { } while (0) -#define debugger_bpt(regs) 0 -#define debugger_sstep(regs) 0 -#define debugger_iabr_match(regs) 0 -#define debugger_dabr_match(regs) 0 -#define debugger_fault_handler ((void (*)(struct pt_regs *))0) -#endif -#endif - -/* - * Trap & Exception support - */ - -DEFINE_SPINLOCK(die_lock); - -int die(const char * str, struct pt_regs * fp, long err) -{ - static int die_counter; - int nl = 0; - console_verbose(); - spin_lock_irq(&die_lock); - printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter); -#ifdef CONFIG_PREEMPT - printk("PREEMPT "); - nl = 1; -#endif -#ifdef CONFIG_SMP - printk("SMP NR_CPUS=%d ", NR_CPUS); - nl = 1; -#endif - if (nl) - printk("\n"); - show_regs(fp); - add_taint(TAINT_DIE); - spin_unlock_irq(&die_lock); - /* do_exit() should take care of panic'ing from an interrupt - * context so we don't handle it here - */ - do_exit(err); -} - -void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) -{ - siginfo_t info; - - if (!user_mode(regs)) { - debugger(regs); - die("Exception in kernel mode", regs, signr); - } - info.si_signo = signr; - info.si_errno = 0; - info.si_code = code; - info.si_addr = (void __user *) addr; - force_sig_info(signr, &info, current); - - /* - * Init gets no signals that it doesn't have a handler for. - * That's all very well, but if it has caused a synchronous - * exception and we ignore the resulting signal, it will just - * generate the same exception over and over again and we get - * nowhere. Better to kill it and let the kernel panic. - */ - if (is_global_init(current)) { - __sighandler_t handler; - - spin_lock_irq(¤t->sighand->siglock); - handler = current->sighand->action[signr-1].sa.sa_handler; - spin_unlock_irq(¤t->sighand->siglock); - if (handler == SIG_DFL) { - /* init has generated a synchronous exception - and it doesn't have a handler for the signal */ - printk(KERN_CRIT "init has generated signal %d " - "but has no handler for it\n", signr); - do_exit(signr); - } - } -} - -/* - * I/O accesses can cause machine checks on powermacs. - * Check if the NIP corresponds to the address of a sync - * instruction for which there is an entry in the exception - * table. - * Note that the 601 only takes a machine check on TEA - * (transfer error ack) signal assertion, and does not - * set any of the top 16 bits of SRR1. - * -- paulus. - */ -static inline int check_io_access(struct pt_regs *regs) -{ -#if defined CONFIG_8xx - unsigned long msr = regs->msr; - const struct exception_table_entry *entry; - unsigned int *nip = (unsigned int *)regs->nip; - - if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000))) - && (entry = search_exception_tables(regs->nip)) != NULL) { - /* - * Check that it's a sync instruction, or somewhere - * in the twi; isync; nop sequence that inb/inw/inl uses. - * As the address is in the exception table - * we should be able to read the instr there. - * For the debug message, we look at the preceding - * load or store. - */ - if (*nip == 0x60000000) /* nop */ - nip -= 2; - else if (*nip == 0x4c00012c) /* isync */ - --nip; - /* eieio from I/O string functions */ - else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac) - nip += 2; - if (*nip == 0x7c0004ac || (*nip >> 26) == 3 || - (*(nip+1) >> 26) == 3) { - /* sync or twi */ - unsigned int rb; - - --nip; - rb = (*nip >> 11) & 0x1f; - printk(KERN_DEBUG "%s bad port %lx at %p\n", - (*nip & 0x100)? "OUT to": "IN from", - regs->gpr[rb] - _IO_BASE, nip); - regs->msr |= MSR_RI; - regs->nip = entry->fixup; - return 1; - } - } -#endif /* CONFIG_8xx */ - return 0; -} - -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) -/* On 4xx, the reason for the machine check or program exception - is in the ESR. */ -#define get_reason(regs) ((regs)->dsisr) -#define get_mc_reason(regs) ((regs)->dsisr) -#define REASON_FP ESR_FP -#define REASON_ILLEGAL (ESR_PIL | ESR_PUO) -#define REASON_PRIVILEGED ESR_PPR -#define REASON_TRAP ESR_PTR - -/* single-step stuff */ -#define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC) -#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC) - -#else -/* On non-4xx, the reason for the machine check or program - exception is in the MSR. */ -#define get_reason(regs) ((regs)->msr) -#define get_mc_reason(regs) ((regs)->msr) -#define REASON_FP 0x100000 -#define REASON_ILLEGAL 0x80000 -#define REASON_PRIVILEGED 0x40000 -#define REASON_TRAP 0x20000 - -#define single_stepping(regs) ((regs)->msr & MSR_SE) -#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE) -#endif - -/* - * This is "fall-back" implementation for configurations - * which don't provide platform-specific machine check info - */ -void __attribute__ ((weak)) -platform_machine_check(struct pt_regs *regs) -{ -} - -#if defined(CONFIG_4xx) -int machine_check_4xx(struct pt_regs *regs) -{ - unsigned long reason = get_mc_reason(regs); - - if (reason & ESR_IMCP) { - printk("Instruction"); - mtspr(SPRN_ESR, reason & ~ESR_IMCP); - } else - printk("Data"); - printk(" machine check in kernel mode.\n"); - - return 0; -} - -int machine_check_440A(struct pt_regs *regs) -{ - unsigned long reason = get_mc_reason(regs); - - printk("Machine check in kernel mode.\n"); - if (reason & ESR_IMCP){ - printk("Instruction Synchronous Machine Check exception\n"); - mtspr(SPRN_ESR, reason & ~ESR_IMCP); - } - else { - u32 mcsr = mfspr(SPRN_MCSR); - if (mcsr & MCSR_IB) - printk("Instruction Read PLB Error\n"); - if (mcsr & MCSR_DRB) - printk("Data Read PLB Error\n"); - if (mcsr & MCSR_DWB) - printk("Data Write PLB Error\n"); - if (mcsr & MCSR_TLBP) - printk("TLB Parity Error\n"); - if (mcsr & MCSR_ICP){ - flush_instruction_cache(); - printk("I-Cache Parity Error\n"); - } - if (mcsr & MCSR_DCSP) - printk("D-Cache Search Parity Error\n"); - if (mcsr & MCSR_DCFP) - printk("D-Cache Flush Parity Error\n"); - if (mcsr & MCSR_IMPE) - printk("Machine Check exception is imprecise\n"); - - /* Clear MCSR */ - mtspr(SPRN_MCSR, mcsr); - } - return 0; -} -#else -int machine_check_generic(struct pt_regs *regs) -{ - unsigned long reason = get_mc_reason(regs); - - printk("Machine check in kernel mode.\n"); - printk("Caused by (from SRR1=%lx): ", reason); - switch (reason & 0x601F0000) { - case 0x80000: - printk("Machine check signal\n"); - break; - case 0: /* for 601 */ - case 0x40000: - case 0x140000: /* 7450 MSS error and TEA */ - printk("Transfer error ack signal\n"); - break; - case 0x20000: - printk("Data parity error signal\n"); - break; - case 0x10000: - printk("Address parity error signal\n"); - break; - case 0x20000000: - printk("L1 Data Cache error\n"); - break; - case 0x40000000: - printk("L1 Instruction Cache error\n"); - break; - case 0x00100000: - printk("L2 data cache parity error\n"); - break; - default: - printk("Unknown values in msr\n"); - } - return 0; -} -#endif /* everything else */ - -void machine_check_exception(struct pt_regs *regs) -{ - int recover = 0; - - if (cur_cpu_spec->machine_check) - recover = cur_cpu_spec->machine_check(regs); - if (recover > 0) - return; - - if (user_mode(regs)) { - regs->msr |= MSR_RI; - _exception(SIGBUS, regs, BUS_ADRERR, regs->nip); - return; - } - -#if defined(CONFIG_8xx) && defined(CONFIG_PCI) - /* the qspan pci read routines can cause machine checks -- Cort */ - bad_page_fault(regs, regs->dar, SIGBUS); - return; -#endif - - if (debugger_fault_handler) { - debugger_fault_handler(regs); - regs->msr |= MSR_RI; - return; - } - - if (check_io_access(regs)) - return; - - /* - * Optional platform-provided routine to print out - * additional info, e.g. bus error registers. - */ - platform_machine_check(regs); - - debugger(regs); - die("machine check", regs, SIGBUS); -} - -void SMIException(struct pt_regs *regs) -{ - debugger(regs); -#if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB)) - show_regs(regs); - panic("System Management Interrupt"); -#endif -} - -void unknown_exception(struct pt_regs *regs) -{ - printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n", - regs->nip, regs->msr, regs->trap, print_tainted()); - _exception(SIGTRAP, regs, 0, 0); -} - -void instruction_breakpoint_exception(struct pt_regs *regs) -{ - if (debugger_iabr_match(regs)) - return; - _exception(SIGTRAP, regs, TRAP_BRKPT, 0); -} - -void RunModeException(struct pt_regs *regs) -{ - _exception(SIGTRAP, regs, 0, 0); -} - -/* Illegal instruction emulation support. Originally written to - * provide the PVR to user applications using the mfspr rd, PVR. - * Return non-zero if we can't emulate, or -EFAULT if the associated - * memory access caused an access fault. Return zero on success. - * - * There are a couple of ways to do this, either "decode" the instruction - * or directly match lots of bits. In this case, matching lots of - * bits is faster and easier. - * - */ -#define INST_MFSPR_PVR 0x7c1f42a6 -#define INST_MFSPR_PVR_MASK 0xfc1fffff - -#define INST_DCBA 0x7c0005ec -#define INST_DCBA_MASK 0x7c0007fe - -#define INST_MCRXR 0x7c000400 -#define INST_MCRXR_MASK 0x7c0007fe - -#define INST_STRING 0x7c00042a -#define INST_STRING_MASK 0x7c0007fe -#define INST_STRING_GEN_MASK 0x7c00067e -#define INST_LSWI 0x7c0004aa -#define INST_LSWX 0x7c00042a -#define INST_STSWI 0x7c0005aa -#define INST_STSWX 0x7c00052a - -static int emulate_string_inst(struct pt_regs *regs, u32 instword) -{ - u8 rT = (instword >> 21) & 0x1f; - u8 rA = (instword >> 16) & 0x1f; - u8 NB_RB = (instword >> 11) & 0x1f; - u32 num_bytes; - unsigned long EA; - int pos = 0; - - /* Early out if we are an invalid form of lswx */ - if ((instword & INST_STRING_MASK) == INST_LSWX) - if ((rT == rA) || (rT == NB_RB)) - return -EINVAL; - - EA = (rA == 0) ? 0 : regs->gpr[rA]; - - switch (instword & INST_STRING_MASK) { - case INST_LSWX: - case INST_STSWX: - EA += NB_RB; - num_bytes = regs->xer & 0x7f; - break; - case INST_LSWI: - case INST_STSWI: - num_bytes = (NB_RB == 0) ? 32 : NB_RB; - break; - default: - return -EINVAL; - } - - while (num_bytes != 0) - { - u8 val; - u32 shift = 8 * (3 - (pos & 0x3)); - - switch ((instword & INST_STRING_MASK)) { - case INST_LSWX: - case INST_LSWI: - if (get_user(val, (u8 __user *)EA)) - return -EFAULT; - /* first time updating this reg, - * zero it out */ - if (pos == 0) - regs->gpr[rT] = 0; - regs->gpr[rT] |= val << shift; - break; - case INST_STSWI: - case INST_STSWX: - val = regs->gpr[rT] >> shift; - if (put_user(val, (u8 __user *)EA)) - return -EFAULT; - break; - } - /* move EA to next address */ - EA += 1; - num_bytes--; - - /* manage our position within the register */ - if (++pos == 4) { - pos = 0; - if (++rT == 32) - rT = 0; - } - } - - return 0; -} - -static int emulate_instruction(struct pt_regs *regs) -{ - u32 instword; - u32 rd; - - if (!user_mode(regs)) - return -EINVAL; - CHECK_FULL_REGS(regs); - - if (get_user(instword, (u32 __user *)(regs->nip))) - return -EFAULT; - - /* Emulate the mfspr rD, PVR. - */ - if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) { - rd = (instword >> 21) & 0x1f; - regs->gpr[rd] = mfspr(SPRN_PVR); - return 0; - } - - /* Emulating the dcba insn is just a no-op. */ - if ((instword & INST_DCBA_MASK) == INST_DCBA) - return 0; - - /* Emulate the mcrxr insn. */ - if ((instword & INST_MCRXR_MASK) == INST_MCRXR) { - int shift = (instword >> 21) & 0x1c; - unsigned long msk = 0xf0000000UL >> shift; - - regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk); - regs->xer &= ~0xf0000000UL; - return 0; - } - - /* Emulate load/store string insn. */ - if ((instword & INST_STRING_GEN_MASK) == INST_STRING) - return emulate_string_inst(regs, instword); - - return -EINVAL; -} - -/* - * After we have successfully emulated an instruction, we have to - * check if the instruction was being single-stepped, and if so, - * pretend we got a single-step exception. This was pointed out - * by Kumar Gala. -- paulus - */ -static void emulate_single_step(struct pt_regs *regs) -{ - if (single_stepping(regs)) { - clear_single_step(regs); - _exception(SIGTRAP, regs, TRAP_TRACE, 0); - } -} - -int is_valid_bugaddr(unsigned long addr) -{ - return addr >= PAGE_OFFSET; -} - -void program_check_exception(struct pt_regs *regs) -{ - unsigned int reason = get_reason(regs); - extern int do_mathemu(struct pt_regs *regs); - -#ifdef CONFIG_MATH_EMULATION - /* (reason & REASON_ILLEGAL) would be the obvious thing here, - * but there seems to be a hardware bug on the 405GP (RevD) - * that means ESR is sometimes set incorrectly - either to - * ESR_DST (!?) or 0. In the process of chasing this with the - * hardware people - not sure if it can happen on any illegal - * instruction or only on FP instructions, whether there is a - * pattern to occurrences etc. -dgibson 31/Mar/2003 */ - if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) { - emulate_single_step(regs); - return; - } -#endif /* CONFIG_MATH_EMULATION */ - - if (reason & REASON_FP) { - /* IEEE FP exception */ - int code = 0; - u32 fpscr; - - /* We must make sure the FP state is consistent with - * our MSR_FP in regs - */ - preempt_disable(); - if (regs->msr & MSR_FP) - giveup_fpu(current); - preempt_enable(); - - fpscr = current->thread.fpscr.val; - fpscr &= fpscr << 22; /* mask summary bits with enables */ - if (fpscr & FPSCR_VX) - code = FPE_FLTINV; - else if (fpscr & FPSCR_OX) - code = FPE_FLTOVF; - else if (fpscr & FPSCR_UX) - code = FPE_FLTUND; - else if (fpscr & FPSCR_ZX) - code = FPE_FLTDIV; - else if (fpscr & FPSCR_XX) - code = FPE_FLTRES; - _exception(SIGFPE, regs, code, regs->nip); - return; - } - - if (reason & REASON_TRAP) { - /* trap exception */ - if (debugger_bpt(regs)) - return; - - if (!(regs->msr & MSR_PR) && /* not user-mode */ - report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) { - regs->nip += 4; - return; - } - _exception(SIGTRAP, regs, TRAP_BRKPT, 0); - return; - } - - /* Try to emulate it if we should. */ - if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) { - switch (emulate_instruction(regs)) { - case 0: - regs->nip += 4; - emulate_single_step(regs); - return; - case -EFAULT: - _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip); - return; - } - } - - if (reason & REASON_PRIVILEGED) - _exception(SIGILL, regs, ILL_PRVOPC, regs->nip); - else - _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); -} - -void single_step_exception(struct pt_regs *regs) -{ - regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ - if (debugger_sstep(regs)) - return; - _exception(SIGTRAP, regs, TRAP_TRACE, 0); -} - -void alignment_exception(struct pt_regs *regs) -{ - int sig, code, fixed = 0; - - fixed = fix_alignment(regs); - if (fixed == 1) { - regs->nip += 4; /* skip over emulated instruction */ - emulate_single_step(regs); - return; - } - if (fixed == -EFAULT) { - sig = SIGSEGV; - code = SEGV_ACCERR; - } else { - sig = SIGBUS; - code = BUS_ADRALN; - } - if (user_mode(regs)) - _exception(sig, regs, code, regs->dar); - else - bad_page_fault(regs, regs->dar, sig); -} - -void StackOverflow(struct pt_regs *regs) -{ - printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n", - current, regs->gpr[1]); - debugger(regs); - show_regs(regs); - panic("kernel stack overflow"); -} - -void nonrecoverable_exception(struct pt_regs *regs) -{ - printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n", - regs->nip, regs->msr); - debugger(regs); - die("nonrecoverable exception", regs, SIGKILL); -} - -void trace_syscall(struct pt_regs *regs) -{ - printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n", - current, current->pid, regs->nip, regs->link, regs->gpr[0], - regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted()); -} - -#ifdef CONFIG_8xx -void SoftwareEmulation(struct pt_regs *regs) -{ - extern int do_mathemu(struct pt_regs *); - extern int Soft_emulate_8xx(struct pt_regs *); - int errcode; - - CHECK_FULL_REGS(regs); - - if (!user_mode(regs)) { - debugger(regs); - die("Kernel Mode Software FPU Emulation", regs, SIGFPE); - } - -#ifdef CONFIG_MATH_EMULATION - errcode = do_mathemu(regs); -#else - errcode = Soft_emulate_8xx(regs); -#endif - if (errcode) { - if (errcode > 0) - _exception(SIGFPE, regs, 0, 0); - else if (errcode == -EFAULT) - _exception(SIGSEGV, regs, 0, 0); - else - _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); - } else - emulate_single_step(regs); -} -#endif /* CONFIG_8xx */ - -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - -void DebugException(struct pt_regs *regs, unsigned long debug_status) -{ - if (debug_status & DBSR_IC) { /* instruction completion */ - regs->msr &= ~MSR_DE; - if (user_mode(regs)) { - current->thread.dbcr0 &= ~DBCR0_IC; - } else { - /* Disable instruction completion */ - mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); - /* Clear the instruction completion event */ - mtspr(SPRN_DBSR, DBSR_IC); - if (debugger_sstep(regs)) - return; - } - _exception(SIGTRAP, regs, TRAP_TRACE, 0); - } -} -#endif /* CONFIG_4xx || CONFIG_BOOKE */ - -#if !defined(CONFIG_TAU_INT) -void TAUException(struct pt_regs *regs) -{ - printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n", - regs->nip, regs->msr, regs->trap, print_tainted()); -} -#endif /* CONFIG_INT_TAU */ - -/* - * FP unavailable trap from kernel - print a message, but let - * the task use FP in the kernel until it returns to user mode. - */ -void kernel_fp_unavailable_exception(struct pt_regs *regs) -{ - regs->msr |= MSR_FP; - printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n", - current, regs->nip); -} - -void altivec_unavailable_exception(struct pt_regs *regs) -{ - static int kernel_altivec_count; - -#ifndef CONFIG_ALTIVEC - if (user_mode(regs)) { - /* A user program has executed an altivec instruction, - but this kernel doesn't support altivec. */ - _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); - return; - } -#endif - /* The kernel has executed an altivec instruction without - first enabling altivec. Whinge but let it do it. */ - if (++kernel_altivec_count < 10) - printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n", - current, regs->nip); - regs->msr |= MSR_VEC; -} - -#ifdef CONFIG_ALTIVEC -void altivec_assist_exception(struct pt_regs *regs) -{ - int err; - - preempt_disable(); - if (regs->msr & MSR_VEC) - giveup_altivec(current); - preempt_enable(); - if (!user_mode(regs)) { - printk(KERN_ERR "altivec assist exception in kernel mode" - " at %lx\n", regs->nip); - debugger(regs); - die("altivec assist exception", regs, SIGFPE); - return; - } - - err = emulate_altivec(regs); - if (err == 0) { - regs->nip += 4; /* skip emulated instruction */ - emulate_single_step(regs); - return; - } - - if (err == -EFAULT) { - /* got an error reading the instruction */ - _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip); - } else { - /* didn't recognize the instruction */ - /* XXX quick hack for now: set the non-Java bit in the VSCR */ - printk(KERN_ERR "unrecognized altivec instruction " - "in %s at %lx\n", current->comm, regs->nip); - current->thread.vscr.u[3] |= 0x10000; - } -} -#endif /* CONFIG_ALTIVEC */ - -#ifdef CONFIG_BOOKE_WDT -/* - * Default handler for a Watchdog exception, - * spins until a reboot occurs - */ -void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs) -{ - /* Generic WatchdogHandler, implement your own */ - mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE)); - return; -} - -void WatchdogException(struct pt_regs *regs) -{ - printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n"); - WatchdogHandler(regs); -} -#endif - -void __init trap_init(void) -{ -} diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S deleted file mode 100644 index 8a24bc47eb6cc76f52496d0efd9417f827c0c586..0000000000000000000000000000000000000000 --- a/arch/ppc/kernel/vmlinux.lds.S +++ /dev/null @@ -1,164 +0,0 @@ -#include - -OUTPUT_ARCH(powerpc:common) -jiffies = jiffies_64 + 4; -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .gnu.hash : { *(.gnu.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } -/* .init : { *(.init) } =0*/ - .plt : { *(.plt) } - .text : - { - _text = .; - TEXT_TEXT - SCHED_TEXT - LOCK_TEXT - *(.fixup) - *(.got1) - __got2_start = .; - *(.got2) - __got2_end = .; - } - _etext = .; - PROVIDE (etext = .); - - RODATA - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - .fixup : { *(.fixup) } - - __ex_table : { - __start___ex_table = .; - *(__ex_table) - __stop___ex_table = .; - } - - __bug_table : { - __start___bug_table = .; - *(__bug_table) - __stop___bug_table = .; - } - - /* Read-write section, merged into data segment: */ - . = ALIGN(4096); - .data : - { - DATA_DATA - *(.data1) - *(.sdata) - *(.sdata2) - *(.got.plt) *(.got) - *(.dynamic) - CONSTRUCTORS - } - - . = ALIGN(4096); - __nosave_begin = .; - .data_nosave : { *(.data.nosave) } - . = ALIGN(4096); - __nosave_end = .; - - . = ALIGN(32); - .data.cacheline_aligned : { *(.data.cacheline_aligned) } - - _edata = .; - PROVIDE (edata = .); - - . = ALIGN(8192); - .data.init_task : { *(.data.init_task) } - - NOTES - - . = ALIGN(4096); - __init_begin = .; - .init.text : { - _sinittext = .; - INIT_TEXT - _einittext = .; - } - /* .exit.text is discarded at runtime, not link time, - to deal with references from __bug_table */ - .exit.text : { EXIT_TEXT } - .init.data : { - INIT_DATA - __vtop_table_begin = .; - *(.vtop_fixup); - __vtop_table_end = .; - __ptov_table_begin = .; - *(.ptov_fixup); - __ptov_table_end = .; - } - . = ALIGN(16); - __setup_start = .; - .init.setup : { *(.init.setup) } - __setup_end = .; - __initcall_start = .; - .initcall.init : { - INITCALLS - } - __initcall_end = .; - - __con_initcall_start = .; - .con_initcall.init : { *(.con_initcall.init) } - __con_initcall_end = .; - - SECURITY_INIT - - __start___ftr_fixup = .; - __ftr_fixup : { *(__ftr_fixup) } - __stop___ftr_fixup = .; - - PERCPU(4096) - -#ifdef CONFIG_BLK_DEV_INITRD - . = ALIGN(4096); - __initramfs_start = .; - .init.ramfs : { *(.init.ramfs) } - __initramfs_end = .; -#endif - - . = ALIGN(4096); - __init_end = .; - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - __bss_stop = .; - - _end = . ; - PROVIDE (end = .); - - /* Sections to be discarded. */ - /DISCARD/ : { - *(.exitcall.exit) - EXIT_DATA - } -} diff --git a/arch/ppc/lib/Makefile b/arch/ppc/lib/Makefile deleted file mode 100644 index 095e661e79ddc3335d95f6db6bb71d0d09960541..0000000000000000000000000000000000000000 --- a/arch/ppc/lib/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for ppc-specific library files.. -# - -obj-y := checksum.o string.o div64.o diff --git a/arch/ppc/lib/checksum.S b/arch/ppc/lib/checksum.S deleted file mode 100644 index 7874e8a80455c9620ab960ba1e15e5c8a6aece7b..0000000000000000000000000000000000000000 --- a/arch/ppc/lib/checksum.S +++ /dev/null @@ -1,225 +0,0 @@ -/* - * This file contains assembly-language implementations - * of IP-style 1's complement checksum routines. - * - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au). - */ - -#include -#include -#include -#include - - .text - -/* - * ip_fast_csum(buf, len) -- Optimized for IP header - * len is in words and is always >= 5. - */ -_GLOBAL(ip_fast_csum) - lwz r0,0(r3) - lwzu r5,4(r3) - addic. r4,r4,-2 - addc r0,r0,r5 - mtctr r4 - blelr- -1: lwzu r4,4(r3) - adde r0,r0,r4 - bdnz 1b - addze r0,r0 /* add in final carry */ - rlwinm r3,r0,16,0,31 /* fold two halves together */ - add r3,r0,r3 - not r3,r3 - srwi r3,r3,16 - blr - -/* - * Compute checksum of TCP or UDP pseudo-header: - * csum_tcpudp_magic(saddr, daddr, len, proto, sum) - */ -_GLOBAL(csum_tcpudp_magic) - rlwimi r5,r6,16,0,15 /* put proto in upper half of len */ - addc r0,r3,r4 /* add 4 32-bit words together */ - adde r0,r0,r5 - adde r0,r0,r7 - addze r0,r0 /* add in final carry */ - rlwinm r3,r0,16,0,31 /* fold two halves together */ - add r3,r0,r3 - not r3,r3 - srwi r3,r3,16 - blr - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * csum_partial(buff, len, sum) - */ -_GLOBAL(csum_partial) - addic r0,r5,0 - subi r3,r3,4 - srwi. r6,r4,2 - beq 3f /* if we're doing < 4 bytes */ - andi. r5,r3,2 /* Align buffer to longword boundary */ - beq+ 1f - lhz r5,4(r3) /* do 2 bytes to get aligned */ - addi r3,r3,2 - subi r4,r4,2 - addc r0,r0,r5 - srwi. r6,r4,2 /* # words to do */ - beq 3f -1: mtctr r6 -2: lwzu r5,4(r3) /* the bdnz has zero overhead, so it should */ - adde r0,r0,r5 /* be unnecessary to unroll this loop */ - bdnz 2b - andi. r4,r4,3 -3: cmpwi 0,r4,2 - blt+ 4f - lhz r5,4(r3) - addi r3,r3,2 - subi r4,r4,2 - adde r0,r0,r5 -4: cmpwi 0,r4,1 - bne+ 5f - lbz r5,4(r3) - slwi r5,r5,8 /* Upper byte of word */ - adde r0,r0,r5 -5: addze r3,r0 /* add in final carry */ - blr - -/* - * Computes the checksum of a memory block at src, length len, - * and adds in "sum" (32-bit), while copying the block to dst. - * If an access exception occurs on src or dst, it stores -EFAULT - * to *src_err or *dst_err respectively, and (for an error on - * src) zeroes the rest of dst. - * - * csum_partial_copy_generic(src, dst, len, sum, src_err, dst_err) - */ -_GLOBAL(csum_partial_copy_generic) - addic r0,r6,0 - subi r3,r3,4 - subi r4,r4,4 - srwi. r6,r5,2 - beq 3f /* if we're doing < 4 bytes */ - andi. r9,r4,2 /* Align dst to longword boundary */ - beq+ 1f -81: lhz r6,4(r3) /* do 2 bytes to get aligned */ - addi r3,r3,2 - subi r5,r5,2 -91: sth r6,4(r4) - addi r4,r4,2 - addc r0,r0,r6 - srwi. r6,r5,2 /* # words to do */ - beq 3f -1: srwi. r6,r5,4 /* # groups of 4 words to do */ - beq 10f - mtctr r6 -71: lwz r6,4(r3) -72: lwz r9,8(r3) -73: lwz r10,12(r3) -74: lwzu r11,16(r3) - adde r0,r0,r6 -75: stw r6,4(r4) - adde r0,r0,r9 -76: stw r9,8(r4) - adde r0,r0,r10 -77: stw r10,12(r4) - adde r0,r0,r11 -78: stwu r11,16(r4) - bdnz 71b -10: rlwinm. r6,r5,30,30,31 /* # words left to do */ - beq 13f - mtctr r6 -82: lwzu r9,4(r3) -92: stwu r9,4(r4) - adde r0,r0,r9 - bdnz 82b -13: andi. r5,r5,3 -3: cmpwi 0,r5,2 - blt+ 4f -83: lhz r6,4(r3) - addi r3,r3,2 - subi r5,r5,2 -93: sth r6,4(r4) - addi r4,r4,2 - adde r0,r0,r6 -4: cmpwi 0,r5,1 - bne+ 5f -84: lbz r6,4(r3) -94: stb r6,4(r4) - slwi r6,r6,8 /* Upper byte of word */ - adde r0,r0,r6 -5: addze r3,r0 /* add in final carry */ - blr - -/* These shouldn't go in the fixup section, since that would - cause the ex_table addresses to get out of order. */ - -src_error_4: - mfctr r6 /* update # bytes remaining from ctr */ - rlwimi r5,r6,4,0,27 - b 79f -src_error_1: - li r6,0 - subi r5,r5,2 -95: sth r6,4(r4) - addi r4,r4,2 -79: srwi. r6,r5,2 - beq 3f - mtctr r6 -src_error_2: - li r6,0 -96: stwu r6,4(r4) - bdnz 96b -3: andi. r5,r5,3 - beq src_error -src_error_3: - li r6,0 - mtctr r5 - addi r4,r4,3 -97: stbu r6,1(r4) - bdnz 97b -src_error: - cmpwi 0,r7,0 - beq 1f - li r6,-EFAULT - stw r6,0(r7) -1: addze r3,r0 - blr - -dst_error: - cmpwi 0,r8,0 - beq 1f - li r6,-EFAULT - stw r6,0(r8) -1: addze r3,r0 - blr - -.section __ex_table,"a" - .long 81b,src_error_1 - .long 91b,dst_error - .long 71b,src_error_4 - .long 72b,src_error_4 - .long 73b,src_error_4 - .long 74b,src_error_4 - .long 75b,dst_error - .long 76b,dst_error - .long 77b,dst_error - .long 78b,dst_error - .long 82b,src_error_2 - .long 92b,dst_error - .long 83b,src_error_3 - .long 93b,dst_error - .long 84b,src_error_3 - .long 94b,dst_error - .long 95b,dst_error - .long 96b,dst_error - .long 97b,dst_error diff --git a/arch/ppc/lib/div64.S b/arch/ppc/lib/div64.S deleted file mode 100644 index 3527569e992685e728c3e9e6902e6ec06a2e4145..0000000000000000000000000000000000000000 --- a/arch/ppc/lib/div64.S +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Divide a 64-bit unsigned number by a 32-bit unsigned number. - * This routine assumes that the top 32 bits of the dividend are - * non-zero to start with. - * On entry, r3 points to the dividend, which get overwritten with - * the 64-bit quotient, and r4 contains the divisor. - * On exit, r3 contains the remainder. - * - * Copyright (C) 2002 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include - -_GLOBAL(__div64_32) - lwz r5,0(r3) # get the dividend into r5/r6 - lwz r6,4(r3) - cmplw r5,r4 - li r7,0 - li r8,0 - blt 1f - divwu r7,r5,r4 # if dividend.hi >= divisor, - mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor - subf. r5,r0,r5 # dividend.hi %= divisor - beq 3f -1: mr r11,r5 # here dividend.hi != 0 - andis. r0,r5,0xc000 - bne 2f - cntlzw r0,r5 # we are shifting the dividend right - li r10,-1 # to make it < 2^32, and shifting - srw r10,r10,r0 # the divisor right the same amount, - add r9,r4,r10 # rounding up (so the estimate cannot - andc r11,r6,r10 # ever be too large, only too small) - andc r9,r9,r10 - or r11,r5,r11 - rotlw r9,r9,r0 - rotlw r11,r11,r0 - divwu r11,r11,r9 # then we divide the shifted quantities -2: mullw r10,r11,r4 # to get an estimate of the quotient, - mulhwu r9,r11,r4 # multiply the estimate by the divisor, - subfc r6,r10,r6 # take the product from the divisor, - add r8,r8,r11 # and add the estimate to the accumulated - subfe. r5,r9,r5 # quotient - bne 1b -3: cmplw r6,r4 - blt 4f - divwu r0,r6,r4 # perform the remaining 32-bit division - mullw r10,r0,r4 # and get the remainder - add r8,r8,r0 - subf r6,r10,r6 -4: stw r7,0(r3) # return the quotient in *r3 - stw r8,4(r3) - mr r3,r6 # return the remainder in r3 - blr diff --git a/arch/ppc/lib/locks.c b/arch/ppc/lib/locks.c deleted file mode 100644 index ea4aee6b20e6e6a8074b96c46aa8c52cc25c7e40..0000000000000000000000000000000000000000 --- a/arch/ppc/lib/locks.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * Locks for smp ppc - * - * Written by Cort Dougan (cort@cs.nmt.edu) - */ - -#include -#include -#include -#include -#include - -#ifdef CONFIG_DEBUG_SPINLOCK - -#undef INIT_STUCK -#define INIT_STUCK 200000000 /*0xffffffff*/ - -/* - * Try to acquire a spinlock. - * Only does the stwcx. if the load returned 0 - the Programming - * Environments Manual suggests not doing unnecessary stcwx.'s - * since they may inhibit forward progress by other CPUs in getting - * a lock. - */ -static inline unsigned long __spin_trylock(volatile unsigned long *lock) -{ - unsigned long ret; - - __asm__ __volatile__ ("\n\ -1: lwarx %0,0,%1\n\ - cmpwi 0,%0,0\n\ - bne 2f\n" - PPC405_ERR77(0,%1) -" stwcx. %2,0,%1\n\ - bne- 1b\n\ - isync\n\ -2:" - : "=&r"(ret) - : "r"(lock), "r"(1) - : "cr0", "memory"); - - return ret; -} - -void _raw_spin_lock(spinlock_t *lock) -{ - int cpu = smp_processor_id(); - unsigned int stuck = INIT_STUCK; - while (__spin_trylock(&lock->lock)) { - while ((unsigned volatile long)lock->lock != 0) { - if (!--stuck) { - printk("_spin_lock(%p) CPU#%d NIP %p" - " holder: cpu %ld pc %08lX\n", - lock, cpu, __builtin_return_address(0), - lock->owner_cpu,lock->owner_pc); - stuck = INIT_STUCK; - /* steal the lock */ - /*xchg_u32((void *)&lock->lock,0);*/ - } - } - } - lock->owner_pc = (unsigned long)__builtin_return_address(0); - lock->owner_cpu = cpu; -} -EXPORT_SYMBOL(_raw_spin_lock); - -int _raw_spin_trylock(spinlock_t *lock) -{ - if (__spin_trylock(&lock->lock)) - return 0; - lock->owner_cpu = smp_processor_id(); - lock->owner_pc = (unsigned long)__builtin_return_address(0); - return 1; -} -EXPORT_SYMBOL(_raw_spin_trylock); - -void _raw_spin_unlock(spinlock_t *lp) -{ - if ( !lp->lock ) - printk("_spin_unlock(%p): no lock cpu %d curr PC %p %s/%d\n", - lp, smp_processor_id(), __builtin_return_address(0), - current->comm, current->pid); - if ( lp->owner_cpu != smp_processor_id() ) - printk("_spin_unlock(%p): cpu %d trying clear of cpu %d pc %lx val %lx\n", - lp, smp_processor_id(), (int)lp->owner_cpu, - lp->owner_pc,lp->lock); - lp->owner_pc = lp->owner_cpu = 0; - wmb(); - lp->lock = 0; -} -EXPORT_SYMBOL(_raw_spin_unlock); - -/* - * For rwlocks, zero is unlocked, -1 is write-locked, - * positive is read-locked. - */ -static __inline__ int __read_trylock(rwlock_t *rw) -{ - signed int tmp; - - __asm__ __volatile__( -"2: lwarx %0,0,%1 # __read_trylock\n\ - addic. %0,%0,1\n\ - ble- 1f\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 2b\n\ - isync\n\ -1:" - : "=&r"(tmp) - : "r"(&rw->lock) - : "cr0", "memory"); - - return tmp; -} - -int _raw_read_trylock(rwlock_t *rw) -{ - return __read_trylock(rw) > 0; -} -EXPORT_SYMBOL(_raw_read_trylock); - -void _raw_read_lock(rwlock_t *rw) -{ - unsigned int stuck; - - while (__read_trylock(rw) <= 0) { - stuck = INIT_STUCK; - while (!read_can_lock(rw)) { - if (--stuck == 0) { - printk("_read_lock(%p) CPU#%d lock %d\n", - rw, raw_smp_processor_id(), rw->lock); - stuck = INIT_STUCK; - } - } - } -} -EXPORT_SYMBOL(_raw_read_lock); - -void _raw_read_unlock(rwlock_t *rw) -{ - if ( rw->lock == 0 ) - printk("_read_unlock(): %s/%d (nip %08lX) lock %d\n", - current->comm,current->pid,current->thread.regs->nip, - rw->lock); - wmb(); - atomic_dec((atomic_t *) &(rw)->lock); -} -EXPORT_SYMBOL(_raw_read_unlock); - -void _raw_write_lock(rwlock_t *rw) -{ - unsigned int stuck; - - while (cmpxchg(&rw->lock, 0, -1) != 0) { - stuck = INIT_STUCK; - while (!write_can_lock(rw)) { - if (--stuck == 0) { - printk("write_lock(%p) CPU#%d lock %d)\n", - rw, raw_smp_processor_id(), rw->lock); - stuck = INIT_STUCK; - } - } - } - wmb(); -} -EXPORT_SYMBOL(_raw_write_lock); - -int _raw_write_trylock(rwlock_t *rw) -{ - if (cmpxchg(&rw->lock, 0, -1) != 0) - return 0; - wmb(); - return 1; -} -EXPORT_SYMBOL(_raw_write_trylock); - -void _raw_write_unlock(rwlock_t *rw) -{ - if (rw->lock >= 0) - printk("_write_lock(): %s/%d (nip %08lX) lock %d\n", - current->comm,current->pid,current->thread.regs->nip, - rw->lock); - wmb(); - rw->lock = 0; -} -EXPORT_SYMBOL(_raw_write_unlock); - -#endif diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S deleted file mode 100644 index 927253bfc8262fab2ea233437bf7b918b5dabd67..0000000000000000000000000000000000000000 --- a/arch/ppc/lib/string.S +++ /dev/null @@ -1,732 +0,0 @@ -/* - * String handling functions for PowerPC. - * - * Copyright (C) 1996 Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include -#include -#include - -#define COPY_16_BYTES \ - lwz r7,4(r4); \ - lwz r8,8(r4); \ - lwz r9,12(r4); \ - lwzu r10,16(r4); \ - stw r7,4(r6); \ - stw r8,8(r6); \ - stw r9,12(r6); \ - stwu r10,16(r6) - -#define COPY_16_BYTES_WITHEX(n) \ -8 ## n ## 0: \ - lwz r7,4(r4); \ -8 ## n ## 1: \ - lwz r8,8(r4); \ -8 ## n ## 2: \ - lwz r9,12(r4); \ -8 ## n ## 3: \ - lwzu r10,16(r4); \ -8 ## n ## 4: \ - stw r7,4(r6); \ -8 ## n ## 5: \ - stw r8,8(r6); \ -8 ## n ## 6: \ - stw r9,12(r6); \ -8 ## n ## 7: \ - stwu r10,16(r6) - -#define COPY_16_BYTES_EXCODE(n) \ -9 ## n ## 0: \ - addi r5,r5,-(16 * n); \ - b 104f; \ -9 ## n ## 1: \ - addi r5,r5,-(16 * n); \ - b 105f; \ -.section __ex_table,"a"; \ - .align 2; \ - .long 8 ## n ## 0b,9 ## n ## 0b; \ - .long 8 ## n ## 1b,9 ## n ## 0b; \ - .long 8 ## n ## 2b,9 ## n ## 0b; \ - .long 8 ## n ## 3b,9 ## n ## 0b; \ - .long 8 ## n ## 4b,9 ## n ## 1b; \ - .long 8 ## n ## 5b,9 ## n ## 1b; \ - .long 8 ## n ## 6b,9 ## n ## 1b; \ - .long 8 ## n ## 7b,9 ## n ## 1b; \ - .text - - .text - .stabs "arch/ppc/lib/",N_SO,0,0,0f - .stabs "string.S",N_SO,0,0,0f - -CACHELINE_BYTES = L1_CACHE_BYTES -LG_CACHELINE_BYTES = L1_CACHE_SHIFT -CACHELINE_MASK = (L1_CACHE_BYTES-1) - -_GLOBAL(strcpy) - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r5) - bne 1b - blr - -/* This clears out any unused part of the destination buffer, - just as the libc version does. -- paulus */ -_GLOBAL(strncpy) - cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r6) - bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */ - bnelr /* if we didn't hit a null char, we're done */ - mfctr r5 - cmpwi 0,r5,0 /* any space left in destination buffer? */ - beqlr /* we know r0 == 0 here */ -2: stbu r0,1(r6) /* clear it out if so */ - bdnz 2b - blr - -_GLOBAL(strcat) - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r0,1(r5) - cmpwi 0,r0,0 - bne 1b - addi r5,r5,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r5) - bne 1b - blr - -_GLOBAL(strcmp) - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r5) - cmpwi 1,r3,0 - lbzu r0,1(r4) - subf. r3,r0,r3 - beqlr 1 - beq 1b - blr - -_GLOBAL(strncmp) - PPC_LCMPI r5,0 - beqlr - mtctr r5 - addi r5,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r5) - cmpwi 1,r3,0 - lbzu r0,1(r4) - subf. r3,r0,r3 - beqlr 1 - bdnzt eq,1b - blr - -_GLOBAL(strlen) - addi r4,r3,-1 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - bne 1b - subf r3,r3,r4 - blr - -/* - * Use dcbz on the complete cache lines in the destination - * to set them to zero. This requires that the destination - * area is cacheable. -- paulus - */ -_GLOBAL(cacheable_memzero) - mr r5,r4 - li r4,0 - addi r6,r3,-4 - cmplwi 0,r5,4 - blt 7f - stwu r4,4(r6) - beqlr - andi. r0,r6,3 - add r5,r0,r5 - subf r6,r0,r6 - clrlwi r7,r6,32-LG_CACHELINE_BYTES - add r8,r7,r5 - srwi r9,r8,LG_CACHELINE_BYTES - addic. r9,r9,-1 /* total number of complete cachelines */ - ble 2f - xori r0,r7,CACHELINE_MASK & ~3 - srwi. r0,r0,2 - beq 3f - mtctr r0 -4: stwu r4,4(r6) - bdnz 4b -3: mtctr r9 - li r7,4 -#if !defined(CONFIG_8xx) -10: dcbz r7,r6 -#else -10: stw r4, 4(r6) - stw r4, 8(r6) - stw r4, 12(r6) - stw r4, 16(r6) -#if CACHE_LINE_SIZE >= 32 - stw r4, 20(r6) - stw r4, 24(r6) - stw r4, 28(r6) - stw r4, 32(r6) -#endif /* CACHE_LINE_SIZE */ -#endif - addi r6,r6,CACHELINE_BYTES - bdnz 10b - clrlwi r5,r8,32-LG_CACHELINE_BYTES - addi r5,r5,4 -2: srwi r0,r5,2 - mtctr r0 - bdz 6f -1: stwu r4,4(r6) - bdnz 1b -6: andi. r5,r5,3 -7: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r6,3 -8: stbu r4,1(r6) - bdnz 8b - blr - -_GLOBAL(memset) - rlwimi r4,r4,8,16,23 - rlwimi r4,r4,16,0,15 - addi r6,r3,-4 - cmplwi 0,r5,4 - blt 7f - stwu r4,4(r6) - beqlr - andi. r0,r6,3 - add r5,r0,r5 - subf r6,r0,r6 - srwi r0,r5,2 - mtctr r0 - bdz 6f -1: stwu r4,4(r6) - bdnz 1b -6: andi. r5,r5,3 -7: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r6,r6,3 -8: stbu r4,1(r6) - bdnz 8b - blr - -/* - * This version uses dcbz on the complete cache lines in the - * destination area to reduce memory traffic. This requires that - * the destination area is cacheable. - * We only use this version if the source and dest don't overlap. - * -- paulus. - */ -_GLOBAL(cacheable_memcpy) - add r7,r3,r5 /* test if the src & dst overlap */ - add r8,r4,r5 - cmplw 0,r4,r7 - cmplw 1,r3,r8 - crand 0,0,4 /* cr0.lt &= cr1.lt */ - blt memcpy /* if regions overlap */ - - addi r4,r4,-4 - addi r6,r3,-4 - neg r0,r3 - andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */ - beq 58f - - cmplw 0,r5,r0 /* is this more than total to do? */ - blt 63f /* if not much to do */ - andi. r8,r0,3 /* get it word-aligned first */ - subf r5,r0,r5 - mtctr r8 - beq+ 61f -70: lbz r9,4(r4) /* do some bytes */ - stb r9,4(r6) - addi r4,r4,1 - addi r6,r6,1 - bdnz 70b -61: srwi. r0,r0,2 - mtctr r0 - beq 58f -72: lwzu r9,4(r4) /* do some words */ - stwu r9,4(r6) - bdnz 72b - -58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */ - clrlwi r5,r5,32-LG_CACHELINE_BYTES - li r11,4 - mtctr r0 - beq 63f -53: -#if !defined(CONFIG_8xx) - dcbz r11,r6 -#endif - COPY_16_BYTES -#if L1_CACHE_BYTES >= 32 - COPY_16_BYTES -#if L1_CACHE_BYTES >= 64 - COPY_16_BYTES - COPY_16_BYTES -#if L1_CACHE_BYTES >= 128 - COPY_16_BYTES - COPY_16_BYTES - COPY_16_BYTES - COPY_16_BYTES -#endif -#endif -#endif - bdnz 53b - -63: srwi. r0,r5,2 - mtctr r0 - beq 64f -30: lwzu r0,4(r4) - stwu r0,4(r6) - bdnz 30b - -64: andi. r0,r5,3 - mtctr r0 - beq+ 65f -40: lbz r0,4(r4) - stb r0,4(r6) - addi r4,r4,1 - addi r6,r6,1 - bdnz 40b -65: blr - -_GLOBAL(memmove) - cmplw 0,r3,r4 - bgt backwards_memcpy - /* fall through */ - -_GLOBAL(memcpy) - srwi. r7,r5,3 - addi r6,r3,-4 - addi r4,r4,-4 - beq 2f /* if less than 8 bytes to do */ - andi. r0,r6,3 /* get dest word aligned */ - mtctr r7 - bne 5f -1: lwz r7,4(r4) - lwzu r8,8(r4) - stw r7,4(r6) - stwu r8,8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,4(r4) - addi r5,r5,-4 - stwu r0,4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 - addi r4,r4,3 - addi r6,r6,3 -4: lbzu r0,1(r4) - stbu r0,1(r6) - bdnz 4b - blr -5: subfic r0,r0,4 - mtctr r0 -6: lbz r7,4(r4) - addi r4,r4,1 - stb r7,4(r6) - addi r6,r6,1 - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - -_GLOBAL(backwards_memcpy) - rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */ - add r6,r3,r5 - add r4,r4,r5 - beq 2f - andi. r0,r6,3 - mtctr r7 - bne 5f -1: lwz r7,-4(r4) - lwzu r8,-8(r4) - stw r7,-4(r6) - stwu r8,-8(r6) - bdnz 1b - andi. r5,r5,7 -2: cmplwi 0,r5,4 - blt 3f - lwzu r0,-4(r4) - subi r5,r5,4 - stwu r0,-4(r6) -3: cmpwi 0,r5,0 - beqlr - mtctr r5 -4: lbzu r0,-1(r4) - stbu r0,-1(r6) - bdnz 4b - blr -5: mtctr r0 -6: lbzu r7,-1(r4) - stbu r7,-1(r6) - bdnz 6b - subf r5,r0,r5 - rlwinm. r7,r5,32-3,3,31 - beq 2b - mtctr r7 - b 1b - -_GLOBAL(memcmp) - cmpwi 0,r5,0 - ble- 2f - mtctr r5 - addi r6,r3,-1 - addi r4,r4,-1 -1: lbzu r3,1(r6) - lbzu r0,1(r4) - subf. r3,r0,r3 - bdnzt 2,1b - blr -2: li r3,0 - blr - -_GLOBAL(memchr) - cmpwi 0,r5,0 - ble- 2f - mtctr r5 - addi r3,r3,-1 -1: lbzu r0,1(r3) - cmpw 0,r0,r4 - bdnzf 2,1b - beqlr -2: li r3,0 - blr - -_GLOBAL(__copy_tofrom_user) - addi r4,r4,-4 - addi r6,r3,-4 - neg r0,r3 - andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */ - beq 58f - - cmplw 0,r5,r0 /* is this more than total to do? */ - blt 63f /* if not much to do */ - andi. r8,r0,3 /* get it word-aligned first */ - mtctr r8 - beq+ 61f -70: lbz r9,4(r4) /* do some bytes */ -71: stb r9,4(r6) - addi r4,r4,1 - addi r6,r6,1 - bdnz 70b -61: subf r5,r0,r5 - srwi. r0,r0,2 - mtctr r0 - beq 58f -72: lwzu r9,4(r4) /* do some words */ -73: stwu r9,4(r6) - bdnz 72b - - .section __ex_table,"a" - .align 2 - .long 70b,100f - .long 71b,101f - .long 72b,102f - .long 73b,103f - .text - -58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */ - clrlwi r5,r5,32-LG_CACHELINE_BYTES - li r11,4 - beq 63f - -#ifdef CONFIG_8xx - /* Don't use prefetch on 8xx */ - mtctr r0 - li r0,0 -53: COPY_16_BYTES_WITHEX(0) - bdnz 53b - -#else /* not CONFIG_8xx */ - /* Here we decide how far ahead to prefetch the source */ - li r3,4 - cmpwi r0,1 - li r7,0 - ble 114f - li r7,1 -#if MAX_COPY_PREFETCH > 1 - /* Heuristically, for large transfers we prefetch - MAX_COPY_PREFETCH cachelines ahead. For small transfers - we prefetch 1 cacheline ahead. */ - cmpwi r0,MAX_COPY_PREFETCH - ble 112f - li r7,MAX_COPY_PREFETCH -112: mtctr r7 -111: dcbt r3,r4 - addi r3,r3,CACHELINE_BYTES - bdnz 111b -#else - dcbt r3,r4 - addi r3,r3,CACHELINE_BYTES -#endif /* MAX_COPY_PREFETCH > 1 */ - -114: subf r8,r7,r0 - mr r0,r7 - mtctr r8 - -53: dcbt r3,r4 -54: dcbz r11,r6 - .section __ex_table,"a" - .align 2 - .long 54b,105f - .text -/* the main body of the cacheline loop */ - COPY_16_BYTES_WITHEX(0) -#if L1_CACHE_BYTES >= 32 - COPY_16_BYTES_WITHEX(1) -#if L1_CACHE_BYTES >= 64 - COPY_16_BYTES_WITHEX(2) - COPY_16_BYTES_WITHEX(3) -#if L1_CACHE_BYTES >= 128 - COPY_16_BYTES_WITHEX(4) - COPY_16_BYTES_WITHEX(5) - COPY_16_BYTES_WITHEX(6) - COPY_16_BYTES_WITHEX(7) -#endif -#endif -#endif - bdnz 53b - cmpwi r0,0 - li r3,4 - li r7,0 - bne 114b -#endif /* CONFIG_8xx */ - -63: srwi. r0,r5,2 - mtctr r0 - beq 64f -30: lwzu r0,4(r4) -31: stwu r0,4(r6) - bdnz 30b - -64: andi. r0,r5,3 - mtctr r0 - beq+ 65f -40: lbz r0,4(r4) -41: stb r0,4(r6) - addi r4,r4,1 - addi r6,r6,1 - bdnz 40b -65: li r3,0 - blr - -/* read fault, initial single-byte copy */ -100: li r9,0 - b 90f -/* write fault, initial single-byte copy */ -101: li r9,1 -90: subf r5,r8,r5 - li r3,0 - b 99f -/* read fault, initial word copy */ -102: li r9,0 - b 91f -/* write fault, initial word copy */ -103: li r9,1 -91: li r3,2 - b 99f - -/* - * this stuff handles faults in the cacheline loop and branches to either - * 104f (if in read part) or 105f (if in write part), after updating r5 - */ - COPY_16_BYTES_EXCODE(0) -#if L1_CACHE_BYTES >= 32 - COPY_16_BYTES_EXCODE(1) -#if L1_CACHE_BYTES >= 64 - COPY_16_BYTES_EXCODE(2) - COPY_16_BYTES_EXCODE(3) -#if L1_CACHE_BYTES >= 128 - COPY_16_BYTES_EXCODE(4) - COPY_16_BYTES_EXCODE(5) - COPY_16_BYTES_EXCODE(6) - COPY_16_BYTES_EXCODE(7) -#endif -#endif -#endif - -/* read fault in cacheline loop */ -104: li r9,0 - b 92f -/* fault on dcbz (effectively a write fault) */ -/* or write fault in cacheline loop */ -105: li r9,1 -92: li r3,LG_CACHELINE_BYTES - mfctr r8 - add r0,r0,r8 - b 106f -/* read fault in final word loop */ -108: li r9,0 - b 93f -/* write fault in final word loop */ -109: li r9,1 -93: andi. r5,r5,3 - li r3,2 - b 99f -/* read fault in final byte loop */ -110: li r9,0 - b 94f -/* write fault in final byte loop */ -111: li r9,1 -94: li r5,0 - li r3,0 -/* - * At this stage the number of bytes not copied is - * r5 + (ctr << r3), and r9 is 0 for read or 1 for write. - */ -99: mfctr r0 -106: slw r3,r0,r3 - add. r3,r3,r5 - beq 120f /* shouldn't happen */ - cmpwi 0,r9,0 - bne 120f -/* for a read fault, first try to continue the copy one byte at a time */ - mtctr r3 -130: lbz r0,4(r4) -131: stb r0,4(r6) - addi r4,r4,1 - addi r6,r6,1 - bdnz 130b -/* then clear out the destination: r3 bytes starting at 4(r6) */ -132: mfctr r3 - srwi. r0,r3,2 - li r9,0 - mtctr r0 - beq 113f -112: stwu r9,4(r6) - bdnz 112b -113: andi. r0,r3,3 - mtctr r0 - beq 120f -114: stb r9,4(r6) - addi r6,r6,1 - bdnz 114b -120: blr - - .section __ex_table,"a" - .align 2 - .long 30b,108b - .long 31b,109b - .long 40b,110b - .long 41b,111b - .long 130b,132b - .long 131b,120b - .long 112b,120b - .long 114b,120b - .text - -_GLOBAL(__clear_user) - addi r6,r3,-4 - li r3,0 - li r5,0 - cmplwi 0,r4,4 - blt 7f - /* clear a single word */ -11: stwu r5,4(r6) - beqlr - /* clear word sized chunks */ - andi. r0,r6,3 - add r4,r0,r4 - subf r6,r0,r6 - srwi r0,r4,2 - andi. r4,r4,3 - mtctr r0 - bdz 7f -1: stwu r5,4(r6) - bdnz 1b - /* clear byte sized chunks */ -7: cmpwi 0,r4,0 - beqlr - mtctr r4 - addi r6,r6,3 -8: stbu r5,1(r6) - bdnz 8b - blr -90: mr r3,r4 - blr -91: mfctr r3 - slwi r3,r3,2 - add r3,r3,r4 - blr -92: mfctr r3 - blr - - .section __ex_table,"a" - .align 2 - .long 11b,90b - .long 1b,91b - .long 8b,92b - .text - -_GLOBAL(__strncpy_from_user) - addi r6,r3,-1 - addi r4,r4,-1 - cmpwi 0,r5,0 - beq 2f - mtctr r5 -1: lbzu r0,1(r4) - cmpwi 0,r0,0 - stbu r0,1(r6) - bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */ - beq 3f -2: addi r6,r6,1 -3: subf r3,r3,r6 - blr -99: li r3,-EFAULT - blr - - .section __ex_table,"a" - .align 2 - .long 1b,99b - .text - -/* r3 = str, r4 = len (> 0), r5 = top (highest addr) */ -_GLOBAL(__strnlen_user) - addi r7,r3,-1 - subf r6,r7,r5 /* top+1 - str */ - cmplw 0,r4,r6 - bge 0f - mr r6,r4 -0: mtctr r6 /* ctr = min(len, top - str) */ -1: lbzu r0,1(r7) /* get next byte */ - cmpwi 0,r0,0 - bdnzf 2,1b /* loop if --ctr != 0 && byte != 0 */ - addi r7,r7,1 - subf r3,r3,r7 /* number of bytes we have looked at */ - beqlr /* return if we found a 0 byte */ - cmpw 0,r3,r4 /* did we look at all len bytes? */ - blt 99f /* if not, must have hit top */ - addi r3,r4,1 /* return len + 1 to indicate no null found */ - blr -99: li r3,0 /* bad address, return 0 */ - blr - - .section __ex_table,"a" - .align 2 - .long 1b,99b diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c deleted file mode 100644 index fbb577a0d165eceae21adb8aabebee5fe87d4ac4..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/44x_mmu.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Modifications by Matt Porter (mporter@mvista.com) to support - * PPC44x Book E processors. - * - * This file contains the routines for initializing the MMU - * on the 4xx series of chips. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mmu_decl.h" - -extern char etext[], _stext[]; - -/* Used by the 44x TLB replacement exception handler. - * Just needed it declared someplace. - */ -unsigned int tlb_44x_index = 0; -unsigned int tlb_44x_hwater = PPC4XX_TLB_SIZE - 1 - PPC44x_EARLY_TLBS; -int icache_44x_need_flush; - -/* - * "Pins" a 256MB TLB entry in AS0 for kernel lowmem - */ -static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) -{ - __asm__ __volatile__( - "tlbwe %2,%3,%4\n" - "tlbwe %1,%3,%5\n" - "tlbwe %0,%3,%6\n" - : - : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), - "r" (phys), - "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M), - "r" (tlb_44x_hwater--), /* slot for this TLB entry */ - "i" (PPC44x_TLB_PAGEID), - "i" (PPC44x_TLB_XLAT), - "i" (PPC44x_TLB_ATTRIB)); -} - -void __init MMU_init_hw(void) -{ - flush_instruction_cache(); -} - -unsigned long __init mmu_mapin_ram(void) -{ - unsigned long addr; - - /* Pin in enough TLBs to cover any lowmem not covered by the - * initial 256M mapping established in head_44x.S */ - for (addr = PPC_PIN_SIZE; addr < total_lowmem; - addr += PPC_PIN_SIZE) - ppc44x_pin_tlb(addr + PAGE_OFFSET, addr); - - return total_lowmem; -} diff --git a/arch/ppc/mm/4xx_mmu.c b/arch/ppc/mm/4xx_mmu.c deleted file mode 100644 index ea785dbaac7cec8441925edd6e0be9688406759d..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/4xx_mmu.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * This file contains the routines for initializing the MMU - * on the 4xx series of chips. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "mmu_decl.h" - -extern int __map_without_ltlbs; -/* - * MMU_init_hw does the chip-specific initialization of the MMU hardware. - */ -void __init MMU_init_hw(void) -{ - /* - * The Zone Protection Register (ZPR) defines how protection will - * be applied to every page which is a member of a given zone. At - * present, we utilize only two of the 4xx's zones. - * The zone index bits (of ZSEL) in the PTE are used for software - * indicators, except the LSB. For user access, zone 1 is used, - * for kernel access, zone 0 is used. We set all but zone 1 - * to zero, allowing only kernel access as indicated in the PTE. - * For zone 1, we set a 01 binary (a value of 10 will not work) - * to allow user access as indicated in the PTE. This also allows - * kernel access as indicated in the PTE. - */ - - mtspr(SPRN_ZPR, 0x10000000); - - flush_instruction_cache(); - - /* - * Set up the real-mode cache parameters for the exception vector - * handlers (which are run in real-mode). - */ - - mtspr(SPRN_DCWR, 0x00000000); /* All caching is write-back */ - - /* - * Cache instruction and data space where the exception - * vectors and the kernel live in real-mode. - */ - - mtspr(SPRN_DCCR, 0xF0000000); /* 512 MB of data space at 0x0. */ - mtspr(SPRN_ICCR, 0xF0000000); /* 512 MB of instr. space at 0x0. */ -} - -#define LARGE_PAGE_SIZE_16M (1<<24) -#define LARGE_PAGE_SIZE_4M (1<<22) - -unsigned long __init mmu_mapin_ram(void) -{ - unsigned long v, s; - phys_addr_t p; - - v = KERNELBASE; - p = PPC_MEMSTART; - s = total_lowmem; - - if (__map_without_ltlbs) - return 0; - - while (s >= LARGE_PAGE_SIZE_16M) { - pmd_t *pmdp; - unsigned long val = p | _PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE; - - pmdp = pmd_offset(pgd_offset_k(v), v); - pmd_val(*pmdp++) = val; - pmd_val(*pmdp++) = val; - pmd_val(*pmdp++) = val; - pmd_val(*pmdp++) = val; - - v += LARGE_PAGE_SIZE_16M; - p += LARGE_PAGE_SIZE_16M; - s -= LARGE_PAGE_SIZE_16M; - } - - while (s >= LARGE_PAGE_SIZE_4M) { - pmd_t *pmdp; - unsigned long val = p | _PMD_SIZE_4M | _PAGE_HWEXEC | _PAGE_HWWRITE; - - pmdp = pmd_offset(pgd_offset_k(v), v); - pmd_val(*pmdp) = val; - - v += LARGE_PAGE_SIZE_4M; - p += LARGE_PAGE_SIZE_4M; - s -= LARGE_PAGE_SIZE_4M; - } - - return total_lowmem - s; -} diff --git a/arch/ppc/mm/Makefile b/arch/ppc/mm/Makefile deleted file mode 100644 index 691ba2bae05d868a83e8e0f020d28953787baebe..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/Makefile +++ /dev/null @@ -1,10 +0,0 @@ -# -# Makefile for the linux ppc-specific parts of the memory manager. -# - -obj-y := fault.o init.o mem_pieces.o \ - mmu_context.o pgtable.o - -obj-$(CONFIG_PPC_STD_MMU) += hashtable.o ppc_mmu.o tlb.o -obj-$(CONFIG_40x) += 4xx_mmu.o -obj-$(CONFIG_44x) += 44x_mmu.o diff --git a/arch/ppc/mm/fault.c b/arch/ppc/mm/fault.c deleted file mode 100644 index 36c0e7529edbc89f1e7c7dc8d3c000024a2f433d..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/fault.c +++ /dev/null @@ -1,436 +0,0 @@ -/* - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Derived from "arch/i386/mm/fault.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * Modified by Cort Dougan and Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#if defined(CONFIG_XMON) || defined(CONFIG_KGDB) -extern void (*debugger)(struct pt_regs *); -extern void (*debugger_fault_handler)(struct pt_regs *); -extern int (*debugger_dabr_match)(struct pt_regs *); -int debugger_kernel_faults = 1; -#endif - -unsigned long htab_reloads; /* updated by hashtable.S:hash_page() */ -unsigned long htab_evicts; /* updated by hashtable.S:hash_page() */ -unsigned long htab_preloads; /* updated by hashtable.S:add_hash_page() */ -unsigned long pte_misses; /* updated by do_page_fault() */ -unsigned long pte_errors; /* updated by do_page_fault() */ -unsigned int probingmem; - -/* - * Check whether the instruction at regs->nip is a store using - * an update addressing form which will update r1. - */ -static int store_updates_sp(struct pt_regs *regs) -{ - unsigned int inst; - - if (get_user(inst, (unsigned int __user *)regs->nip)) - return 0; - /* check for 1 in the rA field */ - if (((inst >> 16) & 0x1f) != 1) - return 0; - /* check major opcode */ - switch (inst >> 26) { - case 37: /* stwu */ - case 39: /* stbu */ - case 45: /* sthu */ - case 53: /* stfsu */ - case 55: /* stfdu */ - return 1; - case 31: - /* check minor opcode */ - switch ((inst >> 1) & 0x3ff) { - case 183: /* stwux */ - case 247: /* stbux */ - case 439: /* sthux */ - case 695: /* stfsux */ - case 759: /* stfdux */ - return 1; - } - } - return 0; -} - -/* - * For 600- and 800-family processors, the error_code parameter is DSISR - * for a data fault, SRR1 for an instruction fault. For 400-family processors - * the error_code parameter is ESR for a data fault, 0 for an instruction - * fault. - */ -int do_page_fault(struct pt_regs *regs, unsigned long address, - unsigned long error_code) -{ - struct vm_area_struct * vma; - struct mm_struct *mm = current->mm; - siginfo_t info; - int code = SEGV_MAPERR; - int fault; -#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) - int is_write = error_code & ESR_DST; -#else - int is_write = 0; - - /* - * Fortunately the bit assignments in SRR1 for an instruction - * fault and DSISR for a data fault are mostly the same for the - * bits we are interested in. But there are some bits which - * indicate errors in DSISR but can validly be set in SRR1. - */ - if (TRAP(regs) == 0x400) - error_code &= 0x48200000; - else - is_write = error_code & 0x02000000; -#endif /* CONFIG_4xx || CONFIG_BOOKE */ - -#if defined(CONFIG_XMON) || defined(CONFIG_KGDB) - if (debugger_fault_handler && TRAP(regs) == 0x300) { - debugger_fault_handler(regs); - return 0; - } -#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE)) - if (error_code & 0x00400000) { - /* DABR match */ - if (debugger_dabr_match(regs)) - return 0; - } -#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/ -#endif /* CONFIG_XMON || CONFIG_KGDB */ - - if (in_atomic() || mm == NULL) - return SIGSEGV; - - down_read(&mm->mmap_sem); - vma = find_vma(mm, address); - if (!vma) - goto bad_area; - if (vma->vm_start <= address) - goto good_area; - if (!(vma->vm_flags & VM_GROWSDOWN)) - goto bad_area; - if (!is_write) - goto bad_area; - - /* - * N.B. The rs6000/xcoff ABI allows programs to access up to - * a few hundred bytes below the stack pointer. - * The kernel signal delivery code writes up to about 1.5kB - * below the stack pointer (r1) before decrementing it. - * The exec code can write slightly over 640kB to the stack - * before setting the user r1. Thus we allow the stack to - * expand to 1MB without further checks. - */ - if (address + 0x100000 < vma->vm_end) { - /* get user regs even if this fault is in kernel mode */ - struct pt_regs *uregs = current->thread.regs; - if (uregs == NULL) - goto bad_area; - - /* - * A user-mode access to an address a long way below - * the stack pointer is only valid if the instruction - * is one which would update the stack pointer to the - * address accessed if the instruction completed, - * i.e. either stwu rs,n(r1) or stwux rs,r1,rb - * (or the byte, halfword, float or double forms). - * - * If we don't check this then any write to the area - * between the last mapped region and the stack will - * expand the stack rather than segfaulting. - */ - if (address + 2048 < uregs->gpr[1] - && (!user_mode(regs) || !store_updates_sp(regs))) - goto bad_area; - } - if (expand_stack(vma, address)) - goto bad_area; - -good_area: - code = SEGV_ACCERR; -#if defined(CONFIG_6xx) - if (error_code & 0x95700000) - /* an error such as lwarx to I/O controller space, - address matching DABR, eciwx, etc. */ - goto bad_area; -#endif /* CONFIG_6xx */ -#if defined(CONFIG_8xx) - /* The MPC8xx seems to always set 0x80000000, which is - * "undefined". Of those that can be set, this is the only - * one which seems bad. - */ - if (error_code & 0x10000000) - /* Guarded storage error. */ - goto bad_area; -#endif /* CONFIG_8xx */ - - /* a write */ - if (is_write) { - if (!(vma->vm_flags & VM_WRITE)) - goto bad_area; -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - /* an exec - 4xx/Book-E allows for per-page execute permission */ - } else if (TRAP(regs) == 0x400) { - pte_t *ptep; - pmd_t *pmdp; - -#if 0 - /* It would be nice to actually enforce the VM execute - permission on CPUs which can do so, but far too - much stuff in userspace doesn't get the permissions - right, so we let any page be executed for now. */ - if (! (vma->vm_flags & VM_EXEC)) - goto bad_area; -#endif - - /* Since 4xx/Book-E supports per-page execute permission, - * we lazily flush dcache to icache. */ - ptep = NULL; - if (get_pteptr(mm, address, &ptep, &pmdp)) { - spinlock_t *ptl = pte_lockptr(mm, pmdp); - spin_lock(ptl); - if (pte_present(*ptep)) { - struct page *page = pte_page(*ptep); - - if (!test_bit(PG_arch_1, &page->flags)) { - flush_dcache_icache_page(page); - set_bit(PG_arch_1, &page->flags); - } - pte_update(ptep, 0, _PAGE_HWEXEC); - _tlbie(address, mm->context.id); - pte_unmap_unlock(ptep, ptl); - up_read(&mm->mmap_sem); - return 0; - } - pte_unmap_unlock(ptep, ptl); - } -#endif - /* a read */ - } else { - /* protection fault */ - if (error_code & 0x08000000) - goto bad_area; - if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) - goto bad_area; - } - - /* - * If for any reason at all we couldn't handle the fault, - * make sure we exit gracefully rather than endlessly redo - * the fault. - */ - survive: - fault = handle_mm_fault(mm, vma, address, is_write); - if (unlikely(fault & VM_FAULT_ERROR)) { - if (fault & VM_FAULT_OOM) - goto out_of_memory; - else if (fault & VM_FAULT_SIGBUS) - goto do_sigbus; - BUG(); - } - if (fault & VM_FAULT_MAJOR) - current->maj_flt++; - else - current->min_flt++; - - up_read(&mm->mmap_sem); - /* - * keep track of tlb+htab misses that are good addrs but - * just need pte's created via handle_mm_fault() - * -- Cort - */ - pte_misses++; - return 0; - -bad_area: - up_read(&mm->mmap_sem); - pte_errors++; - - /* User mode accesses cause a SIGSEGV */ - if (user_mode(regs)) { - _exception(SIGSEGV, regs, code, address); - return 0; - } - - return SIGSEGV; - -/* - * We ran out of memory, or some other thing happened to us that made - * us unable to handle the page fault gracefully. - */ -out_of_memory: - up_read(&mm->mmap_sem); - if (is_global_init(current)) { - yield(); - down_read(&mm->mmap_sem); - goto survive; - } - printk("VM: killing process %s\n", current->comm); - if (user_mode(regs)) - do_group_exit(SIGKILL); - return SIGKILL; - -do_sigbus: - up_read(&mm->mmap_sem); - info.si_signo = SIGBUS; - info.si_errno = 0; - info.si_code = BUS_ADRERR; - info.si_addr = (void __user *)address; - force_sig_info (SIGBUS, &info, current); - if (!user_mode(regs)) - return SIGBUS; - return 0; -} - -/* - * bad_page_fault is called when we have a bad access from the kernel. - * It is called from the DSI and ISI handlers in head.S and from some - * of the procedures in traps.c. - */ -void -bad_page_fault(struct pt_regs *regs, unsigned long address, int sig) -{ - const struct exception_table_entry *entry; - - /* Are we prepared to handle this fault? */ - if ((entry = search_exception_tables(regs->nip)) != NULL) { - regs->nip = entry->fixup; - return; - } - - /* kernel has accessed a bad area */ -#if defined(CONFIG_XMON) || defined(CONFIG_KGDB) - if (debugger_kernel_faults) - debugger(regs); -#endif - die("kernel access of bad area", regs, sig); -} - -#ifdef CONFIG_8xx - -/* The pgtable.h claims some functions generically exist, but I - * can't find them...... - */ -pte_t *va_to_pte(unsigned long address) -{ - pgd_t *dir; - pmd_t *pmd; - pte_t *pte; - - if (address < TASK_SIZE) - return NULL; - - dir = pgd_offset(&init_mm, address); - if (dir) { - pmd = pmd_offset(dir, address & PAGE_MASK); - if (pmd && pmd_present(*pmd)) { - pte = pte_offset_kernel(pmd, address & PAGE_MASK); - if (pte && pte_present(*pte)) - return(pte); - } - } - return NULL; -} - -unsigned long va_to_phys(unsigned long address) -{ - pte_t *pte; - - pte = va_to_pte(address); - if (pte) - return(((unsigned long)(pte_val(*pte)) & PAGE_MASK) | (address & ~(PAGE_MASK))); - return (0); -} - -void -print_8xx_pte(struct mm_struct *mm, unsigned long addr) -{ - pgd_t * pgd; - pmd_t * pmd; - pte_t * pte; - - printk(" pte @ 0x%8lx: ", addr); - pgd = pgd_offset(mm, addr & PAGE_MASK); - if (pgd) { - pmd = pmd_offset(pgd, addr & PAGE_MASK); - if (pmd && pmd_present(*pmd)) { - pte = pte_offset_kernel(pmd, addr & PAGE_MASK); - if (pte) { - printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n", - (long)pgd, (long)pte, (long)pte_val(*pte)); -#define pp ((long)pte_val(*pte)) - printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx " - "CI: %lx v: %lx\n", - pp>>12, /* rpn */ - (pp>>10)&3, /* pp */ - (pp>>3)&1, /* small */ - (pp>>2)&1, /* shared */ - (pp>>1)&1, /* cache inhibit */ - pp&1 /* valid */ - ); -#undef pp - } - else { - printk("no pte\n"); - } - } - else { - printk("no pmd\n"); - } - } - else { - printk("no pgd\n"); - } -} - -int -get_8xx_pte(struct mm_struct *mm, unsigned long addr) -{ - pgd_t * pgd; - pmd_t * pmd; - pte_t * pte; - int retval = 0; - - pgd = pgd_offset(mm, addr & PAGE_MASK); - if (pgd) { - pmd = pmd_offset(pgd, addr & PAGE_MASK); - if (pmd && pmd_present(*pmd)) { - pte = pte_offset_kernel(pmd, addr & PAGE_MASK); - if (pte) { - retval = (int)pte_val(*pte); - } - } - } - return(retval); -} -#endif /* CONFIG_8xx */ diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S deleted file mode 100644 index 5f364dc501549bc41ab5a9a079c98529953234e3..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/hashtable.S +++ /dev/null @@ -1,617 +0,0 @@ -/* - * $Id: hashtable.S,v 1.6 1999/10/08 01:56:15 paulus Exp $ - * - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP - * Copyright (C) 1996 Cort Dougan - * Adapted for Power Macintosh by Paul Mackerras. - * Low-level exception handlers and MMU support - * rewritten by Paul Mackerras. - * Copyright (C) 1996 Paul Mackerras. - * - * This file contains low-level assembler routines for managing - * the PowerPC MMU hash table. (PPC 8xx processors don't use a - * hash table, so this file is not used on them.) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_SMP - .section .bss - .align 2 - .globl mmu_hash_lock -mmu_hash_lock: - .space 4 -#endif /* CONFIG_SMP */ - -/* - * Sync CPUs with hash_page taking & releasing the hash - * table lock - */ -#ifdef CONFIG_SMP - .text -_GLOBAL(hash_page_sync) - lis r8,mmu_hash_lock@h - ori r8,r8,mmu_hash_lock@l - lis r0,0x0fff - b 10f -11: lwz r6,0(r8) - cmpwi 0,r6,0 - bne 11b -10: lwarx r6,0,r8 - cmpwi 0,r6,0 - bne- 11b - stwcx. r0,0,r8 - bne- 10b - isync - eieio - li r0,0 - stw r0,0(r8) - blr -#endif - -/* - * Load a PTE into the hash table, if possible. - * The address is in r4, and r3 contains an access flag: - * _PAGE_RW (0x400) if a write. - * r9 contains the SRR1 value, from which we use the MSR_PR bit. - * SPRG3 contains the physical address of the current task's thread. - * - * Returns to the caller if the access is illegal or there is no - * mapping for the address. Otherwise it places an appropriate PTE - * in the hash table and returns from the exception. - * Uses r0, r3 - r8, ctr, lr. - */ - .text -_GLOBAL(hash_page) - tophys(r7,0) /* gets -KERNELBASE into r7 */ -#ifdef CONFIG_SMP - addis r8,r7,mmu_hash_lock@h - ori r8,r8,mmu_hash_lock@l - lis r0,0x0fff - b 10f -11: lwz r6,0(r8) - cmpwi 0,r6,0 - bne 11b -10: lwarx r6,0,r8 - cmpwi 0,r6,0 - bne- 11b - stwcx. r0,0,r8 - bne- 10b - isync -#endif - /* Get PTE (linux-style) and check access */ - lis r0,KERNELBASE@h /* check if kernel address */ - cmplw 0,r4,r0 - mfspr r8,SPRN_SPRG3 /* current task's THREAD (phys) */ - ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */ - lwz r5,PGDIR(r8) /* virt page-table root */ - blt+ 112f /* assume user more likely */ - lis r5,swapper_pg_dir@ha /* if kernel address, use */ - addi r5,r5,swapper_pg_dir@l /* kernel page table */ - rlwimi r3,r9,32-12,29,29 /* MSR_PR -> _PAGE_USER */ -112: add r5,r5,r7 /* convert to phys addr */ - rlwimi r5,r4,12,20,29 /* insert top 10 bits of address */ - lwz r8,0(r5) /* get pmd entry */ - rlwinm. r8,r8,0,0,19 /* extract address of pte page */ -#ifdef CONFIG_SMP - beq- hash_page_out /* return if no mapping */ -#else - /* XXX it seems like the 601 will give a machine fault on the - rfi if its alignment is wrong (bottom 4 bits of address are - 8 or 0xc) and we have had a not-taken conditional branch - to the address following the rfi. */ - beqlr- -#endif - rlwimi r8,r4,22,20,29 /* insert next 10 bits of address */ - rlwinm r0,r3,32-3,24,24 /* _PAGE_RW access -> _PAGE_DIRTY */ - ori r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE - - /* - * Update the linux PTE atomically. We do the lwarx up-front - * because almost always, there won't be a permission violation - * and there won't already be an HPTE, and thus we will have - * to update the PTE to set _PAGE_HASHPTE. -- paulus. - */ -retry: - lwarx r6,0,r8 /* get linux-style pte */ - andc. r5,r3,r6 /* check access & ~permission */ -#ifdef CONFIG_SMP - bne- hash_page_out /* return if access not permitted */ -#else - bnelr- -#endif - or r5,r0,r6 /* set accessed/dirty bits */ - stwcx. r5,0,r8 /* attempt to update PTE */ - bne- retry /* retry if someone got there first */ - - mfsrin r3,r4 /* get segment reg for segment */ - mfctr r0 - stw r0,_CTR(r11) - bl create_hpte /* add the hash table entry */ - -/* - * htab_reloads counts the number of times we have to fault an - * HPTE into the hash table. This should only happen after a - * fork (because fork does a flush_tlb_mm) or a vmalloc or ioremap. - * Where a page is faulted into a process's address space, - * update_mmu_cache gets called to put the HPTE into the hash table - * and those are counted as preloads rather than reloads. - */ - addis r8,r7,htab_reloads@ha - lwz r3,htab_reloads@l(r8) - addi r3,r3,1 - stw r3,htab_reloads@l(r8) - -#ifdef CONFIG_SMP - eieio - addis r8,r7,mmu_hash_lock@ha - li r0,0 - stw r0,mmu_hash_lock@l(r8) -#endif - - /* Return from the exception */ - lwz r5,_CTR(r11) - mtctr r5 - lwz r0,GPR0(r11) - lwz r7,GPR7(r11) - lwz r8,GPR8(r11) - b fast_exception_return - -#ifdef CONFIG_SMP -hash_page_out: - eieio - addis r8,r7,mmu_hash_lock@ha - li r0,0 - stw r0,mmu_hash_lock@l(r8) - blr -#endif /* CONFIG_SMP */ - -/* - * Add an entry for a particular page to the hash table. - * - * add_hash_page(unsigned context, unsigned long va, unsigned long pmdval) - * - * We assume any necessary modifications to the pte (e.g. setting - * the accessed bit) have already been done and that there is actually - * a hash table in use (i.e. we're not on a 603). - */ -_GLOBAL(add_hash_page) - mflr r0 - stw r0,4(r1) - - /* Convert context and va to VSID */ - mulli r3,r3,897*16 /* multiply context by context skew */ - rlwinm r0,r4,4,28,31 /* get ESID (top 4 bits of va) */ - mulli r0,r0,0x111 /* multiply by ESID skew */ - add r3,r3,r0 /* note create_hpte trims to 24 bits */ - -#ifdef CONFIG_SMP - rlwinm r8,r1,0,0,18 /* use cpu number to make tag */ - lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */ - oris r8,r8,12 -#endif /* CONFIG_SMP */ - - /* - * We disable interrupts here, even on UP, because we don't - * want to race with hash_page, and because we want the - * _PAGE_HASHPTE bit to be a reliable indication of whether - * the HPTE exists (or at least whether one did once). - * We also turn off the MMU for data accesses so that we - * we can't take a hash table miss (assuming the code is - * covered by a BAT). -- paulus - */ - mfmsr r10 - SYNC - rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ - rlwinm r0,r0,0,28,26 /* clear MSR_DR */ - mtmsr r0 - SYNC_601 - isync - - tophys(r7,0) - -#ifdef CONFIG_SMP - addis r9,r7,mmu_hash_lock@ha - addi r9,r9,mmu_hash_lock@l -10: lwarx r0,0,r9 /* take the mmu_hash_lock */ - cmpi 0,r0,0 - bne- 11f - stwcx. r8,0,r9 - beq+ 12f -11: lwz r0,0(r9) - cmpi 0,r0,0 - beq 10b - b 11b -12: isync -#endif - - /* - * Fetch the linux pte and test and set _PAGE_HASHPTE atomically. - * If _PAGE_HASHPTE was already set, we don't replace the existing - * HPTE, so we just unlock and return. - */ - mr r8,r5 - rlwimi r8,r4,22,20,29 -1: lwarx r6,0,r8 - andi. r0,r6,_PAGE_HASHPTE - bne 9f /* if HASHPTE already set, done */ - ori r5,r6,_PAGE_HASHPTE - stwcx. r5,0,r8 - bne- 1b - - bl create_hpte - - addis r8,r7,htab_preloads@ha - lwz r3,htab_preloads@l(r8) - addi r3,r3,1 - stw r3,htab_preloads@l(r8) - -9: -#ifdef CONFIG_SMP - eieio - li r0,0 - stw r0,0(r9) /* clear mmu_hash_lock */ -#endif - - /* reenable interrupts and DR */ - mtmsr r10 - SYNC_601 - isync - - lwz r0,4(r1) - mtlr r0 - blr - -/* - * This routine adds a hardware PTE to the hash table. - * It is designed to be called with the MMU either on or off. - * r3 contains the VSID, r4 contains the virtual address, - * r5 contains the linux PTE, r6 contains the old value of the - * linux PTE (before setting _PAGE_HASHPTE) and r7 contains the - * offset to be added to addresses (0 if the MMU is on, - * -KERNELBASE if it is off). - * On SMP, the caller should have the mmu_hash_lock held. - * We assume that the caller has (or will) set the _PAGE_HASHPTE - * bit in the linux PTE in memory. The value passed in r6 should - * be the old linux PTE value; if it doesn't have _PAGE_HASHPTE set - * this routine will skip the search for an existing HPTE. - * This procedure modifies r0, r3 - r6, r8, cr0. - * -- paulus. - * - * For speed, 4 of the instructions get patched once the size and - * physical address of the hash table are known. These definitions - * of Hash_base and Hash_bits below are just an example. - */ -Hash_base = 0xc0180000 -Hash_bits = 12 /* e.g. 256kB hash table */ -Hash_msk = (((1 << Hash_bits) - 1) * 64) - -/* defines for the PTE format for 32-bit PPCs */ -#define PTE_SIZE 8 -#define PTEG_SIZE 64 -#define LG_PTEG_SIZE 6 -#define LDPTEu lwzu -#define STPTE stw -#define CMPPTE cmpw -#define PTE_H 0x40 -#define PTE_V 0x80000000 -#define TST_V(r) rlwinm. r,r,0,0,0 -#define SET_V(r) oris r,r,PTE_V@h -#define CLR_V(r,t) rlwinm r,r,0,1,31 - -#define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1) -#define HASH_RIGHT 31-LG_PTEG_SIZE - -_GLOBAL(create_hpte) - /* Convert linux-style PTE (r5) to low word of PPC-style PTE (r8) */ - rlwinm r8,r5,32-10,31,31 /* _PAGE_RW -> PP lsb */ - rlwinm r0,r5,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */ - and r8,r8,r0 /* writable if _RW & _DIRTY */ - rlwimi r5,r5,32-1,30,30 /* _PAGE_USER -> PP msb */ - rlwimi r5,r5,32-2,31,31 /* _PAGE_USER -> PP lsb */ - ori r8,r8,0xe14 /* clear out reserved bits and M */ - andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */ -BEGIN_FTR_SECTION - ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */ -END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) - - /* Construct the high word of the PPC-style PTE (r5) */ - rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ - rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */ - SET_V(r5) /* set V (valid) bit */ - - /* Get the address of the primary PTE group in the hash table (r3) */ -_GLOBAL(hash_page_patch_A) - addis r0,r7,Hash_base@h /* base address of hash table */ - rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ - rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */ - xor r3,r3,r0 /* make primary hash */ - li r0,8 /* PTEs/group */ - - /* - * Test the _PAGE_HASHPTE bit in the old linux PTE, and skip the search - * if it is clear, meaning that the HPTE isn't there already... - */ - andi. r6,r6,_PAGE_HASHPTE - beq+ 10f /* no PTE: go look for an empty slot */ - tlbie r4 - - addis r4,r7,htab_hash_searches@ha - lwz r6,htab_hash_searches@l(r4) - addi r6,r6,1 /* count how many searches we do */ - stw r6,htab_hash_searches@l(r4) - - /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */ - mtctr r0 - addi r4,r3,-PTE_SIZE -1: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */ - CMPPTE 0,r6,r5 - bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ - beq+ found_slot - - /* Search the secondary PTEG for a matching PTE */ - ori r5,r5,PTE_H /* set H (secondary hash) bit */ -_GLOBAL(hash_page_patch_B) - xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ - xori r4,r4,(-PTEG_SIZE & 0xffff) - addi r4,r4,-PTE_SIZE - mtctr r0 -2: LDPTEu r6,PTE_SIZE(r4) - CMPPTE 0,r6,r5 - bdnzf 2,2b - beq+ found_slot - xori r5,r5,PTE_H /* clear H bit again */ - - /* Search the primary PTEG for an empty slot */ -10: mtctr r0 - addi r4,r3,-PTE_SIZE /* search primary PTEG */ -1: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */ - TST_V(r6) /* test valid bit */ - bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ - beq+ found_empty - - /* update counter of times that the primary PTEG is full */ - addis r4,r7,primary_pteg_full@ha - lwz r6,primary_pteg_full@l(r4) - addi r6,r6,1 - stw r6,primary_pteg_full@l(r4) - - /* Search the secondary PTEG for an empty slot */ - ori r5,r5,PTE_H /* set H (secondary hash) bit */ -_GLOBAL(hash_page_patch_C) - xoris r4,r3,Hash_msk>>16 /* compute secondary hash */ - xori r4,r4,(-PTEG_SIZE & 0xffff) - addi r4,r4,-PTE_SIZE - mtctr r0 -2: LDPTEu r6,PTE_SIZE(r4) - TST_V(r6) - bdnzf 2,2b - beq+ found_empty - xori r5,r5,PTE_H /* clear H bit again */ - - /* - * Choose an arbitrary slot in the primary PTEG to overwrite. - * Since both the primary and secondary PTEGs are full, and we - * have no information that the PTEs in the primary PTEG are - * more important or useful than those in the secondary PTEG, - * and we know there is a definite (although small) speed - * advantage to putting the PTE in the primary PTEG, we always - * put the PTE in the primary PTEG. - */ - addis r4,r7,next_slot@ha - lwz r6,next_slot@l(r4) - addi r6,r6,PTE_SIZE - andi. r6,r6,7*PTE_SIZE - stw r6,next_slot@l(r4) - add r4,r3,r6 - - /* update counter of evicted pages */ - addis r6,r7,htab_evicts@ha - lwz r3,htab_evicts@l(r6) - addi r3,r3,1 - stw r3,htab_evicts@l(r6) - -#ifndef CONFIG_SMP - /* Store PTE in PTEG */ -found_empty: - STPTE r5,0(r4) -found_slot: - STPTE r8,PTE_SIZE/2(r4) - -#else /* CONFIG_SMP */ -/* - * Between the tlbie above and updating the hash table entry below, - * another CPU could read the hash table entry and put it in its TLB. - * There are 3 cases: - * 1. using an empty slot - * 2. updating an earlier entry to change permissions (i.e. enable write) - * 3. taking over the PTE for an unrelated address - * - * In each case it doesn't really matter if the other CPUs have the old - * PTE in their TLB. So we don't need to bother with another tlbie here, - * which is convenient as we've overwritten the register that had the - * address. :-) The tlbie above is mainly to make sure that this CPU comes - * and gets the new PTE from the hash table. - * - * We do however have to make sure that the PTE is never in an invalid - * state with the V bit set. - */ -found_empty: -found_slot: - CLR_V(r5,r0) /* clear V (valid) bit in PTE */ - STPTE r5,0(r4) - sync - TLBSYNC - STPTE r8,PTE_SIZE/2(r4) /* put in correct RPN, WIMG, PP bits */ - sync - SET_V(r5) - STPTE r5,0(r4) /* finally set V bit in PTE */ -#endif /* CONFIG_SMP */ - - sync /* make sure pte updates get to memory */ - blr - - .section .bss - .align 2 -next_slot: - .space 4 - .globl primary_pteg_full -primary_pteg_full: - .space 4 - .globl htab_hash_searches -htab_hash_searches: - .space 4 - .previous - -/* - * Flush the entry for a particular page from the hash table. - * - * flush_hash_pages(unsigned context, unsigned long va, unsigned long pmdval, - * int count) - * - * We assume that there is a hash table in use (Hash != 0). - */ -_GLOBAL(flush_hash_pages) - tophys(r7,0) - - /* - * We disable interrupts here, even on UP, because we want - * the _PAGE_HASHPTE bit to be a reliable indication of - * whether the HPTE exists (or at least whether one did once). - * We also turn off the MMU for data accesses so that we - * we can't take a hash table miss (assuming the code is - * covered by a BAT). -- paulus - */ - mfmsr r10 - SYNC - rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */ - rlwinm r0,r0,0,28,26 /* clear MSR_DR */ - mtmsr r0 - SYNC_601 - isync - - /* First find a PTE in the range that has _PAGE_HASHPTE set */ - rlwimi r5,r4,22,20,29 -1: lwz r0,0(r5) - cmpwi cr1,r6,1 - andi. r0,r0,_PAGE_HASHPTE - bne 2f - ble cr1,19f - addi r4,r4,0x1000 - addi r5,r5,4 - addi r6,r6,-1 - b 1b - - /* Convert context and va to VSID */ -2: mulli r3,r3,897*16 /* multiply context by context skew */ - rlwinm r0,r4,4,28,31 /* get ESID (top 4 bits of va) */ - mulli r0,r0,0x111 /* multiply by ESID skew */ - add r3,r3,r0 /* note code below trims to 24 bits */ - - /* Construct the high word of the PPC-style PTE (r11) */ - rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ - rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */ - SET_V(r11) /* set V (valid) bit */ - -#ifdef CONFIG_SMP - addis r9,r7,mmu_hash_lock@ha - addi r9,r9,mmu_hash_lock@l - rlwinm r8,r1,0,0,18 - add r8,r8,r7 - lwz r8,TI_CPU(r8) - oris r8,r8,9 -10: lwarx r0,0,r9 - cmpi 0,r0,0 - bne- 11f - stwcx. r8,0,r9 - beq+ 12f -11: lwz r0,0(r9) - cmpi 0,r0,0 - beq 10b - b 11b -12: isync -#endif - - /* - * Check the _PAGE_HASHPTE bit in the linux PTE. If it is - * already clear, we're done (for this pte). If not, - * clear it (atomically) and proceed. -- paulus. - */ -33: lwarx r8,0,r5 /* fetch the pte */ - andi. r0,r8,_PAGE_HASHPTE - beq 8f /* done if HASHPTE is already clear */ - rlwinm r8,r8,0,31,29 /* clear HASHPTE bit */ - stwcx. r8,0,r5 /* update the pte */ - bne- 33b - - /* Get the address of the primary PTE group in the hash table (r3) */ -_GLOBAL(flush_hash_patch_A) - addis r8,r7,Hash_base@h /* base address of hash table */ - rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */ - rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */ - xor r8,r0,r8 /* make primary hash */ - - /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */ - li r0,8 /* PTEs/group */ - mtctr r0 - addi r12,r8,-PTE_SIZE -1: LDPTEu r0,PTE_SIZE(r12) /* get next PTE */ - CMPPTE 0,r0,r11 - bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */ - beq+ 3f - - /* Search the secondary PTEG for a matching PTE */ - ori r11,r11,PTE_H /* set H (secondary hash) bit */ - li r0,8 /* PTEs/group */ -_GLOBAL(flush_hash_patch_B) - xoris r12,r8,Hash_msk>>16 /* compute secondary hash */ - xori r12,r12,(-PTEG_SIZE & 0xffff) - addi r12,r12,-PTE_SIZE - mtctr r0 -2: LDPTEu r0,PTE_SIZE(r12) - CMPPTE 0,r0,r11 - bdnzf 2,2b - xori r11,r11,PTE_H /* clear H again */ - bne- 4f /* should rarely fail to find it */ - -3: li r0,0 - STPTE r0,0(r12) /* invalidate entry */ -4: sync - tlbie r4 /* in hw tlb too */ - sync - -8: ble cr1,9f /* if all ptes checked */ -81: addi r6,r6,-1 - addi r5,r5,4 /* advance to next pte */ - addi r4,r4,0x1000 - lwz r0,0(r5) /* check next pte */ - cmpwi cr1,r6,1 - andi. r0,r0,_PAGE_HASHPTE - bne 33b - bgt cr1,81b - -9: -#ifdef CONFIG_SMP - TLBSYNC - li r0,0 - stw r0,0(r9) /* clear mmu_hash_lock */ -#endif - -19: mtmsr r10 - SYNC_601 - isync - blr diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c deleted file mode 100644 index 1a63711081b5f96443433f61dae2b71321d1b4ed..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/init.c +++ /dev/null @@ -1,603 +0,0 @@ -/* - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com) - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mem_pieces.h" -#include "mmu_decl.h" - -#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL) -/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */ -#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE)) -#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL" -#endif -#endif -#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE - -DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); - -unsigned long total_memory; -unsigned long total_lowmem; - -unsigned long ppc_memstart; -unsigned long ppc_memoffset = PAGE_OFFSET; - -int mem_init_done; -int init_bootmem_done; -int boot_mapsize; - -extern char _end[]; -extern char etext[], _stext[]; -extern char __init_begin, __init_end; - -#ifdef CONFIG_HIGHMEM -pte_t *kmap_pte; -pgprot_t kmap_prot; - -EXPORT_SYMBOL(kmap_prot); -EXPORT_SYMBOL(kmap_pte); -#endif - -void MMU_init(void); -void set_phys_avail(unsigned long total_ram); - -/* XXX should be in current.h -- paulus */ -extern struct task_struct *current_set[NR_CPUS]; - -char *klimit = _end; -struct mem_pieces phys_avail; - -/* - * this tells the system to map all of ram with the segregs - * (i.e. page tables) instead of the bats. - * -- Cort - */ -int __map_without_bats; -int __map_without_ltlbs; - -/* max amount of RAM to use */ -unsigned long __max_memory; -/* max amount of low RAM to map in */ -unsigned long __max_low_memory = MAX_LOW_MEM; - -void show_mem(void) -{ - int i,free = 0,total = 0,reserved = 0; - int shared = 0, cached = 0; - int highmem = 0; - - printk("Mem-info:\n"); - show_free_areas(); - i = max_mapnr; - while (i-- > 0) { - total++; - if (PageHighMem(mem_map+i)) - highmem++; - if (PageReserved(mem_map+i)) - reserved++; - else if (PageSwapCache(mem_map+i)) - cached++; - else if (!page_count(mem_map+i)) - free++; - else - shared += page_count(mem_map+i) - 1; - } - printk("%d pages of RAM\n",total); - printk("%d pages of HIGHMEM\n", highmem); - printk("%d free pages\n",free); - printk("%d reserved pages\n",reserved); - printk("%d pages shared\n",shared); - printk("%d pages swap cached\n",cached); -} - -/* Free up now-unused memory */ -static void free_sec(unsigned long start, unsigned long end, const char *name) -{ - unsigned long cnt = 0; - - while (start < end) { - ClearPageReserved(virt_to_page(start)); - init_page_count(virt_to_page(start)); - free_page(start); - cnt++; - start += PAGE_SIZE; - } - if (cnt) { - printk(" %ldk %s", cnt << (PAGE_SHIFT - 10), name); - totalram_pages += cnt; - } -} - -void free_initmem(void) -{ -#define FREESEC(TYPE) \ - free_sec((unsigned long)(&__ ## TYPE ## _begin), \ - (unsigned long)(&__ ## TYPE ## _end), \ - #TYPE); - - printk ("Freeing unused kernel memory:"); - FREESEC(init); - printk("\n"); - ppc_md.progress = NULL; -#undef FREESEC -} - -#ifdef CONFIG_BLK_DEV_INITRD -void free_initrd_mem(unsigned long start, unsigned long end) -{ - printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10); - - for (; start < end; start += PAGE_SIZE) { - ClearPageReserved(virt_to_page(start)); - init_page_count(virt_to_page(start)); - free_page(start); - totalram_pages++; - } -} -#endif - -/* - * Check for command-line options that affect what MMU_init will do. - */ -void MMU_setup(void) -{ - /* Check for nobats option (used in mapin_ram). */ - if (strstr(cmd_line, "nobats")) { - __map_without_bats = 1; - } - - if (strstr(cmd_line, "noltlbs")) { - __map_without_ltlbs = 1; - } - - /* Look for mem= option on command line */ - if (strstr(cmd_line, "mem=")) { - char *p, *q; - unsigned long maxmem = 0; - - for (q = cmd_line; (p = strstr(q, "mem=")) != 0; ) { - q = p + 4; - if (p > cmd_line && p[-1] != ' ') - continue; - maxmem = simple_strtoul(q, &q, 0); - if (*q == 'k' || *q == 'K') { - maxmem <<= 10; - ++q; - } else if (*q == 'm' || *q == 'M') { - maxmem <<= 20; - ++q; - } - } - __max_memory = maxmem; - } -} - -/* - * MMU_init sets up the basic memory mappings for the kernel, - * including both RAM and possibly some I/O regions, - * and sets up the page tables and the MMU hardware ready to go. - */ -void __init MMU_init(void) -{ - if (ppc_md.progress) - ppc_md.progress("MMU:enter", 0x111); - - /* parse args from command line */ - MMU_setup(); - - /* - * Figure out how much memory we have, how much - * is lowmem, and how much is highmem. If we were - * passed the total memory size from the bootloader, - * just use it. - */ - if (boot_mem_size) - total_memory = boot_mem_size; - else - total_memory = ppc_md.find_end_of_memory(); - - if (__max_memory && total_memory > __max_memory) - total_memory = __max_memory; - total_lowmem = total_memory; - if (total_lowmem > __max_low_memory) { - total_lowmem = __max_low_memory; -#ifndef CONFIG_HIGHMEM - total_memory = total_lowmem; -#endif /* CONFIG_HIGHMEM */ - } - set_phys_avail(total_lowmem); - - /* Initialize the MMU hardware */ - if (ppc_md.progress) - ppc_md.progress("MMU:hw init", 0x300); - MMU_init_hw(); - - /* Map in all of RAM starting at KERNELBASE */ - if (ppc_md.progress) - ppc_md.progress("MMU:mapin", 0x301); - mapin_ram(); - -#ifdef CONFIG_HIGHMEM - ioremap_base = PKMAP_BASE; -#else - ioremap_base = 0xfe000000UL; /* for now, could be 0xfffff000 */ -#endif /* CONFIG_HIGHMEM */ - ioremap_bot = ioremap_base; - - /* Map in I/O resources */ - if (ppc_md.progress) - ppc_md.progress("MMU:setio", 0x302); - if (ppc_md.setup_io_mappings) - ppc_md.setup_io_mappings(); - - /* Initialize the context management stuff */ - mmu_context_init(); - - if (ppc_md.progress) - ppc_md.progress("MMU:exit", 0x211); - -#ifdef CONFIG_BOOTX_TEXT - /* By default, we are no longer mapped */ - boot_text_mapped = 0; - /* Must be done last, or ppc_md.progress will die. */ - map_boot_text(); -#endif -} - -/* This is only called until mem_init is done. */ -void __init *early_get_page(void) -{ - void *p; - - if (init_bootmem_done) { - p = alloc_bootmem_pages(PAGE_SIZE); - } else { - p = mem_pieces_find(PAGE_SIZE, PAGE_SIZE); - } - return p; -} - -/* - * Initialize the bootmem system and give it all the memory we - * have available. - */ -void __init do_init_bootmem(void) -{ - unsigned long start, size; - int i; - - /* - * Find an area to use for the bootmem bitmap. - * We look for the first area which is at least - * 128kB in length (128kB is enough for a bitmap - * for 4GB of memory, using 4kB pages), plus 1 page - * (in case the address isn't page-aligned). - */ - start = 0; - size = 0; - for (i = 0; i < phys_avail.n_regions; ++i) { - unsigned long a = phys_avail.regions[i].address; - unsigned long s = phys_avail.regions[i].size; - if (s <= size) - continue; - start = a; - size = s; - if (s >= 33 * PAGE_SIZE) - break; - } - start = PAGE_ALIGN(start); - - min_low_pfn = start >> PAGE_SHIFT; - max_low_pfn = (PPC_MEMSTART + total_lowmem) >> PAGE_SHIFT; - max_pfn = (PPC_MEMSTART + total_memory) >> PAGE_SHIFT; - boot_mapsize = init_bootmem_node(&contig_page_data, min_low_pfn, - PPC_MEMSTART >> PAGE_SHIFT, - max_low_pfn); - - /* remove the bootmem bitmap from the available memory */ - mem_pieces_remove(&phys_avail, start, boot_mapsize, 1); - - /* add everything in phys_avail into the bootmem map */ - for (i = 0; i < phys_avail.n_regions; ++i) - free_bootmem(phys_avail.regions[i].address, - phys_avail.regions[i].size); - - init_bootmem_done = 1; -} - -/* - * paging_init() sets up the page tables - in fact we've already done this. - */ -void __init paging_init(void) -{ - unsigned long start_pfn, end_pfn; - unsigned long max_zone_pfns[MAX_NR_ZONES]; -#ifdef CONFIG_HIGHMEM - map_page(PKMAP_BASE, 0, 0); /* XXX gross */ - pkmap_page_table = pte_offset_kernel(pmd_offset(pgd_offset_k - (PKMAP_BASE), PKMAP_BASE), PKMAP_BASE); - map_page(KMAP_FIX_BEGIN, 0, 0); /* XXX gross */ - kmap_pte = pte_offset_kernel(pmd_offset(pgd_offset_k - (KMAP_FIX_BEGIN), KMAP_FIX_BEGIN), KMAP_FIX_BEGIN); - kmap_prot = PAGE_KERNEL; -#endif /* CONFIG_HIGHMEM */ - /* All pages are DMA-able so we put them all in the DMA zone. */ - start_pfn = __pa(PAGE_OFFSET) >> PAGE_SHIFT; - end_pfn = start_pfn + (total_memory >> PAGE_SHIFT); - add_active_range(0, start_pfn, end_pfn); - - memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); -#ifdef CONFIG_HIGHMEM - max_zone_pfns[ZONE_DMA] = total_lowmem >> PAGE_SHIFT; - max_zone_pfns[ZONE_HIGHMEM] = total_memory >> PAGE_SHIFT; -#else - max_zone_pfns[ZONE_DMA] = total_memory >> PAGE_SHIFT; -#endif /* CONFIG_HIGHMEM */ - free_area_init_nodes(max_zone_pfns); -} - -void __init mem_init(void) -{ - unsigned long addr; - int codepages = 0; - int datapages = 0; - int initpages = 0; -#ifdef CONFIG_HIGHMEM - unsigned long highmem_mapnr; - - highmem_mapnr = total_lowmem >> PAGE_SHIFT; -#endif /* CONFIG_HIGHMEM */ - max_mapnr = total_memory >> PAGE_SHIFT; - - high_memory = (void *) __va(PPC_MEMSTART + total_lowmem); - num_physpages = max_mapnr; /* RAM is assumed contiguous */ - - totalram_pages += free_all_bootmem(); - -#ifdef CONFIG_BLK_DEV_INITRD - /* if we are booted from BootX with an initial ramdisk, - make sure the ramdisk pages aren't reserved. */ - if (initrd_start) { - for (addr = initrd_start; addr < initrd_end; addr += PAGE_SIZE) - ClearPageReserved(virt_to_page(addr)); - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - for (addr = PAGE_OFFSET; addr < (unsigned long)high_memory; - addr += PAGE_SIZE) { - if (!PageReserved(virt_to_page(addr))) - continue; - if (addr < (ulong) etext) - codepages++; - else if (addr >= (unsigned long)&__init_begin - && addr < (unsigned long)&__init_end) - initpages++; - else if (addr < (ulong) klimit) - datapages++; - } - -#ifdef CONFIG_HIGHMEM - { - unsigned long pfn; - - for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) { - struct page *page = mem_map + pfn; - - ClearPageReserved(page); - init_page_count(page); - __free_page(page); - totalhigh_pages++; - } - totalram_pages += totalhigh_pages; - } -#endif /* CONFIG_HIGHMEM */ - - printk("Memory: %luk available (%dk kernel code, %dk data, %dk init, %ldk highmem)\n", - (unsigned long)nr_free_pages()<< (PAGE_SHIFT-10), - codepages<< (PAGE_SHIFT-10), datapages<< (PAGE_SHIFT-10), - initpages<< (PAGE_SHIFT-10), - (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); - - mem_init_done = 1; -} - -/* - * Set phys_avail to the amount of physical memory, - * less the kernel text/data/bss. - */ -void __init -set_phys_avail(unsigned long total_memory) -{ - unsigned long kstart, ksize; - - /* - * Initially, available physical memory is equivalent to all - * physical memory. - */ - - phys_avail.regions[0].address = PPC_MEMSTART; - phys_avail.regions[0].size = total_memory; - phys_avail.n_regions = 1; - - /* - * Map out the kernel text/data/bss from the available physical - * memory. - */ - - kstart = __pa(_stext); /* should be 0 */ - ksize = PAGE_ALIGN(klimit - _stext); - - mem_pieces_remove(&phys_avail, kstart, ksize, 0); - mem_pieces_remove(&phys_avail, 0, 0x4000, 0); - -#if defined(CONFIG_BLK_DEV_INITRD) - /* Remove the init RAM disk from the available memory. */ - if (initrd_start) { - mem_pieces_remove(&phys_avail, __pa(initrd_start), - initrd_end - initrd_start, 1); - } -#endif /* CONFIG_BLK_DEV_INITRD */ -} - -/* Mark some memory as reserved by removing it from phys_avail. */ -void __init reserve_phys_mem(unsigned long start, unsigned long size) -{ - mem_pieces_remove(&phys_avail, start, size, 1); -} - -/* - * This is called when a page has been modified by the kernel. - * It just marks the page as not i-cache clean. We do the i-cache - * flush later when the page is given to a user process, if necessary. - */ -void flush_dcache_page(struct page *page) -{ - clear_bit(PG_arch_1, &page->flags); -} - -void flush_dcache_icache_page(struct page *page) -{ -#ifdef CONFIG_BOOKE - void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE); - __flush_dcache_icache(start); - kunmap_atomic(start, KM_PPC_SYNC_ICACHE); -#elif defined(CONFIG_8xx) - /* On 8xx there is no need to kmap since highmem is not supported */ - __flush_dcache_icache(page_address(page)); -#else - __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT); -#endif - -} -void clear_user_page(void *page, unsigned long vaddr, struct page *pg) -{ - clear_page(page); - clear_bit(PG_arch_1, &pg->flags); -} - -void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, - struct page *pg) -{ - copy_page(vto, vfrom); - clear_bit(PG_arch_1, &pg->flags); -} - -void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, - unsigned long addr, int len) -{ - unsigned long maddr; - - maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK); - flush_icache_range(maddr, maddr + len); - kunmap(page); -} - -/* - * This is called at the end of handling a user page fault, when the - * fault has been handled by updating a PTE in the linux page tables. - * We use it to preload an HPTE into the hash table corresponding to - * the updated linux PTE. - */ -void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, - pte_t pte) -{ - /* handle i-cache coherency */ - unsigned long pfn = pte_pfn(pte); - - if (pfn_valid(pfn)) { - struct page *page = pfn_to_page(pfn); -#ifdef CONFIG_8xx - /* On 8xx, the TLB handlers work in 2 stages: - * First, a zeroed entry is loaded by TLBMiss handler, - * which causes the TLBError handler to be triggered. - * That means the zeroed TLB has to be invalidated - * whenever a page miss occurs. - */ - _tlbie(address, 0 /* 8xx doesn't care about PID */); -#endif - if (!PageReserved(page) - && !test_bit(PG_arch_1, &page->flags)) { - if (vma->vm_mm == current->active_mm) - __flush_dcache_icache((void *) address); - else - flush_dcache_icache_page(page); - set_bit(PG_arch_1, &page->flags); - } - } - -#ifdef CONFIG_PPC_STD_MMU - /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */ - if (Hash != 0 && pte_young(pte)) { - struct mm_struct *mm; - pmd_t *pmd; - - mm = (address < TASK_SIZE)? vma->vm_mm: &init_mm; - pmd = pmd_offset(pgd_offset(mm, address), address); - if (!pmd_none(*pmd)) - add_hash_page(mm->context.id, address, pmd_val(*pmd)); - } -#endif -} - -/* - * This is called by /dev/mem to know if a given address has to - * be mapped non-cacheable or not - */ -int page_is_ram(unsigned long pfn) -{ - return pfn < max_pfn; -} - -pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot) -{ - if (ppc_md.phys_mem_access_prot) - return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot); - - if (!page_is_ram(pfn)) - vma_prot = __pgprot(pgprot_val(vma_prot) - | _PAGE_GUARDED | _PAGE_NO_CACHE); - return vma_prot; -} -EXPORT_SYMBOL(phys_mem_access_prot); diff --git a/arch/ppc/mm/mem_pieces.c b/arch/ppc/mm/mem_pieces.c deleted file mode 100644 index 6030a0ddfbb43b7b80dcaae73b3c43544fbe8bdd..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/mem_pieces.c +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Copyright (c) 1996 Paul Mackerras - * Changes to accommodate Power Macintoshes. - * Cort Dougan - * Rewrites. - * Grant Erickson - * General rework and split from mm/init.c. - * - * Module name: mem_pieces.c - * - * Description: - * Routines and data structures for manipulating and representing - * phyiscal memory extents (i.e. address/length pairs). - * - */ - -#include -#include -#include -#include - -#include "mem_pieces.h" - -extern struct mem_pieces phys_avail; - -static void mem_pieces_print(struct mem_pieces *); - -/* - * Scan a region for a piece of a given size with the required alignment. - */ -void __init * -mem_pieces_find(unsigned int size, unsigned int align) -{ - int i; - unsigned a, e; - struct mem_pieces *mp = &phys_avail; - - for (i = 0; i < mp->n_regions; ++i) { - a = mp->regions[i].address; - e = a + mp->regions[i].size; - a = (a + align - 1) & -align; - if (a + size <= e) { - mem_pieces_remove(mp, a, size, 1); - return (void *) __va(a); - } - } - panic("Couldn't find %u bytes at %u alignment\n", size, align); - - return NULL; -} - -/* - * Remove some memory from an array of pieces - */ -void __init -mem_pieces_remove(struct mem_pieces *mp, unsigned int start, unsigned int size, - int must_exist) -{ - int i, j; - unsigned int end, rs, re; - struct reg_property *rp; - - end = start + size; - for (i = 0, rp = mp->regions; i < mp->n_regions; ++i, ++rp) { - if (end > rp->address && start < rp->address + rp->size) - break; - } - if (i >= mp->n_regions) { - if (must_exist) - printk("mem_pieces_remove: [%x,%x) not in any region\n", - start, end); - return; - } - for (; i < mp->n_regions && end > rp->address; ++i, ++rp) { - rs = rp->address; - re = rs + rp->size; - if (must_exist && (start < rs || end > re)) { - printk("mem_pieces_remove: bad overlap [%x,%x) with", - start, end); - mem_pieces_print(mp); - must_exist = 0; - } - if (start > rs) { - rp->size = start - rs; - if (end < re) { - /* need to split this entry */ - if (mp->n_regions >= MEM_PIECES_MAX) - panic("eek... mem_pieces overflow"); - for (j = mp->n_regions; j > i + 1; --j) - mp->regions[j] = mp->regions[j-1]; - ++mp->n_regions; - rp[1].address = end; - rp[1].size = re - end; - } - } else { - if (end < re) { - rp->address = end; - rp->size = re - end; - } else { - /* need to delete this entry */ - for (j = i; j < mp->n_regions - 1; ++j) - mp->regions[j] = mp->regions[j+1]; - --mp->n_regions; - --i; - --rp; - } - } - } -} - -static void __init -mem_pieces_print(struct mem_pieces *mp) -{ - int i; - - for (i = 0; i < mp->n_regions; ++i) - printk(" [%x, %x)", mp->regions[i].address, - mp->regions[i].address + mp->regions[i].size); - printk("\n"); -} - -void __init -mem_pieces_sort(struct mem_pieces *mp) -{ - unsigned long a, s; - int i, j; - - for (i = 1; i < mp->n_regions; ++i) { - a = mp->regions[i].address; - s = mp->regions[i].size; - for (j = i - 1; j >= 0; --j) { - if (a >= mp->regions[j].address) - break; - mp->regions[j+1] = mp->regions[j]; - } - mp->regions[j+1].address = a; - mp->regions[j+1].size = s; - } -} - -void __init -mem_pieces_coalesce(struct mem_pieces *mp) -{ - unsigned long a, s, ns; - int i, j, d; - - d = 0; - for (i = 0; i < mp->n_regions; i = j) { - a = mp->regions[i].address; - s = mp->regions[i].size; - for (j = i + 1; j < mp->n_regions - && mp->regions[j].address - a <= s; ++j) { - ns = mp->regions[j].address + mp->regions[j].size - a; - if (ns > s) - s = ns; - } - mp->regions[d].address = a; - mp->regions[d].size = s; - ++d; - } - mp->n_regions = d; -} diff --git a/arch/ppc/mm/mem_pieces.h b/arch/ppc/mm/mem_pieces.h deleted file mode 100644 index e2b700dc7f18473233d43899c26e2868d53a0f35..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/mem_pieces.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 1996 Paul Mackerras - * Changes to accommodate Power Macintoshes. - * Cort Dougan - * Rewrites. - * Grant Erickson - * General rework and split from mm/init.c. - * - * Module name: mem_pieces.h - * - * Description: - * Routines and data structures for manipulating and representing - * phyiscal memory extents (i.e. address/length pairs). - * - */ - -#ifndef __MEM_PIECES_H__ -#define __MEM_PIECES_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/* Type Definitions */ - -#define MEM_PIECES_MAX 32 - -struct mem_pieces { - int n_regions; - struct reg_property regions[MEM_PIECES_MAX]; -}; - -/* Function Prototypes */ - -extern void *mem_pieces_find(unsigned int size, unsigned int align); -extern void mem_pieces_remove(struct mem_pieces *mp, unsigned int start, - unsigned int size, int must_exist); -extern void mem_pieces_coalesce(struct mem_pieces *mp); -extern void mem_pieces_sort(struct mem_pieces *mp); - -#ifdef __cplusplus -} -#endif - -#endif /* __MEM_PIECES_H__ */ diff --git a/arch/ppc/mm/mmu_context.c b/arch/ppc/mm/mmu_context.c deleted file mode 100644 index dacf45ced473f05a0a03975bbb4b4fcb307ddbb6..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/mmu_context.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file contains the routines for handling the MMU on those - * PowerPC implementations where the MMU substantially follows the - * architecture specification. This includes the 6xx, 7xx, 7xxx, - * and 8260 implementations but excludes the 8xx and 4xx. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include - -#include -#include - -unsigned long next_mmu_context; -unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1]; -#ifdef FEW_CONTEXTS -atomic_t nr_free_contexts; -struct mm_struct *context_mm[LAST_CONTEXT+1]; -void steal_context(void); -#endif /* FEW_CONTEXTS */ - -/* - * Initialize the context management stuff. - */ -void __init -mmu_context_init(void) -{ - /* - * Some processors have too few contexts to reserve one for - * init_mm, and require using context 0 for a normal task. - * Other processors reserve the use of context zero for the kernel. - * This code assumes FIRST_CONTEXT < 32. - */ - context_map[0] = (1 << FIRST_CONTEXT) - 1; - next_mmu_context = FIRST_CONTEXT; -#ifdef FEW_CONTEXTS - atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1); -#endif /* FEW_CONTEXTS */ -} - -#ifdef FEW_CONTEXTS -/* - * Steal a context from a task that has one at the moment. - * This is only used on 8xx and 4xx and we presently assume that - * they don't do SMP. If they do then this will have to check - * whether the MM we steal is in use. - * We also assume that this is only used on systems that don't - * use an MMU hash table - this is true for 8xx and 4xx. - * This isn't an LRU system, it just frees up each context in - * turn (sort-of pseudo-random replacement :). This would be the - * place to implement an LRU scheme if anyone was motivated to do it. - * -- paulus - */ -void -steal_context(void) -{ - struct mm_struct *mm; - - /* free up context `next_mmu_context' */ - /* if we shouldn't free context 0, don't... */ - if (next_mmu_context < FIRST_CONTEXT) - next_mmu_context = FIRST_CONTEXT; - mm = context_mm[next_mmu_context]; - flush_tlb_mm(mm); - destroy_context(mm); -} -#endif /* FEW_CONTEXTS */ diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h deleted file mode 100644 index 5f813e386b87772d718a112498b2def995e7d7ac..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/mmu_decl.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Declarations of procedures and variables shared between files - * in arch/ppc/mm/. - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ -#include -#include - -extern void mapin_ram(void); -extern int map_page(unsigned long va, phys_addr_t pa, int flags); -extern void setbat(int index, unsigned long virt, unsigned long phys, - unsigned int size, int flags); -extern void reserve_phys_mem(unsigned long start, unsigned long size); -extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, - unsigned int size, int flags, unsigned int pid); -extern void invalidate_tlbcam_entry(int index); - -extern int __map_without_bats; -extern unsigned long ioremap_base; -extern unsigned long ioremap_bot; -extern unsigned int rtas_data, rtas_size; - -extern unsigned long total_memory; -extern unsigned long total_lowmem; -extern int mem_init_done; - -extern PTE *Hash, *Hash_end; -extern unsigned long Hash_size, Hash_mask; - -extern unsigned int num_tlbcam_entries; - -/* ...and now those things that may be slightly different between processor - * architectures. -- Dan - */ -#if defined(CONFIG_8xx) -#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */) -#define MMU_init_hw() do { } while(0) -#define mmu_mapin_ram() (0UL) - -#elif defined(CONFIG_4xx) -#define flush_HPTE(pid, va, pg) _tlbie(va, pid) -extern void MMU_init_hw(void); -extern unsigned long mmu_mapin_ram(void); - -#else -/* anything except 4xx or 8xx */ -extern void MMU_init_hw(void); -extern unsigned long mmu_mapin_ram(void); - -/* Be careful....this needs to be updated if we ever encounter 603 SMPs, - * which includes all new 82xx processors. We need tlbie/tlbsync here - * in that case (I think). -- Dan. - */ -static inline void flush_HPTE(unsigned context, unsigned long va, - unsigned long pdval) -{ - if ((Hash != 0) && - cpu_has_feature(CPU_FTR_HPTE_TABLE)) - flush_hash_pages(0, va, pdval, 1); - else - _tlbie(va); -} -#endif diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c deleted file mode 100644 index 03a79bff1271fee749e842d56ca21df176e2674d..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/pgtable.c +++ /dev/null @@ -1,403 +0,0 @@ -/* - * This file contains the routines setting up the linux page tables. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "mmu_decl.h" - -unsigned long ioremap_base; -unsigned long ioremap_bot; -int io_bat_index; - -#if defined(CONFIG_6xx) -#define HAVE_BATS 1 -#endif - -extern char etext[], _stext[]; - -#ifdef CONFIG_SMP -extern void hash_page_sync(void); -#endif - -#ifdef HAVE_BATS -extern unsigned long v_mapped_by_bats(unsigned long va); -extern unsigned long p_mapped_by_bats(unsigned long pa); -void setbat(int index, unsigned long virt, unsigned long phys, - unsigned int size, int flags); - -#else /* !HAVE_BATS */ -#define v_mapped_by_bats(x) (0UL) -#define p_mapped_by_bats(x) (0UL) -#endif /* HAVE_BATS */ - -#ifdef CONFIG_PTE_64BIT -/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */ -#define PGDIR_ORDER 1 -#else -#define PGDIR_ORDER 0 -#endif - -pgd_t *pgd_alloc(struct mm_struct *mm) -{ - pgd_t *ret; - - ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGDIR_ORDER); - return ret; -} - -void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - free_pages((unsigned long)pgd, PGDIR_ORDER); -} - -__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address) -{ - pte_t *pte; - extern int mem_init_done; - extern void *early_get_page(void); - - if (mem_init_done) { - pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); - } else { - pte = (pte_t *)early_get_page(); - if (pte) - clear_page(pte); - } - return pte; -} - -pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address) -{ - struct page *ptepage; - -#ifdef CONFIG_HIGHPTE - gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT; -#else - gfp_t flags = GFP_KERNEL | __GFP_REPEAT; -#endif - - ptepage = alloc_pages(flags, 0); - if (ptepage) { - clear_highpage(ptepage); - pgtable_page_ctor(ptepage); - } - return ptepage; -} - -void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ -#ifdef CONFIG_SMP - hash_page_sync(); -#endif - free_page((unsigned long)pte); -} - -void pte_free(struct mm_struct *mm, pgtable_t ptepage) -{ -#ifdef CONFIG_SMP - hash_page_sync(); -#endif - pgtable_page_dtor(ptepage); - __free_page(ptepage); -} - -#ifndef CONFIG_PHYS_64BIT -void __iomem * -ioremap(phys_addr_t addr, unsigned long size) -{ - return __ioremap(addr, size, _PAGE_NO_CACHE); -} -#else /* CONFIG_PHYS_64BIT */ -void __iomem * -ioremap64(unsigned long long addr, unsigned long size) -{ - return __ioremap(addr, size, _PAGE_NO_CACHE); -} - -void __iomem * -ioremap(phys_addr_t addr, unsigned long size) -{ - phys_addr_t addr64 = fixup_bigphys_addr(addr, size); - - return ioremap64(addr64, size); -} -#endif /* CONFIG_PHYS_64BIT */ - -void __iomem * -__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags) -{ - unsigned long v, i; - phys_addr_t p; - int err; - - /* - * Choose an address to map it to. - * Once the vmalloc system is running, we use it. - * Before then, we use space going down from ioremap_base - * (ioremap_bot records where we're up to). - */ - p = addr & PAGE_MASK; - size = PAGE_ALIGN(addr + size) - p; - - /* - * If the address lies within the first 16 MB, assume it's in ISA - * memory space - */ - if (p < 16*1024*1024) - p += _ISA_MEM_BASE; - - /* - * Don't allow anybody to remap normal RAM that we're using. - * mem_init() sets high_memory so only do the check after that. - */ - if ( mem_init_done && (p < virt_to_phys(high_memory)) ) - { - printk("__ioremap(): phys addr "PHYS_FMT" is RAM lr %p\n", p, - __builtin_return_address(0)); - return NULL; - } - - if (size == 0) - return NULL; - - /* - * Is it already mapped? Perhaps overlapped by a previous - * BAT mapping. If the whole area is mapped then we're done, - * otherwise remap it since we want to keep the virt addrs for - * each request contiguous. - * - * We make the assumption here that if the bottom and top - * of the range we want are mapped then it's mapped to the - * same virt address (and this is contiguous). - * -- Cort - */ - if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ ) - goto out; - - if (mem_init_done) { - struct vm_struct *area; - area = get_vm_area(size, VM_IOREMAP); - if (area == 0) - return NULL; - v = (unsigned long) area->addr; - } else { - v = (ioremap_bot -= size); - } - - if ((flags & _PAGE_PRESENT) == 0) - flags |= _PAGE_KERNEL; - if (flags & _PAGE_NO_CACHE) - flags |= _PAGE_GUARDED; - - /* - * Should check if it is a candidate for a BAT mapping - */ - - err = 0; - for (i = 0; i < size && err == 0; i += PAGE_SIZE) - err = map_page(v+i, p+i, flags); - if (err) { - if (mem_init_done) - vunmap((void *)v); - return NULL; - } - -out: - return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK)); -} - -void iounmap(volatile void __iomem *addr) -{ - /* - * If mapped by BATs then there is nothing to do. - * Calling vfree() generates a benign warning. - */ - if (v_mapped_by_bats((unsigned long)addr)) return; - - if (addr > high_memory && (unsigned long) addr < ioremap_bot) - vunmap((void *) (PAGE_MASK & (unsigned long)addr)); -} - -void __iomem *ioport_map(unsigned long port, unsigned int len) -{ - return (void __iomem *) (port + _IO_BASE); -} - -void ioport_unmap(void __iomem *addr) -{ - /* Nothing to do */ -} -EXPORT_SYMBOL(ioport_map); -EXPORT_SYMBOL(ioport_unmap); - -int -map_page(unsigned long va, phys_addr_t pa, int flags) -{ - pmd_t *pd; - pte_t *pg; - int err = -ENOMEM; - - /* Use upper 10 bits of VA to index the first level map */ - pd = pmd_offset(pgd_offset_k(va), va); - /* Use middle 10 bits of VA to index the second-level map */ - pg = pte_alloc_kernel(pd, va); - if (pg != 0) { - err = 0; - set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, __pgprot(flags))); - if (mem_init_done) - flush_HPTE(0, va, pmd_val(*pd)); - } - return err; -} - -/* - * Map in all of physical memory starting at KERNELBASE. - */ -void __init mapin_ram(void) -{ - unsigned long v, p, s, f; - - s = mmu_mapin_ram(); - v = KERNELBASE + s; - p = PPC_MEMSTART + s; - for (; s < total_lowmem; s += PAGE_SIZE) { - if ((char *) v >= _stext && (char *) v < etext) - f = _PAGE_RAM_TEXT; - else - f = _PAGE_RAM; - map_page(v, p, f); - v += PAGE_SIZE; - p += PAGE_SIZE; - } -} - -/* is x a power of 4? */ -#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1) - -/* - * Set up a mapping for a block of I/O. - * virt, phys, size must all be page-aligned. - * This should only be called before ioremap is called. - */ -void __init io_block_mapping(unsigned long virt, phys_addr_t phys, - unsigned int size, int flags) -{ - int i; - - if (virt > KERNELBASE && virt < ioremap_bot) - ioremap_bot = ioremap_base = virt; - -#ifdef HAVE_BATS - /* - * Use a BAT for this if possible... - */ - if (io_bat_index < 2 && is_power_of_2(size) - && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) { - setbat(io_bat_index, virt, phys, size, flags); - ++io_bat_index; - return; - } -#endif /* HAVE_BATS */ - - /* No BATs available, put it in the page tables. */ - for (i = 0; i < size; i += PAGE_SIZE) - map_page(virt + i, phys + i, flags); -} - -/* Scan the real Linux page tables and return a PTE pointer for - * a virtual address in a context. - * Returns true (1) if PTE was found, zero otherwise. The pointer to - * the PTE pointer is unmodified if PTE is not found. - */ -int -get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp) -{ - pgd_t *pgd; - pmd_t *pmd; - pte_t *pte; - int retval = 0; - - pgd = pgd_offset(mm, addr & PAGE_MASK); - if (pgd) { - pmd = pmd_offset(pgd, addr & PAGE_MASK); - if (pmd_present(*pmd)) { - pte = pte_offset_map(pmd, addr & PAGE_MASK); - if (pte) { - retval = 1; - *ptep = pte; - if (pmdp) - *pmdp = pmd; - /* XXX caller needs to do pte_unmap, yuck */ - } - } - } - return(retval); -} - -/* Find physical address for this virtual address. Normally used by - * I/O functions, but anyone can call it. - */ -unsigned long iopa(unsigned long addr) -{ - unsigned long pa; - - /* I don't know why this won't work on PMacs or CHRP. It - * appears there is some bug, or there is some implicit - * mapping done not properly represented by BATs or in page - * tables.......I am actively working on resolving this, but - * can't hold up other stuff. -- Dan - */ - pte_t *pte; - struct mm_struct *mm; - - /* Check the BATs */ - pa = v_mapped_by_bats(addr); - if (pa) - return pa; - - /* Allow mapping of user addresses (within the thread) - * for DMA if necessary. - */ - if (addr < TASK_SIZE) - mm = current->mm; - else - mm = &init_mm; - - pa = 0; - if (get_pteptr(mm, addr, &pte, NULL)) { - pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK); - pte_unmap(pte); - } - - return(pa); -} - diff --git a/arch/ppc/mm/ppc_mmu.c b/arch/ppc/mm/ppc_mmu.c deleted file mode 100644 index 0c1dc155996ac0e37d15914099630578ec249ed7..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/ppc_mmu.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * This file contains the routines for handling the MMU on those - * PowerPC implementations where the MMU substantially follows the - * architecture specification. This includes the 6xx, 7xx, 7xxx, - * and 8260 implementations but excludes the 8xx and 4xx. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include "mmu_decl.h" -#include "mem_pieces.h" - -PTE *Hash, *Hash_end; -unsigned long Hash_size, Hash_mask; -unsigned long _SDR1; - -union ubat { /* BAT register values to be loaded */ - BAT bat; - u32 word[2]; -} BATS[4][2]; /* 4 pairs of IBAT, DBAT */ - -struct batrange { /* stores address ranges mapped by BATs */ - unsigned long start; - unsigned long limit; - unsigned long phys; -} bat_addrs[4]; - -/* - * Return PA for this VA if it is mapped by a BAT, or 0 - */ -unsigned long v_mapped_by_bats(unsigned long va) -{ - int b; - for (b = 0; b < 4; ++b) - if (va >= bat_addrs[b].start && va < bat_addrs[b].limit) - return bat_addrs[b].phys + (va - bat_addrs[b].start); - return 0; -} - -/* - * Return VA for a given PA or 0 if not mapped - */ -unsigned long p_mapped_by_bats(unsigned long pa) -{ - int b; - for (b = 0; b < 4; ++b) - if (pa >= bat_addrs[b].phys - && pa < (bat_addrs[b].limit-bat_addrs[b].start) - +bat_addrs[b].phys) - return bat_addrs[b].start+(pa-bat_addrs[b].phys); - return 0; -} - -unsigned long __init mmu_mapin_ram(void) -{ - unsigned long tot, bl, done; - unsigned long max_size = (256<<20); - unsigned long align; - - if (__map_without_bats) - return 0; - - /* Set up BAT2 and if necessary BAT3 to cover RAM. */ - - /* Make sure we don't map a block larger than the - smallest alignment of the physical address. */ - /* alignment of PPC_MEMSTART */ - align = ~(PPC_MEMSTART-1) & PPC_MEMSTART; - /* set BAT block size to MIN(max_size, align) */ - if (align && align < max_size) - max_size = align; - - tot = total_lowmem; - for (bl = 128<<10; bl < max_size; bl <<= 1) { - if (bl * 2 > tot) - break; - } - - setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM); - done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1; - if ((done < tot) && !bat_addrs[3].limit) { - /* use BAT3 to cover a bit more */ - tot -= done; - for (bl = 128<<10; bl < max_size; bl <<= 1) - if (bl * 2 > tot) - break; - setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM); - done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1; - } - - return done; -} - -/* - * Set up one of the I/D BAT (block address translation) register pairs. - * The parameters are not checked; in particular size must be a power - * of 2 between 128k and 256M. - */ -void __init setbat(int index, unsigned long virt, unsigned long phys, - unsigned int size, int flags) -{ - unsigned int bl; - int wimgxpp; - union ubat *bat = BATS[index]; - - if (((flags & _PAGE_NO_CACHE) == 0) && - cpu_has_feature(CPU_FTR_NEED_COHERENT)) - flags |= _PAGE_COHERENT; - - bl = (size >> 17) - 1; - if (PVR_VER(mfspr(SPRN_PVR)) != 1) { - /* 603, 604, etc. */ - /* Do DBAT first */ - wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE - | _PAGE_COHERENT | _PAGE_GUARDED); - wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; - bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ - bat[1].word[1] = phys | wimgxpp; -#ifndef CONFIG_KGDB /* want user access for breakpoints */ - if (flags & _PAGE_USER) -#endif - bat[1].bat.batu.vp = 1; - if (flags & _PAGE_GUARDED) { - /* G bit must be zero in IBATs */ - bat[0].word[0] = bat[0].word[1] = 0; - } else { - /* make IBAT same as DBAT */ - bat[0] = bat[1]; - } - } else { - /* 601 cpu */ - if (bl > BL_8M) - bl = BL_8M; - wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE - | _PAGE_COHERENT); - wimgxpp |= (flags & _PAGE_RW)? - ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX; - bat->word[0] = virt | wimgxpp | 4; /* Ks=0, Ku=1 */ - bat->word[1] = phys | bl | 0x40; /* V=1 */ - } - - bat_addrs[index].start = virt; - bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1; - bat_addrs[index].phys = phys; -} - -/* - * Initialize the hash table and patch the instructions in hashtable.S. - */ -void __init MMU_init_hw(void) -{ - unsigned int hmask, mb, mb2; - unsigned int n_hpteg, lg_n_hpteg; - - extern unsigned int hash_page_patch_A[]; - extern unsigned int hash_page_patch_B[], hash_page_patch_C[]; - extern unsigned int hash_page[]; - extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[]; - - if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) { - /* - * Put a blr (procedure return) instruction at the - * start of hash_page, since we can still get DSI - * exceptions on a 603. - */ - hash_page[0] = 0x4e800020; - flush_icache_range((unsigned long) &hash_page[0], - (unsigned long) &hash_page[1]); - return; - } - - if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105); - -#define LG_HPTEG_SIZE 6 /* 64 bytes per HPTEG */ -#define SDR1_LOW_BITS ((n_hpteg - 1) >> 10) -#define MIN_N_HPTEG 1024 /* min 64kB hash table */ - - /* - * Allow 1 HPTE (1/8 HPTEG) for each page of memory. - * This is less than the recommended amount, but then - * Linux ain't AIX. - */ - n_hpteg = total_memory / (PAGE_SIZE * 8); - if (n_hpteg < MIN_N_HPTEG) - n_hpteg = MIN_N_HPTEG; - lg_n_hpteg = __ilog2(n_hpteg); - if (n_hpteg & (n_hpteg - 1)) { - ++lg_n_hpteg; /* round up if not power of 2 */ - n_hpteg = 1 << lg_n_hpteg; - } - Hash_size = n_hpteg << LG_HPTEG_SIZE; - - /* - * Find some memory for the hash table. - */ - if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322); - Hash = mem_pieces_find(Hash_size, Hash_size); - cacheable_memzero(Hash, Hash_size); - _SDR1 = __pa(Hash) | SDR1_LOW_BITS; - - Hash_end = (PTE *) ((unsigned long)Hash + Hash_size); - - printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n", - total_memory >> 20, Hash_size >> 10, Hash); - - - /* - * Patch up the instructions in hashtable.S:create_hpte - */ - if ( ppc_md.progress ) ppc_md.progress("hash:patch", 0x345); - Hash_mask = n_hpteg - 1; - hmask = Hash_mask >> (16 - LG_HPTEG_SIZE); - mb2 = mb = 32 - LG_HPTEG_SIZE - lg_n_hpteg; - if (lg_n_hpteg > 16) - mb2 = 16 - LG_HPTEG_SIZE; - - hash_page_patch_A[0] = (hash_page_patch_A[0] & ~0xffff) - | ((unsigned int)(Hash) >> 16); - hash_page_patch_A[1] = (hash_page_patch_A[1] & ~0x7c0) | (mb << 6); - hash_page_patch_A[2] = (hash_page_patch_A[2] & ~0x7c0) | (mb2 << 6); - hash_page_patch_B[0] = (hash_page_patch_B[0] & ~0xffff) | hmask; - hash_page_patch_C[0] = (hash_page_patch_C[0] & ~0xffff) | hmask; - - /* - * Ensure that the locations we've patched have been written - * out from the data cache and invalidated in the instruction - * cache, on those machines with split caches. - */ - flush_icache_range((unsigned long) &hash_page_patch_A[0], - (unsigned long) &hash_page_patch_C[1]); - - /* - * Patch up the instructions in hashtable.S:flush_hash_page - */ - flush_hash_patch_A[0] = (flush_hash_patch_A[0] & ~0xffff) - | ((unsigned int)(Hash) >> 16); - flush_hash_patch_A[1] = (flush_hash_patch_A[1] & ~0x7c0) | (mb << 6); - flush_hash_patch_A[2] = (flush_hash_patch_A[2] & ~0x7c0) | (mb2 << 6); - flush_hash_patch_B[0] = (flush_hash_patch_B[0] & ~0xffff) | hmask; - flush_icache_range((unsigned long) &flush_hash_patch_A[0], - (unsigned long) &flush_hash_patch_B[1]); - - if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205); -} diff --git a/arch/ppc/mm/tlb.c b/arch/ppc/mm/tlb.c deleted file mode 100644 index 4ff260bc9dd1d1dffb0ebb2f66cf1908f1656d49..0000000000000000000000000000000000000000 --- a/arch/ppc/mm/tlb.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * This file contains the routines for TLB flushing. - * On machines where the MMU uses a hash table to store virtual to - * physical translations, these routines flush entries from the - * hash table also. - * -- paulus - * - * Derived from arch/ppc/mm/init.c: - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) - * and Cort Dougan (PReP) (cort@cs.nmt.edu) - * Copyright (C) 1996 Paul Mackerras - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * Derived from "arch/i386/mm/init.c" - * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include - -#include "mmu_decl.h" - -/* - * Called when unmapping pages to flush entries from the TLB/hash table. - */ -void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr) -{ - unsigned long ptephys; - - if (Hash != 0) { - ptephys = __pa(ptep) & PAGE_MASK; - flush_hash_pages(mm->context.id, addr, ptephys, 1); - } -} - -/* - * Called by ptep_set_access_flags, must flush on CPUs for which the - * DSI handler can't just "fixup" the TLB on a write fault - */ -void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr) -{ - if (Hash != 0) - return; - _tlbie(addr); -} - -/* - * Called at the end of a mmu_gather operation to make sure the - * TLB flush is completely done. - */ -void tlb_flush(struct mmu_gather *tlb) -{ - if (Hash == 0) { - /* - * 603 needs to flush the whole TLB here since - * it doesn't use a hash table. - */ - _tlbia(); - } -} - -/* - * TLB flushing: - * - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes kernel pages - * - * since the hardware hash table functions as an extension of the - * tlb as far as the linux tables are concerned, flush it too. - * -- Cort - */ - -/* - * 750 SMP is a Bad Idea because the 750 doesn't broadcast all - * the cache operations on the bus. Hence we need to use an IPI - * to get the other CPU(s) to invalidate their TLBs. - */ -#ifdef CONFIG_SMP_750 -#define FINISH_FLUSH smp_send_tlb_invalidate(0) -#else -#define FINISH_FLUSH do { } while (0) -#endif - -static void flush_range(struct mm_struct *mm, unsigned long start, - unsigned long end) -{ - pmd_t *pmd; - unsigned long pmd_end; - int count; - unsigned int ctx = mm->context.id; - - if (Hash == 0) { - _tlbia(); - return; - } - start &= PAGE_MASK; - if (start >= end) - return; - end = (end - 1) | ~PAGE_MASK; - pmd = pmd_offset(pgd_offset(mm, start), start); - for (;;) { - pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1; - if (pmd_end > end) - pmd_end = end; - if (!pmd_none(*pmd)) { - count = ((pmd_end - start) >> PAGE_SHIFT) + 1; - flush_hash_pages(ctx, start, pmd_val(*pmd), count); - } - if (pmd_end == end) - break; - start = pmd_end + 1; - ++pmd; - } -} - -/* - * Flush kernel TLB entries in the given range - */ -void flush_tlb_kernel_range(unsigned long start, unsigned long end) -{ - flush_range(&init_mm, start, end); - FINISH_FLUSH; -} - -/* - * Flush all the (user) entries for the address space described by mm. - */ -void flush_tlb_mm(struct mm_struct *mm) -{ - struct vm_area_struct *mp; - - if (Hash == 0) { - _tlbia(); - return; - } - - for (mp = mm->mmap; mp != NULL; mp = mp->vm_next) - flush_range(mp->vm_mm, mp->vm_start, mp->vm_end); - FINISH_FLUSH; -} - -void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) -{ - struct mm_struct *mm; - pmd_t *pmd; - - if (Hash == 0) { - _tlbie(vmaddr); - return; - } - mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm; - pmd = pmd_offset(pgd_offset(mm, vmaddr), vmaddr); - if (!pmd_none(*pmd)) - flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1); - FINISH_FLUSH; -} - -/* - * For each address in the range, find the pte for the address - * and check _PAGE_HASHPTE bit; if it is set, find and destroy - * the corresponding HPTE. - */ -void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end) -{ - flush_range(vma->vm_mm, start, end); - FINISH_FLUSH; -} diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig deleted file mode 100644 index 76551b6790300b8879ee0dfa0afeff71cadc8d1f..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/Kconfig +++ /dev/null @@ -1,285 +0,0 @@ -config 4xx - bool - depends on 40x || 44x - default y - -config WANT_EARLY_SERIAL - bool - select SERIAL_8250 - default n - -menu "IBM 4xx options" - depends on 4xx - -choice - prompt "Machine Type" - depends on 40x - default WALNUT - -config BUBINGA - bool "Bubinga" - select WANT_EARLY_SERIAL - help - This option enables support for the IBM 405EP evaluation board. - -config CPCI405 - bool "CPCI405" - help - This option enables support for the CPCI405 board. - -config EP405 - bool "EP405/EP405PC" - select EMBEDDEDBOOT - help - This option enables support for the EP405/EP405PC boards. - -config REDWOOD_5 - bool "Redwood-5" - help - This option enables support for the IBM STB04 evaluation board. - -config REDWOOD_6 - bool "Redwood-6" - help - This option enables support for the IBM STBx25xx evaluation board. - -config SYCAMORE - bool "Sycamore" - help - This option enables support for the IBM PPC405GPr evaluation board. - -config WALNUT - bool "Walnut" - help - This option enables support for the IBM PPC405GP evaluation board. - -config XILINX_ML300 - bool "Xilinx-ML300" - select XILINX_VIRTEX_II_PRO - select EMBEDDEDBOOT - help - This option enables support for the Xilinx ML300 evaluation board. - -config XILINX_ML403 - bool "Xilinx-ML403" - select XILINX_VIRTEX_4_FX - select EMBEDDEDBOOT - help - This option enables support for the Xilinx ML403 evaluation board. -endchoice - -choice - prompt "Machine Type" - depends on 44x - default EBONY - -config BAMBOO - bool "Bamboo" - select WANT_EARLY_SERIAL - help - This option enables support for the IBM PPC440EP evaluation board. - -config EBONY - bool "Ebony" - select WANT_EARLY_SERIAL - help - This option enables support for the IBM PPC440GP evaluation board. - -config LUAN - bool "Luan" - select WANT_EARLY_SERIAL - help - This option enables support for the IBM PPC440SP evaluation board. - -config YUCCA - bool "Yucca" - select WANT_EARLY_SERIAL - help - This option enables support for the AMCC PPC440SPe evaluation board. - -config OCOTEA - bool "Ocotea" - select WANT_EARLY_SERIAL - help - This option enables support for the IBM PPC440GX evaluation board. - -config TAISHAN - bool "Taishan" - select WANT_EARLY_SERIAL - help - This option enables support for the AMCC PPC440GX evaluation board. - -endchoice - -config EP405PC - bool "EP405PC Support" - depends on EP405 - - -# It's often necessary to know the specific 4xx processor type. -# Fortunately, it is impled (so far) from the board type, so we -# don't need to ask more redundant questions. -config NP405H - bool - depends on ASH - default y - -config 440EP - bool - depends on BAMBOO - select PPC_FPU - default y - -config 440GP - bool - depends on EBONY - default y - -config 440GX - bool - depends on OCOTEA || TAISHAN - default y - -config 440SP - bool - depends on LUAN - default y - -config 440SPE - bool - depends on YUCCA - default y - -config 440 - bool - depends on 440GP || 440SP || 440SPE || 440EP - default y - -config 440A - bool - depends on 440GX - default y - -config IBM440EP_ERR42 - bool - depends on 440EP - default y - -# All 405-based cores up until the 405GPR and 405EP have this errata. -config IBM405_ERR77 - bool - depends on 40x && !403GCX && !405GPR && !405EP - default y - -# All 40x-based cores, up until the 405GPR and 405EP have this errata. -config IBM405_ERR51 - bool - depends on 40x && !405GPR && !405EP - default y - -config BOOKE - bool - depends on 44x - default y - -config IBM_OCP - bool - depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT - default y - -config IBM_EMAC4 - bool - depends on 440GX || 440SP || 440SPE - default y - -config BIOS_FIXUP - bool - depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405 - default y - -# OAK doesn't exist but wanted to keep this around for any future 403GCX boards -config 403GCX - bool - depends on OAK - default y - -config 405EP - bool - depends on BUBINGA - default y - -config 405GP - bool - depends on CPCI405 || EP405 || WALNUT - default y - -config 405GPR - bool - depends on SYCAMORE - default y - -config XILINX_VIRTEX_II_PRO - bool - select XILINX_VIRTEX - -config XILINX_VIRTEX_4_FX - bool - select XILINX_VIRTEX - -config XILINX_VIRTEX - bool - -config STB03xxx - bool - depends on REDWOOD_5 || REDWOOD_6 - default y - -config EMBEDDEDBOOT - bool - -config IBM_OPENBIOS - bool - depends on ASH || REDWOOD_5 || REDWOOD_6 - default y - -config PPC4xx_DMA - bool "PPC4xx DMA controller support" - depends on 4xx - -config PPC4xx_EDMA - bool - depends on !STB03xxx && PPC4xx_DMA - default y - -config PPC_GEN550 - bool - depends on 4xx - default y - -choice - prompt "TTYS0 device and default console" - depends on 40x - default UART0_TTYS0 - -config UART0_TTYS0 - bool "UART0" - -config UART0_TTYS1 - bool "UART1" - -endchoice - -config SERIAL_SICC - bool "SICC Serial port support" - depends on STB03xxx - -config UART1_DFLT_CONSOLE - bool - depends on SERIAL_SICC && UART0_TTYS1 - default y - -config SERIAL_SICC_CONSOLE - bool - depends on SERIAL_SICC && UART0_TTYS1 - default y -endmenu diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile deleted file mode 100644 index 723ad7985cc65e1109192601aea7082742c0acd8..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/Makefile +++ /dev/null @@ -1,31 +0,0 @@ -# -# Makefile for the PowerPC 4xx linux kernel. - -obj-$(CONFIG_BAMBOO) += bamboo.o -obj-$(CONFIG_CPCI405) += cpci405.o -obj-$(CONFIG_EBONY) += ebony.o -obj-$(CONFIG_EP405) += ep405.o -obj-$(CONFIG_BUBINGA) += bubinga.o -obj-$(CONFIG_LUAN) += luan.o -obj-$(CONFIG_YUCCA) += yucca.o -obj-$(CONFIG_OCOTEA) += ocotea.o -obj-$(CONFIG_REDWOOD_5) += redwood5.o -obj-$(CONFIG_REDWOOD_6) += redwood6.o -obj-$(CONFIG_SYCAMORE) += sycamore.o -obj-$(CONFIG_TAISHAN) += taishan.o -obj-$(CONFIG_WALNUT) += walnut.o -obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o -obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o - -obj-$(CONFIG_405GP) += ibm405gp.o -obj-$(CONFIG_REDWOOD_5) += ibmstb4.o -obj-$(CONFIG_NP405H) += ibmnp405h.o -obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o -obj-$(CONFIG_440EP) += ibm440ep.o -obj-$(CONFIG_440GP) += ibm440gp.o -obj-$(CONFIG_440GX) += ibm440gx.o -obj-$(CONFIG_440SP) += ibm440sp.o -obj-$(CONFIG_440SPE) += ppc440spe.o -obj-$(CONFIG_405EP) += ibm405ep.o -obj-$(CONFIG_405GPR) += ibm405gpr.o - diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c deleted file mode 100644 index 01f20f4c14fe34ecc96d7842151d4f3c01804a28..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/bamboo.c +++ /dev/null @@ -1,442 +0,0 @@ -/* - * Bamboo board specific routines - * - * Wade Farnsworth - * Copyright 2004 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -/* - * Bamboo external IRQ triggering/polarity settings - */ -unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ1: Expansion connector */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ4: PCI slot 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ5: PCI slot 3 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ6: SMI pushbutton */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ7: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */ -}; - -static void __init -bamboo_calibrate_decr(void) -{ - unsigned int freq; - - if (mfspr(SPRN_CCR1) & CCR1_TCS) - freq = BAMBOO_TMRCLK; - else - freq = clocks.cpu; - - ibm44x_calibrate_decr(freq); - -} - -static int -bamboo_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: PPC440EP EVB (Bamboo)\n"); - - return 0; -} - -static inline int -bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 28, 28, 28, 28 }, /* IDSEL 1 - PCI Slot 0 */ - { 27, 27, 27, 27 }, /* IDSEL 2 - PCI Slot 1 */ - { 26, 26, 26, 26 }, /* IDSEL 3 - PCI Slot 2 */ - { 25, 25, 25, 25 }, /* IDSEL 4 - PCI Slot 3 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __init bamboo_set_emacdata(void) -{ - u8 * base_addr; - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - u8 val; - int mode; - u32 excluded = 0; - - base_addr = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16); - val = readb(base_addr); - iounmap((void *) base_addr); - if (BAMBOO_SEL_MII(val)) - mode = PHY_MODE_MII; - else if (BAMBOO_SEL_RMII(val)) - mode = PHY_MODE_RMII; - else - mode = PHY_MODE_SMII; - - /* - * SW2 on the Bamboo is used for ethernet configuration and is accessed - * via the CONFIG2 register in the FPGA. If the ANEG pin is set, - * overwrite the supported features with the settings in SW2. - * - * This is used as a workaround for the improperly biased RJ-45 sockets - * on the Rev. 0 Bamboo. By default only 10baseT is functional. - * Removing inductors L17 and L18 from the board allows 100baseT, but - * disables 10baseT. The Rev. 1 has no such limitations. - */ - - base_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 8); - val = readb(base_addr); - iounmap((void *) base_addr); - if (!BAMBOO_AUTONEGOTIATE(val)) { - excluded |= SUPPORTED_Autoneg; - if (BAMBOO_FORCE_100Mbps(val)) { - excluded |= SUPPORTED_10baseT_Full; - excluded |= SUPPORTED_10baseT_Half; - if (BAMBOO_FULL_DUPLEX_EN(val)) - excluded |= SUPPORTED_100baseT_Half; - else - excluded |= SUPPORTED_100baseT_Full; - } else { - excluded |= SUPPORTED_100baseT_Full; - excluded |= SUPPORTED_100baseT_Half; - if (BAMBOO_FULL_DUPLEX_EN(val)) - excluded |= SUPPORTED_10baseT_Half; - else - excluded |= SUPPORTED_10baseT_Full; - } - } - - /* Set mac_addr, phy mode and unsupported phy features for each EMAC */ - - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); - emacdata = def->additions; - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); - emacdata->phy_mode = mode; - emacdata->phy_feat_exc = excluded; - - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1); - emacdata = def->additions; - memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); - emacdata->phy_mode = mode; - emacdata->phy_feat_exc = excluded; -} - -static int -bamboo_exclude_device(unsigned char bus, unsigned char devfn) -{ - return (bus == 0 && devfn == 0); -} - -#define PCI_READW(offset) \ - (readw((void *)((u32)pci_reg_base+offset))) - -#define PCI_WRITEW(value, offset) \ - (writew(value, (void *)((u32)pci_reg_base+offset))) - -#define PCI_WRITEL(value, offset) \ - (writel(value, (void *)((u32)pci_reg_base+offset))) - -static void __init -bamboo_setup_pci(void) -{ - void *pci_reg_base; - unsigned long memory_size; - memory_size = ppc_md.find_end_of_memory(); - - pci_reg_base = ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE); - - /* Enable PCI I/O, Mem, and Busmaster cycles */ - PCI_WRITEW(PCI_READW(PCI_COMMAND) | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER, PCI_COMMAND); - - /* Disable region first */ - PCI_WRITEL(0, BAMBOO_PCIL0_PMM0MA); - - /* PLB starting addr: 0x00000000A0000000 */ - PCI_WRITEL(BAMBOO_PCI_PHY_MEM_BASE, BAMBOO_PCIL0_PMM0LA); - - /* PCI start addr, 0xA0000000 (PCI Address) */ - PCI_WRITEL(BAMBOO_PCI_MEM_BASE, BAMBOO_PCIL0_PMM0PCILA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM0PCIHA); - - /* Enable no pre-fetch, enable region */ - PCI_WRITEL(((0xffffffff - - (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01), - BAMBOO_PCIL0_PMM0MA); - - /* Disable region one */ - PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM1LA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCILA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCIHA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA); - - /* Disable region two */ - PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM2LA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCILA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCIHA); - PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA); - - /* Now configure the PCI->PLB windows, we only use PTM1 - * - * For Inbound flow, set the window size to all available memory - * This is required because if size is smaller, - * then Eth/PCI DD would fail as PCI card not able to access - * the memory allocated by DD. - */ - - PCI_WRITEL(0, BAMBOO_PCIL0_PTM1MS); /* disabled region 1 */ - PCI_WRITEL(0, BAMBOO_PCIL0_PTM1LA); /* begin of address map */ - - memory_size = 1 << fls(memory_size - 1); - - /* Size low + Enabled */ - PCI_WRITEL((0xffffffff - (memory_size - 1)) | 0x1, BAMBOO_PCIL0_PTM1MS); - - eieio(); - iounmap(pci_reg_base); -} - -static void __init -bamboo_setup_hose(void) -{ - unsigned int bar_response, bar; - struct pci_controller *hose; - - bamboo_setup_pci(); - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - hose->pci_mem_offset = BAMBOO_PCI_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - BAMBOO_PCI_LOWER_IO, - BAMBOO_PCI_UPPER_IO, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - BAMBOO_PCI_LOWER_MEM, - BAMBOO_PCI_UPPER_MEM, - IORESOURCE_MEM, - "PCI host bridge"); - - ppc_md.pci_exclude_device = bamboo_exclude_device; - - hose->io_space.start = BAMBOO_PCI_LOWER_IO; - hose->io_space.end = BAMBOO_PCI_UPPER_IO; - hose->mem_space.start = BAMBOO_PCI_LOWER_MEM; - hose->mem_space.end = BAMBOO_PCI_UPPER_MEM; - isa_io_base = - (unsigned long)ioremap64(BAMBOO_PCI_IO_BASE, BAMBOO_PCI_IO_SIZE); - hose->io_base_virt = (void *)isa_io_base; - - setup_indirect_pci(hose, - BAMBOO_PCI_CFGA_PLB32, - BAMBOO_PCI_CFGD_PLB32); - hose->set_cfg_type = 1; - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - } - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = bamboo_map_irq; -} - -TODC_ALLOC(); - -static void __init -bamboo_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440EP_UART0_ADDR, 8); - port.irq = 0; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(0, &port); -#endif - - port.membase = ioremap64(PPC440EP_UART1_ADDR, 8); - port.irq = 1; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(1, &port); -#endif - - port.membase = ioremap64(PPC440EP_UART2_ADDR, 8); - port.irq = 3; - port.uartclk = clocks.uart2; - port.line = 2; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 2 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(2, &port); -#endif - - port.membase = ioremap64(PPC440EP_UART3_ADDR, 8); - port.irq = 4; - port.uartclk = clocks.uart3; - port.line = 3; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 3 failed\n"); - } -} - -static void __init -bamboo_setup_arch(void) -{ - - bamboo_set_emacdata(); - - ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* Setup TODC access */ - TODC_INIT(TODC_TYPE_DS1743, - 0, - 0, - ioremap64(BAMBOO_RTC_ADDR, BAMBOO_RTC_SIZE), - 8); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCI host bridge */ - bamboo_setup_hose(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - bamboo_early_serial_map(); - - /* Identify the system */ - printk("IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\n"); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm44x_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = bamboo_setup_arch; - ppc_md.show_cpuinfo = bamboo_show_cpuinfo; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = bamboo_calibrate_decr; - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = bamboo_early_serial_map; -#endif -} - diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h deleted file mode 100644 index dcd3d09a0a7159f2a0e45d401980d6b2668d41f2..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/bamboo.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - * Bamboo board definitions - * - * Wade Farnsworth - * - * Copyright 2004 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_BAMBOO_H__ -#define __ASM_BAMBOO_H__ - -#include - -/* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0x0EF600E00 - -/* Location of MAC addresses in PIBS image */ -#define PIBS_FLASH_BASE 0xfff00000 -#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xc0400) -#define PIBS_MAC_SIZE 0x200 -#define PIBS_MAC_OFFSET 0x100 - -/* Default clock rate */ -#define BAMBOO_TMRCLK 25000000 - -/* RTC/NVRAM location */ -#define BAMBOO_RTC_ADDR 0x080000000ULL -#define BAMBOO_RTC_SIZE 0x2000 - -/* FPGA Registers */ -#define BAMBOO_FPGA_ADDR 0x080002000ULL - -#define BAMBOO_FPGA_CONFIG2_REG_ADDR (BAMBOO_FPGA_ADDR + 0x1) -#define BAMBOO_FULL_DUPLEX_EN(x) (x & 0x08) -#define BAMBOO_FORCE_100Mbps(x) (x & 0x04) -#define BAMBOO_AUTONEGOTIATE(x) (x & 0x02) - -#define BAMBOO_FPGA_SETTING_REG_ADDR (BAMBOO_FPGA_ADDR + 0x3) -#define BAMBOO_BOOT_SMALL_FLASH(x) (!(x & 0x80)) -#define BAMBOO_LARGE_FLASH_EN(x) (!(x & 0x40)) -#define BAMBOO_BOOT_NAND_FLASH(x) (!(x & 0x20)) - -#define BAMBOO_FPGA_SELECTION1_REG_ADDR (BAMBOO_FPGA_ADDR + 0x4) -#define BAMBOO_SEL_MII(x) (x & 0x80) -#define BAMBOO_SEL_RMII(x) (x & 0x40) -#define BAMBOO_SEL_SMII(x) (x & 0x20) - -/* Flash */ -#define BAMBOO_SMALL_FLASH_LOW 0x087f00000ULL -#define BAMBOO_SMALL_FLASH_HIGH 0x0fff00000ULL -#define BAMBOO_SMALL_FLASH_SIZE 0x100000 -#define BAMBOO_LARGE_FLASH_LOW 0x087800000ULL -#define BAMBOO_LARGE_FLASH_HIGH1 0x0ff800000ULL -#define BAMBOO_LARGE_FLASH_HIGH2 0x0ffc00000ULL -#define BAMBOO_LARGE_FLASH_SIZE 0x400000 -#define BAMBOO_SRAM_LOW 0x087f00000ULL -#define BAMBOO_SRAM_HIGH1 0x0fff00000ULL -#define BAMBOO_SRAM_HIGH2 0x0ff800000ULL -#define BAMBOO_SRAM_SIZE 0x100000 -#define BAMBOO_NAND_FLASH_REG_ADDR 0x090000000ULL -#define BAMBOO_NAND_FLASH_REG_SIZE 0x2000 - -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 4 - -#define UART0_IO_BASE 0xEF600300 -#define UART1_IO_BASE 0xEF600400 -#define UART2_IO_BASE 0xEF600500 -#define UART3_IO_BASE 0xEF600600 - -#define BASE_BAUD 33177600/3/16 -#define UART0_INT 0 -#define UART1_INT 1 -#define UART2_INT 3 -#define UART3_INT 4 - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) \ - STD_UART_OP(2) \ - STD_UART_OP(3) - -/* PCI support */ -#define BAMBOO_PCI_CFGA_PLB32 0xeec00000 -#define BAMBOO_PCI_CFGD_PLB32 0xeec00004 - -#define BAMBOO_PCI_IO_BASE 0x00000000e8000000ULL -#define BAMBOO_PCI_IO_SIZE 0x00010000 -#define BAMBOO_PCI_MEM_OFFSET 0x00000000 -#define BAMBOO_PCI_PHY_MEM_BASE 0x00000000a0000000ULL - -#define BAMBOO_PCI_LOWER_IO 0x00000000 -#define BAMBOO_PCI_UPPER_IO 0x0000ffff -#define BAMBOO_PCI_LOWER_MEM 0xa0000000 -#define BAMBOO_PCI_UPPER_MEM 0xafffffff -#define BAMBOO_PCI_MEM_BASE 0xa0000000 - -#define BAMBOO_PCIL0_BASE 0x00000000ef400000ULL -#define BAMBOO_PCIL0_SIZE 0x40 - -#define BAMBOO_PCIL0_PMM0LA 0x000 -#define BAMBOO_PCIL0_PMM0MA 0x004 -#define BAMBOO_PCIL0_PMM0PCILA 0x008 -#define BAMBOO_PCIL0_PMM0PCIHA 0x00C -#define BAMBOO_PCIL0_PMM1LA 0x010 -#define BAMBOO_PCIL0_PMM1MA 0x014 -#define BAMBOO_PCIL0_PMM1PCILA 0x018 -#define BAMBOO_PCIL0_PMM1PCIHA 0x01C -#define BAMBOO_PCIL0_PMM2LA 0x020 -#define BAMBOO_PCIL0_PMM2MA 0x024 -#define BAMBOO_PCIL0_PMM2PCILA 0x028 -#define BAMBOO_PCIL0_PMM2PCIHA 0x02C -#define BAMBOO_PCIL0_PTM1MS 0x030 -#define BAMBOO_PCIL0_PTM1LA 0x034 -#define BAMBOO_PCIL0_PTM2MS 0x038 -#define BAMBOO_PCIL0_PTM2LA 0x03C - -#endif /* __ASM_BAMBOO_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c deleted file mode 100644 index cd696be55aca11ce0c0b5560519bdea52966b7b6..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/bubinga.c +++ /dev/null @@ -1,265 +0,0 @@ -/* - * Support for IBM PPC 405EP evaluation board (Bubinga). - * - * Author: SAW (IBM), derived from walnut.c. - * Maintained by MontaVista Software - * - * 2003 (c) MontaVista Softare Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -extern bd_t __res; - -void *bubinga_rtc_base; - -/* Some IRQs unique to the board - * Used by the generic 405 PCI setup functions in ppc4xx_pci.c - */ -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ - {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ - {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ - {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -/* The serial clock for the chip is an internal clock determined by - * different clock speeds/dividers. - * Calculate the proper input baud rate and setup the serial driver. - */ -static void __init -bubinga_early_serial_map(void) -{ - u32 uart_div; - int uart_clock; - struct uart_port port; - - /* Calculate the serial clock input frequency - * - * The base baud is the PLL OUTA (provided in the board info - * structure) divided by the external UART Divisor, divided - * by 16. - */ - uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV); - uart_clock = __res.bi_procfreq / uart_div; - - /* Setup serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = (void*)ACTING_UART0_IO_BASE; - port.irq = ACTING_UART0_INT; - port.uartclk = uart_clock; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - - port.membase = (void*)ACTING_UART1_IO_BASE; - port.irq = ACTING_UART1_INT; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ -#ifdef CONFIG_PCI - - unsigned int bar_response, bar; - /* - * Expected PCI mapping: - * - * PLB addr PCI memory addr - * --------------------- --------------------- - * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff - * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff - * - * PLB addr PCI io addr - * --------------------- --------------------- - * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 - * - * The following code is simplified by assuming that the bootrom - * has been well behaved in following this mapping. - */ - -#ifdef DEBUG - int i; - - printk("ioremap PCLIO_BASE = 0x%x\n", pcip); - printk("PCI bridge regs before fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif - - /* added for IBM boot rom version 1.15 bios bar changes -AK */ - - /* Disable region first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Disable region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->ptm1ms), 0x00000001); - - /* Disable region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - out_le32((void *) &(pcip->ptm2la), 0x00000000); - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - /* end workaround */ - -#ifdef DEBUG - printk("PCI bridge regs after fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif -#endif -} - -void __init -bubinga_setup_arch(void) -{ - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 1); - - bubinga_early_serial_map(); - - /* RTC step for the evb405ep */ - bubinga_rtc_base = (void *) BUBINGA_RTC_VADDR; - TODC_INIT(TODC_TYPE_DS1743, bubinga_rtc_base, bubinga_rtc_base, - bubinga_rtc_base, 8); - /* Identify the system */ - printk("IBM Bubinga port (MontaVista Software, Inc. )\n"); -} - -void __init -bubinga_map_io(void) -{ - ppc4xx_map_io(); - io_block_mapping(BUBINGA_RTC_VADDR, - BUBINGA_RTC_PADDR, BUBINGA_RTC_SIZE, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = bubinga_setup_arch; - ppc_md.setup_io_mappings = bubinga_map_io; - -#ifdef CONFIG_GEN_RTC - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#endif -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = bubinga_early_serial_map; -#endif -} - diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h deleted file mode 100644 index 5c408060eb35cb97abfb178a6b596cb1216d5766..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/bubinga.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Bubinga board definitions - * - * Copyright (c) 2005 DENX Software Engineering - * Stefan Roese - * - * Based on original work by - * SAW (IBM) - * 2003 (c) MontaVista Softare Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __BUBINGA_H__ -#define __BUBINGA_H__ - -#include -#include - -/* Memory map for the Bubinga board. - * Generic 4xx plus RTC. - */ - -#define BUBINGA_RTC_PADDR ((uint)0xf0000000) -#define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR -#define BUBINGA_RTC_SIZE ((uint)8*1024) - -/* The UART clock is based off an internal clock - - * define BASE_BAUD based on the internal clock and divider(s). - * Since BASE_BAUD must be a constant, we will initialize it - * using clock/divider values which OpenBIOS initializes - * for typical configurations at various CPU speeds. - * The base baud is calculated as (FWDA / EXT UART DIV / 16) - */ -#define BASE_BAUD 0 - -/* Flash */ -#define PPC40x_FPGA_BASE 0xF0300000 -#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */ -#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) -#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) -#define PPC40x_FLASH_LOW 0xFFF00000 -#define PPC40x_FLASH_HIGH 0xFFF80000 -#define PPC40x_FLASH_SIZE 0x80000 - -#define PPC4xx_MACHINE_NAME "IBM Bubinga" - -#endif /* __BUBINGA_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/cpci405.c b/arch/ppc/platforms/4xx/cpci405.c deleted file mode 100644 index 2e7e25dd84cbc705b06e09d5533ab3139d5b908d..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/cpci405.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Board setup routines for the esd CPCI-405 cPCI Board. - * - * Copyright 2001-2006 esd electronic system design - hannover germany - * - * Authors: Matthias Fuchs - * matthias.fuchs@esd-electronics.com - * Stefan Roese - * stefan.roese@esd-electronics.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_GEN_RTC -void *cpci405_nvram; -#endif - -extern bd_t __res; - -/* - * Some IRQs unique to CPCI-405. - */ -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {28, 29, 30, 27}, /* IDSEL 15 - cPCI slot 8 */ - {29, 30, 27, 28}, /* IDSEL 16 - cPCI slot 7 */ - {30, 27, 28, 29}, /* IDSEL 17 - cPCI slot 6 */ - {27, 28, 29, 30}, /* IDSEL 18 - cPCI slot 5 */ - {28, 29, 30, 27}, /* IDSEL 19 - cPCI slot 4 */ - {29, 30, 27, 28}, /* IDSEL 20 - cPCI slot 3 */ - {30, 27, 28, 29}, /* IDSEL 21 - cPCI slot 2 */ - }; - const long min_idsel = 15, max_idsel = 21, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -/* The serial clock for the chip is an internal clock determined by - * different clock speeds/dividers. - * Calculate the proper input baud rate and setup the serial driver. - */ -static void __init -cpci405_early_serial_map(void) -{ - u32 uart_div; - int uart_clock; - struct uart_port port; - - /* Calculate the serial clock input frequency - * - * The uart clock is the cpu frequency (provided in the board info - * structure) divided by the external UART Divisor. - */ - uart_div = ((mfdcr(DCRN_CHCR_BASE) & CHR0_UDIV) >> 1) + 1; - uart_clock = __res.bi_procfreq / uart_div; - - /* Setup serial port access */ - memset(&port, 0, sizeof(port)); -#if defined(CONFIG_UART0_TTYS0) - port.membase = (void*)UART0_IO_BASE; - port.irq = UART0_INT; -#else - port.membase = (void*)UART1_IO_BASE; - port.irq = UART1_INT; -#endif - port.uartclk = uart_clock; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } -#if defined(CONFIG_UART0_TTYS0) - port.membase = (void*)UART1_IO_BASE; - port.irq = UART1_INT; -#else - port.membase = (void*)UART0_IO_BASE; - port.irq = UART0_INT; -#endif - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } -} - -void __init -cpci405_setup_arch(void) -{ - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 0); - - cpci405_early_serial_map(); - -#ifdef CONFIG_GEN_RTC - TODC_INIT(TODC_TYPE_MK48T35, - cpci405_nvram, cpci405_nvram, cpci405_nvram, 8); -#endif -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ -#ifdef CONFIG_PCI - unsigned int bar_response, bar; - - /* Disable region first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Disable region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->ptm1ms), 0x00000001); - - /* Disable region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - out_le32((void *) &(pcip->ptm2la), 0x00000000); - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - } -#endif -} - -void __init -cpci405_map_io(void) -{ - ppc4xx_map_io(); - -#ifdef CONFIG_GEN_RTC - cpci405_nvram = ioremap(CPCI405_NVRAM_PADDR, CPCI405_NVRAM_SIZE); -#endif -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = cpci405_setup_arch; - ppc_md.setup_io_mappings = cpci405_map_io; - -#ifdef CONFIG_GEN_RTC - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#endif -} diff --git a/arch/ppc/platforms/4xx/cpci405.h b/arch/ppc/platforms/4xx/cpci405.h deleted file mode 100644 index a6c0a138b0d7268e195785f396bc8d5b3f324336..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/cpci405.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * CPCI-405 board specific definitions - * - * Copyright 2001-2006 esd electronic system design - hannover germany - * - * Authors: Matthias Fuchs - * matthias.fuchs@esd-electronics.com - * Stefan Roese - * stefan.roese@esd-electronics.com - */ - -#ifdef __KERNEL__ -#ifndef __CPCI405_H__ -#define __CPCI405_H__ - -#include -#include - -/* Map for the NVRAM space */ -#define CPCI405_NVRAM_PADDR ((uint)0xf0200000) -#define CPCI405_NVRAM_SIZE ((uint)32*1024) - -#define BASE_BAUD 0 - -#define PPC4xx_MACHINE_NAME "esd CPCI-405" - -#endif /* __CPCI405_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c deleted file mode 100644 index 8027a36fc5bb50b7b58d601eee8cd8bd79a6c683..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ebony.c +++ /dev/null @@ -1,334 +0,0 @@ -/* - * Ebony board specific routines - * - * Matt Porter - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003-2005 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -/* - * Ebony external IRQ triggering/polarity settings - */ -unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: PCI slot 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ1: PCI slot 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ4: IRDA */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ5: SMI pushbutton */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ6: PHYs */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ7: AUX */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ10: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ11: EXT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ12: EXT */ -}; - -static void __init -ebony_calibrate_decr(void) -{ - unsigned int freq; - - /* - * Determine system clock speed - * - * If we are on Rev. B silicon, then use - * default external system clock. If we are - * on Rev. C silicon then errata forces us to - * use the internal clock. - */ - if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0) - freq = EBONY_440GP_RB_SYSCLK; - else - freq = EBONY_440GP_RC_SYSCLK; - - ibm44x_calibrate_decr(freq); -} - -static int -ebony_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: Ebony\n"); - - return 0; -} - -static inline int -ebony_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 23, 23, 23, 23 }, /* IDSEL 1 - PCI Slot 0 */ - { 24, 24, 24, 24 }, /* IDSEL 2 - PCI Slot 1 */ - { 25, 25, 25, 25 }, /* IDSEL 3 - PCI Slot 2 */ - { 26, 26, 26, 26 }, /* IDSEL 4 - PCI Slot 3 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -#define PCIX_WRITEL(value, offset) \ - (writel(value, pcix_reg_base + offset)) - -/* - * FIXME: This is only here to "make it work". This will move - * to a ibm_pcix.c which will contain a generic IBM PCIX bridge - * configuration library. -Matt - */ -static void __init -ebony_setup_pcix(void) -{ - void __iomem *pcix_reg_base; - - pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); - - /* Disable all windows */ - PCIX_WRITEL(0, PCIX0_POM0SA); - PCIX_WRITEL(0, PCIX0_POM1SA); - PCIX_WRITEL(0, PCIX0_POM2SA); - PCIX_WRITEL(0, PCIX0_PIM0SA); - PCIX_WRITEL(0, PCIX0_PIM1SA); - PCIX_WRITEL(0, PCIX0_PIM2SA); - - /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */ - PCIX_WRITEL(0x00000003, PCIX0_POM0LAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0LAL); - PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL); - PCIX_WRITEL(0x80000001, PCIX0_POM0SA); - - /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0x80000007, PCIX0_PIM0SA); - - eieio(); -} - -static void __init -ebony_setup_hose(void) -{ - struct pci_controller *hose; - - /* Configure windows on the PCI-X host bridge */ - ebony_setup_pcix(); - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - hose->pci_mem_offset = EBONY_PCI_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - EBONY_PCI_LOWER_IO, - EBONY_PCI_UPPER_IO, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - EBONY_PCI_LOWER_MEM, - EBONY_PCI_UPPER_MEM, - IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = EBONY_PCI_LOWER_IO; - hose->io_space.end = EBONY_PCI_UPPER_IO; - hose->mem_space.start = EBONY_PCI_LOWER_MEM; - hose->mem_space.end = EBONY_PCI_UPPER_MEM; - hose->io_base_virt = ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE); - isa_io_base = (unsigned long)hose->io_base_virt; - - setup_indirect_pci(hose, - EBONY_PCI_CFGA_PLB32, - EBONY_PCI_CFGD_PLB32); - hose->set_cfg_type = 1; - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = ebony_map_irq; -} - -TODC_ALLOC(); - -static void __init -ebony_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440GP_UART0_ADDR, 8); - port.irq = 0; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(0, &port); - - /* Purge TLB entry added in head_44x.S for early serial access */ - _tlbie(UART0_IO_BASE, 0); -#endif - - port.membase = ioremap64(PPC440GP_UART1_ADDR, 8); - port.irq = 1; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(1, &port); -#endif -} - -static void __init -ebony_setup_arch(void) -{ - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - - /* Set mac_addr for each EMAC */ - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); - emacdata = def->additions; - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_RMII; - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); - - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1); - emacdata = def->additions; - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_RMII; - memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - ibm440gp_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* Setup TODC access */ - TODC_INIT(TODC_TYPE_DS1743, - 0, - 0, - ioremap64(EBONY_RTC_ADDR, EBONY_RTC_SIZE), - 8); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCI host bridge */ - ebony_setup_hose(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - ebony_early_serial_map(); - - /* Identify the system */ - printk("IBM Ebony port (MontaVista Software, Inc. (source@mvista.com))\n"); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm44x_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ebony_setup_arch; - ppc_md.show_cpuinfo = ebony_show_cpuinfo; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = ebony_calibrate_decr; - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = ebony_early_serial_map; -#endif -} - diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h deleted file mode 100644 index f40e33d39d76045f95d5784def584147b6a00786..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ebony.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Ebony board definitions - * - * Matt Porter - * - * Copyright 2002 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_EBONY_H__ -#define __ASM_EBONY_H__ - -#include - -/* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0xE0000800 - -/* Where to find the MAC info */ -#define OPENBIOS_MAC_BASE 0xfffffe0c -#define OPENBIOS_MAC_OFFSET 0x0c - -/* Default clock rates for Rev. B and Rev. C silicon */ -#define EBONY_440GP_RB_SYSCLK 33000000 -#define EBONY_440GP_RC_SYSCLK 400000000 - -/* RTC/NVRAM location */ -#define EBONY_RTC_ADDR 0x0000000148000000ULL -#define EBONY_RTC_SIZE 0x2000 - -/* Flash */ -#define EBONY_FPGA_ADDR 0x0000000148300000ULL -#define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20) -#define EBONY_ONBRD_FLASH_EN(x) (x & 0x02) -#define EBONY_FLASH_SEL(x) (x & 0x01) -#define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000ULL -#define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000ULL -#define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL -#define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL -#define EBONY_SMALL_FLASH_SIZE 0x80000 -#define EBONY_LARGE_FLASH_LOW 0x00000001ff800000ULL -#define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000ULL -#define EBONY_LARGE_FLASH_SIZE 0x400000 - -#define EBONY_SMALL_FLASH_BASE 0x00000001fff80000ULL -#define EBONY_LARGE_FLASH_BASE 0x00000001ff800000ULL - -/* - * Serial port defines - */ - -#if defined(__BOOTER__) -/* OpenBIOS defined UART mappings, used by bootloader shim */ -#define UART0_IO_BASE 0xE0000200 -#define UART1_IO_BASE 0xE0000300 -#else -/* head_44x.S created UART mapping, used before early_serial_setup. - * We cannot use default OpenBIOS UART mappings because they - * don't work for configurations with more than 512M RAM. --ebs - */ -#define UART0_IO_BASE 0xF0000200 -#define UART1_IO_BASE 0xF0000300 -#endif - -/* external Epson SG-615P */ -#define BASE_BAUD 691200 - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -/* PCI support */ -#define EBONY_PCI_LOWER_IO 0x00000000 -#define EBONY_PCI_UPPER_IO 0x0000ffff -#define EBONY_PCI_LOWER_MEM 0x80002000 -#define EBONY_PCI_UPPER_MEM 0xffffefff - -#define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000 -#define EBONY_PCI_CFGA_PLB32 0x0ec00000 -#define EBONY_PCI_CFGD_PLB32 0x0ec00004 - -#define EBONY_PCI_IO_BASE 0x0000000208000000ULL -#define EBONY_PCI_IO_SIZE 0x00010000 -#define EBONY_PCI_MEM_OFFSET 0x00000000 - -#endif /* __ASM_EBONY_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ep405.c b/arch/ppc/platforms/4xx/ep405.c deleted file mode 100644 index 5aa2950228045b15b30092a54eba1c1ddb210c1d..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ep405.c +++ /dev/null @@ -1,196 +0,0 @@ -/* - * Embedded Planet 405GP board - * http://www.embeddedplanet.com - * - * Author: Matthew Locke - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -u8 *ep405_bcsr; -u8 *ep405_nvram; - -static struct { - u8 cpld_xirq_select; - int pci_idsel; - int irq; -} ep405_devtable[] = { -#ifdef CONFIG_EP405PC - {0x07, 0x0E, 25}, /* EP405PC: USB */ -#endif -}; - -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - int i; - - /* AFAICT this is only called a few times during PCI setup, so - performance is not critical */ - for (i = 0; i < ARRAY_SIZE(ep405_devtable); i++) { - if (idsel == ep405_devtable[i].pci_idsel) - return ep405_devtable[i].irq; - } - return -1; -}; - -void __init -ep405_setup_arch(void) -{ - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 0); - - if (__res.bi_nvramsize == 512*1024) { - /* FIXME: we should properly handle NVRTCs of different sizes */ - TODC_INIT(TODC_TYPE_DS1557, ep405_nvram, ep405_nvram, ep405_nvram, 8); - } -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ -#ifdef CONFIG_PCI - unsigned int bar_response, bar; - /* - * Expected PCI mapping: - * - * PLB addr PCI memory addr - * --------------------- --------------------- - * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff - * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff - * - * PLB addr PCI io addr - * --------------------- --------------------- - * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 - * - */ - - /* Disable region zero first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Disable region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->ptm1ms), 0x00000000); - - /* Disable region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - - /* Configure PTM (PCI->PLB) region 1 */ - out_le32((void *) &(pcip->ptm1la), 0x00000000); /* PLB base address */ - /* Disable PTM region 2 */ - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - /* end workaround */ -#endif -} - -void __init -ep405_map_io(void) -{ - bd_t *bip = &__res; - - ppc4xx_map_io(); - - ep405_bcsr = ioremap(EP405_BCSR_PADDR, EP405_BCSR_SIZE); - - if (bip->bi_nvramsize > 0) { - ep405_nvram = ioremap(EP405_NVRAM_PADDR, bip->bi_nvramsize); - } -} - -void __init -ep405_init_IRQ(void) -{ - int i; - - ppc4xx_init_IRQ(); - - /* Workaround for a bug in the firmware it incorrectly sets - the IRQ polarities for XIRQ0 and XIRQ1 */ - mtdcr(DCRN_UIC_PR(DCRN_UIC0_BASE), 0xffffff80); /* set the polarity */ - mtdcr(DCRN_UIC_SR(DCRN_UIC0_BASE), 0x00000060); /* clear bogus interrupts */ - - /* Activate the XIRQs from the CPLD */ - writeb(0xf0, ep405_bcsr+10); - - /* Set up IRQ routing */ - for (i = 0; i < ARRAY_SIZE(ep405_devtable); i++) { - if ( (ep405_devtable[i].irq >= 25) - && (ep405_devtable[i].irq) <= 31) { - writeb(ep405_devtable[i].cpld_xirq_select, ep405_bcsr+5); - writeb(ep405_devtable[i].irq - 25, ep405_bcsr+6); - } - } -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ep405_setup_arch; - ppc_md.setup_io_mappings = ep405_map_io; - ppc_md.init_IRQ = ep405_init_IRQ; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - - if (__res.bi_nvramsize == 512*1024) { - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - } else { - printk("EP405: NVRTC size is not 512k (not a DS1557). Not sure what to do with it\n"); - } -} diff --git a/arch/ppc/platforms/4xx/ep405.h b/arch/ppc/platforms/4xx/ep405.h deleted file mode 100644 index 9814fc431725545204de79e567f0fa70e7330ec8..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ep405.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Embedded Planet 405GP board - * http://www.embeddedplanet.com - * - * Author: Matthew Locke - * - * 2000 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_EP405_H__ -#define __ASM_EP405_H__ - -/* We have a 405GP core */ -#include - -#ifndef __ASSEMBLY__ - -#include - -typedef struct board_info { - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned int bi_nvramsize; /* Size of the NVRAM/RTC */ -} bd_t; - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - -extern u8 *ep405_bcsr; -extern u8 *ep405_nvram; - -/* Map for the BCSR and NVRAM space */ -#define EP405_BCSR_PADDR ((uint)0xf4000000) -#define EP405_BCSR_SIZE ((uint)16) -#define EP405_NVRAM_PADDR ((uint)0xf4200000) - -/* serial defines */ -#define BASE_BAUD 399193 - -#define PPC4xx_MACHINE_NAME "Embedded Planet 405GP" - -#endif /* !__ASSEMBLY__ */ -#endif /* __ASM_EP405_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c deleted file mode 100644 index fb3630a1608d49c9c9c13ac6744c7a9f2d79c3f8..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405ep.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Support for IBM PPC 405EP processors. - * - * Author: SAW (IBM), derived from ibmnp405l.c. - * Maintained by MontaVista Software - * - * 2003 (c) MontaVista Softare Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -static struct ocp_func_mal_data ibm405ep_mal0_def = { - .num_tx_chans = 4, /* Number of TX channels */ - .num_rx_chans = 2, /* Number of RX channels */ - .txeob_irq = 11, /* TX End Of Buffer IRQ */ - .rxeob_irq = 12, /* RX End Of Buffer IRQ */ - .txde_irq = 13, /* TX Descriptor Error IRQ */ - .rxde_irq = 14, /* RX Descriptor Error IRQ */ - .serr_irq = 10, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_emac_data ibm405ep_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 9, /* WOL interrupt number */ - .mdio_idx = 0, /* MDIO via EMAC0 */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibm405ep_emac1_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ - .wol_irq = 9, /* WOL interrupt number */ - .mdio_idx = 0, /* MDIO via EMAC0 */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_iic_data ibm405ep_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0xEF600000, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = 0xEF600500, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm405ep_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = 0xEF600700, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm405ep_mal0_def, - .show = &ocp_show_mal_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = EMAC0_BASE, - .irq = 15, - .pm = OCP_CPM_NA, - .additions = &ibm405ep_emac0_def, - .show = &ocp_show_emac_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 1, - .paddr = 0xEF600900, - .irq = 17, - .pm = OCP_CPM_NA, - .additions = &ibm405ep_emac1_def, - .show = &ocp_show_emac_data - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffff7f80, - .triggering = 0x00000000, - .ext_irq_mask = 0x0000007f, /* IRQ0 - IRQ6 */ - } -}; diff --git a/arch/ppc/platforms/4xx/ibm405ep.h b/arch/ppc/platforms/4xx/ibm405ep.h deleted file mode 100644 index 3ef20a547080ed1ddfaacff66afa9407045a5a45..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405ep.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * IBM PPC 405EP processor defines. - * - * Author: SAW (IBM), derived from ibm405gp.h. - * Maintained by MontaVista Software - * - * 2003 (c) MontaVista Softare Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBM405EP_H__ -#define __ASM_IBM405EP_H__ - - -/* ibm405.h at bottom of this file */ - -/* PCI - * PCI Bridge config reg definitions - * see 17-19 of manual - */ - -#define PPC405_PCI_CONFIG_ADDR 0xeec00000 -#define PPC405_PCI_CONFIG_DATA 0xeec00004 - -#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */ - /* setbat */ -#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */ -#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */ -#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */ - -#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */ -#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */ -#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */ -#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */ - -#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE - -#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE) -#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR -#define PPC4xx_PCI_IO_SIZE ((uint)64*1024) -#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR) -#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR -#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) -#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000) -#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR -#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) -#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000) -#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR -#define PPC4xx_ONB_IO_SIZE ((uint)4*1024) - -/* serial port defines */ -#define RS_TABLE_SIZE 2 - -#define UART0_INT 0 -#define UART1_INT 1 - -#define PCIL0_BASE 0xEF400000 -#define UART0_IO_BASE 0xEF600300 -#define UART1_IO_BASE 0xEF600400 -#define EMAC0_BASE 0xEF600800 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[e][i] - -#if defined(CONFIG_UART0_TTYS0) -#define ACTING_UART0_IO_BASE UART0_IO_BASE -#define ACTING_UART1_IO_BASE UART1_IO_BASE -#define ACTING_UART0_INT UART0_INT -#define ACTING_UART1_INT UART1_INT -#else -#define ACTING_UART0_IO_BASE UART1_IO_BASE -#define ACTING_UART1_IO_BASE UART0_IO_BASE -#define ACTING_UART0_INT UART1_INT -#define ACTING_UART1_INT UART0_INT -#endif - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, ACTING_UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *)ACTING_UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_DEBUG_IO_BASE ACTING_UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -/* DCR defines */ -#define DCRN_CPMSR_BASE 0x0BA -#define DCRN_CPMFR_BASE 0x0B9 - -#define DCRN_CPC0_PLLMR0_BASE 0x0F0 -#define DCRN_CPC0_BOOT_BASE 0x0F1 -#define DCRN_CPC0_CR1_BASE 0x0F2 -#define DCRN_CPC0_EPRCSR_BASE 0x0F3 -#define DCRN_CPC0_PLLMR1_BASE 0x0F4 -#define DCRN_CPC0_UCR_BASE 0x0F5 -#define DCRN_CPC0_UCR_U0DIV 0x07F -#define DCRN_CPC0_SRR_BASE 0x0F6 -#define DCRN_CPC0_JTAGID_BASE 0x0F7 -#define DCRN_CPC0_SPARE_BASE 0x0F8 -#define DCRN_CPC0_PCI_BASE 0x0F9 - - -#define IBM_CPM_GPT 0x80000000 /* GPT interface */ -#define IBM_CPM_PCI 0x40000000 /* PCI bridge */ -#define IBM_CPM_UIC 0x00010000 /* Universal Int Controller */ -#define IBM_CPM_CPU 0x00008000 /* processor core */ -#define IBM_CPM_EBC 0x00002000 /* EBC controller */ -#define IBM_CPM_SDRAM0 0x00004000 /* SDRAM memory controller */ -#define IBM_CPM_GPIO0 0x00001000 /* General Purpose IO */ -#define IBM_CPM_TMRCLK 0x00000400 /* CPU timers */ -#define IBM_CPM_PLB 0x00000100 /* PLB bus arbiter */ -#define IBM_CPM_OPB 0x00000080 /* PLB to OPB bridge */ -#define IBM_CPM_DMA 0x00000040 /* DMA controller */ -#define IBM_CPM_IIC0 0x00000010 /* IIC interface */ -#define IBM_CPM_UART1 0x00000002 /* serial port 0 */ -#define IBM_CPM_UART0 0x00000001 /* serial port 1 */ -#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \ - | IBM_CPM_OPB | IBM_CPM_EBC \ - | IBM_CPM_SDRAM0 | IBM_CPM_PLB \ - | IBM_CPM_UIC | IBM_CPM_TMRCLK) -#define DCRN_DMA0_BASE 0x100 -#define DCRN_DMA1_BASE 0x108 -#define DCRN_DMA2_BASE 0x110 -#define DCRN_DMA3_BASE 0x118 -#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */ -#define DCRN_DMASR_BASE 0x120 -#define DCRN_EBC_BASE 0x012 -#define DCRN_DCP0_BASE 0x014 -#define DCRN_MAL_BASE 0x180 -#define DCRN_OCM0_BASE 0x018 -#define DCRN_PLB0_BASE 0x084 -#define DCRN_PLLMR_BASE 0x0B0 -#define DCRN_POB0_BASE 0x0A0 -#define DCRN_SDRAM0_BASE 0x010 -#define DCRN_UIC0_BASE 0x0C0 -#define UIC0 DCRN_UIC0_BASE - -#include - -#endif /* __ASM_IBM405EP_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm405gp.c b/arch/ppc/platforms/4xx/ibm405gp.c deleted file mode 100644 index 2ac67a2f0ba64b251c56a78af4c33fcb6758fb03..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405gp.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * - * Copyright 2000-2001 MontaVista Software Inc. - * Original author: Armin Kuster akuster@mvista.com - * - * Module name: ibm405gp.c - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm405gp_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 9, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm405gp_mal0_def = { - .num_tx_chans = 1, /* Number of TX channels */ - .num_rx_chans = 1, /* Number of RX channels */ - .txeob_irq = 11, /* TX End Of Buffer IRQ */ - .rxeob_irq = 12, /* RX End Of Buffer IRQ */ - .txde_irq = 13, /* TX Descriptor Error IRQ */ - .rxde_irq = 14, /* RX Descriptor Error IRQ */ - .serr_irq = 10, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm405gp_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0xEF600000, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = 0xEF600500, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm405gp_iic0_def, - .show = &ocp_show_iic_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = 0xEF600700, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm405gp_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = EMAC0_BASE, - .irq = 15, - .pm = IBM_CPM_EMAC0, - .additions = &ibm405gp_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffffff80, - .triggering = 0x10000000, - .ext_irq_mask = 0x0000007f, /* IRQ0 - IRQ6 */ - } -}; diff --git a/arch/ppc/platforms/4xx/ibm405gp.h b/arch/ppc/platforms/4xx/ibm405gp.h deleted file mode 100644 index 9f15e5518719c63a2fcdde911bb64394fe612b7e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405gp.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Author: Armin Kuster akuster@mvista.com - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBM405GP_H__ -#define __ASM_IBM405GP_H__ - - -/* ibm405.h at bottom of this file */ - -/* PCI - * PCI Bridge config reg definitions - * see 17-19 of manual - */ - -#define PPC405_PCI_CONFIG_ADDR 0xeec00000 -#define PPC405_PCI_CONFIG_DATA 0xeec00004 - -#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */ - /* setbat */ -#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */ -#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */ -#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */ - -#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */ -#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */ -#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */ -#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */ - -#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE - -#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE) -#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR -#define PPC4xx_PCI_IO_SIZE ((uint)64*1024) -#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR) -#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR -#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) -#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000) -#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR -#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) -#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000) -#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR -#define PPC4xx_ONB_IO_SIZE ((uint)4*1024) - -/* serial port defines */ -#define RS_TABLE_SIZE 2 - -#define UART0_INT 0 -#define UART1_INT 1 - -#define PCIL0_BASE 0xEF400000 -#define UART0_IO_BASE 0xEF600300 -#define UART1_IO_BASE 0xEF600400 -#define EMAC0_BASE 0xEF600800 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[i] - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#if defined(CONFIG_UART0_TTYS0) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) -#endif - -#if defined(CONFIG_UART0_TTYS1) -#define SERIAL_DEBUG_IO_BASE UART1_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(1) \ - STD_UART_OP(0) -#endif - -/* DCR defines */ -#define DCRN_CHCR_BASE 0x0B1 -#define DCRN_CHPSR_BASE 0x0B4 -#define DCRN_CPMSR_BASE 0x0B8 -#define DCRN_CPMFR_BASE 0x0BA - -#define CHR0_U0EC 0x00000080 /* Select external clock for UART0 */ -#define CHR0_U1EC 0x00000040 /* Select external clock for UART1 */ -#define CHR0_UDIV 0x0000003E /* UART internal clock divisor */ -#define CHR1_CETE 0x00800000 /* CPU external timer enable */ - -#define DCRN_CHPSR_BASE 0x0B4 -#define PSR_PLL_FWD_MASK 0xC0000000 -#define PSR_PLL_FDBACK_MASK 0x30000000 -#define PSR_PLL_TUNING_MASK 0x0E000000 -#define PSR_PLB_CPU_MASK 0x01800000 -#define PSR_OPB_PLB_MASK 0x00600000 -#define PSR_PCI_PLB_MASK 0x00180000 -#define PSR_EB_PLB_MASK 0x00060000 -#define PSR_ROM_WIDTH_MASK 0x00018000 -#define PSR_ROM_LOC 0x00004000 -#define PSR_PCI_ASYNC_EN 0x00001000 -#define PSR_PCI_ARBIT_EN 0x00000400 - -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_PCI 0x40000000 /* PCI bridge */ -#define IBM_CPM_CPU 0x20000000 /* processor core */ -#define IBM_CPM_DMA 0x10000000 /* DMA controller */ -#define IBM_CPM_OPB 0x08000000 /* PLB to OPB bridge */ -#define IBM_CPM_DCP 0x04000000 /* CodePack */ -#define IBM_CPM_EBC 0x02000000 /* ROM/SRAM peripheral controller */ -#define IBM_CPM_SDRAM0 0x01000000 /* SDRAM memory controller */ -#define IBM_CPM_PLB 0x00800000 /* PLB bus arbiter */ -#define IBM_CPM_GPIO0 0x00400000 /* General Purpose IO (??) */ -#define IBM_CPM_UART0 0x00200000 /* serial port 0 */ -#define IBM_CPM_UART1 0x00100000 /* serial port 1 */ -#define IBM_CPM_UIC 0x00080000 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00040000 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00020000 /* on-chip ethernet MM unit */ -#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \ - | IBM_CPM_OPB | IBM_CPM_EBC \ - | IBM_CPM_SDRAM0 | IBM_CPM_PLB \ - | IBM_CPM_UIC | IBM_CPM_TMRCLK) - -#define DCRN_DMA0_BASE 0x100 -#define DCRN_DMA1_BASE 0x108 -#define DCRN_DMA2_BASE 0x110 -#define DCRN_DMA3_BASE 0x118 -#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */ -#define DCRN_DMASR_BASE 0x120 -#define DCRN_EBC_BASE 0x012 -#define DCRN_DCP0_BASE 0x014 -#define DCRN_MAL_BASE 0x180 -#define DCRN_OCM0_BASE 0x018 -#define DCRN_PLB0_BASE 0x084 -#define DCRN_PLLMR_BASE 0x0B0 -#define DCRN_POB0_BASE 0x0A0 -#define DCRN_SDRAM0_BASE 0x010 -#define DCRN_UIC0_BASE 0x0C0 -#define UIC0 DCRN_UIC0_BASE - -#include - -#endif /* __ASM_IBM405GP_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c deleted file mode 100644 index 9f4dacffdbb3d82e70f0be8bb394dc4cff90f0d0..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405gpr.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm405gpr_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 9, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm405gpr_mal0_def = { - .num_tx_chans = 1, /* Number of TX channels */ - .num_rx_chans = 1, /* Number of RX channels */ - .txeob_irq = 11, /* TX End Of Buffer IRQ */ - .rxeob_irq = 12, /* RX End Of Buffer IRQ */ - .txde_irq = 13, /* TX Descriptor Error IRQ */ - .rxde_irq = 14, /* RX Descriptor Error IRQ */ - .serr_irq = 10, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm405gpr_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0xEF600000, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = 0xEF600500, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm405gpr_iic0_def, - .show = &ocp_show_iic_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = 0xEF600700, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm405gpr_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = EMAC0_BASE, - .irq = 15, - .pm = IBM_CPM_EMAC0, - .additions = &ibm405gpr_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffffe000, - .triggering = 0x10000000, - .ext_irq_mask = 0x00001fff, /* IRQ7 - IRQ12, IRQ0 - IRQ6 */ - } -}; diff --git a/arch/ppc/platforms/4xx/ibm405gpr.h b/arch/ppc/platforms/4xx/ibm405gpr.h deleted file mode 100644 index 9e01f1515de3b770a9c6b240c518350a1a65d266..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm405gpr.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBM405GPR_H__ -#define __ASM_IBM405GPR_H__ - - -/* ibm405.h at bottom of this file */ - -/* PCI - * PCI Bridge config reg definitions - * see 17-19 of manual - */ - -#define PPC405_PCI_CONFIG_ADDR 0xeec00000 -#define PPC405_PCI_CONFIG_DATA 0xeec00004 - -#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */ - /* setbat */ -#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */ -#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */ -#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */ - -#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */ -#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */ -#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */ -#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */ - -#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE - -#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE) -#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR -#define PPC4xx_PCI_IO_SIZE ((uint)64*1024) -#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR) -#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR -#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) -#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000) -#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR -#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) -#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000) -#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR -#define PPC4xx_ONB_IO_SIZE ((uint)4*1024) - -/* serial port defines */ -#define RS_TABLE_SIZE 2 - -#define UART0_INT 0 -#define UART1_INT 1 - -#define PCIL0_BASE 0xEF400000 -#define UART0_IO_BASE 0xEF600300 -#define UART1_IO_BASE 0xEF600400 -#define EMAC0_BASE 0xEF600800 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[i] - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#if defined(CONFIG_UART0_TTYS0) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) -#endif - -#if defined(CONFIG_UART0_TTYS1) -#define SERIAL_DEBUG_IO_BASE UART1_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(1) \ - STD_UART_OP(0) -#endif - -/* DCR defines */ -#define DCRN_CHCR_BASE 0x0B1 -#define DCRN_CHPSR_BASE 0x0B4 -#define DCRN_CPMSR_BASE 0x0B8 -#define DCRN_CPMFR_BASE 0x0BA - -#define CHR0_U0EC 0x00000080 /* Select external clock for UART0 */ -#define CHR0_U1EC 0x00000040 /* Select external clock for UART1 */ -#define CHR0_UDIV 0x0000003E /* UART internal clock divisor */ -#define CHR1_CETE 0x00800000 /* CPU external timer enable */ - -#define DCRN_CHPSR_BASE 0x0B4 -#define PSR_PLL_FWD_MASK 0xC0000000 -#define PSR_PLL_FDBACK_MASK 0x30000000 -#define PSR_PLL_TUNING_MASK 0x0E000000 -#define PSR_PLB_CPU_MASK 0x01800000 -#define PSR_OPB_PLB_MASK 0x00600000 -#define PSR_PCI_PLB_MASK 0x00180000 -#define PSR_EB_PLB_MASK 0x00060000 -#define PSR_ROM_WIDTH_MASK 0x00018000 -#define PSR_ROM_LOC 0x00004000 -#define PSR_PCI_ASYNC_EN 0x00001000 -#define PSR_PCI_ARBIT_EN 0x00000400 - -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_PCI 0x40000000 /* PCI bridge */ -#define IBM_CPM_CPU 0x20000000 /* processor core */ -#define IBM_CPM_DMA 0x10000000 /* DMA controller */ -#define IBM_CPM_OPB 0x08000000 /* PLB to OPB bridge */ -#define IBM_CPM_DCP 0x04000000 /* CodePack */ -#define IBM_CPM_EBC 0x02000000 /* ROM/SRAM peripheral controller */ -#define IBM_CPM_SDRAM0 0x01000000 /* SDRAM memory controller */ -#define IBM_CPM_PLB 0x00800000 /* PLB bus arbiter */ -#define IBM_CPM_GPIO0 0x00400000 /* General Purpose IO (??) */ -#define IBM_CPM_UART0 0x00200000 /* serial port 0 */ -#define IBM_CPM_UART1 0x00100000 /* serial port 1 */ -#define IBM_CPM_UIC 0x00080000 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00040000 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00020000 /* on-chip ethernet MM unit */ -#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \ - | IBM_CPM_OPB | IBM_CPM_EBC \ - | IBM_CPM_SDRAM0 | IBM_CPM_PLB \ - | IBM_CPM_UIC | IBM_CPM_TMRCLK) - -#define DCRN_DMA0_BASE 0x100 -#define DCRN_DMA1_BASE 0x108 -#define DCRN_DMA2_BASE 0x110 -#define DCRN_DMA3_BASE 0x118 -#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */ -#define DCRN_DMASR_BASE 0x120 -#define DCRN_EBC_BASE 0x012 -#define DCRN_DCP0_BASE 0x014 -#define DCRN_MAL_BASE 0x180 -#define DCRN_OCM0_BASE 0x018 -#define DCRN_PLB0_BASE 0x084 -#define DCRN_PLLMR_BASE 0x0B0 -#define DCRN_POB0_BASE 0x0A0 -#define DCRN_SDRAM0_BASE 0x010 -#define DCRN_UIC0_BASE 0x0C0 -#define UIC0 DCRN_UIC0_BASE - -#include - -#endif /* __ASM_IBM405GPR_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c deleted file mode 100644 index 0de91532aabb9f6a902357ff316f9e7cb5e45af7..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440ep.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * PPC440EP I/O descriptions - * - * Wade Farnsworth - * Copyright 2004 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm440ep_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 61, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibm440ep_emac1_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 1, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ - .wol_irq = 63, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm440ep_mal0_def = { - .num_tx_chans = 4, /* Number of TX channels */ - .num_rx_chans = 2, /* Number of RX channels */ - .txeob_irq = 10, /* TX End Of Buffer IRQ */ - .rxeob_irq = 11, /* RX End Of Buffer IRQ */ - .txde_irq = 33, /* TX Descriptor Error IRQ */ - .rxde_irq = 34, /* RX Descriptor Error IRQ */ - .serr_irq = 32, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm440ep_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ibm440ep_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0x0EF600000ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = PPC440EP_UART0_ADDR, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = PPC440EP_UART1_ADDR, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 2, - .paddr = PPC440EP_UART2_ADDR, - .irq = UART2_INT, - .pm = IBM_CPM_UART2, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 3, - .paddr = PPC440EP_UART3_ADDR, - .irq = UART3_INT, - .pm = IBM_CPM_UART3, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 0, - .paddr = 0x0EF600700ULL, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm440ep_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 1, - .paddr = 0x0EF600800ULL, - .irq = 7, - .pm = IBM_CPM_IIC1, - .additions = &ibm440ep_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 0, - .paddr = 0x0EF600B00ULL, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 1, - .paddr = 0x0EF600C00ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm440ep_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = 0x0EF600E00ULL, - .irq = 60, - .pm = OCP_CPM_NA, - .additions = &ibm440ep_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 1, - .paddr = 0x0EF600F00ULL, - .irq = 62, - .pm = OCP_CPM_NA, - .additions = &ibm440ep_emac1_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_ZMII, - .paddr = 0x0EF600D00ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffbffe03, - .triggering = 0x00000000, - .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */ - }, - { .polarity = 0xffffc6af, - .triggering = 0x06000140, - .ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */ - }, -}; - -static struct resource usb_gadget_resources[] = { - [0] = { - .start = 0x050000100ULL, - .end = 0x05000017FULL, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = 55, - .end = 55, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 dma_mask = 0xffffffffULL; - -static struct platform_device usb_gadget_device = { - .name = "musbhsfc", - .id = 0, - .num_resources = ARRAY_SIZE(usb_gadget_resources), - .resource = usb_gadget_resources, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - } -}; - -static struct platform_device *ibm440ep_devs[] __initdata = { - &usb_gadget_device, -}; - -static int __init -ibm440ep_platform_add_devices(void) -{ - return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs)); -} -arch_initcall(ibm440ep_platform_add_devices); - diff --git a/arch/ppc/platforms/4xx/ibm440ep.h b/arch/ppc/platforms/4xx/ibm440ep.h deleted file mode 100644 index d92572727d20af759dcc1b353ae0de6fe835ee0a..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440ep.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * PPC440EP definitions - * - * Wade Farnsworth - * - * Copyright 2002 Roland Dreier - * Copyright 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __PPC_PLATFORMS_IBM440EP_H -#define __PPC_PLATFORMS_IBM440EP_H - -#include - -/* UART */ -#define PPC440EP_UART0_ADDR 0x0EF600300 -#define PPC440EP_UART1_ADDR 0x0EF600400 -#define PPC440EP_UART2_ADDR 0x0EF600500 -#define PPC440EP_UART3_ADDR 0x0EF600600 -#define UART0_INT 0 -#define UART1_INT 1 -#define UART2_INT 3 -#define UART3_INT 4 - -/* Clock and Power Management */ -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ -#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ -#define IBM_CPM_USB1H 0x08000000 /* USB 1.1 Host */ -#define IBM_CPM_FPU 0x04000000 /* floating point unit */ -#define IBM_CPM_CPU 0x02000000 /* processor core */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ -#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ -#define IBM_CPM_EBC 0x00200000 /* External Bus Controller */ -#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ -#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ -#define IBM_CPM_PLB4 0x00040000 /* PLB4 bus arbiter */ -#define IBM_CPM_PLB4x3 0x00020000 /* PLB4 to PLB3 bridge controller */ -#define IBM_CPM_PLB3x4 0x00010000 /* PLB3 to PLB4 bridge controller */ -#define IBM_CPM_PLB3 0x00008000 /* PLB3 bus arbiter */ -#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ -#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ -#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ -#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ -#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ -#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00000020 /* ethernet port 0 */ -#define IBM_CPM_EMAC1 0x00000010 /* ethernet port 1 */ -#define IBM_CPM_UART2 0x00000008 /* serial port 2 */ -#define IBM_CPM_UART3 0x00000004 /* serial port 3 */ -#define IBM_CPM_USB2D 0x00000002 /* USB 2.0 Device */ -#define IBM_CPM_USB2H 0x00000001 /* USB 2.0 Host */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_BGO | IBM_CPM_FPU \ - | IBM_CPM_EBM | IBM_CPM_PLB4 | IBM_CPM_3x4 \ - | IBM_CPM_PLB3 | IBM_CPM_PLB4x3 \ - | IBM_CPM_EMAC0 | IBM_CPM_TMRCLK \ - | IBM_CPM_DMA | IBM_CPM_PCI | IBM_CPM_EMAC1) - - -#endif /* __PPC_PLATFORMS_IBM440EP_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c deleted file mode 100644 index b67a72e5c6fe8570c7ca391c4a83b71b16fdaf6d..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440gp.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * PPC440GP I/O descriptions - * - * Matt Porter - * Copyright 2002-2004 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm440gp_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 61, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibm440gp_emac1_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 1, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ - .wol_irq = 63, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm440gp_mal0_def = { - .num_tx_chans = 4, /* Number of TX channels */ - .num_rx_chans = 2, /* Number of RX channels */ - .txeob_irq = 10, /* TX End Of Buffer IRQ */ - .rxeob_irq = 11, /* RX End Of Buffer IRQ */ - .txde_irq = 33, /* TX Descriptor Error IRQ */ - .rxde_irq = 34, /* RX Descriptor Error IRQ */ - .serr_irq = 32, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm440gp_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ibm440gp_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0x0000000140000000ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = PPC440GP_UART0_ADDR, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = PPC440GP_UART1_ADDR, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 0, - .paddr = 0x0000000140000400ULL, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm440gp_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 1, - .paddr = 0x0000000140000500ULL, - .irq = 3, - .pm = IBM_CPM_IIC1, - .additions = &ibm440gp_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 0, - .paddr = 0x0000000140000700ULL, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm440gp_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = 0x0000000140000800ULL, - .irq = 60, - .pm = OCP_CPM_NA, - .additions = &ibm440gp_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 1, - .paddr = 0x0000000140000900ULL, - .irq = 62, - .pm = OCP_CPM_NA, - .additions = &ibm440gp_emac1_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_ZMII, - .paddr = 0x0000000140000780ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xfffffe03, - .triggering = 0x01c00000, - .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */ - }, - { .polarity = 0xffffc0ff, - .triggering = 0x00ff8000, - .ext_irq_mask = 0x00003f00, /* IRQ7 - IRQ12 */ - }, -}; diff --git a/arch/ppc/platforms/4xx/ibm440gp.h b/arch/ppc/platforms/4xx/ibm440gp.h deleted file mode 100644 index 391c90e1f5ea53a4e7f8a4f385086912635d76a4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440gp.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * PPC440GP definitions - * - * Roland Dreier - * - * Copyright 2002 Roland Dreier - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * This file contains code that was originally in the files ibm44x.h - * and ebony.h, which were written by Matt Porter of MontaVista Software Inc. - */ - -#ifdef __KERNEL__ -#ifndef __PPC_PLATFORMS_IBM440GP_H -#define __PPC_PLATFORMS_IBM440GP_H - - -/* UART */ -#define PPC440GP_UART0_ADDR 0x0000000140000200ULL -#define PPC440GP_UART1_ADDR 0x0000000140000300ULL -#define UART0_INT 0 -#define UART1_INT 1 - -/* Clock and Power Management */ -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ -#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ -#define IBM_CPM_CPU 0x02000000 /* processor core */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ -#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ -#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ -#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ -#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ -#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ -#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ -#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ -#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ -#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ -#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ -#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ -#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ - | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ - | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI) -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 2 - -#include -#include - -#endif /* __PPC_PLATFORMS_IBM440GP_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c deleted file mode 100644 index 685abffcb6cee1a7ba5aa715060b09aa8ec4d32f..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440gx.c +++ /dev/null @@ -1,231 +0,0 @@ -/* - * PPC440GX I/O descriptions - * - * Matt Porter - * Copyright 2002-2004 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm440gx_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 61, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibm440gx_emac1_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 1, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 1, /* MAL tx channel number */ - .wol_irq = 63, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibm440gx_emac2_def = { - .rgmii_idx = 0, /* RGMII device index */ - .rgmii_mux = 0, /* RGMII input of this EMAC */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 2, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 2, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ - .wol_irq = 65, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = 0, /* TAH device index */ -}; - -static struct ocp_func_emac_data ibm440gx_emac3_def = { - .rgmii_idx = 0, /* RGMII device index */ - .rgmii_mux = 1, /* RGMII input of this EMAC */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 3, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 3, /* MAL rx channel number */ - .mal_tx_chan = 3, /* MAL tx channel number */ - .wol_irq = 67, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = 1, /* TAH device index */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm440gx_mal0_def = { - .num_tx_chans = 4, /* Number of TX channels */ - .num_rx_chans = 4, /* Number of RX channels */ - .txeob_irq = 10, /* TX End Of Buffer IRQ */ - .rxeob_irq = 11, /* RX End Of Buffer IRQ */ - .txde_irq = 33, /* TX Descriptor Error IRQ */ - .rxde_irq = 34, /* RX Descriptor Error IRQ */ - .serr_irq = 32, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm440gx_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ibm440gx_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0x0000000140000000ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = PPC440GX_UART0_ADDR, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = PPC440GX_UART1_ADDR, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 0, - .paddr = 0x0000000140000400ULL, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm440gx_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 1, - .paddr = 0x0000000140000500ULL, - .irq = 3, - .pm = IBM_CPM_IIC1, - .additions = &ibm440gx_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 0, - .paddr = 0x0000000140000700ULL, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm440gx_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = 0x0000000140000800ULL, - .irq = 60, - .pm = OCP_CPM_NA, - .additions = &ibm440gx_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 1, - .paddr = 0x0000000140000900ULL, - .irq = 62, - .pm = OCP_CPM_NA, - .additions = &ibm440gx_emac1_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 2, - .paddr = 0x0000000140000C00ULL, - .irq = 64, - .pm = OCP_CPM_NA, - .additions = &ibm440gx_emac2_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 3, - .paddr = 0x0000000140000E00ULL, - .irq = 66, - .pm = OCP_CPM_NA, - .additions = &ibm440gx_emac3_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_RGMII, - .paddr = 0x0000000140000790ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_ZMII, - .paddr = 0x0000000140000780ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_TAH, - .index = 0, - .paddr = 0x0000000140000b50ULL, - .irq = 68, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_TAH, - .index = 1, - .paddr = 0x0000000140000d50ULL, - .irq = 69, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xfffffe03, - .triggering = 0x01c00000, - .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */ - }, - { .polarity = 0xffffc0ff, - .triggering = 0x00ff8000, - .ext_irq_mask = 0x00003f00, /* IRQ7 - IRQ12 */ - }, - { .polarity = 0xffff83ff, - .triggering = 0x000f83c0, - .ext_irq_mask = 0x00007c00, /* IRQ13 - IRQ17 */ - }, -}; diff --git a/arch/ppc/platforms/4xx/ibm440gx.h b/arch/ppc/platforms/4xx/ibm440gx.h deleted file mode 100644 index 599c4289b9c2e556d9e804c00cc337ff96dfa021..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440gx.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * PPC440GX definitions - * - * Matt Porter - * - * Copyright 2002 Roland Dreier - * Copyright 2003 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __PPC_PLATFORMS_IBM440GX_H -#define __PPC_PLATFORMS_IBM440GX_H - - -#include - -/* UART */ -#define PPC440GX_UART0_ADDR 0x0000000140000200ULL -#define PPC440GX_UART1_ADDR 0x0000000140000300ULL -#define UART0_INT 0 -#define UART1_INT 1 - -/* Clock and Power Management */ -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ -#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ -#define IBM_CPM_RGMII 0x10000000 /* RGMII */ -#define IBM_CPM_TAHOE0 0x08000000 /* TAHOE 0 */ -#define IBM_CPM_TAHOE1 0x04000000 /* TAHOE 1 */ -#define IBM_CPM_CPU 0x02000000 /* processor core */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ -#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ -#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ -#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ -#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ -#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ -#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ -#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ -#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ -#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ -#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ -#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ -#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */ -#define IBM_CPM_EMAC1 0x00000010 /* EMAC 1 */ -#define IBM_CPM_EMAC2 0x00000008 /* EMAC 2 */ -#define IBM_CPM_EMAC3 0x00000004 /* EMAC 3 */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ - | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ - | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \ - | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \ - | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \ - | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 ) -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 2 - -#endif /* __PPC_PLATFORMS_IBM440GX_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c deleted file mode 100644 index de8f7ac5623c1eca02dd5ce14535fc22a6c4c55f..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440sp.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * PPC440SP I/O descriptions - * - * Matt Porter - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include - -static struct ocp_func_emac_data ibm440sp_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* No ZMII */ - .zmii_mux = -1, /* No ZMII */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 61, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibm440sp_mal0_def = { - .num_tx_chans = 1, /* Number of TX channels */ - .num_rx_chans = 1, /* Number of RX channels */ - .txeob_irq = 38, /* TX End Of Buffer IRQ */ - .rxeob_irq = 39, /* RX End Of Buffer IRQ */ - .txde_irq = 34, /* TX Descriptor Error IRQ */ - .rxde_irq = 35, /* RX Descriptor Error IRQ */ - .serr_irq = 33, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibm440sp_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ibm440sp_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0x0000000140000000ULL, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = PPC440SP_UART0_ADDR, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = PPC440SP_UART1_ADDR, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 2, - .paddr = PPC440SP_UART2_ADDR, - .irq = UART2_INT, - .pm = IBM_CPM_UART2, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 0, - .paddr = 0x00000001f0000400ULL, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibm440sp_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 1, - .paddr = 0x00000001f0000500ULL, - .irq = 3, - .pm = IBM_CPM_IIC1, - .additions = &ibm440sp_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 0, - .paddr = 0x00000001f0000700ULL, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibm440sp_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = 0x00000001f0000800ULL, - .irq = 60, - .pm = OCP_CPM_NA, - .additions = &ibm440sp_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; diff --git a/arch/ppc/platforms/4xx/ibm440sp.h b/arch/ppc/platforms/4xx/ibm440sp.h deleted file mode 100644 index 2978682f172026e3882c23cb4711654c2e05dc35..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibm440sp.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * PPC440SP definitions - * - * Matt Porter - * - * Copyright 2004-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifdef __KERNEL__ -#ifndef __PPC_PLATFORMS_IBM440SP_H -#define __PPC_PLATFORMS_IBM440SP_H - - -#include - -/* UART */ -#define PPC440SP_UART0_ADDR 0x00000001f0000200ULL -#define PPC440SP_UART1_ADDR 0x00000001f0000300ULL -#define PPC440SP_UART2_ADDR 0x00000001f0000600ULL -#define UART0_INT 0 -#define UART1_INT 1 -#define UART2_INT 2 - -/* Clock and Power Management */ -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ -#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ -#define IBM_CPM_CPU 0x02000000 /* processor core */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ -#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ -#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ -#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ -#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ -#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ -#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ -#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ -#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ -#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ -#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ -#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ -#define IBM_CPM_UART2 0x00000100 /* serial port 1 */ -#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ - | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ - | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \ - | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \ - | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \ - | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 ) -#endif /* __PPC_PLATFORMS_IBM440SP_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c deleted file mode 100644 index 1afc3642e5b1ddad76e092e69cadc0e65d1b911c..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmnp405h.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - -static struct ocp_func_emac_data ibmnp405h_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 0, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 41, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; - -static struct ocp_func_emac_data ibmnp405h_emac1_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 1, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ - .wol_irq = 41, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -static struct ocp_func_emac_data ibmnp405h_emac2_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 2, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 2, /* MAL rx channel number */ - .mal_tx_chan = 4, /* MAL tx channel number */ - .wol_irq = 41, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -static struct ocp_func_emac_data ibmnp405h_emac3_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = 0, /* ZMII device index */ - .zmii_mux = 3, /* ZMII input of this EMAC */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 3, /* MAL rx channel number */ - .mal_tx_chan = 6, /* MAL tx channel number */ - .wol_irq = 41, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ibmnp405h_mal0_def = { - .num_tx_chans = 8, /* Number of TX channels */ - .num_rx_chans = 4, /* Number of RX channels */ - .txeob_irq = 17, /* TX End Of Buffer IRQ */ - .rxeob_irq = 18, /* RX End Of Buffer IRQ */ - .txde_irq = 46, /* TX Descriptor Error IRQ */ - .rxde_irq = 47, /* RX Descriptor Error IRQ */ - .serr_irq = 45, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ibmnp405h_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_OPB, - .index = 0, - .paddr = 0xEF600000, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = 0xEF600500, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ibmnp405h_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = 0xEF600700, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0 - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ibmnp405h_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = EMAC0_BASE, - .irq = 37, - .pm = IBM_CPM_EMAC0, - .additions = &ibmnp405h_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 1, - .paddr = 0xEF600900, - .irq = 38, - .pm = IBM_CPM_EMAC1, - .additions = &ibmnp405h_emac1_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 2, - .paddr = 0xEF600a00, - .irq = 39, - .pm = IBM_CPM_EMAC2, - .additions = &ibmnp405h_emac2_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 3, - .paddr = 0xEF600b00, - .irq = 40, - .pm = IBM_CPM_EMAC3, - .additions = &ibmnp405h_emac3_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_ZMII, - .paddr = 0xEF600C10, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; diff --git a/arch/ppc/platforms/4xx/ibmnp405h.h b/arch/ppc/platforms/4xx/ibmnp405h.h deleted file mode 100644 index 08a6a779190304cca2f47f5bb6891fb92c580221..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmnp405h.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBMNP405H_H__ -#define __ASM_IBMNP405H_H__ - - -/* ibm405.h at bottom of this file */ - -#define PPC405_PCI_CONFIG_ADDR 0xeec00000 -#define PPC405_PCI_CONFIG_DATA 0xeec00004 -#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */ - /* setbat */ -#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */ -#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */ -#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */ - -#define PPC405_PCI_LOWER_MEM 0x00000000 /* hose_a->mem_space.start */ -#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */ -#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */ -#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */ - -#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE - -#define PPC4xx_PCI_IO_ADDR ((uint)PPC405_PCI_PHY_IO_BASE) -#define PPC4xx_PCI_IO_SIZE ((uint)64*1024) -#define PPC4xx_PCI_CFG_ADDR ((uint)PPC405_PCI_CONFIG_ADDR) -#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) -#define PPC4xx_PCI_LCFG_ADDR ((uint)0xef400000) -#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) -#define PPC4xx_ONB_IO_ADDR ((uint)0xef600000) -#define PPC4xx_ONB_IO_SIZE ((uint)4*1024) - -/* serial port defines */ -#define RS_TABLE_SIZE 4 - -#define UART0_INT 0 -#define UART1_INT 1 -#define PCIL0_BASE 0xEF400000 -#define UART0_IO_BASE 0xEF600300 -#define UART1_IO_BASE 0xEF600400 -#define OPB0_BASE 0xEF600600 -#define EMAC0_BASE 0xEF600800 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[e][i] - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base:(u8 *) UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#if defined(CONFIG_UART0_TTYS0) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) -#endif - -#if defined(CONFIG_UART0_TTYS1) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(1) \ - STD_UART_OP(0) -#endif - -/* DCR defines */ -/* ------------------------------------------------------------------------- */ - -#define DCRN_CHCR_BASE 0x0F1 -#define DCRN_CHPSR_BASE 0x0B4 -#define DCRN_CPMSR_BASE 0x0BA -#define DCRN_CPMFR_BASE 0x0B9 -#define DCRN_CPMER_BASE 0x0B8 - -/* CPM Clocking & Power Management defines */ -#define IBM_CPM_PCI 0x40000000 /* PCI */ -#define IBM_CPM_EMAC2 0x20000000 /* EMAC 2 MII */ -#define IBM_CPM_EMAC3 0x04000000 /* EMAC 3 MII */ -#define IBM_CPM_EMAC0 0x00800000 /* EMAC 0 MII */ -#define IBM_CPM_EMAC1 0x00100000 /* EMAC 1 MII */ -#define IBM_CPM_EMMII 0 /* Shift value for MII */ -#define IBM_CPM_EMRX 1 /* Shift value for recv */ -#define IBM_CPM_EMTX 2 /* Shift value for MAC */ -#define IBM_CPM_UIC1 0x00020000 /* Universal Interrupt Controller */ -#define IBM_CPM_UIC0 0x00010000 /* Universal Interrupt Controller */ -#define IBM_CPM_CPU 0x00008000 /* processor core */ -#define IBM_CPM_EBC 0x00004000 /* ROM/SRAM peripheral controller */ -#define IBM_CPM_SDRAM0 0x00002000 /* SDRAM memory controller */ -#define IBM_CPM_GPIO0 0x00001000 /* General Purpose IO (??) */ -#define IBM_CPM_HDLC 0x00000800 /* HDCL */ -#define IBM_CPM_TMRCLK 0x00000400 /* CPU timers */ -#define IBM_CPM_PLB 0x00000100 /* PLB bus arbiter */ -#define IBM_CPM_OPB 0x00000080 /* PLB to OPB bridge */ -#define IBM_CPM_DMA 0x00000040 /* DMA controller */ -#define IBM_CPM_IIC0 0x00000010 /* IIC interface */ -#define IBM_CPM_UART0 0x00000002 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000001 /* serial port 1 */ -/* this is the default setting for devices put to sleep when booting */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_SDRAM0 | IBM_CPM_PLB \ - | IBM_CPM_OPB | IBM_CPM_TMRCLK | IBM_CPM_DMA \ - | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 | IBM_CPM_EMAC2 \ - | IBM_CPM_EMAC3 | IBM_CPM_PCI) - -#define DCRN_DMA0_BASE 0x100 -#define DCRN_DMA1_BASE 0x108 -#define DCRN_DMA2_BASE 0x110 -#define DCRN_DMA3_BASE 0x118 -#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */ -#define DCRN_DMASR_BASE 0x120 -#define DCRN_EBC_BASE 0x012 -#define DCRN_DCP0_BASE 0x014 -#define DCRN_MAL_BASE 0x180 -#define DCRN_OCM0_BASE 0x018 -#define DCRN_PLB0_BASE 0x084 -#define DCRN_PLLMR_BASE 0x0B0 -#define DCRN_POB0_BASE 0x0A0 -#define DCRN_SDRAM0_BASE 0x010 -#define DCRN_UIC0_BASE 0x0C0 -#define DCRN_UIC1_BASE 0x0D0 -#define DCRN_CPC0_EPRCSR 0x0F3 - -#define UIC0_UIC1NC 0x00000002 - -#define CHR1_CETE 0x00000004 /* CPU external timer enable */ -#define UIC0 DCRN_UIC0_BASE -#define UIC1 DCRN_UIC1_BASE - -#undef NR_UICS -#define NR_UICS 2 - -/* EMAC DCRN's FIXME: armin */ -#define DCRN_MALRXCTP2R(base) ((base) + 0x42) /* Channel Rx 2 Channel Table Pointer */ -#define DCRN_MALRXCTP3R(base) ((base) + 0x43) /* Channel Rx 3 Channel Table Pointer */ -#define DCRN_MALTXCTP4R(base) ((base) + 0x24) /* Channel Tx 4 Channel Table Pointer */ -#define DCRN_MALTXCTP5R(base) ((base) + 0x25) /* Channel Tx 5 Channel Table Pointer */ -#define DCRN_MALTXCTP6R(base) ((base) + 0x26) /* Channel Tx 6 Channel Table Pointer */ -#define DCRN_MALTXCTP7R(base) ((base) + 0x27) /* Channel Tx 7 Channel Table Pointer */ -#define DCRN_MALRCBS2(base) ((base) + 0x62) /* Channel Rx 2 Channel Buffer Size */ -#define DCRN_MALRCBS3(base) ((base) + 0x63) /* Channel Rx 3 Channel Buffer Size */ - -#include - -#endif /* __ASM_IBMNP405H_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c deleted file mode 100644 index 799a2eccccc3912d5beeb37c4cc14309eee3a9e9..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmstb4.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include - -static struct ocp_func_iic_data ibmstb4_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ibmstb4_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] __initdata = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 2, - .paddr = UART2_IO_BASE, - .irq = UART2_INT, - .pm = IBM_CPM_UART2, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = IIC0_BASE, - .irq = IIC0_IRQ, - .pm = IBM_CPM_IIC0, - .additions = &ibmstb4_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = IIC1_BASE, - .irq = IIC1_IRQ, - .pm = IBM_CPM_IIC1, - .additions = &ibmstb4_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = GPIO0_BASE, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IDE, - .paddr = IDE0_BASE, - .irq = IDE0_IRQ, - .pm = OCP_CPM_NA, - }, - { .vendor = OCP_VENDOR_INVALID, - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0x7fffff01, - .triggering = 0x00000000, - .ext_irq_mask = 0x0000007e, /* IRQ0 - IRQ5 */ - } -}; - -static struct resource ohci_usb_resources[] = { - [0] = { - .start = USB0_BASE, - .end = USB0_BASE + USB0_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = USB0_IRQ, - .end = USB0_IRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 dma_mask = 0xffffffffULL; - -static struct platform_device ohci_usb_device = { - .name = "ppc-soc-ohci", - .id = 0, - .num_resources = ARRAY_SIZE(ohci_usb_resources), - .resource = ohci_usb_resources, - .dev = { - .dma_mask = &dma_mask, - .coherent_dma_mask = 0xffffffffULL, - } -}; - -static struct platform_device *ibmstb4_devs[] __initdata = { - &ohci_usb_device, -}; - -static int __init -ibmstb4_platform_add_devices(void) -{ - return platform_add_devices(ibmstb4_devs, ARRAY_SIZE(ibmstb4_devs)); -} -arch_initcall(ibmstb4_platform_add_devices); diff --git a/arch/ppc/platforms/4xx/ibmstb4.h b/arch/ppc/platforms/4xx/ibmstb4.h deleted file mode 100644 index 31a08abaa4a210b131288074a5d45ebd204f373e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmstb4.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBMSTB4_H__ -#define __ASM_IBMSTB4_H__ - - -/* serial port defines */ -#define STB04xxx_IO_BASE ((uint)0xe0000000) -#define PPC4xx_PCI_IO_ADDR STB04xxx_IO_BASE -#define PPC4xx_ONB_IO_PADDR STB04xxx_IO_BASE -#define PPC4xx_ONB_IO_VADDR ((uint)0xe0000000) -#define PPC4xx_ONB_IO_SIZE ((uint)14*64*1024) - -/* - * map STB04xxx internal i/o address (0x400x00xx) to an address - * which is below the 2GB limit... - * - * 4000 000x uart1 -> 0xe000 000x - * 4001 00xx ppu - * 4002 00xx smart card - * 4003 000x iic - * 4004 000x uart0 - * 4005 0xxx timer - * 4006 00xx gpio - * 4007 00xx smart card - * 400b 000x iic - * 400c 000x scp - * 400d 000x modem - * 400e 000x uart2 -*/ -#define STB04xxx_MAP_IO_ADDR(a) (((uint)(a)) + (STB04xxx_IO_BASE - 0x40000000)) - -#define RS_TABLE_SIZE 3 -#define UART0_INT 20 - -#ifdef __BOOTER__ -#define UART0_IO_BASE 0x40040000 -#else -#define UART0_IO_BASE 0xe0040000 -#endif - -#define UART1_INT 21 - -#ifdef __BOOTER__ -#define UART1_IO_BASE 0x40000000 -#else -#define UART1_IO_BASE 0xe0000000 -#endif - -#define UART2_INT 31 -#ifdef __BOOTER__ -#define UART2_IO_BASE 0x400e0000 -#else -#define UART2_IO_BASE 0xe00e0000 -#endif - -#define IDE0_BASE 0x400F0000 -#define IDE0_SIZE 0x200 -#define IDE0_IRQ 25 -#define IIC0_BASE 0x40030000 -#define IIC1_BASE 0x400b0000 -#define OPB0_BASE 0x40000000 -#define GPIO0_BASE 0x40060000 - -#define USB0_BASE 0x40010000 -#define USB0_SIZE 0xA0 -#define USB0_IRQ 18 - -#define IIC_NUMS 2 -#define UART_NUMS 3 -#define IIC0_IRQ 9 -#define IIC1_IRQ 10 -#define IIC_OWN 0x55 -#define IIC_CLOCK 50 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[i] - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#if defined(CONFIG_UART0_TTYS0) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) \ - STD_UART_OP(2) -#endif - -#if defined(CONFIG_UART0_TTYS1) -#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(1) \ - STD_UART_OP(0) \ - STD_UART_OP(2) -#endif - -#if defined(CONFIG_UART0_TTYS2) -#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(2) \ - STD_UART_OP(0) \ - STD_UART_OP(1) -#endif - -#define DCRN_BE_BASE 0x090 -#define DCRN_DMA0_BASE 0x0C0 -#define DCRN_DMA1_BASE 0x0C8 -#define DCRN_DMA2_BASE 0x0D0 -#define DCRN_DMA3_BASE 0x0D8 -#define DCRNCAP_DMA_CC 1 /* have DMA chained count capability */ -#define DCRN_DMASR_BASE 0x0E0 -#define DCRN_PLB0_BASE 0x054 -#define DCRN_PLB1_BASE 0x064 -#define DCRN_POB0_BASE 0x0B0 -#define DCRN_SCCR_BASE 0x120 -#define DCRN_UIC0_BASE 0x040 -#define DCRN_BE_BASE 0x090 -#define DCRN_DMA0_BASE 0x0C0 -#define DCRN_DMA1_BASE 0x0C8 -#define DCRN_DMA2_BASE 0x0D0 -#define DCRN_DMA3_BASE 0x0D8 -#define DCRN_CIC_BASE 0x030 -#define DCRN_DMASR_BASE 0x0E0 -#define DCRN_EBIMC_BASE 0x070 -#define DCRN_DCRX_BASE 0x020 -#define DCRN_CPMFR_BASE 0x102 -#define DCRN_SCCR_BASE 0x120 -#define UIC0 DCRN_UIC0_BASE - -#define IBM_CPM_IIC0 0x80000000 /* IIC 0 interface */ -#define IBM_CPM_USB0 0x40000000 /* IEEE-1284 */ -#define IBM_CPM_IIC1 0x20000000 /* IIC 1 interface */ -#define IBM_CPM_CPU 0x10000000 /* PPC405B3 clock control */ -#define IBM_CPM_AUD 0x08000000 /* Audio Decoder */ -#define IBM_CPM_EBIU 0x04000000 /* External Bus Interface Unit */ -#define IBM_CPM_SDRAM1 0x02000000 /* SDRAM 1 memory controller */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_DMA1 0x00800000 /* reserved */ -#define IBM_CPM_XPT1 0x00400000 /* reserved */ -#define IBM_CPM_XPT2 0x00200000 /* reserved */ -#define IBM_CPM_UART1 0x00100000 /* Serial 1 / Infrared */ -#define IBM_CPM_UART0 0x00080000 /* Serial 0 / 16550 */ -#define IBM_CPM_EPI 0x00040000 /* DCR Extension */ -#define IBM_CPM_SC0 0x00020000 /* Smart Card 0 */ -#define IBM_CPM_VID 0x00010000 /* reserved */ -#define IBM_CPM_SC1 0x00008000 /* Smart Card 1 */ -#define IBM_CPM_USBSDRA 0x00004000 /* SDRAM 0 memory controller */ -#define IBM_CPM_XPT0 0x00002000 /* Transport - 54 Mhz */ -#define IBM_CPM_CBS 0x00001000 /* Cross Bar Switch */ -#define IBM_CPM_GPT 0x00000800 /* GPTPWM */ -#define IBM_CPM_GPIO0 0x00000400 /* General Purpose IO 0 */ -#define IBM_CPM_DENC 0x00000200 /* Digital video Encoder */ -#define IBM_CPM_TMRCLK 0x00000100 /* CPU timers */ -#define IBM_CPM_XPT27 0x00000080 /* Transport - 27 Mhz */ -#define IBM_CPM_UIC 0x00000040 /* Universal Interrupt Controller */ -#define IBM_CPM_SSP 0x00000010 /* Modem Serial Interface (SSP) */ -#define IBM_CPM_UART2 0x00000008 /* Serial Control Port */ -#define IBM_CPM_DDIO 0x00000004 /* Descrambler */ -#define IBM_CPM_VID2 0x00000002 /* Video Decoder clock domain 2 */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_CPU | IBM_CPM_EBIU | IBM_CPM_SDRAM1 \ - | IBM_CPM_DMA | IBM_CPM_DMA1 | IBM_CPM_CBS \ - | IBM_CPM_USBSDRA | IBM_CPM_XPT0 | IBM_CPM_TMRCLK \ - | IBM_CPM_XPT27 | IBM_CPM_UIC ) - -#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */ -#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register */ -/* DCRN_BESR */ -#define BESR_DSES 0x80000000 /* Data-Side Error Status */ -#define BESR_DMES 0x40000000 /* DMA Error Status */ -#define BESR_RWS 0x20000000 /* Read/Write Status */ -#define BESR_ETMASK 0x1C000000 /* Error Type */ -#define ET_PROT 0 -#define ET_PARITY 1 -#define ET_NCFG 2 -#define ET_BUSERR 4 -#define ET_BUSTO 6 - -#define CHR1_CETE 0x00800000 /* CPU external timer enable */ -#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */ - -#define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */ -#define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */ -#define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */ -#define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */ -#define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */ -#define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */ -#define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */ -#define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */ -#define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */ - -#define DCRN_DCRXICR (DCRN_DCRX_BASE + 0x0) /* Internal Control Register */ -#define DCRN_DCRXISR (DCRN_DCRX_BASE + 0x1) /* Internal Status Register */ -#define DCRN_DCRXECR (DCRN_DCRX_BASE + 0x2) /* External Control Register */ -#define DCRN_DCRXESR (DCRN_DCRX_BASE + 0x3) /* External Status Register */ -#define DCRN_DCRXTAR (DCRN_DCRX_BASE + 0x4) /* Target Address Register */ -#define DCRN_DCRXTDR (DCRN_DCRX_BASE + 0x5) /* Target Data Register */ -#define DCRN_DCRXIGR (DCRN_DCRX_BASE + 0x6) /* Interrupt Generation Register */ -#define DCRN_DCRXBCR (DCRN_DCRX_BASE + 0x7) /* Line Buffer Control Register */ - -#define DCRN_BRCRH0 (DCRN_EBIMC_BASE + 0x0) /* Bus Region Config High 0 */ -#define DCRN_BRCRH1 (DCRN_EBIMC_BASE + 0x1) /* Bus Region Config High 1 */ -#define DCRN_BRCRH2 (DCRN_EBIMC_BASE + 0x2) /* Bus Region Config High 2 */ -#define DCRN_BRCRH3 (DCRN_EBIMC_BASE + 0x3) /* Bus Region Config High 3 */ -#define DCRN_BRCRH4 (DCRN_EBIMC_BASE + 0x4) /* Bus Region Config High 4 */ -#define DCRN_BRCRH5 (DCRN_EBIMC_BASE + 0x5) /* Bus Region Config High 5 */ -#define DCRN_BRCRH6 (DCRN_EBIMC_BASE + 0x6) /* Bus Region Config High 6 */ -#define DCRN_BRCRH7 (DCRN_EBIMC_BASE + 0x7) /* Bus Region Config High 7 */ -#define DCRN_BRCR0 (DCRN_EBIMC_BASE + 0x10) /* BRC 0 */ -#define DCRN_BRCR1 (DCRN_EBIMC_BASE + 0x11) /* BRC 1 */ -#define DCRN_BRCR2 (DCRN_EBIMC_BASE + 0x12) /* BRC 2 */ -#define DCRN_BRCR3 (DCRN_EBIMC_BASE + 0x13) /* BRC 3 */ -#define DCRN_BRCR4 (DCRN_EBIMC_BASE + 0x14) /* BRC 4 */ -#define DCRN_BRCR5 (DCRN_EBIMC_BASE + 0x15) /* BRC 5 */ -#define DCRN_BRCR6 (DCRN_EBIMC_BASE + 0x16) /* BRC 6 */ -#define DCRN_BRCR7 (DCRN_EBIMC_BASE + 0x17) /* BRC 7 */ -#define DCRN_BEAR0 (DCRN_EBIMC_BASE + 0x20) /* Bus Error Address Register */ -#define DCRN_BESR0 (DCRN_EBIMC_BASE + 0x21) /* Bus Error Status Register */ -#define DCRN_BIUCR (DCRN_EBIMC_BASE + 0x2A) /* Bus Interfac Unit Ctrl Reg */ - -#include - -#endif /* __ASM_IBMSTB4_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ibmstbx25.c b/arch/ppc/platforms/4xx/ibmstbx25.c deleted file mode 100644 index 090ddcbecc5e7f06316ec9cc0523720a81f67b46..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmstbx25.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include - -static struct ocp_func_iic_data ibmstbx25_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] __initdata = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = UART0_IO_BASE, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = UART1_IO_BASE, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 2, - .paddr = UART2_IO_BASE, - .irq = UART2_INT, - .pm = IBM_CPM_UART2, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .paddr = IIC0_BASE, - .irq = IIC0_IRQ, - .pm = IBM_CPM_IIC0, - .additions = &ibmstbx25_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .paddr = GPIO0_BASE, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffff8f80, - .triggering = 0x00000000, - .ext_irq_mask = 0x0000707f, /* IRQ7 - IRQ9, IRQ0 - IRQ6 */ - } -}; diff --git a/arch/ppc/platforms/4xx/ibmstbx25.h b/arch/ppc/platforms/4xx/ibmstbx25.h deleted file mode 100644 index 31b63343e6416308a6ed017fe6ff585454a49728..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ibmstbx25.h +++ /dev/null @@ -1,258 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IBMSTBX25_H__ -#define __ASM_IBMSTBX25_H__ - - -/* serial port defines */ -#define STBx25xx_IO_BASE ((uint)0xe0000000) -#define PPC4xx_ONB_IO_PADDR STBx25xx_IO_BASE -#define PPC4xx_ONB_IO_VADDR ((uint)0xe0000000) -#define PPC4xx_ONB_IO_SIZE ((uint)14*64*1024) - -/* - * map STBxxxx internal i/o address (0x400x00xx) to an address - * which is below the 2GB limit... - * - * 4000 000x uart1 -> 0xe000 000x - * 4001 00xx uart2 - * 4002 00xx smart card - * 4003 000x iic - * 4004 000x uart0 - * 4005 0xxx timer - * 4006 00xx gpio - * 4007 00xx smart card - * 400b 000x iic - * 400c 000x scp - * 400d 000x modem - * 400e 000x uart2 -*/ -#define STBx25xx_MAP_IO_ADDR(a) (((uint)(a)) + (STBx25xx_IO_BASE - 0x40000000)) - -#define RS_TABLE_SIZE 3 - -#define OPB_BASE_START 0x40000000 -#define EBIU_BASE_START 0xF0100000 -#define DCR_BASE_START 0x0000 - -#ifdef __BOOTER__ -#define UART1_IO_BASE 0x40000000 -#define UART2_IO_BASE 0x40010000 -#else -#define UART1_IO_BASE 0xe0000000 -#define UART2_IO_BASE 0xe0010000 -#endif -#define SC0_BASE 0x40020000 /* smart card #0 */ -#define IIC0_BASE 0x40030000 -#ifdef __BOOTER__ -#define UART0_IO_BASE 0x40040000 -#else -#define UART0_IO_BASE 0xe0040000 -#endif -#define SCC0_BASE 0x40040000 /* Serial 0 controller IrdA */ -#define GPT0_BASE 0x40050000 /* General purpose timers */ -#define GPIO0_BASE 0x40060000 -#define SC1_BASE 0x40070000 /* smart card #1 */ -#define SCP0_BASE 0x400C0000 /* Serial Controller Port */ -#define SSP0_BASE 0x400D0000 /* Sync serial port */ - -#define IDE0_BASE 0xf0100000 -#define REDWOOD_IDE_CTRL 0xf1100000 - -#define RTCFPC_IRQ 0 -#define XPORT_IRQ 1 -#define AUD_IRQ 2 -#define AID_IRQ 3 -#define DMA0 4 -#define DMA1_IRQ 5 -#define DMA2_IRQ 6 -#define DMA3_IRQ 7 -#define SC0_IRQ 8 -#define IIC0_IRQ 9 -#define IIR0_IRQ 10 -#define GPT0_IRQ 11 -#define GPT1_IRQ 12 -#define SCP0_IRQ 13 -#define SSP0_IRQ 14 -#define GPT2_IRQ 15 /* count down timer */ -#define SC1_IRQ 16 -/* IRQ 17 - 19 external */ -#define UART0_INT 20 -#define UART1_INT 21 -#define UART2_INT 22 -#define XPTDMA_IRQ 23 -#define DCRIDE_IRQ 24 -/* IRQ 25 - 30 external */ -#define IDE0_IRQ 26 - -#define IIC_NUMS 1 -#define UART_NUMS 3 -#define IIC_OWN 0x55 -#define IIC_CLOCK 50 - -#define BD_EMAC_ADDR(e,i) bi_enetaddr[i] - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (u8 *)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#if defined(CONFIG_UART0_TTYS0) -#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) \ - STD_UART_OP(2) -#endif - -#if defined(CONFIG_UART0_TTYS1) -#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(1) \ - STD_UART_OP(0) \ - STD_UART_OP(2) -#endif - -#if defined(CONFIG_UART0_TTYS2) -#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE -#define SERIAL_PORT_DFNS \ - STD_UART_OP(2) \ - STD_UART_OP(0) \ - STD_UART_OP(1) -#endif - -#define DCRN_BE_BASE 0x090 -#define DCRN_DMA0_BASE 0x0C0 -#define DCRN_DMA1_BASE 0x0C8 -#define DCRN_DMA2_BASE 0x0D0 -#define DCRN_DMA3_BASE 0x0D8 -#define DCRNCAP_DMA_CC 1 /* have DMA chained count capability */ -#define DCRN_DMASR_BASE 0x0E0 -#define DCRN_PLB0_BASE 0x054 -#define DCRN_PLB1_BASE 0x064 -#define DCRN_POB0_BASE 0x0B0 -#define DCRN_SCCR_BASE 0x120 -#define DCRN_UIC0_BASE 0x040 -#define DCRN_BE_BASE 0x090 -#define DCRN_DMA0_BASE 0x0C0 -#define DCRN_DMA1_BASE 0x0C8 -#define DCRN_DMA2_BASE 0x0D0 -#define DCRN_DMA3_BASE 0x0D8 -#define DCRN_CIC_BASE 0x030 -#define DCRN_DMASR_BASE 0x0E0 -#define DCRN_EBIMC_BASE 0x070 -#define DCRN_DCRX_BASE 0x020 -#define DCRN_CPMFR_BASE 0x102 -#define DCRN_SCCR_BASE 0x120 -#define DCRN_RTCFP_BASE 0x310 - -#define UIC0 DCRN_UIC0_BASE - -#define IBM_CPM_IIC0 0x80000000 /* IIC 0 interface */ -#define IBM_CPM_CPU 0x10000000 /* PPC405B3 clock control */ -#define IBM_CPM_AUD 0x08000000 /* Audio Decoder */ -#define IBM_CPM_EBIU 0x04000000 /* External Bus Interface Unit */ -#define IBM_CPM_IRR 0x02000000 /* Infrared receiver */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_UART2 0x00200000 /* Serial Control Port */ -#define IBM_CPM_UART1 0x00100000 /* Serial 1 / Infrared */ -#define IBM_CPM_UART0 0x00080000 /* Serial 0 / 16550 */ -#define IBM_PM_DCRIDE 0x00040000 /* DCR timeout & IDE line Mode clock */ -#define IBM_CPM_SC0 0x00020000 /* Smart Card 0 */ -#define IBM_CPM_VID 0x00010000 /* reserved */ -#define IBM_CPM_SC1 0x00008000 /* Smart Card 0 */ -#define IBM_CPM_XPT0 0x00002000 /* Transport - 54 Mhz */ -#define IBM_CPM_CBS 0x00001000 /* Cross Bar Switch */ -#define IBM_CPM_GPT 0x00000800 /* GPTPWM */ -#define IBM_CPM_GPIO0 0x00000400 /* General Purpose IO 0 */ -#define IBM_CPM_DENC 0x00000200 /* Digital video Encoder */ -#define IBM_CPM_C405T 0x00000100 /* CPU timers */ -#define IBM_CPM_XPT27 0x00000080 /* Transport - 27 Mhz */ -#define IBM_CPM_UIC 0x00000040 /* Universal Interrupt Controller */ -#define IBM_CPM_RTCFPC 0x00000020 /* Realtime clock and front panel */ -#define IBM_CPM_SSP 0x00000010 /* Modem Serial Interface (SSP) */ -#define IBM_CPM_VID2 0x00000002 /* Video Decoder clock domain 2 */ -#define DFLT_IBM4xx_PM ~(IBM_CPM_CPU | IBM_CPM_EBIU | IBM_CPM_DMA \ - | IBM_CPM_CBS | IBM_CPM_XPT0 | IBM_CPM_C405T \ - | IBM_CPM_XPT27 | IBM_CPM_UIC) - -#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */ -#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register */ -/* DCRN_BESR */ -#define BESR_DSES 0x80000000 /* Data-Side Error Status */ -#define BESR_DMES 0x40000000 /* DMA Error Status */ -#define BESR_RWS 0x20000000 /* Read/Write Status */ -#define BESR_ETMASK 0x1C000000 /* Error Type */ -#define ET_PROT 0 -#define ET_PARITY 1 -#define ET_NCFG 2 -#define ET_BUSERR 4 -#define ET_BUSTO 6 - -#define CHR1_CETE 0x00800000 /* CPU external timer enable */ -#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */ - -#define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */ -#define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */ -#define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */ -#define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */ -#define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */ -#define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */ -#define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */ -#define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */ -#define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */ - -#define DCRN_DCRXICR (DCRN_DCRX_BASE + 0x0) /* Internal Control Register */ -#define DCRN_DCRXISR (DCRN_DCRX_BASE + 0x1) /* Internal Status Register */ -#define DCRN_DCRXECR (DCRN_DCRX_BASE + 0x2) /* External Control Register */ -#define DCRN_DCRXESR (DCRN_DCRX_BASE + 0x3) /* External Status Register */ -#define DCRN_DCRXTAR (DCRN_DCRX_BASE + 0x4) /* Target Address Register */ -#define DCRN_DCRXTDR (DCRN_DCRX_BASE + 0x5) /* Target Data Register */ -#define DCRN_DCRXIGR (DCRN_DCRX_BASE + 0x6) /* Interrupt Generation Register */ -#define DCRN_DCRXBCR (DCRN_DCRX_BASE + 0x7) /* Line Buffer Control Register */ - -#define DCRN_BRCRH0 (DCRN_EBIMC_BASE + 0x0) /* Bus Region Config High 0 */ -#define DCRN_BRCRH1 (DCRN_EBIMC_BASE + 0x1) /* Bus Region Config High 1 */ -#define DCRN_BRCRH2 (DCRN_EBIMC_BASE + 0x2) /* Bus Region Config High 2 */ -#define DCRN_BRCRH3 (DCRN_EBIMC_BASE + 0x3) /* Bus Region Config High 3 */ -#define DCRN_BRCRH4 (DCRN_EBIMC_BASE + 0x4) /* Bus Region Config High 4 */ -#define DCRN_BRCRH5 (DCRN_EBIMC_BASE + 0x5) /* Bus Region Config High 5 */ -#define DCRN_BRCRH6 (DCRN_EBIMC_BASE + 0x6) /* Bus Region Config High 6 */ -#define DCRN_BRCRH7 (DCRN_EBIMC_BASE + 0x7) /* Bus Region Config High 7 */ -#define DCRN_BRCR0 (DCRN_EBIMC_BASE + 0x10) /* BRC 0 */ -#define DCRN_BRCR1 (DCRN_EBIMC_BASE + 0x11) /* BRC 1 */ -#define DCRN_BRCR2 (DCRN_EBIMC_BASE + 0x12) /* BRC 2 */ -#define DCRN_BRCR3 (DCRN_EBIMC_BASE + 0x13) /* BRC 3 */ -#define DCRN_BRCR4 (DCRN_EBIMC_BASE + 0x14) /* BRC 4 */ -#define DCRN_BRCR5 (DCRN_EBIMC_BASE + 0x15) /* BRC 5 */ -#define DCRN_BRCR6 (DCRN_EBIMC_BASE + 0x16) /* BRC 6 */ -#define DCRN_BRCR7 (DCRN_EBIMC_BASE + 0x17) /* BRC 7 */ -#define DCRN_BEAR0 (DCRN_EBIMC_BASE + 0x20) /* Bus Error Address Register */ -#define DCRN_BESR0 (DCRN_EBIMC_BASE + 0x21) /* Bus Error Status Register */ -#define DCRN_BIUCR (DCRN_EBIMC_BASE + 0x2A) /* Bus Interfac Unit Ctrl Reg */ - -#define DCRN_RTC_FPC0_CNTL (DCRN_RTCFP_BASE + 0x00) /* RTC cntl */ -#define DCRN_RTC_FPC0_INT (DCRN_RTCFP_BASE + 0x01) /* RTC Interrupt */ -#define DCRN_RTC_FPC0_TIME (DCRN_RTCFP_BASE + 0x02) /* RTC time reg */ -#define DCRN_RTC_FPC0_ALRM (DCRN_RTCFP_BASE + 0x03) /* RTC Alarm reg */ -#define DCRN_RTC_FPC0_D1 (DCRN_RTCFP_BASE + 0x04) /* LED Data 1 */ -#define DCRN_RTC_FPC0_D2 (DCRN_RTCFP_BASE + 0x05) /* LED Data 2 */ -#define DCRN_RTC_FPC0_D3 (DCRN_RTCFP_BASE + 0x06) /* LED Data 3 */ -#define DCRN_RTC_FPC0_D4 (DCRN_RTCFP_BASE + 0x07) /* LED Data 4 */ -#define DCRN_RTC_FPC0_D5 (DCRN_RTCFP_BASE + 0x08) /* LED Data 5 */ -#define DCRN_RTC_FPC0_FCNTL (DCRN_RTCFP_BASE + 0x09) /* LED control */ -#define DCRN_RTC_FPC0_BRT (DCRN_RTCFP_BASE + 0x0A) /* Brightness cntl */ - -#include - -#endif /* __ASM_IBMSTBX25_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c deleted file mode 100644 index f6d8c2e8b6b7a92d4a268842eb4e6c42e8e2f387..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/luan.c +++ /dev/null @@ -1,371 +0,0 @@ -/* - * Luan board specific routines - * - * Matt Porter - * - * Copyright 2004-2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -static void __init -luan_calibrate_decr(void) -{ - unsigned int freq; - - if (mfspr(SPRN_CCR1) & CCR1_TCS) - freq = LUAN_TMR_CLK; - else - freq = clocks.cpu; - - ibm44x_calibrate_decr(freq); -} - -static int -luan_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: PPC440SP EVB (Luan)\n"); - - return 0; -} - -static inline int -luan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - - /* PCIX0 in adapter mode, no host interrupt routing */ - - /* PCIX1 */ - if (hose->index == 0) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 49, 49, 49, 49 }, /* IDSEL 1 - PCIX1 Slot 0 */ - { 49, 49, 49, 49 }, /* IDSEL 2 - PCIX1 Slot 1 */ - { 49, 49, 49, 49 }, /* IDSEL 3 - PCIX1 Slot 2 */ - { 49, 49, 49, 49 }, /* IDSEL 4 - PCIX1 Slot 3 */ - }; - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - /* PCIX2 */ - } else if (hose->index == 1) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 50, 50, 50, 50 }, /* IDSEL 1 - PCIX2 Slot 0 */ - { 50, 50, 50, 50 }, /* IDSEL 2 - PCIX2 Slot 1 */ - { 50, 50, 50, 50 }, /* IDSEL 3 - PCIX2 Slot 2 */ - { 50, 50, 50, 50 }, /* IDSEL 4 - PCIX2 Slot 3 */ - }; - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } - return -1; -} - -static void __init luan_set_emacdata(void) -{ - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - - /* Set phy_map, phy_mode, and mac_addr for the EMAC */ - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); - emacdata = def->additions; - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_GMII; - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); -} - -#define PCIX_READW(offset) \ - (readw((void *)((u32)pcix_reg_base+offset))) - -#define PCIX_WRITEW(value, offset) \ - (writew(value, (void *)((u32)pcix_reg_base+offset))) - -#define PCIX_WRITEL(value, offset) \ - (writel(value, (void *)((u32)pcix_reg_base+offset))) - -static void __init -luan_setup_pcix(void) -{ - int i; - void *pcix_reg_base; - - for (i=0;i<3;i++) { - pcix_reg_base = ioremap64(PCIX0_REG_BASE + i*PCIX_REG_OFFSET, PCIX_REG_SIZE); - - /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ - PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); - - /* Disable all windows */ - PCIX_WRITEL(0, PCIX0_POM0SA); - PCIX_WRITEL(0, PCIX0_POM1SA); - PCIX_WRITEL(0, PCIX0_POM2SA); - PCIX_WRITEL(0, PCIX0_PIM0SA); - PCIX_WRITEL(0, PCIX0_PIM0SAH); - PCIX_WRITEL(0, PCIX0_PIM1SA); - PCIX_WRITEL(0, PCIX0_PIM2SA); - PCIX_WRITEL(0, PCIX0_PIM2SAH); - - /* - * Setup 512MB PLB->PCI outbound mem window - * (a_n000_0000->0_n000_0000) - * */ - PCIX_WRITEL(0x0000000a, PCIX0_POM0LAH); - PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0LAL); - PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); - PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0PCIAL); - PCIX_WRITEL(0xe0000001, PCIX0_POM0SA); - - /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); - PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); - - iounmap(pcix_reg_base); - } - - eieio(); -} - -static void __init -luan_setup_hose(struct pci_controller *hose, - int lower_mem, - int upper_mem, - int cfga, - int cfgd, - u64 pcix_io_base) -{ - char name[20]; - - sprintf(name, "PCIX%d host bridge", hose->index); - - hose->pci_mem_offset = LUAN_PCIX_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - LUAN_PCIX_LOWER_IO, - LUAN_PCIX_UPPER_IO, - IORESOURCE_IO, - name); - - pci_init_resource(&hose->mem_resources[0], - lower_mem, - upper_mem, - IORESOURCE_MEM, - name); - - hose->io_space.start = LUAN_PCIX_LOWER_IO; - hose->io_space.end = LUAN_PCIX_UPPER_IO; - hose->mem_space.start = lower_mem; - hose->mem_space.end = upper_mem; - hose->io_base_virt = ioremap64(pcix_io_base, PCIX_IO_SIZE); - isa_io_base = (unsigned long) hose->io_base_virt; - - setup_indirect_pci(hose, cfga, cfgd); - hose->set_cfg_type = 1; -} - -static void __init -luan_setup_hoses(void) -{ - struct pci_controller *hose1, *hose2; - - /* Configure windows on the PCI-X host bridge */ - luan_setup_pcix(); - - /* Allocate hoses for PCIX1 and PCIX2 */ - hose1 = pcibios_alloc_controller(); - if (!hose1) - return; - - hose2 = pcibios_alloc_controller(); - if (!hose2) { - pcibios_free_controller(hose1); - return; - } - - /* Setup PCIX1 */ - hose1->first_busno = 0; - hose1->last_busno = 0xff; - - luan_setup_hose(hose1, - LUAN_PCIX1_LOWER_MEM, - LUAN_PCIX1_UPPER_MEM, - PCIX1_CFGA, - PCIX1_CFGD, - PCIX1_IO_BASE); - - hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno); - - /* Setup PCIX2 */ - hose2->first_busno = hose1->last_busno + 1; - hose2->last_busno = 0xff; - - luan_setup_hose(hose2, - LUAN_PCIX2_LOWER_MEM, - LUAN_PCIX2_UPPER_MEM, - PCIX2_CFGA, - PCIX2_CFGD, - PCIX2_IO_BASE); - - hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = luan_map_irq; -} - -TODC_ALLOC(); - -static void __init -luan_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440SP_UART0_ADDR, 8); - port.irq = UART0_INT; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - - port.membase = ioremap64(PPC440SP_UART1_ADDR, 8); - port.irq = UART1_INT; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } - - port.membase = ioremap64(PPC440SP_UART2_ADDR, 8); - port.irq = UART2_INT; - port.uartclk = BASE_BAUD; - port.line = 2; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 2 failed\n"); - } -} - -static void __init -luan_setup_arch(void) -{ - luan_set_emacdata(); - -#if !defined(CONFIG_BDI_SWITCH) - /* - * The Abatron BDI JTAG debugger does not tolerate others - * mucking with the debug registers. - */ - mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM)); -#endif - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - /* 440GX and 440SP clocking is the same -mdp */ - ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCIXn host bridges */ - luan_setup_hoses(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - luan_early_serial_map(); - - /* Identify the system */ - printk("Luan port (MontaVista Software, Inc. )\n"); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm44x_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = luan_setup_arch; - ppc_md.show_cpuinfo = luan_show_cpuinfo; - ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = luan_calibrate_decr; -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = luan_early_serial_map; -#endif -} diff --git a/arch/ppc/platforms/4xx/luan.h b/arch/ppc/platforms/4xx/luan.h deleted file mode 100644 index 68dd46b0a5c43d257de0ab3cd46fbf16f44a4748..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/luan.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Luan board definitions - * - * Matt Porter - * - * Copyright 2004-2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_LUAN_H__ -#define __ASM_LUAN_H__ - -#include - -/* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0xa0000800 - -/* Location of MAC addresses in PIBS image */ -#define PIBS_FLASH_BASE 0xffe00000 -#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400) - -/* External timer clock frequency */ -#define LUAN_TMR_CLK 25000000 - -/* Flash */ -#define LUAN_FPGA_REG_0 0x0000000148300000ULL -#define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40) -#define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL -#define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL -#define LUAN_SMALL_FLASH_SIZE 0x100000 -#define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL -#define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL -#define LUAN_LARGE_FLASH_SIZE 0x400000 - -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 3 - -/* PIBS defined UART mappings, used before early_serial_setup */ -#define UART0_IO_BASE 0xa0000200 -#define UART1_IO_BASE 0xa0000300 -#define UART2_IO_BASE 0xa0000600 - -#define BASE_BAUD 11059200 -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) \ - STD_UART_OP(2) - -/* PCI support */ -#define LUAN_PCIX_LOWER_IO 0x00000000 -#define LUAN_PCIX_UPPER_IO 0x0000ffff -#define LUAN_PCIX0_LOWER_MEM 0x80000000 -#define LUAN_PCIX0_UPPER_MEM 0x9fffffff -#define LUAN_PCIX1_LOWER_MEM 0xa0000000 -#define LUAN_PCIX1_UPPER_MEM 0xbfffffff -#define LUAN_PCIX2_LOWER_MEM 0xc0000000 -#define LUAN_PCIX2_UPPER_MEM 0xdfffffff - -#define LUAN_PCIX_MEM_SIZE 0x20000000 -#define LUAN_PCIX_MEM_OFFSET 0x00000000 - -#endif /* __ASM_LUAN_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c deleted file mode 100644 index 308386ef6f771143d6744f25671fc17f96ebb0b1..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ocotea.c +++ /dev/null @@ -1,350 +0,0 @@ -/* - * Ocotea board specific routines - * - * Matt Porter - * - * Copyright 2003-2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -static void __init -ocotea_calibrate_decr(void) -{ - unsigned int freq; - - if (mfspr(SPRN_CCR1) & CCR1_TCS) - freq = OCOTEA_TMR_CLK; - else - freq = clocks.cpu; - - ibm44x_calibrate_decr(freq); -} - -static int -ocotea_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: PPC440GX EVB (Ocotea)\n"); - ibm440gx_show_cpuinfo(m); - return 0; -} - -static inline int -ocotea_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 23, 23, 23, 23 }, /* IDSEL 1 - PCI Slot 0 */ - { 24, 24, 24, 24 }, /* IDSEL 2 - PCI Slot 1 */ - { 25, 25, 25, 25 }, /* IDSEL 3 - PCI Slot 2 */ - { 26, 26, 26, 26 }, /* IDSEL 4 - PCI Slot 3 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __init ocotea_set_emacdata(void) -{ - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - int i; - - /* - * Note: Current rev. board only operates in Group 4a - * mode, so we always set EMAC0-1 for SMII and EMAC2-3 - * for RGMII (though these could run in RTBI just the same). - * - * The FPGA reg 3 information isn't even suitable for - * determining the phy_mode, so if the board becomes - * usable in !4a, it will be necessary to parse an environment - * variable from the firmware or similar to properly configure - * the phy_map/phy_mode. - */ - /* Set phy_map, phy_mode, and mac_addr for each EMAC */ - for (i=0; i<4; i++) { - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); - emacdata = def->additions; - if (i < 2) { - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_SMII; - } - else { - emacdata->phy_map = 0x0000ffff; /* Skip 0x00-0x0f */ - emacdata->phy_mode = PHY_MODE_RGMII; - } - if (i == 0) - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); - else if (i == 1) - memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); - else if (i == 2) - memcpy(emacdata->mac_addr, __res.bi_enet2addr, 6); - else if (i == 3) - memcpy(emacdata->mac_addr, __res.bi_enet3addr, 6); - } -} - -#define PCIX_READW(offset) \ - (readw(pcix_reg_base+offset)) - -#define PCIX_WRITEW(value, offset) \ - (writew(value, pcix_reg_base+offset)) - -#define PCIX_WRITEL(value, offset) \ - (writel(value, pcix_reg_base+offset)) - -/* - * FIXME: This is only here to "make it work". This will move - * to a ibm_pcix.c which will contain a generic IBM PCIX bridge - * configuration library. -Matt - */ -static void __init -ocotea_setup_pcix(void) -{ - void *pcix_reg_base; - - pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); - - /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ - PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); - - /* Disable all windows */ - PCIX_WRITEL(0, PCIX0_POM0SA); - PCIX_WRITEL(0, PCIX0_POM1SA); - PCIX_WRITEL(0, PCIX0_POM2SA); - PCIX_WRITEL(0, PCIX0_PIM0SA); - PCIX_WRITEL(0, PCIX0_PIM0SAH); - PCIX_WRITEL(0, PCIX0_PIM1SA); - PCIX_WRITEL(0, PCIX0_PIM2SA); - PCIX_WRITEL(0, PCIX0_PIM2SAH); - - /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */ - PCIX_WRITEL(0x00000003, PCIX0_POM0LAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0LAL); - PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL); - PCIX_WRITEL(0x80000001, PCIX0_POM0SA); - - /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0x80000007, PCIX0_PIM0SA); - - eieio(); -} - -static void __init -ocotea_setup_hose(void) -{ - struct pci_controller *hose; - - /* Configure windows on the PCI-X host bridge */ - ocotea_setup_pcix(); - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - hose->pci_mem_offset = OCOTEA_PCI_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - OCOTEA_PCI_LOWER_IO, - OCOTEA_PCI_UPPER_IO, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - OCOTEA_PCI_LOWER_MEM, - OCOTEA_PCI_UPPER_MEM, - IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = OCOTEA_PCI_LOWER_IO; - hose->io_space.end = OCOTEA_PCI_UPPER_IO; - hose->mem_space.start = OCOTEA_PCI_LOWER_MEM; - hose->mem_space.end = OCOTEA_PCI_UPPER_MEM; - hose->io_base_virt = ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE); - isa_io_base = (unsigned long) hose->io_base_virt; - - setup_indirect_pci(hose, - OCOTEA_PCI_CFGA_PLB32, - OCOTEA_PCI_CFGD_PLB32); - hose->set_cfg_type = 1; - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = ocotea_map_irq; -} - - -TODC_ALLOC(); - -static void __init -ocotea_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440GX_UART0_ADDR, 8); - port.irq = UART0_INT; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(0, &port); - - /* Purge TLB entry added in head_44x.S for early serial access */ - _tlbie(UART0_IO_BASE, 0); -#endif - - port.membase = ioremap64(PPC440GX_UART1_ADDR, 8); - port.irq = UART1_INT; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(1, &port); -#endif -} - -static void __init -ocotea_setup_arch(void) -{ - ocotea_set_emacdata(); - - ibm440gx_tah_enable(); - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - ibm440gx_get_clocks(&clocks, 33300000, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* Setup TODC access */ - TODC_INIT(TODC_TYPE_DS1743, - 0, - 0, - ioremap64(OCOTEA_RTC_ADDR, OCOTEA_RTC_SIZE), - 8); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCI host bridge */ - ocotea_setup_hose(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - ocotea_early_serial_map(); - - /* Identify the system */ - printk("IBM Ocotea port (MontaVista Software, Inc. )\n"); -} - -static void __init ocotea_init(void) -{ - ibm440gx_l2c_setup(&clocks); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm440gx_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ocotea_setup_arch; - ppc_md.show_cpuinfo = ocotea_show_cpuinfo; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = ocotea_calibrate_decr; - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = ocotea_early_serial_map; -#endif - ppc_md.init = ocotea_init; -} diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h deleted file mode 100644 index 89730ce2322cec1b0ca933fcf6340e96e4cb8155..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ocotea.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * Ocotea board definitions - * - * Matt Porter - * - * Copyright 2003-2005 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_OCOTEA_H__ -#define __ASM_OCOTEA_H__ - -#include - -/* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0xe0000800 - -/* Location of MAC addresses in PIBS image */ -#define PIBS_FLASH_BASE 0xfff00000 -#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xb0500) -#define PIBS_MAC_SIZE 0x200 -#define PIBS_MAC_OFFSET 0x100 - -/* External timer clock frequency */ -#define OCOTEA_TMR_CLK 25000000 - -/* RTC/NVRAM location */ -#define OCOTEA_RTC_ADDR 0x0000000148000000ULL -#define OCOTEA_RTC_SIZE 0x2000 - -/* Flash */ -#define OCOTEA_FPGA_REG_0 0x0000000148300000ULL -#define OCOTEA_BOOT_LARGE_FLASH(x) (x & 0x40) -#define OCOTEA_SMALL_FLASH_LOW 0x00000001ff900000ULL -#define OCOTEA_SMALL_FLASH_HIGH 0x00000001fff00000ULL -#define OCOTEA_SMALL_FLASH_SIZE 0x100000 -#define OCOTEA_LARGE_FLASH_LOW 0x00000001ff800000ULL -#define OCOTEA_LARGE_FLASH_HIGH 0x00000001ffc00000ULL -#define OCOTEA_LARGE_FLASH_SIZE 0x400000 - -/* FPGA_REG_3 (Ethernet Groups) */ -#define OCOTEA_FPGA_REG_3 0x0000000148300003ULL - -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 2 - -#if defined(__BOOTER__) -/* OpenBIOS defined UART mappings, used by bootloader shim */ -#define UART0_IO_BASE 0xE0000200 -#define UART1_IO_BASE 0xE0000300 -#else -/* head_44x.S created UART mapping, used before early_serial_setup. - * We cannot use default OpenBIOS UART mappings because they - * don't work for configurations with more than 512M RAM. --ebs - */ -#define UART0_IO_BASE 0xF0000200 -#define UART1_IO_BASE 0xF0000300 -#endif - -#define BASE_BAUD 11059200/16 -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -/* PCI support */ -#define OCOTEA_PCI_LOWER_IO 0x00000000 -#define OCOTEA_PCI_UPPER_IO 0x0000ffff -#define OCOTEA_PCI_LOWER_MEM 0x80000000 -#define OCOTEA_PCI_UPPER_MEM 0xffffefff - -#define OCOTEA_PCI_CFGREGS_BASE 0x000000020ec00000ULL -#define OCOTEA_PCI_CFGA_PLB32 0x0ec00000 -#define OCOTEA_PCI_CFGD_PLB32 0x0ec00004 - -#define OCOTEA_PCI_IO_BASE 0x0000000208000000ULL -#define OCOTEA_PCI_IO_SIZE 0x00010000 -#define OCOTEA_PCI_MEM_OFFSET 0x00000000 - -#endif /* __ASM_OCOTEA_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ppc440spe.c b/arch/ppc/platforms/4xx/ppc440spe.c deleted file mode 100644 index 1be5d1c8e266db92428cae4c4df222ed629816e4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ppc440spe.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * PPC440SPe I/O descriptions - * - * Roland Dreier - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * - * Matt Porter - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include - -static struct ocp_func_emac_data ppc440spe_emac0_def = { - .rgmii_idx = -1, /* No RGMII */ - .rgmii_mux = -1, /* No RGMII */ - .zmii_idx = -1, /* No ZMII */ - .zmii_mux = -1, /* No ZMII */ - .mal_idx = 0, /* MAL device index */ - .mal_rx_chan = 0, /* MAL rx channel number */ - .mal_tx_chan = 0, /* MAL tx channel number */ - .wol_irq = 61, /* WOL interrupt number */ - .mdio_idx = -1, /* No shared MDIO */ - .tah_idx = -1, /* No TAH */ -}; -OCP_SYSFS_EMAC_DATA() - -static struct ocp_func_mal_data ppc440spe_mal0_def = { - .num_tx_chans = 1, /* Number of TX channels */ - .num_rx_chans = 1, /* Number of RX channels */ - .txeob_irq = 38, /* TX End Of Buffer IRQ */ - .rxeob_irq = 39, /* RX End Of Buffer IRQ */ - .txde_irq = 34, /* TX Descriptor Error IRQ */ - .rxde_irq = 35, /* RX Descriptor Error IRQ */ - .serr_irq = 33, /* MAL System Error IRQ */ - .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ -}; -OCP_SYSFS_MAL_DATA() - -static struct ocp_func_iic_data ppc440spe_iic0_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; - -static struct ocp_func_iic_data ppc440spe_iic1_def = { - .fast_mode = 0, /* Use standad mode (100Khz) */ -}; -OCP_SYSFS_IIC_DATA() - -struct ocp_def core_ocp[] = { - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 0, - .paddr = PPC440SPE_UART0_ADDR, - .irq = UART0_INT, - .pm = IBM_CPM_UART0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 1, - .paddr = PPC440SPE_UART1_ADDR, - .irq = UART1_INT, - .pm = IBM_CPM_UART1, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_16550, - .index = 2, - .paddr = PPC440SPE_UART2_ADDR, - .irq = UART2_INT, - .pm = IBM_CPM_UART2, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 0, - .paddr = 0x00000004f0000400ULL, - .irq = 2, - .pm = IBM_CPM_IIC0, - .additions = &ppc440spe_iic0_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_IIC, - .index = 1, - .paddr = 0x00000004f0000500ULL, - .irq = 3, - .pm = IBM_CPM_IIC1, - .additions = &ppc440spe_iic1_def, - .show = &ocp_show_iic_data - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_GPIO, - .index = 0, - .paddr = 0x00000004f0000700ULL, - .irq = OCP_IRQ_NA, - .pm = IBM_CPM_GPIO0, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_MAL, - .paddr = OCP_PADDR_NA, - .irq = OCP_IRQ_NA, - .pm = OCP_CPM_NA, - .additions = &ppc440spe_mal0_def, - .show = &ocp_show_mal_data, - }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_EMAC, - .index = 0, - .paddr = 0x00000004f0000800ULL, - .irq = 60, - .pm = OCP_CPM_NA, - .additions = &ppc440spe_emac0_def, - .show = &ocp_show_emac_data, - }, - { .vendor = OCP_VENDOR_INVALID - } -}; - -/* Polarity and triggering settings for internal interrupt sources */ -struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { - { .polarity = 0xffffffff, - .triggering = 0x010f0004, - .ext_irq_mask = 0x00000000, - }, - { .polarity = 0xffffffff, - .triggering = 0x001f8040, - .ext_irq_mask = 0x00007c30, /* IRQ6 - IRQ7, IRQ8 - IRQ12 */ - }, - { .polarity = 0xffffffff, - .triggering = 0x00000000, - .ext_irq_mask = 0x000000fc, /* IRQ0 - IRQ5 */ - }, - { .polarity = 0xffffffff, - .triggering = 0x00000000, - .ext_irq_mask = 0x00000000, - }, -}; diff --git a/arch/ppc/platforms/4xx/ppc440spe.h b/arch/ppc/platforms/4xx/ppc440spe.h deleted file mode 100644 index f1e867c4c9fc0d565b276f5a2261180dc9175bfe..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/ppc440spe.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * PPC440SPe definitions - * - * Roland Dreier - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * - * Matt Porter - * Copyright 2004-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifdef __KERNEL__ -#ifndef __PPC_PLATFORMS_PPC440SPE_H -#define __PPC_PLATFORMS_PPC440SPE_H - - -#include - -/* UART */ -#define PPC440SPE_UART0_ADDR 0x00000004f0000200ULL -#define PPC440SPE_UART1_ADDR 0x00000004f0000300ULL -#define PPC440SPE_UART2_ADDR 0x00000004f0000600ULL -#define UART0_INT 0 -#define UART1_INT 1 -#define UART2_INT 37 - -/* Clock and Power Management */ -#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ -#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ -#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ -#define IBM_CPM_CPU 0x02000000 /* processor core */ -#define IBM_CPM_DMA 0x01000000 /* DMA controller */ -#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ -#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ -#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ -#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ -#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ -#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ -#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ -#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ -#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ -#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ -#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ -#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ -#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ -#define IBM_CPM_UART2 0x00000100 /* serial port 1 */ -#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ -#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ -#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */ - -#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ - | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ - | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ - | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \ - | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \ - | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \ - | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 ) -#endif /* __PPC_PLATFORMS_PPC440SP_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c deleted file mode 100644 index edf4d37d1a5251f5f650aec7cbf7776b45580cc4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/redwood5.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Support for the IBM redwood5 eval board file - * - * Author: Armin Kuster - * - * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * Define external IRQ senses and polarities. - */ -unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */ -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = SMC91111_BASE_ADDR, - .end = SMC91111_BASE_ADDR + SMC91111_REG_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = SMC91111_IRQ, - .end = SMC91111_IRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct platform_device *redwood5_devs[] __initdata = { - &smc91x_device, -}; - -static int __init -redwood5_platform_add_devices(void) -{ - return platform_add_devices(redwood5_devs, ARRAY_SIZE(redwood5_devs)); -} - -void __init -redwood5_setup_arch(void) -{ - ppc4xx_setup_arch(); - -#ifdef CONFIG_DEBUG_BRINGUP - printk("\n"); - printk("machine\t: %s\n", PPC4xx_MACHINE_NAME); - printk("\n"); - printk("bi_s_version\t %s\n", bip->bi_s_version); - printk("bi_r_version\t %s\n", bip->bi_r_version); - printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize,bip->bi_memsize/(1024*1000)); - printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0, - bip->bi_enetaddr[0], bip->bi_enetaddr[1], - bip->bi_enetaddr[2], bip->bi_enetaddr[3], - bip->bi_enetaddr[4], bip->bi_enetaddr[5]); - - printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n", - bip->bi_intfreq, bip->bi_intfreq/ 1000000); - - printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n", - bip->bi_busfreq, bip->bi_busfreq / 1000000 ); - printk("bi_tbfreq\t 0x%8.8x\t TB freq:\t %dMHz\n", - bip->bi_tbfreq, bip->bi_tbfreq/1000000); - - printk("\n"); -#endif - device_initcall(redwood5_platform_add_devices); -} - -void __init -redwood5_map_io(void) -{ - int i; - - ppc4xx_map_io(); - for (i = 0; i < 16; i++) { - unsigned long v, p; - - /* 0x400x0000 -> 0xe00x0000 */ - p = 0x40000000 | (i << 16); - v = STB04xxx_IO_BASE | (i << 16); - - io_block_mapping(v, p, PAGE_SIZE, - _PAGE_NO_CACHE | pgprot_val(PAGE_KERNEL) | _PAGE_GUARDED); - } - - -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = redwood5_setup_arch; - ppc_md.setup_io_mappings = redwood5_map_io; -} diff --git a/arch/ppc/platforms/4xx/redwood5.h b/arch/ppc/platforms/4xx/redwood5.h deleted file mode 100644 index 49edd4818970968bc9727cfaa3a8a5f83a081e2b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/redwood5.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Macros, definitions, and data structures specific to the IBM PowerPC - * STB03xxx "Redwood" evaluation board. - * - * Author: Armin Kuster - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_REDWOOD5_H__ -#define __ASM_REDWOOD5_H__ - -/* Redwood5 has an STB04xxx core */ -#include - -#ifndef __ASSEMBLY__ -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned int bi_dummy; /* field shouldn't exist */ - unsigned char bi_enetaddr[6]; /* Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* Bus speed, in Hz */ - unsigned int bi_tbfreq; /* Software timebase freq */ -} bd_t; -#endif /* !__ASSEMBLY__ */ - - -#define SMC91111_BASE_ADDR 0xf2000300 -#define SMC91111_REG_SIZE 16 -#define SMC91111_IRQ 28 - -#ifdef MAX_HWIFS -#undef MAX_HWIFS -#endif -#define MAX_HWIFS 1 - -#define _IO_BASE 0 -#define _ISA_MEM_BASE 0 -#define PCI_DRAM_OFFSET 0 - -#define BASE_BAUD (378000000 / 18 / 16) - -#define PPC4xx_MACHINE_NAME "IBM Redwood5" - -#endif /* __ASM_REDWOOD5_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/redwood6.c b/arch/ppc/platforms/4xx/redwood6.c deleted file mode 100644 index 006e29f83a1a31613f32517ac5e0c734d01caafb..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/redwood6.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Define external IRQ senses and polarities. - */ -unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 7 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 8 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 9 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 6 */ -}; - -static struct resource smc91x_resources[] = { - [0] = { - .start = SMC91111_BASE_ADDR, - .end = SMC91111_BASE_ADDR + SMC91111_REG_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = SMC91111_IRQ, - .end = SMC91111_IRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device smc91x_device = { - .name = "smc91x", - .id = 0, - .num_resources = ARRAY_SIZE(smc91x_resources), - .resource = smc91x_resources, -}; - -static struct platform_device *redwood6_devs[] __initdata = { - &smc91x_device, -}; - -static int __init -redwood6_platform_add_devices(void) -{ - return platform_add_devices(redwood6_devs, ARRAY_SIZE(redwood6_devs)); -} - - -void __init -redwood6_setup_arch(void) -{ -#ifdef CONFIG_IDE - void *xilinx, *xilinx_1, *xilinx_2; - unsigned short us_reg5; -#endif - - ppc4xx_setup_arch(); - -#ifdef CONFIG_IDE - xilinx = (unsigned long) ioremap(IDE_XLINUX_MUX_BASE, 0x10); - /* init xilinx control registers - enable ide mux, clear reset bit */ - if (!xilinx) { - printk(KERN_CRIT - "redwood6_setup_arch() xilinxi ioremap failed\n"); - return; - } - xilinx_1 = xilinx + 0xa; - xilinx_2 = xilinx + 0xe; - - us_reg5 = readb(xilinx_1); - writeb(0x01d1, xilinx_1); - writeb(0x0008, xilinx_2); - - udelay(10 * 1000); - - writeb(0x01d1, xilinx_1); - writeb(0x0008, xilinx_2); -#endif - -#ifdef DEBUG_BRINGUP - bd_t *bip = (bd_t *) __res; - printk("\n"); - printk("machine\t: %s\n", PPC4xx_MACHINE_NAME); - printk("\n"); - printk("bi_s_version\t %s\n", bip->bi_s_version); - printk("bi_r_version\t %s\n", bip->bi_r_version); - printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize, - bip->bi_memsize / (1024 * 1000)); - printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0, - bip->bi_enetaddr[0], bip->bi_enetaddr[1], bip->bi_enetaddr[2], - bip->bi_enetaddr[3], bip->bi_enetaddr[4], bip->bi_enetaddr[5]); - - printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n", - bip->bi_intfreq, bip->bi_intfreq / 1000000); - - printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n", - bip->bi_busfreq, bip->bi_busfreq / 1000000); - printk("bi_tbfreq\t 0x%8.8x\t TB freq:\t %dMHz\n", - bip->bi_tbfreq, bip->bi_tbfreq / 1000000); - - printk("\n"); -#endif - - /* Identify the system */ - printk(KERN_INFO "IBM Redwood6 (STBx25XX) Platform\n"); - printk(KERN_INFO - "Port by MontaVista Software, Inc. (source@mvista.com)\n"); - - device_initcall(redwood6_platform_add_devices); -} - -void __init -redwood6_map_io(void) -{ - int i; - - ppc4xx_map_io(); - for (i = 0; i < 16; i++) { - unsigned long v, p; - - /* 0x400x0000 -> 0xe00x0000 */ - p = 0x40000000 | (i << 16); - v = STBx25xx_IO_BASE | (i << 16); - - io_block_mapping(v, p, PAGE_SIZE, - _PAGE_NO_CACHE | pgprot_val(PAGE_KERNEL) | - _PAGE_GUARDED); - } -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = redwood6_setup_arch; - ppc_md.setup_io_mappings = redwood6_map_io; -} diff --git a/arch/ppc/platforms/4xx/redwood6.h b/arch/ppc/platforms/4xx/redwood6.h deleted file mode 100644 index 1edcbe5c51c7f25e7f01c77656a69b52d982c6c6..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/redwood6.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Macros, definitions, and data structures specific to the IBM PowerPC - * STBx25xx "Redwood6" evaluation board. - * - * Author: Armin Kuster - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_REDWOOD5_H__ -#define __ASM_REDWOOD5_H__ - -/* Redwood6 has an STBx25xx core */ -#include - -#ifndef __ASSEMBLY__ -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned int bi_dummy; /* field shouldn't exist */ - unsigned char bi_enetaddr[6]; /* Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* Bus speed, in Hz */ - unsigned int bi_tbfreq; /* Software timebase freq */ -} bd_t; -#endif /* !__ASSEMBLY__ */ - -#define SMC91111_BASE_ADDR 0xf2030300 -#define SMC91111_REG_SIZE 16 -#define SMC91111_IRQ 27 -#define IDE_XLINUX_MUX_BASE 0xf2040000 -#define IDE_DMA_ADDR 0xfce00000 - -#ifdef MAX_HWIFS -#undef MAX_HWIFS -#endif -#define MAX_HWIFS 1 - -#define _IO_BASE 0 -#define _ISA_MEM_BASE 0 -#define PCI_DRAM_OFFSET 0 - -#define BASE_BAUD (378000000 / 18 / 16) - -#define PPC4xx_MACHINE_NAME "IBM Redwood6" - -#endif /* __ASM_REDWOOD5_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c deleted file mode 100644 index 8689f3e8ef3a35dd15026713054e2733a1577483..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/sycamore.c +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Architecture- / platform-specific boot-time initialization code for - * IBM PowerPC 4xx based boards. - * - * Author: Armin Kuster - * - * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -void *kb_cs; -void *kb_data; -void *sycamore_rtc_base; - -/* - * Define external IRQ senses and polarities. - */ -unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 7 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 8 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 9 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 10 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 11 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 12 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 6 */ -}; - - -/* Some IRQs unique to Sycamore. - * Used by the generic 405 PCI setup functions in ppc4xx_pci.c - */ -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ - {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ - {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ - {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -void __init -sycamore_setup_arch(void) -{ - void *fpga_brdc; - unsigned char fpga_brdc_data; - void *fpga_enable; - void *fpga_polarity; - void *fpga_status; - void *fpga_trigger; - - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 0); - - kb_data = ioremap(SYCAMORE_PS2_BASE, 8); - if (!kb_data) { - printk(KERN_CRIT - "sycamore_setup_arch() kb_data ioremap failed\n"); - return; - } - - kb_cs = kb_data + 1; - - fpga_status = ioremap(PPC40x_FPGA_BASE, 8); - if (!fpga_status) { - printk(KERN_CRIT - "sycamore_setup_arch() fpga_status ioremap failed\n"); - return; - } - - fpga_enable = fpga_status + 1; - fpga_polarity = fpga_status + 2; - fpga_trigger = fpga_status + 3; - fpga_brdc = fpga_status + 4; - - /* split the keyboard and mouse interrupts */ - fpga_brdc_data = readb(fpga_brdc); - fpga_brdc_data |= 0x80; - writeb(fpga_brdc_data, fpga_brdc); - - writeb(0x3, fpga_enable); - - writeb(0x3, fpga_polarity); - - writeb(0x3, fpga_trigger); - - /* RTC step for the sycamore */ - sycamore_rtc_base = (void *) SYCAMORE_RTC_VADDR; - TODC_INIT(TODC_TYPE_DS1743, sycamore_rtc_base, sycamore_rtc_base, - sycamore_rtc_base, 8); - - /* Identify the system */ - printk(KERN_INFO "IBM Sycamore (IBM405GPr) Platform\n"); - printk(KERN_INFO - "Port by MontaVista Software, Inc. (source@mvista.com)\n"); -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ -#ifdef CONFIG_PCI - unsigned int bar_response, bar; - /* - * Expected PCI mapping: - * - * PLB addr PCI memory addr - * --------------------- --------------------- - * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff - * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff - * - * PLB addr PCI io addr - * --------------------- --------------------- - * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 - * - * The following code is simplified by assuming that the bootrom - * has been well behaved in following this mapping. - */ - -#ifdef DEBUG - int i; - - printk("ioremap PCLIO_BASE = 0x%x\n", pcip); - printk("PCI bridge regs before fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif - - /* added for IBM boot rom version 1.15 bios bar changes -AK */ - - /* Disable region first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Enable inbound region one - 1GB size */ - out_le32((void *) &(pcip->ptm1ms), 0xc0000001); - - /* Disable outbound region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - - /* Disable inbound region two */ - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - - /* Disable outbound region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - /* end workaround */ - -#ifdef DEBUG - printk("PCI bridge regs after fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif -#endif - -} - -void __init -sycamore_map_io(void) -{ - ppc4xx_map_io(); - io_block_mapping(SYCAMORE_RTC_VADDR, - SYCAMORE_RTC_PADDR, SYCAMORE_RTC_SIZE, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = sycamore_setup_arch; - ppc_md.setup_io_mappings = sycamore_map_io; - -#ifdef CONFIG_GEN_RTC - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#endif -} diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h deleted file mode 100644 index 69b169eac053025e4efb68c72f4c547fec83b96c..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/sycamore.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Sycamore board definitions - * - * Copyright (c) 2005 DENX Software Engineering - * Stefan Roese - * - * Based on original work by - * Armin Kuster - * 2000 (c) MontaVista, Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_SYCAMORE_H__ -#define __ASM_SYCAMORE_H__ - -#include -#include - -/* Memory map for the IBM "Sycamore" 405GPr evaluation board. - * Generic 4xx plus RTC. - */ - -#define SYCAMORE_RTC_PADDR ((uint)0xf0000000) -#define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR -#define SYCAMORE_RTC_SIZE ((uint)8*1024) - -#define BASE_BAUD 691200 - -#define SYCAMORE_PS2_BASE 0xF0100000 - -/* Flash */ -#define PPC40x_FPGA_BASE 0xF0300000 -#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */ -#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) -#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) -#define PPC40x_FLASH_LOW 0xFFF00000 -#define PPC40x_FLASH_HIGH 0xFFF80000 -#define PPC40x_FLASH_SIZE 0x80000 - -#define PPC4xx_MACHINE_NAME "IBM Sycamore" - -#endif /* __ASM_SYCAMORE_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c deleted file mode 100644 index 115694275083a2e16a783e37fd8689190a0afe0b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/taishan.c +++ /dev/null @@ -1,395 +0,0 @@ -/* - * arch/ppc/platforms/4xx/taishan.c - * - * AMCC Taishan board specific routines - * - * Copyright 2007 DENX Software Engineering, Stefan Roese - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -/* - * NOR FLASH configuration (using mtd physmap driver) - */ - -/* start will be added dynamically, end is always fixed */ -static struct resource taishan_nor_resource = { - .start = TAISHAN_FLASH_ADDR, - .end = 0x1ffffffffULL, - .flags = IORESOURCE_MEM, -}; - -#define RW_PART0_OF 0 -#define RW_PART0_SZ 0x180000 -#define RW_PART1_SZ 0x200000 -/* Partition 2 will be autosized dynamically... */ -#define RW_PART3_SZ 0x80000 -#define RW_PART4_SZ 0x40000 - -static struct mtd_partition taishan_nor_parts[] = { - { - .name = "kernel", - .offset = 0, - .size = RW_PART0_SZ - }, - { - .name = "root", - .offset = MTDPART_OFS_APPEND, - .size = RW_PART1_SZ, - }, - { - .name = "user", - .offset = MTDPART_OFS_APPEND, -/* .size = RW_PART2_SZ */ /* will be adjusted dynamically */ - }, - { - .name = "env", - .offset = MTDPART_OFS_APPEND, - .size = RW_PART3_SZ, - }, - { - .name = "u-boot", - .offset = MTDPART_OFS_APPEND, - .size = RW_PART4_SZ, - } -}; - -static struct physmap_flash_data taishan_nor_data = { - .width = 4, - .parts = taishan_nor_parts, - .nr_parts = ARRAY_SIZE(taishan_nor_parts), -}; - -static struct platform_device taishan_nor_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &taishan_nor_data, - }, - .num_resources = 1, - .resource = &taishan_nor_resource, -}; - -static int taishan_setup_flash(void) -{ - /* - * Adjust partition 2 to flash size - */ - taishan_nor_parts[2].size = __res.bi_flashsize - - RW_PART0_SZ - RW_PART1_SZ - RW_PART3_SZ - RW_PART4_SZ; - - platform_device_register(&taishan_nor_device); - - return 0; -} -arch_initcall(taishan_setup_flash); - -static void __init -taishan_calibrate_decr(void) -{ - unsigned int freq; - - if (mfspr(SPRN_CCR1) & CCR1_TCS) - freq = TAISHAN_TMR_CLK; - else - freq = clocks.cpu; - - ibm44x_calibrate_decr(freq); -} - -static int -taishan_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: AMCC\n"); - seq_printf(m, "machine\t\t: PPC440GX EVB (Taishan)\n"); - ibm440gx_show_cpuinfo(m); - return 0; -} - -static inline int -taishan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 23, 24, 25, 26 }, /* IDSEL 1 - PCI Slot 0 */ - { 24, 25, 26, 23 }, /* IDSEL 2 - PCI Slot 1 */ - }; - - const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __init taishan_set_emacdata(void) -{ - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - int i; - - /* Set phy_map, phy_mode, and mac_addr for each EMAC */ - for (i=2; i<4; i++) { - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); - emacdata = def->additions; - if (i < 2) { - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_SMII; - } else { - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_RGMII; - } - if (i == 0) - memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); - else if (i == 1) - memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); - else if (i == 2) - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); - else if (i == 3) - memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); - } -} - -#define PCIX_READW(offset) \ - (readw(pcix_reg_base+offset)) - -#define PCIX_WRITEW(value, offset) \ - (writew(value, pcix_reg_base+offset)) - -#define PCIX_WRITEL(value, offset) \ - (writel(value, pcix_reg_base+offset)) - -/* - * FIXME: This is only here to "make it work". This will move - * to a ibm_pcix.c which will contain a generic IBM PCIX bridge - * configuration library. -Matt - */ -static void __init -taishan_setup_pcix(void) -{ - void *pcix_reg_base; - - pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); - - /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ - PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); - - /* Disable all windows */ - PCIX_WRITEL(0, PCIX0_POM0SA); - PCIX_WRITEL(0, PCIX0_POM1SA); - PCIX_WRITEL(0, PCIX0_POM2SA); - PCIX_WRITEL(0, PCIX0_PIM0SA); - PCIX_WRITEL(0, PCIX0_PIM0SAH); - PCIX_WRITEL(0, PCIX0_PIM1SA); - PCIX_WRITEL(0, PCIX0_PIM2SA); - PCIX_WRITEL(0, PCIX0_PIM2SAH); - - /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */ - PCIX_WRITEL(0x00000003, PCIX0_POM0LAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0LAL); - PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); - PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL); - PCIX_WRITEL(0x80000001, PCIX0_POM0SA); - - /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); - PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); - PCIX_WRITEL(0x80000007, PCIX0_PIM0SA); - PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); - - iounmap(pcix_reg_base); - - eieio(); -} - -static void __init -taishan_setup_hose(void) -{ - struct pci_controller *hose; - - /* Configure windows on the PCI-X host bridge */ - taishan_setup_pcix(); - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - hose->pci_mem_offset = TAISHAN_PCI_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - TAISHAN_PCI_LOWER_IO, - TAISHAN_PCI_UPPER_IO, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - TAISHAN_PCI_LOWER_MEM, - TAISHAN_PCI_UPPER_MEM, - IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = TAISHAN_PCI_LOWER_IO; - hose->io_space.end = TAISHAN_PCI_UPPER_IO; - hose->mem_space.start = TAISHAN_PCI_LOWER_MEM; - hose->mem_space.end = TAISHAN_PCI_UPPER_MEM; - hose->io_base_virt = ioremap64(TAISHAN_PCI_IO_BASE, TAISHAN_PCI_IO_SIZE); - isa_io_base = (unsigned long) hose->io_base_virt; - - setup_indirect_pci(hose, - TAISHAN_PCI_CFGA_PLB32, - TAISHAN_PCI_CFGD_PLB32); - hose->set_cfg_type = 1; - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = taishan_map_irq; -} - - -static void __init -taishan_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440GX_UART0_ADDR, 8); - port.irq = UART0_INT; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) - printk("Early serial init of port 0 failed\n"); - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(0, &port); - - /* Purge TLB entry added in head_44x.S for early serial access */ - _tlbie(UART0_IO_BASE, 0); -#endif - - port.membase = ioremap64(PPC440GX_UART1_ADDR, 8); - port.irq = UART1_INT; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) - printk("Early serial init of port 1 failed\n"); - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - /* Configure debug serial access */ - gen550_init(1, &port); -#endif -} - -static void __init -taishan_setup_arch(void) -{ - taishan_set_emacdata(); - - ibm440gx_tah_enable(); - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCI host bridge */ - taishan_setup_hose(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - taishan_early_serial_map(); - - /* Identify the system */ - printk("AMCC PowerPC 440GX Taishan Platform\n"); -} - -static void __init taishan_init(void) -{ - ibm440gx_l2c_setup(&clocks); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm44x_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = taishan_setup_arch; - ppc_md.show_cpuinfo = taishan_show_cpuinfo; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = taishan_calibrate_decr; - -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = taishan_early_serial_map; -#endif - ppc_md.init = taishan_init; -} - diff --git a/arch/ppc/platforms/4xx/taishan.h b/arch/ppc/platforms/4xx/taishan.h deleted file mode 100644 index ea7561a8045774af26330ff42aa675a0acec97ca..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/taishan.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * arch/ppc/platforms/4xx/taishan.h - * - * AMCC Taishan board definitions - * - * Copyright 2007 DENX Software Engineering, Stefan Roese - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_TAISHAN_H__ -#define __ASM_TAISHAN_H__ - -#include - -/* External timer clock frequency */ -#define TAISHAN_TMR_CLK 25000000 - -/* Flash */ -#define TAISHAN_FPGA_ADDR 0x0000000141000000ULL -#define TAISHAN_LCM_ADDR 0x0000000142000000ULL -#define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL -#define TAISHAN_FLASH_SIZE 0x4000000 - -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 2 - -/* head_44x.S created UART mapping, used before early_serial_setup. - * We cannot use default OpenBIOS UART mappings because they - * don't work for configurations with more than 512M RAM. --ebs - */ -#define UART0_IO_BASE 0xF0000200 -#define UART1_IO_BASE 0xF0000300 - -#define BASE_BAUD 11059200/16 -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -/* PCI support */ -#define TAISHAN_PCI_LOWER_IO 0x00000000 -#define TAISHAN_PCI_UPPER_IO 0x0000ffff -#define TAISHAN_PCI_LOWER_MEM 0x80000000 -#define TAISHAN_PCI_UPPER_MEM 0xffffefff - -#define TAISHAN_PCI_CFGA_PLB32 0x0ec00000 -#define TAISHAN_PCI_CFGD_PLB32 0x0ec00004 - -#define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL -#define TAISHAN_PCI_IO_SIZE 0x00010000 -#define TAISHAN_PCI_MEM_OFFSET 0x00000000 - -#endif /* __ASM_TAISHAN_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h deleted file mode 100644 index 738280420be5627a01b5c6f7e929d6f3edea5681..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/virtex.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Basic Virtex platform defines, included by - * - * 2005-2007 (c) Secret Lab Technologies Ltd. - * 2002-2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_VIRTEX_H__ -#define __ASM_VIRTEX_H__ - -#include -#include - -/* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */ -#if !defined(BASE_BAUD) - #define BASE_BAUD (0) /* dummy value; not used */ -#endif - -#ifndef __ASSEMBLY__ -extern const char* virtex_machine_name; -#define PPC4xx_MACHINE_NAME (virtex_machine_name) -#endif /* !__ASSEMBLY__ */ - -/* We don't need anything mapped. Size of zero will accomplish that. */ -#define PPC4xx_ONB_IO_PADDR 0u -#define PPC4xx_ONB_IO_VADDR 0u -#define PPC4xx_ONB_IO_SIZE 0u - -#endif /* __ASM_VIRTEX_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c deleted file mode 100644 index 2f9772340854e2f6f1b02c7018f9f5f1850c6c64..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/walnut.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Architecture- / platform-specific boot-time initialization code for - * IBM PowerPC 4xx based boards. Adapted from original - * code by Gary Thomas, Cort Dougan , and Dan Malek - * . - * - * Copyright(c) 1999-2000 Grant Erickson - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -void *kb_cs; -void *kb_data; -void *walnut_rtc_base; - -/* Some IRQs unique to Walnut. - * Used by the generic 405 PCI setup functions in ppc4xx_pci.c - */ -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ - {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ - {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ - {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -void __init -walnut_setup_arch(void) -{ - - void *fpga_brdc; - unsigned char fpga_brdc_data; - void *fpga_enable; - void *fpga_polarity; - void *fpga_status; - void *fpga_trigger; - - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 0); - - kb_data = ioremap(WALNUT_PS2_BASE, 8); - if (!kb_data) { - printk(KERN_CRIT - "walnut_setup_arch() kb_data ioremap failed\n"); - return; - } - - kb_cs = kb_data + 1; - - fpga_status = ioremap(PPC40x_FPGA_BASE, 8); - if (!fpga_status) { - printk(KERN_CRIT - "walnut_setup_arch() fpga_status ioremap failed\n"); - return; - } - - fpga_enable = fpga_status + 1; - fpga_polarity = fpga_status + 2; - fpga_trigger = fpga_status + 3; - fpga_brdc = fpga_status + 4; - - /* split the keyboard and mouse interrupts */ - fpga_brdc_data = readb(fpga_brdc); - fpga_brdc_data |= 0x80; - writeb(fpga_brdc_data, fpga_brdc); - - writeb(0x3, fpga_enable); - - writeb(0x3, fpga_polarity); - - writeb(0x3, fpga_trigger); - - /* RTC step for the walnut */ - walnut_rtc_base = (void *) WALNUT_RTC_VADDR; - TODC_INIT(TODC_TYPE_DS1743, walnut_rtc_base, walnut_rtc_base, - walnut_rtc_base, 8); - /* Identify the system */ - printk("IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)\n"); -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ -#ifdef CONFIG_PCI - unsigned int bar_response, bar; - /* - * Expected PCI mapping: - * - * PLB addr PCI memory addr - * --------------------- --------------------- - * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff - * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff - * - * PLB addr PCI io addr - * --------------------- --------------------- - * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 - * - * The following code is simplified by assuming that the bootrom - * has been well behaved in following this mapping. - */ - -#ifdef DEBUG - int i; - - printk("ioremap PCLIO_BASE = 0x%x\n", pcip); - printk("PCI bridge regs before fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif - - /* added for IBM boot rom version 1.15 bios bar changes -AK */ - - /* Disable region first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Disable region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->ptm1ms), 0x00000000); - - /* Disable region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - - /* Zero config bars */ - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - 0x00000000); - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - /* end work around */ - -#ifdef DEBUG - printk("PCI bridge regs after fixup \n"); - for (i = 0; i <= 3; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - -#endif -#endif -} - -void __init -walnut_map_io(void) -{ - ppc4xx_map_io(); - io_block_mapping(WALNUT_RTC_VADDR, - WALNUT_RTC_PADDR, WALNUT_RTC_SIZE, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = walnut_setup_arch; - ppc_md.setup_io_mappings = walnut_map_io; - -#ifdef CONFIG_GEN_RTC - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#endif -} diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h deleted file mode 100644 index d9c4eb788940fd1e256a5ee554d3f70bee54df63..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/walnut.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Walnut board definitions - * - * Copyright (c) 2005 DENX Software Engineering - * Stefan Roese - * - * Based on original work by - * Copyright (c) 1999 Grant Erickson - * Frank Rowand - * Debbie Chu - * 2000 (c) MontaVista, Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_WALNUT_H__ -#define __ASM_WALNUT_H__ - -#include -#include - -/* Memory map for the IBM "Walnut" 405GP evaluation board. - * Generic 4xx plus RTC. - */ - -#define WALNUT_RTC_PADDR ((uint)0xf0000000) -#define WALNUT_RTC_VADDR WALNUT_RTC_PADDR -#define WALNUT_RTC_SIZE ((uint)8*1024) - -#define BASE_BAUD 691200 - -#define WALNUT_PS2_BASE 0xF0100000 - -/* Flash */ -#define PPC40x_FPGA_BASE 0xF0300000 -#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */ -#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) -#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) -#define PPC40x_FLASH_LOW 0xFFF00000 -#define PPC40x_FLASH_HIGH 0xFFF80000 -#define PPC40x_FLASH_SIZE 0x80000 -#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE - -#define PPC4xx_MACHINE_NAME "IBM Walnut" - -#endif /* __ASM_WALNUT_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c deleted file mode 100644 index 6e522fefc26f779c17b62bbbd96ae5c7eba0169b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/xilinx_ml300.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Xilinx ML300 evaluation board initialization - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* - * As an overview of how the following functions (platform_init, - * ml300_map_io, ml300_setup_arch and ml300_init_IRQ) fit into the - * kernel startup procedure, here's a call tree: - * - * start_here arch/ppc/kernel/head_4xx.S - * early_init arch/ppc/kernel/setup.c - * machine_init arch/ppc/kernel/setup.c - * platform_init this file - * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c - * parse_bootinfo - * find_bootinfo - * "setup some default ppc_md pointers" - * MMU_init arch/ppc/mm/init.c - * *ppc_md.setup_io_mappings == ml300_map_io this file - * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c - * start_kernel init/main.c - * setup_arch arch/ppc/kernel/setup.c - * #if defined(CONFIG_KGDB) - * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc - * #endif - * *ppc_md.setup_arch == ml300_setup_arch this file - * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c - * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c - * init_IRQ arch/ppc/kernel/irq.c - * *ppc_md.init_IRQ == ml300_init_IRQ this file - * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c - * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c - */ - -const char* virtex_machine_name = "ML300 Reference Design"; - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) -static volatile unsigned *powerdown_base = - (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR; - -static void -xilinx_power_off(void) -{ - local_irq_disable(); - out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE); - while (1) ; -} -#endif - -void __init -ml300_map_io(void) -{ - ppc4xx_map_io(); - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) - powerdown_base = ioremap((unsigned long) powerdown_base, - XPAR_POWER_0_POWERDOWN_HIGHADDR - - XPAR_POWER_0_POWERDOWN_BASEADDR + 1); -#endif -} - -void __init -ml300_setup_arch(void) -{ - virtex_early_serial_map(); - ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */ - - /* Identify the system */ - printk(KERN_INFO "Xilinx ML300 Reference System (Virtex-II Pro)\n"); -} - -/* Called after board_setup_irq from ppc4xx_init_IRQ(). */ -void __init -ml300_init_irq(void) -{ - ppc4xx_init_IRQ(); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ml300_setup_arch; - ppc_md.setup_io_mappings = ml300_map_io; - ppc_md.init_IRQ = ml300_init_irq; - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) - ppc_md.power_off = xilinx_power_off; -#endif - -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = virtex_early_serial_map; -#endif -} - diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c deleted file mode 100644 index bc3ace3762e78d6f3885df4ee325ec30140e7d57..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/xilinx_ml403.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Xilinx ML403 evaluation board initialization - * - * Author: Grant Likely - * - * 2005-2007 (c) Secret Lab Technologies Ltd. - * 2002-2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* - * As an overview of how the following functions (platform_init, - * ml403_map_io, ml403_setup_arch and ml403_init_IRQ) fit into the - * kernel startup procedure, here's a call tree: - * - * start_here arch/ppc/kernel/head_4xx.S - * early_init arch/ppc/kernel/setup.c - * machine_init arch/ppc/kernel/setup.c - * platform_init this file - * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c - * parse_bootinfo - * find_bootinfo - * "setup some default ppc_md pointers" - * MMU_init arch/ppc/mm/init.c - * *ppc_md.setup_io_mappings == ml403_map_io this file - * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c - * start_kernel init/main.c - * setup_arch arch/ppc/kernel/setup.c - * #if defined(CONFIG_KGDB) - * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc - * #endif - * *ppc_md.setup_arch == ml403_setup_arch this file - * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c - * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c - * init_IRQ arch/ppc/kernel/irq.c - * *ppc_md.init_IRQ == ml403_init_IRQ this file - * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c - * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c - */ - -const char* virtex_machine_name = "ML403 Reference Design"; - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) -static volatile unsigned *powerdown_base = - (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR; - -static void -xilinx_power_off(void) -{ - local_irq_disable(); - out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE); - while (1) ; -} -#endif - -void __init -ml403_map_io(void) -{ - ppc4xx_map_io(); - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) - powerdown_base = ioremap((unsigned long) powerdown_base, - XPAR_POWER_0_POWERDOWN_HIGHADDR - - XPAR_POWER_0_POWERDOWN_BASEADDR + 1); -#endif -} - -void __init -ml403_setup_arch(void) -{ - virtex_early_serial_map(); - ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */ - - /* Identify the system */ - printk(KERN_INFO "Xilinx ML403 Reference System (Virtex-4 FX)\n"); -} - -/* Called after board_setup_irq from ppc4xx_init_IRQ(). */ -void __init -ml403_init_irq(void) -{ - ppc4xx_init_IRQ(); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ml403_setup_arch; - ppc_md.setup_io_mappings = ml403_map_io; - ppc_md.init_IRQ = ml403_init_irq; - -#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) - ppc_md.power_off = xilinx_power_off; -#endif - -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = virtex_early_serial_map; -#endif -} - diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h deleted file mode 100644 index 650888b00fb0074c37031e6f285bee0ab68746a0..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/xparameters/xparameters.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * arch/ppc/platforms/4xx/xparameters/xparameters.h - * - * This file includes the correct xparameters.h for the CONFIG'ed board plus - * fixups to translate board specific XPAR values to a common set of names - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2004 (c) MontaVista Software, Inc. This file is licensed under the terms - * of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - - -#if defined(CONFIG_XILINX_ML300) - #include "xparameters_ml300.h" - #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \ - XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR - #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \ - XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR -#elif defined(CONFIG_XILINX_ML403) - #include "xparameters_ml403.h" - #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \ - XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR - #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \ - XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR -#else - /* Add other board xparameter includes here before the #else */ - #error No xparameters_*.h file included -#endif - -#ifndef SERIAL_PORT_DFNS - /* zImage serial port definitions */ - #define RS_TABLE_SIZE 1 - #define SERIAL_PORT_DFNS { \ - .baud_base = XPAR_UARTNS550_0_CLOCK_FREQ_HZ/16, \ - .irq = XPAR_INTC_0_UARTNS550_0_VEC_ID, \ - .flags = ASYNC_BOOT_AUTOCONF, \ - .iomem_base = (u8 *)XPAR_UARTNS550_0_BASEADDR + 3, \ - .iomem_reg_shift = 2, \ - .io_type = SERIAL_IO_MEM, \ - }, -#endif - -/* - * A few reasonable defaults for the #defines which could be missing depending - * on the IP version or variant (e.g. OPB vs PLB) - */ - -#ifndef XPAR_EMAC_0_CAM_EXIST -#define XPAR_EMAC_0_CAM_EXIST 0 -#endif -#ifndef XPAR_EMAC_0_JUMBO_EXIST -#define XPAR_EMAC_0_JUMBO_EXIST 0 -#endif -#ifndef XPAR_EMAC_0_TX_DRE_TYPE -#define XPAR_EMAC_0_TX_DRE_TYPE 0 -#endif -#ifndef XPAR_EMAC_0_RX_DRE_TYPE -#define XPAR_EMAC_0_RX_DRE_TYPE 0 -#endif -#ifndef XPAR_EMAC_0_TX_INCLUDE_CSUM -#define XPAR_EMAC_0_TX_INCLUDE_CSUM 0 -#endif -#ifndef XPAR_EMAC_0_RX_INCLUDE_CSUM -#define XPAR_EMAC_0_RX_INCLUDE_CSUM 0 -#endif - -#ifndef XPAR_EMAC_1_CAM_EXIST -#define XPAR_EMAC_1_CAM_EXIST 0 -#endif -#ifndef XPAR_EMAC_1_JUMBO_EXIST -#define XPAR_EMAC_1_JUMBO_EXIST 0 -#endif -#ifndef XPAR_EMAC_1_TX_DRE_TYPE -#define XPAR_EMAC_1_TX_DRE_TYPE 0 -#endif -#ifndef XPAR_EMAC_1_RX_DRE_TYPE -#define XPAR_EMAC_1_RX_DRE_TYPE 0 -#endif -#ifndef XPAR_EMAC_1_TX_INCLUDE_CSUM -#define XPAR_EMAC_1_TX_INCLUDE_CSUM 0 -#endif -#ifndef XPAR_EMAC_1_RX_INCLUDE_CSUM -#define XPAR_EMAC_1_RX_INCLUDE_CSUM 0 -#endif - -#ifndef XPAR_GPIO_0_IS_DUAL -#define XPAR_GPIO_0_IS_DUAL 0 -#endif -#ifndef XPAR_GPIO_1_IS_DUAL -#define XPAR_GPIO_1_IS_DUAL 0 -#endif -#ifndef XPAR_GPIO_2_IS_DUAL -#define XPAR_GPIO_2_IS_DUAL 0 -#endif -#ifndef XPAR_GPIO_3_IS_DUAL -#define XPAR_GPIO_3_IS_DUAL 0 -#endif -#ifndef XPAR_GPIO_4_IS_DUAL -#define XPAR_GPIO_4_IS_DUAL 0 -#endif - diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h b/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h deleted file mode 100644 index 97e3f4d4bd54a5773481b07342ff0dab91c8910b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h +++ /dev/null @@ -1,310 +0,0 @@ -/******************************************************************* -* -* Author: Xilinx, Inc. -* -* -* This program is free software; you can redistribute it and/or modify it -* under the terms of the GNU General Public License as published by the -* Free Software Foundation; either version 2 of the License, or (at your -* option) any later version. -* -* -* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A -* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS -* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, -* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE -* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING -* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. -* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO -* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY -* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM -* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND -* FITNESS FOR A PARTICULAR PURPOSE. -* -* -* Xilinx hardware products are not intended for use in life support -* appliances, devices, or systems. Use in such applications is -* expressly prohibited. -* -* -* (c) Copyright 2002-2004 Xilinx Inc. -* All rights reserved. -* -* -* You should have received a copy of the GNU General Public License along -* with this program; if not, write to the Free Software Foundation, Inc., -* 675 Mass Ave, Cambridge, MA 02139, USA. -* -* Description: Driver parameters -* -*******************************************************************/ - -#define XPAR_XPCI_NUM_INSTANCES 1 -#define XPAR_XPCI_CLOCK_HZ 33333333 -#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0 -#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000 -#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF -#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000 -#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004 -#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000 -#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000 -#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF -#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000 -#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF - -/******************************************************************/ - -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 - -/******************************************************************/ - -#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0 -#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000 -#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7) -#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1 -#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8) -#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F) -#define XPAR_XGPIO_NUM_INSTANCES 2 - -/******************************************************************/ - -#define XPAR_XIIC_NUM_INSTANCES 1 -#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000 -#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF -#define XPAR_OPB_IIC_0_DEVICE_ID 0 -#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0 - -/******************************************************************/ - -#define XPAR_XUARTNS550_NUM_INSTANCES 2 -#define XPAR_XUARTNS550_CLOCK_HZ 100000000 -#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000 -#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF -#define XPAR_OPB_UART16550_0_DEVICE_ID 0 -#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000 -#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF -#define XPAR_OPB_UART16550_1_DEVICE_ID 1 - -/******************************************************************/ - -#define XPAR_XSPI_NUM_INSTANCES 1 -#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000 -#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F -#define XPAR_OPB_SPI_0_DEVICE_ID 0 -#define XPAR_OPB_SPI_0_FIFO_EXIST 1 -#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0 -#define XPAR_OPB_SPI_0_NUM_SS_BITS 1 - -/******************************************************************/ - -#define XPAR_XPS2_NUM_INSTANCES 2 -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000 -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F) -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000) -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F) - -/******************************************************************/ - -#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1 -#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000 -#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007 -#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000 -#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF -#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000 -#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF -#define XPAR_PLB_DDR_0_BASEADDR 0x00000000 -#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF - -/******************************************************************/ - -#define XPAR_XINTC_HAS_IPR 1 -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18 -#define XPAR_XINTC_USE_DCR 0 -#define XPAR_XINTC_NUM_INSTANCES 1 -#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0 -#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF -#define XPAR_DCR_INTC_0_DEVICE_ID 0 -#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000 - -/******************************************************************/ - -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0 -#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1 -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2 -#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3 -#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4 -#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5 -#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6 -#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7 -#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8 -#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9 -#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10 -#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11 -#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12 -#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13 -#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14 -#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15 -#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16 -#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17 - -/******************************************************************/ - -#define XPAR_XTFT_NUM_INSTANCES 1 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207 -#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_XSYSACE_MEM_WIDTH 8 -#define XPAR_XSYSACE_NUM_INSTANCES 1 -#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000 -#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF -#define XPAR_OPB_SYSACE_0_DEVICE_ID 0 -#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8 - -/******************************************************************/ - -#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000 - -/******************************************************************/ - -/******************************************************************/ - -/* Linux Redefines */ - -/******************************************************************/ - -#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000) -#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR -#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ -#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID -#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000) -#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR -#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ -#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID - -/******************************************************************/ - -#define XPAR_GPIO_0_BASEADDR XPAR_MY_OPB_GPIO_0_BASEADDR_0 -#define XPAR_GPIO_0_HIGHADDR XPAR_MY_OPB_GPIO_0_HIGHADDR_0 -#define XPAR_GPIO_0_DEVICE_ID XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 -#define XPAR_GPIO_1_BASEADDR XPAR_MY_OPB_GPIO_0_BASEADDR_1 -#define XPAR_GPIO_1_HIGHADDR XPAR_MY_OPB_GPIO_0_HIGHADDR_1 -#define XPAR_GPIO_1_DEVICE_ID XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 - -/******************************************************************/ - -#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR -#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR -#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR -#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_SYSACE_0_BASEADDR XPAR_OPB_SYSACE_0_BASEADDR -#define XPAR_SYSACE_0_HIGHADDR XPAR_OPB_SYSACE_0_HIGHADDR -#define XPAR_SYSACE_0_DEVICE_ID XPAR_OPB_SYSACE_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_INTC_0_BASEADDR XPAR_DCR_INTC_0_BASEADDR -#define XPAR_INTC_0_HIGHADDR XPAR_DCR_INTC_0_HIGHADDR -#define XPAR_INTC_0_KIND_OF_INTR XPAR_DCR_INTC_0_KIND_OF_INTR -#define XPAR_INTC_0_DEVICE_ID XPAR_DCR_INTC_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_INTC_0_EMAC_0_VEC_ID XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_IIC_0_VEC_ID XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR -#define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_UARTNS550_1_VEC_ID XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_PS2_0_VEC_ID XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR -#define XPAR_INTC_0_PS2_1_VEC_ID XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR -#define XPAR_INTC_0_SPI_0_VEC_ID XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_TOUCHSCREEN_0_VEC_ID XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR -#define XPAR_INTC_0_PCI_0_VEC_ID_A XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR -#define XPAR_INTC_0_PCI_0_VEC_ID_B XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR -#define XPAR_INTC_0_PCI_0_VEC_ID_C XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR -#define XPAR_INTC_0_PCI_0_VEC_ID_D XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR - -/******************************************************************/ - -#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR -#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR -#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT -#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST -#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST -#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_SPI_0_BASEADDR XPAR_OPB_SPI_0_BASEADDR -#define XPAR_SPI_0_HIGHADDR XPAR_OPB_SPI_0_HIGHADDR -#define XPAR_SPI_0_DEVICE_ID XPAR_OPB_SPI_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_TOUCHSCREEN_0_BASEADDR XPAR_OPB_TSD_REF_0_BASEADDR -#define XPAR_TOUCHSCREEN_0_HIGHADDR XPAR_OPB_TSD_REF_0_HIGHADDR -#define XPAR_TOUCHSCREEN_0_DEVICE_ID XPAR_OPB_TSD_REF_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_TFT_0_BASEADDR XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR - -/******************************************************************/ - -#define XPAR_PCI_0_BASEADDR XPAR_OPB_PCI_REF_0_BASEADDR -#define XPAR_PCI_0_HIGHADDR XPAR_OPB_PCI_REF_0_HIGHADDR -#define XPAR_PCI_0_CONFIG_ADDR XPAR_OPB_PCI_REF_0_CONFIG_ADDR -#define XPAR_PCI_0_CONFIG_DATA XPAR_OPB_PCI_REF_0_CONFIG_DATA -#define XPAR_PCI_0_LCONFIG_ADDR XPAR_OPB_PCI_REF_0_LCONFIG_ADDR -#define XPAR_PCI_0_MEM_BASEADDR XPAR_OPB_PCI_REF_0_MEM_BASEADDR -#define XPAR_PCI_0_MEM_HIGHADDR XPAR_OPB_PCI_REF_0_MEM_HIGHADDR -#define XPAR_PCI_0_IO_BASEADDR XPAR_OPB_PCI_REF_0_IO_BASEADDR -#define XPAR_PCI_0_IO_HIGHADDR XPAR_OPB_PCI_REF_0_IO_HIGHADDR -#define XPAR_PCI_0_CLOCK_FREQ_HZ XPAR_XPCI_CLOCK_HZ -#define XPAR_PCI_0_DEVICE_ID XPAR_OPB_PCI_REF_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_PS2_0_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 -#define XPAR_PS2_0_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 -#define XPAR_PS2_0_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 -#define XPAR_PS2_1_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 -#define XPAR_PS2_1_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 -#define XPAR_PS2_1_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 - -/******************************************************************/ - -#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 -#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ -#define XPAR_DDR_0_SIZE 0x08000000 - -/******************************************************************/ - -#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400 -#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF -#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0 - -/******************************************************************/ - -#define XPAR_POWER_0_POWERDOWN_BASEADDR 0x90000004 -#define XPAR_POWER_0_POWERDOWN_HIGHADDR 0x90000007 -#define XPAR_POWER_0_POWERDOWN_VALUE 0xFF - -/******************************************************************/ diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h b/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h deleted file mode 100644 index 5cacdcb3964db646174239d4801417dd2499c1d8..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h +++ /dev/null @@ -1,243 +0,0 @@ - -/******************************************************************* -* -* CAUTION: This file is automatically generated by libgen. -* Version: Xilinx EDK 7.1.2 EDK_H.12.5.1 -* DO NOT EDIT. -* -* Copyright (c) 2005 Xilinx, Inc. All rights reserved. -* -* Description: Driver parameters -* -*******************************************************************/ - -#define XPAR_PLB_BRAM_IF_CNTLR_0_BASEADDR 0xFFFF0000 -#define XPAR_PLB_BRAM_IF_CNTLR_0_HIGHADDR 0xFFFFFFFF - -/******************************************************************/ - -#define XPAR_OPB_EMC_0_MEM0_BASEADDR 0x20000000 -#define XPAR_OPB_EMC_0_MEM0_HIGHADDR 0x200FFFFF -#define XPAR_OPB_EMC_0_MEM1_BASEADDR 0x28000000 -#define XPAR_OPB_EMC_0_MEM1_HIGHADDR 0x287FFFFF -#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000 -#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF -#define XPAR_OPB_EMC_USB_0_MEM0_BASEADDR 0xA5000000 -#define XPAR_OPB_EMC_USB_0_MEM0_HIGHADDR 0xA50000FF -#define XPAR_PLB_DDR_0_MEM0_BASEADDR 0x00000000 -#define XPAR_PLB_DDR_0_MEM0_HIGHADDR 0x0FFFFFFF - -/******************************************************************/ - -#define XPAR_XEMAC_NUM_INSTANCES 1 -#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000 -#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF -#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0 -#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1 -#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1 -#define XPAR_OPB_ETHERNET_0_MII_EXIST 1 - -/******************************************************************/ - -#define XPAR_XUARTNS550_NUM_INSTANCES 1 -#define XPAR_XUARTNS550_CLOCK_HZ 100000000 -#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000 -#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF -#define XPAR_OPB_UART16550_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_XGPIO_NUM_INSTANCES 3 -#define XPAR_OPB_GPIO_0_BASEADDR 0x90000000 -#define XPAR_OPB_GPIO_0_HIGHADDR 0x900001FF -#define XPAR_OPB_GPIO_0_DEVICE_ID 0 -#define XPAR_OPB_GPIO_0_INTERRUPT_PRESENT 0 -#define XPAR_OPB_GPIO_0_IS_DUAL 1 -#define XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR 0x90001000 -#define XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR 0x900011FF -#define XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID 1 -#define XPAR_OPB_GPIO_EXP_HDR_0_INTERRUPT_PRESENT 0 -#define XPAR_OPB_GPIO_EXP_HDR_0_IS_DUAL 1 -#define XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR 0x90002000 -#define XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR 0x900021FF -#define XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID 2 -#define XPAR_OPB_GPIO_CHAR_LCD_0_INTERRUPT_PRESENT 0 -#define XPAR_OPB_GPIO_CHAR_LCD_0_IS_DUAL 0 - -/******************************************************************/ - -#define XPAR_XPS2_NUM_INSTANCES 2 -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000 -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F) -#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1 -#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000) -#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F) - -/******************************************************************/ - -#define XPAR_XIIC_NUM_INSTANCES 1 -#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000 -#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF -#define XPAR_OPB_IIC_0_DEVICE_ID 0 -#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0 -#define XPAR_OPB_IIC_0_GPO_WIDTH 1 - -/******************************************************************/ - -#define XPAR_INTC_MAX_NUM_INTR_INPUTS 10 -#define XPAR_XINTC_HAS_IPR 1 -#define XPAR_XINTC_USE_DCR 0 -#define XPAR_XINTC_NUM_INSTANCES 1 -#define XPAR_OPB_INTC_0_BASEADDR 0xD1000FC0 -#define XPAR_OPB_INTC_0_HIGHADDR 0xD1000FDF -#define XPAR_OPB_INTC_0_DEVICE_ID 0 -#define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000000 - -/******************************************************************/ - -#define XPAR_INTC_SINGLE_BASEADDR 0xD1000FC0 -#define XPAR_INTC_SINGLE_HIGHADDR 0xD1000FDF -#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID -#define XPAR_OPB_ETHERNET_0_IP2INTC_IRPT_MASK 0X000001 -#define XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 0 -#define XPAR_SYSTEM_USB_HPI_INT_MASK 0X000002 -#define XPAR_OPB_INTC_0_SYSTEM_USB_HPI_INT_INTR 1 -#define XPAR_MISC_LOGIC_0_PHY_MII_INT_MASK 0X000004 -#define XPAR_OPB_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 2 -#define XPAR_OPB_SYSACE_0_SYSACE_IRQ_MASK 0X000008 -#define XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 3 -#define XPAR_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_MASK 0X000010 -#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 4 -#define XPAR_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_MASK 0X000020 -#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 5 -#define XPAR_OPB_IIC_0_IP2INTC_IRPT_MASK 0X000040 -#define XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 6 -#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR2_MASK 0X000080 -#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 7 -#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR1_MASK 0X000100 -#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8 -#define XPAR_OPB_UART16550_0_IP2INTC_IRPT_MASK 0X000200 -#define XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 9 - -/******************************************************************/ - -#define XPAR_XTFT_NUM_INSTANCES 1 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200 -#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207 -#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0 - -/******************************************************************/ - -#define XPAR_XSYSACE_MEM_WIDTH 16 -#define XPAR_XSYSACE_NUM_INSTANCES 1 -#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000 -#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF -#define XPAR_OPB_SYSACE_0_DEVICE_ID 0 -#define XPAR_OPB_SYSACE_0_MEM_WIDTH 16 - -/******************************************************************/ - -#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000 - -/******************************************************************/ - - -/******************************************************************/ - -/* Linux Redefines */ - -/******************************************************************/ - -#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000) -#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR -#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ -#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_INTC_0_BASEADDR XPAR_OPB_INTC_0_BASEADDR -#define XPAR_INTC_0_HIGHADDR XPAR_OPB_INTC_0_HIGHADDR -#define XPAR_INTC_0_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR -#define XPAR_INTC_0_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_INTC_0_EMAC_0_VEC_ID XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR -#define XPAR_INTC_0_IIC_0_VEC_ID XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR -#define XPAR_INTC_0_PS2_1_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR -#define XPAR_INTC_0_PS2_0_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR -#define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR - -/******************************************************************/ - -#define XPAR_TFT_0_BASEADDR XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR - -/******************************************************************/ - -#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR -#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR -#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT -#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST -#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST -#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_GPIO_0_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_0 -#define XPAR_GPIO_0_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_0 -#define XPAR_GPIO_0_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_0 -#define XPAR_GPIO_1_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_1 -#define XPAR_GPIO_1_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_1 -#define XPAR_GPIO_1_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_1 -#define XPAR_GPIO_2_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_0 -#define XPAR_GPIO_2_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_0 -#define XPAR_GPIO_2_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_0 -#define XPAR_GPIO_3_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_1 -#define XPAR_GPIO_3_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_1 -#define XPAR_GPIO_3_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_1 -#define XPAR_GPIO_4_BASEADDR XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR -#define XPAR_GPIO_4_HIGHADDR XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR -#define XPAR_GPIO_4_DEVICE_ID XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_PS2_0_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 -#define XPAR_PS2_0_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 -#define XPAR_PS2_0_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 -#define XPAR_PS2_1_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 -#define XPAR_PS2_1_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 -#define XPAR_PS2_1_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 - -/******************************************************************/ - -#define XPAR_SYSACE_0_BASEADDR XPAR_OPB_SYSACE_0_BASEADDR -#define XPAR_SYSACE_0_HIGHADDR XPAR_OPB_SYSACE_0_HIGHADDR -#define XPAR_SYSACE_0_DEVICE_ID XPAR_OPB_SYSACE_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR -#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR -#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR -#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID - -/******************************************************************/ - -#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 -#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ -#define XPAR_DDR_0_SIZE 0x4000000 - -/******************************************************************/ - -#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400 -#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF -#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0 - -/******************************************************************/ - -#define XPAR_PCI_0_CLOCK_FREQ_HZ 0 - -/******************************************************************/ - diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c deleted file mode 100644 index f6cfd44281fce6fd0fd278baed1c79696da0109b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/yucca.c +++ /dev/null @@ -1,393 +0,0 @@ -/* - * Yucca board specific routines - * - * Roland Dreier (based on luan.c by Matt Porter) - * - * Copyright 2004-2005 MontaVista Software Inc. - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -extern bd_t __res; - -static struct ibm44x_clocks clocks __initdata; - -static void __init -yucca_calibrate_decr(void) -{ - unsigned int freq; - - if (mfspr(SPRN_CCR1) & CCR1_TCS) - freq = YUCCA_TMR_CLK; - else - freq = clocks.cpu; - - ibm44x_calibrate_decr(freq); -} - -static int -yucca_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: AMCC\n"); - seq_printf(m, "machine\t\t: PPC440SPe EVB (Yucca)\n"); - - return 0; -} - -static enum { - HOSE_UNKNOWN, - HOSE_PCIX, - HOSE_PCIE0, - HOSE_PCIE1, - HOSE_PCIE2 -} hose_type[4]; - -static inline int -yucca_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - - if (hose_type[hose->index] == HOSE_PCIX) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 81, -1, -1, -1 }, /* IDSEL 1 - PCIX0 Slot 0 */ - }; - const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } else if (hose_type[hose->index] == HOSE_PCIE0) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 96, 97, 98, 99 }, - }; - const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } else if (hose_type[hose->index] == HOSE_PCIE1) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 100, 101, 102, 103 }, - }; - const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } else if (hose_type[hose->index] == HOSE_PCIE2) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 104, 105, 106, 107 }, - }; - const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } - return -1; -} - -static void __init yucca_set_emacdata(void) -{ - struct ocp_def *def; - struct ocp_func_emac_data *emacdata; - - /* Set phy_map, phy_mode, and mac_addr for the EMAC */ - def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); - emacdata = def->additions; - emacdata->phy_map = 0x00000001; /* Skip 0x00 */ - emacdata->phy_mode = PHY_MODE_GMII; - memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); -} - -static int __init yucca_pcie_card_present(int port) -{ - void __iomem *pcie_fpga_base; - u16 reg; - - pcie_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE); - reg = in_be16(pcie_fpga_base + FPGA_REG1C); - iounmap(pcie_fpga_base); - - switch(port) { - case 0: return !(reg & FPGA_REG1C_PE0_PRSNT); - case 1: return !(reg & FPGA_REG1C_PE1_PRSNT); - case 2: return !(reg & FPGA_REG1C_PE2_PRSNT); - default: return 0; - } -} - -/* - * For the given slot, set rootpoint mode, send power to the slot, - * turn on the green LED and turn off the yellow LED, enable the clock - * and turn off reset. - */ -static void __init yucca_setup_pcie_fpga_rootpoint(int port) -{ - void __iomem *pcie_reg_fpga_base; - u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint; - - pcie_reg_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE); - - switch(port) { - case 0: - rootpoint = FPGA_REG1C_PE0_ROOTPOINT; - endpoint = 0; - power = FPGA_REG1A_PE0_PWRON; - green_led = FPGA_REG1A_PE0_GLED; - clock = FPGA_REG1A_PE0_REFCLK_ENABLE; - yellow_led = FPGA_REG1A_PE0_YLED; - reset_off = FPGA_REG1C_PE0_PERST; - break; - case 1: - rootpoint = 0; - endpoint = FPGA_REG1C_PE1_ENDPOINT; - power = FPGA_REG1A_PE1_PWRON; - green_led = FPGA_REG1A_PE1_GLED; - clock = FPGA_REG1A_PE1_REFCLK_ENABLE; - yellow_led = FPGA_REG1A_PE1_YLED; - reset_off = FPGA_REG1C_PE1_PERST; - break; - case 2: - rootpoint = 0; - endpoint = FPGA_REG1C_PE2_ENDPOINT; - power = FPGA_REG1A_PE2_PWRON; - green_led = FPGA_REG1A_PE2_GLED; - clock = FPGA_REG1A_PE2_REFCLK_ENABLE; - yellow_led = FPGA_REG1A_PE2_YLED; - reset_off = FPGA_REG1C_PE2_PERST; - break; - - default: - iounmap(pcie_reg_fpga_base); - return; - } - - out_be16(pcie_reg_fpga_base + FPGA_REG1A, - ~(power | clock | green_led) & - (yellow_led | in_be16(pcie_reg_fpga_base + FPGA_REG1A))); - out_be16(pcie_reg_fpga_base + FPGA_REG1C, - ~(endpoint | reset_off) & - (rootpoint | in_be16(pcie_reg_fpga_base + FPGA_REG1C))); - - /* - * Leave device in reset for a while after powering on the - * slot to give it a chance to initialize. - */ - mdelay(250); - - out_be16(pcie_reg_fpga_base + FPGA_REG1C, - reset_off | in_be16(pcie_reg_fpga_base + FPGA_REG1C)); - - iounmap(pcie_reg_fpga_base); -} - -static void __init -yucca_setup_hoses(void) -{ - struct pci_controller *hose; - char name[20]; - int i; - - if (0 && ppc440spe_init_pcie()) { - printk(KERN_WARNING "PPC440SPe PCI Express initialization failed\n"); - return; - } - - for (i = 0; i <= 2; ++i) { - if (!yucca_pcie_card_present(i)) - continue; - - printk(KERN_INFO "PCIE%d: card present\n", i); - yucca_setup_pcie_fpga_rootpoint(i); - if (ppc440spe_init_pcie_rootport(i)) { - printk(KERN_WARNING "PCIE%d: initialization failed\n", i); - continue; - } - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - sprintf(name, "PCIE%d host bridge", i); - pci_init_resource(&hose->io_resource, - YUCCA_PCIX_LOWER_IO, - YUCCA_PCIX_UPPER_IO, - IORESOURCE_IO, - name); - - hose->mem_space.start = YUCCA_PCIE_LOWER_MEM + - i * YUCCA_PCIE_MEM_SIZE; - hose->mem_space.end = hose->mem_space.start + - YUCCA_PCIE_MEM_SIZE - 1; - - pci_init_resource(&hose->mem_resources[0], - hose->mem_space.start, - hose->mem_space.end, - IORESOURCE_MEM, - name); - - hose->first_busno = 0; - hose->last_busno = 15; - hose_type[hose->index] = HOSE_PCIE0 + i; - - ppc440spe_setup_pcie(hose, i); - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - } - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = yucca_map_irq; -} - -TODC_ALLOC(); - -static void __init -yucca_early_serial_map(void) -{ - struct uart_port port; - - /* Setup ioremapped serial port access */ - memset(&port, 0, sizeof(port)); - port.membase = ioremap64(PPC440SPE_UART0_ADDR, 8); - port.irq = UART0_INT; - port.uartclk = clocks.uart0; - port.regshift = 0; - port.iotype = UPIO_MEM; - port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - port.line = 0; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 0 failed\n"); - } - - port.membase = ioremap64(PPC440SPE_UART1_ADDR, 8); - port.irq = UART1_INT; - port.uartclk = clocks.uart1; - port.line = 1; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 1 failed\n"); - } - - port.membase = ioremap64(PPC440SPE_UART2_ADDR, 8); - port.irq = UART2_INT; - port.uartclk = BASE_BAUD; - port.line = 2; - - if (early_serial_setup(&port) != 0) { - printk("Early serial init of port 2 failed\n"); - } -} - -static void __init -yucca_setup_arch(void) -{ - yucca_set_emacdata(); - -#if !defined(CONFIG_BDI_SWITCH) - /* - * The Abatron BDI JTAG debugger does not tolerate others - * mucking with the debug registers. - */ - mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM)); -#endif - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - /* 440GX and 440SPe clocking is the same - rd */ - ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Setup PCIXn host bridges */ - yucca_setup_hoses(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - yucca_early_serial_map(); - - /* Identify the system */ - printk("Yucca port (Roland Dreier )\n"); -} - -void __init platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, unsigned long r7) -{ - ibm44x_platform_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = yucca_setup_arch; - ppc_md.show_cpuinfo = yucca_show_cpuinfo; - ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - - ppc_md.calibrate_decr = yucca_calibrate_decr; -#ifdef CONFIG_KGDB - ppc_md.early_serial_map = yucca_early_serial_map; -#endif -} diff --git a/arch/ppc/platforms/4xx/yucca.h b/arch/ppc/platforms/4xx/yucca.h deleted file mode 100644 index bc9684e66a84f0cb83366acb7ebef430109d5770..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/4xx/yucca.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Yucca board definitions - * - * Roland Dreier (based on luan.h by Matt Porter) - * - * Copyright 2004-2005 MontaVista Software Inc. - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_YUCCA_H__ -#define __ASM_YUCCA_H__ - -#include - -/* F/W TLB mapping used in bootloader glue to reset EMAC */ -#define PPC44x_EMAC0_MR0 0xa0000800 - -/* Location of MAC addresses in PIBS image */ -#define PIBS_FLASH_BASE 0xffe00000 -#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400) - -/* External timer clock frequency */ -#define YUCCA_TMR_CLK 25000000 - -/* - * FPGA registers - */ -#define YUCCA_FPGA_REG_BASE 0x00000004e2000000ULL -#define YUCCA_FPGA_REG_SIZE 0x24 - -#define FPGA_REG1A 0x1a - -#define FPGA_REG1A_PE0_GLED 0x8000 -#define FPGA_REG1A_PE1_GLED 0x4000 -#define FPGA_REG1A_PE2_GLED 0x2000 -#define FPGA_REG1A_PE0_YLED 0x1000 -#define FPGA_REG1A_PE1_YLED 0x0800 -#define FPGA_REG1A_PE2_YLED 0x0400 -#define FPGA_REG1A_PE0_PWRON 0x0200 -#define FPGA_REG1A_PE1_PWRON 0x0100 -#define FPGA_REG1A_PE2_PWRON 0x0080 -#define FPGA_REG1A_PE0_REFCLK_ENABLE 0x0040 -#define FPGA_REG1A_PE1_REFCLK_ENABLE 0x0020 -#define FPGA_REG1A_PE2_REFCLK_ENABLE 0x0010 -#define FPGA_REG1A_PE_SPREAD0 0x0008 -#define FPGA_REG1A_PE_SPREAD1 0x0004 -#define FPGA_REG1A_PE_SELSOURCE_0 0x0002 -#define FPGA_REG1A_PE_SELSOURCE_1 0x0001 - -#define FPGA_REG1C 0x1c - -#define FPGA_REG1C_PE0_ROOTPOINT 0x8000 -#define FPGA_REG1C_PE1_ENDPOINT 0x4000 -#define FPGA_REG1C_PE2_ENDPOINT 0x2000 -#define FPGA_REG1C_PE0_PRSNT 0x1000 -#define FPGA_REG1C_PE1_PRSNT 0x0800 -#define FPGA_REG1C_PE2_PRSNT 0x0400 -#define FPGA_REG1C_PE0_WAKE 0x0080 -#define FPGA_REG1C_PE1_WAKE 0x0040 -#define FPGA_REG1C_PE2_WAKE 0x0020 -#define FPGA_REG1C_PE0_PERST 0x0010 -#define FPGA_REG1C_PE1_PERST 0x0008 -#define FPGA_REG1C_PE2_PERST 0x0004 - -/* - * Serial port defines - */ -#define RS_TABLE_SIZE 3 - -/* PIBS defined UART mappings, used before early_serial_setup */ -#define UART0_IO_BASE 0xa0000200 -#define UART1_IO_BASE 0xa0000300 -#define UART2_IO_BASE 0xa0000600 - -#define BASE_BAUD 11059200 -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: (void*)UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) \ - STD_UART_OP(2) - -/* PCI support */ -#define YUCCA_PCIX_LOWER_IO 0x00000000 -#define YUCCA_PCIX_UPPER_IO 0x0000ffff -#define YUCCA_PCIX_LOWER_MEM 0x80000000 -#define YUCCA_PCIX_UPPER_MEM 0x8fffffff -#define YUCCA_PCIE_LOWER_MEM 0x90000000 -#define YUCCA_PCIE_MEM_SIZE 0x10000000 - -#define YUCCA_PCIX_MEM_SIZE 0x10000000 -#define YUCCA_PCIX_MEM_OFFSET 0x00000000 -#define YUCCA_PCIE_MEM_SIZE 0x10000000 -#define YUCCA_PCIE_MEM_OFFSET 0x00000000 - -#endif /* __ASM_YUCCA_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile deleted file mode 100644 index 6260231987cbef58c31e2e28baf16cc17f8b5755..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/Makefile +++ /dev/null @@ -1,25 +0,0 @@ -# -# Makefile for the linux kernel. -# - -obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o -obj-$(CONFIG_PREP_RESIDUAL) += residual.o -obj-$(CONFIG_TQM8260) += tqm8260_setup.o -obj-$(CONFIG_CPCI690) += cpci690.o -obj-$(CONFIG_EV64260) += ev64260.o -obj-$(CONFIG_CHESTNUT) += chestnut.o -obj-$(CONFIG_LOPEC) += lopec.o -obj-$(CONFIG_KATANA) += katana.o -obj-$(CONFIG_HDPU) += hdpu.o -obj-$(CONFIG_MVME5100) += mvme5100.o -obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o -obj-$(CONFIG_POWERPMC250) += powerpmc250.o -obj-$(CONFIG_PPLUS) += pplus.o -obj-$(CONFIG_PRPMC750) += prpmc750.o -obj-$(CONFIG_PRPMC800) += prpmc800.o -obj-$(CONFIG_RADSTONE_PPC7D) += radstone_ppc7d.o -obj-$(CONFIG_SANDPOINT) += sandpoint.o -obj-$(CONFIG_SBC82xx) += sbc82xx.o -obj-$(CONFIG_SPRUCE) += spruce.o -obj-$(CONFIG_LITE5200) += lite5200.o -obj-$(CONFIG_EV64360) += ev64360.o diff --git a/arch/ppc/platforms/bseip.h b/arch/ppc/platforms/bseip.h deleted file mode 100644 index 691f4a52b0a5a4eb4e6ba04c57c38466d678394e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/bseip.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Bright Star Engineering ip-Engine board. Copied from the MBX stuff. - * - * Copyright (c) 1998 Dan Malek (dmalek@jlc.net) - */ -#ifndef __MACH_BSEIP_DEFS -#define __MACH_BSEIP_DEFS - -#ifndef __ASSEMBLY__ -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in Hz */ - unsigned char bi_enetaddr[6]; - unsigned int bi_baudrate; -} bd_t; - -extern bd_t m8xx_board_info; - -/* Memory map is configured by the PROM startup. - * All we need to get started is the IMMR. - */ -#define IMAP_ADDR ((uint)0xff000000) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define PCMCIA_MEM_ADDR ((uint)0x04000000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) -#endif /* !__ASSEMBLY__ */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif diff --git a/arch/ppc/platforms/ccm.h b/arch/ppc/platforms/ccm.h deleted file mode 100644 index 69000b1c7a4c8f2c6a423f508b0b0bba372a4c3b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ccm.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Siemens Card Controller Module specific definitions - * - * Copyright (C) 2001-2002 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_CCM_H -#define __MACH_CCM_H - - -#include - -#define CCM_IMMR_BASE 0xF0000000 /* phys. addr of IMMR */ -#define CCM_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR CCM_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE CCM_IMAP_SIZE /* mapped size of IMMR area */ - -#define FEC_INTERRUPT 13 /* = SIU_LEVEL6 */ -#define DEC_INTERRUPT 11 /* = SIU_LEVEL5 */ -#define CPM_INTERRUPT 9 /* = SIU_LEVEL4 */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_CCM_H */ diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c deleted file mode 100644 index 27c140f218ed6e153d0325f1b276bc6b024cca35..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/chestnut.c +++ /dev/null @@ -1,574 +0,0 @@ -/* - * Board setup routines for IBM Chestnut - * - * Author: - * - * <2004> (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static void __iomem *sram_base; /* Virtual addr of Internal SRAM */ -static void __iomem *cpld_base; /* Virtual addr of CPLD Regs */ - -static mv64x60_handle_t bh; - -extern void gen550_progress(char *, unsigned short); -extern void gen550_init(int, struct uart_port *); -extern void mv64360_pcibios_fixup(mv64x60_handle_t *bh); - -#define CHESTNUT_PRESERVE_MASK (BIT(MV64x60_CPU2DEV_0_WIN) | \ - BIT(MV64x60_CPU2DEV_1_WIN) | \ - BIT(MV64x60_CPU2DEV_2_WIN) | \ - BIT(MV64x60_CPU2DEV_3_WIN) | \ - BIT(MV64x60_CPU2BOOT_WIN)) -/************************************************************************** - * FUNCTION: chestnut_calibrate_decr - * - * DESCRIPTION: initialize decrementer interrupt frequency (used as system - * timer) - * - ****/ -static void __init -chestnut_calibrate_decr(void) -{ - ulong freq; - - freq = CHESTNUT_BUS_SPEED / 4; - - printk("time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq/1000000, freq%1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); -} - -static int -chestnut_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: 750FX/GX Eval Board (Chestnut/Buckeye)\n"); - - return 0; -} - -/************************************************************************** - * FUNCTION: chestnut_find_end_of_memory - * - * DESCRIPTION: ppc_md memory size callback - * - ****/ -unsigned long __init -chestnut_find_end_of_memory(void) -{ - static int mem_size = 0; - - if (mem_size == 0) { - mem_size = mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, - MV64x60_TYPE_MV64460); - } - return mem_size; -} - -#if defined(CONFIG_SERIAL_8250) -static void __init -chestnut_early_serial_map(void) -{ - struct uart_port port; - - /* Setup serial port access */ - memset(&port, 0, sizeof(port)); - port.uartclk = BASE_BAUD * 16; - port.irq = UART0_INT; - port.flags = STD_COM_FLAGS | UPF_IOREMAP; - port.iotype = UPIO_MEM; - port.mapbase = CHESTNUT_UART0_IO_BASE; - port.regshift = 0; - - if (early_serial_setup(&port) != 0) - printk("Early serial init of port 0 failed\n"); - - /* Assume early_serial_setup() doesn't modify serial_req */ - port.line = 1; - port.irq = UART1_INT; - port.mapbase = CHESTNUT_UART1_IO_BASE; - - if (early_serial_setup(&port) != 0) - printk("Early serial init of port 1 failed\n"); -} -#endif - -/************************************************************************** - * FUNCTION: chestnut_map_irq - * - * DESCRIPTION: 0 return since PCI IRQs not needed - * - ****/ -static int __init -chestnut_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = { - {CHESTNUT_PCI_SLOT0_IRQ, CHESTNUT_PCI_SLOT0_IRQ, - CHESTNUT_PCI_SLOT0_IRQ, CHESTNUT_PCI_SLOT0_IRQ}, - {CHESTNUT_PCI_SLOT1_IRQ, CHESTNUT_PCI_SLOT1_IRQ, - CHESTNUT_PCI_SLOT1_IRQ, CHESTNUT_PCI_SLOT1_IRQ}, - {CHESTNUT_PCI_SLOT2_IRQ, CHESTNUT_PCI_SLOT2_IRQ, - CHESTNUT_PCI_SLOT2_IRQ, CHESTNUT_PCI_SLOT2_IRQ}, - {CHESTNUT_PCI_SLOT3_IRQ, CHESTNUT_PCI_SLOT3_IRQ, - CHESTNUT_PCI_SLOT3_IRQ, CHESTNUT_PCI_SLOT3_IRQ}, - }; - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - - return PCI_IRQ_TABLE_LOOKUP; -} - - -/************************************************************************** - * FUNCTION: chestnut_setup_bridge - * - * DESCRIPTION: initalize board-specific settings on the MV64360 - * - ****/ -static void __init -chestnut_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - - if ( ppc_md.progress ) - ppc_md.progress("chestnut_setup_bridge: enter", 0); - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - /* setup only PCI bus 0 (bus 1 not used) */ - si.pci_0.enable_bus = 1; - si.pci_0.pci_io.cpu_base = CHESTNUT_PCI0_IO_PROC_ADDR; - si.pci_0.pci_io.pci_base_hi = 0; - si.pci_0.pci_io.pci_base_lo = CHESTNUT_PCI0_IO_PCI_ADDR; - si.pci_0.pci_io.size = CHESTNUT_PCI0_IO_SIZE; - si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; /* no swapping */ - si.pci_0.pci_mem[0].cpu_base = CHESTNUT_PCI0_MEM_PROC_ADDR; - si.pci_0.pci_mem[0].pci_base_hi = CHESTNUT_PCI0_MEM_PCI_HI_ADDR; - si.pci_0.pci_mem[0].pci_base_lo = CHESTNUT_PCI0_MEM_PCI_LO_ADDR; - si.pci_0.pci_mem[0].size = CHESTNUT_PCI0_MEM_SIZE; - si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; /* no swapping */ - si.pci_0.pci_cmd_bits = 0; - si.pci_0.latency_timer = 0x80; - - for (i=0; ifirst_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0); -} - -void __init -chestnut_setup_peripherals(void) -{ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - CHESTNUT_BOOT_8BIT_BASE, CHESTNUT_BOOT_8BIT_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, - CHESTNUT_32BIT_BASE, CHESTNUT_32BIT_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, - CHESTNUT_CPLD_BASE, CHESTNUT_CPLD_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - cpld_base = ioremap(CHESTNUT_CPLD_BASE, CHESTNUT_CPLD_SIZE); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, - CHESTNUT_UART_BASE, CHESTNUT_UART_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, - CHESTNUT_FRAM_BASE, CHESTNUT_FRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - CHESTNUT_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - -#ifdef CONFIG_NOT_COHERENT_CACHE - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b0); -#else - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2); -#endif - sram_base = ioremap(CHESTNUT_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE); - memset(sram_base, 0, MV64360_SRAM_SIZE); - - /* - * Configure MPP pins for PCI DMA - * - * PCI Slot GNT pin REQ pin - * 0 MPP16 MPP17 - * 1 MPP18 MPP19 - * 2 MPP20 MPP21 - * 3 MPP22 MPP23 - */ - mv64x60_write(&bh, MV64x60_MPP_CNTL_2, - (0x1 << 0) | /* MPPSel16 PCI0_GNT[0] */ - (0x1 << 4) | /* MPPSel17 PCI0_REQ[0] */ - (0x1 << 8) | /* MPPSel18 PCI0_GNT[1] */ - (0x1 << 12) | /* MPPSel19 PCI0_REQ[1] */ - (0x1 << 16) | /* MPPSel20 PCI0_GNT[2] */ - (0x1 << 20) | /* MPPSel21 PCI0_REQ[2] */ - (0x1 << 24) | /* MPPSel22 PCI0_GNT[3] */ - (0x1 << 28)); /* MPPSel23 PCI0_REQ[3] */ - /* - * Set unused MPP pins for output, as per schematic note - * - * Unused Pins: MPP01, MPP02, MPP04, MPP05, MPP06 - * MPP09, MPP10, MPP13, MPP14, MPP15 - */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_0, - (0xf << 4) | /* MPPSel01 GPIO[1] */ - (0xf << 8) | /* MPPSel02 GPIO[2] */ - (0xf << 16) | /* MPPSel04 GPIO[4] */ - (0xf << 20) | /* MPPSel05 GPIO[5] */ - (0xf << 24)); /* MPPSel06 GPIO[6] */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, - (0xf << 4) | /* MPPSel09 GPIO[9] */ - (0xf << 8) | /* MPPSel10 GPIO[10] */ - (0xf << 20) | /* MPPSel13 GPIO[13] */ - (0xf << 24) | /* MPPSel14 GPIO[14] */ - (0xf << 28)); /* MPPSel15 GPIO[15] */ - mv64x60_set_bits(&bh, MV64x60_GPP_IO_CNTL, /* Output */ - BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(6) | - BIT(9) | BIT(10) | BIT(13) | BIT(14) | BIT(15)); - - /* - * Configure the following MPP pins to indicate a level - * triggered interrupt - * - * MPP24 - Board Reset (just map the MPP & GPP for chestnut_reset) - * MPP25 - UART A (high) - * MPP26 - UART B (high) - * MPP28 - PCI Slot 3 (low) - * MPP29 - PCI Slot 2 (low) - * MPP30 - PCI Slot 1 (low) - * MPP31 - PCI Slot 0 (low) - */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_3, - BIT(3) | BIT(2) | BIT(1) | BIT(0) | /* MPP 24 */ - BIT(7) | BIT(6) | BIT(5) | BIT(4) | /* MPP 25 */ - BIT(11) | BIT(10) | BIT(9) | BIT(8) | /* MPP 26 */ - BIT(19) | BIT(18) | BIT(17) | BIT(16) | /* MPP 28 */ - BIT(23) | BIT(22) | BIT(21) | BIT(20) | /* MPP 29 */ - BIT(27) | BIT(26) | BIT(25) | BIT(24) | /* MPP 30 */ - BIT(31) | BIT(30) | BIT(29) | BIT(28)); /* MPP 31 */ - - /* - * Define GPP 25 (high), 26 (high), 28 (low), 29 (low), 30 (low), - * 31 (low) interrupt polarity input signal and level triggered - */ - mv64x60_clr_bits(&bh, MV64x60_GPP_LEVEL_CNTL, BIT(25) | BIT(26)); - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, - BIT(28) | BIT(29) | BIT(30) | BIT(31)); - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, - BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) | - BIT(31)); - - /* Config GPP interrupt controller to respond to level trigger */ - mv64x60_set_bits(&bh, MV64360_COMM_ARBITER_CNTL, BIT(10)); - - /* - * Dismiss and then enable interrupt on GPP interrupt cause for CPU #0 - */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, - ~(BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) | - BIT(31))); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, - BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) | - BIT(31)); - - /* - * Dismiss and then enable interrupt on CPU #0 high cause register - * BIT27 summarizes GPP interrupts 24-31 - */ - mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, BIT(27)); - - if (ppc_md.progress) - ppc_md.progress("chestnut_setup_bridge: exit", 0); -} - -/************************************************************************** - * FUNCTION: chestnut_setup_arch - * - * DESCRIPTION: ppc_md machine configuration callback - * - ****/ -static void __init -chestnut_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("chestnut_setup_arch: enter", 0); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000 / HZ; - - /* if the time base value is greater than bus freq/4 (the TB and - * decrementer tick rate) + signed integer rollover value, we - * can spend a fair amount of time waiting for the rollover to - * happen. To get around this, initialize the time base register - * to a "safe" value. - */ - set_tb(0, 0); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - /* - * Set up the L2CR register. - */ - _set_L2CR(_get_L2CR() | L2CR_L2E); - - chestnut_setup_bridge(); - chestnut_setup_peripherals(); - -#ifdef CONFIG_DUMMY_CONSOLE - conswitchp = &dummy_con; -#endif - -#if defined(CONFIG_SERIAL_8250) - chestnut_early_serial_map(); -#endif - - /* Identify the system */ - printk(KERN_INFO "System Identification: IBM 750FX/GX Eval Board\n"); - printk(KERN_INFO "IBM 750FX/GX port (C) 2004 MontaVista Software, Inc." - " (source@mvista.com)\n"); - - if (ppc_md.progress) - ppc_md.progress("chestnut_setup_arch: exit", 0); -} - -#ifdef CONFIG_MTD_PHYSMAP -static struct mtd_partition ptbl; - -static int __init -chestnut_setup_mtd(void) -{ - memset(&ptbl, 0, sizeof(ptbl)); - - ptbl.name = "User FS"; - ptbl.size = CHESTNUT_32BIT_SIZE; - - physmap_map.size = CHESTNUT_32BIT_SIZE; - physmap_set_partitions(&ptbl, 1); - return 0; -} - -arch_initcall(chestnut_setup_mtd); -#endif - -/************************************************************************** - * FUNCTION: chestnut_restart - * - * DESCRIPTION: ppc_md machine reset callback - * reset the board via the CPLD command register - * - ****/ -static void -chestnut_restart(char *cmd) -{ - volatile ulong i = 10000000; - - local_irq_disable(); - - /* - * Set CPLD Reg 3 bit 0 to 1 to allow MPP signals on reset to work - * - * MPP24 - board reset - */ - writeb(0x1, cpld_base + 3); - - /* GPP pin tied to MPP earlier */ - mv64x60_set_bits(&bh, MV64x60_GPP_VALUE_SET, BIT(24)); - - while (i-- > 0); - panic("restart failed\n"); -} - -static void -chestnut_halt(void) -{ - local_irq_disable(); - for (;;); - /* NOTREACHED */ -} - -static void -chestnut_power_off(void) -{ - chestnut_halt(); - /* NOTREACHED */ -} - -/************************************************************************** - * FUNCTION: chestnut_map_io - * - * DESCRIPTION: configure fixed memory-mapped IO - * - ****/ -static void __init -chestnut_map_io(void) -{ -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - io_block_mapping(CHESTNUT_UART_BASE, CHESTNUT_UART_BASE, 0x100000, - _PAGE_IO); -#endif -} - -/************************************************************************** - * FUNCTION: chestnut_set_bat - * - * DESCRIPTION: configures a (temporary) bat mapping for early access to - * device I/O - * - ****/ -static __inline__ void -chestnut_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT3U, 0xf0001ffe); - mtspr(SPRN_DBAT3L, 0xf000002a); - mb(); -} - -/************************************************************************** - * FUNCTION: platform_init - * - * DESCRIPTION: main entry point for configuring board-specific machine - * callbacks - * - ****/ -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* Copy the kernel command line arguments to a safe place. */ - - if (r6) { - *(char *) (r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *) (r6 + KERNELBASE)); - } - - isa_mem_base = 0; - - ppc_md.setup_arch = chestnut_setup_arch; - ppc_md.show_cpuinfo = chestnut_show_cpuinfo; - ppc_md.init_IRQ = mv64360_init_irq; - ppc_md.get_irq = mv64360_get_irq; - ppc_md.init = NULL; - - ppc_md.find_end_of_memory = chestnut_find_end_of_memory; - ppc_md.setup_io_mappings = chestnut_map_io; - - ppc_md.restart = chestnut_restart; - ppc_md.power_off = chestnut_power_off; - ppc_md.halt = chestnut_halt; - - ppc_md.time_init = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.calibrate_decr = chestnut_calibrate_decr; - - ppc_md.nvram_read_val = NULL; - ppc_md.nvram_write_val = NULL; - - ppc_md.heartbeat = NULL; - - bh.p_base = CONFIG_MV64X60_NEW_BASE; - - chestnut_set_bat(); - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) - ppc_md.progress = gen550_progress; -#endif -#if defined(CONFIG_KGDB) - ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; -#endif - - if (ppc_md.progress) - ppc_md.progress("chestnut_init(): exit", 0); -} diff --git a/arch/ppc/platforms/chestnut.h b/arch/ppc/platforms/chestnut.h deleted file mode 100644 index e00fd9f8bbd039cd189c85e006f4aad9eee7235c..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/chestnut.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * Definitions for IBM 750FXGX Eval (Chestnut) - * - * Author: - * - * Based on Artesyn Katana code done by Tim Montgomery - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by Mark A. Greer - * - * <2004> (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * This is the CPU physical memory map (windows must be at least 1MB and start - * on a boundary that is a multiple of the window size): - * - * Seems on the IBM 750FXGX Eval board, the MV64460 Registers can be in - * only 2 places per switch U17 0x14000000 or 0xf1000000 easily - chose to - * implement at 0xf1000000 only at this time - * - * 0xfff00000-0xffffffff - 8 Flash - * 0xffe00000-0xffefffff - BOOT SRAM - * 0xffd00000-0xffd00004 - CPLD - * 0xffc00000-0xffc0000f - UART - * 0xffb00000-0xffb07fff - FRAM - * 0xff840000-0xffafffff - *** HOLE *** - * 0xff800000-0xff83ffff - MV64460 Integrated SRAM - * 0xfe000000-0xff8fffff - *** HOLE *** - * 0xfc000000-0xfdffffff - 32bit Flash - * 0xf1010000-0xfbffffff - *** HOLE *** - * 0xf1000000-0xf100ffff - MV64460 Registers - */ - -#ifndef __PPC_PLATFORMS_CHESTNUT_H__ -#define __PPC_PLATFORMS_CHESTNUT_H__ - -#define CHESTNUT_BOOT_8BIT_BASE 0xfff00000 -#define CHESTNUT_BOOT_8BIT_SIZE_ACTUAL (1024*1024) -#define CHESTNUT_BOOT_SRAM_BASE 0xffe00000 -#define CHESTNUT_BOOT_SRAM_SIZE_ACTUAL (1024*1024) -#define CHESTNUT_CPLD_BASE 0xffd00000 -#define CHESTNUT_CPLD_SIZE_ACTUAL 5 -#define CHESTNUT_CPLD_REG3 (CHESTNUT_CPLD_BASE+3) -#define CHESTNUT_UART_BASE 0xffc00000 -#define CHESTNUT_UART_SIZE_ACTUAL 16 -#define CHESTNUT_FRAM_BASE 0xffb00000 -#define CHESTNUT_FRAM_SIZE_ACTUAL (32*1024) -#define CHESTNUT_INTERNAL_SRAM_BASE 0xff800000 -#define CHESTNUT_32BIT_BASE 0xfc000000 -#define CHESTNUT_32BIT_SIZE (32*1024*1024) - -#define CHESTNUT_BOOT_8BIT_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - CHESTNUT_BOOT_8BIT_SIZE_ACTUAL) -#define CHESTNUT_BOOT_SRAM_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - CHESTNUT_BOOT_SRAM_SIZE_ACTUAL) -#define CHESTNUT_CPLD_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - CHESTNUT_CPLD_SIZE_ACTUAL) -#define CHESTNUT_UART_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - CHESTNUT_UART_SIZE_ACTUAL) -#define CHESTNUT_FRAM_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - CHESTNUT_FRAM_SIZE_ACTUAL) - -#define CHESTNUT_BUS_SPEED 200000000 -#define CHESTNUT_PIBS_DATABASE 0xf0000 /* from PIBS src code */ - -#define KATANA_ETH0_PHY_ADDR 12 -#define KATANA_ETH1_PHY_ADDR 11 -#define KATANA_ETH2_PHY_ADDR 4 - -#define CHESTNUT_ETH_TX_QUEUE_SIZE 800 -#define CHESTNUT_ETH_RX_QUEUE_SIZE 400 - -/* - * PCI windows - */ - -#define CHESTNUT_PCI0_MEM_PROC_ADDR 0x80000000 -#define CHESTNUT_PCI0_MEM_PCI_HI_ADDR 0x00000000 -#define CHESTNUT_PCI0_MEM_PCI_LO_ADDR 0x80000000 -#define CHESTNUT_PCI0_MEM_SIZE 0x10000000 -#define CHESTNUT_PCI0_IO_PROC_ADDR 0xa0000000 -#define CHESTNUT_PCI0_IO_PCI_ADDR 0x00000000 -#define CHESTNUT_PCI0_IO_SIZE 0x01000000 - -/* - * Board-specific IRQ info - */ -#define CHESTNUT_PCI_SLOT0_IRQ (64 + 31) -#define CHESTNUT_PCI_SLOT1_IRQ (64 + 30) -#define CHESTNUT_PCI_SLOT2_IRQ (64 + 29) -#define CHESTNUT_PCI_SLOT3_IRQ (64 + 28) - -/* serial port definitions */ -#define CHESTNUT_UART0_IO_BASE (CHESTNUT_UART_BASE + 8) -#define CHESTNUT_UART1_IO_BASE CHESTNUT_UART_BASE - -#define UART0_INT (64 + 25) -#define UART1_INT (64 + 26) - -#ifdef CONFIG_SERIAL_MANY_PORTS -#define RS_TABLE_SIZE 64 -#else -#define RS_TABLE_SIZE 2 -#endif - -/* Rate for the 3.6864 Mhz clock for the onboard serial chip */ -#define BASE_BAUD (3686400 / 16) - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) -#endif - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, STD_COM_FLAGS, \ - iomem_base: (u8 *)CHESTNUT_UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -#endif /* __PPC_PLATFORMS_CHESTNUT_H__ */ diff --git a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c deleted file mode 100644 index 07f672d58767efd4a1f78fcce44013feaf6e18b4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/cpci690.c +++ /dev/null @@ -1,453 +0,0 @@ -/* - * Board setup routines for the Force CPCI690 board. - * - * Author: Mark A. Greer - * - * 2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This programr - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define BOARD_VENDOR "Force" -#define BOARD_MACHINE "CPCI690" - -/* Set IDE controllers into Native mode? */ -#define SET_PCI_IDE_NATIVE - -static struct mv64x60_handle bh; -static void __iomem *cpci690_br_base; - -TODC_ALLOC(); - -static int __init -cpci690_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - - if (hose->index == 0) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 90, 91, 88, 89 }, /* IDSEL 30/20 - Sentinel */ - }; - - const long min_idsel = 20, max_idsel = 20, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } else { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 93, 94, 95, 92 }, /* IDSEL 28/18 - PMC slot 2 */ - { 0, 0, 0, 0 }, /* IDSEL 29/19 - Not used */ - { 94, 95, 92, 93 }, /* IDSEL 30/20 - PMC slot 1 */ - }; - - const long min_idsel = 18, max_idsel = 20, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } -} - -#define GB (1024UL * 1024UL * 1024UL) - -static u32 -cpci690_get_bus_freq(void) -{ - if (boot_mem_size >= (1*GB)) /* bus speed based on mem size */ - return 100000000; - else - return 133333333; -} - -static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */ - 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/ - 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/ -}; - -static int -cpci690_get_cpu_freq(void) -{ - unsigned long pll_cfg; - - pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27; - return cpci690_get_bus_freq() * cpu_750xx[pll_cfg]/2; -} - -static void __init -cpci690_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - si.pci_0.enable_bus = 1; - si.pci_0.pci_io.cpu_base = CPCI690_PCI0_IO_START_PROC_ADDR; - si.pci_0.pci_io.pci_base_hi = 0; - si.pci_0.pci_io.pci_base_lo = CPCI690_PCI0_IO_START_PCI_ADDR; - si.pci_0.pci_io.size = CPCI690_PCI0_IO_SIZE; - si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_mem[0].cpu_base = CPCI690_PCI0_MEM_START_PROC_ADDR; - si.pci_0.pci_mem[0].pci_base_hi = CPCI690_PCI0_MEM_START_PCI_HI_ADDR; - si.pci_0.pci_mem[0].pci_base_lo = CPCI690_PCI0_MEM_START_PCI_LO_ADDR; - si.pci_0.pci_mem[0].size = CPCI690_PCI0_MEM_SIZE; - si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_cmd_bits = 0; - si.pci_0.latency_timer = 0x80; - - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = CPCI690_PCI1_IO_START_PROC_ADDR; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = CPCI690_PCI1_IO_START_PCI_ADDR; - si.pci_1.pci_io.size = CPCI690_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = CPCI690_PCI1_MEM_START_PROC_ADDR; - si.pci_1.pci_mem[0].pci_base_hi = CPCI690_PCI1_MEM_START_PCI_HI_ADDR; - si.pci_1.pci_mem[0].pci_base_lo = CPCI690_PCI1_MEM_START_PCI_LO_ADDR; - si.pci_1.pci_mem[0].size = CPCI690_PCI1_MEM_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x80; - - for (i=0; ifirst_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0); - - bh.hose_b->first_busno = bh.hose_a->last_busno + 1; - mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno); - bh.hose_b->last_busno = 0xff; - bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, - bh.hose_b->first_busno); -} - -static void __init -cpci690_setup_peripherals(void) -{ - /* Set up windows to CPLD, RTC/TODC, IPMI. */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, CPCI690_BR_BASE, - CPCI690_BR_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - cpci690_br_base = ioremap(CPCI690_BR_BASE, CPCI690_BR_SIZE); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, CPCI690_TODC_BASE, - CPCI690_TODC_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - TODC_INIT(TODC_TYPE_MK48T35, 0, 0, - ioremap(CPCI690_TODC_BASE, CPCI690_TODC_SIZE), 8); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, CPCI690_IPMI_BASE, - CPCI690_IPMI_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - - mv64x60_set_bits(&bh, MV64x60_PCI0_ARBITER_CNTL, (1<<31)); - mv64x60_set_bits(&bh, MV64x60_PCI1_ARBITER_CNTL, (1<<31)); - - mv64x60_set_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1<<9)); /* Only 1 cpu */ - - /* - * Turn off timer/counters. Not turning off watchdog timer because - * can't read its reg on the 64260A so don't know if we'll be enabling - * or disabling. - */ - mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, - ((1<<0) | (1<<8) | (1<<16) | (1<<24))); - mv64x60_clr_bits(&bh, GT64260_TIMR_CNTR_4_7_CNTL, - ((1<<0) | (1<<8) | (1<<16) | (1<<24))); - - /* - * Set MPSC Multiplex RMII - * NOTE: ethernet driver modifies bit 0 and 1 - */ - mv64x60_write(&bh, GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102); - -#define GPP_EXTERNAL_INTERRUPTS \ - ((1<<24) | (1<<25) | (1<<26) | (1<<27) | \ - (1<<28) | (1<<29) | (1<<30) | (1<<31)) - /* PCI interrupts are inputs */ - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, GPP_EXTERNAL_INTERRUPTS); - /* PCI interrupts are active low */ - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, GPP_EXTERNAL_INTERRUPTS); - - /* Clear any pending interrupts for these inputs and enable them. */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~GPP_EXTERNAL_INTERRUPTS); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, GPP_EXTERNAL_INTERRUPTS); - - /* Route MPP interrupt inputs to GPP */ - mv64x60_write(&bh, MV64x60_MPP_CNTL_2, 0x00000000); - mv64x60_write(&bh, MV64x60_MPP_CNTL_3, 0x00000000); -} - -static void __init -cpci690_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("cpci690_setup_arch: enter", 0); -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - if (ppc_md.progress) - ppc_md.progress("cpci690_setup_arch: Enabling L2 cache", 0); - - /* Enable L2 and L3 caches (if 745x) */ - _set_L2CR(_get_L2CR() | L2CR_L2E); - _set_L3CR(_get_L3CR() | L3CR_L3E); - - if (ppc_md.progress) - ppc_md.progress("cpci690_setup_arch: Initializing bridge", 0); - - cpci690_setup_bridge(); /* set up PCI bridge(s) */ - cpci690_setup_peripherals(); /* set up chip selects/GPP/MPP etc */ - - if (ppc_md.progress) - ppc_md.progress("cpci690_setup_arch: bridge init complete", 0); - - printk(KERN_INFO "%s %s port (C) 2003 MontaVista Software, Inc. " - "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE); - - if (ppc_md.progress) - ppc_md.progress("cpci690_setup_arch: exit", 0); -} - -/* Platform device data fixup routines. */ -#if defined(CONFIG_SERIAL_MPSC) -static void __init -cpci690_fixup_mpsc_pdata(struct platform_device *pdev) -{ - struct mpsc_pdata *pdata; - - pdata = (struct mpsc_pdata *)pdev->dev.platform_data; - - pdata->max_idle = 40; - pdata->default_baud = CPCI690_MPSC_BAUD; - pdata->brg_clk_src = CPCI690_MPSC_CLK_SRC; - pdata->brg_clk_freq = cpci690_get_bus_freq(); -} - -static int -cpci690_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn)(struct platform_device *pdev)); - } dev_map[] = { - { MPSC_CTLR_NAME ".0", cpci690_fixup_mpsc_pdata }, - { MPSC_CTLR_NAME ".1", cpci690_fixup_mpsc_pdata }, - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i=0; ibus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - - pdev = container_of(dev, - struct platform_device, dev); - dev_map[i].rtn(pdev); - } - - return 0; -} -#endif - -static void -cpci690_reset_board(void) -{ - u32 i = 10000; - - local_irq_disable(); - out_8((cpci690_br_base + CPCI690_BR_SW_RESET), 0x11); - - while (i != 0) i++; - panic("restart failed\n"); -} - -static void -cpci690_restart(char *cmd) -{ - cpci690_reset_board(); -} - -static void -cpci690_halt(void) -{ - while (1); - /* NOTREACHED */ -} - -static void -cpci690_power_off(void) -{ - cpci690_halt(); - /* NOTREACHED */ -} - -static int -cpci690_show_cpuinfo(struct seq_file *m) -{ - char *s; - - seq_printf(m, "cpu MHz\t\t: %d\n", - (cpci690_get_cpu_freq() + 500000) / 1000000); - seq_printf(m, "bus MHz\t\t: %d\n", - (cpci690_get_bus_freq() + 500000) / 1000000); - seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n"); - seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n"); - seq_printf(m, "FPGA Revision\t: %d\n", - in_8(cpci690_br_base + CPCI690_BR_MEM_CTLR) >> 5); - - switch(bh.type) { - case MV64x60_TYPE_GT64260A: - s = "gt64260a"; - break; - case MV64x60_TYPE_GT64260B: - s = "gt64260b"; - break; - case MV64x60_TYPE_MV64360: - s = "mv64360"; - break; - case MV64x60_TYPE_MV64460: - s = "mv64460"; - break; - default: - s = "Unknown"; - } - seq_printf(m, "bridge type\t: %s\n", s); - seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev); -#if defined(CONFIG_NOT_COHERENT_CACHE) - seq_printf(m, "coherency\t: %s\n", "off"); -#else - seq_printf(m, "coherency\t: %s\n", "on"); -#endif - - return 0; -} - -static void __init -cpci690_calibrate_decr(void) -{ - ulong freq; - - freq = cpci690_get_bus_freq() / 4; - - printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq/1000000, freq%1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); -} - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC) -static void __init -cpci690_map_io(void) -{ - io_block_mapping(CONFIG_MV64X60_NEW_BASE, CONFIG_MV64X60_NEW_BASE, - 128 * 1024, _PAGE_IO); -} -#endif - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - isa_mem_base = 0; - - ppc_md.setup_arch = cpci690_setup_arch; - ppc_md.show_cpuinfo = cpci690_show_cpuinfo; - ppc_md.init_IRQ = gt64260_init_irq; - ppc_md.get_irq = gt64260_get_irq; - ppc_md.restart = cpci690_restart; - ppc_md.power_off = cpci690_power_off; - ppc_md.halt = cpci690_halt; - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - ppc_md.calibrate_decr = cpci690_calibrate_decr; - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC) - ppc_md.setup_io_mappings = cpci690_map_io; -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = mv64x60_mpsc_progress; - mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#endif /* defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC) */ - -#if defined(CONFIG_SERIAL_MPSC) - platform_notify = cpci690_platform_notify; -#endif -} diff --git a/arch/ppc/platforms/cpci690.h b/arch/ppc/platforms/cpci690.h deleted file mode 100644 index 0fa5a4c31b6754dbfcaf66f38c708338c28090f9..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/cpci690.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Definitions for Force CPCI690 - * - * Author: Mark A. Greer - * - * 2003 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * The GT64260 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - */ - -#ifndef __PPC_PLATFORMS_CPCI690_H -#define __PPC_PLATFORMS_CPCI690_H - -/* - * Define bd_t to pass in the MAC addresses used by the GT64260's enet ctlrs. - */ -#define CPCI690_BI_MAGIC 0xFE8765DC - -typedef struct board_info { - u32 bi_magic; - u8 bi_enetaddr[3][6]; -} bd_t; - -/* PCI bus Resource setup */ -#define CPCI690_PCI0_MEM_START_PROC_ADDR 0x80000000 -#define CPCI690_PCI0_MEM_START_PCI_HI_ADDR 0x00000000 -#define CPCI690_PCI0_MEM_START_PCI_LO_ADDR 0x80000000 -#define CPCI690_PCI0_MEM_SIZE 0x10000000 -#define CPCI690_PCI0_IO_START_PROC_ADDR 0xa0000000 -#define CPCI690_PCI0_IO_START_PCI_ADDR 0x00000000 -#define CPCI690_PCI0_IO_SIZE 0x01000000 - -#define CPCI690_PCI1_MEM_START_PROC_ADDR 0x90000000 -#define CPCI690_PCI1_MEM_START_PCI_HI_ADDR 0x00000000 -#define CPCI690_PCI1_MEM_START_PCI_LO_ADDR 0x90000000 -#define CPCI690_PCI1_MEM_SIZE 0x10000000 -#define CPCI690_PCI1_IO_START_PROC_ADDR 0xa1000000 -#define CPCI690_PCI1_IO_START_PCI_ADDR 0x01000000 -#define CPCI690_PCI1_IO_SIZE 0x01000000 - -/* Board Registers */ -#define CPCI690_BR_BASE 0xf0000000 -#define CPCI690_BR_SIZE_ACTUAL 0x8 -#define CPCI690_BR_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - CPCI690_BR_SIZE_ACTUAL) -#define CPCI690_BR_LED_CNTL 0x00 -#define CPCI690_BR_SW_RESET 0x01 -#define CPCI690_BR_MISC_STATUS 0x02 -#define CPCI690_BR_SWITCH_STATUS 0x03 -#define CPCI690_BR_MEM_CTLR 0x04 -#define CPCI690_BR_LAST_RESET_1 0x05 -#define CPCI690_BR_LAST_RESET_2 0x06 - -#define CPCI690_TODC_BASE 0xf0100000 -#define CPCI690_TODC_SIZE_ACTUAL 0x8000 /* Size or NVRAM + RTC */ -#define CPCI690_TODC_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - CPCI690_TODC_SIZE_ACTUAL) -#define CPCI690_MAC_OFFSET 0x7c10 /* MAC in RTC NVRAM */ - -#define CPCI690_IPMI_BASE 0xf0200000 -#define CPCI690_IPMI_SIZE_ACTUAL 0x10 /* 16 bytes of IPMI */ -#define CPCI690_IPMI_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - CPCI690_IPMI_SIZE_ACTUAL) - -#define CPCI690_MPSC_BAUD 9600 -#define CPCI690_MPSC_CLK_SRC 8 /* TCLK */ - -#endif /* __PPC_PLATFORMS_CPCI690_H */ diff --git a/arch/ppc/platforms/est8260.h b/arch/ppc/platforms/est8260.h deleted file mode 100644 index adba68ecf57bfda24f25b06c7a98b401f8536476..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/est8260.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Board information for the EST8260, which should be generic for - * all 8260 boards. The IMMR is now given to us so the hard define - * will soon be removed. All of the clock values are computed from - * the configuration SCMR and the Power-On-Reset word. - */ -#ifndef __EST8260_PLATFORM -#define __EST8260_PLATFORM - -#define CPM_MAP_ADDR ((uint)0xf0000000) - -#define BOOTROM_RESTART_ADDR ((uint)0xff000104) - -/* For our show_cpuinfo hooks. */ -#define CPUINFO_VENDOR "EST Corporation" -#define CPUINFO_MACHINE "SBC8260 PowerPC" - -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in MHz */ - unsigned int bi_cpmfreq; /* CPM Freq, in MHz */ - unsigned int bi_brgfreq; /* BRG Freq, in MHz */ - unsigned int bi_vco; /* VCO Out from PLL */ - unsigned int bi_baudrate; /* Default console baud rate */ - unsigned int bi_immr; /* IMMR when called from boot rom */ - unsigned char bi_enetaddr[6]; -} bd_t; - -extern bd_t m8xx_board_info; - -#endif /* __EST8260_PLATFORM */ diff --git a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c deleted file mode 100644 index f522b31c46d7bca107263e2e1e68ca7d7dd588ea..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ev64260.c +++ /dev/null @@ -1,649 +0,0 @@ -/* - * Board setup routines for the Marvell/Galileo EV-64260-BP Evaluation Board. - * - * Author: Mark A. Greer - * - * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * The EV-64260-BP port is the result of hard work from many people from - * many companies. In particular, employees of Marvell/Galileo, Mission - * Critical Linux, Xyterra, and MontaVista Software were heavily involved. - * - * Note: I have not been able to get *all* PCI slots to work reliably - * at 66 MHz. I recommend setting jumpers J15 & J16 to short pins 1&2 - * so that 33 MHz is used. --MAG - * Note: The 750CXe and 7450 are not stable with a 125MHz or 133MHz TCLK/SYSCLK. - * At 100MHz, they are solid. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if !defined(CONFIG_SERIAL_MPSC_CONSOLE) -#include -#include -#include -#include -#else -#include -#endif -#include -#include -#include -#include -#include - -#include - -#define BOARD_VENDOR "Marvell/Galileo" -#define BOARD_MACHINE "EV-64260-BP" - -static struct mv64x60_handle bh; - -#if !defined(CONFIG_SERIAL_MPSC_CONSOLE) -extern void gen550_progress(char *, unsigned short); -extern void gen550_init(int, struct uart_port *); -#endif - -static const unsigned int cpu_7xx[16] = { /* 7xx & 74xx (but not 745x) */ - 18, 15, 14, 2, 4, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0 -}; -static const unsigned int cpu_745x[2][16] = { /* PLL_EXT 0 & 1 */ - { 1, 15, 14, 2, 4, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0 }, - { 0, 30, 0, 2, 0, 26, 0, 18, 0, 22, 20, 24, 28, 32, 0, 0 } -}; - - -TODC_ALLOC(); - -static int -ev64260_get_bus_speed(void) -{ - return 100000000; -} - -static int -ev64260_get_cpu_speed(void) -{ - unsigned long pvr, hid1, pll_ext; - - pvr = PVR_VER(mfspr(SPRN_PVR)); - - if (pvr != PVR_VER(PVR_7450)) { - hid1 = mfspr(SPRN_HID1) >> 28; - return ev64260_get_bus_speed() * cpu_7xx[hid1]/2; - } - else { - hid1 = (mfspr(SPRN_HID1) & 0x0001e000) >> 13; - pll_ext = 0; /* No way to read; must get from schematic */ - return ev64260_get_bus_speed() * cpu_745x[pll_ext][hid1]/2; - } -} - -unsigned long __init -ev64260_find_end_of_memory(void) -{ - return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, - MV64x60_TYPE_GT64260A); -} - -/* - * Marvell/Galileo EV-64260-BP Evaluation Board PCI interrupt routing. - * Note: By playing with J8 and JP1-4, you can get 2 IRQ's from the first - * PCI bus (in which cast, INTPIN B would be EV64260_PCI_1_IRQ). - * This is the most IRQs you can get from one bus with this board, though. - */ -static int __init -ev64260_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - - if (hose->index == 0) { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {EV64260_PCI_0_IRQ,0,0,0}, /* IDSEL 7 - PCI bus 0 */ - {EV64260_PCI_0_IRQ,0,0,0}, /* IDSEL 8 - PCI bus 0 */ - }; - - const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } - else { - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { EV64260_PCI_1_IRQ,0,0,0}, /* IDSEL 7 - PCI bus 1 */ - { EV64260_PCI_1_IRQ,0,0,0}, /* IDSEL 8 - PCI bus 1 */ - }; - - const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } -} - -static void __init -ev64260_setup_peripherals(void) -{ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - EV64260_EMB_FLASH_BASE, EV64260_EMB_FLASH_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, - EV64260_EXT_SRAM_BASE, EV64260_EXT_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, - EV64260_TODC_BASE, EV64260_TODC_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, - EV64260_UART_BASE, EV64260_UART_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, - EV64260_EXT_FLASH_BASE, EV64260_EXT_FLASH_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN); - - TODC_INIT(TODC_TYPE_DS1501, 0, 0, - ioremap(EV64260_TODC_BASE, EV64260_TODC_SIZE), 8); - - mv64x60_clr_bits(&bh, MV64x60_CPU_CONFIG,((1<<12) | (1<<28) | (1<<29))); - mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1<<27)); - - if (ev64260_get_bus_speed() > 100000000) - mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1<<23)); - - mv64x60_set_bits(&bh, MV64x60_PCI0_PCI_DECODE_CNTL, ((1<<0) | (1<<3))); - mv64x60_set_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, ((1<<0) | (1<<3))); - - /* - * Enabling of PCI internal-vs-external arbitration - * is a platform- and errata-dependent decision. - */ - if (bh.type == MV64x60_TYPE_GT64260A ) { - mv64x60_set_bits(&bh, MV64x60_PCI0_ARBITER_CNTL, (1<<31)); - mv64x60_set_bits(&bh, MV64x60_PCI1_ARBITER_CNTL, (1<<31)); - } - - mv64x60_set_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1<<9)); /* Only 1 cpu */ - - /* - * Turn off timer/counters. Not turning off watchdog timer because - * can't read its reg on the 64260A so don't know if we'll be enabling - * or disabling. - */ - mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, - ((1<<0) | (1<<8) | (1<<16) | (1<<24))); - mv64x60_clr_bits(&bh, GT64260_TIMR_CNTR_4_7_CNTL, - ((1<<0) | (1<<8) | (1<<16) | (1<<24))); - - /* - * Set MPSC Multiplex RMII - * NOTE: ethernet driver modifies bit 0 and 1 - */ - mv64x60_write(&bh, GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102); - - /* - * The EV-64260-BP uses several Multi-Purpose Pins (MPP) on the 64260 - * bridge as interrupt inputs (via the General Purpose Ports (GPP) - * register). Need to route the MPP inputs to the GPP and set the - * polarity correctly. - * - * In MPP Control 2 Register - * MPP 21 -> GPP 21 (DUART channel A intr) bits 20-23 -> 0 - * MPP 22 -> GPP 22 (DUART channel B intr) bits 24-27 -> 0 - */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_2, (0xf<<20) | (0xf<<24) ); - - /* - * In MPP Control 3 Register - * MPP 26 -> GPP 26 (RTC INT) bits 8-11 -> 0 - * MPP 27 -> GPP 27 (PCI 0 INTA) bits 12-15 -> 0 - * MPP 29 -> GPP 29 (PCI 1 INTA) bits 20-23 -> 0 - */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_3, (0xf<<8)|(0xf<<12)|(0xf<<20)); - -#define GPP_EXTERNAL_INTERRUPTS \ - ((1<<21) | (1<<22) | (1<<26) | (1<<27) | (1<<29)) - /* DUART & PCI interrupts are inputs */ - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, GPP_EXTERNAL_INTERRUPTS); - /* DUART & PCI interrupts are active low */ - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, GPP_EXTERNAL_INTERRUPTS); - - /* Clear any pending interrupts for these inputs and enable them. */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~GPP_EXTERNAL_INTERRUPTS); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, GPP_EXTERNAL_INTERRUPTS); - - return; -} - -static void __init -ev64260_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - si.pci_0.enable_bus = 1; - si.pci_0.pci_io.cpu_base = EV64260_PCI0_IO_CPU_BASE; - si.pci_0.pci_io.pci_base_hi = 0; - si.pci_0.pci_io.pci_base_lo = EV64260_PCI0_IO_PCI_BASE; - si.pci_0.pci_io.size = EV64260_PCI0_IO_SIZE; - si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_mem[0].cpu_base = EV64260_PCI0_MEM_CPU_BASE; - si.pci_0.pci_mem[0].pci_base_hi = 0; - si.pci_0.pci_mem[0].pci_base_lo = EV64260_PCI0_MEM_PCI_BASE; - si.pci_0.pci_mem[0].size = EV64260_PCI0_MEM_SIZE; - si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_cmd_bits = 0; - si.pci_0.latency_timer = 0x8; - - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = EV64260_PCI1_IO_CPU_BASE; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = EV64260_PCI1_IO_PCI_BASE; - si.pci_1.pci_io.size = EV64260_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = EV64260_PCI1_MEM_CPU_BASE; - si.pci_1.pci_mem[0].pci_base_hi = 0; - si.pci_1.pci_mem[0].pci_base_lo = EV64260_PCI1_MEM_PCI_BASE; - si.pci_1.pci_mem[0].size = EV64260_PCI1_MEM_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x8; - - for (i=0; ifirst_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0); - - bh.hose_b->first_busno = bh.hose_a->last_busno + 1; - mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno); - bh.hose_b->last_busno = 0xff; - bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, - bh.hose_b->first_busno); - - return; -} - -#if defined(CONFIG_SERIAL_8250) && !defined(CONFIG_SERIAL_MPSC_CONSOLE) -static void __init -ev64260_early_serial_map(void) -{ - struct uart_port port; - static char first_time = 1; - - if (first_time) { - memset(&port, 0, sizeof(port)); - - port.membase = ioremap(EV64260_SERIAL_0, EV64260_UART_SIZE); - port.irq = EV64260_UART_0_IRQ; - port.uartclk = BASE_BAUD * 16; - port.regshift = 2; - port.iotype = UPIO_MEM; - port.flags = STD_COM_FLAGS; - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - gen550_init(0, &port); -#endif - - if (early_serial_setup(&port) != 0) - printk(KERN_WARNING "Early serial init of port 0 " - "failed\n"); - - first_time = 0; - } - - return; -} -#elif defined(CONFIG_SERIAL_MPSC_CONSOLE) -static void __init -ev64260_early_serial_map(void) -{ -} -#endif - -static void __init -ev64260_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("ev64260_setup_arch: enter", 0); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - if (ppc_md.progress) - ppc_md.progress("ev64260_setup_arch: Enabling L2 cache", 0); - - /* Enable L2 and L3 caches (if 745x) */ - _set_L2CR(_get_L2CR() | L2CR_L2E); - _set_L3CR(_get_L3CR() | L3CR_L3E); - - if (ppc_md.progress) - ppc_md.progress("ev64260_setup_arch: Initializing bridge", 0); - - ev64260_setup_bridge(); /* set up PCI bridge(s) */ - ev64260_setup_peripherals(); /* set up chip selects/GPP/MPP etc */ - - if (ppc_md.progress) - ppc_md.progress("ev64260_setup_arch: bridge init complete", 0); - -#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_MPSC_CONSOLE) - ev64260_early_serial_map(); -#endif - - printk(KERN_INFO "%s %s port (C) 2001 MontaVista Software, Inc. " - "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE); - - if (ppc_md.progress) - ppc_md.progress("ev64260_setup_arch: exit", 0); - - return; -} - -/* Platform device data fixup routines. */ -#if defined(CONFIG_SERIAL_MPSC) -static void __init -ev64260_fixup_mpsc_pdata(struct platform_device *pdev) -{ - struct mpsc_pdata *pdata; - - pdata = (struct mpsc_pdata *)pdev->dev.platform_data; - - pdata->max_idle = 40; - pdata->default_baud = EV64260_DEFAULT_BAUD; - pdata->brg_clk_src = EV64260_MPSC_CLK_SRC; - pdata->brg_clk_freq = EV64260_MPSC_CLK_FREQ; - - return; -} - -static int -ev64260_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn)(struct platform_device *pdev)); - } dev_map[] = { - { MPSC_CTLR_NAME ".0", ev64260_fixup_mpsc_pdata }, - { MPSC_CTLR_NAME ".1", ev64260_fixup_mpsc_pdata }, - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i=0; ibus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - - pdev = container_of(dev, - struct platform_device, dev); - dev_map[i].rtn(pdev); - } - - return 0; -} -#endif - -static void -ev64260_reset_board(void *addr) -{ - local_irq_disable(); - - /* disable and invalidate the L2 cache */ - _set_L2CR(0); - _set_L2CR(0x200000); - - /* flush and disable L1 I/D cache */ - __asm__ __volatile__ - ("mfspr 3,1008\n\t" - "ori 5,5,0xcc00\n\t" - "ori 4,3,0xc00\n\t" - "andc 5,3,5\n\t" - "sync\n\t" - "mtspr 1008,4\n\t" - "isync\n\t" - "sync\n\t" - "mtspr 1008,5\n\t" - "isync\n\t" - "sync\n\t"); - - /* unmap any other random cs's that might overlap with bootcs */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, 0, 0, 0); - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, 0, 0, 0); - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, 0, 0, 0); - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, 0, 0, 0); - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN); - - /* map bootrom back in to gt @ reset defaults */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - 0xff800000, 8*1024*1024, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - /* move reg base back to default, setup default pci0 */ - mv64x60_write(&bh, MV64x60_INTERNAL_SPACE_DECODE, - (1<<24) | CONFIG_MV64X60_BASE >> 20); - - /* NOTE: FROM NOW ON no more GT_REGS accesses.. 0x1 is not mapped - * via BAT or MMU, and MSR IR/DR is ON */ - /* SRR0 has system reset vector, SRR1 has default MSR value */ - /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */ - /* NOTE: assumes reset vector is at 0xfff00100 */ - __asm__ __volatile__ - ("mtspr 26, %0\n\t" - "li 4,(1<<6)\n\t" - "mtspr 27,4\n\t" - "rfi\n\t" - :: "r" (addr):"r4"); - - return; -} - -static void -ev64260_restart(char *cmd) -{ - volatile ulong i = 10000000; - - ev64260_reset_board((void *)0xfff00100); - - while (i-- > 0); - panic("restart failed\n"); -} - -static void -ev64260_halt(void) -{ - local_irq_disable(); - while (1); - /* NOTREACHED */ -} - -static void -ev64260_power_off(void) -{ - ev64260_halt(); - /* NOTREACHED */ -} - -static int -ev64260_show_cpuinfo(struct seq_file *m) -{ - uint pvid; - - pvid = mfspr(SPRN_PVR); - seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n"); - seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n"); - seq_printf(m, "cpu MHz\t\t: %d\n", ev64260_get_cpu_speed()/1000/1000); - seq_printf(m, "bus MHz\t\t: %d\n", ev64260_get_bus_speed()/1000/1000); - - return 0; -} - -/* DS1501 RTC has too much variation to use RTC for calibration */ -static void __init -ev64260_calibrate_decr(void) -{ - ulong freq; - - freq = ev64260_get_bus_speed()/4; - - printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq/1000000, freq%1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); - - return; -} - -/* - * Set BAT 3 to map 0xfb000000 to 0xfc000000 of physical memory space. - */ -static __inline__ void -ev64260_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xfb0001fe); - mtspr(SPRN_DBAT1L, 0xfb00002a); - mb(); - - return; -} - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) -static void __init -ev64260_map_io(void) -{ - io_block_mapping(0xfb000000, 0xfb000000, 0x01000000, _PAGE_IO); -} -#endif - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ -#ifdef CONFIG_BLK_DEV_INITRD - extern int initrd_below_start_ok; - - initrd_start=initrd_end=0; - initrd_below_start_ok=0; -#endif /* CONFIG_BLK_DEV_INITRD */ - - parse_bootinfo(find_bootinfo()); - - isa_mem_base = 0; - isa_io_base = EV64260_PCI0_IO_CPU_BASE; - pci_dram_offset = EV64260_PCI0_MEM_CPU_BASE; - - loops_per_jiffy = ev64260_get_cpu_speed() / HZ; - - ppc_md.setup_arch = ev64260_setup_arch; - ppc_md.show_cpuinfo = ev64260_show_cpuinfo; - ppc_md.init_IRQ = gt64260_init_irq; - ppc_md.get_irq = gt64260_get_irq; - - ppc_md.restart = ev64260_restart; - ppc_md.power_off = ev64260_power_off; - ppc_md.halt = ev64260_halt; - - ppc_md.find_end_of_memory = ev64260_find_end_of_memory; - - ppc_md.init = NULL; - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - ppc_md.calibrate_decr = ev64260_calibrate_decr; - - bh.p_base = CONFIG_MV64X60_NEW_BASE; - - ev64260_set_bat(); - -#ifdef CONFIG_SERIAL_8250 -#if defined(CONFIG_SERIAL_TEXT_DEBUG) - ppc_md.setup_io_mappings = ev64260_map_io; - ppc_md.progress = gen550_progress; -#endif -#if defined(CONFIG_KGDB) - ppc_md.setup_io_mappings = ev64260_map_io; - ppc_md.early_serial_map = ev64260_early_serial_map; -#endif -#elif defined(CONFIG_SERIAL_MPSC_CONSOLE) -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.setup_io_mappings = ev64260_map_io; - ppc_md.progress = mv64x60_mpsc_progress; - mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#ifdef CONFIG_KGDB - ppc_md.setup_io_mappings = ev64260_map_io; - ppc_md.early_serial_map = ev64260_early_serial_map; -#endif /* CONFIG_KGDB */ - -#endif - -#if defined(CONFIG_SERIAL_MPSC) - platform_notify = ev64260_platform_notify; -#endif - - return; -} diff --git a/arch/ppc/platforms/ev64260.h b/arch/ppc/platforms/ev64260.h deleted file mode 100644 index 44d90d56745a53d852965443e1266577c13156fd..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ev64260.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board. - * - * Author: Mark A. Greer - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * The MV64x60 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - * We'll only use one PCI MEM window on each PCI bus. - * - * This is the CPU physical memory map (windows must be at least 1MB and start - * on a boundary that is a multiple of the window size): - * - * 0xfc000000-0xffffffff - External FLASH on device module - * 0xfbf00000-0xfbffffff - Embedded (on board) FLASH - * 0xfbe00000-0xfbefffff - GT64260 Registers (preferably) - * but really a config option - * 0xfbd00000-0xfbdfffff - External SRAM on device module - * 0xfbc00000-0xfbcfffff - TODC chip on device module - * 0xfbb00000-0xfbbfffff - External UART on device module - * 0xa2000000-0xfbafffff - - * 0xa1000000-0xa1ffffff - PCI 1 I/O (defined in gt64260.h) - * 0xa0000000-0xa0ffffff - PCI 0 I/O (defined in gt64260.h) - * 0x90000000-0x9fffffff - PCI 1 MEM (defined in gt64260.h) - * 0x80000000-0x8fffffff - PCI 0 MEM (defined in gt64260.h) - */ - -#ifndef __PPC_PLATFORMS_EV64260_H -#define __PPC_PLATFORMS_EV64260_H - -/* PCI mappings */ -#define EV64260_PCI0_IO_CPU_BASE 0xa0000000 -#define EV64260_PCI0_IO_PCI_BASE 0x00000000 -#define EV64260_PCI0_IO_SIZE 0x01000000 - -#define EV64260_PCI0_MEM_CPU_BASE 0x80000000 -#define EV64260_PCI0_MEM_PCI_BASE 0x80000000 -#define EV64260_PCI0_MEM_SIZE 0x10000000 - -#define EV64260_PCI1_IO_CPU_BASE (EV64260_PCI0_IO_CPU_BASE + \ - EV64260_PCI0_IO_SIZE) -#define EV64260_PCI1_IO_PCI_BASE (EV64260_PCI0_IO_PCI_BASE + \ - EV64260_PCI0_IO_SIZE) -#define EV64260_PCI1_IO_SIZE 0x01000000 - -#define EV64260_PCI1_MEM_CPU_BASE (EV64260_PCI0_MEM_CPU_BASE + \ - EV64260_PCI0_MEM_SIZE) -#define EV64260_PCI1_MEM_PCI_BASE (EV64260_PCI0_MEM_PCI_BASE + \ - EV64260_PCI0_MEM_SIZE) -#define EV64260_PCI1_MEM_SIZE 0x10000000 - -/* CPU Physical Memory Map setup (other than PCI) */ -#define EV64260_EXT_FLASH_BASE 0xfc000000 -#define EV64260_EMB_FLASH_BASE 0xfbf00000 -#define EV64260_EXT_SRAM_BASE 0xfbd00000 -#define EV64260_TODC_BASE 0xfbc00000 -#define EV64260_UART_BASE 0xfbb00000 - -#define EV64260_EXT_FLASH_SIZE_ACTUAL 0x04000000 /* <= 64MB Extern FLASH */ -#define EV64260_EMB_FLASH_SIZE_ACTUAL 0x00080000 /* 512KB of Embed FLASH */ -#define EV64260_EXT_SRAM_SIZE_ACTUAL 0x00100000 /* 1MB SDRAM */ -#define EV64260_TODC_SIZE_ACTUAL 0x00000020 /* 32 bytes for TODC */ -#define EV64260_UART_SIZE_ACTUAL 0x00000040 /* 64 bytes for DUART */ - -#define EV64260_EXT_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - EV64260_EXT_FLASH_SIZE_ACTUAL) -#define EV64260_EMB_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - EV64260_EMB_FLASH_SIZE_ACTUAL) -#define EV64260_EXT_SRAM_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - EV64260_EXT_SRAM_SIZE_ACTUAL) -#define EV64260_TODC_SIZE max(GT64260_WINDOW_SIZE_MIN, \ - EV64260_TODC_SIZE_ACTUAL) -/* Assembler in bootwrapper blows up if 'max' is used */ -#define EV64260_UART_SIZE GT64260_WINDOW_SIZE_MIN -#define EV64260_UART_END ((EV64260_UART_BASE + \ - EV64260_UART_SIZE - 1) & 0xfff00000) - -/* Board-specific IRQ info */ -#define EV64260_UART_0_IRQ 85 -#define EV64260_UART_1_IRQ 86 -#define EV64260_PCI_0_IRQ 91 -#define EV64260_PCI_1_IRQ 93 - -/* Serial port setup */ -#define EV64260_DEFAULT_BAUD 115200 - -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) -#define SERIAL_PORT_DFNS - -#define EV64260_MPSC_CLK_SRC 8 /* TCLK */ -#define EV64260_MPSC_CLK_FREQ 100000000 /* 100MHz clk */ -#else -#define EV64260_SERIAL_0 (EV64260_UART_BASE + 0x20) -#define EV64260_SERIAL_1 EV64260_UART_BASE - -#define BASE_BAUD (EV64260_DEFAULT_BAUD * 2) - -#ifdef CONFIG_SERIAL_MANY_PORTS -#define RS_TABLE_SIZE 64 -#else -#define RS_TABLE_SIZE 2 -#endif - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) -#endif - -/* Required for bootloader's ns16550.c code */ -#define STD_SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, EV64260_SERIAL_0, EV64260_UART_0_IRQ, STD_COM_FLAGS, \ - iomem_base: (u8 *)EV64260_SERIAL_0, /* ttyS0 */ \ - iomem_reg_shift: 2, \ - io_type: SERIAL_IO_MEM }, - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DFNS -#endif -#endif /* __PPC_PLATFORMS_EV64260_H */ diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c deleted file mode 100644 index 6765676a5c6b23b00cf918fdaba0733cbb1858fc..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ev64360.c +++ /dev/null @@ -1,517 +0,0 @@ -/* - * Board setup routines for the Marvell EV-64360-BP Evaluation Board. - * - * Author: Lee Nicks - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by - Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define BOARD_VENDOR "Marvell" -#define BOARD_MACHINE "EV-64360-BP" - -static struct mv64x60_handle bh; -static void __iomem *sram_base; - -static u32 ev64360_flash_size_0; -static u32 ev64360_flash_size_1; - -static u32 ev64360_bus_frequency; - -unsigned char __res[sizeof(bd_t)]; - -TODC_ALLOC(); - -static int __init -ev64360_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - return 0; -} - -static void __init -ev64360_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - #ifdef CONFIG_PCI - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = EV64360_PCI1_IO_START_PROC_ADDR; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = EV64360_PCI1_IO_START_PCI_ADDR; - si.pci_1.pci_io.size = EV64360_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = EV64360_PCI1_MEM_START_PROC_ADDR; - si.pci_1.pci_mem[0].pci_base_hi = EV64360_PCI1_MEM_START_PCI_HI_ADDR; - si.pci_1.pci_mem[0].pci_base_lo = EV64360_PCI1_MEM_START_PCI_LO_ADDR; - si.pci_1.pci_mem[0].size = EV64360_PCI1_MEM_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x80; - #else - si.pci_0.enable_bus = 0; - si.pci_1.enable_bus = 0; - #endif - - for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) { -#if defined(CONFIG_NOT_COHERENT_CACHE) - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; -#else - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */ - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */ - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */ - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES; -#endif - } - - if (mv64x60_init(&bh, &si)) - printk(KERN_WARNING "Bridge initialization failed.\n"); - - #ifdef CONFIG_PCI - pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */ - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = ev64360_map_irq; - ppc_md.pci_exclude_device = mv64x60_pci_exclude_device; - - mv64x60_set_bus(&bh, 1, 0); - bh.hose_b->first_busno = 0; - bh.hose_b->last_busno = 0xff; - #endif -} - -/* Bridge & platform setup routines */ -void __init -ev64360_intr_setup(void) -{ - /* MPP 8, 9, and 10 */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff); - - /* - * Define GPP 8,9,and 10 interrupt polarity as active low - * input signal and level triggered - */ - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, 0x700); - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, 0x700); - - /* Config GPP intr ctlr to respond to level trigger */ - mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10)); - - /* Erranum FEr PCI-#8 */ - mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1<<5) | (1<<9)); - mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<5) | (1<<9)); - - /* - * Dismiss and then enable interrupt on GPP interrupt cause - * for CPU #0 - */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~0x700); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, 0x700); - - /* - * Dismiss and then enable interrupt on CPU #0 high cause reg - * BIT25 summarizes GPP interrupts 8-15 - */ - mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1<<25)); -} - -void __init -ev64360_setup_peripherals(void) -{ - u32 base; - - /* Set up window for boot CS */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - EV64360_BOOT_WINDOW_BASE, EV64360_BOOT_WINDOW_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - /* We only use the 32-bit flash */ - mv64x60_get_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, &base, - &ev64360_flash_size_0); - ev64360_flash_size_1 = 0; - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, - EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - - TODC_INIT(TODC_TYPE_DS1501, 0, 0, - ioremap(EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE), 8); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - sram_base = ioremap(EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE); - - /* Set up Enet->SRAM window */ - mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, - EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0x2); - bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN); - - /* Give enet r/w access to memory region */ - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_0, (0x3 << (4 << 1))); - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_1, (0x3 << (4 << 1))); - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_2, (0x3 << (4 << 1))); - - mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3)); - mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, - ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24))); - -#if defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x00160000); -#else - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2); -#endif - - /* - * Setting the SRAM to 0. Note that this generates parity errors on - * internal data path in SRAM since it's first time accessing it - * while after reset it's not configured. - */ - memset(sram_base, 0, MV64360_SRAM_SIZE); - - /* set up PCI interrupt controller */ - ev64360_intr_setup(); -} - -static void __init -ev64360_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("ev64360_setup_arch: enter", 0); - - set_tb(0, 0); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - /* - * Set up the L2CR register. - */ - _set_L2CR(L2CR_L2E | L2CR_L2PE); - - if (ppc_md.progress) - ppc_md.progress("ev64360_setup_arch: calling setup_bridge", 0); - - ev64360_setup_bridge(); - ev64360_setup_peripherals(); - ev64360_bus_frequency = ev64360_bus_freq(); - - printk(KERN_INFO "%s %s port (C) 2005 Lee Nicks " - "(allinux@gmail.com)\n", BOARD_VENDOR, BOARD_MACHINE); - if (ppc_md.progress) - ppc_md.progress("ev64360_setup_arch: exit", 0); -} - -/* Platform device data fixup routines. */ -#if defined(CONFIG_SERIAL_MPSC) -static void __init -ev64360_fixup_mpsc_pdata(struct platform_device *pdev) -{ - struct mpsc_pdata *pdata; - - pdata = (struct mpsc_pdata *)pdev->dev.platform_data; - - pdata->max_idle = 40; - pdata->default_baud = EV64360_DEFAULT_BAUD; - pdata->brg_clk_src = EV64360_MPSC_CLK_SRC; - /* - * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts, - * TCLK == SysCLK but on 64460, they are separate pins. - * SysCLK can go up to 200 MHz but TCLK can only go up to 133 MHz. - */ - pdata->brg_clk_freq = min(ev64360_bus_frequency, MV64x60_TCLK_FREQ_MAX); -} -#endif - -#if defined(CONFIG_MV643XX_ETH) -static void __init -ev64360_fixup_eth_pdata(struct platform_device *pdev) -{ - struct mv643xx_eth_platform_data *eth_pd; - static u16 phy_addr[] = { - EV64360_ETH0_PHY_ADDR, - EV64360_ETH1_PHY_ADDR, - EV64360_ETH2_PHY_ADDR, - }; - - eth_pd = pdev->dev.platform_data; - eth_pd->force_phy_addr = 1; - eth_pd->phy_addr = phy_addr[pdev->id]; - eth_pd->tx_queue_size = EV64360_ETH_TX_QUEUE_SIZE; - eth_pd->rx_queue_size = EV64360_ETH_RX_QUEUE_SIZE; -} -#endif - -static int -ev64360_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn)(struct platform_device *pdev)); - } dev_map[] = { -#if defined(CONFIG_SERIAL_MPSC) - { MPSC_CTLR_NAME ".0", ev64360_fixup_mpsc_pdata }, - { MPSC_CTLR_NAME ".1", ev64360_fixup_mpsc_pdata }, -#endif -#if defined(CONFIG_MV643XX_ETH) - { MV643XX_ETH_NAME ".0", ev64360_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".1", ev64360_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".2", ev64360_fixup_eth_pdata }, -#endif - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i=0; ibus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - - pdev = container_of(dev, - struct platform_device, dev); - dev_map[i].rtn(pdev); - } - - return 0; -} - -#ifdef CONFIG_MTD_PHYSMAP - -#ifndef MB -#define MB (1 << 20) -#endif - -/* - * MTD Layout. - * - * FLASH Amount: 0xff000000 - 0xffffffff - * ------------- ----------------------- - * Reserved: 0xff000000 - 0xff03ffff - * JFFS2 file system: 0xff040000 - 0xffefffff - * U-boot: 0xfff00000 - 0xffffffff - */ -static int __init -ev64360_setup_mtd(void) -{ - u32 size; - int ptbl_entries; - static struct mtd_partition *ptbl; - - size = ev64360_flash_size_0 + ev64360_flash_size_1; - if (!size) - return -ENOMEM; - - ptbl_entries = 3; - - if ((ptbl = kzalloc(ptbl_entries * sizeof(struct mtd_partition), - GFP_KERNEL)) == NULL) { - - printk(KERN_WARNING "Can't alloc MTD partition table\n"); - return -ENOMEM; - } - - ptbl[0].name = "reserved"; - ptbl[0].offset = 0; - ptbl[0].size = EV64360_MTD_RESERVED_SIZE; - ptbl[1].name = "jffs2"; - ptbl[1].offset = EV64360_MTD_RESERVED_SIZE; - ptbl[1].size = EV64360_MTD_JFFS2_SIZE; - ptbl[2].name = "U-BOOT"; - ptbl[2].offset = EV64360_MTD_RESERVED_SIZE + EV64360_MTD_JFFS2_SIZE; - ptbl[2].size = EV64360_MTD_UBOOT_SIZE; - - physmap_map.size = size; - physmap_set_partitions(ptbl, ptbl_entries); - return 0; -} - -arch_initcall(ev64360_setup_mtd); -#endif - -static void -ev64360_restart(char *cmd) -{ - ulong i = 0xffffffff; - volatile unsigned char * rtc_base = ioremap(EV64360_RTC_WINDOW_BASE,0x4000); - - /* issue hard reset */ - rtc_base[0xf] = 0x80; - rtc_base[0xc] = 0x00; - rtc_base[0xd] = 0x01; - rtc_base[0xf] = 0x83; - - while (i-- > 0) ; - panic("restart failed\n"); -} - -static void -ev64360_halt(void) -{ - while (1) ; - /* NOTREACHED */ -} - -static void -ev64360_power_off(void) -{ - ev64360_halt(); - /* NOTREACHED */ -} - -static int -ev64360_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n"); - seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n"); - seq_printf(m, "bus speed\t: %dMHz\n", ev64360_bus_frequency/1000/1000); - - return 0; -} - -static void __init -ev64360_calibrate_decr(void) -{ - u32 freq; - - freq = ev64360_bus_frequency / 4; - - printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", - (long)freq / 1000000, (long)freq % 1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); -} - -unsigned long __init -ev64360_find_end_of_memory(void) -{ - return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, - MV64x60_TYPE_MV64360); -} - -static inline void -ev64360_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT2U, 0xf0001ffe); - mtspr(SPRN_DBAT2L, 0xf000002a); - mb(); -} - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) -static void __init -ev64360_map_io(void) -{ - io_block_mapping(CONFIG_MV64X60_NEW_BASE, \ - CONFIG_MV64X60_NEW_BASE, \ - 0x00020000, _PAGE_IO); -} -#endif - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer) - * are non-zero, then we should use the board info from the bd_t - * structure and the cmdline pointed to by r6 instead of the - * information from birecs, if any. Otherwise, use the information - * from birecs as discovered by the preceding call to - * parse_bootinfo(). This rule should work with both PPCBoot, which - * uses a bd_t board info structure, and the kernel boot wrapper, - * which uses birecs. - */ - if (r3 && r6) { - /* copy board info structure */ - memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); - /* copy command line */ - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - #ifdef CONFIG_ISA - isa_mem_base = 0; - #endif - - ppc_md.setup_arch = ev64360_setup_arch; - ppc_md.show_cpuinfo = ev64360_show_cpuinfo; - ppc_md.init_IRQ = mv64360_init_irq; - ppc_md.get_irq = mv64360_get_irq; - ppc_md.restart = ev64360_restart; - ppc_md.power_off = ev64360_power_off; - ppc_md.halt = ev64360_halt; - ppc_md.find_end_of_memory = ev64360_find_end_of_memory; - ppc_md.init = NULL; - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - ppc_md.calibrate_decr = ev64360_calibrate_decr; - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) - ppc_md.setup_io_mappings = ev64360_map_io; - ppc_md.progress = mv64x60_mpsc_progress; - mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); -#endif - -#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) - platform_notify = ev64360_platform_notify; -#endif - - ev64360_set_bat(); /* Need for ev64360_find_end_of_memory and progress */ -} diff --git a/arch/ppc/platforms/ev64360.h b/arch/ppc/platforms/ev64360.h deleted file mode 100644 index b30f4722690a4f751c2e7f8bfcc7b77539d4b228..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ev64360.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Definitions for Marvell EV-64360-BP Evaluation Board. - * - * Author: Lee Nicks - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - * We'll only use one PCI MEM window on each PCI bus. - * - * This is the CPU physical memory map (windows must be at least 64KB and start - * on a boundary that is a multiple of the window size): - * - * 0x42000000-0x4203ffff - Internal SRAM - * 0xf1000000-0xf100ffff - MV64360 Registers (CONFIG_MV64X60_NEW_BASE) - * 0xfc800000-0xfcffffff - RTC - * 0xff000000-0xffffffff - Boot window, 16 MB flash - * 0xc0000000-0xc3ffffff - PCI I/O (second hose) - * 0x80000000-0xbfffffff - PCI MEM (second hose) - */ - -#ifndef __PPC_PLATFORMS_EV64360_H -#define __PPC_PLATFORMS_EV64360_H - -/* CPU Physical Memory Map setup. */ -#define EV64360_BOOT_WINDOW_BASE 0xff000000 -#define EV64360_BOOT_WINDOW_SIZE 0x01000000 /* 16 MB */ -#define EV64360_INTERNAL_SRAM_BASE 0x42000000 -#define EV64360_RTC_WINDOW_BASE 0xfc800000 -#define EV64360_RTC_WINDOW_SIZE 0x00800000 /* 8 MB */ - -#define EV64360_PCI1_MEM_START_PROC_ADDR 0x80000000 -#define EV64360_PCI1_MEM_START_PCI_HI_ADDR 0x00000000 -#define EV64360_PCI1_MEM_START_PCI_LO_ADDR 0x80000000 -#define EV64360_PCI1_MEM_SIZE 0x40000000 /* 1 GB */ -#define EV64360_PCI1_IO_START_PROC_ADDR 0xc0000000 -#define EV64360_PCI1_IO_START_PCI_ADDR 0x00000000 -#define EV64360_PCI1_IO_SIZE 0x04000000 /* 64 MB */ - -#define EV64360_DEFAULT_BAUD 115200 -#define EV64360_MPSC_CLK_SRC 8 /* TCLK */ -#define EV64360_MPSC_CLK_FREQ 133333333 - -#define EV64360_MTD_RESERVED_SIZE 0x40000 -#define EV64360_MTD_JFFS2_SIZE 0xec0000 -#define EV64360_MTD_UBOOT_SIZE 0x100000 - -#define EV64360_ETH0_PHY_ADDR 8 -#define EV64360_ETH1_PHY_ADDR 9 -#define EV64360_ETH2_PHY_ADDR 10 - -#define EV64360_ETH_TX_QUEUE_SIZE 800 -#define EV64360_ETH_RX_QUEUE_SIZE 400 - -#define EV64360_ETH_PORT_CONFIG_VALUE \ - ETH_UNICAST_NORMAL_MODE | \ - ETH_DEFAULT_RX_QUEUE_0 | \ - ETH_DEFAULT_RX_ARP_QUEUE_0 | \ - ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \ - ETH_RECEIVE_BC_IF_IP | \ - ETH_RECEIVE_BC_IF_ARP | \ - ETH_CAPTURE_TCP_FRAMES_DIS | \ - ETH_CAPTURE_UDP_FRAMES_DIS | \ - ETH_DEFAULT_RX_TCP_QUEUE_0 | \ - ETH_DEFAULT_RX_UDP_QUEUE_0 | \ - ETH_DEFAULT_RX_BPDU_QUEUE_0 - -#define EV64360_ETH_PORT_CONFIG_EXTEND_VALUE \ - ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \ - ETH_PARTITION_DISABLE - -#define GT_ETH_IPG_INT_RX(value) \ - ((value & 0x3fff) << 8) - -#define EV64360_ETH_PORT_SDMA_CONFIG_VALUE \ - ETH_RX_BURST_SIZE_4_64BIT | \ - GT_ETH_IPG_INT_RX(0) | \ - ETH_TX_BURST_SIZE_4_64BIT - -#define EV64360_ETH_PORT_SERIAL_CONTROL_VALUE \ - ETH_FORCE_LINK_PASS | \ - ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \ - ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \ - ETH_ADV_SYMMETRIC_FLOW_CTRL | \ - ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ - ETH_FORCE_BP_MODE_NO_JAM | \ - BIT9 | \ - ETH_DO_NOT_FORCE_LINK_FAIL | \ - ETH_RETRANSMIT_16_ATTEMPTS | \ - ETH_ENABLE_AUTO_NEG_SPEED_GMII | \ - ETH_DTE_ADV_0 | \ - ETH_DISABLE_AUTO_NEG_BYPASS | \ - ETH_AUTO_NEG_NO_CHANGE | \ - ETH_MAX_RX_PACKET_9700BYTE | \ - ETH_CLR_EXT_LOOPBACK | \ - ETH_SET_FULL_DUPLEX_MODE | \ - ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX - -static inline u32 -ev64360_bus_freq(void) -{ - return 133333333; -} - -#endif /* __PPC_PLATFORMS_EV64360_H */ diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h deleted file mode 100644 index 5219366667b377961a88dd1010697dd9c849bb1a..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/fads.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Motorola 860T FADS board. Copied from the MBX stuff. - * - * Copyright (c) 1998 Dan Malek (dmalek@jlc.net) - * - * Added MPC86XADS support. - * The MPC86xADS manual says the board "is compatible with the MPC8xxFADS - * for SW point of view". This is 99% correct. - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * 2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_FADS_H__ -#define __ASM_FADS_H__ - - -#include - -/* Memory map is configured by the PROM startup. - * I tried to follow the FADS manual, although the startup PROM - * dictates this and we simply have to move some of the physical - * addresses for Linux. - */ -#define BCSR_ADDR ((uint)0xff010000) - -/* PHY link change interrupt */ -#define PHY_INTERRUPT SIU_IRQ2 - -#define BCSR_SIZE ((uint)(64 * 1024)) -#define BCSR0 ((uint)(BCSR_ADDR + 0x00)) -#define BCSR1 ((uint)(BCSR_ADDR + 0x04)) -#define BCSR2 ((uint)(BCSR_ADDR + 0x08)) -#define BCSR3 ((uint)(BCSR_ADDR + 0x0c)) -#define BCSR4 ((uint)(BCSR_ADDR + 0x10)) - -#define IMAP_ADDR ((uint)0xff000000) -#define IMAP_SIZE ((uint)(64 * 1024)) - -#define PCMCIA_MEM_ADDR ((uint)0xff020000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) - -/* Bits of interest in the BCSRs. - */ -#define BCSR1_ETHEN ((uint)0x20000000) -#define BCSR1_IRDAEN ((uint)0x10000000) -#define BCSR1_RS232EN_1 ((uint)0x01000000) -#define BCSR1_PCCEN ((uint)0x00800000) -#define BCSR1_PCCVCC0 ((uint)0x00400000) -#define BCSR1_PCCVPP0 ((uint)0x00200000) -#define BCSR1_PCCVPP1 ((uint)0x00100000) -#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1) -#define BCSR1_RS232EN_2 ((uint)0x00040000) -#define BCSR1_PCCVCC1 ((uint)0x00010000) -#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1) - -#define BCSR4_ETHLOOP ((uint)0x80000000) /* EEST Loopback */ -#define BCSR4_EEFDX ((uint)0x40000000) /* EEST FDX enable */ -#define BCSR4_FETH_EN ((uint)0x08000000) /* PHY enable */ -#define BCSR4_FETHCFG0 ((uint)0x04000000) /* PHY autoneg mode */ -#define BCSR4_FETHCFG1 ((uint)0x00400000) /* PHY autoneg mode */ -#define BCSR4_FETHFDE ((uint)0x02000000) /* PHY FDX advertise */ -#define BCSR4_FETHRST ((uint)0x00200000) /* PHY Reset */ - -/* IO_BASE definition for pcmcia. - */ -#define _IO_BASE 0x80000000 -#define _IO_BASE_SIZE 0x1000 - -#ifdef CONFIG_IDE -#define MAX_HWIFS 1 -#endif - -/* Interrupt level assignments. - */ -#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */ - -/* We don't use the 8259. - */ -#define NR_8259_INTS 0 - -/* CPM Ethernet through SCC1 or SCC2 */ - -#if defined(CONFIG_SCC1_ENET) || defined(CONFIG_MPC8xx_SECOND_ETH_SCC1) /* Probably 860 variant */ -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - * TCLK - CLK1, RCLK - CLK2. - */ -#define PA_ENET_RXD ((ushort)0x0001) -#define PA_ENET_TXD ((ushort)0x0002) -#define PA_ENET_TCLK ((ushort)0x0100) -#define PA_ENET_RCLK ((ushort)0x0200) -#define PB_ENET_TENA ((uint)0x00001000) -#define PC_ENET_CLSN ((ushort)0x0010) -#define PC_ENET_RENA ((ushort)0x0020) - -/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000002c) -#endif /* CONFIG_SCC1_ENET */ - -#ifdef CONFIG_SCC2_ENET /* Probably 823/850 variant */ -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - * TCLK - CLK1, RCLK - CLK2. - */ -#define PA_ENET_RXD ((ushort)0x0004) -#define PA_ENET_TXD ((ushort)0x0008) -#define PA_ENET_TCLK ((ushort)0x0400) -#define PA_ENET_RCLK ((ushort)0x0200) -#define PB_ENET_TENA ((uint)0x00002000) -#define PC_ENET_CLSN ((ushort)0x0040) -#define PC_ENET_RENA ((ushort)0x0080) - -/* Control bits in the SICR to route TCLK and RCLK to - * SCC2. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00002e00) -#endif /* CONFIG_SCC2_ENET */ - -#endif /* __ASM_FADS_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c deleted file mode 100644 index 904b518c152eb0a0b77482df9d49c6503eb48752..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/hdpu.c +++ /dev/null @@ -1,1015 +0,0 @@ -/* - * Board setup routines for the Sky Computers HDPU Compute Blade. - * - * Written by Brian Waite - * - * Based on code done by - Mark A. Greer - * Rabeeh Khoury - rabeeh@galileo.co.il - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define BOARD_VENDOR "Sky Computers" -#define BOARD_MACHINE "HDPU-CB-A" - -bd_t ppcboot_bd; -int ppcboot_bd_valid = 0; - -static mv64x60_handle_t bh; - -extern char cmd_line[]; - -unsigned long hdpu_find_end_of_memory(void); -void hdpu_mpsc_progress(char *s, unsigned short hex); -void hdpu_heartbeat(void); - -static void parse_bootinfo(unsigned long r3, - unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7); -static void hdpu_set_l1pe(void); -static void hdpu_cpustate_set(unsigned char new_state); -#ifdef CONFIG_SMP -static DEFINE_SPINLOCK(timebase_lock); -static unsigned int timebase_upper = 0, timebase_lower = 0; -extern int smp_tb_synchronized; - -void __devinit hdpu_tben_give(void); -void __devinit hdpu_tben_take(void); -#endif - -static int __init -hdpu_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); - - if (hose->index == 0) { - static char pci_irq_table[][4] = { - {HDPU_PCI_0_IRQ, 0, 0, 0}, - {HDPU_PCI_0_IRQ, 0, 0, 0}, - }; - - const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } else { - static char pci_irq_table[][4] = { - {HDPU_PCI_1_IRQ, 0, 0, 0}, - }; - - const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; - } -} - -static void __init hdpu_intr_setup(void) -{ - mv64x60_write(&bh, MV64x60_GPP_IO_CNTL, - (1 | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) | - (1 << 6) | (1 << 7) | (1 << 12) | (1 << 16) | - (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21) | - (1 << 22) | (1 << 23) | (1 << 24) | (1 << 25) | - (1 << 26) | (1 << 27) | (1 << 28) | (1 << 29))); - - /* XXXX Erranum FEr PCI-#8 */ - mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1 << 5) | (1 << 9)); - mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1 << 5) | (1 << 9)); - - /* - * Dismiss and then enable interrupt on GPP interrupt cause - * for CPU #0 - */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~((1 << 8) | (1 << 13))); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, (1 << 8) | (1 << 13)); - - /* - * Dismiss and then enable interrupt on CPU #0 high cause reg - * BIT25 summarizes GPP interrupts 8-15 - */ - mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1 << 25)); -} - -static void __init hdpu_setup_peripherals(void) -{ - unsigned int val; - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, - HDPU_TBEN_BASE, HDPU_TBEN_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, - HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - HDPU_INTERNAL_SRAM_BASE, - HDPU_INTERNAL_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - - bh.ci->disable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, 0, 0, 0); - - mv64x60_clr_bits(&bh, MV64x60_PCI0_PCI_DECODE_CNTL, (1 << 3)); - mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3)); - mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, - ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24))); - - /* Enable pipelining */ - mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1 << 13)); - /* Enable Snoop Pipelining */ - mv64x60_set_bits(&bh, MV64360_D_UNIT_CONTROL_HIGH, (1 << 24)); - - /* - * Change DRAM read buffer assignment. - * Assign read buffer 0 dedicated only for CPU, - * and the rest read buffer 1. - */ - val = mv64x60_read(&bh, MV64360_SDRAM_CONFIG); - val = val & 0x03ffffff; - val = val | 0xf8000000; - mv64x60_write(&bh, MV64360_SDRAM_CONFIG, val); - - /* - * Configure internal SRAM - - * Cache coherent write back, if CONFIG_MV64360_SRAM_CACHE_COHERENT set - * Parity enabled. - * Parity error propagation - * Arbitration not parked for CPU only - * Other bits are reserved. - */ -#ifdef CONFIG_MV64360_SRAM_CACHE_COHERENT - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2); -#else - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b0); -#endif - - hdpu_intr_setup(); -} - -static void __init hdpu_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = HDPU_BRIDGE_REG_BASE; - si.pci_0.enable_bus = 1; - si.pci_0.pci_io.cpu_base = HDPU_PCI0_IO_START_PROC_ADDR; - si.pci_0.pci_io.pci_base_hi = 0; - si.pci_0.pci_io.pci_base_lo = HDPU_PCI0_IO_START_PCI_ADDR; - si.pci_0.pci_io.size = HDPU_PCI0_IO_SIZE; - si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_mem[0].cpu_base = HDPU_PCI0_MEM_START_PROC_ADDR; - si.pci_0.pci_mem[0].pci_base_hi = HDPU_PCI0_MEM_START_PCI_HI_ADDR; - si.pci_0.pci_mem[0].pci_base_lo = HDPU_PCI0_MEM_START_PCI_LO_ADDR; - si.pci_0.pci_mem[0].size = HDPU_PCI0_MEM_SIZE; - si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_cmd_bits = 0; - si.pci_0.latency_timer = 0x80; - - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = HDPU_PCI1_IO_START_PROC_ADDR; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = HDPU_PCI1_IO_START_PCI_ADDR; - si.pci_1.pci_io.size = HDPU_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = HDPU_PCI1_MEM_START_PROC_ADDR; - si.pci_1.pci_mem[0].pci_base_hi = HDPU_PCI1_MEM_START_PCI_HI_ADDR; - si.pci_1.pci_mem[0].pci_base_lo = HDPU_PCI1_MEM_START_PCI_LO_ADDR; - si.pci_1.pci_mem[0].size = HDPU_PCI1_MEM_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x80; - - for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) { -#if defined(CONFIG_NOT_COHERENT_CACHE) - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; - - si.pci_0.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; - -#else - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; /* errata */ - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; /* errata */ - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; /* errata */ - - si.pci_0.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; -#endif - } - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_PCI); - - /* Lookup PCI host bridges */ - mv64x60_init(&bh, &si); - pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */ - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = hdpu_map_irq; - - mv64x60_set_bus(&bh, 0, 0); - bh.hose_a->first_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0); - - bh.hose_b->first_busno = bh.hose_a->last_busno + 1; - mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno); - bh.hose_b->last_busno = 0xff; - bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, - bh.hose_b->first_busno); - - ppc_md.pci_exclude_device = mv64x60_pci_exclude_device; - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_REG); - /* - * Enabling of PCI internal-vs-external arbitration - * is a platform- and errata-dependent decision. - */ - return; -} - -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) -static void __init hdpu_early_serial_map(void) -{ -#ifdef CONFIG_KGDB - static char first_time = 1; - -#if defined(CONFIG_KGDB_TTYS0) -#define KGDB_PORT 0 -#elif defined(CONFIG_KGDB_TTYS1) -#define KGDB_PORT 1 -#else -#error "Invalid kgdb_tty port" -#endif - - if (first_time) { - gt_early_mpsc_init(KGDB_PORT, - B9600 | CS8 | CREAD | HUPCL | CLOCAL); - first_time = 0; - } - - return; -#endif -} -#endif - -static void hdpu_init2(void) -{ - return; -} - -#if defined(CONFIG_MV643XX_ETH) -static void __init hdpu_fixup_eth_pdata(struct platform_device *pd) -{ - - struct mv643xx_eth_platform_data *eth_pd; - eth_pd = pd->dev.platform_data; - - eth_pd->force_phy_addr = 1; - eth_pd->phy_addr = pd->id; - eth_pd->speed = SPEED_100; - eth_pd->duplex = DUPLEX_FULL; - eth_pd->tx_queue_size = 400; - eth_pd->rx_queue_size = 800; -} -#endif - -static void __init hdpu_fixup_mpsc_pdata(struct platform_device *pd) -{ - - struct mpsc_pdata *pdata; - - pdata = (struct mpsc_pdata *)pd->dev.platform_data; - - pdata->max_idle = 40; - if (ppcboot_bd_valid) - pdata->default_baud = ppcboot_bd.bi_baudrate; - else - pdata->default_baud = HDPU_DEFAULT_BAUD; - pdata->brg_clk_src = HDPU_MPSC_CLK_SRC; - pdata->brg_clk_freq = HDPU_MPSC_CLK_FREQ; -} - -#if defined(CONFIG_HDPU_FEATURES) -static void __init hdpu_fixup_cpustate_pdata(struct platform_device *pd) -{ - struct platform_device *pds[1]; - pds[0] = pd; - mv64x60_pd_fixup(&bh, pds, 1); -} -#endif - -static int hdpu_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn) (struct platform_device * pdev)); - } dev_map[] = { - { - MPSC_CTLR_NAME ".0", hdpu_fixup_mpsc_pdata}, -#if defined(CONFIG_MV643XX_ETH) - { - MV643XX_ETH_NAME ".0", hdpu_fixup_eth_pdata}, -#endif -#if defined(CONFIG_HDPU_FEATURES) - { - HDPU_CPUSTATE_NAME ".0", hdpu_fixup_cpustate_pdata}, -#endif - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i = 0; i < ARRAY_SIZE(dev_map); i++) - if (!strncmp(dev->bus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - - pdev = container_of(dev, - struct platform_device, - dev); - dev_map[i].rtn(pdev); - } - - return 0; -} - -static void __init hdpu_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("hdpu_setup_arch: enter", 0); -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - ppc_md.heartbeat = hdpu_heartbeat; - - ppc_md.heartbeat_reset = HZ; - ppc_md.heartbeat_count = 1; - - if (ppc_md.progress) - ppc_md.progress("hdpu_setup_arch: Enabling L2 cache", 0); - - /* Enable L1 Parity Bits */ - hdpu_set_l1pe(); - - /* Enable L2 and L3 caches (if 745x) */ - _set_L2CR(0x80080000); - - if (ppc_md.progress) - ppc_md.progress("hdpu_setup_arch: enter", 0); - - hdpu_setup_bridge(); - - hdpu_setup_peripherals(); - -#ifdef CONFIG_SERIAL_MPSC_CONSOLE - hdpu_early_serial_map(); -#endif - - printk("SKY HDPU Compute Blade \n"); - - if (ppc_md.progress) - ppc_md.progress("hdpu_setup_arch: exit", 0); - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_OK); - return; -} -static void __init hdpu_init_irq(void) -{ - mv64360_init_irq(); -} - -static void __init hdpu_set_l1pe() -{ - unsigned long ictrl; - asm volatile ("mfspr %0, 1011":"=r" (ictrl):); - ictrl |= ICTRL_EICE | ICTRL_EDC | ICTRL_EICP; - asm volatile ("mtspr 1011, %0"::"r" (ictrl)); -} - -/* - * Set BAT 1 to map 0xf1000000 to end of physical memory space. - */ -static __inline__ void hdpu_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf10001fe); - mtspr(SPRN_DBAT1L, 0xf100002a); - mb(); - - return; -} - -unsigned long __init hdpu_find_end_of_memory(void) -{ - return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE, - MV64x60_TYPE_MV64360); -} - -static void hdpu_reset_board(void) -{ - volatile int infinite = 1; - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_RESET); - - local_irq_disable(); - - /* Clear all the LEDs */ - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) | - (1 << 5) | (1 << 6))); - - /* disable and invalidate the L2 cache */ - _set_L2CR(0); - _set_L2CR(0x200000); - - /* flush and disable L1 I/D cache */ - __asm__ __volatile__ - ("\n" - "mfspr 3,1008\n" - "ori 5,5,0xcc00\n" - "ori 4,3,0xc00\n" - "andc 5,3,5\n" - "sync\n" - "mtspr 1008,4\n" - "isync\n" "sync\n" "mtspr 1008,5\n" "isync\n" "sync\n"); - - /* Hit the reset bit */ - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 3)); - - while (infinite) - infinite = infinite; - - return; -} - -static void hdpu_restart(char *cmd) -{ - volatile ulong i = 10000000; - - hdpu_reset_board(); - - while (i-- > 0) ; - panic("restart failed\n"); -} - -static void hdpu_halt(void) -{ - local_irq_disable(); - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_HALT); - - /* Clear all the LEDs */ - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) | (1 << 5) | - (1 << 6))); - while (1) ; - /* NOTREACHED */ -} - -static void hdpu_power_off(void) -{ - hdpu_halt(); - /* NOTREACHED */ -} - -static int hdpu_show_cpuinfo(struct seq_file *m) -{ - uint pvid; - - pvid = mfspr(SPRN_PVR); - seq_printf(m, "vendor\t\t: Sky Computers\n"); - seq_printf(m, "machine\t\t: HDPU Compute Blade\n"); - seq_printf(m, "PVID\t\t: 0x%x, vendor: %s\n", - pvid, (pvid & (1 << 15) ? "IBM" : "Motorola")); - - return 0; -} - -static void __init hdpu_calibrate_decr(void) -{ - ulong freq; - - if (ppcboot_bd_valid) - freq = ppcboot_bd.bi_busfreq / 4; - else - freq = 133000000; - - printk("time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq / 1000000, freq % 1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); - - return; -} - -static void parse_bootinfo(unsigned long r3, - unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - bd_t *bd = NULL; - char *cmdline_start = NULL; - int cmdline_len = 0; - - if (r3) { - if ((r3 & 0xf0000000) == 0) - r3 += KERNELBASE; - if ((r3 & 0xf0000000) == KERNELBASE) { - bd = (void *)r3; - - memcpy(&ppcboot_bd, bd, sizeof(ppcboot_bd)); - ppcboot_bd_valid = 1; - } - } -#ifdef CONFIG_BLK_DEV_INITRD - if (r4 && r5 && r5 > r4) { - if ((r4 & 0xf0000000) == 0) - r4 += KERNELBASE; - if ((r5 & 0xf0000000) == 0) - r5 += KERNELBASE; - if ((r4 & 0xf0000000) == KERNELBASE) { - initrd_start = r4; - initrd_end = r5; - initrd_below_start_ok = 1; - } - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - if (r6 && r7 && r7 > r6) { - if ((r6 & 0xf0000000) == 0) - r6 += KERNELBASE; - if ((r7 & 0xf0000000) == 0) - r7 += KERNELBASE; - if ((r6 & 0xf0000000) == KERNELBASE) { - cmdline_start = (void *)r6; - cmdline_len = (r7 - r6); - strncpy(cmd_line, cmdline_start, cmdline_len); - } - } -} - -void hdpu_heartbeat(void) -{ - if (mv64x60_read(&bh, MV64x60_GPP_VALUE) & (1 << 5)) - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 5)); - else - mv64x60_write(&bh, MV64x60_GPP_VALUE_SET, (1 << 5)); - - ppc_md.heartbeat_count = ppc_md.heartbeat_reset; - -} - -static void __init hdpu_map_io(void) -{ - io_block_mapping(0xf1000000, 0xf1000000, 0x20000, _PAGE_IO); -} - -#ifdef CONFIG_SMP -char hdpu_smp0[] = "SMP Cpu #0"; -char hdpu_smp1[] = "SMP Cpu #1"; - -static irqreturn_t hdpu_smp_cpu0_int_handler(int irq, void *dev_id) -{ - volatile unsigned int doorbell; - - doorbell = mv64x60_read(&bh, MV64360_CPU0_DOORBELL); - - /* Ack the doorbell interrupts */ - mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, doorbell); - - if (doorbell & 1) { - smp_message_recv(0); - } - if (doorbell & 2) { - smp_message_recv(1); - } - if (doorbell & 4) { - smp_message_recv(2); - } - if (doorbell & 8) { - smp_message_recv(3); - } - return IRQ_HANDLED; -} - -static irqreturn_t hdpu_smp_cpu1_int_handler(int irq, void *dev_id) -{ - volatile unsigned int doorbell; - - doorbell = mv64x60_read(&bh, MV64360_CPU1_DOORBELL); - - /* Ack the doorbell interrupts */ - mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, doorbell); - - if (doorbell & 1) { - smp_message_recv(0); - } - if (doorbell & 2) { - smp_message_recv(1); - } - if (doorbell & 4) { - smp_message_recv(2); - } - if (doorbell & 8) { - smp_message_recv(3); - } - return IRQ_HANDLED; -} - -static void smp_hdpu_CPU_two(void) -{ - __asm__ __volatile__ - ("\n" - "lis 3,0x0000\n" - "ori 3,3,0x00c0\n" - "mtspr 26, 3\n" "li 4,0\n" "mtspr 27,4\n" "rfi"); - -} - -static int smp_hdpu_probe(void) -{ - int *cpu_count_reg; - int num_cpus = 0; - - cpu_count_reg = ioremap(HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE); - if (cpu_count_reg) { - num_cpus = (*cpu_count_reg >> 20) & 0x3; - iounmap(cpu_count_reg); - } - - /* Validate the bits in the CPLD. If we could not map the reg, return 2. - * If the register reported 0 or 3, return 2. - * Older CPLD revisions set these bits to all ones (val = 3). - */ - if ((num_cpus < 1) || (num_cpus > 2)) { - printk - ("Unable to determine the number of processors %d . deafulting to 2.\n", - num_cpus); - num_cpus = 2; - } - return num_cpus; -} - -static void -smp_hdpu_message_pass(int target, int msg) -{ - if (msg > 0x3) { - printk("SMP %d: smp_message_pass: unknown msg %d\n", - smp_processor_id(), msg); - return; - } - switch (target) { - case MSG_ALL: - mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg); - mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg); - break; - case MSG_ALL_BUT_SELF: - if (smp_processor_id()) - mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg); - else - mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg); - break; - default: - if (target == 0) - mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg); - else - mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg); - break; - } -} - -static void smp_hdpu_kick_cpu(int nr) -{ - volatile unsigned int *bootaddr; - - if (ppc_md.progress) - ppc_md.progress("smp_hdpu_kick_cpu", 0); - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_CPU1_KICK); - - /* Disable BootCS. Must also reduce the windows size to zero. */ - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, 0, 0, 0); - - bootaddr = ioremap(HDPU_INTERNAL_SRAM_BASE, HDPU_INTERNAL_SRAM_SIZE); - if (!bootaddr) { - if (ppc_md.progress) - ppc_md.progress("smp_hdpu_kick_cpu: ioremap failed", 0); - return; - } - - memcpy((void *)(bootaddr + 0x40), (void *)&smp_hdpu_CPU_two, 0x20); - - /* map SRAM to 0xfff00000 */ - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - 0xfff00000, HDPU_INTERNAL_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - - /* Enable CPU1 arbitration */ - mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1 << 9)); - - /* - * Wait 100mSecond until other CPU has reached __secondary_start. - * When it reaches, it is permittable to rever the SRAM mapping etc... - */ - mdelay(100); - *(unsigned long *)KERNELBASE = nr; - asm volatile ("dcbf 0,%0"::"r" (KERNELBASE):"memory"); - - iounmap(bootaddr); - - /* Set up window for internal sram (256KByte insize) */ - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - HDPU_INTERNAL_SRAM_BASE, - HDPU_INTERNAL_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - /* - * Set up windows for embedded FLASH (using boot CS window). - */ - - bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); -} - -static void smp_hdpu_setup_cpu(int cpu_nr) -{ - if (cpu_nr == 0) { - if (ppc_md.progress) - ppc_md.progress("smp_hdpu_setup_cpu 0", 0); - mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff); - mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff); - request_irq(60, hdpu_smp_cpu0_int_handler, - IRQF_DISABLED, hdpu_smp0, 0); - } - - if (cpu_nr == 1) { - if (ppc_md.progress) - ppc_md.progress("smp_hdpu_setup_cpu 1", 0); - - hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | - CPUSTATE_KERNEL_CPU1_OK); - - /* Enable L1 Parity Bits */ - hdpu_set_l1pe(); - - /* Enable L2 cache */ - _set_L2CR(0); - _set_L2CR(0x80080000); - - mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0); - mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff); - request_irq(28, hdpu_smp_cpu1_int_handler, - IRQF_DISABLED, hdpu_smp1, 0); - } - -} - -void __devinit hdpu_tben_give() -{ - volatile unsigned long *val = 0; - - /* By writing 0 to the TBEN_BASE, the timebases is frozen */ - val = ioremap(HDPU_TBEN_BASE, 4); - *val = 0; - mb(); - - spin_lock(&timebase_lock); - timebase_upper = get_tbu(); - timebase_lower = get_tbl(); - spin_unlock(&timebase_lock); - - while (timebase_upper || timebase_lower) - barrier(); - - /* By writing 1 to the TBEN_BASE, the timebases is thawed */ - *val = 1; - mb(); - - iounmap(val); - -} - -void __devinit hdpu_tben_take() -{ - while (!(timebase_upper || timebase_lower)) - barrier(); - - spin_lock(&timebase_lock); - set_tb(timebase_upper, timebase_lower); - timebase_upper = 0; - timebase_lower = 0; - spin_unlock(&timebase_lock); -} - -static struct smp_ops_t hdpu_smp_ops = { - .message_pass = smp_hdpu_message_pass, - .probe = smp_hdpu_probe, - .kick_cpu = smp_hdpu_kick_cpu, - .setup_cpu = smp_hdpu_setup_cpu, - .give_timebase = hdpu_tben_give, - .take_timebase = hdpu_tben_take, -}; -#endif /* CONFIG_SMP */ - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(r3, r4, r5, r6, r7); - - isa_mem_base = 0; - - ppc_md.setup_arch = hdpu_setup_arch; - ppc_md.init = hdpu_init2; - ppc_md.show_cpuinfo = hdpu_show_cpuinfo; - ppc_md.init_IRQ = hdpu_init_irq; - ppc_md.get_irq = mv64360_get_irq; - ppc_md.restart = hdpu_restart; - ppc_md.power_off = hdpu_power_off; - ppc_md.halt = hdpu_halt; - ppc_md.find_end_of_memory = hdpu_find_end_of_memory; - ppc_md.calibrate_decr = hdpu_calibrate_decr; - ppc_md.setup_io_mappings = hdpu_map_io; - - bh.p_base = CONFIG_MV64X60_NEW_BASE; - bh.v_base = (unsigned long *)bh.p_base; - - hdpu_set_bat(); - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) - ppc_md.progress = hdpu_mpsc_progress; /* embedded UART */ - mv64x60_progress_init(bh.p_base); -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ - -#ifdef CONFIG_SMP - smp_ops = &hdpu_smp_ops; -#endif /* CONFIG_SMP */ - -#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) - platform_notify = hdpu_platform_notify; -#endif - return; -} - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) -/* SMP safe version of the serial text debug routine. Uses Semaphore 0 */ -void hdpu_mpsc_progress(char *s, unsigned short hex) -{ - while (mv64x60_read(&bh, MV64360_WHO_AM_I) != - mv64x60_read(&bh, MV64360_SEMAPHORE_0)) { - } - mv64x60_mpsc_progress(s, hex); - mv64x60_write(&bh, MV64360_SEMAPHORE_0, 0xff); -} -#endif - -static void hdpu_cpustate_set(unsigned char new_state) -{ - unsigned int state = (new_state << 21); - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (0xff << 21)); - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, state); -} - -#ifdef CONFIG_MTD_PHYSMAP -static struct mtd_partition hdpu_partitions[] = { - { - .name = "Root FS", - .size = 0x03400000, - .offset = 0, - .mask_flags = 0, - },{ - .name = "User FS", - .size = 0x00800000, - .offset = 0x03400000, - .mask_flags = 0, - },{ - .name = "Kernel Image", - .size = 0x002C0000, - .offset = 0x03C00000, - .mask_flags = 0, - },{ - .name = "bootEnv", - .size = 0x00040000, - .offset = 0x03EC0000, - .mask_flags = 0, - },{ - .name = "bootROM", - .size = 0x00100000, - .offset = 0x03F00000, - .mask_flags = 0, - } -}; - -static int __init hdpu_setup_mtd(void) -{ - - physmap_set_partitions(hdpu_partitions, 5); - return 0; -} - -arch_initcall(hdpu_setup_mtd); -#endif - -#ifdef CONFIG_HDPU_FEATURES - -static struct resource hdpu_cpustate_resources[] = { - [0] = { - .name = "addr base", - .start = MV64x60_GPP_VALUE_SET, - .end = MV64x60_GPP_VALUE_CLR + 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct resource hdpu_nexus_resources[] = { - [0] = { - .name = "nexus register", - .start = HDPU_NEXUS_ID_BASE, - .end = HDPU_NEXUS_ID_BASE + HDPU_NEXUS_ID_SIZE, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device hdpu_cpustate_device = { - .name = HDPU_CPUSTATE_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(hdpu_cpustate_resources), - .resource = hdpu_cpustate_resources, -}; - -static struct platform_device hdpu_nexus_device = { - .name = HDPU_NEXUS_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(hdpu_nexus_resources), - .resource = hdpu_nexus_resources, -}; - -static int __init hdpu_add_pds(void) -{ - platform_device_register(&hdpu_cpustate_device); - platform_device_register(&hdpu_nexus_device); - return 0; -} - -arch_initcall(hdpu_add_pds); -#endif diff --git a/arch/ppc/platforms/hdpu.h b/arch/ppc/platforms/hdpu.h deleted file mode 100644 index f9e020b6970ccd6eddd5f2e85e2a885c105336cd..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/hdpu.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Definitions for Sky Computers HDPU board. - * - * Brian Waite - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by Mark A. Greer - * Based on code done by Tim Montgomery - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - * We'll only use one PCI MEM window on each PCI bus. - * - * This is the CPU physical memory map (windows must be at least 64K and start - * on a boundary that is a multiple of the window size): - * - * 0x80000000-0x8fffffff - PCI 0 MEM - * 0xa0000000-0xafffffff - PCI 1 MEM - * 0xc0000000-0xc0ffffff - PCI 0 I/O - * 0xc1000000-0xc1ffffff - PCI 1 I/O - - * 0xf1000000-0xf100ffff - MV64360 Registers - * 0xf1010000-0xfb9fffff - HOLE - * 0xfbfa0000-0xfbfaffff - TBEN - * 0xfbf00000-0xfbfbffff - NEXUS - * 0xfbfc0000-0xfbffffff - Internal SRAM - * 0xfc000000-0xffffffff - Boot window - */ - -#ifndef __PPC_PLATFORMS_HDPU_H -#define __PPC_PLATFORMS_HDPU_H - -/* CPU Physical Memory Map setup. */ -#define HDPU_BRIDGE_REG_BASE 0xf1000000 - -#define HDPU_TBEN_BASE 0xfbfa0000 -#define HDPU_TBEN_SIZE 0x00010000 -#define HDPU_NEXUS_ID_BASE 0xfbfb0000 -#define HDPU_NEXUS_ID_SIZE 0x00010000 -#define HDPU_INTERNAL_SRAM_BASE 0xfbfc0000 -#define HDPU_INTERNAL_SRAM_SIZE 0x00040000 -#define HDPU_EMB_FLASH_BASE 0xfc000000 -#define HDPU_EMB_FLASH_SIZE 0x04000000 - -/* PCI Mappings */ - -#define HDPU_PCI0_MEM_START_PROC_ADDR 0x80000000 -#define HDPU_PCI0_MEM_START_PCI_HI_ADDR 0x00000000 -#define HDPU_PCI0_MEM_START_PCI_LO_ADDR HDPU_PCI0_MEM_START_PROC_ADDR -#define HDPU_PCI0_MEM_SIZE 0x10000000 - -#define HDPU_PCI1_MEM_START_PROC_ADDR 0xc0000000 -#define HDPU_PCI1_MEM_START_PCI_HI_ADDR 0x00000000 -#define HDPU_PCI1_MEM_START_PCI_LO_ADDR HDPU_PCI1_MEM_START_PROC_ADDR -#define HDPU_PCI1_MEM_SIZE 0x20000000 - -#define HDPU_PCI0_IO_START_PROC_ADDR 0xc0000000 -#define HDPU_PCI0_IO_START_PCI_ADDR 0x00000000 -#define HDPU_PCI0_IO_SIZE 0x01000000 - -#define HDPU_PCI1_IO_START_PROC_ADDR 0xc1000000 -#define HDPU_PCI1_IO_START_PCI_ADDR 0x01000000 -#define HDPU_PCI1_IO_SIZE 0x01000000 - -#define HDPU_DEFAULT_BAUD 115200 -#define HDPU_MPSC_CLK_SRC 8 /* TCLK */ -#define HDPU_MPSC_CLK_FREQ 133000000 /* 133 Mhz */ - -#define HDPU_PCI_0_IRQ (8+64) -#define HDPU_PCI_1_IRQ (13+64) - -#endif /* __PPC_PLATFORMS_HDPU_H */ diff --git a/arch/ppc/platforms/hermes.h b/arch/ppc/platforms/hermes.h deleted file mode 100644 index de91afff8ca13ec645abc6f9096f0b415f9175bf..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/hermes.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Multidata HERMES-PRO ( / SL ) board specific definitions - * - * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_HERMES_H -#define __MACH_HERMES_H - - -#include - -#define HERMES_IMMR_BASE 0xFF000000 /* phys. addr of IMMR */ -#define HERMES_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR HERMES_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE HERMES_IMAP_SIZE /* mapped size of IMMR area */ - -#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */ -#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_HERMES_H */ diff --git a/arch/ppc/platforms/ip860.h b/arch/ppc/platforms/ip860.h deleted file mode 100644 index 2f1f86ce1447db9bec48743ae9a00f4add1a34a4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ip860.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * MicroSys IP860 VMEBus board specific definitions - * - * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_IP860_H -#define __MACH_IP860_H - - -#include - -#define IP860_IMMR_BASE 0xF1000000 /* phys. addr of IMMR */ -#define IP860_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR IP860_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE IP860_IMAP_SIZE /* mapped size of IMMR area */ - -/* - * MPC8xx Chip Select Usage - */ -#define IP860_BOOT_CS 0 /* Boot (VMEBus or Flash) Chip Select 0 */ -#define IP860_FLASH_CS 1 /* Flash is on Chip Select 1 */ -#define IP860_SDRAM_CS 2 /* SDRAM is on Chip Select 2 */ -#define IP860_SRAM_CS 3 /* SRAM is on Chip Select 3 */ -#define IP860_BCSR_CS 4 /* BCSR is on Chip Select 4 */ -#define IP860_IP_CS 5 /* IP Slots are on Chip Select 5 */ -#define IP860_VME_STD_CS 6 /* VME Standard I/O is on Chip Select 6 */ -#define IP860_VME_SHORT_CS 7 /* VME Short I/O is on Chip Select 7 */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_IP860_H */ diff --git a/arch/ppc/platforms/ivms8.h b/arch/ppc/platforms/ivms8.h deleted file mode 100644 index 9109e684ad9b8b9daa466f34730eae174f5225d3..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/ivms8.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Speech Design Integrated Voicemail board specific definitions - * - IVMS8 (small, 8 channels) - * - IVML24 (large, 24 channels) - * - * In 2.5 when we force a new bootloader, we can merge these two, and add - * in _MACH_'s for them. -- Tom - * - * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifdef __KERNEL__ -#ifndef __ASM_IVMS8_H__ -#define __ASM_IVMS8_H__ - - -#include - -#define IVMS_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ -#define IVMS_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR IVMS_IMMR_BASE /* phys. base address of IMMR area */ -#define IMAP_SIZE IVMS_IMAP_SIZE /* mapped size of IMMR area */ - -#define PCMCIA_MEM_ADDR ((uint)0xFE100000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) - -#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */ -#define IDE0_INTERRUPT 10 /* = IRQ5 */ -#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */ -#define PHY_INTERRUPT 12 /* = IRQ6 */ - -/* override the default number of IDE hardware interfaces */ -#define MAX_HWIFS 1 - -/* - * Definitions for IDE0 Interface - */ -#define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */ -#define IDE0_DATA_REG_OFFSET 0x0000 -#define IDE0_ERROR_REG_OFFSET 0x0081 -#define IDE0_NSECTOR_REG_OFFSET 0x0082 -#define IDE0_SECTOR_REG_OFFSET 0x0083 -#define IDE0_LCYL_REG_OFFSET 0x0084 -#define IDE0_HCYL_REG_OFFSET 0x0085 -#define IDE0_SELECT_REG_OFFSET 0x0086 -#define IDE0_STATUS_REG_OFFSET 0x0087 -#define IDE0_CONTROL_REG_OFFSET 0x0106 -#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ - -/* We don't use the 8259. */ -#define NR_8259_INTS 0 - -#endif /* __ASM_IVMS8_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c deleted file mode 100644 index fe6e88cdb1cd0de4f11b3f8d0db6811a42c7a470..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/katana.c +++ /dev/null @@ -1,902 +0,0 @@ -/* - * Board setup routines for the Artesyn Katana cPCI boards. - * - * Author: Tim Montgomery - * Maintained by: Mark A. Greer - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by - Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -/* - * Supports the Artesyn 750i, 752i, and 3750. The 752i is virtually identical - * to the 750i except that it has an mv64460 bridge. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct mv64x60_handle bh; -static katana_id_t katana_id; -static void __iomem *cpld_base; -static void __iomem *sram_base; -static u32 katana_flash_size_0; -static u32 katana_flash_size_1; -static u32 katana_bus_frequency; -static struct pci_controller katana_hose_a; - -unsigned char __res[sizeof(bd_t)]; - -/* PCI Interrupt routing */ -static int __init -katana_irq_lookup_750i(unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = { - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - /* IDSEL 4 (PMC 1) */ - { KATANA_PCI_INTB_IRQ_750i, KATANA_PCI_INTC_IRQ_750i, - KATANA_PCI_INTD_IRQ_750i, KATANA_PCI_INTA_IRQ_750i }, - /* IDSEL 5 (PMC 2) */ - { KATANA_PCI_INTC_IRQ_750i, KATANA_PCI_INTD_IRQ_750i, - KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i }, - /* IDSEL 6 (T8110) */ - {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, - /* IDSEL 7 (unused) */ - {0, 0, 0, 0 }, - /* IDSEL 8 (Intel 82544) (752i only but doesn't harm 750i) */ - {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 }, - }; - const long min_idsel = 4, max_idsel = 8, irqs_per_slot = 4; - - return PCI_IRQ_TABLE_LOOKUP; -} - -static int __init -katana_irq_lookup_3750(unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = { - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { KATANA_PCI_INTA_IRQ_3750, 0, 0, 0 }, /* IDSEL 3 (BCM5691) */ - { KATANA_PCI_INTB_IRQ_3750, 0, 0, 0 }, /* IDSEL 4 (MV64360 #2)*/ - { KATANA_PCI_INTC_IRQ_3750, 0, 0, 0 }, /* IDSEL 5 (MV64360 #3)*/ - }; - const long min_idsel = 3, max_idsel = 5, irqs_per_slot = 4; - - return PCI_IRQ_TABLE_LOOKUP; -} - -static int __init -katana_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - switch (katana_id) { - case KATANA_ID_750I: - case KATANA_ID_752I: - return katana_irq_lookup_750i(idsel, pin); - - case KATANA_ID_3750: - return katana_irq_lookup_3750(idsel, pin); - - default: - printk(KERN_ERR "Bogus board ID\n"); - return 0; - } -} - -/* Board info retrieval routines */ -void __init -katana_get_board_id(void) -{ - switch (in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)) { - case KATANA_PRODUCT_ID_3750: - katana_id = KATANA_ID_3750; - break; - - case KATANA_PRODUCT_ID_750i: - katana_id = KATANA_ID_750I; - break; - - case KATANA_PRODUCT_ID_752i: - katana_id = KATANA_ID_752I; - break; - - default: - printk(KERN_ERR "Unsupported board\n"); - } -} - -int __init -katana_get_proc_num(void) -{ - u16 val; - u8 save_exclude; - static int proc = -1; - static u8 first_time = 1; - - if (first_time) { - if (katana_id != KATANA_ID_3750) - proc = 0; - else { - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - - early_read_config_word(bh.hose_b, 0, - PCI_DEVFN(0,0), PCI_DEVICE_ID, &val); - - mv64x60_pci_exclude_bridge = save_exclude; - - switch(val) { - case PCI_DEVICE_ID_KATANA_3750_PROC0: - proc = 0; - break; - - case PCI_DEVICE_ID_KATANA_3750_PROC1: - proc = 1; - break; - - case PCI_DEVICE_ID_KATANA_3750_PROC2: - proc = 2; - break; - - default: - printk(KERN_ERR "Bogus Device ID\n"); - } - } - - first_time = 0; - } - - return proc; -} - -static inline int -katana_is_monarch(void) -{ - return in_8(cpld_base + KATANA_CPLD_BD_CFG_3) & - KATANA_CPLD_BD_CFG_3_MONARCH; -} - -static void __init -katana_setup_bridge(void) -{ - struct pci_controller hose; - struct mv64x60_setup_info si; - void __iomem *vaddr; - int i; - u32 v; - u16 val, type; - u8 save_exclude; - - /* - * Some versions of the Katana firmware mistakenly change the vendor - * & device id fields in the bridge's pci device (visible via pci - * config accesses). This breaks mv64x60_init() because those values - * are used to identify the type of bridge that's there. Artesyn - * claims that the subsystem vendor/device id's will have the correct - * Marvell values so this code puts back the correct values from there. - */ - memset(&hose, 0, sizeof(hose)); - vaddr = ioremap(CONFIG_MV64X60_NEW_BASE, MV64x60_INTERNAL_SPACE_SIZE); - setup_indirect_pci_nomap(&hose, vaddr + MV64x60_PCI0_CONFIG_ADDR, - vaddr + MV64x60_PCI0_CONFIG_DATA); - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID, &val); - - if (val != PCI_VENDOR_ID_MARVELL) { - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), - PCI_SUBSYSTEM_VENDOR_ID, &val); - early_write_config_word(&hose, 0, PCI_DEVFN(0, 0), - PCI_VENDOR_ID, val); - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), - PCI_SUBSYSTEM_ID, &val); - early_write_config_word(&hose, 0, PCI_DEVFN(0, 0), - PCI_DEVICE_ID, val); - } - - /* - * While we're in here, set the hotswap register correctly. - * Turn off blue LED; mask ENUM#, clear insertion & extraction bits. - */ - early_read_config_dword(&hose, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, &v); - v &= ~(1<<19); - v |= ((1<<17) | (1<<22) | (1<<23)); - early_write_config_dword(&hose, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, v); - - /* While we're at it, grab the bridge type for later */ - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &type); - - mv64x60_pci_exclude_bridge = save_exclude; - iounmap(vaddr); - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = KATANA_PCI1_IO_START_PROC_ADDR; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = KATANA_PCI1_IO_START_PCI_ADDR; - si.pci_1.pci_io.size = KATANA_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = KATANA_PCI1_MEM_START_PROC_ADDR; - si.pci_1.pci_mem[0].pci_base_hi = KATANA_PCI1_MEM_START_PCI_HI_ADDR; - si.pci_1.pci_mem[0].pci_base_lo = KATANA_PCI1_MEM_START_PCI_LO_ADDR; - si.pci_1.pci_mem[0].size = KATANA_PCI1_MEM_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x80; - - for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) { -#if defined(CONFIG_NOT_COHERENT_CACHE) - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; -#else - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - ((type == PCI_DEVICE_ID_MARVELL_MV64360) ? - MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES : - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES); -#endif - } - - /* Lookup PCI host bridges */ - if (mv64x60_init(&bh, &si)) - printk(KERN_WARNING "Bridge initialization failed.\n"); - - pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */ - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = katana_map_irq; - ppc_md.pci_exclude_device = mv64x60_pci_exclude_device; - - mv64x60_set_bus(&bh, 1, 0); - bh.hose_b->first_busno = 0; - bh.hose_b->last_busno = 0xff; - - /* - * Need to access hotswap reg which is in the pci config area of the - * bridge's hose 0. Note that pcibios_alloc_controller() can't be used - * to alloc hose_a b/c that would make hose 0 known to the generic - * pci code which we don't want. - */ - bh.hose_a = &katana_hose_a; - setup_indirect_pci_nomap(bh.hose_a, - bh.v_base + MV64x60_PCI0_CONFIG_ADDR, - bh.v_base + MV64x60_PCI0_CONFIG_DATA); -} - -/* Bridge & platform setup routines */ -void __init -katana_intr_setup(void) -{ - if (bh.type == MV64x60_TYPE_MV64460) /* As per instns from Marvell */ - mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, 1 << 15); - - /* MPP 8, 9, and 10 */ - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff); - - /* MPP 14 */ - if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I)) - mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0x0f000000); - - /* - * Define GPP 8,9,and 10 interrupt polarity as active low - * input signal and level triggered - */ - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, 0x700); - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, 0x700); - - if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I)) { - mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, (1<<14)); - mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, (1<<14)); - } - - /* Config GPP intr ctlr to respond to level trigger */ - mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10)); - - if (bh.type == MV64x60_TYPE_MV64360) { - /* Erratum FEr PCI-#9 */ - mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, - (1<<4) | (1<<5) | (1<<6) | (1<<7)); - mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, (1<<8) | (1<<9)); - } else { - mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<6) | (1<<7)); - mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, - (1<<4) | (1<<5) | (1<<8) | (1<<9)); - } - - /* - * Dismiss and then enable interrupt on GPP interrupt cause - * for CPU #0 - */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~0x700); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, 0x700); - - if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I)) { - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~(1<<14)); - mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, (1<<14)); - } - - /* - * Dismiss and then enable interrupt on CPU #0 high cause reg - * BIT25 summarizes GPP interrupts 8-15 - */ - mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1<<25)); -} - -void __init -katana_setup_peripherals(void) -{ - u32 base; - - /* Set up windows for boot CS, soldered & socketed flash, and CPLD */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - KATANA_BOOT_WINDOW_BASE, KATANA_BOOT_WINDOW_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - /* Assume firmware set up window sizes correctly for dev 0 & 1 */ - mv64x60_get_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, &base, - &katana_flash_size_0); - - if (katana_flash_size_0 > 0) { - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, - KATANA_SOLDERED_FLASH_BASE, katana_flash_size_0, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN); - } - - mv64x60_get_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, &base, - &katana_flash_size_1); - - if (katana_flash_size_1 > 0) { - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, - (KATANA_SOLDERED_FLASH_BASE + katana_flash_size_0), - katana_flash_size_1, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); - } - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, - KATANA_SOCKET_BASE, KATANA_SOCKETED_FLASH_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, - KATANA_CPLD_BASE, KATANA_CPLD_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN); - cpld_base = ioremap(KATANA_CPLD_BASE, KATANA_CPLD_SIZE); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - sram_base = ioremap(KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE); - - /* Set up Enet->SRAM window */ - mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, - KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0x2); - bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN); - - /* Give enet r/w access to memory region */ - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_0, (0x3 << (4 << 1))); - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_1, (0x3 << (4 << 1))); - mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_2, (0x3 << (4 << 1))); - - mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3)); - mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, - ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24))); - - /* Must wait until window set up before retrieving board id */ - katana_get_board_id(); - - /* Enumerate pci bus (must know board id before getting proc number) */ - if (katana_get_proc_num() == 0) - bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, 0); - -#if defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x00160000); -#else - mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2); -#endif - - /* - * Setting the SRAM to 0. Note that this generates parity errors on - * internal data path in SRAM since it's first time accessing it - * while after reset it's not configured. - */ - memset(sram_base, 0, MV64360_SRAM_SIZE); - - /* Only processor zero [on 3750] is an PCI interrupt controller */ - if (katana_get_proc_num() == 0) - katana_intr_setup(); -} - -static void __init -katana_enable_ipmi(void) -{ - u8 reset_out; - - /* Enable access to IPMI ctlr by clearing IPMI PORTSEL bit in CPLD */ - reset_out = in_8(cpld_base + KATANA_CPLD_RESET_OUT); - reset_out &= ~KATANA_CPLD_RESET_OUT_PORTSEL; - out_8(cpld_base + KATANA_CPLD_RESET_OUT, reset_out); -} - -static void __init -katana_setup_arch(void) -{ - if (ppc_md.progress) - ppc_md.progress("katana_setup_arch: enter", 0); - - set_tb(0, 0); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - /* - * Set up the L2CR register. - * - * 750FX has only L2E, L2PE (bits 2-8 are reserved) - * DD2.0 has bug that requires the L2 to be in WRT mode - * avoid dirty data in cache - */ - if (PVR_REV(mfspr(SPRN_PVR)) == 0x0200) { - printk(KERN_INFO "DD2.0 detected. Setting L2 cache" - "to Writethrough mode\n"); - _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2WT); - } else - _set_L2CR(L2CR_L2E | L2CR_L2PE); - - if (ppc_md.progress) - ppc_md.progress("katana_setup_arch: calling setup_bridge", 0); - - katana_setup_bridge(); - katana_setup_peripherals(); - katana_enable_ipmi(); - - katana_bus_frequency = katana_bus_freq(cpld_base); - - printk(KERN_INFO "Artesyn Communication Products, LLC - Katana(TM)\n"); - if (ppc_md.progress) - ppc_md.progress("katana_setup_arch: exit", 0); -} - -void -katana_fixup_resources(struct pci_dev *dev) -{ - u16 v16; - - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2); - - pci_read_config_word(dev, PCI_COMMAND, &v16); - v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK; - pci_write_config_word(dev, PCI_COMMAND, v16); -} - -static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */ - 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/ - 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/ -}; - -static int -katana_get_cpu_freq(void) -{ - unsigned long pll_cfg; - - pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27; - return katana_bus_frequency * cpu_750xx[pll_cfg]/2; -} - -/* Platform device data fixup routines. */ -#if defined(CONFIG_SERIAL_MPSC) -static void __init -katana_fixup_mpsc_pdata(struct platform_device *pdev) -{ - struct mpsc_pdata *pdata = (struct mpsc_pdata *)pdev->dev.platform_data; - bd_t *bdp = (bd_t *)__res; - - if (bdp->bi_baudrate) - pdata->default_baud = bdp->bi_baudrate; - else - pdata->default_baud = KATANA_DEFAULT_BAUD; - - pdata->max_idle = 40; - pdata->brg_clk_src = KATANA_MPSC_CLK_SRC; - /* - * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts, - * TCLK == SysCLK but on 64460, they are separate pins. - * SysCLK can go up to 200 MHz but TCLK can only go up to 133 MHz. - */ - pdata->brg_clk_freq = min(katana_bus_frequency, MV64x60_TCLK_FREQ_MAX); -} -#endif - -#if defined(CONFIG_MV643XX_ETH) -static void __init -katana_fixup_eth_pdata(struct platform_device *pdev) -{ - struct mv643xx_eth_platform_data *eth_pd; - static u16 phy_addr[] = { - KATANA_ETH0_PHY_ADDR, - KATANA_ETH1_PHY_ADDR, - KATANA_ETH2_PHY_ADDR, - }; - - eth_pd = pdev->dev.platform_data; - eth_pd->force_phy_addr = 1; - eth_pd->phy_addr = phy_addr[pdev->id]; - eth_pd->tx_queue_size = KATANA_ETH_TX_QUEUE_SIZE; - eth_pd->rx_queue_size = KATANA_ETH_RX_QUEUE_SIZE; -} -#endif - -#if defined(CONFIG_SYSFS) -static void __init -katana_fixup_mv64xxx_pdata(struct platform_device *pdev) -{ - struct mv64xxx_pdata *pdata = (struct mv64xxx_pdata *) - pdev->dev.platform_data; - - /* Katana supports the mv64xxx hotswap register */ - pdata->hs_reg_valid = 1; -} -#endif - -static int -katana_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn)(struct platform_device *pdev)); - } dev_map[] = { -#if defined(CONFIG_SERIAL_MPSC) - { MPSC_CTLR_NAME ".0", katana_fixup_mpsc_pdata }, - { MPSC_CTLR_NAME ".1", katana_fixup_mpsc_pdata }, -#endif -#if defined(CONFIG_MV643XX_ETH) - { MV643XX_ETH_NAME ".0", katana_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata }, -#endif -#if defined(CONFIG_SYSFS) - { MV64XXX_DEV_NAME ".0", katana_fixup_mv64xxx_pdata }, -#endif - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i=0; ibus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - pdev = container_of(dev, - struct platform_device, dev); - dev_map[i].rtn(pdev); - } - - return 0; -} - -#ifdef CONFIG_MTD_PHYSMAP - -#ifndef MB -#define MB (1 << 20) -#endif - -/* - * MTD Layout depends on amount of soldered FLASH in system. Sizes in MB. - * - * FLASH Amount: 128 64 32 16 - * ------------- --- -- -- -- - * Monitor: 1 1 1 1 - * Primary Kernel: 1.5 1.5 1.5 1.5 - * Primary fs: 30 30 - * Secondary Kernel: 1.5 1.5 N/A N/A - * Secondary fs: N/A N/A - * User: - */ -static int __init -katana_setup_mtd(void) -{ - u32 size; - int ptbl_entries; - static struct mtd_partition *ptbl; - - size = katana_flash_size_0 + katana_flash_size_1; - if (!size) - return -ENOMEM; - - ptbl_entries = (size >= (64*MB)) ? 6 : 4; - - if ((ptbl = kcalloc(ptbl_entries, sizeof(struct mtd_partition), - GFP_KERNEL)) == NULL) { - printk(KERN_WARNING "Can't alloc MTD partition table\n"); - return -ENOMEM; - } - - ptbl[0].name = "Monitor"; - ptbl[0].size = KATANA_MTD_MONITOR_SIZE; - ptbl[1].name = "Primary Kernel"; - ptbl[1].offset = MTDPART_OFS_NXTBLK; - ptbl[1].size = 0x00180000; /* 1.5 MB */ - ptbl[2].name = "Primary Filesystem"; - ptbl[2].offset = MTDPART_OFS_APPEND; - ptbl[2].size = MTDPART_SIZ_FULL; /* Correct for 16 & 32 MB */ - ptbl[ptbl_entries-1].name = "User FLASH"; - ptbl[ptbl_entries-1].offset = KATANA_MTD_MONITOR_SIZE; - ptbl[ptbl_entries-1].size = MTDPART_SIZ_FULL; - - if (size >= (64*MB)) { - ptbl[2].size = 30*MB; - ptbl[3].name = "Secondary Kernel"; - ptbl[3].offset = MTDPART_OFS_NXTBLK; - ptbl[3].size = 0x00180000; /* 1.5 MB */ - ptbl[4].name = "Secondary Filesystem"; - ptbl[4].offset = MTDPART_OFS_APPEND; - ptbl[4].size = MTDPART_SIZ_FULL; - } - - physmap_map.size = size; - physmap_set_partitions(ptbl, ptbl_entries); - return 0; -} -arch_initcall(katana_setup_mtd); -#endif - -static void -katana_restart(char *cmd) -{ - ulong i = 10000000; - - /* issue hard reset to the reset command register */ - out_8(cpld_base + KATANA_CPLD_RST_CMD, KATANA_CPLD_RST_CMD_HR); - - while (i-- > 0) ; - panic("restart failed\n"); -} - -static void -katana_halt(void) -{ - u8 v; - - /* Turn on blue LED to indicate its okay to remove */ - if (katana_id == KATANA_ID_750I) { - u32 v; - u8 save_exclude; - - /* Set LOO bit in cPCI HotSwap reg of hose 0 to turn on LED. */ - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_read_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, &v); - v &= 0xff; - v |= (1 << 19); - early_write_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, v); - mv64x60_pci_exclude_bridge = save_exclude; - } else if (katana_id == KATANA_ID_752I) { - v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF); - v |= HSL_PLD_HOT_SWAP_LED_BIT; - out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v); - } - - while (1) ; - /* NOTREACHED */ -} - -static void -katana_power_off(void) -{ - katana_halt(); - /* NOTREACHED */ -} - -static int -katana_show_cpuinfo(struct seq_file *m) -{ - char *s; - - seq_printf(m, "cpu freq\t: %dMHz\n", - (katana_get_cpu_freq() + 500000) / 1000000); - seq_printf(m, "bus freq\t: %ldMHz\n", - ((long)katana_bus_frequency + 500000) / 1000000); - seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n"); - - seq_printf(m, "board\t\t: "); - switch (katana_id) { - case KATANA_ID_3750: - seq_printf(m, "Katana 3750"); - break; - - case KATANA_ID_750I: - seq_printf(m, "Katana 750i"); - break; - - case KATANA_ID_752I: - seq_printf(m, "Katana 752i"); - break; - - default: - seq_printf(m, "Unknown"); - break; - } - seq_printf(m, " (product id: 0x%x)\n", - in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)); - - seq_printf(m, "pci mode\t: %sMonarch\n", - katana_is_monarch()? "" : "Non-"); - seq_printf(m, "hardware rev\t: 0x%x\n", - in_8(cpld_base+KATANA_CPLD_HARDWARE_VER)); - seq_printf(m, "pld rev\t\t: 0x%x\n", - in_8(cpld_base + KATANA_CPLD_PLD_VER)); - - switch(bh.type) { - case MV64x60_TYPE_GT64260A: - s = "gt64260a"; - break; - case MV64x60_TYPE_GT64260B: - s = "gt64260b"; - break; - case MV64x60_TYPE_MV64360: - s = "mv64360"; - break; - case MV64x60_TYPE_MV64460: - s = "mv64460"; - break; - default: - s = "Unknown"; - } - seq_printf(m, "bridge type\t: %s\n", s); - seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev); -#if defined(CONFIG_NOT_COHERENT_CACHE) - seq_printf(m, "coherency\t: %s\n", "off"); -#else - seq_printf(m, "coherency\t: %s\n", "on"); -#endif - - return 0; -} - -static void __init -katana_calibrate_decr(void) -{ - u32 freq; - - freq = katana_bus_frequency / 4; - - printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", - (long)freq / 1000000, (long)freq % 1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); -} - -/* - * The katana supports both uImage and zImage. If uImage, get the mem size - * from the bd info. If zImage, the bootwrapper adds a BI_MEMSIZE entry in - * the bi_rec data which is sucked out and put into boot_mem_size by - * parse_bootinfo(). MMU_init() will then use the boot_mem_size for the mem - * size and not call this routine. The only way this will fail is when a uImage - * is used but the fw doesn't pass in a valid bi_memsize. This should never - * happen, though. - */ -unsigned long __init -katana_find_end_of_memory(void) -{ - bd_t *bdp = (bd_t *)__res; - return bdp->bi_memsize; -} - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) -static void __init -katana_map_io(void) -{ - io_block_mapping(0xf8100000, 0xf8100000, 0x00020000, _PAGE_IO); -} -#endif - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer) - * are non-zero, then we should use the board info from the bd_t - * structure and the cmdline pointed to by r6 instead of the - * information from birecs, if any. Otherwise, use the information - * from birecs as discovered by the preceding call to - * parse_bootinfo(). This rule should work with both PPCBoot, which - * uses a bd_t board info structure, and the kernel boot wrapper, - * which uses birecs. - */ - if (r3 && r6) { - /* copy board info structure */ - memcpy((void *)__res, (void *)(r3+KERNELBASE), sizeof(bd_t)); - /* copy command line */ - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - isa_mem_base = 0; - - ppc_md.setup_arch = katana_setup_arch; - ppc_md.pcibios_fixup_resources = katana_fixup_resources; - ppc_md.show_cpuinfo = katana_show_cpuinfo; - ppc_md.init_IRQ = mv64360_init_irq; - ppc_md.get_irq = mv64360_get_irq; - ppc_md.restart = katana_restart; - ppc_md.power_off = katana_power_off; - ppc_md.halt = katana_halt; - ppc_md.find_end_of_memory = katana_find_end_of_memory; - ppc_md.calibrate_decr = katana_calibrate_decr; - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) - ppc_md.setup_io_mappings = katana_map_io; - ppc_md.progress = mv64x60_mpsc_progress; - mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); -#endif - -#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) - platform_notify = katana_platform_notify; -#endif -} diff --git a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h deleted file mode 100644 index 0a9b036526b1dbfb6bc963c964c279341280e714..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/katana.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - * Definitions for Artesyn Katana750i/3750 board. - * - * Author: Tim Montgomery - * Maintained by: Mark A. Greer - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - * We'll only use one PCI MEM window on each PCI bus. - * - * This is the CPU physical memory map (windows must be at least 64 KB and start - * on a boundary that is a multiple of the window size): - * - * 0xff800000-0xffffffff - Boot window - * 0xf8400000-0xf843ffff - Internal SRAM - * 0xf8200000-0xf83fffff - CPLD - * 0xf8100000-0xf810ffff - MV64360 Registers (CONFIG_MV64X60_NEW_BASE) - * 0xf8000000-0xf80fffff - Socketed FLASH - * 0xe0000000-0xefffffff - Soldered FLASH - * 0xc0000000-0xc3ffffff - PCI I/O (second hose) - * 0x80000000-0xbfffffff - PCI MEM (second hose) - */ - -#ifndef __PPC_PLATFORMS_KATANA_H -#define __PPC_PLATFORMS_KATANA_H - -/* CPU Physical Memory Map setup. */ -#define KATANA_BOOT_WINDOW_BASE 0xff800000 -#define KATANA_BOOT_WINDOW_SIZE 0x00800000 /* 8 MB */ -#define KATANA_INTERNAL_SRAM_BASE 0xf8400000 -#define KATANA_CPLD_BASE 0xf8200000 -#define KATANA_CPLD_SIZE 0x00200000 /* 2 MB */ -#define KATANA_SOCKET_BASE 0xf8000000 -#define KATANA_SOCKETED_FLASH_SIZE 0x00100000 /* 1 MB */ -#define KATANA_SOLDERED_FLASH_BASE 0xe0000000 -#define KATANA_SOLDERED_FLASH_SIZE 0x10000000 /* 256 MB */ - -#define KATANA_PCI1_MEM_START_PROC_ADDR 0x80000000 -#define KATANA_PCI1_MEM_START_PCI_HI_ADDR 0x00000000 -#define KATANA_PCI1_MEM_START_PCI_LO_ADDR 0x80000000 -#define KATANA_PCI1_MEM_SIZE 0x40000000 /* 1 GB */ -#define KATANA_PCI1_IO_START_PROC_ADDR 0xc0000000 -#define KATANA_PCI1_IO_START_PCI_ADDR 0x00000000 -#define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */ - -/* Board-specific IRQ info */ -#define KATANA_PCI_INTA_IRQ_3750 (64+8) -#define KATANA_PCI_INTB_IRQ_3750 (64+9) -#define KATANA_PCI_INTC_IRQ_3750 (64+10) - -#define KATANA_PCI_INTA_IRQ_750i (64+8) -#define KATANA_PCI_INTB_IRQ_750i (64+9) -#define KATANA_PCI_INTC_IRQ_750i (64+10) -#define KATANA_PCI_INTD_IRQ_750i (64+14) - -#define KATANA_CPLD_RST_EVENT 0x00000000 -#define KATANA_CPLD_RST_CMD 0x00001000 -#define KATANA_CPLD_PCI_ERR_INT_EN 0x00002000 -#define KATANA_CPLD_PCI_ERR_INT_PEND 0x00003000 -#define KATANA_CPLD_PRODUCT_ID 0x00004000 -#define KATANA_CPLD_EREADY 0x00005000 - -#define KATANA_CPLD_HARDWARE_VER 0x00007000 -#define KATANA_CPLD_PLD_VER 0x00008000 -#define KATANA_CPLD_BD_CFG_0 0x00009000 -#define KATANA_CPLD_BD_CFG_1 0x0000a000 -#define KATANA_CPLD_BD_CFG_3 0x0000c000 -#define KATANA_CPLD_LED 0x0000d000 -#define KATANA_CPLD_RESET_OUT 0x0000e000 - -#define KATANA_CPLD_RST_EVENT_INITACT 0x80 -#define KATANA_CPLD_RST_EVENT_SW 0x40 -#define KATANA_CPLD_RST_EVENT_WD 0x20 -#define KATANA_CPLD_RST_EVENT_COPS 0x10 -#define KATANA_CPLD_RST_EVENT_COPH 0x08 -#define KATANA_CPLD_RST_EVENT_CPCI 0x02 -#define KATANA_CPLD_RST_EVENT_FP 0x01 - -#define KATANA_CPLD_RST_CMD_SCL 0x80 -#define KATANA_CPLD_RST_CMD_SDA 0x40 -#define KATANA_CPLD_RST_CMD_I2C 0x10 -#define KATANA_CPLD_RST_CMD_FR 0x08 -#define KATANA_CPLD_RST_CMD_SR 0x04 -#define KATANA_CPLD_RST_CMD_HR 0x01 - -#define KATANA_CPLD_BD_CFG_0_SYSCLK_MASK 0xc0 -#define KATANA_CPLD_BD_CFG_0_SYSCLK_200 0x00 -#define KATANA_CPLD_BD_CFG_0_SYSCLK_166 0x80 -#define KATANA_CPLD_BD_CFG_0_SYSCLK_133 0xc0 -#define KATANA_CPLD_BD_CFG_0_SYSCLK_100 0x40 - -#define KATANA_CPLD_BD_CFG_1_FL_BANK_MASK 0x03 -#define KATANA_CPLD_BD_CFG_1_FL_BANK_16MB 0x00 -#define KATANA_CPLD_BD_CFG_1_FL_BANK_32MB 0x01 -#define KATANA_CPLD_BD_CFG_1_FL_BANK_64MB 0x02 -#define KATANA_CPLD_BD_CFG_1_FL_BANK_128MB 0x03 - -#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_MASK 0x04 -#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_ONE 0x00 -#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_TWO 0x04 - -#define KATANA_CPLD_BD_CFG_3_MONARCH 0x04 - -#define KATANA_CPLD_RESET_OUT_PORTSEL 0x80 -#define KATANA_CPLD_RESET_OUT_WD 0x20 -#define KATANA_CPLD_RESET_OUT_COPH 0x08 -#define KATANA_CPLD_RESET_OUT_PCI_RST_PCI 0x02 -#define KATANA_CPLD_RESET_OUT_PCI_RST_FP 0x01 - -#define KATANA_MBOX_RESET_REQUEST 0xC83A -#define KATANA_MBOX_RESET_ACK 0xE430 -#define KATANA_MBOX_RESET_DONE 0x32E5 - -#define HSL_PLD_BASE 0x00010000 -#define HSL_PLD_J4SGA_REG_OFF 0 -#define HSL_PLD_J4GA_REG_OFF 1 -#define HSL_PLD_J2GA_REG_OFF 2 -#define HSL_PLD_HOT_SWAP_OFF 6 -#define HSL_PLD_HOT_SWAP_LED_BIT 0x1 -#define GA_MASK 0x1f -#define HSL_PLD_SIZE 0x1000 -#define K3750_GPP_GEO_ADDR_PINS 0xf8000000 -#define K3750_GPP_GEO_ADDR_SHIFT 27 - -#define K3750_GPP_EVENT_PROC_0 (1 << 21) -#define K3750_GPP_EVENT_PROC_1_2 (1 << 2) - -#define PCI_VENDOR_ID_ARTESYN 0x1223 -#define PCI_DEVICE_ID_KATANA_3750_PROC0 0x0041 -#define PCI_DEVICE_ID_KATANA_3750_PROC1 0x0042 -#define PCI_DEVICE_ID_KATANA_3750_PROC2 0x0043 - -#define COPROC_MEM_FUNCTION 0 -#define COPROC_MEM_BAR 0 -#define COPROC_REGS_FUNCTION 0 -#define COPROC_REGS_BAR 4 -#define COPROC_FLASH_FUNCTION 2 -#define COPROC_FLASH_BAR 4 - -#define KATANA_IPMB_LOCAL_I2C_ADDR 0x08 - -#define KATANA_DEFAULT_BAUD 9600 -#define KATANA_MPSC_CLK_SRC 8 /* TCLK */ - -#define KATANA_MTD_MONITOR_SIZE (1 << 20) /* 1 MB */ - -#define KATANA_ETH0_PHY_ADDR 12 -#define KATANA_ETH1_PHY_ADDR 11 -#define KATANA_ETH2_PHY_ADDR 4 - -#define KATANA_PRODUCT_ID_3750 0x01 -#define KATANA_PRODUCT_ID_750i 0x02 -#define KATANA_PRODUCT_ID_752i 0x04 - -#define KATANA_ETH_TX_QUEUE_SIZE 800 -#define KATANA_ETH_RX_QUEUE_SIZE 400 - -#define KATANA_ETH_PORT_CONFIG_VALUE \ - ETH_UNICAST_NORMAL_MODE | \ - ETH_DEFAULT_RX_QUEUE_0 | \ - ETH_DEFAULT_RX_ARP_QUEUE_0 | \ - ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \ - ETH_RECEIVE_BC_IF_IP | \ - ETH_RECEIVE_BC_IF_ARP | \ - ETH_CAPTURE_TCP_FRAMES_DIS | \ - ETH_CAPTURE_UDP_FRAMES_DIS | \ - ETH_DEFAULT_RX_TCP_QUEUE_0 | \ - ETH_DEFAULT_RX_UDP_QUEUE_0 | \ - ETH_DEFAULT_RX_BPDU_QUEUE_0 - -#define KATANA_ETH_PORT_CONFIG_EXTEND_VALUE \ - ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \ - ETH_PARTITION_DISABLE - -#define GT_ETH_IPG_INT_RX(value) \ - ((value & 0x3fff) << 8) - -#define KATANA_ETH_PORT_SDMA_CONFIG_VALUE \ - ETH_RX_BURST_SIZE_4_64BIT | \ - GT_ETH_IPG_INT_RX(0) | \ - ETH_TX_BURST_SIZE_4_64BIT - -#define KATANA_ETH_PORT_SERIAL_CONTROL_VALUE \ - ETH_FORCE_LINK_PASS | \ - ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \ - ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \ - ETH_ADV_SYMMETRIC_FLOW_CTRL | \ - ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ - ETH_FORCE_BP_MODE_NO_JAM | \ - BIT9 | \ - ETH_DO_NOT_FORCE_LINK_FAIL | \ - ETH_RETRANSMIT_16_ATTEMPTS | \ - ETH_ENABLE_AUTO_NEG_SPEED_GMII | \ - ETH_DTE_ADV_0 | \ - ETH_DISABLE_AUTO_NEG_BYPASS | \ - ETH_AUTO_NEG_NO_CHANGE | \ - ETH_MAX_RX_PACKET_9700BYTE | \ - ETH_CLR_EXT_LOOPBACK | \ - ETH_SET_FULL_DUPLEX_MODE | \ - ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX - -#ifndef __ASSEMBLY__ - -typedef enum { - KATANA_ID_3750, - KATANA_ID_750I, - KATANA_ID_752I, - KATANA_ID_MAX -} katana_id_t; - -#endif - -static inline u32 -katana_bus_freq(void __iomem *cpld_base) -{ - u8 bd_cfg_0; - - bd_cfg_0 = in_8(cpld_base + KATANA_CPLD_BD_CFG_0); - - switch (bd_cfg_0 & KATANA_CPLD_BD_CFG_0_SYSCLK_MASK) { - case KATANA_CPLD_BD_CFG_0_SYSCLK_200: - return 200000000; - break; - - case KATANA_CPLD_BD_CFG_0_SYSCLK_166: - return 166666666; - break; - - case KATANA_CPLD_BD_CFG_0_SYSCLK_133: - return 133333333; - break; - - case KATANA_CPLD_BD_CFG_0_SYSCLK_100: - return 100000000; - break; - - default: - return 133333333; - break; - } -} - -#endif /* __PPC_PLATFORMS_KATANA_H */ diff --git a/arch/ppc/platforms/lantec.h b/arch/ppc/platforms/lantec.h deleted file mode 100644 index 5e5eb6d0f6aaf665d92c479136dd3c416b15e4e9..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lantec.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * LANTEC board specific definitions - * - * Copyright (c) 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_LANTEC_H -#define __MACH_LANTEC_H - - -#include - -#define IMAP_ADDR 0xFFF00000 /* physical base address of IMMR area */ -#define IMAP_SIZE (64 * 1024) /* mapped size of IMMR area */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_LANTEC_H */ diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c deleted file mode 100644 index b9e9db63f65b81bc43f0f99de8b45b4330da27da..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lite5200.c +++ /dev/null @@ -1,245 +0,0 @@ -/* - * Platform support file for the Freescale LITE5200 based on MPC52xx. - * A maximum of this file should be moved to syslib/mpc52xx_????? - * so that new platform based on MPC52xx need a minimal platform file - * ( avoid code duplication ) - * - * - * Maintainer : Sylvain Munaut - * - * Based on the 2.4 code written by Kent Borg, - * Dale Farnsworth and - * Wolfgang Denk - * - * Copyright 2004-2005 Sylvain Munaut - * Copyright 2003 Motorola Inc. - * Copyright 2003 MontaVista Software Inc. - * Copyright 2003 DENX Software Engineering (wd@denx.de) - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - - -extern int powersave_nap; - -/* Board data given by U-Boot */ -bd_t __res; -EXPORT_SYMBOL(__res); /* For modules */ - - -/* ======================================================================== */ -/* Platform specific code */ -/* ======================================================================== */ - -/* Supported PSC function in "preference" order */ -struct mpc52xx_psc_func mpc52xx_psc_functions[] = { - { .id = 0, - .func = "uart", - }, - { .id = -1, /* End entry */ - .func = NULL, - } - }; - - -static int -lite5200_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "machine\t\t: Freescale LITE5200\n"); - return 0; -} - -#ifdef CONFIG_PCI -#ifdef CONFIG_LITE5200B -static int -lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, - unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3}, - {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0}, - }; - - const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} -#else /* Original Lite */ -static int -lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1; -} -#endif -#endif - -static void __init -lite5200_setup_cpu(void) -{ - struct mpc52xx_gpio __iomem *gpio; - struct mpc52xx_intr __iomem *intr; - - u32 port_config; - u32 intr_ctrl; - - /* Map zones */ - gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE); - intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE); - - if (!gpio || !intr) { - printk(KERN_ERR __FILE__ ": " - "Error while mapping GPIO/INTR during " - "lite5200_setup_cpu\n"); - goto unmap_regs; - } - - /* Get port mux config */ - port_config = in_be32(&gpio->port_config); - - /* 48Mhz internal, pin is GPIO */ - port_config &= ~0x00800000; - - /* USB port */ - port_config &= ~0x00007000; /* Differential mode - USB1 only */ - port_config |= 0x00001000; - - /* ATA CS is on csb_4/5 */ - port_config &= ~0x03000000; - port_config |= 0x01000000; - - /* Commit port config */ - out_be32(&gpio->port_config, port_config); - - /* IRQ[0-3] setup */ - intr_ctrl = in_be32(&intr->ctrl); - intr_ctrl &= ~0x00ff0000; -#ifdef CONFIG_LITE5200B - /* IRQ[0-3] Level Active Low */ - intr_ctrl |= 0x00ff0000; -#else - /* IRQ0 Level Active Low - * IRQ[1-3] Level Active High */ - intr_ctrl |= 0x00c00000; -#endif - out_be32(&intr->ctrl, intr_ctrl); - - /* Unmap reg zone */ -unmap_regs: - if (gpio) iounmap(gpio); - if (intr) iounmap(intr); -} - -static void __init -lite5200_setup_arch(void) -{ - /* CPU & Port mux setup */ - mpc52xx_setup_cpu(); /* Generic */ - lite5200_setup_cpu(); /* Platform specific */ - -#ifdef CONFIG_PCI - /* PCI Bridge setup */ - mpc52xx_find_bridges(); -#endif -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - /* Generic MPC52xx platform initialization */ - /* TODO Create one and move a max of stuff in it. - Put this init in the syslib */ - - struct bi_record *bootinfo = find_bootinfo(); - - if (bootinfo) - parse_bootinfo(bootinfo); - else { - /* Load the bd_t board info structure */ - if (r3) - memcpy((void*)&__res,(void*)(r3+KERNELBASE), - sizeof(bd_t)); - -#ifdef CONFIG_BLK_DEV_INITRD - /* Load the initrd */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif - - /* Load the command line */ - if (r6) { - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - } - - /* PPC Sys identification */ - identify_ppc_sys_by_id(mfspr(SPRN_SVR)); - - /* BAT setup */ - mpc52xx_set_bat(); - - /* No ISA bus by default */ -#ifdef CONFIG_PCI - isa_io_base = 0; - isa_mem_base = 0; -#endif - - /* Powersave */ - /* This is provided as an example on how to do it. But you - need to be aware that NAP disable bus snoop and that may - be required for some devices to work properly, like USB ... */ - /* powersave_nap = 1; */ - - - /* Setup the ppc_md struct */ - ppc_md.setup_arch = lite5200_setup_arch; - ppc_md.show_cpuinfo = lite5200_show_cpuinfo; - ppc_md.show_percpuinfo = NULL; - ppc_md.init_IRQ = mpc52xx_init_irq; - ppc_md.get_irq = mpc52xx_get_irq; - -#ifdef CONFIG_PCI - ppc_md.pci_map_irq = lite5200_map_irq; -#endif - - ppc_md.find_end_of_memory = mpc52xx_find_end_of_memory; - ppc_md.setup_io_mappings = mpc52xx_map_io; - - ppc_md.restart = mpc52xx_restart; - ppc_md.power_off = mpc52xx_power_off; - ppc_md.halt = mpc52xx_halt; - - /* No time keeper on the LITE5200 */ - ppc_md.time_init = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.set_rtc_time = NULL; - - ppc_md.calibrate_decr = mpc52xx_calibrate_decr; -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = mpc52xx_progress; -#endif -} - diff --git a/arch/ppc/platforms/lite5200.h b/arch/ppc/platforms/lite5200.h deleted file mode 100644 index 852a18e24d0b3ff0fada5621a03fe408ff4f967c..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lite5200.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Definitions for Freescale LITE5200 : MPC52xx Standard Development - * Platform board support - * - * Maintainer : Sylvain Munaut - * - * Copyright (C) 2004 Sylvain Munaut - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef __PLATFORMS_LITE5200_H__ -#define __PLATFORMS_LITE5200_H__ - -/* Serial port used for low-level debug */ -#define MPC52xx_PF_CONSOLE_PORT 1 /* PSC1 */ - - -#endif /* __PLATFORMS_LITE5200_H__ */ diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c deleted file mode 100644 index 1e3aa6e9b6c729e4d5e83d712b7ebda7d70f6ca3..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lopec.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Setup routines for the Motorola LoPEC. - * - * Author: Dan Cox - * Maintainer: Tom Rini - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Define all of the IRQ senses and polarities. Taken from the - * LoPEC Programmer's Reference Guide. - */ -static u_char lopec_openpic_initsenses[16] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 4 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 5 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 6 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 7 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 8 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 9 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 10 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 11 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 12 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 13 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ 14 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* IRQ 15 */ -}; - -static inline int __init -lopec_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - int irq; - static char pci_irq_table[][4] = { - {16, 0, 0, 0}, /* ID 11 - Winbond */ - {22, 0, 0, 0}, /* ID 12 - SCSI */ - {0, 0, 0, 0}, /* ID 13 - nothing */ - {17, 0, 0, 0}, /* ID 14 - 82559 Ethernet */ - {27, 0, 0, 0}, /* ID 15 - USB */ - {23, 0, 0, 0}, /* ID 16 - PMC slot 1 */ - {24, 0, 0, 0}, /* ID 17 - PMC slot 2 */ - {25, 0, 0, 0}, /* ID 18 - PCI slot */ - {0, 0, 0, 0}, /* ID 19 - nothing */ - {0, 0, 0, 0}, /* ID 20 - nothing */ - {0, 0, 0, 0}, /* ID 21 - nothing */ - {0, 0, 0, 0}, /* ID 22 - nothing */ - {0, 0, 0, 0}, /* ID 23 - nothing */ - {0, 0, 0, 0}, /* ID 24 - PMC slot 1b */ - {0, 0, 0, 0}, /* ID 25 - nothing */ - {0, 0, 0, 0} /* ID 26 - PMC Slot 2b */ - }; - const long min_idsel = 11, max_idsel = 26, irqs_per_slot = 4; - - irq = PCI_IRQ_TABLE_LOOKUP; - if (!irq) - return 0; - - return irq; -} - -static void __init -lopec_setup_winbond_83553(struct pci_controller *hose) -{ - int devfn; - - devfn = PCI_DEVFN(11,0); - - /* IDE interrupt routing (primary 14, secondary 15) */ - early_write_config_byte(hose, 0, devfn, 0x43, 0xef); - /* PCI interrupt routing */ - early_write_config_word(hose, 0, devfn, 0x44, 0x0000); - - /* ISA-PCI address decoder */ - early_write_config_byte(hose, 0, devfn, 0x48, 0xf0); - - /* RTC, kb, not used in PPC */ - early_write_config_byte(hose, 0, devfn, 0x4d, 0x00); - early_write_config_byte(hose, 0, devfn, 0x4e, 0x04); - devfn = PCI_DEVFN(11, 1); - early_write_config_byte(hose, 0, devfn, 0x09, 0x8f); - early_write_config_dword(hose, 0, devfn, 0x40, 0x00ff0011); -} - -static void __init -lopec_find_bridges(void) -{ - struct pci_controller *hose; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - if (mpc10x_bridge_init(hose, MPC10X_MEM_MAP_B, MPC10X_MEM_MAP_B, - MPC10X_MAPB_EUMB_BASE) == 0) { - - hose->mem_resources[0].end = 0xffffffff; - lopec_setup_winbond_83553(hose); - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = lopec_map_irq; - } -} - -static int -lopec_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "machine\t\t: Motorola LoPEC\n"); - return 0; -} - -static void -lopec_restart(char *cmd) -{ -#define LOPEC_SYSSTAT1 0xffe00000 - /* force a hard reset, if possible */ - unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1); - reg |= 0x80; - *((unsigned char *) LOPEC_SYSSTAT1) = reg; - - local_irq_disable(); - while(1); -#undef LOPEC_SYSSTAT1 -} - -static void -lopec_halt(void) -{ - local_irq_disable(); - while(1); -} - -static void -lopec_power_off(void) -{ - lopec_halt(); -} - -static void __init -lopec_init_IRQ(void) -{ - int i; - - /* - * Provide the open_pic code with the correct table of interrupts. - */ - OpenPIC_InitSenses = lopec_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses); - - mpc10x_set_openpic(); - - /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */ - openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", - &i8259_irq); - - /* - * The EPIC allows for a read in the range of 0xFEF00000 -> - * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. - */ - i8259_init(0xfef00000, 0); -} - -static int __init -lopec_request_io(void) -{ - outb(0x00, 0x4d0); - outb(0xc0, 0x4d1); - - request_region(0x00, 0x20, "dma1"); - request_region(0x20, 0x20, "pic1"); - request_region(0x40, 0x20, "timer"); - request_region(0x80, 0x10, "dma page reg"); - request_region(0xa0, 0x20, "pic2"); - request_region(0xc0, 0x20, "dma2"); - - return 0; -} - -device_initcall(lopec_request_io); - -static void __init -lopec_map_io(void) -{ - io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); - io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO); -} - -/* - * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1. - */ -static __inline__ void -lopec_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf8000ffe); - mtspr(SPRN_DBAT1L, 0xf800002a); - mb(); -} - -TODC_ALLOC(); - -static void __init -lopec_setup_arch(void) -{ - - TODC_INIT(TODC_TYPE_MK48T37, 0, 0, - ioremap(0xffe80000, 0x8000), 8); - - loops_per_jiffy = 100000000/HZ; - - lopec_find_bridges(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#elif defined(CONFIG_ROOT_NFS) - ROOT_DEV = Root_NFS; -#elif defined(CONFIG_BLK_DEV_IDEDISK) - ROOT_DEV = Root_HDA1; -#else - ROOT_DEV = Root_SDA1; -#endif - -#ifdef CONFIG_PPCBUG_NVRAM - /* Read in NVRAM data */ - init_prep_nvram(); - - /* if no bootargs, look in NVRAM */ - if ( cmd_line[0] == '\0' ) { - char *bootargs; - bootargs = prep_nvram_get_var("bootargs"); - if (bootargs != NULL) { - strcpy(cmd_line, bootargs); - /* again.. */ - strcpy(boot_command_line, cmd_line); - } - } -#endif -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - lopec_set_bat(); - - isa_io_base = MPC10X_MAPB_ISA_IO_BASE; - isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE; - pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET; - ISA_DMA_THRESHOLD = 0x00ffffff; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - ppc_do_canonicalize_irqs = 1; - - ppc_md.setup_arch = lopec_setup_arch; - ppc_md.show_cpuinfo = lopec_show_cpuinfo; - ppc_md.init_IRQ = lopec_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - - ppc_md.restart = lopec_restart; - ppc_md.power_off = lopec_power_off; - ppc_md.halt = lopec_halt; - - ppc_md.setup_io_mappings = lopec_map_io; - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = todc_calibrate_decr; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif -} diff --git a/arch/ppc/platforms/lopec.h b/arch/ppc/platforms/lopec.h deleted file mode 100644 index d597b6878693bbb1ce8fa87a23d806ace226c561..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lopec.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * arch/ppc/platforms/lopec.h - * - * Definitions for Motorola LoPEC board. - * - * Author: Dan Cox - * danc@mvista.com (or, alternately, source@mvista.com) - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __H_LOPEC_SERIAL -#define __H_LOPEC_SERIAL - -#define RS_TABLE_SIZE 3 - -#define BASE_BAUD (1843200 / 16) - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) -#endif - -#define SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, 0xffe10000, 29, STD_COM_FLAGS, \ - iomem_base: (u8 *) 0xffe10000, \ - io_type: SERIAL_IO_MEM }, \ - { 0, BASE_BAUD, 0xffe11000, 20, STD_COM_FLAGS, \ - iomem_base: (u8 *) 0xffe11000, \ - io_type: SERIAL_IO_MEM }, \ - { 0, BASE_BAUD, 0xffe12000, 21, STD_COM_FLAGS, \ - iomem_base: (u8 *) 0xffe12000, \ - io_type: SERIAL_IO_MEM } - -#endif diff --git a/arch/ppc/platforms/lwmon.h b/arch/ppc/platforms/lwmon.h deleted file mode 100644 index e63f3b07a5dbc93adebeab122a0e56eeb35ec0de..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/lwmon.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Liebherr LWMON board specific definitions - * - * Copyright (c) 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_LWMON_H -#define __MACH_LWMON_H - - -#include - -#define IMAP_ADDR 0xFFF00000 /* physical base address of IMMR area */ -#define IMAP_SIZE (64 * 1024) /* mapped size of IMMR area */ - -/*----------------------------------------------------------------------- - * PCMCIA stuff - *----------------------------------------------------------------------- - * - */ -#define PCMCIA_MEM_SIZE ( 64 << 20 ) - -#define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */ - -/* - * Definitions for IDE0 Interface - */ -#define IDE0_BASE_OFFSET 0 -#define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320) -#define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1) -#define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2) -#define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3) -#define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4) -#define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5) -#define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6) -#define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7) -#define IDE0_CONTROL_REG_OFFSET 0x0106 -#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ - -#define IDE0_INTERRUPT 13 - -/* - * Definitions for I2C devices - */ -#define I2C_ADDR_AUDIO 0x28 /* Audio volume control */ -#define I2C_ADDR_SYSMON 0x2E /* LM87 System Monitor */ -#define I2C_ADDR_RTC 0x51 /* PCF8563 RTC */ -#define I2C_ADDR_POWER_A 0x52 /* PCMCIA/USB power switch, channel A */ -#define I2C_ADDR_POWER_B 0x53 /* PCMCIA/USB power switch, channel B */ -#define I2C_ADDR_KEYBD 0x56 /* PIC LWE keyboard */ -#define I2C_ADDR_PICIO 0x57 /* PIC IO Expander */ -#define I2C_ADDR_EEPROM 0x58 /* EEPROM AT24C164 */ - - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_LWMON_H */ diff --git a/arch/ppc/platforms/mbx.h b/arch/ppc/platforms/mbx.h deleted file mode 100644 index 1cf36fa3592d30dd45f20480d413f054ec6e4734..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/mbx.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Motorola MBX boards. This was originally created for the - * MBX860, and probably needs revisions for other boards (like the 821). - * When this file gets out of control, we can split it up into more - * meaningful pieces. - * - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - */ -#ifdef __KERNEL__ -#ifndef __MACH_MBX_DEFS -#define __MACH_MBX_DEFS - -#ifndef __ASSEMBLY__ -/* A Board Information structure that is given to a program when - * EPPC-Bug starts it up. - */ -typedef struct bd_info { - unsigned int bi_tag; /* Should be 0x42444944 "BDID" */ - unsigned int bi_size; /* Size of this structure */ - unsigned int bi_revision; /* revision of this structure */ - unsigned int bi_bdate; /* EPPCbug date, i.e. 0x11061997 */ - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in Hz */ - unsigned int bi_clun; /* Boot device controller */ - unsigned int bi_dlun; /* Boot device logical dev */ - - /* These fields are not part of the board information structure - * provided by the boot rom. They are filled in by embed_config.c - * so we have the information consistent with other platforms. - */ - unsigned char bi_enetaddr[6]; - unsigned int bi_baudrate; -} bd_t; - -/* Memory map for the MBX as configured by EPPC-Bug. We could reprogram - * The SIU and PCI bridge, and try to use larger MMU pages, but the - * performance gain is not measurable and it certainly complicates the - * generic MMU model. - * - * In a effort to minimize memory usage for embedded applications, any - * PCI driver or ISA driver must request or map the region required by - * the device. For convenience (and since we can map up to 4 Mbytes with - * a single page table page), the MMU initialization will map the - * NVRAM, Status/Control registers, CPM Dual Port RAM, and the PCI - * Bridge CSRs 1:1 into the kernel address space. - */ -#define PCI_ISA_IO_ADDR ((unsigned)0x80000000) -#define PCI_ISA_IO_SIZE ((uint)(512 * 1024 * 1024)) -#define PCI_IDE_ADDR ((unsigned)0x81000000) -#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000) -#define PCI_ISA_MEM_SIZE ((uint)(512 * 1024 * 1024)) -#define PCMCIA_MEM_ADDR ((uint)0xe0000000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024 * 1024)) -#define PCMCIA_DMA_ADDR ((uint)0xe4000000) -#define PCMCIA_DMA_SIZE ((uint)(64 * 1024 * 1024)) -#define PCMCIA_ATTRB_ADDR ((uint)0xe8000000) -#define PCMCIA_ATTRB_SIZE ((uint)(64 * 1024 * 1024)) -#define PCMCIA_IO_ADDR ((uint)0xec000000) -#define PCMCIA_IO_SIZE ((uint)(64 * 1024 * 1024)) -#define NVRAM_ADDR ((uint)0xfa000000) -#define NVRAM_SIZE ((uint)(1 * 1024 * 1024)) -#define MBX_CSR_ADDR ((uint)0xfa100000) -#define MBX_CSR_SIZE ((uint)(1 * 1024 * 1024)) -#define IMAP_ADDR ((uint)0xfa200000) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define PCI_CSR_ADDR ((uint)0xfa210000) -#define PCI_CSR_SIZE ((uint)(64 * 1024)) - -/* Map additional physical space into well known virtual addresses. Due - * to virtual address mapping, these physical addresses are not accessible - * in a 1:1 virtual to physical mapping. - */ -#define ISA_IO_VIRT_ADDR ((uint)0xfa220000) -#define ISA_IO_VIRT_SIZE ((uint)64 * 1024) - -/* Interrupt assignments. - * These are defined (and fixed) by the MBX hardware implementation. - */ -#define POWER_FAIL_INT SIU_IRQ0 /* Power fail */ -#define TEMP_HILO_INT SIU_IRQ1 /* Temperature sensor */ -#define QSPAN_INT SIU_IRQ2 /* PCI Bridge (DMA CTLR?) */ -#define ISA_BRIDGE_INT SIU_IRQ3 /* All those PC things */ -#define COMM_L_INT SIU_IRQ6 /* MBX Comm expansion connector pin */ -#define STOP_ABRT_INT SIU_IRQ7 /* Stop/Abort header pin */ - -/* CPM Ethernet through SCCx. - * - * Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. The TCLK and RCLK seem unique - * to the MBX860 board. Any two of the four available clocks could be - * used, and the MPC860 cookbook manual has an example using different - * clock pins. - */ -#define PA_ENET_RXD ((ushort)0x0001) -#define PA_ENET_TXD ((ushort)0x0002) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PC_ENET_TENA ((ushort)0x0001) -#define PC_ENET_CLSN ((ushort)0x0010) -#define PC_ENET_RENA ((ushort)0x0020) - -/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000003d) - -/* The MBX uses the 8259. -*/ -#define NR_8259_INTS 16 - -#endif /* !__ASSEMBLY__ */ -#endif /* __MACH_MBX_DEFS */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c deleted file mode 100644 index 62370f4a5a0f8718594e6a19de9c705822c2ea90..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ /dev/null @@ -1,413 +0,0 @@ -/*arch/ppc/platforms/mpc866ads_setup.c - * - * Platform setup for the Freescale mpc866ads board - * - * Vitaly Bordug - * - * Copyright 2005-2006 MontaVista Software Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern unsigned char __res[]; - -static void setup_fec1_ioports(struct fs_platform_info*); -static void setup_scc1_ioports(struct fs_platform_info*); -static void setup_smc1_ioports(struct fs_uart_platform_info*); -static void setup_smc2_ioports(struct fs_uart_platform_info*); - -static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; - -static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; - -static struct fs_platform_info mpc8xx_enet_pdata[] = { - [fsid_fec1] = { - .rx_ring = 128, - .tx_ring = 16, - .rx_copybreak = 240, - - .use_napi = 1, - .napi_weight = 17, - - .init_ioports = setup_fec1_ioports, - - .bus_id = "0:0f", - .has_phy = 1, - }, - [fsid_scc1] = { - .rx_ring = 64, - .tx_ring = 8, - .rx_copybreak = 240, - .use_napi = 1, - .napi_weight = 17, - - - .init_ioports = setup_scc1_ioports, - - .bus_id = "fixed@100:1", - }, -}; - -static struct fs_uart_platform_info mpc866_uart_pdata[] = { - [fsid_smc1_uart] = { - .brg = 1, - .fs_no = fsid_smc1_uart, - .init_ioports = setup_smc1_ioports, - .tx_num_fifo = 4, - .tx_buf_size = 32, - .rx_num_fifo = 4, - .rx_buf_size = 32, - }, - [fsid_smc2_uart] = { - .brg = 2, - .fs_no = fsid_smc2_uart, - .init_ioports = setup_smc2_ioports, - .tx_num_fifo = 4, - .tx_buf_size = 32, - .rx_num_fifo = 4, - .rx_buf_size = 32, - }, -}; - -void __init board_init(void) -{ - volatile cpm8xx_t *cp = cpmp; - unsigned *bcsr_io; - - bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); - - if (bcsr_io == NULL) { - printk(KERN_CRIT "Could not remap BCSR1\n"); - return; - } - -#ifdef CONFIG_SERIAL_CPM_SMC1 - cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */ - clrbits32(bcsr_io,(0x80000000 >> 7)); - cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX); - cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); -#else - setbits32(bcsr_io,(0x80000000 >> 7)); - - cp->cp_pbpar &= ~(0x000000c0); - cp->cp_pbdir |= 0x000000c0; - cp->cp_smc[0].smc_smcmr = 0; - cp->cp_smc[0].smc_smce = 0; -#endif - -#ifdef CONFIG_SERIAL_CPM_SMC2 - cp->cp_simode &= ~(0xe0000000 >> 1); - cp->cp_simode |= (0x20000000 >> 1); /* brg2 */ - clrbits32(bcsr_io,(0x80000000 >> 13)); - cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX); - cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); -#else - clrbits32(bcsr_io,(0x80000000 >> 13)); - cp->cp_pbpar &= ~(0x00000c00); - cp->cp_pbdir |= 0x00000c00; - cp->cp_smc[1].smc_smcmr = 0; - cp->cp_smc[1].smc_smce = 0; -#endif - iounmap(bcsr_io); -} - -static void setup_fec1_ioports(struct fs_platform_info* pdata) -{ - immap_t *immap = (immap_t *) IMAP_ADDR; - - setbits16(&immap->im_ioport.iop_pdpar, 0x1fff); - setbits16(&immap->im_ioport.iop_pddir, 0x1fff); -} - -static void setup_scc1_ioports(struct fs_platform_info* pdata) -{ - immap_t *immap = (immap_t *) IMAP_ADDR; - unsigned *bcsr_io; - - bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); - - if (bcsr_io == NULL) { - printk(KERN_CRIT "Could not remap BCSR1\n"); - return; - } - - /* Enable the PHY. - */ - clrbits32(bcsr_io,BCSR1_ETHEN); - - /* Configure port A pins for Txd and Rxd. - */ - /* Disable receive and transmit in case EPPC-Bug started it. - */ - setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD); - clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD); - clrbits16(&immap->im_ioport.iop_paodr, PA_ENET_TXD); - - /* Configure port C pins to enable CLSN and RENA. - */ - clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA); - clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA); - setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA); - /* Configure port A for TCLK and RCLK. - */ - setbits16(&immap->im_ioport.iop_papar, PA_ENET_TCLK | PA_ENET_RCLK); - clrbits16(&immap->im_ioport.iop_padir, PA_ENET_TCLK | PA_ENET_RCLK); - clrbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA); - clrbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA); - - /* Configure Serial Interface clock routing. - * First, clear all SCC bits to zero, then set the ones we want. - */ - clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK); - setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT); - - /* In the original SCC enet driver the following code is placed at - the end of the initialization */ - setbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA); - setbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA); - -} - -static void setup_smc1_ioports(struct fs_uart_platform_info* pdata) -{ - immap_t *immap = (immap_t *) IMAP_ADDR; - unsigned *bcsr_io; - unsigned int iobits = 0x000000c0; - - bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); - - if (bcsr_io == NULL) { - printk(KERN_CRIT "Could not remap BCSR1\n"); - return; - } - - clrbits32(bcsr_io,BCSR1_RS232EN_1); - iounmap(bcsr_io); - - setbits32(&immap->im_cpm.cp_pbpar, iobits); - clrbits32(&immap->im_cpm.cp_pbdir, iobits); - clrbits16(&immap->im_cpm.cp_pbodr, iobits); - -} - -static void setup_smc2_ioports(struct fs_uart_platform_info* pdata) -{ - immap_t *immap = (immap_t *) IMAP_ADDR; - unsigned *bcsr_io; - unsigned int iobits = 0x00000c00; - - bcsr_io = ioremap(BCSR1, sizeof(unsigned long)); - - if (bcsr_io == NULL) { - printk(KERN_CRIT "Could not remap BCSR1\n"); - return; - } - - clrbits32(bcsr_io,BCSR1_RS232EN_2); - - iounmap(bcsr_io); - -#ifndef CONFIG_SERIAL_CPM_ALT_SMC2 - setbits32(&immap->im_cpm.cp_pbpar, iobits); - clrbits32(&immap->im_cpm.cp_pbdir, iobits); - clrbits16(&immap->im_cpm.cp_pbodr, iobits); -#else - setbits16(&immap->im_ioport.iop_papar, iobits); - clrbits16(&immap->im_ioport.iop_padir, iobits); - clrbits16(&immap->im_ioport.iop_paodr, iobits); -#endif - -} - -static int ma_count = 0; - -static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) -{ - struct fs_platform_info *fpi; - - volatile cpm8xx_t *cp; - bd_t *bd = (bd_t *) __res; - char *e; - int i; - - /* Get pointer to Communication Processor */ - cp = cpmp; - - if(fs_no >= ARRAY_SIZE(mpc8xx_enet_pdata)) { - printk(KERN_ERR"No network-suitable #%d device on bus", fs_no); - return; - } - - - fpi = &mpc8xx_enet_pdata[fs_no]; - fpi->fs_no = fs_no; - pdev->dev.platform_data = fpi; - - e = (unsigned char *)&bd->bi_enetaddr; - for (i = 0; i < 6; i++) - fpi->macaddr[i] = *e++; - - fpi->macaddr[5] += ma_count++; -} - -static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev, - int idx) -{ - /* This is for FEC devices only */ - if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec"))) - return; - mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1); -} - -static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev, - int idx) -{ - /* This is for SCC devices only */ - if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc"))) - return; - - mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); -} - -static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev, - int idx) -{ - bd_t *bd = (bd_t *) __res; - struct fs_uart_platform_info *pinfo; - int num = ARRAY_SIZE(mpc866_uart_pdata); - - int id = fs_uart_id_smc2fsid(idx); - - /* no need to alter anything if console */ - if ((id < num) && (!pdev->dev.platform_data)) { - pinfo = &mpc866_uart_pdata[id]; - pinfo->uart_clk = bd->bi_intfreq; - pdev->dev.platform_data = pinfo; - } -} - -static int mpc866ads_platform_notify(struct device *dev) -{ - static const struct platform_notify_dev_map dev_map[] = { - { - .bus_id = "fsl-cpm-fec", - .rtn = mpc866ads_fixup_fec_enet_pdata, - }, - { - .bus_id = "fsl-cpm-scc", - .rtn = mpc866ads_fixup_scc_enet_pdata, - }, - { - .bus_id = "fsl-cpm-smc:uart", - .rtn = mpc866ads_fixup_uart_pdata - }, - { - .bus_id = NULL - } - }; - - platform_notify_map(dev_map,dev); - - return 0; -} - -int __init mpc866ads_init(void) -{ - bd_t *bd = (bd_t *) __res; - struct fs_mii_fec_platform_info* fmpi; - - printk(KERN_NOTICE "mpc866ads: Init\n"); - - platform_notify = mpc866ads_platform_notify; - - ppc_sys_device_initfunc(); - ppc_sys_device_disable_all(); - -#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC1 - ppc_sys_device_enable(MPC8xx_CPM_SCC1); -#endif - ppc_sys_device_enable(MPC8xx_CPM_FEC1); - - ppc_sys_device_enable(MPC8xx_MDIO_FEC); - - fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = - &mpc8xx_mdio_fec_pdata; - - fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; - /* No PHY interrupt line here */ - fmpi->irq[0xf] = PHY_POLL; - -/* Since either of the uarts could be used as console, they need to ready */ -#ifdef CONFIG_SERIAL_CPM_SMC1 - ppc_sys_device_enable(MPC8xx_CPM_SMC1); - ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART); -#endif - -#ifdef CONFIG_SERIAL_CPM_SMC2 - ppc_sys_device_enable(MPC8xx_CPM_SMC2); - ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); -#endif - ppc_sys_device_enable(MPC8xx_MDIO_FEC); - - fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = - &mpc8xx_mdio_fec_pdata; - - fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; - /* No PHY interrupt line here */ - fmpi->irq[0xf] = PHY_POLL; - - return 0; -} - -/* - To prevent confusion, console selection is gross: - by 0 assumed SMC1 and by 1 assumed SMC2 - */ -struct platform_device* early_uart_get_pdev(int index) -{ - bd_t *bd = (bd_t *) __res; - struct fs_uart_platform_info *pinfo; - - struct platform_device* pdev = NULL; - if(index) { /*assume SMC2 here*/ - pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2]; - pinfo = &mpc866_uart_pdata[1]; - } else { /*over SMC1*/ - pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1]; - pinfo = &mpc866_uart_pdata[0]; - } - - pinfo->uart_clk = bd->bi_intfreq; - pdev->dev.platform_data = pinfo; - ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR); - return NULL; -} - -arch_initcall(mpc866ads_init); diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c deleted file mode 100644 index 053b54ac88f2fa631b0f123924c0a132a37904b6..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/mvme5100.c +++ /dev/null @@ -1,340 +0,0 @@ -/* - * Board setup routines for the Motorola MVME5100. - * - * Author: Matt Porter - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -static u_char mvme5100_openpic_initsenses[16] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */ -}; - -static inline int -mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - int irq; - - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 0, 0, 0, 0 }, /* IDSEL 11 - Winbond */ - { 0, 0, 0, 0 }, /* IDSEL 12 - unused */ - { 21, 22, 23, 24 }, /* IDSEL 13 - Universe II */ - { 18, 0, 0, 0 }, /* IDSEL 14 - Enet 1 */ - { 0, 0, 0, 0 }, /* IDSEL 15 - unused */ - { 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */ - { 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */ - { 0, 0, 0, 0 }, /* IDSEL 18 - unused */ - { 29, 0, 0, 0 }, /* IDSEL 19 - Enet 2 */ - { 0, 0, 0, 0 }, /* IDSEL 20 - PMCSPAN */ - }; - - const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4; - irq = PCI_IRQ_TABLE_LOOKUP; - /* If lookup is zero, always return 0 */ - if (!irq) - return 0; - else -#ifdef CONFIG_MVME5100_IPMC761_PRESENT - /* If IPMC761 present, return table value */ - return irq; -#else - /* If IPMC761 not present, we don't have an i8259 so adjust */ - return (irq - NUM_8259_INTERRUPTS); -#endif -} - -static void -mvme5100_pcibios_fixup_resources(struct pci_dev *dev) -{ - int i; - - if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) && - (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK)) - for (i=0; iresource[i].start = 0; - dev->resource[i].end = 0; - } -} - -static void __init -mvme5100_setup_bridge(void) -{ - struct pci_controller* hose; - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO, - MVME5100_PCI_UPPER_IO, IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM, - MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = MVME5100_PCI_LOWER_IO; - hose->io_space.end = MVME5100_PCI_UPPER_IO; - hose->mem_space.start = MVME5100_PCI_LOWER_MEM; - hose->mem_space.end = MVME5100_PCI_UPPER_MEM; - hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE; - - /* Use indirect method of Hawk */ - setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR, - MVME5100_PCI_CONFIG_DATA); - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources; - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = mvme5100_map_irq; -} - -static void __init -mvme5100_setup_arch(void) -{ - if ( ppc_md.progress ) - ppc_md.progress("mvme5100_setup_arch: enter", 0); - - loops_per_jiffy = 50000000 / HZ; - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - if ( ppc_md.progress ) - ppc_md.progress("mvme5100_setup_arch: find_bridges", 0); - - /* Setup PCI host bridge */ - mvme5100_setup_bridge(); - - /* Find and map our OpenPIC */ - hawk_mpic_init(MVME5100_PCI_MEM_OFFSET); - OpenPIC_InitSenses = mvme5100_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses); - - printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n"); - - if ( ppc_md.progress ) - ppc_md.progress("mvme5100_setup_arch: exit", 0); - - return; -} - -static void __init -mvme5100_init2(void) -{ -#ifdef CONFIG_MVME5100_IPMC761_PRESENT - request_region(0x00,0x20,"dma1"); - request_region(0x20,0x20,"pic1"); - request_region(0x40,0x20,"timer"); - request_region(0x80,0x10,"dma page reg"); - request_region(0xa0,0x20,"pic2"); - request_region(0xc0,0x20,"dma2"); -#endif - return; -} - -/* - * Interrupt setup and service. - * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC. - */ -static void __init -mvme5100_init_IRQ(void) -{ -#ifdef CONFIG_MVME5100_IPMC761_PRESENT - int i; -#endif - - if ( ppc_md.progress ) - ppc_md.progress("init_irq: enter", 0); - - openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000); -#ifdef CONFIG_MVME5100_IPMC761_PRESENT - openpic_init(NUM_8259_INTERRUPTS); - openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", - &i8259_irq); - - i8259_init(0, 0); -#else - openpic_init(0); -#endif - - if ( ppc_md.progress ) - ppc_md.progress("init_irq: exit", 0); - - return; -} - -/* - * Set BAT 3 to map 0xf0000000 to end of physical memory space. - */ -static __inline__ void -mvme5100_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf0001ffe); - mtspr(SPRN_DBAT1L, 0xf000002a); - mb(); -} - -static unsigned long __init -mvme5100_find_end_of_memory(void) -{ - return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE); -} - -static void __init -mvme5100_map_io(void) -{ - io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO); - ioremap_base = 0xfe000000; -} - -static void -mvme5100_reset_board(void) -{ - local_irq_disable(); - - /* Set exception prefix high - to the firmware */ - _nmask_and_or_msr(0, MSR_IP); - - out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01); - - return; -} - -static void -mvme5100_restart(char *cmd) -{ - volatile ulong i = 10000000; - - mvme5100_reset_board(); - - while (i-- > 0); - panic("restart failed\n"); -} - -static void -mvme5100_halt(void) -{ - local_irq_disable(); - while (1); -} - -static void -mvme5100_power_off(void) -{ - mvme5100_halt(); -} - -static int -mvme5100_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: Motorola\n"); - seq_printf(m, "machine\t\t: MVME5100\n"); - - return 0; -} - -TODC_ALLOC(); - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - mvme5100_set_bat(); - - isa_io_base = MVME5100_ISA_IO_BASE; - isa_mem_base = MVME5100_ISA_MEM_BASE; - pci_dram_offset = MVME5100_PCI_DRAM_OFFSET; - - ppc_md.setup_arch = mvme5100_setup_arch; - ppc_md.show_cpuinfo = mvme5100_show_cpuinfo; - ppc_md.init_IRQ = mvme5100_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - ppc_md.init = mvme5100_init2; - - ppc_md.restart = mvme5100_restart; - ppc_md.power_off = mvme5100_power_off; - ppc_md.halt = mvme5100_halt; - - ppc_md.find_end_of_memory = mvme5100_find_end_of_memory; - ppc_md.setup_io_mappings = mvme5100_map_io; - - TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1, - MVME5100_NVRAM_DATA, 8); - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = todc_calibrate_decr; - - ppc_md.nvram_read_val = todc_m48txx_read_val; - ppc_md.nvram_write_val = todc_m48txx_write_val; -} diff --git a/arch/ppc/platforms/mvme5100.h b/arch/ppc/platforms/mvme5100.h deleted file mode 100644 index fbb5495165c7623d90bbf9c0274440d6d88f5b6a..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/mvme5100.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * arch/ppc/platforms/mvme5100.h - * - * Definitions for Motorola MVME5100. - * - * Author: Matt Porter - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_MVME5100_H__ -#define __ASM_MVME5100_H__ - -#define MVME5100_HAWK_SMC_BASE 0xfef80000 - -#define MVME5100_PCI_CONFIG_ADDR 0xfe000cf8 -#define MVME5100_PCI_CONFIG_DATA 0xfe000cfc - -#define MVME5100_PCI_IO_BASE 0xfe000000 -#define MVME5100_PCI_MEM_BASE 0x80000000 - -#define MVME5100_PCI_MEM_OFFSET 0x00000000 - -#define MVME5100_PCI_DRAM_OFFSET 0x00000000 -#define MVME5100_ISA_MEM_BASE 0x00000000 -#define MVME5100_ISA_IO_BASE MVME5100_PCI_IO_BASE - -#define MVME5100_PCI_LOWER_MEM 0x80000000 -#define MVME5100_PCI_UPPER_MEM 0xf3f7ffff -#define MVME5100_PCI_LOWER_IO 0x00000000 -#define MVME5100_PCI_UPPER_IO 0x0077ffff - -/* MVME5100 board register addresses. */ -#define MVME5100_BOARD_STATUS_REG 0xfef88080 -#define MVME5100_BOARD_MODFAIL_REG 0xfef88090 -#define MVME5100_BOARD_MODRST_REG 0xfef880a0 -#define MVME5100_BOARD_TBEN_REG 0xfef880c0 -#define MVME5100_BOARD_SW_READ_REG 0xfef880e0 -#define MVME5100_BOARD_GEO_ADDR_REG 0xfef880e8 -#define MVME5100_BOARD_EXT_FEATURE1_REG 0xfef880f0 -#define MVME5100_BOARD_EXT_FEATURE2_REG 0xfef88100 - -/* Define the NVRAM/RTC address strobe & data registers */ -#define MVME5100_PHYS_NVRAM_AS0 0xfef880c8 -#define MVME5100_PHYS_NVRAM_AS1 0xfef880d0 -#define MVME5100_PHYS_NVRAM_DATA 0xfef880d8 - -#define MVME5100_NVRAM_AS0 (MVME5100_PHYS_NVRAM_AS0 - MVME5100_ISA_IO_BASE) -#define MVME5100_NVRAM_AS1 (MVME5100_PHYS_NVRAM_AS1 - MVME5100_ISA_IO_BASE) -#define MVME5100_NVRAM_DATA (MVME5100_PHYS_NVRAM_DATA - MVME5100_ISA_IO_BASE) - -/* UART clock, addresses, and irq */ -#define MVME5100_BASE_BAUD 1843200 -#define MVME5100_SERIAL_1 0xfef88000 -#define MVME5100_SERIAL_2 0xfef88200 -#ifdef CONFIG_MVME5100_IPMC761_PRESENT -#define MVME5100_SERIAL_IRQ 17 -#else -#define MVME5100_SERIAL_IRQ 1 -#endif - -#define RS_TABLE_SIZE 4 - -#define BASE_BAUD ( MVME5100_BASE_BAUD / 16 ) - -#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF - -/* All UART IRQs are wire-OR'd to one MPIC IRQ */ -#define STD_SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, MVME5100_SERIAL_1, \ - MVME5100_SERIAL_IRQ, \ - STD_COM_FLAGS, /* ttyS0 */ \ - iomem_base: (unsigned char *)MVME5100_SERIAL_1, \ - iomem_reg_shift: 4, \ - io_type: SERIAL_IO_MEM }, \ - { 0, BASE_BAUD, MVME5100_SERIAL_2, \ - MVME5100_SERIAL_IRQ, \ - STD_COM_FLAGS, /* ttyS1 */ \ - iomem_base: (unsigned char *)MVME5100_SERIAL_2, \ - iomem_reg_shift: 4, \ - io_type: SERIAL_IO_MEM }, - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DFNS - -#endif /* __ASM_MVME5100_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/pal4.h b/arch/ppc/platforms/pal4.h deleted file mode 100644 index 8569c423d88775e7fa1386259bcece9248565d56..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pal4.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Definitions for SBS Palomar IV board - * - * Author: Dan Cox - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __PPC_PLATFORMS_PAL4_H -#define __PPC_PLATFORMS_PAL4_H - -#define PAL4_NVRAM 0xfffc0000 -#define PAL4_NVRAM_SIZE 0x8000 - -#define PAL4_DRAM 0xfff80000 -#define PAL4_DRAM_BR_MASK 0xc0 -#define PAL4_DRAM_BR_SHIFT 6 -#define PAL4_DRAM_RESET 0x10 -#define PAL4_DRAM_EREADY 0x40 - -#define PAL4_MISC 0xfff80004 -#define PAL4_MISC_FB_MASK 0xc0 -#define PAL4_MISC_FLASH 0x20 /* StratFlash mapping: 1->0xff80, 0->0xfff0 */ -#define PAL4_MISC_MISC 0x08 -#define PAL4_MISC_BITF 0x02 -#define PAL4_MISC_NVKS 0x01 - -#define PAL4_L2 0xfff80008 -#define PAL4_L2_MASK 0x07 - -#define PAL4_PLDR 0xfff8000c - -/* Only two Ethernet devices on the board... */ -#define PAL4_ETH 31 -#define PAL4_INTA 20 - -#endif /* __PPC_PLATFORMS_PAL4_H */ diff --git a/arch/ppc/platforms/pal4_pci.c b/arch/ppc/platforms/pal4_pci.c deleted file mode 100644 index d81ae1c7e1cff13abde531d3febbd0510e2e8749..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pal4_pci.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * PCI support for SBS Palomar IV - * - * Author: Dan Cox - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#include "pal4.h" - -/* not much to this.... */ -static inline int __init -pal4_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - if (idsel == 9) - return PAL4_ETH; - else - return PAL4_INTA + (idsel - 3); -} - -void __init -pal4_find_bridges(void) -{ - struct pci_controller *hose; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - hose->pci_mem_offset = 0; - - /* Could snatch these from the CPC700.... */ - pci_init_resource(&hose->io_resource, - 0x0, - 0x03ffffff, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - 0x90000000, - 0x9fffffff, - IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = 0x00800000; - hose->io_space.end = 0x03ffffff; - hose->mem_space.start = 0x90000000; - hose->mem_space.end = 0x9fffffff; - hose->io_base_virt = (void *) 0xf8000000; - - setup_indirect_pci(hose, CPC700_PCI_CONFIG_ADDR, - CPC700_PCI_CONFIG_DATA); - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = pal4_map_irq; -} diff --git a/arch/ppc/platforms/pal4_serial.h b/arch/ppc/platforms/pal4_serial.h deleted file mode 100644 index a75343224cfd98629ca4f5bc84295f6acc2efa32..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pal4_serial.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Definitions for SBS PalomarIV serial support - * - * Author: Dan Cox - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __PPC_PAL4_SERIAL_H -#define __PPC_PAL4_SERIAL_H - -#define CPC700_SERIAL_1 0xff600300 -#define CPC700_SERIAL_2 0xff600400 - -#define RS_TABLE_SIZE 2 -#define BASE_BAUD (33333333 / 4 / 16) - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ) -#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST) -#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF) -#endif - -#define SERIAL_PORT_DFNS \ - {0, BASE_BAUD, CPC700_SERIAL_1, 3, STD_COM_FLAGS, \ - iomem_base: (unsigned char *) CPC700_SERIAL_1, \ - io_type: SERIAL_IO_MEM}, /* ttyS0 */ \ - {0, BASE_BAUD, CPC700_SERIAL_2, 4, STD_COM_FLAGS, \ - iomem_base: (unsigned char *) CPC700_SERIAL_2, \ - io_type: SERIAL_IO_MEM} - -#endif diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c deleted file mode 100644 index 3da47d9ec7a2d8fce1df6a4dbed0324383195aae..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pal4_setup.c +++ /dev/null @@ -1,173 +0,0 @@ -/* - * Board setup routines for the SBS PalomarIV. - * - * Author: Dan Cox - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include "pal4.h" - -extern void pal4_find_bridges(void); - -unsigned int cpc700_irq_assigns[][2] = { - {1, 1}, /* IRQ 0: ECC correctable error */ - {1, 1}, /* IRQ 1: PCI write to memory range */ - {0, 1}, /* IRQ 2: PCI write to command register */ - {0, 1}, /* IRQ 3: UART 0 */ - {0, 1}, /* IRQ 4: UART 1 */ - {0, 1}, /* IRQ 5: ICC 0 */ - {0, 1}, /* IRQ 6: ICC 1 */ - {0, 1}, /* IRQ 7: GPT compare 0 */ - {0, 1}, /* IRQ 8: GPT compare 1 */ - {0, 1}, /* IRQ 9: GPT compare 2 */ - {0, 1}, /* IRQ 10: GPT compare 3 */ - {0, 1}, /* IRQ 11: GPT compare 4 */ - {0, 1}, /* IRQ 12: GPT capture 0 */ - {0, 1}, /* IRQ 13: GPT capture 1 */ - {0, 1}, /* IRQ 14: GPT capture 2 */ - {0, 1}, /* IRQ 15: GPT capture 3 */ - {0, 1}, /* IRQ 16: GPT capture 4 */ - {0, 0}, /* IRQ 17: reserved */ - {0, 0}, /* IRQ 18: reserved */ - {0, 0}, /* IRQ 19: reserved */ - {0, 0}, /* IRQ 20: reserved */ - {0, 1}, /* IRQ 21: Ethernet */ - {0, 0}, /* IRQ 22: reserved */ - {0, 0}, /* IRQ 23: reserved */ - {0, 0}, /* IRQ 24: resreved */ - {0, 0}, /* IRQ 25: reserved */ - {0, 0}, /* IRQ 26: reserved */ - {0, 0}, /* IRQ 27: reserved */ - {0, 0}, /* IRQ 28: reserved */ - {0, 0}, /* IRQ 29: reserved */ - {0, 0}, /* IRQ 30: reserved */ - {0, 0}, /* IRQ 31: reserved */ -}; - -static int -pal4_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "board\t\t: SBS Palomar IV\n"); - - return 0; -} - -static void -pal4_restart(char *cmd) -{ - local_irq_disable(); - __asm__ __volatile__("lis 3,0xfff0\n \ - ori 3,3,0x100\n \ - mtspr 26,3\n \ - li 3,0\n \ - mtspr 27,3\n \ - rfi"); - - for(;;); -} - -static void -pal4_power_off(void) -{ - local_irq_disable(); - for(;;); -} - -static void -pal4_halt(void) -{ - pal4_power_off(); -} - -TODC_ALLOC(); - -static void __init -pal4_setup_arch(void) -{ - unsigned long l2; - - TODC_INIT(TODC_TYPE_MK48T37, 0, 0, - ioremap(PAL4_NVRAM, PAL4_NVRAM_SIZE), 8); - - pal4_find_bridges(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif - ROOT_DEV = Root_NFS; - - /* The L2 gets disabled in the bootloader, but all the proper - bits should be present from the fw, so just re-enable it */ - l2 = _get_L2CR(); - if (!(l2 & L2CR_L2E)) { - /* presume that it was initially set if the size is - still present. */ - if (l2 ^ L2CR_L2SIZ_MASK) - _set_L2CR(l2 | L2CR_L2E); - else - printk("L2 not set by firmware; left disabled.\n"); - } -} - -static void __init -pal4_map_io(void) -{ - io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - isa_io_base = 0 /*PAL4_ISA_IO_BASE*/; - pci_dram_offset = 0 /*PAL4_PCI_SYS_MEM_BASE*/; - - ppc_md.setup_arch = pal4_setup_arch; - ppc_md.show_cpuinfo = pal4_show_cpuinfo; - - ppc_md.setup_io_mappings = pal4_map_io; - - ppc_md.init_IRQ = cpc700_init_IRQ; - ppc_md.get_irq = cpc700_get_irq; - - ppc_md.restart = pal4_restart; - ppc_md.halt = pal4_halt; - ppc_md.power_off = pal4_power_off; - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = todc_calibrate_decr; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -} - diff --git a/arch/ppc/platforms/pcu_e.h b/arch/ppc/platforms/pcu_e.h deleted file mode 100644 index a2c03a22875ef91c677d3597e0b104b05a53f3e2..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pcu_e.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Siemens PCU E board specific definitions - * - * Copyright (c) 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __MACH_PCU_E_H -#define __MACH_PCU_E_H - - -#include - -#define PCU_E_IMMR_BASE 0xFE000000 /* phys. addr of IMMR */ -#define PCU_E_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR PCU_E_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE PCU_E_IMAP_SIZE /* mapped size of IMMR area */ - -#define FEC_INTERRUPT 15 /* = SIU_LEVEL7 */ -#define DEC_INTERRUPT 13 /* = SIU_LEVEL6 */ -#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* __MACH_PCU_E_H */ diff --git a/arch/ppc/platforms/powerpmc250.c b/arch/ppc/platforms/powerpmc250.c deleted file mode 100644 index 162dc85ff7be63f17d12243f4a79a13ca424f35e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/powerpmc250.c +++ /dev/null @@ -1,378 +0,0 @@ -/* - * Board setup routines for Force PowerPMC-250 Processor PMC - * - * Author: Troy Benjegerdes - * Borrowed heavily from prpmc750_*.c by - * Matt Porter - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern void powerpmc250_find_bridges(void); -extern unsigned long loops_per_jiffy; - -static u_char powerpmc250_openpic_initsenses[] __initdata = -{ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, /* PMC INTA (also MPC107 output interrupt INTA) */ - 1, /* PMC INTB (also I82559 Ethernet controller) */ - 1, /* PMC INTC */ - 1, /* PMC INTD */ - 0, /* DUART interrupt (active high) */ -}; - -static int -powerpmc250_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m,"machine\t\t: Force PowerPMC250\n"); - - return 0; -} - -static void __init -powerpmc250_setup_arch(void) -{ - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000/HZ; - - /* Lookup PCI host bridges */ - powerpmc250_find_bridges(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - printk("Force PowerPMC250 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n"); -} - -#if 0 -/* - * Compute the PrPMC750's bus speed using the baud clock as a - * reference. - */ -unsigned long __init powerpmc250_get_bus_speed(void) -{ - unsigned long tbl_start, tbl_end; - unsigned long current_state, old_state, bus_speed; - unsigned char lcr, dll, dlm; - int baud_divisor, count; - - /* Read the UART's baud clock divisor */ - lcr = readb(PRPMC750_SERIAL_0_LCR); - writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR); - dll = readb(PRPMC750_SERIAL_0_DLL); - dlm = readb(PRPMC750_SERIAL_0_DLM); - writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR); - baud_divisor = (dlm << 8) | dll; - - /* - * Use the baud clock divisor and base baud clock - * to determine the baud rate and use that as - * the number of baud clock edges we use for - * the time base sample. Make it half the baud - * rate. - */ - count = PRPMC750_BASE_BAUD / (baud_divisor * 16); - - /* Find the first edge of the baud clock */ - old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK; - do { - current_state = readb(PRPMC750_STATUS_REG) & - PRPMC750_BAUDOUT_MASK; - } while(old_state == current_state); - - old_state = current_state; - - /* Get the starting time base value */ - tbl_start = get_tbl(); - - /* - * Loop until we have found a number of edges equal - * to half the count (half the baud rate) - */ - do { - do { - current_state = readb(PRPMC750_STATUS_REG) & - PRPMC750_BAUDOUT_MASK; - } while(old_state == current_state); - old_state = current_state; - } while (--count); - - /* Get the ending time base value */ - tbl_end = get_tbl(); - - /* Compute bus speed */ - bus_speed = (tbl_end-tbl_start)*128; - - return bus_speed; -} -#endif - -static void __init -powerpmc250_calibrate_decr(void) -{ - unsigned long freq; - int divisor = 4; - - //freq = powerpmc250_get_bus_speed(); -#warning hardcoded bus freq - freq = 100000000; - - tb_ticks_per_jiffy = freq / (HZ * divisor); - tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); -} - -static void -powerpmc250_restart(char *cmd) -{ - local_irq_disable(); - /* Hard reset */ - writeb(0x11, 0xfe000332); - while(1); -} - -static void -powerpmc250_halt(void) -{ - local_irq_disable(); - while (1); -} - -static void -powerpmc250_power_off(void) -{ - powerpmc250_halt(); -} - -static void __init -powerpmc250_init_IRQ(void) -{ - - OpenPIC_InitSenses = powerpmc250_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(powerpmc250_openpic_initsenses); - mpc10x_set_openpic(); -} - -/* - * Set BAT 3 to map 0xf0000000 to end of physical memory space. - */ -static __inline__ void -powerpmc250_set_bat(void) -{ - unsigned long bat3u, bat3l; - static int mapping_set = 0; - - if (!mapping_set) - { - __asm__ __volatile__( - " lis %0,0xf000\n \ - ori %1,%0,0x002a\n \ - ori %0,%0,0x1ffe\n \ - mtspr 0x21e,%0\n \ - mtspr 0x21f,%1\n \ - isync\n \ - sync " - : "=r" (bat3u), "=r" (bat3l)); - - mapping_set = 1; - } - return; -} - -static unsigned long __init -powerpmc250_find_end_of_memory(void) -{ - /* Cover I/O space with a BAT */ - /* yuck, better hope your ram size is a power of 2 -- paulus */ - powerpmc250_set_bat(); - - return mpc10x_get_mem_size(MPC10X_MEM_MAP_B); -} - -static void __init -powerpmc250_map_io(void) -{ - io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - -#ifdef CONFIG_BLK_DEV_INITRD - if ( r4 ) - { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif - - /* Copy cmd_line parameters */ - if ( r6) - { - *(char *)(r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6 + KERNELBASE)); - } - - isa_io_base = MPC10X_MAPB_ISA_IO_BASE; - isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE; - pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET; - - ppc_md.setup_arch = powerpmc250_setup_arch; - ppc_md.show_cpuinfo = powerpmc250_show_cpuinfo; - ppc_md.init_IRQ = powerpmc250_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - - ppc_md.find_end_of_memory = powerpmc250_find_end_of_memory; - ppc_md.setup_io_mappings = powerpmc250_map_io; - - ppc_md.restart = powerpmc250_restart; - ppc_md.power_off = powerpmc250_power_off; - ppc_md.halt = powerpmc250_halt; - - /* PowerPMC250 has no timekeeper part */ - ppc_md.time_init = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.calibrate_decr = powerpmc250_calibrate_decr; -} - - -/* - * (This used to be arch/ppc/platforms/powerpmc250_pci.c) - * - * PCI support for Force PowerPMC250 - * - */ - -#undef DEBUG -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif /* DEBUG */ - -static inline int __init -powerpmc250_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {17, 0, 0, 0}, /* Device 11 - 82559 */ - {0, 0, 0, 0}, /* 12 */ - {0, 0, 0, 0}, /* 13 */ - {0, 0, 0, 0}, /* 14 */ - {0, 0, 0, 0}, /* 15 */ - {16, 17, 18, 19}, /* Device 16 - PMC A1?? */ - }; - const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -static int -powerpmc250_exclude_device(u_char bus, u_char devfn) -{ - /* - * While doing PCI Scan the MPC107 will 'detect' itself as - * device on the PCI Bus, will create an incorrect response and - * later will respond incorrectly to Configuration read coming - * from another device. - * - * The work around is that when doing a PCI Scan one - * should skip its own device number in the scan. - * - * The top IDsel is AD13 and the middle is AD14. - * - * -- Note from force - */ - - if ((bus == 0) && (PCI_SLOT(devfn) == 13 || PCI_SLOT(devfn) == 14)) { - return PCIBIOS_DEVICE_NOT_FOUND; - } - else { - return PCIBIOS_SUCCESSFUL; - } -} - -void __init -powerpmc250_find_bridges(void) -{ - struct pci_controller* hose; - - hose = pcibios_alloc_controller(); - if (!hose){ - printk("Can't allocate PCI 'hose' structure!!!\n"); - return; - } - - hose->first_busno = 0; - hose->last_busno = 0xff; - - if (mpc10x_bridge_init(hose, - MPC10X_MEM_MAP_B, - MPC10X_MEM_MAP_B, - MPC10X_MAPB_EUMB_BASE) == 0) { - - hose->mem_resources[0].end = 0xffffffff; - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - /* ppc_md.pcibios_fixup = pcore_pcibios_fixup; */ - ppc_md.pci_swizzle = common_swizzle; - - ppc_md.pci_exclude_device = powerpmc250_exclude_device; - ppc_md.pci_map_irq = powerpmc250_map_irq; - } else { - if (ppc_md.progress) - ppc_md.progress("Bridge init failed", 0x100); - printk("Host bridge init failed\n"); - } - -} diff --git a/arch/ppc/platforms/powerpmc250.h b/arch/ppc/platforms/powerpmc250.h deleted file mode 100644 index d33ad8dc04390f33cc78d5f09dd050134f78dab2..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/powerpmc250.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * arch/ppc/platforms/powerpmc250.h - * - * Definitions for Force PowerPMC-250 board support - * - * Author: Troy Benjegerdes - * - * Borrowed heavily from prpmc750.h by Matt Porter - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASMPPC_POWERPMC250_H -#define __ASMPPC_POWERPMC250_H - -#define POWERPMC250_PCI_CONFIG_ADDR 0x80000cf8 -#define POWERPMC250_PCI_CONFIG_DATA 0x80000cfc - -#define POWERPMC250_PCI_PHY_MEM_BASE 0xc0000000 -#define POWERPMC250_PCI_MEM_BASE 0xf0000000 -#define POWERPMC250_PCI_IO_BASE 0x80000000 - -#define POWERPMC250_ISA_IO_BASE POWERPMC250_PCI_IO_BASE -#define POWERPMC250_ISA_MEM_BASE POWERPMC250_PCI_MEM_BASE -#define POWERPMC250_PCI_MEM_OFFSET POWERPMC250_PCI_PHY_MEM_BASE - -#define POWERPMC250_SYS_MEM_BASE 0x80000000 - -#define POWERPMC250_HAWK_SMC_BASE 0xfef80000 - -#define POWERPMC250_BASE_BAUD 12288000 -#define POWERPMC250_SERIAL 0xff000000 -#define POWERPMC250_SERIAL_IRQ 20 - -/* UART Defines. */ -#define RS_TABLE_SIZE 1 - -#define BASE_BAUD (POWERPMC250_BASE_BAUD / 16) - -#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF - -#define SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, POWERPMC250_SERIAL, POWERPMC250_SERIAL_IRQ, \ - STD_COM_FLAGS, /* ttyS0 */ \ - iomem_base: (u8 *)POWERPMC250_SERIAL, \ - iomem_reg_shift: 0, \ - io_type: SERIAL_IO_MEM } - -#endif /* __ASMPPC_POWERPMC250_H */ diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c deleted file mode 100644 index cbcac85c7a78bb13b8632675852a0d52521051a4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pplus.c +++ /dev/null @@ -1,844 +0,0 @@ -/* - * Board and PCI setup routines for MCG PowerPlus - * - * Author: Randy Vinson - * - * Derived from original PowerPlus PReP work by - * Cort Dougan, Johnnie Peters, Matt Porter, and - * Troy Benjegerdes. - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "pplus.h" - -#undef DUMP_DBATS - -TODC_ALLOC(); - -extern void pplus_setup_hose(void); -extern void pplus_set_VIA_IDE_native(void); - -extern unsigned long loops_per_jiffy; -unsigned char *Motherboard_map_name; - -/* Tables for known hardware */ - -/* Motorola Mesquite */ -static inline int -mesquite_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * MPIC interrupts for various IDSEL values (MPIC IRQ0 = - * Linux IRQ16 (to leave room for ISA IRQs at 0-15). - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {18, 0, 0, 0}, /* IDSEL 14 - Enet 0 */ - { 0, 0, 0, 0}, /* IDSEL 15 - unused */ - {19, 19, 19, 19}, /* IDSEL 16 - PMC Slot 1 */ - { 0, 0, 0, 0}, /* IDSEL 17 - unused */ - { 0, 0, 0, 0}, /* IDSEL 18 - unused */ - { 0, 0, 0, 0}, /* IDSEL 19 - unused */ - {24, 25, 26, 27}, /* IDSEL 20 - P2P bridge (to cPCI 1) */ - { 0, 0, 0, 0}, /* IDSEL 21 - unused */ - {28, 29, 30, 31} /* IDSEL 22 - P2P bridge (to cPCI 2) */ - }; - - const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -/* Motorola Sitka */ -static inline int -sitka_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * MPIC interrupts for various IDSEL values (MPIC IRQ0 = - * Linux IRQ16 (to leave room for ISA IRQs at 0-15). - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {18, 0, 0, 0}, /* IDSEL 14 - Enet 0 */ - { 0, 0, 0, 0}, /* IDSEL 15 - unused */ - {25, 26, 27, 28}, /* IDSEL 16 - PMC Slot 1 */ - {28, 25, 26, 27}, /* IDSEL 17 - PMC Slot 2 */ - { 0, 0, 0, 0}, /* IDSEL 18 - unused */ - { 0, 0, 0, 0}, /* IDSEL 19 - unused */ - {20, 0, 0, 0} /* IDSEL 20 - P2P bridge (to cPCI) */ - }; - - const long min_idsel = 14, max_idsel = 20, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -/* Motorola MTX */ -static inline int -MTX_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * MPIC interrupts for various IDSEL values (MPIC IRQ0 = - * Linux IRQ16 (to leave room for ISA IRQs at 0-15). - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {19, 0, 0, 0}, /* IDSEL 12 - SCSI */ - { 0, 0, 0, 0}, /* IDSEL 13 - unused */ - {18, 0, 0, 0}, /* IDSEL 14 - Enet */ - { 0, 0, 0, 0}, /* IDSEL 15 - unused */ - {25, 26, 27, 28}, /* IDSEL 16 - PMC Slot 1 */ - {26, 27, 28, 25}, /* IDSEL 17 - PMC Slot 2 */ - {27, 28, 25, 26} /* IDSEL 18 - PCI Slot 3 */ - }; - - const long min_idsel = 12, max_idsel = 18, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -/* Motorola MTX Plus */ -/* Secondary bus interrupt routing is not supported yet */ -static inline int -MTXplus_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * MPIC interrupts for various IDSEL values (MPIC IRQ0 = - * Linux IRQ16 (to leave room for ISA IRQs at 0-15). - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {19, 0, 0, 0}, /* IDSEL 12 - SCSI */ - { 0, 0, 0, 0}, /* IDSEL 13 - unused */ - {18, 0, 0, 0}, /* IDSEL 14 - Enet 1 */ - { 0, 0, 0, 0}, /* IDSEL 15 - unused */ - {25, 26, 27, 28}, /* IDSEL 16 - PCI Slot 1P */ - {26, 27, 28, 25}, /* IDSEL 17 - PCI Slot 2P */ - {27, 28, 25, 26}, /* IDSEL 18 - PCI Slot 3P */ - {26, 0, 0, 0}, /* IDSEL 19 - Enet 2 */ - { 0, 0, 0, 0} /* IDSEL 20 - P2P Bridge */ - }; - - const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static inline int -Genesis2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - /* 2600 - * Raven 31 - * ISA 11 - * SCSI 12 - IRQ3 - * Univ 13 - * eth 14 - IRQ2 - * VGA 15 - IRQ4 - * PMC1 16 - IRQ9,10,11,12 = PMC1 A-D - * PMC2 17 - IRQ12,9,10,11 = A-D - * SCSI2 18 - IRQ11 - * eth2 19 - IRQ10 - * PCIX 20 - IRQ9,10,11,12 = PCI A-D - */ - - /* 2400 - * Hawk 31 - * ISA 11 - * Univ 13 - * eth 14 - IRQ2 - * PMC1 16 - IRQ9,10,11,12 = PMC A-D - * PMC2 17 - IRQ12,9,10,11 = PMC A-D - * PCIX 20 - IRQ9,10,11,12 = PMC A-D - */ - - /* 2300 - * Raven 31 - * ISA 11 - * Univ 13 - * eth 14 - IRQ2 - * PMC1 16 - 9,10,11,12 = A-D - * PMC2 17 - 9,10,11,12 = B,C,D,A - */ - - static char pci_irq_table[][4] = - /* - * MPIC interrupts for various IDSEL values (MPIC IRQ0 = - * Linux IRQ16 (to leave room for ISA IRQs at 0-15). - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {19, 0, 0, 0}, /* IDSEL 12 - SCSI */ - { 0, 0, 0, 0}, /* IDSEL 13 - Universe PCI - VME */ - {18, 0, 0, 0}, /* IDSEL 14 - Enet 1 */ - { 0, 0, 0, 0}, /* IDSEL 15 - unused */ - {25, 26, 27, 28}, /* IDSEL 16 - PCI/PMC Slot 1P */ - {28, 25, 26, 27}, /* IDSEL 17 - PCI/PMC Slot 2P */ - {27, 28, 25, 26}, /* IDSEL 18 - PCI Slot 3P */ - {26, 0, 0, 0}, /* IDSEL 19 - Enet 2 */ - {25, 26, 27, 28} /* IDSEL 20 - P2P Bridge */ - }; - - const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -#define MOTOROLA_CPUTYPE_REG 0x800 -#define MOTOROLA_BASETYPE_REG 0x803 -#define MPIC_RAVEN_ID 0x48010000 -#define MPIC_HAWK_ID 0x48030000 -#define MOT_PROC2_BIT 0x800 - -static u_char pplus_openpic_initsenses[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* MVME2600_INT_SIO */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_FALCN_ECC_ERR */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_PCI_ETHERNET */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_SCSI */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_PCI_GRAPHICS */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTB */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTC */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTD */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), -}; - -int mot_entry = -1; -int prep_keybd_present = 1; -int mot_multi = 0; - -struct brd_info { - /* 0x100 mask assumes for Raven and Hawk boards that the level/edge - * are set */ - int cpu_type; - /* 0x200 if this board has a Hawk chip. */ - int base_type; - /* or'ed with 0x80 if this board should be checked for multi CPU */ - int max_cpu; - const char *name; - int (*map_irq) (struct pci_dev *, unsigned char, unsigned char); -}; -struct brd_info mot_info[] = { - {0x300, 0x00, 0x00, "MVME 2400", Genesis2_map_irq}, - {0x1E0, 0xE0, 0x00, "Mesquite cPCI (MCP750)", mesquite_map_irq}, - {0x1E0, 0xE1, 0x00, "Sitka cPCI (MCPN750)", sitka_map_irq}, - {0x1E0, 0xE2, 0x00, "Mesquite cPCI (MCP750) w/ HAC", mesquite_map_irq}, - {0x1E0, 0xF6, 0x80, "MTX Plus", MTXplus_map_irq}, - {0x1E0, 0xF6, 0x81, "Dual MTX Plus", MTXplus_map_irq}, - {0x1E0, 0xF7, 0x80, "MTX wo/ Parallel Port", MTX_map_irq}, - {0x1E0, 0xF7, 0x81, "Dual MTX wo/ Parallel Port", MTX_map_irq}, - {0x1E0, 0xF8, 0x80, "MTX w/ Parallel Port", MTX_map_irq}, - {0x1E0, 0xF8, 0x81, "Dual MTX w/ Parallel Port", MTX_map_irq}, - {0x1E0, 0xF9, 0x00, "MVME 2300", Genesis2_map_irq}, - {0x1E0, 0xFA, 0x00, "MVME 2300SC/2600", Genesis2_map_irq}, - {0x1E0, 0xFB, 0x00, "MVME 2600 with MVME712M", Genesis2_map_irq}, - {0x1E0, 0xFC, 0x00, "MVME 2600/2700 with MVME761", Genesis2_map_irq}, - {0x1E0, 0xFD, 0x80, "MVME 3600 with MVME712M", Genesis2_map_irq}, - {0x1E0, 0xFD, 0x81, "MVME 4600 with MVME712M", Genesis2_map_irq}, - {0x1E0, 0xFE, 0x80, "MVME 3600 with MVME761", Genesis2_map_irq}, - {0x1E0, 0xFE, 0x81, "MVME 4600 with MVME761", Genesis2_map_irq}, - {0x000, 0x00, 0x00, "", NULL} -}; - -void __init pplus_set_board_type(void) -{ - unsigned char cpu_type; - unsigned char base_mod; - int entry; - unsigned short devid; - unsigned long *ProcInfo = NULL; - - cpu_type = inb(MOTOROLA_CPUTYPE_REG) & 0xF0; - base_mod = inb(MOTOROLA_BASETYPE_REG); - early_read_config_word(0, 0, 0, PCI_VENDOR_ID, &devid); - - for (entry = 0; mot_info[entry].cpu_type != 0; entry++) { - /* Check for Hawk chip */ - if (mot_info[entry].cpu_type & 0x200) { - if (devid != PCI_DEVICE_ID_MOTOROLA_HAWK) - continue; - } else { - /* store the system config register for later use. */ - ProcInfo = - (unsigned long *)ioremap(PPLUS_SYS_CONFIG_REG, 4); - - /* Check non hawk boards */ - if ((mot_info[entry].cpu_type & 0xff) != cpu_type) - continue; - - if (mot_info[entry].base_type == 0) { - mot_entry = entry; - break; - } - - if (mot_info[entry].base_type != base_mod) - continue; - } - - if (!(mot_info[entry].max_cpu & 0x80)) { - mot_entry = entry; - break; - } - - /* processor 1 not present and max processor zero indicated */ - if ((*ProcInfo & MOT_PROC2_BIT) - && !(mot_info[entry].max_cpu & 0x7f)) { - mot_entry = entry; - break; - } - - /* processor 1 present and max processor zero indicated */ - if (!(*ProcInfo & MOT_PROC2_BIT) - && (mot_info[entry].max_cpu & 0x7f)) { - mot_entry = entry; - break; - } - - /* Indicate to system if this is a multiprocessor board */ - if (!(*ProcInfo & MOT_PROC2_BIT)) - mot_multi = 1; - } - - if (mot_entry == -1) - /* No particular cpu type found - assume Mesquite (MCP750) */ - mot_entry = 1; - - Motherboard_map_name = (unsigned char *)mot_info[mot_entry].name; - ppc_md.pci_map_irq = mot_info[mot_entry].map_irq; -} -void __init pplus_pib_init(void) -{ - unsigned char reg; - unsigned short short_reg; - - struct pci_dev *dev = NULL; - - /* - * Perform specific configuration for the Via Tech or - * or Winbond PCI-ISA-Bridge part. - */ - if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_82C586_1, dev))) { - /* - * PPCBUG does not set the enable bits - * for the IDE device. Force them on here. - */ - pci_read_config_byte(dev, 0x40, ®); - - reg |= 0x03; /* IDE: Chip Enable Bits */ - pci_write_config_byte(dev, 0x40, reg); - } - - if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_82C586_2, - dev)) && (dev->devfn = 0x5a)) { - /* Force correct USB interrupt */ - dev->irq = 11; - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } - - if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND, - PCI_DEVICE_ID_WINBOND_83C553, dev))) { - /* Clear PCI Interrupt Routing Control Register. */ - short_reg = 0x0000; - pci_write_config_word(dev, 0x44, short_reg); - /* Route IDE interrupts to IRQ 14 */ - reg = 0xEE; - pci_write_config_byte(dev, 0x43, reg); - } - - if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND, - PCI_DEVICE_ID_WINBOND_82C105, dev))) { - /* - * Disable LEGIRQ mode so PCI INTS are routed - * directly to the 8259 and enable both channels - */ - pci_write_config_dword(dev, 0x40, 0x10ff0033); - - /* Force correct IDE interrupt */ - dev->irq = 14; - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } - pci_dev_put(dev); -} - -void __init pplus_set_VIA_IDE_legacy(void) -{ - unsigned short vend, dev; - - early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend); - early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev); - - if ((vend == PCI_VENDOR_ID_VIA) && - (dev == PCI_DEVICE_ID_VIA_82C586_1)) { - unsigned char temp; - - /* put back original "standard" port base addresses */ - early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1), - PCI_BASE_ADDRESS_0, 0x1f1); - early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1), - PCI_BASE_ADDRESS_1, 0x3f5); - early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1), - PCI_BASE_ADDRESS_2, 0x171); - early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1), - PCI_BASE_ADDRESS_3, 0x375); - early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1), - PCI_BASE_ADDRESS_4, 0xcc01); - - /* put into legacy mode */ - early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG, - &temp); - temp &= ~0x05; - early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG, - temp); - } -} - -void pplus_set_VIA_IDE_native(void) -{ - unsigned short vend, dev; - - early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend); - early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev); - - if ((vend == PCI_VENDOR_ID_VIA) && - (dev == PCI_DEVICE_ID_VIA_82C586_1)) { - unsigned char temp; - - /* put into native mode */ - early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG, - &temp); - temp |= 0x05; - early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG, - temp); - } -} - -void __init pplus_pcibios_fixup(void) -{ - - unsigned char reg; - unsigned short devid; - unsigned char base_mod; - - printk(KERN_INFO "Setting PCI interrupts for a \"%s\"\n", - Motherboard_map_name); - - /* Setup the Winbond or Via PIB */ - pplus_pib_init(); - - /* Set up floppy in PS/2 mode */ - outb(0x09, SIO_CONFIG_RA); - reg = inb(SIO_CONFIG_RD); - reg = (reg & 0x3F) | 0x40; - outb(reg, SIO_CONFIG_RD); - outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */ - - /* This is a hack. If this is a 2300 or 2400 mot board then there is - * no keyboard controller and we have to indicate that. - */ - - early_read_config_word(0, 0, 0, PCI_VENDOR_ID, &devid); - base_mod = inb(MOTOROLA_BASETYPE_REG); - if ((devid == PCI_DEVICE_ID_MOTOROLA_HAWK) || - (base_mod == 0xF9) || (base_mod == 0xFA) || (base_mod == 0xE1)) - prep_keybd_present = 0; -} - -void __init pplus_find_bridges(void) -{ - struct pci_controller *hose; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - hose->pci_mem_offset = PREP_ISA_MEM_BASE; - hose->io_base_virt = (void *)PREP_ISA_IO_BASE; - - pci_init_resource(&hose->io_resource, PPLUS_PCI_IO_START, - PPLUS_PCI_IO_END, IORESOURCE_IO, "PCI host bridge"); - pci_init_resource(&hose->mem_resources[0], PPLUS_PROC_PCI_MEM_START, - PPLUS_PROC_PCI_MEM_END, IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = PPLUS_PCI_IO_START; - hose->io_space.end = PPLUS_PCI_IO_END; - hose->mem_space.start = PPLUS_PCI_MEM_START; - hose->mem_space.end = PPLUS_PCI_MEM_END - HAWK_MPIC_SIZE; - - if (hawk_init(hose, PPLUS_HAWK_PPC_REG_BASE, PPLUS_PROC_PCI_MEM_START, - PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE, - PPLUS_PROC_PCI_IO_START, PPLUS_PROC_PCI_IO_END, - PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1) - != 0) { - printk(KERN_CRIT "Could not initialize host bridge\n"); - - } - - pplus_set_VIA_IDE_legacy(); - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pcibios_fixup = pplus_pcibios_fixup; - ppc_md.pci_swizzle = common_swizzle; -} - -static int pplus_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: Motorola MCG\n"); - seq_printf(m, "machine\t\t: %s\n", Motherboard_map_name); - - return 0; -} - -static void __init pplus_setup_arch(void) -{ - struct pci_controller *hose; - - if (ppc_md.progress) - ppc_md.progress("pplus_setup_arch: enter", 0); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000; - - if (ppc_md.progress) - ppc_md.progress("pplus_setup_arch: find_bridges", 0); - - /* Setup PCI host bridge */ - pplus_find_bridges(); - - hose = pci_bus_to_hose(0); - isa_io_base = (ulong) hose->io_base_virt; - - if (ppc_md.progress) - ppc_md.progress("pplus_setup_arch: set_board_type", 0); - - pplus_set_board_type(); - - /* Enable L2. Assume we don't need to flush -- Cort */ - *(unsigned char *)(PPLUS_L2_CONTROL_REG) |= 3; - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - printk(KERN_INFO "Motorola PowerPlus Platform\n"); - printk(KERN_INFO - "Port by MontaVista Software, Inc. (source@mvista.com)\n"); - -#ifdef CONFIG_VGA_CONSOLE - /* remap the VGA memory */ - vgacon_remap_base = (unsigned long)ioremap(PPLUS_ISA_MEM_BASE, - 0x08000000); - conswitchp = &vga_con; -#endif -#ifdef CONFIG_PPCBUG_NVRAM - /* Read in NVRAM data */ - init_prep_nvram(); - - /* if no bootargs, look in NVRAM */ - if (cmd_line[0] == '\0') { - char *bootargs; - bootargs = prep_nvram_get_var("bootargs"); - if (bootargs != NULL) { - strcpy(cmd_line, bootargs); - /* again.. */ - strcpy(boot_command_line, cmd_line); - } - } -#endif - if (ppc_md.progress) - ppc_md.progress("pplus_setup_arch: exit", 0); -} - -static void pplus_restart(char *cmd) -{ - unsigned long i = 10000; - - local_irq_disable(); - - /* set VIA IDE controller into native mode */ - pplus_set_VIA_IDE_native(); - - /* set exception prefix high - to the prom */ - _nmask_and_or_msr(0, MSR_IP); - - /* make sure bit 0 (reset) is a 0 */ - outb(inb(0x92) & ~1L, 0x92); - /* signal a reset to system control port A - soft reset */ - outb(inb(0x92) | 1, 0x92); - - while (i != 0) - i++; - panic("restart failed\n"); -} - -static void pplus_halt(void) -{ - /* set exception prefix high - to the prom */ - _nmask_and_or_msr(MSR_EE, MSR_IP); - - /* make sure bit 0 (reset) is a 0 */ - outb(inb(0x92) & ~1L, 0x92); - /* signal a reset to system control port A - soft reset */ - outb(inb(0x92) | 1, 0x92); - - while (1) ; - /* - * Not reached - */ -} - -static void pplus_power_off(void) -{ - pplus_halt(); -} - -static void __init pplus_init_IRQ(void) -{ - int i; - - if (ppc_md.progress) - ppc_md.progress("init_irq: enter", 0); - - OpenPIC_InitSenses = pplus_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(pplus_openpic_initsenses); - - if (OpenPIC_Addr != NULL) { - - openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000); - openpic_init(NUM_8259_INTERRUPTS); - openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", - i8259_irq); - ppc_md.get_irq = openpic_get_irq; - } - - i8259_init(0, 0); - - if (ppc_md.progress) - ppc_md.progress("init_irq: exit", 0); -} - -#ifdef CONFIG_SMP -/* PowerPlus (MTX) support */ -static int __init smp_pplus_probe(void) -{ - extern int mot_multi; - - if (mot_multi) { - openpic_request_IPIs(); - smp_hw_index[1] = 1; - return 2; - } - - return 1; -} - -static void __init smp_pplus_kick_cpu(int nr) -{ - *(unsigned long *)KERNELBASE = nr; - asm volatile ("dcbf 0,%0"::"r" (KERNELBASE):"memory"); - printk(KERN_INFO "CPU1 reset, waiting\n"); -} - -static void __init smp_pplus_setup_cpu(int cpu_nr) -{ - if (OpenPIC_Addr) - do_openpic_setup_cpu(); -} - -static struct smp_ops_t pplus_smp_ops = { - smp_openpic_message_pass, - smp_pplus_probe, - smp_pplus_kick_cpu, - smp_pplus_setup_cpu, - .give_timebase = smp_generic_give_timebase, - .take_timebase = smp_generic_take_timebase, -}; -#endif /* CONFIG_SMP */ - -#ifdef DUMP_DBATS -static void print_dbat(int idx, u32 bat) -{ - - char str[64]; - - sprintf(str, "DBAT%c%c = 0x%08x\n", - (char)((idx - DBAT0U) / 2) + '0', (idx & 1) ? 'L' : 'U', bat); - ppc_md.progress(str, 0); -} - -#define DUMP_DBAT(x) \ - do { \ - u32 __temp = mfspr(x);\ - print_dbat(x, __temp); \ - } while (0) - -static void dump_dbats(void) -{ - if (ppc_md.progress) { - DUMP_DBAT(DBAT0U); - DUMP_DBAT(DBAT0L); - DUMP_DBAT(DBAT1U); - DUMP_DBAT(DBAT1L); - DUMP_DBAT(DBAT2U); - DUMP_DBAT(DBAT2L); - DUMP_DBAT(DBAT3U); - DUMP_DBAT(DBAT3L); - } -} -#endif - -static unsigned long __init pplus_find_end_of_memory(void) -{ - unsigned long total; - - if (ppc_md.progress) - ppc_md.progress("pplus_find_end_of_memory", 0); - -#ifdef DUMP_DBATS - dump_dbats(); -#endif - - total = hawk_get_mem_size(PPLUS_HAWK_SMC_BASE); - return (total); -} - -static void __init pplus_map_io(void) -{ - io_block_mapping(PPLUS_ISA_IO_BASE, PPLUS_ISA_IO_BASE, 0x10000000, - _PAGE_IO); - io_block_mapping(0xfef80000, 0xfef80000, 0x00080000, _PAGE_IO); -} - -static void __init pplus_init2(void) -{ -#ifdef CONFIG_NVRAM - request_region(PREP_NVRAM_AS0, 0x8, "nvram"); -#endif - request_region(0x20, 0x20, "pic1"); - request_region(0xa0, 0x20, "pic2"); - request_region(0x00, 0x20, "dma1"); - request_region(0x40, 0x20, "timer"); - request_region(0x80, 0x10, "dma page reg"); - request_region(0xc0, 0x20, "dma2"); -} - -/* - * Set BAT 2 to access 0x8000000 so progress messages will work and set BAT 3 - * to 0xf0000000 to access Falcon/Raven or Hawk registers - */ -static __inline__ void pplus_set_bat(void) -{ - /* wait for all outstanding memory accesses to complete */ - mb(); - - /* setup DBATs */ - mtspr(SPRN_DBAT2U, 0x80001ffe); - mtspr(SPRN_DBAT2L, 0x8000002a); - mtspr(SPRN_DBAT3U, 0xf0001ffe); - mtspr(SPRN_DBAT3L, 0xf000002a); - - /* wait for updates */ - mb(); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* Map in board regs, etc. */ - pplus_set_bat(); - - isa_io_base = PREP_ISA_IO_BASE; - isa_mem_base = PREP_ISA_MEM_BASE; - pci_dram_offset = PREP_PCI_DRAM_OFFSET; - ISA_DMA_THRESHOLD = 0x00ffffff; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - ppc_do_canonicalize_irqs = 1; - - ppc_md.setup_arch = pplus_setup_arch; - ppc_md.show_cpuinfo = pplus_show_cpuinfo; - ppc_md.init_IRQ = pplus_init_IRQ; - /* this gets changed later on if we have an OpenPIC -- Cort */ - ppc_md.get_irq = i8259_irq; - ppc_md.init = pplus_init2; - - ppc_md.restart = pplus_restart; - ppc_md.power_off = pplus_power_off; - ppc_md.halt = pplus_halt; - - TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1, - PREP_NVRAM_DATA, 8); - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = todc_calibrate_decr; - ppc_md.nvram_read_val = todc_m48txx_read_val; - ppc_md.nvram_write_val = todc_m48txx_write_val; - - ppc_md.find_end_of_memory = pplus_find_end_of_memory; - ppc_md.setup_io_mappings = pplus_map_io; - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#ifdef CONFIG_KGDB - ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; -#endif -#ifdef CONFIG_SMP - smp_ops = &pplus_smp_ops; -#endif /* CONFIG_SMP */ -} diff --git a/arch/ppc/platforms/pplus.h b/arch/ppc/platforms/pplus.h deleted file mode 100644 index a4bbaa8d858fcac7f5d36a357bc9283a66ec54d7..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/pplus.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr. - * - * Author: Mark A. Greerinclude/asm-ppc/hawk.h - * mgreer@mvista.com - * - * Modified by Randy Vinson (rvinson@mvista.com) - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __PPC_PPLUS_H -#define __PPC_PPLUS_H - -#include - -/* - * Due to limitations imposed by legacy hardware (primarily IDE controllers), - * the PPLUS boards operate using a PReP address map. - * - * From Processor (physical) -> PCI: - * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB) - * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB) - * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area - * - * From PCI -> Processor (physical): - * System Memory: 0x80000000 -> 0x00000000 - */ - -#define PPLUS_ISA_MEM_BASE PREP_ISA_MEM_BASE -#define PPLUS_ISA_IO_BASE PREP_ISA_IO_BASE - -/* PCI Memory space mapping info */ -#define PPLUS_PCI_MEM_SIZE 0x30000000U -#define PPLUS_PROC_PCI_MEM_START PPLUS_ISA_MEM_BASE -#define PPLUS_PROC_PCI_MEM_END (PPLUS_PROC_PCI_MEM_START + \ - PPLUS_PCI_MEM_SIZE - 1) -#define PPLUS_PCI_MEM_START 0x00000000U -#define PPLUS_PCI_MEM_END (PPLUS_PCI_MEM_START + \ - PPLUS_PCI_MEM_SIZE - 1) - -/* PCI I/O space mapping info */ -#define PPLUS_PCI_IO_SIZE 0x10000000U -#define PPLUS_PROC_PCI_IO_START PPLUS_ISA_IO_BASE -#define PPLUS_PROC_PCI_IO_END (PPLUS_PROC_PCI_IO_START + \ - PPLUS_PCI_IO_SIZE - 1) -#define PPLUS_PCI_IO_START 0x00000000U -#define PPLUS_PCI_IO_END (PPLUS_PCI_IO_START + \ - PPLUS_PCI_IO_SIZE - 1) -/* System memory mapping info */ -#define PPLUS_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET -#define PPLUS_PCI_PHY_MEM_OFFSET (PPLUS_ISA_MEM_BASE-PPLUS_PCI_MEM_START) - -/* Define base addresses for important sets of registers */ -#define PPLUS_HAWK_SMC_BASE 0xfef80000U -#define PPLUS_HAWK_PPC_REG_BASE 0xfeff0000U -#define PPLUS_SYS_CONFIG_REG 0xfef80400U -#define PPLUS_L2_CONTROL_REG 0x8000081cU - -#define PPLUS_VGA_MEM_BASE 0xf0000000U - -#endif /* __PPC_PPLUS_H */ diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c deleted file mode 100644 index 8ed433e2a5c77a6d2f9c036b15960cb2a600ac0e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prep_pci.c +++ /dev/null @@ -1,1339 +0,0 @@ -/* - * PReP pci functions. - * Originally by Gary Thomas - * rewritten and updated by Cort Dougan (cort@cs.nmt.edu) - * - * The motherboard routes/maps will disappear shortly. -- Cort - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern void (*setup_ibm_pci)(char *irq_lo, char *irq_hi); - -/* Which PCI interrupt line does a given device [slot] use? */ -/* Note: This really should be two dimensional based in slot/pin used */ -static unsigned char *Motherboard_map; -unsigned char *Motherboard_map_name; - -/* How is the 82378 PIRQ mapping setup? */ -static unsigned char *Motherboard_routes; - -static void (*Motherboard_non0)(struct pci_dev *); - -static void Powerplus_Map_Non0(struct pci_dev *); - -/* Used for Motorola to store system config register */ -static unsigned long *ProcInfo; - -/* Tables for known hardware */ - -/* Motorola PowerStackII - Utah */ -static char Utah_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 5, /* Slot 2 - SCSI - NCR825A */ - 0, /* Slot 3 - unused */ - 3, /* Slot 4 - Ethernet - DEC2114x */ - 0, /* Slot 5 - unused */ - 2, /* Slot 6 - PCI Card slot #1 */ - 3, /* Slot 7 - PCI Card slot #2 */ - 5, /* Slot 8 - PCI Card slot #3 */ - 5, /* Slot 9 - PCI Bridge */ - /* added here in case we ever support PCI bridges */ - /* Secondary PCI bus cards are at slot-9,6 & slot-9,7 */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 5, /* Slot 12 - SCSI - NCR825A */ - 0, /* Slot 13 - unused */ - 3, /* Slot 14 - enet */ - 0, /* Slot 15 - unused */ - 2, /* Slot 16 - unused */ - 3, /* Slot 17 - unused */ - 5, /* Slot 18 - unused */ - 0, /* Slot 19 - unused */ - 0, /* Slot 20 - unused */ - 0, /* Slot 21 - unused */ - 0, /* Slot 22 - unused */ -}; - -static char Utah_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 9, /* Line 1 */ - 10, /* Line 2 */ - 11, /* Line 3 */ - 14, /* Line 4 */ - 15, /* Line 5 */ -}; - -/* Motorola PowerStackII - Omaha */ -/* no integrated SCSI or ethernet */ -static char Omaha_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 3, /* Slot 2 - Winbond EIDE */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 1, /* Slot 6 - PCI slot 1 */ - 2, /* Slot 7 - PCI slot 2 */ - 3, /* Slot 8 - PCI slot 3 */ - 4, /* Slot 9 - PCI slot 4 */ /* needs indirect access */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 0, /* Slot 12 - unused */ - 0, /* Slot 13 - unused */ - 0, /* Slot 14 - unused */ - 0, /* Slot 15 - unused */ - 1, /* Slot 16 - PCI slot 1 */ - 2, /* Slot 17 - PCI slot 2 */ - 3, /* Slot 18 - PCI slot 3 */ - 4, /* Slot 19 - PCI slot 4 */ /* needs indirect access */ - 0, - 0, - 0, -}; - -static char Omaha_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 9, /* Line 1 */ - 11, /* Line 2 */ - 14, /* Line 3 */ - 15 /* Line 4 */ -}; - -/* Motorola PowerStack */ -static char Blackhawk_pci_IRQ_map[19] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 1, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 1, /* Slot P7 */ - 2, /* Slot P6 */ - 3, /* Slot P5 */ -}; - -static char Blackhawk_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 9, /* Line 1 */ - 11, /* Line 2 */ - 15, /* Line 3 */ - 15 /* Line 4 */ -}; - -/* Motorola Mesquite */ -static char Mesquite_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 0, /* Slot 12 - unused */ - 0, /* Slot 13 - unused */ - 2, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 3, /* Slot 16 - PMC */ - 0, /* Slot 17 - unused */ - 0, /* Slot 18 - unused */ - 0, /* Slot 19 - unused */ - 0, /* Slot 20 - unused */ - 0, /* Slot 21 - unused */ - 0, /* Slot 22 - unused */ -}; - -/* Motorola Sitka */ -static char Sitka_pci_IRQ_map[21] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 0, /* Slot 12 - unused */ - 0, /* Slot 13 - unused */ - 2, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 9, /* Slot 16 - PMC 1 */ - 12, /* Slot 17 - PMC 2 */ - 0, /* Slot 18 - unused */ - 0, /* Slot 19 - unused */ - 4, /* Slot 20 - NT P2P bridge */ -}; - -/* Motorola MTX */ -static char MTX_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 2, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 9, /* Slot 16 - PCI/PMC slot 1 */ - 10, /* Slot 17 - PCI/PMC slot 2 */ - 11, /* Slot 18 - PCI slot 3 */ - 0, /* Slot 19 - unused */ - 0, /* Slot 20 - unused */ - 0, /* Slot 21 - unused */ - 0, /* Slot 22 - unused */ -}; - -/* Motorola MTX Plus */ -/* Secondary bus interrupt routing is not supported yet */ -static char MTXplus_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 2, /* Slot 14 - Ethernet 1 */ - 0, /* Slot 15 - unused */ - 9, /* Slot 16 - PCI slot 1P */ - 10, /* Slot 17 - PCI slot 2P */ - 11, /* Slot 18 - PCI slot 3P */ - 10, /* Slot 19 - Ethernet 2 */ - 0, /* Slot 20 - P2P Bridge */ - 0, /* Slot 21 - unused */ - 0, /* Slot 22 - unused */ -}; - -static char Raven_pci_IRQ_routes[] = -{ - 0, /* This is a dummy structure */ -}; - -/* Motorola MVME16xx */ -static char Genesis_pci_IRQ_map[16] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 1, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ -}; - -static char Genesis_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 10, /* Line 1 */ - 11, /* Line 2 */ - 14, /* Line 3 */ - 15 /* Line 4 */ -}; - -static char Genesis2_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - IDE */ - 3, /* Slot 12 - SCSI */ - 5, /* Slot 13 - Universe PCI - VME Bridge */ - 2, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 9, /* Slot 16 - PMC 1 */ - 12, /* Slot 17 - pci */ - 11, /* Slot 18 - pci */ - 10, /* Slot 19 - pci */ - 0, /* Slot 20 - pci */ - 0, /* Slot 21 - unused */ - 0, /* Slot 22 - unused */ -}; - -/* Motorola Series-E */ -static char Comet_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 1, /* Slot 14 - Ethernet */ - 0, /* Slot 15 - unused */ - 1, /* Slot 16 - PCI slot 1 */ - 2, /* Slot 17 - PCI slot 2 */ - 3, /* Slot 18 - PCI slot 3 */ - 4, /* Slot 19 - PCI bridge */ - 0, - 0, - 0, -}; - -static char Comet_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 10, /* Line 1 */ - 11, /* Line 2 */ - 14, /* Line 3 */ - 15 /* Line 4 */ -}; - -/* Motorola Series-EX */ -static char Comet2_pci_IRQ_map[23] = -{ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 3, /* Slot 2 - SCSI - NCR825A */ - 0, /* Slot 3 - unused */ - 1, /* Slot 4 - Ethernet - DEC2104X */ - 0, /* Slot 5 - unused */ - 1, /* Slot 6 - PCI slot 1 */ - 2, /* Slot 7 - PCI slot 2 */ - 3, /* Slot 8 - PCI slot 3 */ - 4, /* Slot 9 - PCI bridge */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI - NCR825A */ - 0, /* Slot 13 - unused */ - 1, /* Slot 14 - Ethernet - DEC2104X */ - 0, /* Slot 15 - unused */ - 1, /* Slot 16 - PCI slot 1 */ - 2, /* Slot 17 - PCI slot 2 */ - 3, /* Slot 18 - PCI slot 3 */ - 4, /* Slot 19 - PCI bridge */ - 0, - 0, - 0, -}; - -static char Comet2_pci_IRQ_routes[] = -{ - 0, /* Line 0 - Unused */ - 10, /* Line 1 */ - 11, /* Line 2 */ - 14, /* Line 3 */ - 15, /* Line 4 */ -}; - -/* - * ibm 830 (and 850?). - * This is actually based on the Carolina motherboard - * -- Cort - */ -static char ibm8xx_pci_IRQ_map[23] = { - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - FireCoral */ - 4, /* Slot 12 - Ethernet PCIINTD# */ - 2, /* Slot 13 - PCI Slot #2 */ - 2, /* Slot 14 - S3 Video PCIINTD# */ - 0, /* Slot 15 - onboard SCSI (INDI) [1] */ - 3, /* Slot 16 - NCR58C810 RS6000 Only PCIINTC# */ - 0, /* Slot 17 - unused */ - 2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */ - 0, /* Slot 19 - unused */ - 0, /* Slot 20 - unused */ - 0, /* Slot 21 - unused */ - 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ -}; - -static char ibm8xx_pci_IRQ_routes[] = { - 0, /* Line 0 - unused */ - 15, /* Line 1 */ - 15, /* Line 2 */ - 15, /* Line 3 */ - 15, /* Line 4 */ -}; - -/* - * a 6015 ibm board - * -- Cort - */ -static char ibm6015_pci_IRQ_map[23] = { - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - */ - 1, /* Slot 12 - SCSI */ - 2, /* Slot 13 - */ - 2, /* Slot 14 - */ - 1, /* Slot 15 - */ - 1, /* Slot 16 - */ - 0, /* Slot 17 - */ - 2, /* Slot 18 - */ - 0, /* Slot 19 - */ - 0, /* Slot 20 - */ - 0, /* Slot 21 - */ - 2, /* Slot 22 - */ -}; - -static char ibm6015_pci_IRQ_routes[] = { - 0, /* Line 0 - unused */ - 13, /* Line 1 */ - 15, /* Line 2 */ - 15, /* Line 3 */ - 15, /* Line 4 */ -}; - - -/* IBM Nobis and Thinkpad 850 */ -static char Nobis_pci_IRQ_map[23] ={ - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - unused */ - 3, /* Slot 12 - SCSI */ - 0, /* Slot 13 - unused */ - 0, /* Slot 14 - unused */ - 0, /* Slot 15 - unused */ -}; - -static char Nobis_pci_IRQ_routes[] = { - 0, /* Line 0 - Unused */ - 13, /* Line 1 */ - 13, /* Line 2 */ - 13, /* Line 3 */ - 13 /* Line 4 */ -}; - -/* - * IBM RS/6000 43p/140 -- paulus - * XXX we should get all this from the residual data - */ -static char ibm43p_pci_IRQ_map[23] = { - 0, /* Slot 0 - unused */ - 0, /* Slot 1 - unused */ - 0, /* Slot 2 - unused */ - 0, /* Slot 3 - unused */ - 0, /* Slot 4 - unused */ - 0, /* Slot 5 - unused */ - 0, /* Slot 6 - unused */ - 0, /* Slot 7 - unused */ - 0, /* Slot 8 - unused */ - 0, /* Slot 9 - unused */ - 0, /* Slot 10 - unused */ - 0, /* Slot 11 - FireCoral ISA bridge */ - 6, /* Slot 12 - Ethernet */ - 0, /* Slot 13 - openpic */ - 0, /* Slot 14 - unused */ - 0, /* Slot 15 - unused */ - 7, /* Slot 16 - NCR58C825a onboard scsi */ - 0, /* Slot 17 - unused */ - 2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */ - 0, /* Slot 19 - unused */ - 0, /* Slot 20 - unused */ - 0, /* Slot 21 - unused */ - 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ -}; - -static char ibm43p_pci_IRQ_routes[] = { - 0, /* Line 0 - unused */ - 15, /* Line 1 */ - 15, /* Line 2 */ - 15, /* Line 3 */ - 15, /* Line 4 */ -}; - -/* Motorola PowerPlus architecture PCI IRQ tables */ -/* Interrupt line values for INTA-D on primary/secondary MPIC inputs */ - -struct powerplus_irq_list -{ - unsigned char primary[4]; /* INT A-D */ - unsigned char secondary[4]; /* INT A-D */ -}; - -/* - * For standard PowerPlus boards, bus 0 PCI INTs A-D are routed to - * OpenPIC inputs 9-12. PCI INTs A-D from the on board P2P bridge - * are routed to OpenPIC inputs 5-8. These values are offset by - * 16 in the table to reflect the Linux kernel interrupt value. - */ -struct powerplus_irq_list Powerplus_pci_IRQ_list = -{ - {25, 26, 27, 28}, - {21, 22, 23, 24} -}; - -/* - * For the MCP750 (system slot board), cPCI INTs A-D are routed to - * OpenPIC inputs 8-11 and the PMC INTs A-D are routed to OpenPIC - * input 3. On a hot swap MCP750, the companion card PCI INTs A-D - * are routed to OpenPIC inputs 12-15. These values are offset by - * 16 in the table to reflect the Linux kernel interrupt value. - */ -struct powerplus_irq_list Mesquite_pci_IRQ_list = -{ - {24, 25, 26, 27}, - {28, 29, 30, 31} -}; - -/* - * This table represents the standard PCI swizzle defined in the - * PCI bus specification. - */ -static unsigned char prep_pci_intpins[4][4] = -{ - { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */ - { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */ - { 3, 4, 1, 2}, /* Buses 2, 6, 10 ... */ - { 4, 1, 2, 3}, /* Buses 3, 7, 11 ... */ -}; - -/* We have to turn on LEVEL mode for changed IRQs */ -/* All PCI IRQs need to be level mode, so this should be something - * other than hard-coded as well... IRQs are individually mappable - * to either edge or level. - */ - -/* - * 8259 edge/level control definitions - */ -#define ISA8259_M_ELCR 0x4d0 -#define ISA8259_S_ELCR 0x4d1 - -#define ELCRS_INT15_LVL 0x80 -#define ELCRS_INT14_LVL 0x40 -#define ELCRS_INT12_LVL 0x10 -#define ELCRS_INT11_LVL 0x08 -#define ELCRS_INT10_LVL 0x04 -#define ELCRS_INT9_LVL 0x02 -#define ELCRS_INT8_LVL 0x01 -#define ELCRM_INT7_LVL 0x80 -#define ELCRM_INT5_LVL 0x20 - -#if 0 -/* - * PCI config space access. - */ -#define CFGADDR(dev) ((1<<(dev>>3)) | ((dev&7)<<8)) -#define DEVNO(dev) (dev>>3) - -#define MIN_DEVNR 11 -#define MAX_DEVNR 22 - -static int -prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 *val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - - if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR - || DEVNO(devfn) > MAX_DEVNR) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + CFGADDR(devfn) + offset; - switch (len) { - case 1: - *val = in_8(cfg_data); - break; - case 2: - *val = in_le16(cfg_data); - break; - default: - *val = in_le32(cfg_data); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static int -prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - - if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR - || DEVNO(devfn) > MAX_DEVNR) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + CFGADDR(devfn) + offset; - switch (len) { - case 1: - out_8(cfg_data, val); - break; - case 2: - out_le16(cfg_data, val); - break; - default: - out_le32(cfg_data, val); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops prep_pci_ops = -{ - prep_read_config, - prep_write_config -}; -#endif - -#define MOTOROLA_CPUTYPE_REG 0x800 -#define MOTOROLA_BASETYPE_REG 0x803 -#define MPIC_RAVEN_ID 0x48010000 -#define MPIC_HAWK_ID 0x48030000 -#define MOT_PROC2_BIT 0x800 - -static u_char prep_openpic_initsenses[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* MVME2600_INT_SIO */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_FALCN_ECC_ERR */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_ETHERNET */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_SCSI */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_GRAPHICS */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTB */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTC */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTD */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG1 */ -}; - -#define MOT_RAVEN_PRESENT 0x1 -#define MOT_HAWK_PRESENT 0x2 - -int mot_entry = -1; -int prep_keybd_present = 1; -int MotMPIC; -int mot_multi; - -int __init -raven_init(void) -{ - unsigned int devid; - unsigned int pci_membase; - unsigned char base_mod; - - /* Check to see if the Raven chip exists. */ - if ( _prep_type != _PREP_Motorola) { - OpenPIC_Addr = NULL; - return 0; - } - - /* Check to see if this board is a type that might have a Raven. */ - if ((inb(MOTOROLA_CPUTYPE_REG) & 0xF0) != 0xE0) { - OpenPIC_Addr = NULL; - return 0; - } - - /* Check the first PCI device to see if it is a Raven. */ - early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &devid); - - switch (devid & 0xffff0000) { - case MPIC_RAVEN_ID: - MotMPIC = MOT_RAVEN_PRESENT; - break; - case MPIC_HAWK_ID: - MotMPIC = MOT_HAWK_PRESENT; - break; - default: - OpenPIC_Addr = NULL; - return 0; - } - - - /* Read the memory base register. */ - early_read_config_dword(NULL, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase); - - if (pci_membase == 0) { - OpenPIC_Addr = NULL; - return 0; - } - - /* Map the Raven MPIC registers to virtual memory. */ - OpenPIC_Addr = ioremap(pci_membase+0xC0000000, 0x22000); - - OpenPIC_InitSenses = prep_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(prep_openpic_initsenses); - - ppc_md.get_irq = openpic_get_irq; - - /* If raven is present on Motorola store the system config register - * for later use. - */ - ProcInfo = (unsigned long *)ioremap(0xfef80400, 4); - - /* Indicate to system if this is a multiprocessor board */ - if (!(*ProcInfo & MOT_PROC2_BIT)) { - mot_multi = 1; - } - - /* This is a hack. If this is a 2300 or 2400 mot board then there is - * no keyboard controller and we have to indicate that. - */ - base_mod = inb(MOTOROLA_BASETYPE_REG); - if ((MotMPIC == MOT_HAWK_PRESENT) || (base_mod == 0xF9) || - (base_mod == 0xFA) || (base_mod == 0xE1)) - prep_keybd_present = 0; - - return 1; -} - -struct mot_info { - int cpu_type; /* 0x100 mask assumes for Raven and Hawk boards that the level/edge are set */ - /* 0x200 if this board has a Hawk chip. */ - int base_type; - int max_cpu; /* ored with 0x80 if this board should be checked for multi CPU */ - const char *name; - unsigned char *map; - unsigned char *routes; - void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */ - struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */ - unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */ -} mot_info[] = { - {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00}, - {0x040, 0x00, 0x00, "Blackhawk (Powerstack)", Blackhawk_pci_IRQ_map, Blackhawk_pci_IRQ_routes, NULL, NULL, 0x00}, - {0x050, 0x00, 0x00, "Omaha (PowerStack II Pro3000)", Omaha_pci_IRQ_map, Omaha_pci_IRQ_routes, NULL, NULL, 0x00}, - {0x060, 0x00, 0x00, "Utah (Powerstack II Pro4000)", Utah_pci_IRQ_map, Utah_pci_IRQ_routes, NULL, NULL, 0x00}, - {0x0A0, 0x00, 0x00, "Powerstack (Series EX)", Comet2_pci_IRQ_map, Comet2_pci_IRQ_routes, NULL, NULL, 0x00}, - {0x1E0, 0xE0, 0x00, "Mesquite cPCI (MCP750)", Mesquite_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xFF}, - {0x1E0, 0xE1, 0x00, "Sitka cPCI (MCPN750)", Sitka_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xE2, 0x00, "Mesquite cPCI (MCP750) w/ HAC", Mesquite_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xC0}, - {0x1E0, 0xF6, 0x80, "MTX Plus", MTXplus_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0}, - {0x1E0, 0xF6, 0x81, "Dual MTX Plus", MTXplus_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0}, - {0x1E0, 0xF7, 0x80, "MTX wo/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x1E0, 0xF7, 0x81, "Dual MTX wo/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x1E0, 0xF8, 0x80, "MTX w/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x1E0, 0xF8, 0x81, "Dual MTX w/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x1E0, 0xF9, 0x00, "MVME 2300", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFA, 0x00, "MVME 2300SC/2600", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFB, 0x00, "MVME 2600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFC, 0x00, "MVME 2600/2700 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFD, 0x80, "MVME 3600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, - {0x1E0, 0xFD, 0x81, "MVME 4600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFE, 0x80, "MVME 3600 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFE, 0x81, "MVME 4600 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x1E0, 0xFF, 0x00, "MVME 1600-001 or 1600-011", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, - {0x000, 0x00, 0x00, "", NULL, NULL, NULL, NULL, 0x00} -}; - -void __init -ibm_prep_init(void) -{ - if (have_residual_data) { - u32 addr, real_addr, len, offset; - PPC_DEVICE *mpic; - PnP_TAG_PACKET *pkt; - - /* Use the PReP residual data to determine if an OpenPIC is - * present. If so, get the large vendor packet which will - * tell us the base address and length in memory. - * If we are successful, ioremap the memory area and set - * OpenPIC_Addr (this indicates that the OpenPIC was found). - */ - mpic = residual_find_device(-1, NULL, SystemPeripheral, - ProgrammableInterruptController, MPIC, 0); - if (!mpic) - return; - - pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap + - mpic->AllocatedOffset, 9, 0); - - if (!pkt) - return; - -#define p pkt->L4_Pack.L4_Data.L4_PPCPack - if (p.PPCData[1] == 32) { - switch (p.PPCData[0]) { - case 1: offset = PREP_ISA_IO_BASE; break; - case 2: offset = PREP_ISA_MEM_BASE; break; - default: return; /* Not I/O or memory?? */ - } - } - else - return; /* Not a 32-bit address */ - - real_addr = ld_le32((unsigned int *) (p.PPCData + 4)); - if (real_addr == 0xffffffff) - return; - - /* Adjust address to be as seen by CPU */ - addr = real_addr + offset; - - len = ld_le32((unsigned int *) (p.PPCData + 12)); - if (!len) - return; -#undef p - OpenPIC_Addr = ioremap(addr, len); - ppc_md.get_irq = openpic_get_irq; - - OpenPIC_InitSenses = prep_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(prep_openpic_initsenses); - - printk(KERN_INFO "MPIC at 0x%08x (0x%08x), length 0x%08x " - "mapped to 0x%p\n", addr, real_addr, len, OpenPIC_Addr); - } -} - -static void __init -ibm43p_pci_map_non0(struct pci_dev *dev) -{ - unsigned char intpin; - static unsigned char bridge_intrs[4] = { 3, 4, 5, 8 }; - - if (dev == NULL) - return; - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &intpin); - if (intpin < 1 || intpin > 4) - return; - intpin = (PCI_SLOT(dev->devfn) + intpin - 1) & 3; - dev->irq = openpic_to_irq(bridge_intrs[intpin]); - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); -} - -void __init -prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - if (have_residual_data) { - Motherboard_map_name = res->VitalProductData.PrintableModel; - Motherboard_map = NULL; - Motherboard_routes = NULL; - residual_irq_mask(irq_edge_mask_lo, irq_edge_mask_hi); - } -} - -void __init -prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - Motherboard_map_name = "IBM 6015/7020 (Sandalfoot/Sandalbow)"; - Motherboard_map = ibm6015_pci_IRQ_map; - Motherboard_routes = ibm6015_pci_IRQ_routes; - *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */ - *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */ -} - -void __init -prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - Motherboard_map_name = "IBM Thinkpad 850/860"; - Motherboard_map = Nobis_pci_IRQ_map; - Motherboard_routes = Nobis_pci_IRQ_routes; - *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */ - *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */ -} - -void __init -prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - Motherboard_map_name = "IBM 7248, PowerSeries 830/850 (Carolina)"; - Motherboard_map = ibm8xx_pci_IRQ_map; - Motherboard_routes = ibm8xx_pci_IRQ_routes; - *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */ - *irq_edge_mask_hi = 0xA4; /* IRQs 10, 13, 15 level-triggered */ -} - -void __init -prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - Motherboard_map_name = "IBM 43P-140 (Tiger1)"; - Motherboard_map = ibm43p_pci_IRQ_map; - Motherboard_routes = ibm43p_pci_IRQ_routes; - Motherboard_non0 = ibm43p_pci_map_non0; - *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */ - *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */ -} - -void __init -prep_route_pci_interrupts(void) -{ - unsigned char *ibc_pirq = (unsigned char *)0x80800860; - unsigned char *ibc_pcicon = (unsigned char *)0x80800840; - int i; - - if ( _prep_type == _PREP_Motorola) - { - unsigned short irq_mode; - unsigned char cpu_type; - unsigned char base_mod; - int entry; - - cpu_type = inb(MOTOROLA_CPUTYPE_REG) & 0xF0; - base_mod = inb(MOTOROLA_BASETYPE_REG); - - for (entry = 0; mot_info[entry].cpu_type != 0; entry++) { - if (mot_info[entry].cpu_type & 0x200) { /* Check for Hawk chip */ - if (!(MotMPIC & MOT_HAWK_PRESENT)) - continue; - } else { /* Check non hawk boards */ - if ((mot_info[entry].cpu_type & 0xff) != cpu_type) - continue; - - if (mot_info[entry].base_type == 0) { - mot_entry = entry; - break; - } - - if (mot_info[entry].base_type != base_mod) - continue; - } - - if (!(mot_info[entry].max_cpu & 0x80)) { - mot_entry = entry; - break; - } - - /* processor 1 not present and max processor zero indicated */ - if ((*ProcInfo & MOT_PROC2_BIT) && !(mot_info[entry].max_cpu & 0x7f)) { - mot_entry = entry; - break; - } - - /* processor 1 present and max processor zero indicated */ - if (!(*ProcInfo & MOT_PROC2_BIT) && (mot_info[entry].max_cpu & 0x7f)) { - mot_entry = entry; - break; - } - } - - if (mot_entry == -1) /* No particular cpu type found - assume Blackhawk */ - mot_entry = 3; - - Motherboard_map_name = (unsigned char *)mot_info[mot_entry].name; - Motherboard_map = mot_info[mot_entry].map; - Motherboard_routes = mot_info[mot_entry].routes; - Motherboard_non0 = mot_info[mot_entry].map_non0_bus; - - if (!(mot_info[entry].cpu_type & 0x100)) { - /* AJF adjust level/edge control according to routes */ - irq_mode = 0; - for (i = 1; i <= 4; i++) - irq_mode |= ( 1 << Motherboard_routes[i] ); - outb( irq_mode & 0xff, 0x4d0 ); - outb( (irq_mode >> 8) & 0xff, 0x4d1 ); - } - } else if ( _prep_type == _PREP_IBM ) { - unsigned char irq_edge_mask_lo, irq_edge_mask_hi; - unsigned short irq_edge_mask; - int i; - - setup_ibm_pci(&irq_edge_mask_lo, &irq_edge_mask_hi); - - outb(inb(0x04d0)|irq_edge_mask_lo, 0x4d0); /* primary 8259 */ - outb(inb(0x04d1)|irq_edge_mask_hi, 0x4d1); /* cascaded 8259 */ - - irq_edge_mask = (irq_edge_mask_hi << 8) | irq_edge_mask_lo; - for (i = 0; i < 16; ++i, irq_edge_mask >>= 1) - if (irq_edge_mask & 1) - irq_desc[i].status |= IRQ_LEVEL; - } else { - printk("No known machine pci routing!\n"); - return; - } - - /* Set up mapping from slots */ - if (Motherboard_routes) { - for (i = 1; i <= 4; i++) - ibc_pirq[i-1] = Motherboard_routes[i]; - - /* Enable PCI interrupts */ - *ibc_pcicon |= 0x20; - } -} - -void __init -prep_pib_init(void) -{ - unsigned char reg; - unsigned short short_reg; - - struct pci_dev *dev = NULL; - - if (( _prep_type == _PREP_Motorola) && (OpenPIC_Addr)) { - /* - * Perform specific configuration for the Via Tech or - * or Winbond PCI-ISA-Bridge part. - */ - if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_82C586_1, dev))) { - /* - * PPCBUG does not set the enable bits - * for the IDE device. Force them on here. - */ - pci_read_config_byte(dev, 0x40, ®); - - reg |= 0x03; /* IDE: Chip Enable Bits */ - pci_write_config_byte(dev, 0x40, reg); - } - if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_82C586_2, - dev)) && (dev->devfn = 0x5a)) { - /* Force correct USB interrupt */ - dev->irq = 11; - pci_write_config_byte(dev, - PCI_INTERRUPT_LINE, - dev->irq); - } - if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND, - PCI_DEVICE_ID_WINBOND_83C553, dev))) { - /* Clear PCI Interrupt Routing Control Register. */ - short_reg = 0x0000; - pci_write_config_word(dev, 0x44, short_reg); - if (OpenPIC_Addr){ - /* Route IDE interrupts to IRQ 14 */ - reg = 0xEE; - pci_write_config_byte(dev, 0x43, reg); - } - } - } - - if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND, - PCI_DEVICE_ID_WINBOND_82C105, dev))){ - if (OpenPIC_Addr){ - /* - * Disable LEGIRQ mode so PCI INTS are routed - * directly to the 8259 and enable both channels - */ - pci_write_config_dword(dev, 0x40, 0x10ff0033); - - /* Force correct IDE interrupt */ - dev->irq = 14; - pci_write_config_byte(dev, - PCI_INTERRUPT_LINE, - dev->irq); - } else { - /* Enable LEGIRQ for PCI INT -> 8259 IRQ routing */ - pci_write_config_dword(dev, 0x40, 0x10ff08a1); - } - } - pci_dev_put(dev); -} - -static void __init -Powerplus_Map_Non0(struct pci_dev *dev) -{ - struct pci_bus *pbus; /* Parent bus structure pointer */ - struct pci_dev *tdev = dev; /* Temporary device structure */ - unsigned int devnum; /* Accumulated device number */ - unsigned char intline; /* Linux interrupt value */ - unsigned char intpin; /* PCI interrupt pin */ - - /* Check for valid PCI dev pointer */ - if (dev == NULL) return; - - /* Initialize bridge IDSEL variable */ - devnum = PCI_SLOT(tdev->devfn); - - /* Read the interrupt pin of the device and adjust for indexing */ - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &intpin); - - /* If device doesn't request an interrupt, return */ - if ( (intpin < 1) || (intpin > 4) ) - return; - - intpin--; - - /* - * Walk up to bus 0, adjusting the interrupt pin for the standard - * PCI bus swizzle. - */ - do { - intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1; - pbus = tdev->bus; /* up one level */ - tdev = pbus->self; - devnum = PCI_SLOT(tdev->devfn); - } while(tdev->bus->number); - - /* Use the primary interrupt inputs by default */ - intline = mot_info[mot_entry].pci_irq_list->primary[intpin]; - - /* - * If the board has secondary interrupt inputs, walk the bus and - * note the devfn of the bridge from bus 0. If it is the same as - * the devfn of the bus bridge with secondary inputs, use those. - * Otherwise, assume it's a PMC site and get the interrupt line - * value from the interrupt routing table. - */ - if (mot_info[mot_entry].secondary_bridge_devfn) { - pbus = dev->bus; - - while (pbus->primary != 0) - pbus = pbus->parent; - - if ((pbus->self)->devfn != 0xA0) { - if ((pbus->self)->devfn == mot_info[mot_entry].secondary_bridge_devfn) - intline = mot_info[mot_entry].pci_irq_list->secondary[intpin]; - else { - if ((char *)(mot_info[mot_entry].map) == (char *)Mesquite_pci_IRQ_map) - intline = mot_info[mot_entry].map[((pbus->self)->devfn)/8] + 16; - else { - int i; - for (i=0;i<3;i++) - intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1; - intline = mot_info[mot_entry].pci_irq_list->primary[intpin]; - } - } - } - } - - /* Write calculated interrupt value to header and device list */ - dev->irq = intline; - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, (u8)dev->irq); -} - -void __init -prep_pcibios_fixup(void) -{ - struct pci_dev *dev = NULL; - int irq; - int have_openpic = (OpenPIC_Addr != NULL); - - prep_route_pci_interrupts(); - - printk("Setting PCI interrupts for a \"%s\"\n", Motherboard_map_name); - - /* Iterate through all the PCI devices, setting the IRQ */ - for_each_pci_dev(dev) { - /* - * If we have residual data, then this is easy: query the - * residual data for the IRQ line allocated to the device. - * This works the same whether we have an OpenPic or not. - */ - if (have_residual_data) { - irq = residual_pcidev_irq(dev); - dev->irq = have_openpic ? openpic_to_irq(irq) : irq; - } - /* - * If we don't have residual data, then we need to use - * tables to determine the IRQ. The table organisation - * is different depending on whether there is an OpenPIC - * or not. The tables are only used for bus 0, so check - * this first. - */ - else if (dev->bus->number == 0) { - irq = Motherboard_map[PCI_SLOT(dev->devfn)]; - dev->irq = have_openpic ? openpic_to_irq(irq) - : Motherboard_routes[irq]; - } - /* - * Finally, if we don't have residual data and the bus is - * non-zero, use the callback (if provided) - */ - else { - if (Motherboard_non0 != NULL) - Motherboard_non0(dev); - - continue; - } - - pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); - } - - /* Setup the Winbond or Via PIB - prep_pib_init() is coded for - * the non-openpic case, but it breaks (at least) the Utah - * (Powerstack II Pro4000), so only call it if we have an - * openpic. - */ - if (have_openpic) - prep_pib_init(); -} - -static void __init -prep_pcibios_after_init(void) -{ -#if 0 - struct pci_dev *dev; - - /* If there is a WD 90C, reset the IO BAR to 0x0 (it started that - * way, but the PCI layer relocated it because it thought 0x0 was - * invalid for a BAR). - * If you don't do this, the card's VGA base will be +0xc0000 - * instead of 0xc0000. vgacon.c (for example) is completely unaware of - * this little quirk. - */ - dev = pci_get_device(PCI_VENDOR_ID_WD, PCI_DEVICE_ID_WD_90C, NULL); - if (dev) { - dev->resource[1].end -= dev->resource[1].start; - dev->resource[1].start = 0; - /* tell the hardware */ - pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0x0); - pci_dev_put(dev); - } -#endif -} - -static void __init -prep_init_resource(struct resource *res, unsigned long start, - unsigned long end, int flags) -{ - res->flags = flags; - res->start = start; - res->end = end; - res->name = "PCI host bridge"; - res->parent = NULL; - res->sibling = NULL; - res->child = NULL; -} - -void __init -prep_find_bridges(void) -{ - struct pci_controller* hose; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - hose->pci_mem_offset = PREP_ISA_MEM_BASE; - hose->io_base_phys = PREP_ISA_IO_BASE; - hose->io_base_virt = ioremap(PREP_ISA_IO_BASE, 0x800000); - prep_init_resource(&hose->io_resource, 0, 0x007fffff, IORESOURCE_IO); - prep_init_resource(&hose->mem_resources[0], 0xc0000000, 0xfeffffff, - IORESOURCE_MEM); - setup_indirect_pci(hose, PREP_ISA_IO_BASE + 0xcf8, - PREP_ISA_IO_BASE + 0xcfc); - - printk("PReP architecture\n"); - - if (have_residual_data) { - PPC_DEVICE *hostbridge; - - hostbridge = residual_find_device(PROCESSORDEVICE, NULL, - BridgeController, PCIBridge, -1, 0); - if (hostbridge && - ((hostbridge->DeviceId.Interface == PCIBridgeIndirect) || - (hostbridge->DeviceId.Interface == PCIBridgeRS6K))) { - PnP_TAG_PACKET * pkt; - pkt = PnP_find_large_vendor_packet( - res->DevicePnPHeap+hostbridge->AllocatedOffset, - 3, 0); - if(pkt) { -#define p pkt->L4_Pack.L4_Data.L4_PPCPack - setup_indirect_pci(hose, - ld_le32((unsigned *) (p.PPCData)), - ld_le32((unsigned *) (p.PPCData+8))); -#undef p - } else - setup_indirect_pci(hose, 0x80000cf8, 0x80000cfc); - } - } - - ppc_md.pcibios_fixup = prep_pcibios_fixup; - ppc_md.pcibios_after_init = prep_pcibios_after_init; -} diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c deleted file mode 100644 index 465b658c927d7ade81c7ce26fcd241772f71ba3d..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prep_setup.c +++ /dev/null @@ -1,1043 +0,0 @@ -/* - * Copyright (C) 1995 Linus Torvalds - * Adapted from 'alpha' version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * - * Support for PReP (Motorola MTX/MVME) - * by Troy Benjegerdes (hozer@drgw.net) - */ - -/* - * bootup setup stuff.. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* prep registers for L2 */ -#define CACHECRBA 0x80000823 /* Cache configuration register address */ -#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */ -#define L2CACHE_512KB 0x00 /* 512KB */ -#define L2CACHE_256KB 0x01 /* 256KB */ -#define L2CACHE_1MB 0x02 /* 1MB */ -#define L2CACHE_NONE 0x03 /* NONE */ -#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */ - -TODC_ALLOC(); - -extern unsigned char prep_nvram_read_val(int addr); -extern void prep_nvram_write_val(int addr, - unsigned char val); -extern unsigned char rs_nvram_read_val(int addr); -extern void rs_nvram_write_val(int addr, - unsigned char val); -extern void ibm_prep_init(void); - -extern void prep_find_bridges(void); - -int _prep_type; - -extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); -extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); -extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); -extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); -extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi); - - -#define cached_21 (((char *)(ppc_cached_irq_mask))[3]) -#define cached_A1 (((char *)(ppc_cached_irq_mask))[2]) - -extern PTE *Hash, *Hash_end; -extern unsigned long Hash_size, Hash_mask; -extern int probingmem; -extern unsigned long loops_per_jiffy; - -/* useful ISA ports */ -#define PREP_SYSCTL 0x81c -/* present in the IBM reference design; possibly identical in Mot boxes: */ -#define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */ -#define PREP_IBM_SIMM_PRESENCE 0x804 -#define PREP_IBM_EQUIPMENT 0x80c -#define PREP_IBM_L2INFO 0x80d -#define PREP_IBM_PM1 0x82a /* power management register 1 */ -#define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */ -#define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */ - -/* Equipment Present Register masks: */ -#define PREP_IBM_EQUIPMENT_RESERVED 0x80 -#define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40 -#define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08 -#define PREP_IBM_EQUIPMENT_L2_256 0x04 -#define PREP_IBM_EQUIPMENT_CPU 0x02 -#define PREP_IBM_EQUIPMENT_L2 0x01 - -/* planar ID values: */ -/* Sandalfoot/Sandalbow (6015/7020) */ -#define PREP_IBM_SANDALFOOT 0xfc -/* Woodfield, Thinkpad 850/860 (6042/7249) */ -#define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */ -/* PowerSeries 830/850 (6050/6070) */ -#define PREP_IBM_CAROLINA_IDE_0 0xf0 -#define PREP_IBM_CAROLINA_IDE_1 0xf1 -#define PREP_IBM_CAROLINA_IDE_2 0xf2 -#define PREP_IBM_CAROLINA_IDE_3 0xf3 -/* 7248-43P */ -#define PREP_IBM_CAROLINA_SCSI_0 0xf4 -#define PREP_IBM_CAROLINA_SCSI_1 0xf5 -#define PREP_IBM_CAROLINA_SCSI_2 0xf6 -#define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */ -/* Tiger1 (7043-140) */ -#define PREP_IBM_TIGER1_133 0xd1 -#define PREP_IBM_TIGER1_166 0xd2 -#define PREP_IBM_TIGER1_180 0xd3 -#define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */ -#define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */ - -/* setup_ibm_pci: - * set Motherboard_map_name, Motherboard_map, Motherboard_routes. - * return 8259 edge/level masks. - */ -void (*setup_ibm_pci)(char *irq_lo, char *irq_hi); - -extern char *Motherboard_map_name; /* for use in *_cpuinfo */ - -/* - * As found in the PReP reference implementation. - * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP. - */ -static void __init -prep_gen_enable_l2(void) -{ - outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL); -} - -/* Used by Carolina and Tiger1 */ -static void __init -prep_carolina_enable_l2(void) -{ - outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL); -} - -/* cpuinfo code common to all IBM PReP */ -static void -prep_ibm_cpuinfo(struct seq_file *m) -{ - unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); - - seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name); - - seq_printf(m, "upgrade cpu\t: "); - if (equip_reg & PREP_IBM_EQUIPMENT_CPU) { - seq_printf(m, "not "); - } - seq_printf(m, "present\n"); - - /* print info about the SCSI fuse */ - seq_printf(m, "scsi fuse\t: "); - if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE) - seq_printf(m, "ok"); - else - seq_printf(m, "bad"); - seq_printf(m, "\n"); - - /* print info about SIMMs */ - if (have_residual_data) { - int i; - seq_printf(m, "simms\t\t: "); - for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) { - if (res->Memories[i].SIMMSize != 0) - seq_printf(m, "%d:%ldMiB ", i, - (res->Memories[i].SIMMSize > 1024) ? - res->Memories[i].SIMMSize>>20 : - res->Memories[i].SIMMSize); - } - seq_printf(m, "\n"); - } -} - -static int -prep_gen_cpuinfo(struct seq_file *m) -{ - prep_ibm_cpuinfo(m); - return 0; -} - -static int -prep_sandalfoot_cpuinfo(struct seq_file *m) -{ - unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); - - prep_ibm_cpuinfo(m); - - /* report amount and type of L2 cache present */ - seq_printf(m, "L2 cache\t: "); - if (equip_reg & PREP_IBM_EQUIPMENT_L2) { - seq_printf(m, "not present"); - } else { - if (equip_reg & PREP_IBM_EQUIPMENT_L2_256) - seq_printf(m, "256KiB"); - else - seq_printf(m, "unknown size"); - - if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK) - seq_printf(m, ", copy-back"); - else - seq_printf(m, ", write-through"); - } - seq_printf(m, "\n"); - - return 0; -} - -static int -prep_thinkpad_cpuinfo(struct seq_file *m) -{ - unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); - char *cpubus_speed, *pci_speed; - - prep_ibm_cpuinfo(m); - - /* report amount and type of L2 cache present */ - seq_printf(m, "l2 cache\t: "); - if ((equip_reg & 0x1) == 0) { - switch ((equip_reg & 0xc) >> 2) { - case 0x0: - seq_printf(m, "128KiB look-aside 2-way write-through\n"); - break; - case 0x1: - seq_printf(m, "512KiB look-aside direct-mapped write-back\n"); - break; - case 0x2: - seq_printf(m, "256KiB look-aside 2-way write-through\n"); - break; - case 0x3: - seq_printf(m, "256KiB look-aside direct-mapped write-back\n"); - break; - } - } else { - seq_printf(m, "not present\n"); - } - - /* report bus speeds because we can */ - if ((equip_reg & 0x80) == 0) { - switch ((equip_reg & 0x30) >> 4) { - case 0x1: - cpubus_speed = "50"; - pci_speed = "25"; - break; - case 0x3: - cpubus_speed = "66"; - pci_speed = "33"; - break; - default: - cpubus_speed = "unknown"; - pci_speed = "unknown"; - break; - } - } else { - switch ((equip_reg & 0x30) >> 4) { - case 0x1: - cpubus_speed = "25"; - pci_speed = "25"; - break; - case 0x2: - cpubus_speed = "60"; - pci_speed = "30"; - break; - case 0x3: - cpubus_speed = "33"; - pci_speed = "33"; - break; - default: - cpubus_speed = "unknown"; - pci_speed = "unknown"; - break; - } - } - seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed); - seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed); - - return 0; -} - -static int -prep_carolina_cpuinfo(struct seq_file *m) -{ - unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); - - prep_ibm_cpuinfo(m); - - /* report amount and type of L2 cache present */ - seq_printf(m, "l2 cache\t: "); - if ((equip_reg & 0x1) == 0) { - unsigned int l2_reg = inb(PREP_IBM_L2INFO); - - /* L2 size */ - if ((l2_reg & 0x60) == 0) - seq_printf(m, "256KiB"); - else if ((l2_reg & 0x60) == 0x20) - seq_printf(m, "512KiB"); - else - seq_printf(m, "unknown size"); - - /* L2 type */ - if ((l2_reg & 0x3) == 0) - seq_printf(m, ", async"); - else if ((l2_reg & 0x3) == 1) - seq_printf(m, ", sync"); - else - seq_printf(m, ", unknown type"); - - seq_printf(m, "\n"); - } else { - seq_printf(m, "not present\n"); - } - - return 0; -} - -static int -prep_tiger1_cpuinfo(struct seq_file *m) -{ - unsigned int l2_reg = inb(PREP_IBM_L2INFO); - - prep_ibm_cpuinfo(m); - - /* report amount and type of L2 cache present */ - seq_printf(m, "l2 cache\t: "); - if ((l2_reg & 0xf) == 0xf) { - seq_printf(m, "not present\n"); - } else { - if (l2_reg & 0x8) - seq_printf(m, "async, "); - else - seq_printf(m, "sync burst, "); - - if (l2_reg & 0x4) - seq_printf(m, "parity, "); - else - seq_printf(m, "no parity, "); - - switch (l2_reg & 0x3) { - case 0x0: - seq_printf(m, "256KiB\n"); - break; - case 0x1: - seq_printf(m, "512KiB\n"); - break; - case 0x2: - seq_printf(m, "1MiB\n"); - break; - default: - seq_printf(m, "unknown size\n"); - break; - } - } - - return 0; -} - - -/* Used by all Motorola PReP */ -static int -prep_mot_cpuinfo(struct seq_file *m) -{ - unsigned int cachew = *((unsigned char *)CACHECRBA); - - seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name); - - /* report amount and type of L2 cache present */ - seq_printf(m, "l2 cache\t: "); - switch (cachew & L2CACHE_MASK) { - case L2CACHE_512KB: - seq_printf(m, "512KiB"); - break; - case L2CACHE_256KB: - seq_printf(m, "256KiB"); - break; - case L2CACHE_1MB: - seq_printf(m, "1MiB"); - break; - case L2CACHE_NONE: - seq_printf(m, "none\n"); - goto no_l2; - break; - default: - seq_printf(m, "%x\n", cachew); - } - - seq_printf(m, ", parity %s", - (cachew & L2CACHE_PARITY)? "enabled" : "disabled"); - - seq_printf(m, " SRAM:"); - - switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) { - case 1: seq_printf(m, "synchronous, parity, flow-through\n"); - break; - case 2: seq_printf(m, "asynchronous, no parity\n"); - break; - case 3: seq_printf(m, "asynchronous, parity\n"); - break; - default:seq_printf(m, "synchronous, pipelined, no parity\n"); - break; - } - -no_l2: - /* print info about SIMMs */ - if (have_residual_data) { - int i; - seq_printf(m, "simms\t\t: "); - for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) { - if (res->Memories[i].SIMMSize != 0) - seq_printf(m, "%d:%ldM ", i, - (res->Memories[i].SIMMSize > 1024) ? - res->Memories[i].SIMMSize>>20 : - res->Memories[i].SIMMSize); - } - seq_printf(m, "\n"); - } - - return 0; -} - -static void -prep_restart(char *cmd) -{ -#define PREP_SP92 0x92 /* Special Port 92 */ - local_irq_disable(); /* no interrupts */ - - /* set exception prefix high - to the prom */ - _nmask_and_or_msr(0, MSR_IP); - - /* make sure bit 0 (reset) is a 0 */ - outb( inb(PREP_SP92) & ~1L , PREP_SP92); - /* signal a reset to system control port A - soft reset */ - outb( inb(PREP_SP92) | 1 , PREP_SP92); - - while ( 1 ) ; - /* not reached */ -#undef PREP_SP92 -} - -static void -prep_halt(void) -{ - local_irq_disable(); /* no interrupts */ - - /* set exception prefix high - to the prom */ - _nmask_and_or_msr(0, MSR_IP); - - while ( 1 ) ; - /* not reached */ -} - -/* Carrera is the power manager in the Thinkpads. Unfortunately not much is - * known about it, so we can't power down. - */ -static void -prep_carrera_poweroff(void) -{ - prep_halt(); -} - -/* - * On most IBM PReP's, power management is handled by a Signetics 87c750 - * behind the Utah component on the ISA bus. To access the 750 you must write - * a series of nibbles to port 0x82a (decoded by the Utah). This is described - * somewhat in the IBM Carolina Technical Specification. - * -Hollis - */ -static void -utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) -{ - /* - * byte1: 0 0 0 1 0 d a5 a4 - * byte2: 0 0 0 1 a3 a2 a1 a0 - * - * d = the bit's value, enabled or disabled - * (a5 a4 a3) = the byte number, minus 20 - * (a2 a1 a0) = the bit number - * - * example: set the 5th bit of byte 21 (21.5) - * a5 a4 a3 = 001 (byte 1) - * a2 a1 a0 = 101 (bit 5) - * - * byte1 = 0001 0100 (0x14) - * byte2 = 0001 1101 (0x1d) - */ - unsigned char byte1=0x10, byte2=0x10; - - /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */ - bytenum -= 20; - - byte1 |= (!!value) << 2; /* set d */ - byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */ - - byte2 |= (bytenum & 0x1) << 3; /* set a3 */ - byte2 |= bitnum & 0x7; /* set a2, a1, a0 */ - - outb(byte1, PREP_IBM_PM1); /* first nibble */ - mb(); - udelay(100); /* important: let controller recover */ - - outb(byte2, PREP_IBM_PM1); /* second nibble */ - mb(); - udelay(100); /* important: let controller recover */ -} - -static void -prep_sig750_poweroff(void) -{ - /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ - - local_irq_disable(); - /* set exception prefix high - to the prom */ - _nmask_and_or_msr(0, MSR_IP); - - utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */ - - while (1) ; - /* not reached */ -} - -static int -prep_show_percpuinfo(struct seq_file *m, int i) -{ - /* PREP's without residual data will give incorrect values here */ - seq_printf(m, "clock\t\t: "); - if (have_residual_data) - seq_printf(m, "%ldMHz\n", - (res->VitalProductData.ProcessorHz > 1024) ? - res->VitalProductData.ProcessorHz / 1000000 : - res->VitalProductData.ProcessorHz); - else - seq_printf(m, "???\n"); - - return 0; -} - -/* - * Fill out screen_info according to the residual data. This allows us to use - * at least vesafb. - */ -static void __init -prep_init_vesa(void) -{ -#if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \ - defined(CONFIG_FB_VESA)) - PPC_DEVICE *vgadev = NULL; - - if (have_residual_data) - vgadev = residual_find_device(~0, NULL, DisplayController, - SVGAController, -1, 0); - - if (vgadev != NULL) { - PnP_TAG_PACKET *pkt; - - pkt = PnP_find_large_vendor_packet( - (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset], - 0x04, 0); /* 0x04 = Display Tag */ - if (pkt != NULL) { - unsigned char *ptr = (unsigned char *)pkt; - - if (ptr[4]) { - /* graphics mode */ - screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB; - - screen_info.lfb_depth = ptr[4] * 8; - - screen_info.lfb_width = swab16(*(short *)(ptr+6)); - screen_info.lfb_height = swab16(*(short *)(ptr+8)); - screen_info.lfb_linelength = swab16(*(short *)(ptr+10)); - - screen_info.lfb_base = swab32(*(long *)(ptr+12)); - screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536; - } - } - } -#endif -} - -/* - * Set DBAT 2 to access 0x80000000 so early progress messages will work - */ -static __inline__ void -prep_set_bat(void) -{ - /* wait for all outstanding memory access to complete */ - mb(); - - /* setup DBATs */ - mtspr(SPRN_DBAT2U, 0x80001ffe); - mtspr(SPRN_DBAT2L, 0x8000002a); - - /* wait for updates */ - mb(); -} - -/* - * IBM 3-digit status LED - */ -static unsigned int ibm_statusled_base; - -static void -ibm_statusled_progress(char *s, unsigned short hex); - -static int -ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, - void * dummy3) -{ - ibm_statusled_progress(NULL, 0x505); /* SOS */ - return NOTIFY_DONE; -} - -static struct notifier_block ibm_statusled_block = { - ibm_statusled_panic, - NULL, - INT_MAX /* try to do it first */ -}; - -static void -ibm_statusled_progress(char *s, unsigned short hex) -{ - static int notifier_installed; - /* - * Progress uses 4 digits and we have only 3. So, we map 0xffff to - * 0xfff for display switch off. Out of range values are mapped to - * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes. - * Install the panic notifier when the display is first switched off. - */ - if (hex == 0xffff) { - hex = 0xfff; - if (!notifier_installed) { - ++notifier_installed; - atomic_notifier_chain_register(&panic_notifier_list, - &ibm_statusled_block); - } - } - else - if (hex > 0xfff) - hex = 0xeff; - - mb(); - outw(hex, ibm_statusled_base); -} - -static void __init -ibm_statusled_init(void) -{ - /* - * The IBM 3-digit LED display is specified in the residual data - * as an operator panel device, type "System Status LED". Find - * that device and determine its address. We validate all the - * other parameters on the off-chance another, similar device - * exists. - */ - if (have_residual_data) { - PPC_DEVICE *led; - PnP_TAG_PACKET *pkt; - - led = residual_find_device(~0, NULL, SystemPeripheral, - OperatorPanel, SystemStatusLED, 0); - if (!led) - return; - - pkt = PnP_find_packet((unsigned char *) - &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0); - if (!pkt) - return; - - if (pkt->S8_Pack.IOInfo != ISAAddr16bit) - return; - if (*(unsigned short *)pkt->S8_Pack.RangeMin != - *(unsigned short *)pkt->S8_Pack.RangeMax) - return; - if (pkt->S8_Pack.IOAlign != 2) - return; - if (pkt->S8_Pack.IONum != 2) - return; - - ibm_statusled_base = ld_le16((unsigned short *) - (pkt->S8_Pack.RangeMin)); - ppc_md.progress = ibm_statusled_progress; - } -} - -static void __init -prep_setup_arch(void) -{ - unsigned char reg; - int is_ide=0; - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000; - - /* Lookup PCI host bridges */ - prep_find_bridges(); - - /* Set up floppy in PS/2 mode */ - outb(0x09, SIO_CONFIG_RA); - reg = inb(SIO_CONFIG_RD); - reg = (reg & 0x3F) | 0x40; - outb(reg, SIO_CONFIG_RD); - outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */ - - switch ( _prep_type ) - { - case _PREP_IBM: - reg = inb(PREP_IBM_PLANAR); - printk(KERN_INFO "IBM planar ID: %02x", reg); - switch (reg) { - case PREP_IBM_SANDALFOOT: - prep_gen_enable_l2(); - setup_ibm_pci = prep_sandalfoot_setup_pci; - ppc_md.power_off = prep_sig750_poweroff; - ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo; - break; - case PREP_IBM_THINKPAD: - prep_gen_enable_l2(); - setup_ibm_pci = prep_thinkpad_setup_pci; - ppc_md.power_off = prep_carrera_poweroff; - ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo; - break; - default: - if (have_residual_data) { - prep_gen_enable_l2(); - setup_ibm_pci = prep_residual_setup_pci; - ppc_md.power_off = prep_halt; - ppc_md.show_cpuinfo = prep_gen_cpuinfo; - break; - } - else - printk(" - unknown! Assuming Carolina"); - /* fall through */ - case PREP_IBM_CAROLINA_IDE_0: - case PREP_IBM_CAROLINA_IDE_1: - case PREP_IBM_CAROLINA_IDE_2: - case PREP_IBM_CAROLINA_IDE_3: - is_ide = 1; - case PREP_IBM_CAROLINA_SCSI_0: - case PREP_IBM_CAROLINA_SCSI_1: - case PREP_IBM_CAROLINA_SCSI_2: - case PREP_IBM_CAROLINA_SCSI_3: - prep_carolina_enable_l2(); - setup_ibm_pci = prep_carolina_setup_pci; - ppc_md.power_off = prep_sig750_poweroff; - ppc_md.show_cpuinfo = prep_carolina_cpuinfo; - break; - case PREP_IBM_TIGER1_133: - case PREP_IBM_TIGER1_166: - case PREP_IBM_TIGER1_180: - case PREP_IBM_TIGER1_xxx: - case PREP_IBM_TIGER1_333: - prep_carolina_enable_l2(); - setup_ibm_pci = prep_tiger1_setup_pci; - ppc_md.power_off = prep_sig750_poweroff; - ppc_md.show_cpuinfo = prep_tiger1_cpuinfo; - break; - } - printk("\n"); - - /* default root device */ - if (is_ide) - ROOT_DEV = MKDEV(IDE0_MAJOR, 3); - else - ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3); - - break; - case _PREP_Motorola: - prep_gen_enable_l2(); - ppc_md.power_off = prep_halt; - ppc_md.show_cpuinfo = prep_mot_cpuinfo; - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - break; - } - - /* Read in NVRAM data */ - init_prep_nvram(); - - /* if no bootargs, look in NVRAM */ - if ( cmd_line[0] == '\0' ) { - char *bootargs; - bootargs = prep_nvram_get_var("bootargs"); - if (bootargs != NULL) { - strcpy(cmd_line, bootargs); - /* again.. */ - strcpy(boot_command_line, cmd_line); - } - } - - prep_init_vesa(); - - switch (_prep_type) { - case _PREP_Motorola: - raven_init(); - break; - case _PREP_IBM: - ibm_prep_init(); - break; - } - -#ifdef CONFIG_VGA_CONSOLE - /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */ - vgacon_remap_base = 0xf0000000; - conswitchp = &vga_con; -#endif -} - -/* - * First, see if we can get this information from the residual data. - * This is important on some IBM PReP systems. If we cannot, we let the - * TODC code handle doing this. - */ -static void __init -prep_calibrate_decr(void) -{ - if (have_residual_data) { - unsigned long freq, divisor = 4; - - if ( res->VitalProductData.ProcessorBusHz ) { - freq = res->VitalProductData.ProcessorBusHz; - printk("time_init: decrementer frequency = %lu.%.6lu MHz\n", - (freq/divisor)/1000000, - (freq/divisor)%1000000); - tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); - tb_ticks_per_jiffy = freq / HZ / divisor; - } - } - else - todc_calibrate_decr(); -} - -static void __init -prep_init_IRQ(void) -{ - unsigned int pci_viddid, pci_did; - - if (OpenPIC_Addr != NULL) { - openpic_init(NUM_8259_INTERRUPTS); - /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */ - openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", - i8259_irq); - } - - if (have_residual_data) { - i8259_init(residual_isapic_addr(), 0); - return; - } - - /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory - * controller, we poll (as they have a different int-ack address). */ - early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid); - pci_did = (pci_viddid & 0xffff0000) >> 16; - if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA) - && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN) - || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK))) - i8259_init(0, 0); - else - /* PCI interrupt ack address given in section 6.1.8 of the - * PReP specification. */ - i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0); -} - -#ifdef CONFIG_SMP -/* PReP (MTX) support */ -static int __init -smp_prep_probe(void) -{ - extern int mot_multi; - - if (mot_multi) { - openpic_request_IPIs(); - smp_hw_index[1] = 1; - return 2; - } - - return 1; -} - -static void __init -smp_prep_kick_cpu(int nr) -{ - *(unsigned long *)KERNELBASE = nr; - asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory"); - printk("CPU1 released, waiting\n"); -} - -static void __init -smp_prep_setup_cpu(int cpu_nr) -{ - if (OpenPIC_Addr) - do_openpic_setup_cpu(); -} - -static struct smp_ops_t prep_smp_ops = { - smp_openpic_message_pass, - smp_prep_probe, - smp_prep_kick_cpu, - smp_prep_setup_cpu, - .give_timebase = smp_generic_give_timebase, - .take_timebase = smp_generic_take_timebase, -}; -#endif /* CONFIG_SMP */ - -/* - * Setup the bat mappings we're going to load that cover - * the io areas. RAM was mapped by mapin_ram(). - * -- Cort - */ -static void __init -prep_map_io(void) -{ - io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO); - io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO); -} - -static int __init -prep_request_io(void) -{ -#ifdef CONFIG_NVRAM - request_region(PREP_NVRAM_AS0, 0x8, "nvram"); -#endif - request_region(0x00,0x20,"dma1"); - request_region(0x40,0x20,"timer"); - request_region(0x80,0x10,"dma page reg"); - request_region(0xc0,0x20,"dma2"); - - return 0; -} - -device_initcall(prep_request_io); - -void __init -prep_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ -#ifdef CONFIG_PREP_RESIDUAL - /* make a copy of residual data */ - if ( r3 ) { - memcpy((void *)res,(void *)(r3+KERNELBASE), - sizeof(RESIDUAL)); - } -#endif - - isa_io_base = PREP_ISA_IO_BASE; - isa_mem_base = PREP_ISA_MEM_BASE; - pci_dram_offset = PREP_PCI_DRAM_OFFSET; - ISA_DMA_THRESHOLD = 0x00ffffff; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - ppc_do_canonicalize_irqs = 1; - - /* figure out what kind of prep workstation we are */ - if (have_residual_data) { - if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) ) - _prep_type = _PREP_IBM; - else - _prep_type = _PREP_Motorola; - } - else { - /* assume motorola if no residual (netboot?) */ - _prep_type = _PREP_Motorola; - } - -#ifdef CONFIG_PREP_RESIDUAL - /* Switch off all residual data processing if the user requests it */ - if (strstr(cmd_line, "noresidual") != NULL) - res = NULL; -#endif - - /* Initialise progress early to get maximum benefit */ - prep_set_bat(); - ibm_statusled_init(); - - ppc_md.setup_arch = prep_setup_arch; - ppc_md.show_percpuinfo = prep_show_percpuinfo; - ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */ - ppc_md.init_IRQ = prep_init_IRQ; - /* this gets changed later on if we have an OpenPIC -- Cort */ - ppc_md.get_irq = i8259_irq; - - ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot; - - ppc_md.restart = prep_restart; - ppc_md.power_off = NULL; /* set in prep_setup_arch() */ - ppc_md.halt = prep_halt; - - ppc_md.nvram_read_val = prep_nvram_read_val; - ppc_md.nvram_write_val = prep_nvram_write_val; - - ppc_md.time_init = todc_time_init; - if (_prep_type == _PREP_IBM) { - ppc_md.rtc_read_val = todc_mc146818_read_val; - ppc_md.rtc_write_val = todc_mc146818_write_val; - TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1), - 8); - } else { - TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1, - PREP_NVRAM_DATA, 8); - } - - ppc_md.calibrate_decr = prep_calibrate_decr; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - - ppc_md.setup_io_mappings = prep_map_io; - -#ifdef CONFIG_SMP - smp_ops = &prep_smp_ops; -#endif /* CONFIG_SMP */ -} diff --git a/arch/ppc/platforms/prpmc750.c b/arch/ppc/platforms/prpmc750.c deleted file mode 100644 index 93bd593cf957b3d57bd41cf413d0e5e66b796796..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prpmc750.c +++ /dev/null @@ -1,360 +0,0 @@ -/* - * Board setup routines for Motorola PrPMC750 - * - * Author: Matt Porter - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "prpmc750.h" - -extern unsigned long loops_per_jiffy; - -extern void gen550_progress(char *, unsigned short); - -static u_char prpmc750_openpic_initsenses[] __initdata = -{ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UART */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_DEBUGINT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HAWK_WDT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_ABORT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTB */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTC */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTD */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */ -}; - -/* - * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier - * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22. - */ -static inline int -prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */ - {0, 0, 0, 0}, /* IDSEL 15 - unused */ - {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */ - {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */ - {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */ - {0, 0, 0, 0}, /* IDSEL 19 - unused */ - {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */ - {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */ - {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */ - }; - const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -static void __init prpmc750_pcibios_fixup(void) -{ - struct pci_dev *dev; - unsigned short wtmp; - - /* - * Kludge to clean up after PPC6BUG which doesn't - * configure the CL5446 VGA card. Also the - * resource subsystem doesn't fixup the - * PCI mem resources on the CL5446. - */ - if ((dev = pci_get_device(PCI_VENDOR_ID_CIRRUS, - PCI_DEVICE_ID_CIRRUS_5446, 0))) { - dev->resource[0].start += PRPMC750_PCI_PHY_MEM_OFFSET; - dev->resource[0].end += PRPMC750_PCI_PHY_MEM_OFFSET; - pci_read_config_word(dev, PCI_COMMAND, &wtmp); - pci_write_config_word(dev, PCI_COMMAND, wtmp | 3); - /* Enable Color mode in MISC reg */ - outb(0x03, 0x3c2); - /* Select DRAM config reg */ - outb(0x0f, 0x3c4); - /* Set proper DRAM config */ - outb(0xdf, 0x3c5); - pci_dev_put(dev); - } -} - -void __init prpmc750_find_bridges(void) -{ - struct pci_controller *hose; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE; - hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - PRPMC750_PCI_IO_START, - PRPMC750_PCI_IO_END, - IORESOURCE_IO, "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - PRPMC750_PROC_PCI_MEM_START, - PRPMC750_PROC_PCI_MEM_END, - IORESOURCE_MEM, "PCI host bridge"); - - hose->io_space.start = PRPMC750_PCI_IO_START; - hose->io_space.end = PRPMC750_PCI_IO_END; - hose->mem_space.start = PRPMC750_PCI_MEM_START; - hose->mem_space.end = PRPMC750_PCI_MEM_END - HAWK_MPIC_SIZE; - - if (hawk_init(hose, PRPMC750_HAWK_PPC_REG_BASE, - PRPMC750_PROC_PCI_MEM_START, - PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE, - PRPMC750_PROC_PCI_IO_START, PRPMC750_PROC_PCI_IO_END, - PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1) - != 0) { - printk(KERN_CRIT "Could not initialize host bridge\n"); - } - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pcibios_fixup = prpmc750_pcibios_fixup; - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = prpmc_map_irq; -} -static int prpmc750_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "machine\t\t: PrPMC750\n"); - - return 0; -} - -static void __init prpmc750_setup_arch(void) -{ - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000 / HZ; - - /* Lookup PCI host bridges */ - prpmc750_find_bridges(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - OpenPIC_InitSenses = prpmc750_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(prpmc750_openpic_initsenses); - - printk(KERN_INFO "Port by MontaVista Software, Inc. " - "(source@mvista.com)\n"); -} - -/* - * Compute the PrPMC750's bus speed using the baud clock as a - * reference. - */ -static unsigned long __init prpmc750_get_bus_speed(void) -{ - unsigned long tbl_start, tbl_end; - unsigned long current_state, old_state, bus_speed; - unsigned char lcr, dll, dlm; - int baud_divisor, count; - - /* Read the UART's baud clock divisor */ - lcr = readb(PRPMC750_SERIAL_0_LCR); - writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR); - dll = readb(PRPMC750_SERIAL_0_DLL); - dlm = readb(PRPMC750_SERIAL_0_DLM); - writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR); - baud_divisor = (dlm << 8) | dll; - - /* - * Use the baud clock divisor and base baud clock - * to determine the baud rate and use that as - * the number of baud clock edges we use for - * the time base sample. Make it half the baud - * rate. - */ - count = PRPMC750_BASE_BAUD / (baud_divisor * 16); - - /* Find the first edge of the baud clock */ - old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK; - do { - current_state = readb(PRPMC750_STATUS_REG) & - PRPMC750_BAUDOUT_MASK; - } while (old_state == current_state); - - old_state = current_state; - - /* Get the starting time base value */ - tbl_start = get_tbl(); - - /* - * Loop until we have found a number of edges equal - * to half the count (half the baud rate) - */ - do { - do { - current_state = readb(PRPMC750_STATUS_REG) & - PRPMC750_BAUDOUT_MASK; - } while (old_state == current_state); - old_state = current_state; - } while (--count); - - /* Get the ending time base value */ - tbl_end = get_tbl(); - - /* Compute bus speed */ - bus_speed = (tbl_end - tbl_start) * 128; - - return bus_speed; -} - -static void __init prpmc750_calibrate_decr(void) -{ - unsigned long freq; - int divisor = 4; - - freq = prpmc750_get_bus_speed(); - - tb_ticks_per_jiffy = freq / (HZ * divisor); - tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000); -} - -static void prpmc750_restart(char *cmd) -{ - local_irq_disable(); - writeb(PRPMC750_MODRST_MASK, PRPMC750_MODRST_REG); - while (1) ; -} - -static void prpmc750_halt(void) -{ - local_irq_disable(); - while (1) ; -} - -static void prpmc750_power_off(void) -{ - prpmc750_halt(); -} - -static void __init prpmc750_init_IRQ(void) -{ - openpic_init(0); -} - -/* - * Set BAT 3 to map 0xf0000000 to end of physical memory space. - */ -static __inline__ void prpmc750_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf0001ffe); - mtspr(SPRN_DBAT1L, 0xf000002a); - mb(); -} - -/* - * We need to read the Falcon/Hawk memory controller - * to properly determine this value - */ -static unsigned long __init prpmc750_find_end_of_memory(void) -{ - /* Read the memory size from the Hawk SMC */ - return hawk_get_mem_size(PRPMC750_HAWK_SMC_BASE); -} - -static void __init prpmc750_map_io(void) -{ - io_block_mapping(PRPMC750_ISA_IO_BASE, PRPMC750_ISA_IO_BASE, - 0x10000000, _PAGE_IO); -#if 0 - io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO); -#endif - io_block_mapping(0xf8000000, 0xf8000000, 0x08000000, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* Cover the Hawk registers with a BAT */ - prpmc750_set_bat(); - - isa_io_base = PRPMC750_ISA_IO_BASE; - isa_mem_base = PRPMC750_ISA_MEM_BASE; - pci_dram_offset = PRPMC750_PCI_DRAM_OFFSET; - - ppc_md.setup_arch = prpmc750_setup_arch; - ppc_md.show_cpuinfo = prpmc750_show_cpuinfo; - ppc_md.init_IRQ = prpmc750_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - - ppc_md.find_end_of_memory = prpmc750_find_end_of_memory; - ppc_md.setup_io_mappings = prpmc750_map_io; - - ppc_md.restart = prpmc750_restart; - ppc_md.power_off = prpmc750_power_off; - ppc_md.halt = prpmc750_halt; - - /* PrPMC750 has no timekeeper part */ - ppc_md.time_init = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.calibrate_decr = prpmc750_calibrate_decr; - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -} diff --git a/arch/ppc/platforms/prpmc750.h b/arch/ppc/platforms/prpmc750.h deleted file mode 100644 index c4dcff09d7cabea8ce217eb0bffc5ec30562b732..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prpmc750.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * arch/ppc/platforms/prpmc750.h - * - * Definitions for Motorola PrPMC750 board support - * - * Author: Matt Porter - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_PRPMC750_H__ -#define __ASM_PRPMC750_H__ - -/* - * Due to limitations imposed by legacy hardware (primarily IDE controllers), - * the PrPMC750 carrier board operates using a PReP address map. - * - * From Processor (physical) -> PCI: - * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB) - * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB) - * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area - * - * From PCI -> Processor (physical): - * System Memory: 0x80000000 -> 0x00000000 - */ - -#define PRPMC750_ISA_IO_BASE PREP_ISA_IO_BASE -#define PRPMC750_ISA_MEM_BASE PREP_ISA_MEM_BASE - -/* PCI Memory space mapping info */ -#define PRPMC750_PCI_MEM_SIZE 0x30000000U -#define PRPMC750_PROC_PCI_MEM_START PRPMC750_ISA_MEM_BASE -#define PRPMC750_PROC_PCI_MEM_END (PRPMC750_PROC_PCI_MEM_START + \ - PRPMC750_PCI_MEM_SIZE - 1) -#define PRPMC750_PCI_MEM_START 0x00000000U -#define PRPMC750_PCI_MEM_END (PRPMC750_PCI_MEM_START + \ - PRPMC750_PCI_MEM_SIZE - 1) - -/* PCI I/O space mapping info */ -#define PRPMC750_PCI_IO_SIZE 0x10000000U -#define PRPMC750_PROC_PCI_IO_START PRPMC750_ISA_IO_BASE -#define PRPMC750_PROC_PCI_IO_END (PRPMC750_PROC_PCI_IO_START + \ - PRPMC750_PCI_IO_SIZE - 1) -#define PRPMC750_PCI_IO_START 0x00000000U -#define PRPMC750_PCI_IO_END (PRPMC750_PCI_IO_START + \ - PRPMC750_PCI_IO_SIZE - 1) - -/* System memory mapping info */ -#define PRPMC750_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET -#define PRPMC750_PCI_PHY_MEM_OFFSET (PRPMC750_ISA_MEM_BASE-PRPMC750_PCI_MEM_START) - -/* Register address definitions */ -#define PRPMC750_HAWK_SMC_BASE 0xfef80000U -#define PRPMC750_HAWK_PPC_REG_BASE 0xfeff0000U - -#define PRPMC750_BASE_BAUD 1843200 -#define PRPMC750_SERIAL_0 0xfef88000 -#define PRPMC750_SERIAL_0_DLL (PRPMC750_SERIAL_0 + (UART_DLL << 4)) -#define PRPMC750_SERIAL_0_DLM (PRPMC750_SERIAL_0 + (UART_DLM << 4)) -#define PRPMC750_SERIAL_0_LCR (PRPMC750_SERIAL_0 + (UART_LCR << 4)) - -#define PRPMC750_STATUS_REG 0xfef88080 -#define PRPMC750_BAUDOUT_MASK 0x02 -#define PRPMC750_MONARCH_MASK 0x01 - -#define PRPMC750_MODRST_REG 0xfef880a0 -#define PRPMC750_MODRST_MASK 0x01 - -#define PRPMC750_PIRQ_REG 0xfef880b0 -#define PRPMC750_SEL1_MASK 0x02 -#define PRPMC750_SEL0_MASK 0x01 - -#define PRPMC750_TBEN_REG 0xfef880c0 -#define PRPMC750_TBEN_MASK 0x01 - -/* UART Defines. */ -#define RS_TABLE_SIZE 4 - -/* Rate for the 1.8432 Mhz clock for the onboard serial chip */ -#define BASE_BAUD (PRPMC750_BASE_BAUD / 16) - -#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF - -#define SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, PRPMC750_SERIAL_0, 1, STD_COM_FLAGS, \ - iomem_base: (unsigned char *)PRPMC750_SERIAL_0, \ - iomem_reg_shift: 4, \ - io_type: SERIAL_IO_MEM } /* ttyS0 */ - -#endif /* __ASM_PRPMC750_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/prpmc800.c b/arch/ppc/platforms/prpmc800.c deleted file mode 100644 index 5bcda7f92cd07b9acb3f97698b2764e4d43c5896..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prpmc800.c +++ /dev/null @@ -1,472 +0,0 @@ -/* - * Author: Dale Farnsworth - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "prpmc800.h" - -#define HARRIER_REVI_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF) -#define HARRIER_UCTL_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF) -#define HARRIER_MISC_CSR_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF) -#define HARRIER_IFEVP_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF) -#define HARRIER_IFEDE_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF) -#define HARRIER_FEEN_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF) -#define HARRIER_FEMA_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF) - -#define HARRIER_VENI_REG (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF) -#define HARRIER_MISC_CSR (PRPMC800_HARRIER_XCSR_BASE + \ - HARRIER_MISC_CSR_OFF) - -#define MONARCH (monarch != 0) -#define NON_MONARCH (monarch == 0) - -extern int mpic_init(void); -extern unsigned long loops_per_jiffy; -extern void gen550_progress(char *, unsigned short); - -static int monarch = 0; -static int found_self = 0; -static int self = 0; - -static u_char prpmc800_openpic_initsenses[] __initdata = -{ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_DEBUGINT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_WDT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTB */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTC */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTD */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */ -}; - -/* - * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier - * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22. - */ -static inline int -prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */ - {0, 0, 0, 0}, /* IDSEL 15 - unused */ - {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */ - {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */ - {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */ - {0, 0, 0, 0}, /* IDSEL 19 - unused */ - {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */ - {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */ - {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */ - }; - const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -}; - -static int -prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn, - int offset, u32 * val) -{ - /* paranoia */ - if ((hose == NULL) || - (hose->cfg_addr == NULL) || (hose->cfg_data == NULL)) - return PCIBIOS_DEVICE_NOT_FOUND; - - out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16) - | ((bus - hose->bus_offset) << 8) | 0x80); - *val = in_le32((u32 *) (hose->cfg_data + (offset & 3))); - - return PCIBIOS_SUCCESSFUL; -} - -#define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \ - (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16)) -static int prpmc_self(u8 bus, u8 devfn) -{ - /* - * Harriers always view themselves as being on bus 0. If we're not - * looking at bus 0, we're not going to find ourselves. - */ - if (bus != 0) - return PCIBIOS_DEVICE_NOT_FOUND; - else { - int result; - int val; - struct pci_controller *hose; - - hose = pci_bus_to_hose(bus); - - /* See if target device is a Harrier */ - result = prpmc_read_config_dword(hose, bus, devfn, - PCI_VENDOR_ID, &val); - if ((result != PCIBIOS_SUCCESSFUL) || - (val != HARRIER_PCI_VEND_DEV_ID)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* - * LBA bit is set if target Harrier == initiating Harrier - * (i.e. if we are reading our own PCI header). - */ - result = prpmc_read_config_dword(hose, bus, devfn, - HARRIER_LBA_OFF, &val); - if ((result != PCIBIOS_SUCCESSFUL) || - ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK)) - return PCIBIOS_DEVICE_NOT_FOUND; - - /* It's us, save our location for later */ - self = devfn; - found_self = 1; - return PCIBIOS_SUCCESSFUL; - } -} - -static int prpmc_exclude_device(u8 bus, u8 devfn) -{ - /* - * Monarch is allowed to access all PCI devices. Non-monarch is - * only allowed to access its own Harrier. - */ - - if (MONARCH) - return PCIBIOS_SUCCESSFUL; - if (found_self) - if ((bus == 0) && (devfn == self)) - return PCIBIOS_SUCCESSFUL; - else - return PCIBIOS_DEVICE_NOT_FOUND; - else - return prpmc_self(bus, devfn); -} - -void __init prpmc800_find_bridges(void) -{ - struct pci_controller *hose; - int host_bridge; - - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - ppc_md.pci_exclude_device = prpmc_exclude_device; - ppc_md.pcibios_fixup = NULL; - ppc_md.pcibios_fixup_bus = NULL; - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = prpmc_map_irq; - - setup_indirect_pci(hose, - PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA); - - /* Get host bridge vendor/dev id */ - - host_bridge = in_be32((uint *) (HARRIER_VENI_REG)); - - if (host_bridge != HARRIER_VEND_DEV_ID) { - printk(KERN_CRIT "Host bridge 0x%x not supported\n", - host_bridge); - return; - } - - monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON; - - printk(KERN_INFO "Running as %s.\n", - MONARCH ? "Monarch" : "Non-Monarch"); - - hose->io_space.start = PRPMC800_PCI_IO_START; - hose->io_space.end = PRPMC800_PCI_IO_END; - hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE; - hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET; - - pci_init_resource(&hose->io_resource, - PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END, - IORESOURCE_IO, "PCI host bridge"); - - if (MONARCH) { - hose->mem_space.start = PRPMC800_PCI_MEM_START; - hose->mem_space.end = PRPMC800_PCI_MEM_END; - - pci_init_resource(&hose->mem_resources[0], - PRPMC800_PCI_MEM_START, - PRPMC800_PCI_MEM_END, - IORESOURCE_MEM, "PCI host bridge"); - - if (harrier_init(hose, - PRPMC800_HARRIER_XCSR_BASE, - PRPMC800_PROC_PCI_MEM_START, - PRPMC800_PROC_PCI_MEM_END, - PRPMC800_PROC_PCI_IO_START, - PRPMC800_PROC_PCI_IO_END, - PRPMC800_HARRIER_MPIC_BASE) != 0) - printk(KERN_CRIT "Could not initialize HARRIER " - "bridge\n"); - - harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE); - harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE); - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - } else { - pci_init_resource(&hose->mem_resources[0], - PRPMC800_NM_PCI_MEM_START, - PRPMC800_NM_PCI_MEM_END, - IORESOURCE_MEM, "PCI host bridge"); - - hose->mem_space.start = PRPMC800_NM_PCI_MEM_START; - hose->mem_space.end = PRPMC800_NM_PCI_MEM_END; - - if (harrier_init(hose, - PRPMC800_HARRIER_XCSR_BASE, - PRPMC800_NM_PROC_PCI_MEM_START, - PRPMC800_NM_PROC_PCI_MEM_END, - PRPMC800_PROC_PCI_IO_START, - PRPMC800_PROC_PCI_IO_END, - PRPMC800_HARRIER_MPIC_BASE) != 0) - printk(KERN_CRIT "Could not initialize HARRIER " - "bridge\n"); - - harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE, - HARRIER_ITSZ_1MB); - harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE); - } -} - -static int prpmc800_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "machine\t\t: PrPMC800\n"); - - return 0; -} - -static void __init prpmc800_setup_arch(void) -{ - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000 / HZ; - - /* Lookup PCI host bridges */ - prpmc800_find_bridges(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA2; -#endif - - printk(KERN_INFO "Port by MontaVista Software, Inc. " - "(source@mvista.com)\n"); -} - -/* - * Compute the PrPMC800's tbl frequency using the baud clock as a reference. - */ -static void __init prpmc800_calibrate_decr(void) -{ - unsigned long tbl_start, tbl_end; - unsigned long current_state, old_state, tb_ticks_per_second; - unsigned int count; - unsigned int harrier_revision; - - harrier_revision = readb(HARRIER_REVI_REG); - if (harrier_revision < 2) { - /* XTAL64 was broken in harrier revision 1 */ - printk(KERN_INFO "time_init: Harrier revision %d, assuming " - "100 Mhz bus\n", harrier_revision); - tb_ticks_per_second = 100000000 / 4; - tb_ticks_per_jiffy = tb_ticks_per_second / HZ; - tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000); - return; - } - - /* - * The XTAL64 bit oscillates at the 1/64 the base baud clock - * Set count to XTAL64 cycles per second. Since we'll count - * half-cycles, we'll reach the count in half a second. - */ - count = PRPMC800_BASE_BAUD / 64; - - /* Find the first edge of the baud clock */ - old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK; - do { - current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK; - } while (old_state == current_state); - - old_state = current_state; - - /* Get the starting time base value */ - tbl_start = get_tbl(); - - /* - * Loop until we have found a number of edges (half-cycles) - * equal to the count (half a second) - */ - do { - do { - current_state = readb(HARRIER_UCTL_REG) & - HARRIER_XTAL64_MASK; - } while (old_state == current_state); - old_state = current_state; - } while (--count); - - /* Get the ending time base value */ - tbl_end = get_tbl(); - - /* We only counted for half a second, so double to get ticks/second */ - tb_ticks_per_second = (tbl_end - tbl_start) * 2; - tb_ticks_per_jiffy = tb_ticks_per_second / HZ; - tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000); -} - -static void prpmc800_restart(char *cmd) -{ - ulong temp; - - local_irq_disable(); - temp = in_be32((uint *) HARRIER_MISC_CSR_REG); - temp |= HARRIER_RSTOUT; - out_be32((uint *) HARRIER_MISC_CSR_REG, temp); - while (1) ; -} - -static void prpmc800_halt(void) -{ - local_irq_disable(); - while (1) ; -} - -static void prpmc800_power_off(void) -{ - prpmc800_halt(); -} - -static void __init prpmc800_init_IRQ(void) -{ - OpenPIC_InitSenses = prpmc800_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses); - - /* Setup external interrupt sources. */ - openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000); - /* Setup internal UART interrupt source. */ - openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200); - - /* Do the MPIC initialization based on the above settings. */ - openpic_init(0); - - /* enable functional exceptions for uarts and abort */ - out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1)); - out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1)); -} - -/* - * Set BAT 3 to map 0xf0000000 to end of physical memory space. - */ -static __inline__ void prpmc800_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf0001ffe); - mtspr(SPRN_DBAT1L, 0xf000002a); - mb(); -} - -/* - * We need to read the Harrier memory controller - * to properly determine this value - */ -static unsigned long __init prpmc800_find_end_of_memory(void) -{ - /* Read the memory size from the Harrier XCSR */ - return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE); -} - -static void __init prpmc800_map_io(void) -{ - io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO); - io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - prpmc800_set_bat(); - - isa_io_base = PRPMC800_ISA_IO_BASE; - isa_mem_base = PRPMC800_ISA_MEM_BASE; - pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET; - - ppc_md.setup_arch = prpmc800_setup_arch; - ppc_md.show_cpuinfo = prpmc800_show_cpuinfo; - ppc_md.init_IRQ = prpmc800_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - - ppc_md.find_end_of_memory = prpmc800_find_end_of_memory; - ppc_md.setup_io_mappings = prpmc800_map_io; - - ppc_md.restart = prpmc800_restart; - ppc_md.power_off = prpmc800_power_off; - ppc_md.halt = prpmc800_halt; - - /* PrPMC800 has no timekeeper part */ - ppc_md.time_init = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.calibrate_decr = prpmc800_calibrate_decr; -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#else /* !CONFIG_SERIAL_TEXT_DEBUG */ - ppc_md.progress = NULL; -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -} diff --git a/arch/ppc/platforms/prpmc800.h b/arch/ppc/platforms/prpmc800.h deleted file mode 100644 index 26f604e05cfa70320d87439e602d2bbe8853fdc3..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/prpmc800.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * arch/ppc/platforms/prpmc800.h - * - * Definitions for Motorola PrPMC800 board support - * - * Author: Dale Farnsworth - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - /* - * From Processor to PCI: - * PCI Mem Space: 0x80000000 - 0xa0000000 -> 0x80000000 - 0xa0000000 (512 MB) - * PCI I/O Space: 0xfe400000 - 0xfeef0000 -> 0x00000000 - 0x00b00000 (11 MB) - * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area - * - * From PCI to Processor: - * System Memory: 0x00000000 -> 0x00000000 - */ - -#ifndef __ASMPPC_PRPMC800_H -#define __ASMPPC_PRPMC800_H - -#define PRPMC800_PCI_CONFIG_ADDR 0xfe000cf8 -#define PRPMC800_PCI_CONFIG_DATA 0xfe000cfc - -#define PRPMC800_PROC_PCI_IO_START 0xfe400000U -#define PRPMC800_PROC_PCI_IO_END 0xfeefffffU -#define PRPMC800_PCI_IO_START 0x00000000U -#define PRPMC800_PCI_IO_END 0x00afffffU - -#define PRPMC800_PROC_PCI_MEM_START 0x80000000U -#define PRPMC800_PROC_PCI_MEM_END 0x9fffffffU -#define PRPMC800_PCI_MEM_START 0x80000000U -#define PRPMC800_PCI_MEM_END 0x9fffffffU - -#define PRPMC800_NM_PROC_PCI_MEM_START 0x40000000U -#define PRPMC800_NM_PROC_PCI_MEM_END 0xdfffffffU -#define PRPMC800_NM_PCI_MEM_START 0x40000000U -#define PRPMC800_NM_PCI_MEM_END 0xdfffffffU - -#define PRPMC800_PCI_DRAM_OFFSET 0x00000000U -#define PRPMC800_PCI_PHY_MEM_OFFSET 0x00000000U - -#define PRPMC800_ISA_IO_BASE PRPMC800_PROC_PCI_IO_START -#define PRPMC800_ISA_MEM_BASE 0x00000000U - -#define PRPMC800_HARRIER_XCSR_BASE HARRIER_DEFAULT_XCSR_BASE -#define PRPMC800_HARRIER_MPIC_BASE 0xff000000 - -#define PRPMC800_SERIAL_1 0xfeff00c0 - -#define PRPMC800_BASE_BAUD 1843200 - -/* - * interrupt vector number and priority for harrier internal interrupt - * sources - */ -#define PRPMC800_INT_IRQ 16 -#define PRPMC800_INT_PRI 15 - -/* UART Defines. */ -#define RS_TABLE_SIZE 4 - -/* Rate for the 1.8432 Mhz clock for the onboard serial chip */ -#define BASE_BAUD (PRPMC800_BASE_BAUD / 16) - -#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF - -/* UARTS are at IRQ 16 */ -#define STD_SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, PRPMC800_SERIAL_1, 16, STD_COM_FLAGS, /* ttyS0 */\ - iomem_base: (unsigned char *)PRPMC800_SERIAL_1, \ - iomem_reg_shift: 0, \ - io_type: SERIAL_IO_MEM }, - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DFNS - -#endif /* __ASMPPC_PRPMC800_H */ diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c deleted file mode 100644 index f1dee1e878096b2a80f80c36cfe64fcf91a0606b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/radstone_ppc7d.c +++ /dev/null @@ -1,1492 +0,0 @@ -/* - * Board setup routines for the Radstone PPC7D boards. - * - * Author: James Chapman - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by - Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* Radstone PPC7D boards are rugged VME boards with PPC 7447A CPUs, - * Discovery-II, dual gigabit ethernet, dual PMC, USB, keyboard/mouse, - * 4 serial ports, 2 high speed serial ports (MPSCs) and optional - * SCSI / VGA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include /* for linux/serial_core.h */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "radstone_ppc7d.h" - -#undef DEBUG - -#define PPC7D_RST_PIN 17 /* GPP17 */ - -extern u32 mv64360_irq_base; -extern spinlock_t rtc_lock; - -static struct mv64x60_handle bh; -static int ppc7d_has_alma; - -extern void gen550_progress(char *, unsigned short); -extern void gen550_init(int, struct uart_port *); - -/* FIXME - move to h file */ -extern int ds1337_do_command(int id, int cmd, void *arg); -#define DS1337_GET_DATE 0 -#define DS1337_SET_DATE 1 - -/* residual data */ -unsigned char __res[sizeof(bd_t)]; - -/***************************************************************************** - * Serial port code - *****************************************************************************/ - -#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG) -static void __init ppc7d_early_serial_map(void) -{ -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) - mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE); -#elif defined(CONFIG_SERIAL_8250) - struct uart_port serial_req; - - /* Setup serial port access */ - memset(&serial_req, 0, sizeof(serial_req)); - serial_req.uartclk = UART_CLK; - serial_req.irq = 4; - serial_req.flags = STD_COM_FLAGS; - serial_req.iotype = UPIO_MEM; - serial_req.membase = (u_char *) PPC7D_SERIAL_0; - - gen550_init(0, &serial_req); - if (early_serial_setup(&serial_req) != 0) - printk(KERN_ERR "Early serial init of port 0 failed\n"); - - /* Assume early_serial_setup() doesn't modify serial_req */ - serial_req.line = 1; - serial_req.irq = 3; - serial_req.membase = (u_char *) PPC7D_SERIAL_1; - - gen550_init(1, &serial_req); - if (early_serial_setup(&serial_req) != 0) - printk(KERN_ERR "Early serial init of port 1 failed\n"); -#else -#error CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG has no supported CONFIG_SERIAL_XXX -#endif -} -#endif /* CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG */ - -/***************************************************************************** - * Low-level board support code - *****************************************************************************/ - -static unsigned long __init ppc7d_find_end_of_memory(void) -{ - bd_t *bp = (bd_t *) __res; - - if (bp->bi_memsize) - return bp->bi_memsize; - - return (256 * 1024 * 1024); -} - -static void __init ppc7d_map_io(void) -{ - /* remove temporary mapping */ - mtspr(SPRN_DBAT3U, 0x00000000); - mtspr(SPRN_DBAT3L, 0x00000000); - - io_block_mapping(0xe8000000, 0xe8000000, 0x08000000, _PAGE_IO); - io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO); -} - -static void ppc7d_restart(char *cmd) -{ - u32 data; - - /* Disable GPP17 interrupt */ - data = mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - data &= ~(1 << PPC7D_RST_PIN); - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, data); - - /* Configure MPP17 as GPP */ - data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2); - data &= ~(0x0000000f << 4); - mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data); - - /* Enable pin GPP17 for output */ - data = mv64x60_read(&bh, MV64x60_GPP_IO_CNTL); - data |= (1 << PPC7D_RST_PIN); - mv64x60_write(&bh, MV64x60_GPP_IO_CNTL, data); - - /* Toggle GPP9 pin to reset the board */ - mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, 1 << PPC7D_RST_PIN); - mv64x60_write(&bh, MV64x60_GPP_VALUE_SET, 1 << PPC7D_RST_PIN); - - for (;;) ; /* Spin until reset happens */ - /* NOTREACHED */ -} - -static void ppc7d_power_off(void) -{ - u32 data; - - local_irq_disable(); - - /* Ensure that internal MV643XX watchdog is disabled. - * The Disco watchdog uses MPP17 on this hardware. - */ - data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2); - data &= ~(0x0000000f << 4); - mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data); - - data = mv64x60_read(&bh, MV64x60_WDT_WDC); - if (data & 0x80000000) { - mv64x60_write(&bh, MV64x60_WDT_WDC, 1 << 24); - mv64x60_write(&bh, MV64x60_WDT_WDC, 2 << 24); - } - - for (;;) ; /* No way to shut power off with software */ - /* NOTREACHED */ -} - -static void ppc7d_halt(void) -{ - ppc7d_power_off(); - /* NOTREACHED */ -} - -static unsigned long ppc7d_led_no_pulse; - -static int __init ppc7d_led_pulse_disable(char *str) -{ - ppc7d_led_no_pulse = 1; - return 1; -} - -/* This kernel option disables the heartbeat pulsing of a board LED */ -__setup("ledoff", ppc7d_led_pulse_disable); - -static void ppc7d_heartbeat(void) -{ - u32 data32; - u8 data8; - static int max706_wdog = 0; - - /* Unfortunately we can't access the LED control registers - * during early init because they're on the CPLD which is the - * other side of a PCI bridge which goes unreachable during - * PCI scan. So write the LEDs only if the MV64360 watchdog is - * enabled (i.e. userspace apps are running so kernel is up).. - */ - data32 = mv64x60_read(&bh, MV64x60_WDT_WDC); - if (data32 & 0x80000000) { - /* Enable MAX706 watchdog if not done already */ - if (!max706_wdog) { - outb(3, PPC7D_CPLD_RESET); - max706_wdog = 1; - } - - /* Hit the MAX706 watchdog */ - outb(0, PPC7D_CPLD_WATCHDOG_TRIG); - - /* Pulse LED DS219 if not disabled */ - if (!ppc7d_led_no_pulse) { - static int led_on = 0; - - data8 = inb(PPC7D_CPLD_LEDS); - if (led_on) - data8 &= ~PPC7D_CPLD_LEDS_DS219_MASK; - else - data8 |= PPC7D_CPLD_LEDS_DS219_MASK; - - outb(data8, PPC7D_CPLD_LEDS); - led_on = !led_on; - } - } - ppc_md.heartbeat_count = ppc_md.heartbeat_reset; -} - -static int ppc7d_show_cpuinfo(struct seq_file *m) -{ - u8 val; - u8 val1, val2; - static int flash_sizes[4] = { 64, 32, 0, 16 }; - static int flash_banks[4] = { 4, 3, 2, 1 }; - static int sdram_bank_sizes[4] = { 128, 256, 512, 1 }; - int sdram_num_banks = 2; - static char *pci_modes[] = { "PCI33", "PCI66", - "Unknown", "Unknown", - "PCIX33", "PCIX66", - "PCIX100", "PCIX133" - }; - - seq_printf(m, "vendor\t\t: Radstone Technology\n"); - seq_printf(m, "machine\t\t: PPC7D\n"); - - val = inb(PPC7D_CPLD_BOARD_REVISION); - val1 = (val & PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK) >> 5; - val2 = (val & PPC7D_CPLD_BOARD_REVISION_LETTER_MASK); - seq_printf(m, "revision\t: %hd%c%c\n", - val1, - (val2 <= 0x18) ? 'A' + val2 : 'Y', - (val2 > 0x18) ? 'A' + (val2 - 0x19) : ' '); - - val = inb(PPC7D_CPLD_MOTHERBOARD_TYPE); - val1 = val & PPC7D_CPLD_MB_TYPE_PLL_MASK; - val2 = val & (PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK | - PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK); - seq_printf(m, "bus speed\t: %dMHz\n", - (val1 == PPC7D_CPLD_MB_TYPE_PLL_133) ? 133 : - (val1 == PPC7D_CPLD_MB_TYPE_PLL_100) ? 100 : - (val1 == PPC7D_CPLD_MB_TYPE_PLL_64) ? 64 : 0); - - val = inb(PPC7D_CPLD_MEM_CONFIG); - if (val & PPC7D_CPLD_SDRAM_BANK_NUM_MASK) sdram_num_banks--; - - val = inb(PPC7D_CPLD_MEM_CONFIG_EXTEND); - val1 = (val & PPC7D_CPLD_SDRAM_BANK_SIZE_MASK) >> 6; - seq_printf(m, "SDRAM\t\t: %d banks of %d%c, total %d%c", - sdram_num_banks, - sdram_bank_sizes[val1], - (sdram_bank_sizes[val1] < 128) ? 'G' : 'M', - sdram_num_banks * sdram_bank_sizes[val1], - (sdram_bank_sizes[val1] < 128) ? 'G' : 'M'); - if (val2 & PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK) { - seq_printf(m, " [ECC %sabled]", - (val2 & PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK) ? "en" : - "dis"); - } - seq_printf(m, "\n"); - - val1 = (val & PPC7D_CPLD_FLASH_DEV_SIZE_MASK); - val2 = (val & PPC7D_CPLD_FLASH_BANK_NUM_MASK) >> 2; - seq_printf(m, "FLASH\t\t: %d banks of %dM, total %dM\n", - flash_banks[val2], flash_sizes[val1], - flash_banks[val2] * flash_sizes[val1]); - - val = inb(PPC7D_CPLD_FLASH_WRITE_CNTL); - val1 = inb(PPC7D_CPLD_SW_FLASH_WRITE_PROTECT); - seq_printf(m, " write links\t: %s%s%s%s\n", - (val & PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK) ? "WRITE " : "", - (val & PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK) ? "BOOT " : "", - (val & PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK) ? "USER " : "", - (val & (PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK | - PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK | - PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK)) == - 0 ? "NONE" : ""); - seq_printf(m, " write sector h/w enables: %s%s%s%s%s\n", - (val & PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK) ? "RECOVERY " : - "", - (val & PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK) ? "BOOT " : "", - (val & PPD7D_CPLD_FLASH_CNTL_USER_WR_MASK) ? "USER " : "", - (val1 & PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK) ? "NVRAM " : - "", - (((val & - (PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK | - PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK | - PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK)) == 0) - && ((val1 & PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK) == - 0)) ? "NONE" : ""); - val1 = - inb(PPC7D_CPLD_SW_FLASH_WRITE_PROTECT) & - (PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK | - PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK); - seq_printf(m, " software sector enables: %s%s%s\n", - (val1 & PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK) ? "SYSBOOT " - : "", - (val1 & PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK) ? "USER " : "", - (val1 == 0) ? "NONE " : ""); - - seq_printf(m, "Boot options\t: %s%s%s%s\n", - (val & PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK) ? - "ALTERNATE " : "", - (val & PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK) ? "VME " : - "", - (val & PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK) ? "RECOVERY " - : "", - ((val & - (PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK | - PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK | - PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK)) == - 0) ? "NONE" : ""); - - val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_1); - seq_printf(m, "Fitted modules\t: %s%s%s%s\n", - (val & PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK) ? "" : "PMC1 ", - (val & PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK) ? "" : "PMC2 ", - (val & PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK) ? "AFIX " : "", - ((val & (PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK | - PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK | - PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK)) == - (PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK | - PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK)) ? "NONE" : ""); - - if (val & PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK) { - static const char *ids[] = { - "unknown", - "1553 (Dual Channel)", - "1553 (Single Channel)", - "8-bit SCSI + VGA", - "16-bit SCSI + VGA", - "1553 (Single Channel with sideband)", - "1553 (Dual Channel with sideband)", - NULL - }; - u8 id = __raw_readb((void *)PPC7D_AFIX_REG_BASE + 0x03); - seq_printf(m, "AFIX module\t: 0x%hx [%s]\n", id, - id < 7 ? ids[id] : "unknown"); - } - - val = inb(PPC7D_CPLD_PCI_CONFIG); - val1 = (val & PPC7D_CPLD_PCI_CONFIG_PCI0_MASK) >> 4; - val2 = (val & PPC7D_CPLD_PCI_CONFIG_PCI1_MASK); - seq_printf(m, "PCI#0\t\t: %s\nPCI#1\t\t: %s\n", - pci_modes[val1], pci_modes[val2]); - - val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_2); - seq_printf(m, "PMC1\t\t: %s\nPMC2\t\t: %s\n", - (val & PPC7D_CPLD_EQPT_PRES_3_PMC1_V_MASK) ? "3.3v" : "5v", - (val & PPC7D_CPLD_EQPT_PRES_3_PMC2_V_MASK) ? "3.3v" : "5v"); - seq_printf(m, "PMC power source: %s\n", - (val & PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_MASK) ? "VME" : - "internal"); - - val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_4); - val2 = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_2); - seq_printf(m, "Fit options\t: %s%s%s%s%s%s%s\n", - (val & PPC7D_CPLD_EQPT_PRES_4_LPT_MASK) ? "LPT " : "", - (val & PPC7D_CPLD_EQPT_PRES_4_PS2_FITTED) ? "PS2 " : "", - (val & PPC7D_CPLD_EQPT_PRES_4_USB2_FITTED) ? "USB2 " : "", - (val2 & PPC7D_CPLD_EQPT_PRES_2_UNIVERSE_MASK) ? "VME " : "", - (val2 & PPC7D_CPLD_EQPT_PRES_2_COM36_MASK) ? "COM3-6 " : "", - (val2 & PPC7D_CPLD_EQPT_PRES_2_GIGE_MASK) ? "eth0 " : "", - (val2 & PPC7D_CPLD_EQPT_PRES_2_DUALGIGE_MASK) ? "eth1 " : - ""); - - val = inb(PPC7D_CPLD_ID_LINK); - val1 = val & (PPC7D_CPLD_ID_LINK_E6_MASK | - PPC7D_CPLD_ID_LINK_E7_MASK | - PPC7D_CPLD_ID_LINK_E12_MASK | - PPC7D_CPLD_ID_LINK_E13_MASK); - - val = inb(PPC7D_CPLD_FLASH_WRITE_CNTL) & - (PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK | - PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK | - PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK); - - seq_printf(m, "Board links present: %s%s%s%s%s%s%s%s\n", - (val1 & PPC7D_CPLD_ID_LINK_E6_MASK) ? "E6 " : "", - (val1 & PPC7D_CPLD_ID_LINK_E7_MASK) ? "E7 " : "", - (val & PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK) ? "E9 " : "", - (val & PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK) ? "E10 " : "", - (val & PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK) ? "E11 " : "", - (val1 & PPC7D_CPLD_ID_LINK_E12_MASK) ? "E12 " : "", - (val1 & PPC7D_CPLD_ID_LINK_E13_MASK) ? "E13 " : "", - ((val == 0) && (val1 == 0)) ? "NONE" : ""); - - val = inb(PPC7D_CPLD_WDOG_RESETSW_MASK); - seq_printf(m, "Front panel reset switch: %sabled\n", - (val & PPC7D_CPLD_WDOG_RESETSW_MASK) ? "dis" : "en"); - - return 0; -} - -static void __init ppc7d_calibrate_decr(void) -{ - ulong freq; - - freq = 100000000 / 4; - - pr_debug("time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq / 1000000, freq % 1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); -} - -/***************************************************************************** - * Interrupt stuff - *****************************************************************************/ - -static irqreturn_t ppc7d_i8259_intr(int irq, void *dev_id) -{ - u32 temp = mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE); - if (temp & (1 << 28)) { - i8259_irq(); - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, temp & (~(1 << 28))); - return IRQ_HANDLED; - } - - return IRQ_NONE; -} - -/* - * Each interrupt cause is assigned an IRQ number. - * Southbridge has 16*2 (two 8259's) interrupts. - * Discovery-II has 96 interrupts (cause-hi, cause-lo, gpp x 32). - * If multiple interrupts are pending, get_irq() returns the - * lowest pending irq number first. - * - * - * IRQ # Source Trig Active - * ============================================================= - * - * Southbridge - * ----------- - * IRQ # Source Trig - * ============================================================= - * 0 ISA High Resolution Counter Edge - * 1 Keyboard Edge - * 2 Cascade From (IRQ 8-15) Edge - * 3 Com 2 (Uart 2) Edge - * 4 Com 1 (Uart 1) Edge - * 5 PCI Int D/AFIX IRQZ ID4 (2,7) Level - * 6 GPIO Level - * 7 LPT Edge - * 8 RTC Alarm Edge - * 9 PCI Int A/PMC 2/AFIX IRQW ID1 (2,0) Level - * 10 PCI Int B/PMC 1/AFIX IRQX ID2 (2,1) Level - * 11 USB2 Level - * 12 Mouse Edge - * 13 Reserved internally by Ali M1535+ - * 14 PCI Int C/VME/AFIX IRQY ID3 (2,6) Level - * 15 COM 5/6 Level - * - * 16..112 Discovery-II... - * - * MPP28 Southbridge Edge High - * - * - * Interrupts are cascaded through to the Discovery-II. - * - * PCI --- - * \ - * CPLD --> ALI1535 -------> DISCOVERY-II - * INTF MPP28 - */ -static void __init ppc7d_init_irq(void) -{ - int irq; - - pr_debug("%s\n", __func__); - i8259_init(0, 0); - mv64360_init_irq(); - - /* IRQs 5,6,9,10,11,14,15 are level sensitive */ - irq_desc[5].status |= IRQ_LEVEL; - irq_desc[6].status |= IRQ_LEVEL; - irq_desc[9].status |= IRQ_LEVEL; - irq_desc[10].status |= IRQ_LEVEL; - irq_desc[11].status |= IRQ_LEVEL; - irq_desc[14].status |= IRQ_LEVEL; - irq_desc[15].status |= IRQ_LEVEL; - - /* GPP28 is edge triggered */ - irq_desc[mv64360_irq_base + MV64x60_IRQ_GPP28].status &= ~IRQ_LEVEL; -} - -static u32 ppc7d_irq_canonicalize(u32 irq) -{ - if ((irq >= 16) && (irq < (16 + 96))) - irq -= 16; - - return irq; -} - -static int ppc7d_get_irq(void) -{ - int irq; - - irq = mv64360_get_irq(); - if (irq == (mv64360_irq_base + MV64x60_IRQ_GPP28)) - irq = i8259_irq(); - return irq; -} - -/* - * 9 PCI Int A/PMC 2/AFIX IRQW ID1 (2,0) Level - * 10 PCI Int B/PMC 1/AFIX IRQX ID2 (2,1) Level - * 14 PCI Int C/VME/AFIX IRQY ID3 (2,6) Level - * 5 PCI Int D/AFIX IRQZ ID4 (2,7) Level - */ -static int __init ppc7d_map_irq(struct pci_dev *dev, unsigned char idsel, - unsigned char pin) -{ - static const char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {10, 14, 5, 9}, /* IDSEL 10 - PMC2 / AFIX IRQW */ - {9, 10, 14, 5}, /* IDSEL 11 - PMC1 / AFIX IRQX */ - {5, 9, 10, 14}, /* IDSEL 12 - AFIX IRQY */ - {14, 5, 9, 10}, /* IDSEL 13 - AFIX IRQZ */ - }; - const long min_idsel = 10, max_idsel = 14, irqs_per_slot = 4; - - pr_debug("%s: %04x/%04x/%x: idsel=%hx pin=%hu\n", __func__, - dev->vendor, dev->device, PCI_FUNC(dev->devfn), idsel, pin); - - return PCI_IRQ_TABLE_LOOKUP; -} - -void __init ppc7d_intr_setup(void) -{ - u32 data; - - /* - * Define GPP 28 interrupt polarity as active high - * input signal and level triggered - */ - data = mv64x60_read(&bh, MV64x60_GPP_LEVEL_CNTL); - data &= ~(1 << 28); - mv64x60_write(&bh, MV64x60_GPP_LEVEL_CNTL, data); - data = mv64x60_read(&bh, MV64x60_GPP_IO_CNTL); - data &= ~(1 << 28); - mv64x60_write(&bh, MV64x60_GPP_IO_CNTL, data); - - /* Config GPP intr ctlr to respond to level trigger */ - data = mv64x60_read(&bh, MV64x60_COMM_ARBITER_CNTL); - data |= (1 << 10); - mv64x60_write(&bh, MV64x60_COMM_ARBITER_CNTL, data); - - /* XXXX Erranum FEr PCI-#8 */ - data = mv64x60_read(&bh, MV64x60_PCI0_CMD); - data &= ~((1 << 5) | (1 << 9)); - mv64x60_write(&bh, MV64x60_PCI0_CMD, data); - data = mv64x60_read(&bh, MV64x60_PCI1_CMD); - data &= ~((1 << 5) | (1 << 9)); - mv64x60_write(&bh, MV64x60_PCI1_CMD, data); - - /* - * Dismiss and then enable interrupt on GPP interrupt cause - * for CPU #0 - */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~(1 << 28)); - data = mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - data |= (1 << 28); - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, data); - - /* - * Dismiss and then enable interrupt on CPU #0 high cause reg - * BIT27 summarizes GPP interrupts 23-31 - */ - mv64x60_write(&bh, MV64360_IC_MAIN_CAUSE_HI, ~(1 << 27)); - data = mv64x60_read(&bh, MV64360_IC_CPU0_INTR_MASK_HI); - data |= (1 << 27); - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI, data); -} - -/***************************************************************************** - * Platform device data fixup routines. - *****************************************************************************/ - -#if defined(CONFIG_SERIAL_MPSC) -static void __init ppc7d_fixup_mpsc_pdata(struct platform_device *pdev) -{ - struct mpsc_pdata *pdata; - - pdata = (struct mpsc_pdata *)pdev->dev.platform_data; - - pdata->max_idle = 40; - pdata->default_baud = PPC7D_DEFAULT_BAUD; - pdata->brg_clk_src = PPC7D_MPSC_CLK_SRC; - pdata->brg_clk_freq = PPC7D_MPSC_CLK_FREQ; - - return; -} -#endif - -#if defined(CONFIG_MV643XX_ETH) -static void __init ppc7d_fixup_eth_pdata(struct platform_device *pdev) -{ - struct mv643xx_eth_platform_data *eth_pd; - static u16 phy_addr[] = { - PPC7D_ETH0_PHY_ADDR, - PPC7D_ETH1_PHY_ADDR, - PPC7D_ETH2_PHY_ADDR, - }; - int i; - - eth_pd = pdev->dev.platform_data; - eth_pd->force_phy_addr = 1; - eth_pd->phy_addr = phy_addr[pdev->id]; - eth_pd->tx_queue_size = PPC7D_ETH_TX_QUEUE_SIZE; - eth_pd->rx_queue_size = PPC7D_ETH_RX_QUEUE_SIZE; - - /* Adjust IRQ by mv64360_irq_base */ - for (i = 0; i < pdev->num_resources; i++) { - struct resource *r = &pdev->resource[i]; - - if (r->flags & IORESOURCE_IRQ) { - r->start += mv64360_irq_base; - r->end += mv64360_irq_base; - pr_debug("%s, uses IRQ %d\n", pdev->name, - (int)r->start); - } - } - -} -#endif - -#if defined(CONFIG_I2C_MV64XXX) -static void __init -ppc7d_fixup_i2c_pdata(struct platform_device *pdev) -{ - struct mv64xxx_i2c_pdata *pdata; - int i; - - pdata = pdev->dev.platform_data; - if (pdata == NULL) { - pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); - if (pdata == NULL) - return; - - pdev->dev.platform_data = pdata; - } - - /* divisors M=8, N=3 for 100kHz I2C from 133MHz system clock */ - pdata->freq_m = 8; - pdata->freq_n = 3; - pdata->timeout = 500; - pdata->retries = 3; - - /* Adjust IRQ by mv64360_irq_base */ - for (i = 0; i < pdev->num_resources; i++) { - struct resource *r = &pdev->resource[i]; - - if (r->flags & IORESOURCE_IRQ) { - r->start += mv64360_irq_base; - r->end += mv64360_irq_base; - pr_debug("%s, uses IRQ %d\n", pdev->name, (int) r->start); - } - } -} -#endif - -static int ppc7d_platform_notify(struct device *dev) -{ - static struct { - char *bus_id; - void ((*rtn) (struct platform_device * pdev)); - } dev_map[] = { -#if defined(CONFIG_SERIAL_MPSC) - { MPSC_CTLR_NAME ".0", ppc7d_fixup_mpsc_pdata }, - { MPSC_CTLR_NAME ".1", ppc7d_fixup_mpsc_pdata }, -#endif -#if defined(CONFIG_MV643XX_ETH) - { MV643XX_ETH_NAME ".0", ppc7d_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".1", ppc7d_fixup_eth_pdata }, - { MV643XX_ETH_NAME ".2", ppc7d_fixup_eth_pdata }, -#endif -#if defined(CONFIG_I2C_MV64XXX) - { MV64XXX_I2C_CTLR_NAME ".0", ppc7d_fixup_i2c_pdata }, -#endif - }; - struct platform_device *pdev; - int i; - - if (dev && dev->bus_id) - for (i = 0; i < ARRAY_SIZE(dev_map); i++) - if (!strncmp(dev->bus_id, dev_map[i].bus_id, - BUS_ID_SIZE)) { - - pdev = container_of(dev, - struct platform_device, - dev); - dev_map[i].rtn(pdev); - } - - return 0; -} - -/***************************************************************************** - * PCI device fixups. - * These aren't really fixups per se. They are used to init devices as they - * are found during PCI scan. - * - * The PPC7D has an HB8 PCI-X bridge which must be set up during a PCI - * scan in order to find other devices on its secondary side. - *****************************************************************************/ - -static void __init ppc7d_fixup_hb8(struct pci_dev *dev) -{ - u16 val16; - - if (dev->bus->number == 0) { - pr_debug("PCI: HB8 init\n"); - - pci_write_config_byte(dev, 0x1c, - ((PPC7D_PCI0_IO_START_PCI_ADDR & 0xf000) - >> 8) | 0x01); - pci_write_config_byte(dev, 0x1d, - (((PPC7D_PCI0_IO_START_PCI_ADDR + - PPC7D_PCI0_IO_SIZE - - 1) & 0xf000) >> 8) | 0x01); - pci_write_config_word(dev, 0x30, - PPC7D_PCI0_IO_START_PCI_ADDR >> 16); - pci_write_config_word(dev, 0x32, - ((PPC7D_PCI0_IO_START_PCI_ADDR + - PPC7D_PCI0_IO_SIZE - - 1) >> 16) & 0xffff); - - pci_write_config_word(dev, 0x20, - PPC7D_PCI0_MEM0_START_PCI_LO_ADDR >> 16); - pci_write_config_word(dev, 0x22, - ((PPC7D_PCI0_MEM0_START_PCI_LO_ADDR + - PPC7D_PCI0_MEM0_SIZE - - 1) >> 16) & 0xffff); - pci_write_config_word(dev, 0x24, 0); - pci_write_config_word(dev, 0x26, 0); - pci_write_config_dword(dev, 0x28, 0); - pci_write_config_dword(dev, 0x2c, 0); - - pci_read_config_word(dev, 0x3e, &val16); - val16 |= ((1 << 5) | (1 << 1)); /* signal master aborts and - * SERR to primary - */ - val16 &= ~(1 << 2); /* ISA disable, so all ISA - * ports forwarded to secondary - */ - pci_write_config_word(dev, 0x3e, val16); - } -} - -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0028, ppc7d_fixup_hb8); - -/* This should perhaps be a separate driver as we're actually initializing - * the chip for this board here. It's hardly a fixup... - */ -static void __init ppc7d_fixup_ali1535(struct pci_dev *dev) -{ - pr_debug("PCI: ALI1535 init\n"); - - if (dev->bus->number == 1) { - /* Configure the ISA Port Settings */ - pci_write_config_byte(dev, 0x43, 0x00); - - /* Disable PCI Interrupt polling mode */ - pci_write_config_byte(dev, 0x45, 0x00); - - /* Multifunction pin select INTFJ -> INTF */ - pci_write_config_byte(dev, 0x78, 0x00); - - /* Set PCI INT -> IRQ Routing control in for external - * pins south bridge. - */ - pci_write_config_byte(dev, 0x48, 0x31); /* [7-4] INT B -> IRQ10 - * [3-0] INT A -> IRQ9 - */ - pci_write_config_byte(dev, 0x49, 0x5D); /* [7-4] INT D -> IRQ5 - * [3-0] INT C -> IRQ14 - */ - - /* PPC7D setup */ - /* NEC USB device on IRQ 11 (INTE) - INTF disabled */ - pci_write_config_byte(dev, 0x4A, 0x09); - - /* GPIO on IRQ 6 */ - pci_write_config_byte(dev, 0x76, 0x07); - - /* SIRQ I (COMS 5/6) use IRQ line 15. - * Positive (not subtractive) address decode. - */ - pci_write_config_byte(dev, 0x44, 0x0f); - - /* SIRQ II disabled */ - pci_write_config_byte(dev, 0x75, 0x0); - - /* On board USB and RTC disabled */ - pci_write_config_word(dev, 0x52, (1 << 14)); - pci_write_config_byte(dev, 0x74, 0x00); - - /* On board IDE disabled */ - pci_write_config_byte(dev, 0x58, 0x00); - - /* Decode 32-bit addresses */ - pci_write_config_byte(dev, 0x5b, 0); - - /* Disable docking IO */ - pci_write_config_word(dev, 0x5c, 0x0000); - - /* Disable modem, enable sound */ - pci_write_config_byte(dev, 0x77, (1 << 6)); - - /* Disable hot-docking mode */ - pci_write_config_byte(dev, 0x7d, 0x00); - } -} - -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1533, ppc7d_fixup_ali1535); - -static int ppc7d_pci_exclude_device(u8 bus, u8 devfn) -{ - /* Early versions of this board were fitted with IBM ALMA - * PCI-VME bridge chips. The PCI config space of these devices - * was not set up correctly and causes PCI scan problems. - */ - if ((bus == 1) && (PCI_SLOT(devfn) == 4) && ppc7d_has_alma) - return PCIBIOS_DEVICE_NOT_FOUND; - - return mv64x60_pci_exclude_device(bus, devfn); -} - -/* This hook is called when each PCI bus is probed. - */ -static void ppc7d_pci_fixup_bus(struct pci_bus *bus) -{ - pr_debug("PCI BUS %hu: %lx/%lx %lx/%lx %lx/%lx %lx/%lx\n", - bus->number, - bus->resource[0] ? bus->resource[0]->start : 0, - bus->resource[0] ? bus->resource[0]->end : 0, - bus->resource[1] ? bus->resource[1]->start : 0, - bus->resource[1] ? bus->resource[1]->end : 0, - bus->resource[2] ? bus->resource[2]->start : 0, - bus->resource[2] ? bus->resource[2]->end : 0, - bus->resource[3] ? bus->resource[3]->start : 0, - bus->resource[3] ? bus->resource[3]->end : 0); - - if ((bus->number == 1) && (bus->resource[2] != NULL)) { - /* Hide PCI window 2 of Bus 1 which is used only to - * map legacy ISA memory space. - */ - bus->resource[2]->start = 0; - bus->resource[2]->end = 0; - bus->resource[2]->flags = 0; - } -} - -/***************************************************************************** - * Board device setup code - *****************************************************************************/ - -void __init ppc7d_setup_peripherals(void) -{ - u32 val32; - - /* Set up windows for boot CS */ - mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, - PPC7D_BOOT_WINDOW_BASE, PPC7D_BOOT_WINDOW_SIZE, - 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN); - - /* Boot firmware configures the following DevCS addresses. - * DevCS0 - board control/status - * DevCS1 - test registers - * DevCS2 - AFIX port/address registers (for identifying) - * DevCS3 - FLASH - * - * We don't use DevCS0, DevCS1. - */ - val32 = mv64x60_read(&bh, MV64360_CPU_BAR_ENABLE); - val32 |= ((1 << 4) | (1 << 5)); - mv64x60_write(&bh, MV64360_CPU_BAR_ENABLE, val32); - mv64x60_write(&bh, MV64x60_CPU2DEV_0_BASE, 0); - mv64x60_write(&bh, MV64x60_CPU2DEV_0_SIZE, 0); - mv64x60_write(&bh, MV64x60_CPU2DEV_1_BASE, 0); - mv64x60_write(&bh, MV64x60_CPU2DEV_1_SIZE, 0); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, - PPC7D_AFIX_REG_BASE, PPC7D_AFIX_REG_SIZE, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, - PPC7D_FLASH_BASE, PPC7D_FLASH_SIZE_ACTUAL, 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN); - - mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, - PPC7D_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, - 0); - bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); - - /* Set up Enet->SRAM window */ - mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, - PPC7D_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, - 0x2); - bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN); - - /* Give enet r/w access to memory region */ - val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_0); - val32 |= (0x3 << (4 << 1)); - mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_0, val32); - val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_1); - val32 |= (0x3 << (4 << 1)); - mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_1, val32); - val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_2); - val32 |= (0x3 << (4 << 1)); - mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_2, val32); - - val32 = mv64x60_read(&bh, MV64x60_TIMR_CNTR_0_3_CNTL); - val32 &= ~((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)); - mv64x60_write(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, val32); - - /* Enumerate pci bus. - * - * We scan PCI#0 first (the bus with the HB8 and other - * on-board peripherals). We must configure the 64360 before - * each scan, according to the bus number assignments. Busses - * are assigned incrementally, starting at 0. PCI#0 is - * usually assigned bus#0, the secondary side of the HB8 gets - * bus#1 and PCI#1 (second PMC site) gets bus#2. However, if - * any PMC card has a PCI bridge, these bus assignments will - * change. - */ - - /* Turn off PCI retries */ - val32 = mv64x60_read(&bh, MV64x60_CPU_CONFIG); - val32 |= (1 << 17); - mv64x60_write(&bh, MV64x60_CPU_CONFIG, val32); - - /* Scan PCI#0 */ - mv64x60_set_bus(&bh, 0, 0); - bh.hose_a->first_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0); - printk(KERN_INFO "PCI#0: first=%d last=%d\n", - bh.hose_a->first_busno, bh.hose_a->last_busno); - - /* Scan PCI#1 */ - bh.hose_b->first_busno = bh.hose_a->last_busno + 1; - mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno); - bh.hose_b->last_busno = 0xff; - bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, - bh.hose_b->first_busno); - printk(KERN_INFO "PCI#1: first=%d last=%d\n", - bh.hose_b->first_busno, bh.hose_b->last_busno); - - /* Turn on PCI retries */ - val32 = mv64x60_read(&bh, MV64x60_CPU_CONFIG); - val32 &= ~(1 << 17); - mv64x60_write(&bh, MV64x60_CPU_CONFIG, val32); - - /* Setup interrupts */ - ppc7d_intr_setup(); -} - -static void __init ppc7d_setup_bridge(void) -{ - struct mv64x60_setup_info si; - int i; - u32 temp; - - mv64360_irq_base = 16; /* first 16 intrs are 2 x 8259's */ - - memset(&si, 0, sizeof(si)); - - si.phys_reg_base = CONFIG_MV64X60_NEW_BASE; - - si.pci_0.enable_bus = 1; - si.pci_0.pci_io.cpu_base = PPC7D_PCI0_IO_START_PROC_ADDR; - si.pci_0.pci_io.pci_base_hi = 0; - si.pci_0.pci_io.pci_base_lo = PPC7D_PCI0_IO_START_PCI_ADDR; - si.pci_0.pci_io.size = PPC7D_PCI0_IO_SIZE; - si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_mem[0].cpu_base = PPC7D_PCI0_MEM0_START_PROC_ADDR; - si.pci_0.pci_mem[0].pci_base_hi = PPC7D_PCI0_MEM0_START_PCI_HI_ADDR; - si.pci_0.pci_mem[0].pci_base_lo = PPC7D_PCI0_MEM0_START_PCI_LO_ADDR; - si.pci_0.pci_mem[0].size = PPC7D_PCI0_MEM0_SIZE; - si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_mem[1].cpu_base = PPC7D_PCI0_MEM1_START_PROC_ADDR; - si.pci_0.pci_mem[1].pci_base_hi = PPC7D_PCI0_MEM1_START_PCI_HI_ADDR; - si.pci_0.pci_mem[1].pci_base_lo = PPC7D_PCI0_MEM1_START_PCI_LO_ADDR; - si.pci_0.pci_mem[1].size = PPC7D_PCI0_MEM1_SIZE; - si.pci_0.pci_mem[1].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_0.pci_cmd_bits = 0; - si.pci_0.latency_timer = 0x80; - - si.pci_1.enable_bus = 1; - si.pci_1.pci_io.cpu_base = PPC7D_PCI1_IO_START_PROC_ADDR; - si.pci_1.pci_io.pci_base_hi = 0; - si.pci_1.pci_io.pci_base_lo = PPC7D_PCI1_IO_START_PCI_ADDR; - si.pci_1.pci_io.size = PPC7D_PCI1_IO_SIZE; - si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[0].cpu_base = PPC7D_PCI1_MEM0_START_PROC_ADDR; - si.pci_1.pci_mem[0].pci_base_hi = PPC7D_PCI1_MEM0_START_PCI_HI_ADDR; - si.pci_1.pci_mem[0].pci_base_lo = PPC7D_PCI1_MEM0_START_PCI_LO_ADDR; - si.pci_1.pci_mem[0].size = PPC7D_PCI1_MEM0_SIZE; - si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_mem[1].cpu_base = PPC7D_PCI1_MEM1_START_PROC_ADDR; - si.pci_1.pci_mem[1].pci_base_hi = PPC7D_PCI1_MEM1_START_PCI_HI_ADDR; - si.pci_1.pci_mem[1].pci_base_lo = PPC7D_PCI1_MEM1_START_PCI_LO_ADDR; - si.pci_1.pci_mem[1].size = PPC7D_PCI1_MEM1_SIZE; - si.pci_1.pci_mem[1].swap = MV64x60_CPU2PCI_SWAP_NONE; - si.pci_1.pci_cmd_bits = 0; - si.pci_1.latency_timer = 0x80; - - /* Don't clear the SRAM window since we use it for debug */ - si.window_preserve_mask_32_lo = (1 << MV64x60_CPU2SRAM_WIN); - - printk(KERN_INFO "PCI: MV64360 PCI#0 IO at %x, size %x\n", - si.pci_0.pci_io.cpu_base, si.pci_0.pci_io.size); - printk(KERN_INFO "PCI: MV64360 PCI#1 IO at %x, size %x\n", - si.pci_1.pci_io.cpu_base, si.pci_1.pci_io.size); - - for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) { -#if defined(CONFIG_NOT_COHERENT_CACHE) - si.cpu_prot_options[i] = 0; - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; - - si.pci_0.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_NONE | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_128_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES; -#else - si.cpu_prot_options[i] = 0; - /* All PPC7D hardware uses B0 or newer MV64360 silicon which - * does not have snoop bugs. - */ - si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; - si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; - si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; - - si.pci_0.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES; - - si.pci_1.acc_cntl_options[i] = - MV64360_PCI_ACC_CNTL_SNOOP_WB | - MV64360_PCI_ACC_CNTL_SWAP_NONE | - MV64360_PCI_ACC_CNTL_MBURST_32_BYTES | - MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES; -#endif - } - - /* Lookup PCI host bridges */ - if (mv64x60_init(&bh, &si)) - printk(KERN_ERR "MV64360 initialization failed.\n"); - - pr_debug("MV64360 regs @ %lx/%p\n", bh.p_base, bh.v_base); - - /* Enable WB Cache coherency on SRAM */ - temp = mv64x60_read(&bh, MV64360_SRAM_CONFIG); - pr_debug("SRAM_CONFIG: %x\n", temp); -#if defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_write(&bh, MV64360_SRAM_CONFIG, temp & ~0x2); -#else - mv64x60_write(&bh, MV64360_SRAM_CONFIG, temp | 0x2); -#endif - /* If system operates with internal bus arbiter (CPU master - * control bit8) clear AACK Delay bit [25] in CPU - * configuration register. - */ - temp = mv64x60_read(&bh, MV64x60_CPU_MASTER_CNTL); - if (temp & (1 << 8)) { - temp = mv64x60_read(&bh, MV64x60_CPU_CONFIG); - mv64x60_write(&bh, MV64x60_CPU_CONFIG, (temp & ~(1 << 25))); - } - - /* Data and address parity is enabled */ - temp = mv64x60_read(&bh, MV64x60_CPU_CONFIG); - mv64x60_write(&bh, MV64x60_CPU_CONFIG, - (temp | (1 << 26) | (1 << 19))); - - pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */ - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = ppc7d_map_irq; - ppc_md.pci_exclude_device = ppc7d_pci_exclude_device; - - mv64x60_set_bus(&bh, 0, 0); - bh.hose_a->first_busno = 0; - bh.hose_a->last_busno = 0xff; - bh.hose_a->mem_space.start = PPC7D_PCI0_MEM0_START_PCI_LO_ADDR; - bh.hose_a->mem_space.end = - PPC7D_PCI0_MEM0_START_PCI_LO_ADDR + PPC7D_PCI0_MEM0_SIZE; - - /* These will be set later, as a result of PCI0 scan */ - bh.hose_b->first_busno = 0; - bh.hose_b->last_busno = 0xff; - bh.hose_b->mem_space.start = PPC7D_PCI1_MEM0_START_PCI_LO_ADDR; - bh.hose_b->mem_space.end = - PPC7D_PCI1_MEM0_START_PCI_LO_ADDR + PPC7D_PCI1_MEM0_SIZE; - - pr_debug("MV64360: PCI#0 IO decode %08x/%08x IO remap %08x\n", - mv64x60_read(&bh, 0x48), mv64x60_read(&bh, 0x50), - mv64x60_read(&bh, 0xf0)); -} - -static void __init ppc7d_setup_arch(void) -{ - int port; - - loops_per_jiffy = 100000000 / HZ; - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) || - (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)) - /* 745x is different. We only want to pass along enable. */ - _set_L2CR(L2CR_L2E); - else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR) - /* All modules have 1MB of L2. We also assume that an - * L2 divisor of 3 will work. - */ - _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3 - | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF); - - if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR) - /* No L3 cache */ - _set_L3CR(0); - -#ifdef CONFIG_DUMMY_CONSOLE - conswitchp = &dummy_con; -#endif - - /* Lookup PCI host bridges */ - if (ppc_md.progress) - ppc_md.progress("ppc7d_setup_arch: calling setup_bridge", 0); - - ppc7d_setup_bridge(); - ppc7d_setup_peripherals(); - - /* Disable ethernet. It might have been setup by the bootrom */ - for (port = 0; port < 3; port++) - mv64x60_write(&bh, MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port), - 0x0000ff00); - - /* Clear queue pointers to ensure they are all initialized, - * otherwise since queues 1-7 are unused, they have random - * pointers which look strange in register dumps. Don't bother - * with queue 0 since it will be initialized later. - */ - for (port = 0; port < 3; port++) { - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port), - 0x00000000); - mv64x60_write(&bh, - MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port), - 0x00000000); - } - - printk(KERN_INFO "Radstone Technology PPC7D\n"); - if (ppc_md.progress) - ppc_md.progress("ppc7d_setup_arch: exit", 0); - -} - -/* Real Time Clock support. - * PPC7D has a DS1337 accessed by I2C. - */ -static ulong ppc7d_get_rtc_time(void) -{ - struct rtc_time tm; - int result; - - spin_lock(&rtc_lock); - result = ds1337_do_command(0, DS1337_GET_DATE, &tm); - spin_unlock(&rtc_lock); - - if (result == 0) - result = mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec); - - return result; -} - -static int ppc7d_set_rtc_time(unsigned long nowtime) -{ - struct rtc_time tm; - int result; - - spin_lock(&rtc_lock); - to_tm(nowtime, &tm); - result = ds1337_do_command(0, DS1337_SET_DATE, &tm); - spin_unlock(&rtc_lock); - - return result; -} - -/* This kernel command line parameter can be used to have the target - * wait for a JTAG debugger to attach. Of course, a JTAG debugger - * with hardware breakpoint support can have the target stop at any - * location during init, but this is a convenience feature that makes - * it easier in the common case of loading the code using the ppcboot - * bootloader.. - */ -static unsigned long ppc7d_wait_debugger; - -static int __init ppc7d_waitdbg(char *str) -{ - ppc7d_wait_debugger = 1; - return 1; -} - -__setup("waitdbg", ppc7d_waitdbg); - -/* Second phase board init, called after other (architecture common) - * low-level services have been initialized. - */ -static void ppc7d_init2(void) -{ - unsigned long flags; - u32 data; - u8 data8; - - pr_debug("%s: enter\n", __func__); - - /* Wait for debugger? */ - if (ppc7d_wait_debugger) { - printk("Waiting for debugger...\n"); - - while (readl(&ppc7d_wait_debugger)) ; - } - - /* Hook up i8259 interrupt which is connected to GPP28 */ - request_irq(mv64360_irq_base + MV64x60_IRQ_GPP28, ppc7d_i8259_intr, - IRQF_DISABLED, "I8259 (GPP28) interrupt", (void *)0); - - /* Configure MPP16 as watchdog NMI, MPP17 as watchdog WDE */ - spin_lock_irqsave(&mv64x60_lock, flags); - data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2); - data &= ~(0x0000000f << 0); - data |= (0x00000004 << 0); - data &= ~(0x0000000f << 4); - data |= (0x00000004 << 4); - mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data); - spin_unlock_irqrestore(&mv64x60_lock, flags); - - /* All LEDs off */ - data8 = inb(PPC7D_CPLD_LEDS); - data8 &= ~0x08; - data8 |= 0x07; - outb(data8, PPC7D_CPLD_LEDS); - - /* Hook up RTC. We couldn't do this earlier because we need the I2C subsystem */ - ppc_md.set_rtc_time = ppc7d_set_rtc_time; - ppc_md.get_rtc_time = ppc7d_get_rtc_time; - - pr_debug("%s: exit\n", __func__); -} - -/* Called from machine_init(), early, before any of the __init functions - * have run. We must init software-configurable pins before other functions - * such as interrupt controllers are initialised. - */ -void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - u8 val8; - u8 rev_num; - - /* Map 0xe0000000-0xffffffff early because we need access to SRAM - * and the ISA memory space (for serial port) here. This mapping - * is redone properly in ppc7d_map_io() later. - */ - mtspr(SPRN_DBAT3U, 0xe0003fff); - mtspr(SPRN_DBAT3L, 0xe000002a); - - /* - * Zero SRAM. Note that this generates parity errors on - * internal data path in SRAM if it's first time accessing it - * after reset. - * - * We do this ASAP to avoid parity errors when reading - * uninitialized SRAM. - */ - memset((void *)PPC7D_INTERNAL_SRAM_BASE, 0, MV64360_SRAM_SIZE); - - pr_debug("platform_init: r3-r7: %lx %lx %lx %lx %lx\n", - r3, r4, r5, r6, r7); - - parse_bootinfo(find_bootinfo()); - - /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer) - * are non-zero, then we should use the board info from the bd_t - * structure and the cmdline pointed to by r6 instead of the - * information from birecs, if any. Otherwise, use the information - * from birecs as discovered by the preceding call to - * parse_bootinfo(). This rule should work with both PPCBoot, which - * uses a bd_t board info structure, and the kernel boot wrapper, - * which uses birecs. - */ - if (r3 && r6) { - bd_t *bp = (bd_t *) __res; - - /* copy board info structure */ - memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t)); - /* copy command line */ - *(char *)(r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6 + KERNELBASE)); - - printk(KERN_INFO "Board info data:-\n"); - printk(KERN_INFO " Internal freq: %lu MHz, bus freq: %lu MHz\n", - bp->bi_intfreq, bp->bi_busfreq); - printk(KERN_INFO " Memory: %lx, size %lx\n", bp->bi_memstart, - bp->bi_memsize); - printk(KERN_INFO " Console baudrate: %lu\n", bp->bi_baudrate); - printk(KERN_INFO " Ethernet address: " - "%02x:%02x:%02x:%02x:%02x:%02x\n", - bp->bi_enetaddr[0], bp->bi_enetaddr[1], - bp->bi_enetaddr[2], bp->bi_enetaddr[3], - bp->bi_enetaddr[4], bp->bi_enetaddr[5]); - } -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - printk(KERN_INFO "INITRD @ %lx/%lx\n", initrd_start, initrd_end); - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - /* Map in board regs, etc. */ - isa_io_base = 0xe8000000; - isa_mem_base = 0xe8000000; - pci_dram_offset = 0x00000000; - ISA_DMA_THRESHOLD = 0x00ffffff; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - - ppc_md.setup_arch = ppc7d_setup_arch; - ppc_md.init = ppc7d_init2; - ppc_md.show_cpuinfo = ppc7d_show_cpuinfo; - /* XXX this is broken... */ - ppc_md.irq_canonicalize = ppc7d_irq_canonicalize; - ppc_md.init_IRQ = ppc7d_init_irq; - ppc_md.get_irq = ppc7d_get_irq; - - ppc_md.restart = ppc7d_restart; - ppc_md.power_off = ppc7d_power_off; - ppc_md.halt = ppc7d_halt; - - ppc_md.find_end_of_memory = ppc7d_find_end_of_memory; - ppc_md.setup_io_mappings = ppc7d_map_io; - - ppc_md.time_init = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.calibrate_decr = ppc7d_calibrate_decr; - ppc_md.nvram_read_val = NULL; - ppc_md.nvram_write_val = NULL; - - ppc_md.heartbeat = ppc7d_heartbeat; - ppc_md.heartbeat_reset = HZ; - ppc_md.heartbeat_count = ppc_md.heartbeat_reset; - - ppc_md.pcibios_fixup_bus = ppc7d_pci_fixup_bus; - -#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) || \ - defined(CONFIG_I2C_MV64XXX) - platform_notify = ppc7d_platform_notify; -#endif - -#ifdef CONFIG_SERIAL_MPSC - /* On PPC7D, we must configure MPSC support via CPLD control - * registers. - */ - outb(PPC7D_CPLD_RTS_COM4_SCLK | - PPC7D_CPLD_RTS_COM56_ENABLED, PPC7D_CPLD_RTS); - outb(PPC7D_CPLD_COMS_COM3_TCLKEN | - PPC7D_CPLD_COMS_COM3_TXEN | - PPC7D_CPLD_COMS_COM4_TCLKEN | - PPC7D_CPLD_COMS_COM4_TXEN, PPC7D_CPLD_COMS); -#endif /* CONFIG_SERIAL_MPSC */ - -#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG) - ppc7d_early_serial_map(); -#ifdef CONFIG_SERIAL_TEXT_DEBUG -#if defined(CONFIG_SERIAL_MPSC_CONSOLE) - ppc_md.progress = mv64x60_mpsc_progress; -#elif defined(CONFIG_SERIAL_8250) - ppc_md.progress = gen550_progress; -#else -#error CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG has no supported CONFIG_SERIAL_XXX -#endif /* CONFIG_SERIAL_8250 */ -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#endif /* CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG */ - - /* Enable write access to user flash. This is necessary for - * flash probe. - */ - val8 = readb((void *)isa_io_base + PPC7D_CPLD_SW_FLASH_WRITE_PROTECT); - writeb(val8 | (PPC7D_CPLD_SW_FLASH_WRPROT_ENABLED & - PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK), - (void *)isa_io_base + PPC7D_CPLD_SW_FLASH_WRITE_PROTECT); - - /* Determine if this board has IBM ALMA VME devices */ - val8 = readb((void *)isa_io_base + PPC7D_CPLD_BOARD_REVISION); - rev_num = (val8 & PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK) >> 5; - if (rev_num <= 1) - ppc7d_has_alma = 1; - -#ifdef DEBUG - console_printk[0] = 8; -#endif -} diff --git a/arch/ppc/platforms/radstone_ppc7d.h b/arch/ppc/platforms/radstone_ppc7d.h deleted file mode 100644 index 2bb093a0c03e986e5edfc75cd32217a78df0de4b..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/radstone_ppc7d.h +++ /dev/null @@ -1,433 +0,0 @@ -/* - * Board definitions for the Radstone PPC7D boards. - * - * Author: James Chapman - * - * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il - * Based on code done by - Mark A. Greer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to - * PCI I/O space and 4 windows from the CPU bus to PCI MEM space. - * We'll only use one PCI MEM window on each PCI bus. - * - * This is the CPU physical memory map (windows must be at least 1MB - * and start on a boundary that is a multiple of the window size): - * - * 0xff800000-0xffffffff - Boot window - * 0xff000000-0xff000fff - AFIX registers (DevCS2) - * 0xfef00000-0xfef0ffff - Internal MV64x60 registers - * 0xfef40000-0xfef7ffff - Internal SRAM - * 0xfef00000-0xfef0ffff - MV64360 Registers - * 0x70000000-0x7fffffff - soldered flash (DevCS3) - * 0xe8000000-0xe9ffffff - PCI I/O - * 0x80000000-0xbfffffff - PCI MEM - */ - -#ifndef __PPC_PLATFORMS_PPC7D_H -#define __PPC_PLATFORMS_PPC7D_H - -#include - -/***************************************************************************** - * CPU Physical Memory Map setup. - *****************************************************************************/ - -#define PPC7D_BOOT_WINDOW_BASE 0xff800000 -#define PPC7D_AFIX_REG_BASE 0xff000000 -#define PPC7D_INTERNAL_SRAM_BASE 0xfef40000 -#define PPC7D_FLASH_BASE 0x70000000 - -#define PPC7D_BOOT_WINDOW_SIZE_ACTUAL 0x00800000 /* 8MB */ -#define PPC7D_FLASH_SIZE_ACTUAL 0x10000000 /* 256MB */ - -#define PPC7D_BOOT_WINDOW_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - PPC7D_BOOT_WINDOW_SIZE_ACTUAL) -#define PPC7D_FLASH_SIZE max(MV64360_WINDOW_SIZE_MIN, \ - PPC7D_FLASH_SIZE_ACTUAL) -#define PPC7D_AFIX_REG_SIZE max(MV64360_WINDOW_SIZE_MIN, 0xff) - - -#define PPC7D_PCI0_MEM0_START_PROC_ADDR 0x80000000UL -#define PPC7D_PCI0_MEM0_START_PCI_HI_ADDR 0x00000000UL -#define PPC7D_PCI0_MEM0_START_PCI_LO_ADDR 0x80000000UL -#define PPC7D_PCI0_MEM0_SIZE 0x20000000UL -#define PPC7D_PCI0_MEM1_START_PROC_ADDR 0xe8010000UL -#define PPC7D_PCI0_MEM1_START_PCI_HI_ADDR 0x00000000UL -#define PPC7D_PCI0_MEM1_START_PCI_LO_ADDR 0x00000000UL -#define PPC7D_PCI0_MEM1_SIZE 0x000f0000UL -#define PPC7D_PCI0_IO_START_PROC_ADDR 0xe8000000UL -#define PPC7D_PCI0_IO_START_PCI_ADDR 0x00000000UL -#define PPC7D_PCI0_IO_SIZE 0x00010000UL - -#define PPC7D_PCI1_MEM0_START_PROC_ADDR 0xa0000000UL -#define PPC7D_PCI1_MEM0_START_PCI_HI_ADDR 0x00000000UL -#define PPC7D_PCI1_MEM0_START_PCI_LO_ADDR 0xa0000000UL -#define PPC7D_PCI1_MEM0_SIZE 0x20000000UL -#define PPC7D_PCI1_MEM1_START_PROC_ADDR 0xe9800000UL -#define PPC7D_PCI1_MEM1_START_PCI_HI_ADDR 0x00000000UL -#define PPC7D_PCI1_MEM1_START_PCI_LO_ADDR 0x00000000UL -#define PPC7D_PCI1_MEM1_SIZE 0x00800000UL -#define PPC7D_PCI1_IO_START_PROC_ADDR 0xe9000000UL -#define PPC7D_PCI1_IO_START_PCI_ADDR 0x00000000UL -#define PPC7D_PCI1_IO_SIZE 0x00010000UL - -#define PPC7D_DEFAULT_BAUD 9600 -#define PPC7D_MPSC_CLK_SRC 8 /* TCLK */ -#define PPC7D_MPSC_CLK_FREQ 133333333 /* 133.3333... MHz */ - -#define PPC7D_ETH0_PHY_ADDR 8 -#define PPC7D_ETH1_PHY_ADDR 9 -#define PPC7D_ETH2_PHY_ADDR 0 - -#define PPC7D_ETH_TX_QUEUE_SIZE 400 -#define PPC7D_ETH_RX_QUEUE_SIZE 400 - -#define PPC7D_ETH_PORT_CONFIG_VALUE \ - MV64340_ETH_UNICAST_NORMAL_MODE | \ - MV64340_ETH_DEFAULT_RX_QUEUE_0 | \ - MV64340_ETH_DEFAULT_RX_ARP_QUEUE_0 | \ - MV64340_ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \ - MV64340_ETH_RECEIVE_BC_IF_IP | \ - MV64340_ETH_RECEIVE_BC_IF_ARP | \ - MV64340_ETH_CAPTURE_TCP_FRAMES_DIS | \ - MV64340_ETH_CAPTURE_UDP_FRAMES_DIS | \ - MV64340_ETH_DEFAULT_RX_TCP_QUEUE_0 | \ - MV64340_ETH_DEFAULT_RX_UDP_QUEUE_0 | \ - MV64340_ETH_DEFAULT_RX_BPDU_QUEUE_0 - -#define PPC7D_ETH_PORT_CONFIG_EXTEND_VALUE \ - MV64340_ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \ - MV64340_ETH_PARTITION_DISABLE - -#define GT_ETH_IPG_INT_RX(value) \ - ((value & 0x3fff) << 8) - -#define PPC7D_ETH_PORT_SDMA_CONFIG_VALUE \ - MV64340_ETH_RX_BURST_SIZE_4_64BIT | \ - GT_ETH_IPG_INT_RX(0) | \ - MV64340_ETH_TX_BURST_SIZE_4_64BIT - -#define PPC7D_ETH_PORT_SERIAL_CONTROL_VALUE \ - MV64340_ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \ - MV64340_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \ - MV64340_ETH_ADV_SYMMETRIC_FLOW_CTRL | \ - MV64340_ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ - MV64340_ETH_FORCE_BP_MODE_NO_JAM | \ - (1 << 9) | \ - MV64340_ETH_DO_NOT_FORCE_LINK_FAIL | \ - MV64340_ETH_RETRANSMIT_16_ATTEMPTS | \ - MV64340_ETH_ENABLE_AUTO_NEG_SPEED_GMII | \ - MV64340_ETH_DTE_ADV_0 | \ - MV64340_ETH_DISABLE_AUTO_NEG_BYPASS | \ - MV64340_ETH_AUTO_NEG_NO_CHANGE | \ - MV64340_ETH_MAX_RX_PACKET_9700BYTE | \ - MV64340_ETH_CLR_EXT_LOOPBACK | \ - MV64340_ETH_SET_FULL_DUPLEX_MODE | \ - MV64340_ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX - -/***************************************************************************** - * Serial defines. - *****************************************************************************/ - -#define PPC7D_SERIAL_0 0xe80003f8 -#define PPC7D_SERIAL_1 0xe80002f8 - -#define RS_TABLE_SIZE 2 - -/* Rate for the 1.8432 Mhz clock for the onboard serial chip */ -#define UART_CLK 1843200 -#define BASE_BAUD ( UART_CLK / 16 ) - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF) -#endif - -#define STD_SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, PPC7D_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \ - iomem_base: (u8 *)PPC7D_SERIAL_0, \ - io_type: SERIAL_IO_MEM, }, \ - { 0, BASE_BAUD, PPC7D_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \ - iomem_base: (u8 *)PPC7D_SERIAL_1, \ - io_type: SERIAL_IO_MEM }, - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DFNS - -/***************************************************************************** - * CPLD defines. - * - * Register map:- - * - * 0000 to 000F South Bridge DMA 1 Control - * 0020 and 0021 South Bridge Interrupt 1 Control - * 0040 to 0043 South Bridge Counter Control - * 0060 Keyboard - * 0061 South Bridge NMI Status and Control - * 0064 Keyboard - * 0071 and 0072 RTC R/W - * 0078 to 007B South Bridge BIOS Timer - * 0080 to 0090 South Bridge DMA Pages - * 00A0 and 00A1 South Bridge Interrupt 2 Control - * 00C0 to 00DE South Bridge DMA 2 Control - * 02E8 to 02EF COM6 R/W - * 02F8 to 02FF South Bridge COM2 R/W - * 03E8 to 03EF COM5 R/W - * 03F8 to 03FF South Bridge COM1 R/W - * 040A South Bridge DMA Scatter/Gather RO - * 040B DMA 1 Extended Mode WO - * 0410 to 043F South Bridge DMA Scatter/Gather - * 0481 to 048B South Bridge DMA High Pages - * 04D0 and 04D1 South Bridge Edge/Level Control - * 04D6 DMA 2 Extended Mode WO - * 0804 Memory Configuration RO - * 0806 Memory Configuration Extend RO - * 0808 SCSI Activity LED R/W - * 080C Equipment Present 1 RO - * 080E Equipment Present 2 RO - * 0810 Equipment Present 3 RO - * 0812 Equipment Present 4 RO - * 0818 Key Lock RO - * 0820 LEDS R/W - * 0824 COMs R/W - * 0826 RTS R/W - * 0828 Reset R/W - * 082C Watchdog Trig R/W - * 082E Interrupt R/W - * 0830 Interrupt Status RO - * 0832 PCI configuration RO - * 0854 Board Revision RO - * 0858 Extended ID RO - * 0864 ID Link RO - * 0866 Motherboard Type RO - * 0868 FLASH Write control RO - * 086A Software FLASH write protect R/W - * 086E FLASH Control R/W - *****************************************************************************/ - -#define PPC7D_CPLD_MEM_CONFIG 0x0804 -#define PPC7D_CPLD_MEM_CONFIG_EXTEND 0x0806 -#define PPC7D_CPLD_SCSI_ACTIVITY_LED 0x0808 -#define PPC7D_CPLD_EQUIPMENT_PRESENT_1 0x080C -#define PPC7D_CPLD_EQUIPMENT_PRESENT_2 0x080E -#define PPC7D_CPLD_EQUIPMENT_PRESENT_3 0x0810 -#define PPC7D_CPLD_EQUIPMENT_PRESENT_4 0x0812 -#define PPC7D_CPLD_KEY_LOCK 0x0818 -#define PPC7D_CPLD_LEDS 0x0820 -#define PPC7D_CPLD_COMS 0x0824 -#define PPC7D_CPLD_RTS 0x0826 -#define PPC7D_CPLD_RESET 0x0828 -#define PPC7D_CPLD_WATCHDOG_TRIG 0x082C -#define PPC7D_CPLD_INTR 0x082E -#define PPC7D_CPLD_INTR_STATUS 0x0830 -#define PPC7D_CPLD_PCI_CONFIG 0x0832 -#define PPC7D_CPLD_BOARD_REVISION 0x0854 -#define PPC7D_CPLD_EXTENDED_ID 0x0858 -#define PPC7D_CPLD_ID_LINK 0x0864 -#define PPC7D_CPLD_MOTHERBOARD_TYPE 0x0866 -#define PPC7D_CPLD_FLASH_WRITE_CNTL 0x0868 -#define PPC7D_CPLD_SW_FLASH_WRITE_PROTECT 0x086A -#define PPC7D_CPLD_FLASH_CNTL 0x086E - -/* MEMORY_CONFIG_EXTEND */ -#define PPC7D_CPLD_SDRAM_BANK_NUM_MASK 0x02 -#define PPC7D_CPLD_SDRAM_BANK_SIZE_MASK 0xc0 -#define PPC7D_CPLD_SDRAM_BANK_SIZE_128M 0 -#define PPC7D_CPLD_SDRAM_BANK_SIZE_256M 0x40 -#define PPC7D_CPLD_SDRAM_BANK_SIZE_512M 0x80 -#define PPC7D_CPLD_SDRAM_BANK_SIZE_1G 0xc0 -#define PPC7D_CPLD_FLASH_DEV_SIZE_MASK 0x03 -#define PPC7D_CPLD_FLASH_BANK_NUM_MASK 0x0c -#define PPC7D_CPLD_FLASH_DEV_SIZE_64M 0 -#define PPC7D_CPLD_FLASH_DEV_SIZE_32M 1 -#define PPC7D_CPLD_FLASH_DEV_SIZE_16M 3 -#define PPC7D_CPLD_FLASH_BANK_NUM_4 0x00 -#define PPC7D_CPLD_FLASH_BANK_NUM_3 0x04 -#define PPC7D_CPLD_FLASH_BANK_NUM_2 0x08 -#define PPC7D_CPLD_FLASH_BANK_NUM_1 0x0c - -/* SCSI_LED */ -#define PPC7D_CPLD_SCSI_ACTIVITY_LED_OFF 0 -#define PPC7D_CPLD_SCSI_ACTIVITY_LED_ON 1 - -/* EQUIPMENT_PRESENT_1 */ -#define PPC7D_CPLD_EQPT_PRES_1_FITTED 0 -#define PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK (0x80 >> 2) -#define PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK (0x80 >> 3) -#define PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK (0x80 >> 4) - -/* EQUIPMENT_PRESENT_2 */ -#define PPC7D_CPLD_EQPT_PRES_2_FITTED !0 -#define PPC7D_CPLD_EQPT_PRES_2_UNIVERSE_MASK (0x80 >> 0) -#define PPC7D_CPLD_EQPT_PRES_2_COM36_MASK (0x80 >> 2) -#define PPC7D_CPLD_EQPT_PRES_2_GIGE_MASK (0x80 >> 3) -#define PPC7D_CPLD_EQPT_PRES_2_DUALGIGE_MASK (0x80 >> 4) - -/* EQUIPMENT_PRESENT_3 */ -#define PPC7D_CPLD_EQPT_PRES_3_PMC2_V_MASK (0x80 >> 3) -#define PPC7D_CPLD_EQPT_PRES_3_PMC2_5V (0 >> 3) -#define PPC7D_CPLD_EQPT_PRES_3_PMC2_3V (0x80 >> 3) -#define PPC7D_CPLD_EQPT_PRES_3_PMC1_V_MASK (0x80 >> 4) -#define PPC7D_CPLD_EQPT_PRES_3_PMC1_5V (0 >> 4) -#define PPC7D_CPLD_EQPT_PRES_3_PMC1_3V (0x80 >> 4) -#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_MASK (0x80 >> 5) -#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_INTER (0 >> 5) -#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_VME (0x80 >> 5) - -/* EQUIPMENT_PRESENT_4 */ -#define PPC7D_CPLD_EQPT_PRES_4_LPT_MASK (0x80 >> 2) -#define PPC7D_CPLD_EQPT_PRES_4_LPT_FITTED (0x80 >> 2) -#define PPC7D_CPLD_EQPT_PRES_4_PS2_USB2_MASK (0xc0 >> 6) -#define PPC7D_CPLD_EQPT_PRES_4_PS2_FITTED (0x40 >> 6) -#define PPC7D_CPLD_EQPT_PRES_4_USB2_FITTED (0x80 >> 6) - -/* CPLD_LEDS */ -#define PPC7D_CPLD_LEDS_ON (!0) -#define PPC7D_CPLD_LEDS_OFF (0) -#define PPC7D_CPLD_LEDS_NVRAM_PAGE_MASK (0xc0 >> 2) -#define PPC7D_CPLD_LEDS_DS201_MASK (0x80 >> 4) -#define PPC7D_CPLD_LEDS_DS219_MASK (0x80 >> 5) -#define PPC7D_CPLD_LEDS_DS220_MASK (0x80 >> 6) -#define PPC7D_CPLD_LEDS_DS221_MASK (0x80 >> 7) - -/* CPLD_COMS */ -#define PPC7D_CPLD_COMS_COM3_TCLKEN (0x80 >> 0) -#define PPC7D_CPLD_COMS_COM3_RTCLKEN (0x80 >> 1) -#define PPC7D_CPLD_COMS_COM3_MODE_MASK (0x80 >> 2) -#define PPC7D_CPLD_COMS_COM3_MODE_RS232 (0) -#define PPC7D_CPLD_COMS_COM3_MODE_RS422 (0x80 >> 2) -#define PPC7D_CPLD_COMS_COM3_TXEN (0x80 >> 3) -#define PPC7D_CPLD_COMS_COM4_TCLKEN (0x80 >> 4) -#define PPC7D_CPLD_COMS_COM4_RTCLKEN (0x80 >> 5) -#define PPC7D_CPLD_COMS_COM4_MODE_MASK (0x80 >> 6) -#define PPC7D_CPLD_COMS_COM4_MODE_RS232 (0) -#define PPC7D_CPLD_COMS_COM4_MODE_RS422 (0x80 >> 6) -#define PPC7D_CPLD_COMS_COM4_TXEN (0x80 >> 7) - -/* CPLD_RTS */ -#define PPC7D_CPLD_RTS_COM36_LOOPBACK (0x80 >> 0) -#define PPC7D_CPLD_RTS_COM4_SCLK (0x80 >> 1) -#define PPC7D_CPLD_RTS_COM3_TXFUNC_MASK (0xc0 >> 2) -#define PPC7D_CPLD_RTS_COM3_TXFUNC_DISABLED (0 >> 2) -#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED (0x80 >> 2) -#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED_RTG3 (0xc0 >> 2) -#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED_RTG3S (0xc0 >> 2) -#define PPC7D_CPLD_RTS_COM56_MODE_MASK (0x80 >> 4) -#define PPC7D_CPLD_RTS_COM56_MODE_RS232 (0) -#define PPC7D_CPLD_RTS_COM56_MODE_RS422 (0x80 >> 4) -#define PPC7D_CPLD_RTS_COM56_ENABLE_MASK (0x80 >> 5) -#define PPC7D_CPLD_RTS_COM56_DISABLED (0) -#define PPC7D_CPLD_RTS_COM56_ENABLED (0x80 >> 5) -#define PPC7D_CPLD_RTS_COM4_TXFUNC_MASK (0xc0 >> 6) -#define PPC7D_CPLD_RTS_COM4_TXFUNC_DISABLED (0 >> 6) -#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED (0x80 >> 6) -#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED_RTG3 (0x40 >> 6) -#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED_RTG3S (0x40 >> 6) - -/* WATCHDOG_TRIG */ -#define PPC7D_CPLD_WDOG_CAUSE_MASK (0x80 >> 0) -#define PPC7D_CPLD_WDOG_CAUSE_NORMAL_RESET (0 >> 0) -#define PPC7D_CPLD_WDOG_CAUSE_WATCHDOG (0x80 >> 0) -#define PPC7D_CPLD_WDOG_ENABLE_MASK (0x80 >> 6) -#define PPC7D_CPLD_WDOG_ENABLE_OFF (0 >> 6) -#define PPC7D_CPLD_WDOG_ENABLE_ON (0x80 >> 6) -#define PPC7D_CPLD_WDOG_RESETSW_MASK (0x80 >> 7) -#define PPC7D_CPLD_WDOG_RESETSW_OFF (0 >> 7) -#define PPC7D_CPLD_WDOG_RESETSW_ON (0x80 >> 7) - -/* Interrupt mask and status bits */ -#define PPC7D_CPLD_INTR_TEMP_MASK (0x80 >> 0) -#define PPC7D_CPLD_INTR_HB8_MASK (0x80 >> 1) -#define PPC7D_CPLD_INTR_PHY1_MASK (0x80 >> 2) -#define PPC7D_CPLD_INTR_PHY0_MASK (0x80 >> 3) -#define PPC7D_CPLD_INTR_ISANMI_MASK (0x80 >> 5) -#define PPC7D_CPLD_INTR_CRITTEMP_MASK (0x80 >> 6) - -/* CPLD_INTR */ -#define PPC7D_CPLD_INTR_ENABLE_OFF (0) -#define PPC7D_CPLD_INTR_ENABLE_ON (!0) - -/* CPLD_INTR_STATUS */ -#define PPC7D_CPLD_INTR_STATUS_OFF (0) -#define PPC7D_CPLD_INTR_STATUS_ON (!0) - -/* CPLD_PCI_CONFIG */ -#define PPC7D_CPLD_PCI_CONFIG_PCI0_MASK 0x70 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCI33 0x00 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCI66 0x10 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX33 0x40 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX66 0x50 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX100 0x60 -#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX133 0x70 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_MASK 0x07 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCI33 0x00 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCI66 0x01 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX33 0x04 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX66 0x05 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX100 0x06 -#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX133 0x07 - -/* CPLD_BOARD_REVISION */ -#define PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK 0xe0 -#define PPC7D_CPLD_BOARD_REVISION_LETTER_MASK 0x1f - -/* CPLD_EXTENDED_ID */ -#define PPC7D_CPLD_EXTENDED_ID_PPC7D 0x18 - -/* CPLD_ID_LINK */ -#define PPC7D_CPLD_ID_LINK_VME64_GAP_MASK (0x80 >> 2) -#define PPC7D_CPLD_ID_LINK_VME64_GA4_MASK (0x80 >> 3) -#define PPC7D_CPLD_ID_LINK_E13_MASK (0x80 >> 4) -#define PPC7D_CPLD_ID_LINK_E12_MASK (0x80 >> 5) -#define PPC7D_CPLD_ID_LINK_E7_MASK (0x80 >> 6) -#define PPC7D_CPLD_ID_LINK_E6_MASK (0x80 >> 7) - -/* CPLD_MOTHERBOARD_TYPE */ -#define PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK (0x80 >> 0) -#define PPC7D_CPLD_MB_TYPE_ECC_ENABLED (0x80 >> 0) -#define PPC7D_CPLD_MB_TYPE_ECC_DISABLED (0 >> 0) -#define PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK (0x80 >> 3) -#define PPC7D_CPLD_MB_TYPE_PLL_MASK 0x0c -#define PPC7D_CPLD_MB_TYPE_PLL_133 0x00 -#define PPC7D_CPLD_MB_TYPE_PLL_100 0x08 -#define PPC7D_CPLD_MB_TYPE_PLL_64 0x04 -#define PPC7D_CPLD_MB_TYPE_HW_ID_MASK 0x03 - -/* CPLD_FLASH_WRITE_CNTL */ -#define PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK (0x80 >> 0) -#define PPD7D_CPLD_FLASH_CNTL_WR_LINK_FITTED (0x80 >> 0) -#define PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK (0x80 >> 2) -#define PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_FITTED (0x80 >> 2) -#define PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK (0x80 >> 3) -#define PPD7D_CPLD_FLASH_CNTL_USER_LINK_FITTED (0x80 >> 3) -#define PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK (0x80 >> 5) -#define PPD7D_CPLD_FLASH_CNTL_RECO_WR_ENABLED (0x80 >> 5) -#define PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK (0x80 >> 6) -#define PPD7D_CPLD_FLASH_CNTL_BOOT_WR_ENABLED (0x80 >> 6) -#define PPD7D_CPLD_FLASH_CNTL_USER_WR_MASK (0x80 >> 7) -#define PPD7D_CPLD_FLASH_CNTL_USER_WR_ENABLED (0x80 >> 7) - -/* CPLD_SW_FLASH_WRITE_PROTECT */ -#define PPC7D_CPLD_SW_FLASH_WRPROT_ENABLED (!0) -#define PPC7D_CPLD_SW_FLASH_WRPROT_DISABLED (0) -#define PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK (0x80 >> 6) -#define PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK (0x80 >> 7) - -/* CPLD_FLASH_WRITE_CNTL */ -#define PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK (0x80 >> 0) -#define PPC7D_CPLD_FLASH_CNTL_NVRAM_DISABLED (0 >> 0) -#define PPC7D_CPLD_FLASH_CNTL_NVRAM_ENABLED (0x80 >> 0) -#define PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK (0x80 >> 1) -#define PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK (0x80 >> 2) -#define PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK (0x80 >> 3) - - -#endif /* __PPC_PLATFORMS_PPC7D_H */ diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c deleted file mode 100644 index d687b0f8763b20750b1f2de574836c87db968376..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/residual.c +++ /dev/null @@ -1,1034 +0,0 @@ -/* - * Code to deal with the PReP residual data. - * - * Written by: Cort Dougan (cort@cs.nmt.edu) - * Improved _greatly_ and rewritten by Gabriel Paubert (paubert@iram.es) - * - * This file is based on the following documentation: - * - * IBM Power Personal Systems Architecture - * Residual Data - * Document Number: PPS-AR-FW0001 - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -unsigned char __res[sizeof(RESIDUAL)] = {0,}; -RESIDUAL *res = (RESIDUAL *)&__res; - -char * PnP_BASE_TYPES[] __initdata = { - "Reserved", - "MassStorageDevice", - "NetworkInterfaceController", - "DisplayController", - "MultimediaController", - "MemoryController", - "BridgeController", - "CommunicationsDevice", - "SystemPeripheral", - "InputDevice", - "ServiceProcessor" - }; - -/* Device Sub Type Codes */ - -unsigned char * PnP_SUB_TYPES[] __initdata = { - "\001\000SCSIController", - "\001\001IDEController", - "\001\002FloppyController", - "\001\003IPIController", - "\001\200OtherMassStorageController", - "\002\000EthernetController", - "\002\001TokenRingController", - "\002\002FDDIController", - "\002\0x80OtherNetworkController", - "\003\000VGAController", - "\003\001SVGAController", - "\003\002XGAController", - "\003\200OtherDisplayController", - "\004\000VideoController", - "\004\001AudioController", - "\004\200OtherMultimediaController", - "\005\000RAM", - "\005\001FLASH", - "\005\200OtherMemoryDevice", - "\006\000HostProcessorBridge", - "\006\001ISABridge", - "\006\002EISABridge", - "\006\003MicroChannelBridge", - "\006\004PCIBridge", - "\006\005PCMCIABridge", - "\006\006VMEBridge", - "\006\200OtherBridgeDevice", - "\007\000RS232Device", - "\007\001ATCompatibleParallelPort", - "\007\200OtherCommunicationsDevice", - "\010\000ProgrammableInterruptController", - "\010\001DMAController", - "\010\002SystemTimer", - "\010\003RealTimeClock", - "\010\004L2Cache", - "\010\005NVRAM", - "\010\006PowerManagement", - "\010\007CMOS", - "\010\010OperatorPanel", - "\010\011ServiceProcessorClass1", - "\010\012ServiceProcessorClass2", - "\010\013ServiceProcessorClass3", - "\010\014GraphicAssist", - "\010\017SystemPlanar", - "\010\200OtherSystemPeripheral", - "\011\000KeyboardController", - "\011\001Digitizer", - "\011\002MouseController", - "\011\003TabletController", - "\011\0x80OtherInputController", - "\012\000GeneralMemoryController", - NULL -}; - -/* Device Interface Type Codes */ - -unsigned char * PnP_INTERFACES[] __initdata = { - "\000\000\000General", - "\001\000\000GeneralSCSI", - "\001\001\000GeneralIDE", - "\001\001\001ATACompatible", - - "\001\002\000GeneralFloppy", - "\001\002\001Compatible765", - "\001\002\002NS398_Floppy", /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - "\001\002\003NS26E_Floppy", /* Ports 26E and 26F */ - "\001\002\004NS15C_Floppy", /* Ports 15C and 15D */ - "\001\002\005NS2E_Floppy", /* Ports 2E and 2F */ - "\001\002\006CHRP_Floppy", /* CHRP Floppy in PR*P system */ - - "\001\003\000GeneralIPI", - - "\002\000\000GeneralEther", - "\002\001\000GeneralToken", - "\002\002\000GeneralFDDI", - - "\003\000\000GeneralVGA", - "\003\001\000GeneralSVGA", - "\003\002\000GeneralXGA", - - "\004\000\000GeneralVideo", - "\004\001\000GeneralAudio", - "\004\001\001CS4232Audio", /* CS 4232 Plug 'n Play Configured */ - - "\005\000\000GeneralRAM", - /* This one is obviously wrong ! */ - "\005\000\000PCIMemoryController", /* PCI Config Method */ - "\005\000\001RS6KMemoryController", /* RS6K Config Method */ - "\005\001\000GeneralFLASH", - - "\006\000\000GeneralHostBridge", - "\006\001\000GeneralISABridge", - "\006\002\000GeneralEISABridge", - "\006\003\000GeneralMCABridge", - /* GeneralPCIBridge = 0, */ - "\006\004\000PCIBridgeDirect", - "\006\004\001PCIBridgeIndirect", - "\006\004\002PCIBridgeRS6K", - "\006\005\000GeneralPCMCIABridge", - "\006\006\000GeneralVMEBridge", - - "\007\000\000GeneralRS232", - "\007\000\001COMx", - "\007\000\002Compatible16450", - "\007\000\003Compatible16550", - "\007\000\004NS398SerPort", /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - "\007\000\005NS26ESerPort", /* Ports 26E and 26F */ - "\007\000\006NS15CSerPort", /* Ports 15C and 15D */ - "\007\000\007NS2ESerPort", /* Ports 2E and 2F */ - - "\007\001\000GeneralParPort", - "\007\001\001LPTx", - "\007\001\002NS398ParPort", /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ - "\007\001\003NS26EParPort", /* Ports 26E and 26F */ - "\007\001\004NS15CParPort", /* Ports 15C and 15D */ - "\007\001\005NS2EParPort", /* Ports 2E and 2F */ - - "\010\000\000GeneralPIC", - "\010\000\001ISA_PIC", - "\010\000\002EISA_PIC", - "\010\000\003MPIC", - "\010\000\004RS6K_PIC", - - "\010\001\000GeneralDMA", - "\010\001\001ISA_DMA", - "\010\001\002EISA_DMA", - - "\010\002\000GeneralTimer", - "\010\002\001ISA_Timer", - "\010\002\002EISA_Timer", - "\010\003\000GeneralRTC", - "\010\003\001ISA_RTC", - - "\010\004\001StoreThruOnly", - "\010\004\002StoreInEnabled", - "\010\004\003RS6KL2Cache", - - "\010\005\000IndirectNVRAM", /* Indirectly addressed */ - "\010\005\001DirectNVRAM", /* Memory Mapped */ - "\010\005\002IndirectNVRAM24", /* Indirectly addressed - 24 bit */ - - "\010\006\000GeneralPowerManagement", - "\010\006\001EPOWPowerManagement", - "\010\006\002PowerControl", // d1378 - - "\010\007\000GeneralCMOS", - - "\010\010\000GeneralOPPanel", - "\010\010\001HarddiskLight", - "\010\010\002CDROMLight", - "\010\010\003PowerLight", - "\010\010\004KeyLock", - "\010\010\005ANDisplay", /* AlphaNumeric Display */ - "\010\010\006SystemStatusLED", /* 3 digit 7 segment LED */ - "\010\010\007CHRP_SystemStatusLED", /* CHRP LEDs in PR*P system */ - - "\010\011\000GeneralServiceProcessor", - "\010\012\000GeneralServiceProcessor", - "\010\013\000GeneralServiceProcessor", - - "\010\014\001TransferData", - "\010\014\002IGMC32", - "\010\014\003IGMC64", - - "\010\017\000GeneralSystemPlanar", /* 10/5/95 */ - NULL - }; - -static const unsigned char __init *PnP_SUB_TYPE_STR(unsigned char BaseType, - unsigned char SubType) { - unsigned char ** s=PnP_SUB_TYPES; - while (*s && !((*s)[0]==BaseType - && (*s)[1]==SubType)) s++; - if (*s) return *s+2; - else return("Unknown !"); -}; - -static const unsigned char __init *PnP_INTERFACE_STR(unsigned char BaseType, - unsigned char SubType, - unsigned char Interface) { - unsigned char ** s=PnP_INTERFACES; - while (*s && !((*s)[0]==BaseType - && (*s)[1]==SubType - && (*s)[2]==Interface)) s++; - if (*s) return *s+3; - else return NULL; -}; - -static void __init printsmallvendor(PnP_TAG_PACKET *pkt, int size) { - int i, c; - char decomp[4]; -#define p pkt->S14_Pack.S14_Data.S14_PPCPack - switch(p.Type) { - case 1: - /* Decompress first 3 chars */ - c = *(unsigned short *)p.PPCData; - decomp[0]='A'-1+((c>>10)&0x1F); - decomp[1]='A'-1+((c>>5)&0x1F); - decomp[2]='A'-1+(c&0x1F); - decomp[3]=0; - printk(" Chip identification: %s%4.4X\n", - decomp, ld_le16((unsigned short *)(p.PPCData+2))); - break; - default: - printk(" Small vendor item type 0x%2.2x, data (hex): ", - p.Type); - for(i=0; iS1_Pack.Tag)) { - case PnPVersion: - printk(" PnPversion 0x%x.%x\n", - pkt->S1_Pack.Version[0], /* How to interpret version ? */ - pkt->S1_Pack.Version[1]); - break; -// case Logicaldevice: - break; -// case CompatibleDevice: - break; - case IRQFormat: -#define p pkt->S4_Pack - printk(" IRQ Mask 0x%4.4x, %s %s sensitive\n", - ld_le16((unsigned short *)p.IRQMask), - intlevel[(size>3) ? !(p.IRQInfo&0x05) : 0], - intsense[(size>3) ? !(p.IRQInfo&0x03) : 0]); -#undef p - break; - case DMAFormat: -#define p pkt->S5_Pack - printk(" DMA channel mask 0x%2.2x, info 0x%2.2x\n", - p.DMAMask, p.DMAInfo); -#undef p - break; - case StartDepFunc: - printk("Start dependent function:\n"); - break; - case EndDepFunc: - printk("End dependent function\n"); - break; - case IOPort: -#define p pkt->S8_Pack - printk(" Variable (%d decoded bits) I/O port\n" - " from 0x%4.4x to 0x%4.4x, alignment %d, %d ports\n", - p.IOInfo&ISAAddr16bit?16:10, - ld_le16((unsigned short *)p.RangeMin), - ld_le16((unsigned short *)p.RangeMax), - p.IOAlign, p.IONum); -#undef p - break; - case FixedIOPort: -#define p pkt->S9_Pack - printk(" Fixed (10 decoded bits) I/O port from %3.3x to %3.3x\n", - (p.Range[1]<<8)|p.Range[0], - ((p.Range[1]<<8)|p.Range[0])+p.IONum-1); -#undef p - break; - case Res1: - case Res2: - case Res3: - printk(" Undefined packet type %d!\n", - tag_small_item_name(pkt->S1_Pack.Tag)); - break; - case SmallVendorItem: - printsmallvendor(pkt,size); - break; - default: - printk(" Type 0x2.2x%d, size=%d\n", - pkt->S1_Pack.Tag, size); - break; - } -} - -static void __init printlargevendor(PnP_TAG_PACKET * pkt, int size) { - static const unsigned char * addrtype[] = {"I/O", "Memory", "System"}; - static const unsigned char * inttype[] = {"8259", "MPIC", "RS6k BUID %d"}; - static const unsigned char * convtype[] = {"Bus Memory", "Bus I/O", "DMA"}; - static const unsigned char * transtype[] = {"direct", "mapped", "direct-store segment"}; - static const unsigned char * L2type[] = {"WriteThru", "CopyBack"}; - static const unsigned char * L2assoc[] = {"DirectMapped", "2-way set"}; - - int i; - char tmpstr[30], *t; -#define p pkt->L4_Pack.L4_Data.L4_PPCPack - switch(p.Type) { - case 2: - printk(" %d K %s %s L2 cache, %d/%d bytes line/sector size\n", - ld_le32((unsigned int *)p.PPCData), - L2type[p.PPCData[10]-1], - L2assoc[p.PPCData[4]-1], - ld_le16((unsigned short *)p.PPCData+3), - ld_le16((unsigned short *)p.PPCData+4)); - break; - case 3: - printk(" PCI Bridge parameters\n" - " ConfigBaseAddress %0x\n" - " ConfigBaseData %0x\n" - " Bus number %d\n", - ld_le32((unsigned int *)p.PPCData), - ld_le32((unsigned int *)(p.PPCData+8)), - p.PPCData[16]); - for(i=20; iS1_Pack.Tag)) { - case LargeVendorItem: - printlargevendor(pkt, size); - break; - default: - printk(" Type 0x2.2x%d, size=%d\n", - pkt->S1_Pack.Tag, size); - break; - } -} - -static void __init printpackets(PnP_TAG_PACKET * pkt, const char * cat) -{ - if (pkt->S1_Pack.Tag== END_TAG) { - printk(" No packets describing %s resources.\n", cat); - return; - } - printk( " Packets describing %s resources:\n",cat); - do { - int size; - if (tag_type(pkt->S1_Pack.Tag)) { - size= 3 + - pkt->L1_Pack.Count0 + - pkt->L1_Pack.Count1*256; - printlargepacket(pkt, size); - } else { - size=tag_small_count(pkt->S1_Pack.Tag)+1; - printsmallpacket(pkt, size); - } - pkt = (PnP_TAG_PACKET *)((unsigned char *) pkt + size); - } while (pkt->S1_Pack.Tag != END_TAG); -} - -void __init print_residual_device_info(void) -{ - int i; - PPC_DEVICE *dev; -#define did dev->DeviceId - - /* make sure we have residual data first */ - if (!have_residual_data) - return; - - printk("Residual: %ld devices\n", res->ActualNumDevices); - for ( i = 0; - i < res->ActualNumDevices ; - i++) - { - char decomp[4], sn[20]; - const char * s; - dev = &res->Devices[i]; - s = PnP_INTERFACE_STR(did.BaseType, did.SubType, - did.Interface); - if(!s) { - sprintf(sn, "interface %d", did.Interface); - s=sn; - } - if ( did.BusId & PCIDEVICE ) - printk("PCI Device, Bus %d, DevFunc 0x%x:", - dev->BusAccess.PCIAccess.BusNumber, - dev->BusAccess.PCIAccess.DevFuncNumber); - if ( did.BusId & PNPISADEVICE ) printk("PNPISA Device:"); - if ( did.BusId & ISADEVICE ) - printk("ISA Device, Slot %d, LogicalDev %d:", - dev->BusAccess.ISAAccess.SlotNumber, - dev->BusAccess.ISAAccess.LogicalDevNumber); - if ( did.BusId & EISADEVICE ) printk("EISA Device:"); - if ( did.BusId & PROCESSORDEVICE ) - printk("ProcBus Device, Bus %d, BUID %d: ", - dev->BusAccess.ProcBusAccess.BusNumber, - dev->BusAccess.ProcBusAccess.BUID); - if ( did.BusId & PCMCIADEVICE ) printk("PCMCIA "); - if ( did.BusId & VMEDEVICE ) printk("VME "); - if ( did.BusId & MCADEVICE ) printk("MCA "); - if ( did.BusId & MXDEVICE ) printk("MX "); - /* Decompress first 3 chars */ - decomp[0]='A'-1+((did.DevId>>26)&0x1F); - decomp[1]='A'-1+((did.DevId>>21)&0x1F); - decomp[2]='A'-1+((did.DevId>>16)&0x1F); - decomp[3]=0; - printk(" %s%4.4lX, %s, %s, %s\n", - decomp, did.DevId&0xffff, - PnP_BASE_TYPES[did.BaseType], - PnP_SUB_TYPE_STR(did.BaseType,did.SubType), - s); - if ( dev->AllocatedOffset ) - printpackets( (union _PnP_TAG_PACKET *) - &res->DevicePnPHeap[dev->AllocatedOffset], - "allocated"); - if ( dev->PossibleOffset ) - printpackets( (union _PnP_TAG_PACKET *) - &res->DevicePnPHeap[dev->PossibleOffset], - "possible"); - if ( dev->CompatibleOffset ) - printpackets( (union _PnP_TAG_PACKET *) - &res->DevicePnPHeap[dev->CompatibleOffset], - "compatible"); - } -} - - -#if 0 -static void __init printVPD(void) { -#define vpd res->VitalProductData - int ps=vpd.PageSize, i, j; - static const char* Usage[]={ - "FirmwareStack", "FirmwareHeap", "FirmwareCode", "BootImage", - "Free", "Unpopulated", "ISAAddr", "PCIConfig", - "IOMemory", "SystemIO", "SystemRegs", "PCIAddr", - "UnPopSystemRom", "SystemROM", "ResumeBlock", "Other" - }; - static const unsigned char *FWMan[]={ - "IBM", "Motorola", "FirmWorks", "Bull" - }; - static const unsigned char *FWFlags[]={ - "Conventional", "OpenFirmware", "Diagnostics", "LowDebug", - "MultiBoot", "LowClient", "Hex41", "FAT", - "ISO9660", "SCSI_ID_Override", "Tape_Boot", "FW_Boot_Path" - }; - static const unsigned char *ESM[]={ - "Port92", "PCIConfigA8", "FF001030", "????????" - }; - static const unsigned char *SIOM[]={ - "Port850", "????????", "PCIConfigA8", "????????" - }; - - printk("Model: %s\n",vpd.PrintableModel); - printk("Serial: %s\n", vpd.Serial); - printk("FirmwareSupplier: %s\n", FWMan[vpd.FirmwareSupplier]); - printk("FirmwareFlags:"); - for(j=0; j<12; j++) { - if (vpd.FirmwareSupports & (1<2 ? 2 : vpd.EndianSwitchMethod]); - printk("SpreadIOMethod: %s\n", - SIOM[vpd.SpreadIOMethod>3 ? 3 : vpd.SpreadIOMethod]); - printk("Processor/Bus frequencies (Hz): %ld/%ld\n", - vpd.ProcessorHz, vpd.ProcessorBusHz); - printk("Time Base Divisor: %ld\n", vpd.TimeBaseDivisor); - printk("WordWidth, PageSize: %ld, %d\n", vpd.WordWidth, ps); - printk("Cache sector size, Lock granularity: %ld, %ld\n", - vpd.CoherenceBlockSize, vpd.GranuleSize); - for (i=0; iActualNumMemSegs; i++) { - int mask=res->Segs[i].Usage, first, j; - printk("%8.8lx-%8.8lx ", - res->Segs[i].BasePage*ps, - (res->Segs[i].PageCount+res->Segs[i].BasePage)*ps-1); - for(j=15, first=1; j>=0; j--) { - if (mask&(1<DeviceId - - /* make sure we have residual data first */ - if (!have_residual_data) - return; - printk("Residual: %ld devices\n", res->ActualNumDevices); - for ( i = 0; - i < res->ActualNumDevices ; - i++) - { - dev = &res->Devices[i]; - /* - * pci devices - */ - if ( did.BusId & PCIDEVICE ) - { - printk("PCI Device:"); - /* unknown vendor */ - if ( !strncmp( "Unknown", pci_strvendor(did.DevId>>16), 7) ) - printk(" id %08lx types %d/%d", did.DevId, - did.BaseType, did.SubType); - /* known vendor */ - else - printk(" %s %s", - pci_strvendor(did.DevId>>16), - pci_strdev(did.DevId>>16, - did.DevId&0xffff) - ); - - if ( did.BusId & PNPISADEVICE ) - { - printk(" pnp:"); - /* get pnp info on the device */ - pkt = (union _PnP_TAG_PACKET *) - &res->DevicePnPHeap[dev->AllocatedOffset]; - for (; pkt->S1_Pack.Tag != DF_END_TAG; - pkt++ ) - { - if ( (pkt->S1_Pack.Tag == S4_Packet) || - (pkt->S1_Pack.Tag == S4_Packet_flags) ) - printk(" irq %02x%02x", - pkt->S4_Pack.IRQMask[0], - pkt->S4_Pack.IRQMask[1]); - } - } - printk("\n"); - continue; - } - /* - * isa devices - */ - if ( did.BusId & ISADEVICE ) - { - printk("ISA Device: basetype: %d subtype: %d", - did.BaseType, did.SubType); - printk("\n"); - continue; - } - /* - * eisa devices - */ - if ( did.BusId & EISADEVICE ) - { - printk("EISA Device: basetype: %d subtype: %d", - did.BaseType, did.SubType); - printk("\n"); - continue; - } - /* - * proc bus devices - */ - if ( did.BusId & PROCESSORDEVICE ) - { - printk("ProcBus Device: basetype: %d subtype: %d", - did.BaseType, did.SubType); - printk("\n"); - continue; - } - /* - * pcmcia devices - */ - if ( did.BusId & PCMCIADEVICE ) - { - printk("PCMCIA Device: basetype: %d subtype: %d", - did.BaseType, did.SubType); - printk("\n"); - continue; - } - printk("Unknown bus access device: busid %lx\n", - did.BusId); - } -} -#endif - -/* Returns the device index in the residual data, - any of the search items may be set as -1 for wildcard, - DevID number field (second halfword) is big endian ! - - Examples: - - search for the Interrupt controller (8259 type), 2 methods: - 1) i8259 = residual_find_device(~0, - NULL, - SystemPeripheral, - ProgrammableInterruptController, - ISA_PIC, - 0); - 2) i8259 = residual_find_device(~0, "PNP0000", -1, -1, -1, 0) - - - search for the first two serial devices, whatever their type) - iserial1 = residual_find_device(~0,NULL, - CommunicationsDevice, - RS232Device, - -1, 0) - iserial2 = residual_find_device(~0,NULL, - CommunicationsDevice, - RS232Device, - -1, 1) - - but search for typical COM1 and COM2 is not easy due to the - fact that the interface may be anything and the name "PNP0500" or - "PNP0501". Quite bad. - -*/ - -/* devid are easier to uncompress than to compress, so to minimize bloat -in this rarely used area we unencode and compare */ - -/* in residual data number is big endian in the device table and -little endian in the heap, so we use two parameters to avoid writing -two very similar functions */ - -static int __init same_DevID(unsigned short vendor, - unsigned short Number, - char * str) -{ - static unsigned const char hexdigit[]="0123456789ABCDEF"; - if (strlen(str)!=7) return 0; - if ( ( ((vendor>>10)&0x1f)+'A'-1 == str[0]) && - ( ((vendor>>5)&0x1f)+'A'-1 == str[1]) && - ( (vendor&0x1f)+'A'-1 == str[2]) && - (hexdigit[(Number>>12)&0x0f] == str[3]) && - (hexdigit[(Number>>8)&0x0f] == str[4]) && - (hexdigit[(Number>>4)&0x0f] == str[5]) && - (hexdigit[Number&0x0f] == str[6]) ) return 1; - return 0; -} - -PPC_DEVICE __init *residual_find_device(unsigned long BusMask, - unsigned char * DevID, - int BaseType, - int SubType, - int Interface, - int n) -{ - int i; - if (!have_residual_data) return NULL; - for (i=0; iActualNumDevices; i++) { -#define Dev res->Devices[i].DeviceId - if ( (Dev.BusId&BusMask) && - (BaseType==-1 || Dev.BaseType==BaseType) && - (SubType==-1 || Dev.SubType==SubType) && - (Interface==-1 || Dev.Interface==Interface) && - (DevID==NULL || same_DevID((Dev.DevId>>16)&0xffff, - Dev.DevId&0xffff, DevID)) && - !(n--) ) return res->Devices+i; -#undef Dev - } - return NULL; -} - -PPC_DEVICE __init *residual_find_device_id(unsigned long BusMask, - unsigned short DevID, - int BaseType, - int SubType, - int Interface, - int n) -{ - int i; - if (!have_residual_data) return NULL; - for (i=0; iActualNumDevices; i++) { -#define Dev res->Devices[i].DeviceId - if ( (Dev.BusId&BusMask) && - (BaseType==-1 || Dev.BaseType==BaseType) && - (SubType==-1 || Dev.SubType==SubType) && - (Interface==-1 || Dev.Interface==Interface) && - (DevID==0xffff || (Dev.DevId&0xffff) == DevID) && - !(n--) ) return res->Devices+i; -#undef Dev - } - return NULL; -} - -static int __init -residual_scan_pcibridge(PnP_TAG_PACKET * pkt, struct pci_dev *dev) -{ - int irq = -1; - -#define data pkt->L4_Pack.L4_Data.L4_PPCPack.PPCData - if (dev->bus->number == data[16]) { - int i, size; - - size = 3 + ld_le16((u_short *) (&pkt->L4_Pack.Count0)); - for (i = 20; i < size - 4; i += 12) { - unsigned char pin; - int line_irq; - - if (dev->devfn != data[i + 1]) - continue; - - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); - if (pin) { - line_irq = ld_le16((unsigned short *) - (&data[i + 4 + 2 * (pin - 1)])); - irq = (line_irq == 0xffff) ? 0 - : line_irq & 0x7fff; - } else - irq = 0; - - break; - } - } -#undef data - - return irq; -} - -int __init -residual_pcidev_irq(struct pci_dev *dev) -{ - int i = 0; - int irq = -1; - PPC_DEVICE *bridge; - - while ((bridge = residual_find_device - (-1, NULL, BridgeController, PCIBridge, -1, i++))) { - - PnP_TAG_PACKET *pkt; - if (bridge->AllocatedOffset) { - pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap + - bridge->AllocatedOffset, 3, 0); - if (!pkt) - continue; - - irq = residual_scan_pcibridge(pkt, dev); - if (irq != -1) - break; - } - } - - return (irq < 0) ? 0 : irq; -} - -void __init residual_irq_mask(char *irq_edge_mask_lo, char *irq_edge_mask_hi) -{ - PPC_DEVICE *dev; - int i = 0; - unsigned short irq_mask = 0x000; /* default to edge */ - - while ((dev = residual_find_device(-1, NULL, -1, -1, -1, i++))) { - PnP_TAG_PACKET *pkt; - unsigned short mask; - int size; - int offset = dev->AllocatedOffset; - - if (!offset) - continue; - - pkt = PnP_find_packet(res->DevicePnPHeap + offset, - IRQFormat, 0); - if (!pkt) - continue; - - size = tag_small_count(pkt->S1_Pack.Tag) + 1; - mask = ld_le16((unsigned short *)pkt->S4_Pack.IRQMask); - if (size > 3 && (pkt->S4_Pack.IRQInfo & 0x0c)) - irq_mask |= mask; - } - - *irq_edge_mask_lo = irq_mask & 0xff; - *irq_edge_mask_hi = irq_mask >> 8; -} - -unsigned int __init residual_isapic_addr(void) -{ - PPC_DEVICE *isapic; - PnP_TAG_PACKET *pkt; - unsigned int addr; - - isapic = residual_find_device(~0, NULL, SystemPeripheral, - ProgrammableInterruptController, - ISA_PIC, 0); - if (!isapic) - goto unknown; - - pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap + - isapic->AllocatedOffset, 9, 0); - if (!pkt) - goto unknown; - -#define p pkt->L4_Pack.L4_Data.L4_PPCPack - /* Must be 32-bit system address */ - if (!((p.PPCData[0] == 3) && (p.PPCData[1] == 32))) - goto unknown; - - /* It doesn't seem to work where length != 1 (what can I say? :-/ ) */ - if (ld_le32((unsigned int *)(p.PPCData + 12)) != 1) - goto unknown; - - addr = ld_le32((unsigned int *) (p.PPCData + 4)); -#undef p - return addr; -unknown: - return 0; -} - -PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, - unsigned packet_tag, - int n) -{ - unsigned mask, masked_tag, size; - if(!p) return NULL; - if (tag_type(packet_tag)) mask=0xff; else mask=0xF8; - masked_tag = packet_tag&mask; - for(; *p != END_TAG; p+=size) { - if ((*p & mask) == masked_tag && !(n--)) - return (PnP_TAG_PACKET *) p; - if (tag_type(*p)) - size=ld_le16((unsigned short *)(p+1))+3; - else - size=tag_small_count(*p)+1; - } - return NULL; /* not found */ -} - -PnP_TAG_PACKET __init *PnP_find_small_vendor_packet(unsigned char *p, - unsigned packet_type, - int n) -{ - int next=0; - while (p) { - p = (unsigned char *) PnP_find_packet(p, 0x70, next); - if (p && p[1]==packet_type && !(n--)) - return (PnP_TAG_PACKET *) p; - next = 1; - }; - return NULL; /* not found */ -} - -PnP_TAG_PACKET __init *PnP_find_large_vendor_packet(unsigned char *p, - unsigned packet_type, - int n) -{ - int next=0; - while (p) { - p = (unsigned char *) PnP_find_packet(p, 0x84, next); - if (p && p[3]==packet_type && !(n--)) - return (PnP_TAG_PACKET *) p; - next = 1; - }; - return NULL; /* not found */ -} - -#ifdef CONFIG_PROC_PREPRESIDUAL -static int proc_prep_residual_read(char * buf, char ** start, off_t off, - int count, int *eof, void *data) -{ - int n; - - n = res->ResidualLength - off; - if (n < 0) { - *eof = 1; - n = 0; - } - else { - if (n > count) - n = count; - else - *eof = 1; - - memcpy(buf, (char *)res + off, n); - *start = buf; - } - - return n; -} - -int __init -proc_prep_residual_init(void) -{ - if (have_residual_data) - create_proc_read_entry("residual", S_IRUGO, NULL, - proc_prep_residual_read, NULL); - return 0; -} - -__initcall(proc_prep_residual_init); -#endif diff --git a/arch/ppc/platforms/rpx8260.h b/arch/ppc/platforms/rpx8260.h deleted file mode 100644 index 843494a50ef3ad7f9320c22eb6618fd56a6ea845..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/rpx8260.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Embedded Planet RPX6 (or RPX Super) MPC8260 board. - * Copied from the RPX-Classic and SBS8260 stuff. - * - * Copyright (c) 2001 Dan Malek - */ -#ifdef __KERNEL__ -#ifndef __ASM_PLATFORMS_RPX8260_H__ -#define __ASM_PLATFORMS_RPX8260_H__ - -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_nvsize; /* NVRAM size in bytes (can be 0) */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in MHz */ - unsigned int bi_cpmfreq; /* CPM Freq, in MHz */ - unsigned int bi_brgfreq; /* BRG Freq, in MHz */ - unsigned int bi_vco; /* VCO Out from PLL */ - unsigned int bi_baudrate; /* Default console baud rate */ - unsigned int bi_immr; /* IMMR when called from boot rom */ - unsigned char bi_enetaddr[6]; -} bd_t; - -extern bd_t m8xx_board_info; - -/* Memory map is configured by the PROM startup. - * We just map a few things we need. The CSR is actually 4 byte-wide - * registers that can be accessed as 8-, 16-, or 32-bit values. - */ -#define CPM_MAP_ADDR ((uint)0xf0000000) -#define RPX_CSR_ADDR ((uint)0xfa000000) -#define RPX_CSR_SIZE ((uint)(512 * 1024)) -#define RPX_NVRTC_ADDR ((uint)0xfa080000) -#define RPX_NVRTC_SIZE ((uint)(512 * 1024)) - -/* The RPX6 has 16, byte wide control/status registers. - * Not all are used (yet). - */ -extern volatile u_char *rpx6_csr_addr; - -/* Things of interest in the CSR. -*/ -#define BCSR0_ID_MASK ((u_char)0xf0) /* Read only */ -#define BCSR0_SWITCH_MASK ((u_char)0x0f) /* Read only */ -#define BCSR1_XCVR_SMC1 ((u_char)0x80) -#define BCSR1_XCVR_SMC2 ((u_char)0x40) -#define BCSR2_FLASH_WENABLE ((u_char)0x20) -#define BCSR2_NVRAM_ENABLE ((u_char)0x10) -#define BCSR2_ALT_IRQ2 ((u_char)0x08) -#define BCSR2_ALT_IRQ3 ((u_char)0x04) -#define BCSR2_PRST ((u_char)0x02) /* Force reset */ -#define BCSR2_ENPRST ((u_char)0x01) /* Enable POR */ -#define BCSR3_MODCLK_MASK ((u_char)0xe0) -#define BCSR3_ENCLKHDR ((u_char)0x10) -#define BCSR3_LED5 ((u_char)0x04) /* 0 == on */ -#define BCSR3_LED6 ((u_char)0x02) /* 0 == on */ -#define BCSR3_LED7 ((u_char)0x01) /* 0 == on */ -#define BCSR4_EN_PHY ((u_char)0x80) /* Enable PHY */ -#define BCSR4_EN_MII ((u_char)0x40) /* Enable PHY */ -#define BCSR4_MII_READ ((u_char)0x04) -#define BCSR4_MII_MDC ((u_char)0x02) -#define BCSR4_MII_MDIO ((u_char)0x01) -#define BCSR13_FETH_IRQMASK ((u_char)0xf0) -#define BCSR15_FETH_IRQ ((u_char)0x20) - -#define PHY_INTERRUPT SIU_INT_IRQ7 - -/* For our show_cpuinfo hooks. */ -#define CPUINFO_VENDOR "Embedded Planet" -#define CPUINFO_MACHINE "EP8260 PowerPC" - -/* Warm reset vector. */ -#define BOOTROM_RESTART_ADDR ((uint)0xfff00104) - -#endif /* __ASM_PLATFORMS_RPX8260_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/rpxclassic.h b/arch/ppc/platforms/rpxclassic.h deleted file mode 100644 index a3c1118e5b0930344356a0cb27e7b855a16db2ac..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/rpxclassic.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the RPCG RPX-Classic board. Copied from the RPX-Lite stuff. - * - * Copyright (c) 1998 Dan Malek (dmalek@jlc.net) - */ -#ifdef __KERNEL__ -#ifndef __MACH_RPX_DEFS -#define __MACH_RPX_DEFS - - -#ifndef __ASSEMBLY__ -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in Hz */ - unsigned char bi_enetaddr[6]; - unsigned int bi_baudrate; -} bd_t; - -extern bd_t m8xx_board_info; - -/* Memory map is configured by the PROM startup. - * We just map a few things we need. The CSR is actually 4 byte-wide - * registers that can be accessed as 8-, 16-, or 32-bit values. - */ -#define PCI_ISA_IO_ADDR ((unsigned)0x80000000) -#define PCI_ISA_IO_SIZE ((uint)(512 * 1024 * 1024)) -#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000) -#define PCI_ISA_MEM_SIZE ((uint)(512 * 1024 * 1024)) -#define RPX_CSR_ADDR ((uint)0xfa400000) -#define RPX_CSR_SIZE ((uint)(4 * 1024)) -#define IMAP_ADDR ((uint)0xfa200000) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define PCI_CSR_ADDR ((uint)0x80000000) -#define PCI_CSR_SIZE ((uint)(64 * 1024)) -#define PCMCIA_MEM_ADDR ((uint)0xe0000000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) -#define PCMCIA_IO_ADDR ((uint)0xe4000000) -#define PCMCIA_IO_SIZE ((uint)(4 * 1024)) -#define PCMCIA_ATTRB_ADDR ((uint)0xe8000000) -#define PCMCIA_ATTRB_SIZE ((uint)(4 * 1024)) - -/* Things of interest in the CSR. -*/ -#define BCSR0_ETHEN ((uint)0x80000000) -#define BCSR0_ETHLPBK ((uint)0x40000000) -#define BCSR0_COLTESTDIS ((uint)0x20000000) -#define BCSR0_FULLDPLXDIS ((uint)0x10000000) -#define BCSR0_ENFLSHSEL ((uint)0x04000000) -#define BCSR0_FLASH_SEL ((uint)0x02000000) -#define BCSR0_ENMONXCVR ((uint)0x01000000) - -#define BCSR0_PCMCIAVOLT ((uint)0x000f0000) /* CLLF */ -#define BCSR0_PCMCIA3VOLT ((uint)0x000a0000) /* CLLF */ -#define BCSR0_PCMCIA5VOLT ((uint)0x00060000) /* CLLF */ - -#define BCSR1_IPB5SEL ((uint)0x00100000) -#define BCSR1_PCVCTL4 ((uint)0x00080000) -#define BCSR1_PCVCTL5 ((uint)0x00040000) -#define BCSR1_PCVCTL6 ((uint)0x00020000) -#define BCSR1_PCVCTL7 ((uint)0x00010000) - -#define BCSR2_EN232XCVR ((uint)0x00008000) -#define BCSR2_QSPACESEL ((uint)0x00004000) -#define BCSR2_FETHLEDMODE ((uint)0x00000800) /* CLLF */ - -/* define IO_BASE for pcmcia, CLLF only */ -#if !defined(CONFIG_PCI) -#define _IO_BASE 0x80000000 -#define _IO_BASE_SIZE 0x1000 - -/* for pcmcia sandisk */ -#ifdef CONFIG_IDE -# define MAX_HWIFS 1 -#endif -#endif - -/* Interrupt level assignments. -*/ -#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */ - - -/* CPM Ethernet through SCCx. - * - * Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - */ -#define PA_ENET_RXD ((ushort)0x0001) -#define PA_ENET_TXD ((ushort)0x0002) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PB_ENET_TENA ((uint)0x00001000) -#define PC_ENET_CLSN ((ushort)0x0010) -#define PC_ENET_RENA ((ushort)0x0020) - -/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000003d) - -/* We don't use the 8259. -*/ - -#define NR_8259_INTS 0 - -#endif /* !__ASSEMBLY__ */ -#endif /* __MACH_RPX_DEFS */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/rpxlite.h b/arch/ppc/platforms/rpxlite.h deleted file mode 100644 index b615501d55fc468a047665a5881b52291638798e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/rpxlite.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the RPCG RPX-Lite board. Copied from the MBX stuff. - * - * Copyright (c) 1998 Dan Malek (dmalek@jlc.net) - */ -#ifdef __KERNEL__ -#ifndef __MACH_RPX_DEFS -#define __MACH_RPX_DEFS - - -#ifndef __ASSEMBLY__ -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in Hz */ - unsigned char bi_enetaddr[6]; - unsigned int bi_baudrate; -} bd_t; - -extern bd_t m8xx_board_info; - -/* Memory map is configured by the PROM startup. - * We just map a few things we need. The CSR is actually 4 byte-wide - * registers that can be accessed as 8-, 16-, or 32-bit values. - */ -#define RPX_CSR_ADDR ((uint)0xfa400000) -#define RPX_CSR_SIZE ((uint)(4 * 1024)) -#define IMAP_ADDR ((uint)0xfa200000) -#define IMAP_SIZE ((uint)(64 * 1024)) -#define PCMCIA_MEM_ADDR ((uint)0x04000000) -#define PCMCIA_MEM_SIZE ((uint)(64 * 1024)) -#define PCMCIA_IO_ADDR ((uint)0x04400000) -#define PCMCIA_IO_SIZE ((uint)(4 * 1024)) - -/* Things of interest in the CSR. -*/ -#define BCSR0_ETHEN ((uint)0x80000000) -#define BCSR0_ETHLPBK ((uint)0x40000000) -#define BCSR0_COLTESTDIS ((uint)0x20000000) -#define BCSR0_FULLDPLXDIS ((uint)0x10000000) -#define BCSR0_LEDOFF ((uint)0x08000000) -#define BCSR0_USBDISABLE ((uint)0x04000000) -#define BCSR0_USBHISPEED ((uint)0x02000000) -#define BCSR0_USBPWREN ((uint)0x01000000) -#define BCSR0_PCMCIAVOLT ((uint)0x000f0000) -#define BCSR0_PCMCIA3VOLT ((uint)0x000a0000) -#define BCSR0_PCMCIA5VOLT ((uint)0x00060000) - -#define BCSR1_IPB5SEL ((uint)0x00100000) -#define BCSR1_PCVCTL4 ((uint)0x00080000) -#define BCSR1_PCVCTL5 ((uint)0x00040000) -#define BCSR1_PCVCTL6 ((uint)0x00020000) -#define BCSR1_PCVCTL7 ((uint)0x00010000) - -/* define IO_BASE for pcmcia */ -#define _IO_BASE 0x80000000 -#define _IO_BASE_SIZE 0x1000 - -#ifdef CONFIG_IDE -# define MAX_HWIFS 1 -#endif - -/* CPM Ethernet through SCCx. - * - * This ENET stuff is for the MPC850 with ethernet on SCC2. Some of - * this may be unique to the RPX-Lite configuration. - * Note TENA is on Port B. - */ -#define PA_ENET_RXD ((ushort)0x0004) -#define PA_ENET_TXD ((ushort)0x0008) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PB_ENET_TENA ((uint)0x00002000) -#define PC_ENET_CLSN ((ushort)0x0040) -#define PC_ENET_RENA ((ushort)0x0080) - -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00003d00) - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* !__ASSEMBLY__ */ -#endif /* __MACH_RPX_DEFS */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c deleted file mode 100644 index b4897bdb742aaa9e1ee857642e6dea1ddf591202..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/sandpoint.c +++ /dev/null @@ -1,651 +0,0 @@ -/* - * Board setup routines for the Motorola SPS Sandpoint Test Platform. - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2000-2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * This file adds support for the Motorola SPS Sandpoint Test Platform. - * These boards have a PPMC slot for the processor so any combination - * of cpu and host bridge can be attached. This port is for an 8240 PPMC - * module from Motorola SPS and other closely related cpu/host bridge - * combinations (e.g., 750/755/7400 with MPC107 host bridge). - * The sandpoint itself has a Windbond 83c553 (PCI-ISA bridge, 2 DMA ctlrs, 2 - * cascaded 8259 interrupt ctlrs, 8254 Timer/Counter, and an IDE ctlr), a - * National 87308 (RTC, 2 UARTs, Keyboard & mouse ctlrs, and a floppy ctlr), - * and 4 PCI slots (only 2 of which are usable; the other 2 are keyed for 3.3V - * but are really 5V). - * - * The firmware on the sandpoint is called DINK (not my acronym :). This port - * depends on DINK to do some basic initialization (e.g., initialize the memory - * ctlr) and to ensure that the processor is using MAP B (CHRP map). - * - * The switch settings for the Sandpoint board MUST be as follows: - * S3: down - * S4: up - * S5: up - * S6: down - * - * 'down' is in the direction from the PCI slots towards the PPMC slot; - * 'up' is in the direction from the PPMC slot towards the PCI slots. - * Be careful, the way the sandpoint board is installed in XT chasses will - * make the directions reversed. - * - * Since Motorola listened to our suggestions for improvement, we now have - * the Sandpoint X3 board. All of the PCI slots are available, it uses - * the serial interrupt interface (just a hardware thing we need to - * configure properly). - * - * Use the default X3 switch settings. The interrupts are then: - * EPIC Source - * 0 SIOINT (8259, active low) - * 1 PCI #1 - * 2 PCI #2 - * 3 PCI #3 - * 4 PCI #4 - * 7 Winbond INTC (IDE interrupt) - * 8 Winbond INTD (IDE interrupt) - * - * - * Motorola has finally released a version of DINK32 that correctly - * (seemingly) initializes the memory controller correctly, regardless - * of the amount of memory in the system. Once a method of determining - * what version of DINK initializes the system for us, if applicable, is - * found, we can hopefully stop hardcoding 32MB of RAM. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include /* for linux/serial_core.h */ -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "sandpoint.h" - -/* Set non-zero if an X2 Sandpoint detected. */ -static int sandpoint_is_x2; - -unsigned char __res[sizeof(bd_t)]; - -static void sandpoint_halt(void); -static void sandpoint_probe_type(void); - -/* - * Define all of the IRQ senses and polarities. Taken from the - * Sandpoint X3 User's manual. - */ -static u_char sandpoint_openpic_initsenses[] __initdata = { - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 0: SIOINT */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 2: PCI Slot 1 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 3: PCI Slot 2 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 4: PCI Slot 3 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 5: PCI Slot 4 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 8: IDE (INT C) */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* 9: IDE (INT D) */ -}; - -/* - * Motorola SPS Sandpoint interrupt routing. - */ -static inline int -x3_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 16, 0, 0, 0 }, /* IDSEL 11 - i8259 on Winbond */ - { 0, 0, 0, 0 }, /* IDSEL 12 - unused */ - { 18, 21, 20, 19 }, /* IDSEL 13 - PCI slot 1 */ - { 19, 18, 21, 20 }, /* IDSEL 14 - PCI slot 2 */ - { 20, 19, 18, 21 }, /* IDSEL 15 - PCI slot 3 */ - { 21, 20, 19, 18 }, /* IDSEL 16 - PCI slot 4 */ - }; - - const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static inline int -x2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { 18, 0, 0, 0 }, /* IDSEL 11 - i8259 on Windbond */ - { 0, 0, 0, 0 }, /* IDSEL 12 - unused */ - { 16, 17, 18, 19 }, /* IDSEL 13 - PCI slot 1 */ - { 17, 18, 19, 16 }, /* IDSEL 14 - PCI slot 2 */ - { 18, 19, 16, 17 }, /* IDSEL 15 - PCI slot 3 */ - { 19, 16, 17, 18 }, /* IDSEL 16 - PCI slot 4 */ - }; - - const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __init -sandpoint_setup_winbond_83553(struct pci_controller *hose) -{ - int devfn; - - /* - * Route IDE interrupts directly to the 8259's IRQ 14 & 15. - * We can't route the IDE interrupt to PCI INTC# or INTD# because those - * woule interfere with the PMC's INTC# and INTD# lines. - */ - /* - * Winbond Fcn 0 - */ - devfn = PCI_DEVFN(11,0); - - early_write_config_byte(hose, - 0, - devfn, - 0x43, /* IDE Interrupt Routing Control */ - 0xef); - early_write_config_word(hose, - 0, - devfn, - 0x44, /* PCI Interrupt Routing Control */ - 0x0000); - - /* Want ISA memory cycles to be forwarded to PCI bus */ - early_write_config_byte(hose, - 0, - devfn, - 0x48, /* ISA-to-PCI Addr Decoder Control */ - 0xf0); - - /* Enable Port 92. */ - early_write_config_byte(hose, - 0, - devfn, - 0x4e, /* AT System Control Register */ - 0x06); - /* - * Winbond Fcn 1 - */ - devfn = PCI_DEVFN(11,1); - - /* Put IDE controller into native mode. */ - early_write_config_byte(hose, - 0, - devfn, - 0x09, /* Programming interface Register */ - 0x8f); - - /* Init IRQ routing, enable both ports, disable fast 16 */ - early_write_config_dword(hose, - 0, - devfn, - 0x40, /* IDE Control/Status Register */ - 0x00ff0011); - return; -} - -/* On the sandpoint X2, we must avoid sending configuration cycles to - * device #12 (IDSEL addr = AD12). - */ -static int -x2_exclude_device(u_char bus, u_char devfn) -{ - if ((bus == 0) && (PCI_SLOT(devfn) == SANDPOINT_HOST_BRIDGE_IDSEL)) - return PCIBIOS_DEVICE_NOT_FOUND; - else - return PCIBIOS_SUCCESSFUL; -} - -static void __init -sandpoint_find_bridges(void) -{ - struct pci_controller *hose; - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - if (mpc10x_bridge_init(hose, - MPC10X_MEM_MAP_B, - MPC10X_MEM_MAP_B, - MPC10X_MAPB_EUMB_BASE) == 0) { - - /* Do early winbond init, then scan PCI bus */ - sandpoint_setup_winbond_83553(hose); - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pcibios_fixup = NULL; - ppc_md.pcibios_fixup_bus = NULL; - ppc_md.pci_swizzle = common_swizzle; - if (sandpoint_is_x2) { - ppc_md.pci_map_irq = x2_map_irq; - ppc_md.pci_exclude_device = x2_exclude_device; - } else - ppc_md.pci_map_irq = x3_map_irq; - } - else { - if (ppc_md.progress) - ppc_md.progress("Bridge init failed", 0x100); - printk("Host bridge init failed\n"); - } - - return; -} - -static void __init -sandpoint_setup_arch(void) -{ - /* Probe for Sandpoint model */ - sandpoint_probe_type(); - if (sandpoint_is_x2) - epic_serial_mode = 0; - - loops_per_jiffy = 100000000 / HZ; - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_HDA1; -#endif - - /* Lookup PCI host bridges */ - sandpoint_find_bridges(); - - if (strncmp (cur_ppc_sys_spec->ppc_sys_name, "8245", 4) == 0) - { - bd_t *bp = (bd_t *)__res; - struct plat_serial8250_port *pdata; - - pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART0); - if (pdata) - { - pdata[0].uartclk = bp->bi_busfreq; - } - -#ifdef CONFIG_SANDPOINT_ENABLE_UART1 - pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART1); - if (pdata) - { - pdata[0].uartclk = bp->bi_busfreq; - } -#else - ppc_sys_device_remove(MPC10X_UART1); -#endif - } - - printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n"); - printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n"); - - /* DINK32 12.3 and below do not correctly enable any caches. - * We will do this now with good known values. Future versions - * of DINK32 are supposed to get this correct. - */ - if (cpu_has_feature(CPU_FTR_SPEC7450)) - /* 745x is different. We only want to pass along enable. */ - _set_L2CR(L2CR_L2E); - else if (cpu_has_feature(CPU_FTR_L2CR)) - /* All modules have 1MB of L2. We also assume that an - * L2 divisor of 3 will work. - */ - _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3 - | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF); -#if 0 - /* Untested right now. */ - if (cpu_has_feature(CPU_FTR_L3CR)) { - /* Magic value. */ - _set_L3CR(0x8f032000); - } -#endif -} - -#define SANDPOINT_87308_CFG_ADDR 0x15c -#define SANDPOINT_87308_CFG_DATA 0x15d - -#define SANDPOINT_87308_CFG_INB(addr, byte) { \ - outb((addr), SANDPOINT_87308_CFG_ADDR); \ - (byte) = inb(SANDPOINT_87308_CFG_DATA); \ -} - -#define SANDPOINT_87308_CFG_OUTB(addr, byte) { \ - outb((addr), SANDPOINT_87308_CFG_ADDR); \ - outb((byte), SANDPOINT_87308_CFG_DATA); \ -} - -#define SANDPOINT_87308_SELECT_DEV(dev_num) { \ - SANDPOINT_87308_CFG_OUTB(0x07, (dev_num)); \ -} - -#define SANDPOINT_87308_DEV_ENABLE(dev_num) { \ - SANDPOINT_87308_SELECT_DEV(dev_num); \ - SANDPOINT_87308_CFG_OUTB(0x30, 0x01); \ -} - -/* - * To probe the Sandpoint type, we need to check for a connection between GPIO - * pins 6 and 7 on the NS87308 SuperIO. - */ -static void __init sandpoint_probe_type(void) -{ - u8 x; - /* First, ensure that the GPIO pins are enabled. */ - SANDPOINT_87308_SELECT_DEV(0x07); /* Select GPIO logical device */ - SANDPOINT_87308_CFG_OUTB(0x60, 0x07); /* Base address 0x700 */ - SANDPOINT_87308_CFG_OUTB(0x61, 0x00); - SANDPOINT_87308_CFG_OUTB(0x30, 0x01); /* Enable */ - - /* Now, set pin 7 to output and pin 6 to input. */ - outb((inb(0x701) | 0x80) & 0xbf, 0x701); - /* Set push-pull output */ - outb(inb(0x702) | 0x80, 0x702); - /* Set pull-up on input */ - outb(inb(0x703) | 0x40, 0x703); - /* Set output high and check */ - x = inb(0x700); - outb(x | 0x80, 0x700); - x = inb(0x700); - sandpoint_is_x2 = ! (x & 0x40); - if (ppc_md.progress && sandpoint_is_x2) - ppc_md.progress("High output says X2", 0); - /* Set output low and check */ - outb(x & 0x7f, 0x700); - sandpoint_is_x2 |= inb(0x700) & 0x40; - if (ppc_md.progress && sandpoint_is_x2) - ppc_md.progress("Low output says X2", 0); - if (ppc_md.progress && ! sandpoint_is_x2) - ppc_md.progress("Sandpoint is X3", 0); -} - -/* - * Fix IDE interrupts. - */ -static int __init -sandpoint_fix_winbond_83553(void) -{ - /* Make some 8259 interrupt level sensitive */ - outb(0xe0, 0x4d0); - outb(0xde, 0x4d1); - - return 0; -} - -arch_initcall(sandpoint_fix_winbond_83553); - -/* - * Initialize the ISA devices on the Nat'l PC87308VUL SuperIO chip. - */ -static int __init -sandpoint_setup_natl_87308(void) -{ - u_char reg; - - /* - * Enable all the devices on the Super I/O chip. - */ - SANDPOINT_87308_SELECT_DEV(0x00); /* Select kbd logical device */ - SANDPOINT_87308_CFG_OUTB(0xf0, 0x00); /* Set KBC clock to 8 Mhz */ - SANDPOINT_87308_DEV_ENABLE(0x00); /* Enable keyboard */ - SANDPOINT_87308_DEV_ENABLE(0x01); /* Enable mouse */ - SANDPOINT_87308_DEV_ENABLE(0x02); /* Enable rtc */ - SANDPOINT_87308_DEV_ENABLE(0x03); /* Enable fdc (floppy) */ - SANDPOINT_87308_DEV_ENABLE(0x04); /* Enable parallel */ - SANDPOINT_87308_DEV_ENABLE(0x05); /* Enable UART 2 */ - SANDPOINT_87308_CFG_OUTB(0xf0, 0x82); /* Enable bank select regs */ - SANDPOINT_87308_DEV_ENABLE(0x06); /* Enable UART 1 */ - SANDPOINT_87308_CFG_OUTB(0xf0, 0x82); /* Enable bank select regs */ - - /* Set up floppy in PS/2 mode */ - outb(0x09, SIO_CONFIG_RA); - reg = inb(SIO_CONFIG_RD); - reg = (reg & 0x3F) | 0x40; - outb(reg, SIO_CONFIG_RD); - outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */ - - return 0; -} - -arch_initcall(sandpoint_setup_natl_87308); - -static int __init -sandpoint_request_io(void) -{ - request_region(0x00,0x20,"dma1"); - request_region(0x20,0x20,"pic1"); - request_region(0x40,0x20,"timer"); - request_region(0x80,0x10,"dma page reg"); - request_region(0xa0,0x20,"pic2"); - request_region(0xc0,0x20,"dma2"); - - return 0; -} - -arch_initcall(sandpoint_request_io); - -/* - * Interrupt setup and service. Interrupts on the Sandpoint come - * from the four PCI slots plus the 8259 in the Winbond Super I/O (SIO). - * The 8259 is cascaded from EPIC IRQ0, IRQ1-4 map to PCI slots 1-4, - * IDE is on EPIC 7 and 8. - */ -static void __init -sandpoint_init_IRQ(void) -{ - int i; - - OpenPIC_InitSenses = sandpoint_openpic_initsenses; - OpenPIC_NumInitSenses = sizeof(sandpoint_openpic_initsenses); - - mpc10x_set_openpic(); - openpic_hookup_cascade(sandpoint_is_x2 ? 17 : NUM_8259_INTERRUPTS, "82c59 cascade", - i8259_irq); - - /* - * The EPIC allows for a read in the range of 0xFEF00000 -> - * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. - */ - i8259_init(0xfef00000, 0); -} - -static unsigned long __init -sandpoint_find_end_of_memory(void) -{ - bd_t *bp = (bd_t *)__res; - - if (bp->bi_memsize) - return bp->bi_memsize; - - /* DINK32 13.0 correctly initializes things, so iff you use - * this you _should_ be able to change this instead of a - * hardcoded value. */ -#if 0 - return mpc10x_get_mem_size(MPC10X_MEM_MAP_B); -#else - return 32*1024*1024; -#endif -} - -static void __init -sandpoint_map_io(void) -{ - io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO); -} - -static void -sandpoint_restart(char *cmd) -{ - local_irq_disable(); - - /* Set exception prefix high - to the firmware */ - _nmask_and_or_msr(0, MSR_IP); - - /* Reset system via Port 92 */ - outb(0x00, 0x92); - outb(0x01, 0x92); - for(;;); /* Spin until reset happens */ -} - -static void -sandpoint_power_off(void) -{ - local_irq_disable(); - for(;;); /* No way to shut power off with software */ - /* NOTREACHED */ -} - -static void -sandpoint_halt(void) -{ - sandpoint_power_off(); - /* NOTREACHED */ -} - -static int -sandpoint_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: Motorola SPS\n"); - seq_printf(m, "machine\t\t: Sandpoint\n"); - - return 0; -} - -/* - * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1. - */ -static __inline__ void -sandpoint_set_bat(void) -{ - unsigned long bat3u, bat3l; - - __asm__ __volatile__( - " lis %0,0xf800\n \ - ori %1,%0,0x002a\n \ - ori %0,%0,0x0ffe\n \ - mtspr 0x21e,%0\n \ - mtspr 0x21f,%1\n \ - isync\n \ - sync " - : "=r" (bat3u), "=r" (bat3l)); -} - -TODC_ALLOC(); - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer) - * are non-zero, then we should use the board info from the bd_t - * structure and the cmdline pointed to by r6 instead of the - * information from birecs, if any. Otherwise, use the information - * from birecs as discovered by the preceding call to - * parse_bootinfo(). This rule should work with both PPCBoot, which - * uses a bd_t board info structure, and the kernel boot wrapper, - * which uses birecs. - */ - if (r3 && r6) { - /* copy board info structure */ - memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); - /* copy command line */ - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - /* Map in board regs, etc. */ - sandpoint_set_bat(); - - isa_io_base = MPC10X_MAPB_ISA_IO_BASE; - isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE; - pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET; - ISA_DMA_THRESHOLD = 0x00ffffff; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - ppc_do_canonicalize_irqs = 1; - - ppc_md.setup_arch = sandpoint_setup_arch; - ppc_md.show_cpuinfo = sandpoint_show_cpuinfo; - ppc_md.init_IRQ = sandpoint_init_IRQ; - ppc_md.get_irq = openpic_get_irq; - - ppc_md.restart = sandpoint_restart; - ppc_md.power_off = sandpoint_power_off; - ppc_md.halt = sandpoint_halt; - - ppc_md.find_end_of_memory = sandpoint_find_end_of_memory; - ppc_md.setup_io_mappings = sandpoint_map_io; - - TODC_INIT(TODC_TYPE_PC97307, 0x70, 0x00, 0x71, 8); - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = todc_calibrate_decr; - - ppc_md.nvram_read_val = todc_mc146818_read_val; - ppc_md.nvram_write_val = todc_mc146818_write_val; - -#ifdef CONFIG_KGDB - ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; -#endif -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif -} diff --git a/arch/ppc/platforms/sandpoint.h b/arch/ppc/platforms/sandpoint.h deleted file mode 100644 index ed83759e4044bc909267cb923af3d1406d29d731..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/sandpoint.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Definitions for Motorola SPS Sandpoint Test Platform - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2000-2003 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * Sandpoint uses the CHRP map (Map B). - */ - -#ifndef __PPC_PLATFORMS_SANDPOINT_H -#define __PPC_PLATFORMS_SANDPOINT_H - -#include - -#if 0 -/* The Sandpoint X3 allows the IDE interrupt to be directly connected - * from the Windbond (PCI INTC or INTD) to the serial EPIC. Someday - * we should try this, but it was easier to use the existing 83c553 - * initialization than change it to route the different interrupts :-). - * -- Dan - */ -#define SANDPOINT_IDE_INT0 23 /* EPIC 7 */ -#define SANDPOINT_IDE_INT1 24 /* EPIC 8 */ -#endif - -/* - * The sandpoint boards have processor modules that either have an 8240 or - * an MPC107 host bridge on them. These bridges have an IDSEL line that allows - * them to respond to PCI transactions as if they were a normal PCI devices. - * However, the processor on the processor side of the bridge can not reach - * out onto the PCI bus and then select the bridge or bad things will happen - * (documented in the 8240 and 107 manuals). - * Because of this, we always skip the bridge PCI device when accessing the - * PCI bus. The PCI slot that the bridge occupies is defined by the macro - * below. - */ -#define SANDPOINT_HOST_BRIDGE_IDSEL 12 - -/* - * Serial defines. - */ -#define SANDPOINT_SERIAL_0 0xfe0003f8 -#define SANDPOINT_SERIAL_1 0xfe0002f8 - -#define RS_TABLE_SIZE 2 - -/* Rate for the 1.8432 Mhz clock for the onboard serial chip */ -#define BASE_BAUD ( 1843200 / 16 ) -#define UART_CLK 1843200 - -#ifdef CONFIG_SERIAL_DETECT_IRQ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ) -#else -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF) -#endif - -#define STD_SERIAL_PORT_DFNS \ - { 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \ - iomem_base: (u8 *)SANDPOINT_SERIAL_0, \ - io_type: SERIAL_IO_MEM }, \ - { 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \ - iomem_base: (u8 *)SANDPOINT_SERIAL_1, \ - io_type: SERIAL_IO_MEM }, - -#define SERIAL_PORT_DFNS \ - STD_SERIAL_PORT_DFNS - -#endif /* __PPC_PLATFORMS_SANDPOINT_H */ diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c deleted file mode 100644 index 24f6e0694ac1499d5e28dba98772ac4bb17fe94e..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/sbc82xx.c +++ /dev/null @@ -1,256 +0,0 @@ -/* - * SBC82XX platform support - * - * Author: Guy Streeter - * - * Derived from: est8260_setup.c by Allen Curtis, ONZ - * - * Copyright 2004 Red Hat, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -static void (*callback_init_IRQ)(void); - -extern unsigned char __res[sizeof(bd_t)]; - -#ifdef CONFIG_GEN_RTC -TODC_ALLOC(); - -/* - * Timer init happens before mem_init but after paging init, so we cannot - * directly use ioremap() at that time. - * late_time_init() is call after paging init. - */ - -static void sbc82xx_time_init(void) -{ - volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl; - - /* Set up CS11 for RTC chip */ - mc->memc_br11=0; - mc->memc_or11=0xffff0836; - mc->memc_br11=SBC82xx_TODC_NVRAM_ADDR | 0x0801; - - TODC_INIT(TODC_TYPE_MK48T59, 0, 0, SBC82xx_TODC_NVRAM_ADDR, 0); - - todc_info->nvram_data = - (unsigned int)ioremap(todc_info->nvram_data, 0x2000); - BUG_ON(!todc_info->nvram_data); - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - todc_time_init(); -} -#endif /* CONFIG_GEN_RTC */ - -static volatile char *sbc82xx_i8259_map; -static char sbc82xx_i8259_mask = 0xff; -static DEFINE_SPINLOCK(sbc82xx_i8259_lock); - -static void sbc82xx_i8259_mask_and_ack_irq(unsigned int irq_nr) -{ - unsigned long flags; - - irq_nr -= NR_SIU_INTS; - - spin_lock_irqsave(&sbc82xx_i8259_lock, flags); - sbc82xx_i8259_mask |= 1 << irq_nr; - (void) sbc82xx_i8259_map[1]; /* Dummy read */ - sbc82xx_i8259_map[1] = sbc82xx_i8259_mask; - sbc82xx_i8259_map[0] = 0x20; /* OCW2: Non-specific EOI */ - spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags); -} - -static void sbc82xx_i8259_mask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - irq_nr -= NR_SIU_INTS; - - spin_lock_irqsave(&sbc82xx_i8259_lock, flags); - sbc82xx_i8259_mask |= 1 << irq_nr; - sbc82xx_i8259_map[1] = sbc82xx_i8259_mask; - spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags); -} - -static void sbc82xx_i8259_unmask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - irq_nr -= NR_SIU_INTS; - - spin_lock_irqsave(&sbc82xx_i8259_lock, flags); - sbc82xx_i8259_mask &= ~(1 << irq_nr); - sbc82xx_i8259_map[1] = sbc82xx_i8259_mask; - spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags); -} - -static void sbc82xx_i8259_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && irq_desc[irq].action) - sbc82xx_i8259_unmask_irq(irq); -} - - -struct hw_interrupt_type sbc82xx_i8259_ic = { - .typename = " i8259 ", - .enable = sbc82xx_i8259_unmask_irq, - .disable = sbc82xx_i8259_mask_irq, - .ack = sbc82xx_i8259_mask_and_ack_irq, - .end = sbc82xx_i8259_end_irq, -}; - -static irqreturn_t sbc82xx_i8259_demux(int dummy, void *dev_id) -{ - int irq; - - spin_lock(&sbc82xx_i8259_lock); - - sbc82xx_i8259_map[0] = 0x0c; /* OCW3: Read IR register on RD# pulse */ - irq = sbc82xx_i8259_map[0] & 7; /* Read IRR */ - - if (irq == 7) { - /* Possible spurious interrupt */ - int isr; - sbc82xx_i8259_map[0] = 0x0b; /* OCW3: Read IS register on RD# pulse */ - isr = sbc82xx_i8259_map[0]; /* Read ISR */ - - if (!(isr & 0x80)) { - printk(KERN_INFO "Spurious i8259 interrupt\n"); - return IRQ_HANDLED; - } - } - __do_IRQ(NR_SIU_INTS + irq); - return IRQ_HANDLED; -} - -static struct irqaction sbc82xx_i8259_irqaction = { - .handler = sbc82xx_i8259_demux, - .flags = IRQF_DISABLED, - .mask = CPU_MASK_NONE, - .name = "i8259 demux", -}; - -void __init sbc82xx_init_IRQ(void) -{ - volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl; - volatile intctl_cpm2_t *ic = &cpm2_immr->im_intctl; - int i; - - callback_init_IRQ(); - - /* u-boot doesn't always set the board up correctly */ - mc->memc_br5 = 0; - mc->memc_or5 = 0xfff00856; - mc->memc_br5 = 0x22000801; - - sbc82xx_i8259_map = ioremap(0x22008000, 2); - if (!sbc82xx_i8259_map) { - printk(KERN_CRIT "Mapping i8259 interrupt controller failed\n"); - return; - } - - /* Set up the interrupt handlers for the i8259 IRQs */ - for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) { - irq_desc[i].chip = &sbc82xx_i8259_ic; - irq_desc[i].status |= IRQ_LEVEL; - } - - /* make IRQ6 level sensitive */ - ic->ic_siexr &= ~(1 << (14 - (SIU_INT_IRQ6 - SIU_INT_IRQ1))); - irq_desc[SIU_INT_IRQ6].status |= IRQ_LEVEL; - - /* Initialise the i8259 */ - sbc82xx_i8259_map[0] = 0x1b; /* ICW1: Level, no cascade, ICW4 */ - sbc82xx_i8259_map[1] = 0x00; /* ICW2: vector base */ - /* No ICW3 (no cascade) */ - sbc82xx_i8259_map[1] = 0x01; /* ICW4: 8086 mode, normal EOI */ - - sbc82xx_i8259_map[0] = 0x0b; /* OCW3: Read IS register on RD# pulse */ - - sbc82xx_i8259_map[1] = sbc82xx_i8259_mask; /* Set interrupt mask */ - - /* Request cascade IRQ */ - if (setup_irq(SIU_INT_IRQ6, &sbc82xx_i8259_irqaction)) { - printk("Installation of i8259 IRQ demultiplexer failed.\n"); - } -} - -static int sbc82xx_pci_map_irq(struct pci_dev *dev, unsigned char idsel, - unsigned char pin) -{ - static char pci_irq_table[][4] = { - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { SBC82xx_PIRQA, SBC82xx_PIRQB, SBC82xx_PIRQC, SBC82xx_PIRQD }, /* IDSEL 16 - PMC slot */ - { SBC82xx_PC_IRQA, SBC82xx_PC_IRQB, -1, -1 }, /* IDSEL 17 - CardBus */ - { SBC82xx_PIRQA, SBC82xx_PIRQB, SBC82xx_PIRQC, SBC82xx_PIRQD }, /* IDSEL 18 - PCI-X bridge */ - }; - - const long min_idsel = 16, max_idsel = 18, irqs_per_slot = 4; - - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __devinit quirk_sbc8260_cardbus(struct pci_dev *pdev) -{ - uint32_t ctrl; - - if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(17, 0)) - return; - - printk(KERN_INFO "Setting up CardBus controller\n"); - - /* Set P2CCLK bit in System Control Register */ - pci_read_config_dword(pdev, 0x80, &ctrl); - ctrl |= (1<<27); - pci_write_config_dword(pdev, 0x80, ctrl); - - /* Set MFUNC up for PCI IRQ routing via INTA and INTB, and LEDs. */ - pci_write_config_dword(pdev, 0x8c, 0x00c01d22); - -} -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, quirk_sbc8260_cardbus); - -void __init -m82xx_board_init(void) -{ - /* u-boot may be using one of the FCC Ethernet devices. - Use the MAC address to the SCC. */ - __res[offsetof(bd_t, bi_enetaddr[5])] &= ~3; - - /* Anything special for this platform */ - callback_init_IRQ = ppc_md.init_IRQ; - - ppc_md.init_IRQ = sbc82xx_init_IRQ; - ppc_md.pci_map_irq = sbc82xx_pci_map_irq; -#ifdef CONFIG_GEN_RTC - ppc_md.time_init = NULL; - ppc_md.get_rtc_time = NULL; - ppc_md.set_rtc_time = NULL; - ppc_md.nvram_read_val = NULL; - ppc_md.nvram_write_val = NULL; - late_time_init = sbc82xx_time_init; -#endif /* CONFIG_GEN_RTC */ -} diff --git a/arch/ppc/platforms/sbc82xx.h b/arch/ppc/platforms/sbc82xx.h deleted file mode 100644 index e4042d4995f6177400f5be0787b29b5e108d97a4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/sbc82xx.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Board information for the SBCPowerQUICCII, which should be generic for - * all 8260 boards. The IMMR is now given to us so the hard define - * will soon be removed. All of the clock values are computed from - * the configuration SCMR and the Power-On-Reset word. - */ - -#ifndef __PPC_SBC82xx_H__ -#define __PPC_SBC82xx_H__ - -#include - -#define CPM_MAP_ADDR 0xf0000000 - -#define SBC82xx_TODC_NVRAM_ADDR 0xd0000000 - -#define SBC82xx_MACADDR_NVRAM_FCC1 0x220000c9 /* JP6B */ -#define SBC82xx_MACADDR_NVRAM_SCC1 0x220000cf /* JP6A */ -#define SBC82xx_MACADDR_NVRAM_FCC2 0x220000d5 /* JP7A */ -#define SBC82xx_MACADDR_NVRAM_FCC3 0x220000db /* JP7B */ - -/* For our show_cpuinfo hooks. */ -#define CPUINFO_VENDOR "Wind River" -#define CPUINFO_MACHINE "SBC PowerQUICC II" - -#define BOOTROM_RESTART_ADDR ((uint)0x40000104) - -#define SBC82xx_PC_IRQA (NR_SIU_INTS+0) -#define SBC82xx_PC_IRQB (NR_SIU_INTS+1) -#define SBC82xx_MPC185_IRQ (NR_SIU_INTS+2) -#define SBC82xx_ATM_IRQ (NR_SIU_INTS+3) -#define SBC82xx_PIRQA (NR_SIU_INTS+4) -#define SBC82xx_PIRQB (NR_SIU_INTS+5) -#define SBC82xx_PIRQC (NR_SIU_INTS+6) -#define SBC82xx_PIRQD (NR_SIU_INTS+7) - -#endif /* __PPC_SBC82xx_H__ */ diff --git a/arch/ppc/platforms/sbs8260.h b/arch/ppc/platforms/sbs8260.h deleted file mode 100644 index d51427a0f0d477e7fff05069bd6afd0485306f95..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/sbs8260.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ASSEMBLY__ -/* Board information for various SBS 8260 cards, which should be generic for - * all 8260 boards. The IMMR is now given to us so the hard define - * will soon be removed. All of the clock values are computed from - * the configuration SCMR and the Power-On-Reset word. - */ - -#define CPM_MAP_ADDR ((uint)0xfe000000) - - -/* A Board Information structure that is given to a program when - * prom starts it up. - */ -typedef struct bd_info { - unsigned int bi_memstart; /* Memory start address */ - unsigned int bi_memsize; /* Memory (end) size in bytes */ - unsigned int bi_intfreq; /* Internal Freq, in Hz */ - unsigned int bi_busfreq; /* Bus Freq, in MHz */ - unsigned int bi_cpmfreq; /* CPM Freq, in MHz */ - unsigned int bi_brgfreq; /* BRG Freq, in MHz */ - unsigned int bi_vco; /* VCO Out from PLL */ - unsigned int bi_baudrate; /* Default console baud rate */ - unsigned int bi_immr; /* IMMR when called from boot rom */ - unsigned char bi_enetaddr[6]; -} bd_t; - -extern bd_t m8xx_board_info; -#endif /* !__ASSEMBLY__ */ diff --git a/arch/ppc/platforms/spruce.c b/arch/ppc/platforms/spruce.c deleted file mode 100644 index a344134f14b8588bbb073cd426fe1cf328e8741a..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/spruce.c +++ /dev/null @@ -1,322 +0,0 @@ -/* - * Board and PCI setup routines for IBM Spruce - * - * Author: MontaVista Software - * - * 2000-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "spruce.h" - -static inline int -spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {23, 24, 25, 26}, /* IDSEL 1 - PCI slot 3 */ - {24, 25, 26, 23}, /* IDSEL 2 - PCI slot 2 */ - {25, 26, 23, 24}, /* IDSEL 3 - PCI slot 1 */ - {26, 23, 24, 25}, /* IDSEL 4 - PCI slot 0 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void __init -spruce_setup_hose(void) -{ - struct pci_controller *hose; - - /* Setup hose */ - hose = pcibios_alloc_controller(); - if (!hose) - return; - - hose->first_busno = 0; - hose->last_busno = 0xff; - - pci_init_resource(&hose->io_resource, - SPRUCE_PCI_LOWER_IO, - SPRUCE_PCI_UPPER_IO, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource(&hose->mem_resources[0], - SPRUCE_PCI_LOWER_MEM, - SPRUCE_PCI_UPPER_MEM, - IORESOURCE_MEM, - "PCI host bridge"); - - hose->io_space.start = SPRUCE_PCI_LOWER_IO; - hose->io_space.end = SPRUCE_PCI_UPPER_IO; - hose->mem_space.start = SPRUCE_PCI_LOWER_MEM; - hose->mem_space.end = SPRUCE_PCI_UPPER_MEM; - hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE; - - setup_indirect_pci(hose, - SPRUCE_PCI_CONFIG_ADDR, - SPRUCE_PCI_CONFIG_DATA); - - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = spruce_map_irq; -} - -/* - * CPC700 PIC interrupt programming table - * - * First entry is the sensitivity (level/edge), second is the polarity. - */ -unsigned int cpc700_irq_assigns[32][2] = { - { 1, 1 }, /* IRQ 0: ECC Correctable Error - rising edge */ - { 1, 1 }, /* IRQ 1: PCI Write Mem Range - rising edge */ - { 0, 1 }, /* IRQ 2: PCI Write Command Reg - active high */ - { 0, 1 }, /* IRQ 3: UART 0 - active high */ - { 0, 1 }, /* IRQ 4: UART 1 - active high */ - { 0, 1 }, /* IRQ 5: ICC 0 - active high */ - { 0, 1 }, /* IRQ 6: ICC 1 - active high */ - { 0, 1 }, /* IRQ 7: GPT Compare 0 - active high */ - { 0, 1 }, /* IRQ 8: GPT Compare 1 - active high */ - { 0, 1 }, /* IRQ 9: GPT Compare 2 - active high */ - { 0, 1 }, /* IRQ 10: GPT Compare 3 - active high */ - { 0, 1 }, /* IRQ 11: GPT Compare 4 - active high */ - { 0, 1 }, /* IRQ 12: GPT Capture 0 - active high */ - { 0, 1 }, /* IRQ 13: GPT Capture 1 - active high */ - { 0, 1 }, /* IRQ 14: GPT Capture 2 - active high */ - { 0, 1 }, /* IRQ 15: GPT Capture 3 - active high */ - { 0, 1 }, /* IRQ 16: GPT Capture 4 - active high */ - { 0, 0 }, /* IRQ 17: Reserved */ - { 0, 0 }, /* IRQ 18: Reserved */ - { 0, 0 }, /* IRQ 19: Reserved */ - { 0, 1 }, /* IRQ 20: FPGA EXT_IRQ0 - active high */ - { 1, 1 }, /* IRQ 21: Mouse - rising edge */ - { 1, 1 }, /* IRQ 22: Keyboard - rising edge */ - { 0, 0 }, /* IRQ 23: PCI Slot 3 - active low */ - { 0, 0 }, /* IRQ 24: PCI Slot 2 - active low */ - { 0, 0 }, /* IRQ 25: PCI Slot 1 - active low */ - { 0, 0 }, /* IRQ 26: PCI Slot 0 - active low */ -}; - -static void __init -spruce_calibrate_decr(void) -{ - int freq, divisor = 4; - - /* determine processor bus speed */ - freq = SPRUCE_BUS_SPEED; - tb_ticks_per_jiffy = freq / HZ / divisor; - tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000); -} - -static int -spruce_show_cpuinfo(struct seq_file *m) -{ - seq_printf(m, "vendor\t\t: IBM\n"); - seq_printf(m, "machine\t\t: Spruce\n"); - - return 0; -} - -static void __init -spruce_early_serial_map(void) -{ - u32 uart_clk; - struct uart_port serial_req; - - if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A))) - uart_clk = SPRUCE_BAUD_33M * 16; - else - uart_clk = SPRUCE_BAUD_30M * 16; - - /* Setup serial port access */ - memset(&serial_req, 0, sizeof(serial_req)); - serial_req.uartclk = uart_clk; - serial_req.irq = UART0_INT; - serial_req.flags = UPF_BOOT_AUTOCONF; - serial_req.iotype = UPIO_MEM; - serial_req.membase = (u_char *)UART0_IO_BASE; - serial_req.regshift = 0; - -#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG) - gen550_init(0, &serial_req); -#endif -#ifdef CONFIG_SERIAL_8250 - if (early_serial_setup(&serial_req) != 0) - printk("Early serial init of port 0 failed\n"); -#endif - - /* Assume early_serial_setup() doesn't modify serial_req */ - serial_req.line = 1; - serial_req.irq = UART1_INT; - serial_req.membase = (u_char *)UART1_IO_BASE; - -#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG) - gen550_init(1, &serial_req); -#endif -#ifdef CONFIG_SERIAL_8250 - if (early_serial_setup(&serial_req) != 0) - printk("Early serial init of port 1 failed\n"); -#endif -} - -TODC_ALLOC(); - -static void __init -spruce_setup_arch(void) -{ - /* Setup TODC access */ - TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8); - - /* init to some ~sane value until calibrate_delay() runs */ - loops_per_jiffy = 50000000 / HZ; - - /* Setup PCI host bridge */ - spruce_setup_hose(); - -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif -#ifdef CONFIG_ROOT_NFS - ROOT_DEV = Root_NFS; -#else - ROOT_DEV = Root_SDA1; -#endif - - /* Identify the system */ - printk(KERN_INFO "System Identification: IBM Spruce\n"); - printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n"); -} - -static void -spruce_restart(char *cmd) -{ - local_irq_disable(); - - /* SRR0 has system reset vector, SRR1 has default MSR value */ - /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */ - __asm__ __volatile__ - ("\n\ - lis 3,0xfff0 \n\ - ori 3,3,0x0100 \n\ - mtspr 26,3 \n\ - li 3,0 \n\ - mtspr 27,3 \n\ - rfi \n\ - "); - for(;;); -} - -static void -spruce_power_off(void) -{ - for(;;); -} - -static void -spruce_halt(void) -{ - spruce_restart(NULL); -} - -static void __init -spruce_map_io(void) -{ - io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE, - 0x08000000, _PAGE_IO); -} - -/* - * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1. - */ -static __inline__ void -spruce_set_bat(void) -{ - mb(); - mtspr(SPRN_DBAT1U, 0xf8000ffe); - mtspr(SPRN_DBAT1L, 0xf800002a); - mb(); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* Map in board regs, etc. */ - spruce_set_bat(); - - isa_io_base = SPRUCE_ISA_IO_BASE; - pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE; - - ppc_md.setup_arch = spruce_setup_arch; - ppc_md.show_cpuinfo = spruce_show_cpuinfo; - ppc_md.init_IRQ = cpc700_init_IRQ; - ppc_md.get_irq = cpc700_get_irq; - - ppc_md.setup_io_mappings = spruce_map_io; - - ppc_md.restart = spruce_restart; - ppc_md.power_off = spruce_power_off; - ppc_md.halt = spruce_halt; - - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.calibrate_decr = spruce_calibrate_decr; - - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; - - spruce_early_serial_map(); - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#ifdef CONFIG_KGDB - ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; -#endif -} diff --git a/arch/ppc/platforms/spruce.h b/arch/ppc/platforms/spruce.h deleted file mode 100644 index f1f96f1de72a088f4f6be118ad046ee16ba8a7c4..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/spruce.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * arch/ppc/platforms/spruce.h - * - * Definitions for IBM Spruce reference board support - * - * Authors: Matt Porter and Johnnie Peters - * mporter@mvista.com - * jpeters@mvista.com - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_SPRUCE_H__ -#define __ASM_SPRUCE_H__ - -#define SPRUCE_PCI_CONFIG_ADDR 0xfec00000 -#define SPRUCE_PCI_CONFIG_DATA 0xfec00004 - -#define SPRUCE_PCI_PHY_IO_BASE 0xf8000000 -#define SPRUCE_PCI_IO_BASE SPRUCE_PCI_PHY_IO_BASE - -#define SPRUCE_PCI_SYS_MEM_BASE 0x00000000 - -#define SPRUCE_PCI_LOWER_MEM 0x80000000 -#define SPRUCE_PCI_UPPER_MEM 0x9fffffff -#define SPRUCE_PCI_LOWER_IO 0x00000000 -#define SPRUCE_PCI_UPPER_IO 0x03ffffff - -#define SPRUCE_ISA_IO_BASE SPRUCE_PCI_IO_BASE - -#define SPRUCE_MEM_SIZE 0x04000000 -#define SPRUCE_BUS_SPEED 66666667 - -#define SPRUCE_NVRAM_BASE_ADDR 0xff800000 -#define SPRUCE_RTC_BASE_ADDR SPRUCE_NVRAM_BASE_ADDR - -/* - * Serial port defines - */ -#define SPRUCE_FPGA_REG_A 0xff820000 -#define SPRUCE_UARTCLK_33M 0x02 -#define SPRUCE_UARTCLK_IS_33M(reg) (reg & SPRUCE_UARTCLK_33M) - -#define UART0_IO_BASE 0xff600300 -#define UART1_IO_BASE 0xff600400 - -#define RS_TABLE_SIZE 2 - -#define SPRUCE_BAUD_33M (33000000/64) -#define SPRUCE_BAUD_30M (30000000/64) -#define BASE_BAUD SPRUCE_BAUD_33M - -#define UART0_INT 3 -#define UART1_INT 4 - -#define STD_UART_OP(num) \ - { 0, BASE_BAUD, 0, UART##num##_INT, \ - ASYNC_BOOT_AUTOCONF, \ - iomem_base: (unsigned char *) UART##num##_IO_BASE, \ - io_type: SERIAL_IO_MEM}, - -#define SERIAL_PORT_DFNS \ - STD_UART_OP(0) \ - STD_UART_OP(1) - -#endif /* __ASM_SPRUCE_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/tqm8260.h b/arch/ppc/platforms/tqm8260.h deleted file mode 100644 index 7f8c9a6928f89607b8753f10487339bbedbdcbe3..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/tqm8260.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * TQM8260 board specific definitions - * - * Copyright (c) 2001 Wolfgang Denk (wd@denx.de) - */ - -#ifndef __TQM8260_PLATFORM -#define __TQM8260_PLATFORM - - -#include - -#define CPM_MAP_ADDR ((uint)0xFFF00000) -#define PHY_INTERRUPT 25 - -/* For our show_cpuinfo hooks. */ -#define CPUINFO_VENDOR "IN2 Systems" -#define CPUINFO_MACHINE "TQM8260 PowerPC" - -#define BOOTROM_RESTART_ADDR ((uint)0x40000104) - -#endif /* __TQM8260_PLATFORM */ diff --git a/arch/ppc/platforms/tqm8260_setup.c b/arch/ppc/platforms/tqm8260_setup.c deleted file mode 100644 index b766339f44ac51cbf519f99e0390c551ca2da323..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/tqm8260_setup.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * TQM8260 platform support - * - * Author: Allen Curtis - * Derived from: m8260_setup.c by Dan Malek, MVista - * - * Copyright 2002 Ones and Zeros, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include - -#include -#include -#include - -static int -tqm8260_set_rtc_time(unsigned long time) -{ - ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcnt = time; - ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcntsc = 0x3; - - return(0); -} - -static unsigned long -tqm8260_get_rtc_time(void) -{ - return ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcnt; -} - -void __init -m82xx_board_init(void) -{ - /* Anything special for this platform */ - ppc_md.set_rtc_time = tqm8260_set_rtc_time; - ppc_md.get_rtc_time = tqm8260_get_rtc_time; -} diff --git a/arch/ppc/platforms/tqm8xx.h b/arch/ppc/platforms/tqm8xx.h deleted file mode 100644 index 662131d0eb39d7e34171761e75d5fbeaf057e902..0000000000000000000000000000000000000000 --- a/arch/ppc/platforms/tqm8xx.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * TQM8xx(L) board specific definitions - * - * Copyright (c) 1999-2002 Wolfgang Denk (wd@denx.de) - */ - -#ifdef __KERNEL__ -#ifndef __MACH_TQM8xx_H -#define __MACH_TQM8xx_H - - -#include - -#ifndef __ASSEMBLY__ -#define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */ -#define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */ - -#define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */ -#define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */ - -/*----------------------------------------------------------------------- - * PCMCIA stuff - *----------------------------------------------------------------------- - * - */ -#define PCMCIA_MEM_SIZE ( 64 << 20 ) - -#ifndef CONFIG_KUP4K -# define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */ - -#else /* CONFIG_KUP4K */ - -# define MAX_HWIFS 2 /* overwrite default in include/asm-ppc/ide.h */ -# ifndef __ASSEMBLY__ -# include -static __inline__ void ide_led(int on) -{ - volatile immap_t *immap = (immap_t *)IMAP_ADDR; - - if (on) { - immap->im_ioport.iop_padat &= ~0x80; - } else { - immap->im_ioport.iop_padat |= 0x80; - } -} -# endif /* __ASSEMBLY__ */ -# define IDE_LED(x) ide_led((x)) -#endif /* CONFIG_KUP4K */ - -/* - * Definitions for IDE0 Interface - */ -#define IDE0_BASE_OFFSET 0 -#define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320) -#define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1) -#define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2) -#define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3) -#define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4) -#define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5) -#define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6) -#define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7) -#define IDE0_CONTROL_REG_OFFSET 0x0106 -#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */ - -/* define IO_BASE for PCMCIA */ -#define _IO_BASE 0x80000000 -#define _IO_BASE_SIZE (64<<10) - -#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */ -#define PHY_INTERRUPT 12 /* = IRQ6 */ -#define IDE0_INTERRUPT 13 - -#ifdef CONFIG_IDE -#endif - -/*----------------------------------------------------------------------- - * CPM Ethernet through SCCx. - *----------------------------------------------------------------------- - * - */ - -/*** TQM823L, TQM850L ***********************************************/ - -#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - */ -#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */ -#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */ -#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ -#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ - -#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */ - -#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */ -#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */ - -/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to - * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero. - */ -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00002600) -#endif /* CONFIG_TQM823L, CONFIG_TQM850L */ - -/*** TQM860L ********************************************************/ - -#ifdef CONFIG_TQM860L -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - */ -#define PA_ENET_RXD ((ushort)0x0001) /* PA 15 */ -#define PA_ENET_TXD ((ushort)0x0002) /* PA 14 */ -#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ -#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ - -#define PC_ENET_TENA ((ushort)0x0001) /* PC 15 */ -#define PC_ENET_CLSN ((ushort)0x0010) /* PC 11 */ -#define PC_ENET_RENA ((ushort)0x0020) /* PC 10 */ - -/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x00000026) -#endif /* CONFIG_TQM860L */ - -/*** FPS850L *********************************************************/ - -#ifdef CONFIG_FPS850L -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. - */ -#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */ -#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */ -#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */ -#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */ - -#define PC_ENET_TENA ((ushort)0x0002) /* PC 14 */ -#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */ -#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */ - -/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to - * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero. - */ -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00002600) -#endif /* CONFIG_FPS850L */ - -/* We don't use the 8259. -*/ -#define NR_8259_INTS 0 - -#endif /* !__ASSEMBLY__ */ -#endif /* __MACH_TQM8xx_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile deleted file mode 100644 index 52ddebe6c6d1fc9862e255b583a46fe415b11e0a..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/Makefile +++ /dev/null @@ -1,96 +0,0 @@ -# -# Makefile for the linux kernel. -# - -CFLAGS_prom_init.o += -fPIC -CFLAGS_btext.o += -fPIC - -wdt-mpc8xx-$(CONFIG_8xx_WDT) += m8xx_wdt.o - -obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o -obj-$(CONFIG_PPCBUG_NVRAM) += prep_nvram.o -obj-$(CONFIG_PPC_OCP) += ocp.o -obj-$(CONFIG_IBM_OCP) += ibm_ocp.o -obj-$(CONFIG_44x) += ibm44x_common.o -obj-$(CONFIG_440EP) += ibm440gx_common.o -obj-$(CONFIG_440GP) += ibm440gp_common.o -obj-$(CONFIG_440GX) += ibm440gx_common.o -obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o -obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o -ifeq ($(CONFIG_4xx),y) -ifeq ($(CONFIG_XILINX_VIRTEX),y) -obj-$(CONFIG_40x) += xilinx_pic.o -obj-y += virtex_devices.o -else -ifeq ($(CONFIG_403),y) -obj-$(CONFIG_40x) += ppc403_pic.o -else -obj-$(CONFIG_40x) += ppc4xx_pic.o -endif -endif -obj-$(CONFIG_44x) += ppc4xx_pic.o -obj-$(CONFIG_40x) += ppc4xx_setup.o -obj-$(CONFIG_GEN_RTC) += todc_time.o -obj-$(CONFIG_PPC4xx_DMA) += ppc4xx_dma.o -obj-$(CONFIG_PPC4xx_EDMA) += ppc4xx_sgdma.o -ifeq ($(CONFIG_40x),y) -obj-$(CONFIG_PCI) += pci_auto.o ppc405_pci.o -endif -endif -obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \ - ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o -obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o -obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o -obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o -obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o -obj-$(CONFIG_EBONY) += pci_auto.o todc_time.o -obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o -obj-$(CONFIG_EV64360) += todc_time.o -obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o -obj-$(CONFIG_GT64260) += gt64260_pic.o -obj-$(CONFIG_LOPEC) += pci_auto.o todc_time.o -obj-$(CONFIG_HDPU) += pci_auto.o -obj-$(CONFIG_LUAN) += pci_auto.o todc_time.o -obj-$(CONFIG_YUCCA) += pci_auto.o todc_time.o -obj-$(CONFIG_KATANA) += pci_auto.o -obj-$(CONFIG_MV64360) += mv64360_pic.o -obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o -obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o \ - pci_auto.o hawk_common.o -obj-$(CONFIG_OCOTEA) += pci_auto.o todc_time.o -obj-$(CONFIG_PAL4) += cpc700_pic.o -obj-$(CONFIG_POWERPMC250) += pci_auto.o -obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o \ - todc_time.o pci_auto.o -obj-$(CONFIG_PRPMC750) += open_pic.o pci_auto.o \ - hawk_common.o -obj-$(CONFIG_HARRIER) += harrier.o -obj-$(CONFIG_PRPMC800) += open_pic.o pci_auto.o -obj-$(CONFIG_RADSTONE_PPC7D) += pci_auto.o -obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o -obj-$(CONFIG_SBC82xx) += todc_time.o -obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \ - todc_time.o -obj-$(CONFIG_TAISHAN) += pci_auto.o -obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \ - ppc_sys.o -obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o -obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o -obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o -ifeq ($(CONFIG_PPC_GEN550),y) -obj-$(CONFIG_KGDB) += gen550_kgdb.o gen550_dbg.o -obj-$(CONFIG_SERIAL_TEXT_DEBUG) += gen550_dbg.o -endif -ifeq ($(CONFIG_SERIAL_MPSC_CONSOLE),y) -obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o -endif -obj-$(CONFIG_BOOTX_TEXT) += btext.o -obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o -obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o -obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \ - mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o -ifeq ($(CONFIG_PPC_MPC52xx),y) -obj-$(CONFIG_PCI) += mpc52xx_pci.o -endif - -obj-$(CONFIG_PPC_I8259) += i8259.o diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c deleted file mode 100644 index d11667046f21c732ee49b86ccad3d608f24af8d4..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/btext.c +++ /dev/null @@ -1,860 +0,0 @@ -/* - * Procedures for drawing on the screen early on in the boot process. - * - * Benjamin Herrenschmidt - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define NO_SCROLL - -#ifndef NO_SCROLL -static void scrollscreen(void); -#endif - -static void draw_byte(unsigned char c, long locX, long locY); -static void draw_byte_32(unsigned char *bits, unsigned long *base, int rb); -static void draw_byte_16(unsigned char *bits, unsigned long *base, int rb); -static void draw_byte_8(unsigned char *bits, unsigned long *base, int rb); - -static int g_loc_X; -static int g_loc_Y; -static int g_max_loc_X; -static int g_max_loc_Y; - -unsigned long disp_BAT[2] __initdata = {0, 0}; - -#define cmapsz (16*256) - -static unsigned char vga_font[cmapsz]; - -int boot_text_mapped; -int force_printk_to_btext = 0; - -boot_infos_t disp_bi; - -extern char *klimit; - -/* - * Powermac can use btext_* after boot for xmon, - * chrp only uses it during early boot. - */ -#ifdef CONFIG_XMON -#define BTEXT -#define BTDATA -#else -#define BTEXT __init -#define BTDATA __initdata -#endif /* CONFIG_XMON */ - -/* - * This is called only when we are booted via BootX. - */ -void __init -btext_init(boot_infos_t *bi) -{ - g_loc_X = 0; - g_loc_Y = 0; - g_max_loc_X = (bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) / 8; - g_max_loc_Y = (bi->dispDeviceRect[3] - bi->dispDeviceRect[1]) / 16; - disp_bi = *bi; - boot_text_mapped = 1; -} - -void __init -btext_welcome(void) -{ - unsigned long flags; - unsigned long pvr; - boot_infos_t* bi = &disp_bi; - - btext_drawstring("Welcome to Linux, kernel " UTS_RELEASE "\n"); - btext_drawstring("\nlinked at : 0x"); - btext_drawhex(KERNELBASE); - btext_drawstring("\nframe buffer at : 0x"); - btext_drawhex((unsigned long)bi->dispDeviceBase); - btext_drawstring(" (phys), 0x"); - btext_drawhex((unsigned long)bi->logicalDisplayBase); - btext_drawstring(" (log)"); - btext_drawstring("\nklimit : 0x"); - btext_drawhex((unsigned long)klimit); - btext_drawstring("\nMSR : 0x"); - __asm__ __volatile__ ("mfmsr %0" : "=r" (flags)); - btext_drawhex(flags); - __asm__ __volatile__ ("mfspr %0, 287" : "=r" (pvr)); - pvr >>= 16; - if (pvr > 1) { - btext_drawstring("\nHID0 : 0x"); - __asm__ __volatile__ ("mfspr %0, 1008" : "=r" (flags)); - btext_drawhex(flags); - } - if (pvr == 8 || pvr == 12 || pvr == 0x800c) { - btext_drawstring("\nICTC : 0x"); - __asm__ __volatile__ ("mfspr %0, 1019" : "=r" (flags)); - btext_drawhex(flags); - } - btext_drawstring("\n\n"); -} - -/* Calc BAT values for mapping the display and store them - * in disp_BAT. Those values are then used from head.S to map - * the display during identify_machine() and MMU_Init() - * - * The display is mapped to virtual address 0xD0000000, rather - * than 1:1, because some some CHRP machines put the frame buffer - * in the region starting at 0xC0000000 (KERNELBASE). - * This mapping is temporary and will disappear as soon as the - * setup done by MMU_Init() is applied. - * - * For now, we align the BAT and then map 8Mb on 601 and 16Mb - * on other PPCs. This may cause trouble if the framebuffer - * is really badly aligned, but I didn't encounter this case - * yet. - */ -void __init -btext_prepare_BAT(void) -{ - boot_infos_t* bi = &disp_bi; - unsigned long vaddr = KERNELBASE + 0x10000000; - unsigned long addr; - unsigned long lowbits; - - addr = (unsigned long)bi->dispDeviceBase; - if (!addr) { - boot_text_mapped = 0; - return; - } - if (PVR_VER(mfspr(SPRN_PVR)) != 1) { - /* 603, 604, G3, G4, ... */ - lowbits = addr & ~0xFF000000UL; - addr &= 0xFF000000UL; - disp_BAT[0] = vaddr | (BL_16M<<2) | 2; - disp_BAT[1] = addr | (_PAGE_NO_CACHE | _PAGE_GUARDED | BPP_RW); - } else { - /* 601 */ - lowbits = addr & ~0xFF800000UL; - addr &= 0xFF800000UL; - disp_BAT[0] = vaddr | (_PAGE_NO_CACHE | PP_RWXX) | 4; - disp_BAT[1] = addr | BL_8M | 0x40; - } - bi->logicalDisplayBase = (void *) (vaddr + lowbits); -} - -/* This function will enable the early boot text when doing OF booting. This - * way, xmon output should work too - */ -void __init -btext_setup_display(int width, int height, int depth, int pitch, - unsigned long address) -{ - boot_infos_t* bi = &disp_bi; - - g_loc_X = 0; - g_loc_Y = 0; - g_max_loc_X = width / 8; - g_max_loc_Y = height / 16; - bi->logicalDisplayBase = (unsigned char *)address; - bi->dispDeviceBase = (unsigned char *)address; - bi->dispDeviceRowBytes = pitch; - bi->dispDeviceDepth = depth; - bi->dispDeviceRect[0] = bi->dispDeviceRect[1] = 0; - bi->dispDeviceRect[2] = width; - bi->dispDeviceRect[3] = height; - boot_text_mapped = 1; -} - -/* Here's a small text engine to use during early boot - * or for debugging purposes - * - * todo: - * - * - build some kind of vgacon with it to enable early printk - * - move to a separate file - * - add a few video driver hooks to keep in sync with display - * changes. - */ - -void -map_boot_text(void) -{ - unsigned long base, offset, size; - boot_infos_t *bi = &disp_bi; - unsigned char *vbase; - - /* By default, we are no longer mapped */ - boot_text_mapped = 0; - if (bi->dispDeviceBase == 0) - return; - base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL; - offset = ((unsigned long) bi->dispDeviceBase) - base; - size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset - + bi->dispDeviceRect[0]; - vbase = ioremap(base, size); - if (vbase == 0) - return; - bi->logicalDisplayBase = vbase + offset; - boot_text_mapped = 1; -} - -/* Calc the base address of a given point (x,y) */ -static unsigned char * BTEXT -calc_base(boot_infos_t *bi, int x, int y) -{ - unsigned char *base; - - base = bi->logicalDisplayBase; - if (base == 0) - base = bi->dispDeviceBase; - base += (x + bi->dispDeviceRect[0]) * (bi->dispDeviceDepth >> 3); - base += (y + bi->dispDeviceRect[1]) * bi->dispDeviceRowBytes; - return base; -} - -/* Adjust the display to a new resolution */ -void -btext_update_display(unsigned long phys, int width, int height, - int depth, int pitch) -{ - boot_infos_t *bi = &disp_bi; - - if (bi->dispDeviceBase == 0) - return; - - /* check it's the same frame buffer (within 256MB) */ - if ((phys ^ (unsigned long)bi->dispDeviceBase) & 0xf0000000) - return; - - bi->dispDeviceBase = (__u8 *) phys; - bi->dispDeviceRect[0] = 0; - bi->dispDeviceRect[1] = 0; - bi->dispDeviceRect[2] = width; - bi->dispDeviceRect[3] = height; - bi->dispDeviceDepth = depth; - bi->dispDeviceRowBytes = pitch; - if (boot_text_mapped) { - iounmap(bi->logicalDisplayBase); - boot_text_mapped = 0; - } - map_boot_text(); - g_loc_X = 0; - g_loc_Y = 0; - g_max_loc_X = width / 8; - g_max_loc_Y = height / 16; -} - -void BTEXT btext_clearscreen(void) -{ - boot_infos_t* bi = &disp_bi; - unsigned long *base = (unsigned long *)calc_base(bi, 0, 0); - unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) * - (bi->dispDeviceDepth >> 3)) >> 2; - int i,j; - - for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++) - { - unsigned long *ptr = base; - for(j=width; j; --j) - *(ptr++) = 0; - base += (bi->dispDeviceRowBytes >> 2); - } -} - -__inline__ void dcbst(const void* addr) -{ - __asm__ __volatile__ ("dcbst 0,%0" :: "r" (addr)); -} - -void BTEXT btext_flushscreen(void) -{ - boot_infos_t* bi = &disp_bi; - unsigned long *base = (unsigned long *)calc_base(bi, 0, 0); - unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) * - (bi->dispDeviceDepth >> 3)) >> 2; - int i,j; - - for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++) - { - unsigned long *ptr = base; - for(j=width; j>0; j-=8) { - dcbst(ptr); - ptr += 8; - } - base += (bi->dispDeviceRowBytes >> 2); - } -} - -#ifndef NO_SCROLL -static BTEXT void -scrollscreen(void) -{ - boot_infos_t* bi = &disp_bi; - unsigned long *src = (unsigned long *)calc_base(bi,0,16); - unsigned long *dst = (unsigned long *)calc_base(bi,0,0); - unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) * - (bi->dispDeviceDepth >> 3)) >> 2; - int i,j; - -#ifdef CONFIG_ADB_PMU - pmu_suspend(); /* PMU will not shut us down ! */ -#endif - for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1] - 16); i++) - { - unsigned long *src_ptr = src; - unsigned long *dst_ptr = dst; - for(j=width; j; --j) - *(dst_ptr++) = *(src_ptr++); - src += (bi->dispDeviceRowBytes >> 2); - dst += (bi->dispDeviceRowBytes >> 2); - } - for (i=0; i<16; i++) - { - unsigned long *dst_ptr = dst; - for(j=width; j; --j) - *(dst_ptr++) = 0; - dst += (bi->dispDeviceRowBytes >> 2); - } -#ifdef CONFIG_ADB_PMU - pmu_resume(); /* PMU will not shut us down ! */ -#endif -} -#endif /* ndef NO_SCROLL */ - -void BTEXT btext_drawchar(char c) -{ - int cline = 0, x; - - if (!boot_text_mapped) - return; - - switch (c) { - case '\b': - if (g_loc_X > 0) - --g_loc_X; - break; - case '\t': - g_loc_X = (g_loc_X & -8) + 8; - break; - case '\r': - g_loc_X = 0; - break; - case '\n': - g_loc_X = 0; - g_loc_Y++; - cline = 1; - break; - default: - draw_byte(c, g_loc_X++, g_loc_Y); - } - if (g_loc_X >= g_max_loc_X) { - g_loc_X = 0; - g_loc_Y++; - cline = 1; - } -#ifndef NO_SCROLL - while (g_loc_Y >= g_max_loc_Y) { - scrollscreen(); - g_loc_Y--; - } -#else - /* wrap around from bottom to top of screen so we don't - waste time scrolling each line. -- paulus. */ - if (g_loc_Y >= g_max_loc_Y) - g_loc_Y = 0; - if (cline) { - for (x = 0; x < g_max_loc_X; ++x) - draw_byte(' ', x, g_loc_Y); - } -#endif -} - -void BTEXT -btext_drawstring(const char *c) -{ - if (!boot_text_mapped) - return; - while (*c) - btext_drawchar(*c++); -} - -void BTEXT -btext_drawhex(unsigned long v) -{ - static char hex_table[] = "0123456789abcdef"; - - if (!boot_text_mapped) - return; - btext_drawchar(hex_table[(v >> 28) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 24) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 20) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 16) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 12) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 8) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 4) & 0x0000000FUL]); - btext_drawchar(hex_table[(v >> 0) & 0x0000000FUL]); - btext_drawchar(' '); -} - -static void BTEXT -draw_byte(unsigned char c, long locX, long locY) -{ - boot_infos_t* bi = &disp_bi; - unsigned char *base = calc_base(bi, locX << 3, locY << 4); - unsigned char *font = &vga_font[((unsigned long)c) * 16]; - int rb = bi->dispDeviceRowBytes; - - switch(bi->dispDeviceDepth) { - case 24: - case 32: - draw_byte_32(font, (unsigned long *)base, rb); - break; - case 15: - case 16: - draw_byte_16(font, (unsigned long *)base, rb); - break; - case 8: - draw_byte_8(font, (unsigned long *)base, rb); - break; - } -} - -static unsigned long expand_bits_8[16] BTDATA = { - 0x00000000, - 0x000000ff, - 0x0000ff00, - 0x0000ffff, - 0x00ff0000, - 0x00ff00ff, - 0x00ffff00, - 0x00ffffff, - 0xff000000, - 0xff0000ff, - 0xff00ff00, - 0xff00ffff, - 0xffff0000, - 0xffff00ff, - 0xffffff00, - 0xffffffff -}; - -static unsigned long expand_bits_16[4] BTDATA = { - 0x00000000, - 0x0000ffff, - 0xffff0000, - 0xffffffff -}; - - -static void BTEXT -draw_byte_32(unsigned char *font, unsigned long *base, int rb) -{ - int l, bits; - int fg = 0xFFFFFFFFUL; - int bg = 0x00000000UL; - - for (l = 0; l < 16; ++l) - { - bits = *font++; - base[0] = (-(bits >> 7) & fg) ^ bg; - base[1] = (-((bits >> 6) & 1) & fg) ^ bg; - base[2] = (-((bits >> 5) & 1) & fg) ^ bg; - base[3] = (-((bits >> 4) & 1) & fg) ^ bg; - base[4] = (-((bits >> 3) & 1) & fg) ^ bg; - base[5] = (-((bits >> 2) & 1) & fg) ^ bg; - base[6] = (-((bits >> 1) & 1) & fg) ^ bg; - base[7] = (-(bits & 1) & fg) ^ bg; - base = (unsigned long *) ((char *)base + rb); - } -} - -static void BTEXT -draw_byte_16(unsigned char *font, unsigned long *base, int rb) -{ - int l, bits; - int fg = 0xFFFFFFFFUL; - int bg = 0x00000000UL; - unsigned long *eb = expand_bits_16; - - for (l = 0; l < 16; ++l) - { - bits = *font++; - base[0] = (eb[bits >> 6] & fg) ^ bg; - base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg; - base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg; - base[3] = (eb[bits & 3] & fg) ^ bg; - base = (unsigned long *) ((char *)base + rb); - } -} - -static void BTEXT -draw_byte_8(unsigned char *font, unsigned long *base, int rb) -{ - int l, bits; - int fg = 0x0F0F0F0FUL; - int bg = 0x00000000UL; - unsigned long *eb = expand_bits_8; - - for (l = 0; l < 16; ++l) - { - bits = *font++; - base[0] = (eb[bits >> 4] & fg) ^ bg; - base[1] = (eb[bits & 0xf] & fg) ^ bg; - base = (unsigned long *) ((char *)base + rb); - } -} - -static unsigned char vga_font[cmapsz] BTDATA = { -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd, -0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xff, -0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0xff, 0x7e, 0x00, 0x00, 0x00, 0x00, -0x00, 0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, -0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe, -0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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Greer - * mgreer@mvista.com - * - * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * This file contains the defines and macros for the IBM CPC700 host bridge, - * memory controller, PIC, UARTs, IIC, and Timers. - */ - -#ifndef __PPC_SYSLIB_CPC700_H__ -#define __PPC_SYSLIB_CPC700_H__ - -#include -#include -#include - -/* XXX no barriers? not even any volatiles? -- paulus */ -#define CPC700_OUT_32(a,d) (*(u_int *)a = d) -#define CPC700_IN_32(a) (*(u_int *)a) - -/* - * PCI Section - */ -#define CPC700_PCI_CONFIG_ADDR 0xfec00000 -#define CPC700_PCI_CONFIG_DATA 0xfec00004 - -/* CPU -> PCI memory window 0 */ -#define CPC700_PMM0_LOCAL 0xff400000 /* CPU physical addr */ -#define CPC700_PMM0_MASK_ATTR 0xff400004 /* size and attrs */ -#define CPC700_PMM0_PCI_LOW 0xff400008 /* PCI addr, low word */ -#define CPC700_PMM0_PCI_HIGH 0xff40000c /* PCI addr, high wd */ -/* CPU -> PCI memory window 1 */ -#define CPC700_PMM1_LOCAL 0xff400010 -#define CPC700_PMM1_MASK_ATTR 0xff400014 -#define CPC700_PMM1_PCI_LOW 0xff400018 -#define CPC700_PMM1_PCI_HIGH 0xff40001c -/* CPU -> PCI memory window 2 */ -#define CPC700_PMM2_LOCAL 0xff400020 -#define CPC700_PMM2_MASK_ATTR 0xff400024 -#define CPC700_PMM2_PCI_LOW 0xff400028 -#define CPC700_PMM2_PCI_HIGH 0xff40002c -/* PCI memory -> CPU window 1 */ -#define CPC700_PTM1_MEMSIZE 0xff400030 /* window size */ -#define CPC700_PTM1_LOCAL 0xff400034 /* CPU phys addr */ -/* PCI memory -> CPU window 2 */ -#define CPC700_PTM2_MEMSIZE 0xff400038 /* size and enable */ -#define CPC700_PTM2_LOCAL 0xff40003c - -/* - * PIC Section - * - * IBM calls the CPC700's programmable interrupt controller the Universal - * Interrupt Controller or UIC. - */ - -/* - * UIC Register Addresses. - */ -#define CPC700_UIC_UICSR 0xff500880 /* Status Reg (Rd/Clr)*/ -#define CPC700_UIC_UICSRS 0xff500884 /* Status Reg (Set) */ -#define CPC700_UIC_UICER 0xff500888 /* Enable Reg */ -#define CPC700_UIC_UICCR 0xff50088c /* Critical Reg */ -#define CPC700_UIC_UICPR 0xff500890 /* Polarity Reg */ -#define CPC700_UIC_UICTR 0xff500894 /* Trigger Reg */ -#define CPC700_UIC_UICMSR 0xff500898 /* Masked Status Reg */ -#define CPC700_UIC_UICVR 0xff50089c /* Vector Reg */ -#define CPC700_UIC_UICVCR 0xff5008a0 /* Vector Config Reg */ - -#define CPC700_UIC_UICER_ENABLE 0x00000001 /* Enable an IRQ */ - -#define CPC700_UIC_UICVCR_31_HI 0x00000000 /* IRQ 31 hi priority */ -#define CPC700_UIC_UICVCR_0_HI 0x00000001 /* IRQ 0 hi priority */ -#define CPC700_UIC_UICVCR_BASE_MASK 0xfffffffc -#define CPC700_UIC_UICVCR_ORDER_MASK 0x00000001 - -/* Specify value of a bit for an IRQ. */ -#define CPC700_UIC_IRQ_BIT(i) ((0x00000001) << (31 - (i))) - -/* - * UIC Exports... - */ -extern struct hw_interrupt_type cpc700_pic; -extern unsigned int cpc700_irq_assigns[32][2]; - -extern void __init cpc700_init_IRQ(void); -extern int cpc700_get_irq(void); - -#endif /* __PPC_SYSLIB_CPC700_H__ */ diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c deleted file mode 100644 index d48e8f45c05058d4412843faa6967d7d58234cc3..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/cpc700_pic.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Interrupt controller support for IBM Spruce - * - * Authors: Mark Greer, Matt Porter, and Johnnie Peters - * mgreer@mvista.com - * mporter@mvista.com - * jpeters@mvista.com - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "cpc700.h" - -static void -cpc700_unmask_irq(unsigned int irq) -{ - unsigned int tr_bits; - - /* - * IRQ 31 is largest IRQ supported. - * IRQs 17-19 are reserved. - */ - if ((irq <= 31) && ((irq < 17) || (irq > 19))) { - tr_bits = CPC700_IN_32(CPC700_UIC_UICTR); - - if ((tr_bits & (1 << (31 - irq))) == 0) { - /* level trigger interrupt, clear bit in status - * register */ - CPC700_OUT_32(CPC700_UIC_UICSR, 1 << (31 - irq)); - } - - /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */ - ppc_cached_irq_mask[0] |= CPC700_UIC_IRQ_BIT(irq); - - CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]); - } - return; -} - -static void -cpc700_mask_irq(unsigned int irq) -{ - /* - * IRQ 31 is largest IRQ supported. - * IRQs 17-19 are reserved. - */ - if ((irq <= 31) && ((irq < 17) || (irq > 19))) { - /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */ - ppc_cached_irq_mask[0] &= - ~CPC700_UIC_IRQ_BIT(irq); - - CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]); - } - return; -} - -static void -cpc700_mask_and_ack_irq(unsigned int irq) -{ - u_int bit; - - /* - * IRQ 31 is largest IRQ supported. - * IRQs 17-19 are reserved. - */ - if ((irq <= 31) && ((irq < 17) || (irq > 19))) { - /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */ - bit = CPC700_UIC_IRQ_BIT(irq); - - ppc_cached_irq_mask[0] &= ~bit; - CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]); - CPC700_OUT_32(CPC700_UIC_UICSR, bit); /* Write 1 clears IRQ */ - } - return; -} - -static struct hw_interrupt_type cpc700_pic = { - .typename = "CPC700 PIC", - .enable = cpc700_unmask_irq, - .disable = cpc700_mask_irq, - .ack = cpc700_mask_and_ack_irq, -}; - -__init static void -cpc700_pic_init_irq(unsigned int irq) -{ - unsigned int tmp; - - /* Set interrupt sense */ - tmp = CPC700_IN_32(CPC700_UIC_UICTR); - if (cpc700_irq_assigns[irq][0] == 0) { - tmp &= ~CPC700_UIC_IRQ_BIT(irq); - } else { - tmp |= CPC700_UIC_IRQ_BIT(irq); - } - CPC700_OUT_32(CPC700_UIC_UICTR, tmp); - - /* Set interrupt polarity */ - tmp = CPC700_IN_32(CPC700_UIC_UICPR); - if (cpc700_irq_assigns[irq][1]) { - tmp |= CPC700_UIC_IRQ_BIT(irq); - } else { - tmp &= ~CPC700_UIC_IRQ_BIT(irq); - } - CPC700_OUT_32(CPC700_UIC_UICPR, tmp); - - /* Set interrupt critical */ - tmp = CPC700_IN_32(CPC700_UIC_UICCR); - tmp |= CPC700_UIC_IRQ_BIT(irq); - CPC700_OUT_32(CPC700_UIC_UICCR, tmp); - - return; -} - -__init void -cpc700_init_IRQ(void) -{ - int i; - - ppc_cached_irq_mask[0] = 0; - CPC700_OUT_32(CPC700_UIC_UICER, 0x00000000); /* Disable all irq's */ - CPC700_OUT_32(CPC700_UIC_UICSR, 0xffffffff); /* Clear cur intrs */ - CPC700_OUT_32(CPC700_UIC_UICCR, 0xffffffff); /* Gen INT not MCP */ - CPC700_OUT_32(CPC700_UIC_UICPR, 0x00000000); /* Active low */ - CPC700_OUT_32(CPC700_UIC_UICTR, 0x00000000); /* Level Sensitive */ - CPC700_OUT_32(CPC700_UIC_UICVR, CPC700_UIC_UICVCR_0_HI); - /* IRQ 0 is highest */ - - for (i = 0; i < 17; i++) { - irq_desc[i].chip = &cpc700_pic; - cpc700_pic_init_irq(i); - } - - for (i = 20; i < 32; i++) { - irq_desc[i].chip = &cpc700_pic; - cpc700_pic_init_irq(i); - } - - return; -} - - - -/* - * Find the highest IRQ that generating an interrupt, if any. - */ -int -cpc700_get_irq(void) -{ - int irq = 0; - u_int irq_status, irq_test = 1; - - irq_status = CPC700_IN_32(CPC700_UIC_UICMSR); - - do - { - if (irq_status & irq_test) - break; - irq++; - irq_test <<= 1; - } while (irq < NR_IRQS); - - - if (irq == NR_IRQS) - irq = 33; - - return (31 - irq); -} diff --git a/arch/ppc/syslib/cpm2_common.c b/arch/ppc/syslib/cpm2_common.c deleted file mode 100644 index 6cd859d7721f7cbca96ee09c3915890ad2b4de92..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/cpm2_common.c +++ /dev/null @@ -1,196 +0,0 @@ -/* - * General Purpose functions for the global management of the - * 8260 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) - * 2.3.99 Updates - * - * In addition to the individual control of the communication - * channels, there are a few functions that globally affect the - * communication processor. - * - * Buffer descriptors must be allocated from the dual ported memory - * space. The allocator for that is here. When the communication - * process is reset, we reclaim the memory available. There is - * currently no deallocator for this memory. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static void cpm2_dpinit(void); -cpm_cpm2_t *cpmp; /* Pointer to comm processor space */ - -/* We allocate this here because it is used almost exclusively for - * the communication processor devices. - */ -cpm2_map_t *cpm2_immr; - -#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount - of space for CPM as it is larger - than on PQ2 */ - -void -cpm2_reset(void) -{ - cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE); - - /* Reclaim the DP memory for our use. - */ - cpm2_dpinit(); - - /* Tell everyone where the comm processor resides. - */ - cpmp = &cpm2_immr->im_cpm; -} - -/* Set a baud rate generator. This needs lots of work. There are - * eight BRGs, which can be connected to the CPM channels or output - * as clocks. The BRGs are in two different block of internal - * memory mapped space. - * The baud rate clock is the system clock divided by something. - * It was set up long ago during the initial boot phase and is - * is given to us. - * Baud rate clocks are zero-based in the driver code (as that maps - * to port numbers). Documentation uses 1-based numbering. - */ -#define BRG_INT_CLK (((bd_t *)__res)->bi_brgfreq) -#define BRG_UART_CLK (BRG_INT_CLK/16) - -/* This function is used by UARTS, or anything else that uses a 16x - * oversampled clock. - */ -void -cpm_setbrg(uint brg, uint rate) -{ - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - if (brg < 4) { - bp = (uint *)&cpm2_immr->im_brgc1; - } - else { - bp = (uint *)&cpm2_immr->im_brgc5; - brg -= 4; - } - bp += brg; - *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN; -} - -/* This function is used to set high speed synchronous baud rate - * clocks. - */ -void -cpm2_fastbrg(uint brg, uint rate, int div16) -{ - volatile uint *bp; - - if (brg < 4) { - bp = (uint *)&cpm2_immr->im_brgc1; - } - else { - bp = (uint *)&cpm2_immr->im_brgc5; - brg -= 4; - } - bp += brg; - *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN; - if (div16) - *bp |= CPM_BRG_DIV16; -} - -/* - * dpalloc / dpfree bits. - */ -static spinlock_t cpm_dpmem_lock; -/* 16 blocks should be enough to satisfy all requests - * until the memory subsystem goes up... */ -static rh_block_t cpm_boot_dpmem_rh_block[16]; -static rh_info_t cpm_dpmem_info; - -static void cpm2_dpinit(void) -{ - spin_lock_init(&cpm_dpmem_lock); - - /* initialize the info header */ - rh_init(&cpm_dpmem_info, 1, - sizeof(cpm_boot_dpmem_rh_block) / - sizeof(cpm_boot_dpmem_rh_block[0]), - cpm_boot_dpmem_rh_block); - - /* Attach the usable dpmem area */ - /* XXX: This is actually crap. CPM_DATAONLY_BASE and - * CPM_DATAONLY_SIZE is only a subset of the available dpram. It - * varies with the processor and the microcode patches activated. - * But the following should be at least safe. - */ - rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); -} - -/* This function returns an index into the DPRAM area. - */ -unsigned long cpm_dpalloc(uint size, uint align) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - cpm_dpmem_info.alignment = align; - start = rh_alloc(&cpm_dpmem_info, size, "commproc"); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return start; -} -EXPORT_SYMBOL(cpm_dpalloc); - -int cpm_dpfree(unsigned long offset) -{ - int ret; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - ret = rh_free(&cpm_dpmem_info, offset); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return ret; -} -EXPORT_SYMBOL(cpm_dpfree); - -/* not sure if this is ever needed */ -unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align) -{ - unsigned long start; - unsigned long flags; - - spin_lock_irqsave(&cpm_dpmem_lock, flags); - cpm_dpmem_info.alignment = align; - start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc"); - spin_unlock_irqrestore(&cpm_dpmem_lock, flags); - - return start; -} -EXPORT_SYMBOL(cpm_dpalloc_fixed); - -void cpm_dpdump(void) -{ - rh_dump(&cpm_dpmem_info); -} -EXPORT_SYMBOL(cpm_dpdump); - -void *cpm_dpram_addr(unsigned long offset) -{ - return (void *)&cpm2_immr->im_dprambase[offset]; -} -EXPORT_SYMBOL(cpm_dpram_addr); diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c deleted file mode 100644 index fb2d5842641a34c0806dac2d009971c77f263db6..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/cpm2_pic.c +++ /dev/null @@ -1,177 +0,0 @@ -/* The CPM2 internal interrupt controller. It is usually - * the only interrupt controller. - * There are two 32-bit registers (high/low) for up to 64 - * possible interrupts. - * - * Now, the fun starts.....Interrupt Numbers DO NOT MAP - * in a simple arithmetic fashion to mask or pending registers. - * That is, interrupt 4 does not map to bit position 4. - * We create two tables, indexed by vector number, to indicate - * which register to use and which bit in the register to use. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "cpm2_pic.h" - -static u_char irq_to_siureg[] = { - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0 -}; - -/* bit numbers do not match the docs, these are precomputed so the bit for - * a given irq is (1 << irq_to_siubit[irq]) */ -static u_char irq_to_siubit[] = { - 0, 15, 14, 13, 12, 11, 10, 9, - 8, 7, 6, 5, 4, 3, 2, 1, - 2, 1, 0, 14, 13, 12, 11, 10, - 9, 8, 7, 6, 5, 4, 3, 0, - 31, 30, 29, 28, 27, 26, 25, 24, - 23, 22, 21, 20, 19, 18, 17, 16, - 16, 17, 18, 19, 20, 21, 22, 23, - 24, 25, 26, 27, 28, 29, 30, 31, -}; - -static void cpm2_mask_irq(unsigned int irq_nr) -{ - int bit, word; - volatile uint *simr; - - irq_nr -= CPM_IRQ_OFFSET; - - bit = irq_to_siubit[irq_nr]; - word = irq_to_siureg[irq_nr]; - - simr = &(cpm2_immr->im_intctl.ic_simrh); - ppc_cached_irq_mask[word] &= ~(1 << bit); - simr[word] = ppc_cached_irq_mask[word]; -} - -static void cpm2_unmask_irq(unsigned int irq_nr) -{ - int bit, word; - volatile uint *simr; - - irq_nr -= CPM_IRQ_OFFSET; - - bit = irq_to_siubit[irq_nr]; - word = irq_to_siureg[irq_nr]; - - simr = &(cpm2_immr->im_intctl.ic_simrh); - ppc_cached_irq_mask[word] |= 1 << bit; - simr[word] = ppc_cached_irq_mask[word]; -} - -static void cpm2_mask_and_ack(unsigned int irq_nr) -{ - int bit, word; - volatile uint *simr, *sipnr; - - irq_nr -= CPM_IRQ_OFFSET; - - bit = irq_to_siubit[irq_nr]; - word = irq_to_siureg[irq_nr]; - - simr = &(cpm2_immr->im_intctl.ic_simrh); - sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); - ppc_cached_irq_mask[word] &= ~(1 << bit); - simr[word] = ppc_cached_irq_mask[word]; - sipnr[word] = 1 << bit; -} - -static void cpm2_end_irq(unsigned int irq_nr) -{ - int bit, word; - volatile uint *simr; - - if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && irq_desc[irq_nr].action) { - - irq_nr -= CPM_IRQ_OFFSET; - bit = irq_to_siubit[irq_nr]; - word = irq_to_siureg[irq_nr]; - - simr = &(cpm2_immr->im_intctl.ic_simrh); - ppc_cached_irq_mask[word] |= 1 << bit; - simr[word] = ppc_cached_irq_mask[word]; - /* - * Work around large numbers of spurious IRQs on PowerPC 82xx - * systems. - */ - mb(); - } -} - -static struct hw_interrupt_type cpm2_pic = { - .typename = " CPM2 SIU ", - .enable = cpm2_unmask_irq, - .disable = cpm2_mask_irq, - .ack = cpm2_mask_and_ack, - .end = cpm2_end_irq, -}; - -int cpm2_get_irq(void) -{ - int irq; - unsigned long bits; - - /* For CPM2, read the SIVEC register and shift the bits down - * to get the irq number. */ - bits = cpm2_immr->im_intctl.ic_sivec; - irq = bits >> 26; - - if (irq == 0) - return(-1); - return irq+CPM_IRQ_OFFSET; -} - -void cpm2_init_IRQ(void) -{ - int i; - - /* Clear the CPM IRQ controller, in case it has any bits set - * from the bootloader - */ - - /* Mask out everything */ - cpm2_immr->im_intctl.ic_simrh = 0x00000000; - cpm2_immr->im_intctl.ic_simrl = 0x00000000; - wmb(); - - /* Ack everything */ - cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; - cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; - wmb(); - - /* Dummy read of the vector */ - i = cpm2_immr->im_intctl.ic_sivec; - rmb(); - - /* Initialize the default interrupt mapping priorities, - * in case the boot rom changed something on us. - */ - cpm2_immr->im_intctl.ic_sicr = 0; - cpm2_immr->im_intctl.ic_scprrh = 0x05309770; - cpm2_immr->im_intctl.ic_scprrl = 0x05309770; - - - /* Enable chaining to OpenPIC, and make everything level - */ - for (i = 0; i < NR_CPM_INTS; i++) { - irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic; - irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL; - } -} diff --git a/arch/ppc/syslib/cpm2_pic.h b/arch/ppc/syslib/cpm2_pic.h deleted file mode 100644 index 467339337a78f213be4cdf4c548a83ec69e6f809..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/cpm2_pic.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _PPC_KERNEL_CPM2_H -#define _PPC_KERNEL_CPM2_H - -extern int cpm2_get_irq(void); - -extern void cpm2_init_IRQ(void); - -#endif /* _PPC_KERNEL_CPM2_H */ diff --git a/arch/ppc/syslib/gen550.h b/arch/ppc/syslib/gen550.h deleted file mode 100644 index 5254d3cdbca6c98c4da4cd416a515d74ffb9ac5f..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/gen550.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * gen550 prototypes - * - * Matt Porter - * - * 2004 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -extern void gen550_progress(char *, unsigned short); -extern void gen550_init(int, struct uart_port *); -extern void gen550_kgdb_map_scc(void); diff --git a/arch/ppc/syslib/gen550_dbg.c b/arch/ppc/syslib/gen550_dbg.c deleted file mode 100644 index 9293f5c59099154a745b7d833134ab08dfb08a05..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/gen550_dbg.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * A library of polled 16550 serial routines. These are intended to - * be used to support progress messages, xmon, kgdb, etc. on a - * variety of platforms. - * - * Adapted from lots of code ripped from the arch/ppc/boot/ polled - * 16550 support. - * - * Author: Matt Porter - * - * 2002-2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include /* For linux/serial_core.h */ -#include -#include -#include -#include -#include -#include - -#define SERIAL_BAUD 9600 - -/* SERIAL_PORT_DFNS is defined in */ -#ifndef SERIAL_PORT_DFNS -#define SERIAL_PORT_DFNS -#endif - -static struct serial_state rs_table[RS_TABLE_SIZE] = { - SERIAL_PORT_DFNS /* defined in */ -}; - -static void (*serial_outb)(unsigned long, unsigned char); -static unsigned long (*serial_inb)(unsigned long); - -static int shift; - -unsigned long direct_inb(unsigned long addr) -{ - return readb((void __iomem *)addr); -} - -void direct_outb(unsigned long addr, unsigned char val) -{ - writeb(val, (void __iomem *)addr); -} - -unsigned long io_inb(unsigned long port) -{ - return inb(port); -} - -void io_outb(unsigned long port, unsigned char val) -{ - outb(val, port); -} - -unsigned long serial_init(int chan, void *ignored) -{ - unsigned long com_port; - unsigned char lcr, dlm; - - /* We need to find out which type io we're expecting. If it's - * 'SERIAL_IO_PORT', we get an offset from the isa_io_base. - * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */ - switch (rs_table[chan].io_type) { - case SERIAL_IO_PORT: - com_port = rs_table[chan].port; - serial_outb = io_outb; - serial_inb = io_inb; - break; - case SERIAL_IO_MEM: - com_port = (unsigned long)rs_table[chan].iomem_base; - serial_outb = direct_outb; - serial_inb = direct_inb; - break; - default: - /* We can't deal with it. */ - return -1; - } - - /* How far apart the registers are. */ - shift = rs_table[chan].iomem_reg_shift; - - /* save the LCR */ - lcr = serial_inb(com_port + (UART_LCR << shift)); - - /* Access baud rate */ - serial_outb(com_port + (UART_LCR << shift), UART_LCR_DLAB); - dlm = serial_inb(com_port + (UART_DLM << shift)); - - /* - * Test if serial port is unconfigured - * We assume that no-one uses less than 110 baud or - * less than 7 bits per character these days. - * -- paulus. - */ - if ((dlm <= 4) && (lcr & 2)) { - /* port is configured, put the old LCR back */ - serial_outb(com_port + (UART_LCR << shift), lcr); - } - else { - /* Input clock. */ - serial_outb(com_port + (UART_DLL << shift), - (rs_table[chan].baud_base / SERIAL_BAUD) & 0xFF); - serial_outb(com_port + (UART_DLM << shift), - (rs_table[chan].baud_base / SERIAL_BAUD) >> 8); - /* 8 data, 1 stop, no parity */ - serial_outb(com_port + (UART_LCR << shift), 0x03); - /* RTS/DTR */ - serial_outb(com_port + (UART_MCR << shift), 0x03); - - /* Clear & enable FIFOs */ - serial_outb(com_port + (UART_FCR << shift), 0x07); - } - - return (com_port); -} - -void -serial_putc(unsigned long com_port, unsigned char c) -{ - while ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0) - ; - serial_outb(com_port, c); -} - -unsigned char -serial_getc(unsigned long com_port) -{ - while ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0) - ; - return serial_inb(com_port); -} - -int -serial_tstc(unsigned long com_port) -{ - return ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0); -} - -void -serial_close(unsigned long com_port) -{ -} - -void -gen550_init(int i, struct uart_port *serial_req) -{ - rs_table[i].io_type = serial_req->iotype; - rs_table[i].port = serial_req->iobase; - rs_table[i].iomem_base = serial_req->membase; - rs_table[i].iomem_reg_shift = serial_req->regshift; - rs_table[i].baud_base = serial_req->uartclk ? serial_req->uartclk / 16 : BASE_BAUD; -} - -#ifdef CONFIG_SERIAL_TEXT_DEBUG -void -gen550_progress(char *s, unsigned short hex) -{ - volatile unsigned int progress_debugport; - volatile char c; - - progress_debugport = serial_init(0, NULL); - - serial_putc(progress_debugport, '\r'); - - while ((c = *s++) != 0) - serial_putc(progress_debugport, c); - - serial_putc(progress_debugport, '\n'); - serial_putc(progress_debugport, '\r'); -} -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ diff --git a/arch/ppc/syslib/gen550_kgdb.c b/arch/ppc/syslib/gen550_kgdb.c deleted file mode 100644 index 987cc0414e6e880172318a53525bea57cf28648a..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/gen550_kgdb.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Generic 16550 kgdb support intended to be useful on a variety - * of platforms. To enable this support, it is necessary to set - * the CONFIG_GEN550 option. Any virtual mapping of the serial - * port(s) to be used can be accomplished by setting - * ppc_md.early_serial_map to a platform-specific mapping function. - * - * Adapted from ppc4xx_kgdb.c. - * - * Author: Matt Porter - * - * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include - -#include - -extern unsigned long serial_init(int, void *); -extern unsigned long serial_getc(unsigned long); -extern unsigned long serial_putc(unsigned long, unsigned char); - -#if defined(CONFIG_KGDB_TTYS0) -#define KGDB_PORT 0 -#elif defined(CONFIG_KGDB_TTYS1) -#define KGDB_PORT 1 -#elif defined(CONFIG_KGDB_TTYS2) -#define KGDB_PORT 2 -#elif defined(CONFIG_KGDB_TTYS3) -#define KGDB_PORT 3 -#else -#error "invalid kgdb_tty port" -#endif - -static volatile unsigned int kgdb_debugport; - -void putDebugChar(unsigned char c) -{ - if (kgdb_debugport == 0) - kgdb_debugport = serial_init(KGDB_PORT, NULL); - - serial_putc(kgdb_debugport, c); -} - -int getDebugChar(void) -{ - if (kgdb_debugport == 0) - kgdb_debugport = serial_init(KGDB_PORT, NULL); - - return(serial_getc(kgdb_debugport)); -} - -void kgdb_interruptible(int enable) -{ - return; -} - -void putDebugString(char* str) -{ - while (*str != '\0') { - putDebugChar(*str); - str++; - } - putDebugChar('\r'); - return; -} - -/* - * Note: gen550_init() must be called already on the port we are going - * to use. - */ -void -gen550_kgdb_map_scc(void) -{ - printk(KERN_DEBUG "kgdb init\n"); - if (ppc_md.early_serial_map) - ppc_md.early_serial_map(); - kgdb_debugport = serial_init(KGDB_PORT, NULL); -} diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c deleted file mode 100644 index 3b4fcca5d1e1dcc29eefc86c6cb970b2f79481d7..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/gt64260_pic.c +++ /dev/null @@ -1,323 +0,0 @@ -/* - * Interrupt controller support for Galileo's GT64260. - * - * Author: Chris Zankel - * Modified by: Mark A. Greer - * - * Based on sources from Rabeeh Khoury / Galileo Technology - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * This file contains the specific functions to support the GT64260 - * interrupt controller. - * - * The GT64260 has two main interrupt registers (high and low) that - * summarizes the interrupts generated by the units of the GT64260. - * Each bit is assigned to an interrupt number, where the low register - * are assigned from IRQ0 to IRQ31 and the high cause register - * from IRQ32 to IRQ63 - * The GPP (General Purpose Port) interrupts are assigned from IRQ64 (GPP0) - * to IRQ95 (GPP31). - * get_irq() returns the lowest interrupt number that is currently asserted. - * - * Note: - * - This driver does not initialize the GPP when used as an interrupt - * input. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#define CPU_INTR_STR "gt64260 cpu interface error" -#define PCI0_INTR_STR "gt64260 pci 0 error" -#define PCI1_INTR_STR "gt64260 pci 1 error" - -/* ========================== forward declaration ========================== */ - -static void gt64260_unmask_irq(unsigned int); -static void gt64260_mask_irq(unsigned int); - -/* ========================== local declarations =========================== */ - -struct hw_interrupt_type gt64260_pic = { - .typename = " gt64260_pic ", - .enable = gt64260_unmask_irq, - .disable = gt64260_mask_irq, - .ack = gt64260_mask_irq, - .end = gt64260_unmask_irq, -}; - -u32 gt64260_irq_base = 0; /* GT64260 handles the next 96 IRQs from here */ - -static struct mv64x60_handle bh; - -/* gt64260_init_irq() - * - * This function initializes the interrupt controller. It assigns - * all interrupts from IRQ0 to IRQ95 to the gt64260 interrupt controller. - * - * Note: - * We register all GPP inputs as interrupt source, but disable them. - */ -void __init -gt64260_init_irq(void) -{ - int i; - - if (ppc_md.progress) - ppc_md.progress("gt64260_init_irq: enter", 0x0); - - bh.v_base = mv64x60_get_bridge_vbase(); - - ppc_cached_irq_mask[0] = 0; - ppc_cached_irq_mask[1] = 0x0f000000; /* Enable GPP intrs */ - ppc_cached_irq_mask[2] = 0; - - /* disable all interrupts and clear current interrupts */ - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, ppc_cached_irq_mask[2]); - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, 0); - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO, ppc_cached_irq_mask[0]); - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI, ppc_cached_irq_mask[1]); - - /* use the gt64260 for all (possible) interrupt sources */ - for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++) - irq_desc[i].chip = >64260_pic; - - if (ppc_md.progress) - ppc_md.progress("gt64260_init_irq: exit", 0x0); -} - -/* - * gt64260_get_irq() - * - * This function returns the lowest interrupt number of all interrupts that - * are currently asserted. - * - * Output Variable(s): - * None. - * - * Returns: - * int or -2 (bogus interrupt) - */ -int -gt64260_get_irq(void) -{ - int irq; - int irq_gpp; - - irq = mv64x60_read(&bh, GT64260_IC_MAIN_CAUSE_LO); - irq = __ilog2((irq & 0x3dfffffe) & ppc_cached_irq_mask[0]); - - if (irq == -1) { - irq = mv64x60_read(&bh, GT64260_IC_MAIN_CAUSE_HI); - irq = __ilog2((irq & 0x0f000db7) & ppc_cached_irq_mask[1]); - - if (irq == -1) - irq = -2; /* bogus interrupt, should never happen */ - else { - if (irq >= 24) { - irq_gpp = mv64x60_read(&bh, - MV64x60_GPP_INTR_CAUSE); - irq_gpp = __ilog2(irq_gpp & - ppc_cached_irq_mask[2]); - - if (irq_gpp == -1) - irq = -2; - else { - irq = irq_gpp + 64; - mv64x60_write(&bh, - MV64x60_GPP_INTR_CAUSE, - ~(1 << (irq - 64))); - } - } else - irq += 32; - } - } - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE); - - if (irq < 0) - return (irq); - else - return (gt64260_irq_base + irq); -} - -/* gt64260_unmask_irq() - * - * This function enables an interrupt. - * - * Input Variable(s): - * unsigned int interrupt number (IRQ0...IRQ95). - * - * Output Variable(s): - * None. - * - * Returns: - * void - */ -static void -gt64260_unmask_irq(unsigned int irq) -{ - irq -= gt64260_irq_base; - - if (irq > 31) - if (irq > 63) /* unmask GPP irq */ - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, - ppc_cached_irq_mask[2] |= (1 << (irq - 64))); - else /* mask high interrupt register */ - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI, - ppc_cached_irq_mask[1] |= (1 << (irq - 32))); - else /* mask low interrupt register */ - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO, - ppc_cached_irq_mask[0] |= (1 << irq)); - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - return; -} - -/* gt64260_mask_irq() - * - * This function disables the requested interrupt. - * - * Input Variable(s): - * unsigned int interrupt number (IRQ0...IRQ95). - * - * Output Variable(s): - * None. - * - * Returns: - * void - */ -static void -gt64260_mask_irq(unsigned int irq) -{ - irq -= gt64260_irq_base; - - if (irq > 31) - if (irq > 63) /* mask GPP irq */ - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, - ppc_cached_irq_mask[2] &= ~(1 << (irq - 64))); - else /* mask high interrupt register */ - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI, - ppc_cached_irq_mask[1] &= ~(1 << (irq - 32))); - else /* mask low interrupt register */ - mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO, - ppc_cached_irq_mask[0] &= ~(1 << irq)); - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - return; -} - -static irqreturn_t -gt64260_cpu_error_int_handler(int irq, void *dev_id) -{ - printk(KERN_ERR "gt64260_cpu_error_int_handler: %s 0x%08x\n", - "Error on CPU interface - Cause regiser", - mv64x60_read(&bh, MV64x60_CPU_ERR_CAUSE)); - printk(KERN_ERR "\tCPU error register dump:\n"); - printk(KERN_ERR "\tAddress low 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress high 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_HI)); - printk(KERN_ERR "\tData low 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_LO)); - printk(KERN_ERR "\tData high 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_HI)); - printk(KERN_ERR "\tParity 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_PARITY)); - mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0); - return IRQ_HANDLED; -} - -static irqreturn_t -gt64260_pci_error_int_handler(int irq, void *dev_id) -{ - u32 val; - unsigned int pci_bus = (unsigned int)dev_id; - - if (pci_bus == 0) { /* Error on PCI 0 */ - val = mv64x60_read(&bh, MV64x60_PCI0_ERR_CAUSE); - printk(KERN_ERR "%s: Error in PCI %d Interface\n", - "gt64260_pci_error_int_handler", pci_bus); - printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus); - printk(KERN_ERR "\tCause register 0x%08x\n", val); - printk(KERN_ERR "\tAddress Low 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress High 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_HI)); - printk(KERN_ERR "\tAttribute 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_DATA_LO)); - printk(KERN_ERR "\tCommand 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_CMD)); - mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, ~val); - } - if (pci_bus == 1) { /* Error on PCI 1 */ - val = mv64x60_read(&bh, MV64x60_PCI1_ERR_CAUSE); - printk(KERN_ERR "%s: Error in PCI %d Interface\n", - "gt64260_pci_error_int_handler", pci_bus); - printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus); - printk(KERN_ERR "\tCause register 0x%08x\n", val); - printk(KERN_ERR "\tAddress Low 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress High 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_HI)); - printk(KERN_ERR "\tAttribute 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_DATA_LO)); - printk(KERN_ERR "\tCommand 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_CMD)); - mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, ~val); - } - return IRQ_HANDLED; -} - -static int __init -gt64260_register_hdlrs(void) -{ - int rc; - - /* Register CPU interface error interrupt handler */ - if ((rc = request_irq(MV64x60_IRQ_CPU_ERR, - gt64260_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0))) - printk(KERN_WARNING "Can't register cpu error handler: %d", rc); - - mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0x000000fe); - - /* Register PCI 0 error interrupt handler */ - if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler, - IRQF_DISABLED, PCI0_INTR_STR, (void *)0))) - printk(KERN_WARNING "Can't register pci 0 error handler: %d", - rc); - - mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0x003c0c24); - - /* Register PCI 1 error interrupt handler */ - if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler, - IRQF_DISABLED, PCI1_INTR_STR, (void *)1))) - printk(KERN_WARNING "Can't register pci 1 error handler: %d", - rc); - - mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0x003c0c24); - - return 0; -} - -arch_initcall(gt64260_register_hdlrs); diff --git a/arch/ppc/syslib/harrier.c b/arch/ppc/syslib/harrier.c deleted file mode 100644 index 45b797b3a3368b2d7c866da25f8d628e9649ca3d..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/harrier.c +++ /dev/null @@ -1,300 +0,0 @@ -/* - * Motorola MCG Harrier northbridge/memory controller support - * - * Author: Dale Farnsworth - * dale.farnsworth@mvista.com - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -/* define defaults for inbound windows */ -#define HARRIER_ITAT_DEFAULT (HARRIER_ITAT_ENA | \ - HARRIER_ITAT_MEM | \ - HARRIER_ITAT_WPE | \ - HARRIER_ITAT_GBL) - -#define HARRIER_MPAT_DEFAULT (HARRIER_ITAT_ENA | \ - HARRIER_ITAT_MEM | \ - HARRIER_ITAT_WPE | \ - HARRIER_ITAT_GBL) - -/* - * Initialize the inbound window size on a non-monarch harrier. - */ -void __init harrier_setup_nonmonarch(uint ppc_reg_base, uint in0_size) -{ - u16 temps; - u32 temp; - - if (in0_size > HARRIER_ITSZ_2GB) { - printk - ("harrier_setup_nonmonarch: Invalid window size code %d\n", - in0_size); - return; - } - - /* Clear the PCI memory enable bit. If we don't, then when the - * inbound windows are enabled below, the corresponding BARs will be - * "live" and start answering to PCI memory reads from their default - * addresses (0x0), which overlap with system RAM. - */ - temps = in_le16((u16 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(PCI_COMMAND))); - temps &= ~(PCI_COMMAND_MEMORY); - out_le16((u16 *) (ppc_reg_base + HARRIER_XCSR_CONFIG(PCI_COMMAND)), - temps); - - /* Setup a non-prefetchable inbound window */ - out_le32((u32 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(HARRIER_ITSZ0_OFF)), in0_size); - - temp = in_le32((u32 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(HARRIER_ITAT0_OFF))); - temp &= ~HARRIER_ITAT_PRE; - temp |= HARRIER_ITAT_DEFAULT; - out_le32((u32 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(HARRIER_ITAT0_OFF)), temp); - - /* Enable the message passing block */ - temp = in_le32((u32 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(HARRIER_MPAT_OFF))); - temp |= HARRIER_MPAT_DEFAULT; - out_le32((u32 *) (ppc_reg_base + - HARRIER_XCSR_CONFIG(HARRIER_MPAT_OFF)), temp); -} - -void __init harrier_release_eready(uint ppc_reg_base) -{ - ulong temp; - - /* - * Set EREADY to allow the line to be pulled up after everyone is - * ready. - */ - temp = in_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF)); - temp |= HARRIER_EREADY; - out_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF), temp); -} - -void __init harrier_wait_eready(uint ppc_reg_base) -{ - ulong temp; - - /* - * Poll the ERDYS line until it goes high to indicate that all - * non-monarch PrPMCs are ready for bus enumeration (or that there are - * no PrPMCs present). - */ - - /* FIXME: Add a timeout of some kind to prevent endless waits. */ - do { - - temp = in_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF)); - - } while (!(temp & HARRIER_ERDYS)); -} - -/* - * Initialize the Motorola MCG Harrier host bridge. - * - * This means setting up the PPC bus to PCI memory and I/O space mappings, - * setting the PCI memory space address of the MPIC (mapped straight - * through), and ioremap'ing the mpic registers. - * 'OpenPIC_Addr' will be set correctly by this routine. - * This routine will not change the PCI_CONFIG_ADDR or PCI_CONFIG_DATA - * addresses and assumes that the mapping of PCI memory space back to system - * memory is set up correctly by PPCBug. - */ -int __init -harrier_init(struct pci_controller *hose, - uint ppc_reg_base, - ulong processor_pci_mem_start, - ulong processor_pci_mem_end, - ulong processor_pci_io_start, - ulong processor_pci_io_end, ulong processor_mpic_base) -{ - uint addr, offset; - - /* - * Some sanity checks... - */ - if (((processor_pci_mem_start & 0xffff0000) != processor_pci_mem_start) - || ((processor_pci_io_start & 0xffff0000) != - processor_pci_io_start)) { - printk("harrier_init: %s\n", - "PPC to PCI mappings must start on 64 KB boundaries"); - return -1; - } - - if (((processor_pci_mem_end & 0x0000ffff) != 0x0000ffff) || - ((processor_pci_io_end & 0x0000ffff) != 0x0000ffff)) { - printk("harrier_init: PPC to PCI mappings %s\n", - "must end just before a 64 KB boundaries"); - return -1; - } - - if (((processor_pci_mem_end - processor_pci_mem_start) != - (hose->mem_space.end - hose->mem_space.start)) || - ((processor_pci_io_end - processor_pci_io_start) != - (hose->io_space.end - hose->io_space.start))) { - printk("harrier_init: %s\n", - "PPC and PCI memory or I/O space sizes don't match"); - return -1; - } - - if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) { - printk("harrier_init: %s\n", - "MPIC address must start on 256 KB boundary"); - return -1; - } - - if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) { - printk("harrier_init: %s\n", - "pci_dram_offset must be multiple of 64 KB"); - return -1; - } - - /* - * Program the OTAD/OTOF registers to set up the PCI Mem & I/O - * space mappings. These are the mappings going from the processor to - * the PCI bus. - * - * Note: Don't need to 'AND' start/end addresses with 0xffff0000 - * because sanity check above ensures that they are properly - * aligned. - */ - - /* Set up PPC->PCI Mem mapping */ - addr = processor_pci_mem_start | (processor_pci_mem_end >> 16); -#ifdef CONFIG_HARRIER_STORE_GATHERING - offset = (hose->mem_space.start - processor_pci_mem_start) | 0x9a; -#else - offset = (hose->mem_space.start - processor_pci_mem_start) | 0x92; -#endif - out_be32((uint *) (ppc_reg_base + HARRIER_OTAD0_OFF), addr); - out_be32((uint *) (ppc_reg_base + HARRIER_OTOF0_OFF), offset); - - /* Set up PPC->PCI I/O mapping -- Contiguous I/O space */ - addr = processor_pci_io_start | (processor_pci_io_end >> 16); - offset = (hose->io_space.start - processor_pci_io_start) | 0x80; - out_be32((uint *) (ppc_reg_base + HARRIER_OTAD1_OFF), addr); - out_be32((uint *) (ppc_reg_base + HARRIER_OTOF1_OFF), offset); - - /* Enable MPIC */ - OpenPIC_Addr = (void *)processor_mpic_base; - addr = (processor_mpic_base >> 16) | 1; - out_be16((ushort *) (ppc_reg_base + HARRIER_MBAR_OFF), addr); - out_8((u_char *) (ppc_reg_base + HARRIER_MPIC_CSR_OFF), - HARRIER_MPIC_OPI_ENABLE); - - return 0; -} - -/* - * Find the amount of RAM present. - * This assumes that PPCBug has initialized the memory controller (SMC) - * on the Harrier correctly (i.e., it does no sanity checking). - * It also assumes that the memory base registers are set to configure the - * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc. - * however, RAM base registers can be skipped (e.g. A, B, C are set, - * D is skipped but E is set is okay). - */ -#define MB (1024*1024UL) - -static uint harrier_size_table[] __initdata = { - 0 * MB, /* 0 ==> 0 MB */ - 32 * MB, /* 1 ==> 32 MB */ - 64 * MB, /* 2 ==> 64 MB */ - 64 * MB, /* 3 ==> 64 MB */ - 128 * MB, /* 4 ==> 128 MB */ - 128 * MB, /* 5 ==> 128 MB */ - 128 * MB, /* 6 ==> 128 MB */ - 256 * MB, /* 7 ==> 256 MB */ - 256 * MB, /* 8 ==> 256 MB */ - 256 * MB, /* 9 ==> 256 MB */ - 512 * MB, /* a ==> 512 MB */ - 512 * MB, /* b ==> 512 MB */ - 512 * MB, /* c ==> 512 MB */ - 1024 * MB, /* d ==> 1024 MB */ - 1024 * MB, /* e ==> 1024 MB */ - 2048 * MB, /* f ==> 2048 MB */ -}; - -/* - * *** WARNING: You MUST have a BAT set up to map in the XCSR regs *** - * - * Read the memory controller's registers to determine the amount of system - * memory. Assumes that the memory controller registers are already mapped - * into virtual memory--too early to use ioremap(). - */ -unsigned long __init harrier_get_mem_size(uint xcsr_base) -{ - ulong last_addr; - int i; - uint vend_dev_id; - uint *size_table; - uint val; - uint *csrp; - uint size; - int size_table_entries; - - vend_dev_id = in_be32((uint *) xcsr_base + PCI_VENDOR_ID); - - if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) { - printk("harrier_get_mem_size: %s (0x%x)\n", - "Not a Motorola Memory Controller", vend_dev_id); - return 0; - } - - vend_dev_id &= 0x0000ffff; - - if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_HARRIER) { - size_table = harrier_size_table; - size_table_entries = sizeof(harrier_size_table) / - sizeof(harrier_size_table[0]); - } else { - printk("harrier_get_mem_size: %s (0x%x)\n", - "Not a Harrier", vend_dev_id); - return 0; - } - - last_addr = 0; - - csrp = (uint *) (xcsr_base + HARRIER_SDBA_OFF); - for (i = 0; i < 8; i++) { - val = in_be32(csrp++); - - if (val & 0x100) { /* If enabled */ - size = val >> HARRIER_SDB_SIZE_SHIFT; - size &= HARRIER_SDB_SIZE_MASK; - if (size >= size_table_entries) { - break; /* Register not set correctly */ - } - size = size_table[size]; - - val &= ~(size - 1); - val += size; - - if (val > last_addr) { - last_addr = val; - } - } - } - - return last_addr; -} diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c deleted file mode 100644 index 86821d8753ed125726e9574ba3a671134a84a252..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/hawk_common.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - * Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK. - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -/* - * The Falcon/Raven and HAWK has 4 sets of registers: - * 1) PPC Registers which define the mappings from PPC bus to PCI bus, - * etc. - * 2) PCI Registers which define the mappings from PCI bus to PPC bus and the - * MPIC base address. - * 3) MPIC registers. - * 4) System Memory Controller (SMC) registers. - */ - -/* - * Initialize the Motorola MCG Raven or HAWK host bridge. - * - * This means setting up the PPC bus to PCI memory and I/O space mappings, - * setting the PCI memory space address of the MPIC (mapped straight - * through), and ioremap'ing the mpic registers. - * This routine will set the PCI_CONFIG_ADDR or PCI_CONFIG_DATA - * addresses based on the PCI I/O address that is passed in. - * 'OpenPIC_Addr' will be set correctly by this routine. - */ -int __init -hawk_init(struct pci_controller *hose, - uint ppc_reg_base, - ulong processor_pci_mem_start, - ulong processor_pci_mem_end, - ulong processor_pci_io_start, - ulong processor_pci_io_end, - ulong processor_mpic_base) -{ - uint addr, offset; - - /* - * Some sanity checks... - */ - if (((processor_pci_mem_start&0xffff0000) != processor_pci_mem_start) || - ((processor_pci_io_start &0xffff0000) != processor_pci_io_start)) { - printk("hawk_init: %s\n", - "PPC to PCI mappings must start on 64 KB boundaries"); - return -1; - } - - if (((processor_pci_mem_end &0x0000ffff) != 0x0000ffff) || - ((processor_pci_io_end &0x0000ffff) != 0x0000ffff)) { - printk("hawk_init: PPC to PCI mappings %s\n", - "must end just before a 64 KB boundaries"); - return -1; - } - - if (((processor_pci_mem_end - processor_pci_mem_start) != - (hose->mem_space.end - hose->mem_space.start)) || - ((processor_pci_io_end - processor_pci_io_start) != - (hose->io_space.end - hose->io_space.start))) { - printk("hawk_init: %s\n", - "PPC and PCI memory or I/O space sizes don't match"); - return -1; - } - - if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) { - printk("hawk_init: %s\n", - "MPIC address must start on 256 MB boundary"); - return -1; - } - - if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) { - printk("hawk_init: %s\n", - "pci_dram_offset must be multiple of 64 KB"); - return -1; - } - - /* - * Disable previous PPC->PCI mappings. - */ - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF0_OFF), 0x00000000); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF1_OFF), 0x00000000); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF2_OFF), 0x00000000); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF3_OFF), 0x00000000); - - /* - * Program the XSADD/XSOFF registers to set up the PCI Mem & I/O - * space mappings. These are the mappings going from the processor to - * the PCI bus. - * - * Note: Don't need to 'AND' start/end addresses with 0xffff0000 - * because sanity check above ensures that they are properly - * aligned. - */ - - /* Set up PPC->PCI Mem mapping */ - addr = processor_pci_mem_start | (processor_pci_mem_end >> 16); - offset = (hose->mem_space.start - processor_pci_mem_start) | 0xd2; - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD0_OFF), addr); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF0_OFF), offset); - - /* Set up PPC->MPIC mapping on the bridge */ - addr = processor_mpic_base | - (((processor_mpic_base + HAWK_MPIC_SIZE) >> 16) - 1); - /* No write posting for this PCI Mem space */ - offset = (hose->mem_space.start - processor_pci_mem_start) | 0xc2; - - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD1_OFF), addr); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF1_OFF), offset); - - /* Set up PPC->PCI I/O mapping -- Contiguous I/O space */ - addr = processor_pci_io_start | (processor_pci_io_end >> 16); - offset = (hose->io_space.start - processor_pci_io_start) | 0xc0; - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD3_OFF), addr); - out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF3_OFF), offset); - - hose->io_base_virt = (void *)ioremap(processor_pci_io_start, - (processor_pci_io_end - processor_pci_io_start + 1)); - - /* - * Set up the indirect method of accessing PCI config space. - * The PCI config addr/data pair based on start addr of PCI I/O space. - */ - setup_indirect_pci(hose, - processor_pci_io_start + HAWK_PCI_CONFIG_ADDR_OFF, - processor_pci_io_start + HAWK_PCI_CONFIG_DATA_OFF); - - /* - * Disable previous PCI->PPC mappings. - */ - - /* XXXX Put in mappings from PCI bus to processor bus XXXX */ - - /* - * Disable MPIC response to PCI I/O space (BAR 0). - * Make MPIC respond to PCI Mem space at specified address. - * (BAR 1). - */ - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - PCI_BASE_ADDRESS_0, - 0x00000000 | 0x1); - - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - PCI_BASE_ADDRESS_1, - (processor_mpic_base - - processor_pci_mem_start + - hose->mem_space.start) | 0x0); - - /* Map MPIC into virtual memory */ - OpenPIC_Addr = ioremap(processor_mpic_base, HAWK_MPIC_SIZE); - - return 0; -} - -/* - * Find the amount of RAM present. - * This assumes that PPCBug has initialized the memory controller (SMC) - * on the Falcon/HAWK correctly (i.e., it does no sanity checking). - * It also assumes that the memory base registers are set to configure the - * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc. - * however, RAM base registers can be skipped (e.g. A, B, C are set, - * D is skipped but E is set is okay). - */ -#define MB (1024*1024) - -static uint reg_offset_table[] __initdata = { - HAWK_SMC_RAM_A_SIZE_REG_OFF, - HAWK_SMC_RAM_B_SIZE_REG_OFF, - HAWK_SMC_RAM_C_SIZE_REG_OFF, - HAWK_SMC_RAM_D_SIZE_REG_OFF, - HAWK_SMC_RAM_E_SIZE_REG_OFF, - HAWK_SMC_RAM_F_SIZE_REG_OFF, - HAWK_SMC_RAM_G_SIZE_REG_OFF, - HAWK_SMC_RAM_H_SIZE_REG_OFF -}; - -static uint falcon_size_table[] __initdata = { - 0 * MB, /* 0 ==> 0 MB */ - 16 * MB, /* 1 ==> 16 MB */ - 32 * MB, /* 2 ==> 32 MB */ - 64 * MB, /* 3 ==> 64 MB */ - 128 * MB, /* 4 ==> 128 MB */ - 256 * MB, /* 5 ==> 256 MB */ - 1024 * MB, /* 6 ==> 1024 MB (1 GB) */ -}; - -static uint hawk_size_table[] __initdata = { - 0 * MB, /* 0 ==> 0 MB */ - 32 * MB, /* 1 ==> 32 MB */ - 64 * MB, /* 2 ==> 64 MB */ - 64 * MB, /* 3 ==> 64 MB */ - 128 * MB, /* 4 ==> 128 MB */ - 128 * MB, /* 5 ==> 128 MB */ - 128 * MB, /* 6 ==> 128 MB */ - 256 * MB, /* 7 ==> 256 MB */ - 256 * MB, /* 8 ==> 256 MB */ - 512 * MB, /* 9 ==> 512 MB */ -}; - -/* - * *** WARNING: You MUST have a BAT set up to map in the SMC regs *** - * - * Read the memory controller's registers to determine the amount of system - * memory. Assumes that the memory controller registers are already mapped - * into virtual memory--too early to use ioremap(). - */ -unsigned long __init -hawk_get_mem_size(uint smc_base) -{ - unsigned long total; - int i, size_table_entries, reg_limit; - uint vend_dev_id; - uint *size_table; - u_char val; - - - vend_dev_id = in_be32((uint *)smc_base + PCI_VENDOR_ID); - - if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) { - printk("hawk_get_mem_size: %s (0x%x)\n", - "Not a Motorola Memory Controller", vend_dev_id); - return 0; - } - - vend_dev_id &= 0x0000ffff; - - if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_FALCON) { - size_table = falcon_size_table; - size_table_entries = sizeof(falcon_size_table) / - sizeof(falcon_size_table[0]); - - reg_limit = FALCON_SMC_REG_COUNT; - } - else if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_HAWK) { - size_table = hawk_size_table; - size_table_entries = sizeof(hawk_size_table) / - sizeof(hawk_size_table[0]); - reg_limit = HAWK_SMC_REG_COUNT; - } - else { - printk("hawk_get_mem_size: %s (0x%x)\n", - "Not a Falcon or HAWK", vend_dev_id); - return 0; - } - - total = 0; - - /* Check every reg because PPCBug may skip some */ - for (i=0; i -#include -#include -#include -#include - -static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */ - -static unsigned char cached_8259[2] = { 0xff, 0xff }; -#define cached_A1 (cached_8259[0]) -#define cached_21 (cached_8259[1]) - -static DEFINE_SPINLOCK(i8259_lock); - -static int i8259_pic_irq_offset; - -/* - * Acknowledge the IRQ using either the PCI host bridge's interrupt - * acknowledge feature or poll. How i8259_init() is called determines - * which is called. It should be noted that polling is broken on some - * IBM and Motorola PReP boxes so we must use the int-ack feature on them. - */ -int i8259_irq(void) -{ - int irq; - - spin_lock(&i8259_lock); - - /* Either int-ack or poll for the IRQ */ - if (pci_intack) - irq = readb(pci_intack); - else { - /* Perform an interrupt acknowledge cycle on controller 1. */ - outb(0x0C, 0x20); /* prepare for poll */ - irq = inb(0x20) & 7; - if (irq == 2 ) { - /* - * Interrupt is cascaded so perform interrupt - * acknowledge on controller 2. - */ - outb(0x0C, 0xA0); /* prepare for poll */ - irq = (inb(0xA0) & 7) + 8; - } - } - - if (irq == 7) { - /* - * This may be a spurious interrupt. - * - * Read the interrupt status register (ISR). If the most - * significant bit is not set then there is no valid - * interrupt. - */ - if (!pci_intack) - outb(0x0B, 0x20); /* ISR register */ - if(~inb(0x20) & 0x80) - irq = -1; - } - - spin_unlock(&i8259_lock); - return irq + i8259_pic_irq_offset; -} - -static void i8259_mask_and_ack_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - irq_nr -= i8259_pic_irq_offset; - if (irq_nr > 7) { - cached_A1 |= 1 << (irq_nr-8); - inb(0xA1); /* DUMMY */ - outb(cached_A1, 0xA1); - outb(0x20, 0xA0); /* Non-specific EOI */ - outb(0x20, 0x20); /* Non-specific EOI to cascade */ - } else { - cached_21 |= 1 << irq_nr; - inb(0x21); /* DUMMY */ - outb(cached_21, 0x21); - outb(0x20, 0x20); /* Non-specific EOI */ - } - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static void i8259_set_irq_mask(int irq_nr) -{ - outb(cached_A1,0xA1); - outb(cached_21,0x21); -} - -static void i8259_mask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - irq_nr -= i8259_pic_irq_offset; - if (irq_nr < 8) - cached_21 |= 1 << irq_nr; - else - cached_A1 |= 1 << (irq_nr-8); - i8259_set_irq_mask(irq_nr); - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static void i8259_unmask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - irq_nr -= i8259_pic_irq_offset; - if (irq_nr < 8) - cached_21 &= ~(1 << irq_nr); - else - cached_A1 &= ~(1 << (irq_nr-8)); - i8259_set_irq_mask(irq_nr); - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static struct irq_chip i8259_pic = { - .typename = " i8259 ", - .mask = i8259_mask_irq, - .disable = i8259_mask_irq, - .unmask = i8259_unmask_irq, - .mask_ack = i8259_mask_and_ack_irq, -}; - -static struct resource pic1_iores = { - .name = "8259 (master)", - .start = 0x20, - .end = 0x21, - .flags = IORESOURCE_BUSY, -}; - -static struct resource pic2_iores = { - .name = "8259 (slave)", - .start = 0xa0, - .end = 0xa1, - .flags = IORESOURCE_BUSY, -}; - -static struct resource pic_edgectrl_iores = { - .name = "8259 edge control", - .start = 0x4d0, - .end = 0x4d1, - .flags = IORESOURCE_BUSY, -}; - -static struct irqaction i8259_irqaction = { - .handler = no_action, - .flags = IRQF_DISABLED, - .mask = CPU_MASK_NONE, - .name = "82c59 secondary cascade", -}; - -/* - * i8259_init() - * intack_addr - PCI interrupt acknowledge (real) address which will return - * the active irq from the 8259 - */ -void __init i8259_init(unsigned long intack_addr, int offset) -{ - unsigned long flags; - int i; - - spin_lock_irqsave(&i8259_lock, flags); - i8259_pic_irq_offset = offset; - - /* init master interrupt controller */ - outb(0x11, 0x20); /* Start init sequence */ - outb(0x00, 0x21); /* Vector base */ - outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */ - outb(0x01, 0x21); /* Select 8086 mode */ - - /* init slave interrupt controller */ - outb(0x11, 0xA0); /* Start init sequence */ - outb(0x08, 0xA1); /* Vector base */ - outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ - outb(0x01, 0xA1); /* Select 8086 mode */ - - /* always read ISR */ - outb(0x0B, 0x20); - outb(0x0B, 0xA0); - - /* Mask all interrupts */ - outb(cached_A1, 0xA1); - outb(cached_21, 0x21); - - spin_unlock_irqrestore(&i8259_lock, flags); - - for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) { - set_irq_chip_and_handler(offset + i, &i8259_pic, - handle_level_irq); - irq_desc[offset + i].status |= IRQ_LEVEL; - } - - /* reserve our resources */ - setup_irq(offset + 2, &i8259_irqaction); - request_resource(&ioport_resource, &pic1_iores); - request_resource(&ioport_resource, &pic2_iores); - request_resource(&ioport_resource, &pic_edgectrl_iores); - - if (intack_addr != 0) - pci_intack = ioremap(intack_addr, 1); - -} diff --git a/arch/ppc/syslib/ibm440gp_common.c b/arch/ppc/syslib/ibm440gp_common.c deleted file mode 100644 index a3927ec9b5d7e46429ed13c538edf0a2b71a04a0..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440gp_common.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * PPC440GP system library - * - * Matt Porter - * Copyright 2002-2003 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include - -/* - * Calculate 440GP clocks - */ -void __init ibm440gp_get_clocks(struct ibm44x_clocks* p, - unsigned int sys_clk, - unsigned int ser_clk) -{ - u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0); - u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0); - u32 opdv = ((cpc0_sys0 >> 10) & 0x3) + 1; - u32 epdv = ((cpc0_sys0 >> 8) & 0x3) + 1; - - if (cpc0_sys0 & 0x2){ - /* Bypass system PLL */ - p->cpu = p->plb = sys_clk; - } - else { - u32 fbdv, fwdva, fwdvb, m, vco; - - fbdv = (cpc0_sys0 >> 18) & 0x0f; - if (!fbdv) - fbdv = 16; - - fwdva = 8 - ((cpc0_sys0 >> 15) & 0x7); - fwdvb = 8 - ((cpc0_sys0 >> 12) & 0x7); - - /* Feedback path */ - if (cpc0_sys0 & 0x00000080){ - /* PerClk */ - m = fwdvb * opdv * epdv; - } - else { - /* CPU clock */ - m = fbdv * fwdva; - } - vco = sys_clk * m; - p->cpu = vco / fwdva; - p->plb = vco / fwdvb; - } - - p->opb = p->plb / opdv; - p->ebc = p->opb / epdv; - - if (cpc0_cr0 & 0x00400000){ - /* External UART clock */ - p->uart0 = p->uart1 = ser_clk; - } - else { - /* Internal UART clock */ - u32 uart_div = ((cpc0_cr0 >> 16) & 0x1f) + 1; - p->uart0 = p->uart1 = p->plb / uart_div; - } -} diff --git a/arch/ppc/syslib/ibm440gp_common.h b/arch/ppc/syslib/ibm440gp_common.h deleted file mode 100644 index 94d7835038adab254d9fc41f603eaf169b7d3ed3..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440gp_common.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * PPC440GP system library - * - * Eugene Surovegin or - * Copyright (c) 2003 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#ifdef __KERNEL__ -#ifndef __PPC_SYSLIB_IBM440GP_COMMON_H -#define __PPC_SYSLIB_IBM440GP_COMMON_H - -#ifndef __ASSEMBLY__ - -#include -#include - -/* - * Please, refer to the Figure 13.1 in 440GP user manual - * - * if internal UART clock is used, ser_clk is ignored - */ -void ibm440gp_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, - unsigned int ser_clk) __init; - -#endif /* __ASSEMBLY__ */ -#endif /* __PPC_SYSLIB_IBM440GP_COMMON_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c deleted file mode 100644 index 6ad52f4a26e171dd4c586459375b71a08f0ad439..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440gx_common.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * PPC440GX system library - * - * Eugene Surovegin or - * Copyright (c) 2003 - 2006 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include -#include - -/* - * Calculate 440GX clocks - */ -static inline u32 __fix_zero(u32 v, u32 def){ - return v ? v : def; -} - -void __init ibm440gx_get_clocks(struct ibm44x_clocks* p, unsigned int sys_clk, - unsigned int ser_clk) -{ - u32 pllc = CPR_READ(DCRN_CPR_PLLC); - u32 plld = CPR_READ(DCRN_CPR_PLLD); - u32 uart0 = SDR_READ(DCRN_SDR_UART0); - u32 uart1 = SDR_READ(DCRN_SDR_UART1); -#ifdef CONFIG_440EP - u32 uart2 = SDR_READ(DCRN_SDR_UART2); - u32 uart3 = SDR_READ(DCRN_SDR_UART3); -#endif - - /* Dividers */ - u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32); - u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16); - u32 fwdvb = __fix_zero((plld >> 8) & 7, 8); - u32 lfbdv = __fix_zero(plld & 0x3f, 64); - u32 pradv0 = __fix_zero((CPR_READ(DCRN_CPR_PRIMAD) >> 24) & 7, 8); - u32 prbdv0 = __fix_zero((CPR_READ(DCRN_CPR_PRIMBD) >> 24) & 7, 8); - u32 opbdv0 = __fix_zero((CPR_READ(DCRN_CPR_OPBD) >> 24) & 3, 4); - u32 perdv0 = __fix_zero((CPR_READ(DCRN_CPR_PERD) >> 24) & 3, 4); - - /* Input clocks for primary dividers */ - u32 clk_a, clk_b; - - if (pllc & 0x40000000){ - u32 m; - - /* Feedback path */ - switch ((pllc >> 24) & 7){ - case 0: - /* PLLOUTx */ - m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv; - break; - case 1: - /* CPU */ - m = fwdva * pradv0; - break; - case 5: - /* PERClk */ - m = fwdvb * prbdv0 * opbdv0 * perdv0; - break; - default: - printk(KERN_EMERG "invalid PLL feedback source\n"); - goto bypass; - } - m *= fbdv; - p->vco = sys_clk * m; - clk_a = p->vco / fwdva; - clk_b = p->vco / fwdvb; - } - else { -bypass: - /* Bypass system PLL */ - p->vco = 0; - clk_a = clk_b = sys_clk; - } - - p->cpu = clk_a / pradv0; - p->plb = clk_b / prbdv0; - p->opb = p->plb / opbdv0; - p->ebc = p->opb / perdv0; - - /* UARTs clock */ - if (uart0 & 0x00800000) - p->uart0 = ser_clk; - else - p->uart0 = p->plb / __fix_zero(uart0 & 0xff, 256); - - if (uart1 & 0x00800000) - p->uart1 = ser_clk; - else - p->uart1 = p->plb / __fix_zero(uart1 & 0xff, 256); -#ifdef CONFIG_440EP - if (uart2 & 0x00800000) - p->uart2 = ser_clk; - else - p->uart2 = p->plb / __fix_zero(uart2 & 0xff, 256); - - if (uart3 & 0x00800000) - p->uart3 = ser_clk; - else - p->uart3 = p->plb / __fix_zero(uart3 & 0xff, 256); -#endif -} - -/* Issue L2C diagnostic command */ -static inline u32 l2c_diag(u32 addr) -{ - mtdcr(DCRN_L2C0_ADDR, addr); - mtdcr(DCRN_L2C0_CMD, L2C_CMD_DIAG); - while (!(mfdcr(DCRN_L2C0_SR) & L2C_SR_CC)) ; - return mfdcr(DCRN_L2C0_DATA); -} - -static irqreturn_t l2c_error_handler(int irq, void* dev) -{ - u32 sr = mfdcr(DCRN_L2C0_SR); - if (sr & L2C_SR_CPE){ - /* Read cache trapped address */ - u32 addr = l2c_diag(0x42000000); - printk(KERN_EMERG "L2C: Cache Parity Error, addr[16:26] = 0x%08x\n", addr); - } - if (sr & L2C_SR_TPE){ - /* Read tag trapped address */ - u32 addr = l2c_diag(0x82000000) >> 16; - printk(KERN_EMERG "L2C: Tag Parity Error, addr[16:26] = 0x%08x\n", addr); - } - - /* Clear parity errors */ - if (sr & (L2C_SR_CPE | L2C_SR_TPE)){ - mtdcr(DCRN_L2C0_ADDR, 0); - mtdcr(DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); - } else - printk(KERN_EMERG "L2C: LRU error\n"); - - return IRQ_HANDLED; -} - -/* Enable L2 cache */ -void __init ibm440gx_l2c_enable(void){ - u32 r; - unsigned long flags; - - /* Install error handler */ - if (request_irq(87, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0){ - printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n"); - return; - } - - local_irq_save(flags); - asm volatile ("sync" ::: "memory"); - - /* Disable SRAM */ - mtdcr(DCRN_SRAM0_DPC, mfdcr(DCRN_SRAM0_DPC) & ~SRAM_DPC_ENABLE); - mtdcr(DCRN_SRAM0_SB0CR, mfdcr(DCRN_SRAM0_SB0CR) & ~SRAM_SBCR_BU_MASK); - mtdcr(DCRN_SRAM0_SB1CR, mfdcr(DCRN_SRAM0_SB1CR) & ~SRAM_SBCR_BU_MASK); - mtdcr(DCRN_SRAM0_SB2CR, mfdcr(DCRN_SRAM0_SB2CR) & ~SRAM_SBCR_BU_MASK); - mtdcr(DCRN_SRAM0_SB3CR, mfdcr(DCRN_SRAM0_SB3CR) & ~SRAM_SBCR_BU_MASK); - - /* Enable L2_MODE without ICU/DCU */ - r = mfdcr(DCRN_L2C0_CFG) & ~(L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_SS_MASK); - r |= L2C_CFG_L2M | L2C_CFG_SS_256; - mtdcr(DCRN_L2C0_CFG, r); - - mtdcr(DCRN_L2C0_ADDR, 0); - - /* Hardware Clear Command */ - mtdcr(DCRN_L2C0_CMD, L2C_CMD_HCC); - while (!(mfdcr(DCRN_L2C0_SR) & L2C_SR_CC)) ; - - /* Clear Cache Parity and Tag Errors */ - mtdcr(DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE); - - /* Enable 64G snoop region starting at 0 */ - r = mfdcr(DCRN_L2C0_SNP0) & ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); - r |= L2C_SNP_SSR_32G | L2C_SNP_ESR; - mtdcr(DCRN_L2C0_SNP0, r); - - r = mfdcr(DCRN_L2C0_SNP1) & ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK); - r |= 0x80000000 | L2C_SNP_SSR_32G | L2C_SNP_ESR; - mtdcr(DCRN_L2C0_SNP1, r); - - asm volatile ("sync" ::: "memory"); - - /* Enable ICU/DCU ports */ - r = mfdcr(DCRN_L2C0_CFG); - r &= ~(L2C_CFG_DCW_MASK | L2C_CFG_PMUX_MASK | L2C_CFG_PMIM | L2C_CFG_TPEI - | L2C_CFG_CPEI | L2C_CFG_NAM | L2C_CFG_NBRM); - r |= L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_TPC | L2C_CFG_CPC | L2C_CFG_FRAN - | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; - mtdcr(DCRN_L2C0_CFG, r); - - asm volatile ("sync; isync" ::: "memory"); - local_irq_restore(flags); -} - -/* Disable L2 cache */ -void __init ibm440gx_l2c_disable(void){ - u32 r; - unsigned long flags; - - local_irq_save(flags); - asm volatile ("sync" ::: "memory"); - - /* Disable L2C mode */ - r = mfdcr(DCRN_L2C0_CFG) & ~(L2C_CFG_L2M | L2C_CFG_ICU | L2C_CFG_DCU); - mtdcr(DCRN_L2C0_CFG, r); - - /* Enable SRAM */ - mtdcr(DCRN_SRAM0_DPC, mfdcr(DCRN_SRAM0_DPC) | SRAM_DPC_ENABLE); - mtdcr(DCRN_SRAM0_SB0CR, - SRAM_SBCR_BAS0 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW); - mtdcr(DCRN_SRAM0_SB1CR, - SRAM_SBCR_BAS1 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW); - mtdcr(DCRN_SRAM0_SB2CR, - SRAM_SBCR_BAS2 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW); - mtdcr(DCRN_SRAM0_SB3CR, - SRAM_SBCR_BAS3 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW); - - asm volatile ("sync; isync" ::: "memory"); - local_irq_restore(flags); -} - -void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p) -{ - /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C, - enable it on all other revisions - */ - if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 || - strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0 - || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") - == 0 && p->cpu > 667000000)) - ibm440gx_l2c_disable(); - else - ibm440gx_l2c_enable(); -} - -int __init ibm440gx_get_eth_grp(void) -{ - return (SDR_READ(DCRN_SDR_PFC1) & DCRN_SDR_PFC1_EPS) >> DCRN_SDR_PFC1_EPS_SHIFT; -} - -void __init ibm440gx_set_eth_grp(int group) -{ - SDR_WRITE(DCRN_SDR_PFC1, (SDR_READ(DCRN_SDR_PFC1) & ~DCRN_SDR_PFC1_EPS) | (group << DCRN_SDR_PFC1_EPS_SHIFT)); -} - -void __init ibm440gx_tah_enable(void) -{ - /* Enable TAH0 and TAH1 */ - SDR_WRITE(DCRN_SDR_MFR,SDR_READ(DCRN_SDR_MFR) & - ~DCRN_SDR_MFR_TAH0); - SDR_WRITE(DCRN_SDR_MFR,SDR_READ(DCRN_SDR_MFR) & - ~DCRN_SDR_MFR_TAH1); -} - -int ibm440gx_show_cpuinfo(struct seq_file *m){ - - u32 l2c_cfg = mfdcr(DCRN_L2C0_CFG); - const char* s; - if (l2c_cfg & L2C_CFG_L2M){ - switch (l2c_cfg & (L2C_CFG_ICU | L2C_CFG_DCU)){ - case L2C_CFG_ICU: s = "I-Cache only"; break; - case L2C_CFG_DCU: s = "D-Cache only"; break; - default: s = "I-Cache/D-Cache"; break; - } - } - else - s = "disabled"; - - seq_printf(m, "L2-Cache\t: %s (0x%08x 0x%08x)\n", s, - l2c_cfg, mfdcr(DCRN_L2C0_SR)); - - return 0; -} - -void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4, - unsigned long r5, unsigned long r6, - unsigned long r7) -{ - /* Erratum 440_43 workaround, disable L1 cache parity checking */ - if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") || - !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F")) - mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC); - - ibm44x_platform_init(r3, r4, r5, r6, r7); -} diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h deleted file mode 100644 index 8d6f203e7a1d8bffea13b65bf8a7e7842a7274a5..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440gx_common.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * PPC440GX system library - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#ifdef __KERNEL__ -#ifndef __PPC_SYSLIB_IBM440GX_COMMON_H -#define __PPC_SYSLIB_IBM440GX_COMMON_H - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -/* - * Please, refer to the Figure 14.1 in 440GX user manual - * - * if internal UART clock is used, ser_clk is ignored - */ -void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, - unsigned int ser_clk) __init; - -/* common 440GX platform init */ -void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) __init; - -/* Enable L2 cache */ -void ibm440gx_l2c_enable(void) __init; - -/* Disable L2 cache */ -void ibm440gx_l2c_disable(void) __init; - -/* Enable/disable L2 cache for a particular chip revision */ -void ibm440gx_l2c_setup(struct ibm44x_clocks*) __init; - -/* Get Ethernet Group */ -int ibm440gx_get_eth_grp(void) __init; - -/* Set Ethernet Group */ -void ibm440gx_set_eth_grp(int group) __init; - -/* Enable TAH devices */ -void ibm440gx_tah_enable(void) __init; - -/* Add L2C info to /proc/cpuinfo */ -int ibm440gx_show_cpuinfo(struct seq_file*); - -#endif /* __ASSEMBLY__ */ -#endif /* __PPC_SYSLIB_IBM440GX_COMMON_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/syslib/ibm440sp_common.c b/arch/ppc/syslib/ibm440sp_common.c deleted file mode 100644 index 571f8bcf78e6e1ddf34b2fba1cbb16fcea9845a1..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440sp_common.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * PPC440SP/PPC440SPe system library - * - * Matt Porter - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include - -#include -#include -#include -#include -#include -#include - -/* - * Read the 440SP memory controller to get size of system memory. - */ -unsigned long __init ibm440sp_find_end_of_memory(void) -{ - u32 i; - u32 mem_size = 0; - - /* Read two bank sizes and sum */ - for (i=0; i< MQ0_NUM_BANKS; i++) - switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) { - case MQ0_CONFIG_SIZE_8M: - mem_size += PPC44x_MEM_SIZE_8M; - break; - case MQ0_CONFIG_SIZE_16M: - mem_size += PPC44x_MEM_SIZE_16M; - break; - case MQ0_CONFIG_SIZE_32M: - mem_size += PPC44x_MEM_SIZE_32M; - break; - case MQ0_CONFIG_SIZE_64M: - mem_size += PPC44x_MEM_SIZE_64M; - break; - case MQ0_CONFIG_SIZE_128M: - mem_size += PPC44x_MEM_SIZE_128M; - break; - case MQ0_CONFIG_SIZE_256M: - mem_size += PPC44x_MEM_SIZE_256M; - break; - case MQ0_CONFIG_SIZE_512M: - mem_size += PPC44x_MEM_SIZE_512M; - break; - case MQ0_CONFIG_SIZE_1G: - mem_size += PPC44x_MEM_SIZE_1G; - break; - case MQ0_CONFIG_SIZE_2G: - mem_size += PPC44x_MEM_SIZE_2G; - break; - default: - break; - } - return mem_size; -} diff --git a/arch/ppc/syslib/ibm440sp_common.h b/arch/ppc/syslib/ibm440sp_common.h deleted file mode 100644 index 8077bf8ed118a5adbdf494897acf4842f17f2861..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm440sp_common.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * PPC440SP system library - * - * Matt Porter - * Copyright 2004-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#ifdef __KERNEL__ -#ifndef __PPC_SYSLIB_IBM440SP_COMMON_H -#define __PPC_SYSLIB_IBM440SP_COMMON_H - -#ifndef __ASSEMBLY__ - -extern unsigned long __init ibm440sp_find_end_of_memory(void); - -#endif /* __ASSEMBLY__ */ -#endif /* __PPC_SYSLIB_IBM440SP_COMMON_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c deleted file mode 100644 index 01f99b4a6649cea79d5486847678a1bc5633f153..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm44x_common.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * PPC44x system library - * - * Matt Porter - * Copyright 2002-2005 MontaVista Software Inc. - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* Global Variables */ -bd_t __res; - -phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size) -{ - phys_addr_t page_4gb = 0; - - /* - * Trap the least significant 32-bit portions of an - * address in the 440's 36-bit address space. Fix - * them up with the appropriate ERPN - */ - if ((addr >= PPC44x_IO_LO) && (addr <= PPC44x_IO_HI)) - page_4gb = PPC44x_IO_PAGE; - else if ((addr >= PPC44x_PCI0CFG_LO) && (addr <= PPC44x_PCI0CFG_HI)) - page_4gb = PPC44x_PCICFG_PAGE; -#ifdef CONFIG_440SP - else if ((addr >= PPC44x_PCI1CFG_LO) && (addr <= PPC44x_PCI1CFG_HI)) - page_4gb = PPC44x_PCICFG_PAGE; - else if ((addr >= PPC44x_PCI2CFG_LO) && (addr <= PPC44x_PCI2CFG_HI)) - page_4gb = PPC44x_PCICFG_PAGE; -#endif - else if ((addr >= PPC44x_PCIMEM_LO) && (addr <= PPC44x_PCIMEM_HI)) - page_4gb = PPC44x_PCIMEM_PAGE; - - return (page_4gb | addr); -}; -EXPORT_SYMBOL(fixup_bigphys_addr); - -void __init ibm44x_calibrate_decr(unsigned int freq) -{ - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); - - /* Set the time base to zero */ - mtspr(SPRN_TBWL, 0); - mtspr(SPRN_TBWU, 0); - - /* Clear any pending timer interrupts */ - mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); - - /* Enable decrementer interrupt */ - mtspr(SPRN_TCR, TCR_DIE); -} - -extern void abort(void); - -static void ibm44x_restart(char *cmd) -{ - local_irq_disable(); - abort(); -} - -static void ibm44x_power_off(void) -{ - local_irq_disable(); - for(;;); -} - -static void ibm44x_halt(void) -{ - local_irq_disable(); - for(;;); -} - -/* - * Read the 44x memory controller to get size of system memory. - */ -static unsigned long __init ibm44x_find_end_of_memory(void) -{ - u32 i, bank_config; - u32 mem_size = 0; - - for (i=0; i<4; i++) - { - switch (i) - { - case 0: - mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B0CR); - break; - case 1: - mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B1CR); - break; - case 2: - mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B2CR); - break; - case 3: - mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B3CR); - break; - } - - bank_config = mfdcr(DCRN_SDRAM0_CFGDATA); - - if (!(bank_config & SDRAM_CONFIG_BANK_ENABLE)) - continue; - switch (SDRAM_CONFIG_BANK_SIZE(bank_config)) - { - case SDRAM_CONFIG_SIZE_8M: - mem_size += PPC44x_MEM_SIZE_8M; - break; - case SDRAM_CONFIG_SIZE_16M: - mem_size += PPC44x_MEM_SIZE_16M; - break; - case SDRAM_CONFIG_SIZE_32M: - mem_size += PPC44x_MEM_SIZE_32M; - break; - case SDRAM_CONFIG_SIZE_64M: - mem_size += PPC44x_MEM_SIZE_64M; - break; - case SDRAM_CONFIG_SIZE_128M: - mem_size += PPC44x_MEM_SIZE_128M; - break; - case SDRAM_CONFIG_SIZE_256M: - mem_size += PPC44x_MEM_SIZE_256M; - break; - case SDRAM_CONFIG_SIZE_512M: - mem_size += PPC44x_MEM_SIZE_512M; - break; - } - } - return mem_size; -} - -void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - -#if defined(CONFIG_BLK_DEV_INITRD) - /* - * If the init RAM disk has been configured in, and there's a valid - * starting address for it, set it up. - */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - /* Copy the kernel command line arguments to a safe place. */ - - if (r6) { - *(char *) (r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *) (r6 + KERNELBASE)); - } - - ppc_md.init_IRQ = ppc4xx_pic_init; - ppc_md.find_end_of_memory = ibm44x_find_end_of_memory; - ppc_md.restart = ibm44x_restart; - ppc_md.power_off = ibm44x_power_off; - ppc_md.halt = ibm44x_halt; - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ -#ifdef CONFIG_KGDB - ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; -#endif - - /* - * The Abatron BDI JTAG debugger does not tolerate others - * mucking with the debug registers. - */ -#if !defined(CONFIG_BDI_SWITCH) - /* Enable internal debug mode */ - mtspr(SPRN_DBCR0, (DBCR0_IDM)); - - /* Clear any residual debug events */ - mtspr(SPRN_DBSR, 0xffffffff); -#endif -} - -/* Called from machine_check_exception */ -void platform_machine_check(struct pt_regs *regs) -{ -#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) - printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n", - mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), - mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESRH), - mfdcr(DCRN_PLB0_BESRL)); - printk("PLB1: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n", - mfdcr(DCRN_PLB1_BEARH), mfdcr(DCRN_PLB1_BEARL), - mfdcr(DCRN_PLB1_ACR), mfdcr(DCRN_PLB1_BESRH), - mfdcr(DCRN_PLB1_BESRL)); -#else - printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n", - mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), - mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESR)); -#endif - printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n", - mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL), - mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1)); - printk("OPB0: BEAR=0x%08x%08x BSTAT=0x%08x\n", - mfdcr(DCRN_OPB0_BEARH), mfdcr(DCRN_OPB0_BEARL), - mfdcr(DCRN_OPB0_BSTAT)); -} diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h deleted file mode 100644 index f179db8634e088f36d26f0cfbfaa2bed8b588cd6..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm44x_common.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * PPC44x system library - * - * Eugene Surovegin or - * Copyright (c) 2003, 2004 Zultys Technologies - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ -#ifdef __KERNEL__ -#ifndef __PPC_SYSLIB_IBM44x_COMMON_H -#define __PPC_SYSLIB_IBM44x_COMMON_H - -#ifndef __ASSEMBLY__ - -/* - * All clocks are in Hz - */ -struct ibm44x_clocks { - unsigned int vco; /* VCO, 0 if system PLL is bypassed */ - unsigned int cpu; /* CPUCoreClk */ - unsigned int plb; /* PLBClk */ - unsigned int opb; /* OPBClk */ - unsigned int ebc; /* PerClk */ - unsigned int uart0; - unsigned int uart1; -#ifdef CONFIG_440EP - unsigned int uart2; - unsigned int uart3; -#endif -}; - -/* common 44x platform init */ -void ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) __init; - -/* initialize decrementer and tick-related variables */ -void ibm44x_calibrate_decr(unsigned int freq) __init; - -#endif /* __ASSEMBLY__ */ -#endif /* __PPC_SYSLIB_IBM44x_COMMON_H */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/syslib/ibm_ocp.c b/arch/ppc/syslib/ibm_ocp.c deleted file mode 100644 index 2ee176610e7c684a477fe7ffa3efce91c1a1c103..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ibm_ocp.c +++ /dev/null @@ -1,10 +0,0 @@ -#include -#include -#include - -struct ocp_sys_info_data ocp_sys_info = { - .opb_bus_freq = 50000000, /* OPB Bus Frequency (Hz) */ - .ebc_bus_freq = 33333333, /* EBC Bus Frequency (Hz) */ -}; - -EXPORT_SYMBOL(ocp_sys_info); diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c deleted file mode 100644 index 83b323a7d0296e4b98a6c71a6b40e99c3a9395b3..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/indirect_pci.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Support for indirect PCI bridges. - * - * Copyright (C) 1998 Gabriel Paubert. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#ifdef CONFIG_PPC_INDIRECT_PCI_BE -#define PCI_CFG_OUT out_be32 -#else -#define PCI_CFG_OUT out_le32 -#endif - -static int -indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 *val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - u8 cfg_type = 0; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (bus->number != hose->first_busno) - cfg_type = 1; - - PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + (offset & 3); - switch (len) { - case 1: - *val = in_8(cfg_data); - break; - case 2: - *val = in_le16(cfg_data); - break; - default: - *val = in_le32(cfg_data); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static int -indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - u8 cfg_type = 0; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (bus->number != hose->first_busno) - cfg_type = 1; - - PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + (offset & 3); - switch (len) { - case 1: - out_8(cfg_data, val); - break; - case 2: - out_le16(cfg_data, val); - break; - default: - out_le32(cfg_data, val); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops indirect_pci_ops = -{ - indirect_read_config, - indirect_write_config -}; - -void __init -setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr, - void __iomem * cfg_data) -{ - hose->cfg_addr = cfg_addr; - hose->cfg_data = cfg_data; - hose->ops = &indirect_pci_ops; -} - -void __init -setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) -{ - unsigned long base = cfg_addr & PAGE_MASK; - void __iomem *mbase, *addr, *data; - - mbase = ioremap(base, PAGE_SIZE); - addr = mbase + (cfg_addr & ~PAGE_MASK); - if ((cfg_data & PAGE_MASK) != base) - mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); - data = mbase + (cfg_data & ~PAGE_MASK); - setup_indirect_pci_nomap(hose, addr, data); -} diff --git a/arch/ppc/syslib/m8260_pci_erratum9.c b/arch/ppc/syslib/m8260_pci_erratum9.c deleted file mode 100644 index ebb8c8f8f30c4886c28214c9a5eea905c82e9f35..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m8260_pci_erratum9.c +++ /dev/null @@ -1,455 +0,0 @@ -/* - * Workaround for device erratum PCI 9. - * See Motorola's "XPC826xA Family Device Errata Reference." - * The erratum applies to all 8260 family Hip4 processors. It is scheduled - * to be fixed in HiP4 Rev C. Erratum PCI 9 states that a simultaneous PCI - * inbound write transaction and PCI outbound read transaction can result in a - * bus deadlock. The suggested workaround is to use the IDMA controller to - * perform all reads from PCI configuration, memory, and I/O space. - * - * Author: andy_lowe@mvista.com - * - * 2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "m82xx_pci.h" - -#ifdef CONFIG_8260_PCI9 -/*#include */ /* included in asm/io.h */ - -#define IDMA_XFER_BUF_SIZE 64 /* size of the IDMA transfer buffer */ - -/* define a structure for the IDMA dpram usage */ -typedef struct idma_dpram_s { - idma_t pram; /* IDMA parameter RAM */ - u_char xfer_buf[IDMA_XFER_BUF_SIZE]; /* IDMA transfer buffer */ - idma_bd_t bd; /* buffer descriptor */ -} idma_dpram_t; - -/* define offsets relative to start of IDMA dpram */ -#define IDMA_XFER_BUF_OFFSET (sizeof(idma_t)) -#define IDMA_BD_OFFSET (sizeof(idma_t) + IDMA_XFER_BUF_SIZE) - -/* define globals */ -static volatile idma_dpram_t *idma_dpram; - -/* Exactly one of CONFIG_8260_PCI9_IDMAn must be defined, - * where n is 1, 2, 3, or 4. This selects the IDMA channel used for - * the PCI9 workaround. - */ -#ifdef CONFIG_8260_PCI9_IDMA1 -#define IDMA_CHAN 0 -#define PROFF_IDMA PROFF_IDMA1_BASE -#define IDMA_PAGE CPM_CR_IDMA1_PAGE -#define IDMA_SBLOCK CPM_CR_IDMA1_SBLOCK -#endif -#ifdef CONFIG_8260_PCI9_IDMA2 -#define IDMA_CHAN 1 -#define PROFF_IDMA PROFF_IDMA2_BASE -#define IDMA_PAGE CPM_CR_IDMA2_PAGE -#define IDMA_SBLOCK CPM_CR_IDMA2_SBLOCK -#endif -#ifdef CONFIG_8260_PCI9_IDMA3 -#define IDMA_CHAN 2 -#define PROFF_IDMA PROFF_IDMA3_BASE -#define IDMA_PAGE CPM_CR_IDMA3_PAGE -#define IDMA_SBLOCK CPM_CR_IDMA3_SBLOCK -#endif -#ifdef CONFIG_8260_PCI9_IDMA4 -#define IDMA_CHAN 3 -#define PROFF_IDMA PROFF_IDMA4_BASE -#define IDMA_PAGE CPM_CR_IDMA4_PAGE -#define IDMA_SBLOCK CPM_CR_IDMA4_SBLOCK -#endif - -void idma_pci9_init(void) -{ - uint dpram_offset; - volatile idma_t *pram; - volatile im_idma_t *idma_reg; - volatile cpm2_map_t *immap = cpm2_immr; - - /* allocate IDMA dpram */ - dpram_offset = cpm_dpalloc(sizeof(idma_dpram_t), 64); - idma_dpram = cpm_dpram_addr(dpram_offset); - - /* initialize the IDMA parameter RAM */ - memset((void *)idma_dpram, 0, sizeof(idma_dpram_t)); - pram = &idma_dpram->pram; - pram->ibase = dpram_offset + IDMA_BD_OFFSET; - pram->dpr_buf = dpram_offset + IDMA_XFER_BUF_OFFSET; - pram->ss_max = 32; - pram->dts = 32; - - /* initialize the IDMA_BASE pointer to the IDMA parameter RAM */ - *((ushort *) &immap->im_dprambase[PROFF_IDMA]) = dpram_offset; - - /* initialize the IDMA registers */ - idma_reg = (volatile im_idma_t *) &immap->im_sdma.sdma_idsr1; - idma_reg[IDMA_CHAN].idmr = 0; /* mask all IDMA interrupts */ - idma_reg[IDMA_CHAN].idsr = 0xff; /* clear all event flags */ - - printk(KERN_WARNING - "Using IDMA%d for MPC8260 device erratum PCI 9 workaround\n", - IDMA_CHAN + 1); - - return; -} - -/* Use the IDMA controller to transfer data from I/O memory to local RAM. - * The src address must be a physical address suitable for use by the DMA - * controller with no translation. The dst address must be a kernel virtual - * address. The dst address is translated to a physical address via - * virt_to_phys(). - * The sinc argument specifies whether or not the source address is incremented - * by the DMA controller. The source address is incremented if and only if sinc - * is non-zero. The destination address is always incremented since the - * destination is always host RAM. - */ -static void -idma_pci9_read(u8 *dst, u8 *src, int bytes, int unit_size, int sinc) -{ - unsigned long flags; - volatile idma_t *pram = &idma_dpram->pram; - volatile idma_bd_t *bd = &idma_dpram->bd; - volatile cpm2_map_t *immap = cpm2_immr; - - local_irq_save(flags); - - /* initialize IDMA parameter RAM for this transfer */ - if (sinc) - pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC - | IDMA_DCM_DINC | IDMA_DCM_SD_MEM2MEM; - else - pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_DINC - | IDMA_DCM_SD_MEM2MEM; - pram->ibdptr = pram->ibase; - pram->sts = unit_size; - pram->istate = 0; - - /* initialize the buffer descriptor */ - bd->dst = virt_to_phys(dst); - bd->src = (uint) src; - bd->len = bytes; - bd->flags = IDMA_BD_V | IDMA_BD_W | IDMA_BD_I | IDMA_BD_L | IDMA_BD_DGBL - | IDMA_BD_DBO_BE | IDMA_BD_SBO_BE | IDMA_BD_SDTB; - - /* issue the START_IDMA command to the CP */ - while (immap->im_cpm.cp_cpcr & CPM_CR_FLG); - immap->im_cpm.cp_cpcr = mk_cr_cmd(IDMA_PAGE, IDMA_SBLOCK, 0, - CPM_CR_START_IDMA) | CPM_CR_FLG; - while (immap->im_cpm.cp_cpcr & CPM_CR_FLG); - - /* wait for transfer to complete */ - while(bd->flags & IDMA_BD_V); - - local_irq_restore(flags); - - return; -} - -/* Use the IDMA controller to transfer data from I/O memory to local RAM. - * The dst address must be a physical address suitable for use by the DMA - * controller with no translation. The src address must be a kernel virtual - * address. The src address is translated to a physical address via - * virt_to_phys(). - * The dinc argument specifies whether or not the dest address is incremented - * by the DMA controller. The source address is incremented if and only if sinc - * is non-zero. The source address is always incremented since the - * source is always host RAM. - */ -static void -idma_pci9_write(u8 *dst, u8 *src, int bytes, int unit_size, int dinc) -{ - unsigned long flags; - volatile idma_t *pram = &idma_dpram->pram; - volatile idma_bd_t *bd = &idma_dpram->bd; - volatile cpm2_map_t *immap = cpm2_immr; - - local_irq_save(flags); - - /* initialize IDMA parameter RAM for this transfer */ - if (dinc) - pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC - | IDMA_DCM_DINC | IDMA_DCM_SD_MEM2MEM; - else - pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC - | IDMA_DCM_SD_MEM2MEM; - pram->ibdptr = pram->ibase; - pram->sts = unit_size; - pram->istate = 0; - - /* initialize the buffer descriptor */ - bd->dst = (uint) dst; - bd->src = virt_to_phys(src); - bd->len = bytes; - bd->flags = IDMA_BD_V | IDMA_BD_W | IDMA_BD_I | IDMA_BD_L | IDMA_BD_DGBL - | IDMA_BD_DBO_BE | IDMA_BD_SBO_BE | IDMA_BD_SDTB; - - /* issue the START_IDMA command to the CP */ - while (immap->im_cpm.cp_cpcr & CPM_CR_FLG); - immap->im_cpm.cp_cpcr = mk_cr_cmd(IDMA_PAGE, IDMA_SBLOCK, 0, - CPM_CR_START_IDMA) | CPM_CR_FLG; - while (immap->im_cpm.cp_cpcr & CPM_CR_FLG); - - /* wait for transfer to complete */ - while(bd->flags & IDMA_BD_V); - - local_irq_restore(flags); - - return; -} - -/* Same as idma_pci9_read, but 16-bit little-endian byte swapping is performed - * if the unit_size is 2, and 32-bit little-endian byte swapping is performed if - * the unit_size is 4. - */ -static void -idma_pci9_read_le(u8 *dst, u8 *src, int bytes, int unit_size, int sinc) -{ - int i; - u8 *p; - - idma_pci9_read(dst, src, bytes, unit_size, sinc); - switch(unit_size) { - case 2: - for (i = 0, p = dst; i < bytes; i += 2, p += 2) - swab16s((u16 *) p); - break; - case 4: - for (i = 0, p = dst; i < bytes; i += 4, p += 4) - swab32s((u32 *) p); - break; - default: - break; - } -} -EXPORT_SYMBOL(idma_pci9_init); -EXPORT_SYMBOL(idma_pci9_read); -EXPORT_SYMBOL(idma_pci9_read_le); - -static inline int is_pci_mem(unsigned long addr) -{ - if (addr >= M82xx_PCI_LOWER_MMIO && - addr <= M82xx_PCI_UPPER_MMIO) - return 1; - if (addr >= M82xx_PCI_LOWER_MEM && - addr <= M82xx_PCI_UPPER_MEM) - return 1; - return 0; -} - -#define is_pci_mem(pa) ( (pa > 0x80000000) && (pa < 0xc0000000)) -int readb(volatile unsigned char *addr) -{ - u8 val; - unsigned long pa = iopa((unsigned long) addr); - - if (!is_pci_mem(pa)) - return in_8(addr); - - idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0); - return val; -} - -int readw(volatile unsigned short *addr) -{ - u16 val; - unsigned long pa = iopa((unsigned long) addr); - - if (!is_pci_mem(pa)) - return in_le16(addr); - - idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0); - return swab16(val); -} - -unsigned readl(volatile unsigned *addr) -{ - u32 val; - unsigned long pa = iopa((unsigned long) addr); - - if (!is_pci_mem(pa)) - return in_le32(addr); - - idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0); - return swab32(val); -} - -int inb(unsigned port) -{ - u8 val; - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0); - return val; -} - -int inw(unsigned port) -{ - u16 val; - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0); - return swab16(val); -} - -unsigned inl(unsigned port) -{ - u32 val; - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0); - return swab32(val); -} - -void insb(unsigned port, void *buf, int ns) -{ - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)buf, (u8 *)addr, ns*sizeof(u8), sizeof(u8), 0); -} - -void insw(unsigned port, void *buf, int ns) -{ - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)buf, (u8 *)addr, ns*sizeof(u16), sizeof(u16), 0); -} - -void insl(unsigned port, void *buf, int nl) -{ - u8 *addr = (u8 *)(port + _IO_BASE); - - idma_pci9_read((u8 *)buf, (u8 *)addr, nl*sizeof(u32), sizeof(u32), 0); -} - -void *memcpy_fromio(void *dest, unsigned long src, size_t count) -{ - unsigned long pa = iopa((unsigned long) src); - - if (is_pci_mem(pa)) - idma_pci9_read((u8 *)dest, (u8 *)pa, count, 32, 1); - else - memcpy(dest, (void *)src, count); - return dest; -} - -EXPORT_SYMBOL(readb); -EXPORT_SYMBOL(readw); -EXPORT_SYMBOL(readl); -EXPORT_SYMBOL(inb); -EXPORT_SYMBOL(inw); -EXPORT_SYMBOL(inl); -EXPORT_SYMBOL(insb); -EXPORT_SYMBOL(insw); -EXPORT_SYMBOL(insl); -EXPORT_SYMBOL(memcpy_fromio); - -#endif /* ifdef CONFIG_8260_PCI9 */ - -/* Indirect PCI routines adapted from arch/ppc/kernel/indirect_pci.c. - * Copyright (C) 1998 Gabriel Paubert. - */ -#ifndef CONFIG_8260_PCI9 -#define cfg_read(val, addr, type, op) *val = op((type)(addr)) -#else -#define cfg_read(val, addr, type, op) \ - idma_pci9_read_le((u8*)(val),(u8*)(addr),sizeof(*(val)),sizeof(*(val)),0) -#endif - -#define cfg_write(val, addr, type, op) op((type *)(addr), (val)) - -static int indirect_write_config(struct pci_bus *pbus, unsigned int devfn, int where, - int size, u32 value) -{ - struct pci_controller *hose = pbus->sysdata; - u8 cfg_type = 0; - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(pbus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (pbus->number != hose->first_busno) - cfg_type = 1; - - out_be32(hose->cfg_addr, - (((where & 0xfc) | cfg_type) << 24) | (devfn << 16) - | ((pbus->number - hose->bus_offset) << 8) | 0x80); - - switch (size) - { - case 1: - cfg_write(value, hose->cfg_data + (where & 3), u8, out_8); - break; - case 2: - cfg_write(value, hose->cfg_data + (where & 2), u16, out_le16); - break; - case 4: - cfg_write(value, hose->cfg_data + (where & 0), u32, out_le32); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static int indirect_read_config(struct pci_bus *pbus, unsigned int devfn, int where, - int size, u32 *value) -{ - struct pci_controller *hose = pbus->sysdata; - u8 cfg_type = 0; - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(pbus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (pbus->number != hose->first_busno) - cfg_type = 1; - - out_be32(hose->cfg_addr, - (((where & 0xfc) | cfg_type) << 24) | (devfn << 16) - | ((pbus->number - hose->bus_offset) << 8) | 0x80); - - switch (size) - { - case 1: - cfg_read(value, hose->cfg_data + (where & 3), u8 *, in_8); - break; - case 2: - cfg_read(value, hose->cfg_data + (where & 2), u16 *, in_le16); - break; - case 4: - cfg_read(value, hose->cfg_data + (where & 0), u32 *, in_le32); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops indirect_pci_ops = -{ - .read = indirect_read_config, - .write = indirect_write_config, -}; - -void -setup_m8260_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) -{ - hose->ops = &indirect_pci_ops; - hose->cfg_addr = (unsigned int *) ioremap(cfg_addr, 4); - hose->cfg_data = (unsigned char *) ioremap(cfg_data, 4); -} diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c deleted file mode 100644 index b40583724de3459b2e992b0f6bf2e3fa04033049..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m8260_setup.c +++ /dev/null @@ -1,266 +0,0 @@ -/* - * Copyright (C) 1995 Linus Torvalds - * Adapted from 'alpha' version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) - * Further modified for generic 8xx and 8260 by Dan. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "cpm2_pic.h" - -unsigned char __res[sizeof(bd_t)]; - -extern void pq2_find_bridges(void); -extern void pq2pci_init_irq(void); -extern void idma_pci9_init(void); - -/* Place-holder for board-specific init */ -void __attribute__ ((weak)) __init -m82xx_board_setup(void) -{ -} - -static void __init -m8260_setup_arch(void) -{ - /* Print out Vendor and Machine info. */ - printk(KERN_INFO "%s %s port\n", CPUINFO_VENDOR, CPUINFO_MACHINE); - - /* Reset the Communication Processor Module. */ - cpm2_reset(); -#ifdef CONFIG_8260_PCI9 - /* Initialise IDMA for PCI erratum workaround */ - idma_pci9_init(); -#endif -#ifdef CONFIG_PCI_8260 - pq2_find_bridges(); -#endif -#ifdef CONFIG_BLK_DEV_INITRD - if (initrd_start) - ROOT_DEV = Root_RAM0; -#endif - - identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME, - in_be32((void *)CPM_MAP_ADDR + CPM_IMMR_OFFSET)); - - m82xx_board_setup(); -} - -/* The decrementer counts at the system (internal) clock frequency - * divided by four. - */ -static void __init -m8260_calibrate_decr(void) -{ - bd_t *binfo = (bd_t *)__res; - int freq, divisor; - - freq = binfo->bi_busfreq; - divisor = 4; - tb_ticks_per_jiffy = freq / HZ / divisor; - tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000); -} - -/* The 8260 has an internal 1-second timer update register that - * we should use for this purpose. - */ -static uint rtc_time; - -static int -m8260_set_rtc_time(unsigned long time) -{ - rtc_time = time; - - return(0); -} - -static unsigned long -m8260_get_rtc_time(void) -{ - /* Get time from the RTC. - */ - return((unsigned long)rtc_time); -} - -#ifndef BOOTROM_RESTART_ADDR -#warning "Using default BOOTROM_RESTART_ADDR!" -#define BOOTROM_RESTART_ADDR 0xff000104 -#endif - -static void -m8260_restart(char *cmd) -{ - extern void m8260_gorom(bd_t *bi, uint addr); - uint startaddr; - - /* Most boot roms have a warmstart as the second instruction - * of the reset vector. If that doesn't work for you, change this - * or the reboot program to send a proper address. - */ - startaddr = BOOTROM_RESTART_ADDR; - if (cmd != NULL) { - if (!strncmp(cmd, "startaddr=", 10)) - startaddr = simple_strtoul(&cmd[10], NULL, 0); - } - - m8260_gorom((void*)__pa(__res), startaddr); -} - -static void -m8260_halt(void) -{ - local_irq_disable(); - while (1); -} - -static void -m8260_power_off(void) -{ - m8260_halt(); -} - -static int -m8260_show_cpuinfo(struct seq_file *m) -{ - bd_t *bp = (bd_t *)__res; - - seq_printf(m, "vendor\t\t: %s\n" - "machine\t\t: %s\n" - "\n" - "mem size\t\t: 0x%08lx\n" - "console baud\t\t: %ld\n" - "\n" - "core clock\t: %lu MHz\n" - "CPM clock\t: %lu MHz\n" - "bus clock\t: %lu MHz\n", - CPUINFO_VENDOR, CPUINFO_MACHINE, bp->bi_memsize, - bp->bi_baudrate, bp->bi_intfreq / 1000000, - bp->bi_cpmfreq / 1000000, bp->bi_busfreq / 1000000); - return 0; -} - -/* Initialize the internal interrupt controller. The number of - * interrupts supported can vary with the processor type, and the - * 8260 family can have up to 64. - * External interrupts can be either edge or level triggered, and - * need to be initialized by the appropriate driver. - */ -static void __init -m8260_init_IRQ(void) -{ - cpm2_init_IRQ(); - - /* Initialize the default interrupt mapping priorities, - * in case the boot rom changed something on us. - */ - cpm2_immr->im_intctl.ic_siprr = 0x05309770; -} - -/* - * Same hack as 8xx - */ -static unsigned long __init -m8260_find_end_of_memory(void) -{ - bd_t *binfo = (bd_t *)__res; - - return binfo->bi_memsize; -} - -/* Map the IMMR, plus anything else we can cover - * in that upper space according to the memory controller - * chip select mapping. Grab another bunch of space - * below that for stuff we can't cover in the upper. - */ -static void __init -m8260_map_io(void) -{ - uint addr; - - /* Map IMMR region to a 256MB BAT */ - addr = (cpm2_immr != NULL) ? (uint)cpm2_immr : CPM_MAP_ADDR; - io_block_mapping(addr, addr, 0x10000000, _PAGE_IO); - - /* Map I/O region to a 256MB BAT */ - io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO); -} - -/* Place-holder for board-specific ppc_md hooking */ -void __attribute__ ((weak)) __init -m82xx_board_init(void) -{ -} - -/* Inputs: - * r3 - Optional pointer to a board information structure. - * r4 - Optional pointer to the physical starting address of the init RAM - * disk. - * r5 - Optional pointer to the physical ending address of the init RAM - * disk. - * r6 - Optional pointer to the physical starting address of any kernel - * command-line parameters. - * r7 - Optional pointer to the physical ending address of any kernel - * command-line parameters. - */ -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - if ( r3 ) - memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); - -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if ( r4 ) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - /* take care of cmd line */ - if ( r6 ) { - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - - ppc_md.setup_arch = m8260_setup_arch; - ppc_md.show_cpuinfo = m8260_show_cpuinfo; - ppc_md.init_IRQ = m8260_init_IRQ; - ppc_md.get_irq = cpm2_get_irq; - - ppc_md.restart = m8260_restart; - ppc_md.power_off = m8260_power_off; - ppc_md.halt = m8260_halt; - - ppc_md.set_rtc_time = m8260_set_rtc_time; - ppc_md.get_rtc_time = m8260_get_rtc_time; - ppc_md.calibrate_decr = m8260_calibrate_decr; - - ppc_md.find_end_of_memory = m8260_find_end_of_memory; - ppc_md.setup_io_mappings = m8260_map_io; - - /* Call back for board-specific settings and overrides. */ - m82xx_board_init(); -} diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c deleted file mode 100644 index 657a1c25a2abad7d31e1776fc638530b6746c0aa..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m82xx_pci.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2004 Red Hat, Inc. - * - * 2005 (c) MontaVista Software, Inc. - * Vitaly Bordug - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "m82xx_pci.h" - -/* - * Interrupt routing - */ - -static inline int -pq2pci_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - { PIRQA, PIRQB, PIRQC, PIRQD }, /* IDSEL 22 - PCI slot 0 */ - { PIRQD, PIRQA, PIRQB, PIRQC }, /* IDSEL 23 - PCI slot 1 */ - { PIRQC, PIRQD, PIRQA, PIRQB }, /* IDSEL 24 - PCI slot 2 */ - }; - - const long min_idsel = 22, max_idsel = 24, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -static void -pq2pci_mask_irq(unsigned int irq) -{ - int bit = irq - NR_CPM_INTS; - - *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit)); - return; -} - -static void -pq2pci_unmask_irq(unsigned int irq) -{ - int bit = irq - NR_CPM_INTS; - - *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit)); - return; -} - -static void -pq2pci_mask_and_ack(unsigned int irq) -{ - int bit = irq - NR_CPM_INTS; - - *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit)); - return; -} - -static void -pq2pci_end_irq(unsigned int irq) -{ - int bit = irq - NR_CPM_INTS; - - *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit)); - return; -} - -struct hw_interrupt_type pq2pci_ic = { - "PQ2 PCI", - NULL, - NULL, - pq2pci_unmask_irq, - pq2pci_mask_irq, - pq2pci_mask_and_ack, - pq2pci_end_irq, - 0 -}; - -static irqreturn_t -pq2pci_irq_demux(int irq, void *dev_id) -{ - unsigned long stat, mask, pend; - int bit; - - for(;;) { - stat = *(volatile unsigned long *) PCI_INT_STAT_REG; - mask = *(volatile unsigned long *) PCI_INT_MASK_REG; - pend = stat & ~mask & 0xf0000000; - if (!pend) - break; - for (bit = 0; pend != 0; ++bit, pend <<= 1) { - if (pend & 0x80000000) - __do_IRQ(NR_CPM_INTS + bit); - } - } - - return IRQ_HANDLED; -} - -static struct irqaction pq2pci_irqaction = { - .handler = pq2pci_irq_demux, - .flags = IRQF_DISABLED, - .mask = CPU_MASK_NONE, - .name = "PQ2 PCI cascade", -}; - - -void -pq2pci_init_irq(void) -{ - int irq; - volatile cpm2_map_t *immap = cpm2_immr; - for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++) - irq_desc[irq].chip = &pq2pci_ic; - - /* make PCI IRQ level sensitive */ - immap->im_intctl.ic_siexr &= - ~(1 << (14 - (PCI_INT_TO_SIU - SIU_INT_IRQ1))); - - /* mask all PCI interrupts */ - *(volatile unsigned long *) PCI_INT_MASK_REG |= 0xfff00000; - - /* install the demultiplexer for the PCI cascade interrupt */ - setup_irq(PCI_INT_TO_SIU, &pq2pci_irqaction); - return; -} - -static int -pq2pci_exclude_device(u_char bus, u_char devfn) -{ - return PCIBIOS_SUCCESSFUL; -} - -/* PCI bus configuration registers. - */ -static void -pq2ads_setup_pci(struct pci_controller *hose) -{ - __u32 val; - volatile cpm2_map_t *immap = cpm2_immr; - bd_t* binfo = (bd_t*) __res; - u32 sccr = immap->im_clkrst.car_sccr; - uint pci_div,freq,time; - /* PCI int lowest prio */ - /* Each 4 bits is a device bus request and the MS 4bits - is highest priority */ - /* Bus 4bit value - --- ---------- - CPM high 0b0000 - CPM middle 0b0001 - CPM low 0b0010 - PCI request 0b0011 - Reserved 0b0100 - Reserved 0b0101 - Internal Core 0b0110 - External Master 1 0b0111 - External Master 2 0b1000 - External Master 3 0b1001 - The rest are reserved - */ - immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893; - /* park bus on core */ - immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_CORE; - /* - * Set up master windows that allow the CPU to access PCI space. These - * windows are set up using the two SIU PCIBR registers. - */ - - immap->im_memctl.memc_pcimsk0 = M82xx_PCI_PRIM_WND_SIZE; - immap->im_memctl.memc_pcibr0 = M82xx_PCI_PRIM_WND_BASE | PCIBR_ENABLE; - -#ifdef M82xx_PCI_SEC_WND_SIZE - immap->im_memctl.memc_pcimsk1 = M82xx_PCI_SEC_WND_SIZE; - immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE; -#endif - - /* Enable PCI */ - immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN); - - pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * - ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); - freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div)); - time = (int)66666666/freq; - - /* due to PCI Local Bus spec, some devices needs to wait such a long - time after RST deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */ - printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq, - (time==1) ? "0.5 seconds":"1 second" ); - - { - int i; - for(i=0;i<(500*time);i++) - udelay(1000); - } - - /* setup ATU registers */ - immap->im_pci.pci_pocmr0 = cpu_to_le32(POCMR_ENABLE | POCMR_PCI_IO | - ((~(M82xx_PCI_IO_SIZE - 1U)) >> POTA_ADDR_SHIFT)); - immap->im_pci.pci_potar0 = cpu_to_le32(M82xx_PCI_LOWER_IO >> POTA_ADDR_SHIFT); - immap->im_pci.pci_pobar0 = cpu_to_le32(M82xx_PCI_IO_BASE >> POTA_ADDR_SHIFT); - - /* Set-up non-prefetchable window */ - immap->im_pci.pci_pocmr1 = cpu_to_le32(POCMR_ENABLE | ((~(M82xx_PCI_MMIO_SIZE-1U)) >> POTA_ADDR_SHIFT)); - immap->im_pci.pci_potar1 = cpu_to_le32(M82xx_PCI_LOWER_MMIO >> POTA_ADDR_SHIFT); - immap->im_pci.pci_pobar1 = cpu_to_le32((M82xx_PCI_LOWER_MMIO - M82xx_PCI_MMIO_OFFSET) >> POTA_ADDR_SHIFT); - - /* Set-up prefetchable window */ - immap->im_pci.pci_pocmr2 = cpu_to_le32(POCMR_ENABLE |POCMR_PREFETCH_EN | - (~(M82xx_PCI_MEM_SIZE-1U) >> POTA_ADDR_SHIFT)); - immap->im_pci.pci_potar2 = cpu_to_le32(M82xx_PCI_LOWER_MEM >> POTA_ADDR_SHIFT); - immap->im_pci.pci_pobar2 = cpu_to_le32((M82xx_PCI_LOWER_MEM - M82xx_PCI_MEM_OFFSET) >> POTA_ADDR_SHIFT); - - /* Inbound transactions from PCI memory space */ - immap->im_pci.pci_picmr0 = cpu_to_le32(PICMR_ENABLE | PICMR_PREFETCH_EN | - ((~(M82xx_PCI_SLAVE_MEM_SIZE-1U)) >> PITA_ADDR_SHIFT)); - immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT); - immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT); - - /* park bus on PCI */ - immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI; - - /* Enable bus mastering and inbound memory transactions */ - early_read_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, &val); - val &= 0xffff0000; - val |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER; - early_write_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, val); - -} - -void __init pq2_find_bridges(void) -{ - extern int pci_assign_all_buses; - struct pci_controller * hose; - int host_bridge; - - pci_assign_all_buses = 1; - - hose = pcibios_alloc_controller(); - - if (!hose) - return; - - ppc_md.pci_swizzle = common_swizzle; - - hose->first_busno = 0; - hose->bus_offset = 0; - hose->last_busno = 0xff; - - setup_m8260_indirect_pci(hose, - (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr, - (unsigned long)&cpm2_immr->im_pci.pci_cfg_data); - - /* Make sure it is a supported bridge */ - early_read_config_dword(hose, - 0, - PCI_DEVFN(0,0), - PCI_VENDOR_ID, - &host_bridge); - switch (host_bridge) { - case PCI_DEVICE_ID_MPC8265: - break; - case PCI_DEVICE_ID_MPC8272: - break; - default: - printk("Attempting to use unrecognized host bridge ID" - " 0x%08x.\n", host_bridge); - break; - } - - pq2ads_setup_pci(hose); - - hose->io_space.start = M82xx_PCI_LOWER_IO; - hose->io_space.end = M82xx_PCI_UPPER_IO; - hose->mem_space.start = M82xx_PCI_LOWER_MEM; - hose->mem_space.end = M82xx_PCI_UPPER_MMIO; - hose->pci_mem_offset = M82xx_PCI_MEM_OFFSET; - - isa_io_base = - (unsigned long) ioremap(M82xx_PCI_IO_BASE, - M82xx_PCI_IO_SIZE); - hose->io_base_virt = (void *) isa_io_base; - - /* setup resources */ - pci_init_resource(&hose->mem_resources[0], - M82xx_PCI_LOWER_MEM, - M82xx_PCI_UPPER_MEM, - IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory"); - - pci_init_resource(&hose->mem_resources[1], - M82xx_PCI_LOWER_MMIO, - M82xx_PCI_UPPER_MMIO, - IORESOURCE_MEM, "PCI memory"); - - pci_init_resource(&hose->io_resource, - M82xx_PCI_LOWER_IO, - M82xx_PCI_UPPER_IO, - IORESOURCE_IO | 1, "PCI I/O"); - - ppc_md.pci_exclude_device = pq2pci_exclude_device; - hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); - - ppc_md.pci_map_irq = pq2pci_map_irq; - ppc_md.pcibios_fixup = NULL; - ppc_md.pcibios_fixup_bus = NULL; - -} diff --git a/arch/ppc/syslib/m82xx_pci.h b/arch/ppc/syslib/m82xx_pci.h deleted file mode 100644 index 924f73f8e5955dcf0a30c718792a74c84e342b60..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m82xx_pci.h +++ /dev/null @@ -1,92 +0,0 @@ - -#ifndef _PPC_KERNEL_M82XX_PCI_H -#define _PPC_KERNEL_M82XX_PCI_H - -#include -/* - * Local->PCI map (from CPU) controlled by - * MPC826x master window - * - * 0xF6000000 - 0xF7FFFFFF IO space - * 0x80000000 - 0xBFFFFFFF CPU2PCI memory space PCIBR0 - * - * 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1) - * 0xA0000000 - 0xBFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2) - * 0xF6000000 - 0xF7FFFFFF 32-bit PCI IO (Outbound ATU #3) - * - * PCI->Local map (from PCI) - * MPC826x slave window controlled by - * - * 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1) - */ - -/* - * Slave window that allows PCI masters to access MPC826x local memory. - * This window is set up using the first set of Inbound ATU registers - */ - -#ifndef M82xx_PCI_SLAVE_MEM_LOCAL -#define M82xx_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart) -#define M82xx_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart) -#define M82xx_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize) -#endif - -/* - * This is the window that allows the CPU to access PCI address space. - * It will be setup with the SIU PCIBR0 register. All three PCI master - * windows, which allow the CPU to access PCI prefetch, non prefetch, - * and IO space (see below), must all fit within this window. - */ - -#ifndef M82xx_PCI_LOWER_MEM -#define M82xx_PCI_LOWER_MEM 0x80000000 -#define M82xx_PCI_UPPER_MEM 0x9fffffff -#define M82xx_PCI_MEM_OFFSET 0x00000000 -#define M82xx_PCI_MEM_SIZE 0x20000000 -#endif - -#ifndef M82xx_PCI_LOWER_MMIO -#define M82xx_PCI_LOWER_MMIO 0xa0000000 -#define M82xx_PCI_UPPER_MMIO 0xafffffff -#define M82xx_PCI_MMIO_OFFSET 0x00000000 -#define M82xx_PCI_MMIO_SIZE 0x20000000 -#endif - -#ifndef M82xx_PCI_LOWER_IO -#define M82xx_PCI_LOWER_IO 0x00000000 -#define M82xx_PCI_UPPER_IO 0x01ffffff -#define M82xx_PCI_IO_BASE 0xf6000000 -#define M82xx_PCI_IO_SIZE 0x02000000 -#endif - -#ifndef M82xx_PCI_PRIM_WND_SIZE -#define M82xx_PCI_PRIM_WND_SIZE ~(M82xx_PCI_IO_SIZE - 1U) -#define M82xx_PCI_PRIM_WND_BASE (M82xx_PCI_IO_BASE) -#endif - -#ifndef M82xx_PCI_SEC_WND_SIZE -#define M82xx_PCI_SEC_WND_SIZE ~(M82xx_PCI_MEM_SIZE + M82xx_PCI_MMIO_SIZE - 1U) -#define M82xx_PCI_SEC_WND_BASE (M82xx_PCI_LOWER_MEM) -#endif - -#ifndef POTA_ADDR_SHIFT -#define POTA_ADDR_SHIFT 12 -#endif - -#ifndef PITA_ADDR_SHIFT -#define PITA_ADDR_SHIFT 12 -#endif - -#ifndef _IO_BASE -#define _IO_BASE isa_io_base -#endif - -#ifdef CONFIG_8260_PCI9 -struct pci_controller; -extern void setup_m8260_indirect_pci(struct pci_controller* hose, - u32 cfg_addr, u32 cfg_data); -#else -#define setup_m8260_indirect_pci setup_indirect_pci -#endif - -#endif /* _PPC_KERNEL_M8260_PCI_H */ diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c deleted file mode 100644 index 18da720fc1b0efca76b36f883012d99a26e753d5..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m8xx_setup.c +++ /dev/null @@ -1,465 +0,0 @@ -/* - * Copyright (C) 1995 Linus Torvalds - * Adapted from 'alpha' version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) - * Further modified for generic 8xx by Dan. - */ - -/* - * bootup setup stuff.. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP) -#include -#include -#include -#include -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "ppc8xx_pic.h" - -#ifdef CONFIG_MTD_PHYSMAP -#define MPC8xxADS_BANK_WIDTH 4 -#endif - -#define MPC8xxADS_U_BOOT_SIZE 0x80000 -#define MPC8xxADS_FREE_AREA_OFFSET MPC8xxADS_U_BOOT_SIZE - -#if defined(CONFIG_MTD_PARTITIONS) - /* - NOTE: bank width and interleave relative to the installed flash - should have been chosen within MTD_CFI_GEOMETRY options. - */ -static struct mtd_partition mpc8xxads_partitions[] = { - { - .name = "bootloader", - .size = MPC8xxADS_U_BOOT_SIZE, - .offset = 0, - .mask_flags = MTD_WRITEABLE, /* force read-only */ - }, { - .name = "User FS", - .offset = MPC8xxADS_FREE_AREA_OFFSET - } -}; - -#define mpc8xxads_part_num ARRAY_SIZE(mpc8xxads_partitions) - -#endif - -static int m8xx_set_rtc_time(unsigned long time); -static unsigned long m8xx_get_rtc_time(void); -void m8xx_calibrate_decr(void); - -unsigned char __res[sizeof(bd_t)]; - -extern unsigned long find_available_memory(void); -extern void m8xx_cpm_reset(void); -extern void m8xx_wdt_handler_install(bd_t *bp); -extern void rpxfb_alloc_pages(void); -extern void cpm_interrupt_init(void); - -void __attribute__ ((weak)) -board_init(void) -{ -} - -void __init -m8xx_setup_arch(void) -{ -#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP) - bd_t *binfo = (bd_t *)__res; -#endif - - /* Reset the Communication Processor Module. - */ - m8xx_cpm_reset(); - -#ifdef CONFIG_FB_RPX - rpxfb_alloc_pages(); -#endif - -#ifdef notdef - ROOT_DEV = Root_HDA1; /* hda1 */ -#endif - -#ifdef CONFIG_BLK_DEV_INITRD -#if 0 - ROOT_DEV = Root_FD0; /* floppy */ - rd_prompt = 1; - rd_doload = 1; - rd_image_start = 0; -#endif -#if 0 /* XXX this may need to be updated for the new bootmem stuff, - or possibly just deleted (see set_phys_avail() in init.c). - - paulus. */ - /* initrd_start and size are setup by boot/head.S and kernel/head.S */ - if ( initrd_start ) - { - if (initrd_end > *memory_end_p) - { - printk("initrd extends beyond end of memory " - "(0x%08lx > 0x%08lx)\ndisabling initrd\n", - initrd_end,*memory_end_p); - initrd_start = 0; - } - } -#endif -#endif - - board_init(); -} - -void -abort(void) -{ -#ifdef CONFIG_XMON - xmon(0); -#endif - machine_restart(NULL); - - /* not reached */ - for (;;); -} - -/* A place holder for time base interrupts, if they are ever enabled. */ -irqreturn_t timebase_interrupt(int irq, void * dev) -{ - printk ("timebase_interrupt()\n"); - - return IRQ_HANDLED; -} - -static struct irqaction tbint_irqaction = { - .handler = timebase_interrupt, - .mask = CPU_MASK_NONE, - .name = "tbint", -}; - -/* per-board overridable init_internal_rtc() function. */ -void __init __attribute__ ((weak)) -init_internal_rtc(void) -{ - /* Disable the RTC one second and alarm interrupts. */ - clrbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); - - /* Enable the RTC */ - setbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); - -} - -/* The decrementer counts at the system (internal) clock frequency divided by - * sixteen, or external oscillator divided by four. We force the processor - * to use system clock divided by sixteen. - */ -void __init m8xx_calibrate_decr(void) -{ - bd_t *binfo = (bd_t *)__res; - int freq, fp, divisor; - - /* Unlock the SCCR. */ - out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, ~KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY); - - /* Force all 8xx processors to use divide by 16 processor clock. */ - setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 0x02000000); - /* Processor frequency is MHz. - * The value 'fp' is the number of decrementer ticks per second. - */ - fp = binfo->bi_intfreq / 16; - freq = fp*60; /* try to make freq/1e6 an integer */ - divisor = 60; - printk("Decrementer Frequency = %d/%d\n", freq, divisor); - tb_ticks_per_jiffy = freq / HZ / divisor; - tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000); - - /* Perform some more timer/timebase initialization. This used - * to be done elsewhere, but other changes caused it to get - * called more than once....that is a bad thing. - * - * First, unlock all of the registers we are going to modify. - * To protect them from corruption during power down, registers - * that are maintained by keep alive power are "locked". To - * modify these registers we have to write the key value to - * the key location associated with the register. - * Some boards power up with these unlocked, while others - * are locked. Writing anything (including the unlock code?) - * to the unlocked registers will lock them again. So, here - * we guarantee the registers are locked, then we unlock them - * for our use. - */ - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, ~KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, ~KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, ~KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY); - - init_internal_rtc(); - - /* Enabling the decrementer also enables the timebase interrupts - * (or from the other point of view, to get decrementer interrupts - * we have to enable the timebase). The decrementer interrupt - * is wired into the vector table, nothing to do here for that. - */ - out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_tbscr, (mk_int_int_mask(DEC_INTERRUPT) << 8) | (TBSCR_TBF | TBSCR_TBE)); - - if (setup_irq(DEC_INTERRUPT, &tbint_irqaction)) - panic("Could not allocate timer IRQ!"); - -#ifdef CONFIG_8xx_WDT - /* Install watchdog timer handler early because it might be - * already enabled by the bootloader - */ - m8xx_wdt_handler_install(binfo); -#endif -} - -/* The RTC on the MPC8xx is an internal register. - * We want to protect this during power down, so we need to unlock, - * modify, and re-lock. - */ -static int -m8xx_set_rtc_time(unsigned long time) -{ - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, KAPWR_KEY); - out_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc, time); - out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, ~KAPWR_KEY); - return(0); -} - -static unsigned long -m8xx_get_rtc_time(void) -{ - /* Get time from the RTC. */ - return (unsigned long) in_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc); -} - -static void -m8xx_restart(char *cmd) -{ - __volatile__ unsigned char dummy; - - local_irq_disable(); - - setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, 0x00000080); - /* Clear the ME bit in MSR to cause checkstop on machine check - */ - mtmsr(mfmsr() & ~0x1000); - - dummy = in_8(&((immap_t *)IMAP_ADDR)->im_clkrst.res[0]); - printk("Restart failed\n"); - while(1); -} - -static void -m8xx_power_off(void) -{ - m8xx_restart(NULL); -} - -static void -m8xx_halt(void) -{ - m8xx_restart(NULL); -} - - -static int -m8xx_show_percpuinfo(struct seq_file *m, int i) -{ - bd_t *bp; - - bp = (bd_t *)__res; - - seq_printf(m, "clock\t\t: %uMHz\n" - "bus clock\t: %uMHz\n", - bp->bi_intfreq / 1000000, - bp->bi_busfreq / 1000000); - - return 0; -} - -#ifdef CONFIG_PCI -static struct irqaction mbx_i8259_irqaction = { - .handler = mbx_i8259_action, - .mask = CPU_MASK_NONE, - .name = "i8259 cascade", -}; -#endif - -/* Initialize the internal interrupt controller. The number of - * interrupts supported can vary with the processor type, and the - * 82xx family can have up to 64. - * External interrupts can be either edge or level triggered, and - * need to be initialized by the appropriate driver. - */ -static void __init -m8xx_init_IRQ(void) -{ - int i; - - for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++) - irq_desc[i].chip = &ppc8xx_pic; - - cpm_interrupt_init(); - -#if defined(CONFIG_PCI) - for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++) - irq_desc[i].chip = &i8259_pic; - - i8259_pic_irq_offset = I8259_IRQ_OFFSET; - i8259_init(0); - - /* The i8259 cascade interrupt must be level sensitive. */ - - clrbits32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, (0x80000000 >> ISA_BRIDGE_INT)); - if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) - enable_irq(ISA_BRIDGE_INT); -#endif /* CONFIG_PCI */ -} - -/* -------------------------------------------------------------------- */ - -/* - * This is a big hack right now, but it may turn into something real - * someday. - * - * For the 8xx boards (at this time anyway), there is nothing to initialize - * associated the PROM. Rather than include all of the prom.c - * functions in the image just to get prom_init, all we really need right - * now is the initialization of the physical memory region. - */ -static unsigned long __init -m8xx_find_end_of_memory(void) -{ - bd_t *binfo; - extern unsigned char __res[]; - - binfo = (bd_t *)__res; - - return binfo->bi_memsize; -} - -/* - * Now map in some of the I/O space that is generically needed - * or shared with multiple devices. - * All of this fits into the same 4Mbyte region, so it only - * requires one page table page. (or at least it used to -- paulus) - */ -static void __init -m8xx_map_io(void) -{ - io_block_mapping(IMAP_ADDR, IMAP_ADDR, IMAP_SIZE, _PAGE_IO); -#ifdef CONFIG_MBX - io_block_mapping(NVRAM_ADDR, NVRAM_ADDR, NVRAM_SIZE, _PAGE_IO); - io_block_mapping(MBX_CSR_ADDR, MBX_CSR_ADDR, MBX_CSR_SIZE, _PAGE_IO); - io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO); - - /* Map some of the PCI/ISA I/O space to get the IDE interface. - */ - io_block_mapping(PCI_ISA_IO_ADDR, PCI_ISA_IO_ADDR, 0x4000, _PAGE_IO); - io_block_mapping(PCI_IDE_ADDR, PCI_IDE_ADDR, 0x4000, _PAGE_IO); -#endif -#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) - io_block_mapping(RPX_CSR_ADDR, RPX_CSR_ADDR, RPX_CSR_SIZE, _PAGE_IO); -#if !defined(CONFIG_PCI) - io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO); -#endif -#endif -#if defined(CONFIG_RPXTOUCH) || defined(CONFIG_FB_RPX) - io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO); -#endif -#ifdef CONFIG_FADS - io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO); -#endif -#ifdef CONFIG_PCI - io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO); -#endif -#if defined(CONFIG_NETTA) - io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO); -#endif -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - if ( r3 ) - memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) ); - -#ifdef CONFIG_PCI - m8xx_setup_pci_ptrs(); -#endif - -#ifdef CONFIG_BLK_DEV_INITRD - /* take care of initrd if we have one */ - if ( r4 ) - { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - /* take care of cmd line */ - if ( r6 ) - { - *(char *)(r7+KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6+KERNELBASE)); - } - - identify_ppc_sys_by_name(BOARD_CHIP_NAME); - - ppc_md.setup_arch = m8xx_setup_arch; - ppc_md.show_percpuinfo = m8xx_show_percpuinfo; - ppc_md.init_IRQ = m8xx_init_IRQ; - ppc_md.get_irq = m8xx_get_irq; - ppc_md.init = NULL; - - ppc_md.restart = m8xx_restart; - ppc_md.power_off = m8xx_power_off; - ppc_md.halt = m8xx_halt; - - ppc_md.time_init = NULL; - ppc_md.set_rtc_time = m8xx_set_rtc_time; - ppc_md.get_rtc_time = m8xx_get_rtc_time; - ppc_md.calibrate_decr = m8xx_calibrate_decr; - - ppc_md.find_end_of_memory = m8xx_find_end_of_memory; - ppc_md.setup_io_mappings = m8xx_map_io; -} diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c deleted file mode 100644 index fffac8cbeb514e5ab4d733d81af6976efe0041a9..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m8xx_wdt.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * m8xx_wdt.c - MPC8xx watchdog driver - * - * Author: Florian Schirmer - * - * 2002 (c) Florian Schirmer This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static int wdt_timeout; -int m8xx_has_internal_rtc = 0; - -static irqreturn_t m8xx_wdt_interrupt(int, void *); -static struct irqaction m8xx_wdt_irqaction = { - .handler = m8xx_wdt_interrupt, - .name = "watchdog", -}; - -void m8xx_wdt_reset(void) -{ - volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR; - - out_be16(&imap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */ - out_be16(&imap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */ -} - -static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev) -{ - volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR; - - m8xx_wdt_reset(); - - setbits16(&imap->im_sit.sit_piscr, PISCR_PS); - return IRQ_HANDLED; -} - -#define SYPCR_SWP 0x1 -#define SYPCR_SWE 0x4 - - -void __init m8xx_wdt_install_irq(volatile immap_t *imap, bd_t *binfo) -{ - u32 pitc; - u32 pitrtclk; - - /* - * Fire trigger if half of the wdt ticked down - */ - - if (imap->im_sit.sit_rtcsc & RTCSC_38K) - pitrtclk = 9600; - else - pitrtclk = 8192; - - if ((wdt_timeout) > (UINT_MAX / pitrtclk)) - pitc = wdt_timeout / binfo->bi_intfreq * pitrtclk / 2; - else - pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2; - - out_be32(&imap->im_sit.sit_pitc, pitc << 16); - - out_be16(&imap->im_sit.sit_piscr, (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE); - - if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction)) - panic("m8xx_wdt: error setting up the watchdog irq!"); - - printk(KERN_NOTICE - "m8xx_wdt: keep-alive trigger installed (PITC: 0x%04X)\n", pitc); - -} - -static void m8xx_wdt_timer_func(unsigned long data); - -static struct timer_list m8xx_wdt_timer = - TIMER_INITIALIZER(m8xx_wdt_timer_func, 0, 0); - -void m8xx_wdt_stop_timer(void) -{ - del_timer(&m8xx_wdt_timer); -} - -void m8xx_wdt_install_timer(void) -{ - m8xx_wdt_timer.expires = jiffies + (HZ/2); - add_timer(&m8xx_wdt_timer); -} - -static void m8xx_wdt_timer_func(unsigned long data) -{ - m8xx_wdt_reset(); - m8xx_wdt_install_timer(); -} - -void __init m8xx_wdt_handler_install(bd_t * binfo) -{ - volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR; - u32 sypcr; - - sypcr = in_be32(&imap->im_siu_conf.sc_sypcr); - - if (!(sypcr & SYPCR_SWE)) { - printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n", - sypcr); - return; - } - - m8xx_wdt_reset(); - - printk(KERN_NOTICE - "m8xx_wdt: active wdt found (SWTC: 0x%04X, SWP: 0x%01X)\n", - (sypcr >> 16), sypcr & SYPCR_SWP); - - wdt_timeout = (sypcr >> 16) & 0xFFFF; - - if (!wdt_timeout) - wdt_timeout = 0xFFFF; - - if (sypcr & SYPCR_SWP) - wdt_timeout *= 2048; - - m8xx_has_internal_rtc = in_be16(&imap->im_sit.sit_rtcsc) & RTCSC_RTE; - - /* if the internal RTC is off use a kernel timer */ - if (!m8xx_has_internal_rtc) { - if (wdt_timeout < (binfo->bi_intfreq/HZ)) - printk(KERN_ERR "m8xx_wdt: timeout too short for ktimer!\n"); - m8xx_wdt_install_timer(); - } else - m8xx_wdt_install_irq(imap, binfo); - - wdt_timeout /= binfo->bi_intfreq; -} - -int m8xx_wdt_get_timeout(void) -{ - return wdt_timeout; -} diff --git a/arch/ppc/syslib/m8xx_wdt.h b/arch/ppc/syslib/m8xx_wdt.h deleted file mode 100644 index e75835f0012be0725f00a5fc509c69d9a1e4d784..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/m8xx_wdt.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Author: Florian Schirmer - * - * 2002 (c) Florian Schirmer This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef _PPC_SYSLIB_M8XX_WDT_H -#define _PPC_SYSLIB_M8XX_WDT_H - -extern int m8xx_has_internal_rtc; - -extern void m8xx_wdt_handler_install(bd_t * binfo); -extern int m8xx_wdt_get_timeout(void); -extern void m8xx_wdt_reset(void); -extern void m8xx_wdt_install_timer(void); -extern void m8xx_wdt_stop_timer(void); - -#endif /* _PPC_SYSLIB_M8XX_WDT_H */ diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c deleted file mode 100644 index 437a294527a9b52be26dcf3e3bda190f6894f2fe..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc10x_common.c +++ /dev/null @@ -1,654 +0,0 @@ -/* - * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge, - * Mem ctlr, EPIC, etc. - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs *** - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_MPC10X_OPENPIC -#ifdef CONFIG_EPIC_SERIAL_MODE -#define EPIC_IRQ_BASE (epic_serial_mode ? 16 : 5) -#else -#define EPIC_IRQ_BASE 5 -#endif -#define MPC10X_I2C_IRQ (EPIC_IRQ_BASE + NUM_8259_INTERRUPTS) -#define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS) -#define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS) -#define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS) -#define MPC10X_UART1_IRQ (EPIC_IRQ_BASE + 5 + NUM_8259_INTERRUPTS) -#else -#define MPC10X_I2C_IRQ -1 -#define MPC10X_DMA0_IRQ -1 -#define MPC10X_DMA1_IRQ -1 -#define MPC10X_UART0_IRQ -1 -#define MPC10X_UART1_IRQ -1 -#endif - -static struct fsl_i2c_platform_data mpc10x_i2c_pdata = { - .device_flags = 0, -}; - -static struct plat_serial8250_port serial_plat_uart0[] = { - [0] = { - .mapbase = 0x4500, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - }, - { }, -}; -static struct plat_serial8250_port serial_plat_uart1[] = { - [0] = { - .mapbase = 0x4600, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - }, - { }, -}; - -struct platform_device ppc_sys_platform_devices[] = { - [MPC10X_IIC1] = { - .name = "fsl-i2c", - .id = 1, - .dev.platform_data = &mpc10x_i2c_pdata, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = MPC10X_EUMB_I2C_OFFSET, - .end = MPC10X_EUMB_I2C_OFFSET + - MPC10X_EUMB_I2C_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - { - .flags = IORESOURCE_IRQ - }, - }, - }, - [MPC10X_DMA0] = { - .name = "fsl-dma", - .id = 0, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = MPC10X_EUMB_DMA_OFFSET + 0x10, - .end = MPC10X_EUMB_DMA_OFFSET + 0x1f, - .flags = IORESOURCE_MEM, - }, - { - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC10X_DMA1] = { - .name = "fsl-dma", - .id = 1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = MPC10X_EUMB_DMA_OFFSET + 0x20, - .end = MPC10X_EUMB_DMA_OFFSET + 0x2f, - .flags = IORESOURCE_MEM, - }, - { - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC10X_DMA1] = { - .name = "fsl-dma", - .id = 1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = MPC10X_EUMB_DMA_OFFSET + 0x20, - .end = MPC10X_EUMB_DMA_OFFSET + 0x2f, - .flags = IORESOURCE_MEM, - }, - { - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC10X_UART0] = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev.platform_data = serial_plat_uart0, - }, - [MPC10X_UART1] = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM1, - .dev.platform_data = serial_plat_uart1, - }, - -}; - -/* We use the PCI ID to match on */ -struct ppc_sys_spec *cur_ppc_sys_spec; -struct ppc_sys_spec ppc_sys_specs[] = { - { - .ppc_sys_name = "8245", - .mask = 0xFFFFFFFF, - .value = MPC10X_BRIDGE_8245, - .num_devices = 5, - .device_list = (enum ppc_sys_devices[]) - { - MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_UART0, MPC10X_UART1, - }, - }, - { - .ppc_sys_name = "8240", - .mask = 0xFFFFFFFF, - .value = MPC10X_BRIDGE_8240, - .num_devices = 3, - .device_list = (enum ppc_sys_devices[]) - { - MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, - }, - }, - { - .ppc_sys_name = "107", - .mask = 0xFFFFFFFF, - .value = MPC10X_BRIDGE_107, - .num_devices = 3, - .device_list = (enum ppc_sys_devices[]) - { - MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, - }, - }, - { /* default match */ - .ppc_sys_name = "", - .mask = 0x00000000, - .value = 0x00000000, - }, -}; - -/* - * mach_mpc10x_fixup: This function enables DUART mode if it detects - * if it detects two UARTS in the platform device entries. - */ -static int __init mach_mpc10x_fixup(struct platform_device *pdev) -{ - if (strncmp (pdev->name, "serial8250", 10) == 0 && pdev->id == 1) - writeb(readb(serial_plat_uart1[0].membase + 0x11) | 0x1, - serial_plat_uart1[0].membase + 0x11); - return 0; -} - -static int __init mach_mpc10x_init(void) -{ - ppc_sys_device_fixup = mach_mpc10x_fixup; - return 0; -} -postcore_initcall(mach_mpc10x_init); - -/* Set resources to match bridge memory map */ -void __init -mpc10x_bridge_set_resources(int map, struct pci_controller *hose) -{ - - switch (map) { - case MPC10X_MEM_MAP_A: - pci_init_resource(&hose->io_resource, - 0x00000000, - 0x3f7fffff, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource (&hose->mem_resources[0], - 0xc0000000, - 0xfeffffff, - IORESOURCE_MEM, - "PCI host bridge"); - break; - case MPC10X_MEM_MAP_B: - pci_init_resource(&hose->io_resource, - 0x00000000, - 0x00bfffff, - IORESOURCE_IO, - "PCI host bridge"); - - pci_init_resource (&hose->mem_resources[0], - 0x80000000, - 0xfcffffff, - IORESOURCE_MEM, - "PCI host bridge"); - break; - default: - printk("mpc10x_bridge_set_resources: " - "Invalid map specified\n"); - if (ppc_md.progress) - ppc_md.progress("mpc10x:exit1", 0x100); - } -} - -/* - * Do some initialization and put the EUMB registers at the specified address - * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set). - * - * The EPIC is not on the 106, only the 8240 and 107. - */ -int __init -mpc10x_bridge_init(struct pci_controller *hose, - uint current_map, - uint new_map, - uint phys_eumb_base) -{ - int host_bridge, picr1, picr1_bit, i; - ulong pci_config_addr, pci_config_data; - u_char pir, byte; - - if (ppc_md.progress) ppc_md.progress("mpc10x:enter", 0x100); - - /* Set up for current map so we can get at config regs */ - switch (current_map) { - case MPC10X_MEM_MAP_A: - setup_indirect_pci(hose, - MPC10X_MAPA_CNFG_ADDR, - MPC10X_MAPA_CNFG_DATA); - break; - case MPC10X_MEM_MAP_B: - setup_indirect_pci(hose, - MPC10X_MAPB_CNFG_ADDR, - MPC10X_MAPB_CNFG_DATA); - break; - default: - printk("mpc10x_bridge_init: %s\n", - "Invalid current map specified"); - if (ppc_md.progress) - ppc_md.progress("mpc10x:exit1", 0x100); - return -1; - } - - /* Make sure it's a supported bridge */ - early_read_config_dword(hose, - 0, - PCI_DEVFN(0,0), - PCI_VENDOR_ID, - &host_bridge); - - switch (host_bridge) { - case MPC10X_BRIDGE_106: - case MPC10X_BRIDGE_8240: - case MPC10X_BRIDGE_107: - case MPC10X_BRIDGE_8245: - break; - default: - if (ppc_md.progress) - ppc_md.progress("mpc10x:exit2", 0x100); - return -1; - } - - switch (new_map) { - case MPC10X_MEM_MAP_A: - MPC10X_SETUP_HOSE(hose, A); - pci_config_addr = MPC10X_MAPA_CNFG_ADDR; - pci_config_data = MPC10X_MAPA_CNFG_DATA; - picr1_bit = MPC10X_CFG_PICR1_ADDR_MAP_A; - break; - case MPC10X_MEM_MAP_B: - MPC10X_SETUP_HOSE(hose, B); - pci_config_addr = MPC10X_MAPB_CNFG_ADDR; - pci_config_data = MPC10X_MAPB_CNFG_DATA; - picr1_bit = MPC10X_CFG_PICR1_ADDR_MAP_B; - break; - default: - printk("mpc10x_bridge_init: %s\n", - "Invalid new map specified"); - if (ppc_md.progress) - ppc_md.progress("mpc10x:exit3", 0x100); - return -1; - } - - /* Make bridge use the 'new_map', if not already usng it */ - if (current_map != new_map) { - early_read_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - &picr1); - - picr1 = (picr1 & ~MPC10X_CFG_PICR1_ADDR_MAP_MASK) | - picr1_bit; - - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - picr1); - - asm volatile("sync"); - - /* Undo old mappings & map in new cfg data/addr regs */ - iounmap((void *)hose->cfg_addr); - iounmap((void *)hose->cfg_data); - - setup_indirect_pci(hose, - pci_config_addr, - pci_config_data); - } - - /* Setup resources to match map */ - mpc10x_bridge_set_resources(new_map, hose); - - /* - * Want processor accesses of 0xFDxxxxxx to be mapped - * to PCI memory space at 0x00000000. Do not want - * host bridge to respond to PCI memory accesses of - * 0xFDxxxxxx. Do not want host bridge to respond - * to PCI memory addresses 0xFD000000-0xFDFFFFFF; - * want processor accesses from 0x000A0000-0x000BFFFF - * to be forwarded to system memory. - * - * Only valid if not in agent mode and using MAP B. - */ - if (new_map == MPC10X_MEM_MAP_B) { - early_read_config_byte(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_MAPB_OPTIONS_REG, - &byte); - - byte &= ~(MPC10X_CFG_MAPB_OPTIONS_PFAE | - MPC10X_CFG_MAPB_OPTIONS_PCICH | - MPC10X_CFG_MAPB_OPTIONS_PROCCH); - - if (host_bridge != MPC10X_BRIDGE_106) { - byte |= MPC10X_CFG_MAPB_OPTIONS_CFAE; - } - - early_write_config_byte(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_MAPB_OPTIONS_REG, - byte); - } - - if (host_bridge != MPC10X_BRIDGE_106) { - early_read_config_byte(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PIR_REG, - &pir); - - if (pir != MPC10X_CFG_PIR_HOST_BRIDGE) { - printk("Host bridge in Agent mode\n"); - /* Read or Set LMBAR & PCSRBAR? */ - } - - /* Set base addr of the 8240/107 EUMB. */ - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_EUMBBAR, - phys_eumb_base); -#ifdef CONFIG_MPC10X_OPENPIC - /* Map EPIC register part of EUMB into vitual memory - PCORE - uses an i8259 instead of EPIC. */ - OpenPIC_Addr = - ioremap(phys_eumb_base + MPC10X_EUMB_EPIC_OFFSET, - MPC10X_EUMB_EPIC_SIZE); -#endif - } - -#ifdef CONFIG_MPC10X_STORE_GATHERING - mpc10x_enable_store_gathering(hose); -#else - mpc10x_disable_store_gathering(hose); -#endif - - /* setup platform devices for MPC10x bridges */ - identify_ppc_sys_by_id (host_bridge); - - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { - unsigned int dev_id = cur_ppc_sys_spec->device_list[i]; - ppc_sys_fixup_mem_resource(&ppc_sys_platform_devices[dev_id], - phys_eumb_base); - } - - /* IRQs are determined at runtime */ - ppc_sys_platform_devices[MPC10X_IIC1].resource[1].start = MPC10X_I2C_IRQ; - ppc_sys_platform_devices[MPC10X_IIC1].resource[1].end = MPC10X_I2C_IRQ; - ppc_sys_platform_devices[MPC10X_DMA0].resource[1].start = MPC10X_DMA0_IRQ; - ppc_sys_platform_devices[MPC10X_DMA0].resource[1].end = MPC10X_DMA0_IRQ; - ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ; - ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ; - - serial_plat_uart0[0].mapbase += phys_eumb_base; - serial_plat_uart0[0].irq = MPC10X_UART0_IRQ; - serial_plat_uart0[0].membase = ioremap(serial_plat_uart0[0].mapbase, 0x100); - - serial_plat_uart1[0].mapbase += phys_eumb_base; - serial_plat_uart1[0].irq = MPC10X_UART1_IRQ; - serial_plat_uart1[0].membase = ioremap(serial_plat_uart1[0].mapbase, 0x100); - - /* - * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative - * PCI reads may return stale data so turn off. - */ - if ((host_bridge == MPC10X_BRIDGE_8240) - || (host_bridge == MPC10X_BRIDGE_8245) - || (host_bridge == MPC10X_BRIDGE_107)) { - - early_read_config_dword(hose, 0, PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, &picr1); - - picr1 &= ~MPC10X_CFG_PICR1_SPEC_PCI_RD; - - early_write_config_dword(hose, 0, PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, picr1); - } - - /* - * 8241/8245 erratum 28: PCI reads from local memory may return - * stale data. Workaround by setting PICR2[0] to disable copyback - * optimization. Oddly, the latest available user manual for the - * 8245 (Rev 2., dated 10/2003) says PICR2[0] is reserverd. - */ - if (host_bridge == MPC10X_BRIDGE_8245) { - u32 picr2; - - early_read_config_dword(hose, 0, PCI_DEVFN(0,0), - MPC10X_CFG_PICR2_REG, &picr2); - - picr2 |= MPC10X_CFG_PICR2_COPYBACK_OPT; - - early_write_config_dword(hose, 0, PCI_DEVFN(0,0), - MPC10X_CFG_PICR2_REG, picr2); - } - - if (ppc_md.progress) ppc_md.progress("mpc10x:exit", 0x100); - return 0; -} - -/* - * Need to make our own PCI config space access macros because - * mpc10x_get_mem_size() is called before the data structures are set up for - * the 'early_xxx' and 'indirect_xxx' routines to work. - * Assumes bus 0. - */ -#define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr)) -#define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val)) - -#define MPC10X_PCI_OP(rw, size, type, op, mask) \ -static void \ -mpc10x_##rw##_config_##size(uint *cfg_addr, uint *cfg_data, int devfn, int offset, type val) \ -{ \ - out_be32(cfg_addr, \ - ((offset & 0xfc) << 24) | (devfn << 16) \ - | (0 << 8) | 0x80); \ - MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \ - return; \ -} - -MPC10X_PCI_OP(read, byte, u8 *, in_8, 3) -MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0) -#if 0 /* Not used */ -MPC10X_PCI_OP(write, byte, u8, out_8, 3) -MPC10X_PCI_OP(read, word, u16 *, in_le16, 2) -MPC10X_PCI_OP(write, word, u16, out_le16, 2) -MPC10X_PCI_OP(write, dword, u32, out_le32, 0) -#endif - -/* - * Read the memory controller registers to determine the amount of memory in - * the system. This assumes that the firmware has correctly set up the memory - * controller registers. - */ -unsigned long __init -mpc10x_get_mem_size(uint mem_map) -{ - uint *config_addr, *config_data, val; - ulong start, end, total, offset; - int i; - u_char bank_enables; - - switch (mem_map) { - case MPC10X_MEM_MAP_A: - config_addr = (uint *)MPC10X_MAPA_CNFG_ADDR; - config_data = (uint *)MPC10X_MAPA_CNFG_DATA; - break; - case MPC10X_MEM_MAP_B: - config_addr = (uint *)MPC10X_MAPB_CNFG_ADDR; - config_data = (uint *)MPC10X_MAPB_CNFG_DATA; - break; - default: - return 0; - } - - mpc10x_read_config_byte(config_addr, - config_data, - PCI_DEVFN(0,0), - MPC10X_MCTLR_MEM_BANK_ENABLES, - &bank_enables); - - total = 0; - - for (i=0; i<8; i++) { - if (bank_enables & (1 << i)) { - offset = MPC10X_MCTLR_MEM_START_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, - config_data, - PCI_DEVFN(0,0), - offset, - &val); - start = (val >> ((i & 3) << 3)) & 0xff; - - offset = MPC10X_MCTLR_EXT_MEM_START_1 + ((i>3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, - config_data, - PCI_DEVFN(0,0), - offset, - &val); - val = (val >> ((i & 3) << 3)) & 0x03; - start = (val << 28) | (start << 20); - - offset = MPC10X_MCTLR_MEM_END_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, - config_data, - PCI_DEVFN(0,0), - offset, - &val); - end = (val >> ((i & 3) << 3)) & 0xff; - - offset = MPC10X_MCTLR_EXT_MEM_END_1 + ((i > 3) ? 4 : 0); - mpc10x_read_config_dword(config_addr, - config_data, - PCI_DEVFN(0,0), - offset, - &val); - val = (val >> ((i & 3) << 3)) & 0x03; - end = (val << 28) | (end << 20) | 0xfffff; - - total += (end - start + 1); - } - } - - return total; -} - -int __init -mpc10x_enable_store_gathering(struct pci_controller *hose) -{ - uint picr1; - - early_read_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - &picr1); - - picr1 |= MPC10X_CFG_PICR1_ST_GATH_EN; - - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - picr1); - - return 0; -} - -int __init -mpc10x_disable_store_gathering(struct pci_controller *hose) -{ - uint picr1; - - early_read_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - &picr1); - - picr1 &= ~MPC10X_CFG_PICR1_ST_GATH_EN; - - early_write_config_dword(hose, - 0, - PCI_DEVFN(0,0), - MPC10X_CFG_PICR1_REG, - picr1); - - return 0; -} - -#ifdef CONFIG_MPC10X_OPENPIC -void __init mpc10x_set_openpic(void) -{ - /* Map external IRQs */ - openpic_set_sources(0, EPIC_IRQ_BASE, OpenPIC_Addr + 0x10200); - /* Skip reserved space and map i2c and DMA Ch[01] */ - openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020); - /* Skip reserved space and map Message Unit Interrupt (I2O) */ - openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0); - /* Skip reserved space and map Serial Interrupts */ - openpic_set_sources(EPIC_IRQ_BASE + 4, 2, OpenPIC_Addr + 0x11120); - - openpic_init(NUM_8259_INTERRUPTS); -} -#endif diff --git a/arch/ppc/syslib/mpc52xx_devices.c b/arch/ppc/syslib/mpc52xx_devices.c deleted file mode 100644 index 7487539a4e9295d6f8f78eeeb256de67a00e56a5..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_devices.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - * Freescale MPC52xx device descriptions - * - * - * Maintainer : Sylvain Munaut - * - * Copyright (C) 2005 Sylvain Munaut - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include -#include -#include - - -static u64 mpc52xx_dma_mask = 0xffffffffULL; - -static struct fsl_i2c_platform_data mpc52xx_fsl_i2c_pdata = { - .device_flags = FSL_I2C_DEV_CLOCK_5200, -}; - - -/* We use relative offsets for IORESOURCE_MEM to be independent from the - * MBAR location at compile time - */ - -/* TODO Add the BestComm initiator channel to the device definitions, - possibly using IORESOURCE_DMA. But that's when BestComm is ready ... */ - -struct platform_device ppc_sys_platform_devices[] = { - [MPC52xx_MSCAN1] = { - .name = "mpc52xx-mscan", - .id = 0, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x0900, - .end = 0x097f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_MSCAN1_IRQ, - .end = MPC52xx_MSCAN1_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_MSCAN2] = { - .name = "mpc52xx-mscan", - .id = 1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x0980, - .end = 0x09ff, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_MSCAN2_IRQ, - .end = MPC52xx_MSCAN2_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_SPI] = { - .name = "mpc52xx-spi", - .id = -1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .start = 0x0f00, - .end = 0x0f1f, - .flags = IORESOURCE_MEM, - }, - { - .name = "modf", - .start = MPC52xx_SPI_MODF_IRQ, - .end = MPC52xx_SPI_MODF_IRQ, - .flags = IORESOURCE_IRQ, - }, - { - .name = "spif", - .start = MPC52xx_SPI_SPIF_IRQ, - .end = MPC52xx_SPI_SPIF_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_USB] = { - .name = "ppc-soc-ohci", - .id = -1, - .num_resources = 2, - .dev.dma_mask = &mpc52xx_dma_mask, - .dev.coherent_dma_mask = 0xffffffffULL, - .resource = (struct resource[]) { - { - .start = 0x1000, - .end = 0x10ff, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_USB_IRQ, - .end = MPC52xx_USB_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_BDLC] = { - .name = "mpc52xx-bdlc", - .id = -1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x1300, - .end = 0x130f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_BDLC_IRQ, - .end = MPC52xx_BDLC_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC1] = { - .name = "mpc52xx-psc", - .id = 0, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2000, - .end = 0x209f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC1_IRQ, - .end = MPC52xx_PSC1_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC2] = { - .name = "mpc52xx-psc", - .id = 1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2200, - .end = 0x229f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC2_IRQ, - .end = MPC52xx_PSC2_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC3] = { - .name = "mpc52xx-psc", - .id = 2, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2400, - .end = 0x249f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC3_IRQ, - .end = MPC52xx_PSC3_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC4] = { - .name = "mpc52xx-psc", - .id = 3, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2600, - .end = 0x269f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC4_IRQ, - .end = MPC52xx_PSC4_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC5] = { - .name = "mpc52xx-psc", - .id = 4, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2800, - .end = 0x289f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC5_IRQ, - .end = MPC52xx_PSC5_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_PSC6] = { - .name = "mpc52xx-psc", - .id = 5, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x2c00, - .end = 0x2c9f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_PSC6_IRQ, - .end = MPC52xx_PSC6_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_FEC] = { - .name = "mpc52xx-fec", - .id = -1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x3000, - .end = 0x33ff, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_FEC_IRQ, - .end = MPC52xx_FEC_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_ATA] = { - .name = "mpc52xx-ata", - .id = -1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x3a00, - .end = 0x3aff, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_ATA_IRQ, - .end = MPC52xx_ATA_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_I2C1] = { - .name = "fsl-i2c", - .id = 0, - .dev.platform_data = &mpc52xx_fsl_i2c_pdata, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x3d00, - .end = 0x3d1f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_I2C1_IRQ, - .end = MPC52xx_I2C1_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC52xx_I2C2] = { - .name = "fsl-i2c", - .id = 1, - .dev.platform_data = &mpc52xx_fsl_i2c_pdata, - .num_resources = 2, - .resource = (struct resource[]) { - { - .start = 0x3d40, - .end = 0x3d5f, - .flags = IORESOURCE_MEM, - }, - { - .start = MPC52xx_I2C2_IRQ, - .end = MPC52xx_I2C2_IRQ, - .flags = IORESOURCE_IRQ, - }, - }, - }, -}; - - -static int __init mach_mpc52xx_fixup(struct platform_device *pdev) -{ - ppc_sys_fixup_mem_resource(pdev, MPC52xx_MBAR); - return 0; -} - -static int __init mach_mpc52xx_init(void) -{ - ppc_sys_device_fixup = mach_mpc52xx_fixup; - return 0; -} - -postcore_initcall(mach_mpc52xx_init); diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c deleted file mode 100644 index 20a0eac0dc3a3fbd8ca4a6f3bbd59e6a64295dc3..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_pci.c +++ /dev/null @@ -1,289 +0,0 @@ -/* - * PCI code for the Freescale MPC52xx embedded CPU. - * - * - * Maintainer : Sylvain Munaut - * - * Copyright (C) 2004 Sylvain Munaut - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - - -#include - -#include -#include "mpc52xx_pci.h" - -#include -#include - - -/* This macro is defined to activate the workaround for the bug - 435 of the MPC5200 (L25R). With it activated, we don't do any - 32 bits configuration access during type-1 cycles */ -#define MPC5200_BUG_435_WORKAROUND - - -static int -mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, - int offset, int len, u32 *val) -{ - struct pci_controller *hose = bus->sysdata; - u32 value; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - out_be32(hose->cfg_addr, - (1 << 31) | - ((bus->number - hose->bus_offset) << 16) | - (devfn << 8) | - (offset & 0xfc)); - mb(); - -#ifdef MPC5200_BUG_435_WORKAROUND - if (bus->number != hose->bus_offset) { - switch (len) { - case 1: - value = in_8(((u8 __iomem *)hose->cfg_data) + (offset & 3)); - break; - case 2: - value = in_le16(((u16 __iomem *)hose->cfg_data) + ((offset>>1) & 1)); - break; - - default: - value = in_le16((u16 __iomem *)hose->cfg_data) | - (in_le16(((u16 __iomem *)hose->cfg_data) + 1) << 16); - break; - } - } - else -#endif - { - value = in_le32(hose->cfg_data); - - if (len != 4) { - value >>= ((offset & 0x3) << 3); - value &= 0xffffffff >> (32 - (len << 3)); - } - } - - *val = value; - - out_be32(hose->cfg_addr, 0); - mb(); - - return PCIBIOS_SUCCESSFUL; -} - -static int -mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, - int offset, int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - u32 value, mask; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - out_be32(hose->cfg_addr, - (1 << 31) | - ((bus->number - hose->bus_offset) << 16) | - (devfn << 8) | - (offset & 0xfc)); - mb(); - -#ifdef MPC5200_BUG_435_WORKAROUND - if (bus->number != hose->bus_offset) { - switch (len) { - case 1: - out_8(((u8 __iomem *)hose->cfg_data) + - (offset & 3), val); - break; - case 2: - out_le16(((u16 __iomem *)hose->cfg_data) + - ((offset>>1) & 1), val); - break; - - default: - out_le16((u16 __iomem *)hose->cfg_data, - (u16)val); - out_le16(((u16 __iomem *)hose->cfg_data) + 1, - (u16)(val>>16)); - break; - } - } - else -#endif - { - if (len != 4) { - value = in_le32(hose->cfg_data); - - offset = (offset & 0x3) << 3; - mask = (0xffffffff >> (32 - (len << 3))); - mask <<= offset; - - value &= ~mask; - val = value | ((val << offset) & mask); - } - - out_le32(hose->cfg_data, val); - } - mb(); - - out_be32(hose->cfg_addr, 0); - mb(); - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops mpc52xx_pci_ops = { - .read = mpc52xx_pci_read_config, - .write = mpc52xx_pci_write_config -}; - - -static void __init -mpc52xx_pci_setup(struct mpc52xx_pci __iomem *pci_regs) -{ - u32 tmp; - - /* Setup control regs */ - tmp = in_be32(&pci_regs->scr); - tmp |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - out_be32(&pci_regs->scr, tmp); - - /* Setup windows */ - out_be32(&pci_regs->iw0btar, MPC52xx_PCI_IWBTAR_TRANSLATION( - MPC52xx_PCI_MEM_START + MPC52xx_PCI_MEM_OFFSET, - MPC52xx_PCI_MEM_START, - MPC52xx_PCI_MEM_SIZE )); - - out_be32(&pci_regs->iw1btar, MPC52xx_PCI_IWBTAR_TRANSLATION( - MPC52xx_PCI_MMIO_START + MPC52xx_PCI_MEM_OFFSET, - MPC52xx_PCI_MMIO_START, - MPC52xx_PCI_MMIO_SIZE )); - - out_be32(&pci_regs->iw2btar, MPC52xx_PCI_IWBTAR_TRANSLATION( - MPC52xx_PCI_IO_BASE, - MPC52xx_PCI_IO_START, - MPC52xx_PCI_IO_SIZE )); - - out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK( - ( MPC52xx_PCI_IWCR_ENABLE | /* iw0btar */ - MPC52xx_PCI_IWCR_READ_MULTI | - MPC52xx_PCI_IWCR_MEM ), - ( MPC52xx_PCI_IWCR_ENABLE | /* iw1btar */ - MPC52xx_PCI_IWCR_READ | - MPC52xx_PCI_IWCR_MEM ), - ( MPC52xx_PCI_IWCR_ENABLE | /* iw2btar */ - MPC52xx_PCI_IWCR_IO ) - )); - - - out_be32(&pci_regs->tbatr0, - MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_IO ); - out_be32(&pci_regs->tbatr1, - MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM ); - - out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD); - - /* Reset the exteral bus ( internal PCI controller is NOT resetted ) */ - /* Not necessary and can be a bad thing if for example the bootloader - is displaying a splash screen or ... Just left here for - documentation purpose if anyone need it */ - tmp = in_be32(&pci_regs->gscr); -#if 0 - out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR); - udelay(50); -#endif - out_be32(&pci_regs->gscr, tmp & ~MPC52xx_PCI_GSCR_PR); -} - -static void -mpc52xx_pci_fixup_resources(struct pci_dev *dev) -{ - int i; - - /* We don't rely on boot loader for PCI and resets all - devices */ - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { - struct resource *res = &dev->resource[i]; - if (res->end > res->start) { /* Only valid resources */ - res->end -= res->start; - res->start = 0; - res->flags |= IORESOURCE_UNSET; - } - } - - /* The PCI Host bridge of MPC52xx has a prefetch memory resource - fixed to 1Gb. Doesn't fit in the resource system so we remove it */ - if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) && - ( dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200 - || dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200B) ) { - struct resource *res = &dev->resource[1]; - res->start = res->end = res->flags = 0; - } -} - -void __init -mpc52xx_find_bridges(void) -{ - struct mpc52xx_pci __iomem *pci_regs; - struct pci_controller *hose; - - pci_assign_all_buses = 1; - - pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE); - if (!pci_regs) - return; - - hose = pcibios_alloc_controller(); - if (!hose) { - iounmap(pci_regs); - return; - } - - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pcibios_fixup_resources = mpc52xx_pci_fixup_resources; - - hose->first_busno = 0; - hose->last_busno = 0xff; - hose->bus_offset = 0; - hose->ops = &mpc52xx_pci_ops; - - mpc52xx_pci_setup(pci_regs); - - hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET; - - hose->io_base_virt = ioremap(MPC52xx_PCI_IO_BASE, MPC52xx_PCI_IO_SIZE); - isa_io_base = (unsigned long) hose->io_base_virt; - - hose->cfg_addr = &pci_regs->car; - hose->cfg_data = hose->io_base_virt; - - /* Setup resources */ - pci_init_resource(&hose->mem_resources[0], - MPC52xx_PCI_MEM_START, - MPC52xx_PCI_MEM_STOP, - IORESOURCE_MEM|IORESOURCE_PREFETCH, - "PCI prefetchable memory"); - - pci_init_resource(&hose->mem_resources[1], - MPC52xx_PCI_MMIO_START, - MPC52xx_PCI_MMIO_STOP, - IORESOURCE_MEM, - "PCI memory"); - - pci_init_resource(&hose->io_resource, - MPC52xx_PCI_IO_START, - MPC52xx_PCI_IO_STOP, - IORESOURCE_IO, - "PCI I/O"); - -} diff --git a/arch/ppc/syslib/mpc52xx_pci.h b/arch/ppc/syslib/mpc52xx_pci.h deleted file mode 100644 index 77d47dbba85e207823a895a63691b0a5e36efb4f..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_pci.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * PCI Include file the Freescale MPC52xx embedded cpu chips - * - * - * Maintainer : Sylvain Munaut - * - * Inspired from code written by Dale Farnsworth - * for the 2.4 kernel. - * - * Copyright (C) 2004 Sylvain Munaut - * Copyright (C) 2003 MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef __SYSLIB_MPC52xx_PCI_H__ -#define __SYSLIB_MPC52xx_PCI_H__ - -/* ======================================================================== */ -/* PCI windows config */ -/* ======================================================================== */ - -/* - * Master windows : MPC52xx -> PCI - * - * 0x80000000 -> 0x9FFFFFFF PCI Mem prefetchable IW0BTAR - * 0xA0000000 -> 0xAFFFFFFF PCI Mem IW1BTAR - * 0xB0000000 -> 0xB0FFFFFF PCI IO IW2BTAR - * - * Slave windows : PCI -> MPC52xx - * - * 0xF0000000 -> 0xF003FFFF MPC52xx MBAR TBATR0 - * 0x00000000 -> 0x3FFFFFFF MPC52xx local memory TBATR1 - */ - -#define MPC52xx_PCI_MEM_OFFSET 0x00000000 /* Offset for MEM MMIO */ - -#define MPC52xx_PCI_MEM_START 0x80000000 -#define MPC52xx_PCI_MEM_SIZE 0x20000000 -#define MPC52xx_PCI_MEM_STOP (MPC52xx_PCI_MEM_START+MPC52xx_PCI_MEM_SIZE-1) - -#define MPC52xx_PCI_MMIO_START 0xa0000000 -#define MPC52xx_PCI_MMIO_SIZE 0x10000000 -#define MPC52xx_PCI_MMIO_STOP (MPC52xx_PCI_MMIO_START+MPC52xx_PCI_MMIO_SIZE-1) - -#define MPC52xx_PCI_IO_BASE 0xb0000000 - -#define MPC52xx_PCI_IO_START 0x00000000 -#define MPC52xx_PCI_IO_SIZE 0x01000000 -#define MPC52xx_PCI_IO_STOP (MPC52xx_PCI_IO_START+MPC52xx_PCI_IO_SIZE-1) - - -#define MPC52xx_PCI_TARGET_IO MPC52xx_MBAR -#define MPC52xx_PCI_TARGET_MEM 0x00000000 - - -/* ======================================================================== */ -/* Structures mapping & Defines for PCI Unit */ -/* ======================================================================== */ - -#define MPC52xx_PCI_GSCR_BM 0x40000000 -#define MPC52xx_PCI_GSCR_PE 0x20000000 -#define MPC52xx_PCI_GSCR_SE 0x10000000 -#define MPC52xx_PCI_GSCR_XLB2PCI_MASK 0x07000000 -#define MPC52xx_PCI_GSCR_XLB2PCI_SHIFT 24 -#define MPC52xx_PCI_GSCR_IPG2PCI_MASK 0x00070000 -#define MPC52xx_PCI_GSCR_IPG2PCI_SHIFT 16 -#define MPC52xx_PCI_GSCR_BME 0x00004000 -#define MPC52xx_PCI_GSCR_PEE 0x00002000 -#define MPC52xx_PCI_GSCR_SEE 0x00001000 -#define MPC52xx_PCI_GSCR_PR 0x00000001 - - -#define MPC52xx_PCI_IWBTAR_TRANSLATION(proc_ad,pci_ad,size) \ - ( ( (proc_ad) & 0xff000000 ) | \ - ( (((size) - 1) >> 8) & 0x00ff0000 ) | \ - ( ((pci_ad) >> 16) & 0x0000ff00 ) ) - -#define MPC52xx_PCI_IWCR_PACK(win0,win1,win2) (((win0) << 24) | \ - ((win1) << 16) | \ - ((win2) << 8)) - -#define MPC52xx_PCI_IWCR_DISABLE 0x0 -#define MPC52xx_PCI_IWCR_ENABLE 0x1 -#define MPC52xx_PCI_IWCR_READ 0x0 -#define MPC52xx_PCI_IWCR_READ_LINE 0x2 -#define MPC52xx_PCI_IWCR_READ_MULTI 0x4 -#define MPC52xx_PCI_IWCR_MEM 0x0 -#define MPC52xx_PCI_IWCR_IO 0x8 - -#define MPC52xx_PCI_TCR_P 0x01000000 -#define MPC52xx_PCI_TCR_LD 0x00010000 - -#define MPC52xx_PCI_TBATR_DISABLE 0x0 -#define MPC52xx_PCI_TBATR_ENABLE 0x1 - - -#ifndef __ASSEMBLY__ - -struct mpc52xx_pci { - u32 idr; /* PCI + 0x00 */ - u32 scr; /* PCI + 0x04 */ - u32 ccrir; /* PCI + 0x08 */ - u32 cr1; /* PCI + 0x0C */ - u32 bar0; /* PCI + 0x10 */ - u32 bar1; /* PCI + 0x14 */ - u8 reserved1[16]; /* PCI + 0x18 */ - u32 ccpr; /* PCI + 0x28 */ - u32 sid; /* PCI + 0x2C */ - u32 erbar; /* PCI + 0x30 */ - u32 cpr; /* PCI + 0x34 */ - u8 reserved2[4]; /* PCI + 0x38 */ - u32 cr2; /* PCI + 0x3C */ - u8 reserved3[32]; /* PCI + 0x40 */ - u32 gscr; /* PCI + 0x60 */ - u32 tbatr0; /* PCI + 0x64 */ - u32 tbatr1; /* PCI + 0x68 */ - u32 tcr; /* PCI + 0x6C */ - u32 iw0btar; /* PCI + 0x70 */ - u32 iw1btar; /* PCI + 0x74 */ - u32 iw2btar; /* PCI + 0x78 */ - u8 reserved4[4]; /* PCI + 0x7C */ - u32 iwcr; /* PCI + 0x80 */ - u32 icr; /* PCI + 0x84 */ - u32 isr; /* PCI + 0x88 */ - u32 arb; /* PCI + 0x8C */ - u8 reserved5[104]; /* PCI + 0x90 */ - u32 car; /* PCI + 0xF8 */ - u8 reserved6[4]; /* PCI + 0xFC */ -}; - -#endif /* __ASSEMBLY__ */ - - -#endif /* __SYSLIB_MPC52xx_PCI_H__ */ diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c deleted file mode 100644 index f58149c03b0fcbe9fe326878ff3a84256aaf18c4..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_pic.c +++ /dev/null @@ -1,254 +0,0 @@ -/* - * Programmable Interrupt Controller functions for the Freescale MPC52xx - * embedded CPU. - * - * - * Maintainer : Sylvain Munaut - * - * Based on (well, mostly copied from) the code from the 2.4 kernel by - * Dale Farnsworth and Kent Borg. - * - * Copyright (C) 2004 Sylvain Munaut - * Copyright (C) 2003 Montavista Software, Inc - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -static struct mpc52xx_intr __iomem *intr; -static struct mpc52xx_sdma __iomem *sdma; - -static void -mpc52xx_ic_disable(unsigned int irq) -{ - u32 val; - - if (irq == MPC52xx_IRQ0) { - val = in_be32(&intr->ctrl); - val &= ~(1 << 11); - out_be32(&intr->ctrl, val); - } - else if (irq < MPC52xx_IRQ1) { - BUG(); - } - else if (irq <= MPC52xx_IRQ3) { - val = in_be32(&intr->ctrl); - val &= ~(1 << (10 - (irq - MPC52xx_IRQ1))); - out_be32(&intr->ctrl, val); - } - else if (irq < MPC52xx_SDMA_IRQ_BASE) { - val = in_be32(&intr->main_mask); - val |= 1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE)); - out_be32(&intr->main_mask, val); - } - else if (irq < MPC52xx_PERP_IRQ_BASE) { - val = in_be32(&sdma->IntMask); - val |= 1 << (irq - MPC52xx_SDMA_IRQ_BASE); - out_be32(&sdma->IntMask, val); - } - else { - val = in_be32(&intr->per_mask); - val |= 1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE)); - out_be32(&intr->per_mask, val); - } -} - -static void -mpc52xx_ic_enable(unsigned int irq) -{ - u32 val; - - if (irq == MPC52xx_IRQ0) { - val = in_be32(&intr->ctrl); - val |= 1 << 11; - out_be32(&intr->ctrl, val); - } - else if (irq < MPC52xx_IRQ1) { - BUG(); - } - else if (irq <= MPC52xx_IRQ3) { - val = in_be32(&intr->ctrl); - val |= 1 << (10 - (irq - MPC52xx_IRQ1)); - out_be32(&intr->ctrl, val); - } - else if (irq < MPC52xx_SDMA_IRQ_BASE) { - val = in_be32(&intr->main_mask); - val &= ~(1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE))); - out_be32(&intr->main_mask, val); - } - else if (irq < MPC52xx_PERP_IRQ_BASE) { - val = in_be32(&sdma->IntMask); - val &= ~(1 << (irq - MPC52xx_SDMA_IRQ_BASE)); - out_be32(&sdma->IntMask, val); - } - else { - val = in_be32(&intr->per_mask); - val &= ~(1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE))); - out_be32(&intr->per_mask, val); - } -} - -static void -mpc52xx_ic_ack(unsigned int irq) -{ - u32 val; - - /* - * Only some irqs are reset here, others in interrupting hardware. - */ - - switch (irq) { - case MPC52xx_IRQ0: - val = in_be32(&intr->ctrl); - val |= 0x08000000; - out_be32(&intr->ctrl, val); - break; - case MPC52xx_CCS_IRQ: - val = in_be32(&intr->enc_status); - val |= 0x00000400; - out_be32(&intr->enc_status, val); - break; - case MPC52xx_IRQ1: - val = in_be32(&intr->ctrl); - val |= 0x04000000; - out_be32(&intr->ctrl, val); - break; - case MPC52xx_IRQ2: - val = in_be32(&intr->ctrl); - val |= 0x02000000; - out_be32(&intr->ctrl, val); - break; - case MPC52xx_IRQ3: - val = in_be32(&intr->ctrl); - val |= 0x01000000; - out_be32(&intr->ctrl, val); - break; - default: - if (irq >= MPC52xx_SDMA_IRQ_BASE - && irq < (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)) { - out_be32(&sdma->IntPend, - 1 << (irq - MPC52xx_SDMA_IRQ_BASE)); - } - break; - } -} - -static void -mpc52xx_ic_disable_and_ack(unsigned int irq) -{ - mpc52xx_ic_disable(irq); - mpc52xx_ic_ack(irq); -} - -static void -mpc52xx_ic_end(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - mpc52xx_ic_enable(irq); -} - -static struct hw_interrupt_type mpc52xx_ic = { - .typename = " MPC52xx ", - .enable = mpc52xx_ic_enable, - .disable = mpc52xx_ic_disable, - .ack = mpc52xx_ic_disable_and_ack, - .end = mpc52xx_ic_end, -}; - -void __init -mpc52xx_init_irq(void) -{ - int i; - u32 intr_ctrl; - - /* Remap the necessary zones */ - intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE); - sdma = ioremap(MPC52xx_PA(MPC52xx_SDMA_OFFSET), MPC52xx_SDMA_SIZE); - - if ((intr==NULL) || (sdma==NULL)) - panic("Can't ioremap PIC/SDMA register for init_irq !"); - - /* Disable all interrupt sources. */ - out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ - out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ - out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */ - out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */ - intr_ctrl = in_be32(&intr->ctrl); - intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */ - intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */ - 0x00001000 | /* MEE master external enable */ - 0x00000000 | /* 0 means disable IRQ 0-3 */ - 0x00000001; /* CEb route critical normally */ - out_be32(&intr->ctrl, intr_ctrl); - - /* Zero a bunch of the priority settings. */ - out_be32(&intr->per_pri1, 0); - out_be32(&intr->per_pri2, 0); - out_be32(&intr->per_pri3, 0); - out_be32(&intr->main_pri1, 0); - out_be32(&intr->main_pri2, 0); - - /* Initialize irq_desc[i].chip's with mpc52xx_ic. */ - for (i = 0; i < NR_IRQS; i++) { - irq_desc[i].chip = &mpc52xx_ic; - irq_desc[i].status = IRQ_LEVEL; - } - - #define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03) - for (i=0 ; i<4 ; i++) { - int mode; - mode = IRQn_MODE(intr_ctrl,i); - if ((mode == 0x1) || (mode == 0x2)) - irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0; - } -} - -int -mpc52xx_get_irq(void) -{ - u32 status; - int irq = -1; - - status = in_be32(&intr->enc_status); - - if (status & 0x00000400) { /* critical */ - irq = (status >> 8) & 0x3; - if (irq == 2) /* high priority peripheral */ - goto peripheral; - irq += MPC52xx_CRIT_IRQ_BASE; - } - else if (status & 0x00200000) { /* main */ - irq = (status >> 16) & 0x1f; - if (irq == 4) /* low priority peripheral */ - goto peripheral; - irq += MPC52xx_MAIN_IRQ_BASE; - } - else if (status & 0x20000000) { /* peripheral */ -peripheral: - irq = (status >> 24) & 0x1f; - if (irq == 0) { /* bestcomm */ - status = in_be32(&sdma->IntPend); - irq = ffs(status) + MPC52xx_SDMA_IRQ_BASE-1; - } - else - irq += MPC52xx_PERP_IRQ_BASE; - } - - return irq; -} - diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c deleted file mode 100644 index ab0cf4ced9e5043e10cec56061058a8b0ca2c42a..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_setup.c +++ /dev/null @@ -1,313 +0,0 @@ -/* - * Common code for the boards based on Freescale MPC52xx embedded CPU. - * - * - * Maintainer : Sylvain Munaut - * - * Support for other bootloaders than UBoot by Dale Farnsworth - * - * - * Copyright (C) 2004 Sylvain Munaut - * Copyright (C) 2003 Montavista Software, Inc - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - - -#include -#include -#include -#include -#include -#include -#include - -#include - -extern bd_t __res; - -static int core_mult[] = { /* CPU Frequency multiplier, taken */ - 0, 0, 0, 10, 20, 20, 25, 45, /* from the datasheet used to compute */ - 30, 55, 40, 50, 0, 60, 35, 0, /* CPU frequency from XLB freq and */ - 30, 25, 65, 10, 70, 20, 75, 45, /* external jumper config */ - 0, 55, 40, 50, 80, 60, 35, 0 -}; - -void -mpc52xx_restart(char *cmd) -{ - struct mpc52xx_gpt __iomem *gpt0 = MPC52xx_VA(MPC52xx_GPTx_OFFSET(0)); - - local_irq_disable(); - - /* Turn on the watchdog and wait for it to expire. It effectively - does a reset */ - out_be32(&gpt0->count, 0x000000ff); - out_be32(&gpt0->mode, 0x00009004); - - while (1); -} - -void -mpc52xx_halt(void) -{ - local_irq_disable(); - - while (1); -} - -void -mpc52xx_power_off(void) -{ - /* By default we don't have any way of shut down. - If a specific board wants to, it can set the power down - code to any hardware implementation dependent code */ - mpc52xx_halt(); -} - - -void __init -mpc52xx_set_bat(void) -{ - /* Set BAT 2 to map the 0xf0000000 area */ - /* This mapping is used during mpc52xx_progress, - * mpc52xx_find_end_of_memory, and UARTs/GPIO access for debug - */ - mb(); - mtspr(SPRN_DBAT2U, 0xf0001ffe); - mtspr(SPRN_DBAT2L, 0xf000002a); - mb(); -} - -void __init -mpc52xx_map_io(void) -{ - /* Here we map the MBAR and the whole upper zone. MBAR is only - 64k but we can't map only 64k with BATs. Map the whole - 0xf0000000 range is ok and helps eventual lpb devices placed there */ - io_block_mapping( - MPC52xx_MBAR_VIRT, MPC52xx_MBAR, 0x10000000, _PAGE_IO); -} - - -#ifdef CONFIG_SERIAL_TEXT_DEBUG -#ifndef MPC52xx_PF_CONSOLE_PORT -#error "mpc52xx PSC for console not selected" -#endif - -static void -mpc52xx_psc_putc(struct mpc52xx_psc __iomem *psc, unsigned char c) -{ - while (!(in_be16(&psc->mpc52xx_psc_status) & - MPC52xx_PSC_SR_TXRDY)); - out_8(&psc->mpc52xx_psc_buffer_8, c); -} - -void -mpc52xx_progress(char *s, unsigned short hex) -{ - char c; - struct mpc52xx_psc __iomem *psc; - - psc = MPC52xx_VA(MPC52xx_PSCx_OFFSET(MPC52xx_PF_CONSOLE_PORT)); - - while ((c = *s++) != 0) { - if (c == '\n') - mpc52xx_psc_putc(psc, '\r'); - mpc52xx_psc_putc(psc, c); - } - - mpc52xx_psc_putc(psc, '\r'); - mpc52xx_psc_putc(psc, '\n'); -} - -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ - - -unsigned long __init -mpc52xx_find_end_of_memory(void) -{ - u32 ramsize = __res.bi_memsize; - - /* - * if bootloader passed a memsize, just use it - * else get size from sdram config registers - */ - if (ramsize == 0) { - struct mpc52xx_mmap_ctl __iomem *mmap_ctl; - u32 sdram_config_0, sdram_config_1; - - /* Temp BAT2 mapping active when this is called ! */ - mmap_ctl = MPC52xx_VA(MPC52xx_MMAP_CTL_OFFSET); - - sdram_config_0 = in_be32(&mmap_ctl->sdram0); - sdram_config_1 = in_be32(&mmap_ctl->sdram1); - - if ((sdram_config_0 & 0x1f) >= 0x13) - ramsize = 1 << ((sdram_config_0 & 0xf) + 17); - - if (((sdram_config_1 & 0x1f) >= 0x13) && - ((sdram_config_1 & 0xfff00000) == ramsize)) - ramsize += 1 << ((sdram_config_1 & 0xf) + 17); - } - - return ramsize; -} - -void __init -mpc52xx_calibrate_decr(void) -{ - int current_time, previous_time; - int tbl_start, tbl_end; - unsigned int xlbfreq, cpufreq, ipbfreq, pcifreq, divisor; - - xlbfreq = __res.bi_busfreq; - /* if bootloader didn't pass bus frequencies, calculate them */ - if (xlbfreq == 0) { - /* Get RTC & Clock manager modules */ - struct mpc52xx_rtc __iomem *rtc; - struct mpc52xx_cdm __iomem *cdm; - - rtc = ioremap(MPC52xx_PA(MPC52xx_RTC_OFFSET), MPC52xx_RTC_SIZE); - cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE); - - if ((rtc==NULL) || (cdm==NULL)) - panic("Can't ioremap RTC/CDM while computing bus freq"); - - /* Count bus clock during 1/64 sec */ - out_be32(&rtc->dividers, 0x8f1f0000); /* Set RTC 64x faster */ - previous_time = in_be32(&rtc->time); - while ((current_time = in_be32(&rtc->time)) == previous_time) ; - tbl_start = get_tbl(); - previous_time = current_time; - while ((current_time = in_be32(&rtc->time)) == previous_time) ; - tbl_end = get_tbl(); - out_be32(&rtc->dividers, 0xffff0000); /* Restore RTC */ - - /* Compute all frequency from that & CDM settings */ - xlbfreq = (tbl_end - tbl_start) << 8; - cpufreq = (xlbfreq * core_mult[in_be32(&cdm->rstcfg)&0x1f])/10; - ipbfreq = (in_8(&cdm->ipb_clk_sel) & 1) ? - xlbfreq / 2 : xlbfreq; - switch (in_8(&cdm->pci_clk_sel) & 3) { - case 0: - pcifreq = ipbfreq; - break; - case 1: - pcifreq = ipbfreq / 2; - break; - default: - pcifreq = xlbfreq / 4; - break; - } - __res.bi_busfreq = xlbfreq; - __res.bi_intfreq = cpufreq; - __res.bi_ipbfreq = ipbfreq; - __res.bi_pcifreq = pcifreq; - - /* Release mapping */ - iounmap(rtc); - iounmap(cdm); - } - - divisor = 4; - - tb_ticks_per_jiffy = xlbfreq / HZ / divisor; - tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000); -} - - -void __init -mpc52xx_setup_cpu(void) -{ - struct mpc52xx_cdm __iomem *cdm; - struct mpc52xx_xlb __iomem *xlb; - - /* Map zones */ - cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE); - xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE); - - if (!cdm || !xlb) { - printk(KERN_ERR __FILE__ ": " - "Error while mapping CDM/XLB during " - "mpc52xx_setup_cpu\n"); - goto unmap_regs; - } - - /* Use internal 48 Mhz */ - out_8(&cdm->ext_48mhz_en, 0x00); - out_8(&cdm->fd_enable, 0x01); - if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ - out_be16(&cdm->fd_counters, 0x0001); - else - out_be16(&cdm->fd_counters, 0x5555); - - /* Configure the XLB Arbiter priorities */ - out_be32(&xlb->master_pri_enable, 0xff); - out_be32(&xlb->master_priority, 0x11111111); - - /* Enable ram snooping for 1GB window */ - out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP); - out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d); - - /* Disable XLB pipelining */ - /* (cfr errata 292. We could do this only just before ATA PIO - transaction and re-enable it after ...) */ - out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); - - /* Unmap reg zone */ -unmap_regs: - if (cdm) iounmap(cdm); - if (xlb) iounmap(xlb); -} - - -int mpc52xx_match_psc_function(int psc_idx, const char *func) -{ - struct mpc52xx_psc_func *cf = mpc52xx_psc_functions; - - while ((cf->id != -1) && (cf->func != NULL)) { - if ((cf->id == psc_idx) && !strcmp(cf->func,func)) - return 1; - cf++; - } - - return 0; -} - -int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv) -{ - static DEFINE_SPINLOCK(lock); - struct mpc52xx_cdm __iomem *cdm; - unsigned long flags; - u16 mclken_div; - u16 __iomem *reg; - u32 mask; - - cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE); - if (!cdm) { - printk(KERN_ERR __FILE__ ": Error mapping CDM\n"); - return -ENODEV; - } - - mclken_div = 0x8000 | (clkdiv & 0x1FF); - switch (psc_id) { - case 1: reg = &cdm->mclken_div_psc1; mask = 0x20; break; - case 2: reg = &cdm->mclken_div_psc2; mask = 0x40; break; - case 3: reg = &cdm->mclken_div_psc3; mask = 0x80; break; - case 6: reg = &cdm->mclken_div_psc6; mask = 0x10; break; - default: - return -ENODEV; - } - - /* Set the rate and enable the clock */ - spin_lock_irqsave(&lock, flags); - out_be16(reg, mclken_div); - out_be32(&cdm->clk_enables, in_be32(&cdm->clk_enables) | mask); - spin_unlock_irqrestore(&lock, flags); - - iounmap(cdm); - return 0; -} diff --git a/arch/ppc/syslib/mpc52xx_sys.c b/arch/ppc/syslib/mpc52xx_sys.c deleted file mode 100644 index b4e6f978f05795b6fe99dbfb6ee1b3afff9cfe92..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc52xx_sys.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Freescale MPC52xx system descriptions - * - * - * Maintainer : Sylvain Munaut - * - * Copyright (C) 2005 Sylvain Munaut - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include - -struct ppc_sys_spec *cur_ppc_sys_spec; -struct ppc_sys_spec ppc_sys_specs[] = { - { - .ppc_sys_name = "5200", - .mask = 0xffff0000, - .value = 0x80110000, - .num_devices = 15, - .device_list = (enum ppc_sys_devices[]) - { - MPC52xx_MSCAN1, MPC52xx_MSCAN2, MPC52xx_SPI, - MPC52xx_USB, MPC52xx_BDLC, MPC52xx_PSC1, MPC52xx_PSC2, - MPC52xx_PSC3, MPC52xx_PSC4, MPC52xx_PSC5, MPC52xx_PSC6, - MPC52xx_FEC, MPC52xx_ATA, MPC52xx_I2C1, MPC52xx_I2C2, - }, - }, - { /* default match */ - .ppc_sys_name = "", - .mask = 0x00000000, - .value = 0x00000000, - }, -}; diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c deleted file mode 100644 index 80804eee5795937af05a7ff13e5a5592f63a3005..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ /dev/null @@ -1,243 +0,0 @@ -/* - * MPC8xx Device descriptions - * - * Maintainer: Kumar Gala - * - * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* We use offsets for IORESOURCE_MEM to do not set dependencies at compile time. - * They will get fixed up by mach_mpc8xx_fixup - */ - -struct platform_device ppc_sys_platform_devices[] = { - [MPC8xx_CPM_FEC1] = { - .name = "fsl-cpm-fec", - .id = 1, - .num_resources = 2, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xe00, - .end = 0xe88, - .flags = IORESOURCE_MEM, - }, - { - .name = "interrupt", - .start = MPC8xx_INT_FEC1, - .end = MPC8xx_INT_FEC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_FEC2] = { - .name = "fsl-cpm-fec", - .id = 2, - .num_resources = 2, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0x1e00, - .end = 0x1e88, - .flags = IORESOURCE_MEM, - }, - { - .name = "interrupt", - .start = MPC8xx_INT_FEC2, - .end = MPC8xx_INT_FEC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SCC1] = { - .name = "fsl-cpm-scc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa00, - .end = 0xa18, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3c00, - .end = 0x3c7f, - .flags = IORESOURCE_MEM, - }, - { - .name = "interrupt", - .start = MPC8xx_INT_SCC1, - .end = MPC8xx_INT_SCC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SCC2] = { - .name = "fsl-cpm-scc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa20, - .end = 0xa38, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3d00, - .end = 0x3d7f, - .flags = IORESOURCE_MEM, - }, - - { - .name = "interrupt", - .start = MPC8xx_INT_SCC2, - .end = MPC8xx_INT_SCC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SCC3] = { - .name = "fsl-cpm-scc", - .id = 3, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa40, - .end = 0xa58, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3e00, - .end = 0x3e7f, - .flags = IORESOURCE_MEM, - }, - - { - .name = "interrupt", - .start = MPC8xx_INT_SCC3, - .end = MPC8xx_INT_SCC3, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SCC4] = { - .name = "fsl-cpm-scc", - .id = 4, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa60, - .end = 0xa78, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3f00, - .end = 0x3f7f, - .flags = IORESOURCE_MEM, - }, - - { - .name = "interrupt", - .start = MPC8xx_INT_SCC4, - .end = MPC8xx_INT_SCC4, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SMC1] = { - .name = "fsl-cpm-smc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa80, - .end = 0xa8f, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3e80, - .end = 0x3ebf, - .flags = IORESOURCE_MEM, - }, - { - .name = "interrupt", - .start = MPC8xx_INT_SMC1, - .end = MPC8xx_INT_SMC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC8xx_CPM_SMC2] = { - .name = "fsl-cpm-smc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0xa90, - .end = 0xa9f, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x3f80, - .end = 0x3fbf, - .flags = IORESOURCE_MEM, - - }, - { - .name = "interrupt", - .start = MPC8xx_INT_SMC2, - .end = MPC8xx_INT_SMC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - - [MPC8xx_MDIO_FEC] = { - .name = "fsl-cpm-fec-mdio", - .id = 0, - .num_resources = 0, - - }, - -}; - -static int __init mach_mpc8xx_fixup(struct platform_device *pdev) -{ - ppc_sys_fixup_mem_resource (pdev, IMAP_ADDR); - return 0; -} - -static int __init mach_mpc8xx_init(void) -{ - ppc_sys_device_fixup = mach_mpc8xx_fixup; - return 0; -} - -postcore_initcall(mach_mpc8xx_init); diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c deleted file mode 100644 index 18ba1d7ff9f19d712a53db382af582ca74c2ce93..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mpc8xx_sys.c +++ /dev/null @@ -1,61 +0,0 @@ -/* - * MPC8xx System descriptions - * - * Maintainer: Kumar Gala - * - * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include - -struct ppc_sys_spec *cur_ppc_sys_spec; -struct ppc_sys_spec ppc_sys_specs[] = { - { - .ppc_sys_name = "MPC86X", - .mask = 0xFFFFFFFF, - .value = 0x00000000, - .num_devices = 8, - .device_list = (enum ppc_sys_devices[]) - { - MPC8xx_CPM_FEC1, - MPC8xx_CPM_SCC1, - MPC8xx_CPM_SCC2, - MPC8xx_CPM_SCC3, - MPC8xx_CPM_SCC4, - MPC8xx_CPM_SMC1, - MPC8xx_CPM_SMC2, - MPC8xx_MDIO_FEC, - }, - }, - { - .ppc_sys_name = "MPC885", - .mask = 0xFFFFFFFF, - .value = 0x00000000, - .num_devices = 9, - .device_list = (enum ppc_sys_devices[]) - { - MPC8xx_CPM_FEC1, - MPC8xx_CPM_FEC2, - MPC8xx_CPM_SCC1, - MPC8xx_CPM_SCC2, - MPC8xx_CPM_SCC3, - MPC8xx_CPM_SCC4, - MPC8xx_CPM_SMC1, - MPC8xx_CPM_SMC2, - MPC8xx_MDIO_FEC, - }, - }, - { /* default match */ - .ppc_sys_name = "", - .mask = 0x00000000, - .value = 0x00000000, - }, -}; diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c deleted file mode 100644 index 2dd2dc5cd4045b2f82eee1cee9e74c9823225943..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mv64360_pic.c +++ /dev/null @@ -1,423 +0,0 @@ -/* - * Interrupt controller support for Marvell's MV64360. - * - * Author: Rabeeh Khoury - * Based on MV64360 PIC written by - * Chris Zankel - * Mark A. Greer - * - * Copyright 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -/* - * This file contains the specific functions to support the MV64360 - * interrupt controller. - * - * The MV64360 has two main interrupt registers (high and low) that - * summarizes the interrupts generated by the units of the MV64360. - * Each bit is assigned to an interrupt number, where the low register - * are assigned from IRQ0 to IRQ31 and the high cause register - * from IRQ32 to IRQ63 - * The GPP (General Purpose Pins) interrupts are assigned from IRQ64 (GPP0) - * to IRQ95 (GPP31). - * get_irq() returns the lowest interrupt number that is currently asserted. - * - * Note: - * - This driver does not initialize the GPP when used as an interrupt - * input. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_IRQ_ALL_CPUS -#error "The mv64360 does not support distribution of IRQs on all CPUs" -#endif -/* ========================== forward declaration ========================== */ - -static void mv64360_unmask_irq(unsigned int); -static void mv64360_mask_irq(unsigned int); -static irqreturn_t mv64360_cpu_error_int_handler(int, void *); -static irqreturn_t mv64360_sram_error_int_handler(int, void *); -static irqreturn_t mv64360_pci_error_int_handler(int, void *); - -/* ========================== local declarations =========================== */ - -struct hw_interrupt_type mv64360_pic = { - .typename = " mv64360 ", - .enable = mv64360_unmask_irq, - .disable = mv64360_mask_irq, - .ack = mv64360_mask_irq, - .end = mv64360_unmask_irq, -}; - -#define CPU_INTR_STR "mv64360 cpu interface error" -#define SRAM_INTR_STR "mv64360 internal sram error" -#define PCI0_INTR_STR "mv64360 pci 0 error" -#define PCI1_INTR_STR "mv64360 pci 1 error" - -static struct mv64x60_handle bh; - -u32 mv64360_irq_base = 0; /* MV64360 handles the next 96 IRQs from here */ - -/* mv64360_init_irq() - * - * This function initializes the interrupt controller. It assigns - * all interrupts from IRQ0 to IRQ95 to the mv64360 interrupt controller. - * - * Input Variable(s): - * None. - * - * Outpu. Variable(s): - * None. - * - * Returns: - * void - * - * Note: - * We register all GPP inputs as interrupt source, but disable them. - */ -void __init -mv64360_init_irq(void) -{ - int i; - - if (ppc_md.progress) - ppc_md.progress("mv64360_init_irq: enter", 0x0); - - bh.v_base = mv64x60_get_bridge_vbase(); - - ppc_cached_irq_mask[0] = 0; - ppc_cached_irq_mask[1] = 0x0f000000; /* Enable GPP intrs */ - ppc_cached_irq_mask[2] = 0; - - /* disable all interrupts and clear current interrupts */ - mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, 0); - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, ppc_cached_irq_mask[2]); - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO,ppc_cached_irq_mask[0]); - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI,ppc_cached_irq_mask[1]); - - /* All interrupts are level interrupts */ - for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) { - irq_desc[i].status |= IRQ_LEVEL; - irq_desc[i].chip = &mv64360_pic; - } - - if (ppc_md.progress) - ppc_md.progress("mv64360_init_irq: exit", 0x0); -} - -/* mv64360_get_irq() - * - * This function returns the lowest interrupt number of all interrupts that - * are currently asserted. - * - * Output Variable(s): - * None. - * - * Returns: - * int or -2 (bogus interrupt) - * - */ -int -mv64360_get_irq(void) -{ - int irq; - int irq_gpp; - -#ifdef CONFIG_SMP - /* - * Second CPU gets only doorbell (message) interrupts. - * The doorbell interrupt is BIT28 in the main interrupt low cause reg. - */ - int cpu_nr = smp_processor_id(); - if (cpu_nr == 1) { - if (!(mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_LO) & - (1 << MV64x60_IRQ_DOORBELL))) - return -1; - return mv64360_irq_base + MV64x60_IRQ_DOORBELL; - } -#endif - - irq = mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_LO); - irq = __ilog2((irq & 0x3dfffffe) & ppc_cached_irq_mask[0]); - - if (irq == -1) { - irq = mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_HI); - irq = __ilog2((irq & 0x1f0003f7) & ppc_cached_irq_mask[1]); - - if (irq == -1) - irq = -2; /* bogus interrupt, should never happen */ - else { - if ((irq >= 24) && (irq < MV64x60_IRQ_DOORBELL)) { - irq_gpp = mv64x60_read(&bh, - MV64x60_GPP_INTR_CAUSE); - irq_gpp = __ilog2(irq_gpp & - ppc_cached_irq_mask[2]); - - if (irq_gpp == -1) - irq = -2; - else { - irq = irq_gpp + 64; - mv64x60_write(&bh, - MV64x60_GPP_INTR_CAUSE, - ~(1 << (irq - 64))); - } - } - else - irq += 32; - } - } - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE); - - if (irq < 0) - return (irq); - else - return (mv64360_irq_base + irq); -} - -/* mv64360_unmask_irq() - * - * This function enables an interrupt. - * - * Input Variable(s): - * unsigned int interrupt number (IRQ0...IRQ95). - * - * Output Variable(s): - * None. - * - * Returns: - * void - */ -static void -mv64360_unmask_irq(unsigned int irq) -{ -#ifdef CONFIG_SMP - /* second CPU gets only doorbell interrupts */ - if ((irq - mv64360_irq_base) == MV64x60_IRQ_DOORBELL) { - mv64x60_set_bits(&bh, MV64360_IC_CPU1_INTR_MASK_LO, - (1 << MV64x60_IRQ_DOORBELL)); - return; - } -#endif - irq -= mv64360_irq_base; - - if (irq > 31) { - if (irq > 63) /* unmask GPP irq */ - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, - ppc_cached_irq_mask[2] |= (1 << (irq - 64))); - else /* mask high interrupt register */ - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI, - ppc_cached_irq_mask[1] |= (1 << (irq - 32))); - } - else /* mask low interrupt register */ - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO, - ppc_cached_irq_mask[0] |= (1 << irq)); - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - return; -} - -/* mv64360_mask_irq() - * - * This function disables the requested interrupt. - * - * Input Variable(s): - * unsigned int interrupt number (IRQ0...IRQ95). - * - * Output Variable(s): - * None. - * - * Returns: - * void - */ -static void -mv64360_mask_irq(unsigned int irq) -{ -#ifdef CONFIG_SMP - if ((irq - mv64360_irq_base) == MV64x60_IRQ_DOORBELL) { - mv64x60_clr_bits(&bh, MV64360_IC_CPU1_INTR_MASK_LO, - (1 << MV64x60_IRQ_DOORBELL)); - return; - } -#endif - irq -= mv64360_irq_base; - - if (irq > 31) { - if (irq > 63) /* mask GPP irq */ - mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, - ppc_cached_irq_mask[2] &= ~(1 << (irq - 64))); - else /* mask high interrupt register */ - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI, - ppc_cached_irq_mask[1] &= ~(1 << (irq - 32))); - } - else /* mask low interrupt register */ - mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO, - ppc_cached_irq_mask[0] &= ~(1 << irq)); - - (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK); - return; -} - -static irqreturn_t -mv64360_cpu_error_int_handler(int irq, void *dev_id) -{ - printk(KERN_ERR "mv64360_cpu_error_int_handler: %s 0x%08x\n", - "Error on CPU interface - Cause regiser", - mv64x60_read(&bh, MV64x60_CPU_ERR_CAUSE)); - printk(KERN_ERR "\tCPU error register dump:\n"); - printk(KERN_ERR "\tAddress low 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress high 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_HI)); - printk(KERN_ERR "\tData low 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_LO)); - printk(KERN_ERR "\tData high 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_HI)); - printk(KERN_ERR "\tParity 0x%08x\n", - mv64x60_read(&bh, MV64x60_CPU_ERR_PARITY)); - mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0); - return IRQ_HANDLED; -} - -static irqreturn_t -mv64360_sram_error_int_handler(int irq, void *dev_id) -{ - printk(KERN_ERR "mv64360_sram_error_int_handler: %s 0x%08x\n", - "Error in internal SRAM - Cause register", - mv64x60_read(&bh, MV64360_SRAM_ERR_CAUSE)); - printk(KERN_ERR "\tSRAM error register dump:\n"); - printk(KERN_ERR "\tAddress Low 0x%08x\n", - mv64x60_read(&bh, MV64360_SRAM_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress High 0x%08x\n", - mv64x60_read(&bh, MV64360_SRAM_ERR_ADDR_HI)); - printk(KERN_ERR "\tData Low 0x%08x\n", - mv64x60_read(&bh, MV64360_SRAM_ERR_DATA_LO)); - printk(KERN_ERR "\tData High 0x%08x\n", - mv64x60_read(&bh, MV64360_SRAM_ERR_DATA_HI)); - printk(KERN_ERR "\tParity 0x%08x\n", - mv64x60_read(&bh, MV64360_SRAM_ERR_PARITY)); - mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0); - return IRQ_HANDLED; -} - -static irqreturn_t -mv64360_pci_error_int_handler(int irq, void *dev_id) -{ - u32 val; - unsigned int pci_bus = (unsigned int)dev_id; - - if (pci_bus == 0) { /* Error on PCI 0 */ - val = mv64x60_read(&bh, MV64x60_PCI0_ERR_CAUSE); - printk(KERN_ERR "%s: Error in PCI %d Interface\n", - "mv64360_pci_error_int_handler", pci_bus); - printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus); - printk(KERN_ERR "\tCause register 0x%08x\n", val); - printk(KERN_ERR "\tAddress Low 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress High 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_HI)); - printk(KERN_ERR "\tAttribute 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_DATA_LO)); - printk(KERN_ERR "\tCommand 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI0_ERR_CMD)); - mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, ~val); - } - if (pci_bus == 1) { /* Error on PCI 1 */ - val = mv64x60_read(&bh, MV64x60_PCI1_ERR_CAUSE); - printk(KERN_ERR "%s: Error in PCI %d Interface\n", - "mv64360_pci_error_int_handler", pci_bus); - printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus); - printk(KERN_ERR "\tCause register 0x%08x\n", val); - printk(KERN_ERR "\tAddress Low 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_LO)); - printk(KERN_ERR "\tAddress High 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_HI)); - printk(KERN_ERR "\tAttribute 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_DATA_LO)); - printk(KERN_ERR "\tCommand 0x%08x\n", - mv64x60_read(&bh, MV64x60_PCI1_ERR_CMD)); - mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, ~val); - } - return IRQ_HANDLED; -} - -/* - * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of - * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as - * well. IOW, don't set bit 0. - */ -#define MV64360_PCI0_ERR_MASK_VAL 0x00a50c24 - -static int __init -mv64360_register_hdlrs(void) -{ - int rc; - - /* Clear old errors and register CPU interface error intr handler */ - mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0); - if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base, - mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, NULL))) - printk(KERN_WARNING "Can't register cpu error handler: %d", rc); - - mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0x000000ff); - - /* Clear old errors and register internal SRAM error intr handler */ - mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0); - if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base, - mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, NULL))) - printk(KERN_WARNING "Can't register SRAM error handler: %d",rc); - - /* Clear old errors and register PCI 0 error intr handler */ - mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0); - if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base, - mv64360_pci_error_int_handler, - IRQF_DISABLED, PCI0_INTR_STR, (void *)0))) - printk(KERN_WARNING "Can't register pci 0 error handler: %d", - rc); - - mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL); - - /* Erratum FEr PCI-#16 says to clear bit 0 of PCI SERRn Mask reg. */ - mv64x60_write(&bh, MV64x60_PCI0_ERR_SERR_MASK, - mv64x60_read(&bh, MV64x60_PCI0_ERR_SERR_MASK) & ~0x1UL); - - /* Clear old errors and register PCI 1 error intr handler */ - mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0); - if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base, - mv64360_pci_error_int_handler, - IRQF_DISABLED, PCI1_INTR_STR, (void *)1))) - printk(KERN_WARNING "Can't register pci 1 error handler: %d", - rc); - - mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0); - mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL); - - /* Erratum FEr PCI-#16 says to clear bit 0 of PCI Intr Mask reg. */ - mv64x60_write(&bh, MV64x60_PCI1_ERR_SERR_MASK, - mv64x60_read(&bh, MV64x60_PCI1_ERR_SERR_MASK) & ~0x1UL); - - return 0; -} - -arch_initcall(mv64360_register_hdlrs); diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c deleted file mode 100644 index 418f3053de529274fb996fc61c731a8ee2efa1a2..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mv64x60.c +++ /dev/null @@ -1,2485 +0,0 @@ -/* - * Common routines for the Marvell/Galileo Discovery line of host bridges - * (gt64260, mv64360, mv64460, ...). - * - * Author: Mark A. Greer - * - * 2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - - -u8 mv64x60_pci_exclude_bridge = 1; -DEFINE_SPINLOCK(mv64x60_lock); - -static phys_addr_t mv64x60_bridge_pbase; -static void __iomem *mv64x60_bridge_vbase; -static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID; -static u32 mv64x60_bridge_rev; -#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) -static struct pci_controller sysfs_hose_a; -#endif - -static u32 gt64260_translate_size(u32 base, u32 size, u32 num_bits); -static u32 gt64260_untranslate_size(u32 base, u32 size, u32 num_bits); -static void gt64260_set_pci2mem_window(struct pci_controller *hose, u32 bus, - u32 window, u32 base); -static void gt64260_set_pci2regs_window(struct mv64x60_handle *bh, - struct pci_controller *hose, u32 bus, u32 base); -static u32 gt64260_is_enabled_32bit(struct mv64x60_handle *bh, u32 window); -static void gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window); -static void gt64260_disable_window_32bit(struct mv64x60_handle *bh, u32 window); -static void gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window); -static void gt64260_disable_window_64bit(struct mv64x60_handle *bh, u32 window); -static void gt64260_disable_all_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); -static void gt64260a_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); -static void gt64260b_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); - -static u32 mv64360_translate_size(u32 base, u32 size, u32 num_bits); -static u32 mv64360_untranslate_size(u32 base, u32 size, u32 num_bits); -static void mv64360_set_pci2mem_window(struct pci_controller *hose, u32 bus, - u32 window, u32 base); -static void mv64360_set_pci2regs_window(struct mv64x60_handle *bh, - struct pci_controller *hose, u32 bus, u32 base); -static u32 mv64360_is_enabled_32bit(struct mv64x60_handle *bh, u32 window); -static void mv64360_enable_window_32bit(struct mv64x60_handle *bh, u32 window); -static void mv64360_disable_window_32bit(struct mv64x60_handle *bh, u32 window); -static void mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window); -static void mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window); -static void mv64360_disable_all_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); -static void mv64360_config_io2mem_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si, - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]); -static void mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base); -static void mv64360_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); -static void mv64460_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si); - - -/* - * Define tables that have the chip-specific info for each type of - * Marvell bridge chip. - */ -static struct mv64x60_chip_info gt64260a_ci __initdata = { /* GT64260A */ - .translate_size = gt64260_translate_size, - .untranslate_size = gt64260_untranslate_size, - .set_pci2mem_window = gt64260_set_pci2mem_window, - .set_pci2regs_window = gt64260_set_pci2regs_window, - .is_enabled_32bit = gt64260_is_enabled_32bit, - .enable_window_32bit = gt64260_enable_window_32bit, - .disable_window_32bit = gt64260_disable_window_32bit, - .enable_window_64bit = gt64260_enable_window_64bit, - .disable_window_64bit = gt64260_disable_window_64bit, - .disable_all_windows = gt64260_disable_all_windows, - .chip_specific_init = gt64260a_chip_specific_init, - .window_tab_32bit = gt64260_32bit_windows, - .window_tab_64bit = gt64260_64bit_windows, -}; - -static struct mv64x60_chip_info gt64260b_ci __initdata = { /* GT64260B */ - .translate_size = gt64260_translate_size, - .untranslate_size = gt64260_untranslate_size, - .set_pci2mem_window = gt64260_set_pci2mem_window, - .set_pci2regs_window = gt64260_set_pci2regs_window, - .is_enabled_32bit = gt64260_is_enabled_32bit, - .enable_window_32bit = gt64260_enable_window_32bit, - .disable_window_32bit = gt64260_disable_window_32bit, - .enable_window_64bit = gt64260_enable_window_64bit, - .disable_window_64bit = gt64260_disable_window_64bit, - .disable_all_windows = gt64260_disable_all_windows, - .chip_specific_init = gt64260b_chip_specific_init, - .window_tab_32bit = gt64260_32bit_windows, - .window_tab_64bit = gt64260_64bit_windows, -}; - -static struct mv64x60_chip_info mv64360_ci __initdata = { /* MV64360 */ - .translate_size = mv64360_translate_size, - .untranslate_size = mv64360_untranslate_size, - .set_pci2mem_window = mv64360_set_pci2mem_window, - .set_pci2regs_window = mv64360_set_pci2regs_window, - .is_enabled_32bit = mv64360_is_enabled_32bit, - .enable_window_32bit = mv64360_enable_window_32bit, - .disable_window_32bit = mv64360_disable_window_32bit, - .enable_window_64bit = mv64360_enable_window_64bit, - .disable_window_64bit = mv64360_disable_window_64bit, - .disable_all_windows = mv64360_disable_all_windows, - .config_io2mem_windows = mv64360_config_io2mem_windows, - .set_mpsc2regs_window = mv64360_set_mpsc2regs_window, - .chip_specific_init = mv64360_chip_specific_init, - .window_tab_32bit = mv64360_32bit_windows, - .window_tab_64bit = mv64360_64bit_windows, -}; - -static struct mv64x60_chip_info mv64460_ci __initdata = { /* MV64460 */ - .translate_size = mv64360_translate_size, - .untranslate_size = mv64360_untranslate_size, - .set_pci2mem_window = mv64360_set_pci2mem_window, - .set_pci2regs_window = mv64360_set_pci2regs_window, - .is_enabled_32bit = mv64360_is_enabled_32bit, - .enable_window_32bit = mv64360_enable_window_32bit, - .disable_window_32bit = mv64360_disable_window_32bit, - .enable_window_64bit = mv64360_enable_window_64bit, - .disable_window_64bit = mv64360_disable_window_64bit, - .disable_all_windows = mv64360_disable_all_windows, - .config_io2mem_windows = mv64360_config_io2mem_windows, - .set_mpsc2regs_window = mv64360_set_mpsc2regs_window, - .chip_specific_init = mv64460_chip_specific_init, - .window_tab_32bit = mv64360_32bit_windows, - .window_tab_64bit = mv64360_64bit_windows, -}; - -/* - ***************************************************************************** - * - * Platform Device Definitions - * - ***************************************************************************** - */ -#ifdef CONFIG_SERIAL_MPSC -static struct mpsc_shared_pdata mv64x60_mpsc_shared_pdata = { - .mrr_val = 0x3ffffe38, - .rcrr_val = 0, - .tcrr_val = 0, - .intr_cause_val = 0, - .intr_mask_val = 0, -}; - -static struct resource mv64x60_mpsc_shared_resources[] = { - /* Do not change the order of the IORESOURCE_MEM resources */ - [0] = { - .name = "mpsc routing base", - .start = MV64x60_MPSC_ROUTING_OFFSET, - .end = MV64x60_MPSC_ROUTING_OFFSET + - MPSC_ROUTING_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .name = "sdma intr base", - .start = MV64x60_SDMA_INTR_OFFSET, - .end = MV64x60_SDMA_INTR_OFFSET + - MPSC_SDMA_INTR_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device mpsc_shared_device = { /* Shared device */ - .name = MPSC_SHARED_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_mpsc_shared_resources), - .resource = mv64x60_mpsc_shared_resources, - .dev = { - .platform_data = &mv64x60_mpsc_shared_pdata, - }, -}; - -static struct mpsc_pdata mv64x60_mpsc0_pdata = { - .mirror_regs = 0, - .cache_mgmt = 0, - .max_idle = 0, - .default_baud = 9600, - .default_bits = 8, - .default_parity = 'n', - .default_flow = 'n', - .chr_1_val = 0x00000000, - .chr_2_val = 0x00000000, - .chr_10_val = 0x00000003, - .mpcr_val = 0, - .bcr_val = 0, - .brg_can_tune = 0, - .brg_clk_src = 8, /* Default to TCLK */ - .brg_clk_freq = 100000000, /* Default to 100 MHz */ -}; - -static struct resource mv64x60_mpsc0_resources[] = { - /* Do not change the order of the IORESOURCE_MEM resources */ - [0] = { - .name = "mpsc 0 base", - .start = MV64x60_MPSC_0_OFFSET, - .end = MV64x60_MPSC_0_OFFSET + MPSC_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .name = "sdma 0 base", - .start = MV64x60_SDMA_0_OFFSET, - .end = MV64x60_SDMA_0_OFFSET + MPSC_SDMA_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .name = "brg 0 base", - .start = MV64x60_BRG_0_OFFSET, - .end = MV64x60_BRG_0_OFFSET + MPSC_BRG_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [3] = { - .name = "sdma 0 irq", - .start = MV64x60_IRQ_SDMA_0, - .end = MV64x60_IRQ_SDMA_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mpsc0_device = { - .name = MPSC_CTLR_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_mpsc0_resources), - .resource = mv64x60_mpsc0_resources, - .dev = { - .platform_data = &mv64x60_mpsc0_pdata, - }, -}; - -static struct mpsc_pdata mv64x60_mpsc1_pdata = { - .mirror_regs = 0, - .cache_mgmt = 0, - .max_idle = 0, - .default_baud = 9600, - .default_bits = 8, - .default_parity = 'n', - .default_flow = 'n', - .chr_1_val = 0x00000000, - .chr_1_val = 0x00000000, - .chr_2_val = 0x00000000, - .chr_10_val = 0x00000003, - .mpcr_val = 0, - .bcr_val = 0, - .brg_can_tune = 0, - .brg_clk_src = 8, /* Default to TCLK */ - .brg_clk_freq = 100000000, /* Default to 100 MHz */ -}; - -static struct resource mv64x60_mpsc1_resources[] = { - /* Do not change the order of the IORESOURCE_MEM resources */ - [0] = { - .name = "mpsc 1 base", - .start = MV64x60_MPSC_1_OFFSET, - .end = MV64x60_MPSC_1_OFFSET + MPSC_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .name = "sdma 1 base", - .start = MV64x60_SDMA_1_OFFSET, - .end = MV64x60_SDMA_1_OFFSET + MPSC_SDMA_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .name = "brg 1 base", - .start = MV64x60_BRG_1_OFFSET, - .end = MV64x60_BRG_1_OFFSET + MPSC_BRG_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [3] = { - .name = "sdma 1 irq", - .start = MV64360_IRQ_SDMA_1, - .end = MV64360_IRQ_SDMA_1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device mpsc1_device = { - .name = MPSC_CTLR_NAME, - .id = 1, - .num_resources = ARRAY_SIZE(mv64x60_mpsc1_resources), - .resource = mv64x60_mpsc1_resources, - .dev = { - .platform_data = &mv64x60_mpsc1_pdata, - }, -}; -#endif - -#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) -static struct resource mv64x60_eth_shared_resources[] = { - [0] = { - .name = "ethernet shared base", - .start = MV643XX_ETH_SHARED_REGS, - .end = MV643XX_ETH_SHARED_REGS + - MV643XX_ETH_SHARED_REGS_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device mv64x60_eth_shared_device = { - .name = MV643XX_ETH_SHARED_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_eth_shared_resources), - .resource = mv64x60_eth_shared_resources, -}; - -#ifdef CONFIG_MV643XX_ETH_0 -static struct resource mv64x60_eth0_resources[] = { - [0] = { - .name = "eth0 irq", - .start = MV64x60_IRQ_ETH_0, - .end = MV64x60_IRQ_ETH_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth0_pd = { - .shared = &mv64x60_eth_shared_device; - .port_number = 0, -}; - -static struct platform_device eth0_device = { - .name = MV643XX_ETH_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), - .resource = mv64x60_eth0_resources, - .dev = { - .platform_data = ð0_pd, - }, -}; -#endif - -#ifdef CONFIG_MV643XX_ETH_1 -static struct resource mv64x60_eth1_resources[] = { - [0] = { - .name = "eth1 irq", - .start = MV64x60_IRQ_ETH_1, - .end = MV64x60_IRQ_ETH_1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth1_pd = { - .shared = &mv64x60_eth_shared_device; - .port_number = 1, -}; - -static struct platform_device eth1_device = { - .name = MV643XX_ETH_NAME, - .id = 1, - .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), - .resource = mv64x60_eth1_resources, - .dev = { - .platform_data = ð1_pd, - }, -}; -#endif - -#ifdef CONFIG_MV643XX_ETH_2 -static struct resource mv64x60_eth2_resources[] = { - [0] = { - .name = "eth2 irq", - .start = MV64x60_IRQ_ETH_2, - .end = MV64x60_IRQ_ETH_2, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mv643xx_eth_platform_data eth2_pd = { - .shared = &mv64x60_eth_shared_device; - .port_number = 2, -}; - -static struct platform_device eth2_device = { - .name = MV643XX_ETH_NAME, - .id = 2, - .num_resources = ARRAY_SIZE(mv64x60_eth2_resources), - .resource = mv64x60_eth2_resources, - .dev = { - .platform_data = ð2_pd, - }, -}; -#endif -#endif - -#ifdef CONFIG_I2C_MV64XXX -static struct mv64xxx_i2c_pdata mv64xxx_i2c_pdata = { - .freq_m = 8, - .freq_n = 3, - .timeout = 1000, /* Default timeout of 1 second */ -}; - -static struct resource mv64xxx_i2c_resources[] = { - /* Do not change the order of the IORESOURCE_MEM resources */ - [0] = { - .name = "mv64xxx i2c base", - .start = MV64XXX_I2C_OFFSET, - .end = MV64XXX_I2C_OFFSET + MV64XXX_I2C_REG_BLOCK_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .name = "mv64xxx i2c irq", - .start = MV64x60_IRQ_I2C, - .end = MV64x60_IRQ_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device i2c_device = { - .name = MV64XXX_I2C_CTLR_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64xxx_i2c_resources), - .resource = mv64xxx_i2c_resources, - .dev = { - .platform_data = &mv64xxx_i2c_pdata, - }, -}; -#endif - -#ifdef CONFIG_WATCHDOG -static struct mv64x60_wdt_pdata mv64x60_wdt_pdata = { - .timeout = 10, /* default watchdog expiry in seconds */ - .bus_clk = 133, /* default bus clock in MHz */ -}; - -static struct resource mv64x60_wdt_resources[] = { - [0] = { - .name = "mv64x60 wdt base", - .start = MV64x60_WDT_WDC, - .end = MV64x60_WDT_WDC + 8 - 1, /* two 32-bit registers */ - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device wdt_device = { - .name = MV64x60_WDT_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv64x60_wdt_resources), - .resource = mv64x60_wdt_resources, - .dev = { - .platform_data = &mv64x60_wdt_pdata, - }, -}; -#endif - -#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) -static struct mv64xxx_pdata mv64xxx_pdata = { - .hs_reg_valid = 0, -}; - -static struct platform_device mv64xxx_device = { /* general mv64x60 stuff */ - .name = MV64XXX_DEV_NAME, - .id = 0, - .dev = { - .platform_data = &mv64xxx_pdata, - }, -}; -#endif - -static struct platform_device *mv64x60_pd_devs[] __initdata = { -#ifdef CONFIG_SERIAL_MPSC - &mpsc_shared_device, - &mpsc0_device, - &mpsc1_device, -#endif -#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) - &mv64x60_eth_shared_device, -#endif -#ifdef CONFIG_MV643XX_ETH_0 - ð0_device, -#endif -#ifdef CONFIG_MV643XX_ETH_1 - ð1_device, -#endif -#ifdef CONFIG_MV643XX_ETH_2 - ð2_device, -#endif -#ifdef CONFIG_I2C_MV64XXX - &i2c_device, -#endif -#ifdef CONFIG_MV64X60_WDT - &wdt_device, -#endif -#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) - &mv64xxx_device, -#endif -}; - -/* - ***************************************************************************** - * - * Bridge Initialization Routines - * - ***************************************************************************** - */ -/* - * mv64x60_init() - * - * Initialize the bridge based on setting passed in via 'si'. The bridge - * handle, 'bh', will be set so that it can be used to make subsequent - * calls to routines in this file. - */ -int __init -mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si) -{ - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]; - - if (ppc_md.progress) - ppc_md.progress("mv64x60 initialization", 0x0); - - spin_lock_init(&mv64x60_lock); - mv64x60_early_init(bh, si); - - if (mv64x60_get_type(bh) || mv64x60_setup_for_chip(bh)) { - iounmap(bh->v_base); - bh->v_base = 0; - if (ppc_md.progress) - ppc_md.progress("mv64x60_init: Can't determine chip",0); - return -1; - } - - bh->ci->disable_all_windows(bh, si); - mv64x60_get_mem_windows(bh, mem_windows); - mv64x60_config_cpu2mem_windows(bh, si, mem_windows); - - if (bh->ci->config_io2mem_windows) - bh->ci->config_io2mem_windows(bh, si, mem_windows); - if (bh->ci->set_mpsc2regs_window) - bh->ci->set_mpsc2regs_window(bh, si->phys_reg_base); - - if (si->pci_1.enable_bus) { - bh->io_base_b = (u32)ioremap(si->pci_1.pci_io.cpu_base, - si->pci_1.pci_io.size); - isa_io_base = bh->io_base_b; - } - - if (si->pci_0.enable_bus) { - bh->io_base_a = (u32)ioremap(si->pci_0.pci_io.cpu_base, - si->pci_0.pci_io.size); - isa_io_base = bh->io_base_a; - - mv64x60_alloc_hose(bh, MV64x60_PCI0_CONFIG_ADDR, - MV64x60_PCI0_CONFIG_DATA, &bh->hose_a); - mv64x60_config_resources(bh->hose_a, &si->pci_0, bh->io_base_a); - mv64x60_config_pci_params(bh->hose_a, &si->pci_0); - - mv64x60_config_cpu2pci_windows(bh, &si->pci_0, 0); - mv64x60_config_pci2mem_windows(bh, bh->hose_a, &si->pci_0, 0, - mem_windows); - bh->ci->set_pci2regs_window(bh, bh->hose_a, 0, - si->phys_reg_base); - } - - if (si->pci_1.enable_bus) { - mv64x60_alloc_hose(bh, MV64x60_PCI1_CONFIG_ADDR, - MV64x60_PCI1_CONFIG_DATA, &bh->hose_b); - mv64x60_config_resources(bh->hose_b, &si->pci_1, bh->io_base_b); - mv64x60_config_pci_params(bh->hose_b, &si->pci_1); - - mv64x60_config_cpu2pci_windows(bh, &si->pci_1, 1); - mv64x60_config_pci2mem_windows(bh, bh->hose_b, &si->pci_1, 1, - mem_windows); - bh->ci->set_pci2regs_window(bh, bh->hose_b, 1, - si->phys_reg_base); - } - - bh->ci->chip_specific_init(bh, si); - mv64x60_pd_fixup(bh, mv64x60_pd_devs, ARRAY_SIZE(mv64x60_pd_devs)); - - return 0; -} - -/* - * mv64x60_early_init() - * - * Do some bridge work that must take place before we start messing with - * the bridge for real. - */ -void __init -mv64x60_early_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si) -{ - struct pci_controller hose_a, hose_b; - - memset(bh, 0, sizeof(*bh)); - - bh->p_base = si->phys_reg_base; - bh->v_base = ioremap(bh->p_base, MV64x60_INTERNAL_SPACE_SIZE); - - mv64x60_bridge_pbase = bh->p_base; - mv64x60_bridge_vbase = bh->v_base; - - /* Assuming pci mode [reserved] bits 4:5 on 64260 are 0 */ - bh->pci_mode_a = mv64x60_read(bh, MV64x60_PCI0_MODE) & - MV64x60_PCIMODE_MASK; - bh->pci_mode_b = mv64x60_read(bh, MV64x60_PCI1_MODE) & - MV64x60_PCIMODE_MASK; - - /* Need temporary hose structs to call mv64x60_set_bus() */ - memset(&hose_a, 0, sizeof(hose_a)); - memset(&hose_b, 0, sizeof(hose_b)); - setup_indirect_pci_nomap(&hose_a, bh->v_base + MV64x60_PCI0_CONFIG_ADDR, - bh->v_base + MV64x60_PCI0_CONFIG_DATA); - setup_indirect_pci_nomap(&hose_b, bh->v_base + MV64x60_PCI1_CONFIG_ADDR, - bh->v_base + MV64x60_PCI1_CONFIG_DATA); - bh->hose_a = &hose_a; - bh->hose_b = &hose_b; - -#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) - /* Save a copy of hose_a for sysfs functions -- hack */ - memcpy(&sysfs_hose_a, &hose_a, sizeof(hose_a)); -#endif - - mv64x60_set_bus(bh, 0, 0); - mv64x60_set_bus(bh, 1, 0); - - bh->hose_a = NULL; - bh->hose_b = NULL; - - /* Clear bit 0 of PCI addr decode control so PCI->CPU remap 1:1 */ - mv64x60_clr_bits(bh, MV64x60_PCI0_PCI_DECODE_CNTL, 0x00000001); - mv64x60_clr_bits(bh, MV64x60_PCI1_PCI_DECODE_CNTL, 0x00000001); - - /* Bit 12 MUST be 0; set bit 27--don't auto-update cpu remap regs */ - mv64x60_clr_bits(bh, MV64x60_CPU_CONFIG, (1<<12)); - mv64x60_set_bits(bh, MV64x60_CPU_CONFIG, (1<<27)); - - mv64x60_set_bits(bh, MV64x60_PCI0_TO_RETRY, 0xffff); - mv64x60_set_bits(bh, MV64x60_PCI1_TO_RETRY, 0xffff); -} - -/* - ***************************************************************************** - * - * Window Config Routines - * - ***************************************************************************** - */ -/* - * mv64x60_get_32bit_window() - * - * Determine the base address and size of a 32-bit window on the bridge. - */ -void __init -mv64x60_get_32bit_window(struct mv64x60_handle *bh, u32 window, - u32 *base, u32 *size) -{ - u32 val, base_reg, size_reg, base_bits, size_bits; - u32 (*get_from_field)(u32 val, u32 num_bits); - - base_reg = bh->ci->window_tab_32bit[window].base_reg; - - if (base_reg != 0) { - size_reg = bh->ci->window_tab_32bit[window].size_reg; - base_bits = bh->ci->window_tab_32bit[window].base_bits; - size_bits = bh->ci->window_tab_32bit[window].size_bits; - get_from_field= bh->ci->window_tab_32bit[window].get_from_field; - - val = mv64x60_read(bh, base_reg); - *base = get_from_field(val, base_bits); - - if (size_reg != 0) { - val = mv64x60_read(bh, size_reg); - val = get_from_field(val, size_bits); - *size = bh->ci->untranslate_size(*base, val, size_bits); - } else - *size = 0; - } else { - *base = 0; - *size = 0; - } - - pr_debug("get 32bit window: %d, base: 0x%x, size: 0x%x\n", - window, *base, *size); -} - -/* - * mv64x60_set_32bit_window() - * - * Set the base address and size of a 32-bit window on the bridge. - */ -void __init -mv64x60_set_32bit_window(struct mv64x60_handle *bh, u32 window, - u32 base, u32 size, u32 other_bits) -{ - u32 val, base_reg, size_reg, base_bits, size_bits; - u32 (*map_to_field)(u32 val, u32 num_bits); - - pr_debug("set 32bit window: %d, base: 0x%x, size: 0x%x, other: 0x%x\n", - window, base, size, other_bits); - - base_reg = bh->ci->window_tab_32bit[window].base_reg; - - if (base_reg != 0) { - size_reg = bh->ci->window_tab_32bit[window].size_reg; - base_bits = bh->ci->window_tab_32bit[window].base_bits; - size_bits = bh->ci->window_tab_32bit[window].size_bits; - map_to_field = bh->ci->window_tab_32bit[window].map_to_field; - - val = map_to_field(base, base_bits) | other_bits; - mv64x60_write(bh, base_reg, val); - - if (size_reg != 0) { - val = bh->ci->translate_size(base, size, size_bits); - val = map_to_field(val, size_bits); - mv64x60_write(bh, size_reg, val); - } - - (void)mv64x60_read(bh, base_reg); /* Flush FIFO */ - } -} - -/* - * mv64x60_get_64bit_window() - * - * Determine the base address and size of a 64-bit window on the bridge. - */ -void __init -mv64x60_get_64bit_window(struct mv64x60_handle *bh, u32 window, - u32 *base_hi, u32 *base_lo, u32 *size) -{ - u32 val, base_lo_reg, size_reg, base_lo_bits, size_bits; - u32 (*get_from_field)(u32 val, u32 num_bits); - - base_lo_reg = bh->ci->window_tab_64bit[window].base_lo_reg; - - if (base_lo_reg != 0) { - size_reg = bh->ci->window_tab_64bit[window].size_reg; - base_lo_bits = bh->ci->window_tab_64bit[window].base_lo_bits; - size_bits = bh->ci->window_tab_64bit[window].size_bits; - get_from_field= bh->ci->window_tab_64bit[window].get_from_field; - - *base_hi = mv64x60_read(bh, - bh->ci->window_tab_64bit[window].base_hi_reg); - - val = mv64x60_read(bh, base_lo_reg); - *base_lo = get_from_field(val, base_lo_bits); - - if (size_reg != 0) { - val = mv64x60_read(bh, size_reg); - val = get_from_field(val, size_bits); - *size = bh->ci->untranslate_size(*base_lo, val, - size_bits); - } else - *size = 0; - } else { - *base_hi = 0; - *base_lo = 0; - *size = 0; - } - - pr_debug("get 64bit window: %d, base hi: 0x%x, base lo: 0x%x, " - "size: 0x%x\n", window, *base_hi, *base_lo, *size); -} - -/* - * mv64x60_set_64bit_window() - * - * Set the base address and size of a 64-bit window on the bridge. - */ -void __init -mv64x60_set_64bit_window(struct mv64x60_handle *bh, u32 window, - u32 base_hi, u32 base_lo, u32 size, u32 other_bits) -{ - u32 val, base_lo_reg, size_reg, base_lo_bits, size_bits; - u32 (*map_to_field)(u32 val, u32 num_bits); - - pr_debug("set 64bit window: %d, base hi: 0x%x, base lo: 0x%x, " - "size: 0x%x, other: 0x%x\n", - window, base_hi, base_lo, size, other_bits); - - base_lo_reg = bh->ci->window_tab_64bit[window].base_lo_reg; - - if (base_lo_reg != 0) { - size_reg = bh->ci->window_tab_64bit[window].size_reg; - base_lo_bits = bh->ci->window_tab_64bit[window].base_lo_bits; - size_bits = bh->ci->window_tab_64bit[window].size_bits; - map_to_field = bh->ci->window_tab_64bit[window].map_to_field; - - mv64x60_write(bh, bh->ci->window_tab_64bit[window].base_hi_reg, - base_hi); - - val = map_to_field(base_lo, base_lo_bits) | other_bits; - mv64x60_write(bh, base_lo_reg, val); - - if (size_reg != 0) { - val = bh->ci->translate_size(base_lo, size, size_bits); - val = map_to_field(val, size_bits); - mv64x60_write(bh, size_reg, val); - } - - (void)mv64x60_read(bh, base_lo_reg); /* Flush FIFO */ - } -} - -/* - * mv64x60_mask() - * - * Take the high-order 'num_bits' of 'val' & mask off low bits. - */ -u32 __init -mv64x60_mask(u32 val, u32 num_bits) -{ - return val & (0xffffffff << (32 - num_bits)); -} - -/* - * mv64x60_shift_left() - * - * Take the low-order 'num_bits' of 'val', shift left to align at bit 31 (MSB). - */ -u32 __init -mv64x60_shift_left(u32 val, u32 num_bits) -{ - return val << (32 - num_bits); -} - -/* - * mv64x60_shift_right() - * - * Take the high-order 'num_bits' of 'val', shift right to align at bit 0 (LSB). - */ -u32 __init -mv64x60_shift_right(u32 val, u32 num_bits) -{ - return val >> (32 - num_bits); -} - -/* - ***************************************************************************** - * - * Chip Identification Routines - * - ***************************************************************************** - */ -/* - * mv64x60_get_type() - * - * Determine the type of bridge chip we have. - */ -int __init -mv64x60_get_type(struct mv64x60_handle *bh) -{ - struct pci_controller hose; - u16 val; - u8 save_exclude; - - memset(&hose, 0, sizeof(hose)); - setup_indirect_pci_nomap(&hose, bh->v_base + MV64x60_PCI0_CONFIG_ADDR, - bh->v_base + MV64x60_PCI0_CONFIG_DATA); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - /* Sanity check of bridge's Vendor ID */ - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID, &val); - - if (val != PCI_VENDOR_ID_MARVELL) { - mv64x60_pci_exclude_bridge = save_exclude; - return -1; - } - - /* Get the revision of the chip */ - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_CLASS_REVISION, - &val); - bh->rev = (u32)(val & 0xff); - - /* Figure out the type of Marvell bridge it is */ - early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &val); - mv64x60_pci_exclude_bridge = save_exclude; - - switch (val) { - case PCI_DEVICE_ID_MARVELL_GT64260: - switch (bh->rev) { - case GT64260_REV_A: - bh->type = MV64x60_TYPE_GT64260A; - break; - - default: - printk(KERN_WARNING "Unsupported GT64260 rev %04x\n", - bh->rev); - /* Assume its similar to a 'B' rev and fallthru */ - case GT64260_REV_B: - bh->type = MV64x60_TYPE_GT64260B; - break; - } - break; - - case PCI_DEVICE_ID_MARVELL_MV64360: - /* Marvell won't tell me how to distinguish a 64361 & 64362 */ - bh->type = MV64x60_TYPE_MV64360; - break; - - case PCI_DEVICE_ID_MARVELL_MV64460: - bh->type = MV64x60_TYPE_MV64460; - break; - - default: - printk(KERN_ERR "Unknown Marvell bridge type %04x\n", val); - return -1; - } - - /* Hang onto bridge type & rev for PIC code */ - mv64x60_bridge_type = bh->type; - mv64x60_bridge_rev = bh->rev; - - return 0; -} - -/* - * mv64x60_setup_for_chip() - * - * Set 'bh' to use the proper set of routine for the bridge chip that we have. - */ -int __init -mv64x60_setup_for_chip(struct mv64x60_handle *bh) -{ - int rc = 0; - - /* Set up chip-specific info based on the chip/bridge type */ - switch(bh->type) { - case MV64x60_TYPE_GT64260A: - bh->ci = >64260a_ci; - break; - - case MV64x60_TYPE_GT64260B: - bh->ci = >64260b_ci; - break; - - case MV64x60_TYPE_MV64360: - bh->ci = &mv64360_ci; - break; - - case MV64x60_TYPE_MV64460: - bh->ci = &mv64460_ci; - break; - - case MV64x60_TYPE_INVALID: - default: - if (ppc_md.progress) - ppc_md.progress("mv64x60: Unsupported bridge", 0x0); - printk(KERN_ERR "mv64x60: Unsupported bridge\n"); - rc = -1; - } - - return rc; -} - -/* - * mv64x60_get_bridge_vbase() - * - * Return the virtual address of the bridge's registers. - */ -void __iomem * -mv64x60_get_bridge_vbase(void) -{ - return mv64x60_bridge_vbase; -} - -/* - * mv64x60_get_bridge_type() - * - * Return the type of bridge on the platform. - */ -u32 -mv64x60_get_bridge_type(void) -{ - return mv64x60_bridge_type; -} - -/* - * mv64x60_get_bridge_rev() - * - * Return the revision of the bridge on the platform. - */ -u32 -mv64x60_get_bridge_rev(void) -{ - return mv64x60_bridge_rev; -} - -/* - ***************************************************************************** - * - * System Memory Window Related Routines - * - ***************************************************************************** - */ -/* - * mv64x60_get_mem_size() - * - * Calculate the amount of memory that the memory controller is set up for. - * This should only be used by board-specific code if there is no other - * way to determine the amount of memory in the system. - */ -u32 __init -mv64x60_get_mem_size(u32 bridge_base, u32 chip_type) -{ - struct mv64x60_handle bh; - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]; - u32 rc = 0; - - memset(&bh, 0, sizeof(bh)); - - bh.type = chip_type; - bh.v_base = (void *)bridge_base; - - if (!mv64x60_setup_for_chip(&bh)) { - mv64x60_get_mem_windows(&bh, mem_windows); - rc = mv64x60_calc_mem_size(&bh, mem_windows); - } - - return rc; -} - -/* - * mv64x60_get_mem_windows() - * - * Get the values in the memory controller & return in the 'mem_windows' array. - */ -void __init -mv64x60_get_mem_windows(struct mv64x60_handle *bh, - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]) -{ - u32 i, win; - - for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++) - if (bh->ci->is_enabled_32bit(bh, win)) - mv64x60_get_32bit_window(bh, win, - &mem_windows[i][0], &mem_windows[i][1]); - else { - mem_windows[i][0] = 0; - mem_windows[i][1] = 0; - } -} - -/* - * mv64x60_calc_mem_size() - * - * Using the memory controller register values in 'mem_windows', determine - * how much memory it is set up for. - */ -u32 __init -mv64x60_calc_mem_size(struct mv64x60_handle *bh, - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]) -{ - u32 i, total = 0; - - for (i=0; iSystem MEM, PCI Config Routines - * - ***************************************************************************** - */ -/* - * mv64x60_config_cpu2mem_windows() - * - * Configure CPU->Memory windows on the bridge. - */ -static u32 prot_tab[] __initdata = { - MV64x60_CPU_PROT_0_WIN, MV64x60_CPU_PROT_1_WIN, - MV64x60_CPU_PROT_2_WIN, MV64x60_CPU_PROT_3_WIN -}; - -static u32 cpu_snoop_tab[] __initdata = { - MV64x60_CPU_SNOOP_0_WIN, MV64x60_CPU_SNOOP_1_WIN, - MV64x60_CPU_SNOOP_2_WIN, MV64x60_CPU_SNOOP_3_WIN -}; - -void __init -mv64x60_config_cpu2mem_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si, - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]) -{ - u32 i, win; - - /* Set CPU protection & snoop windows */ - for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++) - if (bh->ci->is_enabled_32bit(bh, win)) { - mv64x60_set_32bit_window(bh, prot_tab[i], - mem_windows[i][0], mem_windows[i][1], - si->cpu_prot_options[i]); - bh->ci->enable_window_32bit(bh, prot_tab[i]); - - if (bh->ci->window_tab_32bit[cpu_snoop_tab[i]]. - base_reg != 0) { - mv64x60_set_32bit_window(bh, cpu_snoop_tab[i], - mem_windows[i][0], mem_windows[i][1], - si->cpu_snoop_options[i]); - bh->ci->enable_window_32bit(bh, - cpu_snoop_tab[i]); - } - - } -} - -/* - * mv64x60_config_cpu2pci_windows() - * - * Configure the CPU->PCI windows for one of the PCI buses. - */ -static u32 win_tab[2][4] __initdata = { - { MV64x60_CPU2PCI0_IO_WIN, MV64x60_CPU2PCI0_MEM_0_WIN, - MV64x60_CPU2PCI0_MEM_1_WIN, MV64x60_CPU2PCI0_MEM_2_WIN }, - { MV64x60_CPU2PCI1_IO_WIN, MV64x60_CPU2PCI1_MEM_0_WIN, - MV64x60_CPU2PCI1_MEM_1_WIN, MV64x60_CPU2PCI1_MEM_2_WIN }, -}; - -static u32 remap_tab[2][4] __initdata = { - { MV64x60_CPU2PCI0_IO_REMAP_WIN, MV64x60_CPU2PCI0_MEM_0_REMAP_WIN, - MV64x60_CPU2PCI0_MEM_1_REMAP_WIN, MV64x60_CPU2PCI0_MEM_2_REMAP_WIN }, - { MV64x60_CPU2PCI1_IO_REMAP_WIN, MV64x60_CPU2PCI1_MEM_0_REMAP_WIN, - MV64x60_CPU2PCI1_MEM_1_REMAP_WIN, MV64x60_CPU2PCI1_MEM_2_REMAP_WIN } -}; - -void __init -mv64x60_config_cpu2pci_windows(struct mv64x60_handle *bh, - struct mv64x60_pci_info *pi, u32 bus) -{ - int i; - - if (pi->pci_io.size > 0) { - mv64x60_set_32bit_window(bh, win_tab[bus][0], - pi->pci_io.cpu_base, pi->pci_io.size, pi->pci_io.swap); - mv64x60_set_32bit_window(bh, remap_tab[bus][0], - pi->pci_io.pci_base_lo, 0, 0); - bh->ci->enable_window_32bit(bh, win_tab[bus][0]); - } else /* Actually, the window should already be disabled */ - bh->ci->disable_window_32bit(bh, win_tab[bus][0]); - - for (i=0; i<3; i++) - if (pi->pci_mem[i].size > 0) { - mv64x60_set_32bit_window(bh, win_tab[bus][i+1], - pi->pci_mem[i].cpu_base, pi->pci_mem[i].size, - pi->pci_mem[i].swap); - mv64x60_set_64bit_window(bh, remap_tab[bus][i+1], - pi->pci_mem[i].pci_base_hi, - pi->pci_mem[i].pci_base_lo, 0, 0); - bh->ci->enable_window_32bit(bh, win_tab[bus][i+1]); - } else /* Actually, the window should already be disabled */ - bh->ci->disable_window_32bit(bh, win_tab[bus][i+1]); -} - -/* - ***************************************************************************** - * - * PCI->System MEM Config Routines - * - ***************************************************************************** - */ -/* - * mv64x60_config_pci2mem_windows() - * - * Configure the PCI->Memory windows on the bridge. - */ -static u32 pci_acc_tab[2][4] __initdata = { - { MV64x60_PCI02MEM_ACC_CNTL_0_WIN, MV64x60_PCI02MEM_ACC_CNTL_1_WIN, - MV64x60_PCI02MEM_ACC_CNTL_2_WIN, MV64x60_PCI02MEM_ACC_CNTL_3_WIN }, - { MV64x60_PCI12MEM_ACC_CNTL_0_WIN, MV64x60_PCI12MEM_ACC_CNTL_1_WIN, - MV64x60_PCI12MEM_ACC_CNTL_2_WIN, MV64x60_PCI12MEM_ACC_CNTL_3_WIN } -}; - -static u32 pci_snoop_tab[2][4] __initdata = { - { MV64x60_PCI02MEM_SNOOP_0_WIN, MV64x60_PCI02MEM_SNOOP_1_WIN, - MV64x60_PCI02MEM_SNOOP_2_WIN, MV64x60_PCI02MEM_SNOOP_3_WIN }, - { MV64x60_PCI12MEM_SNOOP_0_WIN, MV64x60_PCI12MEM_SNOOP_1_WIN, - MV64x60_PCI12MEM_SNOOP_2_WIN, MV64x60_PCI12MEM_SNOOP_3_WIN } -}; - -static u32 pci_size_tab[2][4] __initdata = { - { MV64x60_PCI0_MEM_0_SIZE, MV64x60_PCI0_MEM_1_SIZE, - MV64x60_PCI0_MEM_2_SIZE, MV64x60_PCI0_MEM_3_SIZE }, - { MV64x60_PCI1_MEM_0_SIZE, MV64x60_PCI1_MEM_1_SIZE, - MV64x60_PCI1_MEM_2_SIZE, MV64x60_PCI1_MEM_3_SIZE } -}; - -void __init -mv64x60_config_pci2mem_windows(struct mv64x60_handle *bh, - struct pci_controller *hose, struct mv64x60_pci_info *pi, - u32 bus, u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]) -{ - u32 i, win; - - /* - * Set the access control, snoop, BAR size, and window base addresses. - * PCI->MEM windows base addresses will match exactly what the - * CPU->MEM windows are. - */ - for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++) - if (bh->ci->is_enabled_32bit(bh, win)) { - mv64x60_set_64bit_window(bh, - pci_acc_tab[bus][i], 0, - mem_windows[i][0], mem_windows[i][1], - pi->acc_cntl_options[i]); - bh->ci->enable_window_64bit(bh, pci_acc_tab[bus][i]); - - if (bh->ci->window_tab_64bit[ - pci_snoop_tab[bus][i]].base_lo_reg != 0) { - - mv64x60_set_64bit_window(bh, - pci_snoop_tab[bus][i], 0, - mem_windows[i][0], mem_windows[i][1], - pi->snoop_options[i]); - bh->ci->enable_window_64bit(bh, - pci_snoop_tab[bus][i]); - } - - bh->ci->set_pci2mem_window(hose, bus, i, - mem_windows[i][0]); - mv64x60_write(bh, pci_size_tab[bus][i], - mv64x60_mask(mem_windows[i][1] - 1, 20)); - - /* Enable the window */ - mv64x60_clr_bits(bh, ((bus == 0) ? - MV64x60_PCI0_BAR_ENABLE : - MV64x60_PCI1_BAR_ENABLE), (1 << i)); - } -} - -/* - ***************************************************************************** - * - * Hose & Resource Alloc/Init Routines - * - ***************************************************************************** - */ -/* - * mv64x60_alloc_hoses() - * - * Allocate the PCI hose structures for the bridge's PCI buses. - */ -void __init -mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr, u32 cfg_data, - struct pci_controller **hose) -{ - *hose = pcibios_alloc_controller(); - setup_indirect_pci_nomap(*hose, bh->v_base + cfg_addr, - bh->v_base + cfg_data); -} - -/* - * mv64x60_config_resources() - * - * Calculate the offsets, etc. for the hose structures to reflect all of - * the address remapping that happens as you go from CPU->PCI and PCI->MEM. - */ -void __init -mv64x60_config_resources(struct pci_controller *hose, - struct mv64x60_pci_info *pi, u32 io_base) -{ - int i; - /* 2 hoses; 4 resources/hose; string <= 64 bytes */ - static char s[2][4][64]; - - if (pi->pci_io.size != 0) { - sprintf(s[hose->index][0], "PCI hose %d I/O Space", - hose->index); - pci_init_resource(&hose->io_resource, io_base - isa_io_base, - io_base - isa_io_base + pi->pci_io.size - 1, - IORESOURCE_IO, s[hose->index][0]); - hose->io_space.start = pi->pci_io.pci_base_lo; - hose->io_space.end = pi->pci_io.pci_base_lo + pi->pci_io.size-1; - hose->io_base_phys = pi->pci_io.cpu_base; - hose->io_base_virt = (void *)isa_io_base; - } - - for (i=0; i<3; i++) - if (pi->pci_mem[i].size != 0) { - sprintf(s[hose->index][i+1], "PCI hose %d MEM Space %d", - hose->index, i); - pci_init_resource(&hose->mem_resources[i], - pi->pci_mem[i].cpu_base, - pi->pci_mem[i].cpu_base + pi->pci_mem[i].size-1, - IORESOURCE_MEM, s[hose->index][i+1]); - } - - hose->mem_space.end = pi->pci_mem[0].pci_base_lo + - pi->pci_mem[0].size - 1; - hose->pci_mem_offset = pi->pci_mem[0].cpu_base - - pi->pci_mem[0].pci_base_lo; -} - -/* - * mv64x60_config_pci_params() - * - * Configure a hose's PCI config space parameters. - */ -void __init -mv64x60_config_pci_params(struct pci_controller *hose, - struct mv64x60_pci_info *pi) -{ - u32 devfn; - u16 u16_val; - u8 save_exclude; - - devfn = PCI_DEVFN(0,0); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - - /* Set class code to indicate host bridge */ - u16_val = PCI_CLASS_BRIDGE_HOST; /* 0x0600 (host bridge) */ - early_write_config_word(hose, 0, devfn, PCI_CLASS_DEVICE, u16_val); - - /* Enable bridge to be PCI master & respond to PCI MEM cycles */ - early_read_config_word(hose, 0, devfn, PCI_COMMAND, &u16_val); - u16_val &= ~(PCI_COMMAND_IO | PCI_COMMAND_INVALIDATE | - PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK); - u16_val |= pi->pci_cmd_bits | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val); - - /* Set latency timer, cache line size, clear BIST */ - u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2); - early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val); - - mv64x60_pci_exclude_bridge = save_exclude; -} - -/* - ***************************************************************************** - * - * PCI Related Routine - * - ***************************************************************************** - */ -/* - * mv64x60_set_bus() - * - * Set the bus number for the hose directly under the bridge. - */ -void __init -mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus) -{ - struct pci_controller *hose; - u32 pci_mode, p2p_cfg, pci_cfg_offset, val; - u8 save_exclude; - - if (bus == 0) { - pci_mode = bh->pci_mode_a; - p2p_cfg = MV64x60_PCI0_P2P_CONFIG; - pci_cfg_offset = 0x64; - hose = bh->hose_a; - } else { - pci_mode = bh->pci_mode_b; - p2p_cfg = MV64x60_PCI1_P2P_CONFIG; - pci_cfg_offset = 0xe4; - hose = bh->hose_b; - } - - child_bus &= 0xff; - val = mv64x60_read(bh, p2p_cfg); - - if (pci_mode == MV64x60_PCIMODE_CONVENTIONAL) { - val &= 0xe0000000; /* Force dev num to 0, turn off P2P bridge */ - val |= (child_bus << 16) | 0xff; - mv64x60_write(bh, p2p_cfg, val); - (void)mv64x60_read(bh, p2p_cfg); /* Flush FIFO */ - } else { /* PCI-X */ - /* - * Need to use the current bus/dev number (that's in the - * P2P CONFIG reg) to access the bridge's pci config space. - */ - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(hose, (val & 0x00ff0000) >> 16, - PCI_DEVFN(((val & 0x1f000000) >> 24), 0), - pci_cfg_offset, child_bus << 8); - mv64x60_pci_exclude_bridge = save_exclude; - } -} - -/* - * mv64x60_pci_exclude_device() - * - * This routine is used to make the bridge not appear when the - * PCI subsystem is accessing PCI devices (in PCI config space). - */ -int -mv64x60_pci_exclude_device(u8 bus, u8 devfn) -{ - struct pci_controller *hose; - - hose = pci_bus_to_hose(bus); - - /* Skip slot 0 on both hoses */ - if ((mv64x60_pci_exclude_bridge == 1) && (PCI_SLOT(devfn) == 0) && - (hose->first_busno == bus)) - - return PCIBIOS_DEVICE_NOT_FOUND; - else - return PCIBIOS_SUCCESSFUL; -} /* mv64x60_pci_exclude_device() */ - -/* - ***************************************************************************** - * - * Platform Device Routines - * - ***************************************************************************** - */ - -/* - * mv64x60_pd_fixup() - * - * Need to add the base addr of where the bridge's regs are mapped in the - * physical addr space so drivers can ioremap() them. - */ -void __init -mv64x60_pd_fixup(struct mv64x60_handle *bh, struct platform_device *pd_devs[], - u32 entries) -{ - struct resource *r; - u32 i, j; - - for (i=0; istart += bh->p_base; - r->end += bh->p_base; - j++; - } - } -} - -/* - * mv64x60_add_pds() - * - * Add the mv64x60 platform devices to the list of platform devices. - */ -static int __init -mv64x60_add_pds(void) -{ - return platform_add_devices(mv64x60_pd_devs, - ARRAY_SIZE(mv64x60_pd_devs)); -} -arch_initcall(mv64x60_add_pds); - -/* - ***************************************************************************** - * - * GT64260-Specific Routines - * - ***************************************************************************** - */ -/* - * gt64260_translate_size() - * - * On the GT64260, the size register is really the "top" address of the window. - */ -static u32 __init -gt64260_translate_size(u32 base, u32 size, u32 num_bits) -{ - return base + mv64x60_mask(size - 1, num_bits); -} - -/* - * gt64260_untranslate_size() - * - * Translate the top address of a window into a window size. - */ -static u32 __init -gt64260_untranslate_size(u32 base, u32 size, u32 num_bits) -{ - if (size >= base) - size = size - base + (1 << (32 - num_bits)); - else - size = 0; - - return size; -} - -/* - * gt64260_set_pci2mem_window() - * - * The PCI->MEM window registers are actually in PCI config space so need - * to set them by setting the correct config space BARs. - */ -static u32 gt64260_reg_addrs[2][4] __initdata = { - { 0x10, 0x14, 0x18, 0x1c }, { 0x90, 0x94, 0x98, 0x9c } -}; - -static void __init -gt64260_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window, - u32 base) -{ - u8 save_exclude; - - pr_debug("set pci->mem window: %d, hose: %d, base: 0x%x\n", window, - hose->index, base); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(hose, 0, PCI_DEVFN(0, 0), - gt64260_reg_addrs[bus][window], mv64x60_mask(base, 20) | 0x8); - mv64x60_pci_exclude_bridge = save_exclude; -} - -/* - * gt64260_set_pci2regs_window() - * - * Set where the bridge's registers appear in PCI MEM space. - */ -static u32 gt64260_offset[2] __initdata = {0x20, 0xa0}; - -static void __init -gt64260_set_pci2regs_window(struct mv64x60_handle *bh, - struct pci_controller *hose, u32 bus, u32 base) -{ - u8 save_exclude; - - pr_debug("set pci->internal regs hose: %d, base: 0x%x\n", hose->index, - base); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(hose, 0, PCI_DEVFN(0,0), gt64260_offset[bus], - (base << 16)); - mv64x60_pci_exclude_bridge = save_exclude; -} - -/* - * gt64260_is_enabled_32bit() - * - * On a GT64260, a window is enabled iff its top address is >= to its base - * address. - */ -static u32 __init -gt64260_is_enabled_32bit(struct mv64x60_handle *bh, u32 window) -{ - u32 rc = 0; - - if ((gt64260_32bit_windows[window].base_reg != 0) && - (gt64260_32bit_windows[window].size_reg != 0) && - ((mv64x60_read(bh, gt64260_32bit_windows[window].size_reg) & - ((1 << gt64260_32bit_windows[window].size_bits) - 1)) >= - (mv64x60_read(bh, gt64260_32bit_windows[window].base_reg) & - ((1 << gt64260_32bit_windows[window].base_bits) - 1)))) - - rc = 1; - - return rc; -} - -/* - * gt64260_enable_window_32bit() - * - * On the GT64260, a window is enabled iff the top address is >= to the base - * address of the window. Since the window has already been configured by - * the time this routine is called, we have nothing to do here. - */ -static void __init -gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("enable 32bit window: %d\n", window); -} - -/* - * gt64260_disable_window_32bit() - * - * On a GT64260, you disable a window by setting its top address to be less - * than its base address. - */ -static void __init -gt64260_disable_window_32bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("disable 32bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n", - window, gt64260_32bit_windows[window].base_reg, - gt64260_32bit_windows[window].size_reg); - - if ((gt64260_32bit_windows[window].base_reg != 0) && - (gt64260_32bit_windows[window].size_reg != 0)) { - - /* To disable, make bottom reg higher than top reg */ - mv64x60_write(bh, gt64260_32bit_windows[window].base_reg,0xfff); - mv64x60_write(bh, gt64260_32bit_windows[window].size_reg, 0); - } -} - -/* - * gt64260_enable_window_64bit() - * - * On the GT64260, a window is enabled iff the top address is >= to the base - * address of the window. Since the window has already been configured by - * the time this routine is called, we have nothing to do here. - */ -static void __init -gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("enable 64bit window: %d\n", window); -} - -/* - * gt64260_disable_window_64bit() - * - * On a GT64260, you disable a window by setting its top address to be less - * than its base address. - */ -static void __init -gt64260_disable_window_64bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("disable 64bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n", - window, gt64260_64bit_windows[window].base_lo_reg, - gt64260_64bit_windows[window].size_reg); - - if ((gt64260_64bit_windows[window].base_lo_reg != 0) && - (gt64260_64bit_windows[window].size_reg != 0)) { - - /* To disable, make bottom reg higher than top reg */ - mv64x60_write(bh, gt64260_64bit_windows[window].base_lo_reg, - 0xfff); - mv64x60_write(bh, gt64260_64bit_windows[window].base_hi_reg, 0); - mv64x60_write(bh, gt64260_64bit_windows[window].size_reg, 0); - } -} - -/* - * gt64260_disable_all_windows() - * - * The GT64260 has several windows that aren't represented in the table of - * windows at the top of this file. This routine turns all of them off - * except for the memory controller windows, of course. - */ -static void __init -gt64260_disable_all_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ - u32 i, preserve; - - /* Disable 32bit windows (don't disable cpu->mem windows) */ - for (i=MV64x60_CPU2DEV_0_WIN; iwindow_preserve_mask_32_lo & (1 << i); - else - preserve = si->window_preserve_mask_32_hi & (1<<(i-32)); - - if (!preserve) - gt64260_disable_window_32bit(bh, i); - } - - /* Disable 64bit windows */ - for (i=0; iwindow_preserve_mask_64 & (1<MEM access cntl wins not in gt64260_64bit_windows[] */ - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_LO, 0xfff); - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_HI, 0); - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_SIZE, 0); - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_LO, 0xfff); - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_HI, 0); - mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_SIZE, 0); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_BASE_LO, 0xfff); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_BASE_HI, 0); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_SIZE, 0); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_BASE_LO, 0xfff); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_BASE_HI, 0); - mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_SIZE, 0); - - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_LO, 0xfff); - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_HI, 0); - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_SIZE, 0); - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_LO, 0xfff); - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_HI, 0); - mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_SIZE, 0); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_BASE_LO, 0xfff); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_BASE_HI, 0); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_SIZE, 0); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_BASE_LO, 0xfff); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_BASE_HI, 0); - mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_SIZE, 0); - - /* Disable all PCI-> windows */ - mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x07fffdff); - mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x07fffdff); - - /* - * Some firmwares enable a bunch of intr sources - * for the PCI INT output pins. - */ - mv64x60_write(bh, GT64260_IC_CPU_INTR_MASK_LO, 0); - mv64x60_write(bh, GT64260_IC_CPU_INTR_MASK_HI, 0); - mv64x60_write(bh, GT64260_IC_PCI0_INTR_MASK_LO, 0); - mv64x60_write(bh, GT64260_IC_PCI0_INTR_MASK_HI, 0); - mv64x60_write(bh, GT64260_IC_PCI1_INTR_MASK_LO, 0); - mv64x60_write(bh, GT64260_IC_PCI1_INTR_MASK_HI, 0); - mv64x60_write(bh, GT64260_IC_CPU_INT_0_MASK, 0); - mv64x60_write(bh, GT64260_IC_CPU_INT_1_MASK, 0); - mv64x60_write(bh, GT64260_IC_CPU_INT_2_MASK, 0); - mv64x60_write(bh, GT64260_IC_CPU_INT_3_MASK, 0); -} - -/* - * gt64260a_chip_specific_init() - * - * Implement errata workarounds for the GT64260A. - */ -static void __init -gt64260a_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ -#ifdef CONFIG_SERIAL_MPSC - struct resource *r; -#endif -#if !defined(CONFIG_NOT_COHERENT_CACHE) - u32 val; - u8 save_exclude; -#endif - - if (si->pci_0.enable_bus) - mv64x60_set_bits(bh, MV64x60_PCI0_CMD, - ((1<<4) | (1<<5) | (1<<9) | (1<<13))); - - if (si->pci_1.enable_bus) - mv64x60_set_bits(bh, MV64x60_PCI1_CMD, - ((1<<4) | (1<<5) | (1<<9) | (1<<13))); - - /* - * Dave Wilhardt found that bit 4 in the PCI Command registers must - * be set if you are using cache coherency. - */ -#if !defined(CONFIG_NOT_COHERENT_CACHE) - /* Res #MEM-4 -- cpu read buffer to buffer 1 */ - if ((mv64x60_read(bh, MV64x60_CPU_MODE) & 0xf0) == 0x40) - mv64x60_set_bits(bh, GT64260_SDRAM_CONFIG, (1<<26)); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - if (si->pci_0.enable_bus) { - early_read_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0), - PCI_COMMAND, &val); - val |= PCI_COMMAND_INVALIDATE; - early_write_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0), - PCI_COMMAND, val); - } - - if (si->pci_1.enable_bus) { - early_read_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0), - PCI_COMMAND, &val); - val |= PCI_COMMAND_INVALIDATE; - early_write_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0), - PCI_COMMAND, val); - } - mv64x60_pci_exclude_bridge = save_exclude; -#endif - - /* Disable buffer/descriptor snooping */ - mv64x60_clr_bits(bh, 0xf280, (1<< 6) | (1<<14) | (1<<22) | (1<<30)); - mv64x60_clr_bits(bh, 0xf2c0, (1<< 6) | (1<<14) | (1<<22) | (1<<30)); - -#ifdef CONFIG_SERIAL_MPSC - mv64x60_mpsc0_pdata.mirror_regs = 1; - mv64x60_mpsc0_pdata.cache_mgmt = 1; - mv64x60_mpsc1_pdata.mirror_regs = 1; - mv64x60_mpsc1_pdata.cache_mgmt = 1; - - if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0)) - != NULL) { - r->start = MV64x60_IRQ_SDMA_0; - r->end = MV64x60_IRQ_SDMA_0; - } -#endif -} - -/* - * gt64260b_chip_specific_init() - * - * Implement errata workarounds for the GT64260B. - */ -static void __init -gt64260b_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ -#ifdef CONFIG_SERIAL_MPSC - struct resource *r; -#endif -#if !defined(CONFIG_NOT_COHERENT_CACHE) - u32 val; - u8 save_exclude; -#endif - - if (si->pci_0.enable_bus) - mv64x60_set_bits(bh, MV64x60_PCI0_CMD, - ((1<<4) | (1<<5) | (1<<9) | (1<<13))); - - if (si->pci_1.enable_bus) - mv64x60_set_bits(bh, MV64x60_PCI1_CMD, - ((1<<4) | (1<<5) | (1<<9) | (1<<13))); - - /* - * Dave Wilhardt found that bit 4 in the PCI Command registers must - * be set if you are using cache coherency. - */ -#if !defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_set_bits(bh, GT64260_CPU_WB_PRIORITY_BUFFER_DEPTH, 0xf); - - /* Res #MEM-4 -- cpu read buffer to buffer 1 */ - if ((mv64x60_read(bh, MV64x60_CPU_MODE) & 0xf0) == 0x40) - mv64x60_set_bits(bh, GT64260_SDRAM_CONFIG, (1<<26)); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - if (si->pci_0.enable_bus) { - early_read_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0), - PCI_COMMAND, &val); - val |= PCI_COMMAND_INVALIDATE; - early_write_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0), - PCI_COMMAND, val); - } - - if (si->pci_1.enable_bus) { - early_read_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0), - PCI_COMMAND, &val); - val |= PCI_COMMAND_INVALIDATE; - early_write_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0), - PCI_COMMAND, val); - } - mv64x60_pci_exclude_bridge = save_exclude; -#endif - - /* Disable buffer/descriptor snooping */ - mv64x60_clr_bits(bh, 0xf280, (1<< 6) | (1<<14) | (1<<22) | (1<<30)); - mv64x60_clr_bits(bh, 0xf2c0, (1<< 6) | (1<<14) | (1<<22) | (1<<30)); - -#ifdef CONFIG_SERIAL_MPSC - /* - * The 64260B is not supposed to have the bug where the MPSC & ENET - * can't access cache coherent regions. However, testing has shown - * that the MPSC, at least, still has this bug. - */ - mv64x60_mpsc0_pdata.cache_mgmt = 1; - mv64x60_mpsc1_pdata.cache_mgmt = 1; - - if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0)) - != NULL) { - r->start = MV64x60_IRQ_SDMA_0; - r->end = MV64x60_IRQ_SDMA_0; - } -#endif -} - -/* - ***************************************************************************** - * - * MV64360-Specific Routines - * - ***************************************************************************** - */ -/* - * mv64360_translate_size() - * - * On the MV64360, the size register is set similar to the size you get - * from a pci config space BAR register. That is, programmed from LSB to MSB - * as a sequence of 1's followed by a sequence of 0's. IOW, "size -1" with the - * assumption that the size is a power of 2. - */ -static u32 __init -mv64360_translate_size(u32 base_addr, u32 size, u32 num_bits) -{ - return mv64x60_mask(size - 1, num_bits); -} - -/* - * mv64360_untranslate_size() - * - * Translate the size register value of a window into a window size. - */ -static u32 __init -mv64360_untranslate_size(u32 base_addr, u32 size, u32 num_bits) -{ - if (size > 0) { - size >>= (32 - num_bits); - size++; - size <<= (32 - num_bits); - } - - return size; -} - -/* - * mv64360_set_pci2mem_window() - * - * The PCI->MEM window registers are actually in PCI config space so need - * to set them by setting the correct config space BARs. - */ -struct { - u32 fcn; - u32 base_hi_bar; - u32 base_lo_bar; -} static mv64360_reg_addrs[2][4] __initdata = { - {{ 0, 0x14, 0x10 }, { 0, 0x1c, 0x18 }, - { 1, 0x14, 0x10 }, { 1, 0x1c, 0x18 }}, - {{ 0, 0x94, 0x90 }, { 0, 0x9c, 0x98 }, - { 1, 0x94, 0x90 }, { 1, 0x9c, 0x98 }} -}; - -static void __init -mv64360_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window, - u32 base) -{ - u8 save_exclude; - - pr_debug("set pci->mem window: %d, hose: %d, base: 0x%x\n", window, - hose->index, base); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(hose, 0, - PCI_DEVFN(0, mv64360_reg_addrs[bus][window].fcn), - mv64360_reg_addrs[bus][window].base_hi_bar, 0); - early_write_config_dword(hose, 0, - PCI_DEVFN(0, mv64360_reg_addrs[bus][window].fcn), - mv64360_reg_addrs[bus][window].base_lo_bar, - mv64x60_mask(base,20) | 0xc); - mv64x60_pci_exclude_bridge = save_exclude; -} - -/* - * mv64360_set_pci2regs_window() - * - * Set where the bridge's registers appear in PCI MEM space. - */ -static u32 mv64360_offset[2][2] __initdata = {{0x20, 0x24}, {0xa0, 0xa4}}; - -static void __init -mv64360_set_pci2regs_window(struct mv64x60_handle *bh, - struct pci_controller *hose, u32 bus, u32 base) -{ - u8 save_exclude; - - pr_debug("set pci->internal regs hose: %d, base: 0x%x\n", hose->index, - base); - - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(hose, 0, PCI_DEVFN(0,0), - mv64360_offset[bus][0], (base << 16)); - early_write_config_dword(hose, 0, PCI_DEVFN(0,0), - mv64360_offset[bus][1], 0); - mv64x60_pci_exclude_bridge = save_exclude; -} - -/* - * mv64360_is_enabled_32bit() - * - * On a MV64360, a window is enabled by either clearing a bit in the - * CPU BAR Enable reg or setting a bit in the window's base reg. - * Note that this doesn't work for windows on the PCI slave side but we don't - * check those so its okay. - */ -static u32 __init -mv64360_is_enabled_32bit(struct mv64x60_handle *bh, u32 window) -{ - u32 extra, rc = 0; - - if (((mv64360_32bit_windows[window].base_reg != 0) && - (mv64360_32bit_windows[window].size_reg != 0)) || - (window == MV64x60_CPU2SRAM_WIN)) { - - extra = mv64360_32bit_windows[window].extra; - - switch (extra & MV64x60_EXTRA_MASK) { - case MV64x60_EXTRA_CPUWIN_ENAB: - rc = (mv64x60_read(bh, MV64360_CPU_BAR_ENABLE) & - (1 << (extra & 0x1f))) == 0; - break; - - case MV64x60_EXTRA_CPUPROT_ENAB: - rc = (mv64x60_read(bh, - mv64360_32bit_windows[window].base_reg) & - (1 << (extra & 0x1f))) != 0; - break; - - case MV64x60_EXTRA_ENET_ENAB: - rc = (mv64x60_read(bh, MV64360_ENET2MEM_BAR_ENABLE) & - (1 << (extra & 0x7))) == 0; - break; - - case MV64x60_EXTRA_MPSC_ENAB: - rc = (mv64x60_read(bh, MV64360_MPSC2MEM_BAR_ENABLE) & - (1 << (extra & 0x3))) == 0; - break; - - case MV64x60_EXTRA_IDMA_ENAB: - rc = (mv64x60_read(bh, MV64360_IDMA2MEM_BAR_ENABLE) & - (1 << (extra & 0x7))) == 0; - break; - - default: - printk(KERN_ERR "mv64360_is_enabled: %s\n", - "32bit table corrupted"); - } - } - - return rc; -} - -/* - * mv64360_enable_window_32bit() - * - * On a MV64360, a window is enabled by either clearing a bit in the - * CPU BAR Enable reg or setting a bit in the window's base reg. - */ -static void __init -mv64360_enable_window_32bit(struct mv64x60_handle *bh, u32 window) -{ - u32 extra; - - pr_debug("enable 32bit window: %d\n", window); - - if (((mv64360_32bit_windows[window].base_reg != 0) && - (mv64360_32bit_windows[window].size_reg != 0)) || - (window == MV64x60_CPU2SRAM_WIN)) { - - extra = mv64360_32bit_windows[window].extra; - - switch (extra & MV64x60_EXTRA_MASK) { - case MV64x60_EXTRA_CPUWIN_ENAB: - mv64x60_clr_bits(bh, MV64360_CPU_BAR_ENABLE, - (1 << (extra & 0x1f))); - break; - - case MV64x60_EXTRA_CPUPROT_ENAB: - mv64x60_set_bits(bh, - mv64360_32bit_windows[window].base_reg, - (1 << (extra & 0x1f))); - break; - - case MV64x60_EXTRA_ENET_ENAB: - mv64x60_clr_bits(bh, MV64360_ENET2MEM_BAR_ENABLE, - (1 << (extra & 0x7))); - break; - - case MV64x60_EXTRA_MPSC_ENAB: - mv64x60_clr_bits(bh, MV64360_MPSC2MEM_BAR_ENABLE, - (1 << (extra & 0x3))); - break; - - case MV64x60_EXTRA_IDMA_ENAB: - mv64x60_clr_bits(bh, MV64360_IDMA2MEM_BAR_ENABLE, - (1 << (extra & 0x7))); - break; - - default: - printk(KERN_ERR "mv64360_enable: %s\n", - "32bit table corrupted"); - } - } -} - -/* - * mv64360_disable_window_32bit() - * - * On a MV64360, a window is disabled by either setting a bit in the - * CPU BAR Enable reg or clearing a bit in the window's base reg. - */ -static void __init -mv64360_disable_window_32bit(struct mv64x60_handle *bh, u32 window) -{ - u32 extra; - - pr_debug("disable 32bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n", - window, mv64360_32bit_windows[window].base_reg, - mv64360_32bit_windows[window].size_reg); - - if (((mv64360_32bit_windows[window].base_reg != 0) && - (mv64360_32bit_windows[window].size_reg != 0)) || - (window == MV64x60_CPU2SRAM_WIN)) { - - extra = mv64360_32bit_windows[window].extra; - - switch (extra & MV64x60_EXTRA_MASK) { - case MV64x60_EXTRA_CPUWIN_ENAB: - mv64x60_set_bits(bh, MV64360_CPU_BAR_ENABLE, - (1 << (extra & 0x1f))); - break; - - case MV64x60_EXTRA_CPUPROT_ENAB: - mv64x60_clr_bits(bh, - mv64360_32bit_windows[window].base_reg, - (1 << (extra & 0x1f))); - break; - - case MV64x60_EXTRA_ENET_ENAB: - mv64x60_set_bits(bh, MV64360_ENET2MEM_BAR_ENABLE, - (1 << (extra & 0x7))); - break; - - case MV64x60_EXTRA_MPSC_ENAB: - mv64x60_set_bits(bh, MV64360_MPSC2MEM_BAR_ENABLE, - (1 << (extra & 0x3))); - break; - - case MV64x60_EXTRA_IDMA_ENAB: - mv64x60_set_bits(bh, MV64360_IDMA2MEM_BAR_ENABLE, - (1 << (extra & 0x7))); - break; - - default: - printk(KERN_ERR "mv64360_disable: %s\n", - "32bit table corrupted"); - } - } -} - -/* - * mv64360_enable_window_64bit() - * - * On the MV64360, a 64-bit window is enabled by setting a bit in the window's - * base reg. - */ -static void __init -mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("enable 64bit window: %d\n", window); - - if ((mv64360_64bit_windows[window].base_lo_reg!= 0) && - (mv64360_64bit_windows[window].size_reg != 0)) { - - if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK) - == MV64x60_EXTRA_PCIACC_ENAB) - mv64x60_set_bits(bh, - mv64360_64bit_windows[window].base_lo_reg, - (1 << (mv64360_64bit_windows[window].extra & - 0x1f))); - else - printk(KERN_ERR "mv64360_enable: %s\n", - "64bit table corrupted"); - } -} - -/* - * mv64360_disable_window_64bit() - * - * On a MV64360, a 64-bit window is disabled by clearing a bit in the window's - * base reg. - */ -static void __init -mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window) -{ - pr_debug("disable 64bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n", - window, mv64360_64bit_windows[window].base_lo_reg, - mv64360_64bit_windows[window].size_reg); - - if ((mv64360_64bit_windows[window].base_lo_reg != 0) && - (mv64360_64bit_windows[window].size_reg != 0)) { - if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK) - == MV64x60_EXTRA_PCIACC_ENAB) - mv64x60_clr_bits(bh, - mv64360_64bit_windows[window].base_lo_reg, - (1 << (mv64360_64bit_windows[window].extra & - 0x1f))); - else - printk(KERN_ERR "mv64360_disable: %s\n", - "64bit table corrupted"); - } -} - -/* - * mv64360_disable_all_windows() - * - * The MV64360 has a few windows that aren't represented in the table of - * windows at the top of this file. This routine turns all of them off - * except for the memory controller windows, of course. - */ -static void __init -mv64360_disable_all_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ - u32 preserve, i; - - /* Disable 32bit windows (don't disable cpu->mem windows) */ - for (i=MV64x60_CPU2DEV_0_WIN; iwindow_preserve_mask_32_lo & (1 << i); - else - preserve = si->window_preserve_mask_32_hi & (1<<(i-32)); - - if (!preserve) - mv64360_disable_window_32bit(bh, i); - } - - /* Disable 64bit windows */ - for (i=0; iwindow_preserve_mask_64 & (1<MEM access cntl wins not in mv64360_64bit_windows[] */ - mv64x60_clr_bits(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_LO, 0); - mv64x60_clr_bits(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_LO, 0); - mv64x60_clr_bits(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_LO, 0); - mv64x60_clr_bits(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_LO, 0); - - /* Disable all PCI-> windows */ - mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x0000f9ff); - mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x0000f9ff); -} - -/* - * mv64360_config_io2mem_windows() - * - * ENET, MPSC, and IDMA ctlrs on the MV64[34]60 have separate windows that - * must be set up so that the respective ctlr can access system memory. - */ -static u32 enet_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = { - MV64x60_ENET2MEM_0_WIN, MV64x60_ENET2MEM_1_WIN, - MV64x60_ENET2MEM_2_WIN, MV64x60_ENET2MEM_3_WIN, -}; - -static u32 mpsc_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = { - MV64x60_MPSC2MEM_0_WIN, MV64x60_MPSC2MEM_1_WIN, - MV64x60_MPSC2MEM_2_WIN, MV64x60_MPSC2MEM_3_WIN, -}; - -static u32 idma_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = { - MV64x60_IDMA2MEM_0_WIN, MV64x60_IDMA2MEM_1_WIN, - MV64x60_IDMA2MEM_2_WIN, MV64x60_IDMA2MEM_3_WIN, -}; - -static u32 dram_selects[MV64x60_CPU2MEM_WINDOWS] __initdata = - { 0xe, 0xd, 0xb, 0x7 }; - -static void __init -mv64360_config_io2mem_windows(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si, - u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]) -{ - u32 i, win; - - pr_debug("config_io2regs_windows: enet, mpsc, idma -> bridge regs\n"); - - mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_0, 0); - mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_1, 0); - mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_2, 0); - - mv64x60_write(bh, MV64360_MPSC2MEM_ACC_PROT_0, 0); - mv64x60_write(bh, MV64360_MPSC2MEM_ACC_PROT_1, 0); - - mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_0, 0); - mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_1, 0); - mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_2, 0); - mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_3, 0); - - /* Assume that mem ctlr has no more windows than embedded I/O ctlr */ - for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++) - if (bh->ci->is_enabled_32bit(bh, win)) { - mv64x60_set_32bit_window(bh, enet_tab[i], - mem_windows[i][0], mem_windows[i][1], - (dram_selects[i] << 8) | - (si->enet_options[i] & 0x3000)); - bh->ci->enable_window_32bit(bh, enet_tab[i]); - - /* Give enet r/w access to memory region */ - mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_0, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_1, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_2, - (0x3 << (i << 1))); - - mv64x60_set_32bit_window(bh, mpsc_tab[i], - mem_windows[i][0], mem_windows[i][1], - (dram_selects[i] << 8) | - (si->mpsc_options[i] & 0x3000)); - bh->ci->enable_window_32bit(bh, mpsc_tab[i]); - - /* Give mpsc r/w access to memory region */ - mv64x60_set_bits(bh, MV64360_MPSC2MEM_ACC_PROT_0, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_MPSC2MEM_ACC_PROT_1, - (0x3 << (i << 1))); - - mv64x60_set_32bit_window(bh, idma_tab[i], - mem_windows[i][0], mem_windows[i][1], - (dram_selects[i] << 8) | - (si->idma_options[i] & 0x3000)); - bh->ci->enable_window_32bit(bh, idma_tab[i]); - - /* Give idma r/w access to memory region */ - mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_0, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_1, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_2, - (0x3 << (i << 1))); - mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_3, - (0x3 << (i << 1))); - } -} - -/* - * mv64360_set_mpsc2regs_window() - * - * MPSC has a window to the bridge's internal registers. Call this routine - * to change that window so it doesn't conflict with the windows mapping the - * mpsc to system memory. - */ -static void __init -mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base) -{ - pr_debug("set mpsc->internal regs, base: 0x%x\n", base); - mv64x60_write(bh, MV64360_MPSC2REGS_BASE, base & 0xffff0000); -} - -/* - * mv64360_chip_specific_init() - * - * Implement errata workarounds for the MV64360. - */ -static void __init -mv64360_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ -#if !defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24)); -#endif -#ifdef CONFIG_SERIAL_MPSC - mv64x60_mpsc0_pdata.brg_can_tune = 1; - mv64x60_mpsc0_pdata.cache_mgmt = 1; - mv64x60_mpsc1_pdata.brg_can_tune = 1; - mv64x60_mpsc1_pdata.cache_mgmt = 1; -#endif -} - -/* - * mv64460_chip_specific_init() - * - * Implement errata workarounds for the MV64460. - */ -static void __init -mv64460_chip_specific_init(struct mv64x60_handle *bh, - struct mv64x60_setup_info *si) -{ -#if !defined(CONFIG_NOT_COHERENT_CACHE) - mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24) | (1<<25)); - mv64x60_set_bits(bh, MV64460_D_UNIT_MMASK, (1<<1) | (1<<4)); -#endif -#ifdef CONFIG_SERIAL_MPSC - mv64x60_mpsc0_pdata.brg_can_tune = 1; - mv64x60_mpsc0_pdata.cache_mgmt = 1; - mv64x60_mpsc1_pdata.brg_can_tune = 1; - mv64x60_mpsc1_pdata.cache_mgmt = 1; -#endif -} - - -#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) -/* Export the hotswap register via sysfs for enum event monitoring */ -#define VAL_LEN_MAX 11 /* 32-bit hex or dec stringified number + '\n' */ - -static DEFINE_MUTEX(mv64xxx_hs_lock); - -static ssize_t -mv64xxx_hs_reg_read(struct kobject *kobj, char *buf, loff_t off, size_t count) -{ - u32 v; - u8 save_exclude; - - if (off > 0) - return 0; - if (count < VAL_LEN_MAX) - return -EINVAL; - - if (mutex_lock_interruptible(&mv64xxx_hs_lock)) - return -ERESTARTSYS; - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_read_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, &v); - mv64x60_pci_exclude_bridge = save_exclude; - mutex_unlock(&mv64xxx_hs_lock); - - return sprintf(buf, "0x%08x\n", v); -} - -static ssize_t -mv64xxx_hs_reg_write(struct kobject *kobj, char *buf, loff_t off, size_t count) -{ - u32 v; - u8 save_exclude; - - if (off > 0) - return 0; - if (count <= 0) - return -EINVAL; - - if (sscanf(buf, "%i", &v) == 1) { - if (mutex_lock_interruptible(&mv64xxx_hs_lock)) - return -ERESTARTSYS; - save_exclude = mv64x60_pci_exclude_bridge; - mv64x60_pci_exclude_bridge = 0; - early_write_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0), - MV64360_PCICFG_CPCI_HOTSWAP, v); - mv64x60_pci_exclude_bridge = save_exclude; - mutex_unlock(&mv64xxx_hs_lock); - } - else - count = -EINVAL; - - return count; -} - -static struct bin_attribute mv64xxx_hs_reg_attr = { /* Hotswap register */ - .attr = { - .name = "hs_reg", - .mode = S_IRUGO | S_IWUSR, - }, - .size = VAL_LEN_MAX, - .read = mv64xxx_hs_reg_read, - .write = mv64xxx_hs_reg_write, -}; - -/* Provide sysfs file indicating if this platform supports the hs_reg */ -static ssize_t -mv64xxx_hs_reg_valid_show(struct device *dev, struct device_attribute *attr, - char *buf) -{ - struct platform_device *pdev; - struct mv64xxx_pdata *pdp; - u32 v; - - pdev = container_of(dev, struct platform_device, dev); - pdp = (struct mv64xxx_pdata *)pdev->dev.platform_data; - - if (mutex_lock_interruptible(&mv64xxx_hs_lock)) - return -ERESTARTSYS; - v = pdp->hs_reg_valid; - mutex_unlock(&mv64xxx_hs_lock); - - return sprintf(buf, "%i\n", v); -} -static DEVICE_ATTR(hs_reg_valid, S_IRUGO, mv64xxx_hs_reg_valid_show, NULL); - -static int __init -mv64xxx_sysfs_init(void) -{ - sysfs_create_bin_file(&mv64xxx_device.dev.kobj, &mv64xxx_hs_reg_attr); - sysfs_create_file(&mv64xxx_device.dev.kobj,&dev_attr_hs_reg_valid.attr); - return 0; -} -subsys_initcall(mv64xxx_sysfs_init); -#endif diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c deleted file mode 100644 index e1876261e5dcc359f53ac12062f900d598d5a241..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mv64x60_dbg.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * KGDB and progress routines for the Marvell/Galileo MV64x60 (Discovery). - * - * Author: Mark A. Greer - * - * 2003 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - ***************************************************************************** - * - * Low-level MPSC/UART I/O routines - * - ***************************************************************************** - */ - - -#include -#include -#include -#include - - -#if defined(CONFIG_SERIAL_TEXT_DEBUG) - -#define MPSC_CHR_1 0x000c -#define MPSC_CHR_2 0x0010 - -static struct mv64x60_handle mv64x60_dbg_bh; - -void -mv64x60_progress_init(u32 base) -{ - mv64x60_dbg_bh.v_base = base; - return; -} - -static void -mv64x60_polled_putc(int chan, char c) -{ - u32 offset; - - if (chan == 0) - offset = 0x8000; - else - offset = 0x9000; - - mv64x60_write(&mv64x60_dbg_bh, offset + MPSC_CHR_1, (u32)c); - mv64x60_write(&mv64x60_dbg_bh, offset + MPSC_CHR_2, 0x200); - udelay(2000); -} - -void -mv64x60_mpsc_progress(char *s, unsigned short hex) -{ - volatile char c; - - mv64x60_polled_putc(0, '\r'); - - while ((c = *s++) != 0) - mv64x60_polled_putc(0, c); - - mv64x60_polled_putc(0, '\n'); - mv64x60_polled_putc(0, '\r'); - - return; -} -#endif /* CONFIG_SERIAL_TEXT_DEBUG */ - - -#if defined(CONFIG_KGDB) - -#if defined(CONFIG_KGDB_TTYS0) -#define KGDB_PORT 0 -#elif defined(CONFIG_KGDB_TTYS1) -#define KGDB_PORT 1 -#else -#error "Invalid kgdb_tty port" -#endif - -void -putDebugChar(unsigned char c) -{ - mv64x60_polled_putc(KGDB_PORT, (char)c); -} - -int -getDebugChar(void) -{ - unsigned char c; - - while (!mv64x60_polled_getc(KGDB_PORT, &c)); - return (int)c; -} - -void -putDebugString(char* str) -{ - while (*str != '\0') { - putDebugChar(*str); - str++; - } - putDebugChar('\r'); - return; -} - -void -kgdb_interruptible(int enable) -{ -} - -void -kgdb_map_scc(void) -{ - if (ppc_md.early_serial_map) - ppc_md.early_serial_map(); -} -#endif /* CONFIG_KGDB */ diff --git a/arch/ppc/syslib/mv64x60_win.c b/arch/ppc/syslib/mv64x60_win.c deleted file mode 100644 index 4bf1ad17bf1a6bdc9fd2f2ad19d6b4aa95fe01e6..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/mv64x60_win.c +++ /dev/null @@ -1,1165 +0,0 @@ -/* - * Tables with info on how to manipulate the 32 & 64 bit windows on the - * various types of Marvell bridge chips. - * - * Author: Mark A. Greer - * - * 2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - - -/* - ***************************************************************************** - * - * Tables describing how to set up windows on each type of bridge - * - ***************************************************************************** - */ -struct mv64x60_32bit_window - gt64260_32bit_windows[MV64x60_32BIT_WIN_COUNT] __initdata = { - /* CPU->MEM Windows */ - [MV64x60_CPU2MEM_0_WIN] = { - .base_reg = MV64x60_CPU2MEM_0_BASE, - .size_reg = MV64x60_CPU2MEM_0_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2MEM_1_WIN] = { - .base_reg = MV64x60_CPU2MEM_1_BASE, - .size_reg = MV64x60_CPU2MEM_1_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2MEM_2_WIN] = { - .base_reg = MV64x60_CPU2MEM_2_BASE, - .size_reg = MV64x60_CPU2MEM_2_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2MEM_3_WIN] = { - .base_reg = MV64x60_CPU2MEM_3_BASE, - .size_reg = MV64x60_CPU2MEM_3_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->Device Windows */ - [MV64x60_CPU2DEV_0_WIN] = { - .base_reg = MV64x60_CPU2DEV_0_BASE, - .size_reg = MV64x60_CPU2DEV_0_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2DEV_1_WIN] = { - .base_reg = MV64x60_CPU2DEV_1_BASE, - .size_reg = MV64x60_CPU2DEV_1_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2DEV_2_WIN] = { - .base_reg = MV64x60_CPU2DEV_2_BASE, - .size_reg = MV64x60_CPU2DEV_2_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2DEV_3_WIN] = { - .base_reg = MV64x60_CPU2DEV_3_BASE, - .size_reg = MV64x60_CPU2DEV_3_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->Boot Window */ - [MV64x60_CPU2BOOT_WIN] = { - .base_reg = MV64x60_CPU2BOOT_0_BASE, - .size_reg = MV64x60_CPU2BOOT_0_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 0 Windows */ - [MV64x60_CPU2PCI0_IO_WIN] = { - .base_reg = MV64x60_CPU2PCI0_IO_BASE, - .size_reg = MV64x60_CPU2PCI0_IO_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_0_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_0_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_0_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_1_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_1_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_1_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_2_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_2_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_2_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_3_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_3_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_3_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 1 Windows */ - [MV64x60_CPU2PCI1_IO_WIN] = { - .base_reg = MV64x60_CPU2PCI1_IO_BASE, - .size_reg = MV64x60_CPU2PCI1_IO_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_0_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_0_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_0_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_1_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_1_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_1_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_2_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_2_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_2_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_3_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_3_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_3_SIZE, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->SRAM Window (64260 has no integrated SRAM) */ - /* CPU->PCI 0 Remap I/O Window */ - [MV64x60_CPU2PCI0_IO_REMAP_WIN] = { - .base_reg = MV64x60_CPU2PCI0_IO_REMAP, - .size_reg = 0, - .base_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 1 Remap I/O Window */ - [MV64x60_CPU2PCI1_IO_REMAP_WIN] = { - .base_reg = MV64x60_CPU2PCI1_IO_REMAP, - .size_reg = 0, - .base_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU Memory Protection Windows */ - [MV64x60_CPU_PROT_0_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_0, - .size_reg = MV64x60_CPU_PROT_SIZE_0, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_PROT_1_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_1, - .size_reg = MV64x60_CPU_PROT_SIZE_1, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_PROT_2_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_2, - .size_reg = MV64x60_CPU_PROT_SIZE_2, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_PROT_3_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_3, - .size_reg = MV64x60_CPU_PROT_SIZE_3, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU Snoop Windows */ - [MV64x60_CPU_SNOOP_0_WIN] = { - .base_reg = GT64260_CPU_SNOOP_BASE_0, - .size_reg = GT64260_CPU_SNOOP_SIZE_0, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_SNOOP_1_WIN] = { - .base_reg = GT64260_CPU_SNOOP_BASE_1, - .size_reg = GT64260_CPU_SNOOP_SIZE_1, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_SNOOP_2_WIN] = { - .base_reg = GT64260_CPU_SNOOP_BASE_2, - .size_reg = GT64260_CPU_SNOOP_SIZE_2, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU_SNOOP_3_WIN] = { - .base_reg = GT64260_CPU_SNOOP_BASE_3, - .size_reg = GT64260_CPU_SNOOP_SIZE_3, - .base_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 0->System Memory Remap Windows */ - [MV64x60_PCI02MEM_REMAP_0_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_0_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_1_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_2_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_3_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - /* PCI 1->System Memory Remap Windows */ - [MV64x60_PCI12MEM_REMAP_0_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_0_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_1_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_2_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_3_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - /* ENET->SRAM Window (64260 doesn't have separate windows) */ - /* MPSC->SRAM Window (64260 doesn't have separate windows) */ - /* IDMA->SRAM Window (64260 doesn't have separate windows) */ -}; - -struct mv64x60_64bit_window - gt64260_64bit_windows[MV64x60_64BIT_WIN_COUNT] __initdata = { - /* CPU->PCI 0 MEM Remap Windows */ - [MV64x60_CPU2PCI0_MEM_0_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_1_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_2_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_3_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 1 MEM Remap Windows */ - [MV64x60_CPU2PCI1_MEM_0_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_1_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_2_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_3_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 12, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 0->MEM Access Control Windows */ - [MV64x60_PCI02MEM_ACC_CNTL_0_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_0_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_1_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_1_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_2_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_2_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_3_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_3_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 1->MEM Access Control Windows */ - [MV64x60_PCI12MEM_ACC_CNTL_0_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_0_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_1_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_1_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_2_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_2_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_3_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_3_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 0->MEM Snoop Windows */ - [MV64x60_PCI02MEM_SNOOP_0_WIN] = { - .base_hi_reg = GT64260_PCI0_SNOOP_0_BASE_HI, - .base_lo_reg = GT64260_PCI0_SNOOP_0_BASE_LO, - .size_reg = GT64260_PCI0_SNOOP_0_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_SNOOP_1_WIN] = { - .base_hi_reg = GT64260_PCI0_SNOOP_1_BASE_HI, - .base_lo_reg = GT64260_PCI0_SNOOP_1_BASE_LO, - .size_reg = GT64260_PCI0_SNOOP_1_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_SNOOP_2_WIN] = { - .base_hi_reg = GT64260_PCI0_SNOOP_2_BASE_HI, - .base_lo_reg = GT64260_PCI0_SNOOP_2_BASE_LO, - .size_reg = GT64260_PCI0_SNOOP_2_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI02MEM_SNOOP_3_WIN] = { - .base_hi_reg = GT64260_PCI0_SNOOP_3_BASE_HI, - .base_lo_reg = GT64260_PCI0_SNOOP_3_BASE_LO, - .size_reg = GT64260_PCI0_SNOOP_3_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 1->MEM Snoop Windows */ - [MV64x60_PCI12MEM_SNOOP_0_WIN] = { - .base_hi_reg = GT64260_PCI1_SNOOP_0_BASE_HI, - .base_lo_reg = GT64260_PCI1_SNOOP_0_BASE_LO, - .size_reg = GT64260_PCI1_SNOOP_0_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_SNOOP_1_WIN] = { - .base_hi_reg = GT64260_PCI1_SNOOP_1_BASE_HI, - .base_lo_reg = GT64260_PCI1_SNOOP_1_BASE_LO, - .size_reg = GT64260_PCI1_SNOOP_1_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_SNOOP_2_WIN] = { - .base_hi_reg = GT64260_PCI1_SNOOP_2_BASE_HI, - .base_lo_reg = GT64260_PCI1_SNOOP_2_BASE_LO, - .size_reg = GT64260_PCI1_SNOOP_2_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_PCI12MEM_SNOOP_3_WIN] = { - .base_hi_reg = GT64260_PCI1_SNOOP_3_BASE_HI, - .base_lo_reg = GT64260_PCI1_SNOOP_3_BASE_LO, - .size_reg = GT64260_PCI1_SNOOP_3_SIZE, - .base_lo_bits = 12, - .size_bits = 12, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, -}; - -struct mv64x60_32bit_window - mv64360_32bit_windows[MV64x60_32BIT_WIN_COUNT] __initdata = { - /* CPU->MEM Windows */ - [MV64x60_CPU2MEM_0_WIN] = { - .base_reg = MV64x60_CPU2MEM_0_BASE, - .size_reg = MV64x60_CPU2MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 0 }, - [MV64x60_CPU2MEM_1_WIN] = { - .base_reg = MV64x60_CPU2MEM_1_BASE, - .size_reg = MV64x60_CPU2MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 1 }, - [MV64x60_CPU2MEM_2_WIN] = { - .base_reg = MV64x60_CPU2MEM_2_BASE, - .size_reg = MV64x60_CPU2MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 2 }, - [MV64x60_CPU2MEM_3_WIN] = { - .base_reg = MV64x60_CPU2MEM_3_BASE, - .size_reg = MV64x60_CPU2MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 3 }, - /* CPU->Device Windows */ - [MV64x60_CPU2DEV_0_WIN] = { - .base_reg = MV64x60_CPU2DEV_0_BASE, - .size_reg = MV64x60_CPU2DEV_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 4 }, - [MV64x60_CPU2DEV_1_WIN] = { - .base_reg = MV64x60_CPU2DEV_1_BASE, - .size_reg = MV64x60_CPU2DEV_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 5 }, - [MV64x60_CPU2DEV_2_WIN] = { - .base_reg = MV64x60_CPU2DEV_2_BASE, - .size_reg = MV64x60_CPU2DEV_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 6 }, - [MV64x60_CPU2DEV_3_WIN] = { - .base_reg = MV64x60_CPU2DEV_3_BASE, - .size_reg = MV64x60_CPU2DEV_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 7 }, - /* CPU->Boot Window */ - [MV64x60_CPU2BOOT_WIN] = { - .base_reg = MV64x60_CPU2BOOT_0_BASE, - .size_reg = MV64x60_CPU2BOOT_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 8 }, - /* CPU->PCI 0 Windows */ - [MV64x60_CPU2PCI0_IO_WIN] = { - .base_reg = MV64x60_CPU2PCI0_IO_BASE, - .size_reg = MV64x60_CPU2PCI0_IO_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 9 }, - [MV64x60_CPU2PCI0_MEM_0_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_0_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 10 }, - [MV64x60_CPU2PCI0_MEM_1_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_1_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 11 }, - [MV64x60_CPU2PCI0_MEM_2_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_2_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 12 }, - [MV64x60_CPU2PCI0_MEM_3_WIN] = { - .base_reg = MV64x60_CPU2PCI0_MEM_3_BASE, - .size_reg = MV64x60_CPU2PCI0_MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 13 }, - /* CPU->PCI 1 Windows */ - [MV64x60_CPU2PCI1_IO_WIN] = { - .base_reg = MV64x60_CPU2PCI1_IO_BASE, - .size_reg = MV64x60_CPU2PCI1_IO_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 14 }, - [MV64x60_CPU2PCI1_MEM_0_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_0_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 15 }, - [MV64x60_CPU2PCI1_MEM_1_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_1_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 16 }, - [MV64x60_CPU2PCI1_MEM_2_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_2_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 17 }, - [MV64x60_CPU2PCI1_MEM_3_WIN] = { - .base_reg = MV64x60_CPU2PCI1_MEM_3_BASE, - .size_reg = MV64x60_CPU2PCI1_MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 18 }, - /* CPU->SRAM Window */ - [MV64x60_CPU2SRAM_WIN] = { - .base_reg = MV64360_CPU2SRAM_BASE, - .size_reg = 0, - .base_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUWIN_ENAB | 19 }, - /* CPU->PCI 0 Remap I/O Window */ - [MV64x60_CPU2PCI0_IO_REMAP_WIN] = { - .base_reg = MV64x60_CPU2PCI0_IO_REMAP, - .size_reg = 0, - .base_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 1 Remap I/O Window */ - [MV64x60_CPU2PCI1_IO_REMAP_WIN] = { - .base_reg = MV64x60_CPU2PCI1_IO_REMAP, - .size_reg = 0, - .base_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU Memory Protection Windows */ - [MV64x60_CPU_PROT_0_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_0, - .size_reg = MV64x60_CPU_PROT_SIZE_0, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 }, - [MV64x60_CPU_PROT_1_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_1, - .size_reg = MV64x60_CPU_PROT_SIZE_1, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 }, - [MV64x60_CPU_PROT_2_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_2, - .size_reg = MV64x60_CPU_PROT_SIZE_2, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 }, - [MV64x60_CPU_PROT_3_WIN] = { - .base_reg = MV64x60_CPU_PROT_BASE_3, - .size_reg = MV64x60_CPU_PROT_SIZE_3, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 }, - /* CPU Snoop Windows -- don't exist on 64360 */ - /* PCI 0->System Memory Remap Windows */ - [MV64x60_PCI02MEM_REMAP_0_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_0_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_1_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_2_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI02MEM_REMAP_3_WIN] = { - .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - /* PCI 1->System Memory Remap Windows */ - [MV64x60_PCI12MEM_REMAP_0_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_0_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_1_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_2_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - [MV64x60_PCI12MEM_REMAP_3_WIN] = { - .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP, - .size_reg = 0, - .base_bits = 20, - .size_bits = 0, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = 0 }, - /* ENET->System Memory Windows */ - [MV64x60_ENET2MEM_0_WIN] = { - .base_reg = MV64360_ENET2MEM_0_BASE, - .size_reg = MV64360_ENET2MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 0 }, - [MV64x60_ENET2MEM_1_WIN] = { - .base_reg = MV64360_ENET2MEM_1_BASE, - .size_reg = MV64360_ENET2MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 1 }, - [MV64x60_ENET2MEM_2_WIN] = { - .base_reg = MV64360_ENET2MEM_2_BASE, - .size_reg = MV64360_ENET2MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 2 }, - [MV64x60_ENET2MEM_3_WIN] = { - .base_reg = MV64360_ENET2MEM_3_BASE, - .size_reg = MV64360_ENET2MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 3 }, - [MV64x60_ENET2MEM_4_WIN] = { - .base_reg = MV64360_ENET2MEM_4_BASE, - .size_reg = MV64360_ENET2MEM_4_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 4 }, - [MV64x60_ENET2MEM_5_WIN] = { - .base_reg = MV64360_ENET2MEM_5_BASE, - .size_reg = MV64360_ENET2MEM_5_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_ENET_ENAB | 5 }, - /* MPSC->System Memory Windows */ - [MV64x60_MPSC2MEM_0_WIN] = { - .base_reg = MV64360_MPSC2MEM_0_BASE, - .size_reg = MV64360_MPSC2MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_MPSC_ENAB | 0 }, - [MV64x60_MPSC2MEM_1_WIN] = { - .base_reg = MV64360_MPSC2MEM_1_BASE, - .size_reg = MV64360_MPSC2MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_MPSC_ENAB | 1 }, - [MV64x60_MPSC2MEM_2_WIN] = { - .base_reg = MV64360_MPSC2MEM_2_BASE, - .size_reg = MV64360_MPSC2MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_MPSC_ENAB | 2 }, - [MV64x60_MPSC2MEM_3_WIN] = { - .base_reg = MV64360_MPSC2MEM_3_BASE, - .size_reg = MV64360_MPSC2MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_MPSC_ENAB | 3 }, - /* IDMA->System Memory Windows */ - [MV64x60_IDMA2MEM_0_WIN] = { - .base_reg = MV64360_IDMA2MEM_0_BASE, - .size_reg = MV64360_IDMA2MEM_0_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 0 }, - [MV64x60_IDMA2MEM_1_WIN] = { - .base_reg = MV64360_IDMA2MEM_1_BASE, - .size_reg = MV64360_IDMA2MEM_1_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 1 }, - [MV64x60_IDMA2MEM_2_WIN] = { - .base_reg = MV64360_IDMA2MEM_2_BASE, - .size_reg = MV64360_IDMA2MEM_2_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 2 }, - [MV64x60_IDMA2MEM_3_WIN] = { - .base_reg = MV64360_IDMA2MEM_3_BASE, - .size_reg = MV64360_IDMA2MEM_3_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 3 }, - [MV64x60_IDMA2MEM_4_WIN] = { - .base_reg = MV64360_IDMA2MEM_4_BASE, - .size_reg = MV64360_IDMA2MEM_4_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 4 }, - [MV64x60_IDMA2MEM_5_WIN] = { - .base_reg = MV64360_IDMA2MEM_5_BASE, - .size_reg = MV64360_IDMA2MEM_5_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 5 }, - [MV64x60_IDMA2MEM_6_WIN] = { - .base_reg = MV64360_IDMA2MEM_6_BASE, - .size_reg = MV64360_IDMA2MEM_6_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 6 }, - [MV64x60_IDMA2MEM_7_WIN] = { - .base_reg = MV64360_IDMA2MEM_7_BASE, - .size_reg = MV64360_IDMA2MEM_7_SIZE, - .base_bits = 16, - .size_bits = 16, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_IDMA_ENAB | 7 }, -}; - -struct mv64x60_64bit_window - mv64360_64bit_windows[MV64x60_64BIT_WIN_COUNT] __initdata = { - /* CPU->PCI 0 MEM Remap Windows */ - [MV64x60_CPU2PCI0_MEM_0_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_1_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_2_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI0_MEM_3_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* CPU->PCI 1 MEM Remap Windows */ - [MV64x60_CPU2PCI1_MEM_0_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_1_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_2_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - [MV64x60_CPU2PCI1_MEM_3_REMAP_WIN] = { - .base_hi_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_HI, - .base_lo_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_LO, - .size_reg = 0, - .base_lo_bits = 16, - .size_bits = 0, - .get_from_field = mv64x60_shift_left, - .map_to_field = mv64x60_shift_right, - .extra = 0 }, - /* PCI 0->MEM Access Control Windows */ - [MV64x60_PCI02MEM_ACC_CNTL_0_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_0_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_1_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_1_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_2_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_2_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI02MEM_ACC_CNTL_3_WIN] = { - .base_hi_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_HI, - .base_lo_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_LO, - .size_reg = MV64x60_PCI0_ACC_CNTL_3_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - /* PCI 1->MEM Access Control Windows */ - [MV64x60_PCI12MEM_ACC_CNTL_0_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_0_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_1_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_1_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_2_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_2_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - [MV64x60_PCI12MEM_ACC_CNTL_3_WIN] = { - .base_hi_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_HI, - .base_lo_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_LO, - .size_reg = MV64x60_PCI1_ACC_CNTL_3_SIZE, - .base_lo_bits = 20, - .size_bits = 20, - .get_from_field = mv64x60_mask, - .map_to_field = mv64x60_mask, - .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 }, - /* PCI 0->MEM Snoop Windows -- don't exist on 64360 */ - /* PCI 1->MEM Snoop Windows -- don't exist on 64360 */ -}; diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c deleted file mode 100644 index a6fb7dcfa7381d0d1fa28099724f557803e3f357..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ocp.c +++ /dev/null @@ -1,482 +0,0 @@ -/* - * ocp.c - * - * (c) Benjamin Herrenschmidt (benh@kernel.crashing.org) - * Mipsys - France - * - * Derived from work (c) Armin Kuster akuster@pacbell.net - * - * Additional support and port to 2.6 LDM/sysfs by - * Matt Porter - * Copyright 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * OCP (On Chip Peripheral) is a software emulated "bus" with a - * pseudo discovery method for dumb peripherals. Usually these type - * of peripherals are found on embedded SoC (System On a Chip) - * processors or highly integrated system controllers that have - * a host bridge and many peripherals. Common examples where - * this is already used include the PPC4xx, MPC52xx, - * and MV64xxx parts. - * - * This subsystem creates a standard OCP bus type within the - * device model. The devices on the OCP bus are seeded by an - * an initial OCP device array created by the arch-specific - * Device entries can be added/removed/modified through OCP - * helper functions to accommodate system and board-specific - * parameters commonly found in embedded systems. OCP also - * provides a standard method for devices to describe extended - * attributes about themselves to the system. A standard access - * method allows OCP drivers to obtain the information, both - * SoC-specific and system/board-specific, needed for operation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -//#define DBG(x) printk x -#define DBG(x) - -extern int mem_init_done; - -extern struct ocp_def core_ocp[]; /* Static list of devices, provided by - CPU core */ - -LIST_HEAD(ocp_devices); /* List of all OCP devices */ -DECLARE_RWSEM(ocp_devices_sem); /* Global semaphores for those lists */ - -static int ocp_inited; - -/* Sysfs support */ -#define OCP_DEF_ATTR(field, format_string) \ -static ssize_t \ -show_##field(struct device *dev, struct device_attribute *attr, char *buf) \ -{ \ - struct ocp_device *odev = to_ocp_dev(dev); \ - \ - return sprintf(buf, format_string, odev->def->field); \ -} \ -static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL); - -OCP_DEF_ATTR(vendor, "0x%04x\n"); -OCP_DEF_ATTR(function, "0x%04x\n"); -OCP_DEF_ATTR(index, "0x%04x\n"); -#ifdef CONFIG_PTE_64BIT -OCP_DEF_ATTR(paddr, "0x%016Lx\n"); -#else -OCP_DEF_ATTR(paddr, "0x%08lx\n"); -#endif -OCP_DEF_ATTR(irq, "%d\n"); -OCP_DEF_ATTR(pm, "%lu\n"); - -void ocp_create_sysfs_dev_files(struct ocp_device *odev) -{ - struct device *dev = &odev->dev; - - /* Current OCP device def attributes */ - device_create_file(dev, &dev_attr_vendor); - device_create_file(dev, &dev_attr_function); - device_create_file(dev, &dev_attr_index); - device_create_file(dev, &dev_attr_paddr); - device_create_file(dev, &dev_attr_irq); - device_create_file(dev, &dev_attr_pm); - /* Current OCP device additions attributes */ - if (odev->def->additions && odev->def->show) - odev->def->show(dev); -} - -/** - * ocp_device_match - Match one driver to one device - * @drv: driver to match - * @dev: device to match - * - * This function returns 0 if the driver and device don't match - */ -static int -ocp_device_match(struct device *dev, struct device_driver *drv) -{ - struct ocp_device *ocp_dev = to_ocp_dev(dev); - struct ocp_driver *ocp_drv = to_ocp_drv(drv); - const struct ocp_device_id *ids = ocp_drv->id_table; - - if (!ids) - return 0; - - while (ids->vendor || ids->function) { - if ((ids->vendor == OCP_ANY_ID - || ids->vendor == ocp_dev->def->vendor) - && (ids->function == OCP_ANY_ID - || ids->function == ocp_dev->def->function)) - return 1; - ids++; - } - return 0; -} - -static int -ocp_device_probe(struct device *dev) -{ - int error = 0; - struct ocp_driver *drv; - struct ocp_device *ocp_dev; - - drv = to_ocp_drv(dev->driver); - ocp_dev = to_ocp_dev(dev); - - if (drv->probe) { - error = drv->probe(ocp_dev); - if (error >= 0) { - ocp_dev->driver = drv; - error = 0; - } - } - return error; -} - -static int -ocp_device_remove(struct device *dev) -{ - struct ocp_device *ocp_dev = to_ocp_dev(dev); - - if (ocp_dev->driver) { - if (ocp_dev->driver->remove) - ocp_dev->driver->remove(ocp_dev); - ocp_dev->driver = NULL; - } - return 0; -} - -static int -ocp_device_suspend(struct device *dev, pm_message_t state) -{ - struct ocp_device *ocp_dev = to_ocp_dev(dev); - struct ocp_driver *ocp_drv = to_ocp_drv(dev->driver); - - if (dev->driver && ocp_drv->suspend) - return ocp_drv->suspend(ocp_dev, state); - return 0; -} - -static int -ocp_device_resume(struct device *dev) -{ - struct ocp_device *ocp_dev = to_ocp_dev(dev); - struct ocp_driver *ocp_drv = to_ocp_drv(dev->driver); - - if (dev->driver && ocp_drv->resume) - return ocp_drv->resume(ocp_dev); - return 0; -} - -struct bus_type ocp_bus_type = { - .name = "ocp", - .match = ocp_device_match, - .probe = ocp_device_probe, - .remove = ocp_device_remove, - .suspend = ocp_device_suspend, - .resume = ocp_device_resume, -}; - -/** - * ocp_register_driver - Register an OCP driver - * @drv: pointer to statically defined ocp_driver structure - * - * The driver's probe() callback is called either recursively - * by this function or upon later call of ocp_driver_init - * - * NOTE: Detection of devices is a 2 pass step on this implementation, - * hotswap isn't supported. First, all OCP devices are put in the device - * list, _then_ all drivers are probed on each match. - */ -int -ocp_register_driver(struct ocp_driver *drv) -{ - /* initialize common driver fields */ - drv->driver.name = drv->name; - drv->driver.bus = &ocp_bus_type; - - /* register with core */ - return driver_register(&drv->driver); -} - -/** - * ocp_unregister_driver - Unregister an OCP driver - * @drv: pointer to statically defined ocp_driver structure - * - * The driver's remove() callback is called recursively - * by this function for any device already registered - */ -void -ocp_unregister_driver(struct ocp_driver *drv) -{ - DBG(("ocp: ocp_unregister_driver(%s)...\n", drv->name)); - - driver_unregister(&drv->driver); - - DBG(("ocp: ocp_unregister_driver(%s)... done.\n", drv->name)); -} - -/* Core of ocp_find_device(). Caller must hold ocp_devices_sem */ -static struct ocp_device * -__ocp_find_device(unsigned int vendor, unsigned int function, int index) -{ - struct list_head *entry; - struct ocp_device *dev, *found = NULL; - - DBG(("ocp: __ocp_find_device(vendor: %x, function: %x, index: %d)...\n", vendor, function, index)); - - list_for_each(entry, &ocp_devices) { - dev = list_entry(entry, struct ocp_device, link); - if (vendor != OCP_ANY_ID && vendor != dev->def->vendor) - continue; - if (function != OCP_ANY_ID && function != dev->def->function) - continue; - if (index != OCP_ANY_INDEX && index != dev->def->index) - continue; - found = dev; - break; - } - - DBG(("ocp: __ocp_find_device(vendor: %x, function: %x, index: %d)... done\n", vendor, function, index)); - - return found; -} - -/** - * ocp_find_device - Find a device by function & index - * @vendor: vendor ID of the device (or OCP_ANY_ID) - * @function: function code of the device (or OCP_ANY_ID) - * @idx: index of the device (or OCP_ANY_INDEX) - * - * This function allows a lookup of a given function by it's - * index, it's typically used to find the MAL or ZMII associated - * with an EMAC or similar horrors. - * You can pass vendor, though you usually want OCP_ANY_ID there... - */ -struct ocp_device * -ocp_find_device(unsigned int vendor, unsigned int function, int index) -{ - struct ocp_device *dev; - - down_read(&ocp_devices_sem); - dev = __ocp_find_device(vendor, function, index); - up_read(&ocp_devices_sem); - - return dev; -} - -/** - * ocp_get_one_device - Find a def by function & index - * @vendor: vendor ID of the device (or OCP_ANY_ID) - * @function: function code of the device (or OCP_ANY_ID) - * @idx: index of the device (or OCP_ANY_INDEX) - * - * This function allows a lookup of a given ocp_def by it's - * vendor, function, and index. The main purpose for is to - * allow modification of the def before binding to the driver - */ -struct ocp_def * -ocp_get_one_device(unsigned int vendor, unsigned int function, int index) -{ - struct ocp_device *dev; - struct ocp_def *found = NULL; - - DBG(("ocp: ocp_get_one_device(vendor: %x, function: %x, index: %d)...\n", - vendor, function, index)); - - dev = ocp_find_device(vendor, function, index); - - if (dev) - found = dev->def; - - DBG(("ocp: ocp_get_one_device(vendor: %x, function: %x, index: %d)... done.\n", - vendor, function, index)); - - return found; -} - -/** - * ocp_add_one_device - Add a device - * @def: static device definition structure - * - * This function adds a device definition to the - * device list. It may only be called before - * ocp_driver_init() and will return an error - * otherwise. - */ -int -ocp_add_one_device(struct ocp_def *def) -{ - struct ocp_device *dev; - - DBG(("ocp: ocp_add_one_device()...\n")); - - /* Can't be called after ocp driver init */ - if (ocp_inited) - return 1; - - if (mem_init_done) - dev = kmalloc(sizeof(*dev), GFP_KERNEL); - else - dev = alloc_bootmem(sizeof(*dev)); - - if (dev == NULL) - return 1; - memset(dev, 0, sizeof(*dev)); - dev->def = def; - dev->current_state = 4; - sprintf(dev->name, "OCP device %04x:%04x:%04x", - dev->def->vendor, dev->def->function, dev->def->index); - down_write(&ocp_devices_sem); - list_add_tail(&dev->link, &ocp_devices); - up_write(&ocp_devices_sem); - - DBG(("ocp: ocp_add_one_device()...done\n")); - - return 0; -} - -/** - * ocp_remove_one_device - Remove a device by function & index - * @vendor: vendor ID of the device (or OCP_ANY_ID) - * @function: function code of the device (or OCP_ANY_ID) - * @idx: index of the device (or OCP_ANY_INDEX) - * - * This function allows removal of a given function by its - * index. It may only be called before ocp_driver_init() - * and will return an error otherwise. - */ -int -ocp_remove_one_device(unsigned int vendor, unsigned int function, int index) -{ - struct ocp_device *dev; - - DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)...\n", vendor, function, index)); - - /* Can't be called after ocp driver init */ - if (ocp_inited) - return 1; - - down_write(&ocp_devices_sem); - dev = __ocp_find_device(vendor, function, index); - list_del(&dev->link); - up_write(&ocp_devices_sem); - - DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)... done.\n", vendor, function, index)); - - return 0; -} - -/** - * ocp_for_each_device - Iterate over OCP devices - * @callback: routine to execute for each ocp device. - * @arg: user data to be passed to callback routine. - * - * This routine holds the ocp_device semaphore, so the - * callback routine cannot modify the ocp_device list. - */ -void -ocp_for_each_device(void(*callback)(struct ocp_device *, void *arg), void *arg) -{ - struct list_head *entry; - - if (callback) { - down_read(&ocp_devices_sem); - list_for_each(entry, &ocp_devices) - callback(list_entry(entry, struct ocp_device, link), - arg); - up_read(&ocp_devices_sem); - } -} - -/** - * ocp_early_init - Init OCP device management - * - * This function builds the list of devices before setup_arch. - * This allows platform code to modify the device lists before - * they are bound to drivers (changes to paddr, removing devices - * etc) - */ -int __init -ocp_early_init(void) -{ - struct ocp_def *def; - - DBG(("ocp: ocp_early_init()...\n")); - - /* Fill the devices list */ - for (def = core_ocp; def->vendor != OCP_VENDOR_INVALID; def++) - ocp_add_one_device(def); - - DBG(("ocp: ocp_early_init()... done.\n")); - - return 0; -} - -/** - * ocp_driver_init - Init OCP device management - * - * This function is meant to be called via OCP bus registration. - */ -static int __init -ocp_driver_init(void) -{ - int ret = 0, index = 0; - struct device *ocp_bus; - struct list_head *entry; - struct ocp_device *dev; - - if (ocp_inited) - return ret; - ocp_inited = 1; - - DBG(("ocp: ocp_driver_init()...\n")); - - /* Allocate/register primary OCP bus */ - ocp_bus = kzalloc(sizeof(struct device), GFP_KERNEL); - if (ocp_bus == NULL) - return 1; - strcpy(ocp_bus->bus_id, "ocp"); - - bus_register(&ocp_bus_type); - - device_register(ocp_bus); - - /* Put each OCP device into global device list */ - list_for_each(entry, &ocp_devices) { - dev = list_entry(entry, struct ocp_device, link); - sprintf(dev->dev.bus_id, "%2.2x", index); - dev->dev.parent = ocp_bus; - dev->dev.bus = &ocp_bus_type; - device_register(&dev->dev); - ocp_create_sysfs_dev_files(dev); - index++; - } - - DBG(("ocp: ocp_driver_init()... done.\n")); - - return 0; -} - -postcore_initcall(ocp_driver_init); - -EXPORT_SYMBOL(ocp_bus_type); -EXPORT_SYMBOL(ocp_find_device); -EXPORT_SYMBOL(ocp_register_driver); -EXPORT_SYMBOL(ocp_unregister_driver); diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c deleted file mode 100644 index 67dffe27b5c3135312640e7c30e33c578f686886..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/open_pic.c +++ /dev/null @@ -1,1087 +0,0 @@ -/* - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "open_pic_defs.h" - -#if defined(CONFIG_PRPMC800) -#define OPENPIC_BIG_ENDIAN -#endif - -void __iomem *OpenPIC_Addr; -static volatile struct OpenPIC __iomem *OpenPIC = NULL; - -/* - * We define OpenPIC_InitSenses table thusly: - * bit 0x1: sense, 0 for edge and 1 for level. - * bit 0x2: polarity, 0 for negative, 1 for positive. - */ -u_int OpenPIC_NumInitSenses __initdata = 0; -u_char *OpenPIC_InitSenses __initdata = NULL; -extern int use_of_interrupt_tree; - -static u_int NumProcessors; -static u_int NumSources; -static int open_pic_irq_offset; -static volatile OpenPIC_Source __iomem *ISR[NR_IRQS]; -static int openpic_cascade_irq = -1; -static int (*openpic_cascade_fn)(void); - -/* Global Operations */ -static void openpic_disable_8259_pass_through(void); -static void openpic_set_spurious(u_int vector); - -#ifdef CONFIG_SMP -/* Interprocessor Interrupts */ -static void openpic_initipi(u_int ipi, u_int pri, u_int vector); -static irqreturn_t openpic_ipi_action(int cpl, void *dev_id); -#endif - -/* Timer Interrupts */ -static void openpic_inittimer(u_int timer, u_int pri, u_int vector); -static void openpic_maptimer(u_int timer, cpumask_t cpumask); - -/* Interrupt Sources */ -static void openpic_enable_irq(u_int irq); -static void openpic_disable_irq(u_int irq); -static void openpic_initirq(u_int irq, u_int pri, u_int vector, int polarity, - int is_level); -static void openpic_mapirq(u_int irq, cpumask_t cpumask, cpumask_t keepmask); - -/* - * These functions are not used but the code is kept here - * for completeness and future reference. - */ -#ifdef notused -static void openpic_enable_8259_pass_through(void); -static u_int openpic_get_spurious(void); -static void openpic_set_sense(u_int irq, int sense); -#endif /* notused */ - -/* - * Description of the openpic for the higher-level irq code - */ -static void openpic_end_irq(unsigned int irq_nr); -static void openpic_ack_irq(unsigned int irq_nr); -static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask); - -struct hw_interrupt_type open_pic = { - .typename = " OpenPIC ", - .enable = openpic_enable_irq, - .disable = openpic_disable_irq, - .ack = openpic_ack_irq, - .end = openpic_end_irq, - .set_affinity = openpic_set_affinity, -}; - -#ifdef CONFIG_SMP -static void openpic_end_ipi(unsigned int irq_nr); -static void openpic_ack_ipi(unsigned int irq_nr); -static void openpic_enable_ipi(unsigned int irq_nr); -static void openpic_disable_ipi(unsigned int irq_nr); - -struct hw_interrupt_type open_pic_ipi = { - .typename = " OpenPIC ", - .enable = openpic_enable_ipi, - .disable = openpic_disable_ipi, - .ack = openpic_ack_ipi, - .end = openpic_end_ipi, -}; -#endif /* CONFIG_SMP */ - -/* - * Accesses to the current processor's openpic registers - */ -#ifdef CONFIG_SMP -#define THIS_CPU Processor[cpu] -#define DECL_THIS_CPU int cpu = smp_hw_index[smp_processor_id()] -#define CHECK_THIS_CPU check_arg_cpu(cpu) -#else -#define THIS_CPU Processor[0] -#define DECL_THIS_CPU -#define CHECK_THIS_CPU -#endif /* CONFIG_SMP */ - -#if 1 -#define check_arg_ipi(ipi) \ - if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \ - printk("open_pic.c:%d: invalid ipi %d\n", __LINE__, ipi); -#define check_arg_timer(timer) \ - if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \ - printk("open_pic.c:%d: invalid timer %d\n", __LINE__, timer); -#define check_arg_vec(vec) \ - if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \ - printk("open_pic.c:%d: invalid vector %d\n", __LINE__, vec); -#define check_arg_pri(pri) \ - if (pri < 0 || pri >= OPENPIC_NUM_PRI) \ - printk("open_pic.c:%d: invalid priority %d\n", __LINE__, pri); -/* - * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's - * data has probably been corrupted and we're going to panic or deadlock later - * anyway --Troy - */ -#define check_arg_irq(irq) \ - if (irq < open_pic_irq_offset || irq >= NumSources+open_pic_irq_offset \ - || ISR[irq - open_pic_irq_offset] == 0) { \ - printk("open_pic.c:%d: invalid irq %d\n", __LINE__, irq); \ - dump_stack(); } -#define check_arg_cpu(cpu) \ - if (cpu < 0 || cpu >= NumProcessors){ \ - printk("open_pic.c:%d: invalid cpu %d\n", __LINE__, cpu); \ - dump_stack(); } -#else -#define check_arg_ipi(ipi) do {} while (0) -#define check_arg_timer(timer) do {} while (0) -#define check_arg_vec(vec) do {} while (0) -#define check_arg_pri(pri) do {} while (0) -#define check_arg_irq(irq) do {} while (0) -#define check_arg_cpu(cpu) do {} while (0) -#endif - -u_int openpic_read(volatile u_int __iomem *addr) -{ - u_int val; - -#ifdef OPENPIC_BIG_ENDIAN - val = in_be32(addr); -#else - val = in_le32(addr); -#endif - return val; -} - -static inline void openpic_write(volatile u_int __iomem *addr, u_int val) -{ -#ifdef OPENPIC_BIG_ENDIAN - out_be32(addr, val); -#else - out_le32(addr, val); -#endif -} - -static inline u_int openpic_readfield(volatile u_int __iomem *addr, u_int mask) -{ - u_int val = openpic_read(addr); - return val & mask; -} - -inline void openpic_writefield(volatile u_int __iomem *addr, u_int mask, - u_int field) -{ - u_int val = openpic_read(addr); - openpic_write(addr, (val & ~mask) | (field & mask)); -} - -static inline void openpic_clearfield(volatile u_int __iomem *addr, u_int mask) -{ - openpic_writefield(addr, mask, 0); -} - -static inline void openpic_setfield(volatile u_int __iomem *addr, u_int mask) -{ - openpic_writefield(addr, mask, mask); -} - -static void openpic_safe_writefield(volatile u_int __iomem *addr, u_int mask, - u_int field) -{ - openpic_setfield(addr, OPENPIC_MASK); - while (openpic_read(addr) & OPENPIC_ACTIVITY); - openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK); -} - -#ifdef CONFIG_SMP -/* yes this is right ... bug, feature, you decide! -- tgall */ -u_int openpic_read_IPI(volatile u_int __iomem * addr) -{ - u_int val = 0; -#if defined(OPENPIC_BIG_ENDIAN) - val = in_be32(addr); -#else - val = in_le32(addr); -#endif - return val; -} - -/* because of the power3 be / le above, this is needed */ -inline void openpic_writefield_IPI(volatile u_int __iomem * addr, u_int mask, u_int field) -{ - u_int val = openpic_read_IPI(addr); - openpic_write(addr, (val & ~mask) | (field & mask)); -} - -static inline void openpic_clearfield_IPI(volatile u_int __iomem *addr, u_int mask) -{ - openpic_writefield_IPI(addr, mask, 0); -} - -static inline void openpic_setfield_IPI(volatile u_int __iomem *addr, u_int mask) -{ - openpic_writefield_IPI(addr, mask, mask); -} - -static void openpic_safe_writefield_IPI(volatile u_int __iomem *addr, u_int mask, u_int field) -{ - openpic_setfield_IPI(addr, OPENPIC_MASK); - - /* wait until it's not in use */ - /* BenH: Is this code really enough ? I would rather check the result - * and eventually retry ... - */ - while(openpic_read_IPI(addr) & OPENPIC_ACTIVITY); - - openpic_writefield_IPI(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK); -} -#endif /* CONFIG_SMP */ - -#ifdef CONFIG_EPIC_SERIAL_MODE -/* On platforms that may use EPIC serial mode, the default is enabled. */ -int epic_serial_mode = 1; - -static void __init openpic_eicr_set_clk(u_int clkval) -{ - openpic_writefield(&OpenPIC->Global.Global_Configuration1, - OPENPIC_EICR_S_CLK_MASK, (clkval << 28)); -} - -static void __init openpic_enable_sie(void) -{ - openpic_setfield(&OpenPIC->Global.Global_Configuration1, - OPENPIC_EICR_SIE); -} -#endif - -#if defined(CONFIG_EPIC_SERIAL_MODE) -static void openpic_reset(void) -{ - openpic_setfield(&OpenPIC->Global.Global_Configuration0, - OPENPIC_CONFIG_RESET); - while (openpic_readfield(&OpenPIC->Global.Global_Configuration0, - OPENPIC_CONFIG_RESET)) - mb(); -} -#endif - -void __init openpic_set_sources(int first_irq, int num_irqs, void __iomem *first_ISR) -{ - volatile OpenPIC_Source __iomem *src = first_ISR; - int i, last_irq; - - last_irq = first_irq + num_irqs; - if (last_irq > NumSources) - NumSources = last_irq; - if (src == 0) - src = &((struct OpenPIC __iomem *)OpenPIC_Addr)->Source[first_irq]; - for (i = first_irq; i < last_irq; ++i, ++src) - ISR[i] = src; -} - -/* - * The `offset' parameter defines where the interrupts handled by the - * OpenPIC start in the space of interrupt numbers that the kernel knows - * about. In other words, the OpenPIC's IRQ0 is numbered `offset' in the - * kernel's interrupt numbering scheme. - * We assume there is only one OpenPIC. - */ -void __init openpic_init(int offset) -{ - u_int t, i; - u_int timerfreq; - const char *version; - - if (!OpenPIC_Addr) { - printk("No OpenPIC found !\n"); - return; - } - OpenPIC = (volatile struct OpenPIC __iomem *)OpenPIC_Addr; - -#ifdef CONFIG_EPIC_SERIAL_MODE - /* Have to start from ground zero. - */ - openpic_reset(); -#endif - - if (ppc_md.progress) ppc_md.progress("openpic: enter", 0x122); - - t = openpic_read(&OpenPIC->Global.Feature_Reporting0); - switch (t & OPENPIC_FEATURE_VERSION_MASK) { - case 1: - version = "1.0"; - break; - case 2: - version = "1.2"; - break; - case 3: - version = "1.3"; - break; - default: - version = "?"; - break; - } - NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >> - OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1; - if (NumSources == 0) - openpic_set_sources(0, - ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >> - OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1, - NULL); - printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n", - version, NumProcessors, NumSources, OpenPIC); - timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency); - if (timerfreq) - printk("OpenPIC timer frequency is %d.%06d MHz\n", - timerfreq / 1000000, timerfreq % 1000000); - - open_pic_irq_offset = offset; - - /* Initialize timer interrupts */ - if ( ppc_md.progress ) ppc_md.progress("openpic: timer",0x3ba); - for (i = 0; i < OPENPIC_NUM_TIMERS; i++) { - /* Disabled, Priority 0 */ - openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i+offset); - /* No processor */ - openpic_maptimer(i, CPU_MASK_NONE); - } - -#ifdef CONFIG_SMP - /* Initialize IPI interrupts */ - if ( ppc_md.progress ) ppc_md.progress("openpic: ipi",0x3bb); - for (i = 0; i < OPENPIC_NUM_IPI; i++) { - /* Disabled, increased priorities 10..13 */ - openpic_initipi(i, OPENPIC_PRIORITY_IPI_BASE+i, - OPENPIC_VEC_IPI+i+offset); - /* IPIs are per-CPU */ - irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU; - irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi; - } -#endif - - /* Initialize external interrupts */ - if (ppc_md.progress) ppc_md.progress("openpic: external",0x3bc); - - openpic_set_priority(0xf); - - /* Init all external sources, including possibly the cascade. */ - for (i = 0; i < NumSources; i++) { - int sense; - - if (ISR[i] == 0) - continue; - - /* the bootloader may have left it enabled (bad !) */ - openpic_disable_irq(i+offset); - - sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: \ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE); - - if (sense & IRQ_SENSE_MASK) - irq_desc[i+offset].status = IRQ_LEVEL; - - /* Enabled, Default priority */ - openpic_initirq(i, OPENPIC_PRIORITY_DEFAULT, i+offset, - (sense & IRQ_POLARITY_MASK), - (sense & IRQ_SENSE_MASK)); - /* Processor 0 */ - openpic_mapirq(i, CPU_MASK_CPU0, CPU_MASK_NONE); - } - - /* Init descriptors */ - for (i = offset; i < NumSources + offset; i++) - irq_desc[i].chip = &open_pic; - - /* Initialize the spurious interrupt */ - if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd); - openpic_set_spurious(OPENPIC_VEC_SPURIOUS); - openpic_disable_8259_pass_through(); -#ifdef CONFIG_EPIC_SERIAL_MODE - if (epic_serial_mode) { - openpic_eicr_set_clk(7); /* Slowest value until we know better */ - openpic_enable_sie(); - } -#endif - openpic_set_priority(0); - - if (ppc_md.progress) ppc_md.progress("openpic: exit",0x222); -} - -#ifdef notused -static void openpic_enable_8259_pass_through(void) -{ - openpic_clearfield(&OpenPIC->Global.Global_Configuration0, - OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE); -} -#endif /* notused */ - -static void openpic_disable_8259_pass_through(void) -{ - openpic_setfield(&OpenPIC->Global.Global_Configuration0, - OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE); -} - -/* - * Find out the current interrupt - */ -u_int openpic_irq(void) -{ - u_int vec; - DECL_THIS_CPU; - - CHECK_THIS_CPU; - vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge, - OPENPIC_VECTOR_MASK); - return vec; -} - -void openpic_eoi(void) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - openpic_write(&OpenPIC->THIS_CPU.EOI, 0); - /* Handle PCI write posting */ - (void)openpic_read(&OpenPIC->THIS_CPU.EOI); -} - -u_int openpic_get_priority(void) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK); -} - -void openpic_set_priority(u_int pri) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - check_arg_pri(pri); - openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri); -} - -/* - * Get/set the spurious vector - */ -#ifdef notused -static u_int openpic_get_spurious(void) -{ - return openpic_readfield(&OpenPIC->Global.Spurious_Vector, - OPENPIC_VECTOR_MASK); -} -#endif /* notused */ - -static void openpic_set_spurious(u_int vec) -{ - check_arg_vec(vec); - openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK, - vec); -} - -#ifdef CONFIG_SMP -/* - * Convert a cpu mask from logical to physical cpu numbers. - */ -static inline cpumask_t physmask(cpumask_t cpumask) -{ - int i; - cpumask_t mask = CPU_MASK_NONE; - - cpus_and(cpumask, cpu_online_map, cpumask); - - for (i = 0; i < NR_CPUS; i++) - if (cpu_isset(i, cpumask)) - cpu_set(smp_hw_index[i], mask); - - return mask; -} -#else -#define physmask(cpumask) (cpumask) -#endif - -void openpic_reset_processor_phys(u_int mask) -{ - openpic_write(&OpenPIC->Global.Processor_Initialization, mask); -} - -#if defined(CONFIG_SMP) || defined(CONFIG_PM) -static DEFINE_SPINLOCK(openpic_setup_lock); -#endif - -#ifdef CONFIG_SMP -/* - * Initialize an interprocessor interrupt (and disable it) - * - * ipi: OpenPIC interprocessor interrupt number - * pri: interrupt source priority - * vec: the vector it will produce - */ -static void __init openpic_initipi(u_int ipi, u_int pri, u_int vec) -{ - check_arg_ipi(ipi); - check_arg_pri(pri); - check_arg_vec(vec); - openpic_safe_writefield_IPI(&OpenPIC->Global.IPI_Vector_Priority(ipi), - OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK, - (pri << OPENPIC_PRIORITY_SHIFT) | vec); -} - -/* - * Send an IPI to one or more CPUs - * - * Externally called, however, it takes an IPI number (0...OPENPIC_NUM_IPI) - * and not a system-wide interrupt number - */ -void openpic_cause_IPI(u_int ipi, cpumask_t cpumask) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - check_arg_ipi(ipi); - openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi), - cpus_addr(physmask(cpumask))[0]); -} - -void openpic_request_IPIs(void) -{ - int i; - - /* - * Make sure this matches what is defined in smp.c for - * smp_message_{pass|recv}() or what shows up in - * /proc/interrupts will be wrong!!! --Troy */ - - if (OpenPIC == NULL) - return; - - /* - * IPIs are marked IRQF_DISABLED as they must run with irqs - * disabled - */ - request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset, - openpic_ipi_action, IRQF_DISABLED, - "IPI0 (call function)", NULL); - request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1, - openpic_ipi_action, IRQF_DISABLED, - "IPI1 (reschedule)", NULL); - request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2, - openpic_ipi_action, IRQF_DISABLED, - "IPI2 (invalidate tlb)", NULL); - request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3, - openpic_ipi_action, IRQF_DISABLED, - "IPI3 (xmon break)", NULL); - - for ( i = 0; i < OPENPIC_NUM_IPI ; i++ ) - openpic_enable_ipi(OPENPIC_VEC_IPI+open_pic_irq_offset+i); -} - -/* - * Do per-cpu setup for SMP systems. - * - * Get IPI's working and start taking interrupts. - * -- Cort - */ - -void __devinit do_openpic_setup_cpu(void) -{ -#ifdef CONFIG_IRQ_ALL_CPUS - int i; - cpumask_t msk = CPU_MASK_NONE; -#endif - spin_lock(&openpic_setup_lock); - -#ifdef CONFIG_IRQ_ALL_CPUS - cpu_set(smp_hw_index[smp_processor_id()], msk); - - /* let the openpic know we want intrs. default affinity - * is 0xffffffff until changed via /proc - * That's how it's done on x86. If we want it differently, then - * we should make sure we also change the default values of - * irq_desc[].affinity in irq.c. - */ - for (i = 0; i < NumSources; i++) - openpic_mapirq(i, msk, CPU_MASK_ALL); -#endif /* CONFIG_IRQ_ALL_CPUS */ - openpic_set_priority(0); - - spin_unlock(&openpic_setup_lock); -} -#endif /* CONFIG_SMP */ - -/* - * Initialize a timer interrupt (and disable it) - * - * timer: OpenPIC timer number - * pri: interrupt source priority - * vec: the vector it will produce - */ -static void __init openpic_inittimer(u_int timer, u_int pri, u_int vec) -{ - check_arg_timer(timer); - check_arg_pri(pri); - check_arg_vec(vec); - openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority, - OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK, - (pri << OPENPIC_PRIORITY_SHIFT) | vec); -} - -/* - * Map a timer interrupt to one or more CPUs - */ -static void __init openpic_maptimer(u_int timer, cpumask_t cpumask) -{ - cpumask_t phys = physmask(cpumask); - check_arg_timer(timer); - openpic_write(&OpenPIC->Global.Timer[timer].Destination, - cpus_addr(phys)[0]); -} - -/* - * Change the priority of an interrupt - */ -void __init -openpic_set_irq_priority(u_int irq, u_int pri) -{ - check_arg_irq(irq); - openpic_safe_writefield(&ISR[irq - open_pic_irq_offset]->Vector_Priority, - OPENPIC_PRIORITY_MASK, - pri << OPENPIC_PRIORITY_SHIFT); -} - -/* - * Initalize the interrupt source which will generate an NMI. - * This raises the interrupt's priority from 8 to 9. - * - * irq: The logical IRQ which generates an NMI. - */ -void __init -openpic_init_nmi_irq(u_int irq) -{ - check_arg_irq(irq); - openpic_set_irq_priority(irq, OPENPIC_PRIORITY_NMI); -} - -/* - * - * All functions below take an offset'ed irq argument - * - */ - -/* - * Hookup a cascade to the OpenPIC. - */ - -static struct irqaction openpic_cascade_irqaction = { - .handler = no_action, - .flags = IRQF_DISABLED, - .mask = CPU_MASK_NONE, -}; - -void __init -openpic_hookup_cascade(u_int irq, char *name, - int (*cascade_fn)(void)) -{ - openpic_cascade_irq = irq; - openpic_cascade_fn = cascade_fn; - - if (setup_irq(irq, &openpic_cascade_irqaction)) - printk("Unable to get OpenPIC IRQ %d for cascade\n", - irq - open_pic_irq_offset); -} - -/* - * Enable/disable an external interrupt source - * - * Externally called, irq is an offseted system-wide interrupt number - */ -static void openpic_enable_irq(u_int irq) -{ - volatile u_int __iomem *vpp; - - check_arg_irq(irq); - vpp = &ISR[irq - open_pic_irq_offset]->Vector_Priority; - openpic_clearfield(vpp, OPENPIC_MASK); - /* make sure mask gets to controller before we return to user */ - do { - mb(); /* sync is probably useless here */ - } while (openpic_readfield(vpp, OPENPIC_MASK)); -} - -static void openpic_disable_irq(u_int irq) -{ - volatile u_int __iomem *vpp; - u32 vp; - - check_arg_irq(irq); - vpp = &ISR[irq - open_pic_irq_offset]->Vector_Priority; - openpic_setfield(vpp, OPENPIC_MASK); - /* make sure mask gets to controller before we return to user */ - do { - mb(); /* sync is probably useless here */ - vp = openpic_readfield(vpp, OPENPIC_MASK | OPENPIC_ACTIVITY); - } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK)); -} - -#ifdef CONFIG_SMP -/* - * Enable/disable an IPI interrupt source - * - * Externally called, irq is an offseted system-wide interrupt number - */ -void openpic_enable_ipi(u_int irq) -{ - irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset); - check_arg_ipi(irq); - openpic_clearfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK); - -} - -void openpic_disable_ipi(u_int irq) -{ - irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset); - check_arg_ipi(irq); - openpic_setfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK); -} -#endif - -/* - * Initialize an interrupt source (and disable it!) - * - * irq: OpenPIC interrupt number - * pri: interrupt source priority - * vec: the vector it will produce - * pol: polarity (1 for positive, 0 for negative) - * sense: 1 for level, 0 for edge - */ -static void __init -openpic_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense) -{ - openpic_safe_writefield(&ISR[irq]->Vector_Priority, - OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK | - OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK, - (pri << OPENPIC_PRIORITY_SHIFT) | vec | - (pol ? OPENPIC_POLARITY_POSITIVE : - OPENPIC_POLARITY_NEGATIVE) | - (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE)); -} - -/* - * Map an interrupt source to one or more CPUs - */ -static void openpic_mapirq(u_int irq, cpumask_t physmask, cpumask_t keepmask) -{ - if (ISR[irq] == 0) - return; - if (!cpus_empty(keepmask)) { - cpumask_t irqdest = { .bits[0] = openpic_read(&ISR[irq]->Destination) }; - cpus_and(irqdest, irqdest, keepmask); - cpus_or(physmask, physmask, irqdest); - } - openpic_write(&ISR[irq]->Destination, cpus_addr(physmask)[0]); -} - -#ifdef notused -/* - * Set the sense for an interrupt source (and disable it!) - * - * sense: 1 for level, 0 for edge - */ -static void openpic_set_sense(u_int irq, int sense) -{ - if (ISR[irq] != 0) - openpic_safe_writefield(&ISR[irq]->Vector_Priority, - OPENPIC_SENSE_LEVEL, - (sense ? OPENPIC_SENSE_LEVEL : 0)); -} -#endif /* notused */ - -/* No spinlocks, should not be necessary with the OpenPIC - * (1 register = 1 interrupt and we have the desc lock). - */ -static void openpic_ack_irq(unsigned int irq_nr) -{ -#ifdef __SLOW_VERSION__ - openpic_disable_irq(irq_nr); - openpic_eoi(); -#else - if ((irq_desc[irq_nr].status & IRQ_LEVEL) == 0) - openpic_eoi(); -#endif -} - -static void openpic_end_irq(unsigned int irq_nr) -{ -#ifdef __SLOW_VERSION__ - if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && irq_desc[irq_nr].action) - openpic_enable_irq(irq_nr); -#else - if ((irq_desc[irq_nr].status & IRQ_LEVEL) != 0) - openpic_eoi(); -#endif -} - -static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask) -{ - openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpumask), CPU_MASK_NONE); -} - -#ifdef CONFIG_SMP -static void openpic_ack_ipi(unsigned int irq_nr) -{ - openpic_eoi(); -} - -static void openpic_end_ipi(unsigned int irq_nr) -{ -} - -static irqreturn_t openpic_ipi_action(int cpl, void *dev_id) -{ - smp_message_recv(cpl-OPENPIC_VEC_IPI-open_pic_irq_offset); - return IRQ_HANDLED; -} - -#endif /* CONFIG_SMP */ - -int -openpic_get_irq(void) -{ - int irq = openpic_irq(); - - /* - * Check for the cascade interrupt and call the cascaded - * interrupt controller function (usually i8259_irq) if so. - * This should move to irq.c eventually. -- paulus - */ - if (irq == openpic_cascade_irq && openpic_cascade_fn != NULL) { - int cirq = openpic_cascade_fn(); - - /* Allow for the cascade being shared with other devices */ - if (cirq != -1) { - irq = cirq; - openpic_eoi(); - } - } else if (irq == OPENPIC_VEC_SPURIOUS) - irq = -1; - return irq; -} - -#ifdef CONFIG_SMP -void -smp_openpic_message_pass(int target, int msg) -{ - cpumask_t mask = CPU_MASK_ALL; - /* make sure we're sending something that translates to an IPI */ - if (msg > 0x3) { - printk("SMP %d: smp_message_pass: unknown msg %d\n", - smp_processor_id(), msg); - return; - } - switch (target) { - case MSG_ALL: - openpic_cause_IPI(msg, mask); - break; - case MSG_ALL_BUT_SELF: - cpu_clear(smp_processor_id(), mask); - openpic_cause_IPI(msg, mask); - break; - default: - openpic_cause_IPI(msg, cpumask_of_cpu(target)); - break; - } -} -#endif /* CONFIG_SMP */ - -#ifdef CONFIG_PM - -/* - * We implement the IRQ controller as a sysdev and put it - * to sleep at powerdown stage (the callback is named suspend, - * but it's old semantics, for the Device Model, it's really - * powerdown). The possible problem is that another sysdev that - * happens to be suspend after this one will have interrupts off, - * that may be an issue... For now, this isn't an issue on pmac - * though... - */ - -static u32 save_ipi_vp[OPENPIC_NUM_IPI]; -static u32 save_irq_src_vp[OPENPIC_MAX_SOURCES]; -static u32 save_irq_src_dest[OPENPIC_MAX_SOURCES]; -static u32 save_cpu_task_pri[OPENPIC_MAX_PROCESSORS]; -static int openpic_suspend_count; - -static void openpic_cached_enable_irq(u_int irq) -{ - check_arg_irq(irq); - save_irq_src_vp[irq - open_pic_irq_offset] &= ~OPENPIC_MASK; -} - -static void openpic_cached_disable_irq(u_int irq) -{ - check_arg_irq(irq); - save_irq_src_vp[irq - open_pic_irq_offset] |= OPENPIC_MASK; -} - -/* WARNING: Can be called directly by the cpufreq code with NULL parameter, - * we need something better to deal with that... Maybe switch to S1 for - * cpufreq changes - */ -int openpic_suspend(struct sys_device *sysdev, pm_message_t state) -{ - int i; - unsigned long flags; - - spin_lock_irqsave(&openpic_setup_lock, flags); - - if (openpic_suspend_count++ > 0) { - spin_unlock_irqrestore(&openpic_setup_lock, flags); - return 0; - } - - openpic_set_priority(0xf); - - open_pic.enable = openpic_cached_enable_irq; - open_pic.disable = openpic_cached_disable_irq; - - for (i=0; iProcessor[i].Current_Task_Priority); - openpic_writefield(&OpenPIC->Processor[i].Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK, 0xf); - } - - for (i=0; iGlobal.IPI_Vector_Priority(i)); - for (i=0; iVector_Priority) & ~OPENPIC_ACTIVITY; - save_irq_src_dest[i] = openpic_read(&ISR[i]->Destination); - } - - spin_unlock_irqrestore(&openpic_setup_lock, flags); - - return 0; -} - -/* WARNING: Can be called directly by the cpufreq code with NULL parameter, - * we need something better to deal with that... Maybe switch to S1 for - * cpufreq changes - */ -int openpic_resume(struct sys_device *sysdev) -{ - int i; - unsigned long flags; - u32 vppmask = OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK | - OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK | - OPENPIC_MASK; - - spin_lock_irqsave(&openpic_setup_lock, flags); - - if ((--openpic_suspend_count) > 0) { - spin_unlock_irqrestore(&openpic_setup_lock, flags); - return 0; - } - - /* OpenPIC sometimes seem to need some time to be fully back up... */ - do { - openpic_set_spurious(OPENPIC_VEC_SPURIOUS); - } while(openpic_readfield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK) - != OPENPIC_VEC_SPURIOUS); - - openpic_disable_8259_pass_through(); - - for (i=0; iGlobal.IPI_Vector_Priority(i), - save_ipi_vp[i]); - for (i=0; iDestination, save_irq_src_dest[i]); - openpic_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]); - /* make sure mask gets to controller before we return to user */ - do { - openpic_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]); - } while (openpic_readfield(&ISR[i]->Vector_Priority, vppmask) - != (save_irq_src_vp[i] & vppmask)); - } - for (i=0; iProcessor[i].Current_Task_Priority, - save_cpu_task_pri[i]); - - open_pic.enable = openpic_enable_irq; - open_pic.disable = openpic_disable_irq; - - openpic_set_priority(0); - - spin_unlock_irqrestore(&openpic_setup_lock, flags); - - return 0; -} - -#endif /* CONFIG_PM */ - -static struct sysdev_class openpic_sysclass = { - .name = "openpic", -}; - -static struct sys_device device_openpic = { - .id = 0, - .cls = &openpic_sysclass, -}; - -static struct sysdev_driver driver_openpic = { -#ifdef CONFIG_PM - .suspend = &openpic_suspend, - .resume = &openpic_resume, -#endif /* CONFIG_PM */ -}; - -static int __init init_openpic_sysfs(void) -{ - int rc; - - if (!OpenPIC_Addr) - return -ENODEV; - printk(KERN_DEBUG "Registering openpic with sysfs...\n"); - rc = sysdev_class_register(&openpic_sysclass); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys class\n"); - return -ENODEV; - } - rc = sysdev_register(&device_openpic); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys device\n"); - return -ENODEV; - } - rc = sysdev_driver_register(&openpic_sysclass, &driver_openpic); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys driver\n"); - return -ENODEV; - } - return 0; -} - -subsys_initcall(init_openpic_sysfs); - diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c deleted file mode 100644 index 449075a0479803f9c17d52fc240f8dbeffcf4478..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/open_pic2.c +++ /dev/null @@ -1,710 +0,0 @@ -/* - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - * - * This is a duplicate of open_pic.c that deals with U3s MPIC on - * G5 PowerMacs. It's the same file except it's using big endian - * register accesses - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "open_pic_defs.h" - -void *OpenPIC2_Addr; -static volatile struct OpenPIC *OpenPIC2 = NULL; -/* - * We define OpenPIC_InitSenses table thusly: - * bit 0x1: sense, 0 for edge and 1 for level. - * bit 0x2: polarity, 0 for negative, 1 for positive. - */ -extern u_int OpenPIC_NumInitSenses; -extern u_char *OpenPIC_InitSenses; -extern int use_of_interrupt_tree; - -static u_int NumProcessors; -static u_int NumSources; -static int open_pic2_irq_offset; -static volatile OpenPIC_Source *ISR[NR_IRQS]; - -/* Global Operations */ -static void openpic2_disable_8259_pass_through(void); -static void openpic2_set_priority(u_int pri); -static void openpic2_set_spurious(u_int vector); - -/* Timer Interrupts */ -static void openpic2_inittimer(u_int timer, u_int pri, u_int vector); -static void openpic2_maptimer(u_int timer, u_int cpumask); - -/* Interrupt Sources */ -static void openpic2_enable_irq(u_int irq); -static void openpic2_disable_irq(u_int irq); -static void openpic2_initirq(u_int irq, u_int pri, u_int vector, int polarity, - int is_level); -static void openpic2_mapirq(u_int irq, u_int cpumask, u_int keepmask); - -/* - * These functions are not used but the code is kept here - * for completeness and future reference. - */ -static void openpic2_reset(void); -#ifdef notused -static void openpic2_enable_8259_pass_through(void); -static u_int openpic2_get_priority(void); -static u_int openpic2_get_spurious(void); -static void openpic2_set_sense(u_int irq, int sense); -#endif /* notused */ - -/* - * Description of the openpic for the higher-level irq code - */ -static void openpic2_end_irq(unsigned int irq_nr); -static void openpic2_ack_irq(unsigned int irq_nr); - -struct hw_interrupt_type open_pic2 = { - .typename = " OpenPIC2 ", - .enable = openpic2_enable_irq, - .disable = openpic2_disable_irq, - .ack = openpic2_ack_irq, - .end = openpic2_end_irq, -}; - -/* - * Accesses to the current processor's openpic registers - * On cascaded controller, this is only CPU 0 - */ -#define THIS_CPU Processor[0] -#define DECL_THIS_CPU -#define CHECK_THIS_CPU - -#if 1 -#define check_arg_ipi(ipi) \ - if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \ - printk("open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi); -#define check_arg_timer(timer) \ - if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \ - printk("open_pic.c:%d: illegal timer %d\n", __LINE__, timer); -#define check_arg_vec(vec) \ - if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \ - printk("open_pic.c:%d: illegal vector %d\n", __LINE__, vec); -#define check_arg_pri(pri) \ - if (pri < 0 || pri >= OPENPIC_NUM_PRI) \ - printk("open_pic.c:%d: illegal priority %d\n", __LINE__, pri); -/* - * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's - * data has probably been corrupted and we're going to panic or deadlock later - * anyway --Troy - */ -extern unsigned long* _get_SP(void); -#define check_arg_irq(irq) \ - if (irq < open_pic2_irq_offset || irq >= NumSources+open_pic2_irq_offset \ - || ISR[irq - open_pic2_irq_offset] == 0) { \ - printk("open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \ - /*print_backtrace(_get_SP());*/ } -#define check_arg_cpu(cpu) \ - if (cpu < 0 || cpu >= NumProcessors){ \ - printk("open_pic2.c:%d: illegal cpu %d\n", __LINE__, cpu); \ - /*print_backtrace(_get_SP());*/ } -#else -#define check_arg_ipi(ipi) do {} while (0) -#define check_arg_timer(timer) do {} while (0) -#define check_arg_vec(vec) do {} while (0) -#define check_arg_pri(pri) do {} while (0) -#define check_arg_irq(irq) do {} while (0) -#define check_arg_cpu(cpu) do {} while (0) -#endif - -static u_int openpic2_read(volatile u_int *addr) -{ - u_int val; - - val = in_be32(addr); - return val; -} - -static inline void openpic2_write(volatile u_int *addr, u_int val) -{ - out_be32(addr, val); -} - -static inline u_int openpic2_readfield(volatile u_int *addr, u_int mask) -{ - u_int val = openpic2_read(addr); - return val & mask; -} - -inline void openpic2_writefield(volatile u_int *addr, u_int mask, - u_int field) -{ - u_int val = openpic2_read(addr); - openpic2_write(addr, (val & ~mask) | (field & mask)); -} - -static inline void openpic2_clearfield(volatile u_int *addr, u_int mask) -{ - openpic2_writefield(addr, mask, 0); -} - -static inline void openpic2_setfield(volatile u_int *addr, u_int mask) -{ - openpic2_writefield(addr, mask, mask); -} - -static void openpic2_safe_writefield(volatile u_int *addr, u_int mask, - u_int field) -{ - openpic2_setfield(addr, OPENPIC_MASK); - while (openpic2_read(addr) & OPENPIC_ACTIVITY); - openpic2_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK); -} - -static void openpic2_reset(void) -{ - openpic2_setfield(&OpenPIC2->Global.Global_Configuration0, - OPENPIC_CONFIG_RESET); - while (openpic2_readfield(&OpenPIC2->Global.Global_Configuration0, - OPENPIC_CONFIG_RESET)) - mb(); -} - -void __init openpic2_set_sources(int first_irq, int num_irqs, void *first_ISR) -{ - volatile OpenPIC_Source *src = first_ISR; - int i, last_irq; - - last_irq = first_irq + num_irqs; - if (last_irq > NumSources) - NumSources = last_irq; - if (src == 0) - src = &((struct OpenPIC *)OpenPIC2_Addr)->Source[first_irq]; - for (i = first_irq; i < last_irq; ++i, ++src) - ISR[i] = src; -} - -/* - * The `offset' parameter defines where the interrupts handled by the - * OpenPIC start in the space of interrupt numbers that the kernel knows - * about. In other words, the OpenPIC's IRQ0 is numbered `offset' in the - * kernel's interrupt numbering scheme. - * We assume there is only one OpenPIC. - */ -void __init openpic2_init(int offset) -{ - u_int t, i; - u_int timerfreq; - const char *version; - - if (!OpenPIC2_Addr) { - printk("No OpenPIC2 found !\n"); - return; - } - OpenPIC2 = (volatile struct OpenPIC *)OpenPIC2_Addr; - - if (ppc_md.progress) ppc_md.progress("openpic: enter", 0x122); - - t = openpic2_read(&OpenPIC2->Global.Feature_Reporting0); - switch (t & OPENPIC_FEATURE_VERSION_MASK) { - case 1: - version = "1.0"; - break; - case 2: - version = "1.2"; - break; - case 3: - version = "1.3"; - break; - default: - version = "?"; - break; - } - NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >> - OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1; - if (NumSources == 0) - openpic2_set_sources(0, - ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >> - OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1, - NULL); - printk("OpenPIC (2) Version %s (%d CPUs and %d IRQ sources) at %p\n", - version, NumProcessors, NumSources, OpenPIC2); - timerfreq = openpic2_read(&OpenPIC2->Global.Timer_Frequency); - if (timerfreq) - printk("OpenPIC timer frequency is %d.%06d MHz\n", - timerfreq / 1000000, timerfreq % 1000000); - - open_pic2_irq_offset = offset; - - /* Initialize timer interrupts */ - if ( ppc_md.progress ) ppc_md.progress("openpic2: timer",0x3ba); - for (i = 0; i < OPENPIC_NUM_TIMERS; i++) { - /* Disabled, Priority 0 */ - openpic2_inittimer(i, 0, OPENPIC2_VEC_TIMER+i+offset); - /* No processor */ - openpic2_maptimer(i, 0); - } - - /* Initialize external interrupts */ - if (ppc_md.progress) ppc_md.progress("openpic2: external",0x3bc); - - openpic2_set_priority(0xf); - - /* Init all external sources, including possibly the cascade. */ - for (i = 0; i < NumSources; i++) { - int sense; - - if (ISR[i] == 0) - continue; - - /* the bootloader may have left it enabled (bad !) */ - openpic2_disable_irq(i+offset); - - sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: \ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE); - - if (sense & IRQ_SENSE_MASK) - irq_desc[i+offset].status = IRQ_LEVEL; - - /* Enabled, Priority 8 */ - openpic2_initirq(i, 8, i+offset, (sense & IRQ_POLARITY_MASK), - (sense & IRQ_SENSE_MASK)); - /* Processor 0 */ - openpic2_mapirq(i, 1<<0, 0); - } - - /* Init descriptors */ - for (i = offset; i < NumSources + offset; i++) - irq_desc[i].chip = &open_pic2; - - /* Initialize the spurious interrupt */ - if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd); - openpic2_set_spurious(OPENPIC2_VEC_SPURIOUS+offset); - - openpic2_disable_8259_pass_through(); - openpic2_set_priority(0); - - if (ppc_md.progress) ppc_md.progress("openpic2: exit",0x222); -} - -#ifdef notused -static void openpic2_enable_8259_pass_through(void) -{ - openpic2_clearfield(&OpenPIC2->Global.Global_Configuration0, - OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE); -} -#endif /* notused */ - -/* This can't be __init, it is used in openpic_sleep_restore_intrs */ -static void openpic2_disable_8259_pass_through(void) -{ - openpic2_setfield(&OpenPIC2->Global.Global_Configuration0, - OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE); -} - -/* - * Find out the current interrupt - */ -u_int openpic2_irq(void) -{ - u_int vec; - DECL_THIS_CPU; - - CHECK_THIS_CPU; - vec = openpic2_readfield(&OpenPIC2->THIS_CPU.Interrupt_Acknowledge, - OPENPIC_VECTOR_MASK); - return vec; -} - -void openpic2_eoi(void) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - openpic2_write(&OpenPIC2->THIS_CPU.EOI, 0); - /* Handle PCI write posting */ - (void)openpic2_read(&OpenPIC2->THIS_CPU.EOI); -} - -#ifdef notused -static u_int openpic2_get_priority(void) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - return openpic2_readfield(&OpenPIC2->THIS_CPU.Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK); -} -#endif /* notused */ - -static void __init openpic2_set_priority(u_int pri) -{ - DECL_THIS_CPU; - - CHECK_THIS_CPU; - check_arg_pri(pri); - openpic2_writefield(&OpenPIC2->THIS_CPU.Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri); -} - -/* - * Get/set the spurious vector - */ -#ifdef notused -static u_int openpic2_get_spurious(void) -{ - return openpic2_readfield(&OpenPIC2->Global.Spurious_Vector, - OPENPIC_VECTOR_MASK); -} -#endif /* notused */ - -/* This can't be __init, it is used in openpic_sleep_restore_intrs */ -static void openpic2_set_spurious(u_int vec) -{ - check_arg_vec(vec); - openpic2_writefield(&OpenPIC2->Global.Spurious_Vector, OPENPIC_VECTOR_MASK, - vec); -} - -static DEFINE_SPINLOCK(openpic2_setup_lock); - -/* - * Initialize a timer interrupt (and disable it) - * - * timer: OpenPIC timer number - * pri: interrupt source priority - * vec: the vector it will produce - */ -static void __init openpic2_inittimer(u_int timer, u_int pri, u_int vec) -{ - check_arg_timer(timer); - check_arg_pri(pri); - check_arg_vec(vec); - openpic2_safe_writefield(&OpenPIC2->Global.Timer[timer].Vector_Priority, - OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK, - (pri << OPENPIC_PRIORITY_SHIFT) | vec); -} - -/* - * Map a timer interrupt to one or more CPUs - */ -static void __init openpic2_maptimer(u_int timer, u_int cpumask) -{ - check_arg_timer(timer); - openpic2_write(&OpenPIC2->Global.Timer[timer].Destination, - cpumask); -} - -/* - * Initalize the interrupt source which will generate an NMI. - * This raises the interrupt's priority from 8 to 9. - * - * irq: The logical IRQ which generates an NMI. - */ -void __init -openpic2_init_nmi_irq(u_int irq) -{ - check_arg_irq(irq); - openpic2_safe_writefield(&ISR[irq - open_pic2_irq_offset]->Vector_Priority, - OPENPIC_PRIORITY_MASK, - 9 << OPENPIC_PRIORITY_SHIFT); -} - -/* - * - * All functions below take an offset'ed irq argument - * - */ - - -/* - * Enable/disable an external interrupt source - * - * Externally called, irq is an offseted system-wide interrupt number - */ -static void openpic2_enable_irq(u_int irq) -{ - volatile u_int *vpp; - - check_arg_irq(irq); - vpp = &ISR[irq - open_pic2_irq_offset]->Vector_Priority; - openpic2_clearfield(vpp, OPENPIC_MASK); - /* make sure mask gets to controller before we return to user */ - do { - mb(); /* sync is probably useless here */ - } while (openpic2_readfield(vpp, OPENPIC_MASK)); -} - -static void openpic2_disable_irq(u_int irq) -{ - volatile u_int *vpp; - u32 vp; - - check_arg_irq(irq); - vpp = &ISR[irq - open_pic2_irq_offset]->Vector_Priority; - openpic2_setfield(vpp, OPENPIC_MASK); - /* make sure mask gets to controller before we return to user */ - do { - mb(); /* sync is probably useless here */ - vp = openpic2_readfield(vpp, OPENPIC_MASK | OPENPIC_ACTIVITY); - } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK)); -} - - -/* - * Initialize an interrupt source (and disable it!) - * - * irq: OpenPIC interrupt number - * pri: interrupt source priority - * vec: the vector it will produce - * pol: polarity (1 for positive, 0 for negative) - * sense: 1 for level, 0 for edge - */ -static void __init -openpic2_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense) -{ - openpic2_safe_writefield(&ISR[irq]->Vector_Priority, - OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK | - OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK, - (pri << OPENPIC_PRIORITY_SHIFT) | vec | - (pol ? OPENPIC_POLARITY_POSITIVE : - OPENPIC_POLARITY_NEGATIVE) | - (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE)); -} - -/* - * Map an interrupt source to one or more CPUs - */ -static void openpic2_mapirq(u_int irq, u_int physmask, u_int keepmask) -{ - if (ISR[irq] == 0) - return; - if (keepmask != 0) - physmask |= openpic2_read(&ISR[irq]->Destination) & keepmask; - openpic2_write(&ISR[irq]->Destination, physmask); -} - -#ifdef notused -/* - * Set the sense for an interrupt source (and disable it!) - * - * sense: 1 for level, 0 for edge - */ -static void openpic2_set_sense(u_int irq, int sense) -{ - if (ISR[irq] != 0) - openpic2_safe_writefield(&ISR[irq]->Vector_Priority, - OPENPIC_SENSE_LEVEL, - (sense ? OPENPIC_SENSE_LEVEL : 0)); -} -#endif /* notused */ - -/* No spinlocks, should not be necessary with the OpenPIC - * (1 register = 1 interrupt and we have the desc lock). - */ -static void openpic2_ack_irq(unsigned int irq_nr) -{ - openpic2_disable_irq(irq_nr); - openpic2_eoi(); -} - -static void openpic2_end_irq(unsigned int irq_nr) -{ - if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - openpic2_enable_irq(irq_nr); -} - -int -openpic2_get_irq(void) -{ - int irq = openpic2_irq(); - - if (irq == (OPENPIC2_VEC_SPURIOUS + open_pic2_irq_offset)) - irq = -1; - return irq; -} - -#ifdef CONFIG_PM - -/* - * We implement the IRQ controller as a sysdev and put it - * to sleep at powerdown stage (the callback is named suspend, - * but it's old semantics, for the Device Model, it's really - * powerdown). The possible problem is that another sysdev that - * happens to be suspend after this one will have interrupts off, - * that may be an issue... For now, this isn't an issue on pmac - * though... - */ - -static u32 save_ipi_vp[OPENPIC_NUM_IPI]; -static u32 save_irq_src_vp[OPENPIC_MAX_SOURCES]; -static u32 save_irq_src_dest[OPENPIC_MAX_SOURCES]; -static u32 save_cpu_task_pri[OPENPIC_MAX_PROCESSORS]; -static int openpic_suspend_count; - -static void openpic2_cached_enable_irq(u_int irq) -{ - check_arg_irq(irq); - save_irq_src_vp[irq - open_pic2_irq_offset] &= ~OPENPIC_MASK; -} - -static void openpic2_cached_disable_irq(u_int irq) -{ - check_arg_irq(irq); - save_irq_src_vp[irq - open_pic2_irq_offset] |= OPENPIC_MASK; -} - -/* WARNING: Can be called directly by the cpufreq code with NULL parameter, - * we need something better to deal with that... Maybe switch to S1 for - * cpufreq changes - */ -int openpic2_suspend(struct sys_device *sysdev, pm_message_t state) -{ - int i; - unsigned long flags; - - spin_lock_irqsave(&openpic2_setup_lock, flags); - - if (openpic_suspend_count++ > 0) { - spin_unlock_irqrestore(&openpic2_setup_lock, flags); - return 0; - } - - open_pic2.enable = openpic2_cached_enable_irq; - open_pic2.disable = openpic2_cached_disable_irq; - - for (i=0; iProcessor[i].Current_Task_Priority); - openpic2_writefield(&OpenPIC2->Processor[i].Current_Task_Priority, - OPENPIC_CURRENT_TASK_PRIORITY_MASK, 0xf); - } - - for (i=0; iGlobal.IPI_Vector_Priority(i)); - for (i=0; iVector_Priority) & ~OPENPIC_ACTIVITY; - save_irq_src_dest[i] = openpic2_read(&ISR[i]->Destination); - } - - spin_unlock_irqrestore(&openpic2_setup_lock, flags); - - return 0; -} - -/* WARNING: Can be called directly by the cpufreq code with NULL parameter, - * we need something better to deal with that... Maybe switch to S1 for - * cpufreq changes - */ -int openpic2_resume(struct sys_device *sysdev) -{ - int i; - unsigned long flags; - u32 vppmask = OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK | - OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK | - OPENPIC_MASK; - - spin_lock_irqsave(&openpic2_setup_lock, flags); - - if ((--openpic_suspend_count) > 0) { - spin_unlock_irqrestore(&openpic2_setup_lock, flags); - return 0; - } - - openpic2_reset(); - - /* OpenPIC sometimes seem to need some time to be fully back up... */ - do { - openpic2_set_spurious(OPENPIC2_VEC_SPURIOUS+open_pic2_irq_offset); - } while(openpic2_readfield(&OpenPIC2->Global.Spurious_Vector, OPENPIC_VECTOR_MASK) - != (OPENPIC2_VEC_SPURIOUS + open_pic2_irq_offset)); - - openpic2_disable_8259_pass_through(); - - for (i=0; iGlobal.IPI_Vector_Priority(i), - save_ipi_vp[i]); - for (i=0; iDestination, save_irq_src_dest[i]); - openpic2_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]); - /* make sure mask gets to controller before we return to user */ - do { - openpic2_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]); - } while (openpic2_readfield(&ISR[i]->Vector_Priority, vppmask) - != (save_irq_src_vp[i] & vppmask)); - } - for (i=0; iProcessor[i].Current_Task_Priority, - save_cpu_task_pri[i]); - - open_pic2.enable = openpic2_enable_irq; - open_pic2.disable = openpic2_disable_irq; - - spin_unlock_irqrestore(&openpic2_setup_lock, flags); - - return 0; -} - -#endif /* CONFIG_PM */ - -/* HACK ALERT */ -static struct sysdev_class openpic2_sysclass = { - .name = "openpic2", -}; - -static struct sys_device device_openpic2 = { - .id = 0, - .cls = &openpic2_sysclass, -}; - -static struct sysdev_driver driver_openpic2 = { -#ifdef CONFIG_PM - .suspend = &openpic2_suspend, - .resume = &openpic2_resume, -#endif /* CONFIG_PM */ -}; - -static int __init init_openpic2_sysfs(void) -{ - int rc; - - if (!OpenPIC2_Addr) - return -ENODEV; - printk(KERN_DEBUG "Registering openpic2 with sysfs...\n"); - rc = sysdev_class_register(&openpic2_sysclass); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys class\n"); - return -ENODEV; - } - rc = sysdev_register(&device_openpic2); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys device\n"); - return -ENODEV; - } - rc = sysdev_driver_register(&openpic2_sysclass, &driver_openpic2); - if (rc) { - printk(KERN_ERR "Failed registering openpic sys driver\n"); - return -ENODEV; - } - return 0; -} - -subsys_initcall(init_openpic2_sysfs); - diff --git a/arch/ppc/syslib/open_pic_defs.h b/arch/ppc/syslib/open_pic_defs.h deleted file mode 100644 index 3a25de7cb5728711506942d02a77b38cc51045e2..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/open_pic_defs.h +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is based on the following documentation: - * - * The Open Programmable Interrupt Controller (PIC) - * Register Interface Specification Revision 1.2 - * - * Issue Date: October 1995 - * - * Issued jointly by Advanced Micro Devices and Cyrix Corporation - * - * AMD is a registered trademark of Advanced Micro Devices, Inc. - * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc. - * All Rights Reserved. - * - * To receive a copy of this documentation, send an email to openpic@amd.com. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#ifndef _LINUX_OPENPIC_H -#define _LINUX_OPENPIC_H - -#ifdef __KERNEL__ - - /* - * OpenPIC supports up to 2048 interrupt sources and up to 32 processors - */ - -#define OPENPIC_MAX_SOURCES 2048 -#define OPENPIC_MAX_PROCESSORS 32 -#define OPENPIC_MAX_ISU 16 - -#define OPENPIC_NUM_TIMERS 4 -#define OPENPIC_NUM_IPI 4 -#define OPENPIC_NUM_PRI 16 -#define OPENPIC_NUM_VECTORS 256 - - - - /* - * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries - */ - -typedef struct _OpenPIC_Reg { - u_int Reg; /* Little endian! */ - char Pad[0xc]; -} OpenPIC_Reg; - - - /* - * Per Processor Registers - */ - -typedef struct _OpenPIC_Processor { - /* - * Private Shadow Registers (for SLiC backwards compatibility) - */ - u_int IPI0_Dispatch_Shadow; /* Write Only */ - char Pad1[0x4]; - u_int IPI0_Vector_Priority_Shadow; /* Read/Write */ - char Pad2[0x34]; - /* - * Interprocessor Interrupt Command Ports - */ - OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI]; /* Write Only */ - /* - * Current Task Priority Register - */ - OpenPIC_Reg _Current_Task_Priority; /* Read/Write */ - char Pad3[0x10]; - /* - * Interrupt Acknowledge Register - */ - OpenPIC_Reg _Interrupt_Acknowledge; /* Read Only */ - /* - * End of Interrupt (EOI) Register - */ - OpenPIC_Reg _EOI; /* Read/Write */ - char Pad5[0xf40]; -} OpenPIC_Processor; - - - /* - * Timer Registers - */ - -typedef struct _OpenPIC_Timer { - OpenPIC_Reg _Current_Count; /* Read Only */ - OpenPIC_Reg _Base_Count; /* Read/Write */ - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Timer; - - - /* - * Global Registers - */ - -typedef struct _OpenPIC_Global { - /* - * Feature Reporting Registers - */ - OpenPIC_Reg _Feature_Reporting0; /* Read Only */ - OpenPIC_Reg _Feature_Reporting1; /* Future Expansion */ - /* - * Global Configuration Registers - */ - OpenPIC_Reg _Global_Configuration0; /* Read/Write */ - OpenPIC_Reg _Global_Configuration1; /* Future Expansion */ - /* - * Vendor Specific Registers - */ - OpenPIC_Reg _Vendor_Specific[4]; - /* - * Vendor Identification Register - */ - OpenPIC_Reg _Vendor_Identification; /* Read Only */ - /* - * Processor Initialization Register - */ - OpenPIC_Reg _Processor_Initialization; /* Read/Write */ - /* - * IPI Vector/Priority Registers - */ - OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI]; /* Read/Write */ - /* - * Spurious Vector Register - */ - OpenPIC_Reg _Spurious_Vector; /* Read/Write */ - /* - * Global Timer Registers - */ - OpenPIC_Reg _Timer_Frequency; /* Read/Write */ - OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS]; - char Pad1[0xee00]; -} OpenPIC_Global; - - - /* - * Interrupt Source Registers - */ - -typedef struct _OpenPIC_Source { - OpenPIC_Reg _Vector_Priority; /* Read/Write */ - OpenPIC_Reg _Destination; /* Read/Write */ -} OpenPIC_Source, *OpenPIC_SourcePtr; - - - /* - * OpenPIC Register Map - */ - -struct OpenPIC { - char Pad1[0x1000]; - /* - * Global Registers - */ - OpenPIC_Global Global; - /* - * Interrupt Source Configuration Registers - */ - OpenPIC_Source Source[OPENPIC_MAX_SOURCES]; - /* - * Per Processor Registers - */ - OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS]; -}; - - /* - * Current Task Priority Register - */ - -#define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f - - /* - * Who Am I Register - */ - -#define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f - - /* - * Feature Reporting Register 0 - */ - -#define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000 -#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16 -#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00 -#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8 -#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff - - /* - * Global Configuration Register 0 - */ - -#define OPENPIC_CONFIG_RESET 0x80000000 -#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000 -#define OPENPIC_CONFIG_BASE_MASK 0x000fffff - - /* - * Global Configuration Register 1 - * This is the EICR on EPICs. - */ - -#define OPENPIC_EICR_S_CLK_MASK 0x70000000 -#define OPENPIC_EICR_SIE 0x08000000 - - /* - * Vendor Identification Register - */ - -#define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000 -#define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16 -#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 -#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8 -#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff - - /* - * Vector/Priority Registers - */ - -#define OPENPIC_MASK 0x80000000 -#define OPENPIC_ACTIVITY 0x40000000 /* Read Only */ -#define OPENPIC_PRIORITY_MASK 0x000f0000 -#define OPENPIC_PRIORITY_SHIFT 16 -#define OPENPIC_VECTOR_MASK 0x000000ff - - - /* - * Interrupt Source Registers - */ - -#define OPENPIC_POLARITY_POSITIVE 0x00800000 -#define OPENPIC_POLARITY_NEGATIVE 0x00000000 -#define OPENPIC_POLARITY_MASK 0x00800000 -#define OPENPIC_SENSE_LEVEL 0x00400000 -#define OPENPIC_SENSE_EDGE 0x00000000 -#define OPENPIC_SENSE_MASK 0x00400000 - - - /* - * Timer Registers - */ - -#define OPENPIC_COUNT_MASK 0x7fffffff -#define OPENPIC_TIMER_TOGGLE 0x80000000 -#define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000 - - - /* - * Aliases to make life simpler - */ - -/* Per Processor Registers */ -#define IPI_Dispatch(i) _IPI_Dispatch[i].Reg -#define Current_Task_Priority _Current_Task_Priority.Reg -#define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg -#define EOI _EOI.Reg - -/* Global Registers */ -#define Feature_Reporting0 _Feature_Reporting0.Reg -#define Feature_Reporting1 _Feature_Reporting1.Reg -#define Global_Configuration0 _Global_Configuration0.Reg -#define Global_Configuration1 _Global_Configuration1.Reg -#define Vendor_Specific(i) _Vendor_Specific[i].Reg -#define Vendor_Identification _Vendor_Identification.Reg -#define Processor_Initialization _Processor_Initialization.Reg -#define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg -#define Spurious_Vector _Spurious_Vector.Reg -#define Timer_Frequency _Timer_Frequency.Reg - -/* Timer Registers */ -#define Current_Count _Current_Count.Reg -#define Base_Count _Base_Count.Reg -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - -/* Interrupt Source Registers */ -#define Vector_Priority _Vector_Priority.Reg -#define Destination _Destination.Reg - -#endif /* __KERNEL__ */ - -#endif /* _LINUX_OPENPIC_H */ diff --git a/arch/ppc/syslib/pci_auto.c b/arch/ppc/syslib/pci_auto.c deleted file mode 100644 index ee20a86fcc4ba5295495ca0c535d0ec26e1dfeb1..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/pci_auto.c +++ /dev/null @@ -1,515 +0,0 @@ -/* - * PCI autoconfiguration library - * - * Author: Matt Porter - * - * 2001 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * The CardBus support is very preliminary. Preallocating space is - * the way to go but will require some change in card services to - * make it useful. Eventually this will ensure that we can put - * multiple CB bridges behind multiple P2P bridges. For now, at - * least it ensures that we place the CB bridge BAR and assigned - * initial bus numbers. I definitely need to do something about - * the lack of 16-bit I/O support. -MDP - */ - -#include -#include -#include - -#include - -#define PCIAUTO_IDE_MODE_MASK 0x05 - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif /* DEBUG */ - -static int pciauto_upper_iospc; -static int pciauto_upper_memspc; - -void __init pciauto_setup_bars(struct pci_controller *hose, - int current_bus, - int pci_devfn, - int bar_limit) -{ - int bar_response, bar_size, bar_value; - int bar, addr_mask; - int * upper_limit; - int found_mem64 = 0; - - DBG("PCI Autoconfig: Found Bus %d, Device %d, Function %d\n", - current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn) ); - - for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) { - /* Tickle the BAR and get the response */ - early_write_config_dword(hose, - current_bus, - pci_devfn, - bar, - 0xffffffff); - early_read_config_dword(hose, - current_bus, - pci_devfn, - bar, - &bar_response); - - /* If BAR is not implemented go to the next BAR */ - if (!bar_response) - continue; - - /* Check the BAR type and set our address mask */ - if (bar_response & PCI_BASE_ADDRESS_SPACE) { - addr_mask = PCI_BASE_ADDRESS_IO_MASK; - upper_limit = &pciauto_upper_iospc; - DBG("PCI Autoconfig: BAR 0x%x, I/O, ", bar); - } else { - if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_64) - found_mem64 = 1; - - addr_mask = PCI_BASE_ADDRESS_MEM_MASK; - upper_limit = &pciauto_upper_memspc; - DBG("PCI Autoconfig: BAR 0x%x, Mem ", bar); - } - - /* Calculate requested size */ - bar_size = ~(bar_response & addr_mask) + 1; - - /* Allocate a base address */ - bar_value = (*upper_limit - bar_size) & ~(bar_size - 1); - - /* Write it out and update our limit */ - early_write_config_dword(hose, - current_bus, - pci_devfn, - bar, - bar_value); - - *upper_limit = bar_value; - - /* - * If we are a 64-bit decoder then increment to the - * upper 32 bits of the bar and force it to locate - * in the lower 4GB of memory. - */ - if (found_mem64) { - bar += 4; - early_write_config_dword(hose, - current_bus, - pci_devfn, - bar, - 0x00000000); - found_mem64 = 0; - } - - DBG("size=0x%x, address=0x%x\n", - bar_size, bar_value); - } - -} - -void __init pciauto_prescan_setup_bridge(struct pci_controller *hose, - int current_bus, - int pci_devfn, - int sub_bus, - int *iosave, - int *memsave) -{ - /* Configure bus number registers */ - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_PRIMARY_BUS, - current_bus); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SECONDARY_BUS, - sub_bus + 1); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SUBORDINATE_BUS, - 0xff); - - /* Round memory allocator to 1MB boundary */ - pciauto_upper_memspc &= ~(0x100000 - 1); - *memsave = pciauto_upper_memspc; - - /* Round I/O allocator to 4KB boundary */ - pciauto_upper_iospc &= ~(0x1000 - 1); - *iosave = pciauto_upper_iospc; - - /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_MEMORY_LIMIT, - ((pciauto_upper_memspc - 1) & 0xfff00000) >> 16); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_IO_LIMIT, - ((pciauto_upper_iospc - 1) & 0x0000f000) >> 8); - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_IO_LIMIT_UPPER16, - ((pciauto_upper_iospc - 1) & 0xffff0000) >> 16); - - /* Zero upper 32 bits of prefetchable base/limit */ - early_write_config_dword(hose, - current_bus, - pci_devfn, - PCI_PREF_BASE_UPPER32, - 0); - early_write_config_dword(hose, - current_bus, - pci_devfn, - PCI_PREF_LIMIT_UPPER32, - 0); -} - -void __init pciauto_postscan_setup_bridge(struct pci_controller *hose, - int current_bus, - int pci_devfn, - int sub_bus, - int *iosave, - int *memsave) -{ - int cmdstat; - - /* Configure bus number registers */ - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SUBORDINATE_BUS, - sub_bus); - - /* - * Round memory allocator to 1MB boundary. - * If no space used, allocate minimum. - */ - pciauto_upper_memspc &= ~(0x100000 - 1); - if (*memsave == pciauto_upper_memspc) - pciauto_upper_memspc -= 0x00100000; - - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_MEMORY_BASE, - pciauto_upper_memspc >> 16); - - /* Allocate 1MB for pre-fretch */ - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_PREF_MEMORY_LIMIT, - ((pciauto_upper_memspc - 1) & 0xfff00000) >> 16); - - pciauto_upper_memspc -= 0x100000; - - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_PREF_MEMORY_BASE, - pciauto_upper_memspc >> 16); - - /* Round I/O allocator to 4KB boundary */ - pciauto_upper_iospc &= ~(0x1000 - 1); - if (*iosave == pciauto_upper_iospc) - pciauto_upper_iospc -= 0x1000; - - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_IO_BASE, - (pciauto_upper_iospc & 0x0000f000) >> 8); - early_write_config_word(hose, - current_bus, - pci_devfn, - PCI_IO_BASE_UPPER16, - pciauto_upper_iospc >> 16); - - /* Enable memory and I/O accesses, enable bus master */ - early_read_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - &cmdstat); - early_write_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - cmdstat | - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER); -} - -void __init pciauto_prescan_setup_cardbus_bridge(struct pci_controller *hose, - int current_bus, - int pci_devfn, - int sub_bus, - int *iosave, - int *memsave) -{ - /* Configure bus number registers */ - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_PRIMARY_BUS, - current_bus); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SECONDARY_BUS, - sub_bus + 1); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SUBORDINATE_BUS, - 0xff); - - /* Round memory allocator to 4KB boundary */ - pciauto_upper_memspc &= ~(0x1000 - 1); - *memsave = pciauto_upper_memspc; - - /* Round I/O allocator to 4 byte boundary */ - pciauto_upper_iospc &= ~(0x4 - 1); - *iosave = pciauto_upper_iospc; - - /* Set up memory and I/O filter limits, assume 32-bit I/O space */ - early_write_config_dword(hose, - current_bus, - pci_devfn, - 0x20, - pciauto_upper_memspc - 1); - early_write_config_dword(hose, - current_bus, - pci_devfn, - 0x30, - pciauto_upper_iospc - 1); -} - -void __init pciauto_postscan_setup_cardbus_bridge(struct pci_controller *hose, - int current_bus, - int pci_devfn, - int sub_bus, - int *iosave, - int *memsave) -{ - int cmdstat; - - /* - * Configure subordinate bus number. The PCI subsystem - * bus scan will renumber buses (reserving three additional - * for this PCI<->CardBus bridge for the case where a CardBus - * adapter contains a P2P or CB2CB bridge. - */ - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_SUBORDINATE_BUS, - sub_bus); - - /* - * Reserve an additional 4MB for mem space and 16KB for - * I/O space. This should cover any additional space - * requirement of unusual CardBus devices with - * additional bridges that can consume more address space. - * - * Although pcmcia-cs currently will reprogram bridge - * windows, the goal is to add an option to leave them - * alone and use the bridge window ranges as the regions - * that are searched for free resources upon hot-insertion - * of a device. This will allow a PCI<->CardBus bridge - * configured by this routine to happily live behind a - * P2P bridge in a system. - */ - pciauto_upper_memspc -= 0x00400000; - pciauto_upper_iospc -= 0x00004000; - - /* Round memory allocator to 4KB boundary */ - pciauto_upper_memspc &= ~(0x1000 - 1); - - early_write_config_dword(hose, - current_bus, - pci_devfn, - 0x1c, - pciauto_upper_memspc); - - /* Round I/O allocator to 4 byte boundary */ - pciauto_upper_iospc &= ~(0x4 - 1); - early_write_config_dword(hose, - current_bus, - pci_devfn, - 0x2c, - pciauto_upper_iospc); - - /* Enable memory and I/O accesses, enable bus master */ - early_read_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - &cmdstat); - early_write_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - cmdstat | - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER); -} - -int __init pciauto_bus_scan(struct pci_controller *hose, int current_bus) -{ - int sub_bus, pci_devfn, pci_class, cmdstat, found_multi = 0; - unsigned short vid; - unsigned char header_type; - - /* - * Fetch our I/O and memory space upper boundaries used - * to allocated base addresses on this hose. - */ - if (current_bus == hose->first_busno) { - pciauto_upper_iospc = hose->io_space.end + 1; - pciauto_upper_memspc = hose->mem_space.end + 1; - } - - sub_bus = current_bus; - - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) { - /* Skip our host bridge */ - if ( (current_bus == hose->first_busno) && (pci_devfn == 0) ) - continue; - - if (PCI_FUNC(pci_devfn) && !found_multi) - continue; - - /* If config space read fails from this device, move on */ - if (early_read_config_byte(hose, - current_bus, - pci_devfn, - PCI_HEADER_TYPE, - &header_type)) - continue; - - if (!PCI_FUNC(pci_devfn)) - found_multi = header_type & 0x80; - - early_read_config_word(hose, - current_bus, - pci_devfn, - PCI_VENDOR_ID, - &vid); - - if (vid != 0xffff) { - early_read_config_dword(hose, - current_bus, - pci_devfn, - PCI_CLASS_REVISION, &pci_class); - if ( (pci_class >> 16) == PCI_CLASS_BRIDGE_PCI ) { - int iosave, memsave; - - DBG("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_SLOT(pci_devfn)); - /* Allocate PCI I/O and/or memory space */ - pciauto_setup_bars(hose, - current_bus, - pci_devfn, - PCI_BASE_ADDRESS_1); - - pciauto_prescan_setup_bridge(hose, - current_bus, - pci_devfn, - sub_bus, - &iosave, - &memsave); - sub_bus = pciauto_bus_scan(hose, sub_bus+1); - pciauto_postscan_setup_bridge(hose, - current_bus, - pci_devfn, - sub_bus, - &iosave, - &memsave); - } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) { - int iosave, memsave; - - DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn)); - /* Place CardBus Socket/ExCA registers */ - pciauto_setup_bars(hose, - current_bus, - pci_devfn, - PCI_BASE_ADDRESS_0); - - pciauto_prescan_setup_cardbus_bridge(hose, - current_bus, - pci_devfn, - sub_bus, - &iosave, - &memsave); - sub_bus = pciauto_bus_scan(hose, sub_bus+1); - pciauto_postscan_setup_cardbus_bridge(hose, - current_bus, - pci_devfn, - sub_bus, - &iosave, - &memsave); - } else { - if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) { - unsigned char prg_iface; - - early_read_config_byte(hose, - current_bus, - pci_devfn, - PCI_CLASS_PROG, - &prg_iface); - if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) { - DBG("PCI Autoconfig: Skipping legacy mode IDE controller\n"); - continue; - } - } - /* Allocate PCI I/O and/or memory space */ - pciauto_setup_bars(hose, - current_bus, - pci_devfn, - PCI_BASE_ADDRESS_5); - - /* - * Enable some standard settings - */ - early_read_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - &cmdstat); - early_write_config_dword(hose, - current_bus, - pci_devfn, - PCI_COMMAND, - cmdstat | - PCI_COMMAND_IO | - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER); - early_write_config_byte(hose, - current_bus, - pci_devfn, - PCI_LATENCY_TIMER, - 0x80); - } - } - } - return sub_bus; -} diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c deleted file mode 100644 index c3b7b8bfbcfe164f92b18a9627b8d06b7823ef5f..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc403_pic.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * - * Copyright (c) 1999 Grant Erickson - * - * Module name: ppc403_pic.c - * - * Description: - * Interrupt controller driver for PowerPC 403-based processors. - */ - -/* - * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has - * 32 possible interrupts, a majority of which are not implemented on - * all cores. There are six configurable, external interrupt pins and - * there are eight internal interrupts for the on-chip serial port - * (SPU), DMA controller, and JTAG controller. - * - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -/* Function Prototypes */ - -static void ppc403_aic_enable(unsigned int irq); -static void ppc403_aic_disable(unsigned int irq); -static void ppc403_aic_disable_and_ack(unsigned int irq); - -static struct hw_interrupt_type ppc403_aic = { - .typename = "403GC AIC", - .enable = ppc403_aic_enable, - .disable = ppc403_aic_disable, - .ack = ppc403_aic_disable_and_ack, -}; - -int -ppc403_pic_get_irq(void) -{ - int irq; - unsigned long bits; - - /* - * Only report the status of those interrupts that are actually - * enabled. - */ - - bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER); - - /* - * Walk through the interrupts from highest priority to lowest, and - * report the first pending interrupt found. - * We want PPC, not C bit numbering, so just subtract the ffs() - * result from 32. - */ - irq = 32 - ffs(bits); - - if (irq == NR_AIC_IRQS) - irq = -1; - - return (irq); -} - -static void -ppc403_aic_enable(unsigned int irq) -{ - int bit, word; - - bit = irq & 0x1f; - word = irq >> 5; - - ppc_cached_irq_mask[word] |= (1 << (31 - bit)); - mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]); -} - -static void -ppc403_aic_disable(unsigned int irq) -{ - int bit, word; - - bit = irq & 0x1f; - word = irq >> 5; - - ppc_cached_irq_mask[word] &= ~(1 << (31 - bit)); - mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]); -} - -static void -ppc403_aic_disable_and_ack(unsigned int irq) -{ - int bit, word; - - bit = irq & 0x1f; - word = irq >> 5; - - ppc_cached_irq_mask[word] &= ~(1 << (31 - bit)); - mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]); - mtdcr(DCRN_EXISR, (1 << (31 - bit))); -} - -void __init -ppc4xx_pic_init(void) -{ - int i; - - /* - * Disable all external interrupts until they are - * explicitly requested. - */ - ppc_cached_irq_mask[0] = 0; - - mtdcr(DCRN_EXIER, ppc_cached_irq_mask[0]); - - ppc_md.get_irq = ppc403_pic_get_irq; - - for (i = 0; i < NR_IRQS; i++) - irq_desc[i].chip = &ppc403_aic; -} diff --git a/arch/ppc/syslib/ppc405_pci.c b/arch/ppc/syslib/ppc405_pci.c deleted file mode 100644 index 9e9035693bfaa085328ec13d33a9419b7fa43c3f..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc405_pci.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Authors: Frank Rowand , - * Debbie Chu , or source@mvista.com - * Further modifications by Armin Kuster - * - * 2000 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Based on arch/ppc/kernel/indirect.c, Copyright (C) 1998 Gabriel Paubert. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -extern void bios_fixup(struct pci_controller *, struct pcil0_regs *); -extern int ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, - unsigned char pin); - -void -ppc405_pcibios_fixup_resources(struct pci_dev *dev) -{ - int i; - unsigned long max_host_addr; - unsigned long min_host_addr; - struct resource *res; - - /* - * openbios puts some graphics cards in the same range as the host - * controller uses to map to SDRAM. Fix it. - */ - - min_host_addr = 0; - max_host_addr = PPC405_PCI_MEM_BASE - 1; - - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { - res = dev->resource + i; - if (!res->start) - continue; - if ((res->flags & IORESOURCE_MEM) && - (((res->start >= min_host_addr) - && (res->start <= max_host_addr)) - || ((res->end >= min_host_addr) - && (res->end <= max_host_addr)) - || ((res->start < min_host_addr) - && (res->end > max_host_addr)) - ) - ) { - - /* force pcibios_assign_resources() to assign a new address */ - res->end -= res->start; - res->start = 0; - } - } -} - -static int -ppc4xx_exclude_device(unsigned char bus, unsigned char devfn) -{ - /* We prevent us from seeing ourselves to avoid having - * the kernel try to remap our BAR #1 and fuck up bus - * master from external PCI devices - */ - return (bus == 0 && devfn == 0); -} - -void -ppc4xx_find_bridges(void) -{ - struct pci_controller *hose_a; - struct pcil0_regs *pcip; - unsigned int tmp_addr; - unsigned int tmp_size; - unsigned int reg_index; - unsigned int new_pmm_max = 0; - unsigned int new_pmm_min = 0; - - isa_io_base = 0; - isa_mem_base = 0; - pci_dram_offset = 0; - - /* Setup PCI32 hose */ - hose_a = pcibios_alloc_controller(); - if (!hose_a) - return; - setup_indirect_pci(hose_a, PPC405_PCI_CONFIG_ADDR, - PPC405_PCI_CONFIG_DATA); - - pcip = ioremap(PPC4xx_PCI_LCFG_PADDR, PAGE_SIZE); - if (pcip != NULL) { - -#if defined(CONFIG_BIOS_FIXUP) - bios_fixup(hose_a, pcip); -#endif - new_pmm_min = 0xffffffff; - for (reg_index = 0; reg_index < 3; reg_index++) { - tmp_size = in_le32(&pcip->pmm[reg_index].ma); // mask & attrs - /* test the enable bit */ - if ((tmp_size & 0x1) == 0) - continue; - tmp_addr = in_le32(&pcip->pmm[reg_index].pcila); // PCI addr - if (tmp_addr < PPC405_PCI_PHY_MEM_BASE) { - printk(KERN_DEBUG - "Disabling mapping to PCI mem addr 0x%8.8x\n", - tmp_addr); - out_le32(&pcip->pmm[reg_index].ma, tmp_size & ~1); // *_PMMOMA - continue; - } - tmp_addr = in_le32(&pcip->pmm[reg_index].la); // *_PMMOLA - if (tmp_addr < new_pmm_min) - new_pmm_min = tmp_addr; - tmp_addr = tmp_addr + - (0xffffffff - (tmp_size & 0xffffc000)); - if (tmp_addr > PPC405_PCI_UPPER_MEM) { - new_pmm_max = tmp_addr; // PPC405_PCI_UPPER_MEM - } else { - new_pmm_max = PPC405_PCI_UPPER_MEM; - } - - } // for - - iounmap(pcip); - } - - hose_a->first_busno = 0; - hose_a->last_busno = 0xff; - hose_a->pci_mem_offset = 0; - - /* Setup bridge memory/IO ranges & resources - * TODO: Handle firmware setting up a legacy ISA mem base - */ - hose_a->io_space.start = PPC405_PCI_LOWER_IO; - hose_a->io_space.end = PPC405_PCI_UPPER_IO; - hose_a->mem_space.start = new_pmm_min; - hose_a->mem_space.end = new_pmm_max; - hose_a->io_base_phys = PPC405_PCI_PHY_IO_BASE; - hose_a->io_base_virt = ioremap(hose_a->io_base_phys, 0x10000); - hose_a->io_resource.start = 0; - hose_a->io_resource.end = PPC405_PCI_UPPER_IO - PPC405_PCI_LOWER_IO; - hose_a->io_resource.flags = IORESOURCE_IO; - hose_a->io_resource.name = "PCI I/O"; - hose_a->mem_resources[0].start = new_pmm_min; - hose_a->mem_resources[0].end = new_pmm_max; - hose_a->mem_resources[0].flags = IORESOURCE_MEM; - hose_a->mem_resources[0].name = "PCI Memory"; - isa_io_base = (int) hose_a->io_base_virt; - isa_mem_base = 0; /* ISA not implemented */ - ISA_DMA_THRESHOLD = 0x00ffffff; /* ??? ISA not implemented */ - - /* Scan busses & initial setup by pci_auto */ - hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno); - hose_a->last_busno = 0; - - /* Setup ppc_md */ - ppc_md.pcibios_fixup = NULL; - ppc_md.pci_exclude_device = ppc4xx_exclude_device; - ppc_md.pcibios_fixup_resources = ppc405_pcibios_fixup_resources; - ppc_md.pci_swizzle = common_swizzle; - ppc_md.pci_map_irq = ppc405_map_irq; -} diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c deleted file mode 100644 index dd5d4b958c31e465320ba3a16f75f2d141cdf9b2..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc440spe_pcie.c +++ /dev/null @@ -1,441 +0,0 @@ -/* - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * Roland Dreier - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include "ppc440spe_pcie.h" - -static int -pcie_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 *val) -{ - struct pci_controller *hose = bus->sysdata; - - if (PCI_SLOT(devfn) != 1) - return PCIBIOS_DEVICE_NOT_FOUND; - - offset += devfn << 12; - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - switch (len) { - case 1: - *val = in_8(hose->cfg_data + offset); - break; - case 2: - *val = in_le16(hose->cfg_data + offset); - break; - default: - *val = in_le32(hose->cfg_data + offset); - break; - } - - if (0) printk("%s: read %x(%d) @ %x\n", __func__, *val, len, offset); - - return PCIBIOS_SUCCESSFUL; -} - -static int -pcie_write_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - - if (PCI_SLOT(devfn) != 1) - return PCIBIOS_DEVICE_NOT_FOUND; - - offset += devfn << 12; - - switch (len) { - case 1: - out_8(hose->cfg_data + offset, val); - break; - case 2: - out_le16(hose->cfg_data + offset, val); - break; - default: - out_le32(hose->cfg_data + offset, val); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops pcie_pci_ops = -{ - .read = pcie_read_config, - .write = pcie_write_config -}; - -enum { - PTYPE_ENDPOINT = 0x0, - PTYPE_LEGACY_ENDPOINT = 0x1, - PTYPE_ROOT_PORT = 0x4, - - LNKW_X1 = 0x1, - LNKW_X4 = 0x4, - LNKW_X8 = 0x8 -}; - -static void check_error(void) -{ - u32 valPE0, valPE1, valPE2; - - /* SDR0_PEGPLLLCT1 reset */ - if (!(valPE0 = SDR_READ(PESDR0_PLLLCT1) & 0x01000000)) { - printk(KERN_INFO "PCIE: SDR0_PEGPLLLCT1 reset error 0x%8x\n", valPE0); - } - - valPE0 = SDR_READ(PESDR0_RCSSET); - valPE1 = SDR_READ(PESDR1_RCSSET); - valPE2 = SDR_READ(PESDR2_RCSSET); - - /* SDR0_PExRCSSET rstgu */ - if ( !(valPE0 & 0x01000000) || - !(valPE1 & 0x01000000) || - !(valPE2 & 0x01000000)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstgu error\n"); - } - - /* SDR0_PExRCSSET rstdl */ - if ( !(valPE0 & 0x00010000) || - !(valPE1 & 0x00010000) || - !(valPE2 & 0x00010000)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstdl error\n"); - } - - /* SDR0_PExRCSSET rstpyn */ - if ( (valPE0 & 0x00001000) || - (valPE1 & 0x00001000) || - (valPE2 & 0x00001000)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstpyn error\n"); - } - - /* SDR0_PExRCSSET hldplb */ - if ( (valPE0 & 0x10000000) || - (valPE1 & 0x10000000) || - (valPE2 & 0x10000000)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET hldplb error\n"); - } - - /* SDR0_PExRCSSET rdy */ - if ( (valPE0 & 0x00100000) || - (valPE1 & 0x00100000) || - (valPE2 & 0x00100000)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET rdy error\n"); - } - - /* SDR0_PExRCSSET shutdown */ - if ( (valPE0 & 0x00000100) || - (valPE1 & 0x00000100) || - (valPE2 & 0x00000100)) { - printk(KERN_INFO "PCIE: SDR0_PExRCSSET shutdown error\n"); - } -} - -/* - * Initialize PCI Express core as described in User Manual section 27.12.1 - */ -int ppc440spe_init_pcie(void) -{ - /* Set PLL clock receiver to LVPECL */ - SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28); - - check_error(); - - printk(KERN_INFO "PCIE initialization OK\n"); - - if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) - printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n", - SDR_READ(PESDR0_PLLLCT2)); - - /* De-assert reset of PCIe PLL, wait for lock */ - SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24)); - udelay(3); - - return 0; -} - -int ppc440spe_init_pcie_rootport(int port) -{ - static int core_init; - void __iomem *utl_base; - u32 val = 0; - int i; - - if (!core_init) { - ++core_init; - i = ppc440spe_init_pcie(); - if (i) - return i; - } - - /* - * Initialize various parts of the PCI Express core for our port: - * - * - Set as a root port and enable max width - * (PXIE0 -> X8, PCIE1 and PCIE2 -> X4). - * - Set up UTL configuration. - * - Increase SERDES drive strength to levels suggested by AMCC. - * - De-assert RSTPYN, RSTDL and RSTGU. - */ - switch (port) { - case 0: - SDR_WRITE(PESDR0_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X8 << 12); - - SDR_WRITE(PESDR0_UTLSET1, 0x21222222); - SDR_WRITE(PESDR0_UTLSET2, 0x11000000); - - SDR_WRITE(PESDR0_HSSL0SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL1SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL2SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL3SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL4SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL5SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL6SET1, 0x35000000); - SDR_WRITE(PESDR0_HSSL7SET1, 0x35000000); - - SDR_WRITE(PESDR0_RCSSET, - (SDR_READ(PESDR0_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); - break; - - case 1: - SDR_WRITE(PESDR1_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12); - - SDR_WRITE(PESDR1_UTLSET1, 0x21222222); - SDR_WRITE(PESDR1_UTLSET2, 0x11000000); - - SDR_WRITE(PESDR1_HSSL0SET1, 0x35000000); - SDR_WRITE(PESDR1_HSSL1SET1, 0x35000000); - SDR_WRITE(PESDR1_HSSL2SET1, 0x35000000); - SDR_WRITE(PESDR1_HSSL3SET1, 0x35000000); - - SDR_WRITE(PESDR1_RCSSET, - (SDR_READ(PESDR1_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); - break; - - case 2: - SDR_WRITE(PESDR2_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12); - - SDR_WRITE(PESDR2_UTLSET1, 0x21222222); - SDR_WRITE(PESDR2_UTLSET2, 0x11000000); - - SDR_WRITE(PESDR2_HSSL0SET1, 0x35000000); - SDR_WRITE(PESDR2_HSSL1SET1, 0x35000000); - SDR_WRITE(PESDR2_HSSL2SET1, 0x35000000); - SDR_WRITE(PESDR2_HSSL3SET1, 0x35000000); - - SDR_WRITE(PESDR2_RCSSET, - (SDR_READ(PESDR2_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); - break; - } - - mdelay(1000); - - switch (port) { - case 0: val = SDR_READ(PESDR0_RCSSTS); break; - case 1: val = SDR_READ(PESDR1_RCSSTS); break; - case 2: val = SDR_READ(PESDR2_RCSSTS); break; - } - - if (!(val & (1 << 20))) - printk(KERN_INFO "PCIE%d: PGRST inactive\n", port); - else - printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n", port, val); - - switch (port) { - case 0: printk(KERN_INFO "PCIE0: LOOP %08x\n", SDR_READ(PESDR0_LOOP)); break; - case 1: printk(KERN_INFO "PCIE1: LOOP %08x\n", SDR_READ(PESDR1_LOOP)); break; - case 2: printk(KERN_INFO "PCIE2: LOOP %08x\n", SDR_READ(PESDR2_LOOP)); break; - } - - /* - * Map UTL registers at 0xc_1000_0n00 - */ - switch (port) { - case 0: - mtdcr(DCRN_PEGPL_REGBAH(PCIE0), 0x0000000c); - mtdcr(DCRN_PEGPL_REGBAL(PCIE0), 0x10000000); - mtdcr(DCRN_PEGPL_REGMSK(PCIE0), 0x00007001); - mtdcr(DCRN_PEGPL_SPECIAL(PCIE0), 0x68782800); - break; - - case 1: - mtdcr(DCRN_PEGPL_REGBAH(PCIE1), 0x0000000c); - mtdcr(DCRN_PEGPL_REGBAL(PCIE1), 0x10001000); - mtdcr(DCRN_PEGPL_REGMSK(PCIE1), 0x00007001); - mtdcr(DCRN_PEGPL_SPECIAL(PCIE1), 0x68782800); - break; - - case 2: - mtdcr(DCRN_PEGPL_REGBAH(PCIE2), 0x0000000c); - mtdcr(DCRN_PEGPL_REGBAL(PCIE2), 0x10002000); - mtdcr(DCRN_PEGPL_REGMSK(PCIE2), 0x00007001); - mtdcr(DCRN_PEGPL_SPECIAL(PCIE2), 0x68782800); - } - - utl_base = ioremap64(0xc10000000ull + 0x1000 * port, 0x100); - - /* - * Set buffer allocations and then assert VRB and TXE. - */ - out_be32(utl_base + PEUTL_OUTTR, 0x08000000); - out_be32(utl_base + PEUTL_INTR, 0x02000000); - out_be32(utl_base + PEUTL_OPDBSZ, 0x10000000); - out_be32(utl_base + PEUTL_PBBSZ, 0x53000000); - out_be32(utl_base + PEUTL_IPHBSZ, 0x08000000); - out_be32(utl_base + PEUTL_IPDBSZ, 0x10000000); - out_be32(utl_base + PEUTL_RCIRQEN, 0x00f00000); - out_be32(utl_base + PEUTL_PCTL, 0x80800066); - - iounmap(utl_base); - - /* - * We map PCI Express configuration access into the 512MB regions - * PCIE0: 0xc_4000_0000 - * PCIE1: 0xc_8000_0000 - * PCIE2: 0xc_c000_0000 - */ - switch (port) { - case 0: - mtdcr(DCRN_PEGPL_CFGBAH(PCIE0), 0x0000000c); - mtdcr(DCRN_PEGPL_CFGBAL(PCIE0), 0x40000000); - mtdcr(DCRN_PEGPL_CFGMSK(PCIE0), 0xe0000001); /* 512MB region, valid */ - break; - - case 1: - mtdcr(DCRN_PEGPL_CFGBAH(PCIE1), 0x0000000c); - mtdcr(DCRN_PEGPL_CFGBAL(PCIE1), 0x80000000); - mtdcr(DCRN_PEGPL_CFGMSK(PCIE1), 0xe0000001); /* 512MB region, valid */ - break; - - case 2: - mtdcr(DCRN_PEGPL_CFGBAH(PCIE2), 0x0000000c); - mtdcr(DCRN_PEGPL_CFGBAL(PCIE2), 0xc0000000); - mtdcr(DCRN_PEGPL_CFGMSK(PCIE2), 0xe0000001); /* 512MB region, valid */ - break; - } - - /* - * Check for VC0 active and assert RDY. - */ - switch (port) { - case 0: - if (!(SDR_READ(PESDR0_RCSSTS) & (1 << 16))) - printk(KERN_WARNING "PCIE0: VC0 not active\n"); - SDR_WRITE(PESDR0_RCSSET, SDR_READ(PESDR0_RCSSET) | 1 << 20); - break; - case 1: - if (!(SDR_READ(PESDR1_RCSSTS) & (1 << 16))) - printk(KERN_WARNING "PCIE0: VC0 not active\n"); - SDR_WRITE(PESDR1_RCSSET, SDR_READ(PESDR1_RCSSET) | 1 << 20); - break; - case 2: - if (!(SDR_READ(PESDR2_RCSSTS) & (1 << 16))) - printk(KERN_WARNING "PCIE0: VC0 not active\n"); - SDR_WRITE(PESDR2_RCSSET, SDR_READ(PESDR2_RCSSET) | 1 << 20); - break; - } - -#if 0 - /* Dump all config regs */ - for (i = 0x300; i <= 0x320; ++i) - printk("[%04x] 0x%08x\n", i, SDR_READ(i)); - for (i = 0x340; i <= 0x353; ++i) - printk("[%04x] 0x%08x\n", i, SDR_READ(i)); - for (i = 0x370; i <= 0x383; ++i) - printk("[%04x] 0x%08x\n", i, SDR_READ(i)); - for (i = 0x3a0; i <= 0x3a2; ++i) - printk("[%04x] 0x%08x\n", i, SDR_READ(i)); - for (i = 0x3c0; i <= 0x3c3; ++i) - printk("[%04x] 0x%08x\n", i, SDR_READ(i)); -#endif - - mdelay(100); - - return 0; -} - -void ppc440spe_setup_pcie(struct pci_controller *hose, int port) -{ - void __iomem *mbase; - - /* - * Map 16MB, which is enough for 4 bits of bus # - */ - hose->cfg_data = ioremap64(0xc40000000ull + port * 0x40000000, - 1 << 24); - hose->ops = &pcie_pci_ops; - - /* - * Set bus numbers on our root port - */ - mbase = ioremap64(0xc50000000ull + port * 0x40000000, 4096); - out_8(mbase + PCI_PRIMARY_BUS, 0); - out_8(mbase + PCI_SECONDARY_BUS, 0); - - /* - * Set up outbound translation to hose->mem_space from PLB - * addresses at an offset of 0xd_0000_0000. We set the low - * bits of the mask to 11 to turn off splitting into 8 - * subregions and to enable the outbound translation. - */ - out_le32(mbase + PECFG_POM0LAH, 0); - out_le32(mbase + PECFG_POM0LAL, hose->mem_space.start); - - switch (port) { - case 0: - mtdcr(DCRN_PEGPL_OMR1BAH(PCIE0), 0x0000000d); - mtdcr(DCRN_PEGPL_OMR1BAL(PCIE0), hose->mem_space.start); - mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE0), 0x7fffffff); - mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE0), - ~(hose->mem_space.end - hose->mem_space.start) | 3); - break; - case 1: - mtdcr(DCRN_PEGPL_OMR1BAH(PCIE1), 0x0000000d); - mtdcr(DCRN_PEGPL_OMR1BAL(PCIE1), hose->mem_space.start); - mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE1), 0x7fffffff); - mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE1), - ~(hose->mem_space.end - hose->mem_space.start) | 3); - - break; - case 2: - mtdcr(DCRN_PEGPL_OMR1BAH(PCIE2), 0x0000000d); - mtdcr(DCRN_PEGPL_OMR1BAL(PCIE2), hose->mem_space.start); - mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE2), 0x7fffffff); - mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE2), - ~(hose->mem_space.end - hose->mem_space.start) | 3); - break; - } - - /* Set up 16GB inbound memory window at 0 */ - out_le32(mbase + PCI_BASE_ADDRESS_0, 0); - out_le32(mbase + PCI_BASE_ADDRESS_1, 0); - out_le32(mbase + PECFG_BAR0HMPA, 0x7fffffc); - out_le32(mbase + PECFG_BAR0LMPA, 0); - out_le32(mbase + PECFG_PIM0LAL, 0); - out_le32(mbase + PECFG_PIM0LAH, 0); - out_le32(mbase + PECFG_PIMEN, 0x1); - - /* Enable I/O, Mem, and Busmaster cycles */ - out_le16(mbase + PCI_COMMAND, - in_le16(mbase + PCI_COMMAND) | - PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - - iounmap(mbase); -} diff --git a/arch/ppc/syslib/ppc440spe_pcie.h b/arch/ppc/syslib/ppc440spe_pcie.h deleted file mode 100644 index 55b765ad3272b3bbb01f813c7d18a97fd503af0a..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc440spe_pcie.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Copyright (c) 2005 Cisco Systems. All rights reserved. - * Roland Dreier - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __PPC_SYSLIB_PPC440SPE_PCIE_H -#define __PPC_SYSLIB_PPC440SPE_PCIE_H - -#define DCRN_SDR0_CFGADDR 0x00e -#define DCRN_SDR0_CFGDATA 0x00f - -#define DCRN_PCIE0_BASE 0x100 -#define DCRN_PCIE1_BASE 0x120 -#define DCRN_PCIE2_BASE 0x140 -#define PCIE0 DCRN_PCIE0_BASE -#define PCIE1 DCRN_PCIE1_BASE -#define PCIE2 DCRN_PCIE2_BASE - -#define DCRN_PEGPL_CFGBAH(base) (base + 0x00) -#define DCRN_PEGPL_CFGBAL(base) (base + 0x01) -#define DCRN_PEGPL_CFGMSK(base) (base + 0x02) -#define DCRN_PEGPL_MSGBAH(base) (base + 0x03) -#define DCRN_PEGPL_MSGBAL(base) (base + 0x04) -#define DCRN_PEGPL_MSGMSK(base) (base + 0x05) -#define DCRN_PEGPL_OMR1BAH(base) (base + 0x06) -#define DCRN_PEGPL_OMR1BAL(base) (base + 0x07) -#define DCRN_PEGPL_OMR1MSKH(base) (base + 0x08) -#define DCRN_PEGPL_OMR1MSKL(base) (base + 0x09) -#define DCRN_PEGPL_REGBAH(base) (base + 0x12) -#define DCRN_PEGPL_REGBAL(base) (base + 0x13) -#define DCRN_PEGPL_REGMSK(base) (base + 0x14) -#define DCRN_PEGPL_SPECIAL(base) (base + 0x15) - -/* - * System DCRs (SDRs) - */ -#define PESDR0_PLLLCT1 0x03a0 -#define PESDR0_PLLLCT2 0x03a1 -#define PESDR0_PLLLCT3 0x03a2 - -#define PESDR0_UTLSET1 0x0300 -#define PESDR0_UTLSET2 0x0301 -#define PESDR0_DLPSET 0x0302 -#define PESDR0_LOOP 0x0303 -#define PESDR0_RCSSET 0x0304 -#define PESDR0_RCSSTS 0x0305 -#define PESDR0_HSSL0SET1 0x0306 -#define PESDR0_HSSL0SET2 0x0307 -#define PESDR0_HSSL0STS 0x0308 -#define PESDR0_HSSL1SET1 0x0309 -#define PESDR0_HSSL1SET2 0x030a -#define PESDR0_HSSL1STS 0x030b -#define PESDR0_HSSL2SET1 0x030c -#define PESDR0_HSSL2SET2 0x030d -#define PESDR0_HSSL2STS 0x030e -#define PESDR0_HSSL3SET1 0x030f -#define PESDR0_HSSL3SET2 0x0310 -#define PESDR0_HSSL3STS 0x0311 -#define PESDR0_HSSL4SET1 0x0312 -#define PESDR0_HSSL4SET2 0x0313 -#define PESDR0_HSSL4STS 0x0314 -#define PESDR0_HSSL5SET1 0x0315 -#define PESDR0_HSSL5SET2 0x0316 -#define PESDR0_HSSL5STS 0x0317 -#define PESDR0_HSSL6SET1 0x0318 -#define PESDR0_HSSL6SET2 0x0319 -#define PESDR0_HSSL6STS 0x031a -#define PESDR0_HSSL7SET1 0x031b -#define PESDR0_HSSL7SET2 0x031c -#define PESDR0_HSSL7STS 0x031d -#define PESDR0_HSSCTLSET 0x031e -#define PESDR0_LANE_ABCD 0x031f -#define PESDR0_LANE_EFGH 0x0320 - -#define PESDR1_UTLSET1 0x0340 -#define PESDR1_UTLSET2 0x0341 -#define PESDR1_DLPSET 0x0342 -#define PESDR1_LOOP 0x0343 -#define PESDR1_RCSSET 0x0344 -#define PESDR1_RCSSTS 0x0345 -#define PESDR1_HSSL0SET1 0x0346 -#define PESDR1_HSSL0SET2 0x0347 -#define PESDR1_HSSL0STS 0x0348 -#define PESDR1_HSSL1SET1 0x0349 -#define PESDR1_HSSL1SET2 0x034a -#define PESDR1_HSSL1STS 0x034b -#define PESDR1_HSSL2SET1 0x034c -#define PESDR1_HSSL2SET2 0x034d -#define PESDR1_HSSL2STS 0x034e -#define PESDR1_HSSL3SET1 0x034f -#define PESDR1_HSSL3SET2 0x0350 -#define PESDR1_HSSL3STS 0x0351 -#define PESDR1_HSSCTLSET 0x0352 -#define PESDR1_LANE_ABCD 0x0353 - -#define PESDR2_UTLSET1 0x0370 -#define PESDR2_UTLSET2 0x0371 -#define PESDR2_DLPSET 0x0372 -#define PESDR2_LOOP 0x0373 -#define PESDR2_RCSSET 0x0374 -#define PESDR2_RCSSTS 0x0375 -#define PESDR2_HSSL0SET1 0x0376 -#define PESDR2_HSSL0SET2 0x0377 -#define PESDR2_HSSL0STS 0x0378 -#define PESDR2_HSSL1SET1 0x0379 -#define PESDR2_HSSL1SET2 0x037a -#define PESDR2_HSSL1STS 0x037b -#define PESDR2_HSSL2SET1 0x037c -#define PESDR2_HSSL2SET2 0x037d -#define PESDR2_HSSL2STS 0x037e -#define PESDR2_HSSL3SET1 0x037f -#define PESDR2_HSSL3SET2 0x0380 -#define PESDR2_HSSL3STS 0x0381 -#define PESDR2_HSSCTLSET 0x0382 -#define PESDR2_LANE_ABCD 0x0383 - -/* - * UTL register offsets - */ -#define PEUTL_PBBSZ 0x20 -#define PEUTL_OPDBSZ 0x68 -#define PEUTL_IPHBSZ 0x70 -#define PEUTL_IPDBSZ 0x78 -#define PEUTL_OUTTR 0x90 -#define PEUTL_INTR 0x98 -#define PEUTL_PCTL 0xa0 -#define PEUTL_RCIRQEN 0xb8 - -/* - * Config space register offsets - */ -#define PECFG_BAR0LMPA 0x210 -#define PECFG_BAR0HMPA 0x214 -#define PECFG_PIMEN 0x33c -#define PECFG_PIM0LAL 0x340 -#define PECFG_PIM0LAH 0x344 -#define PECFG_POM0LAL 0x380 -#define PECFG_POM0LAH 0x384 - -int ppc440spe_init_pcie(void); -int ppc440spe_init_pcie_rootport(int port); -void ppc440spe_setup_pcie(struct pci_controller *hose, int port); - -#endif /* __PPC_SYSLIB_PPC440SPE_PCIE_H */ diff --git a/arch/ppc/syslib/ppc4xx_dma.c b/arch/ppc/syslib/ppc4xx_dma.c deleted file mode 100644 index bd301868996b9134715a218b5d58e3d665056dd9..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc4xx_dma.c +++ /dev/null @@ -1,710 +0,0 @@ -/* - * IBM PPC4xx DMA engine core library - * - * Copyright 2000-2004 MontaVista Software Inc. - * - * Cleaned up and converted to new DCR access - * Matt Porter - * - * Original code by Armin Kuster - * and Pete Popov - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -ppc_dma_ch_t dma_channels[MAX_PPC4xx_DMA_CHANNELS]; - -int -ppc4xx_get_dma_status(void) -{ - return (mfdcr(DCRN_DMASR)); -} - -void -ppc4xx_set_src_addr(int dmanr, phys_addr_t src_addr) -{ - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("set_src_addr: bad channel: %d\n", dmanr); - return; - } - -#ifdef PPC4xx_DMA_64BIT - mtdcr(DCRN_DMASAH0 + dmanr*2, (u32)(src_addr >> 32)); -#else - mtdcr(DCRN_DMASA0 + dmanr*2, (u32)src_addr); -#endif -} - -void -ppc4xx_set_dst_addr(int dmanr, phys_addr_t dst_addr) -{ - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("set_dst_addr: bad channel: %d\n", dmanr); - return; - } - -#ifdef PPC4xx_DMA_64BIT - mtdcr(DCRN_DMADAH0 + dmanr*2, (u32)(dst_addr >> 32)); -#else - mtdcr(DCRN_DMADA0 + dmanr*2, (u32)dst_addr); -#endif -} - -void -ppc4xx_enable_dma(unsigned int dmanr) -{ - unsigned int control; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - unsigned int status_bits[] = { DMA_CS0 | DMA_TS0 | DMA_CH0_ERR, - DMA_CS1 | DMA_TS1 | DMA_CH1_ERR, - DMA_CS2 | DMA_TS2 | DMA_CH2_ERR, - DMA_CS3 | DMA_TS3 | DMA_CH3_ERR}; - - if (p_dma_ch->in_use) { - printk("enable_dma: channel %d in use\n", dmanr); - return; - } - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("enable_dma: bad channel: %d\n", dmanr); - return; - } - - if (p_dma_ch->mode == DMA_MODE_READ) { - /* peripheral to memory */ - ppc4xx_set_src_addr(dmanr, 0); - ppc4xx_set_dst_addr(dmanr, p_dma_ch->addr); - } else if (p_dma_ch->mode == DMA_MODE_WRITE) { - /* memory to peripheral */ - ppc4xx_set_src_addr(dmanr, p_dma_ch->addr); - ppc4xx_set_dst_addr(dmanr, 0); - } - - /* for other xfer modes, the addresses are already set */ - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - - control &= ~(DMA_TM_MASK | DMA_TD); /* clear all mode bits */ - if (p_dma_ch->mode == DMA_MODE_MM) { - /* software initiated memory to memory */ - control |= DMA_ETD_OUTPUT | DMA_TCE_ENABLE; - } - - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - /* - * Clear the CS, TS, RI bits for the channel from DMASR. This - * has been observed to happen correctly only after the mode and - * ETD/DCE bits in DMACRx are set above. Must do this before - * enabling the channel. - */ - - mtdcr(DCRN_DMASR, status_bits[dmanr]); - - /* - * For device-paced transfers, Terminal Count Enable apparently - * must be on, and this must be turned on after the mode, etc. - * bits are cleared above (at least on Redwood-6). - */ - - if ((p_dma_ch->mode == DMA_MODE_MM_DEVATDST) || - (p_dma_ch->mode == DMA_MODE_MM_DEVATSRC)) - control |= DMA_TCE_ENABLE; - - /* - * Now enable the channel. - */ - - control |= (p_dma_ch->mode | DMA_CE_ENABLE); - - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - p_dma_ch->in_use = 1; -} - -void -ppc4xx_disable_dma(unsigned int dmanr) -{ - unsigned int control; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (!p_dma_ch->in_use) { - printk("disable_dma: channel %d not in use\n", dmanr); - return; - } - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("disable_dma: bad channel: %d\n", dmanr); - return; - } - - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - control &= ~DMA_CE_ENABLE; - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - p_dma_ch->in_use = 0; -} - -/* - * Sets the dma mode for single DMA transfers only. - * For scatter/gather transfers, the mode is passed to the - * alloc_dma_handle() function as one of the parameters. - * - * The mode is simply saved and used later. This allows - * the driver to call set_dma_mode() and set_dma_addr() in - * any order. - * - * Valid mode values are: - * - * DMA_MODE_READ peripheral to memory - * DMA_MODE_WRITE memory to peripheral - * DMA_MODE_MM memory to memory - * DMA_MODE_MM_DEVATSRC device-paced memory to memory, device at src - * DMA_MODE_MM_DEVATDST device-paced memory to memory, device at dst - */ -int -ppc4xx_set_dma_mode(unsigned int dmanr, unsigned int mode) -{ - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("set_dma_mode: bad channel 0x%x\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - p_dma_ch->mode = mode; - - return DMA_STATUS_GOOD; -} - -/* - * Sets the DMA Count register. Note that 'count' is in bytes. - * However, the DMA Count register counts the number of "transfers", - * where each transfer is equal to the bus width. Thus, count - * MUST be a multiple of the bus width. - */ -void -ppc4xx_set_dma_count(unsigned int dmanr, unsigned int count) -{ - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - -#ifdef DEBUG_4xxDMA - { - int error = 0; - switch (p_dma_ch->pwidth) { - case PW_8: - break; - case PW_16: - if (count & 0x1) - error = 1; - break; - case PW_32: - if (count & 0x3) - error = 1; - break; - case PW_64: - if (count & 0x7) - error = 1; - break; - default: - printk("set_dma_count: invalid bus width: 0x%x\n", - p_dma_ch->pwidth); - return; - } - if (error) - printk - ("Warning: set_dma_count count 0x%x bus width %d\n", - count, p_dma_ch->pwidth); - } -#endif - - count = count >> p_dma_ch->shift; - - mtdcr(DCRN_DMACT0 + (dmanr * 0x8), count); -} - -/* - * Returns the number of bytes left to be transferred. - * After a DMA transfer, this should return zero. - * Reading this while a DMA transfer is still in progress will return - * unpredictable results. - */ -int -ppc4xx_get_dma_residue(unsigned int dmanr) -{ - unsigned int count; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_get_dma_residue: bad channel 0x%x\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - count = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)); - - return (count << p_dma_ch->shift); -} - -/* - * Sets the DMA address for a memory to peripheral or peripheral - * to memory transfer. The address is just saved in the channel - * structure for now and used later in enable_dma(). - */ -void -ppc4xx_set_dma_addr(unsigned int dmanr, phys_addr_t addr) -{ - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_set_dma_addr: bad channel: %d\n", dmanr); - return; - } - -#ifdef DEBUG_4xxDMA - { - int error = 0; - switch (p_dma_ch->pwidth) { - case PW_8: - break; - case PW_16: - if ((unsigned) addr & 0x1) - error = 1; - break; - case PW_32: - if ((unsigned) addr & 0x3) - error = 1; - break; - case PW_64: - if ((unsigned) addr & 0x7) - error = 1; - break; - default: - printk("ppc4xx_set_dma_addr: invalid bus width: 0x%x\n", - p_dma_ch->pwidth); - return; - } - if (error) - printk("Warning: ppc4xx_set_dma_addr addr 0x%x bus width %d\n", - addr, p_dma_ch->pwidth); - } -#endif - - /* save dma address and program it later after we know the xfer mode */ - p_dma_ch->addr = addr; -} - -/* - * Sets both DMA addresses for a memory to memory transfer. - * For memory to peripheral or peripheral to memory transfers - * the function set_dma_addr() should be used instead. - */ -void -ppc4xx_set_dma_addr2(unsigned int dmanr, phys_addr_t src_dma_addr, - phys_addr_t dst_dma_addr) -{ - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_set_dma_addr2: bad channel: %d\n", dmanr); - return; - } - -#ifdef DEBUG_4xxDMA - { - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - int error = 0; - switch (p_dma_ch->pwidth) { - case PW_8: - break; - case PW_16: - if (((unsigned) src_dma_addr & 0x1) || - ((unsigned) dst_dma_addr & 0x1) - ) - error = 1; - break; - case PW_32: - if (((unsigned) src_dma_addr & 0x3) || - ((unsigned) dst_dma_addr & 0x3) - ) - error = 1; - break; - case PW_64: - if (((unsigned) src_dma_addr & 0x7) || - ((unsigned) dst_dma_addr & 0x7) - ) - error = 1; - break; - default: - printk("ppc4xx_set_dma_addr2: invalid bus width: 0x%x\n", - p_dma_ch->pwidth); - return; - } - if (error) - printk - ("Warning: ppc4xx_set_dma_addr2 src 0x%x dst 0x%x bus width %d\n", - src_dma_addr, dst_dma_addr, p_dma_ch->pwidth); - } -#endif - - ppc4xx_set_src_addr(dmanr, src_dma_addr); - ppc4xx_set_dst_addr(dmanr, dst_dma_addr); -} - -/* - * Enables the channel interrupt. - * - * If performing a scatter/gatter transfer, this function - * MUST be called before calling alloc_dma_handle() and building - * the sgl list. Otherwise, interrupts will not be enabled, if - * they were previously disabled. - */ -int -ppc4xx_enable_dma_interrupt(unsigned int dmanr) -{ - unsigned int control; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_enable_dma_interrupt: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - p_dma_ch->int_enable = 1; - - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - control |= DMA_CIE_ENABLE; /* Channel Interrupt Enable */ - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - return DMA_STATUS_GOOD; -} - -/* - * Disables the channel interrupt. - * - * If performing a scatter/gatter transfer, this function - * MUST be called before calling alloc_dma_handle() and building - * the sgl list. Otherwise, interrupts will not be disabled, if - * they were previously enabled. - */ -int -ppc4xx_disable_dma_interrupt(unsigned int dmanr) -{ - unsigned int control; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_disable_dma_interrupt: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - p_dma_ch->int_enable = 0; - - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - control &= ~DMA_CIE_ENABLE; /* Channel Interrupt Enable */ - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - return DMA_STATUS_GOOD; -} - -/* - * Configures a DMA channel, including the peripheral bus width, if a - * peripheral is attached to the channel, the polarity of the DMAReq and - * DMAAck signals, etc. This information should really be setup by the boot - * code, since most likely the configuration won't change dynamically. - * If the kernel has to call this function, it's recommended that it's - * called from platform specific init code. The driver should not need to - * call this function. - */ -int -ppc4xx_init_dma_channel(unsigned int dmanr, ppc_dma_ch_t * p_init) -{ - unsigned int polarity; - uint32_t control = 0; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - - DMA_MODE_READ = (unsigned long) DMA_TD; /* Peripheral to Memory */ - DMA_MODE_WRITE = 0; /* Memory to Peripheral */ - - if (!p_init) { - printk("ppc4xx_init_dma_channel: NULL p_init\n"); - return DMA_STATUS_NULL_POINTER; - } - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_init_dma_channel: bad channel %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - -#if DCRN_POL > 0 - polarity = mfdcr(DCRN_POL); -#else - polarity = 0; -#endif - - /* Setup the control register based on the values passed to - * us in p_init. Then, over-write the control register with this - * new value. - */ - control |= SET_DMA_CONTROL; - - /* clear all polarity signals and then "or" in new signal levels */ - polarity &= ~GET_DMA_POLARITY(dmanr); - polarity |= p_init->polarity; -#if DCRN_POL > 0 - mtdcr(DCRN_POL, polarity); -#endif - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - /* save these values in our dma channel structure */ - memcpy(p_dma_ch, p_init, sizeof (ppc_dma_ch_t)); - - /* - * The peripheral width values written in the control register are: - * PW_8 0 - * PW_16 1 - * PW_32 2 - * PW_64 3 - * - * Since the DMA count register takes the number of "transfers", - * we need to divide the count sent to us in certain - * functions by the appropriate number. It so happens that our - * right shift value is equal to the peripheral width value. - */ - p_dma_ch->shift = p_init->pwidth; - - /* - * Save the control word for easy access. - */ - p_dma_ch->control = control; - - mtdcr(DCRN_DMASR, 0xffffffff); /* clear status register */ - return DMA_STATUS_GOOD; -} - -/* - * This function returns the channel configuration. - */ -int -ppc4xx_get_channel_config(unsigned int dmanr, ppc_dma_ch_t * p_dma_ch) -{ - unsigned int polarity; - unsigned int control; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_get_channel_config: bad channel %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - memcpy(p_dma_ch, &dma_channels[dmanr], sizeof (ppc_dma_ch_t)); - -#if DCRN_POL > 0 - polarity = mfdcr(DCRN_POL); -#else - polarity = 0; -#endif - - p_dma_ch->polarity = polarity & GET_DMA_POLARITY(dmanr); - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - - p_dma_ch->cp = GET_DMA_PRIORITY(control); - p_dma_ch->pwidth = GET_DMA_PW(control); - p_dma_ch->psc = GET_DMA_PSC(control); - p_dma_ch->pwc = GET_DMA_PWC(control); - p_dma_ch->phc = GET_DMA_PHC(control); - p_dma_ch->ce = GET_DMA_CE_ENABLE(control); - p_dma_ch->int_enable = GET_DMA_CIE_ENABLE(control); - p_dma_ch->shift = GET_DMA_PW(control); - -#ifdef CONFIG_PPC4xx_EDMA - p_dma_ch->pf = GET_DMA_PREFETCH(control); -#else - p_dma_ch->ch_enable = GET_DMA_CH(control); - p_dma_ch->ece_enable = GET_DMA_ECE(control); - p_dma_ch->tcd_disable = GET_DMA_TCD(control); -#endif - return DMA_STATUS_GOOD; -} - -/* - * Sets the priority for the DMA channel dmanr. - * Since this is setup by the hardware init function, this function - * can be used to dynamically change the priority of a channel. - * - * Acceptable priorities: - * - * PRIORITY_LOW - * PRIORITY_MID_LOW - * PRIORITY_MID_HIGH - * PRIORITY_HIGH - * - */ -int -ppc4xx_set_channel_priority(unsigned int dmanr, unsigned int priority) -{ - unsigned int control; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_set_channel_priority: bad channel %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - if ((priority != PRIORITY_LOW) && - (priority != PRIORITY_MID_LOW) && - (priority != PRIORITY_MID_HIGH) && (priority != PRIORITY_HIGH)) { - printk("ppc4xx_set_channel_priority: bad priority: 0x%x\n", priority); - } - - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - control |= SET_DMA_PRIORITY(priority); - mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control); - - return DMA_STATUS_GOOD; -} - -/* - * Returns the width of the peripheral attached to this channel. This assumes - * that someone who knows the hardware configuration, boot code or some other - * init code, already set the width. - * - * The return value is one of: - * PW_8 - * PW_16 - * PW_32 - * PW_64 - * - * The function returns 0 on error. - */ -unsigned int -ppc4xx_get_peripheral_width(unsigned int dmanr) -{ - unsigned int control; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_get_peripheral_width: bad channel %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); - - return (GET_DMA_PW(control)); -} - -/* - * Clears the channel status bits - */ -int -ppc4xx_clr_dma_status(unsigned int dmanr) -{ - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk(KERN_ERR "ppc4xx_clr_dma_status: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - mtdcr(DCRN_DMASR, ((u32)DMA_CH0_ERR | (u32)DMA_CS0 | (u32)DMA_TS0) >> dmanr); - return DMA_STATUS_GOOD; -} - -#ifdef CONFIG_PPC4xx_EDMA -/* - * Enables the burst on the channel (BTEN bit in the control/count register) - * Note: - * For scatter/gather dma, this function MUST be called before the - * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the - * sgl list and used as each sgl element is added. - */ -int -ppc4xx_enable_burst(unsigned int dmanr) -{ - unsigned int ctc; - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk(KERN_ERR "ppc4xx_enable_burst: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) | DMA_CTC_BTEN; - mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); - return DMA_STATUS_GOOD; -} -/* - * Disables the burst on the channel (BTEN bit in the control/count register) - * Note: - * For scatter/gather dma, this function MUST be called before the - * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the - * sgl list and used as each sgl element is added. - */ -int -ppc4xx_disable_burst(unsigned int dmanr) -{ - unsigned int ctc; - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk(KERN_ERR "ppc4xx_disable_burst: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BTEN; - mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); - return DMA_STATUS_GOOD; -} -/* - * Sets the burst size (number of peripheral widths) for the channel - * (BSIZ bits in the control/count register)) - * must be one of: - * DMA_CTC_BSIZ_2 - * DMA_CTC_BSIZ_4 - * DMA_CTC_BSIZ_8 - * DMA_CTC_BSIZ_16 - * Note: - * For scatter/gather dma, this function MUST be called before the - * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the - * sgl list and used as each sgl element is added. - */ -int -ppc4xx_set_burst_size(unsigned int dmanr, unsigned int bsize) -{ - unsigned int ctc; - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk(KERN_ERR "ppc4xx_set_burst_size: bad channel: %d\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BSIZ_MSK; - ctc |= (bsize & DMA_CTC_BSIZ_MSK); - mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc); - return DMA_STATUS_GOOD; -} - -EXPORT_SYMBOL(ppc4xx_enable_burst); -EXPORT_SYMBOL(ppc4xx_disable_burst); -EXPORT_SYMBOL(ppc4xx_set_burst_size); -#endif /* CONFIG_PPC4xx_EDMA */ - -EXPORT_SYMBOL(ppc4xx_init_dma_channel); -EXPORT_SYMBOL(ppc4xx_get_channel_config); -EXPORT_SYMBOL(ppc4xx_set_channel_priority); -EXPORT_SYMBOL(ppc4xx_get_peripheral_width); -EXPORT_SYMBOL(dma_channels); -EXPORT_SYMBOL(ppc4xx_set_src_addr); -EXPORT_SYMBOL(ppc4xx_set_dst_addr); -EXPORT_SYMBOL(ppc4xx_set_dma_addr); -EXPORT_SYMBOL(ppc4xx_set_dma_addr2); -EXPORT_SYMBOL(ppc4xx_enable_dma); -EXPORT_SYMBOL(ppc4xx_disable_dma); -EXPORT_SYMBOL(ppc4xx_set_dma_mode); -EXPORT_SYMBOL(ppc4xx_set_dma_count); -EXPORT_SYMBOL(ppc4xx_get_dma_residue); -EXPORT_SYMBOL(ppc4xx_enable_dma_interrupt); -EXPORT_SYMBOL(ppc4xx_disable_dma_interrupt); -EXPORT_SYMBOL(ppc4xx_get_dma_status); -EXPORT_SYMBOL(ppc4xx_clr_dma_status); - diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c deleted file mode 100644 index ee0da4b4b993c41f81750facfc7a091b6a056b3d..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc4xx_pic.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * Interrupt controller driver for PowerPC 4xx-based processors. - * - * Eugene Surovegin or - * Copyright (c) 2004, 2005 Zultys Technologies - * - * Based on original code by - * Copyright (c) 1999 Grant Erickson - * Armin Custer - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. -*/ -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -/* See comment in include/arch-ppc/ppc4xx_pic.h - * for more info about these two variables - */ -extern struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[NR_UICS] - __attribute__ ((weak)); -extern unsigned char ppc4xx_uic_ext_irq_cfg[] __attribute__ ((weak)); - -#define IRQ_MASK_UIC0(irq) (1 << (31 - (irq))) -#define IRQ_MASK_UICx(irq) (1 << (31 - ((irq) & 0x1f))) -#define IRQ_MASK_UIC1(irq) IRQ_MASK_UICx(irq) -#define IRQ_MASK_UIC2(irq) IRQ_MASK_UICx(irq) -#define IRQ_MASK_UIC3(irq) IRQ_MASK_UICx(irq) - -#define UIC_HANDLERS(n) \ -static void ppc4xx_uic##n##_enable(unsigned int irq) \ -{ \ - u32 mask = IRQ_MASK_UIC##n(irq); \ - if (irq_desc[irq].status & IRQ_LEVEL) \ - mtdcr(DCRN_UIC_SR(UIC##n), mask); \ - ppc_cached_irq_mask[n] |= mask; \ - mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \ -} \ - \ -static void ppc4xx_uic##n##_disable(unsigned int irq) \ -{ \ - ppc_cached_irq_mask[n] &= ~IRQ_MASK_UIC##n(irq); \ - mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \ - ACK_UIC##n##_PARENT \ -} \ - \ -static void ppc4xx_uic##n##_ack(unsigned int irq) \ -{ \ - u32 mask = IRQ_MASK_UIC##n(irq); \ - ppc_cached_irq_mask[n] &= ~mask; \ - mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \ - mtdcr(DCRN_UIC_SR(UIC##n), mask); \ - ACK_UIC##n##_PARENT \ -} \ - \ -static void ppc4xx_uic##n##_end(unsigned int irq) \ -{ \ - unsigned int status = irq_desc[irq].status; \ - u32 mask = IRQ_MASK_UIC##n(irq); \ - if (status & IRQ_LEVEL) { \ - mtdcr(DCRN_UIC_SR(UIC##n), mask); \ - ACK_UIC##n##_PARENT \ - } \ - if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) { \ - ppc_cached_irq_mask[n] |= mask; \ - mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \ - } \ -} - -#define DECLARE_UIC(n) \ -{ \ - .typename = "UIC"#n, \ - .enable = ppc4xx_uic##n##_enable, \ - .disable = ppc4xx_uic##n##_disable, \ - .ack = ppc4xx_uic##n##_ack, \ - .end = ppc4xx_uic##n##_end, \ -} \ - -#if NR_UICS == 4 -#define ACK_UIC0_PARENT -#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC); -#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC2NC); -#define ACK_UIC3_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC3NC); -UIC_HANDLERS(0); -UIC_HANDLERS(1); -UIC_HANDLERS(2); -UIC_HANDLERS(3); - -static int ppc4xx_pic_get_irq(void) -{ - u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); - if (uic0 & UIC0_UIC1NC) - return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); - else if (uic0 & UIC0_UIC2NC) - return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2))); - else if (uic0 & UIC0_UIC3NC) - return 128 - ffs(mfdcr(DCRN_UIC_MSR(UIC3))); - else - return uic0 ? 32 - ffs(uic0) : -1; -} - -static void __init ppc4xx_pic_impl_init(void) -{ - /* Enable cascade interrupts in UIC0 */ - ppc_cached_irq_mask[0] |= UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC; - mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC); - mtdcr(DCRN_UIC_ER(UIC0), ppc_cached_irq_mask[0]); -} - -#elif NR_UICS == 3 -#define ACK_UIC0_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC0NC); -#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC1NC); -#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC2NC); -UIC_HANDLERS(0); -UIC_HANDLERS(1); -UIC_HANDLERS(2); - -static int ppc4xx_pic_get_irq(void) -{ - u32 uicb = mfdcr(DCRN_UIC_MSR(UICB)); - if (uicb & UICB_UIC0NC) - return 32 - ffs(mfdcr(DCRN_UIC_MSR(UIC0))); - else if (uicb & UICB_UIC1NC) - return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); - else if (uicb & UICB_UIC2NC) - return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2))); - else - return -1; -} - -static void __init ppc4xx_pic_impl_init(void) -{ -#if defined(CONFIG_440GX) - /* Disable 440GP compatibility mode if it was enabled in firmware */ - SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~DCRN_SDR_MFR_PCM); -#endif - /* Configure Base UIC */ - mtdcr(DCRN_UIC_CR(UICB), 0); - mtdcr(DCRN_UIC_TR(UICB), 0); - mtdcr(DCRN_UIC_PR(UICB), 0xffffffff); - mtdcr(DCRN_UIC_SR(UICB), 0xffffffff); - mtdcr(DCRN_UIC_ER(UICB), UICB_UIC0NC | UICB_UIC1NC | UICB_UIC2NC); -} - -#elif NR_UICS == 2 -#define ACK_UIC0_PARENT -#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC); -UIC_HANDLERS(0); -UIC_HANDLERS(1); - -static int ppc4xx_pic_get_irq(void) -{ - u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); - if (uic0 & UIC0_UIC1NC) - return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); - else - return uic0 ? 32 - ffs(uic0) : -1; -} - -static void __init ppc4xx_pic_impl_init(void) -{ - /* Enable cascade interrupt in UIC0 */ - ppc_cached_irq_mask[0] |= UIC0_UIC1NC; - mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC); - mtdcr(DCRN_UIC_ER(UIC0), ppc_cached_irq_mask[0]); -} - -#elif NR_UICS == 1 -#define ACK_UIC0_PARENT -UIC_HANDLERS(0); - -static int ppc4xx_pic_get_irq(void) -{ - u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); - return uic0 ? 32 - ffs(uic0) : -1; -} - -static inline void ppc4xx_pic_impl_init(void) -{ -} -#endif - -static struct ppc4xx_uic_impl { - struct hw_interrupt_type decl; - int base; /* Base DCR number */ -} __uic[] = { - { .decl = DECLARE_UIC(0), .base = UIC0 }, -#if NR_UICS > 1 - { .decl = DECLARE_UIC(1), .base = UIC1 }, -#if NR_UICS > 2 - { .decl = DECLARE_UIC(2), .base = UIC2 }, -#if NR_UICS > 3 - { .decl = DECLARE_UIC(3), .base = UIC3 }, -#endif -#endif -#endif -}; - -static inline int is_level_sensitive(int irq) -{ - u32 tr = mfdcr(DCRN_UIC_TR(__uic[irq >> 5].base)); - return (tr & IRQ_MASK_UICx(irq)) == 0; -} - -void __init ppc4xx_pic_init(void) -{ - int i; - unsigned char *eirqs = ppc4xx_uic_ext_irq_cfg; - - for (i = 0; i < NR_UICS; ++i) { - int base = __uic[i].base; - - /* Disable everything by default */ - ppc_cached_irq_mask[i] = 0; - mtdcr(DCRN_UIC_ER(base), 0); - - /* We don't use critical interrupts */ - mtdcr(DCRN_UIC_CR(base), 0); - - /* Configure polarity and triggering */ - if (ppc4xx_core_uic_cfg) { - struct ppc4xx_uic_settings *p = ppc4xx_core_uic_cfg + i; - u32 mask = p->ext_irq_mask; - u32 pr = mfdcr(DCRN_UIC_PR(base)) & mask; - u32 tr = mfdcr(DCRN_UIC_TR(base)) & mask; - - /* "Fixed" interrupts (on-chip devices) */ - pr |= p->polarity & ~mask; - tr |= p->triggering & ~mask; - - /* Merge external IRQs settings if board port - * provided them - */ - if (eirqs && mask) { - pr &= ~mask; - tr &= ~mask; - while (mask) { - /* Extract current external IRQ mask */ - u32 eirq_mask = 1 << __ilog2(mask); - - if (!(*eirqs & IRQ_SENSE_LEVEL)) - tr |= eirq_mask; - - if (*eirqs & IRQ_POLARITY_POSITIVE) - pr |= eirq_mask; - - mask &= ~eirq_mask; - ++eirqs; - } - } - mtdcr(DCRN_UIC_PR(base), pr); - mtdcr(DCRN_UIC_TR(base), tr); - } - - /* ACK any pending interrupts to prevent false - * triggering after first enable - */ - mtdcr(DCRN_UIC_SR(base), 0xffffffff); - } - - /* Perform optional implementation specific setup - * (e.g. enable cascade interrupts for multi-UIC configurations) - */ - ppc4xx_pic_impl_init(); - - /* Attach low-level handlers */ - for (i = 0; i < (NR_UICS << 5); ++i) { - irq_desc[i].chip = &__uic[i >> 5].decl; - if (is_level_sensitive(i)) - irq_desc[i].status |= IRQ_LEVEL; - } - - ppc_md.get_irq = ppc4xx_pic_get_irq; -} diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c deleted file mode 100644 index 353d746b47e1cab033bf42371e1cabfe7dbda42e..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc4xx_setup.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * - * Copyright (c) 1999-2000 Grant Erickson - * - * Copyright 2000-2001 MontaVista Software Inc. - * Completed implementation. - * Author: MontaVista Software, Inc. - * Frank Rowand - * Debbie Chu - * Further modifications by Armin Kuster - * - * Module name: ppc4xx_setup.c - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* Function Prototypes */ -extern void abort(void); -extern void ppc4xx_find_bridges(void); - -/* Global Variables */ -bd_t __res; - -void __init -ppc4xx_setup_arch(void) -{ -#if !defined(CONFIG_BDI_SWITCH) - /* - * The Abatron BDI JTAG debugger does not tolerate others - * mucking with the debug registers. - */ - mtspr(SPRN_DBCR0, (DBCR0_IDM)); - mtspr(SPRN_DBSR, 0xffffffff); -#endif - - /* Setup PCI host bridges */ -#ifdef CONFIG_PCI - ppc4xx_find_bridges(); -#endif -} - -/* - * This routine pretty-prints the platform's internal CPU clock - * frequencies into the buffer for usage in /proc/cpuinfo. - */ - -static int -ppc4xx_show_percpuinfo(struct seq_file *m, int i) -{ - seq_printf(m, "clock\t\t: %ldMHz\n", (long)__res.bi_intfreq / 1000000); - - return 0; -} - -/* - * This routine pretty-prints the platform's internal bus clock - * frequencies into the buffer for usage in /proc/cpuinfo. - */ -static int -ppc4xx_show_cpuinfo(struct seq_file *m) -{ - bd_t *bip = &__res; - - seq_printf(m, "machine\t\t: %s\n", PPC4xx_MACHINE_NAME); - seq_printf(m, "plb bus clock\t: %ldMHz\n", - (long) bip->bi_busfreq / 1000000); -#ifdef CONFIG_PCI - seq_printf(m, "pci bus clock\t: %dMHz\n", - bip->bi_pci_busfreq / 1000000); -#endif - - return 0; -} - -/* - * Return the virtual address representing the top of physical RAM. - */ -static unsigned long __init -ppc4xx_find_end_of_memory(void) -{ - return ((unsigned long) __res.bi_memsize); -} - -void __init -ppc4xx_map_io(void) -{ - io_block_mapping(PPC4xx_ONB_IO_VADDR, - PPC4xx_ONB_IO_PADDR, PPC4xx_ONB_IO_SIZE, _PAGE_IO); -#ifdef CONFIG_PCI - io_block_mapping(PPC4xx_PCI_IO_VADDR, - PPC4xx_PCI_IO_PADDR, PPC4xx_PCI_IO_SIZE, _PAGE_IO); - io_block_mapping(PPC4xx_PCI_CFG_VADDR, - PPC4xx_PCI_CFG_PADDR, PPC4xx_PCI_CFG_SIZE, _PAGE_IO); - io_block_mapping(PPC4xx_PCI_LCFG_VADDR, - PPC4xx_PCI_LCFG_PADDR, PPC4xx_PCI_LCFG_SIZE, _PAGE_IO); -#endif -} - -void __init -ppc4xx_init_IRQ(void) -{ - ppc4xx_pic_init(); -} - -static void -ppc4xx_restart(char *cmd) -{ - printk("%s\n", cmd); - abort(); -} - -static void -ppc4xx_power_off(void) -{ - printk("System Halted\n"); - local_irq_disable(); - while (1) ; -} - -static void -ppc4xx_halt(void) -{ - printk("System Halted\n"); - local_irq_disable(); - while (1) ; -} - -/* - * This routine retrieves the internal processor frequency from the board - * information structure, sets up the kernel timer decrementer based on - * that value, enables the 4xx programmable interval timer (PIT) and sets - * it up for auto-reload. - */ -static void __init -ppc4xx_calibrate_decr(void) -{ - unsigned int freq; - bd_t *bip = &__res; - -#if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE) - /* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */ - mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE); -#endif - freq = bip->bi_tbfreq; - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); - - /* Set the time base to zero. - ** At 200 Mhz, time base will rollover in ~2925 years. - */ - - mtspr(SPRN_TBWL, 0); - mtspr(SPRN_TBWU, 0); - - /* Clear any pending timer interrupts */ - - mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS); - mtspr(SPRN_TCR, TCR_PIE | TCR_ARE); - - /* Set the PIT reload value and just let it run. */ - mtspr(SPRN_PIT, tb_ticks_per_jiffy); -} - -TODC_ALLOC(); - -/* - * Input(s): - * r3 - Optional pointer to a board information structure. - * r4 - Optional pointer to the physical starting address of the init RAM - * disk. - * r5 - Optional pointer to the physical ending address of the init RAM - * disk. - * r6 - Optional pointer to the physical starting address of any kernel - * command-line parameters. - * r7 - Optional pointer to the physical ending address of any kernel - * command-line parameters. - */ -void __init -ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - -#if defined(CONFIG_BLK_DEV_INITRD) - /* - * If the init RAM disk has been configured in, and there's a valid - * starting address for it, set it up. - */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - /* Copy the kernel command line arguments to a safe place. */ - - if (r6) { - *(char *) (r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *) (r6 + KERNELBASE)); - } - - /* Initialize machine-dependent vectors */ - - ppc_md.setup_arch = ppc4xx_setup_arch; - ppc_md.show_percpuinfo = ppc4xx_show_percpuinfo; - ppc_md.show_cpuinfo = ppc4xx_show_cpuinfo; - ppc_md.init_IRQ = ppc4xx_init_IRQ; - - ppc_md.restart = ppc4xx_restart; - ppc_md.power_off = ppc4xx_power_off; - ppc_md.halt = ppc4xx_halt; - - ppc_md.calibrate_decr = ppc4xx_calibrate_decr; - - ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory; - ppc_md.setup_io_mappings = ppc4xx_map_io; - -#ifdef CONFIG_SERIAL_TEXT_DEBUG - ppc_md.progress = gen550_progress; -#endif -} - -/* Called from machine_check_exception */ -void platform_machine_check(struct pt_regs *regs) -{ -#if defined(DCRN_PLB0_BEAR) - printk("PLB0: BEAR= 0x%08x ACR= 0x%08x BESR= 0x%08x\n", - mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR), - mfdcr(DCRN_PLB0_BESR)); -#endif -#if defined(DCRN_POB0_BEAR) - printk("PLB0 to OPB: BEAR= 0x%08x BESR0= 0x%08x BESR1= 0x%08x\n", - mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0), - mfdcr(DCRN_POB0_BESR1)); -#endif - -} diff --git a/arch/ppc/syslib/ppc4xx_sgdma.c b/arch/ppc/syslib/ppc4xx_sgdma.c deleted file mode 100644 index c4b369b50f9ce243fc46ffab47d5e0077d56ed93..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc4xx_sgdma.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - * IBM PPC4xx DMA engine scatter/gather library - * - * Copyright 2002-2003 MontaVista Software Inc. - * - * Cleaned up and converted to new DCR access - * Matt Porter - * - * Original code by Armin Kuster - * and Pete Popov - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -void -ppc4xx_set_sg_addr(int dmanr, phys_addr_t sg_addr) -{ - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_set_sg_addr: bad channel: %d\n", dmanr); - return; - } - -#ifdef PPC4xx_DMA_64BIT - mtdcr(DCRN_ASGH0 + (dmanr * 0x8), (u32)(sg_addr >> 32)); -#endif - mtdcr(DCRN_ASG0 + (dmanr * 0x8), (u32)sg_addr); -} - -/* - * Add a new sgl descriptor to the end of a scatter/gather list - * which was created by alloc_dma_handle(). - * - * For a memory to memory transfer, both dma addresses must be - * valid. For a peripheral to memory transfer, one of the addresses - * must be set to NULL, depending on the direction of the transfer: - * memory to peripheral: set dst_addr to NULL, - * peripheral to memory: set src_addr to NULL. - */ -int -ppc4xx_add_dma_sgl(sgl_handle_t handle, phys_addr_t src_addr, phys_addr_t dst_addr, - unsigned int count) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - ppc_dma_ch_t *p_dma_ch; - - if (!handle) { - printk("ppc4xx_add_dma_sgl: null handle\n"); - return DMA_STATUS_BAD_HANDLE; - } - - if (psgl->dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_add_dma_sgl: bad channel: %d\n", psgl->dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - p_dma_ch = &dma_channels[psgl->dmanr]; - -#ifdef DEBUG_4xxDMA - { - int error = 0; - unsigned int aligned = - (unsigned) src_addr | (unsigned) dst_addr | count; - switch (p_dma_ch->pwidth) { - case PW_8: - break; - case PW_16: - if (aligned & 0x1) - error = 1; - break; - case PW_32: - if (aligned & 0x3) - error = 1; - break; - case PW_64: - if (aligned & 0x7) - error = 1; - break; - default: - printk("ppc4xx_add_dma_sgl: invalid bus width: 0x%x\n", - p_dma_ch->pwidth); - return DMA_STATUS_GENERAL_ERROR; - } - if (error) - printk - ("Alignment warning: ppc4xx_add_dma_sgl src 0x%x dst 0x%x count 0x%x bus width var %d\n", - src_addr, dst_addr, count, p_dma_ch->pwidth); - - } -#endif - - if ((unsigned) (psgl->ptail + 1) >= ((unsigned) psgl + SGL_LIST_SIZE)) { - printk("sgl handle out of memory \n"); - return DMA_STATUS_OUT_OF_MEMORY; - } - - if (!psgl->ptail) { - psgl->phead = (ppc_sgl_t *) - ((unsigned) psgl + sizeof (sgl_list_info_t)); - psgl->phead_dma = psgl->dma_addr + sizeof(sgl_list_info_t); - psgl->ptail = psgl->phead; - psgl->ptail_dma = psgl->phead_dma; - } else { - if(p_dma_ch->int_on_final_sg) { - /* mask out all dma interrupts, except error, on tail - before adding new tail. */ - psgl->ptail->control_count &= - ~(SG_TCI_ENABLE | SG_ETI_ENABLE); - } - psgl->ptail->next = psgl->ptail_dma + sizeof(ppc_sgl_t); - psgl->ptail++; - psgl->ptail_dma += sizeof(ppc_sgl_t); - } - - psgl->ptail->control = psgl->control; - psgl->ptail->src_addr = src_addr; - psgl->ptail->dst_addr = dst_addr; - psgl->ptail->control_count = (count >> p_dma_ch->shift) | - psgl->sgl_control; - psgl->ptail->next = (uint32_t) NULL; - - return DMA_STATUS_GOOD; -} - -/* - * Enable (start) the DMA described by the sgl handle. - */ -void -ppc4xx_enable_dma_sgl(sgl_handle_t handle) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - ppc_dma_ch_t *p_dma_ch; - uint32_t sg_command; - - if (!handle) { - printk("ppc4xx_enable_dma_sgl: null handle\n"); - return; - } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) { - printk("ppc4xx_enable_dma_sgl: bad channel in handle %d\n", - psgl->dmanr); - return; - } else if (!psgl->phead) { - printk("ppc4xx_enable_dma_sgl: sg list empty\n"); - return; - } - - p_dma_ch = &dma_channels[psgl->dmanr]; - psgl->ptail->control_count &= ~SG_LINK; /* make this the last dscrptr */ - sg_command = mfdcr(DCRN_ASGC); - - ppc4xx_set_sg_addr(psgl->dmanr, psgl->phead_dma); - - sg_command |= SSG_ENABLE(psgl->dmanr); - - mtdcr(DCRN_ASGC, sg_command); /* start transfer */ -} - -/* - * Halt an active scatter/gather DMA operation. - */ -void -ppc4xx_disable_dma_sgl(sgl_handle_t handle) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - uint32_t sg_command; - - if (!handle) { - printk("ppc4xx_enable_dma_sgl: null handle\n"); - return; - } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) { - printk("ppc4xx_enable_dma_sgl: bad channel in handle %d\n", - psgl->dmanr); - return; - } - - sg_command = mfdcr(DCRN_ASGC); - sg_command &= ~SSG_ENABLE(psgl->dmanr); - mtdcr(DCRN_ASGC, sg_command); /* stop transfer */ -} - -/* - * Returns number of bytes left to be transferred from the entire sgl list. - * *src_addr and *dst_addr get set to the source/destination address of - * the sgl descriptor where the DMA stopped. - * - * An sgl transfer must NOT be active when this function is called. - */ -int -ppc4xx_get_dma_sgl_residue(sgl_handle_t handle, phys_addr_t * src_addr, - phys_addr_t * dst_addr) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - ppc_dma_ch_t *p_dma_ch; - ppc_sgl_t *pnext, *sgl_addr; - uint32_t count_left; - - if (!handle) { - printk("ppc4xx_get_dma_sgl_residue: null handle\n"); - return DMA_STATUS_BAD_HANDLE; - } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) { - printk("ppc4xx_get_dma_sgl_residue: bad channel in handle %d\n", - psgl->dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - sgl_addr = (ppc_sgl_t *) __va(mfdcr(DCRN_ASG0 + (psgl->dmanr * 0x8))); - count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)) & SG_COUNT_MASK; - - if (!sgl_addr) { - printk("ppc4xx_get_dma_sgl_residue: sgl addr register is null\n"); - goto error; - } - - pnext = psgl->phead; - while (pnext && - ((unsigned) pnext < ((unsigned) psgl + SGL_LIST_SIZE) && - (pnext != sgl_addr)) - ) { - pnext++; - } - - if (pnext == sgl_addr) { /* found the sgl descriptor */ - - *src_addr = pnext->src_addr; - *dst_addr = pnext->dst_addr; - - /* - * Now search the remaining descriptors and add their count. - * We already have the remaining count from this descriptor in - * count_left. - */ - pnext++; - - while ((pnext != psgl->ptail) && - ((unsigned) pnext < ((unsigned) psgl + SGL_LIST_SIZE)) - ) { - count_left += pnext->control_count & SG_COUNT_MASK; - } - - if (pnext != psgl->ptail) { /* should never happen */ - printk - ("ppc4xx_get_dma_sgl_residue error (1) psgl->ptail 0x%x handle 0x%x\n", - (unsigned int) psgl->ptail, (unsigned int) handle); - goto error; - } - - /* success */ - p_dma_ch = &dma_channels[psgl->dmanr]; - return (count_left << p_dma_ch->shift); /* count in bytes */ - - } else { - /* this shouldn't happen */ - printk - ("get_dma_sgl_residue, unable to match current address 0x%x, handle 0x%x\n", - (unsigned int) sgl_addr, (unsigned int) handle); - - } - - error: - *src_addr = (phys_addr_t) NULL; - *dst_addr = (phys_addr_t) NULL; - return 0; -} - -/* - * Returns the address(es) of the buffer(s) contained in the head element of - * the scatter/gather list. The element is removed from the scatter/gather - * list and the next element becomes the head. - * - * This function should only be called when the DMA is not active. - */ -int -ppc4xx_delete_dma_sgl_element(sgl_handle_t handle, phys_addr_t * src_dma_addr, - phys_addr_t * dst_dma_addr) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - - if (!handle) { - printk("ppc4xx_delete_sgl_element: null handle\n"); - return DMA_STATUS_BAD_HANDLE; - } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) { - printk("ppc4xx_delete_sgl_element: bad channel in handle %d\n", - psgl->dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - if (!psgl->phead) { - printk("ppc4xx_delete_sgl_element: sgl list empty\n"); - *src_dma_addr = (phys_addr_t) NULL; - *dst_dma_addr = (phys_addr_t) NULL; - return DMA_STATUS_SGL_LIST_EMPTY; - } - - *src_dma_addr = (phys_addr_t) psgl->phead->src_addr; - *dst_dma_addr = (phys_addr_t) psgl->phead->dst_addr; - - if (psgl->phead == psgl->ptail) { - /* last descriptor on the list */ - psgl->phead = NULL; - psgl->ptail = NULL; - } else { - psgl->phead++; - psgl->phead_dma += sizeof(ppc_sgl_t); - } - - return DMA_STATUS_GOOD; -} - - -/* - * Create a scatter/gather list handle. This is simply a structure which - * describes a scatter/gather list. - * - * A handle is returned in "handle" which the driver should save in order to - * be able to access this list later. A chunk of memory will be allocated - * to be used by the API for internal management purposes, including managing - * the sg list and allocating memory for the sgl descriptors. One page should - * be more than enough for that purpose. Perhaps it's a bit wasteful to use - * a whole page for a single sg list, but most likely there will be only one - * sg list per channel. - * - * Interrupt notes: - * Each sgl descriptor has a copy of the DMA control word which the DMA engine - * loads in the control register. The control word has a "global" interrupt - * enable bit for that channel. Interrupts are further qualified by a few bits - * in the sgl descriptor count register. In order to setup an sgl, we have to - * know ahead of time whether or not interrupts will be enabled at the completion - * of the transfers. Thus, enable_dma_interrupt()/disable_dma_interrupt() MUST - * be called before calling alloc_dma_handle(). If the interrupt mode will never - * change after powerup, then enable_dma_interrupt()/disable_dma_interrupt() - * do not have to be called -- interrupts will be enabled or disabled based - * on how the channel was configured after powerup by the hw_init_dma_channel() - * function. Each sgl descriptor will be setup to interrupt if an error occurs; - * however, only the last descriptor will be setup to interrupt. Thus, an - * interrupt will occur (if interrupts are enabled) only after the complete - * sgl transfer is done. - */ -int -ppc4xx_alloc_dma_handle(sgl_handle_t * phandle, unsigned int mode, unsigned int dmanr) -{ - sgl_list_info_t *psgl=NULL; - dma_addr_t dma_addr; - ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr]; - uint32_t sg_command; - uint32_t ctc_settings; - void *ret; - - if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) { - printk("ppc4xx_alloc_dma_handle: invalid channel 0x%x\n", dmanr); - return DMA_STATUS_BAD_CHANNEL; - } - - if (!phandle) { - printk("ppc4xx_alloc_dma_handle: null handle pointer\n"); - return DMA_STATUS_NULL_POINTER; - } - - /* Get a page of memory, which is zeroed out by consistent_alloc() */ - ret = dma_alloc_coherent(NULL, DMA_PPC4xx_SIZE, &dma_addr, GFP_KERNEL); - if (ret != NULL) { - memset(ret, 0, DMA_PPC4xx_SIZE); - psgl = (sgl_list_info_t *) ret; - } - - if (psgl == NULL) { - *phandle = (sgl_handle_t) NULL; - return DMA_STATUS_OUT_OF_MEMORY; - } - - psgl->dma_addr = dma_addr; - psgl->dmanr = dmanr; - - /* - * Modify and save the control word. These words will be - * written to each sgl descriptor. The DMA engine then - * loads this control word into the control register - * every time it reads a new descriptor. - */ - psgl->control = p_dma_ch->control; - /* Clear all mode bits */ - psgl->control &= ~(DMA_TM_MASK | DMA_TD); - /* Save control word and mode */ - psgl->control |= (mode | DMA_CE_ENABLE); - - /* In MM mode, we must set ETD/TCE */ - if (mode == DMA_MODE_MM) - psgl->control |= DMA_ETD_OUTPUT | DMA_TCE_ENABLE; - - if (p_dma_ch->int_enable) { - /* Enable channel interrupt */ - psgl->control |= DMA_CIE_ENABLE; - } else { - psgl->control &= ~DMA_CIE_ENABLE; - } - - sg_command = mfdcr(DCRN_ASGC); - sg_command |= SSG_MASK_ENABLE(dmanr); - - /* Enable SGL control access */ - mtdcr(DCRN_ASGC, sg_command); - psgl->sgl_control = SG_ERI_ENABLE | SG_LINK; - - /* keep control count register settings */ - ctc_settings = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) - & (DMA_CTC_BSIZ_MSK | DMA_CTC_BTEN); /*burst mode settings*/ - psgl->sgl_control |= ctc_settings; - - if (p_dma_ch->int_enable) { - if (p_dma_ch->tce_enable) - psgl->sgl_control |= SG_TCI_ENABLE; - else - psgl->sgl_control |= SG_ETI_ENABLE; - } - - *phandle = (sgl_handle_t) psgl; - return DMA_STATUS_GOOD; -} - -/* - * Destroy a scatter/gather list handle that was created by alloc_dma_handle(). - * The list must be empty (contain no elements). - */ -void -ppc4xx_free_dma_handle(sgl_handle_t handle) -{ - sgl_list_info_t *psgl = (sgl_list_info_t *) handle; - - if (!handle) { - printk("ppc4xx_free_dma_handle: got NULL\n"); - return; - } else if (psgl->phead) { - printk("ppc4xx_free_dma_handle: list not empty\n"); - return; - } else if (!psgl->dma_addr) { /* should never happen */ - printk("ppc4xx_free_dma_handle: no dma address\n"); - return; - } - - dma_free_coherent(NULL, DMA_PPC4xx_SIZE, (void *) psgl, 0); -} - -EXPORT_SYMBOL(ppc4xx_alloc_dma_handle); -EXPORT_SYMBOL(ppc4xx_free_dma_handle); -EXPORT_SYMBOL(ppc4xx_add_dma_sgl); -EXPORT_SYMBOL(ppc4xx_delete_dma_sgl_element); -EXPORT_SYMBOL(ppc4xx_enable_dma_sgl); -EXPORT_SYMBOL(ppc4xx_disable_dma_sgl); -EXPORT_SYMBOL(ppc4xx_get_dma_sgl_residue); diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c deleted file mode 100644 index bce9a75c80e3ad38df4901cd131561b64b17dbad..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc8xx_pic.c +++ /dev/null @@ -1,126 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "ppc8xx_pic.h" - -extern int cpm_get_irq(void); - -/* The 8xx internal interrupt controller. It is usually - * the only interrupt controller. Some boards, like the MBX and - * Sandpoint have the 8259 as a secondary controller. Depending - * upon the processor type, the internal controller can have as - * few as 16 interrupts or as many as 64. We could use the - * "clear_bit()" and "set_bit()" functions like other platforms, - * but they are overkill for us. - */ - -static void m8xx_mask_irq(unsigned int irq_nr) -{ - int bit, word; - - bit = irq_nr & 0x1f; - word = irq_nr >> 5; - - ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); - out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); -} - -static void m8xx_unmask_irq(unsigned int irq_nr) -{ - int bit, word; - - bit = irq_nr & 0x1f; - word = irq_nr >> 5; - - ppc_cached_irq_mask[word] |= (1 << (31-bit)); - out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); -} - -static void m8xx_end_irq(unsigned int irq_nr) -{ - if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && irq_desc[irq_nr].action) { - int bit, word; - - bit = irq_nr & 0x1f; - word = irq_nr >> 5; - - ppc_cached_irq_mask[word] |= (1 << (31-bit)); - out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); - } -} - - -static void m8xx_mask_and_ack(unsigned int irq_nr) -{ - int bit, word; - - bit = irq_nr & 0x1f; - word = irq_nr >> 5; - - ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); - out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); - out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend, 1 << (31-bit)); -} - -struct hw_interrupt_type ppc8xx_pic = { - .typename = " 8xx SIU ", - .enable = m8xx_unmask_irq, - .disable = m8xx_mask_irq, - .ack = m8xx_mask_and_ack, - .end = m8xx_end_irq, -}; - -/* - * We either return a valid interrupt or -1 if there is nothing pending - */ -int -m8xx_get_irq(struct pt_regs *regs) -{ - int irq; - - /* For MPC8xx, read the SIVEC register and shift the bits down - * to get the irq number. - */ - irq = in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec) >> 26; - - /* - * When we read the sivec without an interrupt to process, we will - * get back SIU_LEVEL7. In this case, return -1 - */ - if (irq == CPM_INTERRUPT) - irq = CPM_IRQ_OFFSET + cpm_get_irq(); -#if defined(CONFIG_PCI) - else if (irq == ISA_BRIDGE_INT) { - int isa_irq; - - if ((isa_irq = i8259_poll(regs)) >= 0) - irq = I8259_IRQ_OFFSET + isa_irq; - } -#endif /* CONFIG_PCI */ - else if (irq == SIU_LEVEL7) - irq = -1; - - return irq; -} - -#if defined(CONFIG_MBX) && defined(CONFIG_PCI) -/* Only the MBX uses the external 8259. This allows us to catch standard - * drivers that may mess up the internal interrupt controllers, and also - * allow them to run without modification on the MBX. - */ -void mbx_i8259_action(int irq, void *dev_id, struct pt_regs *regs) -{ - /* This interrupt handler never actually gets called. It is - * installed only to unmask the 8259 cascade interrupt in the SIU - * and to make the 8259 cascade interrupt visible in /proc/interrupts. - */ -} -#endif /* CONFIG_PCI */ diff --git a/arch/ppc/syslib/ppc8xx_pic.h b/arch/ppc/syslib/ppc8xx_pic.h deleted file mode 100644 index 53bcd97ef7f5514f7c01b7aa6d362cb6205c4be2..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc8xx_pic.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _PPC_KERNEL_PPC8xx_H -#define _PPC_KERNEL_PPC8xx_H - -#include -#include - -extern struct hw_interrupt_type ppc8xx_pic; - -void m8xx_do_IRQ(struct pt_regs *regs, - int cpu); -int m8xx_get_irq(struct pt_regs *regs); - -#ifdef CONFIG_MBX -#include -#include -void mbx_i8259_action(int cpl, void *dev_id, struct pt_regs *regs); -#endif - -#endif /* _PPC_KERNEL_PPC8xx_H */ diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c deleted file mode 100644 index 837183c24dfcff6072f0ae7949aabc5aeac907d6..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/ppc_sys.c +++ /dev/null @@ -1,329 +0,0 @@ -/* - * PPC System library functions - * - * Maintainer: Kumar Gala - * - * Copyright 2005 Freescale Semiconductor Inc. - * Copyright 2005 MontaVista, Inc. by Vitaly Bordug - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include - -int (*ppc_sys_device_fixup) (struct platform_device * pdev); - -static int ppc_sys_inited; -static int ppc_sys_func_inited; - -static const char *ppc_sys_func_names[] = { - [PPC_SYS_FUNC_DUMMY] = "dummy", - [PPC_SYS_FUNC_ETH] = "eth", - [PPC_SYS_FUNC_UART] = "uart", - [PPC_SYS_FUNC_HLDC] = "hldc", - [PPC_SYS_FUNC_USB] = "usb", - [PPC_SYS_FUNC_IRDA] = "irda", -}; - -void __init identify_ppc_sys_by_id(u32 id) -{ - unsigned int i = 0; - while (1) { - if ((ppc_sys_specs[i].mask & id) == ppc_sys_specs[i].value) - break; - i++; - } - - cur_ppc_sys_spec = &ppc_sys_specs[i]; - - return; -} - -void __init identify_ppc_sys_by_name(char *name) -{ - unsigned int i = 0; - while (ppc_sys_specs[i].ppc_sys_name[0]) { - if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name)) - break; - i++; - } - cur_ppc_sys_spec = &ppc_sys_specs[i]; - - return; -} - -static int __init count_sys_specs(void) -{ - int i = 0; - while (ppc_sys_specs[i].ppc_sys_name[0]) - i++; - return i; -} - -static int __init find_chip_by_name_and_id(char *name, u32 id) -{ - int ret = -1; - unsigned int i = 0; - unsigned int j = 0; - unsigned int dups = 0; - - unsigned char matched[count_sys_specs()]; - - while (ppc_sys_specs[i].ppc_sys_name[0]) { - if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name)) - matched[j++] = i; - i++; - } - - ret = i; - - if (j != 0) { - for (i = 0; i < j; i++) { - if ((ppc_sys_specs[matched[i]].mask & id) == - ppc_sys_specs[matched[i]].value) { - ret = matched[i]; - dups++; - } - } - ret = (dups == 1) ? ret : (-1 * dups); - } - return ret; -} - -void __init identify_ppc_sys_by_name_and_id(char *name, u32 id) -{ - int i = find_chip_by_name_and_id(name, id); - BUG_ON(i < 0); - cur_ppc_sys_spec = &ppc_sys_specs[i]; -} - -/* Update all memory resources by paddr, call before platform_device_register */ -void __init -ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr) -{ - int i; - for (i = 0; i < pdev->num_resources; i++) { - struct resource *r = &pdev->resource[i]; - if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) && - ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) { - r->start += paddr; - r->end += paddr; - r->flags |= PPC_SYS_IORESOURCE_FIXUPPED; - } - } -} - -/* Get platform_data pointer out of platform device, call before platform_device_register */ -void *__init ppc_sys_get_pdata(enum ppc_sys_devices dev) -{ - return ppc_sys_platform_devices[dev].dev.platform_data; -} - -void ppc_sys_device_remove(enum ppc_sys_devices dev) -{ - unsigned int i; - - if (ppc_sys_inited) { - platform_device_unregister(&ppc_sys_platform_devices[dev]); - } else { - if (cur_ppc_sys_spec == NULL) - return; - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) - if (cur_ppc_sys_spec->device_list[i] == dev) - cur_ppc_sys_spec->device_list[i] = -1; - } -} - -/* Platform-notify mapping - * Helper function for BSP code to assign board-specific platfom-divice bits - */ - -void platform_notify_map(const struct platform_notify_dev_map *map, - struct device *dev) -{ - struct platform_device *pdev; - int len, idx; - const char *s; - - /* do nothing if no device or no bus_id */ - if (!dev || !dev->bus_id) - return; - - /* call per device map */ - while (map->bus_id != NULL) { - idx = -1; - s = strrchr(dev->bus_id, '.'); - if (s != NULL) { - idx = (int)simple_strtol(s + 1, NULL, 10); - len = s - dev->bus_id; - } else { - s = dev->bus_id; - len = strlen(dev->bus_id); - } - - if (!strncmp(dev->bus_id, map->bus_id, len)) { - pdev = container_of(dev, struct platform_device, dev); - map->rtn(pdev, idx); - } - map++; - } -} - -/* - Function assignment stuff. - Intended to work as follows: - the device name defined in foo_devices.c will be concatenated with :"func", - where func is string map of respective function from platfom_device_func enum - - The PPC_SYS_FUNC_DUMMY function is intended to remove all assignments, making the device to appear - in platform bus with unmodified name. - */ - -/* - Here we'll replace .name pointers with fixed-length strings - Hereby, this should be called *before* any func stuff triggeded. - */ -void ppc_sys_device_initfunc(void) -{ - int i; - const char *name; - static char new_names[NUM_PPC_SYS_DEVS][BUS_ID_SIZE]; - enum ppc_sys_devices cur_dev; - - /* If inited yet, do nothing */ - if (ppc_sys_func_inited) - return; - - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { - if ((cur_dev = cur_ppc_sys_spec->device_list[i]) < 0) - continue; - - if (ppc_sys_platform_devices[cur_dev].name) { - /*backup name */ - name = ppc_sys_platform_devices[cur_dev].name; - strlcpy(new_names[i], name, BUS_ID_SIZE); - ppc_sys_platform_devices[cur_dev].name = new_names[i]; - } - } - - ppc_sys_func_inited = 1; -} - -/*The "engine" of the func stuff. Here we either concat specified function string description - to the name, or remove it if PPC_SYS_FUNC_DUMMY parameter is passed here*/ -void ppc_sys_device_setfunc(enum ppc_sys_devices dev, - enum platform_device_func func) -{ - char *s; - char *name = (char *)ppc_sys_platform_devices[dev].name; - char tmp[BUS_ID_SIZE]; - - if (!ppc_sys_func_inited) { - printk(KERN_ERR "Unable to alter function - not inited!\n"); - return; - } - - if (ppc_sys_inited) { - platform_device_unregister(&ppc_sys_platform_devices[dev]); - } - - if ((s = (char *)strchr(name, ':')) != NULL) { /* reassign */ - /* Either change the name after ':' or remove func modifications */ - if (func != PPC_SYS_FUNC_DUMMY) - strlcpy(s + 1, ppc_sys_func_names[func], BUS_ID_SIZE); - else - *s = 0; - } else if (func != PPC_SYS_FUNC_DUMMY) { - /* do assignment if it is not just "clear" request */ - sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]); - strlcpy(name, tmp, BUS_ID_SIZE); - } - - if (ppc_sys_inited) { - platform_device_register(&ppc_sys_platform_devices[dev]); - } -} - -void ppc_sys_device_disable(enum ppc_sys_devices dev) -{ - BUG_ON(cur_ppc_sys_spec == NULL); - - /*Check if it is enabled*/ - if(!(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED)) { - if (ppc_sys_inited) { - platform_device_unregister(&ppc_sys_platform_devices[dev]); - } - cur_ppc_sys_spec->config[dev] |= PPC_SYS_CONFIG_DISABLED; - } -} - -void ppc_sys_device_enable(enum ppc_sys_devices dev) -{ - BUG_ON(cur_ppc_sys_spec == NULL); - - /*Check if it is disabled*/ - if(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED) { - if (ppc_sys_inited) { - platform_device_register(&ppc_sys_platform_devices[dev]); - } - cur_ppc_sys_spec->config[dev] &= ~PPC_SYS_CONFIG_DISABLED; - } - -} - -void ppc_sys_device_enable_all(void) -{ - enum ppc_sys_devices cur_dev; - int i; - - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { - cur_dev = cur_ppc_sys_spec->device_list[i]; - ppc_sys_device_enable(cur_dev); - } -} - -void ppc_sys_device_disable_all(void) -{ - enum ppc_sys_devices cur_dev; - int i; - - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { - cur_dev = cur_ppc_sys_spec->device_list[i]; - ppc_sys_device_disable(cur_dev); - } -} - - -static int __init ppc_sys_init(void) -{ - unsigned int i, dev_id, ret = 0; - - BUG_ON(cur_ppc_sys_spec == NULL); - - for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) { - dev_id = cur_ppc_sys_spec->device_list[i]; - if ((dev_id != -1) && - !(cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_DISABLED)) { - if (ppc_sys_device_fixup != NULL) - ppc_sys_device_fixup(&ppc_sys_platform_devices - [dev_id]); - if (platform_device_register - (&ppc_sys_platform_devices[dev_id])) { - ret = 1; - printk(KERN_ERR - "unable to register device %d\n", - dev_id); - } - } - } - - ppc_sys_inited = 1; - return ret; -} - -subsys_initcall(ppc_sys_init); diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c deleted file mode 100644 index fefbc217a56d0600726e6f4c788832c22648bc60..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/pq2_devices.c +++ /dev/null @@ -1,393 +0,0 @@ -/* - * PQ2 Device descriptions - * - * Maintainer: Kumar Gala - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - - -#include -#include -#include -#include -#include -#include -#include -#include - -struct platform_device ppc_sys_platform_devices[] = { - [MPC82xx_CPM_FCC1] = { - .name = "fsl-cpm-fcc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "fcc_regs", - .start = 0x11300, - .end = 0x1131f, - .flags = IORESOURCE_MEM, - }, - { - .name = "fcc_pram", - .start = 0x8400, - .end = 0x84ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_FCC1, - .end = SIU_INT_FCC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_FCC2] = { - .name = "fsl-cpm-fcc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "fcc_regs", - .start = 0x11320, - .end = 0x1133f, - .flags = IORESOURCE_MEM, - }, - { - .name = "fcc_pram", - .start = 0x8500, - .end = 0x85ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_FCC2, - .end = SIU_INT_FCC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_FCC3] = { - .name = "fsl-cpm-fcc", - .id = 3, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "fcc_regs", - .start = 0x11340, - .end = 0x1135f, - .flags = IORESOURCE_MEM, - }, - { - .name = "fcc_pram", - .start = 0x8600, - .end = 0x86ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_FCC3, - .end = SIU_INT_FCC3, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_I2C] = { - .name = "fsl-cpm-i2c", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "i2c_mem", - .start = 0x11860, - .end = 0x118BF, - .flags = IORESOURCE_MEM, - }, - { - .name = "i2c_pram", - .start = 0x8afc, - .end = 0x8afd, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_I2C, - .end = SIU_INT_I2C, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SCC1] = { - .name = "fsl-cpm-scc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0x11A00, - .end = 0x11A1F, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x8000, - .end = 0x80ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SCC1, - .end = SIU_INT_SCC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SCC2] = { - .name = "fsl-cpm-scc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0x11A20, - .end = 0x11A3F, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x8100, - .end = 0x81ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SCC2, - .end = SIU_INT_SCC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SCC3] = { - .name = "fsl-cpm-scc", - .id = 3, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0x11A40, - .end = 0x11A5F, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x8200, - .end = 0x82ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SCC3, - .end = SIU_INT_SCC3, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SCC4] = { - .name = "fsl-cpm-scc", - .id = 4, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "regs", - .start = 0x11A60, - .end = 0x11A7F, - .flags = IORESOURCE_MEM, - }, - { - .name = "pram", - .start = 0x8300, - .end = 0x83ff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SCC4, - .end = SIU_INT_SCC4, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SPI] = { - .name = "fsl-cpm-spi", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "spi_mem", - .start = 0x11AA0, - .end = 0x11AFF, - .flags = IORESOURCE_MEM, - }, - { - .name = "spi_pram", - .start = 0x89fc, - .end = 0x89fd, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SPI, - .end = SIU_INT_SPI, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_MCC1] = { - .name = "fsl-cpm-mcc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "mcc_mem", - .start = 0x11B30, - .end = 0x11B3F, - .flags = IORESOURCE_MEM, - }, - { - .name = "mcc_pram", - .start = 0x8700, - .end = 0x877f, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_MCC1, - .end = SIU_INT_MCC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_MCC2] = { - .name = "fsl-cpm-mcc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "mcc_mem", - .start = 0x11B50, - .end = 0x11B5F, - .flags = IORESOURCE_MEM, - }, - { - .name = "mcc_pram", - .start = 0x8800, - .end = 0x887f, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_MCC2, - .end = SIU_INT_MCC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SMC1] = { - .name = "fsl-cpm-smc", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "smc_mem", - .start = 0x11A80, - .end = 0x11A8F, - .flags = IORESOURCE_MEM, - }, - { - .name = "smc_pram", - .start = 0x87fc, - .end = 0x87fd, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SMC1, - .end = SIU_INT_SMC1, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_SMC2] = { - .name = "fsl-cpm-smc", - .id = 2, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "smc_mem", - .start = 0x11A90, - .end = 0x11A9F, - .flags = IORESOURCE_MEM, - }, - { - .name = "smc_pram", - .start = 0x88fc, - .end = 0x88fd, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_SMC2, - .end = SIU_INT_SMC2, - .flags = IORESOURCE_IRQ, - }, - }, - }, - [MPC82xx_CPM_USB] = { - .name = "fsl-cpm-usb", - .id = 1, - .num_resources = 3, - .resource = (struct resource[]) { - { - .name = "usb_mem", - .start = 0x11b60, - .end = 0x11b78, - .flags = IORESOURCE_MEM, - }, - { - .name = "usb_pram", - .start = 0x8b00, - .end = 0x8bff, - .flags = IORESOURCE_MEM, - }, - { - .start = SIU_INT_USB, - .end = SIU_INT_USB, - .flags = IORESOURCE_IRQ, - }, - - }, - }, - [MPC82xx_SEC1] = { - .name = "fsl-sec", - .id = 1, - .num_resources = 1, - .resource = (struct resource[]) { - { - .name = "sec_mem", - .start = 0x40000, - .end = 0x52fff, - .flags = IORESOURCE_MEM, - }, - }, - }, - [MPC82xx_MDIO_BB] = { - .name = "fsl-bb-mdio", - .id = 0, - .num_resources = 0, - }, -}; - -static int __init mach_mpc82xx_fixup(struct platform_device *pdev) -{ - ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR); - return 0; -} - -static int __init mach_mpc82xx_init(void) -{ - if (ppc_md.progress) - ppc_md.progress("mach_mpc82xx_init:enter", 0); - ppc_sys_device_fixup = mach_mpc82xx_fixup; - return 0; -} - -postcore_initcall(mach_mpc82xx_init); diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c deleted file mode 100644 index 9c85300846c790cfb4c8ee434306a75f036de47c..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/pq2_sys.c +++ /dev/null @@ -1,203 +0,0 @@ -/* - * PQ2 System descriptions - * - * Maintainer: Kumar Gala - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include - -#include - -struct ppc_sys_spec *cur_ppc_sys_spec; -struct ppc_sys_spec ppc_sys_specs[] = { - /* below is a list of the 8260 family of processors */ - { - .ppc_sys_name = "8250", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 12, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - } - }, - { - .ppc_sys_name = "8255", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 11, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, - MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, - MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - } - }, - { - .ppc_sys_name = "8260", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, - } - }, - { - .ppc_sys_name = "8264", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, - } - }, - { - .ppc_sys_name = "8265", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, - } - }, - { - .ppc_sys_name = "8266", - .mask = 0x0000ff00, - .value = 0x00000000, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, - } - }, - /* below is a list of the 8272 family of processors */ - { - .ppc_sys_name = "8247", - .mask = 0x0000ff00, - .value = 0x00000d00, - .num_devices = 10, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - MPC82xx_CPM_USB, - }, - }, - { - .ppc_sys_name = "8248", - .mask = 0x0000ff00, - .value = 0x00000c00, - .num_devices = 12, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, - }, - }, - { - .ppc_sys_name = "8271", - .mask = 0x0000ff00, - .value = 0x00000d00, - .num_devices = 10, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - MPC82xx_CPM_USB, - }, - }, - { - .ppc_sys_name = "8272", - .mask = 0x0000ff00, - .value = 0x00000c00, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, - MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, - MPC82xx_MDIO_BB, - }, - }, - /* below is a list of the 8280 family of processors */ - { - .ppc_sys_name = "8270", - .mask = 0x0000ff00, - .value = 0x00000a00, - .num_devices = 12, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - }, - }, - { - .ppc_sys_name = "8275", - .mask = 0x0000ff00, - .value = 0x00000a00, - .num_devices = 12, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, - MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C, - }, - }, - { - .ppc_sys_name = "8280", - .mask = 0x0000ff00, - .value = 0x00000a00, - .num_devices = 13, - .device_list = (enum ppc_sys_devices[]) - { - MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3, - MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, - MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2, - MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, - MPC82xx_CPM_I2C, - }, - }, - { - /* default match */ - .ppc_sys_name = "", - .mask = 0x00000000, - .value = 0x00000000, - }, -}; diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c deleted file mode 100644 index 474dccbc4a8a9eff06be27bde3614e652e05e722..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/prep_nvram.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (C) 1998 Corey Minyard - * - * This reads the NvRAM on PReP compliant machines (generally from IBM or - * Motorola). Motorola kept the format of NvRAM in their ROM, PPCBUG, the - * same, long after they had stopped producing PReP compliant machines. So - * this code is useful in those cases as well. - * - */ -#include -#include -#include -#include - -#include -#include -#include -#include - -static char nvramData[MAX_PREP_NVRAM]; -static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0]; - -unsigned char prep_nvram_read_val(int addr) -{ - outb(addr, PREP_NVRAM_AS0); - outb(addr>>8, PREP_NVRAM_AS1); - return inb(PREP_NVRAM_DATA); -} - -void prep_nvram_write_val(int addr, - unsigned char val) -{ - outb(addr, PREP_NVRAM_AS0); - outb(addr>>8, PREP_NVRAM_AS1); - outb(val, PREP_NVRAM_DATA); -} - -void __init init_prep_nvram(void) -{ - unsigned char *nvp; - int i; - int nvramSize; - - /* - * The following could fail if the NvRAM were corrupt but - * we expect the boot firmware to have checked its checksum - * before boot - */ - nvp = (char *) &nvram->Header; - for (i=0; iHeader.GEAddress+nvram->Header.GELength; - if(nvramSize>MAX_PREP_NVRAM) - { - /* - * NvRAM is too large - */ - nvram->Header.GELength=0; - return; - } - - /* - * Read the remainder of the PReP NvRAM - */ - nvp = (char *) &nvram->GEArea[0]; - for (i=sizeof(HEADER); iGEArea)) < nvram->Header.GELength) - && (*cp == '\0')) - { - cp++; - } - - if ((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength) { - return cp; - } else { - return NULL; - } -} diff --git a/arch/ppc/syslib/qspan_pci.c b/arch/ppc/syslib/qspan_pci.c deleted file mode 100644 index 7a97c7440b30267f84e45b2773e85bd8f545bdd0..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/qspan_pci.c +++ /dev/null @@ -1,380 +0,0 @@ -/* - * QSpan pci routines. - * Most 8xx boards use the QSpan PCI bridge. The config address register - * is located 0x500 from the base of the bridge control/status registers. - * The data register is located at 0x504. - * This is a two step operation. First, the address register is written, - * then the data register is read/written as required. - * I don't know what to do about interrupts (yet). - * - * The RPX Classic implementation shares a chip select for normal - * PCI access and QSpan control register addresses. The selection is - * further selected by a bit setting in a board control register. - * Although it should happen, we disable interrupts during this operation - * to make sure some driver doesn't accidentally access the PCI while - * we have switched the chip select. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -/* - * This blows...... - * When reading the configuration space, if something does not respond - * the bus times out and we get a machine check interrupt. So, the - * good ol' exception tables come to mind to trap it and return some - * value. - * - * On an error we just return a -1, since that is what the caller wants - * returned if nothing is present. I copied this from __get_user_asm, - * with the only difference of returning -1 instead of EFAULT. - * There is an associated hack in the machine check trap code. - * - * The QSPAN is also a big endian device, that is it makes the PCI - * look big endian to us. This presents a problem for the Linux PCI - * functions, which assume little endian. For example, we see the - * first 32-bit word like this: - * ------------------------ - * | Device ID | Vendor ID | - * ------------------------ - * If we read/write as a double word, that's OK. But in our world, - * when read as a word, device ID is at location 0, not location 2 as - * the little endian PCI would believe. We have to switch bits in - * the PCI addresses given to us to get the data to/from the correct - * byte lanes. - * - * The QSPAN only supports 4 bits of "slot" in the dev_fn instead of 5. - * It always forces the MS bit to zero. Therefore, dev_fn values - * greater than 128 are returned as "no device found" errors. - * - * The QSPAN can only perform long word (32-bit) configuration cycles. - * The "offset" must have the two LS bits set to zero. Read operations - * require we read the entire word and then sort out what should be - * returned. Write operations other than long word require that we - * read the long word, update the proper word or byte, then write the - * entire long word back. - * - * PCI Bridge hack. We assume (correctly) that bus 0 is the primary - * PCI bus from the QSPAN. If we are called with a bus number other - * than zero, we create a Type 1 configuration access that a downstream - * PCI bridge will interpret. - */ - -#define __get_qspan_pci_config(x, addr, op) \ - __asm__ __volatile__( \ - "1: "op" %0,0(%1)\n" \ - " eieio\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,-1\n" \ - " b 2b\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 1b,3b\n" \ - ".text" \ - : "=r"(x) : "r"(addr) : " %0") - -#define QS_CONFIG_ADDR ((volatile uint *)(PCI_CSR_ADDR + 0x500)) -#define QS_CONFIG_DATA ((volatile uint *)(PCI_CSR_ADDR + 0x504)) - -#define mk_config_addr(bus, dev, offset) \ - (((bus)<<16) | ((dev)<<8) | (offset & 0xfc)) - -#define mk_config_type1(bus, dev, offset) \ - mk_config_addr(bus, dev, offset) | 1; - -static DEFINE_SPINLOCK(pcibios_lock); - -int qspan_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char *val) -{ - uint temp; - u_char *cp; -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xff; - return PCIBIOS_DEVICE_NOT_FOUND; - } - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_qspan_pci_config(temp, QS_CONFIG_DATA, "lwz"); - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - offset ^= 0x03; - cp = ((u_char *)&temp) + (offset & 0x03); - *val = *cp; - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short *val) -{ - uint temp; - ushort *sp; -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xffff; - return PCIBIOS_DEVICE_NOT_FOUND; - } - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_qspan_pci_config(temp, QS_CONFIG_DATA, "lwz"); - offset ^= 0x02; - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - sp = ((ushort *)&temp) + ((offset >> 1) & 1); - *val = *sp; - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int *val) -{ -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) { - *val = 0xffffffff; - return PCIBIOS_DEVICE_NOT_FOUND; - } - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - __get_qspan_pci_config(*val, QS_CONFIG_DATA, "lwz"); - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned char val) -{ - uint temp; - u_char *cp; -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) - return PCIBIOS_DEVICE_NOT_FOUND; - - qspan_pcibios_read_config_dword(bus, dev_fn, offset, &temp); - - offset ^= 0x03; - cp = ((u_char *)&temp) + (offset & 0x03); - *cp = val; - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *QS_CONFIG_DATA = temp; - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned short val) -{ - uint temp; - ushort *sp; -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) - return PCIBIOS_DEVICE_NOT_FOUND; - - qspan_pcibios_read_config_dword(bus, dev_fn, offset, &temp); - - offset ^= 0x02; - sp = ((ushort *)&temp) + ((offset >> 1) & 1); - *sp = val; - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *QS_CONFIG_DATA = temp; - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn, - unsigned char offset, unsigned int val) -{ -#ifdef CONFIG_RPXCLASSIC - unsigned long flags; -#endif - - if ((bus > 7) || (dev_fn > 127)) - return PCIBIOS_DEVICE_NOT_FOUND; - -#ifdef CONFIG_RPXCLASSIC - /* disable interrupts */ - spin_lock_irqsave(&pcibios_lock, flags); - *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL; - eieio(); -#endif - - if (bus == 0) - *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset); - else - *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset); - *(unsigned int *)QS_CONFIG_DATA = val; - -#ifdef CONFIG_RPXCLASSIC - *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL; - eieio(); - spin_unlock_irqrestore(&pcibios_lock, flags); -#endif - - return PCIBIOS_SUCCESSFUL; -} - -int qspan_pcibios_find_device(unsigned short vendor, unsigned short dev_id, - unsigned short index, unsigned char *bus_ptr, - unsigned char *dev_fn_ptr) -{ - int num, devfn; - unsigned int x, vendev; - - if (vendor == 0xffff) - return PCIBIOS_BAD_VENDOR_ID; - vendev = (dev_id << 16) + vendor; - num = 0; - for (devfn = 0; devfn < 32; devfn++) { - qspan_pcibios_read_config_dword(0, devfn<<3, PCI_VENDOR_ID, &x); - if (x == vendev) { - if (index == num) { - *bus_ptr = 0; - *dev_fn_ptr = devfn<<3; - return PCIBIOS_SUCCESSFUL; - } - ++num; - } - } - return PCIBIOS_DEVICE_NOT_FOUND; -} - -int qspan_pcibios_find_class(unsigned int class_code, unsigned short index, - unsigned char *bus_ptr, unsigned char *dev_fn_ptr) -{ - int devnr, x, num; - - num = 0; - for (devnr = 0; devnr < 32; devnr++) { - qspan_pcibios_read_config_dword(0, devnr<<3, PCI_CLASS_REVISION, &x); - if ((x>>8) == class_code) { - if (index == num) { - *bus_ptr = 0; - *dev_fn_ptr = devnr<<3; - return PCIBIOS_SUCCESSFUL; - } - ++num; - } - } - return PCIBIOS_DEVICE_NOT_FOUND; -} - -void __init -m8xx_pcibios_fixup(void) -{ - /* Lots to do here, all board and configuration specific. */ -} - -void __init -m8xx_setup_pci_ptrs(void) -{ - set_config_access_method(qspan); - - ppc_md.pcibios_fixup = m8xx_pcibios_fixup; -} - diff --git a/arch/ppc/syslib/todc_time.c b/arch/ppc/syslib/todc_time.c deleted file mode 100644 index a8168b8e5683b1fa94a6344a340e2ae28158a6ef..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/todc_time.c +++ /dev/null @@ -1,511 +0,0 @@ -/* - * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818 - * Real Time Clocks/Timekeepers. - * - * Author: Mark A. Greer - * mgreer@mvista.com - * - * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/* - * Depending on the hardware on your board and your board design, the - * RTC/NVRAM may be accessed either directly (like normal memory) or via - * address/data registers. If your board uses the direct method, set - * 'nvram_data' to the base address of your nvram and leave 'nvram_as0' and - * 'nvram_as1' NULL. If your board uses address/data regs to access nvram, - * set 'nvram_as0' to the address of the lower byte, set 'nvram_as1' to the - * address of the upper byte (leave NULL if using mc146818), and set - * 'nvram_data' to the address of the 8-bit data register. - * - * In order to break the assumption that the RTC and NVRAM are accessed by - * the same mechanism, you need to explicitly set 'ppc_md.rtc_read_val' and - * 'ppc_md.rtc_write_val', otherwise the values of 'ppc_md.rtc_read_val' - * and 'ppc_md.rtc_write_val' will be used. - * - * Note: Even though the documentation for the various RTC chips say that it - * take up to a second before it starts updating once the 'R' bit is - * cleared, they always seem to update even though we bang on it many - * times a second. This is true, except for the Dallas Semi 1746/1747 - * (possibly others). Those chips seem to have a real problem whenever - * we set the 'R' bit before reading them, they basically stop counting. - * --MAG - */ - -/* - * 'todc_info' should be initialized in your *_setup.c file to - * point to a fully initialized 'todc_info_t' structure. - * This structure holds all the register offsets for your particular - * TODC/RTC chip. - * TODC_ALLOC()/TODC_INIT() will allocate and initialize this table for you. - */ - -#ifdef RTC_FREQ_SELECT -#undef RTC_FREQ_SELECT -#define RTC_FREQ_SELECT control_b /* Register A */ -#endif - -#ifdef RTC_CONTROL -#undef RTC_CONTROL -#define RTC_CONTROL control_a /* Register B */ -#endif - -#ifdef RTC_INTR_FLAGS -#undef RTC_INTR_FLAGS -#define RTC_INTR_FLAGS watchdog /* Register C */ -#endif - -#ifdef RTC_VALID -#undef RTC_VALID -#define RTC_VALID interrupts /* Register D */ -#endif - -/* Access routines when RTC accessed directly (like normal memory) */ -u_char -todc_direct_read_val(int addr) -{ - return readb((void __iomem *)(todc_info->nvram_data + addr)); -} - -void -todc_direct_write_val(int addr, unsigned char val) -{ - writeb(val, (void __iomem *)(todc_info->nvram_data + addr)); - return; -} - -/* Access routines for accessing m48txx type chips via addr/data regs */ -u_char -todc_m48txx_read_val(int addr) -{ - outb(addr, todc_info->nvram_as0); - outb(addr>>todc_info->as0_bits, todc_info->nvram_as1); - return inb(todc_info->nvram_data); -} - -void -todc_m48txx_write_val(int addr, unsigned char val) -{ - outb(addr, todc_info->nvram_as0); - outb(addr>>todc_info->as0_bits, todc_info->nvram_as1); - outb(val, todc_info->nvram_data); - return; -} - -/* Access routines for accessing mc146818 type chips via addr/data regs */ -u_char -todc_mc146818_read_val(int addr) -{ - outb_p(addr, todc_info->nvram_as0); - return inb_p(todc_info->nvram_data); -} - -void -todc_mc146818_write_val(int addr, unsigned char val) -{ - outb_p(addr, todc_info->nvram_as0); - outb_p(val, todc_info->nvram_data); -} - - -/* - * Routines to make RTC chips with NVRAM buried behind an addr/data pair - * have the NVRAM and clock regs appear at the same level. - * The NVRAM will appear to start at addr 0 and the clock regs will appear - * to start immediately after the NVRAM (actually, start at offset - * todc_info->nvram_size). - */ -static inline u_char -todc_read_val(int addr) -{ - u_char val; - - if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) { - if (addr < todc_info->nvram_size) { /* NVRAM */ - ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr); - val = ppc_md.rtc_read_val(todc_info->nvram_data_reg); - } - else { /* Clock Reg */ - addr -= todc_info->nvram_size; - val = ppc_md.rtc_read_val(addr); - } - } - else { - val = ppc_md.rtc_read_val(addr); - } - - return val; -} - -static inline void -todc_write_val(int addr, u_char val) -{ - if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) { - if (addr < todc_info->nvram_size) { /* NVRAM */ - ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr); - ppc_md.rtc_write_val(todc_info->nvram_data_reg, val); - } - else { /* Clock Reg */ - addr -= todc_info->nvram_size; - ppc_md.rtc_write_val(addr, val); - } - } - else { - ppc_md.rtc_write_val(addr, val); - } -} - -/* - * TODC routines - * - * There is some ugly stuff in that there are assumptions for the mc146818. - * - * Assumptions: - * - todc_info->control_a has the offset as mc146818 Register B reg - * - todc_info->control_b has the offset as mc146818 Register A reg - * - m48txx control reg's write enable or 'W' bit is same as - * mc146818 Register B 'SET' bit (i.e., 0x80) - * - * These assumptions were made to make the code simpler. - */ -long __init -todc_time_init(void) -{ - u_char cntl_b; - - if (!ppc_md.rtc_read_val) - ppc_md.rtc_read_val = ppc_md.nvram_read_val; - if (!ppc_md.rtc_write_val) - ppc_md.rtc_write_val = ppc_md.nvram_write_val; - - cntl_b = todc_read_val(todc_info->control_b); - - if (todc_info->rtc_type == TODC_TYPE_MC146818) { - if ((cntl_b & 0x70) != 0x20) { - printk(KERN_INFO "TODC %s %s\n", - "real-time-clock was stopped.", - "Now starting..."); - cntl_b &= ~0x70; - cntl_b |= 0x20; - } - - todc_write_val(todc_info->control_b, cntl_b); - } else if (todc_info->rtc_type == TODC_TYPE_DS17285) { - u_char mode; - - mode = todc_read_val(TODC_TYPE_DS17285_CNTL_A); - /* Make sure countdown clear is not set */ - mode &= ~0x40; - /* Enable oscillator, extended register set */ - mode |= 0x30; - todc_write_val(TODC_TYPE_DS17285_CNTL_A, mode); - - } else if (todc_info->rtc_type == TODC_TYPE_DS1501) { - u_char month; - - todc_info->enable_read = TODC_DS1501_CNTL_B_TE; - todc_info->enable_write = TODC_DS1501_CNTL_B_TE; - - month = todc_read_val(todc_info->month); - - if ((month & 0x80) == 0x80) { - printk(KERN_INFO "TODC %s %s\n", - "real-time-clock was stopped.", - "Now starting..."); - month &= ~0x80; - todc_write_val(todc_info->month, month); - } - - cntl_b &= ~TODC_DS1501_CNTL_B_TE; - todc_write_val(todc_info->control_b, cntl_b); - } else { /* must be a m48txx type */ - u_char cntl_a; - - todc_info->enable_read = TODC_MK48TXX_CNTL_A_R; - todc_info->enable_write = TODC_MK48TXX_CNTL_A_W; - - cntl_a = todc_read_val(todc_info->control_a); - - /* Check & clear STOP bit in control B register */ - if (cntl_b & TODC_MK48TXX_DAY_CB) { - printk(KERN_INFO "TODC %s %s\n", - "real-time-clock was stopped.", - "Now starting..."); - - cntl_a |= todc_info->enable_write; - cntl_b &= ~TODC_MK48TXX_DAY_CB;/* Start Oscil */ - - todc_write_val(todc_info->control_a, cntl_a); - todc_write_val(todc_info->control_b, cntl_b); - } - - /* Make sure READ & WRITE bits are cleared. */ - cntl_a &= ~(todc_info->enable_write | - todc_info->enable_read); - todc_write_val(todc_info->control_a, cntl_a); - } - - return 0; -} - -/* - * There is some ugly stuff in that there are assumptions that for a mc146818, - * the todc_info->control_a has the offset of the mc146818 Register B reg and - * that the register'ss 'SET' bit is the same as the m48txx's write enable - * bit in the control register of the m48txx (i.e., 0x80). - * - * It was done to make the code look simpler. - */ -ulong -todc_get_rtc_time(void) -{ - uint year = 0, mon = 0, day = 0, hour = 0, min = 0, sec = 0; - uint limit, i; - u_char save_control, uip = 0; - - spin_lock(&rtc_lock); - save_control = todc_read_val(todc_info->control_a); - - if (todc_info->rtc_type != TODC_TYPE_MC146818) { - limit = 1; - - switch (todc_info->rtc_type) { - case TODC_TYPE_DS1553: - case TODC_TYPE_DS1557: - case TODC_TYPE_DS1743: - case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ - case TODC_TYPE_DS1747: - case TODC_TYPE_DS17285: - break; - default: - todc_write_val(todc_info->control_a, - (save_control | todc_info->enable_read)); - } - } - else { - limit = 100000000; - } - - for (i=0; irtc_type == TODC_TYPE_MC146818) { - uip = todc_read_val(todc_info->RTC_FREQ_SELECT); - } - - sec = todc_read_val(todc_info->seconds) & 0x7f; - min = todc_read_val(todc_info->minutes) & 0x7f; - hour = todc_read_val(todc_info->hours) & 0x3f; - day = todc_read_val(todc_info->day_of_month) & 0x3f; - mon = todc_read_val(todc_info->month) & 0x1f; - year = todc_read_val(todc_info->year) & 0xff; - - if (todc_info->rtc_type == TODC_TYPE_MC146818) { - uip |= todc_read_val(todc_info->RTC_FREQ_SELECT); - if ((uip & RTC_UIP) == 0) break; - } - } - - if (todc_info->rtc_type != TODC_TYPE_MC146818) { - switch (todc_info->rtc_type) { - case TODC_TYPE_DS1553: - case TODC_TYPE_DS1557: - case TODC_TYPE_DS1743: - case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ - case TODC_TYPE_DS1747: - case TODC_TYPE_DS17285: - break; - default: - save_control &= ~(todc_info->enable_read); - todc_write_val(todc_info->control_a, - save_control); - } - } - spin_unlock(&rtc_lock); - - if ((todc_info->rtc_type != TODC_TYPE_MC146818) || - ((save_control & RTC_DM_BINARY) == 0) || - RTC_ALWAYS_BCD) { - - BCD_TO_BIN(sec); - BCD_TO_BIN(min); - BCD_TO_BIN(hour); - BCD_TO_BIN(day); - BCD_TO_BIN(mon); - BCD_TO_BIN(year); - } - - year = year + 1900; - if (year < 1970) { - year += 100; - } - - return mktime(year, mon, day, hour, min, sec); -} - -int -todc_set_rtc_time(unsigned long nowtime) -{ - struct rtc_time tm; - u_char save_control, save_freq_select = 0; - - spin_lock(&rtc_lock); - to_tm(nowtime, &tm); - - save_control = todc_read_val(todc_info->control_a); - - /* Assuming MK48T59_RTC_CA_WRITE & RTC_SET are equal */ - todc_write_val(todc_info->control_a, - (save_control | todc_info->enable_write)); - save_control &= ~(todc_info->enable_write); /* in case it was set */ - - if (todc_info->rtc_type == TODC_TYPE_MC146818) { - save_freq_select = todc_read_val(todc_info->RTC_FREQ_SELECT); - todc_write_val(todc_info->RTC_FREQ_SELECT, - save_freq_select | RTC_DIV_RESET2); - } - - - tm.tm_year = (tm.tm_year - 1900) % 100; - - if ((todc_info->rtc_type != TODC_TYPE_MC146818) || - ((save_control & RTC_DM_BINARY) == 0) || - RTC_ALWAYS_BCD) { - - BIN_TO_BCD(tm.tm_sec); - BIN_TO_BCD(tm.tm_min); - BIN_TO_BCD(tm.tm_hour); - BIN_TO_BCD(tm.tm_mon); - BIN_TO_BCD(tm.tm_mday); - BIN_TO_BCD(tm.tm_year); - } - - todc_write_val(todc_info->seconds, tm.tm_sec); - todc_write_val(todc_info->minutes, tm.tm_min); - todc_write_val(todc_info->hours, tm.tm_hour); - todc_write_val(todc_info->month, tm.tm_mon); - todc_write_val(todc_info->day_of_month, tm.tm_mday); - todc_write_val(todc_info->year, tm.tm_year); - - todc_write_val(todc_info->control_a, save_control); - - if (todc_info->rtc_type == TODC_TYPE_MC146818) { - todc_write_val(todc_info->RTC_FREQ_SELECT, save_freq_select); - } - spin_unlock(&rtc_lock); - - return 0; -} - -/* - * Manipulates read bit to reliably read seconds at a high rate. - */ -static unsigned char __init todc_read_timereg(int addr) -{ - unsigned char save_control = 0, val; - - switch (todc_info->rtc_type) { - case TODC_TYPE_DS1553: - case TODC_TYPE_DS1557: - case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ - case TODC_TYPE_DS1747: - case TODC_TYPE_DS17285: - case TODC_TYPE_MC146818: - break; - default: - save_control = todc_read_val(todc_info->control_a); - todc_write_val(todc_info->control_a, - (save_control | todc_info->enable_read)); - } - val = todc_read_val(addr); - - switch (todc_info->rtc_type) { - case TODC_TYPE_DS1553: - case TODC_TYPE_DS1557: - case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */ - case TODC_TYPE_DS1747: - case TODC_TYPE_DS17285: - case TODC_TYPE_MC146818: - break; - default: - save_control &= ~(todc_info->enable_read); - todc_write_val(todc_info->control_a, save_control); - } - - return val; -} - -/* - * This was taken from prep_setup.c - * Use the NVRAM RTC to time a second to calibrate the decrementer. - */ -void __init -todc_calibrate_decr(void) -{ - ulong freq; - ulong tbl, tbu; - long i, loop_count; - u_char sec; - - todc_time_init(); - - /* - * Actually this is bad for precision, we should have a loop in - * which we only read the seconds counter. todc_read_val writes - * the address bytes on every call and this takes a lot of time. - * Perhaps an nvram_wait_change method returning a time - * stamp with a loop count as parameter would be the solution. - */ - /* - * Need to make sure the tbl doesn't roll over so if tbu increments - * during this test, we need to do it again. - */ - loop_count = 0; - - sec = todc_read_timereg(todc_info->seconds) & 0x7f; - - do { - tbu = get_tbu(); - - for (i = 0 ; i < 10000000 ; i++) {/* may take up to 1 second */ - tbl = get_tbl(); - - if ((todc_read_timereg(todc_info->seconds) & 0x7f) != sec) { - break; - } - } - - sec = todc_read_timereg(todc_info->seconds) & 0x7f; - - for (i = 0 ; i < 10000000 ; i++) { /* Should take 1 second */ - freq = get_tbl(); - - if ((todc_read_timereg(todc_info->seconds) & 0x7f) != sec) { - break; - } - } - - freq -= tbl; - } while ((get_tbu() != tbu) && (++loop_count < 2)); - - printk("time_init: decrementer frequency = %lu.%.6lu MHz\n", - freq/1000000, freq%1000000); - - tb_ticks_per_jiffy = freq / HZ; - tb_to_us = mulhwu_scale_factor(freq, 1000000); - - return; -} diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c deleted file mode 100644 index 7322781be1c6b4755a1d274ba9a7d504ac648184..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/virtex_devices.c +++ /dev/null @@ -1,276 +0,0 @@ -/* - * Virtex hard ppc405 core common device listing - * - * Copyright 2005-2007 Secret Lab Technologies Ltd. - * Copyright 2005 Freescale Semiconductor Inc. - * Copyright 2002-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include - -/* - * UARTLITE: shortcut macro for single instance - */ -#define XPAR_UARTLITE(num) { \ - .name = "uartlite", \ - .id = num, \ - .num_resources = 2, \ - .resource = (struct resource[]) { \ - { \ - .start = XPAR_UARTLITE_##num##_BASEADDR + 3, \ - .end = XPAR_UARTLITE_##num##_HIGHADDR, \ - .flags = IORESOURCE_MEM, \ - }, \ - { \ - .start = XPAR_INTC_0_UARTLITE_##num##_VEC_ID, \ - .flags = IORESOURCE_IRQ, \ - }, \ - }, \ -} - -/* - * Full UART: shortcut macro for single instance + platform data structure - */ -#define XPAR_UART(num) { \ - .mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \ - .irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \ - .iotype = UPIO_MEM, \ - .uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \ - .flags = UPF_BOOT_AUTOCONF, \ - .regshift = 2, \ -} - -/* - * SystemACE: shortcut macro for single instance - */ -#define XPAR_SYSACE(num) { \ - .name = "xsysace", \ - .id = XPAR_SYSACE_##num##_DEVICE_ID, \ - .num_resources = 2, \ - .resource = (struct resource[]) { \ - { \ - .start = XPAR_SYSACE_##num##_BASEADDR, \ - .end = XPAR_SYSACE_##num##_HIGHADDR, \ - .flags = IORESOURCE_MEM, \ - }, \ - { \ - .start = XPAR_INTC_0_SYSACE_##num##_VEC_ID, \ - .flags = IORESOURCE_IRQ, \ - }, \ - }, \ -} - -/* - * ML300/ML403 Video Device: shortcut macro for single instance - */ -#define XPAR_TFT(num) { \ - .name = "xilinxfb", \ - .id = num, \ - .num_resources = 1, \ - .resource = (struct resource[]) { \ - { \ - .start = XPAR_TFT_##num##_BASEADDR, \ - .end = XPAR_TFT_##num##_BASEADDR+7, \ - .flags = IORESOURCE_IO, \ - }, \ - }, \ -} - -#define XPAR_AC97_CONTROLLER_REFERENCE(num) { \ - .name = "ml403_ac97cr", \ - .id = num, \ - .num_resources = 3, \ - .resource = (struct resource[]) { \ - { \ - .start = XPAR_OPB_AC97_CONTROLLER_REF_##num##_BASEADDR, \ - .end = XPAR_OPB_AC97_CONTROLLER_REF_##num##_HIGHADDR, \ - .flags = IORESOURCE_MEM, \ - }, \ - { \ - .start = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_PLAYBACK_VEC_ID, \ - .end = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_PLAYBACK_VEC_ID, \ - .flags = IORESOURCE_IRQ, \ - }, \ - { \ - .start = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_RECORD_VEC_ID, \ - .end = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_RECORD_VEC_ID, \ - .flags = IORESOURCE_IRQ, \ - }, \ - }, \ -} - -/* UART 8250 driver platform data table */ -struct plat_serial8250_port virtex_serial_platform_data[] = { -#if defined(XPAR_UARTNS550_0_BASEADDR) - XPAR_UART(0), -#endif -#if defined(XPAR_UARTNS550_1_BASEADDR) - XPAR_UART(1), -#endif -#if defined(XPAR_UARTNS550_2_BASEADDR) - XPAR_UART(2), -#endif -#if defined(XPAR_UARTNS550_3_BASEADDR) - XPAR_UART(3), -#endif -#if defined(XPAR_UARTNS550_4_BASEADDR) - XPAR_UART(4), -#endif -#if defined(XPAR_UARTNS550_5_BASEADDR) - XPAR_UART(5), -#endif -#if defined(XPAR_UARTNS550_6_BASEADDR) - XPAR_UART(6), -#endif -#if defined(XPAR_UARTNS550_7_BASEADDR) - XPAR_UART(7), -#endif - { }, /* terminated by empty record */ -}; - - -struct platform_device virtex_platform_devices[] = { - /* UARTLITE instances */ -#if defined(XPAR_UARTLITE_0_BASEADDR) - XPAR_UARTLITE(0), -#endif -#if defined(XPAR_UARTLITE_1_BASEADDR) - XPAR_UARTLITE(1), -#endif -#if defined(XPAR_UARTLITE_2_BASEADDR) - XPAR_UARTLITE(2), -#endif -#if defined(XPAR_UARTLITE_3_BASEADDR) - XPAR_UARTLITE(3), -#endif -#if defined(XPAR_UARTLITE_4_BASEADDR) - XPAR_UARTLITE(4), -#endif -#if defined(XPAR_UARTLITE_5_BASEADDR) - XPAR_UARTLITE(5), -#endif -#if defined(XPAR_UARTLITE_6_BASEADDR) - XPAR_UARTLITE(6), -#endif -#if defined(XPAR_UARTLITE_7_BASEADDR) - XPAR_UARTLITE(7), -#endif - - /* Full UART instances */ -#if defined(XPAR_UARTNS550_0_BASEADDR) - { - .name = "serial8250", - .id = 0, - .dev.platform_data = virtex_serial_platform_data, - }, -#endif - - /* SystemACE instances */ -#if defined(XPAR_SYSACE_0_BASEADDR) - XPAR_SYSACE(0), -#endif -#if defined(XPAR_SYSACE_1_BASEADDR) - XPAR_SYSACE(1), -#endif - -#if defined(XPAR_TFT_0_BASEADDR) - XPAR_TFT(0), -#endif -#if defined(XPAR_TFT_1_BASEADDR) - XPAR_TFT(1), -#endif -#if defined(XPAR_TFT_2_BASEADDR) - XPAR_TFT(2), -#endif -#if defined(XPAR_TFT_3_BASEADDR) - XPAR_TFT(3), -#endif - - /* AC97 Controller Reference instances */ -#if defined(XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR) - XPAR_AC97_CONTROLLER_REFERENCE(0), -#endif -#if defined(XPAR_OPB_AC97_CONTROLLER_REF_1_BASEADDR) - XPAR_AC97_CONTROLLER_REFERENCE(1), -#endif -}; - -/* Early serial support functions */ -static void __init -virtex_early_serial_init(int num, struct plat_serial8250_port *pdata) -{ -#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) - struct uart_port serial_req; - - memset(&serial_req, 0, sizeof(serial_req)); - serial_req.mapbase = pdata->mapbase; - serial_req.membase = pdata->membase; - serial_req.irq = pdata->irq; - serial_req.uartclk = pdata->uartclk; - serial_req.regshift = pdata->regshift; - serial_req.iotype = pdata->iotype; - serial_req.flags = pdata->flags; - gen550_init(num, &serial_req); -#endif -} - -void __init -virtex_early_serial_map(void) -{ -#ifdef CONFIG_SERIAL_8250 - struct plat_serial8250_port *pdata; - int i = 0; - - pdata = virtex_serial_platform_data; - while(pdata && pdata->flags) { - pdata->membase = ioremap(pdata->mapbase, 0x100); - virtex_early_serial_init(i, pdata); - pdata++; - i++; - } -#endif /* CONFIG_SERIAL_8250 */ -} - -/* - * default fixup routine; do nothing and return success. - * - * Reimplement this routine in your custom board support file to - * override the default behaviour - */ -int __attribute__ ((weak)) -virtex_device_fixup(struct platform_device *dev) -{ - return 0; -} - -static int __init virtex_init(void) -{ - struct platform_device *index = virtex_platform_devices; - unsigned int ret = 0; - int i; - - for (i = 0; i < ARRAY_SIZE(virtex_platform_devices); i++, index++) { - if (virtex_device_fixup(index) != 0) - continue; - - if (platform_device_register(index)) { - ret = 1; - printk(KERN_ERR "cannot register dev %s:%d\n", - index->name, index->id); - } - } - return ret; -} - -subsys_initcall(virtex_init); diff --git a/arch/ppc/syslib/virtex_devices.h b/arch/ppc/syslib/virtex_devices.h deleted file mode 100644 index 6ebd9b4b8f1c92e0586f02a81485646883df0cee..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/virtex_devices.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Common support header for virtex ppc405 platforms - * - * Copyright 2007 Secret Lab Technologies Ltd. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef __ASM_VIRTEX_DEVICES_H__ -#define __ASM_VIRTEX_DEVICES_H__ - -#include -#include - -void __init virtex_early_serial_map(void); - -/* Prototype for device fixup routine. Implement this routine in the - * board specific fixup code and the generic setup code will call it for - * each device is the platform device list. - * - * If the hook returns a non-zero value, then the device will not get - * registered with the platform bus - */ -int virtex_device_fixup(struct platform_device *dev); - -/* SPI Controller IP */ -struct xspi_platform_data { - s16 bus_num; - u16 num_chipselect; - u32 speed_hz; -}; - -#endif /* __ASM_VIRTEX_DEVICES_H__ */ diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c deleted file mode 100644 index 3b82333e96d8089103fee68334ee92feac0f5cda..0000000000000000000000000000000000000000 --- a/arch/ppc/syslib/xilinx_pic.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Interrupt controller driver for Xilinx Virtex-II Pro. - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include -#include -#include - -/* No one else should require these constants, so define them locally here. */ -#define ISR 0 /* Interrupt Status Register */ -#define IPR 1 /* Interrupt Pending Register */ -#define IER 2 /* Interrupt Enable Register */ -#define IAR 3 /* Interrupt Acknowledge Register */ -#define SIE 4 /* Set Interrupt Enable bits */ -#define CIE 5 /* Clear Interrupt Enable bits */ -#define IVR 6 /* Interrupt Vector Register */ -#define MER 7 /* Master Enable Register */ - -#if XPAR_XINTC_USE_DCR == 0 -static volatile u32 *intc; -#define intc_out_be32(addr, mask) out_be32((addr), (mask)) -#define intc_in_be32(addr) in_be32((addr)) -#else -#define intc XPAR_INTC_0_BASEADDR -#define intc_out_be32(addr, mask) mtdcr((addr), (mask)) -#define intc_in_be32(addr) mfdcr((addr)) -#endif - -static void -xilinx_intc_enable(unsigned int irq) -{ - unsigned long mask = (0x00000001 << (irq & 31)); - pr_debug("enable: %d\n", irq); - intc_out_be32(intc + SIE, mask); -} - -static void -xilinx_intc_disable(unsigned int irq) -{ - unsigned long mask = (0x00000001 << (irq & 31)); - pr_debug("disable: %d\n", irq); - intc_out_be32(intc + CIE, mask); -} - -static void -xilinx_intc_disable_and_ack(unsigned int irq) -{ - unsigned long mask = (0x00000001 << (irq & 31)); - pr_debug("disable_and_ack: %d\n", irq); - intc_out_be32(intc + CIE, mask); - if (!(irq_desc[irq].status & IRQ_LEVEL)) - intc_out_be32(intc + IAR, mask); /* ack edge triggered intr */ -} - -static void -xilinx_intc_end(unsigned int irq) -{ - unsigned long mask = (0x00000001 << (irq & 31)); - - pr_debug("end: %d\n", irq); - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { - intc_out_be32(intc + SIE, mask); - /* ack level sensitive intr */ - if (irq_desc[irq].status & IRQ_LEVEL) - intc_out_be32(intc + IAR, mask); - } -} - -static struct hw_interrupt_type xilinx_intc = { - .typename = "Xilinx Interrupt Controller", - .enable = xilinx_intc_enable, - .disable = xilinx_intc_disable, - .ack = xilinx_intc_disable_and_ack, - .end = xilinx_intc_end, -}; - -int -xilinx_pic_get_irq(void) -{ - int irq; - - /* - * NOTE: This function is the one that needs to be improved in - * order to handle multiple interrupt controllers. It currently - * is hardcoded to check for interrupts only on the first INTC. - */ - - irq = intc_in_be32(intc + IVR); - if (irq != -1) - irq = irq; - - pr_debug("get_irq: %d\n", irq); - - return (irq); -} - -void __init -ppc4xx_pic_init(void) -{ - int i; - - /* - * NOTE: The assumption here is that NR_IRQS is 32 or less - * (NR_IRQS is 32 for PowerPC 405 cores by default). - */ -#if (NR_IRQS > 32) -#error NR_IRQS > 32 not supported -#endif - -#if XPAR_XINTC_USE_DCR == 0 - intc = ioremap(XPAR_INTC_0_BASEADDR, 32); - - printk(KERN_INFO "Xilinx INTC #0 at 0x%08lX mapped to 0x%08lX\n", - (unsigned long) XPAR_INTC_0_BASEADDR, (unsigned long) intc); -#else - printk(KERN_INFO "Xilinx INTC #0 at 0x%08lX (DCR)\n", - (unsigned long) XPAR_INTC_0_BASEADDR); -#endif - - /* - * Disable all external interrupts until they are - * explicitly requested. - */ - intc_out_be32(intc + IER, 0); - - /* Acknowledge any pending interrupts just in case. */ - intc_out_be32(intc + IAR, ~(u32) 0); - - /* Turn on the Master Enable. */ - intc_out_be32(intc + MER, 0x3UL); - - ppc_md.get_irq = xilinx_pic_get_irq; - - for (i = 0; i < NR_IRQS; ++i) { - irq_desc[i].chip = &xilinx_intc; - - if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i)) - irq_desc[i].status &= ~IRQ_LEVEL; - else - irq_desc[i].status |= IRQ_LEVEL; - } -} diff --git a/arch/ppc/xmon/Makefile b/arch/ppc/xmon/Makefile deleted file mode 100644 index 9aa260b926f518c303f7068f2cddd479c0fdbd43..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# Makefile for xmon - -ifdef CONFIG_8xx -obj-y := start_8xx.o -else -obj-y := start.o -endif -obj-y += xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o diff --git a/arch/ppc/xmon/ansidecl.h b/arch/ppc/xmon/ansidecl.h deleted file mode 100644 index c9b9f0929e9e2baa8b526b3f653a5d9461121f12..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/ansidecl.h +++ /dev/null @@ -1,141 +0,0 @@ -/* ANSI and traditional C compatibility macros - Copyright 1991, 1992 Free Software Foundation, Inc. - This file is part of the GNU C Library. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2 of the License, or -(at your option) any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* ANSI and traditional C compatibility macros - - ANSI C is assumed if __STDC__ is #defined. - - Macro ANSI C definition Traditional C definition - ----- ---- - ---------- ----------- - ---------- - PTR `void *' `char *' - LONG_DOUBLE `long double' `double' - VOLATILE `volatile' `' - SIGNED `signed' `' - PTRCONST `void *const' `char *' - ANSI_PROTOTYPES 1 not defined - - CONST is also defined, but is obsolete. Just use const. - - DEFUN (name, arglist, args) - - Defines function NAME. - - ARGLIST lists the arguments, separated by commas and enclosed in - parentheses. ARGLIST becomes the argument list in traditional C. - - ARGS list the arguments with their types. It becomes a prototype in - ANSI C, and the type declarations in traditional C. Arguments should - be separated with `AND'. For functions with a variable number of - arguments, the last thing listed should be `DOTS'. - - DEFUN_VOID (name) - - Defines a function NAME, which takes no arguments. - - obsolete -- EXFUN (name, (prototype)) -- obsolete. - - Replaced by PARAMS. Do not use; will disappear someday soon. - Was used in external function declarations. - In ANSI C it is `NAME PROTOTYPE' (so PROTOTYPE should be enclosed in - parentheses). In traditional C it is `NAME()'. - For a function that takes no arguments, PROTOTYPE should be `(void)'. - - PARAMS ((args)) - - We could use the EXFUN macro to handle prototype declarations, but - the name is misleading and the result is ugly. So we just define a - simple macro to handle the parameter lists, as in: - - static int foo PARAMS ((int, char)); - - This produces: `static int foo();' or `static int foo (int, char);' - - EXFUN would have done it like this: - - static int EXFUN (foo, (int, char)); - - but the function is not external...and it's hard to visually parse - the function name out of the mess. EXFUN should be considered - obsolete; new code should be written to use PARAMS. - - For example: - extern int printf PARAMS ((CONST char *format DOTS)); - int DEFUN(fprintf, (stream, format), - FILE *stream AND CONST char *format DOTS) { ... } - void DEFUN_VOID(abort) { ... } -*/ - -#ifndef _ANSIDECL_H - -#define _ANSIDECL_H 1 - - -/* Every source file includes this file, - so they will all get the switch for lint. */ -/* LINTLIBRARY */ - - -#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(WIN32) -/* All known AIX compilers implement these things (but don't always - define __STDC__). The RISC/OS MIPS compiler defines these things - in SVR4 mode, but does not define __STDC__. */ - -#define PTR void * -#define PTRCONST void *CONST -#define LONG_DOUBLE long double - -#define AND , -#define NOARGS void -#define CONST const -#define VOLATILE volatile -#define SIGNED signed -#define DOTS , ... - -#define EXFUN(name, proto) name proto -#define DEFUN(name, arglist, args) name(args) -#define DEFUN_VOID(name) name(void) - -#define PROTO(type, name, arglist) type name arglist -#define PARAMS(paramlist) paramlist -#define ANSI_PROTOTYPES 1 - -#else /* Not ANSI C. */ - -#define PTR char * -#define PTRCONST PTR -#define LONG_DOUBLE double - -#define AND ; -#define NOARGS -#define CONST -#ifndef const /* some systems define it in header files for non-ansi mode */ -#define const -#endif -#define VOLATILE -#define SIGNED -#define DOTS - -#define EXFUN(name, proto) name() -#define DEFUN(name, arglist, args) name arglist args; -#define DEFUN_VOID(name) name() -#define PROTO(type, name, arglist) type name () -#define PARAMS(paramlist) () - -#endif /* ANSI C. */ - -#endif /* ansidecl.h */ diff --git a/arch/ppc/xmon/nonstdio.h b/arch/ppc/xmon/nonstdio.h deleted file mode 100644 index 0240bc573c964093bd18bf7c2e7dedb50e164a1b..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/nonstdio.h +++ /dev/null @@ -1,22 +0,0 @@ -typedef int FILE; -extern FILE *xmon_stdin, *xmon_stdout; -#define EOF (-1) -#define stdin xmon_stdin -#define stdout xmon_stdout -#define printf xmon_printf -#define fprintf xmon_fprintf -#define fputs xmon_fputs -#define fgets xmon_fgets -#define putchar xmon_putchar -#define getchar xmon_getchar -#define putc xmon_putc -#define getc xmon_getc -#define fopen(n, m) NULL -#define fflush(f) do {} while (0) -#define fclose(f) do {} while (0) -extern char *fgets(char *, int, void *); -extern void xmon_fprintf(void *, const char *, ...); -extern void xmon_sprintf(char *, const char *, ...); -extern void xmon_puts(char*); - -#define perror(s) printf("%s: no files!\n", (s)) diff --git a/arch/ppc/xmon/ppc-dis.c b/arch/ppc/xmon/ppc-dis.c deleted file mode 100644 index 798ac1a677f6390fc1653a8eda6a59d1fc23b150..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/ppc-dis.c +++ /dev/null @@ -1,190 +0,0 @@ -/* ppc-dis.c -- Disassemble PowerPC instructions - Copyright 1994 Free Software Foundation, Inc. - Written by Ian Lance Taylor, Cygnus Support - -This file is part of GDB, GAS, and the GNU binutils. - -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -2, or (at your option) any later version. - -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "nonstdio.h" -#include "ansidecl.h" -#include "ppc.h" - -static int print_insn_powerpc PARAMS ((FILE *, unsigned long insn, - unsigned memaddr, int dialect)); - -extern void print_address PARAMS((unsigned memaddr)); - -/* Print a big endian PowerPC instruction. For convenience, also - disassemble instructions supported by the Motorola PowerPC 601. */ - -int -print_insn_big_powerpc (FILE *out, unsigned long insn, unsigned memaddr) -{ - return print_insn_powerpc (out, insn, memaddr, - PPC_OPCODE_PPC | PPC_OPCODE_601); -} - -/* Print a PowerPC or POWER instruction. */ - -static int -print_insn_powerpc (FILE *out, unsigned long insn, unsigned memaddr, - int dialect) -{ - const struct powerpc_opcode *opcode; - const struct powerpc_opcode *opcode_end; - unsigned long op; - - /* Get the major opcode of the instruction. */ - op = PPC_OP (insn); - - /* Find the first match in the opcode table. We could speed this up - a bit by doing a binary search on the major opcode. */ - opcode_end = powerpc_opcodes + powerpc_num_opcodes; - for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++) - { - unsigned long table_op; - const unsigned char *opindex; - const struct powerpc_operand *operand; - int invalid; - int need_comma; - int need_paren; - - table_op = PPC_OP (opcode->opcode); - if (op < table_op) - break; - if (op > table_op) - continue; - - if ((insn & opcode->mask) != opcode->opcode - || (opcode->flags & dialect) == 0) - continue; - - /* Make two passes over the operands. First see if any of them - have extraction functions, and, if they do, make sure the - instruction is valid. */ - invalid = 0; - for (opindex = opcode->operands; *opindex != 0; opindex++) - { - operand = powerpc_operands + *opindex; - if (operand->extract) - (*operand->extract) (insn, &invalid); - } - if (invalid) - continue; - - /* The instruction is valid. */ - fprintf(out, "%s", opcode->name); - if (opcode->operands[0] != 0) - fprintf(out, "\t"); - - /* Now extract and print the operands. */ - need_comma = 0; - need_paren = 0; - for (opindex = opcode->operands; *opindex != 0; opindex++) - { - long value; - - operand = powerpc_operands + *opindex; - - /* Operands that are marked FAKE are simply ignored. We - already made sure that the extract function considered - the instruction to be valid. */ - if ((operand->flags & PPC_OPERAND_FAKE) != 0) - continue; - - /* Extract the value from the instruction. */ - if (operand->extract) - value = (*operand->extract) (insn, (int *) 0); - else - { - value = (insn >> operand->shift) & ((1 << operand->bits) - 1); - if ((operand->flags & PPC_OPERAND_SIGNED) != 0 - && (value & (1 << (operand->bits - 1))) != 0) - value -= 1 << operand->bits; - } - - /* If the operand is optional, and the value is zero, don't - print anything. */ - if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 - && (operand->flags & PPC_OPERAND_NEXT) == 0 - && value == 0) - continue; - - if (need_comma) - { - fprintf(out, ","); - need_comma = 0; - } - - /* Print the operand as directed by the flags. */ - if ((operand->flags & PPC_OPERAND_GPR) != 0) - fprintf(out, "r%ld", value); - else if ((operand->flags & PPC_OPERAND_FPR) != 0) - fprintf(out, "f%ld", value); - else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0) - print_address (memaddr + value); - else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) - print_address (value & 0xffffffff); - else if ((operand->flags & PPC_OPERAND_CR) == 0 - || (dialect & PPC_OPCODE_PPC) == 0) - fprintf(out, "%ld", value); - else - { - if (operand->bits == 3) - fprintf(out, "cr%d", value); - else - { - static const char *cbnames[4] = { "lt", "gt", "eq", "so" }; - int cr; - int cc; - - cr = value >> 2; - if (cr != 0) - fprintf(out, "4*cr%d", cr); - cc = value & 3; - if (cc != 0) - { - if (cr != 0) - fprintf(out, "+"); - fprintf(out, "%s", cbnames[cc]); - } - } - } - - if (need_paren) - { - fprintf(out, ")"); - need_paren = 0; - } - - if ((operand->flags & PPC_OPERAND_PARENS) == 0) - need_comma = 1; - else - { - fprintf(out, "("); - need_paren = 1; - } - } - - /* We have found and printed an instruction; return. */ - return 4; - } - - /* We could not find a match. */ - fprintf(out, ".long 0x%lx", insn); - - return 4; -} diff --git a/arch/ppc/xmon/ppc-opc.c b/arch/ppc/xmon/ppc-opc.c deleted file mode 100644 index 034313cef6e7120907c2d2af16df5c4c547a80fa..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/ppc-opc.c +++ /dev/null @@ -1,2720 +0,0 @@ -/* ppc-opc.c -- PowerPC opcode list - Copyright 1994 Free Software Foundation, Inc. - Written by Ian Lance Taylor, Cygnus Support - -This file is part of GDB, GAS, and the GNU binutils. - -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -2, or (at your option) any later version. - -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include -#include -#include "ansidecl.h" -#include "ppc.h" - -/* This file holds the PowerPC opcode table. The opcode table - includes almost all of the extended instruction mnemonics. This - permits the disassembler to use them, and simplifies the assembler - logic, at the cost of increasing the table size. The table is - strictly constant data, so the compiler should be able to put it in - the .text section. - - This file also holds the operand table. All knowledge about - inserting operands into instructions and vice-versa is kept in this - file. */ - -/* Local insertion and extraction functions. */ - -static unsigned long insert_bat PARAMS ((unsigned long, long, const char **)); -static long extract_bat PARAMS ((unsigned long, int *)); -static unsigned long insert_bba PARAMS ((unsigned long, long, const char **)); -static long extract_bba PARAMS ((unsigned long, int *)); -static unsigned long insert_bd PARAMS ((unsigned long, long, const char **)); -static long extract_bd PARAMS ((unsigned long, int *)); -static unsigned long insert_bdm PARAMS ((unsigned long, long, const char **)); -static long extract_bdm PARAMS ((unsigned long, int *)); -static unsigned long insert_bdp PARAMS ((unsigned long, long, const char **)); -static long extract_bdp PARAMS ((unsigned long, int *)); -static unsigned long insert_bo PARAMS ((unsigned long, long, const char **)); -static long extract_bo PARAMS ((unsigned long, int *)); -static unsigned long insert_boe PARAMS ((unsigned long, long, const char **)); -static long extract_boe PARAMS ((unsigned long, int *)); -static unsigned long insert_ds PARAMS ((unsigned long, long, const char **)); -static long extract_ds PARAMS ((unsigned long, int *)); -static unsigned long insert_li PARAMS ((unsigned long, long, const char **)); -static long extract_li PARAMS ((unsigned long, int *)); -static unsigned long insert_mbe PARAMS ((unsigned long, long, const char **)); -static long extract_mbe PARAMS ((unsigned long, int *)); -static unsigned long insert_mb6 PARAMS ((unsigned long, long, const char **)); -static long extract_mb6 PARAMS ((unsigned long, int *)); -static unsigned long insert_nb PARAMS ((unsigned long, long, const char **)); -static long extract_nb PARAMS ((unsigned long, int *)); -static unsigned long insert_nsi PARAMS ((unsigned long, long, const char **)); -static long extract_nsi PARAMS ((unsigned long, int *)); -static unsigned long insert_ral PARAMS ((unsigned long, long, const char **)); -static unsigned long insert_ram PARAMS ((unsigned long, long, const char **)); -static unsigned long insert_ras PARAMS ((unsigned long, long, const char **)); -static unsigned long insert_rbs PARAMS ((unsigned long, long, const char **)); -static long extract_rbs PARAMS ((unsigned long, int *)); -static unsigned long insert_sh6 PARAMS ((unsigned long, long, const char **)); -static long extract_sh6 PARAMS ((unsigned long, int *)); -static unsigned long insert_spr PARAMS ((unsigned long, long, const char **)); -static long extract_spr PARAMS ((unsigned long, int *)); -static unsigned long insert_tbr PARAMS ((unsigned long, long, const char **)); -static long extract_tbr PARAMS ((unsigned long, int *)); - -/* The operands table. - - The fields are bits, shift, signed, insert, extract, flags. */ - -const struct powerpc_operand powerpc_operands[] = -{ - /* The zero index is used to indicate the end of the list of - operands. */ -#define UNUSED (0) - { 0, 0, NULL, NULL, 0 }, - - /* The BA field in an XL form instruction. */ -#define BA (1) -#define BA_MASK (0x1f << 16) - { 5, 16, NULL, NULL, PPC_OPERAND_CR }, - - /* The BA field in an XL form instruction when it must be the same - as the BT field in the same instruction. */ -#define BAT (2) - { 5, 16, insert_bat, extract_bat, PPC_OPERAND_FAKE }, - - /* The BB field in an XL form instruction. */ -#define BB (3) -#define BB_MASK (0x1f << 11) - { 5, 11, NULL, NULL, PPC_OPERAND_CR }, - - /* The BB field in an XL form instruction when it must be the same - as the BA field in the same instruction. */ -#define BBA (4) - { 5, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE }, - - /* The BD field in a B form instruction. The lower two bits are - forced to zero. */ -#define BD (5) - { 16, 0, insert_bd, extract_bd, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, - - /* The BD field in a B form instruction when absolute addressing is - used. */ -#define BDA (6) - { 16, 0, insert_bd, extract_bd, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, - - /* The BD field in a B form instruction when the - modifier is used. - This sets the y bit of the BO field appropriately. */ -#define BDM (7) - { 16, 0, insert_bdm, extract_bdm, - PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, - - /* The BD field in a B form instruction when the - modifier is used - and absolute address is used. */ -#define BDMA (8) - { 16, 0, insert_bdm, extract_bdm, - PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, - - /* The BD field in a B form instruction when the + modifier is used. - This sets the y bit of the BO field appropriately. */ -#define BDP (9) - { 16, 0, insert_bdp, extract_bdp, - PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, - - /* The BD field in a B form instruction when the + modifier is used - and absolute addressing is used. */ -#define BDPA (10) - { 16, 0, insert_bdp, extract_bdp, - PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, - - /* The BF field in an X or XL form instruction. */ -#define BF (11) - { 3, 23, NULL, NULL, PPC_OPERAND_CR }, - - /* An optional BF field. This is used for comparison instructions, - in which an omitted BF field is taken as zero. */ -#define OBF (12) - { 3, 23, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL }, - - /* The BFA field in an X or XL form instruction. */ -#define BFA (13) - { 3, 18, NULL, NULL, PPC_OPERAND_CR }, - - /* The BI field in a B form or XL form instruction. */ -#define BI (14) -#define BI_MASK (0x1f << 16) - { 5, 16, NULL, NULL, PPC_OPERAND_CR }, - - /* The BO field in a B form instruction. Certain values are - illegal. */ -#define BO (15) -#define BO_MASK (0x1f << 21) - { 5, 21, insert_bo, extract_bo, 0 }, - - /* The BO field in a B form instruction when the + or - modifier is - used. This is like the BO field, but it must be even. */ -#define BOE (16) - { 5, 21, insert_boe, extract_boe, 0 }, - - /* The BT field in an X or XL form instruction. */ -#define BT (17) - { 5, 21, NULL, NULL, PPC_OPERAND_CR }, - - /* The condition register number portion of the BI field in a B form - or XL form instruction. This is used for the extended - conditional branch mnemonics, which set the lower two bits of the - BI field. This field is optional. */ -#define CR (18) - { 3, 18, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL }, - - /* The D field in a D form instruction. This is a displacement off - a register, and implies that the next operand is a register in - parentheses. */ -#define D (19) - { 16, 0, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED }, - - /* The DS field in a DS form instruction. This is like D, but the - lower two bits are forced to zero. */ -#define DS (20) - { 16, 0, insert_ds, extract_ds, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED }, - - /* The FL1 field in a POWER SC form instruction. */ -#define FL1 (21) - { 4, 12, NULL, NULL, 0 }, - - /* The FL2 field in a POWER SC form instruction. */ -#define FL2 (22) - { 3, 2, NULL, NULL, 0 }, - - /* The FLM field in an XFL form instruction. */ -#define FLM (23) - { 8, 17, NULL, NULL, 0 }, - - /* The FRA field in an X or A form instruction. */ -#define FRA (24) -#define FRA_MASK (0x1f << 16) - { 5, 16, NULL, NULL, PPC_OPERAND_FPR }, - - /* The FRB field in an X or A form instruction. */ -#define FRB (25) -#define FRB_MASK (0x1f << 11) - { 5, 11, NULL, NULL, PPC_OPERAND_FPR }, - - /* The FRC field in an A form instruction. */ -#define FRC (26) -#define FRC_MASK (0x1f << 6) - { 5, 6, NULL, NULL, PPC_OPERAND_FPR }, - - /* The FRS field in an X form instruction or the FRT field in a D, X - or A form instruction. */ -#define FRS (27) -#define FRT (FRS) - { 5, 21, NULL, NULL, PPC_OPERAND_FPR }, - - /* The FXM field in an XFX instruction. */ -#define FXM (28) -#define FXM_MASK (0xff << 12) - { 8, 12, NULL, NULL, 0 }, - - /* The L field in a D or X form instruction. */ -#define L (29) - { 1, 21, NULL, NULL, PPC_OPERAND_OPTIONAL }, - - /* The LEV field in a POWER SC form instruction. */ -#define LEV (30) - { 7, 5, NULL, NULL, 0 }, - - /* The LI field in an I form instruction. The lower two bits are - forced to zero. */ -#define LI (31) - { 26, 0, insert_li, extract_li, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED }, - - /* The LI field in an I form instruction when used as an absolute - address. */ -#define LIA (32) - { 26, 0, insert_li, extract_li, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED }, - - /* The MB field in an M form instruction. */ -#define MB (33) -#define MB_MASK (0x1f << 6) - { 5, 6, NULL, NULL, 0 }, - - /* The ME field in an M form instruction. */ -#define ME (34) -#define ME_MASK (0x1f << 1) - { 5, 1, NULL, NULL, 0 }, - - /* The MB and ME fields in an M form instruction expressed a single - operand which is a bitmask indicating which bits to select. This - is a two operand form using PPC_OPERAND_NEXT. See the - description in opcode/ppc.h for what this means. */ -#define MBE (35) - { 5, 6, NULL, NULL, PPC_OPERAND_OPTIONAL | PPC_OPERAND_NEXT }, - { 32, 0, insert_mbe, extract_mbe, 0 }, - - /* The MB or ME field in an MD or MDS form instruction. The high - bit is wrapped to the low end. */ -#define MB6 (37) -#define ME6 (MB6) -#define MB6_MASK (0x3f << 5) - { 6, 5, insert_mb6, extract_mb6, 0 }, - - /* The NB field in an X form instruction. The value 32 is stored as - 0. */ -#define NB (38) - { 6, 11, insert_nb, extract_nb, 0 }, - - /* The NSI field in a D form instruction. This is the same as the - SI field, only negated. */ -#define NSI (39) - { 16, 0, insert_nsi, extract_nsi, - PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED }, - - /* The RA field in an D, DS, X, XO, M, or MDS form instruction. */ -#define RA (40) -#define RA_MASK (0x1f << 16) - { 5, 16, NULL, NULL, PPC_OPERAND_GPR }, - - /* The RA field in a D or X form instruction which is an updating - load, which means that the RA field may not be zero and may not - equal the RT field. */ -#define RAL (41) - { 5, 16, insert_ral, NULL, PPC_OPERAND_GPR }, - - /* The RA field in an lmw instruction, which has special value - restrictions. */ -#define RAM (42) - { 5, 16, insert_ram, NULL, PPC_OPERAND_GPR }, - - /* The RA field in a D or X form instruction which is an updating - store or an updating floating point load, which means that the RA - field may not be zero. */ -#define RAS (43) - { 5, 16, insert_ras, NULL, PPC_OPERAND_GPR }, - - /* The RB field in an X, XO, M, or MDS form instruction. */ -#define RB (44) -#define RB_MASK (0x1f << 11) - { 5, 11, NULL, NULL, PPC_OPERAND_GPR }, - - /* The RB field in an X form instruction when it must be the same as - the RS field in the instruction. This is used for extended - mnemonics like mr. */ -#define RBS (45) - { 5, 1, insert_rbs, extract_rbs, PPC_OPERAND_FAKE }, - - /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form - instruction or the RT field in a D, DS, X, XFX or XO form - instruction. */ -#define RS (46) -#define RT (RS) -#define RT_MASK (0x1f << 21) - { 5, 21, NULL, NULL, PPC_OPERAND_GPR }, - - /* The SH field in an X or M form instruction. */ -#define SH (47) -#define SH_MASK (0x1f << 11) - { 5, 11, NULL, NULL, 0 }, - - /* The SH field in an MD form instruction. This is split. */ -#define SH6 (48) -#define SH6_MASK ((0x1f << 11) | (1 << 1)) - { 6, 1, insert_sh6, extract_sh6, 0 }, - - /* The SI field in a D form instruction. */ -#define SI (49) - { 16, 0, NULL, NULL, PPC_OPERAND_SIGNED }, - - /* The SI field in a D form instruction when we accept a wide range - of positive values. */ -#define SISIGNOPT (50) - { 16, 0, NULL, NULL, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT }, - - /* The SPR field in an XFX form instruction. This is flipped--the - lower 5 bits are stored in the upper 5 and vice- versa. */ -#define SPR (51) -#define SPR_MASK (0x3ff << 11) - { 10, 11, insert_spr, extract_spr, 0 }, - - /* The BAT index number in an XFX form m[ft]ibat[lu] instruction. */ -#define SPRBAT (52) -#define SPRBAT_MASK (0x3 << 17) - { 2, 17, NULL, NULL, 0 }, - - /* The SPRG register number in an XFX form m[ft]sprg instruction. */ -#define SPRG (53) -#define SPRG_MASK (0x3 << 16) - { 2, 16, NULL, NULL, 0 }, - - /* The SR field in an X form instruction. */ -#define SR (54) - { 4, 16, NULL, NULL, 0 }, - - /* The SV field in a POWER SC form instruction. */ -#define SV (55) - { 14, 2, NULL, NULL, 0 }, - - /* The TBR field in an XFX form instruction. This is like the SPR - field, but it is optional. */ -#define TBR (56) - { 10, 11, insert_tbr, extract_tbr, PPC_OPERAND_OPTIONAL }, - - /* The TO field in a D or X form instruction. */ -#define TO (57) -#define TO_MASK (0x1f << 21) - { 5, 21, NULL, NULL, 0 }, - - /* The U field in an X form instruction. */ -#define U (58) - { 4, 12, NULL, NULL, 0 }, - - /* The UI field in a D form instruction. */ -#define UI (59) - { 16, 0, NULL, NULL, 0 }, -}; - -/* The functions used to insert and extract complicated operands. */ - -/* The BA field in an XL form instruction when it must be the same as - the BT field in the same instruction. This operand is marked FAKE. - The insertion function just copies the BT field into the BA field, - and the extraction function just checks that the fields are the - same. */ - -/*ARGSUSED*/ -static unsigned long -insert_bat(unsigned long insn, long value, const char **errmsg) -{ - return insn | (((insn >> 21) & 0x1f) << 16); -} - -static long -extract_bat(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL - && ((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f)) - *invalid = 1; - return 0; -} - -/* The BB field in an XL form instruction when it must be the same as - the BA field in the same instruction. This operand is marked FAKE. - The insertion function just copies the BA field into the BB field, - and the extraction function just checks that the fields are the - same. */ - -/*ARGSUSED*/ -static unsigned long -insert_bba(unsigned long insn, long value, const char **errmsg) -{ - return insn | (((insn >> 16) & 0x1f) << 11); -} - -static long -extract_bba(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL - && ((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f)) - *invalid = 1; - return 0; -} - -/* The BD field in a B form instruction. The lower two bits are - forced to zero. */ - -/*ARGSUSED*/ -static unsigned long -insert_bd(unsigned long insn, long value, const char **errmsg) -{ - return insn | (value & 0xfffc); -} - -/*ARGSUSED*/ -static long -extract_bd(unsigned long insn, int *invalid) -{ - if ((insn & 0x8000) != 0) - return (insn & 0xfffc) - 0x10000; - else - return insn & 0xfffc; -} - -/* The BD field in a B form instruction when the - modifier is used. - This modifier means that the branch is not expected to be taken. - We must set the y bit of the BO field to 1 if the offset is - negative. When extracting, we require that the y bit be 1 and that - the offset be positive, since if the y bit is 0 we just want to - print the normal form of the instruction. */ - -/*ARGSUSED*/ -static unsigned long -insert_bdm(unsigned long insn, long value, const char **errmsg) -{ - if ((value & 0x8000) != 0) - insn |= 1 << 21; - return insn | (value & 0xfffc); -} - -static long -extract_bdm(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL - && ((insn & (1 << 21)) == 0 - || (insn & (1 << 15)) == 0)) - *invalid = 1; - if ((insn & 0x8000) != 0) - return (insn & 0xfffc) - 0x10000; - else - return insn & 0xfffc; -} - -/* The BD field in a B form instruction when the + modifier is used. - This is like BDM, above, except that the branch is expected to be - taken. */ - -/*ARGSUSED*/ -static unsigned long -insert_bdp(unsigned long insn, long value, const char **errmsg) -{ - if ((value & 0x8000) == 0) - insn |= 1 << 21; - return insn | (value & 0xfffc); -} - -static long -extract_bdp(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL - && ((insn & (1 << 21)) == 0 - || (insn & (1 << 15)) != 0)) - *invalid = 1; - if ((insn & 0x8000) != 0) - return (insn & 0xfffc) - 0x10000; - else - return insn & 0xfffc; -} - -/* Check for legal values of a BO field. */ - -static int -valid_bo (long value) -{ - /* Certain encodings have bits that are required to be zero. These - are (z must be zero, y may be anything): - 001zy - 011zy - 1z00y - 1z01y - 1z1zz - */ - switch (value & 0x14) - { - default: - case 0: - return 1; - case 0x4: - return (value & 0x2) == 0; - case 0x10: - return (value & 0x8) == 0; - case 0x14: - return value == 0x14; - } -} - -/* The BO field in a B form instruction. Warn about attempts to set - the field to an illegal value. */ - -static unsigned long -insert_bo(unsigned long insn, long value, const char **errmsg) -{ - if (errmsg != (const char **) NULL - && ! valid_bo (value)) - *errmsg = "invalid conditional option"; - return insn | ((value & 0x1f) << 21); -} - -static long -extract_bo(unsigned long insn, int *invalid) -{ - long value; - - value = (insn >> 21) & 0x1f; - if (invalid != (int *) NULL - && ! valid_bo (value)) - *invalid = 1; - return value; -} - -/* The BO field in a B form instruction when the + or - modifier is - used. This is like the BO field, but it must be even. When - extracting it, we force it to be even. */ - -static unsigned long -insert_boe(unsigned long insn, long value, const char **errmsg) -{ - if (errmsg != (const char **) NULL) - { - if (! valid_bo (value)) - *errmsg = "invalid conditional option"; - else if ((value & 1) != 0) - *errmsg = "attempt to set y bit when using + or - modifier"; - } - return insn | ((value & 0x1f) << 21); -} - -static long -extract_boe(unsigned long insn, int *invalid) -{ - long value; - - value = (insn >> 21) & 0x1f; - if (invalid != (int *) NULL - && ! valid_bo (value)) - *invalid = 1; - return value & 0x1e; -} - -/* The DS field in a DS form instruction. This is like D, but the - lower two bits are forced to zero. */ - -/*ARGSUSED*/ -static unsigned long -insert_ds(unsigned long insn, long value, const char **errmsg) -{ - return insn | (value & 0xfffc); -} - -/*ARGSUSED*/ -static long -extract_ds(unsigned long insn, int *invalid) -{ - if ((insn & 0x8000) != 0) - return (insn & 0xfffc) - 0x10000; - else - return insn & 0xfffc; -} - -/* The LI field in an I form instruction. The lower two bits are - forced to zero. */ - -/*ARGSUSED*/ -static unsigned long -insert_li(unsigned long insn, long value, const char **errmsg) -{ - return insn | (value & 0x3fffffc); -} - -/*ARGSUSED*/ -static long -extract_li(unsigned long insn, int *invalid) -{ - if ((insn & 0x2000000) != 0) - return (insn & 0x3fffffc) - 0x4000000; - else - return insn & 0x3fffffc; -} - -/* The MB and ME fields in an M form instruction expressed as a single - operand which is itself a bitmask. The extraction function always - marks it as invalid, since we never want to recognize an - instruction which uses a field of this type. */ - -static unsigned long -insert_mbe(unsigned long insn, long value, const char **errmsg) -{ - unsigned long uval; - int mb, me; - - uval = value; - - if (uval == 0) - { - if (errmsg != (const char **) NULL) - *errmsg = "illegal bitmask"; - return insn; - } - - me = 31; - while ((uval & 1) == 0) - { - uval >>= 1; - --me; - } - - mb = me; - uval >>= 1; - while ((uval & 1) != 0) - { - uval >>= 1; - --mb; - } - - if (uval != 0) - { - if (errmsg != (const char **) NULL) - *errmsg = "illegal bitmask"; - } - - return insn | (mb << 6) | (me << 1); -} - -static long -extract_mbe(unsigned long insn, int *invalid) -{ - long ret; - int mb, me; - int i; - - if (invalid != (int *) NULL) - *invalid = 1; - - ret = 0; - mb = (insn >> 6) & 0x1f; - me = (insn >> 1) & 0x1f; - for (i = mb; i < me; i++) - ret |= 1 << (31 - i); - return ret; -} - -/* The MB or ME field in an MD or MDS form instruction. The high bit - is wrapped to the low end. */ - -/*ARGSUSED*/ -static unsigned long -insert_mb6(unsigned long insn, long value, const char **errmsg) -{ - return insn | ((value & 0x1f) << 6) | (value & 0x20); -} - -/*ARGSUSED*/ -static long -extract_mb6(unsigned long insn, int *invalid) -{ - return ((insn >> 6) & 0x1f) | (insn & 0x20); -} - -/* The NB field in an X form instruction. The value 32 is stored as - 0. */ - -static unsigned long -insert_nb(unsigned long insn, long value, const char **errmsg) -{ - if (value < 0 || value > 32) - *errmsg = "value out of range"; - if (value == 32) - value = 0; - return insn | ((value & 0x1f) << 11); -} - -/*ARGSUSED*/ -static long -extract_nb(unsigned long insn, int *invalid) -{ - long ret; - - ret = (insn >> 11) & 0x1f; - if (ret == 0) - ret = 32; - return ret; -} - -/* The NSI field in a D form instruction. This is the same as the SI - field, only negated. The extraction function always marks it as - invalid, since we never want to recognize an instruction which uses - a field of this type. */ - -/*ARGSUSED*/ -static unsigned long -insert_nsi(unsigned long insn, long value, const char **errmsg) -{ - return insn | ((- value) & 0xffff); -} - -static long -extract_nsi(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL) - *invalid = 1; - if ((insn & 0x8000) != 0) - return - ((insn & 0xffff) - 0x10000); - else - return - (insn & 0xffff); -} - -/* The RA field in a D or X form instruction which is an updating - load, which means that the RA field may not be zero and may not - equal the RT field. */ - -static unsigned long -insert_ral(unsigned long insn, long value, const char **errmsg) -{ - if (value == 0 - || value == ((insn >> 21) & 0x1f)) - *errmsg = "invalid register operand when updating"; - return insn | ((value & 0x1f) << 16); -} - -/* The RA field in an lmw instruction, which has special value - restrictions. */ - -static unsigned long -insert_ram(unsigned long insn, long value, const char **errmsg) -{ - if (value >= ((insn >> 21) & 0x1f)) - *errmsg = "index register in load range"; - return insn | ((value & 0x1f) << 16); -} - -/* The RA field in a D or X form instruction which is an updating - store or an updating floating point load, which means that the RA - field may not be zero. */ - -static unsigned long -insert_ras(unsigned long insn, long value, const char **errmsg) -{ - if (value == 0) - *errmsg = "invalid register operand when updating"; - return insn | ((value & 0x1f) << 16); -} - -/* The RB field in an X form instruction when it must be the same as - the RS field in the instruction. This is used for extended - mnemonics like mr. This operand is marked FAKE. The insertion - function just copies the BT field into the BA field, and the - extraction function just checks that the fields are the same. */ - -/*ARGSUSED*/ -static unsigned long -insert_rbs(unsigned long insn, long value, const char **errmsg) -{ - return insn | (((insn >> 21) & 0x1f) << 11); -} - -static long -extract_rbs(unsigned long insn, int *invalid) -{ - if (invalid != (int *) NULL - && ((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f)) - *invalid = 1; - return 0; -} - -/* The SH field in an MD form instruction. This is split. */ - -/*ARGSUSED*/ -static unsigned long -insert_sh6(unsigned long insn, long value, const char **errmsg) -{ - return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4); -} - -/*ARGSUSED*/ -static long -extract_sh6(unsigned long insn, int *invalid) -{ - return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20); -} - -/* The SPR field in an XFX form instruction. This is flipped--the - lower 5 bits are stored in the upper 5 and vice- versa. */ - -static unsigned long -insert_spr(unsigned long insn, long value, const char **errmsg) -{ - return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6); -} - -static long -extract_spr(unsigned long insn, int *invalid) -{ - return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0); -} - -/* The TBR field in an XFX instruction. This is just like SPR, but it - is optional. When TBR is omitted, it must be inserted as 268 (the - magic number of the TB register). These functions treat 0 - (indicating an omitted optional operand) as 268. This means that - ``mftb 4,0'' is not handled correctly. This does not matter very - much, since the architecture manual does not define mftb as - accepting any values other than 268 or 269. */ - -#define TB (268) - -static unsigned long -insert_tbr(unsigned long insn, long value, const char **errmsg) -{ - if (value == 0) - value = TB; - return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6); -} - -static long -extract_tbr(unsigned long insn, int *invalid) -{ - long ret; - - ret = ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0); - if (ret == TB) - ret = 0; - return ret; -} - -/* Macros used to form opcodes. */ - -/* The main opcode. */ -#define OP(x) (((x) & 0x3f) << 26) -#define OP_MASK OP (0x3f) - -/* The main opcode combined with a trap code in the TO field of a D - form instruction. Used for extended mnemonics for the trap - instructions. */ -#define OPTO(x,to) (OP (x) | (((to) & 0x1f) << 21)) -#define OPTO_MASK (OP_MASK | TO_MASK) - -/* The main opcode combined with a comparison size bit in the L field - of a D form or X form instruction. Used for extended mnemonics for - the comparison instructions. */ -#define OPL(x,l) (OP (x) | (((l) & 1) << 21)) -#define OPL_MASK OPL (0x3f,1) - -/* An A form instruction. */ -#define A(op, xop, rc) (OP (op) | (((xop) & 0x1f) << 1) | ((rc) & 1)) -#define A_MASK A (0x3f, 0x1f, 1) - -/* An A_MASK with the FRB field fixed. */ -#define AFRB_MASK (A_MASK | FRB_MASK) - -/* An A_MASK with the FRC field fixed. */ -#define AFRC_MASK (A_MASK | FRC_MASK) - -/* An A_MASK with the FRA and FRC fields fixed. */ -#define AFRAFRC_MASK (A_MASK | FRA_MASK | FRC_MASK) - -/* A B form instruction. */ -#define B(op, aa, lk) (OP (op) | (((aa) & 1) << 1) | ((lk) & 1)) -#define B_MASK B (0x3f, 1, 1) - -/* A B form instruction setting the BO field. */ -#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | (((bo) & 0x1f) << 21)) -#define BBO_MASK BBO (0x3f, 0x1f, 1, 1) - -/* A BBO_MASK with the y bit of the BO field removed. This permits - matching a conditional branch regardless of the setting of the y - bit. */ -#define Y_MASK (1 << 21) -#define BBOY_MASK (BBO_MASK &~ Y_MASK) - -/* A B form instruction setting the BO field and the condition bits of - the BI field. */ -#define BBOCB(op, bo, cb, aa, lk) \ - (BBO ((op), (bo), (aa), (lk)) | (((cb) & 0x3) << 16)) -#define BBOCB_MASK BBOCB (0x3f, 0x1f, 0x3, 1, 1) - -/* A BBOCB_MASK with the y bit of the BO field removed. */ -#define BBOYCB_MASK (BBOCB_MASK &~ Y_MASK) - -/* A BBOYCB_MASK in which the BI field is fixed. */ -#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK) - -/* The main opcode mask with the RA field clear. */ -#define DRA_MASK (OP_MASK | RA_MASK) - -/* A DS form instruction. */ -#define DSO(op, xop) (OP (op) | ((xop) & 0x3)) -#define DS_MASK DSO (0x3f, 3) - -/* An M form instruction. */ -#define M(op, rc) (OP (op) | ((rc) & 1)) -#define M_MASK M (0x3f, 1) - -/* An M form instruction with the ME field specified. */ -#define MME(op, me, rc) (M ((op), (rc)) | (((me) & 0x1f) << 1)) - -/* An M_MASK with the MB and ME fields fixed. */ -#define MMBME_MASK (M_MASK | MB_MASK | ME_MASK) - -/* An M_MASK with the SH and ME fields fixed. */ -#define MSHME_MASK (M_MASK | SH_MASK | ME_MASK) - -/* An MD form instruction. */ -#define MD(op, xop, rc) (OP (op) | (((xop) & 0x7) << 2) | ((rc) & 1)) -#define MD_MASK MD (0x3f, 0x7, 1) - -/* An MD_MASK with the MB field fixed. */ -#define MDMB_MASK (MD_MASK | MB6_MASK) - -/* An MD_MASK with the SH field fixed. */ -#define MDSH_MASK (MD_MASK | SH6_MASK) - -/* An MDS form instruction. */ -#define MDS(op, xop, rc) (OP (op) | (((xop) & 0xf) << 1) | ((rc) & 1)) -#define MDS_MASK MDS (0x3f, 0xf, 1) - -/* An MDS_MASK with the MB field fixed. */ -#define MDSMB_MASK (MDS_MASK | MB6_MASK) - -/* An SC form instruction. */ -#define SC(op, sa, lk) (OP (op) | (((sa) & 1) << 1) | ((lk) & 1)) -#define SC_MASK (OP_MASK | (0x3ff << 16) | (1 << 1) | 1) - -/* An X form instruction. */ -#define X(op, xop) (OP (op) | (((xop) & 0x3ff) << 1)) - -/* An X form instruction with the RC bit specified. */ -#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1)) - -/* The mask for an X form instruction. */ -#define X_MASK XRC (0x3f, 0x3ff, 1) - -/* An X_MASK with the RA field fixed. */ -#define XRA_MASK (X_MASK | RA_MASK) - -/* An X_MASK with the RB field fixed. */ -#define XRB_MASK (X_MASK | RB_MASK) - -/* An X_MASK with the RT field fixed. */ -#define XRT_MASK (X_MASK | RT_MASK) - -/* An X_MASK with the RA and RB fields fixed. */ -#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK) - -/* An X_MASK with the RT and RA fields fixed. */ -#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK) - -/* An X form comparison instruction. */ -#define XCMPL(op, xop, l) (X ((op), (xop)) | (((l) & 1) << 21)) - -/* The mask for an X form comparison instruction. */ -#define XCMP_MASK (X_MASK | (1 << 22)) - -/* The mask for an X form comparison instruction with the L field - fixed. */ -#define XCMPL_MASK (XCMP_MASK | (1 << 21)) - -/* An X form trap instruction with the TO field specified. */ -#define XTO(op, xop, to) (X ((op), (xop)) | (((to) & 0x1f) << 21)) -#define XTO_MASK (X_MASK | TO_MASK) - -/* An XFL form instruction. */ -#define XFL(op, xop, rc) (OP (op) | (((xop) & 0x3ff) << 1) | ((rc) & 1)) -#define XFL_MASK (XFL (0x3f, 0x3ff, 1) | (1 << 25) | (1 << 16)) - -/* An XL form instruction with the LK field set to 0. */ -#define XL(op, xop) (OP (op) | (((xop) & 0x3ff) << 1)) - -/* An XL form instruction which uses the LK field. */ -#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1)) - -/* The mask for an XL form instruction. */ -#define XL_MASK XLLK (0x3f, 0x3ff, 1) - -/* An XL form instruction which explicitly sets the BO field. */ -#define XLO(op, bo, xop, lk) \ - (XLLK ((op), (xop), (lk)) | (((bo) & 0x1f) << 21)) -#define XLO_MASK (XL_MASK | BO_MASK) - -/* An XL form instruction which explicitly sets the y bit of the BO - field. */ -#define XLYLK(op, xop, y, lk) (XLLK ((op), (xop), (lk)) | (((y) & 1) << 21)) -#define XLYLK_MASK (XL_MASK | Y_MASK) - -/* An XL form instruction which sets the BO field and the condition - bits of the BI field. */ -#define XLOCB(op, bo, cb, xop, lk) \ - (XLO ((op), (bo), (xop), (lk)) | (((cb) & 3) << 16)) -#define XLOCB_MASK XLOCB (0x3f, 0x1f, 0x3, 0x3ff, 1) - -/* An XL_MASK or XLYLK_MASK or XLOCB_MASK with the BB field fixed. */ -#define XLBB_MASK (XL_MASK | BB_MASK) -#define XLYBB_MASK (XLYLK_MASK | BB_MASK) -#define XLBOCBBB_MASK (XLOCB_MASK | BB_MASK) - -/* An XL_MASK with the BO and BB fields fixed. */ -#define XLBOBB_MASK (XL_MASK | BO_MASK | BB_MASK) - -/* An XL_MASK with the BO, BI and BB fields fixed. */ -#define XLBOBIBB_MASK (XL_MASK | BO_MASK | BI_MASK | BB_MASK) - -/* An XO form instruction. */ -#define XO(op, xop, oe, rc) \ - (OP (op) | (((xop) & 0x1ff) << 1) | (((oe) & 1) << 10) | ((rc) & 1)) -#define XO_MASK XO (0x3f, 0x1ff, 1, 1) - -/* An XO_MASK with the RB field fixed. */ -#define XORB_MASK (XO_MASK | RB_MASK) - -/* An XS form instruction. */ -#define XS(op, xop, rc) (OP (op) | (((xop) & 0x1ff) << 2) | ((rc) & 1)) -#define XS_MASK XS (0x3f, 0x1ff, 1) - -/* A mask for the FXM version of an XFX form instruction. */ -#define XFXFXM_MASK (X_MASK | (1 << 20) | (1 << 11)) - -/* An XFX form instruction with the FXM field filled in. */ -#define XFXM(op, xop, fxm) \ - (X ((op), (xop)) | (((fxm) & 0xff) << 12)) - -/* An XFX form instruction with the SPR field filled in. */ -#define XSPR(op, xop, spr) \ - (X ((op), (xop)) | (((spr) & 0x1f) << 16) | (((spr) & 0x3e0) << 6)) -#define XSPR_MASK (X_MASK | SPR_MASK) - -/* An XFX form instruction with the SPR field filled in except for the - SPRBAT field. */ -#define XSPRBAT_MASK (XSPR_MASK &~ SPRBAT_MASK) - -/* An XFX form instruction with the SPR field filled in except for the - SPRG field. */ -#define XSPRG_MASK (XSPR_MASK &~ SPRG_MASK) - -/* The BO encodings used in extended conditional branch mnemonics. */ -#define BODNZF (0x0) -#define BODNZFP (0x1) -#define BODZF (0x2) -#define BODZFP (0x3) -#define BOF (0x4) -#define BOFP (0x5) -#define BODNZT (0x8) -#define BODNZTP (0x9) -#define BODZT (0xa) -#define BODZTP (0xb) -#define BOT (0xc) -#define BOTP (0xd) -#define BODNZ (0x10) -#define BODNZP (0x11) -#define BODZ (0x12) -#define BODZP (0x13) -#define BOU (0x14) - -/* The BI condition bit encodings used in extended conditional branch - mnemonics. */ -#define CBLT (0) -#define CBGT (1) -#define CBEQ (2) -#define CBSO (3) - -/* The TO encodings used in extended trap mnemonics. */ -#define TOLGT (0x1) -#define TOLLT (0x2) -#define TOEQ (0x4) -#define TOLGE (0x5) -#define TOLNL (0x5) -#define TOLLE (0x6) -#define TOLNG (0x6) -#define TOGT (0x8) -#define TOGE (0xc) -#define TONL (0xc) -#define TOLT (0x10) -#define TOLE (0x14) -#define TONG (0x14) -#define TONE (0x18) -#define TOU (0x1f) - -/* Smaller names for the flags so each entry in the opcodes table will - fit on a single line. */ -#undef PPC -#define PPC PPC_OPCODE_PPC -#define POWER PPC_OPCODE_POWER -#define POWER2 PPC_OPCODE_POWER2 -#define B32 PPC_OPCODE_32 -#define B64 PPC_OPCODE_64 -#define M601 PPC_OPCODE_601 - -/* The opcode table. - - The format of the opcode table is: - - NAME OPCODE MASK FLAGS { OPERANDS } - - NAME is the name of the instruction. - OPCODE is the instruction opcode. - MASK is the opcode mask; this is used to tell the disassembler - which bits in the actual opcode must match OPCODE. - FLAGS are flags indicated what processors support the instruction. - OPERANDS is the list of operands. - - The disassembler reads the table in order and prints the first - instruction which matches, so this table is sorted to put more - specific instructions before more general instructions. It is also - sorted by major opcode. */ - -const struct powerpc_opcode powerpc_opcodes[] = { -{ "tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdgti", OPTO(2,TOGT), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdgei", OPTO(2,TOGE), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdnli", OPTO(2,TONL), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdlti", OPTO(2,TOLT), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdlei", OPTO(2,TOLE), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdngi", OPTO(2,TONG), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdnei", OPTO(2,TONE), OPTO_MASK, PPC|B64, { RA, SI } }, -{ "tdi", OP(2), OP_MASK, PPC|B64, { TO, RA, SI } }, - -{ "twlgti", OPTO(3,TOLGT), OPTO_MASK, PPC, { RA, SI } }, -{ "tlgti", OPTO(3,TOLGT), OPTO_MASK, POWER, { RA, SI } }, -{ "twllti", OPTO(3,TOLLT), OPTO_MASK, PPC, { RA, SI } }, -{ "tllti", OPTO(3,TOLLT), OPTO_MASK, POWER, { RA, SI } }, -{ "tweqi", OPTO(3,TOEQ), OPTO_MASK, PPC, { RA, SI } }, -{ "teqi", OPTO(3,TOEQ), OPTO_MASK, POWER, { RA, SI } }, -{ "twlgei", OPTO(3,TOLGE), OPTO_MASK, PPC, { RA, SI } }, -{ "tlgei", OPTO(3,TOLGE), OPTO_MASK, POWER, { RA, SI } }, -{ "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPC, { RA, SI } }, -{ "tlnli", OPTO(3,TOLNL), OPTO_MASK, POWER, { RA, SI } }, -{ "twllei", OPTO(3,TOLLE), OPTO_MASK, PPC, { RA, SI } }, -{ "tllei", OPTO(3,TOLLE), OPTO_MASK, POWER, { RA, SI } }, -{ "twlngi", OPTO(3,TOLNG), OPTO_MASK, PPC, { RA, SI } }, -{ "tlngi", OPTO(3,TOLNG), OPTO_MASK, POWER, { RA, SI } }, -{ "twgti", OPTO(3,TOGT), OPTO_MASK, PPC, { RA, SI } }, -{ "tgti", OPTO(3,TOGT), OPTO_MASK, POWER, { RA, SI } }, -{ "twgei", OPTO(3,TOGE), OPTO_MASK, PPC, { RA, SI } }, -{ "tgei", OPTO(3,TOGE), OPTO_MASK, POWER, { RA, SI } }, -{ "twnli", OPTO(3,TONL), OPTO_MASK, PPC, { RA, SI } }, -{ "tnli", OPTO(3,TONL), OPTO_MASK, POWER, { RA, SI } }, -{ "twlti", OPTO(3,TOLT), OPTO_MASK, PPC, { RA, SI } }, -{ "tlti", OPTO(3,TOLT), OPTO_MASK, POWER, { RA, SI } }, -{ "twlei", OPTO(3,TOLE), OPTO_MASK, PPC, { RA, SI } }, -{ "tlei", OPTO(3,TOLE), OPTO_MASK, POWER, { RA, SI } }, -{ "twngi", OPTO(3,TONG), OPTO_MASK, PPC, { RA, SI } }, -{ "tngi", OPTO(3,TONG), OPTO_MASK, POWER, { RA, SI } }, -{ "twnei", OPTO(3,TONE), OPTO_MASK, PPC, { RA, SI } }, -{ "tnei", OPTO(3,TONE), OPTO_MASK, POWER, { RA, SI } }, -{ "twi", OP(3), OP_MASK, PPC, { TO, RA, SI } }, -{ "ti", OP(3), OP_MASK, POWER, { TO, RA, SI } }, - -{ "mulli", OP(7), OP_MASK, PPC, { RT, RA, SI } }, -{ "muli", OP(7), OP_MASK, POWER, { RT, RA, SI } }, - -{ "subfic", OP(8), OP_MASK, PPC, { RT, RA, SI } }, -{ "sfi", OP(8), OP_MASK, POWER, { RT, RA, SI } }, - -{ "dozi", OP(9), OP_MASK, POWER|M601, { RT, RA, SI } }, - -{ "cmplwi", OPL(10,0), OPL_MASK, PPC, { OBF, RA, UI } }, -{ "cmpldi", OPL(10,1), OPL_MASK, PPC|B64, { OBF, RA, UI } }, -{ "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } }, -{ "cmpli", OP(10), OP_MASK, POWER, { BF, RA, UI } }, - -{ "cmpwi", OPL(11,0), OPL_MASK, PPC, { OBF, RA, SI } }, -{ "cmpdi", OPL(11,1), OPL_MASK, PPC|B64, { OBF, RA, SI } }, -{ "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } }, -{ "cmpi", OP(11), OP_MASK, POWER, { BF, RA, SI } }, - -{ "addic", OP(12), OP_MASK, PPC, { RT, RA, SI } }, -{ "ai", OP(12), OP_MASK, POWER, { RT, RA, SI } }, -{ "subic", OP(12), OP_MASK, PPC, { RT, RA, NSI } }, - -{ "addic.", OP(13), OP_MASK, PPC, { RT, RA, SI } }, -{ "ai.", OP(13), OP_MASK, POWER, { RT, RA, SI } }, -{ "subic.", OP(13), OP_MASK, PPC, { RT, RA, NSI } }, - -{ "li", OP(14), DRA_MASK, PPC, { RT, SI } }, -{ "lil", OP(14), DRA_MASK, POWER, { RT, SI } }, -{ "addi", OP(14), OP_MASK, PPC, { RT, RA, SI } }, -{ "cal", OP(14), OP_MASK, POWER, { RT, D, RA } }, -{ "subi", OP(14), OP_MASK, PPC, { RT, RA, NSI } }, -{ "la", OP(14), OP_MASK, PPC, { RT, D, RA } }, - -{ "lis", OP(15), DRA_MASK, PPC, { RT, SISIGNOPT } }, -{ "liu", OP(15), DRA_MASK, POWER, { RT, SISIGNOPT } }, -{ "addis", OP(15), OP_MASK, PPC, { RT,RA,SISIGNOPT } }, -{ "cau", OP(15), OP_MASK, POWER, { RT,RA,SISIGNOPT } }, -{ "subis", OP(15), OP_MASK, PPC, { RT, RA, NSI } }, - -{ "bdnz-", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDM } }, -{ "bdnz+", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDP } }, -{ "bdnz", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BD } }, -{ "bdn", BBO(16,BODNZ,0,0), BBOYBI_MASK, POWER, { BD } }, -{ "bdnzl-", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDM } }, -{ "bdnzl+", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDP } }, -{ "bdnzl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BD } }, -{ "bdnl", BBO(16,BODNZ,0,1), BBOYBI_MASK, POWER, { BD } }, -{ "bdnza-", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdnza+", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDPA } }, -{ "bdnza", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDA } }, -{ "bdna", BBO(16,BODNZ,1,0), BBOYBI_MASK, POWER, { BDA } }, -{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDPA } }, -{ "bdnzla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDA } }, -{ "bdnla", BBO(16,BODNZ,1,1), BBOYBI_MASK, POWER, { BDA } }, -{ "bdz-", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDM } }, -{ "bdz+", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDP } }, -{ "bdz", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC|POWER, { BD } }, -{ "bdzl-", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDM } }, -{ "bdzl+", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDP } }, -{ "bdzl", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC|POWER, { BD } }, -{ "bdza-", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdza+", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDPA } }, -{ "bdza", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC|POWER, { BDA } }, -{ "bdzla-", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDMA } }, -{ "bdzla+", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDPA } }, -{ "bdzla", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC|POWER, { BDA } }, -{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BD } }, -{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BD } }, -{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDA } }, -{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDA } }, -{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } }, -{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } }, -{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BD } }, -{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } }, -{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } }, -{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BD } }, -{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDA } }, -{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } }, -{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } }, -{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDA } }, -{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bt-", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bt+", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bt", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bbt", BBO(16,BOT,0,0), BBOY_MASK, POWER, { BI, BD } }, -{ "btl-", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "btl+", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "btl", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bbtl", BBO(16,BOT,0,1), BBOY_MASK, POWER, { BI, BD } }, -{ "bta-", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bta+", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bta", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bbta", BBO(16,BOT,1,0), BBOY_MASK, POWER, { BI, BDA } }, -{ "btla-", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "btla+", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "btla", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bbtla", BBO(16,BOT,1,1), BBOY_MASK, POWER, { BI, BDA } }, -{ "bf-", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bf+", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bf", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bbf", BBO(16,BOF,0,0), BBOY_MASK, POWER, { BI, BD } }, -{ "bfl-", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bfl+", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "bfl", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bbfl", BBO(16,BOF,0,1), BBOY_MASK, POWER, { BI, BD } }, -{ "bfa-", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bfa+", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bfa", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bbfa", BBO(16,BOF,1,0), BBOY_MASK, POWER, { BI, BDA } }, -{ "bfla-", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bfla+", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bfla", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bbfla", BBO(16,BOF,1,1), BBOY_MASK, POWER, { BI, BDA } }, -{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BD } }, -{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDM } }, -{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDP } }, -{ "bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BD } }, -{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDA } }, -{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDMA } }, -{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDPA } }, -{ "bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDA } }, -{ "bc-", B(16,0,0), B_MASK, PPC, { BOE, BI, BDM } }, -{ "bc+", B(16,0,0), B_MASK, PPC, { BOE, BI, BDP } }, -{ "bc", B(16,0,0), B_MASK, PPC|POWER, { BO, BI, BD } }, -{ "bcl-", B(16,0,1), B_MASK, PPC, { BOE, BI, BDM } }, -{ "bcl+", B(16,0,1), B_MASK, PPC, { BOE, BI, BDP } }, -{ "bcl", B(16,0,1), B_MASK, PPC|POWER, { BO, BI, BD } }, -{ "bca-", B(16,1,0), B_MASK, PPC, { BOE, BI, BDMA } }, -{ "bca+", B(16,1,0), B_MASK, PPC, { BOE, BI, BDPA } }, -{ "bca", B(16,1,0), B_MASK, PPC|POWER, { BO, BI, BDA } }, -{ "bcla-", B(16,1,1), B_MASK, PPC, { BOE, BI, BDMA } }, -{ "bcla+", B(16,1,1), B_MASK, PPC, { BOE, BI, BDPA } }, -{ "bcla", B(16,1,1), B_MASK, PPC|POWER, { BO, BI, BDA } }, - -{ "sc", SC(17,1,0), 0xffffffff, PPC, { 0 } }, -{ "svc", SC(17,0,0), SC_MASK, POWER, { LEV, FL1, FL2 } }, -{ "svcl", SC(17,0,1), SC_MASK, POWER, { LEV, FL1, FL2 } }, -{ "svca", SC(17,1,0), SC_MASK, POWER, { SV } }, -{ "svcla", SC(17,1,1), SC_MASK, POWER, { SV } }, - -{ "b", B(18,0,0), B_MASK, PPC|POWER, { LI } }, -{ "bl", B(18,0,1), B_MASK, PPC|POWER, { LI } }, -{ "ba", B(18,1,0), B_MASK, PPC|POWER, { LIA } }, -{ "bla", B(18,1,1), B_MASK, PPC|POWER, { LIA } }, - -{ "mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } }, - -{ "blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "br", XLO(19,BOU,16,0), XLBOBIBB_MASK, POWER, { 0 } }, -{ "blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, POWER, { 0 } }, -{ "bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPC, { 0 } }, -{ "bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } }, -{ "bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, POWER, { BI } }, -{ "btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, POWER, { BI } }, -{ "bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, POWER, { BI } }, -{ "bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, POWER, { BI } }, -{ "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPC, { BI } }, -{ "bclr", XLLK(19,16,0), XLYBB_MASK, PPC, { BO, BI } }, -{ "bclrl", XLLK(19,16,1), XLYBB_MASK, PPC, { BO, BI } }, -{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcr", XLLK(19,16,0), XLBB_MASK, POWER, { BO, BI } }, -{ "bcrl", XLLK(19,16,1), XLBB_MASK, POWER, { BO, BI } }, - -{ "crnot", XL(19,33), XL_MASK, PPC, { BT, BA, BBA } }, -{ "crnor", XL(19,33), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "rfi", XL(19,50), 0xffffffff, PPC|POWER, { 0 } }, -{ "rfci", XL(19,51), 0xffffffff, PPC, { 0 } }, - -{ "rfsvc", XL(19,82), 0xffffffff, POWER, { 0 } }, - -{ "crandc", XL(19,129), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "isync", XL(19,150), 0xffffffff, PPC, { 0 } }, -{ "ics", XL(19,150), 0xffffffff, POWER, { 0 } }, - -{ "crclr", XL(19,193), XL_MASK, PPC, { BT, BAT, BBA } }, -{ "crxor", XL(19,193), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "crnand", XL(19,225), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "crand", XL(19,257), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "crset", XL(19,289), XL_MASK, PPC, { BT, BAT, BBA } }, -{ "creqv", XL(19,289), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "crorc", XL(19,417), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "crmove", XL(19,449), XL_MASK, PPC, { BT, BA, BBA } }, -{ "cror", XL(19,449), XL_MASK, PPC|POWER, { BT, BA, BB } }, - -{ "bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, PPC|POWER, { 0 } }, -{ "bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, PPC|POWER, { 0 } }, -{ "bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } }, -{ "btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPC, { BI } }, -{ "bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPC, { BI } }, -{ "bcctr", XLLK(19,528,0), XLYBB_MASK, PPC, { BO, BI } }, -{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcctrl", XLLK(19,528,1), XLYBB_MASK, PPC, { BO, BI } }, -{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPC, { BOE, BI } }, -{ "bcc", XLLK(19,528,0), XLBB_MASK, POWER, { BO, BI } }, -{ "bccl", XLLK(19,528,1), XLBB_MASK, POWER, { BO, BI } }, - -{ "rlwimi", M(20,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } }, -{ "rlimi", M(20,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } }, - -{ "rlwimi.", M(20,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } }, -{ "rlimi.", M(20,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } }, - -{ "rotlwi", MME(21,31,0), MMBME_MASK, PPC, { RA, RS, SH } }, -{ "clrlwi", MME(21,31,0), MSHME_MASK, PPC, { RA, RS, MB } }, -{ "rlwinm", M(21,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } }, -{ "rlinm", M(21,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } }, -{ "rotlwi.", MME(21,31,1), MMBME_MASK, PPC, { RA,RS,SH } }, -{ "clrlwi.", MME(21,31,1), MSHME_MASK, PPC, { RA, RS, MB } }, -{ "rlwinm.", M(21,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } }, -{ "rlinm.", M(21,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } }, - -{ "rlmi", M(22,0), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } }, -{ "rlmi.", M(22,1), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } }, - -{ "rotlw", MME(23,31,0), MMBME_MASK, PPC, { RA, RS, RB } }, -{ "rlwnm", M(23,0), M_MASK, PPC, { RA,RS,RB,MBE,ME } }, -{ "rlnm", M(23,0), M_MASK, POWER, { RA,RS,RB,MBE,ME } }, -{ "rotlw.", MME(23,31,1), MMBME_MASK, PPC, { RA, RS, RB } }, -{ "rlwnm.", M(23,1), M_MASK, PPC, { RA,RS,RB,MBE,ME } }, -{ "rlnm.", M(23,1), M_MASK, POWER, { RA,RS,RB,MBE,ME } }, - -{ "nop", OP(24), 0xffffffff, PPC, { 0 } }, -{ "ori", OP(24), OP_MASK, PPC, { RA, RS, UI } }, -{ "oril", OP(24), OP_MASK, POWER, { RA, RS, UI } }, - -{ "oris", OP(25), OP_MASK, PPC, { RA, RS, UI } }, -{ "oriu", OP(25), OP_MASK, POWER, { RA, RS, UI } }, - -{ "xori", OP(26), OP_MASK, PPC, { RA, RS, UI } }, -{ "xoril", OP(26), OP_MASK, POWER, { RA, RS, UI } }, - -{ "xoris", OP(27), OP_MASK, PPC, { RA, RS, UI } }, -{ "xoriu", OP(27), OP_MASK, POWER, { RA, RS, UI } }, - -{ "andi.", OP(28), OP_MASK, PPC, { RA, RS, UI } }, -{ "andil.", OP(28), OP_MASK, POWER, { RA, RS, UI } }, - -{ "andis.", OP(29), OP_MASK, PPC, { RA, RS, UI } }, -{ "andiu.", OP(29), OP_MASK, POWER, { RA, RS, UI } }, - -{ "rotldi", MD(30,0,0), MDMB_MASK, PPC|B64, { RA, RS, SH6 } }, -{ "clrldi", MD(30,0,0), MDSH_MASK, PPC|B64, { RA, RS, MB6 } }, -{ "rldicl", MD(30,0,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, -{ "rotldi.", MD(30,0,1), MDMB_MASK, PPC|B64, { RA, RS, SH6 } }, -{ "clrldi.", MD(30,0,1), MDSH_MASK, PPC|B64, { RA, RS, MB6 } }, -{ "rldicl.", MD(30,0,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, - -{ "rldicr", MD(30,1,0), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } }, -{ "rldicr.", MD(30,1,1), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } }, - -{ "rldic", MD(30,2,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, -{ "rldic.", MD(30,2,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, - -{ "rldimi", MD(30,3,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, -{ "rldimi.", MD(30,3,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } }, - -{ "rotld", MDS(30,8,0), MDSMB_MASK, PPC|B64, { RA, RS, RB } }, -{ "rldcl", MDS(30,8,0), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } }, -{ "rotld.", MDS(30,8,1), MDSMB_MASK, PPC|B64, { RA, RS, RB } }, -{ "rldcl.", MDS(30,8,1), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } }, - -{ "rldcr", MDS(30,9,0), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } }, -{ "rldcr.", MDS(30,9,1), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } }, - -{ "cmpw", XCMPL(31,0,0), XCMPL_MASK, PPC, { OBF, RA, RB } }, -{ "cmpd", XCMPL(31,0,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } }, -{ "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } }, -{ "cmp", X(31,0), XCMPL_MASK, POWER, { BF, RA, RB } }, - -{ "twlgt", XTO(31,4,TOLGT), XTO_MASK, PPC, { RA, RB } }, -{ "tlgt", XTO(31,4,TOLGT), XTO_MASK, POWER, { RA, RB } }, -{ "twllt", XTO(31,4,TOLLT), XTO_MASK, PPC, { RA, RB } }, -{ "tllt", XTO(31,4,TOLLT), XTO_MASK, POWER, { RA, RB } }, -{ "tweq", XTO(31,4,TOEQ), XTO_MASK, PPC, { RA, RB } }, -{ "teq", XTO(31,4,TOEQ), XTO_MASK, POWER, { RA, RB } }, -{ "twlge", XTO(31,4,TOLGE), XTO_MASK, PPC, { RA, RB } }, -{ "tlge", XTO(31,4,TOLGE), XTO_MASK, POWER, { RA, RB } }, -{ "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPC, { RA, RB } }, -{ "tlnl", XTO(31,4,TOLNL), XTO_MASK, POWER, { RA, RB } }, -{ "twlle", XTO(31,4,TOLLE), XTO_MASK, PPC, { RA, RB } }, -{ "tlle", XTO(31,4,TOLLE), XTO_MASK, POWER, { RA, RB } }, -{ "twlng", XTO(31,4,TOLNG), XTO_MASK, PPC, { RA, RB } }, -{ "tlng", XTO(31,4,TOLNG), XTO_MASK, POWER, { RA, RB } }, -{ "twgt", XTO(31,4,TOGT), XTO_MASK, PPC, { RA, RB } }, -{ "tgt", XTO(31,4,TOGT), XTO_MASK, POWER, { RA, RB } }, -{ "twge", XTO(31,4,TOGE), XTO_MASK, PPC, { RA, RB } }, -{ "tge", XTO(31,4,TOGE), XTO_MASK, POWER, { RA, RB } }, -{ "twnl", XTO(31,4,TONL), XTO_MASK, PPC, { RA, RB } }, -{ "tnl", XTO(31,4,TONL), XTO_MASK, POWER, { RA, RB } }, -{ "twlt", XTO(31,4,TOLT), XTO_MASK, PPC, { RA, RB } }, -{ "tlt", XTO(31,4,TOLT), XTO_MASK, POWER, { RA, RB } }, -{ "twle", XTO(31,4,TOLE), XTO_MASK, PPC, { RA, RB } }, -{ "tle", XTO(31,4,TOLE), XTO_MASK, POWER, { RA, RB } }, -{ "twng", XTO(31,4,TONG), XTO_MASK, PPC, { RA, RB } }, -{ "tng", XTO(31,4,TONG), XTO_MASK, POWER, { RA, RB } }, -{ "twne", XTO(31,4,TONE), XTO_MASK, PPC, { RA, RB } }, -{ "tne", XTO(31,4,TONE), XTO_MASK, POWER, { RA, RB } }, -{ "trap", XTO(31,4,TOU), 0xffffffff, PPC, { 0 } }, -{ "tw", X(31,4), X_MASK, PPC, { TO, RA, RB } }, -{ "t", X(31,4), X_MASK, POWER, { TO, RA, RB } }, - -{ "subfc", XO(31,8,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "sf", XO(31,8,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } }, -{ "subfc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "sf.", XO(31,8,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "subc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RB, RA } }, -{ "subfco", XO(31,8,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfo", XO(31,8,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } }, -{ "subfco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfo.", XO(31,8,1,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } }, - -{ "mulhdu", XO(31,9,0,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "mulhdu.", XO(31,9,0,1), XO_MASK, PPC|B64, { RT, RA, RB } }, - -{ "addc", XO(31,10,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "a", XO(31,10,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "addc.", XO(31,10,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "a.", XO(31,10,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "addco", XO(31,10,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "ao", XO(31,10,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "addco.", XO(31,10,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "ao.", XO(31,10,1,1), XO_MASK, POWER, { RT, RA, RB } }, - -{ "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } }, - -{ "mfcr", X(31,19), XRARB_MASK, POWER|PPC, { RT } }, - -{ "lwarx", X(31,20), X_MASK, PPC, { RT, RA, RB } }, - -{ "ldx", X(31,21), X_MASK, PPC|B64, { RT, RA, RB } }, - -{ "lwzx", X(31,23), X_MASK, PPC, { RT, RA, RB } }, -{ "lx", X(31,23), X_MASK, POWER, { RT, RA, RB } }, - -{ "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } }, -{ "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } }, -{ "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } }, -{ "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } }, - -{ "cntlzw", XRC(31,26,0), XRB_MASK, PPC, { RA, RS } }, -{ "cntlz", XRC(31,26,0), XRB_MASK, POWER, { RA, RS } }, -{ "cntlzw.", XRC(31,26,1), XRB_MASK, PPC, { RA, RS } }, -{ "cntlz.", XRC(31,26,1), XRB_MASK, POWER, { RA, RS } }, - -{ "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } }, -{ "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } }, - -{ "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "cmplw", XCMPL(31,32,0), XCMPL_MASK, PPC, { OBF, RA, RB } }, -{ "cmpld", XCMPL(31,32,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } }, -{ "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } }, -{ "cmpl", X(31,32), XCMPL_MASK, POWER, { BF, RA, RB } }, - -{ "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } }, -{ "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } }, -{ "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } }, -{ "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } }, - -{ "ldux", X(31,53), X_MASK, PPC|B64, { RT, RAL, RB } }, - -{ "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } }, - -{ "lwzux", X(31,55), X_MASK, PPC, { RT, RAL, RB } }, -{ "lux", X(31,55), X_MASK, POWER, { RT, RA, RB } }, - -{ "cntlzd", XRC(31,58,0), XRB_MASK, PPC|B64, { RA, RS } }, -{ "cntlzd.", XRC(31,58,1), XRB_MASK, PPC|B64, { RA, RS } }, - -{ "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdgt", XTO(31,68,TOGT), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdge", XTO(31,68,TOGE), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdnl", XTO(31,68,TONL), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdlt", XTO(31,68,TOLT), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdle", XTO(31,68,TOLE), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdng", XTO(31,68,TONG), XTO_MASK, PPC|B64, { RA, RB } }, -{ "tdne", XTO(31,68,TONE), XTO_MASK, PPC|B64, { RA, RB } }, -{ "td", X(31,68), X_MASK, PPC|B64, { TO, RA, RB } }, - -{ "mulhd", XO(31,73,0,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "mulhd.", XO(31,73,0,1), XO_MASK, PPC|B64, { RT, RA, RB } }, - -{ "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } }, - -{ "mfmsr", X(31,83), XRARB_MASK, PPC|POWER, { RT } }, - -{ "ldarx", X(31,84), X_MASK, PPC|B64, { RT, RA, RB } }, - -{ "dcbf", X(31,86), XRT_MASK, PPC, { RA, RB } }, - -{ "lbzx", X(31,87), X_MASK, PPC|POWER, { RT, RA, RB } }, - -{ "neg", XO(31,104,0,0), XORB_MASK, PPC|POWER, { RT, RA } }, -{ "neg.", XO(31,104,0,1), XORB_MASK, PPC|POWER, { RT, RA } }, -{ "nego", XO(31,104,1,0), XORB_MASK, PPC|POWER, { RT, RA } }, -{ "nego.", XO(31,104,1,1), XORB_MASK, PPC|POWER, { RT, RA } }, - -{ "mul", XO(31,107,0,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "mul.", XO(31,107,0,1), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "mulo", XO(31,107,1,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "mulo.", XO(31,107,1,1), XO_MASK, POWER|M601, { RT, RA, RB } }, - -{ "clf", X(31,118), XRB_MASK, POWER, { RT, RA } }, - -{ "lbzux", X(31,119), X_MASK, PPC|POWER, { RT, RAL, RB } }, - -{ "not", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RBS } }, -{ "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "not.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RBS } }, -{ "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "subfe", XO(31,136,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfe", XO(31,136,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "subfe.", XO(31,136,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfe.", XO(31,136,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "subfeo", XO(31,136,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfeo", XO(31,136,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "subfeo.", XO(31,136,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "sfeo.", XO(31,136,1,1), XO_MASK, POWER, { RT, RA, RB } }, - -{ "adde", XO(31,138,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "ae", XO(31,138,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "adde.", XO(31,138,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "ae.", XO(31,138,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "addeo", XO(31,138,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "aeo", XO(31,138,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "addeo.", XO(31,138,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "aeo.", XO(31,138,1,1), XO_MASK, POWER, { RT, RA, RB } }, - -{ "mtcr", XFXM(31,144,0xff), XFXFXM_MASK|FXM_MASK, PPC|POWER, { RS }}, -{ "mtcrf", X(31,144), XFXFXM_MASK, PPC|POWER, { FXM, RS } }, - -{ "mtmsr", X(31,146), XRARB_MASK, PPC|POWER, { RS } }, - -{ "stdx", X(31,149), X_MASK, PPC|B64, { RS, RA, RB } }, - -{ "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } }, - -{ "stwx", X(31,151), X_MASK, PPC, { RS, RA, RB } }, -{ "stx", X(31,151), X_MASK, POWER, { RS, RA, RB } }, - -{ "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "stdux", X(31,181), X_MASK, PPC|B64, { RS, RAS, RB } }, - -{ "stwux", X(31,183), X_MASK, PPC, { RS, RAS, RB } }, -{ "stux", X(31,183), X_MASK, POWER, { RS, RA, RB } }, - -{ "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } }, -{ "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } }, - -{ "subfze", XO(31,200,0,0), XORB_MASK, PPC, { RT, RA } }, -{ "sfze", XO(31,200,0,0), XORB_MASK, POWER, { RT, RA } }, -{ "subfze.", XO(31,200,0,1), XORB_MASK, PPC, { RT, RA } }, -{ "sfze.", XO(31,200,0,1), XORB_MASK, POWER, { RT, RA } }, -{ "subfzeo", XO(31,200,1,0), XORB_MASK, PPC, { RT, RA } }, -{ "sfzeo", XO(31,200,1,0), XORB_MASK, POWER, { RT, RA } }, -{ "subfzeo.",XO(31,200,1,1), XORB_MASK, PPC, { RT, RA } }, -{ "sfzeo.", XO(31,200,1,1), XORB_MASK, POWER, { RT, RA } }, - -{ "addze", XO(31,202,0,0), XORB_MASK, PPC, { RT, RA } }, -{ "aze", XO(31,202,0,0), XORB_MASK, POWER, { RT, RA } }, -{ "addze.", XO(31,202,0,1), XORB_MASK, PPC, { RT, RA } }, -{ "aze.", XO(31,202,0,1), XORB_MASK, POWER, { RT, RA } }, -{ "addzeo", XO(31,202,1,0), XORB_MASK, PPC, { RT, RA } }, -{ "azeo", XO(31,202,1,0), XORB_MASK, POWER, { RT, RA } }, -{ "addzeo.", XO(31,202,1,1), XORB_MASK, PPC, { RT, RA } }, -{ "azeo.", XO(31,202,1,1), XORB_MASK, POWER, { RT, RA } }, - -{ "mtsr", X(31,210), XRB_MASK|(1<<20), PPC|POWER|B32, { SR, RS } }, - -{ "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } }, - -{ "stbx", X(31,215), X_MASK, PPC|POWER, { RS, RA, RB } }, - -{ "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "subfme", XO(31,232,0,0), XORB_MASK, PPC, { RT, RA } }, -{ "sfme", XO(31,232,0,0), XORB_MASK, POWER, { RT, RA } }, -{ "subfme.", XO(31,232,0,1), XORB_MASK, PPC, { RT, RA } }, -{ "sfme.", XO(31,232,0,1), XORB_MASK, POWER, { RT, RA } }, -{ "subfmeo", XO(31,232,1,0), XORB_MASK, PPC, { RT, RA } }, -{ "sfmeo", XO(31,232,1,0), XORB_MASK, POWER, { RT, RA } }, -{ "subfmeo.",XO(31,232,1,1), XORB_MASK, PPC, { RT, RA } }, -{ "sfmeo.", XO(31,232,1,1), XORB_MASK, POWER, { RT, RA } }, - -{ "mulld", XO(31,233,0,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "mulld.", XO(31,233,0,1), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "mulldo", XO(31,233,1,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "mulldo.", XO(31,233,1,1), XO_MASK, PPC|B64, { RT, RA, RB } }, - -{ "addme", XO(31,234,0,0), XORB_MASK, PPC, { RT, RA } }, -{ "ame", XO(31,234,0,0), XORB_MASK, POWER, { RT, RA } }, -{ "addme.", XO(31,234,0,1), XORB_MASK, PPC, { RT, RA } }, -{ "ame.", XO(31,234,0,1), XORB_MASK, POWER, { RT, RA } }, -{ "addmeo", XO(31,234,1,0), XORB_MASK, PPC, { RT, RA } }, -{ "ameo", XO(31,234,1,0), XORB_MASK, POWER, { RT, RA } }, -{ "addmeo.", XO(31,234,1,1), XORB_MASK, PPC, { RT, RA } }, -{ "ameo.", XO(31,234,1,1), XORB_MASK, POWER, { RT, RA } }, - -{ "mullw", XO(31,235,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "muls", XO(31,235,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "mullw.", XO(31,235,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "muls.", XO(31,235,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "mullwo", XO(31,235,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "mulso", XO(31,235,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "mullwo.", XO(31,235,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "mulso.", XO(31,235,1,1), XO_MASK, POWER, { RT, RA, RB } }, - -{ "mtsrin", X(31,242), XRA_MASK, PPC|B32, { RS, RB } }, -{ "mtsri", X(31,242), XRA_MASK, POWER|B32, { RS, RB } }, - -{ "dcbtst", X(31,246), XRT_MASK, PPC, { RA, RB } }, - -{ "stbux", X(31,247), X_MASK, PPC|POWER, { RS, RAS, RB } }, - -{ "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } }, -{ "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } }, - -{ "doz", XO(31,264,0,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "doz.", XO(31,264,0,1), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "dozo", XO(31,264,1,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "dozo.", XO(31,264,1,1), XO_MASK, POWER|M601, { RT, RA, RB } }, - -{ "add", XO(31,266,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "cax", XO(31,266,0,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "add.", XO(31,266,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "cax.", XO(31,266,0,1), XO_MASK, POWER, { RT, RA, RB } }, -{ "addo", XO(31,266,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "caxo", XO(31,266,1,0), XO_MASK, POWER, { RT, RA, RB } }, -{ "addo.", XO(31,266,1,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "caxo.", XO(31,266,1,1), XO_MASK, POWER, { RT, RA, RB } }, - -{ "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } }, -{ "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } }, - -{ "dcbt", X(31,278), XRT_MASK, PPC, { RA, RB } }, - -{ "lhzx", X(31,279), X_MASK, PPC|POWER, { RT, RA, RB } }, - -{ "icbt", X(31,262), XRT_MASK, PPC, { RA, RB } }, - -{ "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "tlbie", X(31,306), XRTRA_MASK, PPC, { RB } }, -{ "tlbi", X(31,306), XRTRA_MASK, POWER, { RB } }, - -{ "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } }, - -{ "lhzux", X(31,311), X_MASK, PPC|POWER, { RT, RAL, RB } }, - -{ "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "mfdcr", X(31,323), X_MASK, PPC, { RT, SPR } }, - -{ "div", XO(31,331,0,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "div.", XO(31,331,0,1), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "divo", XO(31,331,1,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "divo.", XO(31,331,1,1), XO_MASK, POWER|M601, { RT, RA, RB } }, - -{ "mfmq", XSPR(31,339,0), XSPR_MASK, POWER|M601, { RT } }, -{ "mfxer", XSPR(31,339,1), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfrtcu", XSPR(31,339,4), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfrtcl", XSPR(31,339,5), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfdec", XSPR(31,339,6), XSPR_MASK, POWER|M601, { RT } }, -{ "mflr", XSPR(31,339,8), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfctr", XSPR(31,339,9), XSPR_MASK, PPC|POWER, { RT } }, -{ "mftid", XSPR(31,339,17), XSPR_MASK, POWER, { RT } }, -{ "mfdsisr", XSPR(31,339,18), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfdar", XSPR(31,339,19), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfdec", XSPR(31,339,22), XSPR_MASK, PPC, { RT } }, -{ "mfsdr0", XSPR(31,339,24), XSPR_MASK, POWER, { RT } }, -{ "mfsdr1", XSPR(31,339,25), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfsrr0", XSPR(31,339,26), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfsrr1", XSPR(31,339,27), XSPR_MASK, PPC|POWER, { RT } }, -{ "mfsprg", XSPR(31,339,272), XSPRG_MASK, PPC, { RT, SPRG } }, -{ "mfasr", XSPR(31,339,280), XSPR_MASK, PPC|B64, { RT } }, -{ "mfear", XSPR(31,339,282), XSPR_MASK, PPC, { RT } }, -{ "mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, { RT } }, -{ "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, -{ "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, -{ "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, -{ "mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, { RT, SPRBAT } }, -{ "mfspr", X(31,339), X_MASK, PPC|POWER, { RT, SPR } }, - -{ "lwax", X(31,341), X_MASK, PPC|B64, { RT, RA, RB } }, - -{ "lhax", X(31,343), X_MASK, PPC|POWER, { RT, RA, RB } }, - -{ "dccci", X(31,454), XRT_MASK, PPC, { RA, RB } }, - -{ "abs", XO(31,360,0,0), XORB_MASK, POWER|M601, { RT, RA } }, -{ "abs.", XO(31,360,0,1), XORB_MASK, POWER|M601, { RT, RA } }, -{ "abso", XO(31,360,1,0), XORB_MASK, POWER|M601, { RT, RA } }, -{ "abso.", XO(31,360,1,1), XORB_MASK, POWER|M601, { RT, RA } }, - -{ "divs", XO(31,363,0,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "divs.", XO(31,363,0,1), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "divso", XO(31,363,1,0), XO_MASK, POWER|M601, { RT, RA, RB } }, -{ "divso.", XO(31,363,1,1), XO_MASK, POWER|M601, { RT, RA, RB } }, - -{ "tlbia", X(31,370), 0xffffffff, PPC, { 0 } }, - -{ "mftbu", XSPR(31,371,269), XSPR_MASK, PPC, { RT } }, -{ "mftb", X(31,371), X_MASK, PPC, { RT, TBR } }, - -{ "lwaux", X(31,373), X_MASK, PPC|B64, { RT, RAL, RB } }, - -{ "lhaux", X(31,375), X_MASK, PPC|POWER, { RT, RAL, RB } }, - -{ "sthx", X(31,407), X_MASK, PPC|POWER, { RS, RA, RB } }, - -{ "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } }, - -{ "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } }, - -{ "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } }, - -{ "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } }, - -{ "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "sradi", XS(31,413,0), XS_MASK, PPC|B64, { RA, RS, SH6 } }, -{ "sradi.", XS(31,413,1), XS_MASK, PPC|B64, { RA, RS, SH6 } }, - -{ "slbie", X(31,434), XRTRA_MASK, PPC|B64, { RB } }, - -{ "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } }, - -{ "sthux", X(31,439), X_MASK, PPC|POWER, { RS, RAS, RB } }, - -{ "mr", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RBS } }, -{ "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "mr.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RBS } }, -{ "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "mtdcr", X(31,451), X_MASK, PPC, { SPR, RS } }, - -{ "divdu", XO(31,457,0,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divdu.", XO(31,457,0,1), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divduo", XO(31,457,1,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divduo.", XO(31,457,1,1), XO_MASK, PPC|B64, { RT, RA, RB } }, - -{ "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } }, - -{ "mtmq", XSPR(31,467,0), XSPR_MASK, POWER|M601, { RS } }, -{ "mtxer", XSPR(31,467,1), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtlr", XSPR(31,467,8), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtctr", XSPR(31,467,9), XSPR_MASK, PPC|POWER, { RS } }, -{ "mttid", XSPR(31,467,17), XSPR_MASK, POWER, { RS } }, -{ "mtdsisr", XSPR(31,467,18), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtdar", XSPR(31,467,19), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtrtcu", XSPR(31,467,20), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtrtcl", XSPR(31,467,21), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtdec", XSPR(31,467,22), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtsdr0", XSPR(31,467,24), XSPR_MASK, POWER, { RS } }, -{ "mtsdr1", XSPR(31,467,25), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtsrr0", XSPR(31,467,26), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtsrr1", XSPR(31,467,27), XSPR_MASK, PPC|POWER, { RS } }, -{ "mtsprg", XSPR(31,467,272), XSPRG_MASK, PPC, { SPRG, RS } }, -{ "mtasr", XSPR(31,467,280), XSPR_MASK, PPC|B64, { RS } }, -{ "mtear", XSPR(31,467,282), XSPR_MASK, PPC, { RS } }, -{ "mttbl", XSPR(31,467,284), XSPR_MASK, PPC, { RS } }, -{ "mttbu", XSPR(31,467,285), XSPR_MASK, PPC, { RS } }, -{ "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, -{ "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, -{ "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, -{ "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, { SPRBAT, RS } }, -{ "mtspr", X(31,467), X_MASK, PPC|POWER, { SPR, RS } }, - -{ "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } }, - -{ "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } }, -{ "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } }, - -{ "nabs", XO(31,488,0,0), XORB_MASK, POWER|M601, { RT, RA } }, -{ "nabs.", XO(31,488,0,1), XORB_MASK, POWER|M601, { RT, RA } }, -{ "nabso", XO(31,488,1,0), XORB_MASK, POWER|M601, { RT, RA } }, -{ "nabso.", XO(31,488,1,1), XORB_MASK, POWER|M601, { RT, RA } }, - -{ "divd", XO(31,489,0,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divd.", XO(31,489,0,1), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divdo", XO(31,489,1,0), XO_MASK, PPC|B64, { RT, RA, RB } }, -{ "divdo.", XO(31,489,1,1), XO_MASK, PPC|B64, { RT, RA, RB } }, - -{ "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } }, -{ "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } }, -{ "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } }, - -{ "slbia", X(31,498), 0xffffffff, PPC|B64, { 0 } }, - -{ "cli", X(31,502), XRB_MASK, POWER, { RT, RA } }, - -{ "mcrxr", X(31,512), XRARB_MASK|(3<<21), PPC|POWER, { BF } }, - -{ "clcs", X(31,531), XRB_MASK, POWER|M601, { RT, RA } }, - -{ "lswx", X(31,533), X_MASK, PPC, { RT, RA, RB } }, -{ "lsx", X(31,533), X_MASK, POWER, { RT, RA, RB } }, - -{ "lwbrx", X(31,534), X_MASK, PPC, { RT, RA, RB } }, -{ "lbrx", X(31,534), X_MASK, POWER, { RT, RA, RB } }, - -{ "lfsx", X(31,535), X_MASK, PPC|POWER, { FRT, RA, RB } }, - -{ "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } }, -{ "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } }, -{ "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } }, -{ "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } }, - -{ "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } }, -{ "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } }, - -{ "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "tlbsync", X(31,566), 0xffffffff, PPC, { 0 } }, - -{ "lfsux", X(31,567), X_MASK, PPC|POWER, { FRT, RAS, RB } }, - -{ "mfsr", X(31,595), XRB_MASK|(1<<20), PPC|POWER|B32, { RT, SR } }, - -{ "lswi", X(31,597), X_MASK, PPC, { RT, RA, NB } }, -{ "lsi", X(31,597), X_MASK, POWER, { RT, RA, NB } }, - -{ "sync", X(31,598), 0xffffffff, PPC, { 0 } }, -{ "dcs", X(31,598), 0xffffffff, POWER, { 0 } }, - -{ "lfdx", X(31,599), X_MASK, PPC|POWER, { FRT, RA, RB } }, - -{ "mfsri", X(31,627), X_MASK, POWER, { RT, RA, RB } }, - -{ "dclst", X(31,630), XRB_MASK, POWER, { RS, RA } }, - -{ "lfdux", X(31,631), X_MASK, PPC|POWER, { FRT, RAS, RB } }, - -{ "mfsrin", X(31,659), XRA_MASK, PPC|B32, { RT, RB } }, - -{ "stswx", X(31,661), X_MASK, PPC, { RS, RA, RB } }, -{ "stsx", X(31,661), X_MASK, POWER, { RS, RA, RB } }, - -{ "stwbrx", X(31,662), X_MASK, PPC, { RS, RA, RB } }, -{ "stbrx", X(31,662), X_MASK, POWER, { RS, RA, RB } }, - -{ "stfsx", X(31,663), X_MASK, PPC|POWER, { FRS, RA, RB } }, - -{ "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "stfsux", X(31,695), X_MASK, PPC|POWER, { FRS, RAS, RB } }, - -{ "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } }, -{ "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } }, - -{ "stswi", X(31,725), X_MASK, PPC, { RS, RA, NB } }, -{ "stsi", X(31,725), X_MASK, POWER, { RS, RA, NB } }, - -{ "stfdx", X(31,727), X_MASK, PPC|POWER, { FRS, RA, RB } }, - -{ "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "stfdux", X(31,759), X_MASK, PPC|POWER, { FRS, RAS, RB } }, - -{ "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } }, -{ "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } }, - -{ "lhbrx", X(31,790), X_MASK, PPC|POWER, { RT, RA, RB } }, - -{ "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } }, -{ "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } }, -{ "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } }, -{ "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } }, - -{ "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } }, -{ "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } }, - -{ "rac", X(31,818), X_MASK, POWER, { RT, RA, RB } }, - -{ "srawi", XRC(31,824,0), X_MASK, PPC, { RA, RS, SH } }, -{ "srai", XRC(31,824,0), X_MASK, POWER, { RA, RS, SH } }, -{ "srawi.", XRC(31,824,1), X_MASK, PPC, { RA, RS, SH } }, -{ "srai.", XRC(31,824,1), X_MASK, POWER, { RA, RS, SH } }, - -{ "eieio", X(31,854), 0xffffffff, PPC, { 0 } }, - -{ "sthbrx", X(31,918), X_MASK, PPC|POWER, { RS, RA, RB } }, - -{ "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } }, -{ "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } }, - -{ "extsh", XRC(31,922,0), XRB_MASK, PPC, { RA, RS } }, -{ "exts", XRC(31,922,0), XRB_MASK, POWER, { RA, RS } }, -{ "extsh.", XRC(31,922,1), XRB_MASK, PPC, { RA, RS } }, -{ "exts.", XRC(31,922,1), XRB_MASK, POWER, { RA, RS } }, - -{ "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } }, -{ "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } }, - -{ "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} }, -{ "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} }, - -{ "iccci", X(31,966), XRT_MASK, PPC, { RA, RB } }, - -{ "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } }, - -{ "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } }, - -{ "extsw", XRC(31,986,0), XRB_MASK, PPC, { RA, RS } }, -{ "extsw.", XRC(31,986,1), XRB_MASK, PPC, { RA, RS } }, - -{ "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, -{ "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, - -{ "lwz", OP(32), OP_MASK, PPC, { RT, D, RA } }, -{ "l", OP(32), OP_MASK, POWER, { RT, D, RA } }, - -{ "lwzu", OP(33), OP_MASK, PPC, { RT, D, RAL } }, -{ "lu", OP(33), OP_MASK, POWER, { RT, D, RA } }, - -{ "lbz", OP(34), OP_MASK, PPC|POWER, { RT, D, RA } }, - -{ "lbzu", OP(35), OP_MASK, PPC|POWER, { RT, D, RAL } }, - -{ "stw", OP(36), OP_MASK, PPC, { RS, D, RA } }, -{ "st", OP(36), OP_MASK, POWER, { RS, D, RA } }, - -{ "stwu", OP(37), OP_MASK, PPC, { RS, D, RAS } }, -{ "stu", OP(37), OP_MASK, POWER, { RS, D, RA } }, - -{ "stb", OP(38), OP_MASK, PPC|POWER, { RS, D, RA } }, - -{ "stbu", OP(39), OP_MASK, PPC|POWER, { RS, D, RAS } }, - -{ "lhz", OP(40), OP_MASK, PPC|POWER, { RT, D, RA } }, - -{ "lhzu", OP(41), OP_MASK, PPC|POWER, { RT, D, RAL } }, - -{ "lha", OP(42), OP_MASK, PPC|POWER, { RT, D, RA } }, - -{ "lhau", OP(43), OP_MASK, PPC|POWER, { RT, D, RAL } }, - -{ "sth", OP(44), OP_MASK, PPC|POWER, { RS, D, RA } }, - -{ "sthu", OP(45), OP_MASK, PPC|POWER, { RS, D, RAS } }, - -{ "lmw", OP(46), OP_MASK, PPC, { RT, D, RAM } }, -{ "lm", OP(46), OP_MASK, POWER, { RT, D, RA } }, - -{ "stmw", OP(47), OP_MASK, PPC, { RS, D, RA } }, -{ "stm", OP(47), OP_MASK, POWER, { RS, D, RA } }, - -{ "lfs", OP(48), OP_MASK, PPC|POWER, { FRT, D, RA } }, - -{ "lfsu", OP(49), OP_MASK, PPC|POWER, { FRT, D, RAS } }, - -{ "lfd", OP(50), OP_MASK, PPC|POWER, { FRT, D, RA } }, - -{ "lfdu", OP(51), OP_MASK, PPC|POWER, { FRT, D, RAS } }, - -{ "stfs", OP(52), OP_MASK, PPC|POWER, { FRS, D, RA } }, - -{ "stfsu", OP(53), OP_MASK, PPC|POWER, { FRS, D, RAS } }, - -{ "stfd", OP(54), OP_MASK, PPC|POWER, { FRS, D, RA } }, - -{ "stfdu", OP(55), OP_MASK, PPC|POWER, { FRS, D, RAS } }, - -{ "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA } }, - -{ "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA } }, - -{ "ld", DSO(58,0), DS_MASK, PPC|B64, { RT, DS, RA } }, - -{ "ldu", DSO(58,1), DS_MASK, PPC|B64, { RT, DS, RAL } }, - -{ "lwa", DSO(58,2), DS_MASK, PPC|B64, { RT, DS, RA } }, - -{ "fdivs", A(59,18,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fdivs.", A(59,18,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, - -{ "fsubs", A(59,20,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fsubs.", A(59,20,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, - -{ "fadds", A(59,21,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fadds.", A(59,21,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, - -{ "fsqrts", A(59,22,0), AFRAFRC_MASK, PPC, { FRT, FRB } }, -{ "fsqrts.", A(59,22,1), AFRAFRC_MASK, PPC, { FRT, FRB } }, - -{ "fres", A(59,24,0), AFRAFRC_MASK, PPC, { FRT, FRB } }, -{ "fres.", A(59,24,1), AFRAFRC_MASK, PPC, { FRT, FRB } }, - -{ "fmuls", A(59,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } }, -{ "fmuls.", A(59,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } }, - -{ "fmsubs", A(59,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fmsubs.", A(59,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, - -{ "fmadds", A(59,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fmadds.", A(59,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, - -{ "fnmsubs", A(59,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnmsubs.",A(59,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, - -{ "fnmadds", A(59,31,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnmadds.",A(59,31,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, - -{ "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } }, - -{ "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } }, - -{ "std", DSO(62,0), DS_MASK, PPC|B64, { RS, DS, RA } }, - -{ "stdu", DSO(62,1), DS_MASK, PPC|B64, { RS, DS, RAS } }, - -{ "fcmpu", X(63,0), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } }, - -{ "frsp", XRC(63,12,0), XRA_MASK, PPC|POWER, { FRT, FRB } }, -{ "frsp.", XRC(63,12,1), XRA_MASK, PPC|POWER, { FRT, FRB } }, - -{ "fctiw", XRC(63,14,0), XRA_MASK, PPC, { FRT, FRB } }, -{ "fcir", XRC(63,14,0), XRA_MASK, POWER2, { FRT, FRB } }, -{ "fctiw.", XRC(63,14,1), XRA_MASK, PPC, { FRT, FRB } }, -{ "fcir.", XRC(63,14,1), XRA_MASK, POWER2, { FRT, FRB } }, - -{ "fctiwz", XRC(63,15,0), XRA_MASK, PPC, { FRT, FRB } }, -{ "fcirz", XRC(63,15,0), XRA_MASK, POWER2, { FRT, FRB } }, -{ "fctiwz.", XRC(63,15,1), XRA_MASK, PPC, { FRT, FRB } }, -{ "fcirz.", XRC(63,15,1), XRA_MASK, POWER2, { FRT, FRB } }, - -{ "fdiv", A(63,18,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fd", A(63,18,0), AFRC_MASK, POWER, { FRT, FRA, FRB } }, -{ "fdiv.", A(63,18,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fd.", A(63,18,1), AFRC_MASK, POWER, { FRT, FRA, FRB } }, - -{ "fsub", A(63,20,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fs", A(63,20,0), AFRC_MASK, POWER, { FRT, FRA, FRB } }, -{ "fsub.", A(63,20,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fs.", A(63,20,1), AFRC_MASK, POWER, { FRT, FRA, FRB } }, - -{ "fadd", A(63,21,0), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fa", A(63,21,0), AFRC_MASK, POWER, { FRT, FRA, FRB } }, -{ "fadd.", A(63,21,1), AFRC_MASK, PPC, { FRT, FRA, FRB } }, -{ "fa.", A(63,21,1), AFRC_MASK, POWER, { FRT, FRA, FRB } }, - -{ "fsqrt", A(63,22,0), AFRAFRC_MASK, PPC|POWER2, { FRT, FRB } }, -{ "fsqrt.", A(63,22,1), AFRAFRC_MASK, PPC|POWER2, { FRT, FRB } }, - -{ "fsel", A(63,23,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fsel.", A(63,23,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, - -{ "fmul", A(63,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } }, -{ "fm", A(63,25,0), AFRB_MASK, POWER, { FRT, FRA, FRC } }, -{ "fmul.", A(63,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } }, -{ "fm.", A(63,25,1), AFRB_MASK, POWER, { FRT, FRA, FRC } }, - -{ "frsqrte", A(63,26,0), AFRAFRC_MASK, PPC, { FRT, FRB } }, -{ "frsqrte.",A(63,26,1), AFRAFRC_MASK, PPC, { FRT, FRB } }, - -{ "fmsub", A(63,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fms", A(63,28,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, -{ "fmsub.", A(63,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fms.", A(63,28,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, - -{ "fmadd", A(63,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fma", A(63,29,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, -{ "fmadd.", A(63,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fma.", A(63,29,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, - -{ "fnmsub", A(63,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnms", A(63,30,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, -{ "fnmsub.", A(63,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnms.", A(63,30,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, - -{ "fnmadd", A(63,31,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnma", A(63,31,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, -{ "fnmadd.", A(63,31,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } }, -{ "fnma.", A(63,31,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } }, - -{ "fcmpo", X(63,30), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } }, - -{ "mtfsb1", XRC(63,38,0), XRARB_MASK, PPC|POWER, { BT } }, -{ "mtfsb1.", XRC(63,38,1), XRARB_MASK, PPC|POWER, { BT } }, - -{ "fneg", XRC(63,40,0), XRA_MASK, PPC|POWER, { FRT, FRB } }, -{ "fneg.", XRC(63,40,1), XRA_MASK, PPC|POWER, { FRT, FRB } }, - -{ "mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } }, - -{ "mtfsb0", XRC(63,70,0), XRARB_MASK, PPC|POWER, { BT } }, -{ "mtfsb0.", XRC(63,70,1), XRARB_MASK, PPC|POWER, { BT } }, - -{ "fmr", XRC(63,72,0), XRA_MASK, PPC|POWER, { FRT, FRB } }, -{ "fmr.", XRC(63,72,1), XRA_MASK, PPC|POWER, { FRT, FRB } }, - -{ "mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } }, -{ "mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } }, - -{ "fnabs", XRC(63,136,0), XRA_MASK, PPC|POWER, { FRT, FRB } }, -{ "fnabs.", XRC(63,136,1), XRA_MASK, PPC|POWER, { FRT, FRB } }, - -{ "fabs", XRC(63,264,0), XRA_MASK, PPC|POWER, { FRT, FRB } }, -{ "fabs.", XRC(63,264,1), XRA_MASK, PPC|POWER, { FRT, FRB } }, - -{ "mffs", XRC(63,583,0), XRARB_MASK, PPC|POWER, { FRT } }, -{ "mffs.", XRC(63,583,1), XRARB_MASK, PPC|POWER, { FRT } }, - -{ "mtfsf", XFL(63,711,0), XFL_MASK, PPC|POWER, { FLM, FRB } }, -{ "mtfsf.", XFL(63,711,1), XFL_MASK, PPC|POWER, { FLM, FRB } }, - -{ "fctid", XRC(63,814,0), XRA_MASK, PPC|B64, { FRT, FRB } }, -{ "fctid.", XRC(63,814,1), XRA_MASK, PPC|B64, { FRT, FRB } }, - -{ "fctidz", XRC(63,815,0), XRA_MASK, PPC|B64, { FRT, FRB } }, -{ "fctidz.", XRC(63,815,1), XRA_MASK, PPC|B64, { FRT, FRB } }, - -{ "fcfid", XRC(63,846,0), XRA_MASK, PPC|B64, { FRT, FRB } }, -{ "fcfid.", XRC(63,846,1), XRA_MASK, PPC|B64, { FRT, FRB } }, - -}; - -const int powerpc_num_opcodes = ARRAY_SIZE(powerpc_opcodes); - -/* The macro table. This is only used by the assembler. */ - -const struct powerpc_macro powerpc_macros[] = { -{ "extldi", 4, PPC|B64, "rldicr %0,%1,%3,(%2)-1" }, -{ "extldi.", 4, PPC|B64, "rldicr. %0,%1,%3,(%2)-1" }, -{ "extrdi", 4, PPC|B64, "rldicl %0,%1,(%2)+(%3),64-(%2)" }, -{ "extrdi.", 4, PPC|B64, "rldicl. %0,%1,(%2)+(%3),64-(%2)" }, -{ "insrdi", 4, PPC|B64, "rldimi %0,%1,64-((%2)+(%3)),%3" }, -{ "insrdi.", 4, PPC|B64, "rldimi. %0,%1,64-((%2)+(%3)),%3" }, -{ "rotrdi", 3, PPC|B64, "rldicl %0,%1,64-(%2),0" }, -{ "rotrdi.", 3, PPC|B64, "rldicl. %0,%1,64-(%2),0" }, -{ "sldi", 3, PPC|B64, "rldicr %0,%1,%2,63-(%2)" }, -{ "sldi.", 3, PPC|B64, "rldicr. %0,%1,%2,63-(%2)" }, -{ "srdi", 3, PPC|B64, "rldicl %0,%1,64-(%2),%2" }, -{ "srdi.", 3, PPC|B64, "rldicl. %0,%1,64-(%2),%2" }, -{ "clrrdi", 3, PPC|B64, "rldicr %0,%1,0,63-(%2)" }, -{ "clrrdi.", 3, PPC|B64, "rldicr. %0,%1,0,63-(%2)" }, -{ "clrlsldi",4, PPC|B64, "rldic %0,%1,%3,(%2)-(%3)" }, -{ "clrlsldi.",4, PPC|B64, "rldic. %0,%1,%3,(%2)-(%3)" }, - -{ "extlwi", 4, PPC, "rlwinm %0,%1,%3,0,(%2)-1" }, -{ "extlwi.", 4, PPC, "rlwinm. %0,%1,%3,0,(%2)-1" }, -{ "extrwi", 4, PPC, "rlwinm %0,%1,(%2)+(%3),32-(%2),31" }, -{ "extrwi.", 4, PPC, "rlwinm. %0,%1,(%2)+(%3),32-(%2),31" }, -{ "inslwi", 4, PPC, "rlwimi %0,%1,32-(%3),%3,(%2)+(%3)-1" }, -{ "inslwi.", 4, PPC, "rlwimi. %0,%1,32-(%3),%3,(%2)+(%3)-1" }, -{ "insrwi", 4, PPC, "rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1" }, -{ "insrwi.", 4, PPC, "rlwimi. %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"}, -{ "rotrwi", 3, PPC, "rlwinm %0,%1,32-(%2),0,31" }, -{ "rotrwi.", 3, PPC, "rlwinm. %0,%1,32-(%2),0,31" }, -{ "slwi", 3, PPC, "rlwinm %0,%1,%2,0,31-(%2)" }, -{ "sli", 3, POWER, "rlinm %0,%1,%2,0,31-(%2)" }, -{ "slwi.", 3, PPC, "rlwinm. %0,%1,%2,0,31-(%2)" }, -{ "sli.", 3, POWER, "rlinm. %0,%1,%2,0,31-(%2)" }, -{ "srwi", 3, PPC, "rlwinm %0,%1,32-(%2),%2,31" }, -{ "sri", 3, POWER, "rlinm %0,%1,32-(%2),%2,31" }, -{ "srwi.", 3, PPC, "rlwinm. %0,%1,32-(%2),%2,31" }, -{ "sri.", 3, POWER, "rlinm. %0,%1,32-(%2),%2,31" }, -{ "clrrwi", 3, PPC, "rlwinm %0,%1,0,0,31-(%2)" }, -{ "clrrwi.", 3, PPC, "rlwinm. %0,%1,0,0,31-(%2)" }, -{ "clrlslwi",4, PPC, "rlwinm %0,%1,%3,(%2)-(%3),31-(%3)" }, -{ "clrlslwi.",4, PPC, "rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)" }, - -}; - -const int powerpc_num_macros = ARRAY_SIZE(powerpc_macros); diff --git a/arch/ppc/xmon/ppc.h b/arch/ppc/xmon/ppc.h deleted file mode 100644 index 2345ecba1fe9faed25b8e0ba075152331f718562..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/ppc.h +++ /dev/null @@ -1,240 +0,0 @@ -/* ppc.h -- Header file for PowerPC opcode table - Copyright 1994 Free Software Foundation, Inc. - Written by Ian Lance Taylor, Cygnus Support - -This file is part of GDB, GAS, and the GNU binutils. - -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -1, or (at your option) any later version. - -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef PPC_H -#define PPC_H - -/* The opcode table is an array of struct powerpc_opcode. */ - -struct powerpc_opcode -{ - /* The opcode name. */ - const char *name; - - /* The opcode itself. Those bits which will be filled in with - operands are zeroes. */ - unsigned long opcode; - - /* The opcode mask. This is used by the disassembler. This is a - mask containing ones indicating those bits which must match the - opcode field, and zeroes indicating those bits which need not - match (and are presumably filled in by operands). */ - unsigned long mask; - - /* One bit flags for the opcode. These are used to indicate which - specific processors support the instructions. The defined values - are listed below. */ - unsigned long flags; - - /* An array of operand codes. Each code is an index into the - operand table. They appear in the order which the operands must - appear in assembly code, and are terminated by a zero. */ - unsigned char operands[8]; -}; - -/* The table itself is sorted by major opcode number, and is otherwise - in the order in which the disassembler should consider - instructions. */ -extern const struct powerpc_opcode powerpc_opcodes[]; -extern const int powerpc_num_opcodes; - -/* Values defined for the flags field of a struct powerpc_opcode. */ - -/* Opcode is defined for the PowerPC architecture. */ -#define PPC_OPCODE_PPC (01) - -/* Opcode is defined for the POWER (RS/6000) architecture. */ -#define PPC_OPCODE_POWER (02) - -/* Opcode is defined for the POWER2 (Rios 2) architecture. */ -#define PPC_OPCODE_POWER2 (04) - -/* Opcode is only defined on 32 bit architectures. */ -#define PPC_OPCODE_32 (010) - -/* Opcode is only defined on 64 bit architectures. */ -#define PPC_OPCODE_64 (020) - -/* Opcode is supported by the Motorola PowerPC 601 processor. The 601 - is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions, - but it also supports many additional POWER instructions. */ -#define PPC_OPCODE_601 (040) - -/* A macro to extract the major opcode from an instruction. */ -#define PPC_OP(i) (((i) >> 26) & 0x3f) - -/* The operands table is an array of struct powerpc_operand. */ - -struct powerpc_operand -{ - /* The number of bits in the operand. */ - int bits; - - /* How far the operand is left shifted in the instruction. */ - int shift; - - /* Insertion function. This is used by the assembler. To insert an - operand value into an instruction, check this field. - - If it is NULL, execute - i |= (op & ((1 << o->bits) - 1)) << o->shift; - (i is the instruction which we are filling in, o is a pointer to - this structure, and op is the opcode value; this assumes twos - complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction and the operand value. It will return the new value - of the instruction. If the ERRMSG argument is not NULL, then if - the operand value is illegal, *ERRMSG will be set to a warning - string (the operand will be inserted in any case). If the - operand value is legal, *ERRMSG will be unchanged (most operands - can accept any value). */ - unsigned long (*insert) PARAMS ((unsigned long instruction, long op, - const char **errmsg)); - - /* Extraction function. This is used by the disassembler. To - extract this operand type from an instruction, check this field. - - If it is NULL, compute - op = ((i) >> o->shift) & ((1 << o->bits) - 1); - if ((o->flags & PPC_OPERAND_SIGNED) != 0 - && (op & (1 << (o->bits - 1))) != 0) - op -= 1 << o->bits; - (i is the instruction, o is a pointer to this structure, and op - is the result; this assumes twos complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction value. It will return the value of the operand. If - the INVALID argument is not NULL, *INVALID will be set to - non-zero if this operand type can not actually be extracted from - this operand (i.e., the instruction does not match). If the - operand is valid, *INVALID will not be changed. */ - long (*extract) PARAMS ((unsigned long instruction, int *invalid)); - - /* One bit syntax flags. */ - unsigned long flags; -}; - -/* Elements in the table are retrieved by indexing with values from - the operands field of the powerpc_opcodes table. */ - -extern const struct powerpc_operand powerpc_operands[]; - -/* Values defined for the flags field of a struct powerpc_operand. */ - -/* This operand takes signed values. */ -#define PPC_OPERAND_SIGNED (01) - -/* This operand takes signed values, but also accepts a full positive - range of values when running in 32 bit mode. That is, if bits is - 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode, - this flag is ignored. */ -#define PPC_OPERAND_SIGNOPT (02) - -/* This operand does not actually exist in the assembler input. This - is used to support extended mnemonics such as mr, for which two - operands fields are identical. The assembler should call the - insert function with any op value. The disassembler should call - the extract function, ignore the return value, and check the value - placed in the valid argument. */ -#define PPC_OPERAND_FAKE (04) - -/* The next operand should be wrapped in parentheses rather than - separated from this one by a comma. This is used for the load and - store instructions which want their operands to look like - reg,displacement(reg) - */ -#define PPC_OPERAND_PARENS (010) - -/* This operand may use the symbolic names for the CR fields, which - are - lt 0 gt 1 eq 2 so 3 un 3 - cr0 0 cr1 1 cr2 2 cr3 3 - cr4 4 cr5 5 cr6 6 cr7 7 - These may be combined arithmetically, as in cr2*4+gt. These are - only supported on the PowerPC, not the POWER. */ -#define PPC_OPERAND_CR (020) - -/* This operand names a register. The disassembler uses this to print - register names with a leading 'r'. */ -#define PPC_OPERAND_GPR (040) - -/* This operand names a floating point register. The disassembler - prints these with a leading 'f'. */ -#define PPC_OPERAND_FPR (0100) - -/* This operand is a relative branch displacement. The disassembler - prints these symbolically if possible. */ -#define PPC_OPERAND_RELATIVE (0200) - -/* This operand is an absolute branch address. The disassembler - prints these symbolically if possible. */ -#define PPC_OPERAND_ABSOLUTE (0400) - -/* This operand is optional, and is zero if omitted. This is used for - the optional BF and L fields in the comparison instructions. The - assembler must count the number of operands remaining on the line, - and the number of operands remaining for the opcode, and decide - whether this operand is present or not. The disassembler should - print this operand out only if it is not zero. */ -#define PPC_OPERAND_OPTIONAL (01000) - -/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand - is omitted, then for the next operand use this operand value plus - 1, ignoring the next operand field for the opcode. This wretched - hack is needed because the Power rotate instructions can take - either 4 or 5 operands. The disassembler should print this operand - out regardless of the PPC_OPERAND_OPTIONAL field. */ -#define PPC_OPERAND_NEXT (02000) - -/* This operand should be regarded as a negative number for the - purposes of overflow checking (i.e., the normal most negative - number is disallowed and one more than the normal most positive - number is allowed). This flag will only be set for a signed - operand. */ -#define PPC_OPERAND_NEGATIVE (04000) - -/* The POWER and PowerPC assemblers use a few macros. We keep them - with the operands table for simplicity. The macro table is an - array of struct powerpc_macro. */ - -struct powerpc_macro -{ - /* The macro name. */ - const char *name; - - /* The number of operands the macro takes. */ - unsigned int operands; - - /* One bit flags for the opcode. These are used to indicate which - specific processors support the instructions. The values are the - same as those for the struct powerpc_opcode flags field. */ - unsigned long flags; - - /* A format string to turn the macro into a normal instruction. - Each %N in the string is replaced with operand number N (zero - based). */ - const char *format; -}; - -extern const struct powerpc_macro powerpc_macros[]; -extern const int powerpc_num_macros; - -#endif /* PPC_H */ diff --git a/arch/ppc/xmon/privinst.h b/arch/ppc/xmon/privinst.h deleted file mode 100644 index c492a35687bda0ff9edb5757b2668f187ba24f06..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/privinst.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 1996 Paul Mackerras. - */ - -#define GETREG(reg) \ - static inline int get_ ## reg (void) \ - { int ret; asm volatile ("mf" #reg " %0" : "=r" (ret) :); return ret; } - -#define SETREG(reg) \ - static inline void set_ ## reg (int val) \ - { asm volatile ("mt" #reg " %0" : : "r" (val)); } - -GETREG(msr) -SETREG(msr) -GETREG(cr) - -#define GSETSPR(n, name) \ - static inline int get_ ## name (void) \ - { int ret; asm volatile ("mfspr %0," #n : "=r" (ret) : ); return ret; } \ - static inline void set_ ## name (int val) \ - { asm volatile ("mtspr " #n ",%0" : : "r" (val)); } - -GSETSPR(0, mq) -GSETSPR(1, xer) -GSETSPR(4, rtcu) -GSETSPR(5, rtcl) -GSETSPR(8, lr) -GSETSPR(9, ctr) -GSETSPR(18, dsisr) -GSETSPR(19, dar) -GSETSPR(22, dec) -GSETSPR(25, sdr1) -GSETSPR(26, srr0) -GSETSPR(27, srr1) -GSETSPR(272, sprg0) -GSETSPR(273, sprg1) -GSETSPR(274, sprg2) -GSETSPR(275, sprg3) -GSETSPR(282, ear) -GSETSPR(287, pvr) -#ifndef CONFIG_8xx -GSETSPR(528, bat0u) -GSETSPR(529, bat0l) -GSETSPR(530, bat1u) -GSETSPR(531, bat1l) -GSETSPR(532, bat2u) -GSETSPR(533, bat2l) -GSETSPR(534, bat3u) -GSETSPR(535, bat3l) -GSETSPR(1008, hid0) -GSETSPR(1009, hid1) -GSETSPR(1010, iabr) -GSETSPR(1013, dabr) -GSETSPR(1023, pir) -#else -GSETSPR(144, cmpa) -GSETSPR(145, cmpb) -GSETSPR(146, cmpc) -GSETSPR(147, cmpd) -GSETSPR(158, ictrl) -#endif - -static inline int get_sr(int n) -{ - int ret; - - asm (" mfsrin %0,%1" : "=r" (ret) : "r" (n << 28)); - return ret; -} - -static inline void set_sr(int n, int val) -{ - asm ("mtsrin %0,%1" : : "r" (val), "r" (n << 28)); -} - -static inline void store_inst(void *p) -{ - asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p)); -} - -static inline void cflush(void *p) -{ - asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p)); -} - -static inline void cinval(void *p) -{ - asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p)); -} - diff --git a/arch/ppc/xmon/setjmp.c b/arch/ppc/xmon/setjmp.c deleted file mode 100644 index 28352bac2ae66207cf766e54aa13d1e4808a5eca..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/setjmp.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (C) 1996 Paul Mackerras. - * - * NB this file must be compiled with -O2. - */ - -int -xmon_setjmp(long *buf) -{ - asm ("mflr 0; stw 0,0(%0);" - "stw 1,4(%0); stw 2,8(%0);" - "mfcr 0; stw 0,12(%0);" - "stmw 13,16(%0)" - : : "r" (buf)); - /* XXX should save fp regs as well */ - return 0; -} - -void -xmon_longjmp(long *buf, int val) -{ - if (val == 0) - val = 1; - asm ("lmw 13,16(%0);" - "lwz 0,12(%0); mtcrf 0x38,0;" - "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);" - "mtlr 0; mr 3,%1" - : : "r" (buf), "r" (val)); -} diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c deleted file mode 100644 index 9056fe58aaa15d3dcadee93026064d8c75a5eda6..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/start.c +++ /dev/null @@ -1,342 +0,0 @@ -/* - * Copyright (C) 1996 Paul Mackerras. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static volatile unsigned char *sccc, *sccd; -unsigned int TXRDY, RXRDY, DLAB; -static int xmon_expect(const char *str, unsigned int timeout); - -static int via_modem; - -#define TB_SPEED 25000000 - -static inline unsigned int readtb(void) -{ - unsigned int ret; - - asm volatile("mftb %0" : "=r" (ret) :); - return ret; -} - -void buf_access(void) -{ - if (DLAB) - sccd[3] &= ~DLAB; /* reset DLAB */ -} - - -#ifdef CONFIG_MAGIC_SYSRQ -static void sysrq_handle_xmon(int key, struct pt_regs *regs, - struct tty_struct *tty) -{ - xmon(regs); -} - -static struct sysrq_key_op sysrq_xmon_op = -{ - .handler = sysrq_handle_xmon, - .help_msg = "Xmon", - .action_msg = "Entering xmon", -}; -#endif - -void -xmon_map_scc(void) -{ -#if defined(CONFIG_405GP) - sccd = (volatile unsigned char *)0xef600300; -#elif defined(CONFIG_440EP) - sccd = (volatile unsigned char *) ioremap(PPC440EP_UART0_ADDR, 8); -#elif defined(CONFIG_440SP) - sccd = (volatile unsigned char *) ioremap64(PPC440SP_UART0_ADDR, 8); -#elif defined(CONFIG_440SPE) - sccd = (volatile unsigned char *) ioremap64(PPC440SPE_UART0_ADDR, 8); -#elif defined(CONFIG_44x) - /* This is the default for 44x platforms. Any boards that have a - different UART address need to be put in cases before this or the - port will be mapped incorrectly */ - sccd = (volatile unsigned char *) ioremap64(PPC440GP_UART0_ADDR, 8); -#endif /* platform */ - -#ifndef CONFIG_PPC_PREP - sccc = sccd + 5; - TXRDY = 0x20; - RXRDY = 1; - DLAB = 0x80; -#endif - - register_sysrq_key('x', &sysrq_xmon_op); -} - -static int scc_initialized; - -void xmon_init_scc(void); - -int -xmon_write(void *handle, void *ptr, int nb) -{ - char *p = ptr; - int i, c, ct; - -#ifdef CONFIG_SMP - static unsigned long xmon_write_lock; - int lock_wait = 1000000; - int locked; - - while ((locked = test_and_set_bit(0, &xmon_write_lock)) != 0) - if (--lock_wait == 0) - break; -#endif - - if (!scc_initialized) - xmon_init_scc(); - ct = 0; - for (i = 0; i < nb; ++i) { - while ((*sccc & TXRDY) == 0) - ; - c = p[i]; - if (c == '\n' && !ct) { - c = '\r'; - ct = 1; - --i; - } else { - ct = 0; - } - buf_access(); - *sccd = c; - eieio(); - } - -#ifdef CONFIG_SMP - if (!locked) - clear_bit(0, &xmon_write_lock); -#endif - return nb; -} - -int xmon_wants_key; - - -int -xmon_read(void *handle, void *ptr, int nb) -{ - char *p = ptr; - int i; - - if (!scc_initialized) - xmon_init_scc(); - for (i = 0; i < nb; ++i) { - while ((*sccc & RXRDY) == 0) - ; - buf_access(); - *p++ = *sccd; - } - return i; -} - -int -xmon_read_poll(void) -{ - if ((*sccc & RXRDY) == 0) { - ; - return -1; - } - buf_access(); - return *sccd; -} - -void -xmon_init_scc(void) -{ - scc_initialized = 1; - if (via_modem) { - for (;;) { - xmon_write(NULL, "ATE1V1\r", 7); - if (xmon_expect("OK", 5)) { - xmon_write(NULL, "ATA\r", 4); - if (xmon_expect("CONNECT", 40)) - break; - } - xmon_write(NULL, "+++", 3); - xmon_expect("OK", 3); - } - } -} - - -void *xmon_stdin; -void *xmon_stdout; -void *xmon_stderr; - -void -xmon_init(int arg) -{ - xmon_map_scc(); -} - -int -xmon_putc(int c, void *f) -{ - char ch = c; - - if (c == '\n') - xmon_putc('\r', f); - return xmon_write(f, &ch, 1) == 1? c: -1; -} - -int -xmon_putchar(int c) -{ - return xmon_putc(c, xmon_stdout); -} - -int -xmon_fputs(char *str, void *f) -{ - int n = strlen(str); - - return xmon_write(f, str, n) == n? 0: -1; -} - -int -xmon_readchar(void) -{ - char ch; - - for (;;) { - switch (xmon_read(xmon_stdin, &ch, 1)) { - case 1: - return ch; - case -1: - xmon_printf("read(stdin) returned -1\r\n", 0, 0); - return -1; - } - } -} - -static char line[256]; -static char *lineptr; -static int lineleft; - -int xmon_expect(const char *str, unsigned int timeout) -{ - int c; - unsigned int t0; - - timeout *= TB_SPEED; - t0 = readtb(); - do { - lineptr = line; - for (;;) { - c = xmon_read_poll(); - if (c == -1) { - if (readtb() - t0 > timeout) - return 0; - continue; - } - if (c == '\n') - break; - if (c != '\r' && lineptr < &line[sizeof(line) - 1]) - *lineptr++ = c; - } - *lineptr = 0; - } while (strstr(line, str) == NULL); - return 1; -} - -int -xmon_getchar(void) -{ - int c; - - if (lineleft == 0) { - lineptr = line; - for (;;) { - c = xmon_readchar(); - if (c == -1 || c == 4) - break; - if (c == '\r' || c == '\n') { - *lineptr++ = '\n'; - xmon_putchar('\n'); - break; - } - switch (c) { - case 0177: - case '\b': - if (lineptr > line) { - xmon_putchar('\b'); - xmon_putchar(' '); - xmon_putchar('\b'); - --lineptr; - } - break; - case 'U' & 0x1F: - while (lineptr > line) { - xmon_putchar('\b'); - xmon_putchar(' '); - xmon_putchar('\b'); - --lineptr; - } - break; - default: - if (lineptr >= &line[sizeof(line) - 1]) - xmon_putchar('\a'); - else { - xmon_putchar(c); - *lineptr++ = c; - } - } - } - lineleft = lineptr - line; - lineptr = line; - } - if (lineleft == 0) - return -1; - --lineleft; - return *lineptr++; -} - -char * -xmon_fgets(char *str, int nb, void *f) -{ - char *p; - int c; - - for (p = str; p < str + nb - 1; ) { - c = xmon_getchar(); - if (c == -1) { - if (p == str) - return NULL; - break; - } - *p++ = c; - if (c == '\n') - break; - } - *p = 0; - return str; -} - -void -xmon_enter(void) -{ -} - -void -xmon_leave(void) -{ -} diff --git a/arch/ppc/xmon/start_8xx.c b/arch/ppc/xmon/start_8xx.c deleted file mode 100644 index 30974068c22399dfdc3450d8b04f3484377104ac..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/start_8xx.c +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Copyright (C) 1996 Paul Mackerras. - * Copyright (C) 2000 Dan Malek. - * Quick hack of Paul's code to make XMON work on 8xx processors. Lots - * of assumptions, like the SMC1 is used, it has been initialized by the - * loader at some point, and we can just stuff and suck bytes. - * We rely upon the 8xx uart driver to support us, as the interface - * changes between boot up and operational phases of the kernel. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -extern void xmon_printf(const char *fmt, ...); -extern int xmon_8xx_write(char *str, int nb); -extern int xmon_8xx_read_poll(void); -extern int xmon_8xx_read_char(void); -void prom_drawhex(uint); -void prom_drawstring(const char *str); - -static int use_screen = 1; /* default */ - -#define TB_SPEED 25000000 - -static inline unsigned int readtb(void) -{ - unsigned int ret; - - asm volatile("mftb %0" : "=r" (ret) :); - return ret; -} - -void buf_access(void) -{ -} - -void -xmon_map_scc(void) -{ - - cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm); - use_screen = 0; - - prom_drawstring("xmon uses serial port\n"); -} - -static int scc_initialized = 0; - -void xmon_init_scc(void); - -int -xmon_write(void *handle, void *ptr, int nb) -{ - char *p = ptr; - int i, c, ct; - - if (!scc_initialized) - xmon_init_scc(); - - return(xmon_8xx_write(ptr, nb)); -} - -int xmon_wants_key; - -int -xmon_read(void *handle, void *ptr, int nb) -{ - char *p = ptr; - int i; - - if (!scc_initialized) - xmon_init_scc(); - - for (i = 0; i < nb; ++i) { - *p++ = xmon_8xx_read_char(); - } - return i; -} - -int -xmon_read_poll(void) -{ - return(xmon_8xx_read_poll()); -} - -void -xmon_init_scc() -{ - scc_initialized = 1; -} - -#if 0 -extern int (*prom_entry)(void *); - -int -xmon_exit(void) -{ - struct prom_args { - char *service; - } args; - - for (;;) { - args.service = "exit"; - (*prom_entry)(&args); - } -} -#endif - -void *xmon_stdin; -void *xmon_stdout; -void *xmon_stderr; - -void -xmon_init(void) -{ -} - -int -xmon_putc(int c, void *f) -{ - char ch = c; - - if (c == '\n') - xmon_putc('\r', f); - return xmon_write(f, &ch, 1) == 1? c: -1; -} - -int -xmon_putchar(int c) -{ - return xmon_putc(c, xmon_stdout); -} - -int -xmon_fputs(char *str, void *f) -{ - int n = strlen(str); - - return xmon_write(f, str, n) == n? 0: -1; -} - -int -xmon_readchar(void) -{ - char ch; - - for (;;) { - switch (xmon_read(xmon_stdin, &ch, 1)) { - case 1: - return ch; - case -1: - xmon_printf("read(stdin) returned -1\r\n", 0, 0); - return -1; - } - } -} - -static char line[256]; -static char *lineptr; -static int lineleft; - -#if 0 -int xmon_expect(const char *str, unsigned int timeout) -{ - int c; - unsigned int t0; - - timeout *= TB_SPEED; - t0 = readtb(); - do { - lineptr = line; - for (;;) { - c = xmon_read_poll(); - if (c == -1) { - if (readtb() - t0 > timeout) - return 0; - continue; - } - if (c == '\n') - break; - if (c != '\r' && lineptr < &line[sizeof(line) - 1]) - *lineptr++ = c; - } - *lineptr = 0; - } while (strstr(line, str) == NULL); - return 1; -} -#endif - -int -xmon_getchar(void) -{ - int c; - - if (lineleft == 0) { - lineptr = line; - for (;;) { - c = xmon_readchar(); - if (c == -1 || c == 4) - break; - if (c == '\r' || c == '\n') { - *lineptr++ = '\n'; - xmon_putchar('\n'); - break; - } - switch (c) { - case 0177: - case '\b': - if (lineptr > line) { - xmon_putchar('\b'); - xmon_putchar(' '); - xmon_putchar('\b'); - --lineptr; - } - break; - case 'U' & 0x1F: - while (lineptr > line) { - xmon_putchar('\b'); - xmon_putchar(' '); - xmon_putchar('\b'); - --lineptr; - } - break; - default: - if (lineptr >= &line[sizeof(line) - 1]) - xmon_putchar('\a'); - else { - xmon_putchar(c); - *lineptr++ = c; - } - } - } - lineleft = lineptr - line; - lineptr = line; - } - if (lineleft == 0) - return -1; - --lineleft; - return *lineptr++; -} - -char * -xmon_fgets(char *str, int nb, void *f) -{ - char *p; - int c; - - for (p = str; p < str + nb - 1; ) { - c = xmon_getchar(); - if (c == -1) { - if (p == str) - return 0; - break; - } - *p++ = c; - if (c == '\n') - break; - } - *p = 0; - return str; -} - -void -prom_drawhex(uint val) -{ - unsigned char buf[10]; - - int i; - for (i = 7; i >= 0; i--) - { - buf[i] = "0123456789abcdef"[val & 0x0f]; - val >>= 4; - } - buf[8] = '\0'; - xmon_fputs(buf, xmon_stdout); -} - -void -prom_drawstring(const char *str) -{ - xmon_fputs(str, xmon_stdout); -} diff --git a/arch/ppc/xmon/subr_prf.c b/arch/ppc/xmon/subr_prf.c deleted file mode 100644 index 126624f3f2ed8de1d8f7aea0e7268c997caa36f3..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/subr_prf.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Written by Cort Dougan to replace the version originally used - * by Paul Mackerras, which came from NetBSD and thus had copyright - * conflicts with Linux. - * - * This file makes liberal use of the standard linux utility - * routines to reduce the size of the binary. We assume we can - * trust some parts of Linux inside the debugger. - * -- Cort (cort@cs.nmt.edu) - * - * Copyright (C) 1999 Cort Dougan. - */ - -#include -#include -#include -#include "nonstdio.h" - -extern int xmon_write(void *, void *, int); - -void -xmon_vfprintf(void *f, const char *fmt, va_list ap) -{ - static char xmon_buf[2048]; - int n; - - n = vsprintf(xmon_buf, fmt, ap); - xmon_write(f, xmon_buf, n); -} - -void -xmon_printf(const char *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - xmon_vfprintf(stdout, fmt, ap); - va_end(ap); -} - -void -xmon_fprintf(void *f, const char *fmt, ...) -{ - va_list ap; - - va_start(ap, fmt); - xmon_vfprintf(f, fmt, ap); - va_end(ap); -} - -void -xmon_puts(char *s) -{ - xmon_write(stdout, s, strlen(s)); -} diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c deleted file mode 100644 index b1a91744fd2db09086d79af4846e74d3c9ba518a..0000000000000000000000000000000000000000 --- a/arch/ppc/xmon/xmon.c +++ /dev/null @@ -1,1780 +0,0 @@ -/* - * Routines providing a simple monitor for use on the PowerMac. - * - * Copyright (C) 1996 Paul Mackerras. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "nonstdio.h" -#include "privinst.h" - -#define scanhex xmon_scanhex -#define skipbl xmon_skipbl - -#ifdef CONFIG_SMP -static unsigned long cpus_in_xmon = 0; -static unsigned long got_xmon = 0; -static volatile int take_xmon = -1; -#endif /* CONFIG_SMP */ - -static unsigned adrs; -static int size = 1; -static unsigned ndump = 64; -static unsigned nidump = 16; -static unsigned ncsum = 4096; -static int termch; - -static u_int bus_error_jmp[100]; -#define setjmp xmon_setjmp -#define longjmp xmon_longjmp - -/* Breakpoint stuff */ -struct bpt { - unsigned address; - unsigned instr; - unsigned count; - unsigned char enabled; -}; - -#define NBPTS 16 -static struct bpt bpts[NBPTS]; -static struct bpt dabr; -static struct bpt iabr; -static unsigned bpinstr = 0x7fe00008; /* trap */ - -/* Prototypes */ -extern void (*debugger_fault_handler)(struct pt_regs *); -static int cmds(struct pt_regs *); -static int mread(unsigned, void *, int); -static int mwrite(unsigned, void *, int); -static void handle_fault(struct pt_regs *); -static void byterev(unsigned char *, int); -static void memex(void); -static int bsesc(void); -static void dump(void); -static void prdump(unsigned, int); -#ifdef __MWERKS__ -static void prndump(unsigned, int); -static int nvreadb(unsigned); -#endif -static int ppc_inst_dump(unsigned, int); -void print_address(unsigned); -static int getsp(void); -static void dump_hash_table(void); -static void backtrace(struct pt_regs *); -static void excprint(struct pt_regs *); -static void prregs(struct pt_regs *); -static void memops(int); -static void memlocate(void); -static void memzcan(void); -static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned); -int skipbl(void); -int scanhex(unsigned *valp); -static void scannl(void); -static int hexdigit(int); -void getstring(char *, int); -static void flush_input(void); -static int inchar(void); -static void take_input(char *); -/* static void openforth(void); */ -static unsigned read_spr(int); -static void write_spr(int, unsigned); -static void super_regs(void); -static void symbol_lookup(void); -static void remove_bpts(void); -static void insert_bpts(void); -static struct bpt *at_breakpoint(unsigned pc); -static void bpt_cmds(void); -void cacheflush(void); -#ifdef CONFIG_SMP -static void cpu_cmd(void); -#endif /* CONFIG_SMP */ -static void csum(void); -static void bootcmds(void); -static void proccall(void); -static void printtime(void); - -extern int print_insn_big_powerpc(FILE *, unsigned long, unsigned); -extern void printf(const char *fmt, ...); -extern int putchar(int ch); -extern int setjmp(u_int *); -extern void longjmp(u_int *, int); - -extern void xmon_enter(void); -extern void xmon_leave(void); - -static unsigned start_tb[NR_CPUS][2]; -static unsigned stop_tb[NR_CPUS][2]; - -#define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3]) - -#define isxdigit(c) (('0' <= (c) && (c) <= '9') \ - || ('a' <= (c) && (c) <= 'f') \ - || ('A' <= (c) && (c) <= 'F')) -#define isalnum(c) (('0' <= (c) && (c) <= '9') \ - || ('a' <= (c) && (c) <= 'z') \ - || ('A' <= (c) && (c) <= 'Z')) -#define isspace(c) (c == ' ' || c == '\t' || c == 10 || c == 13 || c == 0) - -static char *help_string = "\ -Commands:\n\ - d dump bytes\n\ - di dump instructions\n\ - df dump float values\n\ - dd dump double values\n\ - e print exception information\n\ - h dump hash table\n\ - m examine/change memory\n\ - mm move a block of memory\n\ - ms set a block of memory\n\ - md compare two blocks of memory\n\ - r print registers\n\ - S print special registers\n\ - t print backtrace\n\ - la lookup address\n\ - ls lookup symbol\n\ - C checksum\n\ - p call function with arguments\n\ - T print time\n\ - x exit monitor\n\ - zr reboot\n\ - zh halt\n\ -"; - -static int xmon_trace[NR_CPUS]; -#define SSTEP 1 /* stepping because of 's' command */ -#define BRSTEP 2 /* stepping over breakpoint */ - -#ifdef CONFIG_4xx -#define MSR_SSTEP_ENABLE 0x200 -#else -#define MSR_SSTEP_ENABLE 0x400 -#endif - -static struct pt_regs *xmon_regs[NR_CPUS]; - -extern inline void sync(void) -{ - asm volatile("sync; isync"); -} - -extern inline void __delay(unsigned int loops) -{ - if (loops != 0) - __asm__ __volatile__("mtctr %0; 1: bdnz 1b" : : - "r" (loops) : "ctr"); -} - -/* Print an address in numeric and symbolic form (if possible) */ -static void xmon_print_symbol(unsigned long address, const char *mid, - const char *after) -{ - char *modname; - const char *name = NULL; - unsigned long offset, size; - static char tmpstr[128]; - - printf("%.8lx", address); - if (setjmp(bus_error_jmp) == 0) { - debugger_fault_handler = handle_fault; - sync(); - name = kallsyms_lookup(address, &size, &offset, &modname, - tmpstr); - sync(); - /* wait a little while to see if we get a machine check */ - __delay(200); - } - debugger_fault_handler = NULL; - - if (name) { - printf("%s%s+%#lx/%#lx", mid, name, offset, size); - if (modname) - printf(" [%s]", modname); - } - printf("%s", after); -} - -static void get_tb(unsigned *p) -{ - unsigned hi, lo, hiagain; - - if ((get_pvr() >> 16) == 1) - return; - - do { - asm volatile("mftbu %0; mftb %1; mftbu %2" - : "=r" (hi), "=r" (lo), "=r" (hiagain)); - } while (hi != hiagain); - p[0] = hi; - p[1] = lo; -} - -static inline void xmon_enable_sstep(struct pt_regs *regs) -{ - regs->msr |= MSR_SSTEP_ENABLE; -#ifdef CONFIG_4xx - mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); -#endif -} - -int xmon(struct pt_regs *excp) -{ - struct pt_regs regs; - int msr, cmd; - - get_tb(stop_tb[smp_processor_id()]); - if (excp == NULL) { - asm volatile ("stw 0,0(%0)\n\ - lwz 0,0(1)\n\ - stw 0,4(%0)\n\ - stmw 2,8(%0)" : : "b" (®s)); - regs.nip = regs.link = ((unsigned long *)regs.gpr[1])[1]; - regs.msr = get_msr(); - regs.ctr = get_ctr(); - regs.xer = get_xer(); - regs.ccr = get_cr(); - regs.trap = 0; - excp = ®s; - } - - msr = get_msr(); - set_msr(msr & ~0x8000); /* disable interrupts */ - xmon_regs[smp_processor_id()] = excp; - xmon_enter(); - excprint(excp); -#ifdef CONFIG_SMP - if (test_and_set_bit(smp_processor_id(), &cpus_in_xmon)) - for (;;) - ; - while (test_and_set_bit(0, &got_xmon)) { - if (take_xmon == smp_processor_id()) { - take_xmon = -1; - break; - } - } - /* - * XXX: breakpoints are removed while any cpu is in xmon - */ -#endif /* CONFIG_SMP */ - remove_bpts(); - cmd = cmds(excp); - if (cmd == 's') { - xmon_trace[smp_processor_id()] = SSTEP; - xmon_enable_sstep(excp); - } else if (at_breakpoint(excp->nip)) { - xmon_trace[smp_processor_id()] = BRSTEP; - xmon_enable_sstep(excp); - } else { - xmon_trace[smp_processor_id()] = 0; - insert_bpts(); - } - xmon_leave(); - xmon_regs[smp_processor_id()] = NULL; -#ifdef CONFIG_SMP - clear_bit(0, &got_xmon); - clear_bit(smp_processor_id(), &cpus_in_xmon); -#endif /* CONFIG_SMP */ - set_msr(msr); /* restore interrupt enable */ - get_tb(start_tb[smp_processor_id()]); - - return cmd != 'X'; -} - -irqreturn_t -xmon_irq(int irq, void *d, struct pt_regs *regs) -{ - unsigned long flags; - local_irq_save(flags); - printf("Keyboard interrupt\n"); - xmon(regs); - local_irq_restore(flags); - return IRQ_HANDLED; -} - -int -xmon_bpt(struct pt_regs *regs) -{ - struct bpt *bp; - - bp = at_breakpoint(regs->nip); - if (!bp) - return 0; - if (bp->count) { - --bp->count; - remove_bpts(); - excprint(regs); - xmon_trace[smp_processor_id()] = BRSTEP; - xmon_enable_sstep(regs); - } else { - xmon(regs); - } - return 1; -} - -int -xmon_sstep(struct pt_regs *regs) -{ - if (!xmon_trace[smp_processor_id()]) - return 0; - if (xmon_trace[smp_processor_id()] == BRSTEP) { - xmon_trace[smp_processor_id()] = 0; - insert_bpts(); - } else { - xmon(regs); - } - return 1; -} - -int -xmon_dabr_match(struct pt_regs *regs) -{ - if (dabr.enabled && dabr.count) { - --dabr.count; - remove_bpts(); - excprint(regs); - xmon_trace[smp_processor_id()] = BRSTEP; - regs->msr |= 0x400; - } else { - dabr.instr = regs->nip; - xmon(regs); - } - return 1; -} - -int -xmon_iabr_match(struct pt_regs *regs) -{ - if (iabr.enabled && iabr.count) { - --iabr.count; - remove_bpts(); - excprint(regs); - xmon_trace[smp_processor_id()] = BRSTEP; - regs->msr |= 0x400; - } else { - xmon(regs); - } - return 1; -} - -static struct bpt * -at_breakpoint(unsigned pc) -{ - int i; - struct bpt *bp; - - if (dabr.enabled && pc == dabr.instr) - return &dabr; - if (iabr.enabled && pc == iabr.address) - return &iabr; - bp = bpts; - for (i = 0; i < NBPTS; ++i, ++bp) - if (bp->enabled && pc == bp->address) - return bp; - return NULL; -} - -static void -insert_bpts(void) -{ - int i; - struct bpt *bp; - - bp = bpts; - for (i = 0; i < NBPTS; ++i, ++bp) { - if (!bp->enabled) - continue; - if (mread(bp->address, &bp->instr, 4) != 4 - || mwrite(bp->address, &bpinstr, 4) != 4) { - printf("Couldn't insert breakpoint at %x, disabling\n", - bp->address); - bp->enabled = 0; - } - store_inst((void *) bp->address); - } -#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx)) - if (dabr.enabled) - set_dabr(dabr.address); - if (iabr.enabled) - set_iabr(iabr.address); -#endif -} - -static void -remove_bpts(void) -{ - int i; - struct bpt *bp; - unsigned instr; - -#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx)) - set_dabr(0); - set_iabr(0); -#endif - bp = bpts; - for (i = 0; i < NBPTS; ++i, ++bp) { - if (!bp->enabled) - continue; - if (mread(bp->address, &instr, 4) == 4 - && instr == bpinstr - && mwrite(bp->address, &bp->instr, 4) != 4) - printf("Couldn't remove breakpoint at %x\n", - bp->address); - store_inst((void *) bp->address); - } -} - -static char *last_cmd; - -/* Command interpreting routine */ -static int -cmds(struct pt_regs *excp) -{ - int cmd; - - last_cmd = NULL; - for(;;) { -#ifdef CONFIG_SMP - printf("%d:", smp_processor_id()); -#endif /* CONFIG_SMP */ - printf("mon> "); - fflush(stdout); - flush_input(); - termch = 0; - cmd = skipbl(); - if( cmd == '\n' ) { - if (last_cmd == NULL) - continue; - take_input(last_cmd); - last_cmd = NULL; - cmd = inchar(); - } - switch (cmd) { - case 'm': - cmd = inchar(); - switch (cmd) { - case 'm': - case 's': - case 'd': - memops(cmd); - break; - case 'l': - memlocate(); - break; - case 'z': - memzcan(); - break; - default: - termch = cmd; - memex(); - } - break; - case 'd': - dump(); - break; - case 'l': - symbol_lookup(); - break; - case 'r': - if (excp != NULL) - prregs(excp); /* print regs */ - break; - case 'e': - if (excp == NULL) - printf("No exception information\n"); - else - excprint(excp); - break; - case 'S': - super_regs(); - break; - case 't': - backtrace(excp); - break; - case 'f': - cacheflush(); - break; - case 'h': - dump_hash_table(); - break; - case 's': - case 'x': - case EOF: - return cmd; - case '?': - printf(help_string); - break; - default: - printf("Unrecognized command: "); - if( ' ' < cmd && cmd <= '~' ) - putchar(cmd); - else - printf("\\x%x", cmd); - printf(" (type ? for help)\n"); - break; - case 'b': - bpt_cmds(); - break; - case 'C': - csum(); - break; -#ifdef CONFIG_SMP - case 'c': - cpu_cmd(); - break; -#endif /* CONFIG_SMP */ - case 'z': - bootcmds(); - break; - case 'p': - proccall(); - break; - case 'T': - printtime(); - break; - } - } -} - -extern unsigned tb_to_us; - -#define mulhwu(x,y) \ -({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) - -static void printtime(void) -{ - unsigned int delta; - - delta = stop_tb[smp_processor_id()][1] - - start_tb[smp_processor_id()][1]; - delta = mulhwu(tb_to_us, delta); - printf("%u.%06u seconds\n", delta / 1000000, delta % 1000000); -} - -static void bootcmds(void) -{ - int cmd; - - cmd = inchar(); - if (cmd == 'r') - ppc_md.restart(NULL); - else if (cmd == 'h') - ppc_md.halt(); - else if (cmd == 'p') - ppc_md.power_off(); -} - -#ifdef CONFIG_SMP -static void cpu_cmd(void) -{ - unsigned cpu; - int timeout; - int cmd; - - cmd = inchar(); - if (cmd == 'i') { - /* interrupt other cpu(s) */ - cpu = MSG_ALL_BUT_SELF; - if (scanhex(&cpu)) - smp_send_xmon_break(cpu); - return; - } - termch = cmd; - if (!scanhex(&cpu)) { - /* print cpus waiting or in xmon */ - printf("cpus stopped:"); - for (cpu = 0; cpu < NR_CPUS; ++cpu) { - if (test_bit(cpu, &cpus_in_xmon)) { - printf(" %d", cpu); - if (cpu == smp_processor_id()) - printf("*", cpu); - } - } - printf("\n"); - return; - } - /* try to switch to cpu specified */ - take_xmon = cpu; - timeout = 10000000; - while (take_xmon >= 0) { - if (--timeout == 0) { - /* yes there's a race here */ - take_xmon = -1; - printf("cpu %u didn't take control\n", cpu); - return; - } - } - /* now have to wait to be given control back */ - while (test_and_set_bit(0, &got_xmon)) { - if (take_xmon == smp_processor_id()) { - take_xmon = -1; - break; - } - } -} -#endif /* CONFIG_SMP */ - - -static unsigned short fcstab[256] = { - 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, - 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, - 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, - 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, - 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, - 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, - 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, - 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, - 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, - 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, - 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, - 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, - 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, - 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, - 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, - 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, - 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, - 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, - 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, - 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, - 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, - 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, - 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, - 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, - 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, - 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, - 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, - 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, - 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, - 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, - 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, - 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 -}; - -#define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) - -static void -csum(void) -{ - unsigned int i; - unsigned short fcs; - unsigned char v; - - if (!scanhex(&adrs)) - return; - if (!scanhex(&ncsum)) - return; - fcs = 0xffff; - for (i = 0; i < ncsum; ++i) { - if (mread(adrs+i, &v, 1) == 0) { - printf("csum stopped at %x\n", adrs+i); - break; - } - fcs = FCS(fcs, v); - } - printf("%x\n", fcs); -} - -static void -bpt_cmds(void) -{ - int cmd; - unsigned a; - int mode, i; - struct bpt *bp; - - cmd = inchar(); - switch (cmd) { -#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx)) - case 'd': - mode = 7; - cmd = inchar(); - if (cmd == 'r') - mode = 5; - else if (cmd == 'w') - mode = 6; - else - termch = cmd; - cmd = inchar(); - if (cmd == 'p') - mode &= ~4; - else - termch = cmd; - dabr.address = 0; - dabr.count = 0; - dabr.enabled = scanhex(&dabr.address); - scanhex(&dabr.count); - if (dabr.enabled) - dabr.address = (dabr.address & ~7) | mode; - break; - case 'i': - cmd = inchar(); - if (cmd == 'p') - mode = 2; - else - mode = 3; - iabr.address = 0; - iabr.count = 0; - iabr.enabled = scanhex(&iabr.address); - if (iabr.enabled) - iabr.address |= mode; - scanhex(&iabr.count); - break; -#endif - case 'c': - if (!scanhex(&a)) { - /* clear all breakpoints */ - for (i = 0; i < NBPTS; ++i) - bpts[i].enabled = 0; - iabr.enabled = 0; - dabr.enabled = 0; - printf("All breakpoints cleared\n"); - } else { - bp = at_breakpoint(a); - if (bp == 0) { - printf("No breakpoint at %x\n", a); - } else { - bp->enabled = 0; - } - } - break; - default: - termch = cmd; - if (!scanhex(&a)) { - /* print all breakpoints */ - printf("type address count\n"); - if (dabr.enabled) { - printf("data %.8x %8x [", dabr.address & ~7, - dabr.count); - if (dabr.address & 1) - printf("r"); - if (dabr.address & 2) - printf("w"); - if (!(dabr.address & 4)) - printf("p"); - printf("]\n"); - } - if (iabr.enabled) - printf("inst %.8x %8x\n", iabr.address & ~3, - iabr.count); - for (bp = bpts; bp < &bpts[NBPTS]; ++bp) - if (bp->enabled) - printf("trap %.8x %8x\n", bp->address, - bp->count); - break; - } - bp = at_breakpoint(a); - if (bp == 0) { - for (bp = bpts; bp < &bpts[NBPTS]; ++bp) - if (!bp->enabled) - break; - if (bp >= &bpts[NBPTS]) { - printf("Sorry, no free breakpoints\n"); - break; - } - } - bp->enabled = 1; - bp->address = a; - bp->count = 0; - scanhex(&bp->count); - break; - } -} - -static void -backtrace(struct pt_regs *excp) -{ - unsigned sp; - unsigned stack[2]; - struct pt_regs regs; - extern char ret_from_except, ret_from_except_full, ret_from_syscall; - - printf("backtrace:\n"); - - if (excp != NULL) - sp = excp->gpr[1]; - else - sp = getsp(); - scanhex(&sp); - scannl(); - for (; sp != 0; sp = stack[0]) { - if (mread(sp, stack, sizeof(stack)) != sizeof(stack)) - break; - printf("[%.8lx] ", stack[0]); - xmon_print_symbol(stack[1], " ", "\n"); - if (stack[1] == (unsigned) &ret_from_except - || stack[1] == (unsigned) &ret_from_except_full - || stack[1] == (unsigned) &ret_from_syscall) { - if (mread(sp+16, ®s, sizeof(regs)) != sizeof(regs)) - break; - printf("exception:%x [%x] %x\n", regs.trap, sp+16, - regs.nip); - sp = regs.gpr[1]; - if (mread(sp, stack, sizeof(stack)) != sizeof(stack)) - break; - } - } -} - -int -getsp(void) -{ - int x; - - asm("mr %0,1" : "=r" (x) :); - return x; -} - -void -excprint(struct pt_regs *fp) -{ - int trap; - -#ifdef CONFIG_SMP - printf("cpu %d: ", smp_processor_id()); -#endif /* CONFIG_SMP */ - printf("vector: %x at pc=", fp->trap); - xmon_print_symbol(fp->nip, ": ", ", lr="); - xmon_print_symbol(fp->link, ": ", "\n"); - printf("msr = %x, sp = %x [%x]\n", fp->msr, fp->gpr[1], fp); - trap = TRAP(fp); - if (trap == 0x300 || trap == 0x600) - printf("dar = %x, dsisr = %x\n", fp->dar, fp->dsisr); - if (current) - printf("current = %x, pid = %d, comm = %s\n", - current, current->pid, current->comm); -} - -void -prregs(struct pt_regs *fp) -{ - int n; - unsigned base; - - if (scanhex(&base)) - fp = (struct pt_regs *) base; - for (n = 0; n < 32; ++n) { - printf("R%.2d = %.8x%s", n, fp->gpr[n], - (n & 3) == 3? "\n": " "); - if (n == 12 && !FULL_REGS(fp)) { - printf("\n"); - break; - } - } - printf("pc = %.8x msr = %.8x lr = %.8x cr = %.8x\n", - fp->nip, fp->msr, fp->link, fp->ccr); - printf("ctr = %.8x xer = %.8x trap = %4x\n", - fp->ctr, fp->xer, fp->trap); -} - -void -cacheflush(void) -{ - int cmd; - unsigned nflush; - - cmd = inchar(); - if (cmd != 'i') - termch = cmd; - scanhex(&adrs); - if (termch != '\n') - termch = 0; - nflush = 1; - scanhex(&nflush); - nflush = (nflush + 31) / 32; - if (cmd != 'i') { - for (; nflush > 0; --nflush, adrs += 0x20) - cflush((void *) adrs); - } else { - for (; nflush > 0; --nflush, adrs += 0x20) - cinval((void *) adrs); - } -} - -unsigned int -read_spr(int n) -{ - unsigned int instrs[2]; - int (*code)(void); - - instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6); - instrs[1] = 0x4e800020; - store_inst(instrs); - store_inst(instrs+1); - code = (int (*)(void)) instrs; - return code(); -} - -void -write_spr(int n, unsigned int val) -{ - unsigned int instrs[2]; - int (*code)(unsigned int); - - instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6); - instrs[1] = 0x4e800020; - store_inst(instrs); - store_inst(instrs+1); - code = (int (*)(unsigned int)) instrs; - code(val); -} - -static unsigned int regno; -extern char exc_prolog; -extern char dec_exc; - -void -super_regs(void) -{ - int i, cmd; - unsigned val; - - cmd = skipbl(); - if (cmd == '\n') { - printf("msr = %x, pvr = %x\n", get_msr(), get_pvr()); - printf("sprg0-3 = %x %x %x %x\n", get_sprg0(), get_sprg1(), - get_sprg2(), get_sprg3()); - printf("srr0 = %x, srr1 = %x\n", get_srr0(), get_srr1()); -#ifdef CONFIG_PPC_STD_MMU - printf("sr0-15 ="); - for (i = 0; i < 16; ++i) - printf(" %x", get_sr(i)); - printf("\n"); -#endif - asm("mr %0,1" : "=r" (i) :); - printf("sp = %x ", i); - asm("mr %0,2" : "=r" (i) :); - printf("toc = %x\n", i); - return; - } - - scanhex(®no); - switch (cmd) { - case 'w': - val = read_spr(regno); - scanhex(&val); - write_spr(regno, val); - /* fall through */ - case 'r': - printf("spr %x = %x\n", regno, read_spr(regno)); - break; - case 's': - val = get_sr(regno); - scanhex(&val); - set_sr(regno, val); - break; - case 'm': - val = get_msr(); - scanhex(&val); - set_msr(val); - break; - } - scannl(); -} - -#ifndef CONFIG_PPC_STD_MMU -static void -dump_hash_table(void) -{ - printf("This CPU doesn't have a hash table.\n"); -} -#else - -static void -dump_hash_table_seg(unsigned seg, unsigned start, unsigned end) -{ - extern void *Hash; - extern unsigned long Hash_size; - unsigned *htab = Hash; - unsigned hsize = Hash_size; - unsigned v, hmask, va, last_va = 0; - int found, last_found, i; - unsigned *hg, w1, last_w2 = 0, last_va0 = 0; - - last_found = 0; - hmask = hsize / 64 - 1; - va = start; - start = (start >> 12) & 0xffff; - end = (end >> 12) & 0xffff; - for (v = start; v < end; ++v) { - found = 0; - hg = htab + (((v ^ seg) & hmask) * 16); - w1 = 0x80000000 | (seg << 7) | (v >> 10); - for (i = 0; i < 8; ++i, hg += 2) { - if (*hg == w1) { - found = 1; - break; - } - } - if (!found) { - w1 ^= 0x40; - hg = htab + ((~(v ^ seg) & hmask) * 16); - for (i = 0; i < 8; ++i, hg += 2) { - if (*hg == w1) { - found = 1; - break; - } - } - } - if (!(last_found && found && (hg[1] & ~0x180) == last_w2 + 4096)) { - if (last_found) { - if (last_va != last_va0) - printf(" ... %x", last_va); - printf("\n"); - } - if (found) { - printf("%x to %x", va, hg[1]); - last_va0 = va; - } - last_found = found; - } - if (found) { - last_w2 = hg[1] & ~0x180; - last_va = va; - } - va += 4096; - } - if (last_found) - printf(" ... %x\n", last_va); -} - -static unsigned hash_ctx; -static unsigned hash_start; -static unsigned hash_end; - -static void -dump_hash_table(void) -{ - int seg; - unsigned seg_start, seg_end; - - hash_ctx = 0; - hash_start = 0; - hash_end = 0xfffff000; - scanhex(&hash_ctx); - scanhex(&hash_start); - scanhex(&hash_end); - printf("Mappings for context %x\n", hash_ctx); - seg_start = hash_start; - for (seg = hash_start >> 28; seg <= hash_end >> 28; ++seg) { - seg_end = (seg << 28) | 0x0ffff000; - if (seg_end > hash_end) - seg_end = hash_end; - dump_hash_table_seg((hash_ctx << 4) + (seg * 0x111), - seg_start, seg_end); - seg_start = seg_end + 0x1000; - } -} -#endif /* CONFIG_PPC_STD_MMU */ - -/* - * Stuff for reading and writing memory safely - */ - -int -mread(unsigned adrs, void *buf, int size) -{ - volatile int n; - char *p, *q; - - n = 0; - if( setjmp(bus_error_jmp) == 0 ){ - debugger_fault_handler = handle_fault; - sync(); - p = (char *) adrs; - q = (char *) buf; - switch (size) { - case 2: *(short *)q = *(short *)p; break; - case 4: *(int *)q = *(int *)p; break; - default: - for( ; n < size; ++n ) { - *q++ = *p++; - sync(); - } - } - sync(); - /* wait a little while to see if we get a machine check */ - __delay(200); - n = size; - } - debugger_fault_handler = NULL; - return n; -} - -int -mwrite(unsigned adrs, void *buf, int size) -{ - volatile int n; - char *p, *q; - - n = 0; - if( setjmp(bus_error_jmp) == 0 ){ - debugger_fault_handler = handle_fault; - sync(); - p = (char *) adrs; - q = (char *) buf; - switch (size) { - case 2: *(short *)p = *(short *)q; break; - case 4: *(int *)p = *(int *)q; break; - default: - for( ; n < size; ++n ) { - *p++ = *q++; - sync(); - } - } - sync(); - n = size; - } else { - printf("*** Error writing address %x\n", adrs + n); - } - debugger_fault_handler = NULL; - return n; -} - -static int fault_type; -static int fault_except; -static char *fault_chars[] = { "--", "**", "##" }; - -static void -handle_fault(struct pt_regs *regs) -{ - fault_except = TRAP(regs); - fault_type = TRAP(regs) == 0x200? 0: TRAP(regs) == 0x300? 1: 2; - longjmp(bus_error_jmp, 1); -} - -#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) - -void -byterev(unsigned char *val, int size) -{ - int t; - - switch (size) { - case 2: - SWAP(val[0], val[1], t); - break; - case 4: - SWAP(val[0], val[3], t); - SWAP(val[1], val[2], t); - break; - } -} - -static int brev; -static int mnoread; - -void -memex(void) -{ - int cmd, inc, i, nslash; - unsigned n; - unsigned char val[4]; - - last_cmd = "m\n"; - scanhex(&adrs); - while ((cmd = skipbl()) != '\n') { - switch( cmd ){ - case 'b': size = 1; break; - case 'w': size = 2; break; - case 'l': size = 4; break; - case 'r': brev = !brev; break; - case 'n': mnoread = 1; break; - case '.': mnoread = 0; break; - } - } - if( size <= 0 ) - size = 1; - else if( size > 4 ) - size = 4; - for(;;){ - if (!mnoread) - n = mread(adrs, val, size); - printf("%.8x%c", adrs, brev? 'r': ' '); - if (!mnoread) { - if (brev) - byterev(val, size); - putchar(' '); - for (i = 0; i < n; ++i) - printf("%.2x", val[i]); - for (; i < size; ++i) - printf("%s", fault_chars[fault_type]); - } - putchar(' '); - inc = size; - nslash = 0; - for(;;){ - if( scanhex(&n) ){ - for (i = 0; i < size; ++i) - val[i] = n >> (i * 8); - if (!brev) - byterev(val, size); - mwrite(adrs, val, size); - inc = size; - } - cmd = skipbl(); - if (cmd == '\n') - break; - inc = 0; - switch (cmd) { - case '\'': - for(;;){ - n = inchar(); - if( n == '\\' ) - n = bsesc(); - else if( n == '\'' ) - break; - for (i = 0; i < size; ++i) - val[i] = n >> (i * 8); - if (!brev) - byterev(val, size); - mwrite(adrs, val, size); - adrs += size; - } - adrs -= size; - inc = size; - break; - case ',': - adrs += size; - break; - case '.': - mnoread = 0; - break; - case ';': - break; - case 'x': - case EOF: - scannl(); - return; - case 'b': - case 'v': - size = 1; - break; - case 'w': - size = 2; - break; - case 'l': - size = 4; - break; - case '^': - adrs -= size; - break; - break; - case '/': - if (nslash > 0) - adrs -= 1 << nslash; - else - nslash = 0; - nslash += 4; - adrs += 1 << nslash; - break; - case '\\': - if (nslash < 0) - adrs += 1 << -nslash; - else - nslash = 0; - nslash -= 4; - adrs -= 1 << -nslash; - break; - case 'm': - scanhex(&adrs); - break; - case 'n': - mnoread = 1; - break; - case 'r': - brev = !brev; - break; - case '<': - n = size; - scanhex(&n); - adrs -= n; - break; - case '>': - n = size; - scanhex(&n); - adrs += n; - break; - } - } - adrs += inc; - } -} - -int -bsesc(void) -{ - int c; - - c = inchar(); - switch( c ){ - case 'n': c = '\n'; break; - case 'r': c = '\r'; break; - case 'b': c = '\b'; break; - case 't': c = '\t'; break; - } - return c; -} - -void -dump(void) -{ - int c; - - c = inchar(); - if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n') - termch = c; - scanhex(&adrs); - if( termch != '\n') - termch = 0; - if( c == 'i' ){ - scanhex(&nidump); - if( nidump == 0 ) - nidump = 16; - adrs += ppc_inst_dump(adrs, nidump); - last_cmd = "di\n"; - } else { - scanhex(&ndump); - if( ndump == 0 ) - ndump = 64; - prdump(adrs, ndump); - adrs += ndump; - last_cmd = "d\n"; - } -} - -void -prdump(unsigned adrs, int ndump) -{ - register int n, m, c, r, nr; - unsigned char temp[16]; - - for( n = ndump; n > 0; ){ - printf("%.8x", adrs); - putchar(' '); - r = n < 16? n: 16; - nr = mread(adrs, temp, r); - adrs += nr; - for( m = 0; m < r; ++m ){ - putchar((m & 3) == 0 && m > 0? '.': ' '); - if( m < nr ) - printf("%.2x", temp[m]); - else - printf("%s", fault_chars[fault_type]); - } - for(; m < 16; ++m ) - printf(" "); - printf(" |"); - for( m = 0; m < r; ++m ){ - if( m < nr ){ - c = temp[m]; - putchar(' ' <= c && c <= '~'? c: '.'); - } else - putchar(' '); - } - n -= r; - for(; m < 16; ++m ) - putchar(' '); - printf("|\n"); - if( nr < r ) - break; - } -} - -int -ppc_inst_dump(unsigned adr, int count) -{ - int nr, dotted; - unsigned first_adr; - unsigned long inst, last_inst = 0; - unsigned char val[4]; - - dotted = 0; - for (first_adr = adr; count > 0; --count, adr += 4){ - nr = mread(adr, val, 4); - if( nr == 0 ){ - const char *x = fault_chars[fault_type]; - printf("%.8x %s%s%s%s\n", adr, x, x, x, x); - break; - } - inst = GETWORD(val); - if (adr > first_adr && inst == last_inst) { - if (!dotted) { - printf(" ...\n"); - dotted = 1; - } - continue; - } - dotted = 0; - last_inst = inst; - printf("%.8x ", adr); - printf("%.8x\t", inst); - print_insn_big_powerpc(stdout, inst, adr); /* always returns 4 */ - printf("\n"); - } - return adr - first_adr; -} - -void -print_address(unsigned addr) -{ - printf("0x%x", addr); -} - -/* - * Memory operations - move, set, print differences - */ -static unsigned mdest; /* destination address */ -static unsigned msrc; /* source address */ -static unsigned mval; /* byte value to set memory to */ -static unsigned mcount; /* # bytes to affect */ -static unsigned mdiffs; /* max # differences to print */ - -void -memops(int cmd) -{ - scanhex(&mdest); - if( termch != '\n' ) - termch = 0; - scanhex(cmd == 's'? &mval: &msrc); - if( termch != '\n' ) - termch = 0; - scanhex(&mcount); - switch( cmd ){ - case 'm': - memmove((void *)mdest, (void *)msrc, mcount); - break; - case 's': - memset((void *)mdest, mval, mcount); - break; - case 'd': - if( termch != '\n' ) - termch = 0; - scanhex(&mdiffs); - memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs); - break; - } -} - -void -memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) -{ - unsigned n, prt; - - prt = 0; - for( n = nb; n > 0; --n ) - if( *p1++ != *p2++ ) - if( ++prt <= maxpr ) - printf("%.8x %.2x # %.8x %.2x\n", (unsigned)p1 - 1, - p1[-1], (unsigned)p2 - 1, p2[-1]); - if( prt > maxpr ) - printf("Total of %d differences\n", prt); -} - -static unsigned mend; -static unsigned mask; - -void -memlocate(void) -{ - unsigned a, n; - unsigned char val[4]; - - last_cmd = "ml"; - scanhex(&mdest); - if (termch != '\n') { - termch = 0; - scanhex(&mend); - if (termch != '\n') { - termch = 0; - scanhex(&mval); - mask = ~0; - if (termch != '\n') termch = 0; - scanhex(&mask); - } - } - n = 0; - for (a = mdest; a < mend; a += 4) { - if (mread(a, val, 4) == 4 - && ((GETWORD(val) ^ mval) & mask) == 0) { - printf("%.8x: %.8x\n", a, GETWORD(val)); - if (++n >= 10) - break; - } - } -} - -static unsigned mskip = 0x1000; -static unsigned mlim = 0xffffffff; - -void -memzcan(void) -{ - unsigned char v; - unsigned a; - int ok, ook; - - scanhex(&mdest); - if (termch != '\n') termch = 0; - scanhex(&mskip); - if (termch != '\n') termch = 0; - scanhex(&mlim); - ook = 0; - for (a = mdest; a < mlim; a += mskip) { - ok = mread(a, &v, 1); - if (ok && !ook) { - printf("%.8x .. ", a); - fflush(stdout); - } else if (!ok && ook) - printf("%.8x\n", a - mskip); - ook = ok; - if (a + mskip < a) - break; - } - if (ook) - printf("%.8x\n", a - mskip); -} - -void proccall(void) -{ - unsigned int args[8]; - unsigned int ret; - int i; - typedef unsigned int (*callfunc_t)(unsigned int, unsigned int, - unsigned int, unsigned int, unsigned int, - unsigned int, unsigned int, unsigned int); - callfunc_t func; - - scanhex(&adrs); - if (termch != '\n') - termch = 0; - for (i = 0; i < 8; ++i) - args[i] = 0; - for (i = 0; i < 8; ++i) { - if (!scanhex(&args[i]) || termch == '\n') - break; - termch = 0; - } - func = (callfunc_t) adrs; - ret = 0; - if (setjmp(bus_error_jmp) == 0) { - debugger_fault_handler = handle_fault; - sync(); - ret = func(args[0], args[1], args[2], args[3], - args[4], args[5], args[6], args[7]); - sync(); - printf("return value is %x\n", ret); - } else { - printf("*** %x exception occurred\n", fault_except); - } - debugger_fault_handler = NULL; -} - -/* Input scanning routines */ -int -skipbl(void) -{ - int c; - - if( termch != 0 ){ - c = termch; - termch = 0; - } else - c = inchar(); - while( c == ' ' || c == '\t' ) - c = inchar(); - return c; -} - -#define N_PTREGS 44 -static char *regnames[N_PTREGS] = { - "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", - "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", "mq", - "trap", "dar", "dsisr", "res" -}; - -int -scanhex(unsigned *vp) -{ - int c, d; - unsigned v; - - c = skipbl(); - if (c == '%') { - /* parse register name */ - char regname[8]; - int i; - - for (i = 0; i < sizeof(regname) - 1; ++i) { - c = inchar(); - if (!isalnum(c)) { - termch = c; - break; - } - regname[i] = c; - } - regname[i] = 0; - for (i = 0; i < N_PTREGS; ++i) { - if (strcmp(regnames[i], regname) == 0) { - unsigned *rp = (unsigned *) - xmon_regs[smp_processor_id()]; - if (rp == NULL) { - printf("regs not available\n"); - return 0; - } - *vp = rp[i]; - return 1; - } - } - printf("invalid register name '%%%s'\n", regname); - return 0; - } else if (c == '$') { - static char symname[128]; - int i; - for (i=0; i<63; i++) { - c = inchar(); - if (isspace(c)) { - termch = c; - break; - } - symname[i] = c; - } - symname[i++] = 0; - *vp = 0; - if (setjmp(bus_error_jmp) == 0) { - debugger_fault_handler = handle_fault; - sync(); - *vp = kallsyms_lookup_name(symname); - sync(); - } - debugger_fault_handler = NULL; - if (!(*vp)) { - printf("unknown symbol\n"); - return 0; - } - return 1; - } - - d = hexdigit(c); - if( d == EOF ){ - termch = c; - return 0; - } - v = 0; - do { - v = (v << 4) + d; - c = inchar(); - d = hexdigit(c); - } while( d != EOF ); - termch = c; - *vp = v; - return 1; -} - -void -scannl(void) -{ - int c; - - c = termch; - termch = 0; - while( c != '\n' ) - c = inchar(); -} - -int hexdigit(int c) -{ - if( '0' <= c && c <= '9' ) - return c - '0'; - if( 'A' <= c && c <= 'F' ) - return c - ('A' - 10); - if( 'a' <= c && c <= 'f' ) - return c - ('a' - 10); - return EOF; -} - -void -getstring(char *s, int size) -{ - int c; - - c = skipbl(); - do { - if( size > 1 ){ - *s++ = c; - --size; - } - c = inchar(); - } while( c != ' ' && c != '\t' && c != '\n' ); - termch = c; - *s = 0; -} - -static char line[256]; -static char *lineptr; - -void -flush_input(void) -{ - lineptr = NULL; -} - -int -inchar(void) -{ - if (lineptr == NULL || *lineptr == 0) { - if (fgets(line, sizeof(line), stdin) == NULL) { - lineptr = NULL; - return EOF; - } - lineptr = line; - } - return *lineptr++; -} - -void -take_input(char *str) -{ - lineptr = str; -} - -static void -symbol_lookup(void) -{ - int type = inchar(); - unsigned addr; - static char tmp[128]; - - switch (type) { - case 'a': - if (scanhex(&addr)) - xmon_print_symbol(addr, ": ", "\n"); - termch = 0; - break; - case 's': - getstring(tmp, 64); - if (setjmp(bus_error_jmp) == 0) { - debugger_fault_handler = handle_fault; - sync(); - addr = kallsyms_lookup_name(tmp); - if (addr) - printf("%s: %lx\n", tmp, addr); - else - printf("Symbol '%s' not found.\n", tmp); - sync(); - } - debugger_fault_handler = NULL; - termch = 0; - break; - } -} - diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 107e492cb47efa8fab159a8714d89cdcac29d5ae..2ed88122be9319ea735da3b7b7a6cfd8e6700f67 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -146,6 +146,7 @@ config MATHEMU config COMPAT bool "Kernel support for 31 bit emulation" depends on 64BIT + select COMPAT_BINFMT_ELF help Select this option if you want to enable your system kernel to handle system-calls from ELF binaries for 31 bit ESA. This option @@ -288,7 +289,7 @@ config WARN_STACK_SIZE int "Maximum frame size considered safe (128-2048)" range 128 2048 depends on WARN_STACK - default "256" + default "2048" help This allows you to specify the maximum frame size a function may have without the compiler complaining about it. @@ -312,6 +313,10 @@ config ARCH_SPARSEMEM_DEFAULT config ARCH_SELECT_MEMORY_MODEL def_bool y +config ARCH_ENABLE_MEMORY_HOTPLUG + def_bool y + depends on SPARSEMEM + source "mm/Kconfig" comment "I/O subsystem configuration" @@ -344,6 +349,22 @@ config QDIO_DEBUG If unsure, say N. +config CHSC_SCH + tristate "Support for CHSC subchannels" + help + This driver allows usage of CHSC subchannels. A CHSC subchannel + is usually present on LPAR only. + The driver creates a device /dev/chsc, which may be used to + obtain I/O configuration information about the machine and + to issue asynchronous chsc commands (DANGEROUS). + You will usually only want to use this interface on a special + LPAR designated for system management. + + To compile this driver as a module, choose M here: the + module will be called chsc_sch. + + If unsure, say N. + comment "Misc" config IPL @@ -544,6 +565,7 @@ bool "s390 guest support (EXPERIMENTAL)" depends on 64BIT && EXPERIMENTAL select VIRTIO select VIRTIO_RING + select VIRTIO_CONSOLE help Select this option if you want to run the kernel under s390 linux endmenu diff --git a/arch/s390/appldata/appldata.h b/arch/s390/appldata/appldata.h index db3ae8505103812a49b0d7e5a675251ec005f928..17a2636fec0a4a2395b5ba67496c504d3c50b550 100644 --- a/arch/s390/appldata/appldata.h +++ b/arch/s390/appldata/appldata.h @@ -3,13 +3,11 @@ * * Definitions and interface for Linux - z/VM Monitor Stream. * - * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. + * Copyright IBM Corp. 2003, 2008 * * Author: Gerald Schaefer */ -//#define APPLDATA_DEBUG /* Debug messages on/off */ - #define APPLDATA_MAX_REC_SIZE 4024 /* Maximum size of the */ /* data buffer */ #define APPLDATA_MAX_PROCS 100 @@ -32,12 +30,6 @@ #define P_ERROR(x...) printk(KERN_ERR MY_PRINT_NAME " error: " x) #define P_WARNING(x...) printk(KERN_WARNING MY_PRINT_NAME " status: " x) -#ifdef APPLDATA_DEBUG -#define P_DEBUG(x...) printk(KERN_DEBUG MY_PRINT_NAME " debug: " x) -#else -#define P_DEBUG(x...) do {} while (0) -#endif - struct appldata_ops { struct list_head list; struct ctl_table_header *sysctl_header; diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c index ad40729bec3d9a062925b2b2db3bf7d990d0ea3e..a7f8979fb92584bcf45ef94001557b2fe02d9674 100644 --- a/arch/s390/appldata/appldata_base.c +++ b/arch/s390/appldata/appldata_base.c @@ -5,7 +5,7 @@ * Exports appldata_register_ops() and appldata_unregister_ops() for the * data gathering modules. * - * Copyright (C) 2003,2006 IBM Corporation, IBM Deutschland Entwicklung GmbH. + * Copyright IBM Corp. 2003, 2008 * * Author: Gerald Schaefer */ @@ -108,9 +108,6 @@ static LIST_HEAD(appldata_ops_list); */ static void appldata_timer_function(unsigned long data) { - P_DEBUG(" -= Timer =-\n"); - P_DEBUG("CPU: %i, expire_count: %i\n", smp_processor_id(), - atomic_read(&appldata_expire_count)); if (atomic_dec_and_test(&appldata_expire_count)) { atomic_set(&appldata_expire_count, num_online_cpus()); queue_work(appldata_wq, (struct work_struct *) data); @@ -128,14 +125,11 @@ static void appldata_work_fn(struct work_struct *work) struct appldata_ops *ops; int i; - P_DEBUG(" -= Work Queue =-\n"); i = 0; get_online_cpus(); spin_lock(&appldata_ops_lock); list_for_each(lh, &appldata_ops_list) { ops = list_entry(lh, struct appldata_ops, list); - P_DEBUG("list_for_each loop: %i) active = %u, name = %s\n", - ++i, ops->active, ops->name); if (ops->active == 1) { ops->callback(ops->data); } @@ -209,10 +203,9 @@ __appldata_vtimer_setup(int cmd) per_cpu(appldata_timer, i).expires = per_cpu_interval; smp_call_function_single(i, add_virt_timer_periodic, &per_cpu(appldata_timer, i), - 0, 1); + 1); } appldata_timer_active = 1; - P_INFO("Monitoring timer started.\n"); break; case APPLDATA_DEL_TIMER: for_each_online_cpu(i) @@ -221,7 +214,6 @@ __appldata_vtimer_setup(int cmd) break; appldata_timer_active = 0; atomic_set(&appldata_expire_count, num_online_cpus()); - P_INFO("Monitoring timer stopped.\n"); break; case APPLDATA_MOD_TIMER: per_cpu_interval = (u64) (appldata_interval*1000 / @@ -236,7 +228,7 @@ __appldata_vtimer_setup(int cmd) args.timer = &per_cpu(appldata_timer, i); args.expires = per_cpu_interval; smp_call_function_single(i, __appldata_mod_vtimer_wrap, - &args, 0, 1); + &args, 1); } } } @@ -313,10 +305,8 @@ appldata_interval_handler(ctl_table *ctl, int write, struct file *filp, } interval = 0; sscanf(buf, "%i", &interval); - if (interval <= 0) { - P_ERROR("Timer CPU interval has to be > 0!\n"); + if (interval <= 0) return -EINVAL; - } get_online_cpus(); spin_lock(&appldata_timer_lock); @@ -324,9 +314,6 @@ appldata_interval_handler(ctl_table *ctl, int write, struct file *filp, __appldata_vtimer_setup(APPLDATA_MOD_TIMER); spin_unlock(&appldata_timer_lock); put_online_cpus(); - - P_INFO("Monitoring CPU interval set to %u milliseconds.\n", - interval); out: *lenp = len; *ppos += len; @@ -406,23 +393,16 @@ appldata_generic_handler(ctl_table *ctl, int write, struct file *filp, P_ERROR("START DIAG 0xDC for %s failed, " "return code: %d\n", ops->name, rc); module_put(ops->owner); - } else { - P_INFO("Monitoring %s data enabled, " - "DIAG 0xDC started.\n", ops->name); + } else ops->active = 1; - } } else if ((buf[0] == '0') && (ops->active == 1)) { ops->active = 0; rc = appldata_diag(ops->record_nr, APPLDATA_STOP_REC, (unsigned long) ops->data, ops->size, ops->mod_lvl); - if (rc != 0) { + if (rc != 0) P_ERROR("STOP DIAG 0xDC for %s failed, " "return code: %d\n", ops->name, rc); - } else { - P_INFO("Monitoring %s data disabled, " - "DIAG 0xDC stopped.\n", ops->name); - } module_put(ops->owner); } spin_unlock(&appldata_ops_lock); @@ -468,7 +448,6 @@ int appldata_register_ops(struct appldata_ops *ops) ops->sysctl_header = register_sysctl_table(ops->ctl_table); if (!ops->sysctl_header) goto out; - P_INFO("%s-ops registered!\n", ops->name); return 0; out: spin_lock(&appldata_ops_lock); @@ -490,7 +469,6 @@ void appldata_unregister_ops(struct appldata_ops *ops) spin_unlock(&appldata_ops_lock); unregister_sysctl_table(ops->sysctl_header); kfree(ops->ctl_table); - P_INFO("%s-ops unregistered!\n", ops->name); } /********************** module-ops management **************************/ @@ -553,14 +531,9 @@ static int __init appldata_init(void) { int i; - P_DEBUG("sizeof(parameter_list) = %lu\n", - sizeof(struct appldata_parameter_list)); - appldata_wq = create_singlethread_workqueue("appldata"); - if (!appldata_wq) { - P_ERROR("Could not create work queue\n"); + if (!appldata_wq) return -ENOMEM; - } get_online_cpus(); for_each_online_cpu(i) @@ -571,8 +544,6 @@ static int __init appldata_init(void) register_hotcpu_notifier(&appldata_nb); appldata_sysctl_header = register_sysctl_table(appldata_dir_table); - - P_DEBUG("Base interface initialized.\n"); return 0; } @@ -584,7 +555,9 @@ EXPORT_SYMBOL_GPL(appldata_register_ops); EXPORT_SYMBOL_GPL(appldata_unregister_ops); EXPORT_SYMBOL_GPL(appldata_diag); +#ifdef CONFIG_SWAP EXPORT_SYMBOL_GPL(si_swapinfo); +#endif EXPORT_SYMBOL_GPL(nr_threads); EXPORT_SYMBOL_GPL(nr_running); EXPORT_SYMBOL_GPL(nr_iowait); diff --git a/arch/s390/appldata/appldata_mem.c b/arch/s390/appldata/appldata_mem.c index 51181ccdb87b255699a3857f24d0ddac80e45699..3ed56b7d1b2f3d1cf8b68eb274e9fab40b012080 100644 --- a/arch/s390/appldata/appldata_mem.c +++ b/arch/s390/appldata/appldata_mem.c @@ -14,14 +14,13 @@ #include #include #include -#include #include #include +#include #include "appldata.h" -#define MY_PRINT_NAME "appldata_mem" /* for debug messages, etc. */ #define P2K(x) ((x) << (PAGE_SHIFT - 10)) /* Converts #Pages to KB */ /* @@ -70,30 +69,6 @@ static struct appldata_mem_data { } __attribute__((packed)) appldata_mem_data; -static inline void appldata_debug_print(struct appldata_mem_data *mem_data) -{ - P_DEBUG("--- MEM - RECORD ---\n"); - P_DEBUG("pgpgin = %8lu KB\n", mem_data->pgpgin); - P_DEBUG("pgpgout = %8lu KB\n", mem_data->pgpgout); - P_DEBUG("pswpin = %8lu Pages\n", mem_data->pswpin); - P_DEBUG("pswpout = %8lu Pages\n", mem_data->pswpout); - P_DEBUG("pgalloc = %8lu \n", mem_data->pgalloc); - P_DEBUG("pgfault = %8lu \n", mem_data->pgfault); - P_DEBUG("pgmajfault = %8lu \n", mem_data->pgmajfault); - P_DEBUG("sharedram = %8lu KB\n", mem_data->sharedram); - P_DEBUG("totalram = %8lu KB\n", mem_data->totalram); - P_DEBUG("freeram = %8lu KB\n", mem_data->freeram); - P_DEBUG("totalhigh = %8lu KB\n", mem_data->totalhigh); - P_DEBUG("freehigh = %8lu KB\n", mem_data->freehigh); - P_DEBUG("bufferram = %8lu KB\n", mem_data->bufferram); - P_DEBUG("cached = %8lu KB\n", mem_data->cached); - P_DEBUG("totalswap = %8lu KB\n", mem_data->totalswap); - P_DEBUG("freeswap = %8lu KB\n", mem_data->freeswap); - P_DEBUG("sync_count_1 = %u\n", mem_data->sync_count_1); - P_DEBUG("sync_count_2 = %u\n", mem_data->sync_count_2); - P_DEBUG("timestamp = %lX\n", mem_data->timestamp); -} - /* * appldata_get_mem_data() * @@ -140,9 +115,6 @@ static void appldata_get_mem_data(void *data) mem_data->timestamp = get_clock(); mem_data->sync_count_2++; -#ifdef APPLDATA_DEBUG - appldata_debug_print(mem_data); -#endif } @@ -164,17 +136,7 @@ static struct appldata_ops ops = { */ static int __init appldata_mem_init(void) { - int rc; - - P_DEBUG("sizeof(mem) = %lu\n", sizeof(struct appldata_mem_data)); - - rc = appldata_register_ops(&ops); - if (rc != 0) { - P_ERROR("Error registering ops, rc = %i\n", rc); - } else { - P_DEBUG("%s-ops registered!\n", ops.name); - } - return rc; + return appldata_register_ops(&ops); } /* @@ -185,7 +147,6 @@ static int __init appldata_mem_init(void) static void __exit appldata_mem_exit(void) { appldata_unregister_ops(&ops); - P_DEBUG("%s-ops unregistered!\n", ops.name); } diff --git a/arch/s390/appldata/appldata_net_sum.c b/arch/s390/appldata/appldata_net_sum.c index 4d8344336001c8d90edeb7b731fd6558a726d016..3b746556e1a39ddce7dcac254538c521b3e835a1 100644 --- a/arch/s390/appldata/appldata_net_sum.c +++ b/arch/s390/appldata/appldata_net_sum.c @@ -21,9 +21,6 @@ #include "appldata.h" -#define MY_PRINT_NAME "appldata_net_sum" /* for debug messages, etc. */ - - /* * Network data * @@ -60,26 +57,6 @@ static struct appldata_net_sum_data { } __attribute__((packed)) appldata_net_sum_data; -static inline void appldata_print_debug(struct appldata_net_sum_data *net_data) -{ - P_DEBUG("--- NET - RECORD ---\n"); - - P_DEBUG("nr_interfaces = %u\n", net_data->nr_interfaces); - P_DEBUG("rx_packets = %8lu\n", net_data->rx_packets); - P_DEBUG("tx_packets = %8lu\n", net_data->tx_packets); - P_DEBUG("rx_bytes = %8lu\n", net_data->rx_bytes); - P_DEBUG("tx_bytes = %8lu\n", net_data->tx_bytes); - P_DEBUG("rx_errors = %8lu\n", net_data->rx_errors); - P_DEBUG("tx_errors = %8lu\n", net_data->tx_errors); - P_DEBUG("rx_dropped = %8lu\n", net_data->rx_dropped); - P_DEBUG("tx_dropped = %8lu\n", net_data->tx_dropped); - P_DEBUG("collisions = %8lu\n", net_data->collisions); - - P_DEBUG("sync_count_1 = %u\n", net_data->sync_count_1); - P_DEBUG("sync_count_2 = %u\n", net_data->sync_count_2); - P_DEBUG("timestamp = %lX\n", net_data->timestamp); -} - /* * appldata_get_net_sum_data() * @@ -135,9 +112,6 @@ static void appldata_get_net_sum_data(void *data) net_data->timestamp = get_clock(); net_data->sync_count_2++; -#ifdef APPLDATA_DEBUG - appldata_print_debug(net_data); -#endif } @@ -159,17 +133,7 @@ static struct appldata_ops ops = { */ static int __init appldata_net_init(void) { - int rc; - - P_DEBUG("sizeof(net) = %lu\n", sizeof(struct appldata_net_sum_data)); - - rc = appldata_register_ops(&ops); - if (rc != 0) { - P_ERROR("Error registering ops, rc = %i\n", rc); - } else { - P_DEBUG("%s-ops registered!\n", ops.name); - } - return rc; + return appldata_register_ops(&ops); } /* @@ -180,7 +144,6 @@ static int __init appldata_net_init(void) static void __exit appldata_net_exit(void) { appldata_unregister_ops(&ops); - P_DEBUG("%s-ops unregistered!\n", ops.name); } diff --git a/arch/s390/appldata/appldata_os.c b/arch/s390/appldata/appldata_os.c index 6b3eafe104533587e9e439a5852d5020164959ca..eb44f9f8ab917c85a4d3ea6476408b4c86bb343b 100644 --- a/arch/s390/appldata/appldata_os.c +++ b/arch/s390/appldata/appldata_os.c @@ -89,44 +89,6 @@ static struct appldata_ops ops = { }; -static inline void appldata_print_debug(struct appldata_os_data *os_data) -{ - int a0, a1, a2, i; - - P_DEBUG("--- OS - RECORD ---\n"); - P_DEBUG("nr_threads = %u\n", os_data->nr_threads); - P_DEBUG("nr_running = %u\n", os_data->nr_running); - P_DEBUG("nr_iowait = %u\n", os_data->nr_iowait); - P_DEBUG("avenrun(int) = %8x / %8x / %8x\n", os_data->avenrun[0], - os_data->avenrun[1], os_data->avenrun[2]); - a0 = os_data->avenrun[0]; - a1 = os_data->avenrun[1]; - a2 = os_data->avenrun[2]; - P_DEBUG("avenrun(float) = %d.%02d / %d.%02d / %d.%02d\n", - LOAD_INT(a0), LOAD_FRAC(a0), LOAD_INT(a1), LOAD_FRAC(a1), - LOAD_INT(a2), LOAD_FRAC(a2)); - - P_DEBUG("nr_cpus = %u\n", os_data->nr_cpus); - for (i = 0; i < os_data->nr_cpus; i++) { - P_DEBUG("cpu%u : user = %u, nice = %u, system = %u, " - "idle = %u, irq = %u, softirq = %u, iowait = %u, " - "steal = %u\n", - os_data->os_cpu[i].cpu_id, - os_data->os_cpu[i].per_cpu_user, - os_data->os_cpu[i].per_cpu_nice, - os_data->os_cpu[i].per_cpu_system, - os_data->os_cpu[i].per_cpu_idle, - os_data->os_cpu[i].per_cpu_irq, - os_data->os_cpu[i].per_cpu_softirq, - os_data->os_cpu[i].per_cpu_iowait, - os_data->os_cpu[i].per_cpu_steal); - } - - P_DEBUG("sync_count_1 = %u\n", os_data->sync_count_1); - P_DEBUG("sync_count_2 = %u\n", os_data->sync_count_2); - P_DEBUG("timestamp = %lX\n", os_data->timestamp); -} - /* * appldata_get_os_data() * @@ -180,13 +142,10 @@ static void appldata_get_os_data(void *data) APPLDATA_START_INTERVAL_REC, (unsigned long) ops.data, new_size, ops.mod_lvl); - if (rc != 0) { + if (rc != 0) P_ERROR("os: START NEW DIAG 0xDC failed, " "return code: %d, new size = %i\n", rc, new_size); - P_INFO("os: stopping old record now\n"); - } else - P_INFO("os: new record size = %i\n", new_size); rc = appldata_diag(APPLDATA_RECORD_OS_ID, APPLDATA_STOP_REC, @@ -204,9 +163,6 @@ static void appldata_get_os_data(void *data) } os_data->timestamp = get_clock(); os_data->sync_count_2++; -#ifdef APPLDATA_DEBUG - appldata_print_debug(os_data); -#endif } @@ -227,12 +183,9 @@ static int __init appldata_os_init(void) rc = -ENOMEM; goto out; } - P_DEBUG("max. sizeof(os) = %i, sizeof(os_cpu) = %lu\n", max_size, - sizeof(struct appldata_os_per_cpu)); appldata_os_data = kzalloc(max_size, GFP_DMA); if (appldata_os_data == NULL) { - P_ERROR("No memory for %s!\n", ops.name); rc = -ENOMEM; goto out; } @@ -240,17 +193,12 @@ static int __init appldata_os_init(void) appldata_os_data->per_cpu_size = sizeof(struct appldata_os_per_cpu); appldata_os_data->cpu_offset = offsetof(struct appldata_os_data, os_cpu); - P_DEBUG("cpu offset = %u\n", appldata_os_data->cpu_offset); ops.data = appldata_os_data; ops.callback = &appldata_get_os_data; rc = appldata_register_ops(&ops); - if (rc != 0) { - P_ERROR("Error registering ops, rc = %i\n", rc); + if (rc != 0) kfree(appldata_os_data); - } else { - P_DEBUG("%s-ops registered!\n", ops.name); - } out: return rc; } @@ -264,7 +212,6 @@ static void __exit appldata_os_exit(void) { appldata_unregister_ops(&ops); kfree(appldata_os_data); - P_DEBUG("%s-ops unregistered!\n", ops.name); } diff --git a/arch/s390/crypto/crypt_s390.h b/arch/s390/crypto/crypt_s390.h index 9992f95ef992a0276fa0878ddeb3282a8a224ca3..0ef9829f2ad69e2e15b743ac1582858a48124067 100644 --- a/arch/s390/crypto/crypt_s390.h +++ b/arch/s390/crypto/crypt_s390.h @@ -296,6 +296,10 @@ static inline int crypt_s390_func_available(int func) unsigned char status[16]; int ret; + /* check if CPACF facility (bit 17) is available */ + if (!(stfl() & 1ULL << (31 - 17))) + return 0; + switch (func & CRYPT_S390_OP_MASK) { case CRYPT_S390_KM: ret = crypt_s390_km(KM_QUERY, &status, NULL, NULL, 0); diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c index 0cfefddd83755366fee0dae7634ccca6342b21dd..eca724d229ecd26d7102dfd7c7d4be37af98d19f 100644 --- a/arch/s390/crypto/prng.c +++ b/arch/s390/crypto/prng.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,7 @@ static unsigned char parm_block[32] = { static int prng_open(struct inode *inode, struct file *file) { + cycle_kernel_lock(); return nonseekable_open(inode, file); } @@ -185,11 +187,8 @@ static int __init prng_init(void) prng_seed(16); ret = misc_register(&prng_dev); - if (ret) { - printk(KERN_WARNING - "Could not register misc device for PRNG.\n"); + if (ret) goto out_buf; - } return 0; out_buf: diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c index 4b010ff814c9caa3f439cb7e849aa8c501bdace1..7383781f3e6a60ba3c632b1f0d3b26c7800c6ecf 100644 --- a/arch/s390/hypfs/inode.c +++ b/arch/s390/hypfs/inode.c @@ -150,33 +150,24 @@ static ssize_t hypfs_aio_read(struct kiocb *iocb, const struct iovec *iov, unsigned long nr_segs, loff_t offset) { char *data; - size_t len; + ssize_t ret; struct file *filp = iocb->ki_filp; /* XXX: temporary */ char __user *buf = iov[0].iov_base; size_t count = iov[0].iov_len; - if (nr_segs != 1) { - count = -EINVAL; - goto out; - } + if (nr_segs != 1) + return -EINVAL; data = filp->private_data; - len = strlen(data); - if (offset > len) { - count = 0; - goto out; - } - if (count > len - offset) - count = len - offset; - if (copy_to_user(buf, data + offset, count)) { - count = -EFAULT; - goto out; - } - iocb->ki_pos += count; + ret = simple_read_from_buffer(buf, count, &offset, data, strlen(data)); + if (ret <= 0) + return ret; + + iocb->ki_pos += ret; file_accessed(filp); -out: - return count; + + return ret; } static ssize_t hypfs_aio_write(struct kiocb *iocb, const struct iovec *iov, unsigned long nr_segs, loff_t offset) diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile index 6302f508258866120b2625198ec411c8f455202c..50f657e773449e29d1fa2d64ad5c8e87047f9bd2 100644 --- a/arch/s390/kernel/Makefile +++ b/arch/s390/kernel/Makefile @@ -7,9 +7,14 @@ # CFLAGS_smp.o := -Wno-nonnull +# +# Pass UTS_MACHINE for user_regset definition +# +CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"' + obj-y := bitmap.o traps.o time.o process.o base.o early.o \ setup.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \ - s390_ext.o debug.o irq.o ipl.o dis.o diag.o + s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o obj-y += $(if $(CONFIG_64BIT),entry64.o,entry.o) obj-y += $(if $(CONFIG_64BIT),reipl64.o,reipl.o) @@ -23,7 +28,7 @@ obj-$(CONFIG_AUDIT) += audit.o compat-obj-$(CONFIG_AUDIT) += compat_audit.o obj-$(CONFIG_COMPAT) += compat_linux.o compat_signal.o \ compat_wrapper.o compat_exec_domain.o \ - binfmt_elf32.o $(compat-obj-y) + $(compat-obj-y) obj-$(CONFIG_VIRT_TIMER) += vtime.o obj-$(CONFIG_STACKTRACE) += stacktrace.o diff --git a/arch/s390/kernel/binfmt_elf32.c b/arch/s390/kernel/binfmt_elf32.c deleted file mode 100644 index 3e1c315b736d70a8ab030fdf82b08a0915a4769c..0000000000000000000000000000000000000000 --- a/arch/s390/kernel/binfmt_elf32.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * Support for 32-bit Linux for S390 ELF binaries. - * - * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Gerhard Tonn (ton@de.ibm.com) - * - * Heavily inspired by the 32-bit Sparc compat code which is - * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller (davem@redhat.com) - * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek (jj@ultra.linux.cz) - */ - -#define __ASMS390_ELF_H - -#include - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB -#define ELF_ARCH EM_S390 - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) \ - (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \ - && (x)->e_ident[EI_CLASS] == ELF_CLASS) - -/* ELF register definitions */ -#define NUM_GPRS 16 -#define NUM_FPRS 16 -#define NUM_ACRS 16 - -/* For SVR4/S390 the function pointer to be registered with `atexit` is - passed in R14. */ -#define ELF_PLAT_INIT(_r, load_addr) \ - do { \ - _r->gprs[14] = 0; \ - } while(0) - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) - -/* Wow, the "main" arch needs arch dependent functions too.. :) */ - -/* regs is struct pt_regs, pr_reg is elf_gregset_t (which is - now struct_user_regs, they are different) */ - -#define ELF_CORE_COPY_REGS(pr_reg, regs) dump_regs32(regs, &pr_reg); - -#define ELF_CORE_COPY_TASK_REGS(tsk, regs) dump_task_regs32(tsk, regs) - -#define ELF_CORE_COPY_FPREGS(tsk, fpregs) dump_task_fpu(tsk, fpregs) - -/* This yields a mask that user programs can use to figure out what - instruction set this CPU supports. */ - -#define ELF_HWCAP (0) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. - - For the moment, we have only optimizations for the Intel generations, - but that could change... */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) \ -do { \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ - set_personality(PER_LINUX); \ - set_thread_flag(TIF_31BIT); \ -} while (0) - -#include "compat_linux.h" - -typedef _s390_fp_regs32 elf_fpregset_t; - -typedef struct -{ - - _psw_t32 psw; - __u32 gprs[__NUM_GPRS]; - __u32 acrs[__NUM_ACRS]; - __u32 orig_gpr2; -} s390_regs32; -typedef s390_regs32 elf_gregset_t; - -static inline int dump_regs32(struct pt_regs *ptregs, elf_gregset_t *regs) -{ - int i; - - memcpy(®s->psw.mask, &ptregs->psw.mask, 4); - memcpy(®s->psw.addr, (char *)&ptregs->psw.addr + 4, 4); - for (i = 0; i < NUM_GPRS; i++) - regs->gprs[i] = ptregs->gprs[i]; - save_access_regs(regs->acrs); - regs->orig_gpr2 = ptregs->orig_gpr2; - return 1; -} - -static inline int dump_task_regs32(struct task_struct *tsk, elf_gregset_t *regs) -{ - struct pt_regs *ptregs = task_pt_regs(tsk); - int i; - - memcpy(®s->psw.mask, &ptregs->psw.mask, 4); - memcpy(®s->psw.addr, (char *)&ptregs->psw.addr + 4, 4); - for (i = 0; i < NUM_GPRS; i++) - regs->gprs[i] = ptregs->gprs[i]; - memcpy(regs->acrs, tsk->thread.acrs, sizeof(regs->acrs)); - regs->orig_gpr2 = ptregs->orig_gpr2; - return 1; -} - -static inline int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) -{ - if (tsk == current) - save_fp_regs((s390_fp_regs *) fpregs); - else - memcpy(fpregs, &tsk->thread.fp_regs, sizeof(elf_fpregset_t)); - return 1; -} - -#include -#include -#include -#include -#include -#include - -#define elf_prstatus elf_prstatus32 -struct elf_prstatus32 -{ - struct elf_siginfo pr_info; /* Info associated with signal */ - short pr_cursig; /* Current signal */ - u32 pr_sigpend; /* Set of pending signals */ - u32 pr_sighold; /* Set of held signals */ - pid_t pr_pid; - pid_t pr_ppid; - pid_t pr_pgrp; - pid_t pr_sid; - struct compat_timeval pr_utime; /* User time */ - struct compat_timeval pr_stime; /* System time */ - struct compat_timeval pr_cutime; /* Cumulative user time */ - struct compat_timeval pr_cstime; /* Cumulative system time */ - elf_gregset_t pr_reg; /* GP registers */ - int pr_fpvalid; /* True if math co-processor being used. */ -}; - -#define elf_prpsinfo elf_prpsinfo32 -struct elf_prpsinfo32 -{ - char pr_state; /* numeric process state */ - char pr_sname; /* char for pr_state */ - char pr_zomb; /* zombie */ - char pr_nice; /* nice val */ - u32 pr_flag; /* flags */ - u16 pr_uid; - u16 pr_gid; - pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid; - /* Lots missing */ - char pr_fname[16]; /* filename of executable */ - char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */ -}; - -#include - -/* -#define init_elf_binfmt init_elf32_binfmt -*/ - -#undef start_thread -#define start_thread start_thread31 - -static inline void start_thread31(struct pt_regs *regs, unsigned long new_psw, - unsigned long new_stackp) -{ - set_fs(USER_DS); - regs->psw.mask = psw_user32_bits; - regs->psw.addr = new_psw; - regs->gprs[15] = new_stackp; - crst_table_downgrade(current->mm, 1UL << 31); -} - -MODULE_DESCRIPTION("Binary format loader for compatibility with 32bit Linux for S390 binaries," - " Copyright 2000 IBM Corporation"); -MODULE_AUTHOR("Gerhard Tonn "); - -#undef MODULE_DESCRIPTION -#undef MODULE_AUTHOR - -#undef cputime_to_timeval -#define cputime_to_timeval cputime_to_compat_timeval -static inline void -cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value) -{ - value->tv_usec = cputime % 1000000; - value->tv_sec = cputime / 1000000; -} - -#include "../../../fs/binfmt_elf.c" - diff --git a/arch/s390/kernel/compat_ptrace.h b/arch/s390/kernel/compat_ptrace.h index 419aef913ee1233c0ab6af25c81ef21a1a22061f..cde81fa64f89bf17bc586dce3f973e77f55985e8 100644 --- a/arch/s390/kernel/compat_ptrace.h +++ b/arch/s390/kernel/compat_ptrace.h @@ -1,7 +1,7 @@ #ifndef _PTRACE32_H #define _PTRACE32_H -#include "compat_linux.h" /* needed for _psw_t32 */ +#include "compat_linux.h" /* needed for psw_compat_t */ typedef struct { __u32 cr[3]; @@ -38,7 +38,7 @@ typedef struct { struct user_regs_struct32 { - _psw_t32 psw; + psw_compat_t psw; u32 gprs[NUM_GPRS]; u32 acrs[NUM_ACRS]; u32 orig_gpr2; diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c index c93d1296cc0a7eeff66feaa20e9666bb5e31b6fa..d80fcd4a7fe14210aac75d33d824fa9c6eb1c4a7 100644 --- a/arch/s390/kernel/debug.c +++ b/arch/s390/kernel/debug.c @@ -1079,7 +1079,6 @@ __init debug_init(void) s390dbf_sysctl_header = register_sysctl_table(s390dbf_dir_table); mutex_lock(&debug_mutex); debug_debugfs_root_entry = debugfs_create_dir(DEBUG_DIR_ROOT,NULL); - printk(KERN_INFO "debug: Initialization complete\n"); initialized = 1; mutex_unlock(&debug_mutex); @@ -1193,7 +1192,6 @@ debug_get_uint(char *buf) for(; isspace(*buf); buf++); rc = simple_strtoul(buf, &buf, 10); if(*buf){ - printk("debug: no integer specified!\n"); rc = -EINVAL; } return rc; @@ -1340,19 +1338,12 @@ static void debug_flush(debug_info_t* id, int area) memset(id->areas[i][j], 0, PAGE_SIZE); } } - printk(KERN_INFO "debug: %s: all areas flushed\n",id->name); } else if(area >= 0 && area < id->nr_areas) { id->active_entries[area] = 0; id->active_pages[area] = 0; for(i = 0; i < id->pages_per_area; i++) { memset(id->areas[area][i],0,PAGE_SIZE); } - printk(KERN_INFO "debug: %s: area %i has been flushed\n", - id->name, area); - } else { - printk(KERN_INFO - "debug: %s: area %i cannot be flushed (range: %i - %i)\n", - id->name, area, 0, id->nr_areas-1); } spin_unlock_irqrestore(&id->lock,flags); } diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c index d0e09684b9ce8c4f0924017a51f86e12ddec93d5..2a2ca268b1dd6e6bc38115496674ee965f8ef29a 100644 --- a/arch/s390/kernel/early.c +++ b/arch/s390/kernel/early.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -26,12 +27,40 @@ /* * Create a Kernel NSS if the SAVESYS= parameter is defined */ -#define DEFSYS_CMD_SIZE 96 +#define DEFSYS_CMD_SIZE 128 #define SAVESYS_CMD_SIZE 32 char kernel_nss_name[NSS_NAME_SIZE + 1]; +static void __init setup_boot_command_line(void); + + #ifdef CONFIG_SHARED_KERNEL +int __init savesys_ipl_nss(char *cmd, const int cmdlen); + +asm( + " .section .init.text,\"ax\",@progbits\n" + " .align 4\n" + " .type savesys_ipl_nss, @function\n" + "savesys_ipl_nss:\n" +#ifdef CONFIG_64BIT + " stmg 6,15,48(15)\n" + " lgr 14,3\n" + " sam31\n" + " diag 2,14,0x8\n" + " sam64\n" + " lgr 2,14\n" + " lmg 6,15,48(15)\n" +#else + " stm 6,15,24(15)\n" + " lr 14,3\n" + " diag 2,14,0x8\n" + " lr 2,14\n" + " lm 6,15,24(15)\n" +#endif + " br 14\n" + " .size savesys_ipl_nss, .-savesys_ipl_nss\n"); + static noinline __init void create_kernel_nss(void) { unsigned int i, stext_pfn, eshared_pfn, end_pfn, min_size; @@ -39,6 +68,7 @@ static noinline __init void create_kernel_nss(void) unsigned int sinitrd_pfn, einitrd_pfn; #endif int response; + size_t len; char *savesys_ptr; char upper_command_line[COMMAND_LINE_SIZE]; char defsys_cmd[DEFSYS_CMD_SIZE]; @@ -49,8 +79,8 @@ static noinline __init void create_kernel_nss(void) return; /* Convert COMMAND_LINE to upper case */ - for (i = 0; i < strlen(COMMAND_LINE); i++) - upper_command_line[i] = toupper(COMMAND_LINE[i]); + for (i = 0; i < strlen(boot_command_line); i++) + upper_command_line[i] = toupper(boot_command_line[i]); savesys_ptr = strstr(upper_command_line, "SAVESYS="); @@ -83,7 +113,8 @@ static noinline __init void create_kernel_nss(void) } #endif - sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK", defsys_cmd, min_size); + sprintf(defsys_cmd, "%s EW MINSIZE=%.7iK PARMREGS=0-13", + defsys_cmd, min_size); sprintf(savesys_cmd, "SAVESYS %s \n IPL %s", kernel_nss_name, kernel_nss_name); @@ -94,13 +125,24 @@ static noinline __init void create_kernel_nss(void) return; } - __cpcmd(savesys_cmd, NULL, 0, &response); + len = strlen(savesys_cmd); + ASCEBC(savesys_cmd, len); + response = savesys_ipl_nss(savesys_cmd, len); - if (response != strlen(savesys_cmd)) { + /* On success: response is equal to the command size, + * max SAVESYS_CMD_SIZE + * On error: response contains the numeric portion of cp error message. + * for SAVESYS it will be >= 263 + */ + if (response > SAVESYS_CMD_SIZE) { kernel_nss_name[0] = '\0'; return; } + /* re-setup boot command line with new ipl vm parms */ + ipl_update_parameters(); + setup_boot_command_line(); + ipl_flags = IPL_NSS_VALID; } @@ -141,109 +183,11 @@ static noinline __init void detect_machine_type(void) if (cpuinfo->cpu_id.version == 0xff) machine_flags |= MACHINE_FLAG_VM; - /* Running on a P/390 ? */ - if (cpuinfo->cpu_id.machine == 0x7490) - machine_flags |= MACHINE_FLAG_P390; - /* Running under KVM ? */ if (cpuinfo->cpu_id.version == 0xfe) machine_flags |= MACHINE_FLAG_KVM; } -#ifdef CONFIG_64BIT -static noinline __init int memory_fast_detect(void) -{ - unsigned long val0 = 0; - unsigned long val1 = 0xc; - int ret = -ENOSYS; - - if (ipl_flags & IPL_NSS_VALID) - return -ENOSYS; - - asm volatile( - " diag %1,%2,0x260\n" - "0: lhi %0,0\n" - "1:\n" - EX_TABLE(0b,1b) - : "+d" (ret), "+d" (val0), "+d" (val1) : : "cc"); - - if (ret || val0 != val1) - return -ENOSYS; - - memory_chunk[0].size = val0 + 1; - return 0; -} -#else -static inline int memory_fast_detect(void) -{ - return -ENOSYS; -} -#endif - -static inline __init unsigned long __tprot(unsigned long addr) -{ - int cc = -1; - - asm volatile( - " tprot 0(%1),0\n" - "0: ipm %0\n" - " srl %0,28\n" - "1:\n" - EX_TABLE(0b,1b) - : "+d" (cc) : "a" (addr) : "cc"); - return (unsigned long)cc; -} - -/* Checking memory in 128KB increments. */ -#define CHUNK_INCR (1UL << 17) -#define ADDR2G (1UL << 31) - -static noinline __init void find_memory_chunks(unsigned long memsize) -{ - unsigned long addr = 0, old_addr = 0; - unsigned long old_cc = CHUNK_READ_WRITE; - unsigned long cc; - int chunk = 0; - - while (chunk < MEMORY_CHUNKS) { - cc = __tprot(addr); - while (cc == old_cc) { - addr += CHUNK_INCR; - if (memsize && addr >= memsize) - break; -#ifndef CONFIG_64BIT - if (addr == ADDR2G) - break; -#endif - cc = __tprot(addr); - } - - if (old_addr != addr && - (old_cc == CHUNK_READ_WRITE || old_cc == CHUNK_READ_ONLY)) { - memory_chunk[chunk].addr = old_addr; - memory_chunk[chunk].size = addr - old_addr; - memory_chunk[chunk].type = old_cc; - chunk++; - } - - old_addr = addr; - old_cc = cc; - -#ifndef CONFIG_64BIT - if (addr == ADDR2G) - break; -#endif - /* - * Finish memory detection at the first hole - * if storage size is unknown. - */ - if (cc == -1UL && !memsize) - break; - if (memsize && addr >= memsize) - break; - } -} - static __init void early_pgm_check_handler(void) { unsigned long addr; @@ -380,23 +324,61 @@ static __init void detect_machine_facilities(void) #endif } +static __init void rescue_initrd(void) +{ +#ifdef CONFIG_BLK_DEV_INITRD + /* + * Move the initrd right behind the bss section in case it starts + * within the bss section. So we don't overwrite it when the bss + * section gets cleared. + */ + if (!INITRD_START || !INITRD_SIZE) + return; + if (INITRD_START >= (unsigned long) __bss_stop) + return; + memmove(__bss_stop, (void *) INITRD_START, INITRD_SIZE); + INITRD_START = (unsigned long) __bss_stop; +#endif +} + +/* Set up boot command line */ +static void __init setup_boot_command_line(void) +{ + char *parm = NULL; + + /* copy arch command line */ + strlcpy(boot_command_line, COMMAND_LINE, ARCH_COMMAND_LINE_SIZE); + boot_command_line[ARCH_COMMAND_LINE_SIZE - 1] = 0; + + /* append IPL PARM data to the boot command line */ + if (MACHINE_IS_VM) { + parm = boot_command_line + strlen(boot_command_line); + *parm++ = ' '; + get_ipl_vmparm(parm); + if (parm[0] == '=') + memmove(boot_command_line, parm + 1, strlen(parm)); + } +} + + /* * Save ipl parameters, clear bss memory, initialize storage keys * and create a kernel NSS at startup if the SAVESYS= parm is defined */ void __init startup_init(void) { - unsigned long long memsize; - ipl_save_parameters(); + rescue_initrd(); clear_bss_section(); init_kernel_storage_key(); lockdep_init(); lockdep_off(); - detect_machine_type(); - create_kernel_nss(); sort_main_extable(); setup_lowcore_early(); + detect_machine_type(); + ipl_update_parameters(); + setup_boot_command_line(); + create_kernel_nss(); detect_mvpg(); detect_ieee(); detect_csp(); @@ -404,18 +386,7 @@ void __init startup_init(void) detect_diag44(); detect_machine_facilities(); setup_hpage(); - sclp_read_info_early(); sclp_facilities_detect(); - memsize = sclp_memory_detect(); -#ifndef CONFIG_64BIT - /* - * Can't deal with more than 2G in 31 bit addressing mode, so - * limit the value in order to avoid strange side effects. - */ - if (memsize > ADDR2G) - memsize = ADDR2G; -#endif - if (memory_fast_detect() < 0) - find_memory_chunks((unsigned long) memsize); + detect_memory_layout(memory_chunk); lockdep_on(); } diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c index 532542447d661a34537e42ff69571616d8874865..54b2779b5e2fa49b45cecfb929b0ec6fdba9c3ae 100644 --- a/arch/s390/kernel/ipl.c +++ b/arch/s390/kernel/ipl.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -22,6 +23,7 @@ #include #include #include +#include #define IPL_PARM_BLOCK_VERSION 0 @@ -121,6 +123,7 @@ enum ipl_method { REIPL_METHOD_FCP_RO_VM, REIPL_METHOD_FCP_DUMP, REIPL_METHOD_NSS, + REIPL_METHOD_NSS_DIAG, REIPL_METHOD_DEFAULT, }; @@ -134,14 +137,15 @@ enum dump_method { static int diag308_set_works = 0; +static struct ipl_parameter_block ipl_block; + static int reipl_capabilities = IPL_TYPE_UNKNOWN; static enum ipl_type reipl_type = IPL_TYPE_UNKNOWN; static enum ipl_method reipl_method = REIPL_METHOD_DEFAULT; static struct ipl_parameter_block *reipl_block_fcp; static struct ipl_parameter_block *reipl_block_ccw; - -static char reipl_nss_name[NSS_NAME_SIZE + 1]; +static struct ipl_parameter_block *reipl_block_nss; static int dump_capabilities = DUMP_TYPE_NONE; static enum dump_type dump_type = DUMP_TYPE_NONE; @@ -263,6 +267,56 @@ static ssize_t ipl_type_show(struct kobject *kobj, struct kobj_attribute *attr, static struct kobj_attribute sys_ipl_type_attr = __ATTR_RO(ipl_type); +/* VM IPL PARM routines */ +static void reipl_get_ascii_vmparm(char *dest, + const struct ipl_parameter_block *ipb) +{ + int i; + int len = 0; + char has_lowercase = 0; + + if ((ipb->ipl_info.ccw.vm_flags & DIAG308_VM_FLAGS_VP_VALID) && + (ipb->ipl_info.ccw.vm_parm_len > 0)) { + + len = ipb->ipl_info.ccw.vm_parm_len; + memcpy(dest, ipb->ipl_info.ccw.vm_parm, len); + /* If at least one character is lowercase, we assume mixed + * case; otherwise we convert everything to lowercase. + */ + for (i = 0; i < len; i++) + if ((dest[i] > 0x80 && dest[i] < 0x8a) || /* a-i */ + (dest[i] > 0x90 && dest[i] < 0x9a) || /* j-r */ + (dest[i] > 0xa1 && dest[i] < 0xaa)) { /* s-z */ + has_lowercase = 1; + break; + } + if (!has_lowercase) + EBC_TOLOWER(dest, len); + EBCASC(dest, len); + } + dest[len] = 0; +} + +void get_ipl_vmparm(char *dest) +{ + if (diag308_set_works && (ipl_block.hdr.pbt == DIAG308_IPL_TYPE_CCW)) + reipl_get_ascii_vmparm(dest, &ipl_block); + else + dest[0] = 0; +} + +static ssize_t ipl_vm_parm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + char parm[DIAG308_VMPARM_SIZE + 1] = {}; + + get_ipl_vmparm(parm); + return sprintf(page, "%s\n", parm); +} + +static struct kobj_attribute sys_ipl_vm_parm_attr = + __ATTR(parm, S_IRUGO, ipl_vm_parm_show, NULL); + static ssize_t sys_ipl_device_show(struct kobject *kobj, struct kobj_attribute *attr, char *page) { @@ -285,14 +339,8 @@ static struct kobj_attribute sys_ipl_device_attr = static ssize_t ipl_parameter_read(struct kobject *kobj, struct bin_attribute *attr, char *buf, loff_t off, size_t count) { - unsigned int size = IPL_PARMBLOCK_SIZE; - - if (off > size) - return 0; - if (off + count > size) - count = size - off; - memcpy(buf, (void *)IPL_PARMBLOCK_START + off, count); - return count; + return memory_read_from_buffer(buf, count, &off, IPL_PARMBLOCK_START, + IPL_PARMBLOCK_SIZE); } static struct bin_attribute ipl_parameter_attr = { @@ -310,12 +358,7 @@ static ssize_t ipl_scp_data_read(struct kobject *kobj, struct bin_attribute *att unsigned int size = IPL_PARMBLOCK_START->ipl_info.fcp.scp_data_len; void *scp_data = &IPL_PARMBLOCK_START->ipl_info.fcp.scp_data; - if (off > size) - return 0; - if (off + count > size) - count = size - off; - memcpy(buf, scp_data + off, count); - return count; + return memory_read_from_buffer(buf, count, &off, scp_data, size); } static struct bin_attribute ipl_scp_data_attr = { @@ -370,15 +413,27 @@ static ssize_t ipl_ccw_loadparm_show(struct kobject *kobj, static struct kobj_attribute sys_ipl_ccw_loadparm_attr = __ATTR(loadparm, 0444, ipl_ccw_loadparm_show, NULL); -static struct attribute *ipl_ccw_attrs[] = { +static struct attribute *ipl_ccw_attrs_vm[] = { &sys_ipl_type_attr.attr, &sys_ipl_device_attr.attr, &sys_ipl_ccw_loadparm_attr.attr, + &sys_ipl_vm_parm_attr.attr, NULL, }; -static struct attribute_group ipl_ccw_attr_group = { - .attrs = ipl_ccw_attrs, +static struct attribute *ipl_ccw_attrs_lpar[] = { + &sys_ipl_type_attr.attr, + &sys_ipl_device_attr.attr, + &sys_ipl_ccw_loadparm_attr.attr, + NULL, +}; + +static struct attribute_group ipl_ccw_attr_group_vm = { + .attrs = ipl_ccw_attrs_vm, +}; + +static struct attribute_group ipl_ccw_attr_group_lpar = { + .attrs = ipl_ccw_attrs_lpar }; /* NSS ipl device attributes */ @@ -388,6 +443,8 @@ DEFINE_IPL_ATTR_RO(ipl_nss, name, "%s\n", kernel_nss_name); static struct attribute *ipl_nss_attrs[] = { &sys_ipl_type_attr.attr, &sys_ipl_nss_name_attr.attr, + &sys_ipl_ccw_loadparm_attr.attr, + &sys_ipl_vm_parm_attr.attr, NULL, }; @@ -450,7 +507,12 @@ static int __init ipl_init(void) } switch (ipl_info.type) { case IPL_TYPE_CCW: - rc = sysfs_create_group(&ipl_kset->kobj, &ipl_ccw_attr_group); + if (MACHINE_IS_VM) + rc = sysfs_create_group(&ipl_kset->kobj, + &ipl_ccw_attr_group_vm); + else + rc = sysfs_create_group(&ipl_kset->kobj, + &ipl_ccw_attr_group_lpar); break; case IPL_TYPE_FCP: case IPL_TYPE_FCP_DUMP: @@ -481,6 +543,83 @@ static struct shutdown_action __refdata ipl_action = { * reipl shutdown action: Reboot Linux on shutdown. */ +/* VM IPL PARM attributes */ +static ssize_t reipl_generic_vmparm_show(struct ipl_parameter_block *ipb, + char *page) +{ + char vmparm[DIAG308_VMPARM_SIZE + 1] = {}; + + reipl_get_ascii_vmparm(vmparm, ipb); + return sprintf(page, "%s\n", vmparm); +} + +static ssize_t reipl_generic_vmparm_store(struct ipl_parameter_block *ipb, + size_t vmparm_max, + const char *buf, size_t len) +{ + int i, ip_len; + + /* ignore trailing newline */ + ip_len = len; + if ((len > 0) && (buf[len - 1] == '\n')) + ip_len--; + + if (ip_len > vmparm_max) + return -EINVAL; + + /* parm is used to store kernel options, check for common chars */ + for (i = 0; i < ip_len; i++) + if (!(isalnum(buf[i]) || isascii(buf[i]) || isprint(buf[i]))) + return -EINVAL; + + memset(ipb->ipl_info.ccw.vm_parm, 0, DIAG308_VMPARM_SIZE); + ipb->ipl_info.ccw.vm_parm_len = ip_len; + if (ip_len > 0) { + ipb->ipl_info.ccw.vm_flags |= DIAG308_VM_FLAGS_VP_VALID; + memcpy(ipb->ipl_info.ccw.vm_parm, buf, ip_len); + ASCEBC(ipb->ipl_info.ccw.vm_parm, ip_len); + } else { + ipb->ipl_info.ccw.vm_flags &= ~DIAG308_VM_FLAGS_VP_VALID; + } + + return len; +} + +/* NSS wrapper */ +static ssize_t reipl_nss_vmparm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return reipl_generic_vmparm_show(reipl_block_nss, page); +} + +static ssize_t reipl_nss_vmparm_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return reipl_generic_vmparm_store(reipl_block_nss, 56, buf, len); +} + +/* CCW wrapper */ +static ssize_t reipl_ccw_vmparm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return reipl_generic_vmparm_show(reipl_block_ccw, page); +} + +static ssize_t reipl_ccw_vmparm_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return reipl_generic_vmparm_store(reipl_block_ccw, 64, buf, len); +} + +static struct kobj_attribute sys_reipl_nss_vmparm_attr = + __ATTR(parm, S_IRUGO | S_IWUSR, reipl_nss_vmparm_show, + reipl_nss_vmparm_store); +static struct kobj_attribute sys_reipl_ccw_vmparm_attr = + __ATTR(parm, S_IRUGO | S_IWUSR, reipl_ccw_vmparm_show, + reipl_ccw_vmparm_store); + /* FCP reipl device attributes */ DEFINE_IPL_ATTR_RW(reipl_fcp, wwpn, "0x%016llx\n", "%016llx\n", @@ -513,27 +652,26 @@ static struct attribute_group reipl_fcp_attr_group = { DEFINE_IPL_ATTR_RW(reipl_ccw, device, "0.0.%04llx\n", "0.0.%llx\n", reipl_block_ccw->ipl_info.ccw.devno); -static void reipl_get_ascii_loadparm(char *loadparm) +static void reipl_get_ascii_loadparm(char *loadparm, + struct ipl_parameter_block *ibp) { - memcpy(loadparm, &reipl_block_ccw->ipl_info.ccw.load_param, - LOADPARM_LEN); + memcpy(loadparm, ibp->ipl_info.ccw.load_parm, LOADPARM_LEN); EBCASC(loadparm, LOADPARM_LEN); loadparm[LOADPARM_LEN] = 0; strstrip(loadparm); } -static ssize_t reipl_ccw_loadparm_show(struct kobject *kobj, - struct kobj_attribute *attr, char *page) +static ssize_t reipl_generic_loadparm_show(struct ipl_parameter_block *ipb, + char *page) { char buf[LOADPARM_LEN + 1]; - reipl_get_ascii_loadparm(buf); + reipl_get_ascii_loadparm(buf, ipb); return sprintf(page, "%s\n", buf); } -static ssize_t reipl_ccw_loadparm_store(struct kobject *kobj, - struct kobj_attribute *attr, - const char *buf, size_t len) +static ssize_t reipl_generic_loadparm_store(struct ipl_parameter_block *ipb, + const char *buf, size_t len) { int i, lp_len; @@ -552,35 +690,128 @@ static ssize_t reipl_ccw_loadparm_store(struct kobject *kobj, return -EINVAL; } /* initialize loadparm with blanks */ - memset(&reipl_block_ccw->ipl_info.ccw.load_param, ' ', LOADPARM_LEN); + memset(ipb->ipl_info.ccw.load_parm, ' ', LOADPARM_LEN); /* copy and convert to ebcdic */ - memcpy(&reipl_block_ccw->ipl_info.ccw.load_param, buf, lp_len); - ASCEBC(reipl_block_ccw->ipl_info.ccw.load_param, LOADPARM_LEN); + memcpy(ipb->ipl_info.ccw.load_parm, buf, lp_len); + ASCEBC(ipb->ipl_info.ccw.load_parm, LOADPARM_LEN); return len; } +/* NSS wrapper */ +static ssize_t reipl_nss_loadparm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return reipl_generic_loadparm_show(reipl_block_nss, page); +} + +static ssize_t reipl_nss_loadparm_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return reipl_generic_loadparm_store(reipl_block_nss, buf, len); +} + +/* CCW wrapper */ +static ssize_t reipl_ccw_loadparm_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + return reipl_generic_loadparm_show(reipl_block_ccw, page); +} + +static ssize_t reipl_ccw_loadparm_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + return reipl_generic_loadparm_store(reipl_block_ccw, buf, len); +} + static struct kobj_attribute sys_reipl_ccw_loadparm_attr = - __ATTR(loadparm, 0644, reipl_ccw_loadparm_show, - reipl_ccw_loadparm_store); + __ATTR(loadparm, S_IRUGO | S_IWUSR, reipl_ccw_loadparm_show, + reipl_ccw_loadparm_store); -static struct attribute *reipl_ccw_attrs[] = { +static struct attribute *reipl_ccw_attrs_vm[] = { &sys_reipl_ccw_device_attr.attr, &sys_reipl_ccw_loadparm_attr.attr, + &sys_reipl_ccw_vmparm_attr.attr, NULL, }; -static struct attribute_group reipl_ccw_attr_group = { +static struct attribute *reipl_ccw_attrs_lpar[] = { + &sys_reipl_ccw_device_attr.attr, + &sys_reipl_ccw_loadparm_attr.attr, + NULL, +}; + +static struct attribute_group reipl_ccw_attr_group_vm = { + .name = IPL_CCW_STR, + .attrs = reipl_ccw_attrs_vm, +}; + +static struct attribute_group reipl_ccw_attr_group_lpar = { .name = IPL_CCW_STR, - .attrs = reipl_ccw_attrs, + .attrs = reipl_ccw_attrs_lpar, }; /* NSS reipl device attributes */ +static void reipl_get_ascii_nss_name(char *dst, + struct ipl_parameter_block *ipb) +{ + memcpy(dst, ipb->ipl_info.ccw.nss_name, NSS_NAME_SIZE); + EBCASC(dst, NSS_NAME_SIZE); + dst[NSS_NAME_SIZE] = 0; +} + +static ssize_t reipl_nss_name_show(struct kobject *kobj, + struct kobj_attribute *attr, char *page) +{ + char nss_name[NSS_NAME_SIZE + 1] = {}; -DEFINE_IPL_ATTR_STR_RW(reipl_nss, name, "%s\n", "%s\n", reipl_nss_name); + reipl_get_ascii_nss_name(nss_name, reipl_block_nss); + return sprintf(page, "%s\n", nss_name); +} + +static ssize_t reipl_nss_name_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t len) +{ + int nss_len; + + /* ignore trailing newline */ + nss_len = len; + if ((len > 0) && (buf[len - 1] == '\n')) + nss_len--; + + if (nss_len > NSS_NAME_SIZE) + return -EINVAL; + + memset(reipl_block_nss->ipl_info.ccw.nss_name, 0x40, NSS_NAME_SIZE); + if (nss_len > 0) { + reipl_block_nss->ipl_info.ccw.vm_flags |= + DIAG308_VM_FLAGS_NSS_VALID; + memcpy(reipl_block_nss->ipl_info.ccw.nss_name, buf, nss_len); + ASCEBC(reipl_block_nss->ipl_info.ccw.nss_name, nss_len); + EBC_TOUPPER(reipl_block_nss->ipl_info.ccw.nss_name, nss_len); + } else { + reipl_block_nss->ipl_info.ccw.vm_flags &= + ~DIAG308_VM_FLAGS_NSS_VALID; + } + + return len; +} + +static struct kobj_attribute sys_reipl_nss_name_attr = + __ATTR(name, S_IRUGO | S_IWUSR, reipl_nss_name_show, + reipl_nss_name_store); + +static struct kobj_attribute sys_reipl_nss_loadparm_attr = + __ATTR(loadparm, S_IRUGO | S_IWUSR, reipl_nss_loadparm_show, + reipl_nss_loadparm_store); static struct attribute *reipl_nss_attrs[] = { &sys_reipl_nss_name_attr.attr, + &sys_reipl_nss_loadparm_attr.attr, + &sys_reipl_nss_vmparm_attr.attr, NULL, }; @@ -617,7 +848,10 @@ static int reipl_set_type(enum ipl_type type) reipl_method = REIPL_METHOD_FCP_DUMP; break; case IPL_TYPE_NSS: - reipl_method = REIPL_METHOD_NSS; + if (diag308_set_works) + reipl_method = REIPL_METHOD_NSS_DIAG; + else + reipl_method = REIPL_METHOD_NSS; break; case IPL_TYPE_UNKNOWN: reipl_method = REIPL_METHOD_DEFAULT; @@ -655,11 +889,38 @@ static struct kobj_attribute reipl_type_attr = static struct kset *reipl_kset; +static void get_ipl_string(char *dst, struct ipl_parameter_block *ipb, + const enum ipl_method m) +{ + char loadparm[LOADPARM_LEN + 1] = {}; + char vmparm[DIAG308_VMPARM_SIZE + 1] = {}; + char nss_name[NSS_NAME_SIZE + 1] = {}; + size_t pos = 0; + + reipl_get_ascii_loadparm(loadparm, ipb); + reipl_get_ascii_nss_name(nss_name, ipb); + reipl_get_ascii_vmparm(vmparm, ipb); + + switch (m) { + case REIPL_METHOD_CCW_VM: + pos = sprintf(dst, "IPL %X CLEAR", ipb->ipl_info.ccw.devno); + break; + case REIPL_METHOD_NSS: + pos = sprintf(dst, "IPL %s", nss_name); + break; + default: + break; + } + if (strlen(loadparm) > 0) + pos += sprintf(dst + pos, " LOADPARM '%s'", loadparm); + if (strlen(vmparm) > 0) + sprintf(dst + pos, " PARM %s", vmparm); +} + static void reipl_run(struct shutdown_trigger *trigger) { struct ccw_dev_id devid; - static char buf[100]; - char loadparm[LOADPARM_LEN + 1]; + static char buf[128]; switch (reipl_method) { case REIPL_METHOD_CCW_CIO: @@ -668,13 +929,7 @@ static void reipl_run(struct shutdown_trigger *trigger) reipl_ccw_dev(&devid); break; case REIPL_METHOD_CCW_VM: - reipl_get_ascii_loadparm(loadparm); - if (strlen(loadparm) == 0) - sprintf(buf, "IPL %X CLEAR", - reipl_block_ccw->ipl_info.ccw.devno); - else - sprintf(buf, "IPL %X CLEAR LOADPARM '%s'", - reipl_block_ccw->ipl_info.ccw.devno, loadparm); + get_ipl_string(buf, reipl_block_ccw, REIPL_METHOD_CCW_VM); __cpcmd(buf, NULL, 0, NULL); break; case REIPL_METHOD_CCW_DIAG: @@ -691,8 +946,12 @@ static void reipl_run(struct shutdown_trigger *trigger) case REIPL_METHOD_FCP_RO_VM: __cpcmd("IPL", NULL, 0, NULL); break; + case REIPL_METHOD_NSS_DIAG: + diag308(DIAG308_SET, reipl_block_nss); + diag308(DIAG308_IPL, NULL); + break; case REIPL_METHOD_NSS: - sprintf(buf, "IPL %s", reipl_nss_name); + get_ipl_string(buf, reipl_block_nss, REIPL_METHOD_NSS); __cpcmd(buf, NULL, 0, NULL); break; case REIPL_METHOD_DEFAULT: @@ -707,16 +966,36 @@ static void reipl_run(struct shutdown_trigger *trigger) disabled_wait((unsigned long) __builtin_return_address(0)); } -static void __init reipl_probe(void) +static void reipl_block_ccw_init(struct ipl_parameter_block *ipb) { - void *buffer; + ipb->hdr.len = IPL_PARM_BLK_CCW_LEN; + ipb->hdr.version = IPL_PARM_BLOCK_VERSION; + ipb->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; + ipb->hdr.pbt = DIAG308_IPL_TYPE_CCW; +} - buffer = (void *) get_zeroed_page(GFP_KERNEL); - if (!buffer) - return; - if (diag308(DIAG308_STORE, buffer) == DIAG308_RC_OK) - diag308_set_works = 1; - free_page((unsigned long)buffer); +static void reipl_block_ccw_fill_parms(struct ipl_parameter_block *ipb) +{ + /* LOADPARM */ + /* check if read scp info worked and set loadparm */ + if (sclp_ipl_info.is_valid) + memcpy(ipb->ipl_info.ccw.load_parm, + &sclp_ipl_info.loadparm, LOADPARM_LEN); + else + /* read scp info failed: set empty loadparm (EBCDIC blanks) */ + memset(ipb->ipl_info.ccw.load_parm, 0x40, LOADPARM_LEN); + ipb->hdr.flags = DIAG308_FLAGS_LP_VALID; + + /* VM PARM */ + if (MACHINE_IS_VM && diag308_set_works && + (ipl_block.ipl_info.ccw.vm_flags & DIAG308_VM_FLAGS_VP_VALID)) { + + ipb->ipl_info.ccw.vm_flags |= DIAG308_VM_FLAGS_VP_VALID; + ipb->ipl_info.ccw.vm_parm_len = + ipl_block.ipl_info.ccw.vm_parm_len; + memcpy(ipb->ipl_info.ccw.vm_parm, + ipl_block.ipl_info.ccw.vm_parm, DIAG308_VMPARM_SIZE); + } } static int __init reipl_nss_init(void) @@ -725,10 +1004,31 @@ static int __init reipl_nss_init(void) if (!MACHINE_IS_VM) return 0; + + reipl_block_nss = (void *) get_zeroed_page(GFP_KERNEL); + if (!reipl_block_nss) + return -ENOMEM; + + if (!diag308_set_works) + sys_reipl_nss_vmparm_attr.attr.mode = S_IRUGO; + rc = sysfs_create_group(&reipl_kset->kobj, &reipl_nss_attr_group); if (rc) return rc; - strncpy(reipl_nss_name, kernel_nss_name, NSS_NAME_SIZE + 1); + + reipl_block_ccw_init(reipl_block_nss); + if (ipl_info.type == IPL_TYPE_NSS) { + memset(reipl_block_nss->ipl_info.ccw.nss_name, + ' ', NSS_NAME_SIZE); + memcpy(reipl_block_nss->ipl_info.ccw.nss_name, + kernel_nss_name, strlen(kernel_nss_name)); + ASCEBC(reipl_block_nss->ipl_info.ccw.nss_name, NSS_NAME_SIZE); + reipl_block_nss->ipl_info.ccw.vm_flags |= + DIAG308_VM_FLAGS_NSS_VALID; + + reipl_block_ccw_fill_parms(reipl_block_nss); + } + reipl_capabilities |= IPL_TYPE_NSS; return 0; } @@ -740,28 +1040,27 @@ static int __init reipl_ccw_init(void) reipl_block_ccw = (void *) get_zeroed_page(GFP_KERNEL); if (!reipl_block_ccw) return -ENOMEM; - rc = sysfs_create_group(&reipl_kset->kobj, &reipl_ccw_attr_group); - if (rc) { - free_page((unsigned long)reipl_block_ccw); - return rc; + + if (MACHINE_IS_VM) { + if (!diag308_set_works) + sys_reipl_ccw_vmparm_attr.attr.mode = S_IRUGO; + rc = sysfs_create_group(&reipl_kset->kobj, + &reipl_ccw_attr_group_vm); + } else { + if(!diag308_set_works) + sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO; + rc = sysfs_create_group(&reipl_kset->kobj, + &reipl_ccw_attr_group_lpar); } - reipl_block_ccw->hdr.len = IPL_PARM_BLK_CCW_LEN; - reipl_block_ccw->hdr.version = IPL_PARM_BLOCK_VERSION; - reipl_block_ccw->hdr.blk0_len = IPL_PARM_BLK0_CCW_LEN; - reipl_block_ccw->hdr.pbt = DIAG308_IPL_TYPE_CCW; - reipl_block_ccw->hdr.flags = DIAG308_FLAGS_LP_VALID; - /* check if read scp info worked and set loadparm */ - if (sclp_ipl_info.is_valid) - memcpy(reipl_block_ccw->ipl_info.ccw.load_param, - &sclp_ipl_info.loadparm, LOADPARM_LEN); - else - /* read scp info failed: set empty loadparm (EBCDIC blanks) */ - memset(reipl_block_ccw->ipl_info.ccw.load_param, 0x40, - LOADPARM_LEN); - if (!MACHINE_IS_VM && !diag308_set_works) - sys_reipl_ccw_loadparm_attr.attr.mode = S_IRUGO; - if (ipl_info.type == IPL_TYPE_CCW) + if (rc) + return rc; + + reipl_block_ccw_init(reipl_block_ccw); + if (ipl_info.type == IPL_TYPE_CCW) { reipl_block_ccw->ipl_info.ccw.devno = ipl_devno; + reipl_block_ccw_fill_parms(reipl_block_ccw); + } + reipl_capabilities |= IPL_TYPE_CCW; return 0; } @@ -1298,7 +1597,6 @@ static void __init shutdown_actions_init(void) static int __init s390_ipl_init(void) { - reipl_probe(); sclp_get_ipl_info(&sclp_ipl_info); shutdown_actions_init(); shutdown_triggers_init(); @@ -1405,6 +1703,12 @@ void __init setup_ipl(void) atomic_notifier_chain_register(&panic_notifier_list, &on_panic_nb); } +void __init ipl_update_parameters(void) +{ + if (diag308(DIAG308_STORE, &ipl_block) == DIAG308_RC_OK) + diag308_set_works = 1; +} + void __init ipl_save_parameters(void) { struct cio_iplinfo iplinfo; diff --git a/arch/s390/kernel/kprobes.c b/arch/s390/kernel/kprobes.c index ed04d1372d5d0c536b4a24713bf10d041bc79458..569079ec4ff004f010d64df7d746b0a01caff44c 100644 --- a/arch/s390/kernel/kprobes.c +++ b/arch/s390/kernel/kprobes.c @@ -41,10 +41,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) if (is_prohibited_opcode((kprobe_opcode_t *) p->addr)) return -EINVAL; - if ((unsigned long)p->addr & 0x01) { - printk("Attempt to register kprobe at an unaligned address\n"); + if ((unsigned long)p->addr & 0x01) return -EINVAL; - } /* Use the get_insn_slot() facility for correctness */ if (!(p->ainsn.insn = get_insn_slot())) @@ -199,7 +197,7 @@ void __kprobes arch_arm_kprobe(struct kprobe *p) args.new = BREAKPOINT_INSTRUCTION; kcb->kprobe_status = KPROBE_SWAP_INST; - stop_machine_run(swap_instruction, &args, NR_CPUS); + stop_machine(swap_instruction, &args, NULL); kcb->kprobe_status = status; } @@ -214,7 +212,7 @@ void __kprobes arch_disarm_kprobe(struct kprobe *p) args.new = p->opcode; kcb->kprobe_status = KPROBE_SWAP_INST; - stop_machine_run(swap_instruction, &args, NR_CPUS); + stop_machine(swap_instruction, &args, NULL); kcb->kprobe_status = status; } @@ -272,7 +270,6 @@ static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs, __ctl_store(kcb->kprobe_saved_ctl, 9, 11); } -/* Called with kretprobe_lock held */ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs) { @@ -334,7 +331,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs) * No kprobe at this address. The fault has not been * caused by a kprobe breakpoint. The race of breakpoint * vs. kprobe remove does not exist because on s390 we - * use stop_machine_run to arm/disarm the breakpoints. + * use stop_machine to arm/disarm the breakpoints. */ goto no_kprobe; @@ -379,8 +376,7 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; INIT_HLIST_HEAD(&empty_rp); - spin_lock_irqsave(&kretprobe_lock, flags); - head = kretprobe_inst_table_head(current); + kretprobe_hash_lock(current, &head, &flags); /* * It is possible to have multiple instances associated with a given @@ -419,7 +415,7 @@ static int __kprobes trampoline_probe_handler(struct kprobe *p, regs->psw.addr = orig_ret_address | PSW_ADDR_AMODE; reset_current_kprobe(); - spin_unlock_irqrestore(&kretprobe_lock, flags); + kretprobe_hash_unlock(current, &flags); preempt_enable_no_resched(); hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { diff --git a/arch/s390/kernel/machine_kexec.c b/arch/s390/kernel/machine_kexec.c index 3c77dd36994cec6b71544a345a670d56353017d5..131d7ee8b416d8f6f8bb7f053c3799a3803e97ef 100644 --- a/arch/s390/kernel/machine_kexec.c +++ b/arch/s390/kernel/machine_kexec.c @@ -52,7 +52,6 @@ void machine_kexec_cleanup(struct kimage *image) void machine_shutdown(void) { - printk(KERN_INFO "kexec: machine_shutdown called\n"); } void machine_kexec(struct kimage *image) diff --git a/arch/s390/kernel/mem_detect.c b/arch/s390/kernel/mem_detect.c new file mode 100644 index 0000000000000000000000000000000000000000..18ed7abe16c590e7c2d5bd6047372d3273b932ad --- /dev/null +++ b/arch/s390/kernel/mem_detect.c @@ -0,0 +1,100 @@ +/* + * Copyright IBM Corp. 2008 + * Author(s): Heiko Carstens + */ + +#include +#include +#include +#include +#include + +static int memory_fast_detect(struct mem_chunk *chunk) +{ + unsigned long val0 = 0; + unsigned long val1 = 0xc; + int rc = -EOPNOTSUPP; + + if (ipl_flags & IPL_NSS_VALID) + return -EOPNOTSUPP; + asm volatile( + " diag %1,%2,0x260\n" + "0: lhi %0,0\n" + "1:\n" + EX_TABLE(0b,1b) + : "+d" (rc), "+d" (val0), "+d" (val1) : : "cc"); + + if (rc || val0 != val1) + return -EOPNOTSUPP; + chunk->size = val0 + 1; + return 0; +} + +static inline int tprot(unsigned long addr) +{ + int rc = -EFAULT; + + asm volatile( + " tprot 0(%1),0\n" + "0: ipm %0\n" + " srl %0,28\n" + "1:\n" + EX_TABLE(0b,1b) + : "+d" (rc) : "a" (addr) : "cc"); + return rc; +} + +#define ADDR2G (1ULL << 31) + +static void find_memory_chunks(struct mem_chunk chunk[]) +{ + unsigned long long memsize, rnmax, rzm; + unsigned long addr = 0, size; + int i = 0, type; + + rzm = sclp_get_rzm(); + rnmax = sclp_get_rnmax(); + memsize = rzm * rnmax; + if (!rzm) + rzm = 1ULL << 17; + if (sizeof(long) == 4) { + rzm = min(ADDR2G, rzm); + memsize = memsize ? min(ADDR2G, memsize) : ADDR2G; + } + do { + size = 0; + type = tprot(addr); + do { + size += rzm; + if (memsize && addr + size >= memsize) + break; + } while (type == tprot(addr + size)); + if (type == CHUNK_READ_WRITE || type == CHUNK_READ_ONLY) { + chunk[i].addr = addr; + chunk[i].size = size; + chunk[i].type = type; + i++; + } + addr += size; + } while (addr < memsize && i < MEMORY_CHUNKS); +} + +void detect_memory_layout(struct mem_chunk chunk[]) +{ + unsigned long flags, cr0; + + memset(chunk, 0, MEMORY_CHUNKS * sizeof(struct mem_chunk)); + if (memory_fast_detect(&chunk[0]) == 0) + return; + /* Disable IRQs, DAT and low address protection so tprot does the + * right thing and we don't get scheduled away with low address + * protection disabled. + */ + flags = __raw_local_irq_stnsm(0xf8); + __ctl_store(cr0, 0, 0); + __ctl_clear_bit(0, 28); + find_memory_chunks(chunk); + __ctl_load(cr0, 0, 0); + __raw_local_irq_ssm(flags); +} +EXPORT_SYMBOL(detect_memory_layout); diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c index 7920861109d2aa074de0ca9ae96f2c99d3c44b24..9839767d0842e5d065524181db75aa075c154798 100644 --- a/arch/s390/kernel/process.c +++ b/arch/s390/kernel/process.c @@ -75,46 +75,19 @@ unsigned long thread_saved_pc(struct task_struct *tsk) return sf->gprs[8]; } -/* - * Need to know about CPUs going idle? - */ -static ATOMIC_NOTIFIER_HEAD(idle_chain); DEFINE_PER_CPU(struct s390_idle_data, s390_idle); -int register_idle_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_register(&idle_chain, nb); -} -EXPORT_SYMBOL(register_idle_notifier); - -int unregister_idle_notifier(struct notifier_block *nb) -{ - return atomic_notifier_chain_unregister(&idle_chain, nb); -} -EXPORT_SYMBOL(unregister_idle_notifier); - static int s390_idle_enter(void) { struct s390_idle_data *idle; - int nr_calls = 0; - void *hcpu; - int rc; - hcpu = (void *)(long)smp_processor_id(); - rc = __atomic_notifier_call_chain(&idle_chain, S390_CPU_IDLE, hcpu, -1, - &nr_calls); - if (rc == NOTIFY_BAD) { - nr_calls--; - __atomic_notifier_call_chain(&idle_chain, S390_CPU_NOT_IDLE, - hcpu, nr_calls, NULL); - return rc; - } idle = &__get_cpu_var(s390_idle); spin_lock(&idle->lock); idle->idle_count++; idle->in_idle = 1; idle->idle_enter = get_clock(); spin_unlock(&idle->lock); + vtime_stop_cpu_timer(); return NOTIFY_OK; } @@ -122,13 +95,12 @@ void s390_idle_leave(void) { struct s390_idle_data *idle; + vtime_start_cpu_timer(); idle = &__get_cpu_var(s390_idle); spin_lock(&idle->lock); idle->idle_time += get_clock() - idle->idle_enter; idle->in_idle = 0; spin_unlock(&idle->lock); - atomic_notifier_call_chain(&idle_chain, S390_CPU_NOT_IDLE, - (void *)(long) smp_processor_id()); } extern void s390_handle_mcck(void); @@ -170,7 +142,7 @@ static void default_idle(void) void cpu_idle(void) { for (;;) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched()) default_idle(); tick_nohz_restart_sched_tick(); diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index 35827b9bd4d1827f102f79f3e999bbb69c52f5ab..2815bfe348a6f92e67b64e04e0b70cbecde6bc58 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include #include #include @@ -47,6 +49,11 @@ #include "compat_ptrace.h" #endif +enum s390_regset { + REGSET_GENERAL, + REGSET_FP, +}; + static void FixPerRegisters(struct task_struct *task) { @@ -126,24 +133,10 @@ ptrace_disable(struct task_struct *child) * struct user contain pad bytes that should be read as zeroes. * Lovely... */ -static int -peek_user(struct task_struct *child, addr_t addr, addr_t data) +static unsigned long __peek_user(struct task_struct *child, addr_t addr) { struct user *dummy = NULL; - addr_t offset, tmp, mask; - - /* - * Stupid gdb peeks/pokes the access registers in 64 bit with - * an alignment of 4. Programmers from hell... - */ - mask = __ADDR_MASK; -#ifdef CONFIG_64BIT - if (addr >= (addr_t) &dummy->regs.acrs && - addr < (addr_t) &dummy->regs.orig_gpr2) - mask = 3; -#endif - if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) - return -EIO; + addr_t offset, tmp; if (addr < (addr_t) &dummy->regs.acrs) { /* @@ -197,24 +190,18 @@ peek_user(struct task_struct *child, addr_t addr, addr_t data) } else tmp = 0; - return put_user(tmp, (addr_t __user *) data); + return tmp; } -/* - * Write a word to the user area of a process at location addr. This - * operation does have an additional problem compared to peek_user. - * Stores to the program status word and on the floating point - * control register needs to get checked for validity. - */ static int -poke_user(struct task_struct *child, addr_t addr, addr_t data) +peek_user(struct task_struct *child, addr_t addr, addr_t data) { struct user *dummy = NULL; - addr_t offset, mask; + addr_t tmp, mask; /* * Stupid gdb peeks/pokes the access registers in 64 bit with - * an alignment of 4. Programmers from hell indeed... + * an alignment of 4. Programmers from hell... */ mask = __ADDR_MASK; #ifdef CONFIG_64BIT @@ -225,6 +212,21 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data) if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) return -EIO; + tmp = __peek_user(child, addr); + return put_user(tmp, (addr_t __user *) data); +} + +/* + * Write a word to the user area of a process at location addr. This + * operation does have an additional problem compared to peek_user. + * Stores to the program status word and on the floating point + * control register needs to get checked for validity. + */ +static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) +{ + struct user *dummy = NULL; + addr_t offset; + if (addr < (addr_t) &dummy->regs.acrs) { /* * psw and gprs are stored on the stack @@ -292,6 +294,28 @@ poke_user(struct task_struct *child, addr_t addr, addr_t data) return 0; } +static int +poke_user(struct task_struct *child, addr_t addr, addr_t data) +{ + struct user *dummy = NULL; + addr_t mask; + + /* + * Stupid gdb peeks/pokes the access registers in 64 bit with + * an alignment of 4. Programmers from hell indeed... + */ + mask = __ADDR_MASK; +#ifdef CONFIG_64BIT + if (addr >= (addr_t) &dummy->regs.acrs && + addr < (addr_t) &dummy->regs.orig_gpr2) + mask = 3; +#endif + if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) + return -EIO; + + return __poke_user(child, addr, data); +} + long arch_ptrace(struct task_struct *child, long request, long addr, long data) { ptrace_area parea; @@ -367,18 +391,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) /* * Same as peek_user but for a 31 bit program. */ -static int -peek_user_emu31(struct task_struct *child, addr_t addr, addr_t data) +static u32 __peek_user_compat(struct task_struct *child, addr_t addr) { struct user32 *dummy32 = NULL; per_struct32 *dummy_per32 = NULL; addr_t offset; __u32 tmp; - if (!test_thread_flag(TIF_31BIT) || - (addr & 3) || addr > sizeof(struct user) - 3) - return -EIO; - if (addr < (addr_t) &dummy32->regs.acrs) { /* * psw and gprs are stored on the stack @@ -435,25 +454,32 @@ peek_user_emu31(struct task_struct *child, addr_t addr, addr_t data) } else tmp = 0; + return tmp; +} + +static int peek_user_compat(struct task_struct *child, + addr_t addr, addr_t data) +{ + __u32 tmp; + + if (!test_thread_flag(TIF_31BIT) || + (addr & 3) || addr > sizeof(struct user) - 3) + return -EIO; + + tmp = __peek_user_compat(child, addr); return put_user(tmp, (__u32 __user *) data); } /* * Same as poke_user but for a 31 bit program. */ -static int -poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data) +static int __poke_user_compat(struct task_struct *child, + addr_t addr, addr_t data) { struct user32 *dummy32 = NULL; per_struct32 *dummy_per32 = NULL; + __u32 tmp = (__u32) data; addr_t offset; - __u32 tmp; - - if (!test_thread_flag(TIF_31BIT) || - (addr & 3) || addr > sizeof(struct user32) - 3) - return -EIO; - - tmp = (__u32) data; if (addr < (addr_t) &dummy32->regs.acrs) { /* @@ -528,6 +554,16 @@ poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data) return 0; } +static int poke_user_compat(struct task_struct *child, + addr_t addr, addr_t data) +{ + if (!test_thread_flag(TIF_31BIT) || + (addr & 3) || addr > sizeof(struct user32) - 3) + return -EIO; + + return __poke_user_compat(child, addr, data); +} + long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t caddr, compat_ulong_t cdata) { @@ -539,11 +575,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, switch (request) { case PTRACE_PEEKUSR: /* read the word at location addr in the USER area. */ - return peek_user_emu31(child, addr, data); + return peek_user_compat(child, addr, data); case PTRACE_POKEUSR: /* write the word at location addr in the USER area */ - return poke_user_emu31(child, addr, data); + return poke_user_compat(child, addr, data); case PTRACE_PEEKUSR_AREA: case PTRACE_POKEUSR_AREA: @@ -555,13 +591,13 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request, copied = 0; while (copied < parea.len) { if (request == PTRACE_PEEKUSR_AREA) - ret = peek_user_emu31(child, addr, data); + ret = peek_user_compat(child, addr, data); else { __u32 utmp; if (get_user(utmp, (__u32 __force __user *) data)) return -EFAULT; - ret = poke_user_emu31(child, addr, utmp); + ret = poke_user_compat(child, addr, utmp); } if (ret) return ret; @@ -610,3 +646,240 @@ syscall_trace(struct pt_regs *regs, int entryexit) regs->gprs[2], regs->orig_gpr2, regs->gprs[3], regs->gprs[4], regs->gprs[5]); } + +/* + * user_regset definitions. + */ + +static int s390_regs_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + if (target == current) + save_access_regs(target->thread.acrs); + + if (kbuf) { + unsigned long *k = kbuf; + while (count > 0) { + *k++ = __peek_user(target, pos); + count -= sizeof(*k); + pos += sizeof(*k); + } + } else { + unsigned long __user *u = ubuf; + while (count > 0) { + if (__put_user(__peek_user(target, pos), u++)) + return -EFAULT; + count -= sizeof(*u); + pos += sizeof(*u); + } + } + return 0; +} + +static int s390_regs_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int rc = 0; + + if (target == current) + save_access_regs(target->thread.acrs); + + if (kbuf) { + const unsigned long *k = kbuf; + while (count > 0 && !rc) { + rc = __poke_user(target, pos, *k++); + count -= sizeof(*k); + pos += sizeof(*k); + } + } else { + const unsigned long __user *u = ubuf; + while (count > 0 && !rc) { + unsigned long word; + rc = __get_user(word, u++); + if (rc) + break; + rc = __poke_user(target, pos, word); + count -= sizeof(*u); + pos += sizeof(*u); + } + } + + if (rc == 0 && target == current) + restore_access_regs(target->thread.acrs); + + return rc; +} + +static int s390_fpregs_get(struct task_struct *target, + const struct user_regset *regset, unsigned int pos, + unsigned int count, void *kbuf, void __user *ubuf) +{ + if (target == current) + save_fp_regs(&target->thread.fp_regs); + + return user_regset_copyout(&pos, &count, &kbuf, &ubuf, + &target->thread.fp_regs, 0, -1); +} + +static int s390_fpregs_set(struct task_struct *target, + const struct user_regset *regset, unsigned int pos, + unsigned int count, const void *kbuf, + const void __user *ubuf) +{ + int rc = 0; + + if (target == current) + save_fp_regs(&target->thread.fp_regs); + + /* If setting FPC, must validate it first. */ + if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) { + u32 fpc[2] = { target->thread.fp_regs.fpc, 0 }; + rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpc, + 0, offsetof(s390_fp_regs, fprs)); + if (rc) + return rc; + if ((fpc[0] & ~FPC_VALID_MASK) != 0 || fpc[1] != 0) + return -EINVAL; + target->thread.fp_regs.fpc = fpc[0]; + } + + if (rc == 0 && count > 0) + rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, + target->thread.fp_regs.fprs, + offsetof(s390_fp_regs, fprs), -1); + + if (rc == 0 && target == current) + restore_fp_regs(&target->thread.fp_regs); + + return rc; +} + +static const struct user_regset s390_regsets[] = { + [REGSET_GENERAL] = { + .core_note_type = NT_PRSTATUS, + .n = sizeof(s390_regs) / sizeof(long), + .size = sizeof(long), + .align = sizeof(long), + .get = s390_regs_get, + .set = s390_regs_set, + }, + [REGSET_FP] = { + .core_note_type = NT_PRFPREG, + .n = sizeof(s390_fp_regs) / sizeof(long), + .size = sizeof(long), + .align = sizeof(long), + .get = s390_fpregs_get, + .set = s390_fpregs_set, + }, +}; + +static const struct user_regset_view user_s390_view = { + .name = UTS_MACHINE, + .e_machine = EM_S390, + .regsets = s390_regsets, + .n = ARRAY_SIZE(s390_regsets) +}; + +#ifdef CONFIG_COMPAT +static int s390_compat_regs_get(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + void *kbuf, void __user *ubuf) +{ + if (target == current) + save_access_regs(target->thread.acrs); + + if (kbuf) { + compat_ulong_t *k = kbuf; + while (count > 0) { + *k++ = __peek_user_compat(target, pos); + count -= sizeof(*k); + pos += sizeof(*k); + } + } else { + compat_ulong_t __user *u = ubuf; + while (count > 0) { + if (__put_user(__peek_user_compat(target, pos), u++)) + return -EFAULT; + count -= sizeof(*u); + pos += sizeof(*u); + } + } + return 0; +} + +static int s390_compat_regs_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + int rc = 0; + + if (target == current) + save_access_regs(target->thread.acrs); + + if (kbuf) { + const compat_ulong_t *k = kbuf; + while (count > 0 && !rc) { + rc = __poke_user_compat(target, pos, *k++); + count -= sizeof(*k); + pos += sizeof(*k); + } + } else { + const compat_ulong_t __user *u = ubuf; + while (count > 0 && !rc) { + compat_ulong_t word; + rc = __get_user(word, u++); + if (rc) + break; + rc = __poke_user_compat(target, pos, word); + count -= sizeof(*u); + pos += sizeof(*u); + } + } + + if (rc == 0 && target == current) + restore_access_regs(target->thread.acrs); + + return rc; +} + +static const struct user_regset s390_compat_regsets[] = { + [REGSET_GENERAL] = { + .core_note_type = NT_PRSTATUS, + .n = sizeof(s390_compat_regs) / sizeof(compat_long_t), + .size = sizeof(compat_long_t), + .align = sizeof(compat_long_t), + .get = s390_compat_regs_get, + .set = s390_compat_regs_set, + }, + [REGSET_FP] = { + .core_note_type = NT_PRFPREG, + .n = sizeof(s390_fp_regs) / sizeof(compat_long_t), + .size = sizeof(compat_long_t), + .align = sizeof(compat_long_t), + .get = s390_fpregs_get, + .set = s390_fpregs_set, + }, +}; + +static const struct user_regset_view user_s390_compat_view = { + .name = "s390", + .e_machine = EM_S390, + .regsets = s390_compat_regsets, + .n = ARRAY_SIZE(s390_compat_regsets) +}; +#endif + +const struct user_regset_view *task_user_regset_view(struct task_struct *task) +{ +#ifdef CONFIG_COMPAT + if (test_tsk_thread_flag(task, TIF_31BIT)) + return &user_s390_compat_view; +#endif + return &user_s390_view; +} diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c index 2bc70b6e876a4310991e884d5a1f92dde1a78681..62122bad1e3316f2112ae66c22e51859c7214b52 100644 --- a/arch/s390/kernel/setup.c +++ b/arch/s390/kernel/setup.c @@ -54,6 +54,7 @@ #include #include #include +#include long psw_kernel_bits = (PSW_BASE_BITS | PSW_MASK_DAT | PSW_ASC_PRIMARY | PSW_MASK_MCHECK | PSW_DEFAULT_KEY); @@ -77,7 +78,7 @@ unsigned long machine_flags; unsigned long elf_hwcap = 0; char elf_platform[ELF_PLATFORM_SIZE]; -struct mem_chunk __meminitdata memory_chunk[MEMORY_CHUNKS]; +struct mem_chunk __initdata memory_chunk[MEMORY_CHUNKS]; volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */ static unsigned long __initdata memory_end; @@ -205,12 +206,6 @@ static void __init conmode_default(void) SET_CONSOLE_SCLP; #endif } - } else if (MACHINE_IS_P390) { -#if defined(CONFIG_TN3215_CONSOLE) - SET_CONSOLE_3215; -#elif defined(CONFIG_TN3270_CONSOLE) - SET_CONSOLE_3270; -#endif } else { #if defined(CONFIG_SCLP_CONSOLE) || defined(CONFIG_SCLP_VT220_CONSOLE) SET_CONSOLE_SCLP; @@ -221,18 +216,17 @@ static void __init conmode_default(void) #if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE) static void __init setup_zfcpdump(unsigned int console_devno) { - static char str[64]; + static char str[41]; if (ipl_info.type != IPL_TYPE_FCP_DUMP) return; if (console_devno != -1) - sprintf(str, "cio_ignore=all,!0.0.%04x,!0.0.%04x", + sprintf(str, " cio_ignore=all,!0.0.%04x,!0.0.%04x", ipl_info.data.fcp.dev_id.devno, console_devno); else - sprintf(str, "cio_ignore=all,!0.0.%04x", + sprintf(str, " cio_ignore=all,!0.0.%04x", ipl_info.data.fcp.dev_id.devno); - strcat(COMMAND_LINE, " "); - strcat(COMMAND_LINE, str); + strcat(boot_command_line, str); console_loglevel = 2; } #else @@ -289,32 +283,6 @@ static int __init early_parse_mem(char *p) } early_param("mem", early_parse_mem); -/* - * "ipldelay=XXX[sm]" sets ipl delay in seconds or minutes - */ -static int __init early_parse_ipldelay(char *p) -{ - unsigned long delay = 0; - - delay = simple_strtoul(p, &p, 0); - - switch (*p) { - case 's': - case 'S': - delay *= 1000000; - break; - case 'm': - case 'M': - delay *= 60 * 1000000; - } - - /* now wait for the requested amount of time */ - udelay(delay); - - return 0; -} -early_param("ipldelay", early_parse_ipldelay); - #ifdef CONFIG_S390_SWITCH_AMODE #ifdef CONFIG_PGSTE unsigned int switch_amode = 1; @@ -799,16 +767,15 @@ setup_arch(char **cmdline_p) printk("We are running under VM (64 bit mode)\n"); else if (MACHINE_IS_KVM) { printk("We are running under KVM (64 bit mode)\n"); - add_preferred_console("ttyS", 1, NULL); + add_preferred_console("hvc", 0, NULL); + s390_virtio_console_init(); } else printk("We are running native (64 bit mode)\n"); #endif /* CONFIG_64BIT */ - /* Save unparsed command line copy for /proc/cmdline */ - strlcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE); - - *cmdline_p = COMMAND_LINE; - *(*cmdline_p + COMMAND_LINE_SIZE - 1) = '\0'; + /* Have one command line that is parsed and saved in /proc/cmdline */ + /* boot_command_line has been already set up in early.c */ + *cmdline_p = boot_command_line; ROOT_DEV = Root_RAM0; diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c index 5d4fa4b1c74c401b853fdf05a5e9a05cfa5c2040..b795b3e24afde40a4a0f24b36e26d1759adfb905 100644 --- a/arch/s390/kernel/smp.c +++ b/arch/s390/kernel/smp.c @@ -109,7 +109,7 @@ static void do_call_function(void) } static void __smp_call_function_map(void (*func) (void *info), void *info, - int nonatomic, int wait, cpumask_t map) + int wait, cpumask_t map) { struct call_data_struct data; int cpu, local = 0; @@ -162,7 +162,6 @@ out: * smp_call_function: * @func: the function to run; this must be fast and non-blocking * @info: an arbitrary pointer to pass to the function - * @nonatomic: unused * @wait: if true, wait (atomically) until function has completed on other CPUs * * Run a function on all other CPUs. @@ -170,15 +169,14 @@ out: * You must not call this function with disabled interrupts, from a * hardware interrupt handler or from a bottom half. */ -int smp_call_function(void (*func) (void *info), void *info, int nonatomic, - int wait) +int smp_call_function(void (*func) (void *info), void *info, int wait) { cpumask_t map; spin_lock(&call_lock); map = cpu_online_map; cpu_clear(smp_processor_id(), map); - __smp_call_function_map(func, info, nonatomic, wait, map); + __smp_call_function_map(func, info, wait, map); spin_unlock(&call_lock); return 0; } @@ -189,7 +187,6 @@ EXPORT_SYMBOL(smp_call_function); * @cpu: the CPU where func should run * @func: the function to run; this must be fast and non-blocking * @info: an arbitrary pointer to pass to the function - * @nonatomic: unused * @wait: if true, wait (atomically) until function has completed on other CPUs * * Run a function on one processor. @@ -198,11 +195,10 @@ EXPORT_SYMBOL(smp_call_function); * hardware interrupt handler or from a bottom half. */ int smp_call_function_single(int cpu, void (*func) (void *info), void *info, - int nonatomic, int wait) + int wait) { spin_lock(&call_lock); - __smp_call_function_map(func, info, nonatomic, wait, - cpumask_of_cpu(cpu)); + __smp_call_function_map(func, info, wait, cpumask_of_cpu(cpu)); spin_unlock(&call_lock); return 0; } @@ -228,7 +224,7 @@ int smp_call_function_mask(cpumask_t mask, void (*func)(void *), void *info, { spin_lock(&call_lock); cpu_clear(smp_processor_id(), mask); - __smp_call_function_map(func, info, 0, wait, mask); + __smp_call_function_map(func, info, wait, mask); spin_unlock(&call_lock); return 0; } @@ -303,7 +299,7 @@ static void smp_ptlb_callback(void *info) void smp_ptlb_all(void) { - on_each_cpu(smp_ptlb_callback, NULL, 0, 1); + on_each_cpu(smp_ptlb_callback, NULL, 1); } EXPORT_SYMBOL(smp_ptlb_all); #endif /* ! CONFIG_64BIT */ @@ -351,7 +347,7 @@ void smp_ctl_set_bit(int cr, int bit) memset(&parms.orvals, 0, sizeof(parms.orvals)); memset(&parms.andvals, 0xff, sizeof(parms.andvals)); parms.orvals[cr] = 1 << bit; - on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); + on_each_cpu(smp_ctl_bit_callback, &parms, 1); } EXPORT_SYMBOL(smp_ctl_set_bit); @@ -365,7 +361,7 @@ void smp_ctl_clear_bit(int cr, int bit) memset(&parms.orvals, 0, sizeof(parms.orvals)); memset(&parms.andvals, 0xff, sizeof(parms.andvals)); parms.andvals[cr] = ~(1L << bit); - on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1); + on_each_cpu(smp_ctl_bit_callback, &parms, 1); } EXPORT_SYMBOL(smp_ctl_clear_bit); @@ -868,7 +864,8 @@ int setup_profiling_timer(unsigned int multiplier) } #ifdef CONFIG_HOTPLUG_CPU -static ssize_t cpu_configure_show(struct sys_device *dev, char *buf) +static ssize_t cpu_configure_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { ssize_t count; @@ -878,8 +875,9 @@ static ssize_t cpu_configure_show(struct sys_device *dev, char *buf) return count; } -static ssize_t cpu_configure_store(struct sys_device *dev, const char *buf, - size_t count) +static ssize_t cpu_configure_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t count) { int cpu = dev->id; int val, rc; @@ -926,7 +924,8 @@ out: static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store); #endif /* CONFIG_HOTPLUG_CPU */ -static ssize_t cpu_polarization_show(struct sys_device *dev, char *buf) +static ssize_t cpu_polarization_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { int cpu = dev->id; ssize_t count; @@ -954,7 +953,8 @@ static ssize_t cpu_polarization_show(struct sys_device *dev, char *buf) } static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL); -static ssize_t show_cpu_address(struct sys_device *dev, char *buf) +static ssize_t show_cpu_address(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]); } @@ -974,7 +974,8 @@ static struct attribute_group cpu_common_attr_group = { .attrs = cpu_common_attrs, }; -static ssize_t show_capability(struct sys_device *dev, char *buf) +static ssize_t show_capability(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { unsigned int capability; int rc; @@ -986,7 +987,8 @@ static ssize_t show_capability(struct sys_device *dev, char *buf) } static SYSDEV_ATTR(capability, 0444, show_capability, NULL); -static ssize_t show_idle_count(struct sys_device *dev, char *buf) +static ssize_t show_idle_count(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct s390_idle_data *idle; unsigned long long idle_count; @@ -999,7 +1001,8 @@ static ssize_t show_idle_count(struct sys_device *dev, char *buf) } static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL); -static ssize_t show_idle_time(struct sys_device *dev, char *buf) +static ssize_t show_idle_time(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct s390_idle_data *idle; unsigned long long new_time; @@ -1116,7 +1119,9 @@ out: return rc; } -static ssize_t __ref rescan_store(struct sys_device *dev, const char *buf, +static ssize_t __ref rescan_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t count) { int rc; @@ -1127,7 +1132,9 @@ static ssize_t __ref rescan_store(struct sys_device *dev, const char *buf, static SYSDEV_ATTR(rescan, 0200, NULL, rescan_store); #endif /* CONFIG_HOTPLUG_CPU */ -static ssize_t dispatching_show(struct sys_device *dev, char *buf) +static ssize_t dispatching_show(struct sys_device *dev, + struct sysdev_attribute *attr, + char *buf) { ssize_t count; @@ -1137,8 +1144,9 @@ static ssize_t dispatching_show(struct sys_device *dev, char *buf) return count; } -static ssize_t dispatching_store(struct sys_device *dev, const char *buf, - size_t count) +static ssize_t dispatching_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t count) { int val, rc; char delim; diff --git a/arch/s390/kernel/stacktrace.c b/arch/s390/kernel/stacktrace.c index 85e46a5d0e0801d9880987cd2595a06391231401..8841919ef7e64b9417f8fc8934403970a47644f8 100644 --- a/arch/s390/kernel/stacktrace.c +++ b/arch/s390/kernel/stacktrace.c @@ -10,6 +10,7 @@ #include #include #include +#include static unsigned long save_context_stack(struct stack_trace *trace, unsigned long sp, @@ -81,6 +82,7 @@ void save_stack_trace(struct stack_trace *trace) S390_lowcore.thread_info, S390_lowcore.thread_info + THREAD_SIZE, 1); } +EXPORT_SYMBOL_GPL(save_stack_trace); void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) { @@ -93,3 +95,4 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) if (trace->nr_entries < trace->max_entries) trace->entries[trace->nr_entries++] = ULONG_MAX; } +EXPORT_SYMBOL_GPL(save_stack_trace_tsk); diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c index 7aec676fefd593fcc7305613a6d1e3e4964cdbb0..ab70d9bd92616decb488820101543ebf4218f82b 100644 --- a/arch/s390/kernel/time.c +++ b/arch/s390/kernel/time.c @@ -3,7 +3,7 @@ * Time of day based timer functions. * * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Copyright IBM Corp. 1999, 2008 * Author(s): Hartmut Penner (hp@de.ibm.com), * Martin Schwidefsky (schwidefsky@de.ibm.com), * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) @@ -31,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -162,7 +163,7 @@ void init_cpu_timer(void) /* Enable clock comparator timer interrupt. */ __ctl_set_bit(0,11); - /* Always allow ETR external interrupts, even without an ETR. */ + /* Always allow the timing alert external interrupt. */ __ctl_set_bit(0, 4); } @@ -170,8 +171,21 @@ static void clock_comparator_interrupt(__u16 code) { } +static void etr_timing_alert(struct etr_irq_parm *); +static void stp_timing_alert(struct stp_irq_parm *); + +static void timing_alert_interrupt(__u16 code) +{ + if (S390_lowcore.ext_params & 0x00c40000) + etr_timing_alert((struct etr_irq_parm *) + &S390_lowcore.ext_params); + if (S390_lowcore.ext_params & 0x00038000) + stp_timing_alert((struct stp_irq_parm *) + &S390_lowcore.ext_params); +} + static void etr_reset(void); -static void etr_ext_handler(__u16); +static void stp_reset(void); /* * Get the TOD clock running. @@ -181,6 +195,7 @@ static u64 __init reset_tod_clock(void) u64 time; etr_reset(); + stp_reset(); if (store_clock(&time) == 0) return time; /* TOD clock not running. Set the clock to Unix Epoch. */ @@ -231,8 +246,9 @@ void __init time_init(void) if (clocksource_register(&clocksource_tod) != 0) panic("Could not register TOD clock source"); - /* request the etr external interrupt */ - if (register_early_external_interrupt(0x1406, etr_ext_handler, + /* request the timing alert external interrupt */ + if (register_early_external_interrupt(0x1406, + timing_alert_interrupt, &ext_int_etr_cc) != 0) panic("Couldn't request external interrupt 0x1406"); @@ -244,11 +260,113 @@ void __init time_init(void) #endif } +/* + * The time is "clock". old is what we think the time is. + * Adjust the value by a multiple of jiffies and add the delta to ntp. + * "delay" is an approximation how long the synchronization took. If + * the time correction is positive, then "delay" is subtracted from + * the time difference and only the remaining part is passed to ntp. + */ +static unsigned long long adjust_time(unsigned long long old, + unsigned long long clock, + unsigned long long delay) +{ + unsigned long long delta, ticks; + struct timex adjust; + + if (clock > old) { + /* It is later than we thought. */ + delta = ticks = clock - old; + delta = ticks = (delta < delay) ? 0 : delta - delay; + delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); + adjust.offset = ticks * (1000000 / HZ); + } else { + /* It is earlier than we thought. */ + delta = ticks = old - clock; + delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); + delta = -delta; + adjust.offset = -ticks * (1000000 / HZ); + } + jiffies_timer_cc += delta; + if (adjust.offset != 0) { + printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n", + adjust.offset); + adjust.modes = ADJ_OFFSET_SINGLESHOT; + do_adjtimex(&adjust); + } + return delta; +} + +static DEFINE_PER_CPU(atomic_t, clock_sync_word); +static unsigned long clock_sync_flags; + +#define CLOCK_SYNC_HAS_ETR 0 +#define CLOCK_SYNC_HAS_STP 1 +#define CLOCK_SYNC_ETR 2 +#define CLOCK_SYNC_STP 3 + +/* + * The synchronous get_clock function. It will write the current clock + * value to the clock pointer and return 0 if the clock is in sync with + * the external time source. If the clock mode is local it will return + * -ENOSYS and -EAGAIN if the clock is not in sync with the external + * reference. + */ +int get_sync_clock(unsigned long long *clock) +{ + atomic_t *sw_ptr; + unsigned int sw0, sw1; + + sw_ptr = &get_cpu_var(clock_sync_word); + sw0 = atomic_read(sw_ptr); + *clock = get_clock(); + sw1 = atomic_read(sw_ptr); + put_cpu_var(clock_sync_sync); + if (sw0 == sw1 && (sw0 & 0x80000000U)) + /* Success: time is in sync. */ + return 0; + if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) && + !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) + return -ENOSYS; + if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) && + !test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) + return -EACCES; + return -EAGAIN; +} +EXPORT_SYMBOL(get_sync_clock); + +/* + * Make get_sync_clock return -EAGAIN. + */ +static void disable_sync_clock(void *dummy) +{ + atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); + /* + * Clear the in-sync bit 2^31. All get_sync_clock calls will + * fail until the sync bit is turned back on. In addition + * increase the "sequence" counter to avoid the race of an + * etr event and the complete recovery against get_sync_clock. + */ + atomic_clear_mask(0x80000000, sw_ptr); + atomic_inc(sw_ptr); +} + +/* + * Make get_sync_clock return 0 again. + * Needs to be called from a context disabled for preemption. + */ +static void enable_sync_clock(void) +{ + atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word); + atomic_set_mask(0x80000000, sw_ptr); +} + /* * External Time Reference (ETR) code. */ static int etr_port0_online; static int etr_port1_online; +static int etr_steai_available; static int __init early_parse_etr(char *p) { @@ -273,12 +391,6 @@ enum etr_event { ETR_EVENT_UPDATE, }; -enum etr_flags { - ETR_FLAG_ENOSYS, - ETR_FLAG_EACCES, - ETR_FLAG_STEAI, -}; - /* * Valid bit combinations of the eacr register are (x = don't care): * e0 e1 dp p0 p1 ea es sl @@ -305,73 +417,17 @@ enum etr_flags { */ static struct etr_eacr etr_eacr; static u64 etr_tolec; /* time of last eacr update */ -static unsigned long etr_flags; static struct etr_aib etr_port0; static int etr_port0_uptodate; static struct etr_aib etr_port1; static int etr_port1_uptodate; static unsigned long etr_events; static struct timer_list etr_timer; -static DEFINE_PER_CPU(atomic_t, etr_sync_word); static void etr_timeout(unsigned long dummy); static void etr_work_fn(struct work_struct *work); static DECLARE_WORK(etr_work, etr_work_fn); -/* - * The etr get_clock function. It will write the current clock value - * to the clock pointer and return 0 if the clock is in sync with the - * external time source. If the clock mode is local it will return - * -ENOSYS and -EAGAIN if the clock is not in sync with the external - * reference. This function is what ETR is all about.. - */ -int get_sync_clock(unsigned long long *clock) -{ - atomic_t *sw_ptr; - unsigned int sw0, sw1; - - sw_ptr = &get_cpu_var(etr_sync_word); - sw0 = atomic_read(sw_ptr); - *clock = get_clock(); - sw1 = atomic_read(sw_ptr); - put_cpu_var(etr_sync_sync); - if (sw0 == sw1 && (sw0 & 0x80000000U)) - /* Success: time is in sync. */ - return 0; - if (test_bit(ETR_FLAG_ENOSYS, &etr_flags)) - return -ENOSYS; - if (test_bit(ETR_FLAG_EACCES, &etr_flags)) - return -EACCES; - return -EAGAIN; -} -EXPORT_SYMBOL(get_sync_clock); - -/* - * Make get_sync_clock return -EAGAIN. - */ -static void etr_disable_sync_clock(void *dummy) -{ - atomic_t *sw_ptr = &__get_cpu_var(etr_sync_word); - /* - * Clear the in-sync bit 2^31. All get_sync_clock calls will - * fail until the sync bit is turned back on. In addition - * increase the "sequence" counter to avoid the race of an - * etr event and the complete recovery against get_sync_clock. - */ - atomic_clear_mask(0x80000000, sw_ptr); - atomic_inc(sw_ptr); -} - -/* - * Make get_sync_clock return 0 again. - * Needs to be called from a context disabled for preemption. - */ -static void etr_enable_sync_clock(void) -{ - atomic_t *sw_ptr = &__get_cpu_var(etr_sync_word); - atomic_set_mask(0x80000000, sw_ptr); -} - /* * Reset ETR attachment. */ @@ -381,15 +437,13 @@ static void etr_reset(void) .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0, .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0, .es = 0, .sl = 0 }; - if (etr_setr(&etr_eacr) == 0) + if (etr_setr(&etr_eacr) == 0) { etr_tolec = get_clock(); - else { - set_bit(ETR_FLAG_ENOSYS, &etr_flags); - if (etr_port0_online || etr_port1_online) { - printk(KERN_WARNING "Running on non ETR capable " - "machine, only local mode available.\n"); - etr_port0_online = etr_port1_online = 0; - } + set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags); + } else if (etr_port0_online || etr_port1_online) { + printk(KERN_WARNING "Running on non ETR capable " + "machine, only local mode available.\n"); + etr_port0_online = etr_port1_online = 0; } } @@ -397,14 +451,12 @@ static int __init etr_init(void) { struct etr_aib aib; - if (test_bit(ETR_FLAG_ENOSYS, &etr_flags)) + if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) return 0; /* Check if this machine has the steai instruction. */ if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0) - set_bit(ETR_FLAG_STEAI, &etr_flags); + etr_steai_available = 1; setup_timer(&etr_timer, etr_timeout, 0UL); - if (!etr_port0_online && !etr_port1_online) - set_bit(ETR_FLAG_EACCES, &etr_flags); if (etr_port0_online) { set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); schedule_work(&etr_work); @@ -435,7 +487,8 @@ void etr_switch_to_local(void) { if (!etr_eacr.sl) return; - etr_disable_sync_clock(NULL); + if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) + disable_sync_clock(NULL); set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events); schedule_work(&etr_work); } @@ -450,23 +503,21 @@ void etr_sync_check(void) { if (!etr_eacr.es) return; - etr_disable_sync_clock(NULL); + if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) + disable_sync_clock(NULL); set_bit(ETR_EVENT_SYNC_CHECK, &etr_events); schedule_work(&etr_work); } /* - * ETR external interrupt. There are two causes: + * ETR timing alert. There are two causes: * 1) port state change, check the usability of the port * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3) * or ETR-data word 4 (edf4) has changed. */ -static void etr_ext_handler(__u16 code) +static void etr_timing_alert(struct etr_irq_parm *intparm) { - struct etr_interruption_parameter *intparm = - (struct etr_interruption_parameter *) &S390_lowcore.ext_params; - if (intparm->pc0) /* ETR port 0 state change. */ set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events); @@ -591,58 +642,23 @@ static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p) return 1; } -/* - * The time is "clock". old is what we think the time is. - * Adjust the value by a multiple of jiffies and add the delta to ntp. - * "delay" is an approximation how long the synchronization took. If - * the time correction is positive, then "delay" is subtracted from - * the time difference and only the remaining part is passed to ntp. - */ -static unsigned long long etr_adjust_time(unsigned long long old, - unsigned long long clock, - unsigned long long delay) -{ - unsigned long long delta, ticks; - struct timex adjust; - - if (clock > old) { - /* It is later than we thought. */ - delta = ticks = clock - old; - delta = ticks = (delta < delay) ? 0 : delta - delay; - delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); - adjust.offset = ticks * (1000000 / HZ); - } else { - /* It is earlier than we thought. */ - delta = ticks = old - clock; - delta -= do_div(ticks, CLK_TICKS_PER_JIFFY); - delta = -delta; - adjust.offset = -ticks * (1000000 / HZ); - } - jiffies_timer_cc += delta; - if (adjust.offset != 0) { - printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n", - adjust.offset); - adjust.modes = ADJ_OFFSET_SINGLESHOT; - do_adjtimex(&adjust); - } - return delta; -} - -static struct { +struct clock_sync_data { int in_sync; unsigned long long fixup_cc; -} etr_sync; +}; -static void etr_sync_cpu_start(void *dummy) +static void clock_sync_cpu_start(void *dummy) { - etr_enable_sync_clock(); + struct clock_sync_data *sync = dummy; + + enable_sync_clock(); /* * This looks like a busy wait loop but it isn't. etr_sync_cpus * is called on all other cpus while the TOD clocks is stopped. * __udelay will stop the cpu on an enabled wait psw until the * TOD is running again. */ - while (etr_sync.in_sync == 0) { + while (sync->in_sync == 0) { __udelay(1); /* * A different cpu changes *in_sync. Therefore use @@ -650,17 +666,17 @@ static void etr_sync_cpu_start(void *dummy) */ barrier(); } - if (etr_sync.in_sync != 1) + if (sync->in_sync != 1) /* Didn't work. Clear per-cpu in sync bit again. */ - etr_disable_sync_clock(NULL); + disable_sync_clock(NULL); /* * This round of TOD syncing is done. Set the clock comparator * to the next tick and let the processor continue. */ - fixup_clock_comparator(etr_sync.fixup_cc); + fixup_clock_comparator(sync->fixup_cc); } -static void etr_sync_cpu_end(void *dummy) +static void clock_sync_cpu_end(void *dummy) { } @@ -672,6 +688,7 @@ static void etr_sync_cpu_end(void *dummy) static int etr_sync_clock(struct etr_aib *aib, int port) { struct etr_aib *sync_port; + struct clock_sync_data etr_sync; unsigned long long clock, old_clock, delay, delta; int follows; int rc; @@ -690,9 +707,9 @@ static int etr_sync_clock(struct etr_aib *aib, int port) */ memset(&etr_sync, 0, sizeof(etr_sync)); preempt_disable(); - smp_call_function(etr_sync_cpu_start, NULL, 0, 0); + smp_call_function(clock_sync_cpu_start, &etr_sync, 0); local_irq_disable(); - etr_enable_sync_clock(); + enable_sync_clock(); /* Set clock to next OTE. */ __ctl_set_bit(14, 21); @@ -707,13 +724,13 @@ static int etr_sync_clock(struct etr_aib *aib, int port) /* Adjust Linux timing variables. */ delay = (unsigned long long) (aib->edf2.etv - sync_port->edf2.etv) << 32; - delta = etr_adjust_time(old_clock, clock, delay); + delta = adjust_time(old_clock, clock, delay); etr_sync.fixup_cc = delta; fixup_clock_comparator(delta); /* Verify that the clock is properly set. */ if (!etr_aib_follows(sync_port, aib, port)) { /* Didn't work. */ - etr_disable_sync_clock(NULL); + disable_sync_clock(NULL); etr_sync.in_sync = -EAGAIN; rc = -EAGAIN; } else { @@ -724,12 +741,12 @@ static int etr_sync_clock(struct etr_aib *aib, int port) /* Could not set the clock ?!? */ __ctl_clear_bit(0, 29); __ctl_clear_bit(14, 21); - etr_disable_sync_clock(NULL); + disable_sync_clock(NULL); etr_sync.in_sync = -EAGAIN; rc = -EAGAIN; } local_irq_enable(); - smp_call_function(etr_sync_cpu_end,NULL,0,0); + smp_call_function(clock_sync_cpu_end, NULL, 0); preempt_enable(); return rc; } @@ -832,7 +849,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib, * Do not try to get the alternate port aib if the clock * is not in sync yet. */ - if (!eacr.es) + if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es) return eacr; /* @@ -840,7 +857,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib, * the other port immediately. If only stetr is available the * data-port bit toggle has to be used. */ - if (test_bit(ETR_FLAG_STEAI, &etr_flags)) { + if (etr_steai_available) { if (eacr.p0 && !etr_port0_uptodate) { etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0); etr_port0_uptodate = 1; @@ -909,10 +926,10 @@ static void etr_work_fn(struct work_struct *work) if (!eacr.ea) { /* Both ports offline. Reset everything. */ eacr.dp = eacr.es = eacr.sl = 0; - on_each_cpu(etr_disable_sync_clock, NULL, 0, 1); + on_each_cpu(disable_sync_clock, NULL, 1); del_timer_sync(&etr_timer); etr_update_eacr(eacr); - set_bit(ETR_FLAG_EACCES, &etr_flags); + clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); return; } @@ -953,7 +970,6 @@ static void etr_work_fn(struct work_struct *work) eacr.e1 = 1; sync_port = (etr_port0_uptodate && etr_port_valid(&etr_port0, 0)) ? 0 : -1; - clear_bit(ETR_FLAG_EACCES, &etr_flags); } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) { eacr.sl = 0; eacr.e0 = 0; @@ -962,7 +978,6 @@ static void etr_work_fn(struct work_struct *work) eacr.es = 0; sync_port = (etr_port1_uptodate && etr_port_valid(&etr_port1, 1)) ? 1 : -1; - clear_bit(ETR_FLAG_EACCES, &etr_flags); } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) { eacr.sl = 1; eacr.e0 = 1; @@ -976,7 +991,6 @@ static void etr_work_fn(struct work_struct *work) eacr.e1 = 1; sync_port = (etr_port0_uptodate && etr_port_valid(&etr_port0, 0)) ? 0 : -1; - clear_bit(ETR_FLAG_EACCES, &etr_flags); } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) { eacr.sl = 1; eacr.e0 = 0; @@ -985,19 +999,22 @@ static void etr_work_fn(struct work_struct *work) eacr.es = 0; sync_port = (etr_port1_uptodate && etr_port_valid(&etr_port1, 1)) ? 1 : -1; - clear_bit(ETR_FLAG_EACCES, &etr_flags); } else { /* Both ports not usable. */ eacr.es = eacr.sl = 0; sync_port = -1; - set_bit(ETR_FLAG_EACCES, &etr_flags); + clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); } + if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) + eacr.es = 0; + /* * If the clock is in sync just update the eacr and return. * If there is no valid sync port wait for a port update. */ - if (eacr.es || sync_port < 0) { + if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) || + eacr.es || sync_port < 0) { etr_update_eacr(eacr); etr_set_tolec_timeout(now); return; @@ -1018,11 +1035,13 @@ static void etr_work_fn(struct work_struct *work) * and set up a timer to try again after 0.5 seconds */ etr_update_eacr(eacr); + set_bit(CLOCK_SYNC_ETR, &clock_sync_flags); if (now < etr_tolec + (1600000 << 12) || etr_sync_clock(&aib, sync_port) != 0) { /* Sync failed. Try again in 1/2 second. */ eacr.es = 0; etr_update_eacr(eacr); + clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags); etr_set_sync_timeout(); } else etr_set_tolec_timeout(now); @@ -1081,7 +1100,9 @@ static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev) return etr_port1_online ? &etr_port1 : NULL; } -static ssize_t etr_online_show(struct sys_device *dev, char *buf) +static ssize_t etr_online_show(struct sys_device *dev, + struct sysdev_attribute *attr, + char *buf) { unsigned int online; @@ -1090,15 +1111,16 @@ static ssize_t etr_online_show(struct sys_device *dev, char *buf) } static ssize_t etr_online_store(struct sys_device *dev, - const char *buf, size_t count) + struct sysdev_attribute *attr, + const char *buf, size_t count) { unsigned int value; value = simple_strtoul(buf, NULL, 0); if (value != 0 && value != 1) return -EINVAL; - if (test_bit(ETR_FLAG_ENOSYS, &etr_flags)) - return -ENOSYS; + if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags)) + return -EOPNOTSUPP; if (dev == &etr_port0_dev) { if (etr_port0_online == value) return count; /* Nothing to do. */ @@ -1117,7 +1139,9 @@ static ssize_t etr_online_store(struct sys_device *dev, static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store); -static ssize_t etr_stepping_control_show(struct sys_device *dev, char *buf) +static ssize_t etr_stepping_control_show(struct sys_device *dev, + struct sysdev_attribute *attr, + char *buf) { return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ? etr_eacr.e0 : etr_eacr.e1); @@ -1125,7 +1149,8 @@ static ssize_t etr_stepping_control_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL); -static ssize_t etr_mode_code_show(struct sys_device *dev, char *buf) +static ssize_t etr_mode_code_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { if (!etr_port0_online && !etr_port1_online) /* Status word is not uptodate if both ports are offline. */ @@ -1136,7 +1161,8 @@ static ssize_t etr_mode_code_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL); -static ssize_t etr_untuned_show(struct sys_device *dev, char *buf) +static ssize_t etr_untuned_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1147,7 +1173,8 @@ static ssize_t etr_untuned_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL); -static ssize_t etr_network_id_show(struct sys_device *dev, char *buf) +static ssize_t etr_network_id_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1158,7 +1185,8 @@ static ssize_t etr_network_id_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL); -static ssize_t etr_id_show(struct sys_device *dev, char *buf) +static ssize_t etr_id_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1169,7 +1197,8 @@ static ssize_t etr_id_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(id, 0400, etr_id_show, NULL); -static ssize_t etr_port_number_show(struct sys_device *dev, char *buf) +static ssize_t etr_port_number_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1180,7 +1209,8 @@ static ssize_t etr_port_number_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL); -static ssize_t etr_coupled_show(struct sys_device *dev, char *buf) +static ssize_t etr_coupled_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1191,7 +1221,8 @@ static ssize_t etr_coupled_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL); -static ssize_t etr_local_time_show(struct sys_device *dev, char *buf) +static ssize_t etr_local_time_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1202,7 +1233,8 @@ static ssize_t etr_local_time_show(struct sys_device *dev, char *buf) static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL); -static ssize_t etr_utc_offset_show(struct sys_device *dev, char *buf) +static ssize_t etr_utc_offset_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct etr_aib *aib = etr_aib_from_dev(dev); @@ -1292,3 +1324,318 @@ out: } device_initcall(etr_init_sysfs); + +/* + * Server Time Protocol (STP) code. + */ +static int stp_online; +static struct stp_sstpi stp_info; +static void *stp_page; + +static void stp_work_fn(struct work_struct *work); +static DECLARE_WORK(stp_work, stp_work_fn); + +static int __init early_parse_stp(char *p) +{ + if (strncmp(p, "off", 3) == 0) + stp_online = 0; + else if (strncmp(p, "on", 2) == 0) + stp_online = 1; + return 0; +} +early_param("stp", early_parse_stp); + +/* + * Reset STP attachment. + */ +static void stp_reset(void) +{ + int rc; + + stp_page = alloc_bootmem_pages(PAGE_SIZE); + rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); + if (rc == 1) + set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags); + else if (stp_online) { + printk(KERN_WARNING "Running on non STP capable machine.\n"); + free_bootmem((unsigned long) stp_page, PAGE_SIZE); + stp_page = NULL; + stp_online = 0; + } +} + +static int __init stp_init(void) +{ + if (test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags) && stp_online) + schedule_work(&stp_work); + return 0; +} + +arch_initcall(stp_init); + +/* + * STP timing alert. There are three causes: + * 1) timing status change + * 2) link availability change + * 3) time control parameter change + * In all three cases we are only interested in the clock source state. + * If a STP clock source is now available use it. + */ +static void stp_timing_alert(struct stp_irq_parm *intparm) +{ + if (intparm->tsc || intparm->lac || intparm->tcpc) + schedule_work(&stp_work); +} + +/* + * STP sync check machine check. This is called when the timing state + * changes from the synchronized state to the unsynchronized state. + * After a STP sync check the clock is not in sync. The machine check + * is broadcasted to all cpus at the same time. + */ +void stp_sync_check(void) +{ + if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) + return; + disable_sync_clock(NULL); + schedule_work(&stp_work); +} + +/* + * STP island condition machine check. This is called when an attached + * server attempts to communicate over an STP link and the servers + * have matching CTN ids and have a valid stratum-1 configuration + * but the configurations do not match. + */ +void stp_island_check(void) +{ + if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags)) + return; + disable_sync_clock(NULL); + schedule_work(&stp_work); +} + +/* + * STP tasklet. Check for the STP state and take over the clock + * synchronization if the STP clock source is usable. + */ +static void stp_work_fn(struct work_struct *work) +{ + struct clock_sync_data stp_sync; + unsigned long long old_clock, delta; + int rc; + + if (!stp_online) { + chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000); + return; + } + + rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0); + if (rc) + return; + + rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi)); + if (rc || stp_info.c == 0) + return; + + /* + * Catch all other cpus and make them wait until we have + * successfully synced the clock. smp_call_function will + * return after all other cpus are in clock_sync_cpu_start. + */ + memset(&stp_sync, 0, sizeof(stp_sync)); + preempt_disable(); + smp_call_function(clock_sync_cpu_start, &stp_sync, 0); + local_irq_disable(); + enable_sync_clock(); + + set_bit(CLOCK_SYNC_STP, &clock_sync_flags); + if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags)) + schedule_work(&etr_work); + + rc = 0; + if (stp_info.todoff[0] || stp_info.todoff[1] || + stp_info.todoff[2] || stp_info.todoff[3] || + stp_info.tmd != 2) { + old_clock = get_clock(); + rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0); + if (rc == 0) { + delta = adjust_time(old_clock, get_clock(), 0); + fixup_clock_comparator(delta); + rc = chsc_sstpi(stp_page, &stp_info, + sizeof(struct stp_sstpi)); + if (rc == 0 && stp_info.tmd != 2) + rc = -EAGAIN; + } + } + if (rc) { + disable_sync_clock(NULL); + stp_sync.in_sync = -EAGAIN; + clear_bit(CLOCK_SYNC_STP, &clock_sync_flags); + if (etr_port0_online || etr_port1_online) + schedule_work(&etr_work); + } else + stp_sync.in_sync = 1; + + local_irq_enable(); + smp_call_function(clock_sync_cpu_end, NULL, 0); + preempt_enable(); +} + +/* + * STP class sysfs interface functions + */ +static struct sysdev_class stp_sysclass = { + .name = "stp", +}; + +static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online) + return -ENODATA; + return sprintf(buf, "%016llx\n", + *(unsigned long long *) stp_info.ctnid); +} + +static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL); + +static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online) + return -ENODATA; + return sprintf(buf, "%i\n", stp_info.ctn); +} + +static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL); + +static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online || !(stp_info.vbits & 0x2000)) + return -ENODATA; + return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto); +} + +static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL); + +static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online || !(stp_info.vbits & 0x8000)) + return -ENODATA; + return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps); +} + +static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL); + +static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online) + return -ENODATA; + return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum); +} + +static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL); + +static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online || !(stp_info.vbits & 0x0800)) + return -ENODATA; + return sprintf(buf, "%i\n", (int) stp_info.tto); +} + +static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL); + +static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online || !(stp_info.vbits & 0x4000)) + return -ENODATA; + return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo); +} + +static SYSDEV_CLASS_ATTR(time_zone_offset, 0400, + stp_time_zone_offset_show, NULL); + +static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online) + return -ENODATA; + return sprintf(buf, "%i\n", stp_info.tmd); +} + +static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL); + +static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf) +{ + if (!stp_online) + return -ENODATA; + return sprintf(buf, "%i\n", stp_info.tst); +} + +static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL); + +static ssize_t stp_online_show(struct sysdev_class *class, char *buf) +{ + return sprintf(buf, "%i\n", stp_online); +} + +static ssize_t stp_online_store(struct sysdev_class *class, + const char *buf, size_t count) +{ + unsigned int value; + + value = simple_strtoul(buf, NULL, 0); + if (value != 0 && value != 1) + return -EINVAL; + if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags)) + return -EOPNOTSUPP; + stp_online = value; + schedule_work(&stp_work); + return count; +} + +/* + * Can't use SYSDEV_CLASS_ATTR because the attribute should be named + * stp/online but attr_online already exists in this file .. + */ +static struct sysdev_class_attribute attr_stp_online = { + .attr = { .name = "online", .mode = 0600 }, + .show = stp_online_show, + .store = stp_online_store, +}; + +static struct sysdev_class_attribute *stp_attributes[] = { + &attr_ctn_id, + &attr_ctn_type, + &attr_dst_offset, + &attr_leap_seconds, + &attr_stp_online, + &attr_stratum, + &attr_time_offset, + &attr_time_zone_offset, + &attr_timing_mode, + &attr_timing_state, + NULL +}; + +static int __init stp_init_sysfs(void) +{ + struct sysdev_class_attribute **attr; + int rc; + + rc = sysdev_class_register(&stp_sysclass); + if (rc) + goto out; + for (attr = stp_attributes; *attr; attr++) { + rc = sysdev_class_create_file(&stp_sysclass, *attr); + if (rc) + goto out_unreg; + } + return 0; +out_unreg: + for (; attr >= stp_attributes; attr--) + sysdev_class_remove_file(&stp_sysclass, *attr); + sysdev_class_unregister(&stp_sysclass); +out: + return rc; +} + +device_initcall(stp_init_sysfs); diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c index 661a07217057a37b8d08b7ad85c8d4a2508a2bd0..632b13e100538704758cea2eebd75c6cfdc15bf7 100644 --- a/arch/s390/kernel/topology.c +++ b/arch/s390/kernel/topology.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -230,20 +229,9 @@ void arch_update_cpu_topology(void) } } -static int topology_kthread(void *data) -{ - arch_reinit_sched_domains(); - return 0; -} - static void topology_work_fn(struct work_struct *work) { - /* We can't call arch_reinit_sched_domains() from a multi-threaded - * workqueue context since it may deadlock in case of cpu hotplug. - * So we have to create a kernel thread in order to call - * arch_reinit_sched_domains(). - */ - kthread_run(topology_kthread, NULL, "topology_update"); + arch_reinit_sched_domains(); } void topology_schedule_update(void) @@ -313,8 +301,6 @@ void __init s390_init_cpu_topology(void) machine_has_topology_irq = 1; tl_info = alloc_bootmem_pages(PAGE_SIZE); - if (!tl_info) - goto error; info = tl_info; stsi(info, 15, 1, 2); diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S index b4607155e8d0b930c98b8a913d050a08d47b9e4a..76c1e60c92f3fae3e88d03eb9a299536288dee40 100644 --- a/arch/s390/kernel/vmlinux.lds.S +++ b/arch/s390/kernel/vmlinux.lds.S @@ -40,7 +40,6 @@ SECTIONS _etext = .; /* End of text section */ NOTES :text :note - BUG_TABLE :text RODATA diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c index ca90ee3f930edc0ffc364d8a094826df731b3415..0fa5dc5d68e1dc2973459d60a71c491f59c6b631 100644 --- a/arch/s390/kernel/vtime.c +++ b/arch/s390/kernel/vtime.c @@ -136,7 +136,7 @@ static inline void set_vtimer(__u64 expires) } #endif -static void start_cpu_timer(void) +void vtime_start_cpu_timer(void) { struct vtimer_queue *vt_list; @@ -150,7 +150,7 @@ static void start_cpu_timer(void) set_vtimer(vt_list->idle); } -static void stop_cpu_timer(void) +void vtime_stop_cpu_timer(void) { struct vtimer_queue *vt_list; @@ -318,8 +318,7 @@ static void internal_add_vtimer(struct vtimer_list *timer) vt_list = &per_cpu(virt_cpu_timer, timer->cpu); spin_lock_irqsave(&vt_list->lock, flags); - if (timer->cpu != smp_processor_id()) - printk("internal_add_vtimer: BUG, running on wrong CPU"); + BUG_ON(timer->cpu != smp_processor_id()); /* if list is empty we only have to set the timer */ if (list_empty(&vt_list->list)) { @@ -353,25 +352,12 @@ static void internal_add_vtimer(struct vtimer_list *timer) put_cpu(); } -static inline int prepare_vtimer(struct vtimer_list *timer) +static inline void prepare_vtimer(struct vtimer_list *timer) { - if (!timer->function) { - printk("add_virt_timer: uninitialized timer\n"); - return -EINVAL; - } - - if (!timer->expires || timer->expires > VTIMER_MAX_SLICE) { - printk("add_virt_timer: invalid timer expire value!\n"); - return -EINVAL; - } - - if (vtimer_pending(timer)) { - printk("add_virt_timer: timer pending\n"); - return -EBUSY; - } - + BUG_ON(!timer->function); + BUG_ON(!timer->expires || timer->expires > VTIMER_MAX_SLICE); + BUG_ON(vtimer_pending(timer)); timer->cpu = get_cpu(); - return 0; } /* @@ -382,10 +368,7 @@ void add_virt_timer(void *new) struct vtimer_list *timer; timer = (struct vtimer_list *)new; - - if (prepare_vtimer(timer) < 0) - return; - + prepare_vtimer(timer); timer->interval = 0; internal_add_vtimer(timer); } @@ -399,10 +382,7 @@ void add_virt_timer_periodic(void *new) struct vtimer_list *timer; timer = (struct vtimer_list *)new; - - if (prepare_vtimer(timer) < 0) - return; - + prepare_vtimer(timer); timer->interval = timer->expires; internal_add_vtimer(timer); } @@ -423,15 +403,8 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires) unsigned long flags; int cpu; - if (!timer->function) { - printk("mod_virt_timer: uninitialized timer\n"); - return -EINVAL; - } - - if (!expires || expires > VTIMER_MAX_SLICE) { - printk("mod_virt_timer: invalid expire range\n"); - return -EINVAL; - } + BUG_ON(!timer->function); + BUG_ON(!expires || expires > VTIMER_MAX_SLICE); /* * This is a common optimization triggered by the @@ -444,6 +417,9 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires) cpu = get_cpu(); vt_list = &per_cpu(virt_cpu_timer, cpu); + /* check if we run on the right CPU */ + BUG_ON(timer->cpu != cpu); + /* disable interrupts before test if timer is pending */ spin_lock_irqsave(&vt_list->lock, flags); @@ -458,14 +434,6 @@ int mod_virt_timer(struct vtimer_list *timer, __u64 expires) return 0; } - /* check if we run on the right CPU */ - if (timer->cpu != cpu) { - printk("mod_virt_timer: running on wrong CPU, check your code\n"); - spin_unlock_irqrestore(&vt_list->lock, flags); - put_cpu(); - return -EINVAL; - } - list_del_init(&timer->entry); timer->expires = expires; @@ -536,24 +504,6 @@ void init_cpu_vtimer(void) } -static int vtimer_idle_notify(struct notifier_block *self, - unsigned long action, void *hcpu) -{ - switch (action) { - case S390_CPU_IDLE: - stop_cpu_timer(); - break; - case S390_CPU_NOT_IDLE: - start_cpu_timer(); - break; - } - return NOTIFY_OK; -} - -static struct notifier_block vtimer_idle_nb = { - .notifier_call = vtimer_idle_notify, -}; - void __init vtime_init(void) { /* request the cpu timer external interrupt */ @@ -561,9 +511,6 @@ void __init vtime_init(void) &ext_int_info_timer) != 0) panic("Couldn't request external interrupt 0x1005"); - if (register_idle_notifier(&vtimer_idle_nb)) - panic("Couldn't register idle notifier"); - /* Enable cpu timer interrupts on the boot cpu. */ init_cpu_vtimer(); } diff --git a/arch/s390/kvm/gaccess.h b/arch/s390/kvm/gaccess.h index 4e0633c413f3841dc1132c39d06dc5645b57f66d..ed60f3a74a85f1ca6a8e994a974fc2bba6dd1652 100644 --- a/arch/s390/kvm/gaccess.h +++ b/arch/s390/kvm/gaccess.h @@ -18,11 +18,11 @@ #include static inline void __user *__guestaddr_to_user(struct kvm_vcpu *vcpu, - u64 guestaddr) + unsigned long guestaddr) { - u64 prefix = vcpu->arch.sie_block->prefix; - u64 origin = vcpu->kvm->arch.guest_origin; - u64 memsize = vcpu->kvm->arch.guest_memsize; + unsigned long prefix = vcpu->arch.sie_block->prefix; + unsigned long origin = vcpu->kvm->arch.guest_origin; + unsigned long memsize = vcpu->kvm->arch.guest_memsize; if (guestaddr < 2 * PAGE_SIZE) guestaddr += prefix; @@ -37,7 +37,7 @@ static inline void __user *__guestaddr_to_user(struct kvm_vcpu *vcpu, return (void __user *) guestaddr; } -static inline int get_guest_u64(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int get_guest_u64(struct kvm_vcpu *vcpu, unsigned long guestaddr, u64 *result) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -47,10 +47,10 @@ static inline int get_guest_u64(struct kvm_vcpu *vcpu, u64 guestaddr, if (IS_ERR((void __force *) uptr)) return PTR_ERR((void __force *) uptr); - return get_user(*result, (u64 __user *) uptr); + return get_user(*result, (unsigned long __user *) uptr); } -static inline int get_guest_u32(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int get_guest_u32(struct kvm_vcpu *vcpu, unsigned long guestaddr, u32 *result) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -63,7 +63,7 @@ static inline int get_guest_u32(struct kvm_vcpu *vcpu, u64 guestaddr, return get_user(*result, (u32 __user *) uptr); } -static inline int get_guest_u16(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int get_guest_u16(struct kvm_vcpu *vcpu, unsigned long guestaddr, u16 *result) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -76,7 +76,7 @@ static inline int get_guest_u16(struct kvm_vcpu *vcpu, u64 guestaddr, return get_user(*result, (u16 __user *) uptr); } -static inline int get_guest_u8(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int get_guest_u8(struct kvm_vcpu *vcpu, unsigned long guestaddr, u8 *result) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -87,7 +87,7 @@ static inline int get_guest_u8(struct kvm_vcpu *vcpu, u64 guestaddr, return get_user(*result, (u8 __user *) uptr); } -static inline int put_guest_u64(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int put_guest_u64(struct kvm_vcpu *vcpu, unsigned long guestaddr, u64 value) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -100,7 +100,7 @@ static inline int put_guest_u64(struct kvm_vcpu *vcpu, u64 guestaddr, return put_user(value, (u64 __user *) uptr); } -static inline int put_guest_u32(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int put_guest_u32(struct kvm_vcpu *vcpu, unsigned long guestaddr, u32 value) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -113,7 +113,7 @@ static inline int put_guest_u32(struct kvm_vcpu *vcpu, u64 guestaddr, return put_user(value, (u32 __user *) uptr); } -static inline int put_guest_u16(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int put_guest_u16(struct kvm_vcpu *vcpu, unsigned long guestaddr, u16 value) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -126,7 +126,7 @@ static inline int put_guest_u16(struct kvm_vcpu *vcpu, u64 guestaddr, return put_user(value, (u16 __user *) uptr); } -static inline int put_guest_u8(struct kvm_vcpu *vcpu, u64 guestaddr, +static inline int put_guest_u8(struct kvm_vcpu *vcpu, unsigned long guestaddr, u8 value) { void __user *uptr = __guestaddr_to_user(vcpu, guestaddr); @@ -138,7 +138,8 @@ static inline int put_guest_u8(struct kvm_vcpu *vcpu, u64 guestaddr, } -static inline int __copy_to_guest_slow(struct kvm_vcpu *vcpu, u64 guestdest, +static inline int __copy_to_guest_slow(struct kvm_vcpu *vcpu, + unsigned long guestdest, const void *from, unsigned long n) { int rc; @@ -153,12 +154,12 @@ static inline int __copy_to_guest_slow(struct kvm_vcpu *vcpu, u64 guestdest, return 0; } -static inline int copy_to_guest(struct kvm_vcpu *vcpu, u64 guestdest, +static inline int copy_to_guest(struct kvm_vcpu *vcpu, unsigned long guestdest, const void *from, unsigned long n) { - u64 prefix = vcpu->arch.sie_block->prefix; - u64 origin = vcpu->kvm->arch.guest_origin; - u64 memsize = vcpu->kvm->arch.guest_memsize; + unsigned long prefix = vcpu->arch.sie_block->prefix; + unsigned long origin = vcpu->kvm->arch.guest_origin; + unsigned long memsize = vcpu->kvm->arch.guest_memsize; if ((guestdest < 2 * PAGE_SIZE) && (guestdest + n > 2 * PAGE_SIZE)) goto slowpath; @@ -189,7 +190,8 @@ slowpath: } static inline int __copy_from_guest_slow(struct kvm_vcpu *vcpu, void *to, - u64 guestsrc, unsigned long n) + unsigned long guestsrc, + unsigned long n) { int rc; unsigned long i; @@ -204,11 +206,11 @@ static inline int __copy_from_guest_slow(struct kvm_vcpu *vcpu, void *to, } static inline int copy_from_guest(struct kvm_vcpu *vcpu, void *to, - u64 guestsrc, unsigned long n) + unsigned long guestsrc, unsigned long n) { - u64 prefix = vcpu->arch.sie_block->prefix; - u64 origin = vcpu->kvm->arch.guest_origin; - u64 memsize = vcpu->kvm->arch.guest_memsize; + unsigned long prefix = vcpu->arch.sie_block->prefix; + unsigned long origin = vcpu->kvm->arch.guest_origin; + unsigned long memsize = vcpu->kvm->arch.guest_memsize; if ((guestsrc < 2 * PAGE_SIZE) && (guestsrc + n > 2 * PAGE_SIZE)) goto slowpath; @@ -238,11 +240,12 @@ slowpath: return __copy_from_guest_slow(vcpu, to, guestsrc, n); } -static inline int copy_to_guest_absolute(struct kvm_vcpu *vcpu, u64 guestdest, +static inline int copy_to_guest_absolute(struct kvm_vcpu *vcpu, + unsigned long guestdest, const void *from, unsigned long n) { - u64 origin = vcpu->kvm->arch.guest_origin; - u64 memsize = vcpu->kvm->arch.guest_memsize; + unsigned long origin = vcpu->kvm->arch.guest_origin; + unsigned long memsize = vcpu->kvm->arch.guest_memsize; if (guestdest + n > memsize) return -EFAULT; @@ -256,10 +259,11 @@ static inline int copy_to_guest_absolute(struct kvm_vcpu *vcpu, u64 guestdest, } static inline int copy_from_guest_absolute(struct kvm_vcpu *vcpu, void *to, - u64 guestsrc, unsigned long n) + unsigned long guestsrc, + unsigned long n) { - u64 origin = vcpu->kvm->arch.guest_origin; - u64 memsize = vcpu->kvm->arch.guest_memsize; + unsigned long origin = vcpu->kvm->arch.guest_origin; + unsigned long memsize = vcpu->kvm->arch.guest_memsize; if (guestsrc + n > memsize) return -EFAULT; diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c index 47a0b642174c1ef807ca5d16774f9d10c6584197..61236102203e8746933ae96dab4876b421d901d6 100644 --- a/arch/s390/kvm/intercept.c +++ b/arch/s390/kvm/intercept.c @@ -20,7 +20,7 @@ #include "kvm-s390.h" #include "gaccess.h" -static int handle_lctg(struct kvm_vcpu *vcpu) +static int handle_lctlg(struct kvm_vcpu *vcpu) { int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; int reg3 = vcpu->arch.sie_block->ipa & 0x000f; @@ -30,7 +30,7 @@ static int handle_lctg(struct kvm_vcpu *vcpu) u64 useraddr; int reg, rc; - vcpu->stat.instruction_lctg++; + vcpu->stat.instruction_lctlg++; if ((vcpu->arch.sie_block->ipb & 0xff) != 0x2f) return -ENOTSUPP; @@ -38,9 +38,12 @@ static int handle_lctg(struct kvm_vcpu *vcpu) if (base2) useraddr += vcpu->arch.guest_gprs[base2]; + if (useraddr & 7) + return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); + reg = reg1; - VCPU_EVENT(vcpu, 5, "lctg r1:%x, r3:%x,b2:%x,d2:%x", reg1, reg3, base2, + VCPU_EVENT(vcpu, 5, "lctlg r1:%x, r3:%x,b2:%x,d2:%x", reg1, reg3, base2, disp2); do { @@ -74,6 +77,9 @@ static int handle_lctl(struct kvm_vcpu *vcpu) if (base2) useraddr += vcpu->arch.guest_gprs[base2]; + if (useraddr & 3) + return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); + VCPU_EVENT(vcpu, 5, "lctl r1:%x, r3:%x,b2:%x,d2:%x", reg1, reg3, base2, disp2); @@ -99,7 +105,7 @@ static intercept_handler_t instruction_handlers[256] = { [0xae] = kvm_s390_handle_sigp, [0xb2] = kvm_s390_handle_priv, [0xb7] = handle_lctl, - [0xeb] = handle_lctg, + [0xeb] = handle_lctlg, }; static int handle_noop(struct kvm_vcpu *vcpu) diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c index 84a7fed4cd4e1462199cf68733db2196dbc2df69..2960702b48246488087546669b1459524ead2958 100644 --- a/arch/s390/kvm/interrupt.c +++ b/arch/s390/kvm/interrupt.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "kvm-s390.h" #include "gaccess.h" @@ -31,7 +32,7 @@ static int psw_interrupts_disabled(struct kvm_vcpu *vcpu) } static int __interrupt_is_deliverable(struct kvm_vcpu *vcpu, - struct interrupt_info *inti) + struct kvm_s390_interrupt_info *inti) { switch (inti->type) { case KVM_S390_INT_EMERGENCY: @@ -91,7 +92,7 @@ static void __set_cpuflag(struct kvm_vcpu *vcpu, u32 flag) } static void __set_intercept_indicator(struct kvm_vcpu *vcpu, - struct interrupt_info *inti) + struct kvm_s390_interrupt_info *inti) { switch (inti->type) { case KVM_S390_INT_EMERGENCY: @@ -111,7 +112,7 @@ static void __set_intercept_indicator(struct kvm_vcpu *vcpu, } static void __do_deliver_interrupt(struct kvm_vcpu *vcpu, - struct interrupt_info *inti) + struct kvm_s390_interrupt_info *inti) { const unsigned short table[] = { 2, 4, 4, 6 }; int rc, exception = 0; @@ -246,15 +247,10 @@ static void __do_deliver_interrupt(struct kvm_vcpu *vcpu, default: BUG(); } - if (exception) { - VCPU_EVENT(vcpu, 1, "%s", "program exception while delivering" - " interrupt"); - kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); - if (inti->type == KVM_S390_PROGRAM_INT) { - printk(KERN_WARNING "kvm: recursive program check\n"); - BUG(); - } + printk("kvm: The guest lowcore is not mapped during interrupt " + "delivery, killing userspace\n"); + do_exit(SIGKILL); } } @@ -277,22 +273,19 @@ static int __try_deliver_ckc_interrupt(struct kvm_vcpu *vcpu) __LC_EXT_NEW_PSW, sizeof(psw_t)); if (rc == -EFAULT) exception = 1; - if (exception) { - VCPU_EVENT(vcpu, 1, "%s", "program exception while delivering" \ - " ckc interrupt"); - kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); - return 0; + printk("kvm: The guest lowcore is not mapped during interrupt " + "delivery, killing userspace\n"); + do_exit(SIGKILL); } - return 1; } int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu) { - struct local_interrupt *li = &vcpu->arch.local_int; - struct float_interrupt *fi = vcpu->arch.local_int.float_int; - struct interrupt_info *inti; + struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int; + struct kvm_s390_float_interrupt *fi = vcpu->arch.local_int.float_int; + struct kvm_s390_interrupt_info *inti; int rc = 0; if (atomic_read(&li->active)) { @@ -408,9 +401,9 @@ void kvm_s390_idle_wakeup(unsigned long data) void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu) { - struct local_interrupt *li = &vcpu->arch.local_int; - struct float_interrupt *fi = vcpu->arch.local_int.float_int; - struct interrupt_info *n, *inti = NULL; + struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int; + struct kvm_s390_float_interrupt *fi = vcpu->arch.local_int.float_int; + struct kvm_s390_interrupt_info *n, *inti = NULL; int deliver; __reset_intercept_indicators(vcpu); @@ -465,8 +458,8 @@ void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu) int kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code) { - struct local_interrupt *li = &vcpu->arch.local_int; - struct interrupt_info *inti; + struct kvm_s390_local_interrupt *li = &vcpu->arch.local_int; + struct kvm_s390_interrupt_info *inti; inti = kzalloc(sizeof(*inti), GFP_KERNEL); if (!inti) @@ -487,9 +480,9 @@ int kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code) int kvm_s390_inject_vm(struct kvm *kvm, struct kvm_s390_interrupt *s390int) { - struct local_interrupt *li; - struct float_interrupt *fi; - struct interrupt_info *inti; + struct kvm_s390_local_interrupt *li; + struct kvm_s390_float_interrupt *fi; + struct kvm_s390_interrupt_info *inti; int sigcpu; inti = kzalloc(sizeof(*inti), GFP_KERNEL); @@ -544,8 +537,8 @@ int kvm_s390_inject_vm(struct kvm *kvm, int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu, struct kvm_s390_interrupt *s390int) { - struct local_interrupt *li; - struct interrupt_info *inti; + struct kvm_s390_local_interrupt *li; + struct kvm_s390_interrupt_info *inti; inti = kzalloc(sizeof(*inti), GFP_KERNEL); if (!inti) diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c index 6558b09ff579fa9ae3fe11de2191f783525adff1..8b00eb2ddf57459c9469d8455d0762d365a71c1f 100644 --- a/arch/s390/kvm/kvm-s390.c +++ b/arch/s390/kvm/kvm-s390.c @@ -39,7 +39,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { { "exit_instruction", VCPU_STAT(exit_instruction) }, { "exit_program_interruption", VCPU_STAT(exit_program_interruption) }, { "exit_instr_and_program_int", VCPU_STAT(exit_instr_and_program) }, - { "instruction_lctg", VCPU_STAT(instruction_lctg) }, + { "instruction_lctlg", VCPU_STAT(instruction_lctlg) }, { "instruction_lctl", VCPU_STAT(instruction_lctl) }, { "deliver_emergency_signal", VCPU_STAT(deliver_emergency_signal) }, { "deliver_service_signal", VCPU_STAT(deliver_service_signal) }, @@ -79,10 +79,6 @@ void kvm_arch_hardware_disable(void *garbage) { } -void decache_vcpus_on_cpu(int cpu) -{ -} - int kvm_arch_hardware_setup(void) { return 0; @@ -116,7 +112,12 @@ long kvm_arch_dev_ioctl(struct file *filp, int kvm_dev_ioctl_check_extension(long ext) { - return 0; + switch (ext) { + case KVM_CAP_USER_MEMORY: + return 1; + default: + return 0; + } } /* Section: vm related */ @@ -198,6 +199,7 @@ out_nokvm: void kvm_arch_destroy_vm(struct kvm *kvm) { debug_unregister(kvm->arch.dbf); + kvm_free_physmem(kvm); free_page((unsigned long)(kvm->arch.sca)); kfree(kvm); module_put(THIS_MODULE); @@ -250,11 +252,16 @@ static void kvm_s390_vcpu_initial_reset(struct kvm_vcpu *vcpu) vcpu->arch.sie_block->gbea = 1; } +/* The current code can have up to 256 pages for virtio */ +#define VIRTIODESCSPACE (256ul * 4096ul) + int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) { atomic_set(&vcpu->arch.sie_block->cpuflags, CPUSTAT_ZARCH); - vcpu->arch.sie_block->gmslm = 0xffffffffffUL; - vcpu->arch.sie_block->gmsor = 0x000000000000; + vcpu->arch.sie_block->gmslm = vcpu->kvm->arch.guest_memsize + + vcpu->kvm->arch.guest_origin + + VIRTIODESCSPACE - 1ul; + vcpu->arch.sie_block->gmsor = vcpu->kvm->arch.guest_origin; vcpu->arch.sie_block->ecb = 2; vcpu->arch.sie_block->eca = 0xC1002001U; setup_timer(&vcpu->arch.ckc_timer, kvm_s390_idle_wakeup, @@ -273,7 +280,8 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, if (!vcpu) goto out_nomem; - vcpu->arch.sie_block = (struct sie_block *) get_zeroed_page(GFP_KERNEL); + vcpu->arch.sie_block = (struct kvm_s390_sie_block *) + get_zeroed_page(GFP_KERNEL); if (!vcpu->arch.sie_block) goto out_free_cpu; @@ -672,6 +680,10 @@ int kvm_arch_set_memory_region(struct kvm *kvm, return 0; } +void kvm_arch_flush_shadow(struct kvm *kvm) +{ +} + gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) { return gfn; diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c index c02286c6a9315efcd4936e79a9798f2c16bf256f..2e2d2ffb6a0758932d60fd5ee86de9e63160b8ff 100644 --- a/arch/s390/kvm/priv.c +++ b/arch/s390/kvm/priv.c @@ -199,7 +199,7 @@ out: static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem) { - struct float_interrupt *fi = &vcpu->kvm->arch.float_int; + struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int; int cpus = 0; int n; diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c index 0a236acfb5f6f472226845684697e77732ee1a75..170392687ce042f64c69ea7f4fe85d863025b768 100644 --- a/arch/s390/kvm/sigp.c +++ b/arch/s390/kvm/sigp.c @@ -43,9 +43,10 @@ #define SIGP_STAT_RECEIVER_CHECK 0x00000001UL -static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr, u64 *reg) +static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr, + unsigned long *reg) { - struct float_interrupt *fi = &vcpu->kvm->arch.float_int; + struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int; int rc; if (cpu_addr >= KVM_MAX_VCPUS) @@ -71,9 +72,9 @@ static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr, u64 *reg) static int __sigp_emergency(struct kvm_vcpu *vcpu, u16 cpu_addr) { - struct float_interrupt *fi = &vcpu->kvm->arch.float_int; - struct local_interrupt *li; - struct interrupt_info *inti; + struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int; + struct kvm_s390_local_interrupt *li; + struct kvm_s390_interrupt_info *inti; int rc; if (cpu_addr >= KVM_MAX_VCPUS) @@ -108,9 +109,9 @@ unlock: static int __sigp_stop(struct kvm_vcpu *vcpu, u16 cpu_addr, int store) { - struct float_interrupt *fi = &vcpu->kvm->arch.float_int; - struct local_interrupt *li; - struct interrupt_info *inti; + struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int; + struct kvm_s390_local_interrupt *li; + struct kvm_s390_interrupt_info *inti; int rc; if (cpu_addr >= KVM_MAX_VCPUS) @@ -167,11 +168,11 @@ static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter) } static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address, - u64 *reg) + unsigned long *reg) { - struct float_interrupt *fi = &vcpu->kvm->arch.float_int; - struct local_interrupt *li; - struct interrupt_info *inti; + struct kvm_s390_float_interrupt *fi = &vcpu->kvm->arch.float_int; + struct kvm_s390_local_interrupt *li; + struct kvm_s390_interrupt_info *inti; int rc; u8 tmp; diff --git a/arch/s390/mm/hugetlbpage.c b/arch/s390/mm/hugetlbpage.c index f4b6124fdb75d1308d6b112081fab60cd039da9d..f28c43d2f61dd6b679b8cc8afb14c12e57e33273 100644 --- a/arch/s390/mm/hugetlbpage.c +++ b/arch/s390/mm/hugetlbpage.c @@ -72,7 +72,8 @@ void arch_release_hugepage(struct page *page) page[1].index = 0; } -pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) +pte_t *huge_pte_alloc(struct mm_struct *mm, + unsigned long addr, unsigned long sz) { pgd_t *pgdp; pud_t *pudp; @@ -119,6 +120,11 @@ int pmd_huge(pmd_t pmd) return !!(pmd_val(pmd) & _SEGMENT_ENTRY_LARGE); } +int pud_huge(pud_t pud) +{ + return 0; +} + struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmdp, int write) { diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c index 05598649b3260f8689845ea2815914ffdd08e902..4993b0f594eb86ac0b5604e06112b36de20e492a 100644 --- a/arch/s390/mm/init.c +++ b/arch/s390/mm/init.c @@ -42,38 +42,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((__aligned__(PAGE_SIZE))); char empty_zero_page[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE))); -void show_mem(void) -{ - unsigned long i, total = 0, reserved = 0; - unsigned long shared = 0, cached = 0; - unsigned long flags; - struct page *page; - pg_data_t *pgdat; - - printk("Mem-info:\n"); - show_free_areas(); - for_each_online_pgdat(pgdat) { - pgdat_resize_lock(pgdat, &flags); - for (i = 0; i < pgdat->node_spanned_pages; i++) { - if (!pfn_valid(pgdat->node_start_pfn + i)) - continue; - page = pfn_to_page(pgdat->node_start_pfn + i); - total++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (page_count(page)) - shared += page_count(page) - 1; - } - pgdat_resize_unlock(pgdat, &flags); - } - printk("%ld pages of RAM\n", total); - printk("%ld reserved pages\n", reserved); - printk("%ld pages shared\n", shared); - printk("%ld pages swap cached\n", cached); -} - /* * paging_init() sets up the page tables */ @@ -202,3 +170,22 @@ void free_initrd_mem(unsigned long start, unsigned long end) } } #endif + +#ifdef CONFIG_MEMORY_HOTPLUG +int arch_add_memory(int nid, u64 start, u64 size) +{ + struct pglist_data *pgdat; + struct zone *zone; + int rc; + + pgdat = NODE_DATA(nid); + zone = pgdat->node_zones + ZONE_NORMAL; + rc = vmem_add_mapping(start, size); + if (rc) + return rc; + rc = __add_pages(zone, PFN_DOWN(start), PFN_DOWN(size)); + if (rc) + vmem_remove_mapping(start, size); + return rc; +} +#endif /* CONFIG_MEMORY_HOTPLUG */ diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 9a854c8e52741a52971cbf5fbccf0a3de1b3c36a..0b88dc462d731c7c8c46525e3fa71eeb53e46cfd 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -8,8 +8,10 @@ mainmenu "Linux/SuperH Kernel Configuration" config SUPERH def_bool y select EMBEDDED + select HAVE_CLK select HAVE_IDE select HAVE_OPROFILE + select HAVE_GENERIC_DMA_COHERENT help The SuperH is a RISC processor targeted for use in embedded systems and consumer electronics; it was also used in the Sega Dreamcast @@ -476,6 +478,10 @@ config SH_RTS7751R2D Select RTS7751R2D if configuring for a Renesas Technology Sales SH-Graphics board. +config SH_RSK7203 + bool "RSK7203" + depends on CPU_SUBTYPE_SH7203 + config SH_SDK7780 bool "SDK7780R3" depends on CPU_SUBTYPE_SH7780 @@ -490,6 +496,21 @@ config SH_HIGHLANDER select SYS_SUPPORTS_PCI select IO_TRAPPED +config SH_SH7785LCR + bool "SH7785LCR" + depends on CPU_SUBTYPE_SH7785 + select SYS_SUPPORTS_PCI + select IO_TRAPPED + +config SH_SH7785LCR_29BIT_PHYSMAPS + bool "SH7785LCR 29bit physmaps" + depends on SH_SH7785LCR + default y + help + This board has 2 physical memory maps. It can be changed with + DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, + you can access all on-board device in 29bit address mode. + config SH_MIGOR bool "Migo-R" depends on CPU_SUBTYPE_SH7722 @@ -497,6 +518,20 @@ config SH_MIGOR Select Migo-R if configuring for the SH7722 Migo-R platform by Renesas System Solutions Asia Pte. Ltd. +config SH_AP325RXA + bool "AP-325RXA" + depends on CPU_SUBTYPE_SH7723 + help + Renesas "AP-325RXA" support. + Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" + +config SH_SH7763RDP + bool "SH7763RDP" + depends on CPU_SUBTYPE_SH7763 + help + Select SH7763RDP if configuring for a Renesas SH7763 + evaluation board. + config SH_EDOSK7705 bool "EDOSK7705" depends on CPU_SUBTYPE_SH7705 @@ -558,6 +593,7 @@ endmenu source "arch/sh/boards/renesas/rts7751r2d/Kconfig" source "arch/sh/boards/renesas/r7780rp/Kconfig" source "arch/sh/boards/renesas/sdk7780/Kconfig" +source "arch/sh/boards/renesas/migor/Kconfig" source "arch/sh/boards/magicpanelr2/Kconfig" menu "Timer and clock configuration" @@ -688,6 +724,7 @@ config CRASH_DUMP config SMP bool "Symmetric multi-processing support" depends on SYS_SUPPORTS_SMP + select USE_GENERIC_SMP_HELPERS ---help--- This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 0f4549860226636a888e0321f4df402a135a1b19..36f4b1f7066d193f9290e11a88a89bd5dc4cdb5d 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -36,7 +36,8 @@ config EARLY_SCIF_CONSOLE_PORT default "0xff804000" if CPU_SUBTYPE_MXG default "0xffc30000" if CPU_SUBTYPE_SHX3 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ - CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 + CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ + CPU_SUBTYPE_SH7343 default "0xffe80000" if CPU_SH4 default "0xffea0000" if CPU_SUBTYPE_SH7785 default "0xfffe8000" if CPU_SUBTYPE_SH7203 diff --git a/arch/sh/Makefile b/arch/sh/Makefile index fb7b1b15e3923f2eee2ba30ac67c30fc6d2ef746..c627e45c4df74b9abec100067a4fec6895117a93 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile @@ -121,6 +121,10 @@ machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp machdir-$(CONFIG_SH_MIGOR) += renesas/migor machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780 machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto +machdir-$(CONFIG_SH_RSK7203) += renesas/rsk7203 +machdir-$(CONFIG_SH_AP325RXA) += renesas/ap325rxa +machdir-$(CONFIG_SH_SH7763RDP) += renesas/sh7763rdp +machdir-$(CONFIG_SH_SH7785LCR) += renesas/sh7785lcr machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev machdir-$(CONFIG_SH_LANDISK) += landisk machdir-$(CONFIG_SH_TITAN) += titan diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c index b3a876a3b85978363e7b9de6ccf5a464a026b55c..a7433685798d83b26695c5530de6750f1dcdc377 100644 --- a/arch/sh/boards/dreamcast/rtc.c +++ b/arch/sh/boards/dreamcast/rtc.c @@ -30,7 +30,7 @@ * * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. */ -void aica_rtc_gettimeofday(struct timespec *ts) +static void aica_rtc_gettimeofday(struct timespec *ts) { unsigned long val1, val2; @@ -54,7 +54,7 @@ void aica_rtc_gettimeofday(struct timespec *ts) * * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. */ -int aica_rtc_settimeofday(const time_t secs) +static int aica_rtc_settimeofday(const time_t secs) { unsigned long val1, val2; unsigned long adj = secs + TWENTY_YEARS; diff --git a/arch/sh/boards/landisk/gio.c b/arch/sh/boards/landisk/gio.c index 17025080db35ea279903e36910294ceb6b48767b..0c15b0a50b99a2460011801fa37411acd5e217e7 100644 --- a/arch/sh/boards/landisk/gio.c +++ b/arch/sh/boards/landisk/gio.c @@ -14,6 +14,7 @@ */ #include #include +#include #include #include #include @@ -32,17 +33,20 @@ static int openCnt; static int gio_open(struct inode *inode, struct file *filp) { int minor; + int ret = -ENOENT; + lock_kernel(); minor = MINOR(inode->i_rdev); if (minor < DEVCOUNT) { if (openCnt > 0) { - return -EALREADY; + ret = -EALREADY; } else { openCnt++; - return 0; + ret = 0; } } - return -ENOENT; + unlock_kernel(); + return ret; } static int gio_close(struct inode *inode, struct file *filp) diff --git a/arch/sh/boards/renesas/ap325rxa/Makefile b/arch/sh/boards/renesas/ap325rxa/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f663768429f093f2a545d75663573275c007aff1 --- /dev/null +++ b/arch/sh/boards/renesas/ap325rxa/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/boards/renesas/ap325rxa/setup.c b/arch/sh/boards/renesas/ap325rxa/setup.c new file mode 100644 index 0000000000000000000000000000000000000000..7fa74462bd9fc12cd9459cfe8cba083cc7ce5613 --- /dev/null +++ b/arch/sh/boards/renesas/ap325rxa/setup.c @@ -0,0 +1,313 @@ +/* + * Renesas - AP-325RXA + * (Compatible with Algo System ., LTD. - AP-320A) + * + * Copyright (C) 2008 Renesas Solutions Corp. + * Author : Yusuke Goda + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct smc911x_platdata smc911x_info = { + .flags = SMC911X_USE_32BIT, + .irq_flags = IRQF_TRIGGER_LOW, +}; + +static struct resource smc9118_resources[] = { + [0] = { + .start = 0xb6080000, + .end = 0xb60fffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 35, + .end = 35, + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device smc9118_device = { + .name = "smc911x", + .id = -1, + .num_resources = ARRAY_SIZE(smc9118_resources), + .resource = smc9118_resources, + .dev = { + .platform_data = &smc911x_info, + }, +}; + +static struct mtd_partition ap325rxa_nor_flash_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = (1 * 1024 * 1024), + .mask_flags = MTD_WRITEABLE, /* Read-only */ + }, { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = (2 * 1024 * 1024), + }, { + .name = "other", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data ap325rxa_nor_flash_data = { + .width = 2, + .parts = ap325rxa_nor_flash_partitions, + .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions), +}; + +static struct resource ap325rxa_nor_flash_resources[] = { + [0] = { + .name = "NOR Flash", + .start = 0x00000000, + .end = 0x00ffffff, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device ap325rxa_nor_flash_device = { + .name = "physmap-flash", + .resource = ap325rxa_nor_flash_resources, + .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources), + .dev = { + .platform_data = &ap325rxa_nor_flash_data, + }, +}; + +#define FPGA_LCDREG 0xB4100180 +#define FPGA_BKLREG 0xB4100212 +#define FPGA_LCDREG_VAL 0x0018 +#define PORT_PHCR 0xA405010E +#define PORT_PLCR 0xA4050114 +#define PORT_PMCR 0xA4050116 +#define PORT_PRCR 0xA405011C +#define PORT_PSCR 0xA405011E +#define PORT_PZCR 0xA405014C +#define PORT_HIZCRA 0xA4050158 +#define PORT_MSELCRB 0xA4050182 +#define PORT_PSDR 0xA405013E +#define PORT_PZDR 0xA405016C +#define PORT_PSELD 0xA4050154 + +static void ap320_wvga_power_on(void *board_data) +{ + msleep(100); + + /* ASD AP-320/325 LCD ON */ + ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); + + /* backlight */ + ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR); + ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR); + ctrl_outw(0x100, FPGA_BKLREG); +} + +static struct sh_mobile_lcdc_info lcdc_info = { + .clock_source = LCDC_CLK_EXTERNAL, + .ch[0] = { + .chan = LCDC_CHAN_MAINLCD, + .bpp = 16, + .interface_type = RGB18, + .clock_divider = 1, + .lcd_cfg = { + .name = "LB070WV1", + .xres = 800, + .yres = 480, + .left_margin = 40, + .right_margin = 160, + .hsync_len = 8, + .upper_margin = 63, + .lower_margin = 80, + .vsync_len = 1, + .sync = 0, /* hsync and vsync are active low */ + }, + .board_cfg = { + .display_on = ap320_wvga_power_on, + }, + } +}; + +static struct resource lcdc_resources[] = { + [0] = { + .name = "LCDC", + .start = 0xfe940000, /* P4-only space */ + .end = 0xfe941fff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device lcdc_device = { + .name = "sh_mobile_lcdc_fb", + .num_resources = ARRAY_SIZE(lcdc_resources), + .resource = lcdc_resources, + .dev = { + .platform_data = &lcdc_info, + }, +}; + +static unsigned char camera_ncm03j_magic[] = +{ + 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, + 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36, + 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F, + 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55, + 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12, + 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0, + 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F, + 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A, + 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A, + 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A, + 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56, + 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37, + 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A, + 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56, + 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC, + 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, +}; + +static int camera_set_capture(struct soc_camera_platform_info *info, + int enable) +{ + struct i2c_adapter *a = i2c_get_adapter(0); + struct i2c_msg msg; + int ret = 0; + int i; + + if (!enable) + return 0; /* no disable for now */ + + for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) { + u_int8_t buf[8]; + + msg.addr = 0x6e; + msg.buf = buf; + msg.len = 2; + msg.flags = 0; + + buf[0] = camera_ncm03j_magic[i]; + buf[1] = camera_ncm03j_magic[i + 1]; + + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); + } + + return ret; +} + +static struct soc_camera_platform_info camera_info = { + .iface = 0, + .format_name = "UYVY", + .format_depth = 16, + .format = { + .pixelformat = V4L2_PIX_FMT_UYVY, + .colorspace = V4L2_COLORSPACE_SMPTE170M, + .width = 640, + .height = 480, + }, + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, + .set_capture = camera_set_capture, +}; + +static struct platform_device camera_device = { + .name = "soc_camera_platform", + .dev = { + .platform_data = &camera_info, + }, +}; + +static struct sh_mobile_ceu_info sh_mobile_ceu_info = { + .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, +}; + +static struct resource ceu_resources[] = { + [0] = { + .name = "CEU", + .start = 0xfe910000, + .end = 0xfe91009f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 52, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device ceu_device = { + .name = "sh_mobile_ceu", + .num_resources = ARRAY_SIZE(ceu_resources), + .resource = ceu_resources, + .dev = { + .platform_data = &sh_mobile_ceu_info, + }, +}; + +static struct platform_device *ap325rxa_devices[] __initdata = { + &smc9118_device, + &ap325rxa_nor_flash_device, + &lcdc_device, + &ceu_device, + &camera_device, +}; + +static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { +}; + +static int __init ap325rxa_devices_setup(void) +{ + clk_always_enable("mstp200"); /* LCDC */ + clk_always_enable("mstp203"); /* CEU */ + + platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); + + i2c_register_board_info(0, ap325rxa_i2c_devices, + ARRAY_SIZE(ap325rxa_i2c_devices)); + + return platform_add_devices(ap325rxa_devices, + ARRAY_SIZE(ap325rxa_devices)); +} +device_initcall(ap325rxa_devices_setup); + +static void __init ap325rxa_setup(char **cmdline_p) +{ + /* LCDC configuration */ + ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR); + ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR); + ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR); + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR); + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA); + + /* CEU */ + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD); + ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR); + ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR); +} + +static struct sh_machine_vector mv_ap325rxa __initmv = { + .mv_name = "AP-325RXA", + .mv_setup = ap325rxa_setup, +}; diff --git a/arch/sh/boards/renesas/migor/Kconfig b/arch/sh/boards/renesas/migor/Kconfig new file mode 100644 index 0000000000000000000000000000000000000000..a7b3b728ec3c01afdc8a7a68338d9f7a420fb023 --- /dev/null +++ b/arch/sh/boards/renesas/migor/Kconfig @@ -0,0 +1,15 @@ +if SH_MIGOR + +choice + prompt "Migo-R LCD Panel Board Selection" + default SH_MIGOR_QVGA + +config SH_MIGOR_QVGA + bool "QVGA (320x240)" + +config SH_MIGOR_RTA_WVGA + bool "RTA WVGA (800x480)" + +endchoice + +endif diff --git a/arch/sh/boards/renesas/migor/Makefile b/arch/sh/boards/renesas/migor/Makefile index 77037567633b674f1a312fd190db2d6eb9013ec3..5f231dd25c0e730fe5f74153eeb144fdcdb0d0cb 100644 --- a/arch/sh/boards/renesas/migor/Makefile +++ b/arch/sh/boards/renesas/migor/Makefile @@ -1 +1,2 @@ obj-y := setup.o +obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o diff --git a/arch/sh/boards/renesas/migor/lcd_qvga.c b/arch/sh/boards/renesas/migor/lcd_qvga.c new file mode 100644 index 0000000000000000000000000000000000000000..6e960959644825daba418076b68c6a70ab753087 --- /dev/null +++ b/arch/sh/boards/renesas/migor/lcd_qvga.c @@ -0,0 +1,165 @@ +/* + * Support for SuperH MigoR Quarter VGA LCD Panel + * + * Copyright (C) 2008 Magnus Damm + * + * Based on lcd_powertip.c from Kenati Technologies Pvt Ltd. + * Copyright (c) 2007 Ujjwal Pande , + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* LCD Module is a PH240320T according to board schematics. This module + * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?) + * Driver IC. This IC is connected to the SH7722 built-in LCDC using a + * SYS-80 interface configured in 16 bit mode. + * + * Index 0: "Device Code Read" returns 0x1505. + */ + +static void reset_lcd_module(void) +{ + ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR); + mdelay(2); + ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR); + mdelay(1); +} + +/* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */ + +static unsigned long adjust_reg18(unsigned short data) +{ + unsigned long tmp1, tmp2; + + tmp1 = (data<<1 | 0x00000001) & 0x000001FF; + tmp2 = (data<<2 | 0x00000200) & 0x0003FE00; + return tmp1 | tmp2; +} + +static void write_reg(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, + unsigned short reg, unsigned short data) +{ + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data)); +} + +static void write_reg16(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, + unsigned short reg, unsigned short data) +{ + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); + sys_ops->write_data(sys_ops_handle, adjust_reg18(data)); +} + +static unsigned long read_reg16(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, + unsigned short reg) +{ + unsigned long data; + + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); + data = sys_ops->read_data(sys_ops_handle); + return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00); +} + +static void migor_lcd_qvga_seq(void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, + unsigned short const *data, int no_data) +{ + int i; + + for (i = 0; i < no_data; i += 2) + write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]); +} + +static const unsigned short sync_data[] = { + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, +}; + +static const unsigned short magic0_data[] = { + 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001, + 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116, + 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8, +}; + +static const unsigned short magic1_data[] = { + 0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202, + 0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303, + 0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102, + 0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300, + 0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000, + 0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000, + 0x0015, 0x8000, +}; + +static const unsigned short magic2_data[] = { + 0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021, +}; + +static const unsigned short magic3_data[] = { + 0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061, +}; + +int migor_lcd_qvga_setup(void *board_data, void *sohandle, + struct sh_mobile_lcdc_sys_bus_ops *so) +{ + unsigned long xres = 320; + unsigned long yres = 240; + int k; + + reset_lcd_module(); + migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); + + if (read_reg16(sohandle, so, 0) != 0x1505) + return -ENODEV; + + pr_info("Migo-R QVGA LCD Module detected.\n"); + + migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); + write_reg16(sohandle, so, 0x00A4, 0x0001); + mdelay(10); + + migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data)); + mdelay(100); + + migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data)); + write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1)); + write_reg16(sohandle, so, 0x0051, 0x00ef); + write_reg16(sohandle, so, 0x0052, 0x0000); + write_reg16(sohandle, so, 0x0053, xres - 1); + + migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data)); + mdelay(10); + + migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data)); + mdelay(40); + + /* clear GRAM to avoid displaying garbage */ + + write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */ + write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */ + + for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */ + write_reg16(sohandle, so, 0x0022, 0x0000); + + write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */ + write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */ + write_reg16(sohandle, so, 0x0007, 0x0173); + mdelay(40); + + /* enable display */ + write_reg(sohandle, so, 0x00, 0x22); + mdelay(100); + return 0; +} diff --git a/arch/sh/boards/renesas/migor/setup.c b/arch/sh/boards/renesas/migor/setup.c index 01af44245b57761c5f4f5004d3b438a93e7fcc07..7bd365ad2d060e7bd6ccc1ee80ddeabe3019a3e8 100644 --- a/arch/sh/boards/renesas/migor/setup.c +++ b/arch/sh/boards/renesas/migor/setup.c @@ -15,9 +15,15 @@ #include #include #include +#include +#include +#include +#include +#include #include #include #include +#include #include /* Address IRQ Size Bus Description @@ -30,7 +36,6 @@ static struct smc91x_platdata smc91x_info = { .flags = SMC91X_USE_16BIT, - .irq_flags = IRQF_TRIGGER_HIGH, }; static struct resource smc91x_eth_resources[] = { @@ -42,7 +47,7 @@ static struct resource smc91x_eth_resources[] = { }, [1] = { .start = 32, /* IRQ0 */ - .flags = IORESOURCE_IRQ, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, }, }; @@ -199,14 +204,237 @@ static struct platform_device migor_nand_flash_device = { } }; +static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = { +#ifdef CONFIG_SH_MIGOR_RTA_WVGA + .clock_source = LCDC_CLK_BUS, + .ch[0] = { + .chan = LCDC_CHAN_MAINLCD, + .bpp = 16, + .interface_type = RGB16, + .clock_divider = 2, + .lcd_cfg = { + .name = "LB070WV1", + .xres = 800, + .yres = 480, + .left_margin = 64, + .right_margin = 16, + .hsync_len = 120, + .upper_margin = 1, + .lower_margin = 17, + .vsync_len = 2, + .sync = 0, + }, + } +#endif +#ifdef CONFIG_SH_MIGOR_QVGA + .clock_source = LCDC_CLK_PERIPHERAL, + .ch[0] = { + .chan = LCDC_CHAN_MAINLCD, + .bpp = 16, + .interface_type = SYS16A, + .clock_divider = 10, + .lcd_cfg = { + .name = "PH240320T", + .xres = 320, + .yres = 240, + .left_margin = 0, + .right_margin = 16, + .hsync_len = 8, + .upper_margin = 1, + .lower_margin = 17, + .vsync_len = 2, + .sync = FB_SYNC_HOR_HIGH_ACT, + }, + .board_cfg = { + .setup_sys = migor_lcd_qvga_setup, + }, + .sys_bus_cfg = { + .ldmt2r = 0x06000a09, + .ldmt3r = 0x180e3418, + }, + } +#endif +}; + +static struct resource migor_lcdc_resources[] = { + [0] = { + .name = "LCDC", + .start = 0xfe940000, /* P4-only space */ + .end = 0xfe941fff, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device migor_lcdc_device = { + .name = "sh_mobile_lcdc_fb", + .num_resources = ARRAY_SIZE(migor_lcdc_resources), + .resource = migor_lcdc_resources, + .dev = { + .platform_data = &sh_mobile_lcdc_info, + }, +}; + +static struct clk *camera_clk; + +static void camera_power_on(void) +{ + unsigned char value; + + camera_clk = clk_get(NULL, "video_clk"); + clk_set_rate(camera_clk, 24000000); + clk_enable(camera_clk); /* start VIO_CKO */ + + mdelay(10); + value = ctrl_inb(PORT_PTDR); + value &= ~0x09; +#ifndef CONFIG_SH_MIGOR_RTA_WVGA + value |= 0x01; +#endif + ctrl_outb(value, PORT_PTDR); + mdelay(10); + + ctrl_outb(value | 8, PORT_PTDR); +} + +static void camera_power_off(void) +{ + clk_disable(camera_clk); /* stop VIO_CKO */ + clk_put(camera_clk); + + ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR); +} + +static unsigned char camera_ov772x_magic[] = +{ + 0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01, + 0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00, + 0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07, + 0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10, + 0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0, + 0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00, + 0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00, + 0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2, + 0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80, + 0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00, + 0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50, + 0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60, + 0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a, + 0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f, + 0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00, + 0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01, + 0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f, + 0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f, + 0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70, + 0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e, + 0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69, + 0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f, + 0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4, + 0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00, + 0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f, + 0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08, + 0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e, + 0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02, + 0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06, + 0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40, + 0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff, + 0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f, + 0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50, + 0x2c, 0x78, +}; + +static int ov772x_set_capture(struct soc_camera_platform_info *info, + int enable) +{ + struct i2c_adapter *a = i2c_get_adapter(0); + struct i2c_msg msg; + int ret = 0; + int i; + + if (!enable) + return 0; /* camera_power_off() is enough */ + + for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) { + u_int8_t buf[8]; + + msg.addr = 0x21; + msg.buf = buf; + msg.len = 2; + msg.flags = 0; + + buf[0] = camera_ov772x_magic[i]; + buf[1] = camera_ov772x_magic[i + 1]; + + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); + } + + return ret; +} + +static struct soc_camera_platform_info ov772x_info = { + .iface = 0, + .format_name = "RGB565", + .format_depth = 16, + .format = { + .pixelformat = V4L2_PIX_FMT_RGB565, + .colorspace = V4L2_COLORSPACE_SRGB, + .width = 320, + .height = 240, + }, + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, + .set_capture = ov772x_set_capture, +}; + +static struct platform_device migor_camera_device = { + .name = "soc_camera_platform", + .dev = { + .platform_data = &ov772x_info, + }, +}; + +static struct sh_mobile_ceu_info sh_mobile_ceu_info = { + .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \ + | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH, + .enable_camera = camera_power_on, + .disable_camera = camera_power_off, +}; + +static struct resource migor_ceu_resources[] = { + [0] = { + .name = "CEU", + .start = 0xfe910000, + .end = 0xfe91009f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 52, + .flags = IORESOURCE_IRQ, + }, + [2] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device migor_ceu_device = { + .name = "sh_mobile_ceu", + .num_resources = ARRAY_SIZE(migor_ceu_resources), + .resource = migor_ceu_resources, + .dev = { + .platform_data = &sh_mobile_ceu_info, + }, +}; + static struct platform_device *migor_devices[] __initdata = { &smc91x_eth_device, &sh_keysc_device, + &migor_lcdc_device, + &migor_ceu_device, + &migor_camera_device, &migor_nor_flash_device, &migor_nand_flash_device, }; -static struct i2c_board_info __initdata migor_i2c_devices[] = { +static struct i2c_board_info migor_i2c_devices[] = { { I2C_BOARD_INFO("rs5c372b", 0x32), }, @@ -218,6 +446,12 @@ static struct i2c_board_info __initdata migor_i2c_devices[] = { static int __init migor_devices_setup(void) { + clk_always_enable("mstp214"); /* KEYSC */ + clk_always_enable("mstp200"); /* LCDC */ + clk_always_enable("mstp203"); /* CEU */ + + platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); + i2c_register_board_info(0, migor_i2c_devices, ARRAY_SIZE(migor_i2c_devices)); @@ -236,20 +470,51 @@ static void __init migor_setup(char **cmdline_p) ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA); ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); - ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2); /* NAND Flash */ ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR); ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200, BSC_CS6ABCR); - /* I2C */ - ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1); - /* Touch Panel - Enable IRQ6 */ ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR); ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA); ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC); + +#ifdef CONFIG_SH_MIGOR_RTA_WVGA + /* LCDC - WVGA - Enable RGB Interface signals */ + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); + ctrl_outw(0x0000, PORT_PHCR); + ctrl_outw(0x0000, PORT_PLCR); + ctrl_outw(0x0000, PORT_PMCR); + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR); + ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD); + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB); + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); +#endif +#ifdef CONFIG_SH_MIGOR_QVGA + /* LCDC - QVGA - Enable SYS Interface signals */ + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); + ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR); + ctrl_outw(0x0000, PORT_PLCR); + ctrl_outw(0x0000, PORT_PMCR); + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR); + ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD); + ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB); + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); +#endif + + /* CEU */ + ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR); + ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR); + ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR); + ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR); + ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC); + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD); + ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE); + ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB); + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA); + ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB); } static struct sh_machine_vector mv_migor __initmv = { diff --git a/arch/sh/boards/renesas/rsk7203/Makefile b/arch/sh/boards/renesas/rsk7203/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f663768429f093f2a545d75663573275c007aff1 --- /dev/null +++ b/arch/sh/boards/renesas/rsk7203/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/boards/renesas/rsk7203/setup.c b/arch/sh/boards/renesas/rsk7203/setup.c new file mode 100644 index 0000000000000000000000000000000000000000..0bbda04b03b969fd74375b1e695bdd53a562a813 --- /dev/null +++ b/arch/sh/boards/renesas/rsk7203/setup.c @@ -0,0 +1,126 @@ +/* + * Renesas Technology Europe RSK+ 7203 Support. + * + * Copyright (C) 2008 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct resource smc911x_resources[] = { + [0] = { + .start = 0x24000000, + .end = 0x24000000 + 0x100, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 64, + .end = 64, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc911x_device = { + .name = "smc911x", + .id = -1, + .num_resources = ARRAY_SIZE(smc911x_resources), + .resource = smc911x_resources, +}; + +static const char *probes[] = { "cmdlinepart", NULL }; + +static struct mtd_partition *parsed_partitions; + +static struct mtd_partition rsk7203_partitions[] = { + { + .name = "Bootloader", + .offset = 0x00000000, + .size = 0x00040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "Kernel", + .offset = MTDPART_OFS_NXTBLK, + .size = 0x001c0000, + }, { + .name = "Flash_FS", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL, + } +}; + +static struct physmap_flash_data flash_data = { + .width = 2, +}; + +static struct resource flash_resource = { + .start = 0x20000000, + .end = 0x20400000, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device flash_device = { + .name = "physmap-flash", + .id = -1, + .resource = &flash_resource, + .num_resources = 1, + .dev = { + .platform_data = &flash_data, + }, +}; + +static struct mtd_info *flash_mtd; + +static struct map_info rsk7203_flash_map = { + .name = "RSK+ Flash", + .size = 0x400000, + .bankwidth = 2, +}; + +static void __init set_mtd_partitions(void) +{ + int nr_parts = 0; + + simple_map_init(&rsk7203_flash_map); + flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map); + nr_parts = parse_mtd_partitions(flash_mtd, probes, + &parsed_partitions, 0); + /* If there is no partition table, used the hard coded table */ + if (nr_parts <= 0) { + flash_data.parts = rsk7203_partitions; + flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions); + } else { + flash_data.nr_parts = nr_parts; + flash_data.parts = parsed_partitions; + } +} + + +static struct platform_device *rsk7203_devices[] __initdata = { + &smc911x_device, + &flash_device, +}; + +static int __init rsk7203_devices_setup(void) +{ + set_mtd_partitions(); + return platform_add_devices(rsk7203_devices, + ARRAY_SIZE(rsk7203_devices)); +} +device_initcall(rsk7203_devices_setup); + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_rsk7203 __initmv = { + .mv_name = "RSK+7203", +}; diff --git a/arch/sh/boards/renesas/sh7763rdp/Makefile b/arch/sh/boards/renesas/sh7763rdp/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..f6c0b55516d23cb1c3737827f0e75da6f89dc6a2 --- /dev/null +++ b/arch/sh/boards/renesas/sh7763rdp/Makefile @@ -0,0 +1 @@ +obj-y := setup.o irq.o diff --git a/arch/sh/boards/renesas/sh7763rdp/irq.c b/arch/sh/boards/renesas/sh7763rdp/irq.c new file mode 100644 index 0000000000000000000000000000000000000000..fd850bad2decd17407819c4b645e7fc766e7c968 --- /dev/null +++ b/arch/sh/boards/renesas/sh7763rdp/irq.c @@ -0,0 +1,45 @@ +/* + * linux/arch/sh/boards/renesas/sh7763rdp/irq.c + * + * Renesas Solutions SH7763RDP Support. + * + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include + +#define INTC_BASE (0xFFD00000) +#define INTC_INT2PRI7 (INTC_BASE+0x4001C) +#define INTC_INT2MSKCR (INTC_BASE+0x4003C) +#define INTC_INT2MSKCR1 (INTC_BASE+0x400D4) + +/* + * Initialize IRQ setting + */ +void __init init_sh7763rdp_IRQ(void) +{ + /* GPIO enabled */ + ctrl_outl(1 << 25, INTC_INT2MSKCR); + + /* enable GPIO interrupts */ + ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, + INTC_INT2PRI7); + + /* USBH enabled */ + ctrl_outl(1 << 17, INTC_INT2MSKCR1); + + /* GETHER enabled */ + ctrl_outl(1 << 16, INTC_INT2MSKCR1); + + /* DMAC enabled */ + ctrl_outl(1 << 8, INTC_INT2MSKCR); +} diff --git a/arch/sh/boards/renesas/sh7763rdp/setup.c b/arch/sh/boards/renesas/sh7763rdp/setup.c new file mode 100644 index 0000000000000000000000000000000000000000..925f16af71217d1e31bdea1a08d60df4076197ed --- /dev/null +++ b/arch/sh/boards/renesas/sh7763rdp/setup.c @@ -0,0 +1,128 @@ +/* + * linux/arch/sh/boards/renesas/sh7763rdp/setup.c + * + * Renesas Solutions sh7763rdp board + * + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include +#include + +/* NOR Flash */ +static struct mtd_partition sh7763rdp_nor_flash_partitions[] = { + { + .name = "U-Boot", + .offset = 0, + .size = (2 * 128 * 1024), + .mask_flags = MTD_WRITEABLE, /* Read-only */ + }, { + .name = "Linux-Kernel", + .offset = MTDPART_OFS_APPEND, + .size = (20 * 128 * 1024), + }, { + .name = "Root Filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data sh7763rdp_nor_flash_data = { + .width = 2, + .parts = sh7763rdp_nor_flash_partitions, + .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions), +}; + +static struct resource sh7763rdp_nor_flash_resources[] = { + [0] = { + .name = "NOR Flash", + .start = 0, + .end = (64 * 1024 * 1024), + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device sh7763rdp_nor_flash_device = { + .name = "physmap-flash", + .resource = sh7763rdp_nor_flash_resources, + .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources), + .dev = { + .platform_data = &sh7763rdp_nor_flash_data, + }, +}; + +static struct platform_device *sh7763rdp_devices[] __initdata = { + &sh7763rdp_nor_flash_device, +}; + +static int __init sh7763rdp_devices_setup(void) +{ + return platform_add_devices(sh7763rdp_devices, + ARRAY_SIZE(sh7763rdp_devices)); +} +__initcall(sh7763rdp_devices_setup); + +static void __init sh7763rdp_setup(char **cmdline_p) +{ + /* Board version check */ + if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) + printk(KERN_INFO "RTE Standard Configuration\n"); + else + printk(KERN_INFO "RTA Standard Configuration\n"); + + /* USB pin select bits (clear bit 5-2 to 0) */ + ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); + /* USBH setup port I controls to other (clear bits 4-9 to 0) */ + ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); + + /* Select USB Host controller */ + ctrl_outw(0x00, USB_USBHSC); + + /* For LCD */ + /* set PTJ7-1, bits 15-2 of PJCR to 0 */ + ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); + /* set PTI5, bits 11-10 of PICR to 0 */ + ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); + ctrl_outw(0, PORT_PKCR); + ctrl_outw(0, PORT_PLCR); + /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ + ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); + /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ + ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); + + /* For HAC */ + /* bit3-0 0100:HAC & SSI1 enable */ + ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); + /* bit14 1:SSI_HAC_CLK enable */ + ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); + + /* SH-Ether */ + ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); + ctrl_outw(0x0, PORT_PFCR); + ctrl_outw(0x0, PORT_PFCR); + ctrl_outw(0x0, PORT_PFCR); + + /* MMC */ + /*selects SCIF and MMC other functions */ + ctrl_outw(0x0001, PORT_PSEL0); + /* MMC clock operates */ + ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); + ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); +} + +static struct sh_machine_vector mv_sh7763rdp __initmv = { + .mv_name = "sh7763drp", + .mv_setup = sh7763rdp_setup, + .mv_nr_irqs = 112, + .mv_init_irq = init_sh7763rdp_IRQ, +}; diff --git a/arch/sh/boards/renesas/sh7785lcr/Makefile b/arch/sh/boards/renesas/sh7785lcr/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..77037567633b674f1a312fd190db2d6eb9013ec3 --- /dev/null +++ b/arch/sh/boards/renesas/sh7785lcr/Makefile @@ -0,0 +1 @@ +obj-y := setup.o diff --git a/arch/sh/boards/renesas/sh7785lcr/setup.c b/arch/sh/boards/renesas/sh7785lcr/setup.c new file mode 100644 index 0000000000000000000000000000000000000000..b95d674ee704426b380adce271820ccae675a63e --- /dev/null +++ b/arch/sh/boards/renesas/sh7785lcr/setup.c @@ -0,0 +1,302 @@ +/* + * Renesas Technology Corp. R0P7785LC0011RL Support. + * + * Copyright (C) 2008 Yoshihiro Shimoda + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * NOTE: This board has 2 physical memory maps. + * Please look at include/asm-sh/sh7785lcr.h or hardware manual. + */ +static struct resource heartbeat_resources[] = { + [0] = { + .start = PLD_LEDCR, + .end = PLD_LEDCR, + .flags = IORESOURCE_MEM, + }, +}; + +static struct heartbeat_data heartbeat_data = { + .regsize = 8, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +static struct mtd_partition nor_flash_partitions[] = { + { + .name = "loader", + .offset = 0x00000000, + .size = 512 * 1024, + }, + { + .name = "bootenv", + .offset = MTDPART_OFS_APPEND, + .size = 512 * 1024, + }, + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = 4 * 1024 * 1024, + }, + { + .name = "data", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data nor_flash_data = { + .width = 4, + .parts = nor_flash_partitions, + .nr_parts = ARRAY_SIZE(nor_flash_partitions), +}; + +static struct resource nor_flash_resources[] = { + [0] = { + .start = NOR_FLASH_ADDR, + .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device nor_flash_device = { + .name = "physmap-flash", + .dev = { + .platform_data = &nor_flash_data, + }, + .num_resources = ARRAY_SIZE(nor_flash_resources), + .resource = nor_flash_resources, +}; + +static struct resource r8a66597_usb_host_resources[] = { + [0] = { + .name = "r8a66597_hcd", + .start = R8A66597_ADDR, + .end = R8A66597_ADDR + R8A66597_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "r8a66597_hcd", + .start = 2, + .end = 2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device r8a66597_usb_host_device = { + .name = "r8a66597_hcd", + .id = -1, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), + .resource = r8a66597_usb_host_resources, +}; + +static struct resource sm501_resources[] = { + [0] = { + .start = SM107_MEM_ADDR, + .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = SM107_REG_ADDR, + .end = SM107_REG_ADDR + SM107_REG_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = 10, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct fb_videomode sm501_default_mode_crt = { + .pixclock = 35714, /* 28MHz */ + .xres = 640, + .yres = 480, + .left_margin = 105, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 39, + .vsync_len = 2, + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, +}; + +static struct fb_videomode sm501_default_mode_pnl = { + .pixclock = 40000, /* 25MHz */ + .xres = 640, + .yres = 480, + .left_margin = 2, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 39, + .vsync_len = 2, + .sync = 0, +}; + +static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { + .def_bpp = 16, + .def_mode = &sm501_default_mode_pnl, + .flags = SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL | + SM501FB_FLAG_DISABLE_AT_EXIT | + SM501FB_FLAG_PANEL_NO_VBIASEN, +}; + +static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { + .def_bpp = 16, + .def_mode = &sm501_default_mode_crt, + .flags = SM501FB_FLAG_USE_INIT_MODE | + SM501FB_FLAG_USE_HWCURSOR | + SM501FB_FLAG_USE_HWACCEL | + SM501FB_FLAG_DISABLE_AT_EXIT, +}; + +static struct sm501_platdata_fb sm501_fb_pdata = { + .fb_route = SM501_FB_OWN, + .fb_crt = &sm501_pdata_fbsub_crt, + .fb_pnl = &sm501_pdata_fbsub_pnl, +}; + +static struct sm501_initdata sm501_initdata = { + .gpio_high = { + .set = 0x00001fe0, + .mask = 0x0, + }, + .devices = 0, + .mclk = 84 * 1000000, + .m1xclk = 112 * 1000000, +}; + +static struct sm501_platdata sm501_platform_data = { + .init = &sm501_initdata, + .fb = &sm501_fb_pdata, +}; + +static struct platform_device sm501_device = { + .name = "sm501", + .id = -1, + .dev = { + .platform_data = &sm501_platform_data, + }, + .num_resources = ARRAY_SIZE(sm501_resources), + .resource = sm501_resources, +}; + +static struct resource i2c_resources[] = { + [0] = { + .start = PCA9564_ADDR, + .end = PCA9564_ADDR + PCA9564_SIZE - 1, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, + }, + [1] = { + .start = 12, + .end = 12, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct i2c_pca9564_pf_platform_data i2c_platform_data = { + .gpio = 0, + .i2c_clock_speed = I2C_PCA_CON_330kHz, + .timeout = 100, +}; + +static struct platform_device i2c_device = { + .name = "i2c-pca-platform", + .id = -1, + .dev = { + .platform_data = &i2c_platform_data, + }, + .num_resources = ARRAY_SIZE(i2c_resources), + .resource = i2c_resources, +}; + +static struct platform_device *sh7785lcr_devices[] __initdata = { + &heartbeat_device, + &nor_flash_device, + &r8a66597_usb_host_device, + &sm501_device, + &i2c_device, +}; + +static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = { + { + I2C_BOARD_INFO("r2025sd", 0x32), + }, +}; + +static int __init sh7785lcr_devices_setup(void) +{ + i2c_register_board_info(0, sh7785lcr_i2c_devices, + ARRAY_SIZE(sh7785lcr_i2c_devices)); + + return platform_add_devices(sh7785lcr_devices, + ARRAY_SIZE(sh7785lcr_devices)); +} +__initcall(sh7785lcr_devices_setup); + +/* Initialize IRQ setting */ +void __init init_sh7785lcr_IRQ(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRQ7654); + plat_irq_setup_pins(IRQ_MODE_IRQ3210); +} + +static void sh7785lcr_power_off(void) +{ + ctrl_outb(0x01, P2SEGADDR(PLD_POFCR)); +} + +/* Initialize the board */ +static void __init sh7785lcr_setup(char **cmdline_p) +{ + void __iomem *sm501_reg; + + printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n"); + + pm_power_off = sh7785lcr_power_off; + + /* sm501 DRAM configuration */ + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; + writel(0x000307c2, sm501_reg); +} + +/* + * The Machine Vector + */ +static struct sh_machine_vector mv_sh7785lcr __initmv = { + .mv_name = "SH7785LCR", + .mv_setup = sh7785lcr_setup, + .mv_init_irq = init_sh7785lcr_IRQ, +}; + diff --git a/arch/sh/boards/se/7343/irq.c b/arch/sh/boards/se/7343/irq.c index 763f6deba814cdc748314ca116e2492c35646bdf..1112e86aa93abfc31f9342e681b83bc57315f334 100644 --- a/arch/sh/boards/se/7343/irq.c +++ b/arch/sh/boards/se/7343/irq.c @@ -1,202 +1,80 @@ /* - * arch/sh/boards/se/7343/irq.c + * linux/arch/sh/boards/se/7343/irq.c * + * Copyright (C) 2008 Yoshihiro Shimoda + * + * Based on linux/arch/sh/boards/se/7722/irq.c + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. */ #include -#include #include +#include #include #include -#include +#include -static void -disable_intreq_irq(unsigned int irq) +static void disable_se7343_irq(unsigned int irq) { - int bit = irq - OFFCHIP_IRQ_BASE; - u16 val; - - val = ctrl_inw(PA_CPLD_IMSK); - val |= 1 << bit; - ctrl_outw(val, PA_CPLD_IMSK); + unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; + ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); } -static void -enable_intreq_irq(unsigned int irq) +static void enable_se7343_irq(unsigned int irq) { - int bit = irq - OFFCHIP_IRQ_BASE; - u16 val; - - val = ctrl_inw(PA_CPLD_IMSK); - val &= ~(1 << bit); - ctrl_outw(val, PA_CPLD_IMSK); + unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; + ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); } -static void -mask_and_ack_intreq_irq(unsigned int irq) -{ - disable_intreq_irq(irq); -} - -static unsigned int -startup_intreq_irq(unsigned int irq) -{ - enable_intreq_irq(irq); - return 0; -} - -static void -shutdown_intreq_irq(unsigned int irq) -{ - disable_intreq_irq(irq); -} - -static void -end_intreq_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - enable_intreq_irq(irq); -} - -static struct hw_interrupt_type intreq_irq_type = { - .typename = "FPGA-IRQ", - .startup = startup_intreq_irq, - .shutdown = shutdown_intreq_irq, - .enable = enable_intreq_irq, - .disable = disable_intreq_irq, - .ack = mask_and_ack_intreq_irq, - .end = end_intreq_irq +static struct irq_chip se7343_irq_chip __read_mostly = { + .name = "SE7343-FPGA", + .mask = disable_se7343_irq, + .unmask = enable_se7343_irq, + .mask_ack = disable_se7343_irq, }; -static void -make_intreq_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - irq_desc[irq].chip = &intreq_irq_type; - disable_intreq_irq(irq); -} - -int -shmse_irq_demux(int irq) +static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) { - int bit; - volatile u16 val; - - if (irq == IRQ5_IRQ) { - /* Read status Register */ - val = ctrl_inw(PA_CPLD_ST); - bit = ffs(val); - if (bit != 0) - return OFFCHIP_IRQ_BASE + bit - 1; + unsigned short intv = ctrl_inw(PA_CPLD_ST); + struct irq_desc *ext_desc; + unsigned int ext_irq = SE7343_FPGA_IRQ_BASE; + + intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; + + while (intv) { + if (intv & 1) { + ext_desc = irq_desc + ext_irq; + handle_level_irq(ext_irq, ext_desc); + } + intv >>= 1; + ext_irq++; } - return irq; } -/* IRQ5 is multiplexed between the following sources: - * 1. PC Card socket - * 2. Extension slot - * 3. USB Controller - * 4. Serial Controller - * - * We configure IRQ5 as a cascade IRQ. - */ -static struct irqaction irq5 = { - .handler = no_action, - .mask = CPU_MASK_NONE, - .name = "IRQ5-cascade", -}; - -static struct ipr_data se7343_irq5_ipr_map[] = { - { IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY }, -}; -static struct ipr_data se7343_siof0_vpu_ipr_map[] = { - { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY }, - { VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 }, -}; -static struct ipr_data se7343_other_ipr_map[] = { - { DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, - { DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, - { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, - { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, - { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY }, - { DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY }, - - /* I2C block */ - { IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, - { IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, - { IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, - { IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, - - { IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, - { IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, - { IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, - { IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, - - /* SIOF */ - { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY }, - - /* SIU */ - { SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY }, - - /* VIO interrupt */ - { CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, - { BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, - { VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, - - /*MFI interrupt*/ - - { MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY }, - - /* LCD controller */ - { LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY }, -}; - /* * Initialize IRQ setting */ -void __init -init_7343se_IRQ(void) +void __init init_7343se_IRQ(void) { - /* Setup Multiplexed interrupts */ - ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active - * low. - */ - /* Mask all CPLD controller interrupts */ - ctrl_outw(0x0fff, PA_CPLD_IMSK); - - /* PC Card interrupts */ - make_intreq_irq(PC_IRQ0); - make_intreq_irq(PC_IRQ1); - make_intreq_irq(PC_IRQ2); - make_intreq_irq(PC_IRQ3); - - /* Extension Slot Interrupts */ - make_intreq_irq(EXT_IRQ0); - make_intreq_irq(EXT_IRQ1); - make_intreq_irq(EXT_IRQ2); - make_intreq_irq(EXT_IRQ3); - - /* USB Controller interrupts */ - make_intreq_irq(USB_IRQ0); - make_intreq_irq(USB_IRQ1); - - /* Serial Controller interrupts */ - make_intreq_irq(UART_IRQ0); - make_intreq_irq(UART_IRQ1); - - /* Setup all external interrupts to be active low */ - ctrl_outw(0xaaaa, INTC_ICR1); - - make_ipr_irq(se7343_irq5_ipr_map, ARRAY_SIZE(se7343_irq5_ipr_map)); - - setup_irq(IRQ5_IRQ, &irq5); - /* Set port control to use IRQ5 */ - *(u16 *)0xA4050108 &= ~0xc; - - make_ipr_irq(se7343_siof0_vpu_ipr_map, ARRAY_SIZE(se7343_siof0_vpu_ipr_map)); - - ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */ - - make_ipr_irq(se7343_other_ipr_map, ARRAY_SIZE(se7343_other_ipr_map)); - - ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ + int i; + + ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ + ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ + + for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) + set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i, + &se7343_irq_chip, + handle_level_irq, "level"); + + set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); + set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); + set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); + set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); + set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux); + set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); + set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux); + set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); } diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c index c9431b3a051b48694fd24771e8b662a103c24f10..8ae718d6c71006587445f69e07f17396cf38eb73 100644 --- a/arch/sh/boards/se/7343/setup.c +++ b/arch/sh/boards/se/7343/setup.c @@ -1,10 +1,11 @@ #include #include +#include #include #include +#include #include - -void init_7343se_IRQ(void); +#include static struct resource smc91x_resources[] = { [0] = { @@ -17,8 +18,8 @@ static struct resource smc91x_resources[] = { * shared with other devices via externel * interrupt controller in FPGA... */ - .start = EXT_IRQ2, - .end = EXT_IRQ2, + .start = SMC_IRQ, + .end = SMC_IRQ, .flags = IORESOURCE_IRQ, }, }; @@ -38,16 +39,65 @@ static struct resource heartbeat_resources[] = { }, }; +static struct heartbeat_data heartbeat_data = { + .regsize = 16, +}; + static struct platform_device heartbeat_device = { .name = "heartbeat", .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, .num_resources = ARRAY_SIZE(heartbeat_resources), .resource = heartbeat_resources, }; +static struct mtd_partition nor_flash_partitions[] = { + { + .name = "loader", + .offset = 0x00000000, + .size = 128 * 1024, + }, + { + .name = "rootfs", + .offset = MTDPART_OFS_APPEND, + .size = 31 * 1024 * 1024, + }, + { + .name = "data", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data nor_flash_data = { + .width = 2, + .parts = nor_flash_partitions, + .nr_parts = ARRAY_SIZE(nor_flash_partitions), +}; + +static struct resource nor_flash_resources[] = { + [0] = { + .start = 0x00000000, + .end = 0x01ffffff, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device nor_flash_device = { + .name = "physmap-flash", + .dev = { + .platform_data = &nor_flash_data, + }, + .num_resources = ARRAY_SIZE(nor_flash_resources), + .resource = nor_flash_resources, +}; + static struct platform_device *sh7343se_platform_devices[] __initdata = { &smc91x_device, &heartbeat_device, + &nor_flash_device, }; static int __init sh7343se_devices_setup(void) @@ -55,10 +105,19 @@ static int __init sh7343se_devices_setup(void) return platform_add_devices(sh7343se_platform_devices, ARRAY_SIZE(sh7343se_platform_devices)); } +device_initcall(sh7343se_devices_setup); +/* + * Initialize the board + */ static void __init sh7343se_setup(char **cmdline_p) { - device_initcall(sh7343se_devices_setup); + ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ + + ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ + ctrl_outw(0x0020, PORT_PSELD); + + printk(KERN_INFO "MS7343CP01 Setup...done\n"); } /* @@ -90,5 +149,4 @@ static struct sh_machine_vector mv_7343se __initmv = { .mv_outsl = sh7343se_outsl, .mv_init_irq = init_7343se_IRQ, - .mv_irq_demux = shmse_irq_demux, }; diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c index c4550473d4c33f2dc4e4bac5371cd9ccf19c1fcf..b1ec085b8673091c692a710698435e6a751b76fa 100644 --- a/arch/sh/boards/se/770x/io.c +++ b/arch/sh/boards/se/770x/io.c @@ -1,25 +1,13 @@ -/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $ - * - * linux/arch/sh/kernel/io_se.c - * +/* * Copyright (C) 2000 Kazumoto Kojima * * I/O routine for Hitachi SolutionEngine. - * */ - #include #include #include #include -/* SH pcmcia io window base, start and end. */ -int sh_pcic_io_wbase = 0xb8400000; -int sh_pcic_io_start; -int sh_pcic_io_stop; -int sh_pcic_io_type; -int sh_pcic_io_dummy; - /* MS7750 requires special versions of in*, out* routines, since PC-like io ports are located at upper half byte of 16-bit word which can be accessed only with 16-bit wide. */ @@ -33,8 +21,6 @@ port2adr(unsigned int port) return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); else if (port >= 0x1000) return (volatile __u16 *) (PA_83902 + (port << 1)); - else if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) - return (volatile __u16 *) (sh_pcic_io_wbase + (port &~ 1)); else return (volatile __u16 *) (PA_SUPERIO + (port << 1)); } @@ -51,32 +37,27 @@ shifted_port(unsigned long port) unsigned char se_inb(unsigned long port) { - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) - return *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); - else if (shifted_port(port)) - return (*port2adr(port) >> 8); + if (shifted_port(port)) + return (*port2adr(port) >> 8); else - return (*port2adr(port))&0xff; + return (*port2adr(port))&0xff; } unsigned char se_inb_p(unsigned long port) { unsigned long v; - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) - v = *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); - else if (shifted_port(port)) - v = (*port2adr(port) >> 8); + if (shifted_port(port)) + v = (*port2adr(port) >> 8); else - v = (*port2adr(port))&0xff; + v = (*port2adr(port))&0xff; ctrl_delay(); return v; } unsigned short se_inw(unsigned long port) { - if (port >= 0x2000 || - (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) + if (port >= 0x2000) return *port2adr(port); else maybebadio(port); @@ -91,9 +72,7 @@ unsigned int se_inl(unsigned long port) void se_outb(unsigned char value, unsigned long port) { - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) - *(__u8 *)(sh_pcic_io_wbase + port) = value; - else if (shifted_port(port)) + if (shifted_port(port)) *(port2adr(port)) = value << 8; else *(port2adr(port)) = value; @@ -101,9 +80,7 @@ void se_outb(unsigned char value, unsigned long port) void se_outb_p(unsigned char value, unsigned long port) { - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) - *(__u8 *)(sh_pcic_io_wbase + port) = value; - else if (shifted_port(port)) + if (shifted_port(port)) *(port2adr(port)) = value << 8; else *(port2adr(port)) = value; @@ -112,8 +89,7 @@ void se_outb_p(unsigned char value, unsigned long port) void se_outw(unsigned short value, unsigned long port) { - if (port >= 0x2000 || - (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) + if (port >= 0x2000) *port2adr(port) = value; else maybebadio(port); @@ -129,11 +105,7 @@ void se_insb(unsigned long port, void *addr, unsigned long count) volatile __u16 *p = port2adr(port); __u8 *ap = addr; - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) { - volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + 0x40000 + port); - while (count--) - *ap++ = *bp; - } else if (shifted_port(port)) { + if (shifted_port(port)) { while (count--) *ap++ = *p >> 8; } else { @@ -160,11 +132,7 @@ void se_outsb(unsigned long port, const void *addr, unsigned long count) volatile __u16 *p = port2adr(port); const __u8 *ap = addr; - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) { - volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + port); - while (count--) - *bp = *ap++; - } else if (shifted_port(port)) { + if (shifted_port(port)) { while (count--) *p = *ap++ << 8; } else { @@ -177,6 +145,7 @@ void se_outsw(unsigned long port, const void *addr, unsigned long count) { volatile __u16 *p = port2adr(port); const __u16 *ap = addr; + while (count--) *p = *ap++; } diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index 318bc8a3969c2d1d03fbbbb68a8b75225287302a..cf4a5ba12df4f2c343dfa3b109ed1eb93f4ed49c 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c @@ -14,8 +14,6 @@ #include #include -void init_se_IRQ(void); - /* * Configure the Super I/O chip */ @@ -73,7 +71,7 @@ static struct resource cf_ide_resources[] = { }, [1] = { .start = PA_MRSHPC_IO + 0x1f0 + 0x206, - .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, + .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8, .flags = IORESOURCE_MEM, }, [2] = { @@ -115,9 +113,58 @@ static struct platform_device heartbeat_device = { .resource = heartbeat_resources, }; +/* SH771X Ethernet driver */ +static struct resource sh_eth0_resources[] = { + [0] = { + .start = SH_ETH0_BASE, + .end = SH_ETH0_BASE + 0x1B8, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = SH_ETH0_IRQ, + .end = SH_ETH0_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sh_eth0_device = { + .name = "sh-eth", + .id = 0, + .dev = { + .platform_data = PHY_ID, + }, + .num_resources = ARRAY_SIZE(sh_eth0_resources), + .resource = sh_eth0_resources, +}; + +static struct resource sh_eth1_resources[] = { + [0] = { + .start = SH_ETH1_BASE, + .end = SH_ETH1_BASE + 0x1B8, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = SH_ETH1_IRQ, + .end = SH_ETH1_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sh_eth1_device = { + .name = "sh-eth", + .id = 1, + .dev = { + .platform_data = PHY_ID, + }, + .num_resources = ARRAY_SIZE(sh_eth1_resources), + .resource = sh_eth1_resources, +}; + static struct platform_device *se_devices[] __initdata = { &heartbeat_device, &cf_ide_device, + &sh_eth0_device, + &sh_eth1_device, }; static int __init se_devices_setup(void) diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c index ede3957fc14afa676eb8f609c06f97d651cc6949..6e228ea59788755526b0b1169a52a15a1c19afb0 100644 --- a/arch/sh/boards/se/7722/setup.c +++ b/arch/sh/boards/se/7722/setup.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -145,6 +146,8 @@ static struct platform_device *se7722_devices[] __initdata = { static int __init se7722_devices_setup(void) { + clk_always_enable("mstp214"); /* KEYSC */ + return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices)); } @@ -154,11 +157,6 @@ static void __init se7722_setup(char **cmdline_p) { ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ - ctrl_outl(0x00051001, MSTPCR0); - ctrl_outl(0x00000000, MSTPCR1); - /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC, USB */ - ctrl_outl(0xffffb7c0, MSTPCR2); - ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile index 89b408620dcbbfb68d2e3f02a534fc22e86f3a64..8b37869a822759efd58dbddfd007590aa873db76 100644 --- a/arch/sh/boot/Makefile +++ b/arch/sh/boot/Makefile @@ -40,7 +40,7 @@ KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \ $$[$(CONFIG_PAGE_OFFSET) + \ $(CONFIG_MEMORY_START) + \ - $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]') + $(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]') quiet_cmd_uimage = UIMAGE $@ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32 index c0d25fb1aa608bb4829294d0907bde736a02f82c..47685f618ae748e504bc76a99a5f3a8b822f6534 100644 --- a/arch/sh/boot/compressed/Makefile_32 +++ b/arch/sh/boot/compressed/Makefile_32 @@ -35,8 +35,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE $(call if_changed,gzip) -LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T OBJCOPYFLAGS += -R .empty_zero_page -$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE - $(call if_changed,ld) +$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE + $(call if_changed,as_o_S) diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64 index 912f3e205a0d38678c532cff4a884f80fd541d77..658d4f91555679b474e8c3c12fc00665fd5ef197 100644 --- a/arch/sh/boot/compressed/Makefile_64 +++ b/arch/sh/boot/compressed/Makefile_64 @@ -37,8 +37,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE $(call if_changed,gzip) -LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T OBJCOPYFLAGS += -R .empty_zero_page -$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE - $(call if_changed,ld) +$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE + $(call if_changed,as_o_S) diff --git a/arch/sh/boot/compressed/misc_32.c b/arch/sh/boot/compressed/misc_32.c index adcea31e663eade000c375f47badafa14189caf8..f386997e4d9c3b0c347b209b54852d3d4194e2bb 100644 --- a/arch/sh/boot/compressed/misc_32.c +++ b/arch/sh/boot/compressed/misc_32.c @@ -74,8 +74,6 @@ static unsigned outcnt = 0; /* bytes in output buffer */ static int fill_inbuf(void); static void flush_window(void); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); extern char input_data[]; extern int input_len; @@ -84,11 +82,7 @@ static long bytes_out = 0; static uch *output_data; static unsigned long output_ptr = 0; -static void *malloc(int size); -static void free(void *where); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); int puts(const char *); @@ -101,38 +95,6 @@ static unsigned long free_mem_end_ptr; #include "../../../../lib/inflate.c" -static void *malloc(int size) -{ - void *p; - - if (size <0) error("Malloc error"); - if (free_mem_ptr == 0) error("Memory error"); - - free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ - - p = (void *)free_mem_ptr; - free_mem_ptr += size; - - if (free_mem_ptr >= free_mem_end_ptr) - error("Out of memory"); - - return p; -} - -static void free(void *where) -{ /* Don't care */ -} - -static void gzip_mark(void **ptr) -{ - *ptr = (void *) free_mem_ptr; -} - -static void gzip_release(void **ptr) -{ - free_mem_ptr = (long) *ptr; -} - #ifdef CONFIG_SH_STANDARD_BIOS size_t strlen(const char *s) { diff --git a/arch/sh/boot/compressed/misc_64.c b/arch/sh/boot/compressed/misc_64.c index a006ef89b9dd26bbf655f5e35a10cf73495cf331..2941657e18aafe3aad77352c574100771864728d 100644 --- a/arch/sh/boot/compressed/misc_64.c +++ b/arch/sh/boot/compressed/misc_64.c @@ -72,8 +72,6 @@ static unsigned outcnt = 0; /* bytes in output buffer */ static int fill_inbuf(void); static void flush_window(void); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); extern char input_data[]; extern int input_len; @@ -82,11 +80,7 @@ static long bytes_out = 0; static uch *output_data; static unsigned long output_ptr = 0; -static void *malloc(int size); -static void free(void *where); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); static void puts(const char *); @@ -99,40 +93,6 @@ static unsigned long free_mem_end_ptr; #include "../../../../lib/inflate.c" -static void *malloc(int size) -{ - void *p; - - if (size < 0) - error("Malloc error\n"); - if (free_mem_ptr == 0) - error("Memory error\n"); - - free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ - - p = (void *) free_mem_ptr; - free_mem_ptr += size; - - if (free_mem_ptr >= free_mem_end_ptr) - error("\nOut of memory\n"); - - return p; -} - -static void free(void *where) -{ /* Don't care */ -} - -static void gzip_mark(void **ptr) -{ - *ptr = (void *) free_mem_ptr; -} - -static void gzip_release(void **ptr) -{ - free_mem_ptr = (long) *ptr; -} - void puts(const char *s) { } diff --git a/arch/sh/boot/compressed/piggy.S b/arch/sh/boot/compressed/piggy.S new file mode 100644 index 0000000000000000000000000000000000000000..566071926b1360be59065bfe0956cbfbf4f73832 --- /dev/null +++ b/arch/sh/boot/compressed/piggy.S @@ -0,0 +1,8 @@ + .global input_len, input_data + .data +input_len: + .long input_data_end - input_data +input_data: + .incbin "arch/sh/boot/compressed/vmlinux.bin.gz" +input_data_end: + .end diff --git a/arch/sh/boot/compressed/vmlinux.scr b/arch/sh/boot/compressed/vmlinux.scr deleted file mode 100644 index 1ed9d791f8638c5a6f9e5bc8d1831779d411b2b6..0000000000000000000000000000000000000000 --- a/arch/sh/boot/compressed/vmlinux.scr +++ /dev/null @@ -1,9 +0,0 @@ -SECTIONS -{ - .data : { - input_len = .; - LONG(input_data_end - input_data) input_data = .; - *(.data) - input_data_end = .; - } -} diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..5471df53753c3ac7978bb4dd601683212bc268f4 --- /dev/null +++ b/arch/sh/configs/ap325rxa_defconfig @@ -0,0 +1,947 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc4 +# Wed Jun 4 17:30:00 2008 +# +CONFIG_SUPERH=y +CONFIG_SUPERH32=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System type +# +CONFIG_CPU_SH4=y +CONFIG_CPU_SH4A=y +CONFIG_CPU_SHX2=y +# CONFIG_CPU_SUBTYPE_SH7619 is not set +# CONFIG_CPU_SUBTYPE_SH7203 is not set +# CONFIG_CPU_SUBTYPE_SH7206 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set +# CONFIG_CPU_SUBTYPE_MXG is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set +# CONFIG_CPU_SUBTYPE_SH7712 is not set +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set +CONFIG_CPU_SUBTYPE_SH7723=y +# CONFIG_CPU_SUBTYPE_SH7763 is not set +# CONFIG_CPU_SUBTYPE_SH7770 is not set +# CONFIG_CPU_SUBTYPE_SH7780 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH7366 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set + +# +# Memory management options +# +CONFIG_QUICKLIST=y +CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x08000000 +CONFIG_29BIT=y +# CONFIG_X2TLB is not set +CONFIG_VSYSCALL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SH_FPU=y +# CONFIG_SH_STORE_QUEUES is not set +CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_PTEA=y +CONFIG_CPU_HAS_FPU=y + +# +# Board support +# +CONFIG_SH_AP325RXA=y + +# +# Timer and clock configuration +# +CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=16 +CONFIG_SH_PCLK_FREQ=33333333 +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +# CONFIG_SH_DMA is not set + +# +# Companion Chips +# + +# +# Additional SuperH Device Drivers +# +# CONFIG_HEARTBEAT is not set +# CONFIG_PUSH_SWITCH is not set + +# +# Kernel features +# +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +# CONFIG_PREEMPT_RCU is not set +CONFIG_GUSA=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp" + +# +# Bus options +# +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0xffffffff +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=4 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_STNIC is not set +# CONFIG_SMC91X is not set +CONFIG_SMC911X=y +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=6 +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +# CONFIG_NFSD_V4 is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_SAMPLES is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_SH_KGDB is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig index f52db125432f6c6bf0b7fd2d47be88d398dcbc8a..38f934ab50c76b7f12308255e25b8ab027378c62 100644 --- a/arch/sh/configs/landisk_defconfig +++ b/arch/sh/configs/landisk_defconfig @@ -226,7 +226,6 @@ CONFIG_CPU_HAS_PTEA=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 -# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=33333333 # diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig index 9fa66d92a4e75db47a6432cacac5e5b524818f55..b68b6cdbb78f06d940024cf48a1885d51a258ad8 100644 --- a/arch/sh/configs/lboxre2_defconfig +++ b/arch/sh/configs/lboxre2_defconfig @@ -231,7 +231,6 @@ CONFIG_CPU_HAS_PTEA=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 -# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=40000000 # diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig index 84c0075e2ad47c6492f0d5d7ba081097565e8fbd..7b72736384474f23ca39f755a0bfbcc9ee61786b 100644 --- a/arch/sh/configs/se7343_defconfig +++ b/arch/sh/configs/se7343_defconfig @@ -1,40 +1,55 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.18 -# Tue Oct 3 11:46:17 2006 +# Linux kernel version: 2.6.26-rc8 +# Mon Jul 7 13:12:45 2008 # CONFIG_SUPERH=y +CONFIG_SUPERH32=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y # CONFIG_SWAP is not set CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set -CONFIG_INITRAMFS_SOURCE="" +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y CONFIG_EMBEDDED=y @@ -46,33 +61,41 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y # CONFIG_FUTEX is not set +CONFIG_ANON_INODES=y # CONFIG_EPOLL is not set +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y # CONFIG_SHMEM is not set -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_TINY_SHMEM=y CONFIG_BASE_SMALL=0 -# CONFIG_SLOB is not set - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_KMOD is not set - -# -# Block layer -# CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set # # IO Schedulers @@ -86,62 +109,28 @@ CONFIG_DEFAULT_DEADLINE=y # CONFIG_DEFAULT_CFQ is not set # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="deadline" +CONFIG_CLASSIC_RCU=y # # System type # -CONFIG_SOLUTION_ENGINE=y -# CONFIG_SH_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SOLUTION_ENGINE is not set -# CONFIG_SH_7300_SOLUTION_ENGINE is not set -CONFIG_SH_7343_SOLUTION_ENGINE=y -# CONFIG_SH_73180_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SYSTEMH is not set -# CONFIG_SH_HP6XX is not set -# CONFIG_SH_EC3104 is not set -# CONFIG_SH_SATURN is not set -# CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_BIGSUR is not set -# CONFIG_SH_MPC1211 is not set -# CONFIG_SH_SH03 is not set -# CONFIG_SH_SECUREEDGE5410 is not set -# CONFIG_SH_HS7751RVOIP is not set -# CONFIG_SH_7710VOIPGW is not set -# CONFIG_SH_RTS7751R2D is not set -# CONFIG_SH_R7780RP is not set -# CONFIG_SH_EDOSK7705 is not set -# CONFIG_SH_SH4202_MICRODEV is not set -# CONFIG_SH_LANDISK is not set -# CONFIG_SH_TITAN is not set -# CONFIG_SH_SHMIN is not set -# CONFIG_SH_UNKNOWN is not set - -# -# Processor selection -# CONFIG_CPU_SH4=y CONFIG_CPU_SH4A=y CONFIG_CPU_SH4AL_DSP=y - -# -# SH-2 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7604 is not set - -# -# SH-3 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7619 is not set +# CONFIG_CPU_SUBTYPE_SH7203 is not set +# CONFIG_CPU_SUBTYPE_SH7206 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set +# CONFIG_CPU_SUBTYPE_MXG is not set # CONFIG_CPU_SUBTYPE_SH7705 is not set # CONFIG_CPU_SUBTYPE_SH7706 is not set # CONFIG_CPU_SUBTYPE_SH7707 is not set # CONFIG_CPU_SUBTYPE_SH7708 is not set # CONFIG_CPU_SUBTYPE_SH7709 is not set # CONFIG_CPU_SUBTYPE_SH7710 is not set - -# -# SH-4 Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7712 is not set +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set # CONFIG_CPU_SUBTYPE_SH7750 is not set # CONFIG_CPU_SUBTYPE_SH7091 is not set # CONFIG_CPU_SUBTYPE_SH7750R is not set @@ -150,67 +139,88 @@ CONFIG_CPU_SH4AL_DSP=y # CONFIG_CPU_SUBTYPE_SH7751R is not set # CONFIG_CPU_SUBTYPE_SH7760 is not set # CONFIG_CPU_SUBTYPE_SH4_202 is not set - -# -# ST40 Processor Support -# -# CONFIG_CPU_SUBTYPE_ST40STB1 is not set -# CONFIG_CPU_SUBTYPE_ST40GX1 is not set - -# -# SH-4A Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7723 is not set +# CONFIG_CPU_SUBTYPE_SH7763 is not set # CONFIG_CPU_SUBTYPE_SH7770 is not set # CONFIG_CPU_SUBTYPE_SH7780 is not set - -# -# SH4AL-DSP Processor Support -# -# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set CONFIG_CPU_SUBTYPE_SH7343=y +# CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH7366 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set # # Memory management options # +CONFIG_QUICKLIST=y CONFIG_MMU=y CONFIG_PAGE_OFFSET=0x80000000 CONFIG_MEMORY_START=0x0c000000 CONFIG_MEMORY_SIZE=0x01000000 -CONFIG_32BIT=y +CONFIG_29BIT=y CONFIG_VSYSCALL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 # # Cache configuration # # CONFIG_SH_DIRECT_MAPPED is not set -# CONFIG_SH_WRITETHROUGH is not set -# CONFIG_SH_OCRAM is not set +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set # # Processor features # CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_SH_FPU is not set +# CONFIG_CPU_BIG_ENDIAN is not set # CONFIG_SH_FPU_EMU is not set CONFIG_SH_DSP=y # CONFIG_SH_STORE_QUEUES is not set CONFIG_CPU_HAS_INTEVT=y CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_DSP=y + +# +# Board support +# +CONFIG_SOLUTION_ENGINE=y +CONFIG_SH_7343_SOLUTION_ENGINE=y # -# Timer support +# Timer and clock configuration # CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=16 CONFIG_SH_PCLK_FREQ=27000000 +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # # CPU Frequency scaling @@ -225,56 +235,49 @@ CONFIG_SH_PCLK_FREQ=27000000 # # Companion Chips # -# CONFIG_HD6446X_SERIES is not set + +# +# Additional SuperH Device Drivers +# CONFIG_HEARTBEAT=y +# CONFIG_PUSH_SWITCH is not set # # Kernel features # # CONFIG_HZ_100 is not set CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set # CONFIG_KEXEC is not set -# CONFIG_SMP is not set +# CONFIG_CRASH_DUMP is not set CONFIG_PREEMPT_NONE=y # CONFIG_PREEMPT_VOLUNTARY is not set # CONFIG_PREEMPT is not set +CONFIG_GUSA=y # # Boot options # CONFIG_ZERO_PAGE_OFFSET=0x00001000 CONFIG_BOOT_LINK_OFFSET=0x00800000 -# CONFIG_UBC_WAKEUP is not set # CONFIG_CMDLINE_BOOL is not set # # Bus options # -# CONFIG_PCI is not set - -# -# PCCARD (PCMCIA/CardBus) support -# +# CONFIG_CF_ENABLER is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set -# -# PCI Hotplug Support -# - # # Executable file formats # CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_FLAT is not set # CONFIG_BINFMT_MISC is not set -# -# Power management options (EXPERIMENTAL) -# -# CONFIG_PM is not set - # # Networking # @@ -283,22 +286,20 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set +# CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_ARPD is not set @@ -310,29 +311,18 @@ CONFIG_SYN_COOKIES=y # CONFIG_INET_TUNNEL is not set CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set # CONFIG_INET_DIAG is not set # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -345,10 +335,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# # CONFIG_NET_SCHED is not set # @@ -356,9 +342,20 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set # CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set # # Device Drivers @@ -367,36 +364,32 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y # CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set CONFIG_MTD_CONCAT=y CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -422,13 +415,15 @@ CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_RAM=y # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access # # CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PHYSMAP is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 # CONFIG_MTD_PLATRAM is not set # @@ -445,130 +440,101 @@ CONFIG_MTD_RAM=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# # CONFIG_MTD_NAND is not set - -# -# OneNAND Flash Device Drivers -# # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set - -# -# Plug and Play support -# - -# -# Block devices -# +CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set -# CONFIG_BLK_DEV_INITRD is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# ATA/ATAPI/MFM/RLL support -# +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y # -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# -# CONFIG_ATA is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support +# SCSI support type (disk, tape, CD-ROM) # +# CONFIG_BLK_DEV_SD is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set # -# I2O device support +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs # +CONFIG_SCSI_MULTI_LUN=y +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # -# Network device support +# SCSI Transports # +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# PHY device support -# +# CONFIG_VETH is not set # CONFIG_PHYLIB is not set - -# -# Ethernet (10 or 100Mbit) -# CONFIG_NET_ETHERNET=y CONFIG_MII=y +# CONFIG_AX88796 is not set # CONFIG_STNIC is not set CONFIG_SMC91X=y +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_E1000E_ENABLED is not set +CONFIG_NETDEV_10000=y # -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # CONFIG_WAN is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set - -# -# Telephony Support -# # CONFIG_PHONE is not set # @@ -576,13 +542,13 @@ CONFIG_SMC91X=y # CONFIG_INPUT=y # CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces # # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -592,6 +558,7 @@ CONFIG_INPUT=y # CONFIG_INPUT_KEYBOARD is not set # CONFIG_INPUT_MOUSE is not set # CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -608,6 +575,7 @@ CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -626,147 +594,102 @@ CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_UNIX98_PTYS is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set - -# -# I2C support -# -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y - -# -# I2C Algorithms -# -# CONFIG_I2C_ALGOBIT is not set -# CONFIG_I2C_ALGOPCF is not set -# CONFIG_I2C_ALGOPCA is not set - -# -# I2C Hardware Bus support -# -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_PCA_ISA is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_SENSORS_DS1337 is not set -# CONFIG_SENSORS_DS1374 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# SPI support -# +# CONFIG_I2C is not set # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set # -# Dallas's 1-wire bus +# Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # -# Hardware Monitoring support +# Multifunction device drivers # -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set # -# Misc devices +# Multimedia devices # # -# Multimedia devices +# Multimedia core support # CONFIG_VIDEO_DEV=y -CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y CONFIG_VIDEO_V4L1_COMPAT=y -CONFIG_VIDEO_V4L2=y - -# -# Video Capture Adapters -# +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y # -# Video Capture Adapters +# Multimedia drivers # +# CONFIG_MEDIA_ATTACH is not set +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y # CONFIG_VIDEO_ADV_DEBUG is not set CONFIG_VIDEO_HELPER_CHIPS_AUTO=y # CONFIG_VIDEO_VIVI is not set # CONFIG_VIDEO_CPIA is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_TUNER_3036 is not set - -# -# Radio Adapters -# - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set +# CONFIG_SOC_CAMERA is not set +CONFIG_RADIO_ADAPTERS=y +# CONFIG_DAB is not set # # Graphics support # -CONFIG_FIRMWARE_EDID=y +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set # CONFIG_FB_CFB_FILLRECT is not set # CONFIG_FB_CFB_COPYAREA is not set # CONFIG_FB_CFB_IMAGEBLIT is not set +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set -# CONFIG_FB_EPSON1355 is not set + +# +# Frame buffer hardware drivers +# # CONFIG_FB_S1D13XXX is not set # CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # -# Console display driver support +# Display device support # -CONFIG_DUMMY_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set +# CONFIG_DISPLAY_SUPPORT is not set # -# Logo configuration +# Console display driver support # +CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set # CONFIG_LOGO is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -802,85 +725,63 @@ CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_MPU401 is not set # -# Open Sound System +# SUPERH devices # -# CONFIG_SOUND_PRIME is not set # -# USB support +# System on Chip audio support # -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set -# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_SND_SOC is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# SoC Audio support for SuperH # # -# USB Gadget Support +# ALSA SoC audio for Freescale SOCs # -# CONFIG_USB_GADGET is not set # -# MMC/SD Card support +# SoC Audio for the Texas Instruments OMAP # -# CONFIG_MMC is not set # -# LED devices +# Open Sound System # +# CONFIG_SOUND_PRIME is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set +# CONFIG_USB_SUPPORT is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set # CONFIG_NEW_LEDS is not set - -# -# LED drivers -# - -# -# LED Triggers -# - -# -# InfiniBand support -# - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# +# CONFIG_ACCESSIBILITY is not set # CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# +# CONFIG_UIO is not set # # File systems # -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +# CONFIG_DNOTIFY is not set # CONFIG_INOTIFY is not set # CONFIG_QUOTA is not set -# CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -909,7 +810,6 @@ CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLBFS is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -922,40 +822,39 @@ CONFIG_RAMFS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -# CONFIG_JFFS_FS is not set CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set # CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_FS_XATTR is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set +CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# +CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_TCP is not set -CONFIG_ROOT_NFS=y +# CONFIG_NFSD_V4 is not set CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_EXPORTFS=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -963,56 +862,130 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# # CONFIG_NLS is not set - -# -# Profiling support -# -# CONFIG_PROFILING is not set +# CONFIG_DLM is not set # # Kernel hacking # +CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set -CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_FS is not set +# CONFIG_SAMPLES is not set # CONFIG_SH_STANDARD_BIOS is not set -# CONFIG_EARLY_SCIF_CONSOLE is not set -# CONFIG_KGDB is not set +CONFIG_EARLY_SCIF_CONSOLE=y +CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000 +CONFIG_EARLY_PRINTK=y +# CONFIG_SH_KGDB is not set # # Security options # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # -# Cryptographic options +# Compression # -# CONFIG_CRYPTO is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y # # Library routines # +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig index 84717d854867c4d6eaeb4ab415d19b633872c233..490dcbc2ce330af9262b8e8b55d94e0a3aacece8 100644 --- a/arch/sh/configs/se7705_defconfig +++ b/arch/sh/configs/se7705_defconfig @@ -239,7 +239,6 @@ CONFIG_CPU_HAS_SR_RB=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 -# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=33333333 # diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig index 240a1cef69aacc3cdcdfe5aa30113c3603276716..7be79cd04eb0385936d2f7d01642988813bf7d83 100644 --- a/arch/sh/configs/se7712_defconfig +++ b/arch/sh/configs/se7712_defconfig @@ -1,53 +1,57 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.21-rc4 -# Wed Mar 28 10:19:02 2007 +# Linux kernel version: 2.6.26-rc6 +# Wed Jun 18 16:36:08 2008 # CONFIG_SUPERH=y +CONFIG_SUPERH32=y CONFIG_RWSEM_GENERIC_SPINLOCK=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_GENERIC_TIME is not set +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set # CONFIG_SWAP is not set CONFIG_SYSVIPC=y -# CONFIG_IPC_NS is not set CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_BSD_PROCESS_ACCT=y # CONFIG_BSD_PROCESS_ACCT_V3 is not set # CONFIG_TASKSTATS is not set -# CONFIG_UTS_NS is not set # CONFIG_AUDIT is not set # CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set # CONFIG_BLK_DEV_INITRD is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_SYSCTL=y CONFIG_EMBEDDED=y CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y # CONFIG_KALLSYMS_EXTRA_PASS is not set @@ -55,33 +59,41 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y # CONFIG_BUG is not set CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y # CONFIG_BASE_FULL is not set CONFIG_FUTEX=y +CONFIG_ANON_INODES=y CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y # CONFIG_SHMEM is not set -CONFIG_SLAB=y CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y CONFIG_TINY_SHMEM=y CONFIG_BASE_SMALL=1 -# CONFIG_SLOB is not set - -# -# Loadable module support -# CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set # CONFIG_MODULE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_KMOD is not set - -# -# Block layer -# CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set # CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set # # IO Schedulers @@ -95,57 +107,17 @@ CONFIG_IOSCHED_NOOP=y # CONFIG_DEFAULT_CFQ is not set CONFIG_DEFAULT_NOOP=y CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_CLASSIC_RCU=y # # System type # -CONFIG_SOLUTION_ENGINE=y -CONFIG_SH_SOLUTION_ENGINE=y -# CONFIG_SH_7751_SOLUTION_ENGINE is not set -# CONFIG_SH_7300_SOLUTION_ENGINE is not set -# CONFIG_SH_7343_SOLUTION_ENGINE is not set -# CONFIG_SH_73180_SOLUTION_ENGINE is not set -# CONFIG_SH_7751_SYSTEMH is not set -# CONFIG_SH_HP6XX is not set -# CONFIG_SH_SATURN is not set -# CONFIG_SH_DREAMCAST is not set -# CONFIG_SH_MPC1211 is not set -# CONFIG_SH_SH03 is not set -# CONFIG_SH_SECUREEDGE5410 is not set -# CONFIG_SH_HS7751RVOIP is not set -# CONFIG_SH_7710VOIPGW is not set -# CONFIG_SH_RTS7751R2D is not set -# CONFIG_SH_HIGHLANDER is not set -# CONFIG_SH_EDOSK7705 is not set -# CONFIG_SH_SH4202_MICRODEV is not set -# CONFIG_SH_LANDISK is not set -# CONFIG_SH_TITAN is not set -# CONFIG_SH_SHMIN is not set -# CONFIG_SH_7206_SOLUTION_ENGINE is not set -# CONFIG_SH_7619_SOLUTION_ENGINE is not set -# CONFIG_SH_LBOX_RE2 is not set -# CONFIG_SH_UNKNOWN is not set - -# -# Processor selection -# CONFIG_CPU_SH3=y - -# -# SH-2 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7604 is not set # CONFIG_CPU_SUBTYPE_SH7619 is not set - -# -# SH-2A Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7203 is not set # CONFIG_CPU_SUBTYPE_SH7206 is not set - -# -# SH-3 Processor Support -# -# CONFIG_CPU_SUBTYPE_SH7300 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set +# CONFIG_CPU_SUBTYPE_MXG is not set # CONFIG_CPU_SUBTYPE_SH7705 is not set # CONFIG_CPU_SUBTYPE_SH7706 is not set # CONFIG_CPU_SUBTYPE_SH7707 is not set @@ -153,10 +125,8 @@ CONFIG_CPU_SH3=y # CONFIG_CPU_SUBTYPE_SH7709 is not set # CONFIG_CPU_SUBTYPE_SH7710 is not set CONFIG_CPU_SUBTYPE_SH7712=y - -# -# SH-4 Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set # CONFIG_CPU_SUBTYPE_SH7750 is not set # CONFIG_CPU_SUBTYPE_SH7091 is not set # CONFIG_CPU_SUBTYPE_SH7750R is not set @@ -165,37 +135,37 @@ CONFIG_CPU_SUBTYPE_SH7712=y # CONFIG_CPU_SUBTYPE_SH7751R is not set # CONFIG_CPU_SUBTYPE_SH7760 is not set # CONFIG_CPU_SUBTYPE_SH4_202 is not set - -# -# ST40 Processor Support -# -# CONFIG_CPU_SUBTYPE_ST40STB1 is not set -# CONFIG_CPU_SUBTYPE_ST40GX1 is not set - -# -# SH-4A Processor Support -# +# CONFIG_CPU_SUBTYPE_SH7723 is not set +# CONFIG_CPU_SUBTYPE_SH7763 is not set # CONFIG_CPU_SUBTYPE_SH7770 is not set # CONFIG_CPU_SUBTYPE_SH7780 is not set # CONFIG_CPU_SUBTYPE_SH7785 is not set - -# -# SH4AL-DSP Processor Support -# -# CONFIG_CPU_SUBTYPE_SH73180 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set # CONFIG_CPU_SUBTYPE_SH7343 is not set # CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH7366 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set # # Memory management options # +CONFIG_QUICKLIST=y CONFIG_MMU=y CONFIG_PAGE_OFFSET=0x80000000 CONFIG_MEMORY_START=0x0c000000 CONFIG_MEMORY_SIZE=0x02000000 +CONFIG_29BIT=y CONFIG_VSYSCALL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y @@ -203,21 +173,21 @@ CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 # # Cache configuration # # CONFIG_SH_DIRECT_MAPPED is not set -# CONFIG_SH_WRITETHROUGH is not set -# CONFIG_SH_OCRAM is not set -CONFIG_CF_ENABLER=y -# CONFIG_CF_AREA5 is not set -CONFIG_CF_AREA6=y -CONFIG_CF_BASE_ADDR=0xb8000000 +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set # # Processor features @@ -230,14 +200,25 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_HAS_INTEVT=y CONFIG_CPU_HAS_IPR_IRQ=y CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_DSP=y + +# +# Board support +# +CONFIG_SOLUTION_ENGINE=y +CONFIG_SH_SOLUTION_ENGINE=y +# CONFIG_SH_AP325RXA is not set # # Timer and clock configuration # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 -# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=66666666 +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y # # CPU Frequency scaling @@ -252,7 +233,6 @@ CONFIG_SH_PCLK_FREQ=66666666 # # Companion Chips # -# CONFIG_HD6446X_SERIES is not set # # Additional SuperH Device Drivers @@ -268,47 +248,39 @@ CONFIG_HZ_250=y # CONFIG_HZ_300 is not set # CONFIG_HZ_1000 is not set CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set # CONFIG_KEXEC is not set -# CONFIG_SMP is not set +# CONFIG_CRASH_DUMP is not set # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set +CONFIG_GUSA=y +# CONFIG_GUSA_RB is not set # # Boot options # CONFIG_ZERO_PAGE_OFFSET=0x00001000 CONFIG_BOOT_LINK_OFFSET=0x00800000 -# CONFIG_UBC_WAKEUP is not set CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1" # # Bus options # -# CONFIG_PCI is not set - -# -# PCCARD (PCMCIA/CardBus) support -# +CONFIG_CF_ENABLER=y +# CONFIG_CF_AREA5 is not set +CONFIG_CF_AREA6=y +CONFIG_CF_BASE_ADDR=0xb8000000 +# CONFIG_ARCH_SUPPORTS_MSI is not set # CONFIG_PCCARD is not set -# -# PCI Hotplug Support -# - # # Executable file formats # CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_FLAT is not set # CONFIG_BINFMT_MISC is not set -# -# Power management options (EXPERIMENTAL) -# -# CONFIG_PM is not set - # # Networking # @@ -317,7 +289,6 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y @@ -325,6 +296,7 @@ CONFIG_XFRM=y # CONFIG_XFRM_USER is not set # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set CONFIG_NET_KEY=y # CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y @@ -335,11 +307,10 @@ CONFIG_ASK_IP_FIB_HASH=y CONFIG_IP_FIB_HASH=y CONFIG_IP_MULTIPLE_TABLES=y CONFIG_IP_ROUTE_MULTIPATH=y -# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set CONFIG_IP_ROUTE_VERBOSE=y CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set +CONFIG_IP_PNP_BOOTP=y # CONFIG_IP_PNP_RARP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set @@ -356,30 +327,17 @@ CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set # CONFIG_INET_DIAG is not set # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set # CONFIG_IPV6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set # CONFIG_NETWORK_SECMARK is not set # CONFIG_NETFILTER is not set - -# -# DCCP Configuration (EXPERIMENTAL) -# # CONFIG_IP_DCCP is not set - -# -# SCTP Configuration (EXPERIMENTAL) -# # CONFIG_IP_SCTP is not set - -# -# TIPC Configuration (EXPERIMENTAL) -# # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set @@ -392,15 +350,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# CONFIG_NET_SCHED=y -CONFIG_NET_SCH_FIFO=y -CONFIG_NET_SCH_CLK_JIFFIES=y -# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set -# CONFIG_NET_SCH_CLK_CPU is not set # # Queueing/Scheduling @@ -409,6 +359,7 @@ CONFIG_NET_SCH_CBQ=y CONFIG_NET_SCH_HTB=y CONFIG_NET_SCH_HFSC=y CONFIG_NET_SCH_PRIO=y +# CONFIG_NET_SCH_RR is not set CONFIG_NET_SCH_RED=y CONFIG_NET_SCH_SFQ=y CONFIG_NET_SCH_TEQL=y @@ -416,7 +367,6 @@ CONFIG_NET_SCH_TBF=y CONFIG_NET_SCH_GRED=y CONFIG_NET_SCH_DSMARK=y CONFIG_NET_SCH_NETEM=y -CONFIG_NET_SCH_INGRESS=y # # Classification @@ -430,22 +380,33 @@ CONFIG_NET_CLS_FW=y # CONFIG_NET_CLS_U32 is not set # CONFIG_NET_CLS_RSVP is not set # CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set # CONFIG_NET_EMATCH is not set # CONFIG_NET_CLS_ACT is not set -# CONFIG_NET_CLS_POLICE is not set CONFIG_NET_CLS_IND=y -CONFIG_NET_ESTIMATOR=y +CONFIG_NET_SCH_FIFO=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set -# CONFIG_IEEE80211 is not set +# CONFIG_AF_RXRPC is not set CONFIG_FIB_RULES=y +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + # # Device Drivers # @@ -453,27 +414,21 @@ CONFIG_FIB_RULES=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set - -# -# Connector - unified userspace <-> kernelspace linker -# # CONFIG_CONNECTOR is not set - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set CONFIG_MTD_CONCAT=y CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers @@ -486,6 +441,7 @@ CONFIG_MTD_BLOCK=y # CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set # CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set # # RAM/ROM/Flash chip drivers @@ -511,7 +467,6 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access @@ -534,44 +489,25 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set # CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# # CONFIG_MTD_NAND is not set - -# -# OneNAND Flash Device Drivers -# # CONFIG_MTD_ONENAND is not set # -# Parallel port support +# UBI - Unsorted block images # +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set - -# -# Plug and Play support -# -# CONFIG_PNPACPI is not set - -# -# Block devices -# +CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set - -# -# Misc devices -# - -# -# ATA/ATAPI/MFM/RLL support -# +CONFIG_MISC_DEVICES=y +# CONFIG_EEPROM_93CX6 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # @@ -579,6 +515,7 @@ CONFIG_MTD_CFI_UTIL=y # # CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y +CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set # CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y @@ -600,6 +537,7 @@ CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m # # SCSI Transports @@ -607,94 +545,72 @@ CONFIG_BLK_DEV_SD=y # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_SCSI_DEBUG is not set - -# -# Serial ATA (prod) and Parallel ATA (experimental) drivers -# CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +CONFIG_ATA_SFF=y +# CONFIG_SATA_MV is not set CONFIG_PATA_PLATFORM=y - -# -# Multi-device support (RAID and LVM) -# # CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set - -# -# PHY device support -# - -# -# Ethernet (10 or 100Mbit) -# -# CONFIG_NET_ETHERNET is not set - -# -# Ethernet (1000 Mbit) -# - -# -# Ethernet (10000 Mbit) -# - -# -# Token Ring devices -# - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +CONFIG_MDIO_BITBANG=y +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_STNIC is not set +CONFIG_SH_ETH=y +# CONFIG_SMC91X is not set +# CONFIG_SMC911X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +CONFIG_NETDEV_1000=y +# CONFIG_E1000E_ENABLED is not set +CONFIG_NETDEV_10000=y + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set # CONFIG_WAN is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set -# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# # CONFIG_ISDN is not set - -# -# Telephony Support -# # CONFIG_PHONE is not set # @@ -712,6 +628,7 @@ CONFIG_NETDEVICES=y # Character devices # # CONFIG_VT is not set +CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set # @@ -729,99 +646,78 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# # CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=m -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# # CONFIG_TCG_TPM is not set - -# -# I2C support -# # CONFIG_I2C is not set - -# -# SPI support -# # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set - -# -# Dallas's 1-wire bus -# # CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set # -# Hardware Monitoring support +# Sonics Silicon Backplane # -# CONFIG_HWMON is not set -# CONFIG_HWMON_VID is not set +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # # Multifunction device drivers # # CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set # -# Digital Video Broadcasting Devices +# Multimedia drivers # -# CONFIG_DVB is not set +# CONFIG_DAB is not set # # Graphics support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set # CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # -# Sound +# Display device support # -# CONFIG_SOUND is not set +# CONFIG_DISPLAY_SUPPORT is not set # -# USB support +# Sound # -# CONFIG_USB_ARCH_HAS_HCD is not set +# CONFIG_SOUND is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y # CONFIG_USB_ARCH_HAS_OHCI is not set # CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # - -# -# USB Gadget Support -# # CONFIG_USB_GADGET is not set - -# -# MMC/SD Card support -# # CONFIG_MMC is not set - -# -# LED devices -# +# CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -835,40 +731,10 @@ CONFIG_LEDS_CLASS=y CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_TIMER is not set # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set - -# -# InfiniBand support -# - -# -# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) -# - -# -# Real Time Clock -# +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_ACCESSIBILITY is not set # CONFIG_RTC_CLASS is not set - -# -# DMA Engine support -# -# CONFIG_DMA_ENGINE is not set - -# -# DMA Clients -# - -# -# DMA Devices -# - -# -# Auxiliary Display support -# - -# -# Virtualization -# +# CONFIG_UIO is not set # # File systems @@ -878,20 +744,21 @@ CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_POSIX_ACL=y CONFIG_EXT2_FS_SECURITY=y # CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set # CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +# CONFIG_DNOTIFY is not set # CONFIG_INOTIFY is not set # CONFIG_QUOTA is not set -# CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -920,7 +787,6 @@ CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLBFS is not set # CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -936,68 +802,67 @@ CONFIG_RAMFS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set # CONFIG_JFFS2_SUMMARY is not set # CONFIG_JFFS2_FS_XATTR is not set # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set CONFIG_JFFS2_ZLIB=y +# CONFIG_JFFS2_LZO is not set CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# -# CONFIG_NFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set # CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set -# CONFIG_9P_FS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# # CONFIG_NLS is not set - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set -# -# Profiling support -# -# CONFIG_PROFILING is not set - # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set -CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DETECT_SOFTLOCKUP is not set +CONFIG_SCHED_DEBUG=y # CONFIG_SCHEDSTATS is not set # CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set @@ -1005,21 +870,28 @@ CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_MUTEXES is not set # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set CONFIG_FRAME_POINTER=y -# CONFIG_FORCED_INLINING is not set +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set # CONFIG_SH_STANDARD_BIOS is not set # CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_DEBUG_BOOTMEM is not set # CONFIG_DEBUG_STACKOVERFLOW is not set # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_4KSTACKS is not set +# CONFIG_IRQSTACKS is not set # CONFIG_SH_KGDB is not set # @@ -1027,62 +899,100 @@ CONFIG_FRAME_POINTER=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y # -# Cryptographic options +# Crypto core or helper # -CONFIG_CRYPTO=y CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_BLKCIPHER=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_LRW is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# CONFIG_CRYPTO_HMAC=y # CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_NULL is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set CONFIG_CRYPTO_SHA1=y # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_GF128MUL is not set -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_PCBC=m -# CONFIG_CRYPTO_LRW is not set -CONFIG_CRYPTO_DES=y -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_TWOFISH is not set -# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# # CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_ARC4 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_DEFLATE=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set # -# Hardware crypto devices +# Compression # +CONFIG_CRYPTO_DEFLATE=y +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y # # Library routines # CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y +# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig index c60b6fd4fc421cb9fbbb19c68532c62349b36387..167786f9a9bd1687fddbe50ef47e1679bcc63668 100644 --- a/arch/sh/configs/se7750_defconfig +++ b/arch/sh/configs/se7750_defconfig @@ -235,7 +235,6 @@ CONFIG_CPU_HAS_PTEA=y # CONFIG_SH_TMU=y CONFIG_SH_TIMER_IRQ=16 -# CONFIG_NO_IDLE_HZ is not set CONFIG_SH_PCLK_FREQ=33333333 # diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..83f3fe5db3e535d0c4fa4329b68599b15c36d7b7 --- /dev/null +++ b/arch/sh/configs/sh7763rdp_defconfig @@ -0,0 +1,1052 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc4 +# Fri Jun 6 12:20:17 2008 +# +CONFIG_SUPERH=y +CONFIG_SUPERH32=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +CONFIG_OPROFILE=y +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +# CONFIG_MODULE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_CLASSIC_RCU=y + +# +# System type +# +CONFIG_CPU_SH4=y +CONFIG_CPU_SH4A=y +# CONFIG_CPU_SUBTYPE_SH7619 is not set +# CONFIG_CPU_SUBTYPE_SH7203 is not set +# CONFIG_CPU_SUBTYPE_SH7206 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set +# CONFIG_CPU_SUBTYPE_MXG is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set +# CONFIG_CPU_SUBTYPE_SH7712 is not set +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set +# CONFIG_CPU_SUBTYPE_SH7723 is not set +CONFIG_CPU_SUBTYPE_SH7763=y +# CONFIG_CPU_SUBTYPE_SH7770 is not set +# CONFIG_CPU_SUBTYPE_SH7780 is not set +# CONFIG_CPU_SUBTYPE_SH7785 is not set +# CONFIG_CPU_SUBTYPE_SHX3 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH7366 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set + +# +# Memory management options +# +CONFIG_QUICKLIST=y +CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_MEMORY_START=0x0c000000 +CONFIG_MEMORY_SIZE=0x04000000 +CONFIG_29BIT=y +CONFIG_VSYSCALL=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=1 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SH_FPU=y +# CONFIG_SH_STORE_QUEUES is not set +CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_FPU=y + +# +# Board support +# +CONFIG_SH_SH7763RDP=y + +# +# Timer and clock configuration +# +CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=28 +CONFIG_SH_PCLK_FREQ=66666666 +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +# CONFIG_SH_DMA is not set + +# +# Companion Chips +# + +# +# Additional SuperH Device Drivers +# +# CONFIG_HEARTBEAT is not set +# CONFIG_PUSH_SWITCH is not set + +# +# Kernel features +# +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +# CONFIG_KEXEC is not set +# CONFIG_CRASH_DUMP is not set +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_GUSA=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="console=ttySC2,115200 root=/dev/sda1 rootdelay=10" + +# +# Bus options +# +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_CHAR is not set +CONFIG_MTD_BLKDEVS=y +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_GEN_PROBE=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_NOSWAP=y +# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set +# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_OTP is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x8000000 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +CONFIG_SCSI_LOWLEVEL=y +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_DEBUG is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_FIXED_PHY is not set +CONFIG_MDIO_BITBANG=y +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_STNIC is not set +# CONFIG_SMC91X is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_B44 is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=3 +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set +# CONFIG_USB_R8A66597_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_RTC_CLASS is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_AUTOFS_FS=y +CONFIG_AUTOFS4_FS=y +# CONFIG_FUSE_FS is not set +CONFIG_GENERIC_ACL=y + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +# CONFIG_NFS_V3 is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_BIND34 is not set +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=y +CONFIG_NLS_CODEPAGE_775=y +CONFIG_NLS_CODEPAGE_850=y +CONFIG_NLS_CODEPAGE_852=y +CONFIG_NLS_CODEPAGE_855=y +CONFIG_NLS_CODEPAGE_857=y +CONFIG_NLS_CODEPAGE_860=y +CONFIG_NLS_CODEPAGE_861=y +CONFIG_NLS_CODEPAGE_862=y +CONFIG_NLS_CODEPAGE_863=y +CONFIG_NLS_CODEPAGE_864=y +CONFIG_NLS_CODEPAGE_865=y +CONFIG_NLS_CODEPAGE_866=y +CONFIG_NLS_CODEPAGE_869=y +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_CODEPAGE_950=y +CONFIG_NLS_CODEPAGE_932=y +CONFIG_NLS_CODEPAGE_949=y +CONFIG_NLS_CODEPAGE_874=y +CONFIG_NLS_ISO8859_8=y +CONFIG_NLS_CODEPAGE_1250=y +CONFIG_NLS_CODEPAGE_1251=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_ISO8859_2=y +CONFIG_NLS_ISO8859_3=y +CONFIG_NLS_ISO8859_4=y +CONFIG_NLS_ISO8859_5=y +CONFIG_NLS_ISO8859_6=y +CONFIG_NLS_ISO8859_7=y +CONFIG_NLS_ISO8859_9=y +CONFIG_NLS_ISO8859_13=y +CONFIG_NLS_ISO8859_14=y +CONFIG_NLS_ISO8859_15=y +CONFIG_NLS_KOI8_R=y +CONFIG_NLS_KOI8_U=y +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_SAMPLES is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_SH_KGDB is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig new file mode 100644 index 0000000000000000000000000000000000000000..ff72697365d18d8f1a1416263bd0706ae72cf9dc --- /dev/null +++ b/arch/sh/configs/sh7785lcr_defconfig @@ -0,0 +1,1388 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.26-rc8 +# Tue Jul 15 21:37:59 2008 +# +CONFIG_SUPERH=y +CONFIG_SUPERH32=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_SYS_SUPPORTS_NUMA=y +CONFIG_SYS_SUPPORTS_PCI=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_NO_VIRT_TO_BUS=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_IO_TRAPPED=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_USER_SCHED=y +# CONFIG_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_COMPAT_BRK=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_PROFILING=y +# CONFIG_MARKERS is not set +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_KPROBES is not set +# CONFIG_HAVE_KRETPROBES is not set +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y + +# +# System type +# +CONFIG_CPU_SH4=y +CONFIG_CPU_SH4A=y +CONFIG_CPU_SHX2=y +# CONFIG_CPU_SUBTYPE_SH7619 is not set +# CONFIG_CPU_SUBTYPE_SH7203 is not set +# CONFIG_CPU_SUBTYPE_SH7206 is not set +# CONFIG_CPU_SUBTYPE_SH7263 is not set +# CONFIG_CPU_SUBTYPE_MXG is not set +# CONFIG_CPU_SUBTYPE_SH7705 is not set +# CONFIG_CPU_SUBTYPE_SH7706 is not set +# CONFIG_CPU_SUBTYPE_SH7707 is not set +# CONFIG_CPU_SUBTYPE_SH7708 is not set +# CONFIG_CPU_SUBTYPE_SH7709 is not set +# CONFIG_CPU_SUBTYPE_SH7710 is not set +# CONFIG_CPU_SUBTYPE_SH7712 is not set +# CONFIG_CPU_SUBTYPE_SH7720 is not set +# CONFIG_CPU_SUBTYPE_SH7721 is not set +# CONFIG_CPU_SUBTYPE_SH7750 is not set +# CONFIG_CPU_SUBTYPE_SH7091 is not set +# CONFIG_CPU_SUBTYPE_SH7750R is not set +# CONFIG_CPU_SUBTYPE_SH7750S is not set +# CONFIG_CPU_SUBTYPE_SH7751 is not set +# CONFIG_CPU_SUBTYPE_SH7751R is not set +# CONFIG_CPU_SUBTYPE_SH7760 is not set +# CONFIG_CPU_SUBTYPE_SH4_202 is not set +# CONFIG_CPU_SUBTYPE_SH7723 is not set +# CONFIG_CPU_SUBTYPE_SH7763 is not set +# CONFIG_CPU_SUBTYPE_SH7770 is not set +# CONFIG_CPU_SUBTYPE_SH7780 is not set +CONFIG_CPU_SUBTYPE_SH7785=y +# CONFIG_CPU_SUBTYPE_SHX3 is not set +# CONFIG_CPU_SUBTYPE_SH7343 is not set +# CONFIG_CPU_SUBTYPE_SH7722 is not set +# CONFIG_CPU_SUBTYPE_SH7366 is not set +# CONFIG_CPU_SUBTYPE_SH5_101 is not set +# CONFIG_CPU_SUBTYPE_SH5_103 is not set + +# +# Memory management options +# +CONFIG_QUICKLIST=y +CONFIG_MMU=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_MEMORY_START=0x08000000 +CONFIG_MEMORY_SIZE=0x08000000 +CONFIG_29BIT=y +# CONFIG_PMB is not set +# CONFIG_X2TLB is not set +CONFIG_VSYSCALL=y +# CONFIG_NUMA is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_MAX_ACTIVE_REGIONS=2 +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set +# CONFIG_MEMORY_HOTPLUG is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_NR_QUICK=2 + +# +# Cache configuration +# +# CONFIG_SH_DIRECT_MAPPED is not set +CONFIG_CACHE_WRITEBACK=y +# CONFIG_CACHE_WRITETHROUGH is not set +# CONFIG_CACHE_OFF is not set + +# +# Processor features +# +CONFIG_CPU_LITTLE_ENDIAN=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_SH_FPU=y +CONFIG_SH_STORE_QUEUES=y +CONFIG_CPU_HAS_INTEVT=y +CONFIG_CPU_HAS_SR_RB=y +CONFIG_CPU_HAS_PTEA=y +CONFIG_CPU_HAS_FPU=y + +# +# Board support +# +# CONFIG_SH_HIGHLANDER is not set +CONFIG_SH_SH7785LCR=y +CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y + +# +# Timer and clock configuration +# +CONFIG_SH_TMU=y +CONFIG_SH_TIMER_IRQ=28 +CONFIG_SH_PCLK_FREQ=50000000 +CONFIG_TICK_ONESHOT=y +# CONFIG_NO_HZ is not set +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y + +# +# CPU Frequency scaling +# +# CONFIG_CPU_FREQ is not set + +# +# DMA support +# +# CONFIG_SH_DMA is not set + +# +# Companion Chips +# + +# +# Additional SuperH Device Drivers +# +CONFIG_HEARTBEAT=y +# CONFIG_PUSH_SWITCH is not set + +# +# Kernel features +# +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +# CONFIG_SCHED_HRTICK is not set +CONFIG_KEXEC=y +# CONFIG_CRASH_DUMP is not set +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +# CONFIG_PREEMPT_RCU is not set +CONFIG_GUSA=y + +# +# Boot options +# +CONFIG_ZERO_PAGE_OFFSET=0x00001000 +CONFIG_BOOT_LINK_OFFSET=0x00800000 +# CONFIG_CMDLINE_BOOL is not set + +# +# Bus options +# +CONFIG_PCI=y +CONFIG_SH_PCIDMA_NONCOHERENT=y +CONFIG_PCI_AUTO=y +CONFIG_PCI_AUTO_UPDATE_RESOURCES=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_PCI_LEGACY=y +# CONFIG_PCI_DEBUG is not set +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +CONFIG_WIRELESS_EXT=y +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +CONFIG_SCSI_DMA=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set +CONFIG_SCSI_WAIT_SCAN=m + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +CONFIG_ATA=y +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_SATA_PMP=y +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +CONFIG_SATA_SIL=y +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set +# CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_SCH is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_R8169=y +# CONFIG_R8169_NAPI is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SH_KEYSC is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_SH_SCI=y +CONFIG_SERIAL_SH_SCI_NR_UARTS=6 +CONFIG_SERIAL_SH_SCI_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_IPMI_HANDLER is not set +CONFIG_HW_RANDOM=y +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_ALGOPCA=y + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +CONFIG_I2C_PCA_PLATFORM=y +# CONFIG_I2C_SH_MOBILE is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +# CONFIG_SPI is not set +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +CONFIG_MFD_SM501=y +# CONFIG_HTC_PASIC3 is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +CONFIG_FB_SM501=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y +CONFIG_FONT_8x16=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_LOGO_SUPERH_MONO is not set +# CONFIG_LOGO_SUPERH_VGA16 is not set +# CONFIG_LOGO_SUPERH_CLUT224 is not set + +# +# Sound +# +# CONFIG_SOUND is not set +CONFIG_HID_SUPPORT=y +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set +# CONFIG_HIDRAW is not set + +# +# USB Input Devices +# +CONFIG_USB_HID=y +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set +# CONFIG_USB_HIDDEV is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +CONFIG_USB_DEVICE_CLASS=y +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_OTG is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_C67X00_HCD is not set +CONFIG_USB_EHCI_HCD=m +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +# CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set +CONFIG_USB_OHCI_HCD=m +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set +CONFIG_USB_R8A66597_HCD=y + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_SISUSBVGA is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set +CONFIG_USB_TEST=m +# CONFIG_USB_ISIGHTFW is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +CONFIG_RTC_DRV_RS5C372=y +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +# CONFIG_RTC_DRV_FM3130 is not set + +# +# SPI RTC drivers +# + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_RTC_DRV_SH is not set +# CONFIG_UIO is not set + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +CONFIG_NTFS_FS=y +# CONFIG_NTFS_DEBUG is not set +CONFIG_NTFS_RW=y + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLBFS is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +CONFIG_MINIX_FS=y +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +CONFIG_NFS_V4=y +CONFIG_NFSD=y +CONFIG_NFSD_V3=y +# CONFIG_NFSD_V3_ACL is not set +CONFIG_NFSD_V4=y +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +# CONFIG_SUNRPC_BIND34 is not set +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +CONFIG_NLS_CODEPAGE_932=y +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=1024 +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_TIMER_STATS is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_BUGVERBOSE is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_FRAME_POINTER is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_SAMPLES is not set +# CONFIG_SH_STANDARD_BIOS is not set +# CONFIG_EARLY_SCIF_CONSOLE is not set +# CONFIG_DEBUG_BOOTMEM is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_4KSTACKS is not set +# CONFIG_IRQSTACKS is not set +# CONFIG_SH_KGDB is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +# CONFIG_CRYPTO_HW is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/arch/sh/drivers/dma/dma-sysfs.c b/arch/sh/drivers/dma/dma-sysfs.c index 51b57c0d1a3c01f98d99e4bb5071cdb1478b89d3..347ee11351ec6c4375c06a8bf3f970733f022181 100644 --- a/arch/sh/drivers/dma/dma-sysfs.c +++ b/arch/sh/drivers/dma/dma-sysfs.c @@ -23,7 +23,8 @@ static struct sysdev_class dma_sysclass = { }; EXPORT_SYMBOL(dma_sysclass); -static ssize_t dma_show_devices(struct sys_device *dev, char *buf) +static ssize_t dma_show_devices(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { ssize_t len = 0; int i; @@ -57,13 +58,15 @@ static int __init dma_sysclass_init(void) } postcore_initcall(dma_sysclass_init); -static ssize_t dma_show_dev_id(struct sys_device *dev, char *buf) +static ssize_t dma_show_dev_id(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct dma_channel *channel = to_dma_channel(dev); return sprintf(buf, "%s\n", channel->dev_id); } static ssize_t dma_store_dev_id(struct sys_device *dev, + struct sysdev_attribute *attr, const char *buf, size_t count) { struct dma_channel *channel = to_dma_channel(dev); @@ -74,6 +77,7 @@ static ssize_t dma_store_dev_id(struct sys_device *dev, static SYSDEV_ATTR(dev_id, S_IRUGO | S_IWUSR, dma_show_dev_id, dma_store_dev_id); static ssize_t dma_store_config(struct sys_device *dev, + struct sysdev_attribute *attr, const char *buf, size_t count) { struct dma_channel *channel = to_dma_channel(dev); @@ -87,13 +91,15 @@ static ssize_t dma_store_config(struct sys_device *dev, static SYSDEV_ATTR(config, S_IWUSR, NULL, dma_store_config); -static ssize_t dma_show_mode(struct sys_device *dev, char *buf) +static ssize_t dma_show_mode(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct dma_channel *channel = to_dma_channel(dev); return sprintf(buf, "0x%08x\n", channel->mode); } static ssize_t dma_store_mode(struct sys_device *dev, + struct sysdev_attribute *attr, const char *buf, size_t count) { struct dma_channel *channel = to_dma_channel(dev); @@ -104,7 +110,8 @@ static ssize_t dma_store_mode(struct sys_device *dev, static SYSDEV_ATTR(mode, S_IRUGO | S_IWUSR, dma_show_mode, dma_store_mode); #define dma_ro_attr(field, fmt) \ -static ssize_t dma_show_##field(struct sys_device *dev, char *buf) \ +static ssize_t dma_show_##field(struct sys_device *dev, \ + struct sysdev_attribute *attr, char *buf)\ { \ struct dma_channel *channel = to_dma_channel(dev); \ return sprintf(buf, fmt, channel->field); \ diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index 0718805774e8760377bb29a929166e8009d278bb..847e90894d1b45e8d43a04696c3310f7e9a7242d 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -23,3 +23,4 @@ obj-$(CONFIG_SH_LANDISK) += ops-landisk.o obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o +obj-$(CONFIG_SH_SH7785LCR) += ops-sh7785lcr.o fixups-sh7785lcr.o diff --git a/arch/sh/drivers/pci/fixups-sh7785lcr.c b/arch/sh/drivers/pci/fixups-sh7785lcr.c new file mode 100644 index 0000000000000000000000000000000000000000..4949e601387a3b73b0c224ad0c0acacbcca72eb6 --- /dev/null +++ b/arch/sh/drivers/pci/fixups-sh7785lcr.c @@ -0,0 +1,46 @@ +/* + * arch/sh/drivers/pci/fixups-sh7785lcr.c + * + * R0P7785LC0011RL PCI fixups + * Copyright (C) 2008 Yoshihiro Shimoda + * + * Based on arch/sh/drivers/pci/fixups-r7780rp.c + * Copyright (C) 2003 Lineo uSolutions, Inc. + * Copyright (C) 2004 - 2006 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include "pci-sh4.h" + +int pci_fixup_pcic(void) +{ + pci_write_reg(0x000043ff, SH4_PCIINTM); + pci_write_reg(0x0000380f, SH4_PCIAINTM); + + pci_write_reg(0xfbb00047, SH7780_PCICMD); + pci_write_reg(0x00000000, SH7780_PCIIBAR); + + pci_write_reg(0x00011912, SH7780_PCISVID); + pci_write_reg(0x08000000, SH7780_PCICSCR0); + pci_write_reg(0x0000001b, SH7780_PCICSAR0); + pci_write_reg(0xfd000000, SH7780_PCICSCR1); + pci_write_reg(0x0000000f, SH7780_PCICSAR1); + + pci_write_reg(0xfd000000, SH7780_PCIMBR0); + pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); + +#ifdef CONFIG_32BIT + pci_write_reg(0xc0000000, SH7780_PCIMBR2); + pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); +#endif + + /* Set IOBR for windows containing area specified in pci.h */ + pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), + SH7780_PCIIOBR); + pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); + + return 0; +} diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c index e1284fc693611a266c5b4307f569bf81fa1ff0d7..f54c291db37b1d10d8944f2657b62ba3b396da99 100644 --- a/arch/sh/drivers/pci/ops-dreamcast.c +++ b/arch/sh/drivers/pci/ops-dreamcast.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -48,6 +49,7 @@ struct pci_channel board_pci_channels[] = { &gapspci_mem_resource, 0, 1 }, { 0, } }; +EXPORT_SYMBOL(board_pci_channels); /* * The !gapspci_config_access case really shouldn't happen, ever, unless diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c new file mode 100644 index 0000000000000000000000000000000000000000..b3bd687020590c6f657c9b8eb79af33f21fbe01d --- /dev/null +++ b/arch/sh/drivers/pci/ops-sh7785lcr.c @@ -0,0 +1,66 @@ +/* + * Author: Ian DaSilva (idasilva@mvista.com) + * + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * PCI initialization for the Renesas R0P7785LC0011RL board + * Based on arch/sh/drivers/pci/ops-r7780rp.c + * + */ +#include +#include +#include +#include +#include +#include "pci-sh4.h" + +static char irq_tab[] __initdata = { + 65, 66, 67, 68, +}; + +int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) +{ + return irq_tab[slot]; +} + +static struct resource sh7785_io_resource = { + .name = "SH7785_IO", + .start = SH7780_PCI_IO_BASE, + .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, + .flags = IORESOURCE_IO +}; + +static struct resource sh7785_mem_resource = { + .name = "SH7785_mem", + .start = SH7780_PCI_MEMORY_BASE, + .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, + .flags = IORESOURCE_MEM +}; + +struct pci_channel board_pci_channels[] = { + { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, + { NULL, NULL, NULL, 0, 0 }, +}; +EXPORT_SYMBOL(board_pci_channels); + +static struct sh4_pci_address_map sh7785_pci_map = { + .window0 = { + .base = SH7780_CS2_BASE_ADDR, + .size = 0x04000000, + }, + + .window1 = { + .base = SH7780_CS3_BASE_ADDR, + .size = 0x04000000, + }, + + .flags = SH4_PCIC_NO_RESET, +}; + +int __init pcibios_init_platform(void) +{ + return sh7780_pcic_init(&sh7785_pci_map); +} diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c index ea404704ace83b03682bd478f63f5f03f5eaac3b..cf48b12ee58cba02b85192f0ed80cd51f5d92a80 100644 --- a/arch/sh/drivers/pci/pci-auto.c +++ b/arch/sh/drivers/pci/pci-auto.c @@ -78,7 +78,7 @@ static struct pci_dev *fake_pci_dev(struct pci_channel *hose, } #define EARLY_PCI_OP(rw, size, type) \ -int early_##rw##_config_##size(struct pci_channel *hose, \ +static int early_##rw##_config_##size(struct pci_channel *hose, \ int top_bus, int bus, int devfn, int offset, type value) \ { \ return pci_##rw##_config_##size( \ diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 08d2e7325252a19071fe446055417bd4d5368dd3..d3839e609aacc1f9d0767c218d716053e139137e 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -76,38 +76,6 @@ void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus) pci_read_bridge_bases(bus); } -void -pcibios_update_resource(struct pci_dev *dev, struct resource *root, - struct resource *res, int resource) -{ - u32 new, check; - int reg; - - new = res->start | (res->flags & PCI_REGION_FLAG_MASK); - if (resource < 6) { - reg = PCI_BASE_ADDRESS_0 + 4*resource; - } else if (resource == PCI_ROM_RESOURCE) { - res->flags |= IORESOURCE_ROM_ENABLE; - new |= PCI_ROM_ADDRESS_ENABLE; - reg = dev->rom_base_reg; - } else { - /* - * Somebody might have asked allocation of a non-standard - * resource - */ - return; - } - - pci_write_config_dword(dev, reg, new); - pci_read_config_dword(dev, reg, &check); - if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? - PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) { - printk(KERN_ERR "PCI: Error while updating region " - "%s/%d (%08x != %08x)\n", pci_name(dev), resource, - new, check); - } -} - void pcibios_align_resource(void *data, struct resource *res, resource_size_t size, resource_size_t align) __attribute__ ((weak)); @@ -167,7 +135,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask) * If we set up a device for bus mastering, we need to check and set * the latency timer as it may not be properly set. */ -unsigned int pcibios_max_latency = 255; +static unsigned int pcibios_max_latency = 255; void pcibios_set_master(struct pci_dev *dev) { diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32 index 4bbdce36b92b2dd95483202024275ffd1f79bb81..0e6905fe9fec80b54198ba4f7fd1561fac284a65 100644 --- a/arch/sh/kernel/Makefile_32 +++ b/arch/sh/kernel/Makefile_32 @@ -21,7 +21,7 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_CRASH_DUMP) += crash_dump.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_STACKTRACE) += stacktrace.o -obj-$(CONFIG_BINFMT_ELF) += dump_task.o +obj-$(CONFIG_ELF_CORE) += dump_task.o obj-$(CONFIG_IO_TRAPPED) += io_trapped.o EXTRA_CFLAGS += -Werror diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c index 01ff4d05aab0303c38cdad719302db33fd904a59..d3d9f32042302f42f2788ba1fd9fe58069553fff 100644 --- a/arch/sh/kernel/cf-enabler.c +++ b/arch/sh/kernel/cf-enabler.c @@ -157,7 +157,7 @@ static int __init cf_init_se(void) } #endif -int __init cf_init(void) +static int __init cf_init(void) { if (mach_is_se() || mach_is_7722se() || mach_is_7721se()) return cf_init_se(); diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c index b5f1e23ed57cc3ef68a7bc6f05560f133fd0c8a2..f5eb56e6bc59b8bb68e8b1552f82f64150b527ea 100644 --- a/arch/sh/kernel/cpu/clock.c +++ b/arch/sh/kernel/cpu/clock.c @@ -88,7 +88,7 @@ static void propagate_rate(struct clk *clk) } } -int __clk_enable(struct clk *clk) +static int __clk_enable(struct clk *clk) { /* * See if this is the first time we're enabling the clock, some @@ -111,7 +111,6 @@ int __clk_enable(struct clk *clk) return 0; } -EXPORT_SYMBOL_GPL(__clk_enable); int clk_enable(struct clk *clk) { @@ -131,7 +130,7 @@ static void clk_kref_release(struct kref *kref) /* Nothing to do */ } -void __clk_disable(struct clk *clk) +static void __clk_disable(struct clk *clk) { int count = kref_put(&clk->kref, clk_kref_release); @@ -143,7 +142,6 @@ void __clk_disable(struct clk *clk) clk->ops->disable(clk); } } -EXPORT_SYMBOL_GPL(__clk_disable); void clk_disable(struct clk *clk) { @@ -310,15 +308,11 @@ static int show_clocks(char *buf, char **start, off_t off, list_for_each_entry_reverse(clk, &clock_list, node) { unsigned long rate = clk_get_rate(clk); - /* - * Don't bother listing dummy clocks with no ancestry - * that only support enable and disable ops. - */ - if (unlikely(!rate && !clk->parent)) - continue; - - p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name, - rate / 1000000, (rate % 1000000) / 10000); + p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name, + rate / 1000000, (rate % 1000000) / 10000, + ((clk->flags & CLK_ALWAYS_ENABLED) || + (atomic_read(&clk->kref.refcount) != 1)) ? + "enabled" : "disabled"); } return p - buf; diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c index da5dae787888fe104fb78000290b4a0427d6b862..8c70e201bde0ff61994fc179ec02e70746b13bcc 100644 --- a/arch/sh/kernel/cpu/irq/intc.c +++ b/arch/sh/kernel/cpu/irq/intc.c @@ -62,7 +62,7 @@ struct intc_desc_int { #endif static unsigned int intc_prio_level[NR_IRQS]; /* for now */ -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) static unsigned long ack_handle[NR_IRQS]; #endif @@ -231,7 +231,7 @@ static void intc_disable(unsigned int irq) } } -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) static void intc_mask_ack(unsigned int irq) { struct intc_desc_int *d = get_intc_desc(irq); @@ -244,8 +244,23 @@ static void intc_mask_ack(unsigned int irq) if (handle) { addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); - ctrl_inb(addr); - ctrl_outb(0x3f ^ set_field(0, 1, handle), addr); + switch (_INTC_FN(handle)) { + case REG_FN_MODIFY_BASE + 0: /* 8bit */ + ctrl_inb(addr); + ctrl_outb(0xff ^ set_field(0, 1, handle), addr); + break; + case REG_FN_MODIFY_BASE + 1: /* 16bit */ + ctrl_inw(addr); + ctrl_outw(0xffff ^ set_field(0, 1, handle), addr); + break; + case REG_FN_MODIFY_BASE + 3: /* 32bit */ + ctrl_inl(addr); + ctrl_outl(0xffffffff ^ set_field(0, 1, handle), addr); + break; + default: + BUG(); + break; + } } } #endif @@ -466,7 +481,7 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc, return 0; } -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) static unsigned int __init intc_ack_data(struct intc_desc *desc, struct intc_desc_int *d, intc_enum enum_id) @@ -601,7 +616,7 @@ static void __init intc_register_irq(struct intc_desc *desc, /* irq should be disabled by default */ d->chip.mask(irq); -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) if (desc->ack_regs) ack_handle[irq] = intc_ack_data(desc, d, enum_id); #endif @@ -635,7 +650,7 @@ void __init register_intc_controller(struct intc_desc *desc) d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; #endif d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); @@ -676,7 +691,7 @@ void __init register_intc_controller(struct intc_desc *desc) d->chip.mask_ack = intc_disable; d->chip.set_type = intc_set_sense; -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) if (desc->ack_regs) { for (i = 0; i < desc->nr_ack_regs; i++) k += save_reg(d, k, desc->ack_regs[i].set_reg, 0); diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S index 0fc89069d8c7cd65566d19d1c06da515000dc014..ee894e5a45e7914315f498c407e2bad3931a3fc4 100644 --- a/arch/sh/kernel/cpu/sh2/entry.S +++ b/arch/sh/kernel/cpu/sh2/entry.S @@ -3,7 +3,7 @@ * * The SH-2 exception entry * - * Copyright (C) 2005,2006 Yoshinori Sato + * Copyright (C) 2005-2008 Yoshinori Sato * Copyright (C) 2005 AXE,Inc. * * This file is subject to the terms and conditions of the GNU General Public @@ -36,43 +36,41 @@ OFF_TRA = (16*4+6*4) #include ENTRY(exception_handler) - ! already saved r0/r1 + ! stack + ! r0 <- point sp + ! r1 + ! pc + ! sr + ! r0 = temporary + ! r1 = vector (pseudo EXPEVT / INTEVT / TRA) mov.l r2,@-sp mov.l r3,@-sp - mov r0,r1 cli mov.l $cpu_mode,r2 mov.l @r2,r0 mov.l @(5*4,r15),r3 ! previous SR - shll2 r3 ! set "S" flag - rotl r0 ! T <- "S" flag - rotl r0 ! "S" flag is LSB - rotcr r3 ! T -> r3:b30 - shlr r3 - shlr r0 - bt/s 1f - mov.l r3,@(5*4,r15) ! copy cpu mode to SR + or r0,r3 ! set MD + tst r0,r0 + bf/s 1f ! previous mode check + mov.l r3,@(5*4,r15) ! update SR ! switch to kernel mode - mov #1,r0 - rotr r0 - rotr r0 + mov.l __md_bit,r0 mov.l r0,@r2 ! enter kernel mode mov.l $current_thread_info,r2 mov.l @r2,r2 - mov #0x20,r0 + mov #(THREAD_SIZE >> 8),r0 shll8 r0 add r2,r0 mov r15,r2 ! r2 = user stack top mov r0,r15 ! switch kernel stack - add #-4,r15 ! dummy mov.l r1,@-r15 ! TRA sts.l macl, @-r15 sts.l mach, @-r15 stc.l gbr, @-r15 - mov.l @(4*4,r2),r0 - mov.l @(5*4,r2),r1 - mov.l r1,@-r15 ! original SR + mov.l @(5*4,r2),r0 + mov.l r0,@-r15 ! original SR sts.l pr,@-r15 + mov.l @(4*4,r2),r0 mov.l r0,@-r15 ! original PC mov r2,r3 add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame @@ -88,14 +86,15 @@ ENTRY(exception_handler) mov.l r6,@-r15 mov.l r5,@-r15 mov.l r4,@-r15 + mov r1,r9 ! save TRA mov r2,r8 ! copy user -> kernel stack - mov.l @r8+,r3 + mov.l @(0,r8),r3 mov.l r3,@-r15 - mov.l @r8+,r2 + mov.l @(4,r8),r2 mov.l r2,@-r15 - mov.l @r8+,r1 + mov.l @(12,r8),r1 mov.l r1,@-r15 - mov.l @r8+,r0 + mov.l @(8,r8),r0 bra 2f mov.l r0,@-r15 1: @@ -107,10 +106,11 @@ ENTRY(exception_handler) mov.l r0,@-r15 mov.l @r2+,r0 ! old R2 mov.l r0,@-r15 - mov.l @r2+,r0 ! old R1 - mov.l r0,@-r15 - mov.l @r2+,r0 ! old R0 + mov.l @(4,r2),r0 ! old R1 mov.l r0,@-r15 + mov.l @r2,r0 ! old R0 + mov.l r0,@-r15 + add #8,r2 mov.l @r2+,r3 ! old PC mov.l @r2+,r0 ! old SR add #-4,r2 ! exception frame stub (sr) @@ -135,14 +135,12 @@ ENTRY(exception_handler) mov.l r6,@-r2 mov.l r5,@-r2 mov.l r4,@-r2 + mov r1,r9 mov.l @(OFF_R0,r15),r0 mov.l @(OFF_R1,r15),r1 mov.l @(OFF_R2,r15),r2 mov.l @(OFF_R3,r15),r3 2: - mov #OFF_TRA,r8 - add r15,r8 - mov.l @r8,r9 mov #64,r8 cmp/hs r8,r9 bt interrupt_entry ! vec >= 64 is interrupt @@ -150,26 +148,14 @@ ENTRY(exception_handler) cmp/hs r8,r9 bt trap_entry ! 64 > vec >= 32 is trap -#if defined(CONFIG_SH_FPU) - mov #13,r8 - cmp/eq r8,r9 - bt 10f ! fpu - nop -#endif - mov.l 4f,r8 mov r9,r4 shll2 r9 add r9,r8 - mov.l @r8,r8 - mov #0,r9 - cmp/eq r9,r8 + mov.l @r8,r8 ! exception handler address + tst r8,r8 bf 3f mov.l 8f,r8 ! unhandled exception -#if defined(CONFIG_SH_FPU) -10: - mov.l 9f, r8 ! unhandled exception -#endif 3: mov.l 5f,r10 jmp @r8 @@ -188,10 +174,7 @@ interrupt_entry: 5: .long ret_from_exception 6: .long ret_from_irq 7: .long do_IRQ -8: .long do_exception_error -#ifdef CONFIG_SH_FPU -9: .long fpu_error_trap_handler -#endif +8: .long exception_error trap_entry: mov #0x30,r8 @@ -200,24 +183,9 @@ trap_entry: add #-0x10,r9 ! convert SH2 to SH3/4 ABI 1: shll2 r9 ! TRA - mov #OFF_TRA,r8 - add r15,r8 - mov.l r9,@r8 - mov r9,r8 -#ifdef CONFIG_TRACE_IRQFLAGS - mov.l 2f, r9 - jsr @r9 - nop -#endif - sti - bra system_call - nop + bra system_call ! jump common systemcall entry + mov r9,r8 - .align 2 -#ifdef CONFIG_TRACE_IRQFLAGS -2: .long trace_hardirqs_on -#endif - #if defined(CONFIG_SH_STANDARD_BIOS) /* Unwind the stack and jmp to the debug entry */ ENTRY(sh_bios_handler) @@ -240,7 +208,7 @@ ENTRY(sh_bios_handler) mov.l @r2,r2 stc sr,r3 mov.l r2,@r0 - mov.l r3,@r0 + mov.l r3,@(4,r0) mov.l r1,@(8,r0) mov.l @r15+, r0 mov.l @r15+, r1 @@ -272,22 +240,30 @@ ENTRY(address_error_trap_handler) mov.l 1f,r0 jmp @r0 mov #0,r5 ! writeaccess is unknown - .align 2 + .align 2 1: .long do_address_error restore_all: - cli -#ifdef CONFIG_TRACE_IRQFLAGS - mov.l 1f, r0 - jsr @r0 - nop -#endif + stc sr,r0 + or #0xf0,r0 + ldc r0,sr ! all interrupt block (same BL = 1) + ! restore special register + ! overlap exception frame + mov r15,r0 + add #17*4,r0 + lds.l @r0+,pr + add #4,r0 + ldc.l @r0+,gbr + lds.l @r0+,mach + lds.l @r0+,macl mov r15,r0 mov.l $cpu_mode,r2 mov #OFF_SR,r3 mov.l @(r0,r3),r1 - mov.l r1,@r2 + mov.l __md_bit,r3 + and r1,r3 ! copy MD bit + mov.l r3,@r2 shll2 r1 ! clear MD bit shlr2 r1 mov.l @(OFF_SP,r0),r2 @@ -297,12 +273,6 @@ restore_all: mov #OFF_PC,r3 mov.l @(r0,r3),r1 mov.l r1,@r2 ! set pc - add #4*16+4,r0 - lds.l @r0+,pr - add #4,r0 ! skip sr - ldc.l @r0+,gbr - lds.l @r0+,mach - lds.l @r0+,macl get_current_thread_info r0, r1 mov.l $current_thread_info,r1 mov.l r0,@r1 @@ -326,9 +296,8 @@ restore_all: nop .align 2 -#ifdef CONFIG_TRACE_IRQFLAGS -1: .long trace_hardirqs_off -#endif +__md_bit: + .long 0x40000000 $current_thread_info: .long __current_thread_info $cpu_mode: diff --git a/arch/sh/kernel/cpu/sh2/ex.S b/arch/sh/kernel/cpu/sh2/ex.S index 6d285af7846cb5d1ad8d0d8741fd91a1ff6db28c..85b0bf81fc1d80c304ac01178f80cc68b8082d50 100644 --- a/arch/sh/kernel/cpu/sh2/ex.S +++ b/arch/sh/kernel/cpu/sh2/ex.S @@ -18,16 +18,17 @@ exception_entry: no = 0 .rept 256 - mov.l r0,@-sp - mov #no,r0 + mov.l r1,@-sp bra exception_trampoline - and #0xff,r0 + mov #no,r1 no = no + 1 .endr exception_trampoline: - mov.l r1,@-sp - mov.l $exception_handler,r1 - jmp @r1 + mov.l r0,@-sp + mov.l $exception_handler,r0 + extu.b r1,r1 + jmp @r0 + extu.w r1,r1 .align 2 $exception_entry: @@ -41,6 +42,6 @@ $exception_handler: ENTRY(vbr_base) vector = 0 .rept 256 - .long exception_entry + vector * 8 + .long exception_entry + vector * 6 vector = vector + 1 .endr diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c index cc530f4d84d679a1418571319cf3b98be02d18fd..56e5878e55164f69b26aa54500d72227e794a63c 100644 --- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c +++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c @@ -96,8 +96,32 @@ static struct platform_device sci_device = { }, }; +static struct resource eth_resources[] = { + [0] = { + .start = 0xfb000000, + .end = 0xfb0001c8, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 85, + .end = 85, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device eth_device = { + .name = "sh-eth", + .id = -1, + .dev = { + .platform_data = (void *)1, + }, + .num_resources = ARRAY_SIZE(eth_resources), + .resource = eth_resources, +}; + static struct platform_device *sh7619_devices[] __initdata = { &sci_device, + ð_device, }; static int __init sh7619_devices_setup(void) diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile index 7e2b90cfa7bf88492e08d253fb100bad5f261273..1ab1ecf4c7685d9a03d077c788c66ec85b70729b 100644 --- a/arch/sh/kernel/cpu/sh2a/Makefile +++ b/arch/sh/kernel/cpu/sh2a/Makefile @@ -4,7 +4,7 @@ obj-y := common.o probe.o opcode_helper.o -common-y += $(addprefix ../sh2/, ex.o entry.o) +common-y += ex.o entry.o obj-$(CONFIG_SH_FPU) += fpu.o diff --git a/arch/sh/kernel/cpu/sh2a/entry.S b/arch/sh/kernel/cpu/sh2a/entry.S new file mode 100644 index 0000000000000000000000000000000000000000..47096dc3d2067abe70d08a0961007a6e1188d2c0 --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/entry.S @@ -0,0 +1,249 @@ +/* + * arch/sh/kernel/cpu/sh2a/entry.S + * + * The SH-2A exception entry + * + * Copyright (C) 2008 Yoshinori Sato + * Based on arch/sh/kernel/cpu/sh2/entry.S + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Offsets to the stack */ +OFF_R0 = 0 /* Return value. New ABI also arg4 */ +OFF_R1 = 4 /* New ABI: arg5 */ +OFF_R2 = 8 /* New ABI: arg6 */ +OFF_R3 = 12 /* New ABI: syscall_nr */ +OFF_R4 = 16 /* New ABI: arg0 */ +OFF_R5 = 20 /* New ABI: arg1 */ +OFF_R6 = 24 /* New ABI: arg2 */ +OFF_R7 = 28 /* New ABI: arg3 */ +OFF_SP = (15*4) +OFF_PC = (16*4) +OFF_SR = (16*4+2*4) +OFF_TRA = (16*4+6*4) + +#include + +ENTRY(exception_handler) + ! stack + ! r0 <- point sp + ! r1 + ! pc + ! sr + ! r0 = temporary + ! r1 = vector (pseudo EXPEVT / INTEVT / TRA) + mov.l r2,@-sp + cli + mov.l $cpu_mode,r2 + bld.b #6,@(0,r2) !previus SR.MD + bst.b #6,@(4*4,r15) !set cpu mode to SR.MD + bt 1f + ! switch to kernel mode + bset.b #6,@(0,r2) !set SR.MD + mov.l $current_thread_info,r2 + mov.l @r2,r2 + mov #(THREAD_SIZE >> 8),r0 + shll8 r0 + add r2,r0 ! r0 = kernel stack tail + mov r15,r2 ! r2 = user stack top + mov r0,r15 ! switch kernel stack + mov.l r1,@-r15 ! TRA + sts.l macl, @-r15 + sts.l mach, @-r15 + stc.l gbr, @-r15 + mov.l @(4*4,r2),r0 + mov.l r0,@-r15 ! original SR + sts.l pr,@-r15 + mov.l @(3*4,r2),r0 + mov.l r0,@-r15 ! original PC + mov r2,r0 + add #(3+2)*4,r0 ! rewind r0 - r3 + exception frame + lds r0,pr ! pr = original SP + movmu.l r3,@-r15 ! save regs + mov r2,r8 ! r8 = previus stack top + mov r1,r9 ! r9 = interrupt vector + ! restore previous stack + mov.l @r8+,r2 + mov.l @r8+,r0 + mov.l @r8+,r1 + bra 2f + movml.l r2,@-r15 +1: + ! in kernel exception + mov r15,r2 + add #-((OFF_TRA + 4) - OFF_PC) + 5*4,r15 + movmu.l r3,@-r15 + mov r2,r8 ! r8 = previous stack top + mov r1,r9 ! r9 = interrupt vector + ! restore exception frame & regs + mov.l @r8+,r2 ! old R2 + mov.l @r8+,r0 ! old R0 + mov.l @r8+,r1 ! old R1 + mov.l @r8+,r10 ! old PC + mov.l @r8+,r11 ! old SR + movml.l r2,@-r15 + mov.l r10,@(OFF_PC,r15) + mov.l r11,@(OFF_SR,r15) + mov.l r8,@(OFF_SP,r15) ! save old sp + mov r15,r8 + add #OFF_TRA + 4,r8 + mov.l r9,@-r8 + sts.l macl,@-r8 + sts.l mach,@-r8 + stc.l gbr,@-r8 + add #-4,r8 + sts.l pr,@-r8 +2: + ! dispatch exception / interrupt + mov #64,r8 + cmp/hs r8,r9 + bt interrupt_entry ! vec >= 64 is interrupt + mov #32,r8 + cmp/hs r8,r9 + bt trap_entry ! 64 > vec >= 32 is trap + + mov.l 4f,r8 + mov r9,r4 + shll2 r9 + add r9,r8 + mov.l @r8,r8 ! exception handler address + tst r8,r8 + bf 3f + mov.l 8f,r8 ! unhandled exception +3: + mov.l 5f,r10 + jmp @r8 + lds r10,pr + +interrupt_entry: + mov r9,r4 + mov r15,r5 + mov.l 7f,r8 + mov.l 6f,r9 + jmp @r8 + lds r9,pr + + .align 2 +4: .long exception_handling_table +5: .long ret_from_exception +6: .long ret_from_irq +7: .long do_IRQ +8: .long exception_error + +trap_entry: + mov #0x30,r8 + cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall + bt 1f + add #-0x10,r9 ! convert SH2 to SH3/4 ABI +1: + shll2 r9 ! TRA + bra system_call ! jump common systemcall entry + mov r9,r8 + +#if defined(CONFIG_SH_STANDARD_BIOS) + /* Unwind the stack and jmp to the debug entry */ +ENTRY(sh_bios_handler) + mov r15,r0 + add #(22-4)*4-4,r0 + ldc.l @r0+,gbr + lds.l @r0+,mach + lds.l @r0+,macl + mov r15,r0 + mov.l @(OFF_SP,r0),r1 + mov.l @(OFF_SR,r2),r3 + mov.l r3,@-r1 + mov.l @(OFF_SP,r2),r3 + mov.l r3,@-r1 + mov r15,r0 + add #(22-4)*4-8,r0 + mov.l 1f,r2 + mov.l @r2,r2 + stc sr,r3 + mov.l r2,@r0 + mov.l r3,@(4,r0) + mov.l r1,@(8,r0) + movml.l @r15+,r14 + add #8,r15 + lds.l @r15+, pr + rte + mov.l @r15+,r15 + .align 2 +1: .long gdb_vbr_vector +#endif /* CONFIG_SH_STANDARD_BIOS */ + +ENTRY(address_error_trap_handler) + mov r15,r4 ! regs + mov.l @(OFF_PC,r15),r6 ! pc + mov.l 1f,r0 + jmp @r0 + mov #0,r5 ! writeaccess is unknown + + .align 2 +1: .long do_address_error + +restore_all: + stc sr,r0 + or #0xf0,r0 + ldc r0,sr ! all interrupt block (same BL = 1) + ! restore special register + ! overlap exception frame + mov r15,r0 + add #17*4,r0 + lds.l @r0+,pr + add #4,r0 + ldc.l @r0+,gbr + lds.l @r0+,mach + lds.l @r0+,macl + mov r15,r0 + mov.l $cpu_mode,r2 + bld.b #6,@(OFF_SR,r15) + bst.b #6,@(0,r2) ! save CPU mode + mov.l @(OFF_SR,r0),r1 + shll2 r1 + shlr2 r1 ! clear MD bit + mov.l @(OFF_SP,r0),r2 + add #-8,r2 + mov.l r2,@(OFF_SP,r0) ! point exception frame top + mov.l r1,@(4,r2) ! set sr + mov.l @(OFF_PC,r0),r1 + mov.l r1,@r2 ! set pc + get_current_thread_info r0, r1 + mov.l $current_thread_info,r1 + mov.l r0,@r1 + movml.l @r15+,r14 + mov.l @r15,r15 + rte + nop + + .align 2 +$current_thread_info: + .long __current_thread_info +$cpu_mode: + .long __cpu_mode + +! common exception handler +#include "../../entry-common.S" + + .data +! cpu operation mode +! bit30 = MD (compatible SH3/4) +__cpu_mode: + .long 0x40000000 + + .section .bss +__current_thread_info: + .long 0 + +ENTRY(exception_handling_table) + .space 4*32 diff --git a/arch/sh/kernel/cpu/sh2a/ex.S b/arch/sh/kernel/cpu/sh2a/ex.S new file mode 100644 index 0000000000000000000000000000000000000000..3ead9e63965a6f6cf9c1e62349b7f145d37d634f --- /dev/null +++ b/arch/sh/kernel/cpu/sh2a/ex.S @@ -0,0 +1,72 @@ +/* + * arch/sh/kernel/cpu/sh2a/ex.S + * + * The SH-2A exception vector table + * + * Copyright (C) 2008 Yoshinori Sato + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include + +! +! convert Exception Vector to Exception Number +! + +! exception no 0 to 255 +exception_entry0: +no = 0 + .rept 256 + mov.l r1,@-sp + bra exception_trampoline0 + mov #no,r1 +no = no + 1 + .endr +exception_trampoline0: + mov.l r0,@-sp + mov.l 1f,r0 + extu.b r1,r1 + jmp @r0 + extu.w r1,r1 + + .align 2 +1: .long exception_handler + +! exception no 256 to 511 +exception_entry1: +no = 0 + .rept 256 + mov.l r1,@-sp + bra exception_trampoline1 + mov #no,r1 +no = no + 1 + .endr +exception_trampoline1: + mov.l r0,@-sp + extu.b r1,r1 + movi20 #0x100,r0 + add r0,r1 + mov.l 1f,r0 + jmp @r0 + extu.w r1,r1 + + .align 2 +1: .long exception_handler + + ! +! Exception Vector Base +! + .align 2 +ENTRY(vbr_base) +vector = 0 + .rept 256 + .long exception_entry0 + vector * 6 +vector = vector + 1 + .endr + .rept 256 + .long exception_entry1 + vector * 6 +vector = vector + 1 + .endr diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S index 11b6d9c6edaefabbb8040004e31db7a7d6edbdff..dac42972689932b00100fd1c3a654a26aa61d1e9 100644 --- a/arch/sh/kernel/cpu/sh3/ex.S +++ b/arch/sh/kernel/cpu/sh3/ex.S @@ -4,7 +4,7 @@ * The SH-3 and SH-4 exception vector table. * Copyright (C) 1999, 2000, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2006 Paul Mundt + * Copyright (C) 2003 - 2008 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -12,13 +12,30 @@ */ #include +#if !defined(CONFIG_MMU) +#define tlb_miss_load exception_error +#define tlb_miss_store exception_error +#define initial_page_write exception_error +#define tlb_protection_violation_load exception_error +#define tlb_protection_violation_store exception_error +#define address_error_load exception_error +#define address_error_store exception_error +#endif + +#if !defined(CONFIG_SH_FPU) +#define fpu_error_trap_handler exception_error +#endif + +#if !defined(CONFIG_KGDB_NMI) +#define kgdb_handle_exception exception_error +#endif + .align 2 .data ENTRY(exception_handling_table) .long exception_error /* 000 */ .long exception_error -#if defined(CONFIG_MMU) .long tlb_miss_load /* 040 */ .long tlb_miss_store .long initial_page_write @@ -26,30 +43,13 @@ ENTRY(exception_handling_table) .long tlb_protection_violation_store .long address_error_load .long address_error_store /* 100 */ -#else - .long exception_error ! tlb miss load /* 040 */ - .long exception_error ! tlb miss store - .long exception_error ! initial page write - .long exception_error ! tlb prot violation load - .long exception_error ! tlb prot violation store - .long exception_error ! address error load - .long exception_error ! address error store /* 100 */ -#endif -#if defined(CONFIG_SH_FPU) .long fpu_error_trap_handler /* 120 */ -#else - .long exception_error /* 120 */ -#endif .long exception_error /* 140 */ .long system_call ! Unconditional Trap /* 160 */ .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ ENTRY(nmi_slot) -#if defined (CONFIG_KGDB_NMI) .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger -#else - .long exception_none /* 1C0 */ ! Not implemented yet -#endif ENTRY(user_break_point_trap) .long break_point_trap /* 1E0 */ diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index be4926969181299d26339c5dcefd84be2ae41f46..2e42572b1b119aa832c50a104d8f4fd5c1fe0acf 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -50,14 +50,18 @@ int __init detect_cpu_and_cache_system(void) boot_cpu_data.dcache.ways = 1; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; + /* We don't know the chip cut */ + boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; + /* * Setup some generic flags we can probe on SH-4A parts */ - if (((pvr >> 24) & 0xff) == 0x10) { + if (((pvr >> 16) & 0xff) == 0x10) { if ((cvr & 0x10000000) == 0) boot_cpu_data.flags |= CPU_HAS_DSP; boot_cpu_data.flags |= CPU_HAS_LLSC; + boot_cpu_data.cut_major = pvr & 0x7f; } /* FPU detection works for everyone */ diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index a880e7968750a63aa3aba1ae4ea3fcd477d06b82..9381ad8da263825164922874529c794d2ebb8223 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile @@ -21,7 +21,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o -clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o +clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c deleted file mode 100644 index 7adc4f16e95ae4f3fd66a8ea384e6244ad16c095..0000000000000000000000000000000000000000 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * arch/sh/kernel/cpu/sh4a/clock-sh7343.c - * - * SH7343/SH7722 support for the clock framework - * - * Copyright (C) 2006 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include -#include -#include - -/* - * SH7343/SH7722 uses a common set of multipliers and divisors, so this - * is quite simple.. - */ -static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; -static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; - -#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1) - -static void master_clk_init(struct clk *clk) -{ - clk->parent = clk_get(NULL, "cpu_clk"); -} - -static void master_clk_recalc(struct clk *clk) -{ - int idx = (ctrl_inl(FRQCR) & 0x000f); - clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx]; -} - -static struct clk_ops sh7343_master_clk_ops = { - .init = master_clk_init, - .recalc = master_clk_recalc, -}; - -static void module_clk_init(struct clk *clk) -{ - clk->parent = NULL; - clk->rate = CONFIG_SH_PCLK_FREQ; -} - -static struct clk_ops sh7343_module_clk_ops = { - .init = module_clk_init, -}; - -static void bus_clk_init(struct clk *clk) -{ - clk->parent = clk_get(NULL, "cpu_clk"); -} - -static void bus_clk_recalc(struct clk *clk) -{ - int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f; - clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx]; -} - -static struct clk_ops sh7343_bus_clk_ops = { - .init = bus_clk_init, - .recalc = bus_clk_recalc, -}; - -static void cpu_clk_init(struct clk *clk) -{ - clk->parent = clk_get(NULL, "module_clk"); - clk->flags |= CLK_RATE_PROPAGATES; - clk_set_rate(clk, clk_get_rate(clk)); -} - -static void cpu_clk_recalc(struct clk *clk) -{ - int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f; - clk->rate = clk->parent->rate * pll_calc() * - multipliers[idx] / divisors[idx]; -} - -static struct clk_ops sh7343_cpu_clk_ops = { - .init = cpu_clk_init, - .recalc = cpu_clk_recalc, -}; - -static struct clk_ops *sh7343_clk_ops[] = { - &sh7343_master_clk_ops, - &sh7343_module_clk_ops, - &sh7343_bus_clk_ops, - &sh7343_cpu_clk_ops, -}; - -void __init arch_init_clk_ops(struct clk_ops **ops, int idx) -{ - if (idx < ARRAY_SIZE(sh7343_clk_ops)) - *ops = sh7343_clk_ops[idx]; -} diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index 299138ebe1607263632b3124006610e12c23368d..db913855c2fd24fc81e3a1cac39997a4df1b09d1 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c @@ -1,7 +1,7 @@ /* * arch/sh/kernel/cpu/sh4a/clock-sh7722.c * - * SH7722 & SH7366 support for the clock framework + * SH7343, SH7722, SH7723 & SH7366 support for the clock framework * * Copyright (c) 2006-2007 Nomad Global Solutions Inc * Based on code for sh7343 by Paul Mundt @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -411,40 +412,40 @@ static struct clk_ops sh7722_frqcr_clk_ops = { * clock ops methods for SIU A/B and IrDA clock * */ -static int sh7722_siu_which(struct clk *clk) + +#ifndef CONFIG_CPU_SUBTYPE_SH7343 + +static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) { - if (!strcmp(clk->name, "siu_a_clk")) - return 0; - if (!strcmp(clk->name, "siu_b_clk")) - return 1; -#if defined(CONFIG_CPU_SUBTYPE_SH7722) - if (!strcmp(clk->name, "irda_clk")) - return 2; -#endif - return -EINVAL; + unsigned long r; + int div; + + r = ctrl_inl(clk->arch_flags); + div = sh7722_find_divisors(clk->parent->rate, rate); + if (div < 0) + return div; + r = (r & ~0xF) | div; + ctrl_outl(r, clk->arch_flags); + return 0; } -static unsigned long sh7722_siu_regs[] = { - [0] = SCLKACR, - [1] = SCLKBCR, -#if defined(CONFIG_CPU_SUBTYPE_SH7722) - [2] = IrDACLKCR, -#endif -}; +static void sh7722_siu_recalc(struct clk *clk) +{ + unsigned long r; + + r = ctrl_inl(clk->arch_flags); + clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF]; +} static int sh7722_siu_start_stop(struct clk *clk, int enable) { - int siu = sh7722_siu_which(clk); unsigned long r; - if (siu < 0) - return siu; - BUG_ON(siu > 2); - r = ctrl_inl(sh7722_siu_regs[siu]); + r = ctrl_inl(clk->arch_flags); if (enable) - ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]); + ctrl_outl(r & ~(1 << 8), clk->arch_flags); else - ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]); + ctrl_outl(r | (1 << 8), clk->arch_flags); return 0; } @@ -458,6 +459,15 @@ static void sh7722_siu_disable(struct clk *clk) sh7722_siu_start_stop(clk, 0); } +static struct clk_ops sh7722_siu_clk_ops = { + .recalc = sh7722_siu_recalc, + .set_rate = sh7722_siu_set_rate, + .enable = sh7722_siu_enable, + .disable = sh7722_siu_disable, +}; + +#endif /* CONFIG_CPU_SUBTYPE_SH7343 */ + static void sh7722_video_enable(struct clk *clk) { unsigned long r; @@ -494,43 +504,6 @@ static void sh7722_video_recalc(struct clk *clk) clk->rate = clk->parent->rate / ((r & 0x3F) + 1); } -static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) -{ - int siu = sh7722_siu_which(clk); - unsigned long r; - int div; - - if (siu < 0) - return siu; - BUG_ON(siu > 2); - r = ctrl_inl(sh7722_siu_regs[siu]); - div = sh7722_find_divisors(clk->parent->rate, rate); - if (div < 0) - return div; - r = (r & ~0xF) | div; - ctrl_outl(r, sh7722_siu_regs[siu]); - return 0; -} - -static void sh7722_siu_recalc(struct clk *clk) -{ - int siu = sh7722_siu_which(clk); - unsigned long r; - - if (siu < 0) - return /* siu */ ; - BUG_ON(siu > 2); - r = ctrl_inl(sh7722_siu_regs[siu]); - clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF]; -} - -static struct clk_ops sh7722_siu_clk_ops = { - .recalc = sh7722_siu_recalc, - .set_rate = sh7722_siu_set_rate, - .enable = sh7722_siu_enable, - .disable = sh7722_siu_disable, -}; - static struct clk_ops sh7722_video_clk_ops = { .recalc = sh7722_video_recalc, .set_rate = sh7722_video_set_rate, @@ -560,6 +533,9 @@ static struct clk sh7722_sdram_clock = { .ops = &sh7722_frqcr_clk_ops, }; + +#ifndef CONFIG_CPU_SUBTYPE_SH7343 + /* * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops * methods of clk_ops determine which register they should access by @@ -567,35 +543,150 @@ static struct clk sh7722_sdram_clock = { */ static struct clk sh7722_siu_a_clock = { .name = "siu_a_clk", + .arch_flags = SCLKACR, .ops = &sh7722_siu_clk_ops, }; static struct clk sh7722_siu_b_clock = { .name = "siu_b_clk", + .arch_flags = SCLKBCR, .ops = &sh7722_siu_clk_ops, }; #if defined(CONFIG_CPU_SUBTYPE_SH7722) static struct clk sh7722_irda_clock = { .name = "irda_clk", + .arch_flags = IrDACLKCR, .ops = &sh7722_siu_clk_ops, }; #endif +#endif /* CONFIG_CPU_SUBTYPE_SH7343 */ static struct clk sh7722_video_clock = { .name = "video_clk", .ops = &sh7722_video_clk_ops, }; +static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg, + int enable) +{ + unsigned long bit = clk->arch_flags; + unsigned long r; + + r = ctrl_inl(reg); + + if (enable) + r &= ~(1 << bit); + else + r |= (1 << bit); + + ctrl_outl(r, reg); + return 0; +} + +static void sh7722_mstpcr0_enable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR0, 1); +} + +static void sh7722_mstpcr0_disable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR0, 0); +} + +static void sh7722_mstpcr1_enable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR1, 1); +} + +static void sh7722_mstpcr1_disable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR1, 0); +} + +static void sh7722_mstpcr2_enable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR2, 1); +} + +static void sh7722_mstpcr2_disable(struct clk *clk) +{ + sh7722_mstpcr_start_stop(clk, MSTPCR2, 0); +} + +static struct clk_ops sh7722_mstpcr0_clk_ops = { + .enable = sh7722_mstpcr0_enable, + .disable = sh7722_mstpcr0_disable, +}; + +static struct clk_ops sh7722_mstpcr1_clk_ops = { + .enable = sh7722_mstpcr1_enable, + .disable = sh7722_mstpcr1_disable, +}; + +static struct clk_ops sh7722_mstpcr2_clk_ops = { + .enable = sh7722_mstpcr2_enable, + .disable = sh7722_mstpcr2_disable, +}; + +#define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \ +{ \ + .name = "mstp" __stringify(regnr) bitstr, \ + .arch_flags = bitnr, \ + .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \ +} + +#define DECLARE_MSTPCR(regnr) \ + DECLARE_MSTPCRN(regnr, 31, "31"), \ + DECLARE_MSTPCRN(regnr, 30, "30"), \ + DECLARE_MSTPCRN(regnr, 29, "29"), \ + DECLARE_MSTPCRN(regnr, 28, "28"), \ + DECLARE_MSTPCRN(regnr, 27, "27"), \ + DECLARE_MSTPCRN(regnr, 26, "26"), \ + DECLARE_MSTPCRN(regnr, 25, "25"), \ + DECLARE_MSTPCRN(regnr, 24, "24"), \ + DECLARE_MSTPCRN(regnr, 23, "23"), \ + DECLARE_MSTPCRN(regnr, 22, "22"), \ + DECLARE_MSTPCRN(regnr, 21, "21"), \ + DECLARE_MSTPCRN(regnr, 20, "20"), \ + DECLARE_MSTPCRN(regnr, 19, "19"), \ + DECLARE_MSTPCRN(regnr, 18, "18"), \ + DECLARE_MSTPCRN(regnr, 17, "17"), \ + DECLARE_MSTPCRN(regnr, 16, "16"), \ + DECLARE_MSTPCRN(regnr, 15, "15"), \ + DECLARE_MSTPCRN(regnr, 14, "14"), \ + DECLARE_MSTPCRN(regnr, 13, "13"), \ + DECLARE_MSTPCRN(regnr, 12, "12"), \ + DECLARE_MSTPCRN(regnr, 11, "11"), \ + DECLARE_MSTPCRN(regnr, 10, "10"), \ + DECLARE_MSTPCRN(regnr, 9, "09"), \ + DECLARE_MSTPCRN(regnr, 8, "08"), \ + DECLARE_MSTPCRN(regnr, 7, "07"), \ + DECLARE_MSTPCRN(regnr, 6, "06"), \ + DECLARE_MSTPCRN(regnr, 5, "05"), \ + DECLARE_MSTPCRN(regnr, 4, "04"), \ + DECLARE_MSTPCRN(regnr, 3, "03"), \ + DECLARE_MSTPCRN(regnr, 2, "02"), \ + DECLARE_MSTPCRN(regnr, 1, "01"), \ + DECLARE_MSTPCRN(regnr, 0, "00") + +static struct clk sh7722_mstpcr[] = { + DECLARE_MSTPCR(0), + DECLARE_MSTPCR(1), + DECLARE_MSTPCR(2), +}; + static struct clk *sh7722_clocks[] = { &sh7722_umem_clock, &sh7722_sh_clock, &sh7722_peripheral_clock, &sh7722_sdram_clock, +#ifndef CONFIG_CPU_SUBTYPE_SH7343 &sh7722_siu_a_clock, &sh7722_siu_b_clock, #if defined(CONFIG_CPU_SUBTYPE_SH7722) &sh7722_irda_clock, +#endif #endif &sh7722_video_clock, }; @@ -629,5 +720,11 @@ int __init arch_clk_init(void) clk_register(sh7722_clocks[i]); } clk_put(master); + + for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) { + pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name); + clk_register(&sh7722_mstpcr[i]); + } + return 0; } diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index 6d4f50cd4aaf62ece55cce91bdab88c134f6e165..78881b4214da8e8a94ad366e0e3843cc586f9360 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c @@ -11,6 +11,104 @@ #include #include #include +#include +#include + +static struct resource iic0_resources[] = { + [0] = { + .name = "IIC0", + .start = 0x04470000, + .end = 0x04470017, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 96, + .end = 99, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device iic0_device = { + .name = "i2c-sh_mobile", + .num_resources = ARRAY_SIZE(iic0_resources), + .resource = iic0_resources, +}; + +static struct resource iic1_resources[] = { + [0] = { + .name = "IIC1", + .start = 0x04750000, + .end = 0x04750017, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 44, + .end = 47, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device iic1_device = { + .name = "i2c-sh_mobile", + .num_resources = ARRAY_SIZE(iic1_resources), + .resource = iic1_resources, +}; + +static struct uio_info vpu_platform_data = { + .name = "VPU4", + .version = "0", + .irq = 60, +}; + +static struct resource vpu_resources[] = { + [0] = { + .name = "VPU", + .start = 0xfe900000, + .end = 0xfe9022eb, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device vpu_device = { + .name = "uio_pdrv_genirq", + .id = 0, + .dev = { + .platform_data = &vpu_platform_data, + }, + .resource = vpu_resources, + .num_resources = ARRAY_SIZE(vpu_resources), +}; + +static struct uio_info veu_platform_data = { + .name = "VEU", + .version = "0", + .irq = 54, +}; + +static struct resource veu_resources[] = { + [0] = { + .name = "VEU", + .start = 0xfe920000, + .end = 0xfe9200b7, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu_device = { + .name = "uio_pdrv_genirq", + .id = 1, + .dev = { + .platform_data = &veu_platform_data, + }, + .resource = veu_resources, + .num_resources = ARRAY_SIZE(veu_resources), +}; static struct plat_sci_port sci_platform_data[] = { { @@ -32,16 +130,171 @@ static struct platform_device sci_device = { }; static struct platform_device *sh7343_devices[] __initdata = { + &iic0_device, + &iic1_device, &sci_device, + &vpu_device, + &veu_device, }; static int __init sh7343_devices_setup(void) { + clk_always_enable("mstp031"); /* TLB */ + clk_always_enable("mstp030"); /* IC */ + clk_always_enable("mstp029"); /* OC */ + clk_always_enable("mstp028"); /* URAM */ + clk_always_enable("mstp026"); /* XYMEM */ + clk_always_enable("mstp023"); /* INTC3 */ + clk_always_enable("mstp022"); /* INTC */ + clk_always_enable("mstp020"); /* SuperHyway */ + clk_always_enable("mstp109"); /* I2C0 */ + clk_always_enable("mstp108"); /* I2C1 */ + clk_always_enable("mstp202"); /* VEU */ + clk_always_enable("mstp201"); /* VPU */ + + platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); + platform_resource_setup_memory(&veu_device, "veu", 2 << 20); + return platform_add_devices(sh7343_devices, ARRAY_SIZE(sh7343_devices)); } __initcall(sh7343_devices_setup); +enum { + UNUSED = 0, + + /* interrupt sources */ + IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, + DMAC0, DMAC1, DMAC2, DMAC3, + VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU, + MFI, VPU, TPU, Z3D4, USBI0, USBI1, + MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY, + DMAC4, DMAC5, DMAC_DADERR, + KEYSC, + SCIF, SCIF1, SCIF2, SCIF3, SCIF4, + SIOF0, SIOF1, SIO, + FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, + I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, + I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, + SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, + IRDA, + SDHI0, SDHI1, SDHI2, SDHI3, + CMT, TSIF, SIU, + TMU0, TMU1, TMU2, + JPU, LCDC, + + /* interrupt groups */ + + DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, +}; + +static struct intc_vect vectors[] __initdata = { + INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), + INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), + INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), + INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0), + INTC_VECT(I2C1_ALI, 0x780), INTC_VECT(I2C1_TACKI, 0x7a0), + INTC_VECT(I2C1_WAITI, 0x7c0), INTC_VECT(I2C1_DTEI, 0x7e0), + INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820), + INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860), + INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0), + INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0), + INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980), + INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0), + INTC_VECT(USBI0, 0xa20), INTC_VECT(USBI1, 0xa40), + INTC_VECT(MMC_ERR, 0xb00), INTC_VECT(MMC_TRAN, 0xb20), + INTC_VECT(MMC_FSTAT, 0xb40), INTC_VECT(MMC_FRDY, 0xb60), + INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0), + INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0), + INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20), + INTC_VECT(SCIF2, 0xc40), INTC_VECT(SCIF3, 0xc60), + INTC_VECT(SIOF0, 0xc80), INTC_VECT(SIOF1, 0xca0), + INTC_VECT(SIO, 0xd00), + INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0), + INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), + INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), + INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), + INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), + INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), + INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), + INTC_VECT(SIU, 0xf80), + INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), + INTC_VECT(TMU2, 0x440), + INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), +}; + +static struct intc_group groups[] __initdata = { + INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), + INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU), + INTC_GROUP(MMC, MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR), + INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR), + INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, + FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), + INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), + INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), + INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), + INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), + INTC_GROUP(USB, USBI0, USBI1), +}; + +static struct intc_mask_reg mask_registers[] __initdata = { + { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ + { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } }, + { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ + { 0, 0, 0, VPU, 0, 0, 0, MFI } }, + { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */ + { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } }, + { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */ + { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } }, + { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */ + { KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } }, + { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */ + { 0, 0, 0, SIO, Z3D4, 0, SIOF1, SIOF0 } }, + { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */ + { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, + FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, + { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ + { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, + { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ + { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, + { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ + { MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR } }, + { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */ + { I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } }, + { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static struct intc_prio_reg prio_registers[] __initdata = { + { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } }, + { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, + { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } }, + { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, + { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } }, + { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } }, + { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, I2C1 } }, + { 0xa4080024, 0, 16, 4, /* IPRJ */ { Z3D4, 0, SIU } }, + { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } }, + { 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } }, + { 0xa4140010, 0, 32, 4, /* INTPRI00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static struct intc_sense_reg sense_registers[] __initdata = { + { 0xa414001c, 16, 2, /* ICR1 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xa4140024, 0, 8, /* INTREQ00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, + mask_registers, prio_registers, sense_registers, + ack_registers); + void __init plat_irq_setup(void) { + register_intc_controller(&intc_desc); } diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index f26b5cdad0d1fd0349665b30ea2c93ecef918ca1..6851dba02f31897327c529adfef041c1673969b4 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c @@ -13,6 +13,112 @@ #include #include #include +#include +#include + +static struct resource iic_resources[] = { + [0] = { + .name = "IIC", + .start = 0x04470000, + .end = 0x04470017, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 96, + .end = 99, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device iic_device = { + .name = "i2c-sh_mobile", + .num_resources = ARRAY_SIZE(iic_resources), + .resource = iic_resources, +}; + +static struct uio_info vpu_platform_data = { + .name = "VPU5", + .version = "0", + .irq = 60, +}; + +static struct resource vpu_resources[] = { + [0] = { + .name = "VPU", + .start = 0xfe900000, + .end = 0xfe902807, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device vpu_device = { + .name = "uio_pdrv_genirq", + .id = 0, + .dev = { + .platform_data = &vpu_platform_data, + }, + .resource = vpu_resources, + .num_resources = ARRAY_SIZE(vpu_resources), +}; + +static struct uio_info veu0_platform_data = { + .name = "VEU", + .version = "0", + .irq = 54, +}; + +static struct resource veu0_resources[] = { + [0] = { + .name = "VEU(1)", + .start = 0xfe920000, + .end = 0xfe9200b7, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu0_device = { + .name = "uio_pdrv_genirq", + .id = 1, + .dev = { + .platform_data = &veu0_platform_data, + }, + .resource = veu0_resources, + .num_resources = ARRAY_SIZE(veu0_resources), +}; + +static struct uio_info veu1_platform_data = { + .name = "VEU", + .version = "0", + .irq = 27, +}; + +static struct resource veu1_resources[] = { + [0] = { + .name = "VEU(2)", + .start = 0xfe924000, + .end = 0xfe9240b7, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu1_device = { + .name = "uio_pdrv_genirq", + .id = 2, + .dev = { + .platform_data = &veu1_platform_data, + }, + .resource = veu1_resources, + .num_resources = ARRAY_SIZE(veu1_resources), +}; static struct plat_sci_port sci_platform_data[] = { { @@ -34,11 +140,32 @@ static struct platform_device sci_device = { }; static struct platform_device *sh7366_devices[] __initdata = { + &iic_device, &sci_device, + &vpu_device, + &veu0_device, + &veu1_device, }; static int __init sh7366_devices_setup(void) { + clk_always_enable("mstp031"); /* TLB */ + clk_always_enable("mstp030"); /* IC */ + clk_always_enable("mstp029"); /* OC */ + clk_always_enable("mstp028"); /* RSMEM */ + clk_always_enable("mstp026"); /* XYMEM */ + clk_always_enable("mstp023"); /* INTC3 */ + clk_always_enable("mstp022"); /* INTC */ + clk_always_enable("mstp020"); /* SuperHyway */ + clk_always_enable("mstp109"); /* I2C */ + clk_always_enable("mstp207"); /* VEU-2 */ + clk_always_enable("mstp202"); /* VEU-1 */ + clk_always_enable("mstp201"); /* VPU */ + + platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); + platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); + platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); + return platform_add_devices(sh7366_devices, ARRAY_SIZE(sh7366_devices)); } @@ -97,7 +224,7 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(SIU, 0xf80), INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), INTC_VECT(TMU2, 0x440), - INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580), + INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580), }; static struct intc_group groups[] __initdata = { @@ -163,8 +290,14 @@ static struct intc_sense_reg sense_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups, - mask_registers, prio_registers, sense_registers); +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xa4140024, 0, 8, /* INTREQ00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, + mask_registers, prio_registers, sense_registers, + ack_registers); void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 62ebccf18b3c27b2a9d91d7cbe925e854cc6af23..de1ede92176e8a3253e6c23c2e45246e0eccef62 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include static struct resource usbf_resources[] = { @@ -59,6 +61,62 @@ static struct platform_device iic_device = { .resource = iic_resources, }; +static struct uio_info vpu_platform_data = { + .name = "VPU4", + .version = "0", + .irq = 60, +}; + +static struct resource vpu_resources[] = { + [0] = { + .name = "VPU", + .start = 0xfe900000, + .end = 0xfe9022eb, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device vpu_device = { + .name = "uio_pdrv_genirq", + .id = 0, + .dev = { + .platform_data = &vpu_platform_data, + }, + .resource = vpu_resources, + .num_resources = ARRAY_SIZE(vpu_resources), +}; + +static struct uio_info veu_platform_data = { + .name = "VEU", + .version = "0", + .irq = 54, +}; + +static struct resource veu_resources[] = { + [0] = { + .name = "VEU", + .start = 0xfe920000, + .end = 0xfe9200b7, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu_device = { + .name = "uio_pdrv_genirq", + .id = 1, + .dev = { + .platform_data = &veu_platform_data, + }, + .resource = veu_resources, + .num_resources = ARRAY_SIZE(veu_resources), +}; + static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, @@ -95,10 +153,27 @@ static struct platform_device *sh7722_devices[] __initdata = { &usbf_device, &iic_device, &sci_device, + &vpu_device, + &veu_device, }; static int __init sh7722_devices_setup(void) { + clk_always_enable("mstp031"); /* TLB */ + clk_always_enable("mstp030"); /* IC */ + clk_always_enable("mstp029"); /* OC */ + clk_always_enable("mstp028"); /* URAM */ + clk_always_enable("mstp026"); /* XYMEM */ + clk_always_enable("mstp022"); /* INTC */ + clk_always_enable("mstp020"); /* SuperHyway */ + clk_always_enable("mstp109"); /* I2C */ + clk_always_enable("mstp211"); /* USB */ + clk_always_enable("mstp202"); /* VEU */ + clk_always_enable("mstp201"); /* VPU */ + + platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); + platform_resource_setup_memory(&veu_device, "veu", 2 << 20); + return platform_add_devices(sh7722_devices, ARRAY_SIZE(sh7722_devices)); } @@ -229,8 +304,14 @@ static struct intc_sense_reg sense_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, - mask_registers, prio_registers, sense_registers); +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xa4140024, 0, 8, /* INTREQ00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups, + mask_registers, prio_registers, sense_registers, + ack_registers); void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index a0470f2f54798af027a157112277c8974400803b..cd6baffdc89624684f2fe0e88f8d4e173d292e02 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c @@ -12,8 +12,94 @@ #include #include #include +#include +#include #include +static struct uio_info vpu_platform_data = { + .name = "VPU5", + .version = "0", + .irq = 60, +}; + +static struct resource vpu_resources[] = { + [0] = { + .name = "VPU", + .start = 0xfe900000, + .end = 0xfe902807, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device vpu_device = { + .name = "uio_pdrv_genirq", + .id = 0, + .dev = { + .platform_data = &vpu_platform_data, + }, + .resource = vpu_resources, + .num_resources = ARRAY_SIZE(vpu_resources), +}; + +static struct uio_info veu0_platform_data = { + .name = "VEU", + .version = "0", + .irq = 54, +}; + +static struct resource veu0_resources[] = { + [0] = { + .name = "VEU2H0", + .start = 0xfe920000, + .end = 0xfe92027b, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu0_device = { + .name = "uio_pdrv_genirq", + .id = 1, + .dev = { + .platform_data = &veu0_platform_data, + }, + .resource = veu0_resources, + .num_resources = ARRAY_SIZE(veu0_resources), +}; + +static struct uio_info veu1_platform_data = { + .name = "VEU", + .version = "0", + .irq = 27, +}; + +static struct resource veu1_resources[] = { + [0] = { + .name = "VEU2H1", + .start = 0xfe924000, + .end = 0xfe92427b, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* place holder for contiguous memory */ + }, +}; + +static struct platform_device veu1_device = { + .name = "uio_pdrv_genirq", + .id = 2, + .dev = { + .platform_data = &veu1_platform_data, + }, + .resource = veu1_resources, + .num_resources = ARRAY_SIZE(veu1_resources), +}; + static struct plat_sci_port sci_platform_data[] = { { .mapbase = 0xffe00000, @@ -113,14 +199,56 @@ static struct platform_device sh7723_usb_host_device = { .resource = sh7723_usb_host_resources, }; +static struct resource iic_resources[] = { + [0] = { + .name = "IIC", + .start = 0x04470000, + .end = 0x04470017, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 96, + .end = 99, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device iic_device = { + .name = "i2c-sh_mobile", + .num_resources = ARRAY_SIZE(iic_resources), + .resource = iic_resources, +}; + static struct platform_device *sh7723_devices[] __initdata = { &sci_device, &rtc_device, + &iic_device, &sh7723_usb_host_device, + &vpu_device, + &veu0_device, + &veu1_device, }; static int __init sh7723_devices_setup(void) { + clk_always_enable("mstp031"); /* TLB */ + clk_always_enable("mstp030"); /* IC */ + clk_always_enable("mstp029"); /* OC */ + clk_always_enable("mstp024"); /* FPU */ + clk_always_enable("mstp022"); /* INTC */ + clk_always_enable("mstp020"); /* SuperHyway */ + clk_always_enable("mstp000"); /* MERAM */ + clk_always_enable("mstp109"); /* I2C */ + clk_always_enable("mstp108"); /* RTC */ + clk_always_enable("mstp211"); /* USB */ + clk_always_enable("mstp206"); /* VEU2H1 */ + clk_always_enable("mstp202"); /* VEU2H0 */ + clk_always_enable("mstp201"); /* VPU */ + + platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); + platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); + platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); + return platform_add_devices(sh7723_devices, ARRAY_SIZE(sh7723_devices)); } @@ -326,8 +454,14 @@ static struct intc_sense_reg sense_registers[] __initdata = { { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups, - mask_registers, prio_registers, sense_registers); +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xa4140024, 0, 8, /* INTREQ00 */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups, + mask_registers, prio_registers, sense_registers, + ack_registers); void __init plat_irq_setup(void) { diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index f189a559462bdf791775ec949d85cc08597b0082..3c5b629887a8e3a54fa2a0cb5a2b886e7e9271ee 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c @@ -3,6 +3,7 @@ * * Copyright (C) 2006 Paul Mundt * Copyright (C) 2007 Yoshihiro Shimoda + * Copyright (C) 2008 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -55,6 +56,11 @@ static struct plat_sci_port sci_platform_data[] = { .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCIF, .irqs = { 76, 77, 79, 78 }, + }, { + .mapbase = 0xffe10000, + .flags = UPF_BOOT_AUTOCONF, + .type = PORT_SCIF, + .irqs = { 104, 105, 107, 106 }, }, { .flags = 0, } @@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = { INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), - INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20), - INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60), + INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20), + INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60), INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), }; @@ -290,9 +296,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = { IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors, - NULL, irq_mask_registers, irq_prio_registers, - irq_sense_registers); +static struct intc_mask_reg irq_ack_registers[] __initdata = { + { 0xffd00024, 0, 32, /* INTREQ */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7763-irq", irq_vectors, + NULL, irq_mask_registers, irq_prio_registers, + irq_sense_registers, irq_ack_registers); /* External interrupt pins in IRL mode */ diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index 18dbbe23fea1b172a22532b9cd93005d2eb52562..fb8200cc74409db26b27051d12c2dc77e2da1dde 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c @@ -217,9 +217,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = { IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, - NULL, irq_mask_registers, irq_prio_registers, - irq_sense_registers); +static struct intc_mask_reg irq_ack_registers[] __initdata = { + { 0xffd00024, 0, 32, /* INTREQ */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7780-irq", irq_vectors, + NULL, irq_mask_registers, irq_prio_registers, + irq_sense_registers, irq_ack_registers); /* External interrupt pins in IRL mode */ diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 621e7329ec63747b766301e72859a324dee8290e..30baa63b24c8e728b7d0763d36709938b8388cdc 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c @@ -238,13 +238,18 @@ static struct intc_sense_reg sense_registers[] __initdata = { IRQ4, IRQ5, IRQ6, IRQ7 } }, }; -static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, - NULL, mask_registers, prio_registers, - sense_registers); +static struct intc_mask_reg ack_registers[] __initdata = { + { 0xffd00024, 0, 32, /* INTREQ */ + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, +}; + +static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123", + vectors_irq0123, NULL, mask_registers, + prio_registers, sense_registers, ack_registers); -static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, - NULL, mask_registers, prio_registers, - sense_registers); +static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567", + vectors_irq4567, NULL, mask_registers, + prio_registers, sense_registers, ack_registers); /* External interrupt pins in IRL mode */ diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S index 718bd2356b34bf109a9608d0b6b7d20549dc310a..5e0dd1933847b5cbd772e4681f6a7b149fafa5b3 100644 --- a/arch/sh/kernel/entry-common.S +++ b/arch/sh/kernel/entry-common.S @@ -192,7 +192,7 @@ work_resched: .align 2 1: .long schedule 2: .long do_notify_resume -3: .long restore_all +3: .long resume_userspace #ifdef CONFIG_TRACE_IRQFLAGS 4: .long trace_hardirqs_on 5: .long trace_hardirqs_off diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c index 5c17de51987e59eed62b937e601372b824b7bc4e..ec1eadce4aaaebdf8d7ed8da1b44f42653b1aa9c 100644 --- a/arch/sh/kernel/machine_kexec.c +++ b/arch/sh/kernel/machine_kexec.c @@ -70,7 +70,7 @@ static void kexec_info(struct kimage *image) * Do not allocate memory (or fail in any way) in machine_kexec(). * We are past the point of no return, committed to rebooting now. */ -NORET_TYPE void machine_kexec(struct kimage *image) +void machine_kexec(struct kimage *image) { unsigned long page_list; diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c index b98e37a1f54c05229c18eb4d865ff0e6e0e26437..3326a45749d9ee2c0af9c9c35b4934cc57c487d9 100644 --- a/arch/sh/kernel/process_32.c +++ b/arch/sh/kernel/process_32.c @@ -34,18 +34,6 @@ void (*pm_idle)(void); void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); -void disable_hlt(void) -{ - hlt_counter++; -} -EXPORT_SYMBOL(disable_hlt); - -void enable_hlt(void) -{ - hlt_counter--; -} -EXPORT_SYMBOL(enable_hlt); - static int __init nohlt_setup(char *__unused) { hlt_counter = 1; @@ -60,7 +48,7 @@ static int __init hlt_setup(char *__unused) } __setup("hlt", hlt_setup); -void default_idle(void) +static void default_idle(void) { if (!hlt_counter) { clear_thread_flag(TIF_POLLING_NRFLAG); @@ -86,7 +74,7 @@ void cpu_idle(void) if (!idle) idle = default_idle; - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched()) idle(); tick_nohz_restart_sched_tick(); diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c index 0283d8133075b0507d04d5ca5417a3a6c1425017..b9dbd2d3b4a5845624829c547ed613c8fe259b51 100644 --- a/arch/sh/kernel/process_64.c +++ b/arch/sh/kernel/process_64.c @@ -36,16 +36,6 @@ static int hlt_counter = 1; #define HARD_IDLE_TIMEOUT (HZ / 3) -void disable_hlt(void) -{ - hlt_counter++; -} - -void enable_hlt(void) -{ - hlt_counter--; -} - static int __init nohlt_setup(char *__unused) { hlt_counter = 1; diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index fddb547f3c2b90f1483a9b54e4104701dc7eae8a..2bc72def5cf87d00e66b6d068019b1ade4cf33a5 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c @@ -240,6 +240,29 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) } break; } +#endif +#ifdef CONFIG_BINFMT_ELF_FDPIC + case PTRACE_GETFDPIC: { + unsigned long tmp = 0; + + switch (addr) { + case PTRACE_GETFDPIC_EXEC: + tmp = child->mm->context.exec_fdpic_loadmap; + break; + case PTRACE_GETFDPIC_INTERP: + tmp = child->mm->context.interp_fdpic_loadmap; + break; + default: + break; + } + + ret = 0; + if (put_user(tmp, (unsigned long *) data)) { + ret = -EFAULT; + break; + } + break; + } #endif default: ret = ptrace_request(child, request, addr, data); diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index bca2bbc575dbe034e7c0ded352c437997ee8308d..6339d0c9571557c481613bc7d06f7adee9fa6140 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -398,6 +398,7 @@ const char *get_cpu_subtype(struct sh_cpuinfo *c) { return cpu_name[c->type]; } +EXPORT_SYMBOL(get_cpu_subtype); #ifdef CONFIG_PROC_FS /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ @@ -452,6 +453,12 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "processor\t: %d\n", cpu); seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); + if (c->cut_major == -1) + seq_printf(m, "cut\t\t: unknown\n"); + else if (c->cut_minor == -1) + seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); + else + seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); show_cpuflags(m, c); diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c index f311551d9a05b253fccd2b2d2ac0b8a78418bd6f..4bbbde895a5353c41e7ecacd6cf019545c8e8202 100644 --- a/arch/sh/kernel/signal_32.c +++ b/arch/sh/kernel/signal_32.c @@ -33,6 +33,11 @@ #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) +struct fdpic_func_descriptor { + unsigned long text; + unsigned long GOT; +}; + /* * Atomically swap in the new signal mask, and wait for a signal. */ @@ -368,6 +373,7 @@ static int setup_frame(int sig, struct k_sigaction *ka, err |= __put_user(OR_R0_R0, &frame->retcode[6]); err |= __put_user((__NR_sigreturn), &frame->retcode[7]); regs->pr = (unsigned long) frame->retcode; + flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); } if (err) @@ -378,18 +384,21 @@ static int setup_frame(int sig, struct k_sigaction *ka, regs->regs[4] = signal; /* Arg for signal handler */ regs->regs[5] = 0; regs->regs[6] = (unsigned long) &frame->sc; - regs->pc = (unsigned long) ka->sa.sa_handler; + + if (current->personality & FDPIC_FUNCPTRS) { + struct fdpic_func_descriptor __user *funcptr = + (struct fdpic_func_descriptor __user *)ka->sa.sa_handler; + + __get_user(regs->pc, &funcptr->text); + __get_user(regs->regs[12], &funcptr->GOT); + } else + regs->pc = (unsigned long)ka->sa.sa_handler; set_fs(USER_DS); pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); - flush_cache_sigtramp(regs->pr); - - if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) - flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); - return 0; give_sigsegv: @@ -458,17 +467,22 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, regs->regs[4] = signal; /* Arg for signal handler */ regs->regs[5] = (unsigned long) &frame->info; regs->regs[6] = (unsigned long) &frame->uc; - regs->pc = (unsigned long) ka->sa.sa_handler; + + if (current->personality & FDPIC_FUNCPTRS) { + struct fdpic_func_descriptor __user *funcptr = + (struct fdpic_func_descriptor __user *)ka->sa.sa_handler; + + __get_user(regs->pc, &funcptr->text); + __get_user(regs->regs[12], &funcptr->GOT); + } else + regs->pc = (unsigned long)ka->sa.sa_handler; set_fs(USER_DS); pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); - flush_cache_sigtramp(regs->pr); - - if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) - flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); + flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); return 0; diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c index 5d039d168f57a4630336e555073d4767246016c1..60c50841143e26103b02a41c04d7ff863055663e 100644 --- a/arch/sh/kernel/smp.c +++ b/arch/sh/kernel/smp.c @@ -36,13 +36,6 @@ EXPORT_SYMBOL(cpu_possible_map); cpumask_t cpu_online_map; EXPORT_SYMBOL(cpu_online_map); -static atomic_t cpus_booted = ATOMIC_INIT(0); - -/* - * Run specified function on a particular processor. - */ -void __smp_call_function(unsigned int cpu); - static inline void __init smp_store_cpu_info(unsigned int cpu) { struct sh_cpuinfo *c = cpu_data + cpu; @@ -175,45 +168,20 @@ static void stop_this_cpu(void *unused) void smp_send_stop(void) { - smp_call_function(stop_this_cpu, 0, 1, 0); + smp_call_function(stop_this_cpu, 0, 0); } -struct smp_fn_call_struct smp_fn_call = { - .lock = __SPIN_LOCK_UNLOCKED(smp_fn_call.lock), - .finished = ATOMIC_INIT(0), -}; - -/* - * The caller of this wants the passed function to run on every cpu. If wait - * is set, wait until all cpus have finished the function before returning. - * The lock is here to protect the call structure. - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ -int smp_call_function(void (*func)(void *info), void *info, int retry, int wait) +void arch_send_call_function_ipi(cpumask_t mask) { - unsigned int nr_cpus = atomic_read(&cpus_booted); - int i; - - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - - spin_lock(&smp_fn_call.lock); - - atomic_set(&smp_fn_call.finished, 0); - smp_fn_call.fn = func; - smp_fn_call.data = info; - - for (i = 0; i < nr_cpus; i++) - if (i != smp_processor_id()) - plat_send_ipi(i, SMP_MSG_FUNCTION); - - if (wait) - while (atomic_read(&smp_fn_call.finished) != (nr_cpus - 1)); + int cpu; - spin_unlock(&smp_fn_call.lock); + for_each_cpu_mask(cpu, mask) + plat_send_ipi(cpu, SMP_MSG_FUNCTION); +} - return 0; +void arch_send_call_function_single_ipi(int cpu) +{ + plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE); } /* Not really SMP stuff ... */ @@ -229,7 +197,7 @@ static void flush_tlb_all_ipi(void *info) void flush_tlb_all(void) { - on_each_cpu(flush_tlb_all_ipi, 0, 1, 1); + on_each_cpu(flush_tlb_all_ipi, 0, 1); } static void flush_tlb_mm_ipi(void *mm) @@ -255,7 +223,7 @@ void flush_tlb_mm(struct mm_struct *mm) preempt_disable(); if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { - smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1); + smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1); } else { int i; for (i = 0; i < num_online_cpus(); i++) @@ -292,7 +260,7 @@ void flush_tlb_range(struct vm_area_struct *vma, fd.vma = vma; fd.addr1 = start; fd.addr2 = end; - smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1); + smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1); } else { int i; for (i = 0; i < num_online_cpus(); i++) @@ -316,7 +284,7 @@ void flush_tlb_kernel_range(unsigned long start, unsigned long end) fd.addr1 = start; fd.addr2 = end; - on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1); + on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1); } static void flush_tlb_page_ipi(void *info) @@ -335,7 +303,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) fd.vma = vma; fd.addr1 = page; - smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1); + smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1); } else { int i; for (i = 0; i < num_online_cpus(); i++) @@ -359,6 +327,6 @@ void flush_tlb_one(unsigned long asid, unsigned long vaddr) fd.addr1 = asid; fd.addr2 = vaddr; - smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1, 1); + smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1); local_flush_tlb_one(asid, vaddr); } diff --git a/arch/sh/kernel/stacktrace.c b/arch/sh/kernel/stacktrace.c index d41e561be20eafacbacf9c99fd08a84d1f1e2321..54d1f61aa00778c22cb55552e5fc18197e12d3b8 100644 --- a/arch/sh/kernel/stacktrace.c +++ b/arch/sh/kernel/stacktrace.c @@ -12,6 +12,7 @@ #include #include #include +#include #include /* @@ -34,3 +35,4 @@ void save_stack_trace(struct stack_trace *trace) } } } +EXPORT_SYMBOL_GPL(save_stack_trace); diff --git a/arch/sh/kernel/sys_sh32.c b/arch/sh/kernel/sys_sh32.c index 125e493ead8291b18a6e78d9e1d95c4f75c63aeb..f0aa5c398656ca5b7fc1e4d0812b41951c57a79b 100644 --- a/arch/sh/kernel/sys_sh32.c +++ b/arch/sh/kernel/sys_sh32.c @@ -29,7 +29,7 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5, int fd[2]; int error; - error = do_pipe(fd); + error = do_pipe_flags(fd, 0); if (!error) { regs->regs[1] = fd[1]; return fd[0]; diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index a46cc3a411485d4b71320015c5d1bb47ece080c1..0af693e65764d494dc487eb9a386baeb3a95d3aa 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -343,3 +343,9 @@ ENTRY(sys_call_table) .long sys_fallocate .long sys_timerfd_settime /* 325 */ .long sys_timerfd_gettime + .long sys_signalfd4 + .long sys_eventfd2 + .long sys_epoll_create1 + .long sys_dup3 /* 330 */ + .long sys_pipe2 + .long sys_inotify_init1 diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index d5d7843aad94c1c8ff79da288a16e422a7a9ad1b..0b436aa3cad7931df028a5e8dfa44e0e8e02d6d5 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S @@ -381,3 +381,9 @@ sys_call_table: .long sys_fallocate .long sys_timerfd_settime .long sys_timerfd_gettime + .long sys_signalfd4 /* 355 */ + .long sys_eventfd2 + .long sys_epoll_create1 + .long sys_dup3 + .long sys_pipe2 + .long sys_inotify_init1 /* 360 */ diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c index 7281342c044d6dd24247ea33fa89060c687fbc88..0758b5ee818079b3fd2f3948da6dfe7af5825d0b 100644 --- a/arch/sh/kernel/time_32.c +++ b/arch/sh/kernel/time_32.c @@ -211,7 +211,7 @@ unsigned long sh_hpt_frequency = 0; #define NSEC_PER_CYC_SHIFT 10 -struct clocksource clocksource_sh = { +static struct clocksource clocksource_sh = { .name = "SuperH", .rating = 200, .mask = CLOCKSOURCE_MASK(32), diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index 8935570008d2eb192d9d6698c2b4580ea3c0882c..1ca9ad49b54145c89b001d24371b40876751ba49 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -209,7 +209,7 @@ static int tmu_timer_init(void) return 0; } -struct sys_timer_ops tmu_timer_ops = { +static struct sys_timer_ops tmu_timer_ops = { .init = tmu_timer_init, .start = tmu_timer_start, .stop = tmu_timer_stop, diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c index e08b3bfeb6566fc430e5a50c0ed93cde07eedf3c..511a9426cec58a348fb7fd45bdf4db11d654b31c 100644 --- a/arch/sh/kernel/traps_32.c +++ b/arch/sh/kernel/traps_32.c @@ -43,6 +43,7 @@ # define TRAP_ILLEGAL_SLOT_INST 6 # define TRAP_ADDRESS_ERROR 9 # ifdef CONFIG_CPU_SH2A +# define TRAP_FPU_ERROR 13 # define TRAP_DIVZERO_ERROR 17 # define TRAP_DIVOVF_ERROR 18 # endif @@ -851,6 +852,9 @@ void __init trap_init(void) #ifdef CONFIG_CPU_SH2A set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); +#ifdef CONFIG_SH_FPU + set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler); +#endif #endif /* Setup VBR for boot cpu */ diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S index c7113786ecd4c1158c461128880cfef650a31857..7b4b82bd1156bc8c373fb61fe4edce6ab82d6a4b 100644 --- a/arch/sh/kernel/vmlinux_32.lds.S +++ b/arch/sh/kernel/vmlinux_32.lds.S @@ -44,7 +44,6 @@ SECTIONS _etext = .; /* End of text section */ - BUG_TABLE NOTES RO_DATA(PAGE_SIZE) diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S index d1e177009a4140ab0e86a47040fee7256b9a1e97..33fa464514060c041f7e3505e20e78d16e8736a9 100644 --- a/arch/sh/kernel/vmlinux_64.lds.S +++ b/arch/sh/kernel/vmlinux_64.lds.S @@ -65,7 +65,6 @@ SECTIONS _etext = .; /* End of text section */ - BUG_TABLE NOTES RO_DATA(PAGE_SIZE) diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index ebb55d1149f55ab3ea44c79e2704dc1ac2ea0cb5..8596cc78e18d0927cb938466f934bd4d8fc22ec8 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -2,9 +2,11 @@ # Makefile for SuperH-specific library files.. # -lib-y = delay.o io.o memset.o memmove.o memchr.o \ +lib-y = delay.o memset.o memmove.o memchr.o \ checksum.o strlen.o div64.o div64-generic.o +obj-y += io.o + memcpy-y := memcpy.o memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig index 5fd218430b19a9e1b91fc17c6f75d4650cf40142..56d0a7daa34ba61e45fdcff6e4b9fddf51f902ef 100644 --- a/arch/sh/mm/Kconfig +++ b/arch/sh/mm/Kconfig @@ -145,25 +145,39 @@ choice config PAGE_SIZE_4KB bool "4kB" - depends on !X2TLB + depends on !MMU || !X2TLB help This is the default page size used by all SuperH CPUs. config PAGE_SIZE_8KB bool "8kB" - depends on X2TLB + depends on !MMU || X2TLB help This enables 8kB pages as supported by SH-X2 and later MMUs. +config PAGE_SIZE_16KB + bool "16kB" + depends on !MMU + help + This enables 16kB pages on MMU-less SH systems. + config PAGE_SIZE_64KB bool "64kB" - depends on CPU_SH4 || CPU_SH5 + depends on !MMU || CPU_SH4 || CPU_SH5 help This enables support for 64kB pages, possible on all SH-4 CPUs and later. endchoice +config ENTRY_OFFSET + hex + default "0x00001000" if PAGE_SIZE_4KB + default "0x00002000" if PAGE_SIZE_8KB + default "0x00004000" if PAGE_SIZE_16KB + default "0x00010000" if PAGE_SIZE_64KB + default "0x00000000" + choice prompt "HugeTLB page size" depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c index c5b56d52b7d27cf7d87a6bd3e2d1e99b24f97bf2..0e189ccd4a77a7ce7462f9eb863409d419a71150 100644 --- a/arch/sh/mm/cache-debugfs.c +++ b/arch/sh/mm/cache-debugfs.c @@ -120,7 +120,7 @@ static const struct file_operations cache_debugfs_fops = { .open = cache_debugfs_open, .read = seq_read, .llseek = seq_lseek, - .release = seq_release, + .release = single_release, }; static int __init cache_debugfs_init(void) diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c index 43d7ff6b6ec7c71cfbaccc244d46bc6bcf0a7ce7..1fdc8d90254a177bbb4a345456712378a17fdb2c 100644 --- a/arch/sh/mm/cache-sh4.c +++ b/arch/sh/mm/cache-sh4.c @@ -4,6 +4,7 @@ * Copyright (C) 1999, 2000, 2002 Niibe Yutaka * Copyright (C) 2001 - 2007 Paul Mundt * Copyright (C) 2003 Richard Curnow + * Copyright (c) 2007 STMicroelectronics (R&D) Ltd. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -22,6 +23,7 @@ * entirety. */ #define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */ +#define MAX_ICACHE_PAGES 32 static void __flush_dcache_segment_1way(unsigned long start, unsigned long extent); @@ -178,42 +180,45 @@ void __flush_invalidate_region(void *start, int size) /* * Write back the range of D-cache, and purge the I-cache. * - * Called from kernel/module.c:sys_init_module and routine for a.out format. + * Called from kernel/module.c:sys_init_module and routine for a.out format, + * signal handler code and kprobes code */ void flush_icache_range(unsigned long start, unsigned long end) { - flush_cache_all(); -} - -/* - * Write back the D-cache and purge the I-cache for signal trampoline. - * .. which happens to be the same behavior as flush_icache_range(). - * So, we simply flush out a line. - */ -void __uses_jump_to_uncached flush_cache_sigtramp(unsigned long addr) -{ - unsigned long v, index; - unsigned long flags; + int icacheaddr; + unsigned long flags, v; int i; - v = addr & ~(L1_CACHE_BYTES-1); - asm volatile("ocbwb %0" - : /* no output */ - : "m" (__m(v))); - - index = CACHE_IC_ADDRESS_ARRAY | - (v & boot_cpu_data.icache.entry_mask); - - local_irq_save(flags); - jump_to_uncached(); - - for (i = 0; i < boot_cpu_data.icache.ways; - i++, index += boot_cpu_data.icache.way_incr) - ctrl_outl(0, index); /* Clear out Valid-bit */ - - back_to_cached(); - wmb(); - local_irq_restore(flags); + /* If there are too many pages then just blow the caches */ + if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { + flush_cache_all(); + } else { + /* selectively flush d-cache then invalidate the i-cache */ + /* this is inefficient, so only use for small ranges */ + start &= ~(L1_CACHE_BYTES-1); + end += L1_CACHE_BYTES-1; + end &= ~(L1_CACHE_BYTES-1); + + local_irq_save(flags); + jump_to_uncached(); + + for (v = start; v < end; v+=L1_CACHE_BYTES) { + asm volatile("ocbwb %0" + : /* no output */ + : "m" (__m(v))); + + icacheaddr = CACHE_IC_ADDRESS_ARRAY | ( + v & cpu_data->icache.entry_mask); + + for (i = 0; i < cpu_data->icache.ways; + i++, icacheaddr += cpu_data->icache.way_incr) + /* Clear i-cache line valid-bit */ + ctrl_outl(0, icacheaddr); + } + + back_to_cached(); + local_irq_restore(flags); + } } static inline void flush_cache_4096(unsigned long start, diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c index d3c33fc5b1c2d252bc739717c8d5dd50dd096482..b2ce014401b5516ed8ae51c4ca98cf5d0c4a026e 100644 --- a/arch/sh/mm/consistent.c +++ b/arch/sh/mm/consistent.c @@ -10,6 +10,7 @@ * for more details. */ #include +#include #include #include #include @@ -27,21 +28,10 @@ void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { void *ret, *ret_nocache; - struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; int order = get_order(size); - if (mem) { - int page = bitmap_find_free_region(mem->bitmap, mem->size, - order); - if (page >= 0) { - *dma_handle = mem->device_base + (page << PAGE_SHIFT); - ret = mem->virt_base + (page << PAGE_SHIFT); - memset(ret, 0, size); - return ret; - } - if (mem->flags & DMA_MEMORY_EXCLUSIVE) - return NULL; - } + if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) + return ret; ret = (void *)__get_free_pages(gfp, order); if (!ret) @@ -71,11 +61,7 @@ void dma_free_coherent(struct device *dev, size_t size, struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; int order = get_order(size); - if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) { - int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; - - bitmap_release_region(mem->bitmap, page, order); - } else { + if (!dma_release_from_coherent(dev, order, vaddr)) { WARN_ON(irqs_disabled()); /* for portability */ BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE); free_pages((unsigned long)phys_to_virt(dma_handle), order); @@ -84,83 +70,6 @@ void dma_free_coherent(struct device *dev, size_t size, } EXPORT_SYMBOL(dma_free_coherent); -int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, - dma_addr_t device_addr, size_t size, int flags) -{ - void __iomem *mem_base = NULL; - int pages = size >> PAGE_SHIFT; - int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long); - - if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0) - goto out; - if (!size) - goto out; - if (dev->dma_mem) - goto out; - - /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */ - - mem_base = ioremap_nocache(bus_addr, size); - if (!mem_base) - goto out; - - dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL); - if (!dev->dma_mem) - goto out; - dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL); - if (!dev->dma_mem->bitmap) - goto free1_out; - - dev->dma_mem->virt_base = mem_base; - dev->dma_mem->device_base = device_addr; - dev->dma_mem->size = pages; - dev->dma_mem->flags = flags; - - if (flags & DMA_MEMORY_MAP) - return DMA_MEMORY_MAP; - - return DMA_MEMORY_IO; - - free1_out: - kfree(dev->dma_mem); - out: - if (mem_base) - iounmap(mem_base); - return 0; -} -EXPORT_SYMBOL(dma_declare_coherent_memory); - -void dma_release_declared_memory(struct device *dev) -{ - struct dma_coherent_mem *mem = dev->dma_mem; - - if (!mem) - return; - dev->dma_mem = NULL; - iounmap(mem->virt_base); - kfree(mem->bitmap); - kfree(mem); -} -EXPORT_SYMBOL(dma_release_declared_memory); - -void *dma_mark_declared_memory_occupied(struct device *dev, - dma_addr_t device_addr, size_t size) -{ - struct dma_coherent_mem *mem = dev->dma_mem; - int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT; - int pos, err; - - if (!mem) - return ERR_PTR(-EINVAL); - - pos = (device_addr - mem->device_base) >> PAGE_SHIFT; - err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages)); - if (err != 0) - return ERR_PTR(err); - return mem->virt_base + (pos << PAGE_SHIFT); -} -EXPORT_SYMBOL(dma_mark_declared_memory_occupied); - void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { @@ -185,3 +94,32 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, } } EXPORT_SYMBOL(dma_cache_sync); + +int platform_resource_setup_memory(struct platform_device *pdev, + char *name, unsigned long memsize) +{ + struct resource *r; + dma_addr_t dma_handle; + void *buf; + + r = pdev->resource + pdev->num_resources - 1; + if (r->flags) { + pr_warning("%s: unable to find empty space for resource\n", + name); + return -EINVAL; + } + + buf = dma_alloc_coherent(NULL, memsize, &dma_handle, GFP_KERNEL); + if (!buf) { + pr_warning("%s: unable to allocate memory\n", name); + return -ENOMEM; + } + + memset(buf, 0, memsize); + + r->flags = IORESOURCE_MEM; + r->start = dma_handle; + r->end = r->start + memsize - 1; + r->name = name; + return 0; +} diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c index d1fa27594c6e4f0d7340670597e0c5ee4517b9c5..0c776fdfbddae6800480dc0a3dc7be54103509b3 100644 --- a/arch/sh/mm/fault_32.c +++ b/arch/sh/mm/fault_32.c @@ -37,16 +37,12 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, int fault; siginfo_t info; - trace_hardirqs_on(); - local_irq_enable(); - #ifdef CONFIG_SH_KGDB if (kgdb_nofault && kgdb_bus_err_hook) kgdb_bus_err_hook(); #endif tsk = current; - mm = tsk->mm; si_code = SEGV_MAPERR; if (unlikely(address >= TASK_SIZE)) { @@ -88,6 +84,14 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, return; } + /* Only enable interrupts if they were on before the fault */ + if ((regs->sr & SR_IMASK) != SR_IMASK) { + trace_hardirqs_on(); + local_irq_enable(); + } + + mm = tsk->mm; + /* * If we're in an interrupt or have no user * context, we must not take the fault.. diff --git a/arch/sh/mm/hugetlbpage.c b/arch/sh/mm/hugetlbpage.c index ae8c321d6e2a960e0e7fe1bd55ab5224e7a586cc..9304117039c4f887d7a94f70e48a73c6d1549ef8 100644 --- a/arch/sh/mm/hugetlbpage.c +++ b/arch/sh/mm/hugetlbpage.c @@ -22,7 +22,8 @@ #include #include -pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) +pte_t *huge_pte_alloc(struct mm_struct *mm, + unsigned long addr, unsigned long sz) { pgd_t *pgd; pud_t *pud; @@ -78,6 +79,11 @@ int pmd_huge(pmd_t pmd) return 0; } +int pud_huge(pud_t pud) +{ + return 0; +} + struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmd, int write) { diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c index d7df26bd1e5468b0f79a702220bf85352c61a0bc..b75a7acd62fb7818f8fec20cc72aa7794d0ff159 100644 --- a/arch/sh/mm/init.c +++ b/arch/sh/mm/init.c @@ -25,47 +25,6 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); pgd_t swapper_pg_dir[PTRS_PER_PGD]; unsigned long cached_to_uncached = 0; -void show_mem(void) -{ - int total = 0, reserved = 0, free = 0; - int shared = 0, cached = 0, slab = 0; - pg_data_t *pgdat; - - printk("Mem-info:\n"); - show_free_areas(); - - for_each_online_pgdat(pgdat) { - unsigned long flags, i; - - pgdat_resize_lock(pgdat, &flags); - for (i = 0; i < pgdat->node_spanned_pages; i++) { - struct page *page = pgdat_page_nr(pgdat, i); - total++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (PageSlab(page)) - slab++; - else if (!page_count(page)) - free++; - else - shared += page_count(page) - 1; - } - pgdat_resize_unlock(pgdat, &flags); - } - - printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); - printk("%d pages of RAM\n", total); - printk("%d free pages\n", free); - printk("%d reserved pages\n", reserved); - printk("%d slab pages\n", slab); - printk("%d pages shared\n", shared); - printk("%d pages swap cached\n", cached); - printk(KERN_INFO "Total of %ld pages in page table cache\n", - quicklist_total_size()); -} - #ifdef CONFIG_MMU static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot) { @@ -191,7 +150,7 @@ void __init paging_init(void) pg_data_t *pgdat = NODE_DATA(nid); unsigned long low, start_pfn; - start_pfn = pgdat->bdata->node_boot_start >> PAGE_SHIFT; + start_pfn = pgdat->bdata->node_min_pfn; low = pgdat->bdata->node_low_pfn; if (max_zone_pfns[ZONE_NORMAL] < low) diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c index 1663199ce888649a6ecd0368f2c114ae7866a38e..095d93bec7cd2aebe1b6b6b408b13eff1e2a617b 100644 --- a/arch/sh/mm/numa.c +++ b/arch/sh/mm/numa.c @@ -14,7 +14,6 @@ #include #include -static bootmem_data_t plat_node_bdata[MAX_NUMNODES]; struct pglist_data *node_data[MAX_NUMNODES] __read_mostly; EXPORT_SYMBOL_GPL(node_data); @@ -35,7 +34,7 @@ void __init setup_memory(void) NODE_DATA(0) = pfn_to_kaddr(free_pfn); memset(NODE_DATA(0), 0, sizeof(struct pglist_data)); free_pfn += PFN_UP(sizeof(struct pglist_data)); - NODE_DATA(0)->bdata = &plat_node_bdata[0]; + NODE_DATA(0)->bdata = &bootmem_node_data[0]; /* Set up node 0 */ setup_bootmem_allocator(free_pfn); @@ -66,7 +65,7 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) free_pfn += PFN_UP(sizeof(struct pglist_data)); memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); - NODE_DATA(nid)->bdata = &plat_node_bdata[nid]; + NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; NODE_DATA(nid)->node_start_pfn = start_pfn; NODE_DATA(nid)->node_spanned_pages = end_pfn - start_pfn; diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c index 8c7a9ca79879aef2de7de1f253a6e8c8b5969121..38870e0fc182af3347ed90986d9fb3b31578fadb 100644 --- a/arch/sh/mm/pg-sh4.c +++ b/arch/sh/mm/pg-sh4.c @@ -111,7 +111,7 @@ EXPORT_SYMBOL(copy_user_highpage); /* * For SH-4, we have our own implementation for ptep_get_and_clear */ -inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t pte = *ptep; diff --git a/arch/sh/mm/pg-sh7705.c b/arch/sh/mm/pg-sh7705.c index 7f885b7f8afffa36a4bac0d73e4180aeecf04ded..eaf25147194c80947a5ce74aadd93ca7e22ced26 100644 --- a/arch/sh/mm/pg-sh7705.c +++ b/arch/sh/mm/pg-sh7705.c @@ -118,7 +118,7 @@ void copy_user_page(void *to, void *from, unsigned long address, struct page *pg * For SH7705, we have our own implementation for ptep_get_and_clear * Copied from pg-sh4.c */ -inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) +pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) { pte_t pte = *ptep; diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index 0b0ec6e047530bd1b7a4dde27088a004631755d5..cef727669c8759dde6ce20ceb9ecc138d71a28bb 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -293,7 +293,7 @@ void pmb_unmap(unsigned long addr) } while (pmbe); } -static void pmb_cache_ctor(struct kmem_cache *cachep, void *pmb) +static void pmb_cache_ctor(void *pmb) { struct pmb_entry *pmbe = pmb; @@ -385,7 +385,7 @@ static const struct file_operations pmb_debugfs_fops = { .open = pmb_debugfs_open, .read = seq_read, .llseek = seq_lseek, - .release = seq_release, + .release = single_release, }; static int __init pmb_debugfs_init(void) diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types index 1bba7d36be9067de687cbb2d28065393b2e1369a..0a11cc08f0a593d0bf134bade882b0de0e6f2449 100644 --- a/arch/sh/tools/mach-types +++ b/arch/sh/tools/mach-types @@ -46,3 +46,7 @@ R2D_1 RTS7751R2D_1 CAYMAN SH_CAYMAN SDK7780 SH_SDK7780 MIGOR SH_MIGOR +RSK7203 SH_RSK7203 +AP325RXA SH_AP325RXA +SH7763RDP SH_SH7763RDP +SH7785LCR SH_SH7785LCR diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 789724e61e8345e90ca7b155e1c23b543781de3c..a214002114ed90b0f8924c6837cbfcc622af737c 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -68,6 +68,7 @@ config SPARC select HAVE_IDE select HAVE_OPROFILE select HAVE_ARCH_KGDB if !SMP + select HAVE_ARCH_TRACEHOOK # Identify this as a Sparc32 build config SPARC32 @@ -298,20 +299,6 @@ config UNIX98_PTYS Read the instructions in pertaining to pseudo terminals. It's safe to say N. -config UNIX98_PTY_COUNT - int "Maximum number of Unix98 PTYs in use (0-2048)" - depends on UNIX98_PTYS - default "256" - help - The maximum number of Unix98 PTYs that can be used at any one time. - The default is 256, and should be enough for desktop systems. Server - machines which support incoming telnet/rlogin/ssh connections and/or - serve several X terminals may want to increase this: every incoming - connection and every xterm uses up one PTY. - - When not in use, each additional set of 256 PTYs occupy - approximately 8 KB of kernel memory on 32-bit architectures. - endmenu source "fs/Kconfig" diff --git a/arch/sparc/Makefile b/arch/sparc/Makefile index fef28e267a52fc1e2943d85c7bf3daea8603170e..6668e6037af647adbc9c31b4282027d5ed26fd65 100644 --- a/arch/sparc/Makefile +++ b/arch/sparc/Makefile @@ -18,6 +18,7 @@ CHECKFLAGS += -D__sparc__ #KBUILD_CFLAGS += -g -pipe -fcall-used-g5 -fcall-used-g7 KBUILD_CFLAGS += -m32 -pipe -mno-fpu -fcall-used-g5 -fcall-used-g7 KBUILD_AFLAGS += -m32 +CPPFLAGS_vmlinux.lds += -m32 #LDFLAGS_vmlinux = -N -Ttext 0xf0004000 # Since 2.5.40, the first stage is left not btfix-ed. diff --git a/arch/sparc/include/asm/Kbuild b/arch/sparc/include/asm/Kbuild new file mode 100644 index 0000000000000000000000000000000000000000..a5f0ce734ff7dab790fe2df8e0c1915e2327c6f3 --- /dev/null +++ b/arch/sparc/include/asm/Kbuild @@ -0,0 +1,45 @@ +# User exported sparc header files +include include/asm-generic/Kbuild.asm + +header-y += ipcbuf_32.h +header-y += ipcbuf_64.h +header-y += posix_types_32.h +header-y += posix_types_64.h +header-y += ptrace_32.h +header-y += ptrace_64.h +header-y += sigcontext_32.h +header-y += sigcontext_64.h +header-y += siginfo_32.h +header-y += siginfo_64.h +header-y += signal_32.h +header-y += signal_64.h +header-y += stat_32.h +header-y += stat_64.h +header-y += statfs_32.h +header-y += statfs_64.h +header-y += unistd_32.h +header-y += unistd_64.h + +header-y += apc.h +header-y += asi.h +header-y += bpp.h +header-y += display7seg.h +header-y += envctrl.h +header-y += fbio.h +header-y += jsflash.h +header-y += openprom.h +header-y += openprom_32.h +header-y += openprom_64.h +header-y += openpromio.h +header-y += perfctr.h +header-y += psrcompat.h +header-y += psr.h +header-y += pstate.h +header-y += reg.h +header-y += reg_32.h +header-y += reg_64.h +header-y += traps.h +header-y += uctx.h +header-y += utrap.h +header-y += vfc_ioctls.h +header-y += watchdog.h diff --git a/include/asm-sparc64/agp.h b/arch/sparc/include/asm/agp.h similarity index 87% rename from include/asm-sparc64/agp.h rename to arch/sparc/include/asm/agp.h index e9fcf0e781ea11cd1644dc9dc3e96aa6519fa0e6..c2456870b05c6c298aba695cd433c15b854a12ee 100644 --- a/include/asm-sparc64/agp.h +++ b/arch/sparc/include/asm/agp.h @@ -3,8 +3,8 @@ /* dummy for now */ -#define map_page_into_agp(page) -#define unmap_page_from_agp(page) +#define map_page_into_agp(page) +#define unmap_page_from_agp(page) #define flush_agp_cache() mb() /* Convert a physical address to an address suitable for the GART. */ diff --git a/include/asm-sparc64/apb.h b/arch/sparc/include/asm/apb.h similarity index 100% rename from include/asm-sparc64/apb.h rename to arch/sparc/include/asm/apb.h diff --git a/include/asm-sparc/apc.h b/arch/sparc/include/asm/apc.h similarity index 100% rename from include/asm-sparc/apc.h rename to arch/sparc/include/asm/apc.h diff --git a/arch/sparc/include/asm/asi.h b/arch/sparc/include/asm/asi.h new file mode 100644 index 0000000000000000000000000000000000000000..74703c5ef985eb4b3c7ed726b5cdb5cd8814f93b --- /dev/null +++ b/arch/sparc/include/asm/asi.h @@ -0,0 +1,262 @@ +#ifndef _SPARC_ASI_H +#define _SPARC_ASI_H + +/* asi.h: Address Space Identifier values for the sparc. + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + * + * Pioneer work for sun4m: Paul Hatchman (paul@sfe.com.au) + * Joint edition for sun4c+sun4m: Pete A. Zaitcev + */ + +/* The first batch are for the sun4c. */ + +#define ASI_NULL1 0x00 +#define ASI_NULL2 0x01 + +/* sun4c and sun4 control registers and mmu/vac ops */ +#define ASI_CONTROL 0x02 +#define ASI_SEGMAP 0x03 +#define ASI_PTE 0x04 +#define ASI_HWFLUSHSEG 0x05 +#define ASI_HWFLUSHPAGE 0x06 +#define ASI_REGMAP 0x06 +#define ASI_HWFLUSHCONTEXT 0x07 + +#define ASI_USERTXT 0x08 +#define ASI_KERNELTXT 0x09 +#define ASI_USERDATA 0x0a +#define ASI_KERNELDATA 0x0b + +/* VAC Cache flushing on sun4c and sun4 */ +#define ASI_FLUSHSEG 0x0c +#define ASI_FLUSHPG 0x0d +#define ASI_FLUSHCTX 0x0e + +/* SPARCstation-5: only 6 bits are decoded. */ +/* wo = Write Only, rw = Read Write; */ +/* ss = Single Size, as = All Sizes; */ +#define ASI_M_RES00 0x00 /* Don't touch... */ +#define ASI_M_UNA01 0x01 /* Same here... */ +#define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */ +#define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */ +#define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */ +#define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */ +#define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */ +#define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */ +#define ASI_M_USERTXT 0x08 /* Same as ASI_USERTXT; rw, as */ +#define ASI_M_KERNELTXT 0x09 /* Same as ASI_KERNELTXT; rw, as */ +#define ASI_M_USERDATA 0x0A /* Same as ASI_USERDATA; rw, as */ +#define ASI_M_KERNELDATA 0x0B /* Same as ASI_KERNELDATA; rw, as */ +#define ASI_M_TXTC_TAG 0x0C /* Instruction Cache Tag; rw, ss */ +#define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */ +#define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */ +#define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */ + +/* The following cache flushing ASIs work only with the 'sta' + * instruction. Results are unpredictable for 'swap' and 'ldstuba', + * so don't do it. + */ + +/* These ASI flushes affect external caches too. */ +#define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */ +#define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */ +#define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */ +#define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */ +#define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */ + +/* Block-copy operations are available only on certain V8 cpus. */ +#define ASI_M_BCOPY 0x17 /* Block copy */ + +/* These affect only the ICACHE and are Ross HyperSparc and TurboSparc specific. */ +#define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */ +#define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */ +#define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */ +#define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */ +#define ASI_M_IFLUSH_USER 0x1C /* Flush I Cache Line (user); wo, ss */ + +/* Block-fill operations are available on certain V8 cpus */ +#define ASI_M_BFILL 0x1F + +/* This allows direct access to main memory, actually 0x20 to 0x2f are + * the available ASI's for physical ram pass-through, but I don't have + * any idea what the other ones do.... + */ + +#define ASI_M_BYPASS 0x20 /* Reference MMU bypass; rw, as */ +#define ASI_M_FBMEM 0x29 /* Graphics card frame buffer access */ +#define ASI_M_VMEUS 0x2A /* VME user 16-bit access */ +#define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */ +#define ASI_M_VMEUT 0x2C /* VME user 32-bit access */ +#define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */ +#define ASI_M_SBUS 0x2E /* Direct SBus access */ +#define ASI_M_CTL 0x2F /* Control Space (ECC and MXCC are here) */ + + +/* This is ROSS HyperSparc only. */ +#define ASI_M_FLUSH_IWHOLE 0x31 /* Flush entire ICACHE; wo, ss */ + +/* Tsunami/Viking/TurboSparc i/d cache flash clear. */ +#define ASI_M_IC_FLCLEAR 0x36 +#define ASI_M_DC_FLCLEAR 0x37 + +#define ASI_M_DCDR 0x39 /* Data Cache Diagnostics Register rw, ss */ + +#define ASI_M_VIKING_TMP1 0x40 /* Emulation temporary 1 on Viking */ +/* only available on SuperSparc I */ +/* #define ASI_M_VIKING_TMP2 0x41 */ /* Emulation temporary 2 on Viking */ + +#define ASI_M_ACTION 0x4c /* Breakpoint Action Register (GNU/Viking) */ + +/* V9 Architecture mandary ASIs. */ +#define ASI_N 0x04 /* Nucleus */ +#define ASI_NL 0x0c /* Nucleus, little endian */ +#define ASI_AIUP 0x10 /* Primary, user */ +#define ASI_AIUS 0x11 /* Secondary, user */ +#define ASI_AIUPL 0x18 /* Primary, user, little endian */ +#define ASI_AIUSL 0x19 /* Secondary, user, little endian */ +#define ASI_P 0x80 /* Primary, implicit */ +#define ASI_S 0x81 /* Secondary, implicit */ +#define ASI_PNF 0x82 /* Primary, no fault */ +#define ASI_SNF 0x83 /* Secondary, no fault */ +#define ASI_PL 0x88 /* Primary, implicit, l-endian */ +#define ASI_SL 0x89 /* Secondary, implicit, l-endian */ +#define ASI_PNFL 0x8a /* Primary, no fault, l-endian */ +#define ASI_SNFL 0x8b /* Secondary, no fault, l-endian */ + +/* SpitFire and later extended ASIs. The "(III)" marker designates + * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates + * Chip Multi Threading specific ASIs. "(NG)" designates Niagara specific + * ASIs, "(4V)" designates SUN4V specific ASIs. + */ +#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ +#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ +#define ASI_BLK_AIUP_4V 0x16 /* (4V) Prim, user, block ld/st */ +#define ASI_BLK_AIUS_4V 0x17 /* (4V) Sec, user, block ld/st */ +#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ +#define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ +#define ASI_BLK_AIUP_L_4V 0x1e /* (4V) Prim, user, block, l-endian*/ +#define ASI_BLK_AIUS_L_4V 0x1f /* (4V) Sec, user, block, l-endian */ +#define ASI_SCRATCHPAD 0x20 /* (4V) Scratch Pad Registers */ +#define ASI_MMU 0x21 /* (4V) MMU Context Registers */ +#define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load, + * secondary, user + */ +#define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cachable, qword load */ +#define ASI_QUEUE 0x25 /* (4V) Interrupt Queue Registers */ +#define ASI_QUAD_LDD_PHYS_4V 0x26 /* (4V) Physical, qword load */ +#define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cachable, qword load, l-endian */ +#define ASI_QUAD_LDD_PHYS_L_4V 0x2e /* (4V) Phys, qword load, l-endian */ +#define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ +#define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ +#define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ +#define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ +#define ASI_QUAD_LDD_PHYS 0x34 /* (III+) PADDR, qword load */ +#define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ +#define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ +#define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ +#define ASI_WCACHE_SNOOP_TAG 0x3b /* (III) WCache snoop tag RAM diag */ +#define ASI_QUAD_LDD_PHYS_L 0x3c /* (III+) PADDR, qw-load, l-endian */ +#define ASI_SRAM_FAST_INIT 0x40 /* (III+) Fast SRAM init */ +#define ASI_CORE_AVAILABLE 0x41 /* (CMT) LP Available */ +#define ASI_CORE_ENABLE_STAT 0x41 /* (CMT) LP Enable Status */ +#define ASI_CORE_ENABLE 0x41 /* (CMT) LP Enable RW */ +#define ASI_XIR_STEERING 0x41 /* (CMT) XIR Steering RW */ +#define ASI_CORE_RUNNING_RW 0x41 /* (CMT) LP Running RW */ +#define ASI_CORE_RUNNING_W1S 0x41 /* (CMT) LP Running Write-One Set */ +#define ASI_CORE_RUNNING_W1C 0x41 /* (CMT) LP Running Write-One Clr */ +#define ASI_CORE_RUNNING_STAT 0x41 /* (CMT) LP Running Status */ +#define ASI_CMT_ERROR_STEERING 0x41 /* (CMT) Error Steering RW */ +#define ASI_DCACHE_INVALIDATE 0x42 /* (III) DCache Invalidate diag */ +#define ASI_DCACHE_UTAG 0x43 /* (III) DCache uTag diag */ +#define ASI_DCACHE_SNOOP_TAG 0x44 /* (III) DCache snoop tag RAM diag */ +#define ASI_LSU_CONTROL 0x45 /* Load-store control unit */ +#define ASI_DCU_CONTROL_REG 0x45 /* (III) DCache Unit Control reg */ +#define ASI_DCACHE_DATA 0x46 /* DCache data-ram diag access */ +#define ASI_DCACHE_TAG 0x47 /* Dcache tag/valid ram diag access*/ +#define ASI_INTR_DISPATCH_STAT 0x48 /* IRQ vector dispatch status */ +#define ASI_INTR_RECEIVE 0x49 /* IRQ vector receive status */ +#define ASI_UPA_CONFIG 0x4a /* UPA config space */ +#define ASI_JBUS_CONFIG 0x4a /* (IIIi) JBUS Config Register */ +#define ASI_SAFARI_CONFIG 0x4a /* (III) Safari Config Register */ +#define ASI_SAFARI_ADDRESS 0x4a /* (III) Safari Address Register */ +#define ASI_ESTATE_ERROR_EN 0x4b /* E-cache error enable space */ +#define ASI_AFSR 0x4c /* Async fault status register */ +#define ASI_AFAR 0x4d /* Async fault address register */ +#define ASI_EC_TAG_DATA 0x4e /* E-cache tag/valid ram diag acc */ +#define ASI_IMMU 0x50 /* Insn-MMU main register space */ +#define ASI_IMMU_TSB_8KB_PTR 0x51 /* Insn-MMU 8KB TSB pointer reg */ +#define ASI_IMMU_TSB_64KB_PTR 0x52 /* Insn-MMU 64KB TSB pointer reg */ +#define ASI_ITLB_DATA_IN 0x54 /* Insn-MMU TLB data in reg */ +#define ASI_ITLB_DATA_ACCESS 0x55 /* Insn-MMU TLB data access reg */ +#define ASI_ITLB_TAG_READ 0x56 /* Insn-MMU TLB tag read reg */ +#define ASI_IMMU_DEMAP 0x57 /* Insn-MMU TLB demap */ +#define ASI_DMMU 0x58 /* Data-MMU main register space */ +#define ASI_DMMU_TSB_8KB_PTR 0x59 /* Data-MMU 8KB TSB pointer reg */ +#define ASI_DMMU_TSB_64KB_PTR 0x5a /* Data-MMU 16KB TSB pointer reg */ +#define ASI_DMMU_TSB_DIRECT_PTR 0x5b /* Data-MMU TSB direct pointer reg */ +#define ASI_DTLB_DATA_IN 0x5c /* Data-MMU TLB data in reg */ +#define ASI_DTLB_DATA_ACCESS 0x5d /* Data-MMU TLB data access reg */ +#define ASI_DTLB_TAG_READ 0x5e /* Data-MMU TLB tag read reg */ +#define ASI_DMMU_DEMAP 0x5f /* Data-MMU TLB demap */ +#define ASI_IIU_INST_TRAP 0x60 /* (III) Instruction Breakpoint */ +#define ASI_INTR_ID 0x63 /* (CMT) Interrupt ID register */ +#define ASI_CORE_ID 0x63 /* (CMT) LP ID register */ +#define ASI_CESR_ID 0x63 /* (CMT) CESR ID register */ +#define ASI_IC_INSTR 0x66 /* Insn cache instrucion ram diag */ +#define ASI_IC_TAG 0x67 /* Insn cache tag/valid ram diag */ +#define ASI_IC_STAG 0x68 /* (III) Insn cache snoop tag ram */ +#define ASI_IC_PRE_DECODE 0x6e /* Insn cache pre-decode ram diag */ +#define ASI_IC_NEXT_FIELD 0x6f /* Insn cache next-field ram diag */ +#define ASI_BRPRED_ARRAY 0x6f /* (III) Branch Prediction RAM diag*/ +#define ASI_BLK_AIUP 0x70 /* Primary, user, block load/store */ +#define ASI_BLK_AIUS 0x71 /* Secondary, user, block ld/st */ +#define ASI_MCU_CTRL_REG 0x72 /* (III) Memory controller regs */ +#define ASI_EC_DATA 0x74 /* (III) E-cache data staging reg */ +#define ASI_EC_CTRL 0x75 /* (III) E-cache control reg */ +#define ASI_EC_W 0x76 /* E-cache diag write access */ +#define ASI_UDB_ERROR_W 0x77 /* External UDB error regs W */ +#define ASI_UDB_CONTROL_W 0x77 /* External UDB control regs W */ +#define ASI_INTR_W 0x77 /* IRQ vector dispatch write */ +#define ASI_INTR_DATAN_W 0x77 /* (III) Out irq vector data reg N */ +#define ASI_INTR_DISPATCH_W 0x77 /* (III) Interrupt vector dispatch */ +#define ASI_BLK_AIUPL 0x78 /* Primary, user, little, blk ld/st*/ +#define ASI_BLK_AIUSL 0x79 /* Secondary, user, little, blk ld/st*/ +#define ASI_EC_R 0x7e /* E-cache diag read access */ +#define ASI_UDBH_ERROR_R 0x7f /* External UDB error regs rd hi */ +#define ASI_UDBL_ERROR_R 0x7f /* External UDB error regs rd low */ +#define ASI_UDBH_CONTROL_R 0x7f /* External UDB control regs rd hi */ +#define ASI_UDBL_CONTROL_R 0x7f /* External UDB control regs rd low*/ +#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */ +#define ASI_INTR_DATAN_R 0x7f /* (III) In irq vector data reg N */ +#define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */ +#define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */ +#define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */ +#define ASI_PST16_S 0xc3 /* Secondary, 4 16-bit, partial */ +#define ASI_PST32_P 0xc4 /* Primary, 2 32-bit, partial */ +#define ASI_PST32_S 0xc5 /* Secondary, 2 32-bit, partial */ +#define ASI_PST8_PL 0xc8 /* Primary, 8 8-bit, partial, L */ +#define ASI_PST8_SL 0xc9 /* Secondary, 8 8-bit, partial, L */ +#define ASI_PST16_PL 0xca /* Primary, 4 16-bit, partial, L */ +#define ASI_PST16_SL 0xcb /* Secondary, 4 16-bit, partial, L */ +#define ASI_PST32_PL 0xcc /* Primary, 2 32-bit, partial, L */ +#define ASI_PST32_SL 0xcd /* Secondary, 2 32-bit, partial, L */ +#define ASI_FL8_P 0xd0 /* Primary, 1 8-bit, fpu ld/st */ +#define ASI_FL8_S 0xd1 /* Secondary, 1 8-bit, fpu ld/st */ +#define ASI_FL16_P 0xd2 /* Primary, 1 16-bit, fpu ld/st */ +#define ASI_FL16_S 0xd3 /* Secondary, 1 16-bit, fpu ld/st */ +#define ASI_FL8_PL 0xd8 /* Primary, 1 8-bit, fpu ld/st, L */ +#define ASI_FL8_SL 0xd9 /* Secondary, 1 8-bit, fpu ld/st, L*/ +#define ASI_FL16_PL 0xda /* Primary, 1 16-bit, fpu ld/st, L */ +#define ASI_FL16_SL 0xdb /* Secondary, 1 16-bit, fpu ld/st,L*/ +#define ASI_BLK_COMMIT_P 0xe0 /* Primary, blk store commit */ +#define ASI_BLK_COMMIT_S 0xe1 /* Secondary, blk store commit */ +#define ASI_BLK_INIT_QUAD_LDD_P 0xe2 /* (NG) init-store, twin load, + * primary, implicit + */ +#define ASI_BLK_P 0xf0 /* Primary, blk ld/st */ +#define ASI_BLK_S 0xf1 /* Secondary, blk ld/st */ +#define ASI_BLK_PL 0xf8 /* Primary, blk ld/st, little */ +#define ASI_BLK_SL 0xf9 /* Secondary, blk ld/st, little */ + +#endif /* _SPARC_ASI_H */ diff --git a/include/asm-sparc/asmmacro.h b/arch/sparc/include/asm/asmmacro.h similarity index 100% rename from include/asm-sparc/asmmacro.h rename to arch/sparc/include/asm/asmmacro.h diff --git a/arch/sparc/include/asm/atomic.h b/arch/sparc/include/asm/atomic.h new file mode 100644 index 0000000000000000000000000000000000000000..8ff83d8cc33fd7f4abd2f7ae2b018baa1006cdd7 --- /dev/null +++ b/arch/sparc/include/asm/atomic.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_ATOMIC_H +#define ___ASM_SPARC_ATOMIC_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/atomic.h b/arch/sparc/include/asm/atomic_32.h similarity index 100% rename from include/asm-sparc/atomic.h rename to arch/sparc/include/asm/atomic_32.h diff --git a/include/asm-sparc64/atomic.h b/arch/sparc/include/asm/atomic_64.h similarity index 100% rename from include/asm-sparc64/atomic.h rename to arch/sparc/include/asm/atomic_64.h diff --git a/arch/sparc/include/asm/auxio.h b/arch/sparc/include/asm/auxio.h new file mode 100644 index 0000000000000000000000000000000000000000..13dc67f03011eae7624c26957cf4f6a5085a4c34 --- /dev/null +++ b/arch/sparc/include/asm/auxio.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_AUXIO_H +#define ___ASM_SPARC_AUXIO_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/auxio_32.h b/arch/sparc/include/asm/auxio_32.h new file mode 100644 index 0000000000000000000000000000000000000000..e03e088be95f23eb2b01a1ab2915a22e47beb7dd --- /dev/null +++ b/arch/sparc/include/asm/auxio_32.h @@ -0,0 +1,89 @@ +/* + * auxio.h: Definitions and code for the Auxiliary I/O register. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ +#ifndef _SPARC_AUXIO_H +#define _SPARC_AUXIO_H + +#include +#include + +/* This register is an unsigned char in IO space. It does two things. + * First, it is used to control the front panel LED light on machines + * that have it (good for testing entry points to trap handlers and irq's) + * Secondly, it controls various floppy drive parameters. + */ +#define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ +#define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ +#define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ +#define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ +#define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ +#define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ +#define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ + +/* Set the following to one, then zero, after doing a pseudo DMA transfer. */ +#define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ + +/* Set the following to zero to eject the floppy. */ +#define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ +#define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ + +#ifndef __ASSEMBLY__ + +/* + * NOTE: these routines are implementation dependent-- + * understand the hardware you are querying! + */ +extern void set_auxio(unsigned char bits_on, unsigned char bits_off); +extern unsigned char get_auxio(void); /* .../asm/floppy.h */ + +/* + * The following routines are provided for driver-compatibility + * with sparc64 (primarily sunlance.c) + */ + +#define AUXIO_LTE_ON 1 +#define AUXIO_LTE_OFF 0 + +/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) + * + * on - AUXIO_LTE_ON or AUXIO_LTE_OFF + */ +#define auxio_set_lte(on) \ +do { \ + if(on) { \ + set_auxio(AUXIO_LINK_TEST, 0); \ + } else { \ + set_auxio(0, AUXIO_LINK_TEST); \ + } \ +} while (0) + +#define AUXIO_LED_ON 1 +#define AUXIO_LED_OFF 0 + +/* auxio_set_led - Set system front panel LED + * + * on - AUXIO_LED_ON or AUXIO_LED_OFF + */ +#define auxio_set_led(on) \ +do { \ + if(on) { \ + set_auxio(AUXIO_LED, 0); \ + } else { \ + set_auxio(0, AUXIO_LED); \ + } \ +} while (0) + +#endif /* !(__ASSEMBLY__) */ + + +/* AUXIO2 (Power Off Control) */ +extern __volatile__ unsigned char * auxio_power_register; + +#define AUXIO_POWER_DETECT_FAILURE 32 +#define AUXIO_POWER_CLEAR_FAILURE 2 +#define AUXIO_POWER_OFF 1 + + +#endif /* !(_SPARC_AUXIO_H) */ diff --git a/arch/sparc/include/asm/auxio_64.h b/arch/sparc/include/asm/auxio_64.h new file mode 100644 index 0000000000000000000000000000000000000000..f61cd1e3e3957c18ae12129b41e353060cac9f89 --- /dev/null +++ b/arch/sparc/include/asm/auxio_64.h @@ -0,0 +1,100 @@ +/* + * auxio.h: Definitions and code for the Auxiliary I/O registers. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * + * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) + */ +#ifndef _SPARC64_AUXIO_H +#define _SPARC64_AUXIO_H + +/* AUXIO implementations: + * sbus-based NCR89C105 "Slavio" + * LED/Floppy (AUX1) register + * Power (AUX2) register + * + * ebus-based auxio on PCIO + * LED Auxio Register + * Power Auxio Register + * + * Register definitions from NCR _NCR89C105 Chip Specification_ + * + * SLAVIO AUX1 @ 0x1900000 + * ------------------------------------------------- + * | (R) | (R) | D | (R) | E | M | T | L | + * ------------------------------------------------- + * (R) - bit 7:6,4 are reserved and should be masked in s/w + * D - Floppy Density Sense (1=high density) R/O + * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin + * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin + * T - Terminal Count: sends TC pulse to 82077 floppy controller + * L - System LED on front panel (0=off, 1=on) + */ +#define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ +#define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ +#define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ +#define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ +#define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ +#define AUXIO_AUX1_LED 0x01 /* System LED */ + +/* SLAVIO AUX2 @ 0x1910000 + * ------------------------------------------------- + * | (R) | (R) | D | (R) | (R) | (R) | C | F | + * ------------------------------------------------- + * (R) - bits 7:6,4:2 are reserved and should be masked in s/w + * D - Power Failure Detect (1=power fail) + * C - Clear Power Failure Detect Int (1=clear) + * F - Power Off (1=power off) + */ +#define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ +#define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ +#define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ +#define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ + +/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 + * + * PCIO LED Auxio @ 0x726000 + * ------------------------------------------------- + * | 31:1 Unused | LED | + * ------------------------------------------------- + * Bits 31:1 unused + * LED - System LED on front panel (0=off, 1=on) + */ +#define AUXIO_PCIO_LED 0x01 /* System LED */ + +/* PCIO Power Auxio @ 0x724000 + * ------------------------------------------------- + * | 31:2 Unused | CPO | SPO | + * ------------------------------------------------- + * Bits 31:2 unused + * CPO - Courtesy Power Off (1=off) + * SPO - System Power Off (1=off) + */ +#define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ +#define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ + +#ifndef __ASSEMBLY__ + +extern void __iomem *auxio_register; + +#define AUXIO_LTE_ON 1 +#define AUXIO_LTE_OFF 0 + +/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) + * + * on - AUXIO_LTE_ON or AUXIO_LTE_OFF + */ +extern void auxio_set_lte(int on); + +#define AUXIO_LED_ON 1 +#define AUXIO_LED_OFF 0 + +/* auxio_set_led - Set system front panel LED + * + * on - AUXIO_LED_ON or AUXIO_LED_OFF + */ +extern void auxio_set_led(int on); + +#endif /* ifndef __ASSEMBLY__ */ + +#endif /* !(_SPARC64_AUXIO_H) */ diff --git a/include/asm-sparc/auxvec.h b/arch/sparc/include/asm/auxvec.h similarity index 100% rename from include/asm-sparc/auxvec.h rename to arch/sparc/include/asm/auxvec.h diff --git a/include/asm-sparc64/backoff.h b/arch/sparc/include/asm/backoff.h similarity index 100% rename from include/asm-sparc64/backoff.h rename to arch/sparc/include/asm/backoff.h diff --git a/include/asm-sparc64/bbc.h b/arch/sparc/include/asm/bbc.h similarity index 100% rename from include/asm-sparc64/bbc.h rename to arch/sparc/include/asm/bbc.h diff --git a/include/asm-sparc/bitext.h b/arch/sparc/include/asm/bitext.h similarity index 100% rename from include/asm-sparc/bitext.h rename to arch/sparc/include/asm/bitext.h diff --git a/arch/sparc/include/asm/bitops.h b/arch/sparc/include/asm/bitops.h new file mode 100644 index 0000000000000000000000000000000000000000..b1edd94bd64f398d6363132519ab995cc549c452 --- /dev/null +++ b/arch/sparc/include/asm/bitops.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_BITOPS_H +#define ___ASM_SPARC_BITOPS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/bitops.h b/arch/sparc/include/asm/bitops_32.h similarity index 100% rename from include/asm-sparc/bitops.h rename to arch/sparc/include/asm/bitops_32.h diff --git a/include/asm-sparc64/bitops.h b/arch/sparc/include/asm/bitops_64.h similarity index 100% rename from include/asm-sparc64/bitops.h rename to arch/sparc/include/asm/bitops_64.h diff --git a/include/asm-sparc/bpp.h b/arch/sparc/include/asm/bpp.h similarity index 100% rename from include/asm-sparc/bpp.h rename to arch/sparc/include/asm/bpp.h diff --git a/include/asm-sparc/btfixup.h b/arch/sparc/include/asm/btfixup.h similarity index 99% rename from include/asm-sparc/btfixup.h rename to arch/sparc/include/asm/btfixup.h index 08277e6fb4cd51dcc5a5349c782d70ab4ba07361..797722cf69f2869943f4d347a4acb6ad9f72bb77 100644 --- a/include/asm-sparc/btfixup.h +++ b/arch/sparc/include/asm/btfixup.h @@ -1,5 +1,5 @@ /* - * asm-sparc/btfixup.h: Macros for boot time linking. + * asm/btfixup.h: Macros for boot time linking. * * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ diff --git a/include/asm-sparc/bug.h b/arch/sparc/include/asm/bug.h similarity index 100% rename from include/asm-sparc/bug.h rename to arch/sparc/include/asm/bug.h diff --git a/arch/sparc/include/asm/bugs.h b/arch/sparc/include/asm/bugs.h new file mode 100644 index 0000000000000000000000000000000000000000..e179bc12f64a478ff9d3eaba6bf337f1a27b1539 --- /dev/null +++ b/arch/sparc/include/asm/bugs.h @@ -0,0 +1,24 @@ +/* include/asm/bugs.h: Sparc probes for various bugs. + * + * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) + */ + +#ifdef CONFIG_SPARC32 +#include +#endif + +#ifdef CONFIG_SPARC64 +#include +#endif + +extern unsigned long loops_per_jiffy; + +static void __init check_bugs(void) +{ +#if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP) + cpu_data(0).udelay_val = loops_per_jiffy; +#endif +#ifdef CONFIG_SPARC64 + sstate_running(); +#endif +} diff --git a/include/asm-sparc/byteorder.h b/arch/sparc/include/asm/byteorder.h similarity index 100% rename from include/asm-sparc/byteorder.h rename to arch/sparc/include/asm/byteorder.h diff --git a/include/asm-sparc/cache.h b/arch/sparc/include/asm/cache.h similarity index 100% rename from include/asm-sparc/cache.h rename to arch/sparc/include/asm/cache.h diff --git a/arch/sparc/include/asm/cacheflush.h b/arch/sparc/include/asm/cacheflush.h new file mode 100644 index 0000000000000000000000000000000000000000..049168087b198fd37e5a144bc55e7682ef1ffc6f --- /dev/null +++ b/arch/sparc/include/asm/cacheflush.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_CACHEFLUSH_H +#define ___ASM_SPARC_CACHEFLUSH_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/cacheflush.h b/arch/sparc/include/asm/cacheflush_32.h similarity index 100% rename from include/asm-sparc/cacheflush.h rename to arch/sparc/include/asm/cacheflush_32.h diff --git a/arch/sparc/include/asm/cacheflush_64.h b/arch/sparc/include/asm/cacheflush_64.h new file mode 100644 index 0000000000000000000000000000000000000000..c43321729b3bb67142f89d29a5688103728ffade --- /dev/null +++ b/arch/sparc/include/asm/cacheflush_64.h @@ -0,0 +1,76 @@ +#ifndef _SPARC64_CACHEFLUSH_H +#define _SPARC64_CACHEFLUSH_H + +#include + +#ifndef __ASSEMBLY__ + +#include + +/* Cache flush operations. */ + +/* These are the same regardless of whether this is an SMP kernel or not. */ +#define flush_cache_mm(__mm) \ + do { if ((__mm) == current->mm) flushw_user(); } while(0) +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) +#define flush_cache_range(vma, start, end) \ + flush_cache_mm((vma)->vm_mm) +#define flush_cache_page(vma, page, pfn) \ + flush_cache_mm((vma)->vm_mm) + +/* + * On spitfire, the icache doesn't snoop local stores and we don't + * use block commit stores (which invalidate icache lines) during + * module load, so we need this. + */ +extern void flush_icache_range(unsigned long start, unsigned long end); +extern void __flush_icache_page(unsigned long); + +extern void __flush_dcache_page(void *addr, int flush_icache); +extern void flush_dcache_page_impl(struct page *page); +#ifdef CONFIG_SMP +extern void smp_flush_dcache_page_impl(struct page *page, int cpu); +extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page); +#else +#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page) +#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page) +#endif + +extern void __flush_dcache_range(unsigned long start, unsigned long end); +extern void flush_dcache_page(struct page *page); + +#define flush_icache_page(vma, pg) do { } while(0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) + +extern void flush_ptrace_access(struct vm_area_struct *, struct page *, + unsigned long uaddr, void *kaddr, + unsigned long len, int write); + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page)); \ + memcpy(dst, src, len); \ + flush_ptrace_access(vma, page, vaddr, src, len, 0); \ + } while (0) + +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page)); \ + memcpy(dst, src, len); \ + flush_ptrace_access(vma, page, vaddr, dst, len, 1); \ + } while (0) + +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) + +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) + +#ifdef CONFIG_DEBUG_PAGEALLOC +/* internal debugging function */ +void kernel_map_pages(struct page *page, int numpages, int enable); +#endif + +#endif /* !__ASSEMBLY__ */ + +#endif /* _SPARC64_CACHEFLUSH_H */ diff --git a/include/asm-sparc64/chafsr.h b/arch/sparc/include/asm/chafsr.h similarity index 100% rename from include/asm-sparc64/chafsr.h rename to arch/sparc/include/asm/chafsr.h diff --git a/arch/sparc/include/asm/checksum.h b/arch/sparc/include/asm/checksum.h new file mode 100644 index 0000000000000000000000000000000000000000..7ac0d7497bc593bbc6c87f69964073cbcd8d1d14 --- /dev/null +++ b/arch/sparc/include/asm/checksum.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_CHECKSUM_H +#define ___ASM_SPARC_CHECKSUM_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/checksum_32.h b/arch/sparc/include/asm/checksum_32.h new file mode 100644 index 0000000000000000000000000000000000000000..bdbda1453aa9f168339896d6880e3e2acd44182f --- /dev/null +++ b/arch/sparc/include/asm/checksum_32.h @@ -0,0 +1,241 @@ +#ifndef __SPARC_CHECKSUM_H +#define __SPARC_CHECKSUM_H + +/* checksum.h: IP/UDP/TCP checksum routines on the Sparc. + * + * Copyright(C) 1995 Linus Torvalds + * Copyright(C) 1995 Miguel de Icaza + * Copyright(C) 1996 David S. Miller + * Copyright(C) 1996 Eddie C. Dost + * Copyright(C) 1997 Jakub Jelinek + * + * derived from: + * Alpha checksum c-code + * ix86 inline assembly + * RFC1071 Computing the Internet Checksum + */ + +#include +#include + +/* computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +extern __wsum csum_partial(const void *buff, int len, __wsum sum); + +/* the same as csum_partial, but copies from fs:src while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ + +extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); + +static inline __wsum +csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) +{ + register unsigned int ret asm("o0") = (unsigned int)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + + __asm__ __volatile__ ( + "call __csum_partial_copy_sparc_generic\n\t" + " mov %6, %%g7\n" + : "=&r" (ret), "=&r" (d), "=&r" (l) + : "0" (ret), "1" (d), "2" (l), "r" (sum) + : "o2", "o3", "o4", "o5", "o7", + "g2", "g3", "g4", "g5", "g7", + "memory", "cc"); + return (__force __wsum)ret; +} + +static inline __wsum +csum_partial_copy_from_user(const void __user *src, void *dst, int len, + __wsum sum, int *err) + { + register unsigned long ret asm("o0") = (unsigned long)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + register __wsum s asm("g7") = sum; + + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,2\n\t" + ".previous\n" + "1:\n\t" + "call __csum_partial_copy_sparc_generic\n\t" + " st %8, [%%sp + 64]\n" + : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) + : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) + : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", + "cc", "memory"); + return (__force __wsum)ret; +} + +static inline __wsum +csum_partial_copy_to_user(const void *src, void __user *dst, int len, + __wsum sum, int *err) +{ + if (!access_ok (VERIFY_WRITE, dst, len)) { + *err = -EFAULT; + return sum; + } else { + register unsigned long ret asm("o0") = (unsigned long)src; + register char __user *d asm("o1") = dst; + register int l asm("g1") = len; + register __wsum s asm("g7") = sum; + + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,1\n\t" + ".previous\n" + "1:\n\t" + "call __csum_partial_copy_sparc_generic\n\t" + " st %8, [%%sp + 64]\n" + : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) + : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) + : "o2", "o3", "o4", "o5", "o7", + "g2", "g3", "g4", "g5", + "cc", "memory"); + return (__force __wsum)ret; + } +} + +#define HAVE_CSUM_COPY_USER +#define csum_and_copy_to_user csum_partial_copy_to_user + +/* ihl is always 5 or greater, almost always is 5, and iph is word aligned + * the majority of the time. + */ +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) +{ + __sum16 sum; + + /* Note: We must read %2 before we touch %0 for the first time, + * because GCC can legitimately use the same register for + * both operands. + */ + __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" + "ld\t[%1 + 0x00], %0\n\t" + "ld\t[%1 + 0x04], %%g2\n\t" + "ld\t[%1 + 0x08], %%g3\n\t" + "addcc\t%%g2, %0, %0\n\t" + "addxcc\t%%g3, %0, %0\n\t" + "ld\t[%1 + 0x0c], %%g2\n\t" + "ld\t[%1 + 0x10], %%g3\n\t" + "addxcc\t%%g2, %0, %0\n\t" + "addx\t%0, %%g0, %0\n" + "1:\taddcc\t%%g3, %0, %0\n\t" + "add\t%1, 4, %1\n\t" + "addxcc\t%0, %%g0, %0\n\t" + "subcc\t%%g4, 1, %%g4\n\t" + "be,a\t2f\n\t" + "sll\t%0, 16, %%g2\n\t" + "b\t1b\n\t" + "ld\t[%1 + 0x10], %%g3\n" + "2:\taddcc\t%0, %%g2, %%g2\n\t" + "srl\t%%g2, 16, %0\n\t" + "addx\t%0, %%g0, %0\n\t" + "xnor\t%%g0, %0, %0" + : "=r" (sum), "=&r" (iph) + : "r" (ihl), "1" (iph) + : "g2", "g3", "g4", "cc", "memory"); + return sum; +} + +/* Fold a partial checksum without adding pseudo headers. */ +static inline __sum16 csum_fold(__wsum sum) +{ + unsigned int tmp; + + __asm__ __volatile__("addcc\t%0, %1, %1\n\t" + "srl\t%1, 16, %1\n\t" + "addx\t%1, %%g0, %1\n\t" + "xnor\t%%g0, %1, %0" + : "=&r" (sum), "=r" (tmp) + : "0" (sum), "1" ((__force u32)sum<<16) + : "cc"); + return (__force __sum16)sum; +} + +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__("addcc\t%1, %0, %0\n\t" + "addxcc\t%2, %0, %0\n\t" + "addxcc\t%3, %0, %0\n\t" + "addx\t%0, %%g0, %0\n\t" + : "=r" (sum), "=r" (saddr) + : "r" (daddr), "r" (proto + len), "0" (sum), + "1" (saddr) + : "cc"); + return sum; +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +#define _HAVE_ARCH_IPV6_CSUM + +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__ ( + "addcc %3, %4, %%g4\n\t" + "addxcc %5, %%g4, %%g4\n\t" + "ld [%2 + 0x0c], %%g2\n\t" + "ld [%2 + 0x08], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%2 + 0x04], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%2 + 0x00], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%1 + 0x0c], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%1 + 0x08], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%1 + 0x04], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%1 + 0x00], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "addxcc %%g3, %%g4, %0\n\t" + "addx 0, %0, %0\n" + : "=&r" (sum) + : "r" (saddr), "r" (daddr), + "r"(htonl(len)), "r"(htonl(proto)), "r"(sum) + : "g2", "g3", "g4", "cc"); + + return csum_fold(sum); +} + +/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ + return csum_fold(csum_partial(buff, len, 0)); +} + +#endif /* !(__SPARC_CHECKSUM_H) */ diff --git a/arch/sparc/include/asm/checksum_64.h b/arch/sparc/include/asm/checksum_64.h new file mode 100644 index 0000000000000000000000000000000000000000..019b9615e43c16b81230508109b2484d6313ee62 --- /dev/null +++ b/arch/sparc/include/asm/checksum_64.h @@ -0,0 +1,167 @@ +#ifndef __SPARC64_CHECKSUM_H +#define __SPARC64_CHECKSUM_H + +/* checksum.h: IP/UDP/TCP checksum routines on the V9. + * + * Copyright(C) 1995 Linus Torvalds + * Copyright(C) 1995 Miguel de Icaza + * Copyright(C) 1996 David S. Miller + * Copyright(C) 1996 Eddie C. Dost + * Copyright(C) 1997 Jakub Jelinek + * + * derived from: + * Alpha checksum c-code + * ix86 inline assembly + * RFC1071 Computing the Internet Checksum + */ + +#include +#include + +/* computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +extern __wsum csum_partial(const void * buff, int len, __wsum sum); + +/* the same as csum_partial, but copies from user space while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); + +extern long __csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum); + +static inline __wsum +csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum, int *err) +{ + long ret = __csum_partial_copy_from_user(src, dst, len, sum); + if (ret < 0) + *err = -EFAULT; + return (__force __wsum) ret; +} + +/* + * Copy and checksum to user + */ +#define HAVE_CSUM_COPY_USER +extern long __csum_partial_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum); + +static inline __wsum +csum_and_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum, int *err) +{ + long ret = __csum_partial_copy_to_user(src, dst, len, sum); + if (ret < 0) + *err = -EFAULT; + return (__force __wsum) ret; +} + +/* ihl is always 5 or greater, almost always is 5, and iph is word aligned + * the majority of the time. + */ +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); + +/* Fold a partial checksum without adding pseudo headers. */ +static inline __sum16 csum_fold(__wsum sum) +{ + unsigned int tmp; + + __asm__ __volatile__( +" addcc %0, %1, %1\n" +" srl %1, 16, %1\n" +" addc %1, %%g0, %1\n" +" xnor %%g0, %1, %0\n" + : "=&r" (sum), "=r" (tmp) + : "0" (sum), "1" ((__force u32)sum<<16) + : "cc"); + return (__force __sum16)sum; +} + +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned int len, + unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__( +" addcc %1, %0, %0\n" +" addccc %2, %0, %0\n" +" addccc %3, %0, %0\n" +" addc %0, %%g0, %0\n" + : "=r" (sum), "=r" (saddr) + : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) + : "cc"); + return sum; +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +#define _HAVE_ARCH_IPV6_CSUM + +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__ ( +" addcc %3, %4, %%g7\n" +" addccc %5, %%g7, %%g7\n" +" lduw [%2 + 0x0c], %%g2\n" +" lduw [%2 + 0x08], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%2 + 0x04], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%2 + 0x00], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%1 + 0x0c], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%1 + 0x08], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%1 + 0x04], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%1 + 0x00], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" addccc %%g3, %%g7, %0\n" +" addc 0, %0, %0\n" + : "=&r" (sum) + : "r" (saddr), "r" (daddr), "r"(htonl(len)), + "r"(htonl(proto)), "r"(sum) + : "g2", "g3", "g7", "cc"); + + return csum_fold(sum); +} + +/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ + return csum_fold(csum_partial(buff, len, 0)); +} + +#endif /* !(__SPARC64_CHECKSUM_H) */ diff --git a/include/asm-sparc64/chmctrl.h b/arch/sparc/include/asm/chmctrl.h similarity index 100% rename from include/asm-sparc64/chmctrl.h rename to arch/sparc/include/asm/chmctrl.h diff --git a/include/asm-sparc/clock.h b/arch/sparc/include/asm/clock.h similarity index 100% rename from include/asm-sparc/clock.h rename to arch/sparc/include/asm/clock.h diff --git a/include/asm-sparc64/cmt.h b/arch/sparc/include/asm/cmt.h similarity index 100% rename from include/asm-sparc64/cmt.h rename to arch/sparc/include/asm/cmt.h diff --git a/include/asm-sparc64/compat.h b/arch/sparc/include/asm/compat.h similarity index 100% rename from include/asm-sparc64/compat.h rename to arch/sparc/include/asm/compat.h diff --git a/include/asm-sparc64/compat_signal.h b/arch/sparc/include/asm/compat_signal.h similarity index 100% rename from include/asm-sparc64/compat_signal.h rename to arch/sparc/include/asm/compat_signal.h diff --git a/include/asm-sparc/contregs.h b/arch/sparc/include/asm/contregs.h similarity index 100% rename from include/asm-sparc/contregs.h rename to arch/sparc/include/asm/contregs.h diff --git a/arch/sparc/include/asm/cpudata.h b/arch/sparc/include/asm/cpudata.h new file mode 100644 index 0000000000000000000000000000000000000000..b5976de7cacdb32528f576eef418ce4d35685e4e --- /dev/null +++ b/arch/sparc/include/asm/cpudata.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_CPUDATA_H +#define ___ASM_SPARC_CPUDATA_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/cpudata_32.h b/arch/sparc/include/asm/cpudata_32.h new file mode 100644 index 0000000000000000000000000000000000000000..31d48a0e32c7cd3cd3b4eda72325229496f00411 --- /dev/null +++ b/arch/sparc/include/asm/cpudata_32.h @@ -0,0 +1,27 @@ +/* cpudata.h: Per-cpu parameters. + * + * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) + * + * Based on include/asm/cpudata.h and Linux 2.4 smp.h + * both (C) David S. Miller. + */ + +#ifndef _SPARC_CPUDATA_H +#define _SPARC_CPUDATA_H + +#include + +typedef struct { + unsigned long udelay_val; + unsigned long clock_tick; + unsigned int multiplier; + unsigned int counter; + int prom_node; + int mid; + int next; +} cpuinfo_sparc; + +DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); +#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) + +#endif /* _SPARC_CPUDATA_H */ diff --git a/include/asm-sparc64/cpudata.h b/arch/sparc/include/asm/cpudata_64.h similarity index 100% rename from include/asm-sparc64/cpudata.h rename to arch/sparc/include/asm/cpudata_64.h diff --git a/include/asm-sparc/cputime.h b/arch/sparc/include/asm/cputime.h similarity index 100% rename from include/asm-sparc/cputime.h rename to arch/sparc/include/asm/cputime.h diff --git a/arch/sparc/include/asm/current.h b/arch/sparc/include/asm/current.h new file mode 100644 index 0000000000000000000000000000000000000000..10a0df55a574aeb8758e57c99073ccf8cf4e2d54 --- /dev/null +++ b/arch/sparc/include/asm/current.h @@ -0,0 +1,34 @@ +/* include/asm/current.h + * + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation + * Copyright (C) 2002 Pete Zaitcev (zaitcev@yahoo.com) + * Copyright (C) 2007 David S. Miller (davem@davemloft.net) + * + * Derived from "include/asm-s390/current.h" by + * Martin Schwidefsky (schwidefsky@de.ibm.com) + * Derived from "include/asm-i386/current.h" +*/ +#ifndef _SPARC_CURRENT_H +#define _SPARC_CURRENT_H + +#include + +#ifdef CONFIG_SPARC64 +register struct task_struct *current asm("g4"); +#endif + +#ifdef CONFIG_SPARC32 +/* We might want to consider using %g4 like sparc64 to shave a few cycles. + * + * Two stage process (inline + #define) for type-checking. + * We also obfuscate get_current() to check if anyone used that by mistake. + */ +struct task_struct; +static inline struct task_struct *__get_current(void) +{ + return current_thread_info()->task; +} +#define current __get_current() +#endif + +#endif /* !(_SPARC_CURRENT_H) */ diff --git a/include/asm-sparc/cypress.h b/arch/sparc/include/asm/cypress.h similarity index 100% rename from include/asm-sparc/cypress.h rename to arch/sparc/include/asm/cypress.h diff --git a/include/asm-sparc64/dcr.h b/arch/sparc/include/asm/dcr.h similarity index 100% rename from include/asm-sparc64/dcr.h rename to arch/sparc/include/asm/dcr.h diff --git a/include/asm-sparc64/dcu.h b/arch/sparc/include/asm/dcu.h similarity index 100% rename from include/asm-sparc64/dcu.h rename to arch/sparc/include/asm/dcu.h diff --git a/arch/sparc/include/asm/delay.h b/arch/sparc/include/asm/delay.h new file mode 100644 index 0000000000000000000000000000000000000000..467caa2a97a04199ec379aa1540a29c7fd62a49d --- /dev/null +++ b/arch/sparc/include/asm/delay.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_DELAY_H +#define ___ASM_SPARC_DELAY_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/delay.h b/arch/sparc/include/asm/delay_32.h similarity index 100% rename from include/asm-sparc/delay.h rename to arch/sparc/include/asm/delay_32.h diff --git a/include/asm-sparc64/delay.h b/arch/sparc/include/asm/delay_64.h similarity index 100% rename from include/asm-sparc64/delay.h rename to arch/sparc/include/asm/delay_64.h diff --git a/include/asm-sparc/device.h b/arch/sparc/include/asm/device.h similarity index 100% rename from include/asm-sparc/device.h rename to arch/sparc/include/asm/device.h diff --git a/include/asm-sparc64/display7seg.h b/arch/sparc/include/asm/display7seg.h similarity index 94% rename from include/asm-sparc64/display7seg.h rename to arch/sparc/include/asm/display7seg.h index c066a8964eab1e8c6b2b012a22300cc9792f1f4a..86d4a901df2414d005efb608f150d5a2d03123ad 100644 --- a/include/asm-sparc64/display7seg.h +++ b/arch/sparc/include/asm/display7seg.h @@ -21,10 +21,10 @@ * * POINT - Toggle decimal point (0=absent 1=present) * ALARM - Toggle alarm LED (0=green 1=red) - * FLIP - Toggle inverted mode (0=normal 1=flipped) + * FLIP - Toggle inverted mode (0=normal 1=flipped) * bits 0-4 - Character displayed (see definitions below) * - * Display segments are defined as follows, + * Display segments are defined as follows, * subject to D7S_FLIP register state: * * a diff --git a/include/asm-sparc/div64.h b/arch/sparc/include/asm/div64.h similarity index 100% rename from include/asm-sparc/div64.h rename to arch/sparc/include/asm/div64.h diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h new file mode 100644 index 0000000000000000000000000000000000000000..0f4150e26619c3a2063f92abe4ff95ca8dece6cc --- /dev/null +++ b/arch/sparc/include/asm/dma-mapping.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_DMA_MAPPING_H +#define ___ASM_SPARC_DMA_MAPPING_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/dma-mapping.h b/arch/sparc/include/asm/dma-mapping_32.h similarity index 100% rename from include/asm-sparc/dma-mapping.h rename to arch/sparc/include/asm/dma-mapping_32.h diff --git a/arch/sparc/include/asm/dma-mapping_64.h b/arch/sparc/include/asm/dma-mapping_64.h new file mode 100644 index 0000000000000000000000000000000000000000..bfa64f9702d548806c9bd2fa0a117195d6c25ef0 --- /dev/null +++ b/arch/sparc/include/asm/dma-mapping_64.h @@ -0,0 +1,154 @@ +#ifndef _ASM_SPARC64_DMA_MAPPING_H +#define _ASM_SPARC64_DMA_MAPPING_H + +#include +#include + +#define DMA_ERROR_CODE (~(dma_addr_t)0x0) + +struct dma_ops { + void *(*alloc_coherent)(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag); + void (*free_coherent)(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle); + dma_addr_t (*map_single)(struct device *dev, void *cpu_addr, + size_t size, + enum dma_data_direction direction); + void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction); + int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction direction); + void (*unmap_sg)(struct device *dev, struct scatterlist *sg, + int nhwentries, + enum dma_data_direction direction); + void (*sync_single_for_cpu)(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction); + void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, + int nelems, + enum dma_data_direction direction); +}; +extern const struct dma_ops *dma_ops; + +extern int dma_supported(struct device *dev, u64 mask); +extern int dma_set_mask(struct device *dev, u64 dma_mask); + +static inline void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + return dma_ops->alloc_coherent(dev, size, dma_handle, flag); +} + +static inline void dma_free_coherent(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle) +{ + dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); +} + +static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, + size_t size, + enum dma_data_direction direction) +{ + return dma_ops->map_single(dev, cpu_addr, size, direction); +} + +static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction) +{ + dma_ops->unmap_single(dev, dma_addr, size, direction); +} + +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction direction) +{ + return dma_ops->map_single(dev, page_address(page) + offset, + size, direction); +} + +static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, + enum dma_data_direction direction) +{ + dma_ops->unmap_single(dev, dma_address, size, direction); +} + +static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction) +{ + return dma_ops->map_sg(dev, sg, nents, direction); +} + +static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction) +{ + dma_ops->unmap_sg(dev, sg, nents, direction); +} + +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction) +{ + dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction); +} + +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, + size_t size, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void dma_sync_single_range_for_cpu(struct device *dev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); +} + +static inline void dma_sync_single_range_for_device(struct device *dev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + + +static inline void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction direction) +{ + dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction); +} + +static inline void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) +{ + return (dma_addr == DMA_ERROR_CODE); +} + +static inline int dma_get_cache_alignment(void) +{ + /* no easy way to get cache size on all processors, so return + * the maximum possible, to be safe */ + return (1 << INTERNODE_CACHE_SHIFT); +} + +#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) +#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) +#define dma_is_consistent(d, h) (1) + +#endif /* _ASM_SPARC64_DMA_MAPPING_H */ diff --git a/arch/sparc/include/asm/dma.h b/arch/sparc/include/asm/dma.h new file mode 100644 index 0000000000000000000000000000000000000000..aa1d90ac04c58b2db3c907ab8e5555aa7ae90b75 --- /dev/null +++ b/arch/sparc/include/asm/dma.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_DMA_H +#define ___ASM_SPARC_DMA_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/dma_32.h b/arch/sparc/include/asm/dma_32.h new file mode 100644 index 0000000000000000000000000000000000000000..cf7189c0079b2c3b6b46c02b65e53d70caddd506 --- /dev/null +++ b/arch/sparc/include/asm/dma_32.h @@ -0,0 +1,288 @@ +/* include/asm/dma.h + * + * Copyright 1995 (C) David S. Miller (davem@davemloft.net) + */ + +#ifndef _ASM_SPARC_DMA_H +#define _ASM_SPARC_DMA_H + +#include +#include + +#include /* for invalidate's, etc. */ +#include +#include +#include +#include +#include +#include + +struct page; +extern spinlock_t dma_spin_lock; + +static inline unsigned long claim_dma_lock(void) +{ + unsigned long flags; + spin_lock_irqsave(&dma_spin_lock, flags); + return flags; +} + +static inline void release_dma_lock(unsigned long flags) +{ + spin_unlock_irqrestore(&dma_spin_lock, flags); +} + +/* These are irrelevant for Sparc DMA, but we leave it in so that + * things can compile. + */ +#define MAX_DMA_CHANNELS 8 +#define MAX_DMA_ADDRESS (~0UL) +#define DMA_MODE_READ 1 +#define DMA_MODE_WRITE 2 + +/* Useful constants */ +#define SIZE_16MB (16*1024*1024) +#define SIZE_64K (64*1024) + +/* SBUS DMA controller reg offsets */ +#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ +#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ +#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ +#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ + +/* DVMA chip revisions */ +enum dvma_rev { + dvmarev0, + dvmaesc1, + dvmarev1, + dvmarev2, + dvmarev3, + dvmarevplus, + dvmahme +}; + +#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) + +/* Linux DMA information structure, filled during probe. */ +struct sbus_dma { + struct sbus_dma *next; + struct sbus_dev *sdev; + void __iomem *regs; + + /* Status, misc info */ + int node; /* Prom node for this DMA device */ + int running; /* Are we doing DMA now? */ + int allocated; /* Are we "owned" by anyone yet? */ + + /* Transfer information. */ + unsigned long addr; /* Start address of current transfer */ + int nbytes; /* Size of current transfer */ + int realbytes; /* For splitting up large transfers, etc. */ + + /* DMA revision */ + enum dvma_rev revision; +}; + +extern struct sbus_dma *dma_chain; + +/* Broken hardware... */ +#ifdef CONFIG_SUN4 +/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? + * Or is rev0 present only on sun4 boxes? -jj */ +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) +#else +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) +#endif +#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) + +/* Main routines in dma.c */ +extern void dvma_init(struct sbus_bus *); + +/* Fields in the cond_reg register */ +/* First, the version identification bits */ +#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ +#define DMA_VERS0 0x00000000 /* Sunray DMA version */ +#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ +#define DMA_VERS1 0x80000000 /* DMA rev 1 */ +#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ +#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ +#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ + +#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ +#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ +#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ +#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ +#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ +#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ +#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ +#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ +#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ +#define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ +#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ +#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ +#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ +#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ +#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ +#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ +#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ +#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ +#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ +#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ +#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ +#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ +#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ +#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ +#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ +#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ +#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ +#define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ +#define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ +#define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ +#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ +#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ +#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ +#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ +#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ +#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ +#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ +#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ +#define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ +#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ +#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ +#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ +#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ + +/* Values describing the burst-size property from the PROM */ +#define DMA_BURST1 0x01 +#define DMA_BURST2 0x02 +#define DMA_BURST4 0x04 +#define DMA_BURST8 0x08 +#define DMA_BURST16 0x10 +#define DMA_BURST32 0x20 +#define DMA_BURST64 0x40 +#define DMA_BURSTBITS 0x7f + +/* Determine highest possible final transfer address given a base */ +#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) + +/* Yes, I hack a lot of elisp in my spare time... */ +#define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) +#define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) +#define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) +#define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) +#define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) +#define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) +#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) +#define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) +#define DMA_BEGINDMA_W(regs) \ + ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) +#define DMA_BEGINDMA_R(regs) \ + ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) + +/* For certain DMA chips, we need to disable ints upon irq entry + * and turn them back on when we are done. So in any ESP interrupt + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT + * when leaving the handler. You have been warned... + */ +#define DMA_IRQ_ENTRY(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ + } while (0) + +#define DMA_IRQ_EXIT(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ + } while(0) + +#if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ +/* Pause until counter runs out or BIT isn't set in the DMA condition + * register. + */ +static inline void sparc_dma_pause(struct sparc_dma_registers *regs, + unsigned long bit) +{ + int ctr = 50000; /* Let's find some bugs ;) */ + + /* Busy wait until the bit is not set any more */ + while((regs->cond_reg&bit) && (ctr>0)) { + ctr--; + __delay(5); + } + + /* Check for bogus outcome. */ + if(!ctr) + panic("DMA timeout"); +} + +/* Reset the friggin' thing... */ +#define DMA_RESET(dma) do { \ + struct sparc_dma_registers *regs = dma->regs; \ + /* Let the current FIFO drain itself */ \ + sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ + /* Reset the logic */ \ + regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ + __delay(400); /* let the bits set ;) */ \ + regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ + sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ + /* Enable FAST transfers if available */ \ + if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ + dma->running = 0; \ +} while(0) +#endif + +#define for_each_dvma(dma) \ + for((dma) = dma_chain; (dma); (dma) = (dma)->next) + +extern int get_dma_list(char *); +extern int request_dma(unsigned int, __const__ char *); +extern void free_dma(unsigned int); + +/* From PCI */ + +#ifdef CONFIG_PCI +extern int isa_dma_bridge_buggy; +#else +#define isa_dma_bridge_buggy (0) +#endif + +/* Routines for data transfer buffers. */ +BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) +BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) + +#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) +#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) + +/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ +BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) + +#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) +#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) +#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) +#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) + +/* + * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. + * + * The mmu_map_dma_area establishes two mappings in one go. + * These mappings point to pages normally mapped at 'va' (linear address). + * First mapping is for CPU visible address at 'a', uncached. + * This is an alias, but it works because it is an uncached mapping. + * Second mapping is for device visible address, or "bus" address. + * The bus address is returned at '*pba'. + * + * These functions seem distinct, but are hard to split. On sun4c, + * at least for now, 'a' is equal to bus address, and retured in *pba. + * On sun4m, page attributes depend on the CPU type, so we have to + * know if we are mapping RAM or I/O, so it has to be an additional argument + * to a separate mapping function for CPU visible mappings. + */ +BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) +BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) +BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) + +#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) +#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) +#define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) + +#endif /* !(_ASM_SPARC_DMA_H) */ diff --git a/arch/sparc/include/asm/dma_64.h b/arch/sparc/include/asm/dma_64.h new file mode 100644 index 0000000000000000000000000000000000000000..46a8aecffc02c182b63cf794e83746ac64499674 --- /dev/null +++ b/arch/sparc/include/asm/dma_64.h @@ -0,0 +1,205 @@ +/* + * include/asm/dma.h + * + * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _ASM_SPARC64_DMA_H +#define _ASM_SPARC64_DMA_H + +#include +#include +#include + +#include +#include +#include + +/* These are irrelevant for Sparc DMA, but we leave it in so that + * things can compile. + */ +#define MAX_DMA_CHANNELS 8 +#define DMA_MODE_READ 1 +#define DMA_MODE_WRITE 2 +#define MAX_DMA_ADDRESS (~0UL) + +/* Useful constants */ +#define SIZE_16MB (16*1024*1024) +#define SIZE_64K (64*1024) + +/* SBUS DMA controller reg offsets */ +#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ +#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ +#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ +#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ + +/* DVMA chip revisions */ +enum dvma_rev { + dvmarev0, + dvmaesc1, + dvmarev1, + dvmarev2, + dvmarev3, + dvmarevplus, + dvmahme +}; + +#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) + +/* Linux DMA information structure, filled during probe. */ +struct sbus_dma { + struct sbus_dma *next; + struct sbus_dev *sdev; + void __iomem *regs; + + /* Status, misc info */ + int node; /* Prom node for this DMA device */ + int running; /* Are we doing DMA now? */ + int allocated; /* Are we "owned" by anyone yet? */ + + /* Transfer information. */ + u32 addr; /* Start address of current transfer */ + int nbytes; /* Size of current transfer */ + int realbytes; /* For splitting up large transfers, etc. */ + + /* DMA revision */ + enum dvma_rev revision; +}; + +extern struct sbus_dma *dma_chain; + +/* Broken hardware... */ +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) +#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) + +/* Main routines in dma.c */ +extern void dvma_init(struct sbus_bus *); + +/* Fields in the cond_reg register */ +/* First, the version identification bits */ +#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ +#define DMA_VERS0 0x00000000 /* Sunray DMA version */ +#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ +#define DMA_VERS1 0x80000000 /* DMA rev 1 */ +#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ +#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ +#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ + +#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ +#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ +#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ +#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ +#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ +#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ +#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ +#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ +#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ +#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ +#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ +#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ +#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ +#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ +#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ +#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ +#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ +#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ +#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ +#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ +#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ +#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ +#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ +#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ +#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ +#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ +#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ +#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ +#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ +#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ +#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ +#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ +#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ +#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ +#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ +#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ +#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ +#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ +#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ +#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ +#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ + +/* Values describing the burst-size property from the PROM */ +#define DMA_BURST1 0x01 +#define DMA_BURST2 0x02 +#define DMA_BURST4 0x04 +#define DMA_BURST8 0x08 +#define DMA_BURST16 0x10 +#define DMA_BURST32 0x20 +#define DMA_BURST64 0x40 +#define DMA_BURSTBITS 0x7f + +/* Determine highest possible final transfer address given a base */ +#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) + +/* Yes, I hack a lot of elisp in my spare time... */ +#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) +#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) +#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) +#define DMA_OFF(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp &= ~DMA_ENABLE; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_INTSOFF(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp &= ~DMA_INT_ENAB; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_INTSON(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= DMA_INT_ENAB; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_PUNTFIFO(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= DMA_FIFO_INV; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_SETSTART(__regs, __addr) \ + sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); +#define DMA_BEGINDMA_W(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_BEGINDMA_R(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ + tmp &= ~DMA_ST_WRITE; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) + +/* For certain DMA chips, we need to disable ints upon irq entry + * and turn them back on when we are done. So in any ESP interrupt + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT + * when leaving the handler. You have been warned... + */ +#define DMA_IRQ_ENTRY(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ + } while (0) + +#define DMA_IRQ_EXIT(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ + } while(0) + +#define for_each_dvma(dma) \ + for((dma) = dma_chain; (dma); (dma) = (dma)->next) + +/* From PCI */ + +#ifdef CONFIG_PCI +extern int isa_dma_bridge_buggy; +#else +#define isa_dma_bridge_buggy (0) +#endif + +#endif /* !(_ASM_SPARC64_DMA_H) */ diff --git a/arch/sparc/include/asm/ebus.h b/arch/sparc/include/asm/ebus.h new file mode 100644 index 0000000000000000000000000000000000000000..83a6d16c22e68bd5c7f463fb13edc5a7e6af0949 --- /dev/null +++ b/arch/sparc/include/asm/ebus.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_EBUS_H +#define ___ASM_SPARC_EBUS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/ebus_32.h b/arch/sparc/include/asm/ebus_32.h new file mode 100644 index 0000000000000000000000000000000000000000..29cb7dfc6b799385fc577048d6f7dd686eff7b92 --- /dev/null +++ b/arch/sparc/include/asm/ebus_32.h @@ -0,0 +1,99 @@ +/* + * ebus.h: PCI to Ebus pseudo driver software state. + * + * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) + * + * Adopted for sparc by V. Roganov and G. Raiko. + */ + +#ifndef __SPARC_EBUS_H +#define __SPARC_EBUS_H + +#ifndef _LINUX_IOPORT_H +#include +#endif +#include +#include +#include + +struct linux_ebus_child { + struct linux_ebus_child *next; + struct linux_ebus_device *parent; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; + +struct linux_ebus_device { + struct of_device ofdev; + struct linux_ebus_device *next; + struct linux_ebus_child *children; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; +#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) + +struct linux_ebus { + struct of_device ofdev; + struct linux_ebus *next; + struct linux_ebus_device *devices; + struct linux_pbm_info *parent; + struct pci_dev *self; + struct device_node *prom_node; +}; +#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) + +struct linux_ebus_dma { + unsigned int dcsr; + unsigned int dacr; + unsigned int dbcr; +}; + +#define EBUS_DCSR_INT_PEND 0x00000001 +#define EBUS_DCSR_ERR_PEND 0x00000002 +#define EBUS_DCSR_DRAIN 0x00000004 +#define EBUS_DCSR_INT_EN 0x00000010 +#define EBUS_DCSR_RESET 0x00000080 +#define EBUS_DCSR_WRITE 0x00000100 +#define EBUS_DCSR_EN_DMA 0x00000200 +#define EBUS_DCSR_CYC_PEND 0x00000400 +#define EBUS_DCSR_DIAG_RD_DONE 0x00000800 +#define EBUS_DCSR_DIAG_WR_DONE 0x00001000 +#define EBUS_DCSR_EN_CNT 0x00002000 +#define EBUS_DCSR_TC 0x00004000 +#define EBUS_DCSR_DIS_CSR_DRN 0x00010000 +#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000 +#define EBUS_DCSR_BURST_SZ_1 0x00080000 +#define EBUS_DCSR_BURST_SZ_4 0x00000000 +#define EBUS_DCSR_BURST_SZ_8 0x00040000 +#define EBUS_DCSR_BURST_SZ_16 0x000c0000 +#define EBUS_DCSR_DIAG_EN 0x00100000 +#define EBUS_DCSR_DIS_ERR_PEND 0x00400000 +#define EBUS_DCSR_TCI_DIS 0x00800000 +#define EBUS_DCSR_EN_NEXT 0x01000000 +#define EBUS_DCSR_DMA_ON 0x02000000 +#define EBUS_DCSR_A_LOADED 0x04000000 +#define EBUS_DCSR_NA_LOADED 0x08000000 +#define EBUS_DCSR_DEV_ID_MASK 0xf0000000 + +extern struct linux_ebus *ebus_chain; + +extern void ebus_init(void); + +#define for_each_ebus(bus) \ + for((bus) = ebus_chain; (bus); (bus) = (bus)->next) + +#define for_each_ebusdev(dev, bus) \ + for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) + +#define for_each_edevchild(dev, child) \ + for((child) = (dev)->children; (child); (child) = (child)->next) + +#endif /* !(__SPARC_EBUS_H) */ diff --git a/include/asm-sparc64/ebus.h b/arch/sparc/include/asm/ebus_64.h similarity index 100% rename from include/asm-sparc64/ebus.h rename to arch/sparc/include/asm/ebus_64.h diff --git a/include/asm-sparc/ecc.h b/arch/sparc/include/asm/ecc.h similarity index 100% rename from include/asm-sparc/ecc.h rename to arch/sparc/include/asm/ecc.h diff --git a/include/asm-sparc/eeprom.h b/arch/sparc/include/asm/eeprom.h similarity index 100% rename from include/asm-sparc/eeprom.h rename to arch/sparc/include/asm/eeprom.h diff --git a/arch/sparc/include/asm/elf.h b/arch/sparc/include/asm/elf.h new file mode 100644 index 0000000000000000000000000000000000000000..0a2816c50b07faa54c98a1b75798d4d192ddc2da --- /dev/null +++ b/arch/sparc/include/asm/elf.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_ELF_H +#define ___ASM_SPARC_ELF_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/elf.h b/arch/sparc/include/asm/elf_32.h similarity index 100% rename from include/asm-sparc/elf.h rename to arch/sparc/include/asm/elf_32.h diff --git a/include/asm-sparc64/elf.h b/arch/sparc/include/asm/elf_64.h similarity index 100% rename from include/asm-sparc64/elf.h rename to arch/sparc/include/asm/elf_64.h diff --git a/include/asm-sparc/emergency-restart.h b/arch/sparc/include/asm/emergency-restart.h similarity index 100% rename from include/asm-sparc/emergency-restart.h rename to arch/sparc/include/asm/emergency-restart.h diff --git a/include/asm-sparc64/envctrl.h b/arch/sparc/include/asm/envctrl.h similarity index 98% rename from include/asm-sparc64/envctrl.h rename to arch/sparc/include/asm/envctrl.h index a5668a082b143bc354cb2479524a10130a70f5a5..624fa7e2da8e11a73c31b8bee45f60847c07a1c6 100644 --- a/include/asm-sparc64/envctrl.h +++ b/arch/sparc/include/asm/envctrl.h @@ -5,8 +5,8 @@ * * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) * Copyright (C) 2000 Vinh Truong (vinh.truong@eng.sun.com) - * VT - Add all ioctl commands and environment status definitions - * VT - Add application note + * VT - Add all ioctl commands and environment status definitions + * VT - Add application note */ #ifndef _SPARC64_ENVCTRL_H #define _SPARC64_ENVCTRL_H 1 @@ -87,7 +87,7 @@ * printf("fan 0 failed or not connected\n"); * } * ...... - */ + */ #define ENVCTRL_ALL_FANS_GOOD 0x00 #define ENVCTRL_FAN0_FAILURE_MASK 0x01 diff --git a/include/asm-sparc/errno.h b/arch/sparc/include/asm/errno.h similarity index 100% rename from include/asm-sparc/errno.h rename to arch/sparc/include/asm/errno.h diff --git a/include/asm-sparc64/estate.h b/arch/sparc/include/asm/estate.h similarity index 100% rename from include/asm-sparc64/estate.h rename to arch/sparc/include/asm/estate.h diff --git a/include/asm-sparc/fb.h b/arch/sparc/include/asm/fb.h similarity index 100% rename from include/asm-sparc/fb.h rename to arch/sparc/include/asm/fb.h diff --git a/include/asm-sparc64/fbio.h b/arch/sparc/include/asm/fbio.h similarity index 100% rename from include/asm-sparc64/fbio.h rename to arch/sparc/include/asm/fbio.h diff --git a/arch/sparc/include/asm/fcntl.h b/arch/sparc/include/asm/fcntl.h new file mode 100644 index 0000000000000000000000000000000000000000..d4d9c9d852c3d6324621689995fe637c51cdaa94 --- /dev/null +++ b/arch/sparc/include/asm/fcntl.h @@ -0,0 +1,40 @@ +#ifndef _SPARC_FCNTL_H +#define _SPARC_FCNTL_H + +/* open/fcntl - O_SYNC is only implemented on blocks devices and on files + located on an ext2 file system */ +#define O_APPEND 0x0008 +#define FASYNC 0x0040 /* fcntl, for BSD compatibility */ +#define O_CREAT 0x0200 /* not fcntl */ +#define O_TRUNC 0x0400 /* not fcntl */ +#define O_EXCL 0x0800 /* not fcntl */ +#define O_SYNC 0x2000 +#define O_NONBLOCK 0x4000 +#if defined(__sparc__) && defined(__arch64__) +#define O_NDELAY 0x0004 +#else +#define O_NDELAY (0x0004 | O_NONBLOCK) +#endif +#define O_NOCTTY 0x8000 /* not fcntl */ +#define O_LARGEFILE 0x40000 +#define O_DIRECT 0x100000 /* direct disk access hint */ +#define O_NOATIME 0x200000 +#define O_CLOEXEC 0x400000 + +#define F_GETOWN 5 /* for sockets. */ +#define F_SETOWN 6 /* for sockets. */ +#define F_GETLK 7 +#define F_SETLK 8 +#define F_SETLKW 9 + +/* for posix fcntl() and lockf() */ +#define F_RDLCK 1 +#define F_WRLCK 2 +#define F_UNLCK 3 + +#define __ARCH_FLOCK_PAD short __unused; +#define __ARCH_FLOCK64_PAD short __unused; + +#include + +#endif diff --git a/include/asm-sparc64/fhc.h b/arch/sparc/include/asm/fhc.h similarity index 95% rename from include/asm-sparc64/fhc.h rename to arch/sparc/include/asm/fhc.h index ddffcdfbc984afa7a8e75c17756cf163af13e03a..788cbc46a1164a71d353d741cc854066d103769f 100644 --- a/include/asm-sparc64/fhc.h +++ b/arch/sparc/include/asm/fhc.h @@ -118,14 +118,4 @@ struct linux_fhc { int num_fhc_ranges; }; -extern struct linux_central *central_bus; - -extern void apply_central_ranges(struct linux_central *central, - struct linux_prom_registers *regs, - int nregs); - -extern void apply_fhc_ranges(struct linux_fhc *fhc, - struct linux_prom_registers *regs, - int nregs); - #endif /* !(_SPARC64_FHC_H) */ diff --git a/include/asm-sparc/fixmap.h b/arch/sparc/include/asm/fixmap.h similarity index 100% rename from include/asm-sparc/fixmap.h rename to arch/sparc/include/asm/fixmap.h diff --git a/arch/sparc/include/asm/floppy.h b/arch/sparc/include/asm/floppy.h new file mode 100644 index 0000000000000000000000000000000000000000..faebd335b600647493ff6306f817220b23167af6 --- /dev/null +++ b/arch/sparc/include/asm/floppy.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_FLOPPY_H +#define ___ASM_SPARC_FLOPPY_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/floppy_32.h b/arch/sparc/include/asm/floppy_32.h new file mode 100644 index 0000000000000000000000000000000000000000..ae3f00bf22ff91d990ab4c47aaa200729c570181 --- /dev/null +++ b/arch/sparc/include/asm/floppy_32.h @@ -0,0 +1,388 @@ +/* asm/floppy.h: Sparc specific parts of the Floppy driver. + * + * Copyright (C) 1995 David S. Miller (davem@davemloft.net) + */ + +#ifndef __ASM_SPARC_FLOPPY_H +#define __ASM_SPARC_FLOPPY_H + +#include +#include +#include +#include +#include +#include +#include +#include + +/* We don't need no stinkin' I/O port allocation crap. */ +#undef release_region +#undef request_region +#define release_region(X, Y) do { } while(0) +#define request_region(X, Y, Z) (1) + +/* References: + * 1) Netbsd Sun floppy driver. + * 2) NCR 82077 controller manual + * 3) Intel 82077 controller manual + */ +struct sun_flpy_controller { + volatile unsigned char status_82072; /* Main Status reg. */ +#define dcr_82072 status_82072 /* Digital Control reg. */ +#define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ + + volatile unsigned char data_82072; /* Data fifo. */ +#define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ + + volatile unsigned char dor_82077; /* Digital Output reg. */ + volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ + + volatile unsigned char status_82077; /* Main Status Register. */ +#define drs_82077 status_82077 /* Digital Rate Select reg. */ + + volatile unsigned char data_82077; /* Data fifo. */ + volatile unsigned char ___unused; + volatile unsigned char dir_82077; /* Digital Input reg. */ +#define dcr_82077 dir_82077 /* Config Control reg. */ +}; + +/* You'll only ever find one controller on a SparcStation anyways. */ +static struct sun_flpy_controller *sun_fdc = NULL; +extern volatile unsigned char *fdc_status; + +struct sun_floppy_ops { + unsigned char (*fd_inb)(int port); + void (*fd_outb)(unsigned char value, int port); +}; + +static struct sun_floppy_ops sun_fdops; + +#define fd_inb(port) sun_fdops.fd_inb(port) +#define fd_outb(value,port) sun_fdops.fd_outb(value,port) +#define fd_enable_dma() sun_fd_enable_dma() +#define fd_disable_dma() sun_fd_disable_dma() +#define fd_request_dma() (0) /* nothing... */ +#define fd_free_dma() /* nothing... */ +#define fd_clear_dma_ff() /* nothing... */ +#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) +#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) +#define fd_set_dma_count(count) sun_fd_set_dma_count(count) +#define fd_enable_irq() /* nothing... */ +#define fd_disable_irq() /* nothing... */ +#define fd_cacheflush(addr, size) /* nothing... */ +#define fd_request_irq() sun_fd_request_irq() +#define fd_free_irq() /* nothing... */ +#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ +#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) +#define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) +#endif + +/* XXX This isn't really correct. XXX */ +#define get_dma_residue(x) (0) + +#define FLOPPY0_TYPE 4 +#define FLOPPY1_TYPE 0 + +/* Super paranoid... */ +#undef HAVE_DISABLE_HLT + +/* Here is where we catch the floppy driver trying to initialize, + * therefore this is where we call the PROM device tree probing + * routine etc. on the Sparc. + */ +#define FDC1 sun_floppy_init() + +#define N_FDC 1 +#define N_DRIVE 8 + +/* No 64k boundary crossing problems on the Sparc. */ +#define CROSS_64KB(a,s) (0) + +/* Routines unique to each controller type on a Sun. */ +static void sun_set_dor(unsigned char value, int fdc_82077) +{ + if (sparc_cpu_model == sun4c) { + unsigned int bits = 0; + if (value & 0x10) + bits |= AUXIO_FLPY_DSEL; + if ((value & 0x80) == 0) + bits |= AUXIO_FLPY_EJCT; + set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); + } + if (fdc_82077) { + sun_fdc->dor_82077 = value; + } +} + +static unsigned char sun_read_dir(void) +{ + if (sparc_cpu_model == sun4c) + return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; + else + return sun_fdc->dir_82077; +} + +static unsigned char sun_82072_fd_inb(int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 4: /* FD_STATUS */ + return sun_fdc->status_82072 & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sun_fdc->data_82072; + case 7: /* FD_DIR */ + return sun_read_dir(); + }; + panic("sun_82072_fd_inb: How did I get here?"); +} + +static void sun_82072_fd_outb(unsigned char value, int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + sun_set_dor(value, 0); + break; + case 5: /* FD_DATA */ + sun_fdc->data_82072 = value; + break; + case 7: /* FD_DCR */ + sun_fdc->dcr_82072 = value; + break; + case 4: /* FD_STATUS */ + sun_fdc->status_82072 = value; + break; + }; + return; +} + +static unsigned char sun_82077_fd_inb(int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 0: /* FD_STATUS_0 */ + return sun_fdc->status1_82077; + case 1: /* FD_STATUS_1 */ + return sun_fdc->status2_82077; + case 2: /* FD_DOR */ + return sun_fdc->dor_82077; + case 3: /* FD_TDR */ + return sun_fdc->tapectl_82077; + case 4: /* FD_STATUS */ + return sun_fdc->status_82077 & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sun_fdc->data_82077; + case 7: /* FD_DIR */ + return sun_read_dir(); + }; + panic("sun_82077_fd_inb: How did I get here?"); +} + +static void sun_82077_fd_outb(unsigned char value, int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + sun_set_dor(value, 1); + break; + case 5: /* FD_DATA */ + sun_fdc->data_82077 = value; + break; + case 7: /* FD_DCR */ + sun_fdc->dcr_82077 = value; + break; + case 4: /* FD_STATUS */ + sun_fdc->status_82077 = value; + break; + case 3: /* FD_TDR */ + sun_fdc->tapectl_82077 = value; + break; + }; + return; +} + +/* For pseudo-dma (Sun floppy drives have no real DMA available to + * them so we must eat the data fifo bytes directly ourselves) we have + * three state variables. doing_pdma tells our inline low-level + * assembly floppy interrupt entry point whether it should sit and eat + * bytes from the fifo or just transfer control up to the higher level + * floppy interrupt c-code. I tried very hard but I could not get the + * pseudo-dma to work in c-code without getting many overruns and + * underruns. If non-zero, doing_pdma encodes the direction of + * the transfer for debugging. 1=read 2=write + */ +extern char *pdma_vaddr; +extern unsigned long pdma_size; +extern volatile int doing_pdma; + +/* This is software state */ +extern char *pdma_base; +extern unsigned long pdma_areasize; + +/* Common routines to all controller types on the Sparc. */ +static inline void virtual_dma_init(void) +{ + /* nothing... */ +} + +static inline void sun_fd_disable_dma(void) +{ + doing_pdma = 0; + if (pdma_base) { + mmu_unlockarea(pdma_base, pdma_areasize); + pdma_base = NULL; + } +} + +static inline void sun_fd_set_dma_mode(int mode) +{ + switch(mode) { + case DMA_MODE_READ: + doing_pdma = 1; + break; + case DMA_MODE_WRITE: + doing_pdma = 2; + break; + default: + printk("Unknown dma mode %d\n", mode); + panic("floppy: Giving up..."); + } +} + +static inline void sun_fd_set_dma_addr(char *buffer) +{ + pdma_vaddr = buffer; +} + +static inline void sun_fd_set_dma_count(int length) +{ + pdma_size = length; +} + +static inline void sun_fd_enable_dma(void) +{ + pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); + pdma_base = pdma_vaddr; + pdma_areasize = pdma_size; +} + +/* Our low-level entry point in arch/sparc/kernel/entry.S */ +extern int sparc_floppy_request_irq(int irq, unsigned long flags, + irq_handler_t irq_handler); + +static int sun_fd_request_irq(void) +{ + static int once = 0; + int error; + + if(!once) { + once = 1; + error = sparc_floppy_request_irq(FLOPPY_IRQ, + IRQF_DISABLED, + floppy_interrupt); + return ((error == 0) ? 0 : -1); + } else return 0; +} + +static struct linux_prom_registers fd_regs[2]; + +static int sun_floppy_init(void) +{ + char state[128]; + int tnode, fd_node, num_regs; + struct resource r; + + use_virtual_dma = 1; + + FLOPPY_IRQ = 11; + /* Forget it if we aren't on a machine that could possibly + * ever have a floppy drive. + */ + if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || + ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || + (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { + /* We certainly don't have a floppy controller. */ + goto no_sun_fdc; + } + /* Well, try to find one. */ + tnode = prom_getchild(prom_root_node); + fd_node = prom_searchsiblings(tnode, "obio"); + if(fd_node != 0) { + tnode = prom_getchild(fd_node); + fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); + } else { + fd_node = prom_searchsiblings(tnode, "fd"); + } + if(fd_node == 0) { + goto no_sun_fdc; + } + + /* The sun4m lets us know if the controller is actually usable. */ + if(sparc_cpu_model == sun4m && + prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { + if(!strcmp(state, "disabled")) { + goto no_sun_fdc; + } + } + num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); + num_regs = (num_regs / sizeof(fd_regs[0])); + prom_apply_obio_ranges(fd_regs, num_regs); + memset(&r, 0, sizeof(r)); + r.flags = fd_regs[0].which_io; + r.start = fd_regs[0].phys_addr; + sun_fdc = (struct sun_flpy_controller *) + sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); + + /* Last minute sanity check... */ + if(sun_fdc->status_82072 == 0xff) { + sun_fdc = NULL; + goto no_sun_fdc; + } + + sun_fdops.fd_inb = sun_82077_fd_inb; + sun_fdops.fd_outb = sun_82077_fd_outb; + fdc_status = &sun_fdc->status_82077; + + if (sun_fdc->dor_82077 == 0x80) { + sun_fdc->dor_82077 = 0x02; + if (sun_fdc->dor_82077 == 0x80) { + sun_fdops.fd_inb = sun_82072_fd_inb; + sun_fdops.fd_outb = sun_82072_fd_outb; + fdc_status = &sun_fdc->status_82072; + } + } + + /* Success... */ + allowed_drive_mask = 0x01; + return (int) sun_fdc; + +no_sun_fdc: + return -1; +} + +static int sparc_eject(void) +{ + set_dor(0x00, 0xff, 0x90); + udelay(500); + set_dor(0x00, 0x6f, 0x00); + udelay(500); + return 0; +} + +#define fd_eject(drive) sparc_eject() + +#define EXTRA_FLOPPY_PARAMS + +#endif /* !(__ASM_SPARC_FLOPPY_H) */ diff --git a/arch/sparc/include/asm/floppy_64.h b/arch/sparc/include/asm/floppy_64.h new file mode 100644 index 0000000000000000000000000000000000000000..c39db1060bc7adc13b0a05652a079a8ab5010a0c --- /dev/null +++ b/arch/sparc/include/asm/floppy_64.h @@ -0,0 +1,782 @@ +/* floppy.h: Sparc specific parts of the Floppy driver. + * + * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) + * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + * + * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) + */ + +#ifndef __ASM_SPARC64_FLOPPY_H +#define __ASM_SPARC64_FLOPPY_H + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + + +/* + * Define this to enable exchanging drive 0 and 1 if only drive 1 is + * probed on PCI machines. + */ +#undef PCI_FDC_SWAP_DRIVES + + +/* References: + * 1) Netbsd Sun floppy driver. + * 2) NCR 82077 controller manual + * 3) Intel 82077 controller manual + */ +struct sun_flpy_controller { + volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */ + volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */ + volatile unsigned char dor_82077; /* Digital Output reg. */ + volatile unsigned char tapectl_82077; /* Tape Control reg */ + volatile unsigned char status_82077; /* Main Status Register. */ +#define drs_82077 status_82077 /* Digital Rate Select reg. */ + volatile unsigned char data_82077; /* Data fifo. */ + volatile unsigned char ___unused; + volatile unsigned char dir_82077; /* Digital Input reg. */ +#define dcr_82077 dir_82077 /* Config Control reg. */ +}; + +/* You'll only ever find one controller on an Ultra anyways. */ +static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1; +unsigned long fdc_status; +static struct sbus_dev *floppy_sdev = NULL; + +struct sun_floppy_ops { + unsigned char (*fd_inb) (unsigned long port); + void (*fd_outb) (unsigned char value, unsigned long port); + void (*fd_enable_dma) (void); + void (*fd_disable_dma) (void); + void (*fd_set_dma_mode) (int); + void (*fd_set_dma_addr) (char *); + void (*fd_set_dma_count) (int); + unsigned int (*get_dma_residue) (void); + int (*fd_request_irq) (void); + void (*fd_free_irq) (void); + int (*fd_eject) (int); +}; + +static struct sun_floppy_ops sun_fdops; + +#define fd_inb(port) sun_fdops.fd_inb(port) +#define fd_outb(value,port) sun_fdops.fd_outb(value,port) +#define fd_enable_dma() sun_fdops.fd_enable_dma() +#define fd_disable_dma() sun_fdops.fd_disable_dma() +#define fd_request_dma() (0) /* nothing... */ +#define fd_free_dma() /* nothing... */ +#define fd_clear_dma_ff() /* nothing... */ +#define fd_set_dma_mode(mode) sun_fdops.fd_set_dma_mode(mode) +#define fd_set_dma_addr(addr) sun_fdops.fd_set_dma_addr(addr) +#define fd_set_dma_count(count) sun_fdops.fd_set_dma_count(count) +#define get_dma_residue(x) sun_fdops.get_dma_residue() +#define fd_cacheflush(addr, size) /* nothing... */ +#define fd_request_irq() sun_fdops.fd_request_irq() +#define fd_free_irq() sun_fdops.fd_free_irq() +#define fd_eject(drive) sun_fdops.fd_eject(drive) + +/* Super paranoid... */ +#undef HAVE_DISABLE_HLT + +static int sun_floppy_types[2] = { 0, 0 }; + +/* Here is where we catch the floppy driver trying to initialize, + * therefore this is where we call the PROM device tree probing + * routine etc. on the Sparc. + */ +#define FLOPPY0_TYPE sun_floppy_init() +#define FLOPPY1_TYPE sun_floppy_types[1] + +#define FDC1 ((unsigned long)sun_fdc) + +#define N_FDC 1 +#define N_DRIVE 8 + +/* No 64k boundary crossing problems on the Sparc. */ +#define CROSS_64KB(a,s) (0) + +static unsigned char sun_82077_fd_inb(unsigned long port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %lx\n", port); + panic("floppy: Port bolixed."); + case 4: /* FD_STATUS */ + return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sbus_readb(&sun_fdc->data_82077); + case 7: /* FD_DIR */ + /* XXX: Is DCL on 0x80 in sun4m? */ + return sbus_readb(&sun_fdc->dir_82077); + }; + panic("sun_82072_fd_inb: How did I get here?"); +} + +static void sun_82077_fd_outb(unsigned char value, unsigned long port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %lx\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + /* Happily, the 82077 has a real DOR register. */ + sbus_writeb(value, &sun_fdc->dor_82077); + break; + case 5: /* FD_DATA */ + sbus_writeb(value, &sun_fdc->data_82077); + break; + case 7: /* FD_DCR */ + sbus_writeb(value, &sun_fdc->dcr_82077); + break; + case 4: /* FD_STATUS */ + sbus_writeb(value, &sun_fdc->status_82077); + break; + }; + return; +} + +/* For pseudo-dma (Sun floppy drives have no real DMA available to + * them so we must eat the data fifo bytes directly ourselves) we have + * three state variables. doing_pdma tells our inline low-level + * assembly floppy interrupt entry point whether it should sit and eat + * bytes from the fifo or just transfer control up to the higher level + * floppy interrupt c-code. I tried very hard but I could not get the + * pseudo-dma to work in c-code without getting many overruns and + * underruns. If non-zero, doing_pdma encodes the direction of + * the transfer for debugging. 1=read 2=write + */ +unsigned char *pdma_vaddr; +unsigned long pdma_size; +volatile int doing_pdma = 0; + +/* This is software state */ +char *pdma_base = NULL; +unsigned long pdma_areasize; + +/* Common routines to all controller types on the Sparc. */ +static void sun_fd_disable_dma(void) +{ + doing_pdma = 0; + if (pdma_base) { + mmu_unlockarea(pdma_base, pdma_areasize); + pdma_base = NULL; + } +} + +static void sun_fd_set_dma_mode(int mode) +{ + switch(mode) { + case DMA_MODE_READ: + doing_pdma = 1; + break; + case DMA_MODE_WRITE: + doing_pdma = 2; + break; + default: + printk("Unknown dma mode %d\n", mode); + panic("floppy: Giving up..."); + } +} + +static void sun_fd_set_dma_addr(char *buffer) +{ + pdma_vaddr = buffer; +} + +static void sun_fd_set_dma_count(int length) +{ + pdma_size = length; +} + +static void sun_fd_enable_dma(void) +{ + pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); + pdma_base = pdma_vaddr; + pdma_areasize = pdma_size; +} + +irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie) +{ + if (likely(doing_pdma)) { + void __iomem *stat = (void __iomem *) fdc_status; + unsigned char *vaddr = pdma_vaddr; + unsigned long size = pdma_size; + u8 val; + + while (size) { + val = readb(stat); + if (unlikely(!(val & 0x80))) { + pdma_vaddr = vaddr; + pdma_size = size; + return IRQ_HANDLED; + } + if (unlikely(!(val & 0x20))) { + pdma_vaddr = vaddr; + pdma_size = size; + doing_pdma = 0; + goto main_interrupt; + } + if (val & 0x40) { + /* read */ + *vaddr++ = readb(stat + 1); + } else { + unsigned char data = *vaddr++; + + /* write */ + writeb(data, stat + 1); + } + size--; + } + + pdma_vaddr = vaddr; + pdma_size = size; + + /* Send Terminal Count pulse to floppy controller. */ + val = readb(auxio_register); + val |= AUXIO_AUX1_FTCNT; + writeb(val, auxio_register); + val &= ~AUXIO_AUX1_FTCNT; + writeb(val, auxio_register); + + doing_pdma = 0; + } + +main_interrupt: + return floppy_interrupt(irq, dev_cookie); +} + +static int sun_fd_request_irq(void) +{ + static int once = 0; + int error; + + if(!once) { + once = 1; + + error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, + IRQF_DISABLED, "floppy", NULL); + + return ((error == 0) ? 0 : -1); + } + return 0; +} + +static void sun_fd_free_irq(void) +{ +} + +static unsigned int sun_get_dma_residue(void) +{ + /* XXX This isn't really correct. XXX */ + return 0; +} + +static int sun_fd_eject(int drive) +{ + set_dor(0x00, 0xff, 0x90); + udelay(500); + set_dor(0x00, 0x6f, 0x00); + udelay(500); + return 0; +} + +#ifdef CONFIG_PCI +#include +#include + +static struct ebus_dma_info sun_pci_fd_ebus_dma; +static struct pci_dev *sun_pci_ebus_dev; +static int sun_pci_broken_drive = -1; + +struct sun_pci_dma_op { + unsigned int addr; + int len; + int direction; + char *buf; +}; +static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL}; +static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL}; + +extern irqreturn_t floppy_interrupt(int irq, void *dev_id); + +static unsigned char sun_pci_fd_inb(unsigned long port) +{ + udelay(5); + return inb(port); +} + +static void sun_pci_fd_outb(unsigned char val, unsigned long port) +{ + udelay(5); + outb(val, port); +} + +static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port) +{ + udelay(5); + /* + * XXX: Due to SUN's broken floppy connector on AX and AXi + * we need to turn on MOTOR_0 also, if the floppy is + * jumpered to DS1 (like most PC floppies are). I hope + * this does not hurt correct hardware like the AXmp. + * (Eddie, Sep 12 1998). + */ + if (port == ((unsigned long)sun_fdc) + 2) { + if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) { + val |= 0x10; + } + } + outb(val, port); +} + +#ifdef PCI_FDC_SWAP_DRIVES +static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port) +{ + udelay(5); + /* + * XXX: Due to SUN's broken floppy connector on AX and AXi + * we need to turn on MOTOR_0 also, if the floppy is + * jumpered to DS1 (like most PC floppies are). I hope + * this does not hurt correct hardware like the AXmp. + * (Eddie, Sep 12 1998). + */ + if (port == ((unsigned long)sun_fdc) + 2) { + if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) { + val &= ~(0x03); + val |= 0x21; + } + } + outb(val, port); +} +#endif /* PCI_FDC_SWAP_DRIVES */ + +static void sun_pci_fd_enable_dma(void) +{ + BUG_ON((NULL == sun_pci_dma_pending.buf) || + (0 == sun_pci_dma_pending.len) || + (0 == sun_pci_dma_pending.direction)); + + sun_pci_dma_current.buf = sun_pci_dma_pending.buf; + sun_pci_dma_current.len = sun_pci_dma_pending.len; + sun_pci_dma_current.direction = sun_pci_dma_pending.direction; + + sun_pci_dma_pending.buf = NULL; + sun_pci_dma_pending.len = 0; + sun_pci_dma_pending.direction = 0; + sun_pci_dma_pending.addr = -1U; + + sun_pci_dma_current.addr = + pci_map_single(sun_pci_ebus_dev, + sun_pci_dma_current.buf, + sun_pci_dma_current.len, + sun_pci_dma_current.direction); + + ebus_dma_enable(&sun_pci_fd_ebus_dma, 1); + + if (ebus_dma_request(&sun_pci_fd_ebus_dma, + sun_pci_dma_current.addr, + sun_pci_dma_current.len)) + BUG(); +} + +static void sun_pci_fd_disable_dma(void) +{ + ebus_dma_enable(&sun_pci_fd_ebus_dma, 0); + if (sun_pci_dma_current.addr != -1U) + pci_unmap_single(sun_pci_ebus_dev, + sun_pci_dma_current.addr, + sun_pci_dma_current.len, + sun_pci_dma_current.direction); + sun_pci_dma_current.addr = -1U; +} + +static void sun_pci_fd_set_dma_mode(int mode) +{ + if (mode == DMA_MODE_WRITE) + sun_pci_dma_pending.direction = PCI_DMA_TODEVICE; + else + sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE; + + ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE); +} + +static void sun_pci_fd_set_dma_count(int length) +{ + sun_pci_dma_pending.len = length; +} + +static void sun_pci_fd_set_dma_addr(char *buffer) +{ + sun_pci_dma_pending.buf = buffer; +} + +static unsigned int sun_pci_get_dma_residue(void) +{ + return ebus_dma_residue(&sun_pci_fd_ebus_dma); +} + +static int sun_pci_fd_request_irq(void) +{ + return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1); +} + +static void sun_pci_fd_free_irq(void) +{ + ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0); +} + +static int sun_pci_fd_eject(int drive) +{ + return -EINVAL; +} + +void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie) +{ + floppy_interrupt(0, NULL); +} + +/* + * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, + * even if this is configured using DS1, thus looks like /dev/fd1 with + * the cabling used in Ultras. + */ +#define DOR (port + 2) +#define MSR (port + 4) +#define FIFO (port + 5) + +static void sun_pci_fd_out_byte(unsigned long port, unsigned char val, + unsigned long reg) +{ + unsigned char status; + int timeout = 1000; + + while (!((status = inb(MSR)) & 0x80) && --timeout) + udelay(100); + outb(val, reg); +} + +static unsigned char sun_pci_fd_sensei(unsigned long port) +{ + unsigned char result[2] = { 0x70, 0x00 }; + unsigned char status; + int i = 0; + + sun_pci_fd_out_byte(port, 0x08, FIFO); + do { + int timeout = 1000; + + while (!((status = inb(MSR)) & 0x80) && --timeout) + udelay(100); + + if (!timeout) + break; + + if ((status & 0xf0) == 0xd0) + result[i++] = inb(FIFO); + else + break; + } while (i < 2); + + return result[0]; +} + +static void sun_pci_fd_reset(unsigned long port) +{ + unsigned char mask = 0x00; + unsigned char status; + int timeout = 10000; + + outb(0x80, MSR); + do { + status = sun_pci_fd_sensei(port); + if ((status & 0xc0) == 0xc0) + mask |= 1 << (status & 0x03); + else + udelay(100); + } while ((mask != 0x0f) && --timeout); +} + +static int sun_pci_fd_test_drive(unsigned long port, int drive) +{ + unsigned char status, data; + int timeout = 1000; + int ready; + + sun_pci_fd_reset(port); + + data = (0x10 << drive) | 0x0c | drive; + sun_pci_fd_out_byte(port, data, DOR); + + sun_pci_fd_out_byte(port, 0x07, FIFO); + sun_pci_fd_out_byte(port, drive & 0x03, FIFO); + + do { + udelay(100); + status = sun_pci_fd_sensei(port); + } while (((status & 0xc0) == 0x80) && --timeout); + + if (!timeout) + ready = 0; + else + ready = (status & 0x10) ? 0 : 1; + + sun_pci_fd_reset(port); + return ready; +} +#undef FIFO +#undef MSR +#undef DOR + +#endif /* CONFIG_PCI */ + +#ifdef CONFIG_PCI +static int __init ebus_fdthree_p(struct linux_ebus_device *edev) +{ + if (!strcmp(edev->prom_node->name, "fdthree")) + return 1; + if (!strcmp(edev->prom_node->name, "floppy")) { + const char *compat; + + compat = of_get_property(edev->prom_node, + "compatible", NULL); + if (compat && !strcmp(compat, "fdthree")) + return 1; + } + return 0; +} +#endif + +static unsigned long __init sun_floppy_init(void) +{ + char state[128]; + struct sbus_bus *bus; + struct sbus_dev *sdev = NULL; + static int initialized = 0; + + if (initialized) + return sun_floppy_types[0]; + initialized = 1; + + for_all_sbusdev (sdev, bus) { + if (!strcmp(sdev->prom_name, "SUNW,fdtwo")) + break; + } + if(sdev) { + floppy_sdev = sdev; + FLOPPY_IRQ = sdev->irqs[0]; + } else { +#ifdef CONFIG_PCI + struct linux_ebus *ebus; + struct linux_ebus_device *edev = NULL; + unsigned long config = 0; + void __iomem *auxio_reg; + const char *state_prop; + + for_each_ebus(ebus) { + for_each_ebusdev(edev, ebus) { + if (ebus_fdthree_p(edev)) + goto ebus_done; + } + } + ebus_done: + if (!edev) + return 0; + + state_prop = of_get_property(edev->prom_node, "status", NULL); + if (state_prop && !strncmp(state_prop, "disabled", 8)) + return 0; + + FLOPPY_IRQ = edev->irqs[0]; + + /* Make sure the high density bit is set, some systems + * (most notably Ultra5/Ultra10) come up with it clear. + */ + auxio_reg = (void __iomem *) edev->resource[2].start; + writel(readl(auxio_reg)|0x2, auxio_reg); + + sun_pci_ebus_dev = ebus->self; + + spin_lock_init(&sun_pci_fd_ebus_dma.lock); + + /* XXX ioremap */ + sun_pci_fd_ebus_dma.regs = (void __iomem *) + edev->resource[1].start; + if (!sun_pci_fd_ebus_dma.regs) + return 0; + + sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER | + EBUS_DMA_FLAG_TCI_DISABLE); + sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; + sun_pci_fd_ebus_dma.client_cookie = NULL; + sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; + strcpy(sun_pci_fd_ebus_dma.name, "floppy"); + if (ebus_dma_register(&sun_pci_fd_ebus_dma)) + return 0; + + /* XXX ioremap */ + sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start; + + sun_fdops.fd_inb = sun_pci_fd_inb; + sun_fdops.fd_outb = sun_pci_fd_outb; + + can_use_virtual_dma = use_virtual_dma = 0; + sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma; + sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma; + sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode; + sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr; + sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count; + sun_fdops.get_dma_residue = sun_pci_get_dma_residue; + + sun_fdops.fd_request_irq = sun_pci_fd_request_irq; + sun_fdops.fd_free_irq = sun_pci_fd_free_irq; + + sun_fdops.fd_eject = sun_pci_fd_eject; + + fdc_status = (unsigned long) &sun_fdc->status_82077; + + /* + * XXX: Find out on which machines this is really needed. + */ + if (1) { + sun_pci_broken_drive = 1; + sun_fdops.fd_outb = sun_pci_fd_broken_outb; + } + + allowed_drive_mask = 0; + if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0)) + sun_floppy_types[0] = 4; + if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1)) + sun_floppy_types[1] = 4; + + /* + * Find NS87303 SuperIO config registers (through ecpp). + */ + for_each_ebus(ebus) { + for_each_ebusdev(edev, ebus) { + if (!strcmp(edev->prom_node->name, "ecpp")) { + config = edev->resource[1].start; + goto config_done; + } + } + } + config_done: + + /* + * Sanity check, is this really the NS87303? + */ + switch (config & 0x3ff) { + case 0x02e: + case 0x15c: + case 0x26e: + case 0x398: + break; + default: + config = 0; + } + + if (!config) + return sun_floppy_types[0]; + + /* Enable PC-AT mode. */ + ns87303_modify(config, ASC, 0, 0xc0); + +#ifdef PCI_FDC_SWAP_DRIVES + /* + * If only Floppy 1 is present, swap drives. + */ + if (!sun_floppy_types[0] && sun_floppy_types[1]) { + /* + * Set the drive exchange bit in FCR on NS87303, + * make sure other bits are sane before doing so. + */ + ns87303_modify(config, FER, FER_EDM, 0); + ns87303_modify(config, ASC, ASC_DRV2_SEL, 0); + ns87303_modify(config, FCR, 0, FCR_LDE); + + config = sun_floppy_types[0]; + sun_floppy_types[0] = sun_floppy_types[1]; + sun_floppy_types[1] = config; + + if (sun_pci_broken_drive != -1) { + sun_pci_broken_drive = 1 - sun_pci_broken_drive; + sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb; + } + } +#endif /* PCI_FDC_SWAP_DRIVES */ + + return sun_floppy_types[0]; +#else + return 0; +#endif + } + prom_getproperty(sdev->prom_node, "status", state, sizeof(state)); + if(!strncmp(state, "disabled", 8)) + return 0; + + /* + * We cannot do sbus_ioremap here: it does request_region, + * which the generic floppy driver tries to do once again. + * But we must use the sdev resource values as they have + * had parent ranges applied. + */ + sun_fdc = (struct sun_flpy_controller *) + (sdev->resource[0].start + + ((sdev->resource[0].flags & 0x1ffUL) << 32UL)); + + /* Last minute sanity check... */ + if(sbus_readb(&sun_fdc->status1_82077) == 0xff) { + sun_fdc = (struct sun_flpy_controller *)-1; + return 0; + } + + sun_fdops.fd_inb = sun_82077_fd_inb; + sun_fdops.fd_outb = sun_82077_fd_outb; + + can_use_virtual_dma = use_virtual_dma = 1; + sun_fdops.fd_enable_dma = sun_fd_enable_dma; + sun_fdops.fd_disable_dma = sun_fd_disable_dma; + sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode; + sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr; + sun_fdops.fd_set_dma_count = sun_fd_set_dma_count; + sun_fdops.get_dma_residue = sun_get_dma_residue; + + sun_fdops.fd_request_irq = sun_fd_request_irq; + sun_fdops.fd_free_irq = sun_fd_free_irq; + + sun_fdops.fd_eject = sun_fd_eject; + + fdc_status = (unsigned long) &sun_fdc->status_82077; + + /* Success... */ + allowed_drive_mask = 0x01; + sun_floppy_types[0] = 4; + sun_floppy_types[1] = 0; + + return sun_floppy_types[0]; +} + +#define EXTRA_FLOPPY_PARAMS + +static DEFINE_SPINLOCK(dma_spin_lock); + +#define claim_dma_lock() \ +({ unsigned long flags; \ + spin_lock_irqsave(&dma_spin_lock, flags); \ + flags; \ +}) + +#define release_dma_lock(__flags) \ + spin_unlock_irqrestore(&dma_spin_lock, __flags); + +#endif /* !(__ASM_SPARC64_FLOPPY_H) */ diff --git a/include/asm-sparc64/fpumacro.h b/arch/sparc/include/asm/fpumacro.h similarity index 100% rename from include/asm-sparc64/fpumacro.h rename to arch/sparc/include/asm/fpumacro.h diff --git a/arch/sparc/include/asm/ftrace.h b/arch/sparc/include/asm/ftrace.h new file mode 100644 index 0000000000000000000000000000000000000000..d27716cd38c1ac0243a74104f3106850d24397b1 --- /dev/null +++ b/arch/sparc/include/asm/ftrace.h @@ -0,0 +1,14 @@ +#ifndef _ASM_SPARC64_FTRACE +#define _ASM_SPARC64_FTRACE + +#ifdef CONFIG_MCOUNT +#define MCOUNT_ADDR ((long)(_mcount)) +#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ + +#ifndef __ASSEMBLY__ +extern void _mcount(void); +#endif + +#endif + +#endif /* _ASM_SPARC64_FTRACE */ diff --git a/arch/sparc/include/asm/futex.h b/arch/sparc/include/asm/futex.h new file mode 100644 index 0000000000000000000000000000000000000000..736335f3671370532ce9c8ced8e0adb14e42776a --- /dev/null +++ b/arch/sparc/include/asm/futex.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_FUTEX_H +#define ___ASM_SPARC_FUTEX_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/futex.h b/arch/sparc/include/asm/futex_32.h similarity index 100% rename from include/asm-sparc/futex.h rename to arch/sparc/include/asm/futex_32.h diff --git a/include/asm-sparc64/futex.h b/arch/sparc/include/asm/futex_64.h similarity index 100% rename from include/asm-sparc64/futex.h rename to arch/sparc/include/asm/futex_64.h diff --git a/arch/sparc/include/asm/hardirq.h b/arch/sparc/include/asm/hardirq.h new file mode 100644 index 0000000000000000000000000000000000000000..44d4e23451486a9c3d5f0041c42c58bbd3bb145c --- /dev/null +++ b/arch/sparc/include/asm/hardirq.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_HARDIRQ_H +#define ___ASM_SPARC_HARDIRQ_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/hardirq.h b/arch/sparc/include/asm/hardirq_32.h similarity index 100% rename from include/asm-sparc/hardirq.h rename to arch/sparc/include/asm/hardirq_32.h diff --git a/include/asm-sparc64/hardirq.h b/arch/sparc/include/asm/hardirq_64.h similarity index 100% rename from include/asm-sparc64/hardirq.h rename to arch/sparc/include/asm/hardirq_64.h diff --git a/arch/sparc/include/asm/head.h b/arch/sparc/include/asm/head.h new file mode 100644 index 0000000000000000000000000000000000000000..be8f03f3e731d568e2260bb09bb1006708a9e2cb --- /dev/null +++ b/arch/sparc/include/asm/head.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_HEAD_H +#define ___ASM_SPARC_HEAD_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/head.h b/arch/sparc/include/asm/head_32.h similarity index 100% rename from include/asm-sparc/head.h rename to arch/sparc/include/asm/head_32.h diff --git a/include/asm-sparc64/head.h b/arch/sparc/include/asm/head_64.h similarity index 100% rename from include/asm-sparc64/head.h rename to arch/sparc/include/asm/head_64.h diff --git a/include/asm-sparc/highmem.h b/arch/sparc/include/asm/highmem.h similarity index 100% rename from include/asm-sparc/highmem.h rename to arch/sparc/include/asm/highmem.h diff --git a/include/asm-sparc64/hugetlb.h b/arch/sparc/include/asm/hugetlb.h similarity index 91% rename from include/asm-sparc64/hugetlb.h rename to arch/sparc/include/asm/hugetlb.h index 412af58926a0af752854dffdc113bc5dac04ae3a..177061064ee602ed4dc0e8e956a4b682695c79f0 100644 --- a/include/asm-sparc64/hugetlb.h +++ b/arch/sparc/include/asm/hugetlb.h @@ -22,7 +22,8 @@ static inline int is_hugepage_only_range(struct mm_struct *mm, * If the arch doesn't supply something else, assume that hugepage * size aligned regions are ok without further preparation. */ -static inline int prepare_hugepage_range(unsigned long addr, unsigned long len) +static inline int prepare_hugepage_range(struct file *file, + unsigned long addr, unsigned long len) { if (len & ~HPAGE_MASK) return -EINVAL; @@ -31,7 +32,7 @@ static inline int prepare_hugepage_range(unsigned long addr, unsigned long len) return 0; } -static inline void hugetlb_free_pgd_range(struct mmu_gather **tlb, +static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, unsigned long end, unsigned long floor, unsigned long ceiling) diff --git a/include/asm-sparc64/hvtramp.h b/arch/sparc/include/asm/hvtramp.h similarity index 100% rename from include/asm-sparc64/hvtramp.h rename to arch/sparc/include/asm/hvtramp.h diff --git a/include/asm-sparc/hw_irq.h b/arch/sparc/include/asm/hw_irq.h similarity index 100% rename from include/asm-sparc/hw_irq.h rename to arch/sparc/include/asm/hw_irq.h diff --git a/include/asm-sparc64/hypervisor.h b/arch/sparc/include/asm/hypervisor.h similarity index 99% rename from include/asm-sparc64/hypervisor.h rename to arch/sparc/include/asm/hypervisor.h index 3ad45dff52f87f3732d0a38c30cbc017f97edb70..109ae24ba242c3f24a7861d15580c0c62045709b 100644 --- a/include/asm-sparc64/hypervisor.h +++ b/arch/sparc/include/asm/hypervisor.h @@ -1261,7 +1261,7 @@ struct hv_trap_trace_entry { * tracing for the calling virtual CPU. The buffer allocated must be * sized for a power of two number of 64-byte trap trace entries plus * an initial 64-byte control structure. - * + * * This may be invoked any number of times so that a virtual CPU may * relocate a trap trace buffer or create "snapshots" of information. * @@ -1942,7 +1942,7 @@ extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, * byte swapped. * * Non-significant bits in RET2 are not guarenteed to have any specific value - * and therefore must be ignored. If RET1 is returned as non-zero, the data + * and therefore must be ignored. If RET1 is returned as non-zero, the data * value is not guarenteed to have any specific value and should be ignored. * * The caller must have permission to read from the given devhandle, real @@ -2920,8 +2920,12 @@ extern unsigned long sun4v_ncs_request(unsigned long request, #define HV_GRP_LDOM 0x0101 #define HV_GRP_SVC_CHAN 0x0102 #define HV_GRP_NCS 0x0103 +#define HV_GRP_RNG 0x0104 #define HV_GRP_NIAG_PERF 0x0200 #define HV_GRP_FIRE_PERF 0x0201 +#define HV_GRP_N2_CPU 0x0202 +#define HV_GRP_NIU 0x0204 +#define HV_GRP_VF_CPU 0x0205 #define HV_GRP_DIAG 0x0300 #ifndef __ASSEMBLY__ diff --git a/arch/sparc/include/asm/ide.h b/arch/sparc/include/asm/ide.h new file mode 100644 index 0000000000000000000000000000000000000000..b7af3d6582394b6fb2b370479bd2523f21e6281e --- /dev/null +++ b/arch/sparc/include/asm/ide.h @@ -0,0 +1,97 @@ +/* ide.h: SPARC PCI specific IDE glue. + * + * Copyright (C) 1997 David S. Miller (davem@davemloft.net) + * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) + * Adaptation from sparc64 version to sparc by Pete Zaitcev. + */ + +#ifndef _SPARC_IDE_H +#define _SPARC_IDE_H + +#ifdef __KERNEL__ + +#include +#ifdef CONFIG_SPARC64 +#include +#include +#include +#include +#else +#include +#include +#endif + +#define __ide_insl(data_reg, buffer, wcount) \ + __ide_insw(data_reg, buffer, (wcount)<<1) +#define __ide_outsl(data_reg, buffer, wcount) \ + __ide_outsw(data_reg, buffer, (wcount)<<1) + +/* On sparc, I/O ports and MMIO registers are accessed identically. */ +#define __ide_mm_insw __ide_insw +#define __ide_mm_insl __ide_insl +#define __ide_mm_outsw __ide_outsw +#define __ide_mm_outsl __ide_outsl + +static inline void __ide_insw(void __iomem *port, void *dst, u32 count) +{ +#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) + unsigned long end = (unsigned long)dst + (count << 1); +#endif + u16 *ps = dst; + u32 *pi; + + if(((unsigned long)ps) & 0x2) { + *ps++ = __raw_readw(port); + count--; + } + pi = (u32 *)ps; + while(count >= 2) { + u32 w; + + w = __raw_readw(port) << 16; + w |= __raw_readw(port); + *pi++ = w; + count -= 2; + } + ps = (u16 *)pi; + if(count) + *ps++ = __raw_readw(port); + +#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) + __flush_dcache_range((unsigned long)dst, end); +#endif +} + +static inline void __ide_outsw(void __iomem *port, const void *src, u32 count) +{ +#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) + unsigned long end = (unsigned long)src + (count << 1); +#endif + const u16 *ps = src; + const u32 *pi; + + if(((unsigned long)src) & 0x2) { + __raw_writew(*ps++, port); + count--; + } + pi = (const u32 *)ps; + while(count >= 2) { + u32 w; + + w = *pi++; + __raw_writew((w >> 16), port); + __raw_writew(w, port); + count -= 2; + } + ps = (const u16 *)pi; + if(count) + __raw_writew(*ps, port); + +#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) + __flush_dcache_range((unsigned long)src, end); +#endif +} + +#endif /* __KERNEL__ */ + +#endif /* _SPARC_IDE_H */ diff --git a/arch/sparc/include/asm/idprom.h b/arch/sparc/include/asm/idprom.h new file mode 100644 index 0000000000000000000000000000000000000000..6976aa2439c649c2028d615d0316e828355ec74a --- /dev/null +++ b/arch/sparc/include/asm/idprom.h @@ -0,0 +1,25 @@ +/* + * idprom.h: Macros and defines for idprom routines + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_IDPROM_H +#define _SPARC_IDPROM_H + +#include + +struct idprom { + u8 id_format; /* Format identifier (always 0x01) */ + u8 id_machtype; /* Machine type */ + u8 id_ethaddr[6]; /* Hardware ethernet address */ + s32 id_date; /* Date of manufacture */ + u32 id_sernum:24; /* Unique serial number */ + u8 id_cksum; /* Checksum - xor of the data bytes */ + u8 reserved[16]; +}; + +extern struct idprom *idprom; +extern void idprom_init(void); + +#endif /* !(_SPARC_IDPROM_H) */ diff --git a/include/asm-sparc64/intr_queue.h b/arch/sparc/include/asm/intr_queue.h similarity index 100% rename from include/asm-sparc64/intr_queue.h rename to arch/sparc/include/asm/intr_queue.h diff --git a/include/asm-sparc/io-unit.h b/arch/sparc/include/asm/io-unit.h similarity index 100% rename from include/asm-sparc/io-unit.h rename to arch/sparc/include/asm/io-unit.h diff --git a/arch/sparc/include/asm/io.h b/arch/sparc/include/asm/io.h new file mode 100644 index 0000000000000000000000000000000000000000..a34b2994937ab2e4323de0308ab8a630729dcf70 --- /dev/null +++ b/arch/sparc/include/asm/io.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_IO_H +#define ___ASM_SPARC_IO_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/io_32.h b/arch/sparc/include/asm/io_32.h new file mode 100644 index 0000000000000000000000000000000000000000..10d7da450070c952a8e2094375676067b50752de --- /dev/null +++ b/arch/sparc/include/asm/io_32.h @@ -0,0 +1,326 @@ +#ifndef __SPARC_IO_H +#define __SPARC_IO_H + +#include +#include +#include /* struct resource */ + +#include /* IO address mapping routines need this */ +#include + +#define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) + +static inline u32 flip_dword (u32 l) +{ + return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); +} + +static inline u16 flip_word (u16 w) +{ + return ((w&0xff) << 8) | ((w>>8)&0xff); +} + +#define mmiowb() + +/* + * Memory mapped I/O to PCI + */ + +static inline u8 __raw_readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 __raw_readw(const volatile void __iomem *addr) +{ + return *(__force volatile u16 *)addr; +} + +static inline u32 __raw_readl(const volatile void __iomem *addr) +{ + return *(__force volatile u32 *)addr; +} + +static inline void __raw_writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void __raw_writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = w; +} + +static inline void __raw_writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = l; +} + +static inline u8 __readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 __readw(const volatile void __iomem *addr) +{ + return flip_word(*(__force volatile u16 *)addr); +} + +static inline u32 __readl(const volatile void __iomem *addr) +{ + return flip_dword(*(__force volatile u32 *)addr); +} + +static inline void __writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void __writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = flip_word(w); +} + +static inline void __writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = flip_dword(l); +} + +#define readb(__addr) __readb(__addr) +#define readw(__addr) __readw(__addr) +#define readl(__addr) __readl(__addr) +#define readb_relaxed(__addr) readb(__addr) +#define readw_relaxed(__addr) readw(__addr) +#define readl_relaxed(__addr) readl(__addr) + +#define writeb(__b, __addr) __writeb((__b),(__addr)) +#define writew(__w, __addr) __writew((__w),(__addr)) +#define writel(__l, __addr) __writel((__l),(__addr)) + +/* + * I/O space operations + * + * Arrangement on a Sun is somewhat complicated. + * + * First of all, we want to use standard Linux drivers + * for keyboard, PC serial, etc. These drivers think + * they access I/O space and use inb/outb. + * On the other hand, EBus bridge accepts PCI *memory* + * cycles and converts them into ISA *I/O* cycles. + * Ergo, we want inb & outb to generate PCI memory cycles. + * + * If we want to issue PCI *I/O* cycles, we do this + * with a low 64K fixed window in PCIC. This window gets + * mapped somewhere into virtual kernel space and we + * can use inb/outb again. + */ +#define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) +#define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) +#define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) +#define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) + +#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) +#define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) +#define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) +#define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) + +#define inb_p(__addr) inb(__addr) +#define outb_p(__b, __addr) outb(__b, __addr) +#define inw_p(__addr) inw(__addr) +#define outw_p(__w, __addr) outw(__w, __addr) +#define inl_p(__addr) inl(__addr) +#define outl_p(__l, __addr) outl(__l, __addr) + +void outsb(unsigned long addr, const void *src, unsigned long cnt); +void outsw(unsigned long addr, const void *src, unsigned long cnt); +void outsl(unsigned long addr, const void *src, unsigned long cnt); +void insb(unsigned long addr, void *dst, unsigned long count); +void insw(unsigned long addr, void *dst, unsigned long count); +void insl(unsigned long addr, void *dst, unsigned long count); + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * SBus accessors. + * + * SBus has only one, memory mapped, I/O space. + * We do not need to flip bytes for SBus of course. + */ +static inline u8 _sbus_readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 _sbus_readw(const volatile void __iomem *addr) +{ + return *(__force volatile u16 *)addr; +} + +static inline u32 _sbus_readl(const volatile void __iomem *addr) +{ + return *(__force volatile u32 *)addr; +} + +static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void _sbus_writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = w; +} + +static inline void _sbus_writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = l; +} + +/* + * The only reason for #define's is to hide casts to unsigned long. + */ +#define sbus_readb(__addr) _sbus_readb(__addr) +#define sbus_readw(__addr) _sbus_readw(__addr) +#define sbus_readl(__addr) _sbus_readl(__addr) +#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) +#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) +#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) + +static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) +{ + while(n--) { + sbus_writeb(c, __dst); + __dst++; + } +} + +static inline void +_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + volatile void __iomem *d = dst; + + while (n--) { + writeb(c, d); + d++; + } +} + +#define memset_io(d,c,sz) _memset_io(d,c,sz) + +static inline void +_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) +{ + char *d = dst; + + while (n--) { + char tmp = readb(src); + *d++ = tmp; + src++; + } +} + +#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) + +static inline void +_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) +{ + const char *s = src; + volatile void __iomem *d = dst; + + while (n--) { + char tmp = *s++; + writeb(tmp, d); + d++; + } +} + +#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) + +#ifdef __KERNEL__ + +/* + * Bus number may be embedded in the higher bits of the physical address. + * This is why we have no bus number argument to ioremap(). + */ +extern void __iomem *ioremap(unsigned long offset, unsigned long size); +#define ioremap_nocache(X,Y) ioremap((X),(Y)) +#define ioremap_wc(X,Y) ioremap((X),(Y)) +extern void iounmap(volatile void __iomem *addr); + +#define ioread8(X) readb(X) +#define ioread16(X) readw(X) +#define ioread32(X) readl(X) +#define iowrite8(val,X) writeb(val,X) +#define iowrite16(val,X) writew(val,X) +#define iowrite32(val,X) writel(val,X) + +static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) +{ + insb((unsigned long __force)port, buf, count); +} +static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) +{ + insw((unsigned long __force)port, buf, count); +} + +static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) +{ + insl((unsigned long __force)port, buf, count); +} + +static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsb((unsigned long __force)port, buf, count); +} + +static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsw((unsigned long __force)port, buf, count); +} + +static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsl((unsigned long __force)port, buf, count); +} + +/* Create a virtual mapping cookie for an IO port range */ +extern void __iomem *ioport_map(unsigned long port, unsigned int nr); +extern void ioport_unmap(void __iomem *); + +/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ +struct pci_dev; +extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); +extern void pci_iounmap(struct pci_dev *dev, void __iomem *); + +/* + * Bus number may be in res->flags... somewhere. + */ +extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, + unsigned long size, char *name); +extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); + + +/* + * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, + * so rtc_port is static in it. This should not change unless a new + * hardware pops up. + */ +#define RTC_PORT(x) (rtc_port + (x)) +#define RTC_ALWAYS_BCD 0 + +#endif + +#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 + +/* + * Convert a physical pointer to a virtual kernel pointer for /dev/mem + * access + */ +#define xlate_dev_mem_ptr(p) __va(p) + +/* + * Convert a virtual cached pointer to an uncached pointer + */ +#define xlate_dev_kmem_ptr(p) p + +#endif /* !(__SPARC_IO_H) */ diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h new file mode 100644 index 0000000000000000000000000000000000000000..0bff078ffdd05a223060c5a06f9428108949baa5 --- /dev/null +++ b/arch/sparc/include/asm/io_64.h @@ -0,0 +1,511 @@ +#ifndef __SPARC64_IO_H +#define __SPARC64_IO_H + +#include +#include +#include + +#include /* IO address mapping routines need this */ +#include +#include + +/* PC crapola... */ +#define __SLOW_DOWN_IO do { } while (0) +#define SLOW_DOWN_IO do { } while (0) + +/* BIO layer definitions. */ +extern unsigned long kern_base, kern_size; +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) + +static inline u8 _inb(unsigned long addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u16 _inw(unsigned long addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u32 _inl(unsigned long addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline void _outb(u8 b, unsigned long addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _outw(u16 w, unsigned long addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _outl(u32 l, unsigned long addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +#define inb(__addr) (_inb((unsigned long)(__addr))) +#define inw(__addr) (_inw((unsigned long)(__addr))) +#define inl(__addr) (_inl((unsigned long)(__addr))) +#define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr))) +#define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr))) +#define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr))) + +#define inb_p(__addr) inb(__addr) +#define outb_p(__b, __addr) outb(__b, __addr) +#define inw_p(__addr) inw(__addr) +#define outw_p(__w, __addr) outw(__w, __addr) +#define inl_p(__addr) inl(__addr) +#define outl_p(__l, __addr) outl(__l, __addr) + +extern void outsb(unsigned long, const void *, unsigned long); +extern void outsw(unsigned long, const void *, unsigned long); +extern void outsl(unsigned long, const void *, unsigned long); +extern void insb(unsigned long, void *, unsigned long); +extern void insw(unsigned long, void *, unsigned long); +extern void insl(unsigned long, void *, unsigned long); + +static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) +{ + insb((unsigned long __force)port, buf, count); +} +static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) +{ + insw((unsigned long __force)port, buf, count); +} + +static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) +{ + insl((unsigned long __force)port, buf, count); +} + +static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsb((unsigned long __force)port, buf, count); +} + +static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsw((unsigned long __force)port, buf, count); +} + +static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsl((unsigned long __force)port, buf, count); +} + +/* Memory functions, same as I/O accesses on Ultra. */ +static inline u8 _readb(const volatile void __iomem *addr) +{ u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + return ret; +} + +static inline u16 _readw(const volatile void __iomem *addr) +{ u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u32 _readl(const volatile void __iomem *addr) +{ u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u64 _readq(const volatile void __iomem *addr) +{ u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline void _writeb(u8 b, volatile void __iomem *addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writew(u16 w, volatile void __iomem *addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writel(u32 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writeq(u64 q, volatile void __iomem *addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" + : /* no outputs */ + : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +#define readb(__addr) _readb(__addr) +#define readw(__addr) _readw(__addr) +#define readl(__addr) _readl(__addr) +#define readq(__addr) _readq(__addr) +#define readb_relaxed(__addr) _readb(__addr) +#define readw_relaxed(__addr) _readw(__addr) +#define readl_relaxed(__addr) _readl(__addr) +#define readq_relaxed(__addr) _readq(__addr) +#define writeb(__b, __addr) _writeb(__b, __addr) +#define writew(__w, __addr) _writew(__w, __addr) +#define writel(__l, __addr) _writel(__l, __addr) +#define writeq(__q, __addr) _writeq(__q, __addr) + +/* Now versions without byte-swapping. */ +static inline u8 _raw_readb(unsigned long addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u16 _raw_readw(unsigned long addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u32 _raw_readl(unsigned long addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u64 _raw_readq(unsigned long addr) +{ + u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline void _raw_writeb(u8 b, unsigned long addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writew(u16 w, unsigned long addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writel(u32 l, unsigned long addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writeq(u64 q, unsigned long addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" + : /* no outputs */ + : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +#define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr))) +#define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr))) +#define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr))) +#define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr))) +#define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr))) +#define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr))) +#define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr))) +#define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr))) + +/* Valid I/O Space regions are anywhere, because each PCI bus supported + * can live in an arbitrary area of the physical address range. + */ +#define IO_SPACE_LIMIT 0xffffffffffffffffUL + +/* Now, SBUS variants, only difference from PCI is that we do + * not use little-endian ASIs. + */ +static inline u8 _sbus_readb(const volatile void __iomem *addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u16 _sbus_readw(const volatile void __iomem *addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u32 _sbus_readl(const volatile void __iomem *addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u64 _sbus_readq(const volatile void __iomem *addr) +{ + u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writew(u16 w, volatile void __iomem *addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writel(u32 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +#define sbus_readb(__addr) _sbus_readb(__addr) +#define sbus_readw(__addr) _sbus_readw(__addr) +#define sbus_readl(__addr) _sbus_readl(__addr) +#define sbus_readq(__addr) _sbus_readq(__addr) +#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) +#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) +#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) +#define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr) + +static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + while(n--) { + sbus_writeb(c, dst); + dst++; + } +} + +#define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz) + +static inline void +_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + volatile void __iomem *d = dst; + + while (n--) { + writeb(c, d); + d++; + } +} + +#define memset_io(d,c,sz) _memset_io(d,c,sz) + +static inline void +_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) +{ + char *d = dst; + + while (n--) { + char tmp = readb(src); + *d++ = tmp; + src++; + } +} + +#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) + +static inline void +_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) +{ + const char *s = src; + volatile void __iomem *d = dst; + + while (n--) { + char tmp = *s++; + writeb(tmp, d); + d++; + } +} + +#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) + +#define mmiowb() + +#ifdef __KERNEL__ + +/* On sparc64 we have the whole physical IO address space accessible + * using physically addressed loads and stores, so this does nothing. + */ +static inline void __iomem *ioremap(unsigned long offset, unsigned long size) +{ + return (void __iomem *)offset; +} + +#define ioremap_nocache(X,Y) ioremap((X),(Y)) +#define ioremap_wc(X,Y) ioremap((X),(Y)) + +static inline void iounmap(volatile void __iomem *addr) +{ +} + +#define ioread8(X) readb(X) +#define ioread16(X) readw(X) +#define ioread32(X) readl(X) +#define iowrite8(val,X) writeb(val,X) +#define iowrite16(val,X) writew(val,X) +#define iowrite32(val,X) writel(val,X) + +/* Create a virtual mapping cookie for an IO port range */ +extern void __iomem *ioport_map(unsigned long port, unsigned int nr); +extern void ioport_unmap(void __iomem *); + +/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ +struct pci_dev; +extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); +extern void pci_iounmap(struct pci_dev *dev, void __iomem *); + +/* Similarly for SBUS. */ +#define sbus_ioremap(__res, __offset, __size, __name) \ +({ unsigned long __ret; \ + __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \ + __ret += (unsigned long) (__offset); \ + if (! request_region((__ret), (__size), (__name))) \ + __ret = 0UL; \ + (void __iomem *) __ret; \ +}) + +#define sbus_iounmap(__addr, __size) \ + release_region((unsigned long)(__addr), (__size)) + +/* + * Convert a physical pointer to a virtual kernel pointer for /dev/mem + * access + */ +#define xlate_dev_mem_ptr(p) __va(p) + +/* + * Convert a virtual cached pointer to an uncached pointer + */ +#define xlate_dev_kmem_ptr(p) p + +#endif + +#endif /* !(__SPARC64_IO_H) */ diff --git a/include/asm-sparc/ioctl.h b/arch/sparc/include/asm/ioctl.h similarity index 100% rename from include/asm-sparc/ioctl.h rename to arch/sparc/include/asm/ioctl.h diff --git a/arch/sparc/include/asm/ioctls.h b/arch/sparc/include/asm/ioctls.h new file mode 100644 index 0000000000000000000000000000000000000000..1fe6855c5c1896dccae71b86d359db3dd826e5be --- /dev/null +++ b/arch/sparc/include/asm/ioctls.h @@ -0,0 +1,136 @@ +#ifndef _ASM_SPARC_IOCTLS_H +#define _ASM_SPARC_IOCTLS_H + +#include + +/* Big T */ +#define TCGETA _IOR('T', 1, struct termio) +#define TCSETA _IOW('T', 2, struct termio) +#define TCSETAW _IOW('T', 3, struct termio) +#define TCSETAF _IOW('T', 4, struct termio) +#define TCSBRK _IO('T', 5) +#define TCXONC _IO('T', 6) +#define TCFLSH _IO('T', 7) +#define TCGETS _IOR('T', 8, struct termios) +#define TCSETS _IOW('T', 9, struct termios) +#define TCSETSW _IOW('T', 10, struct termios) +#define TCSETSF _IOW('T', 11, struct termios) +#define TCGETS2 _IOR('T', 12, struct termios2) +#define TCSETS2 _IOW('T', 13, struct termios2) +#define TCSETSW2 _IOW('T', 14, struct termios2) +#define TCSETSF2 _IOW('T', 15, struct termios2) + +/* Note that all the ioctls that are not available in Linux have a + * double underscore on the front to: a) avoid some programs to + * think we support some ioctls under Linux (autoconfiguration stuff) + */ +/* Little t */ +#define TIOCGETD _IOR('t', 0, int) +#define TIOCSETD _IOW('t', 1, int) +#define __TIOCHPCL _IO('t', 2) /* SunOS Specific */ +#define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */ +#define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */ +#define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */ +#define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */ +#define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */ +#define TIOCEXCL _IO('t', 13) +#define TIOCNXCL _IO('t', 14) +#define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */ +#define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */ +#define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */ +#define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */ +#define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */ +#define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */ +#define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */ +#define TIOCCONS _IO('t', 36) +#define TIOCGSOFTCAR _IOR('t', 100, int) +#define TIOCSSOFTCAR _IOW('t', 101, int) +#define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */ +#define TIOCSWINSZ _IOW('t', 103, struct winsize) +#define TIOCGWINSZ _IOR('t', 104, struct winsize) +#define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */ +#define TIOCMGET _IOR('t', 106, int) +#define TIOCMBIC _IOW('t', 107, int) +#define TIOCMBIS _IOW('t', 108, int) +#define TIOCMSET _IOW('t', 109, int) +#define TIOCSTART _IO('t', 110) +#define TIOCSTOP _IO('t', 111) +#define TIOCPKT _IOW('t', 112, int) +#define TIOCNOTTY _IO('t', 113) +#define TIOCSTI _IOW('t', 114, char) +#define TIOCOUTQ _IOR('t', 115, int) +#define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */ +#define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */ +/* 118 is the non-posix setpgrp tty ioctl */ +/* 119 is the non-posix getpgrp tty ioctl */ +#define __TIOCCDTR _IO('t', 120) /* SunOS Specific */ +#define __TIOCSDTR _IO('t', 121) /* SunOS Specific */ +#define TIOCCBRK _IO('t', 122) +#define TIOCSBRK _IO('t', 123) +#define __TIOCLGET _IOW('t', 124, int) /* SunOS Specific */ +#define __TIOCLSET _IOW('t', 125, int) /* SunOS Specific */ +#define __TIOCLBIC _IOW('t', 126, int) /* SunOS Specific */ +#define __TIOCLBIS _IOW('t', 127, int) /* SunOS Specific */ +#define __TIOCISPACE _IOR('t', 128, int) /* SunOS Specific */ +#define __TIOCISIZE _IOR('t', 129, int) /* SunOS Specific */ +#define TIOCSPGRP _IOW('t', 130, int) +#define TIOCGPGRP _IOR('t', 131, int) +#define TIOCSCTTY _IO('t', 132) +#define TIOCGSID _IOR('t', 133, int) +/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */ +#define TIOCGPTN _IOR('t', 134, unsigned int) /* Get Pty Number */ +#define TIOCSPTLCK _IOW('t', 135, int) /* Lock/unlock PTY */ + +/* Little f */ +#define FIOCLEX _IO('f', 1) +#define FIONCLEX _IO('f', 2) +#define FIOASYNC _IOW('f', 125, int) +#define FIONBIO _IOW('f', 126, int) +#define FIONREAD _IOR('f', 127, int) +#define TIOCINQ FIONREAD +#define FIOQSIZE _IOR('f', 128, loff_t) + +/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it + * someday. This is completely bogus, I know... + */ +#define __TCGETSTAT _IO('T', 200) /* Rutgers specific */ +#define __TCSETSTAT _IO('T', 201) /* Rutgers specific */ + +/* Linux specific, no SunOS equivalent. */ +#define TIOCLINUX 0x541C +#define TIOCGSERIAL 0x541E +#define TIOCSSERIAL 0x541F +#define TCSBRKP 0x5425 +#define TIOCSERCONFIG 0x5453 +#define TIOCSERGWILD 0x5454 +#define TIOCSERSWILD 0x5455 +#define TIOCGLCKTRMIOS 0x5456 +#define TIOCSLCKTRMIOS 0x5457 +#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ +#define TIOCSERGETLSR 0x5459 /* Get line status register */ +#define TIOCSERGETMULTI 0x545A /* Get multiport config */ +#define TIOCSERSETMULTI 0x545B /* Set multiport config */ +#define TIOCMIWAIT 0x545C /* Wait for change on serial input line(s) */ +#define TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */ + +/* Kernel definitions */ +#ifdef __KERNEL__ +#define TIOCGETC __TIOCGETC +#define TIOCGETP __TIOCGETP +#define TIOCGLTC __TIOCGLTC +#define TIOCSLTC __TIOCSLTC +#define TIOCSETP __TIOCSETP +#define TIOCSETN __TIOCSETN +#define TIOCSETC __TIOCSETC +#endif + +/* Used for packet mode */ +#define TIOCPKT_DATA 0 +#define TIOCPKT_FLUSHREAD 1 +#define TIOCPKT_FLUSHWRITE 2 +#define TIOCPKT_STOP 4 +#define TIOCPKT_START 8 +#define TIOCPKT_NOSTOP 16 +#define TIOCPKT_DOSTOP 32 + +#endif /* !(_ASM_SPARC_IOCTLS_H) */ diff --git a/arch/sparc/include/asm/iommu.h b/arch/sparc/include/asm/iommu.h new file mode 100644 index 0000000000000000000000000000000000000000..e650965b4a8d18224c0e68b9abd52d9bdf996fcf --- /dev/null +++ b/arch/sparc/include/asm/iommu.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_IOMMU_H +#define ___ASM_SPARC_IOMMU_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/iommu.h b/arch/sparc/include/asm/iommu_32.h similarity index 100% rename from include/asm-sparc/iommu.h rename to arch/sparc/include/asm/iommu_32.h diff --git a/include/asm-sparc64/iommu.h b/arch/sparc/include/asm/iommu_64.h similarity index 100% rename from include/asm-sparc64/iommu.h rename to arch/sparc/include/asm/iommu_64.h diff --git a/arch/sparc/include/asm/ipcbuf.h b/arch/sparc/include/asm/ipcbuf.h new file mode 100644 index 0000000000000000000000000000000000000000..17d6ef7b23a480665487925d0837ccd688833a73 --- /dev/null +++ b/arch/sparc/include/asm/ipcbuf.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_IPCBUF_H +#define ___ASM_SPARC_IPCBUF_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/ipcbuf_32.h b/arch/sparc/include/asm/ipcbuf_32.h new file mode 100644 index 0000000000000000000000000000000000000000..6387209518f2b1c7999813361213a5aad36b3b8b --- /dev/null +++ b/arch/sparc/include/asm/ipcbuf_32.h @@ -0,0 +1,31 @@ +#ifndef _SPARC_IPCBUF_H +#define _SPARC_IPCBUF_H + +/* + * The ipc64_perm structure for sparc architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit mode + * - 32-bit seq + * - 2 miscellaneous 64-bit values (so that this structure matches + * sparc64 ipc64_perm) + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid32_t uid; + __kernel_gid32_t gid; + __kernel_uid32_t cuid; + __kernel_gid32_t cgid; + unsigned short __pad1; + __kernel_mode_t mode; + unsigned short __pad2; + unsigned short seq; + unsigned long long __unused1; + unsigned long long __unused2; +}; + +#endif /* _SPARC_IPCBUF_H */ diff --git a/arch/sparc/include/asm/ipcbuf_64.h b/arch/sparc/include/asm/ipcbuf_64.h new file mode 100644 index 0000000000000000000000000000000000000000..a44b855b98db4314441216e930e2f42036714cfb --- /dev/null +++ b/arch/sparc/include/asm/ipcbuf_64.h @@ -0,0 +1,28 @@ +#ifndef _SPARC64_IPCBUF_H +#define _SPARC64_IPCBUF_H + +/* + * The ipc64_perm structure for sparc64 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit seq + * - 2 miscellaneous 64-bit values + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid_t uid; + __kernel_gid_t gid; + __kernel_uid_t cuid; + __kernel_gid_t cgid; + __kernel_mode_t mode; + unsigned short __pad1; + unsigned short seq; + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* _SPARC64_IPCBUF_H */ diff --git a/arch/sparc/include/asm/irq.h b/arch/sparc/include/asm/irq.h new file mode 100644 index 0000000000000000000000000000000000000000..3b44a6a140747d91837a415496d4b3a065b02abe --- /dev/null +++ b/arch/sparc/include/asm/irq.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_IRQ_H +#define ___ASM_SPARC_IRQ_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/irq.h b/arch/sparc/include/asm/irq_32.h similarity index 100% rename from include/asm-sparc/irq.h rename to arch/sparc/include/asm/irq_32.h diff --git a/include/asm-sparc64/irq.h b/arch/sparc/include/asm/irq_64.h similarity index 100% rename from include/asm-sparc64/irq.h rename to arch/sparc/include/asm/irq_64.h diff --git a/include/asm-ppc/irq_regs.h b/arch/sparc/include/asm/irq_regs.h similarity index 100% rename from include/asm-ppc/irq_regs.h rename to arch/sparc/include/asm/irq_regs.h diff --git a/arch/sparc/include/asm/irqflags.h b/arch/sparc/include/asm/irqflags.h new file mode 100644 index 0000000000000000000000000000000000000000..1e138632bd3f03689da1583cb6e70cd377e74698 --- /dev/null +++ b/arch/sparc/include/asm/irqflags.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_IRQFLAGS_H +#define ___ASM_SPARC_IRQFLAGS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/irqflags_32.h b/arch/sparc/include/asm/irqflags_32.h new file mode 100644 index 0000000000000000000000000000000000000000..0fca9d97d44f15bd1a3832de7e02a990e0fa6577 --- /dev/null +++ b/arch/sparc/include/asm/irqflags_32.h @@ -0,0 +1,39 @@ +/* + * include/asm/irqflags.h + * + * IRQ flags handling + * + * This file gets included from lowlevel asm headers too, to provide + * wrapped versions of the local_irq_*() APIs, based on the + * raw_local_irq_*() functions from the lowlevel headers. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +extern void raw_local_irq_restore(unsigned long); +extern unsigned long __raw_local_irq_save(void); +extern void raw_local_irq_enable(void); + +static inline unsigned long getipl(void) +{ + unsigned long retval; + + __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); + return retval; +} + +#define raw_local_save_flags(flags) ((flags) = getipl()) +#define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) +#define raw_local_irq_disable() ((void) __raw_local_irq_save()) +#define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return ((flags & PSR_PIL) != 0); +} + +#endif /* (__ASSEMBLY__) */ + +#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/arch/sparc/include/asm/irqflags_64.h b/arch/sparc/include/asm/irqflags_64.h new file mode 100644 index 0000000000000000000000000000000000000000..bb42e59162aab85829566a369255a55ce67180aa --- /dev/null +++ b/arch/sparc/include/asm/irqflags_64.h @@ -0,0 +1,89 @@ +/* + * include/asm/irqflags.h + * + * IRQ flags handling + * + * This file gets included from lowlevel asm headers too, to provide + * wrapped versions of the local_irq_*() APIs, based on the + * raw_local_irq_*() functions from the lowlevel headers. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +static inline unsigned long __raw_local_save_flags(void) +{ + unsigned long flags; + + __asm__ __volatile__( + "rdpr %%pil, %0" + : "=r" (flags) + ); + + return flags; +} + +#define raw_local_save_flags(flags) \ + do { (flags) = __raw_local_save_flags(); } while (0) + +static inline void raw_local_irq_restore(unsigned long flags) +{ + __asm__ __volatile__( + "wrpr %0, %%pil" + : /* no output */ + : "r" (flags) + : "memory" + ); +} + +static inline void raw_local_irq_disable(void) +{ + __asm__ __volatile__( + "wrpr 15, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline void raw_local_irq_enable(void) +{ + __asm__ __volatile__( + "wrpr 0, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return (flags > 0); +} + +static inline int raw_irqs_disabled(void) +{ + unsigned long flags = __raw_local_save_flags(); + + return raw_irqs_disabled_flags(flags); +} + +/* + * For spinlocks, etc: + */ +static inline unsigned long __raw_local_irq_save(void) +{ + unsigned long flags = __raw_local_save_flags(); + + raw_local_irq_disable(); + + return flags; +} + +#define raw_local_irq_save(flags) \ + do { (flags) = __raw_local_irq_save(); } while (0) + +#endif /* (__ASSEMBLY__) */ + +#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc/jsflash.h b/arch/sparc/include/asm/jsflash.h similarity index 100% rename from include/asm-sparc/jsflash.h rename to arch/sparc/include/asm/jsflash.h diff --git a/arch/sparc/include/asm/kdebug.h b/arch/sparc/include/asm/kdebug.h new file mode 100644 index 0000000000000000000000000000000000000000..8d12581ca38616458ee1a04a9e7454b6208caa4c --- /dev/null +++ b/arch/sparc/include/asm/kdebug.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_KDEBUG_H +#define ___ASM_SPARC_KDEBUG_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/kdebug.h b/arch/sparc/include/asm/kdebug_32.h similarity index 100% rename from include/asm-sparc/kdebug.h rename to arch/sparc/include/asm/kdebug_32.h diff --git a/include/asm-sparc64/kdebug.h b/arch/sparc/include/asm/kdebug_64.h similarity index 100% rename from include/asm-sparc64/kdebug.h rename to arch/sparc/include/asm/kdebug_64.h diff --git a/include/asm-sparc/kgdb.h b/arch/sparc/include/asm/kgdb.h similarity index 100% rename from include/asm-sparc/kgdb.h rename to arch/sparc/include/asm/kgdb.h diff --git a/arch/sparc/include/asm/kmap_types.h b/arch/sparc/include/asm/kmap_types.h new file mode 100644 index 0000000000000000000000000000000000000000..602f5e034f7a48afd0d85af3f72e2fbfd382d9d4 --- /dev/null +++ b/arch/sparc/include/asm/kmap_types.h @@ -0,0 +1,25 @@ +#ifndef _ASM_KMAP_TYPES_H +#define _ASM_KMAP_TYPES_H + +/* Dummy header just to define km_type. None of this + * is actually used on sparc. -DaveM + */ + +enum km_type { + KM_BOUNCE_READ, + KM_SKB_SUNRPC_DATA, + KM_SKB_DATA_SOFTIRQ, + KM_USER0, + KM_USER1, + KM_BIO_SRC_IRQ, + KM_BIO_DST_IRQ, + KM_PTE0, + KM_PTE1, + KM_IRQ0, + KM_IRQ1, + KM_SOFTIRQ0, + KM_SOFTIRQ1, + KM_TYPE_NR +}; + +#endif diff --git a/include/asm-sparc64/kprobes.h b/arch/sparc/include/asm/kprobes.h similarity index 100% rename from include/asm-sparc64/kprobes.h rename to arch/sparc/include/asm/kprobes.h diff --git a/include/asm-sparc64/ldc.h b/arch/sparc/include/asm/ldc.h similarity index 100% rename from include/asm-sparc64/ldc.h rename to arch/sparc/include/asm/ldc.h diff --git a/include/asm-sparc/linkage.h b/arch/sparc/include/asm/linkage.h similarity index 100% rename from include/asm-sparc/linkage.h rename to arch/sparc/include/asm/linkage.h diff --git a/include/asm-sparc64/lmb.h b/arch/sparc/include/asm/lmb.h similarity index 100% rename from include/asm-sparc64/lmb.h rename to arch/sparc/include/asm/lmb.h diff --git a/include/asm-sparc/local.h b/arch/sparc/include/asm/local.h similarity index 100% rename from include/asm-sparc/local.h rename to arch/sparc/include/asm/local.h diff --git a/include/asm-sparc64/lsu.h b/arch/sparc/include/asm/lsu.h similarity index 100% rename from include/asm-sparc64/lsu.h rename to arch/sparc/include/asm/lsu.h diff --git a/include/asm-sparc/machines.h b/arch/sparc/include/asm/machines.h similarity index 97% rename from include/asm-sparc/machines.h rename to arch/sparc/include/asm/machines.h index d6c6bf836206fa584bc8e8ce10405c6e08c04d6e..c28c2f2487940436f97b45073683fa4ab57cc8b4 100644 --- a/include/asm-sparc/machines.h +++ b/arch/sparc/include/asm/machines.h @@ -17,8 +17,6 @@ struct Sun_Machine_Models { */ #define NUM_SUN_MACHINES 15 -extern struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES]; - /* The machine type in the idprom area looks like this: * * --------------- diff --git a/include/asm-sparc/mbus.h b/arch/sparc/include/asm/mbus.h similarity index 98% rename from include/asm-sparc/mbus.h rename to arch/sparc/include/asm/mbus.h index bb5ae614b166fa4a80e1dfa006d19fe494331e4f..69f07a022ee6c3d21078e3dc34bd72612c4e8949 100644 --- a/include/asm-sparc/mbus.h +++ b/arch/sparc/include/asm/mbus.h @@ -43,8 +43,6 @@ extern unsigned int viking_rev, swift_rev, cypress_rev; #define HWBUG_SUPERSCALAR_BAD 0x00000080 #define HWBUG_PACINIT_BITROT 0x00000100 -extern unsigned int hwbug_bitmask; - /* First the module type values. To find out which you have, just load * the mmu control register from ASI_M_MMUREG alternate address space and * shift the value right 28 bits. diff --git a/arch/sparc/include/asm/mc146818rtc.h b/arch/sparc/include/asm/mc146818rtc.h new file mode 100644 index 0000000000000000000000000000000000000000..67ed9e3a02357260dacd8a065ef8840a9a34de56 --- /dev/null +++ b/arch/sparc/include/asm/mc146818rtc.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_MC146818RTC_H +#define ___ASM_SPARC_MC146818RTC_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/mc146818rtc.h b/arch/sparc/include/asm/mc146818rtc_32.h similarity index 100% rename from include/asm-sparc/mc146818rtc.h rename to arch/sparc/include/asm/mc146818rtc_32.h diff --git a/include/asm-sparc64/mc146818rtc.h b/arch/sparc/include/asm/mc146818rtc_64.h similarity index 100% rename from include/asm-sparc64/mc146818rtc.h rename to arch/sparc/include/asm/mc146818rtc_64.h diff --git a/include/asm-sparc64/mdesc.h b/arch/sparc/include/asm/mdesc.h similarity index 100% rename from include/asm-sparc64/mdesc.h rename to arch/sparc/include/asm/mdesc.h diff --git a/include/asm-sparc/memreg.h b/arch/sparc/include/asm/memreg.h similarity index 100% rename from include/asm-sparc/memreg.h rename to arch/sparc/include/asm/memreg.h diff --git a/include/asm-sparc/mman.h b/arch/sparc/include/asm/mman.h similarity index 100% rename from include/asm-sparc/mman.h rename to arch/sparc/include/asm/mman.h diff --git a/arch/sparc/include/asm/mmu.h b/arch/sparc/include/asm/mmu.h new file mode 100644 index 0000000000000000000000000000000000000000..88fa313887dbafff2db6f62fbb5a8c1eef805a07 --- /dev/null +++ b/arch/sparc/include/asm/mmu.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_MMU_H +#define ___ASM_SPARC_MMU_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/mmu.h b/arch/sparc/include/asm/mmu_32.h similarity index 100% rename from include/asm-sparc/mmu.h rename to arch/sparc/include/asm/mmu_32.h diff --git a/arch/sparc/include/asm/mmu_64.h b/arch/sparc/include/asm/mmu_64.h new file mode 100644 index 0000000000000000000000000000000000000000..9067dc5005352ad29df931724c6cc1655507b961 --- /dev/null +++ b/arch/sparc/include/asm/mmu_64.h @@ -0,0 +1,123 @@ +#ifndef __MMU_H +#define __MMU_H + +#include +#include +#include + +#define CTX_NR_BITS 13 + +#define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) + +/* UltraSPARC-III+ and later have a feature whereby you can + * select what page size the various Data-TLB instances in the + * chip. In order to gracefully support this, we put the version + * field in a spot outside of the areas of the context register + * where this parameter is specified. + */ +#define CTX_VERSION_SHIFT 22 +#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT) + +#define CTX_PGSZ_8KB _AC(0x0,UL) +#define CTX_PGSZ_64KB _AC(0x1,UL) +#define CTX_PGSZ_512KB _AC(0x2,UL) +#define CTX_PGSZ_4MB _AC(0x3,UL) +#define CTX_PGSZ_BITS _AC(0x7,UL) +#define CTX_PGSZ0_NUC_SHIFT 61 +#define CTX_PGSZ1_NUC_SHIFT 58 +#define CTX_PGSZ0_SHIFT 16 +#define CTX_PGSZ1_SHIFT 19 +#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ + (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) + +#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) +#define CTX_PGSZ_BASE CTX_PGSZ_8KB +#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) +#define CTX_PGSZ_BASE CTX_PGSZ_64KB +#else +#error No page size specified in kernel configuration +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define CTX_PGSZ_HUGE CTX_PGSZ_4MB +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define CTX_PGSZ_HUGE CTX_PGSZ_512KB +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define CTX_PGSZ_HUGE CTX_PGSZ_64KB +#endif + +#define CTX_PGSZ_KERN CTX_PGSZ_4MB + +/* Thus, when running on UltraSPARC-III+ and later, we use the following + * PRIMARY_CONTEXT register values for the kernel context. + */ +#define CTX_CHEETAH_PLUS_NUC \ + ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \ + (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT)) + +#define CTX_CHEETAH_PLUS_CTX0 \ + ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \ + (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT)) + +/* If you want "the TLB context number" use CTX_NR_MASK. If you + * want "the bits I program into the context registers" use + * CTX_HW_MASK. + */ +#define CTX_NR_MASK TAG_CONTEXT_BITS +#define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) + +#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) +#define CTX_VALID(__ctx) \ + (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) +#define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) +#define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) + +#ifndef __ASSEMBLY__ + +#define TSB_ENTRY_ALIGNMENT 16 + +struct tsb { + unsigned long tag; + unsigned long pte; +} __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); + +extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); +extern void tsb_flush(unsigned long ent, unsigned long tag); +extern void tsb_init(struct tsb *tsb, unsigned long size); + +struct tsb_config { + struct tsb *tsb; + unsigned long tsb_rss_limit; + unsigned long tsb_nentries; + unsigned long tsb_reg_val; + unsigned long tsb_map_vaddr; + unsigned long tsb_map_pte; +}; + +#define MM_TSB_BASE 0 + +#ifdef CONFIG_HUGETLB_PAGE +#define MM_TSB_HUGE 1 +#define MM_NUM_TSBS 2 +#else +#define MM_NUM_TSBS 1 +#endif + +typedef struct { + spinlock_t lock; + unsigned long sparc64_ctx_val; + unsigned long huge_pte_count; + struct tsb_config tsb_block[MM_NUM_TSBS]; + struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; +} mm_context_t; + +#endif /* !__ASSEMBLY__ */ + +#define TSB_CONFIG_TSB 0x00 +#define TSB_CONFIG_RSS_LIMIT 0x08 +#define TSB_CONFIG_NENTRIES 0x10 +#define TSB_CONFIG_REG_VAL 0x18 +#define TSB_CONFIG_MAP_VADDR 0x20 +#define TSB_CONFIG_MAP_PTE 0x28 + +#endif /* __MMU_H */ diff --git a/arch/sparc/include/asm/mmu_context.h b/arch/sparc/include/asm/mmu_context.h new file mode 100644 index 0000000000000000000000000000000000000000..5531346c64f9b55d90d58b07437cc5a1b842ab49 --- /dev/null +++ b/arch/sparc/include/asm/mmu_context.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_MMU_CONTEXT_H +#define ___ASM_SPARC_MMU_CONTEXT_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/mmu_context.h b/arch/sparc/include/asm/mmu_context_32.h similarity index 100% rename from include/asm-sparc/mmu_context.h rename to arch/sparc/include/asm/mmu_context_32.h diff --git a/include/asm-sparc64/mmu_context.h b/arch/sparc/include/asm/mmu_context_64.h similarity index 100% rename from include/asm-sparc64/mmu_context.h rename to arch/sparc/include/asm/mmu_context_64.h diff --git a/include/asm-sparc64/mmzone.h b/arch/sparc/include/asm/mmzone.h similarity index 100% rename from include/asm-sparc64/mmzone.h rename to arch/sparc/include/asm/mmzone.h diff --git a/arch/sparc/include/asm/module.h b/arch/sparc/include/asm/module.h new file mode 100644 index 0000000000000000000000000000000000000000..e82cf9a3e60ee53e22ba05abdb0ef2a024e8b487 --- /dev/null +++ b/arch/sparc/include/asm/module.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_MODULE_H +#define ___ASM_SPARC_MODULE_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/module.h b/arch/sparc/include/asm/module_32.h similarity index 100% rename from include/asm-sparc/module.h rename to arch/sparc/include/asm/module_32.h diff --git a/include/asm-sparc64/module.h b/arch/sparc/include/asm/module_64.h similarity index 100% rename from include/asm-sparc64/module.h rename to arch/sparc/include/asm/module_64.h diff --git a/arch/sparc/include/asm/mostek.h b/arch/sparc/include/asm/mostek.h new file mode 100644 index 0000000000000000000000000000000000000000..433be3e0a69b375d057ae4a424ab61c806703b59 --- /dev/null +++ b/arch/sparc/include/asm/mostek.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_MOSTEK_H +#define ___ASM_SPARC_MOSTEK_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/mostek_32.h b/arch/sparc/include/asm/mostek_32.h new file mode 100644 index 0000000000000000000000000000000000000000..a99590c4c5070c5c2d4f9cb28a239802727787c3 --- /dev/null +++ b/arch/sparc/include/asm/mostek_32.h @@ -0,0 +1,171 @@ +/* + * mostek.h: Describes the various Mostek time of day clock registers. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) + * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca) + */ + +#ifndef _SPARC_MOSTEK_H +#define _SPARC_MOSTEK_H + +#include +#include + +/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) + * + * Data + * Address Function + * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 + * 7ff - - - - - - - - Year 00-99 + * 7fe 0 0 0 - - - - - Month 01-12 + * 7fd 0 0 - - - - - - Date 01-31 + * 7fc 0 FT 0 0 0 - - - Day 01-07 + * 7fb KS 0 - - - - - - Hours 00-23 + * 7fa 0 - - - - - - - Minutes 00-59 + * 7f9 ST - - - - - - - Seconds 00-59 + * 7f8 W R S - - - - - Control + * + * * ST is STOP BIT + * * W is WRITE BIT + * * R is READ BIT + * * S is SIGN BIT + * * FT is FREQ TEST BIT + * * KS is KICK START BIT + */ + +/* The Mostek 48t02 real time clock and NVRAM chip. The registers + * other than the control register are in binary coded decimal. Some + * control bits also live outside the control register. + */ +#define mostek_read(_addr) readb(_addr) +#define mostek_write(_addr,_val) writeb(_val, _addr) +#define MOSTEK_EEPROM 0x0000UL +#define MOSTEK_IDPROM 0x07d8UL +#define MOSTEK_CREG 0x07f8UL +#define MOSTEK_SEC 0x07f9UL +#define MOSTEK_MIN 0x07faUL +#define MOSTEK_HOUR 0x07fbUL +#define MOSTEK_DOW 0x07fcUL +#define MOSTEK_DOM 0x07fdUL +#define MOSTEK_MONTH 0x07feUL +#define MOSTEK_YEAR 0x07ffUL + +struct mostek48t02 { + volatile char eeprom[2008]; /* This is the eeprom, don't touch! */ + struct idprom idprom; /* The idprom lives here. */ + volatile unsigned char creg; /* Control register */ + volatile unsigned char sec; /* Seconds (0-59) */ + volatile unsigned char min; /* Minutes (0-59) */ + volatile unsigned char hour; /* Hour (0-23) */ + volatile unsigned char dow; /* Day of the week (1-7) */ + volatile unsigned char dom; /* Day of the month (1-31) */ + volatile unsigned char month; /* Month of year (1-12) */ + volatile unsigned char year; /* Year (0-99) */ +}; + +extern spinlock_t mostek_lock; +extern void __iomem *mstk48t02_regs; + +/* Control register values. */ +#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ +#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ +#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ + +/* Control bits that live in the other registers. */ +#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ +#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ +#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ + +#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ +#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) + +/* Masks that define how much space each value takes up. */ +#define MSTK_SEC_MASK 0x7f +#define MSTK_MIN_MASK 0x7f +#define MSTK_HOUR_MASK 0x3f +#define MSTK_DOW_MASK 0x07 +#define MSTK_DOM_MASK 0x3f +#define MSTK_MONTH_MASK 0x1f +#define MSTK_YEAR_MASK 0xffU + +/* Binary coded decimal conversion macros. */ +#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) +#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) + +/* Generic register set and get macros for internal use. */ +#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK)) +#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0) + +/* Macros to make register access easier on our fingers. These give you + * the decimal value of the register requested if applicable. You pass + * the a pointer to a 'struct mostek48t02'. + */ +#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg) +#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC) +#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN) +#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR) +#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW) +#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM) +#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH) +#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR) + +#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC) +#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN) +#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR) +#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW) +#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM) +#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH) +#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR) + + +/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the + * same (basically) layout of the 48t02 chip except for the extra + * NVRAM on board (8 KB against the 48t02's 2 KB). + */ +struct mostek48t08 { + char offset[6*1024]; /* Magic things may be here, who knows? */ + struct mostek48t02 regs; /* Here is what we are interested in. */ +}; + +#ifdef CONFIG_SUN4 +enum sparc_clock_type { MSTK48T02, MSTK48T08, \ +INTERSIL, MSTK_INVALID }; +#else +enum sparc_clock_type { MSTK48T02, MSTK48T08, \ +MSTK_INVALID }; +#endif + +#ifdef CONFIG_SUN4 +/* intersil on a sun 4/260 code data from harris doc */ +struct intersil_dt { + volatile unsigned char int_csec; + volatile unsigned char int_hour; + volatile unsigned char int_min; + volatile unsigned char int_sec; + volatile unsigned char int_month; + volatile unsigned char int_day; + volatile unsigned char int_year; + volatile unsigned char int_dow; +}; + +struct intersil { + struct intersil_dt clk; + struct intersil_dt cmp; + volatile unsigned char int_intr_reg; + volatile unsigned char int_cmd_reg; +}; + +#define INTERSIL_STOP 0x0 +#define INTERSIL_START 0x8 +#define INTERSIL_INTR_DISABLE 0x0 +#define INTERSIL_INTR_ENABLE 0x10 +#define INTERSIL_32K 0x0 +#define INTERSIL_NORMAL 0x0 +#define INTERSIL_24H 0x4 +#define INTERSIL_INT_100HZ 0x2 + +/* end of intersil info */ +#endif + +#endif /* !(_SPARC_MOSTEK_H) */ diff --git a/include/asm-sparc64/mostek.h b/arch/sparc/include/asm/mostek_64.h similarity index 100% rename from include/asm-sparc64/mostek.h rename to arch/sparc/include/asm/mostek_64.h diff --git a/include/asm-sparc/mpmbox.h b/arch/sparc/include/asm/mpmbox.h similarity index 100% rename from include/asm-sparc/mpmbox.h rename to arch/sparc/include/asm/mpmbox.h diff --git a/arch/sparc/include/asm/msgbuf.h b/arch/sparc/include/asm/msgbuf.h new file mode 100644 index 0000000000000000000000000000000000000000..efc7cbe9788fa3fc30be20880efc0a315d0d76c4 --- /dev/null +++ b/arch/sparc/include/asm/msgbuf.h @@ -0,0 +1,38 @@ +#ifndef _SPARC_MSGBUF_H +#define _SPARC_MSGBUF_H + +/* + * The msqid64_ds structure for sparc64 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +#if defined(__sparc__) && defined(__arch64__) +# define PADDING(x) +#else +# define PADDING(x) unsigned int x; +#endif + + +struct msqid64_ds { + struct ipc64_perm msg_perm; + PADDING(__pad1) + __kernel_time_t msg_stime; /* last msgsnd time */ + PADDING(__pad2) + __kernel_time_t msg_rtime; /* last msgrcv time */ + PADDING(__pad3) + __kernel_time_t msg_ctime; /* last change time */ + unsigned long msg_cbytes; /* current number of bytes on queue */ + unsigned long msg_qnum; /* number of messages in queue */ + unsigned long msg_qbytes; /* max number of bytes on queue */ + __kernel_pid_t msg_lspid; /* pid of last msgsnd */ + __kernel_pid_t msg_lrpid; /* last receive pid */ + unsigned long __unused1; + unsigned long __unused2; +}; +#undef PADDING +#endif /* _SPARC_MSGBUF_H */ diff --git a/include/asm-sparc/msi.h b/arch/sparc/include/asm/msi.h similarity index 100% rename from include/asm-sparc/msi.h rename to arch/sparc/include/asm/msi.h diff --git a/include/asm-sparc/mutex.h b/arch/sparc/include/asm/mutex.h similarity index 100% rename from include/asm-sparc/mutex.h rename to arch/sparc/include/asm/mutex.h diff --git a/include/asm-sparc/mxcc.h b/arch/sparc/include/asm/mxcc.h similarity index 100% rename from include/asm-sparc/mxcc.h rename to arch/sparc/include/asm/mxcc.h diff --git a/include/asm-sparc64/ns87303.h b/arch/sparc/include/asm/ns87303.h similarity index 100% rename from include/asm-sparc64/ns87303.h rename to arch/sparc/include/asm/ns87303.h diff --git a/include/asm-sparc/obio.h b/arch/sparc/include/asm/obio.h similarity index 100% rename from include/asm-sparc/obio.h rename to arch/sparc/include/asm/obio.h diff --git a/include/asm-sparc/of_device.h b/arch/sparc/include/asm/of_device.h similarity index 100% rename from include/asm-sparc/of_device.h rename to arch/sparc/include/asm/of_device.h diff --git a/arch/sparc/include/asm/of_platform.h b/arch/sparc/include/asm/of_platform.h new file mode 100644 index 0000000000000000000000000000000000000000..aa699775ffba8c9dd40b56465d725f6aba224fb1 --- /dev/null +++ b/arch/sparc/include/asm/of_platform.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_OF_PLATFORM_H +#define ___ASM_SPARC_OF_PLATFORM_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/of_platform_32.h b/arch/sparc/include/asm/of_platform_32.h new file mode 100644 index 0000000000000000000000000000000000000000..723f7c9b7411dbce7f5d995b1538a26928cdd630 --- /dev/null +++ b/arch/sparc/include/asm/of_platform_32.h @@ -0,0 +1,24 @@ +#ifndef _ASM_SPARC_OF_PLATFORM_H +#define _ASM_SPARC_OF_PLATFORM_H +/* + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. + * + * Modified for Sparc by merging parts of asm/of_device.h + * by Stephen Rothwell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +/* This is just here during the transition */ +#include + +extern struct bus_type ebus_bus_type; +extern struct bus_type sbus_bus_type; + +#define of_bus_type of_platform_bus_type /* for compatibility */ + +#endif /* _ASM_SPARC_OF_PLATFORM_H */ diff --git a/arch/sparc/include/asm/of_platform_64.h b/arch/sparc/include/asm/of_platform_64.h new file mode 100644 index 0000000000000000000000000000000000000000..4f66a5f6342d88dae63419b799707fbabba1c3f2 --- /dev/null +++ b/arch/sparc/include/asm/of_platform_64.h @@ -0,0 +1,25 @@ +#ifndef _ASM_SPARC64_OF_PLATFORM_H +#define _ASM_SPARC64_OF_PLATFORM_H +/* + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. + * + * Modified for Sparc by merging parts of asm/of_device.h + * by Stephen Rothwell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +/* This is just here during the transition */ +#include + +extern struct bus_type isa_bus_type; +extern struct bus_type ebus_bus_type; +extern struct bus_type sbus_bus_type; + +#define of_bus_type of_platform_bus_type /* for compatibility */ + +#endif /* _ASM_SPARC64_OF_PLATFORM_H */ diff --git a/arch/sparc/include/asm/openprom.h b/arch/sparc/include/asm/openprom.h new file mode 100644 index 0000000000000000000000000000000000000000..aaeae905ed3f945482a27d812a7df0b245ec22a9 --- /dev/null +++ b/arch/sparc/include/asm/openprom.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_OPENPROM_H +#define ___ASM_SPARC_OPENPROM_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/openprom_32.h b/arch/sparc/include/asm/openprom_32.h new file mode 100644 index 0000000000000000000000000000000000000000..8b1649f29ed954439d996a8bbd337a9d2aa1c482 --- /dev/null +++ b/arch/sparc/include/asm/openprom_32.h @@ -0,0 +1,255 @@ +#ifndef __SPARC_OPENPROM_H +#define __SPARC_OPENPROM_H + +/* openprom.h: Prom structures and defines for access to the OPENBOOT + * prom routines and data areas. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +/* Empirical constants... */ +#define LINUX_OPPROM_MAGIC 0x10010407 + +#ifndef __ASSEMBLY__ +/* V0 prom device operations. */ +struct linux_dev_v0_funcs { + int (*v0_devopen)(char *device_str); + int (*v0_devclose)(int dev_desc); + int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_seekdev)(int dev_desc, long logical_offst, int from); +}; + +/* V2 and later prom device operations. */ +struct linux_dev_v2_funcs { + int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ + char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); + void (*v2_dumb_mem_free)(char *va, unsigned sz); + + /* To map devices into virtual I/O space. */ + char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); + void (*v2_dumb_munmap)(char *virta, unsigned size); + + int (*v2_dev_open)(char *devpath); + void (*v2_dev_close)(int d); + int (*v2_dev_read)(int d, char *buf, int nbytes); + int (*v2_dev_write)(int d, char *buf, int nbytes); + int (*v2_dev_seek)(int d, int hi, int lo); + + /* Never issued (multistage load support) */ + void (*v2_wheee2)(void); + void (*v2_wheee3)(void); +}; + +struct linux_mlist_v0 { + struct linux_mlist_v0 *theres_more; + char *start_adr; + unsigned num_bytes; +}; + +struct linux_mem_v0 { + struct linux_mlist_v0 **v0_totphys; + struct linux_mlist_v0 **v0_prommap; + struct linux_mlist_v0 **v0_available; /* What we can use */ +}; + +/* Arguments sent to the kernel from the boot prompt. */ +struct linux_arguments_v0 { + char *argv[8]; + char args[100]; + char boot_dev[2]; + int boot_dev_ctrl; + int boot_dev_unit; + int dev_partition; + char *kernel_file_name; + void *aieee1; /* XXX */ +}; + +/* V2 and up boot things. */ +struct linux_bootargs_v2 { + char **bootpath; + char **bootargs; + int *fd_stdin; + int *fd_stdout; +}; + +/* The top level PROM vector. */ +struct linux_romvec { + /* Version numbers. */ + unsigned int pv_magic_cookie; + unsigned int pv_romvers; + unsigned int pv_plugin_revision; + unsigned int pv_printrev; + + /* Version 0 memory descriptors. */ + struct linux_mem_v0 pv_v0mem; + + /* Node operations. */ + struct linux_nodeops *pv_nodeops; + + char **pv_bootstr; + struct linux_dev_v0_funcs pv_v0devops; + + char *pv_stdin; + char *pv_stdout; +#define PROMDEV_KBD 0 /* input from keyboard */ +#define PROMDEV_SCREEN 0 /* output to screen */ +#define PROMDEV_TTYA 1 /* in/out to ttya */ +#define PROMDEV_TTYB 2 /* in/out to ttyb */ + + /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ + int (*pv_getchar)(void); + void (*pv_putchar)(int ch); + + /* Non-blocking variants. */ + int (*pv_nbgetchar)(void); + int (*pv_nbputchar)(int ch); + + void (*pv_putstr)(char *str, int len); + + /* Miscellany. */ + void (*pv_reboot)(char *bootstr); + void (*pv_printf)(__const__ char *fmt, ...); + void (*pv_abort)(void); + __volatile__ int *pv_ticks; + void (*pv_halt)(void); + void (**pv_synchook)(void); + + /* Evaluate a forth string, not different proto for V0 and V2->up. */ + union { + void (*v0_eval)(int len, char *str); + void (*v2_eval)(char *str); + } pv_fortheval; + + struct linux_arguments_v0 **pv_v0bootargs; + + /* Get ether address. */ + unsigned int (*pv_enaddr)(int d, char *enaddr); + + struct linux_bootargs_v2 pv_v2bootargs; + struct linux_dev_v2_funcs pv_v2devops; + + int filler[15]; + + /* This one is sun4c/sun4 only. */ + void (*pv_setctxt)(int ctxt, char *va, int pmeg); + + /* Prom version 3 Multiprocessor routines. This stuff is crazy. + * No joke. Calling these when there is only one cpu probably + * crashes the machine, have to test this. :-) + */ + + /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context + * 'thiscontext' executing at address 'prog_counter' + */ + int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, + int thiscontext, char *prog_counter); + + /* v3_cpustop() will cause cpu 'whichcpu' to stop executing + * until a resume cpu call is made. + */ + int (*v3_cpustop)(unsigned int whichcpu); + + /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or + * resume cpu call is made. + */ + int (*v3_cpuidle)(unsigned int whichcpu); + + /* v3_cpuresume() will resume processor 'whichcpu' executing + * starting with whatever 'pc' and 'npc' were left at the + * last 'idle' or 'stop' call. + */ + int (*v3_cpuresume)(unsigned int whichcpu); +}; + +/* Routines for traversing the prom device tree. */ +struct linux_nodeops { + int (*no_nextnode)(int node); + int (*no_child)(int node); + int (*no_proplen)(int node, char *name); + int (*no_getprop)(int node, char *name, char *val); + int (*no_setprop)(int node, char *name, char *val, int len); + char * (*no_nextprop)(int node, char *name); +}; + +/* More fun PROM structures for device probing. */ +#define PROMREG_MAX 16 +#define PROMVADDR_MAX 16 +#define PROMINTR_MAX 15 + +struct linux_prom_registers { + unsigned int which_io; /* is this in OBIO space? */ + unsigned int phys_addr; /* The physical address of this register */ + unsigned int reg_size; /* How many bytes does this register take up? */ +}; + +struct linux_prom_irqs { + int pri; /* IRQ priority */ + int vector; /* This is foobar, what does it do? */ +}; + +/* Element of the "ranges" vector */ +struct linux_prom_ranges { + unsigned int ot_child_space; + unsigned int ot_child_base; /* Bus feels this */ + unsigned int ot_parent_space; + unsigned int ot_parent_base; /* CPU looks from here */ + unsigned int or_size; +}; + +/* Ranges and reg properties are a bit different for PCI. */ +struct linux_prom_pci_registers { + /* + * We don't know what information this field contain. + * We guess, PCI device function is in bits 15:8 + * So, ... + */ + unsigned int which_io; /* Let it be which_io */ + + unsigned int phys_hi; + unsigned int phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_ranges { + unsigned int child_phys_hi; /* Only certain bits are encoded here. */ + unsigned int child_phys_mid; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_assigned_addresses { + unsigned int which_io; + + unsigned int phys_hi; + unsigned int phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_ebus_ranges { + unsigned int child_phys_hi; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_mid; + unsigned int parent_phys_lo; + + unsigned int size; +}; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC_OPENPROM_H) */ diff --git a/include/asm-sparc64/openprom.h b/arch/sparc/include/asm/openprom_64.h similarity index 100% rename from include/asm-sparc64/openprom.h rename to arch/sparc/include/asm/openprom_64.h diff --git a/include/asm-sparc/openpromio.h b/arch/sparc/include/asm/openpromio.h similarity index 100% rename from include/asm-sparc/openpromio.h rename to arch/sparc/include/asm/openpromio.h diff --git a/arch/sparc/include/asm/oplib.h b/arch/sparc/include/asm/oplib.h new file mode 100644 index 0000000000000000000000000000000000000000..72e04e13a6b4059b1c0f5a0946c2510db51f6ce9 --- /dev/null +++ b/arch/sparc/include/asm/oplib.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_OPLIB_H +#define ___ASM_SPARC_OPLIB_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/oplib_32.h b/arch/sparc/include/asm/oplib_32.h new file mode 100644 index 0000000000000000000000000000000000000000..b2631da259e01ee61fc444003aaf4ba6f5d68697 --- /dev/null +++ b/arch/sparc/include/asm/oplib_32.h @@ -0,0 +1,272 @@ +/* + * oplib.h: Describes the interface and available routines in the + * Linux Prom library. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_OPLIB_H +#define __SPARC_OPLIB_H + +#include +#include +#include + +/* The master romvec pointer... */ +extern struct linux_romvec *romvec; + +/* Enumeration to describe the prom major version we have detected. */ +enum prom_major_version { + PROM_V0, /* Original sun4c V0 prom */ + PROM_V2, /* sun4c and early sun4m V2 prom */ + PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */ + PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */ + PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */ +}; + +extern enum prom_major_version prom_vers; +/* Revision, and firmware revision. */ +extern unsigned int prom_rev, prom_prev; + +/* Root node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_root_node; + +/* Pointer to prom structure containing the device tree traversal + * and usage utility functions. Only prom-lib should use these, + * users use the interface defined by the library only! + */ +extern struct linux_nodeops *prom_nodeops; + +/* The functions... */ + +/* You must call prom_init() before using any of the library services, + * preferably as early as possible. Pass it the romvec pointer. + */ +extern void prom_init(struct linux_romvec *rom_ptr); + +/* Boot argument acquisition, returns the boot command line string. */ +extern char *prom_getbootargs(void); + +/* Device utilities. */ + +/* Map and unmap devices in IO space at virtual addresses. Note that the + * virtual address you pass is a request and the prom may put your mappings + * somewhere else, so check your return value as that is where your new + * mappings really are! + * + * Another note, these are only available on V2 or higher proms! + */ +extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); +extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); + +/* Device operations. */ + +/* Open the device described by the passed string. Note, that the format + * of the string is different on V0 vs. V2->higher proms. The caller must + * know what he/she is doing! Returns the device descriptor, an int. + */ +extern int prom_devopen(char *device_string); + +/* Close a previously opened device described by the passed integer + * descriptor. + */ +extern int prom_devclose(int device_handle); + +/* Do a seek operation on the device described by the passed integer + * descriptor. + */ +extern void prom_seek(int device_handle, unsigned int seek_hival, + unsigned int seek_lowval); + +/* Miscellaneous routines, don't really fit in any category per se. */ + +/* Reboot the machine with the command line passed. */ +extern void prom_reboot(char *boot_command); + +/* Evaluate the forth string passed. */ +extern void prom_feval(char *forth_string); + +/* Enter the prom, with possibility of continuation with the 'go' + * command in newer proms. + */ +extern void prom_cmdline(void); + +/* Enter the prom, with no chance of continuation for the stand-alone + * which calls this. + */ +extern void prom_halt(void) __attribute__ ((noreturn)); + +/* Set the PROM 'sync' callback function to the passed function pointer. + * When the user gives the 'sync' command at the prom prompt while the + * kernel is still active, the prom will call this routine. + * + * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX + */ +typedef void (*sync_func_t)(void); +extern void prom_setsync(sync_func_t func_ptr); + +/* Acquire the IDPROM of the root node in the prom device tree. This + * gets passed a buffer where you would like it stuffed. The return value + * is the format type of this idprom or 0xff on error. + */ +extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); + +/* Get the prom major version. */ +extern int prom_version(void); + +/* Get the prom plugin revision. */ +extern int prom_getrev(void); + +/* Get the prom firmware revision. */ +extern int prom_getprev(void); + +/* Character operations to/from the console.... */ + +/* Non-blocking get character from console. */ +extern int prom_nbgetchar(void); + +/* Non-blocking put character to console. */ +extern int prom_nbputchar(char character); + +/* Blocking get character from console. */ +extern char prom_getchar(void); + +/* Blocking put character to console. */ +extern void prom_putchar(char character); + +/* Prom's internal routines, don't use in kernel/boot code. */ +extern void prom_printf(char *fmt, ...); +extern void prom_write(const char *buf, unsigned int len); + +/* Multiprocessor operations... */ + +/* Start the CPU with the given device tree node, context table, and context + * at the passed program counter. + */ +extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, + int context, char *program_counter); + +/* Stop the CPU with the passed device tree node. */ +extern int prom_stopcpu(int cpunode); + +/* Idle the CPU with the passed device tree node. */ +extern int prom_idlecpu(int cpunode); + +/* Re-Start the CPU with the passed device tree node. */ +extern int prom_restartcpu(int cpunode); + +/* PROM memory allocation facilities... */ + +/* Allocated at possibly the given virtual address a chunk of the + * indicated size. + */ +extern char *prom_alloc(char *virt_hint, unsigned int size); + +/* Free a previously allocated chunk. */ +extern void prom_free(char *virt_addr, unsigned int size); + +/* Sun4/sun4c specific memory-management startup hook. */ + +/* Map the passed segment in the given context at the passed + * virtual address. + */ +extern void prom_putsegment(int context, unsigned long virt_addr, + int physical_segment); + + +/* PROM device tree traversal functions... */ + +#ifdef PROMLIB_INTERNAL + +/* Internal version of prom_getchild. */ +extern int __prom_getchild(int parent_node); + +/* Internal version of prom_getsibling. */ +extern int __prom_getsibling(int node); + +#endif + + +/* Get the child node of the given node, or zero if no child exists. */ +extern int prom_getchild(int parent_node); + +/* Get the next sibling node of the given node, or zero if no further + * siblings exist. + */ +extern int prom_getsibling(int node); + +/* Get the length, at the passed node, of the given property type. + * Returns -1 on error (ie. no such property at this node). + */ +extern int prom_getproplen(int thisnode, char *property); + +/* Fetch the requested property using the given buffer. Returns + * the number of bytes the prom put into your buffer or -1 on error. + */ +extern int __must_check prom_getproperty(int thisnode, char *property, + char *prop_buffer, int propbuf_size); + +/* Acquire an integer property. */ +extern int prom_getint(int node, char *property); + +/* Acquire an integer property, with a default value. */ +extern int prom_getintdefault(int node, char *property, int defval); + +/* Acquire a boolean property, 0=FALSE 1=TRUE. */ +extern int prom_getbool(int node, char *prop); + +/* Acquire a string property, null string on error. */ +extern void prom_getstring(int node, char *prop, char *buf, int bufsize); + +/* Does the passed node have the given "name"? YES=1 NO=0 */ +extern int prom_nodematch(int thisnode, char *name); + +/* Search all siblings starting at the passed node for "name" matching + * the given string. Returns the node on success, zero on failure. + */ +extern int prom_searchsiblings(int node_start, char *name); + +/* Return the first property type, as a string, for the given node. + * Returns a null string on error. + */ +extern char *prom_firstprop(int node, char *buffer); + +/* Returns the next property after the passed property for the given + * node. Returns null string on failure. + */ +extern char *prom_nextprop(int node, char *prev_property, char *buffer); + +/* Returns phandle of the path specified */ +extern int prom_finddevice(char *name); + +/* Returns 1 if the specified node has given property. */ +extern int prom_node_has_property(int node, char *property); + +/* Set the indicated property at the given node with the passed value. + * Returns the number of bytes of your value that the prom took. + */ +extern int prom_setprop(int node, char *prop_name, char *prop_value, + int value_size); + +extern int prom_pathtoinode(char *path); +extern int prom_inst2pkg(int); + +/* Dorking with Bus ranges... */ + +/* Apply promlib probes OBIO ranges to registers. */ +extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs); + +/* Apply ranges of any prom node (and optionally parent node as well) to registers. */ +extern void prom_apply_generic_ranges(int node, int parent, + struct linux_prom_registers *sbusregs, int nregs); + +/* CPU probing helpers. */ +int cpu_find_by_instance(int instance, int *prom_node, int *mid); +int cpu_find_by_mid(int mid, int *prom_node); +int cpu_get_hwmid(int prom_node); + +extern spinlock_t prom_lock; + +#endif /* !(__SPARC_OPLIB_H) */ diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h new file mode 100644 index 0000000000000000000000000000000000000000..6d2c2ca98039b4e50d59ec092b3c0fa85868ea64 --- /dev/null +++ b/arch/sparc/include/asm/oplib_64.h @@ -0,0 +1,322 @@ +/* oplib.h: Describes the interface and available routines in the + * Linux Prom library. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __SPARC64_OPLIB_H +#define __SPARC64_OPLIB_H + +#include + +/* OBP version string. */ +extern char prom_version[]; + +/* Root node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_root_node; + +/* PROM stdin and stdout */ +extern int prom_stdin, prom_stdout; + +/* /chosen node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_chosen_node; + +/* Helper values and strings in arch/sparc64/kernel/head.S */ +extern const char prom_peer_name[]; +extern const char prom_compatible_name[]; +extern const char prom_root_compatible[]; +extern const char prom_cpu_compatible[]; +extern const char prom_finddev_name[]; +extern const char prom_chosen_path[]; +extern const char prom_cpu_path[]; +extern const char prom_getprop_name[]; +extern const char prom_mmu_name[]; +extern const char prom_callmethod_name[]; +extern const char prom_translate_name[]; +extern const char prom_map_name[]; +extern const char prom_unmap_name[]; +extern int prom_mmu_ihandle_cache; +extern unsigned int prom_boot_mapped_pc; +extern unsigned int prom_boot_mapping_mode; +extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low; + +struct linux_mlist_p1275 { + struct linux_mlist_p1275 *theres_more; + unsigned long start_adr; + unsigned long num_bytes; +}; + +struct linux_mem_p1275 { + struct linux_mlist_p1275 **p1275_totphys; + struct linux_mlist_p1275 **p1275_prommap; + struct linux_mlist_p1275 **p1275_available; /* What we can use */ +}; + +/* The functions... */ + +/* You must call prom_init() before using any of the library services, + * preferably as early as possible. Pass it the romvec pointer. + */ +extern void prom_init(void *cif_handler, void *cif_stack); + +/* Boot argument acquisition, returns the boot command line string. */ +extern char *prom_getbootargs(void); + +/* Device utilities. */ + +/* Device operations. */ + +/* Open the device described by the passed string. Note, that the format + * of the string is different on V0 vs. V2->higher proms. The caller must + * know what he/she is doing! Returns the device descriptor, an int. + */ +extern int prom_devopen(const char *device_string); + +/* Close a previously opened device described by the passed integer + * descriptor. + */ +extern int prom_devclose(int device_handle); + +/* Do a seek operation on the device described by the passed integer + * descriptor. + */ +extern void prom_seek(int device_handle, unsigned int seek_hival, + unsigned int seek_lowval); + +/* Miscellaneous routines, don't really fit in any category per se. */ + +/* Reboot the machine with the command line passed. */ +extern void prom_reboot(const char *boot_command); + +/* Evaluate the forth string passed. */ +extern void prom_feval(const char *forth_string); + +/* Enter the prom, with possibility of continuation with the 'go' + * command in newer proms. + */ +extern void prom_cmdline(void); + +/* Enter the prom, with no chance of continuation for the stand-alone + * which calls this. + */ +extern void prom_halt(void) __attribute__ ((noreturn)); + +/* Halt and power-off the machine. */ +extern void prom_halt_power_off(void) __attribute__ ((noreturn)); + +/* Set the PROM 'sync' callback function to the passed function pointer. + * When the user gives the 'sync' command at the prom prompt while the + * kernel is still active, the prom will call this routine. + * + */ +typedef int (*callback_func_t)(long *cmd); +extern void prom_setcallback(callback_func_t func_ptr); + +/* Acquire the IDPROM of the root node in the prom device tree. This + * gets passed a buffer where you would like it stuffed. The return value + * is the format type of this idprom or 0xff on error. + */ +extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); + +/* Character operations to/from the console.... */ + +/* Non-blocking get character from console. */ +extern int prom_nbgetchar(void); + +/* Non-blocking put character to console. */ +extern int prom_nbputchar(char character); + +/* Blocking get character from console. */ +extern char prom_getchar(void); + +/* Blocking put character to console. */ +extern void prom_putchar(char character); + +/* Prom's internal routines, don't use in kernel/boot code. */ +extern void prom_printf(const char *fmt, ...); +extern void prom_write(const char *buf, unsigned int len); + +/* Multiprocessor operations... */ +#ifdef CONFIG_SMP +/* Start the CPU with the given device tree node at the passed program + * counter with the given arg passed in via register %o0. + */ +extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg); + +/* Start the CPU with the given cpu ID at the passed program + * counter with the given arg passed in via register %o0. + */ +extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg); + +/* Stop the CPU with the given cpu ID. */ +extern void prom_stopcpu_cpuid(int cpuid); + +/* Stop the current CPU. */ +extern void prom_stopself(void); + +/* Idle the current CPU. */ +extern void prom_idleself(void); + +/* Resume the CPU with the passed device tree node. */ +extern void prom_resumecpu(int cpunode); +#endif + +/* Power management interfaces. */ + +/* Put the current CPU to sleep. */ +extern void prom_sleepself(void); + +/* Put the entire system to sleep. */ +extern int prom_sleepsystem(void); + +/* Initiate a wakeup event. */ +extern int prom_wakeupsystem(void); + +/* MMU and memory related OBP interfaces. */ + +/* Get unique string identifying SIMM at given physical address. */ +extern int prom_getunumber(int syndrome_code, + unsigned long phys_addr, + char *buf, int buflen); + +/* Retain physical memory to the caller across soft resets. */ +extern unsigned long prom_retain(const char *name, + unsigned long pa_low, unsigned long pa_high, + long size, long align); + +/* Load explicit I/D TLB entries into the calling processor. */ +extern long prom_itlb_load(unsigned long index, + unsigned long tte_data, + unsigned long vaddr); + +extern long prom_dtlb_load(unsigned long index, + unsigned long tte_data, + unsigned long vaddr); + +/* Map/Unmap client program address ranges. First the format of + * the mapping mode argument. + */ +#define PROM_MAP_WRITE 0x0001 /* Writable */ +#define PROM_MAP_READ 0x0002 /* Readable - sw */ +#define PROM_MAP_EXEC 0x0004 /* Executable - sw */ +#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */ +#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */ +#define PROM_MAP_SE 0x0040 /* Side-Effects */ +#define PROM_MAP_GLOB 0x0080 /* Global */ +#define PROM_MAP_IE 0x0100 /* Invert-Endianness */ +#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED) + +extern int prom_map(int mode, unsigned long size, + unsigned long vaddr, unsigned long paddr); +extern void prom_unmap(unsigned long size, unsigned long vaddr); + + +/* PROM device tree traversal functions... */ + +#ifdef PROMLIB_INTERNAL + +/* Internal version of prom_getchild. */ +extern int __prom_getchild(int parent_node); + +/* Internal version of prom_getsibling. */ +extern int __prom_getsibling(int node); + +#endif + +/* Get the child node of the given node, or zero if no child exists. */ +extern int prom_getchild(int parent_node); + +/* Get the next sibling node of the given node, or zero if no further + * siblings exist. + */ +extern int prom_getsibling(int node); + +/* Get the length, at the passed node, of the given property type. + * Returns -1 on error (ie. no such property at this node). + */ +extern int prom_getproplen(int thisnode, const char *property); + +/* Fetch the requested property using the given buffer. Returns + * the number of bytes the prom put into your buffer or -1 on error. + */ +extern int prom_getproperty(int thisnode, const char *property, + char *prop_buffer, int propbuf_size); + +/* Acquire an integer property. */ +extern int prom_getint(int node, const char *property); + +/* Acquire an integer property, with a default value. */ +extern int prom_getintdefault(int node, const char *property, int defval); + +/* Acquire a boolean property, 0=FALSE 1=TRUE. */ +extern int prom_getbool(int node, const char *prop); + +/* Acquire a string property, null string on error. */ +extern void prom_getstring(int node, const char *prop, char *buf, int bufsize); + +/* Does the passed node have the given "name"? YES=1 NO=0 */ +extern int prom_nodematch(int thisnode, const char *name); + +/* Search all siblings starting at the passed node for "name" matching + * the given string. Returns the node on success, zero on failure. + */ +extern int prom_searchsiblings(int node_start, const char *name); + +/* Return the first property type, as a string, for the given node. + * Returns a null string on error. Buffer should be at least 32B long. + */ +extern char *prom_firstprop(int node, char *buffer); + +/* Returns the next property after the passed property for the given + * node. Returns null string on failure. Buffer should be at least 32B long. + */ +extern char *prom_nextprop(int node, const char *prev_property, char *buffer); + +/* Returns 1 if the specified node has given property. */ +extern int prom_node_has_property(int node, const char *property); + +/* Returns phandle of the path specified */ +extern int prom_finddevice(const char *name); + +/* Set the indicated property at the given node with the passed value. + * Returns the number of bytes of your value that the prom took. + */ +extern int prom_setprop(int node, const char *prop_name, char *prop_value, + int value_size); + +extern int prom_pathtoinode(const char *path); +extern int prom_inst2pkg(int); +extern int prom_service_exists(const char *service_name); +extern void prom_sun4v_guest_soft_state(void); + +extern int prom_ihandle2path(int handle, char *buffer, int bufsize); + +/* Client interface level routines. */ +extern long p1275_cmd(const char *, long, ...); + +#if 0 +#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x)) +#else +#define P1275_SIZE(x) x +#endif + +/* We support at most 16 input and 1 output argument */ +#define P1275_ARG_NUMBER 0 +#define P1275_ARG_IN_STRING 1 +#define P1275_ARG_OUT_BUF 2 +#define P1275_ARG_OUT_32B 3 +#define P1275_ARG_IN_FUNCTION 4 +#define P1275_ARG_IN_BUF 5 +#define P1275_ARG_IN_64B 6 + +#define P1275_IN(x) ((x) & 0xf) +#define P1275_OUT(x) (((x) << 4) & 0xf0) +#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o)) +#define P1275_ARG(n,x) ((x) << ((n)*3 + 8)) + +#endif /* !(__SPARC64_OPLIB_H) */ diff --git a/arch/sparc/include/asm/page.h b/arch/sparc/include/asm/page.h new file mode 100644 index 0000000000000000000000000000000000000000..f21de034902596744ed071a80b0a53147b04460e --- /dev/null +++ b/arch/sparc/include/asm/page.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PAGE_H +#define ___ASM_SPARC_PAGE_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/page_32.h b/arch/sparc/include/asm/page_32.h new file mode 100644 index 0000000000000000000000000000000000000000..cf5fb70ca1c1c3f562bdeae825db12fda8f90963 --- /dev/null +++ b/arch/sparc/include/asm/page_32.h @@ -0,0 +1,160 @@ +/* + * page.h: Various defines and such for MMU operations on the Sparc for + * the Linux kernel. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_PAGE_H +#define _SPARC_PAGE_H + +#ifdef CONFIG_SUN4 +#define PAGE_SHIFT 13 +#else +#define PAGE_SHIFT 12 +#endif +#ifndef __ASSEMBLY__ +/* I have my suspicions... -DaveM */ +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#else +#define PAGE_SIZE (1 << PAGE_SHIFT) +#endif +#define PAGE_MASK (~(PAGE_SIZE-1)) + +#include + +#ifndef __ASSEMBLY__ + +#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) +#define clear_user_page(addr, vaddr, page) \ + do { clear_page(addr); \ + sparc_flush_page_to_ram(page); \ + } while (0) +#define copy_user_page(to, from, vaddr, page) \ + do { copy_page(to, from); \ + sparc_flush_page_to_ram(page); \ + } while (0) + +/* The following structure is used to hold the physical + * memory configuration of the machine. This is filled in + * prom_meminit() and is later used by mem_init() to set up + * mem_map[]. We statically allocate SPARC_PHYS_BANKS+1 of + * these structs, this is arbitrary. The entry after the + * last valid one has num_bytes==0. + */ +struct sparc_phys_banks { + unsigned long base_addr; + unsigned long num_bytes; +}; + +#define SPARC_PHYS_BANKS 32 + +extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; + +/* Cache alias structure. Entry is valid if context != -1. */ +struct cache_palias { + unsigned long vaddr; + int context; +}; + +/* passing structs on the Sparc slow us down tremendously... */ + +/* #define STRICT_MM_TYPECHECKS */ + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long iopte; } iopte_t; +typedef struct { unsigned long pmdv[16]; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long ctxd; } ctxd_t; +typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { unsigned long iopgprot; } iopgprot_t; + +#define pte_val(x) ((x).pte) +#define iopte_val(x) ((x).iopte) +#define pmd_val(x) ((x).pmdv[0]) +#define pgd_val(x) ((x).pgd) +#define ctxd_val(x) ((x).ctxd) +#define pgprot_val(x) ((x).pgprot) +#define iopgprot_val(x) ((x).iopgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __iopte(x) ((iopte_t) { (x) } ) +/* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */ +#define __pgd(x) ((pgd_t) { (x) } ) +#define __ctxd(x) ((ctxd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) +#define __iopgprot(x) ((iopgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef unsigned long pte_t; +typedef unsigned long iopte_t; +typedef struct { unsigned long pmdv[16]; } pmd_t; +typedef unsigned long pgd_t; +typedef unsigned long ctxd_t; +typedef unsigned long pgprot_t; +typedef unsigned long iopgprot_t; + +#define pte_val(x) (x) +#define iopte_val(x) (x) +#define pmd_val(x) ((x).pmdv[0]) +#define pgd_val(x) (x) +#define ctxd_val(x) (x) +#define pgprot_val(x) (x) +#define iopgprot_val(x) (x) + +#define __pte(x) (x) +#define __iopte(x) (x) +/* #define __pmd(x) (x) */ /* XXX later */ +#define __pgd(x) (x) +#define __ctxd(x) (x) +#define __pgprot(x) (x) +#define __iopgprot(x) (x) + +#endif + +typedef struct page *pgtable_t; + +extern unsigned long sparc_unmapped_base; + +BTFIXUPDEF_SETHI(sparc_unmapped_base) + +#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) + +#else /* !(__ASSEMBLY__) */ + +#define __pgprot(x) (x) + +#endif /* !(__ASSEMBLY__) */ + +#define PAGE_OFFSET 0xf0000000 +#ifndef __ASSEMBLY__ +extern unsigned long phys_base; +extern unsigned long pfn_base; +#endif +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) +#define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) + +#define virt_to_phys __pa +#define phys_to_virt __va + +#define ARCH_PFN_OFFSET (pfn_base) +#define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) + +#define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) +#define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) + +#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#include +#include + +#endif /* _SPARC_PAGE_H */ diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h new file mode 100644 index 0000000000000000000000000000000000000000..b579b910ef5123b24c1fc02fc92c1d4520e6ea9e --- /dev/null +++ b/arch/sparc/include/asm/page_64.h @@ -0,0 +1,135 @@ +#ifndef _SPARC64_PAGE_H +#define _SPARC64_PAGE_H + +#include + +#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) +#define PAGE_SHIFT 13 +#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) +#define PAGE_SHIFT 16 +#else +#error No page size specified in kernel configuration +#endif + +#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +/* Flushing for D-cache alias handling is only needed if + * the page size is smaller than 16K. + */ +#if PAGE_SHIFT < 14 +#define DCACHE_ALIASING_POSSIBLE +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define HPAGE_SHIFT 22 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define HPAGE_SHIFT 19 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define HPAGE_SHIFT 16 +#endif + +#ifdef CONFIG_HUGETLB_PAGE +#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) +#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) +#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) +#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA +#endif + +#ifndef __ASSEMBLY__ + +extern void _clear_page(void *page); +#define clear_page(X) _clear_page((void *)(X)) +struct page; +extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); +#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) +extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); + +/* Unlike sparc32, sparc64's parameter passing API is more + * sane in that structures which as small enough are passed + * in registers instead of on the stack. Thus, setting + * STRICT_MM_TYPECHECKS does not generate worse code so + * let's enable it to get the type checking. + */ + +#define STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* These are used to make use of C type-checking.. */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long iopte; } iopte_t; +typedef struct { unsigned int pmd; } pmd_t; +typedef struct { unsigned int pgd; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define iopte_val(x) ((x).iopte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __iopte(x) ((iopte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* .. while these make it easier on the compiler */ +typedef unsigned long pte_t; +typedef unsigned long iopte_t; +typedef unsigned int pmd_t; +typedef unsigned int pgd_t; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define iopte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __iopte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif /* (STRICT_MM_TYPECHECKS) */ + +typedef struct page *pgtable_t; + +#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ + (_AC(0x0000000070000000,UL)) : \ + (_AC(0xfffff80000000000,UL) + (1UL << 32UL))) + +#include + +#endif /* !(__ASSEMBLY__) */ + +/* We used to stick this into a hard-coded global register (%g4) + * but that does not make sense anymore. + */ +#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL) + +#ifndef __ASSEMBLY__ + +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) +#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) + +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) + +#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) + +#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) + +#define virt_to_phys __pa +#define phys_to_virt __va + +#endif /* !(__ASSEMBLY__) */ + +#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#include + +#endif /* _SPARC64_PAGE_H */ diff --git a/include/asm-sparc/param.h b/arch/sparc/include/asm/param.h similarity index 100% rename from include/asm-sparc/param.h rename to arch/sparc/include/asm/param.h diff --git a/include/asm-sparc64/parport.h b/arch/sparc/include/asm/parport.h similarity index 99% rename from include/asm-sparc64/parport.h rename to arch/sparc/include/asm/parport.h index e9555b246c8d0ea909cfa5c9811b844688f42ca2..7818b2523b8d95fd3b95f81bdba807528e85e439 100644 --- a/include/asm-sparc64/parport.h +++ b/arch/sparc/include/asm/parport.h @@ -59,7 +59,7 @@ static inline void free_dma(unsigned int dmanr) if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) { printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr); return; - } + } } static inline void enable_dma(unsigned int dmanr) diff --git a/include/asm-sparc/pbm.h b/arch/sparc/include/asm/pbm.h similarity index 100% rename from include/asm-sparc/pbm.h rename to arch/sparc/include/asm/pbm.h diff --git a/arch/sparc/include/asm/pci.h b/arch/sparc/include/asm/pci.h new file mode 100644 index 0000000000000000000000000000000000000000..6e14fd179335d0a24d05cc71293589b63331607f --- /dev/null +++ b/arch/sparc/include/asm/pci.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PCI_H +#define ___ASM_SPARC_PCI_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/pci_32.h b/arch/sparc/include/asm/pci_32.h new file mode 100644 index 0000000000000000000000000000000000000000..0ee949d220c06d3c3a7beec15b19ca3abf33e367 --- /dev/null +++ b/arch/sparc/include/asm/pci_32.h @@ -0,0 +1,171 @@ +#ifndef __SPARC_PCI_H +#define __SPARC_PCI_H + +#ifdef __KERNEL__ + +/* Can be used to override the logic in pci_scan_bus for skipping + * already-configured bus numbers - to be used for buggy BIOSes + * or architectures with incomplete PCI setup by the loader. + */ +#define pcibios_assign_all_busses() 0 +#define pcibios_scan_all_fns(a, b) 0 + +#define PCIBIOS_MIN_IO 0UL +#define PCIBIOS_MIN_MEM 0UL + +#define PCI_IRQ_NONE 0xffffffff + +static inline void pcibios_set_master(struct pci_dev *dev) +{ + /* No special bus mastering setup handling */ +} + +static inline void pcibios_penalize_isa_irq(int irq, int active) +{ + /* We don't do dynamic PCI IRQ allocation */ +} + +/* Dynamic DMA mapping stuff. + */ +#define PCI_DMA_BUS_IS_PHYS (0) + +#include + +struct pci_dev; + +/* Allocate and map kernel buffer using consistent mode DMA for a device. + * hwdev should be valid struct pci_dev pointer for PCI devices. + */ +extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); + +/* Free and unmap a consistent DMA buffer. + * cpu_addr is what was returned from pci_alloc_consistent, + * size must be the same as what as passed into pci_alloc_consistent, + * and likewise dma_addr must be the same as what *dma_addrp was set to. + * + * References to the memory and mappings assosciated with cpu_addr/dma_addr + * past this call are illegal. + */ +extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); + +/* Map a single buffer of the indicated size for DMA in streaming mode. + * The 32-bit bus address to use is returned. + * + * Once the device is given the dma address, the device owns this memory + * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. + */ +extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); + +/* Unmap a single streaming mode DMA translation. The dma_addr and size + * must match what was provided for in a previous pci_map_single call. All + * other usages are undefined. + * + * After this call, reads by the cpu to the buffer are guaranteed to see + * whatever the device wrote there. + */ +extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); + +/* pci_unmap_{single,page} is not a nop, thus... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +/* + * Same as above, only with pages instead of mapped addresses. + */ +extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, + unsigned long offset, size_t size, int direction); +extern void pci_unmap_page(struct pci_dev *hwdev, + dma_addr_t dma_address, size_t size, int direction); + +/* Map a set of buffers described by scatterlist in streaming + * mode for DMA. This is the scather-gather version of the + * above pci_map_single interface. Here the scatter gather list + * elements are each tagged with the appropriate dma address + * and length. They are obtained via sg_dma_{address,length}(SG). + * + * NOTE: An implementation may be able to use a smaller number of + * DMA address/length pairs than there are SG table elements. + * (for example via virtual mapping capabilities) + * The routine returns the number of addr/length pairs actually + * used, at most nents. + * + * Device ownership issues as mentioned above for pci_map_single are + * the same here. + */ +extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); + +/* Unmap a set of streaming mode DMA translations. + * Again, cpu read rules concerning calls here are the same as for + * pci_unmap_single() above. + */ +extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); + +/* Make physical memory consistent for a single + * streaming mode DMA translation after a transfer. + * + * If you perform a pci_map_single() but wish to interrogate the + * buffer using the cpu, yet do not wish to teardown the PCI dma + * mapping, you must call this function before doing so. At the + * next point you give the PCI dma address back to the card, you + * must first perform a pci_dma_sync_for_device, and then the device + * again owns the buffer. + */ +extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); +extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); + +/* Make physical memory consistent for a set of streaming + * mode DMA translations after a transfer. + * + * The same as pci_dma_sync_single_* but for a scatter-gather list, + * same rules and usage. + */ +extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); +extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); + +/* Return whether the given PCI device DMA address mask can + * be supported properly. For example, if your device can + * only drive the low 24-bits during PCI bus mastering, then + * you would pass 0x00ffffff as the mask to this function. + */ +static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) +{ + return 1; +} + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + *strat = PCI_DMA_BURST_INFINITY; + *strategy_parameter = ~0UL; +} +#endif + +#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) + +static inline int pci_dma_mapping_error(struct pci_dev *pdev, + dma_addr_t dma_addr) +{ + return (dma_addr == PCI_DMA_ERROR_CODE); +} + +struct device_node; +extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); + +#endif /* __KERNEL__ */ + +/* generic pci stuff */ +#include + +#endif /* __SPARC_PCI_H */ diff --git a/arch/sparc/include/asm/pci_64.h b/arch/sparc/include/asm/pci_64.h new file mode 100644 index 0000000000000000000000000000000000000000..4f79a54948f6913c00c8b4400a9e1849cbc7b803 --- /dev/null +++ b/arch/sparc/include/asm/pci_64.h @@ -0,0 +1,210 @@ +#ifndef __SPARC64_PCI_H +#define __SPARC64_PCI_H + +#ifdef __KERNEL__ + +#include + +/* Can be used to override the logic in pci_scan_bus for skipping + * already-configured bus numbers - to be used for buggy BIOSes + * or architectures with incomplete PCI setup by the loader. + */ +#define pcibios_assign_all_busses() 0 +#define pcibios_scan_all_fns(a, b) 0 + +#define PCIBIOS_MIN_IO 0UL +#define PCIBIOS_MIN_MEM 0UL + +#define PCI_IRQ_NONE 0xffffffff + +#define PCI_CACHE_LINE_BYTES 64 + +static inline void pcibios_set_master(struct pci_dev *dev) +{ + /* No special bus mastering setup handling */ +} + +static inline void pcibios_penalize_isa_irq(int irq, int active) +{ + /* We don't do dynamic PCI IRQ allocation */ +} + +/* The PCI address space does not equal the physical memory + * address space. The networking and block device layers use + * this boolean for bounce buffer decisions. + */ +#define PCI_DMA_BUS_IS_PHYS (0) + +static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, + dma_addr_t *dma_handle) +{ + return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); +} + +static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); +} + +static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, + size_t size, int direction) +{ + return dma_map_single(&pdev->dev, ptr, size, + (enum dma_data_direction) direction); +} + +static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, + size_t size, int direction) +{ + dma_unmap_single(&pdev->dev, dma_addr, size, + (enum dma_data_direction) direction); +} + +#define pci_map_page(dev, page, off, size, dir) \ + pci_map_single(dev, (page_address(page) + (off)), size, dir) +#define pci_unmap_page(dev,addr,sz,dir) \ + pci_unmap_single(dev,addr,sz,dir) + +/* pci_unmap_{single,page} is not a nop, thus... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, + int nents, int direction) +{ + return dma_map_sg(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, + int nents, int direction) +{ + dma_unmap_sg(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, + struct scatterlist *sg, + int nents, int direction) +{ + dma_sync_sg_for_cpu(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, + struct scatterlist *sg, + int nelems, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +/* Return whether the given PCI device DMA address mask can + * be supported properly. For example, if your device can + * only drive the low 24-bits during PCI bus mastering, then + * you would pass 0x00ffffff as the mask to this function. + */ +extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); + +/* PCI IOMMU mapping bypass support. */ + +/* PCI 64-bit addressing works for all slots on all controller + * types on sparc64. However, it requires that the device + * can drive enough of the 64 bits. + */ +#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) +#define PCI64_ADDR_BASE 0xfffc000000000000UL + +static inline int pci_dma_mapping_error(struct pci_dev *pdev, + dma_addr_t dma_addr) +{ + return dma_mapping_error(&pdev->dev, dma_addr); +} + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + unsigned long cacheline_size; + u8 byte; + + pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); + if (byte == 0) + cacheline_size = 1024; + else + cacheline_size = (int) byte * 4; + + *strat = PCI_DMA_BURST_BOUNDARY; + *strategy_parameter = cacheline_size; +} +#endif + +/* Return the index of the PCI controller for device PDEV. */ + +extern int pci_domain_nr(struct pci_bus *bus); +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return 1; +} + +/* Platform support for /proc/bus/pci/X/Y mmap()s. */ + +#define HAVE_PCI_MMAP +#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA +#define get_pci_unmapped_area get_fb_unmapped_area + +extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, + enum pci_mmap_state mmap_state, + int write_combine); + +extern void +pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, + struct resource *res); + +extern void +pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, + struct pci_bus_region *region); + +extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); + +static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) +{ + return PCI_IRQ_NONE; +} + +struct device_node; +extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); + +#define HAVE_ARCH_PCI_RESOURCE_TO_USER +extern void pci_resource_to_user(const struct pci_dev *dev, int bar, + const struct resource *rsrc, + resource_size_t *start, resource_size_t *end); +#endif /* __KERNEL__ */ + +#endif /* __SPARC64_PCI_H */ diff --git a/include/asm-sparc/pcic.h b/arch/sparc/include/asm/pcic.h similarity index 100% rename from include/asm-sparc/pcic.h rename to arch/sparc/include/asm/pcic.h diff --git a/arch/sparc/include/asm/percpu.h b/arch/sparc/include/asm/percpu.h new file mode 100644 index 0000000000000000000000000000000000000000..bfb1d19ff1bf1ed11303f2a50895d3c692601d90 --- /dev/null +++ b/arch/sparc/include/asm/percpu.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PERCPU_H +#define ___ASM_SPARC_PERCPU_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/percpu.h b/arch/sparc/include/asm/percpu_32.h similarity index 100% rename from include/asm-sparc/percpu.h rename to arch/sparc/include/asm/percpu_32.h diff --git a/include/asm-sparc64/percpu.h b/arch/sparc/include/asm/percpu_64.h similarity index 100% rename from include/asm-sparc64/percpu.h rename to arch/sparc/include/asm/percpu_64.h diff --git a/include/asm-sparc/perfctr.h b/arch/sparc/include/asm/perfctr.h similarity index 100% rename from include/asm-sparc/perfctr.h rename to arch/sparc/include/asm/perfctr.h diff --git a/arch/sparc/include/asm/pgalloc.h b/arch/sparc/include/asm/pgalloc.h new file mode 100644 index 0000000000000000000000000000000000000000..b6db1f7cdcab325d216c4549a4e3426cf73ca9b5 --- /dev/null +++ b/arch/sparc/include/asm/pgalloc.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PGALLOC_H +#define ___ASM_SPARC_PGALLOC_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/pgalloc.h b/arch/sparc/include/asm/pgalloc_32.h similarity index 100% rename from include/asm-sparc/pgalloc.h rename to arch/sparc/include/asm/pgalloc_32.h diff --git a/arch/sparc/include/asm/pgalloc_64.h b/arch/sparc/include/asm/pgalloc_64.h new file mode 100644 index 0000000000000000000000000000000000000000..5bdfa2c6e4006eb315e50a30c7df82c12b147d73 --- /dev/null +++ b/arch/sparc/include/asm/pgalloc_64.h @@ -0,0 +1,81 @@ +#ifndef _SPARC64_PGALLOC_H +#define _SPARC64_PGALLOC_H + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* Page table allocation/freeing. */ + +static inline pgd_t *pgd_alloc(struct mm_struct *mm) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) +{ + quicklist_free(0, NULL, pgd); +} + +#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) + +static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) +{ + quicklist_free(0, NULL, pmd); +} + +static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, + unsigned long address) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline pgtable_t pte_alloc_one(struct mm_struct *mm, + unsigned long address) +{ + struct page *page; + void *pg; + + pg = quicklist_alloc(0, GFP_KERNEL, NULL); + if (!pg) + return NULL; + page = virt_to_page(pg); + pgtable_page_ctor(page); + return page; +} + +static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) +{ + quicklist_free(0, NULL, pte); +} + +static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) +{ + pgtable_page_dtor(ptepage); + quicklist_free_page(0, NULL, ptepage); +} + + +#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) +#define pmd_populate(MM,PMD,PTE_PAGE) \ + pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) +#define pmd_pgtable(pmd) pmd_page(pmd) + +static inline void check_pgt_cache(void) +{ + quicklist_trim(0, NULL, 25, 16); +} + +#endif /* _SPARC64_PGALLOC_H */ diff --git a/arch/sparc/include/asm/pgtable.h b/arch/sparc/include/asm/pgtable.h new file mode 100644 index 0000000000000000000000000000000000000000..59ba6f6207322ef7533a73998f54d1b1b888fc94 --- /dev/null +++ b/arch/sparc/include/asm/pgtable.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PGTABLE_H +#define ___ASM_SPARC_PGTABLE_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/pgtable_32.h b/arch/sparc/include/asm/pgtable_32.h new file mode 100644 index 0000000000000000000000000000000000000000..08237fda8874390b267a2036564f364e79eaf1a6 --- /dev/null +++ b/arch/sparc/include/asm/pgtable_32.h @@ -0,0 +1,480 @@ +#ifndef _SPARC_PGTABLE_H +#define _SPARC_PGTABLE_H + +/* asm/pgtable.h: Defines and functions used to work + * with Sparc page tables. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __ASSEMBLY__ +#include + +#include +#include +#include +#ifdef CONFIG_SUN4 +#include +#else +#include +#endif +#include +#include +#include +#include +#include + + +struct vm_area_struct; +struct page; + +extern void load_mmu(void); +extern unsigned long calc_highpages(void); + +BTFIXUPDEF_SIMM13(pgdir_shift) +BTFIXUPDEF_SETHI(pgdir_size) +BTFIXUPDEF_SETHI(pgdir_mask) + +BTFIXUPDEF_SIMM13(ptrs_per_pmd) +BTFIXUPDEF_SIMM13(ptrs_per_pgd) +BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) + +#define pte_ERROR(e) __builtin_trap() +#define pmd_ERROR(e) __builtin_trap() +#define pgd_ERROR(e) __builtin_trap() + +BTFIXUPDEF_INT(page_none) +BTFIXUPDEF_INT(page_copy) +BTFIXUPDEF_INT(page_readonly) +BTFIXUPDEF_INT(page_kernel) + +#define PMD_SHIFT SUN4C_PMD_SHIFT +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) +#define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) +#define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) +#define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) +#define PTRS_PER_PTE 1024 +#define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) +#define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) +#define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) +#define FIRST_USER_ADDRESS 0 +#define PTE_SIZE (PTRS_PER_PTE*4) + +#define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) +extern pgprot_t PAGE_SHARED; +#define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) +#define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) + +extern unsigned long page_kernel; + +#ifdef MODULE +#define PAGE_KERNEL page_kernel +#else +#define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) +#endif + +/* Top-level page directory */ +extern pgd_t swapper_pg_dir[1024]; + +extern void paging_init(void); + +/* Page table for 0-4MB for everybody, on the Sparc this + * holds the same as on the i386. + */ +extern pte_t pg0[1024]; +extern pte_t pg1[1024]; +extern pte_t pg2[1024]; +extern pte_t pg3[1024]; + +extern unsigned long ptr_in_current_pgd; + +/* Here is a trick, since mmap.c need the initializer elements for + * protection_map[] to be constant at compile time, I set the following + * to all zeros. I set it to the real values after I link in the + * appropriate MMU page table routines at boot time. + */ +#define __P000 __pgprot(0) +#define __P001 __pgprot(0) +#define __P010 __pgprot(0) +#define __P011 __pgprot(0) +#define __P100 __pgprot(0) +#define __P101 __pgprot(0) +#define __P110 __pgprot(0) +#define __P111 __pgprot(0) + +#define __S000 __pgprot(0) +#define __S001 __pgprot(0) +#define __S010 __pgprot(0) +#define __S011 __pgprot(0) +#define __S100 __pgprot(0) +#define __S101 __pgprot(0) +#define __S110 __pgprot(0) +#define __S111 __pgprot(0) + +extern int num_contexts; + +/* First physical page can be anywhere, the following is needed so that + * va-->pa and vice versa conversions work properly without performance + * hit for all __pa()/__va() operations. + */ +extern unsigned long phys_base; +extern unsigned long pfn_base; + +/* + * BAD_PAGETABLE is used when we need a bogus page-table, while + * BAD_PAGE is used for a bogus page. + * + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern pte_t * __bad_pagetable(void); +extern pte_t __bad_page(void); +extern unsigned long empty_zero_page; + +#define BAD_PAGETABLE __bad_pagetable() +#define BAD_PAGE __bad_page() +#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) + +/* + */ +BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) +BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) + +#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) +#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) + +BTFIXUPDEF_SETHI(none_mask) +BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) +BTFIXUPDEF_CALL(void, pte_clear, pte_t *) + +static inline int pte_none(pte_t pte) +{ + return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); +} + +#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) +#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) + +BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) +BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) +BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) + +static inline int pmd_none(pmd_t pmd) +{ + return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); +} + +#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) +#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) +#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) + +BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) +BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) +BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) +BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) + +#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) +#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) +#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) +#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not.. + */ +BTFIXUPDEF_HALF(pte_writei) +BTFIXUPDEF_HALF(pte_dirtyi) +BTFIXUPDEF_HALF(pte_youngi) + +static int pte_write(pte_t pte) __attribute_const__; +static inline int pte_write(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_writei); +} + +static int pte_dirty(pte_t pte) __attribute_const__; +static inline int pte_dirty(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); +} + +static int pte_young(pte_t pte) __attribute_const__; +static inline int pte_young(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_youngi); +} + +/* + * The following only work if pte_present() is not true. + */ +BTFIXUPDEF_HALF(pte_filei) + +static int pte_file(pte_t pte) __attribute_const__; +static inline int pte_file(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_filei); +} + +static inline int pte_special(pte_t pte) +{ + return 0; +} + +/* + */ +BTFIXUPDEF_HALF(pte_wrprotecti) +BTFIXUPDEF_HALF(pte_mkcleani) +BTFIXUPDEF_HALF(pte_mkoldi) + +static pte_t pte_wrprotect(pte_t pte) __attribute_const__; +static inline pte_t pte_wrprotect(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); +} + +static pte_t pte_mkclean(pte_t pte) __attribute_const__; +static inline pte_t pte_mkclean(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); +} + +static pte_t pte_mkold(pte_t pte) __attribute_const__; +static inline pte_t pte_mkold(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); +} + +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) + +#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) +#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) +#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) + +#define pte_mkspecial(pte) (pte) + +#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) + +BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) +#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) +#define pte_page(pte) pfn_to_page(pte_pfn(pte)) + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) + +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) +BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) + +#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) +#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) +#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) + +#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) + +BTFIXUPDEF_INT(pte_modify_mask) + +static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | + pgprot_val(newprot)); +} + +#define pgd_index(address) ((address) >> PGDIR_SHIFT) + +/* to find an entry in a page-table-directory */ +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) +#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) + +/* Find an entry in the third-level page table.. */ +BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) +#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) + +/* + * This shortcut works on sun4m (and sun4d) because the nocache area is static, + * and sun4c is guaranteed to have no highmem anyway. + */ +#define pte_offset_map(d, a) pte_offset_kernel(d,a) +#define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) + +#define pte_unmap(pte) do{}while(0) +#define pte_unmap_nested(pte) do{}while(0) + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ + +BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) + +#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) +#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) + +struct seq_file; +BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) + +#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) + +/* Fault handler stuff... */ +#define FAULT_CODE_PROT 0x1 +#define FAULT_CODE_WRITE 0x2 +#define FAULT_CODE_USER 0x4 + +BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) + +#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) + +BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, + unsigned long, unsigned int) +BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) +#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) +#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) + +extern int invalid_segment; + +/* Encode and de-code a swap entry */ +BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) +BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) +BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) + +#define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) +#define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) +#define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) + +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) + +/* file-offset-in-pte helpers */ +BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); +BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); + +#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) +#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) + +/* + * This is made a constant because mm/fremap.c required a constant. + * Note that layout of these bits is different between sun4c.c and srmmu.c. + */ +#define PTE_FILE_MAX_BITS 24 + +/* + */ +struct ctx_list { + struct ctx_list *next; + struct ctx_list *prev; + unsigned int ctx_number; + struct mm_struct *ctx_mm; +}; + +extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ +extern struct ctx_list ctx_free; /* Head of free list */ +extern struct ctx_list ctx_used; /* Head of used contexts list */ + +#define NO_CONTEXT -1 + +static inline void remove_from_ctx_list(struct ctx_list *entry) +{ + entry->next->prev = entry->prev; + entry->prev->next = entry->next; +} + +static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) +{ + entry->next = head; + (entry->prev = head->prev)->next = entry; + head->prev = entry; +} +#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) +#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) + +static inline unsigned long +__get_phys (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4: + case sun4c: + return sun4c_get_pte (addr) << PAGE_SHIFT; + case sun4m: + case sun4d: + return ((srmmu_get_pte (addr) & 0xffffff00) << 4); + default: + return 0; + } +} + +static inline int +__get_iospace (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4: + case sun4c: + return -1; /* Don't check iospace on sun4c */ + case sun4m: + case sun4d: + return (srmmu_get_pte (addr) >> 28); + default: + return -1; + } +} + +extern unsigned long *sparc_valid_addr_bitmap; + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define kern_addr_valid(addr) \ + (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) + +extern int io_remap_pfn_range(struct vm_area_struct *vma, + unsigned long from, unsigned long pfn, + unsigned long size, pgprot_t prot); + +/* + * For sparc32&64, the pfn in io_remap_pfn_range() carries in + * its high 4 bits. These macros/functions put it there or get it from there. + */ +#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) +#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) +#define GET_PFN(pfn) (pfn & 0x0fffffffUL) + +#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS +#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ + flush_tlb_page(__vma, __address); \ + } \ + (sparc_cpu_model == sun4c) || __changed; \ +}) + +#include + +#endif /* !(__ASSEMBLY__) */ + +#define VMALLOC_START 0xfe600000 +/* XXX Alter this when I get around to fixing sun4c - Anton */ +#define VMALLOC_END 0xffc00000 + + +/* We provide our own get_unmapped_area to cope with VA holes for userland */ +#define HAVE_ARCH_UNMAPPED_AREA + +/* + * No page table caches to initialise + */ +#define pgtable_cache_init() do { } while (0) + +#endif /* !(_SPARC_PGTABLE_H) */ diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/sparc/include/asm/pgtable_64.h new file mode 100644 index 0000000000000000000000000000000000000000..bb9ec2cce355a56ed6822fda43fb8c9634d87c04 --- /dev/null +++ b/arch/sparc/include/asm/pgtable_64.h @@ -0,0 +1,775 @@ +/* + * pgtable.h: SpitFire page table operations. + * + * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) + * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef _SPARC64_PGTABLE_H +#define _SPARC64_PGTABLE_H + +/* This file contains the functions and defines necessary to modify and use + * the SpitFire page tables. + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). + * The page copy blockops can use 0x6000000 to 0x8000000. + * The TSB is mapped in the 0x8000000 to 0xa000000 range. + * The PROM resides in an area spanning 0xf0000000 to 0x100000000. + * The vmalloc area spans 0x100000000 to 0x200000000. + * Since modules need to be in the lowest 32-bits of the address space, + * we place them right before the OBP area from 0x10000000 to 0xf0000000. + * There is a single static kernel PMD which maps from 0x0 to address + * 0x400000000. + */ +#define TLBTEMP_BASE _AC(0x0000000006000000,UL) +#define TSBMAP_BASE _AC(0x0000000008000000,UL) +#define MODULES_VADDR _AC(0x0000000010000000,UL) +#define MODULES_LEN _AC(0x00000000e0000000,UL) +#define MODULES_END _AC(0x00000000f0000000,UL) +#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) +#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) +#define VMALLOC_START _AC(0x0000000100000000,UL) +#define VMALLOC_END _AC(0x0000000200000000,UL) +#define VMEMMAP_BASE _AC(0x0000000200000000,UL) + +#define vmemmap ((struct page *)VMEMMAP_BASE) + +/* XXX All of this needs to be rethought so we can take advantage + * XXX cheetah's full 64-bit virtual address space, ie. no more hole + * XXX in the middle like on spitfire. -DaveM + */ +/* + * Given a virtual address, the lowest PAGE_SHIFT bits determine offset + * into the page; the next higher PAGE_SHIFT-3 bits determine the pte# + * in the proper pagetable (the -3 is from the 8 byte ptes, and each page + * table is a single page long). The next higher PMD_BITS determine pmd# + * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) + * since the pmd entries are 4 bytes, and each pmd page is a single page + * long). Finally, the higher few bits determine pgde#. + */ + +/* PMD_SHIFT determines the size of the area a second-level page + * table can map + */ +#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) +#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PMD_BITS (PAGE_SHIFT - 2) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS) +#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#define PGDIR_BITS (PAGE_SHIFT - 2) + +#ifndef __ASSEMBLY__ + +#include + +/* Entries per page directory level. */ +#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) +#define PTRS_PER_PMD (1UL << PMD_BITS) +#define PTRS_PER_PGD (1UL << PGDIR_BITS) + +/* Kernel has a separate 44bit address space. */ +#define FIRST_USER_ADDRESS 0 + +#define pte_ERROR(e) __builtin_trap() +#define pmd_ERROR(e) __builtin_trap() +#define pgd_ERROR(e) __builtin_trap() + +#endif /* !(__ASSEMBLY__) */ + +/* PTE bits which are the same in SUN4U and SUN4V format. */ +#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ +#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ + +/* SUN4U pte bits... */ +#define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ +#define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */ +#define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */ +#define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */ +#define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ +#define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ +#define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ +#define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ +#define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ +#define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ +#define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */ +#define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ +#define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */ +#define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */ +#define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */ +#define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */ +#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */ +#define _PAGE_FILE_4U _AC(0x0000000000000800,UL) /* Pagecache page */ +#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ +#define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */ +#define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */ +#define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */ +#define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */ +#define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ +#define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ +#define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */ +#define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */ +#define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */ + +/* SUN4V pte bits... */ +#define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */ +#define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */ +#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */ +#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ +#define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ +#define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ +#define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ +#define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ +#define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ +#define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */ +#define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */ +#define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */ +#define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */ +#define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */ +#define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */ +#define _PAGE_FILE_4V _AC(0x0000000000000020,UL) /* Pagecache page */ +#define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */ +#define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */ +#define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */ +#define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */ +#define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */ +#define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */ +#define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */ +#define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */ +#define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */ +#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ +#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ + +#if PAGE_SHIFT == 13 +#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U +#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V +#elif PAGE_SHIFT == 16 +#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U +#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V +#else +#error Wrong PAGE_SHIFT specified +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V +#endif + +/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */ +#define __P000 __pgprot(0) +#define __P001 __pgprot(0) +#define __P010 __pgprot(0) +#define __P011 __pgprot(0) +#define __P100 __pgprot(0) +#define __P101 __pgprot(0) +#define __P110 __pgprot(0) +#define __P111 __pgprot(0) + +#define __S000 __pgprot(0) +#define __S001 __pgprot(0) +#define __S010 __pgprot(0) +#define __S011 __pgprot(0) +#define __S100 __pgprot(0) +#define __S101 __pgprot(0) +#define __S110 __pgprot(0) +#define __S111 __pgprot(0) + +#ifndef __ASSEMBLY__ + +extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long); + +extern unsigned long pte_sz_bits(unsigned long size); + +extern pgprot_t PAGE_KERNEL; +extern pgprot_t PAGE_KERNEL_LOCKED; +extern pgprot_t PAGE_COPY; +extern pgprot_t PAGE_SHARED; + +/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */ +extern unsigned long _PAGE_IE; +extern unsigned long _PAGE_E; +extern unsigned long _PAGE_CACHE; + +extern unsigned long pg_iobits; +extern unsigned long _PAGE_ALL_SZ_BITS; +extern unsigned long _PAGE_SZBITS; + +extern struct page *mem_map_zero; +#define ZERO_PAGE(vaddr) (mem_map_zero) + +/* PFNs are real physical page numbers. However, mem_map only begins to record + * per-page information starting at pfn_base. This is to handle systems where + * the first physical page in the machine is at some huge physical address, + * such as 4GB. This is common on a partitioned E10000, for example. + */ +static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) +{ + unsigned long paddr = pfn << PAGE_SHIFT; + unsigned long sz_bits; + + sz_bits = 0UL; + if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) { + __asm__ __volatile__( + "\n661: sethi %%uhi(%1), %0\n" + " sllx %0, 32, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " nop\n" + " .previous\n" + : "=r" (sz_bits) + : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V)); + } + return __pte(paddr | sz_bits | pgprot_val(prot)); +} +#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) + +/* This one can be done with two shifts. */ +static inline unsigned long pte_pfn(pte_t pte) +{ + unsigned long ret; + + __asm__ __volatile__( + "\n661: sllx %1, %2, %0\n" + " srlx %0, %3, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sllx %1, %4, %0\n" + " srlx %0, %5, %0\n" + " .previous\n" + : "=r" (ret) + : "r" (pte_val(pte)), + "i" (21), "i" (21 + PAGE_SHIFT), + "i" (8), "i" (8 + PAGE_SHIFT)); + + return ret; +} +#define pte_page(x) pfn_to_page(pte_pfn(x)) + +static inline pte_t pte_modify(pte_t pte, pgprot_t prot) +{ + unsigned long mask, tmp; + + /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347) + * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8) + * + * Even if we use negation tricks the result is still a 6 + * instruction sequence, so don't try to play fancy and just + * do the most straightforward implementation. + * + * Note: We encode this into 3 sun4v 2-insn patch sequences. + */ + + __asm__ __volatile__( + "\n661: sethi %%uhi(%2), %1\n" + " sethi %%hi(%2), %0\n" + "\n662: or %1, %%ulo(%2), %1\n" + " or %0, %%lo(%2), %0\n" + "\n663: sllx %1, 32, %1\n" + " or %0, %1, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%3), %1\n" + " sethi %%hi(%3), %0\n" + " .word 662b\n" + " or %1, %%ulo(%3), %1\n" + " or %0, %%lo(%3), %0\n" + " .word 663b\n" + " sllx %1, 32, %1\n" + " or %0, %1, %0\n" + " .previous\n" + : "=r" (mask), "=r" (tmp) + : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | + _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | + _PAGE_SZBITS_4U), + "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | + _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | + _PAGE_SZBITS_4V)); + + return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); +} + +static inline pte_t pgoff_to_pte(unsigned long off) +{ + off <<= PAGE_SHIFT; + + __asm__ __volatile__( + "\n661: or %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " or %0, %3, %0\n" + " .previous\n" + : "=r" (off) + : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); + + return __pte(off); +} + +static inline pgprot_t pgprot_noncached(pgprot_t prot) +{ + unsigned long val = pgprot_val(prot); + + __asm__ __volatile__( + "\n661: andn %0, %2, %0\n" + " or %0, %3, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " andn %0, %4, %0\n" + " or %0, %5, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), + "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V)); + + return __pgprot(val); +} +/* Various pieces of code check for platform support by ifdef testing + * on "pgprot_noncached". That's broken and should be fixed, but for + * now... + */ +#define pgprot_noncached pgprot_noncached + +#ifdef CONFIG_HUGETLB_PAGE +static inline pte_t pte_mkhuge(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: sethi %%uhi(%1), %0\n" + " sllx %0, 32, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " nop\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V)); + + return __pte(pte_val(pte) | mask); +} +#endif + +static inline pte_t pte_mkdirty(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: or %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " or %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), + "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkclean(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: andn %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " andn %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), + "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkwrite(pte_t pte) +{ + unsigned long val = pte_val(pte), mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); + + return __pte(val | mask); +} + +static inline pte_t pte_wrprotect(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: andn %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " andn %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), + "i" (_PAGE_WRITE_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkold(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + mask |= _PAGE_R; + + return __pte(pte_val(pte) & ~mask); +} + +static inline pte_t pte_mkyoung(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + mask |= _PAGE_R; + + return __pte(pte_val(pte) | mask); +} + +static inline pte_t pte_mkspecial(pte_t pte) +{ + return pte; +} + +static inline unsigned long pte_young(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_dirty(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_write(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_exec(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: sethi %%hi(%1), %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_file(pte_t pte) +{ + unsigned long val = pte_val(pte); + + __asm__ __volatile__( + "\n661: and %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " and %0, %3, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); + + return val; +} + +static inline unsigned long pte_present(pte_t pte) +{ + unsigned long val = pte_val(pte); + + __asm__ __volatile__( + "\n661: and %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " and %0, %3, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); + + return val; +} + +static inline int pte_special(pte_t pte) +{ + return 0; +} + +#define pmd_set(pmdp, ptep) \ + (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL)) +#define pud_set(pudp, pmdp) \ + (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL)) +#define __pmd_page(pmd) \ + ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL))) +#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) +#define pud_page_vaddr(pud) \ + ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL))) +#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) +#define pmd_none(pmd) (!pmd_val(pmd)) +#define pmd_bad(pmd) (0) +#define pmd_present(pmd) (pmd_val(pmd) != 0U) +#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U) +#define pud_none(pud) (!pud_val(pud)) +#define pud_bad(pud) (0) +#define pud_present(pud) (pud_val(pud) != 0U) +#define pud_clear(pudp) (pud_val(*(pudp)) = 0U) + +/* Same in both SUN4V and SUN4U. */ +#define pte_none(pte) (!pte_val(pte)) + +/* to find an entry in a page-table-directory. */ +#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(pudp, address) \ + ((pmd_t *) pud_page_vaddr(*(pudp)) + \ + (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))) + +/* Find an entry in the third-level page table.. */ +#define pte_index(dir, address) \ + ((pte_t *) __pmd_page(*(dir)) + \ + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) +#define pte_offset_kernel pte_index +#define pte_offset_map pte_index +#define pte_offset_map_nested pte_index +#define pte_unmap(pte) do { } while (0) +#define pte_unmap_nested(pte) do { } while (0) + +/* Actual page table PTE updates. */ +extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig); + +static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) +{ + pte_t orig = *ptep; + + *ptep = pte; + + /* It is more efficient to let flush_tlb_kernel_range() + * handle init_mm tlb flushes. + * + * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U + * and SUN4V pte layout, so this inline test is fine. + */ + if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID)) + tlb_batch_add(mm, addr, ptep, orig); +} + +#define pte_clear(mm,addr,ptep) \ + set_pte_at((mm), (addr), (ptep), __pte(0UL)) + +#ifdef DCACHE_ALIASING_POSSIBLE +#define __HAVE_ARCH_MOVE_PTE +#define move_pte(pte, prot, old_addr, new_addr) \ +({ \ + pte_t newpte = (pte); \ + if (tlb_type != hypervisor && pte_present(pte)) { \ + unsigned long this_pfn = pte_pfn(pte); \ + \ + if (pfn_valid(this_pfn) && \ + (((old_addr) ^ (new_addr)) & (1 << 13))) \ + flush_dcache_page_all(current->mm, \ + pfn_to_page(this_pfn)); \ + } \ + newpte; \ +}) +#endif + +extern pgd_t swapper_pg_dir[2048]; +extern pmd_t swapper_low_pmd_dir[2048]; + +extern void paging_init(void); +extern unsigned long find_ecache_flush_span(unsigned long size); + +/* These do nothing with the way I have things setup. */ +#define mmu_lockarea(vaddr, len) (vaddr) +#define mmu_unlockarea(vaddr, len) do { } while(0) + +struct vm_area_struct; +extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); + +/* Encode and de-code a swap entry */ +#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) +#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) +#define __swp_entry(type, offset) \ + ( (swp_entry_t) \ + { \ + (((long)(type) << PAGE_SHIFT) | \ + ((long)(offset) << (PAGE_SHIFT + 8UL))) \ + } ) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) + +/* File offset in PTE support. */ +extern unsigned long pte_file(pte_t); +#define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT) +extern pte_t pgoff_to_pte(unsigned long); +#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) + +extern unsigned long *sparc64_valid_addr_bitmap; + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define kern_addr_valid(addr) \ + (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) + +extern int page_in_phys_avail(unsigned long paddr); + +extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, + unsigned long pfn, + unsigned long size, pgprot_t prot); + +/* + * For sparc32&64, the pfn in io_remap_pfn_range() carries in + * its high 4 bits. These macros/functions put it there or get it from there. + */ +#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) +#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) +#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) + +#include + +/* We provide our own get_unmapped_area to cope with VA holes and + * SHM area cache aliasing for userland. + */ +#define HAVE_ARCH_UNMAPPED_AREA +#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN + +/* We provide a special get_unmapped_area for framebuffer mmaps to try and use + * the largest alignment possible such that larget PTEs can be used. + */ +extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, + unsigned long, unsigned long, + unsigned long); +#define HAVE_ARCH_FB_UNMAPPED_AREA + +extern void pgtable_cache_init(void); +extern void sun4v_register_fault_status(void); +extern void sun4v_ktsb_register(void); +extern void __init cheetah_ecache_flush_init(void); +extern void sun4v_patch_tlb_handlers(void); + +extern unsigned long cmdline_memory_size; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_SPARC64_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtsrmmu.h b/arch/sparc/include/asm/pgtsrmmu.h similarity index 100% rename from include/asm-sparc/pgtsrmmu.h rename to arch/sparc/include/asm/pgtsrmmu.h diff --git a/include/asm-sparc/pgtsun4.h b/arch/sparc/include/asm/pgtsun4.h similarity index 100% rename from include/asm-sparc/pgtsun4.h rename to arch/sparc/include/asm/pgtsun4.h diff --git a/include/asm-sparc/pgtsun4c.h b/arch/sparc/include/asm/pgtsun4c.h similarity index 100% rename from include/asm-sparc/pgtsun4c.h rename to arch/sparc/include/asm/pgtsun4c.h diff --git a/include/asm-sparc64/pil.h b/arch/sparc/include/asm/pil.h similarity index 95% rename from include/asm-sparc64/pil.h rename to arch/sparc/include/asm/pil.h index eaac842d88c39fc646614ee9fd6e1cc6eaee3555..71819bb943fc7e863f0a82cd8e4ff11f2b324c74 100644 --- a/include/asm-sparc64/pil.h +++ b/arch/sparc/include/asm/pil.h @@ -17,5 +17,6 @@ #define PIL_SMP_CAPTURE 3 #define PIL_SMP_CTX_NEW_VERSION 4 #define PIL_DEVICE_IRQ 5 +#define PIL_SMP_CALL_FUNC_SNGL 6 #endif /* !(_SPARC64_PIL_H) */ diff --git a/include/asm-sparc/poll.h b/arch/sparc/include/asm/poll.h similarity index 100% rename from include/asm-sparc/poll.h rename to arch/sparc/include/asm/poll.h diff --git a/arch/sparc/include/asm/posix_types.h b/arch/sparc/include/asm/posix_types.h new file mode 100644 index 0000000000000000000000000000000000000000..03a0e091a884a1909e5f2e7fb8a03e01a0079370 --- /dev/null +++ b/arch/sparc/include/asm/posix_types.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_POSIX_TYPES_H +#define ___ASM_SPARC_POSIX_TYPES_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/posix_types_32.h b/arch/sparc/include/asm/posix_types_32.h new file mode 100644 index 0000000000000000000000000000000000000000..6bb6eb1ca0f23534a53dda8d353fc268dc6363dc --- /dev/null +++ b/arch/sparc/include/asm/posix_types_32.h @@ -0,0 +1,118 @@ +#ifndef __ARCH_SPARC_POSIX_TYPES_H +#define __ARCH_SPARC_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef long int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_umode_t; +typedef short __kernel_nlink_t; +typedef long __kernel_daddr_t; +typedef long __kernel_off_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +typedef unsigned short __kernel_old_dev_t; +typedef int __kernel_clockid_t; +typedef int __kernel_timer_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { + int val[2]; +} __kernel_fsid_t; + +#if defined(__KERNEL__) + +#undef __FD_SET +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] |= (1UL<<_rem); +} + +#undef __FD_CLR +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); +} + +#undef __FD_ISSET +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; +} + +/* + * This will unroll the loop for the normal constant cases (8 or 32 longs, + * for 256 and 1024-bit fd_sets respectively) + */ +#undef __FD_ZERO +static inline void __FD_ZERO(__kernel_fd_set *p) +{ + unsigned long *tmp = p->fds_bits; + int i; + + if (__builtin_constant_p(__FDSET_LONGS)) { + switch (__FDSET_LONGS) { + case 32: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; + tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; + tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; + tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; + return; + case 16: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + return; + case 8: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + return; + case 4: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + return; + } + } + i = __FDSET_LONGS; + while (i) { + i--; + *tmp = 0; + tmp++; + } +} + +#endif /* defined(__KERNEL__) */ + +#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ diff --git a/arch/sparc/include/asm/posix_types_64.h b/arch/sparc/include/asm/posix_types_64.h new file mode 100644 index 0000000000000000000000000000000000000000..ba8f932957639c10bddd472e502afc053efaf59f --- /dev/null +++ b/arch/sparc/include/asm/posix_types_64.h @@ -0,0 +1,122 @@ +#ifndef __ARCH_SPARC64_POSIX_TYPES_H +#define __ARCH_SPARC64_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_clock_t; +typedef int __kernel_pid_t; +typedef int __kernel_ipc_pid_t; +typedef unsigned int __kernel_uid_t; +typedef unsigned int __kernel_gid_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned int __kernel_mode_t; +typedef unsigned short __kernel_umode_t; +typedef unsigned int __kernel_nlink_t; +typedef int __kernel_daddr_t; +typedef long __kernel_off_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef int __kernel_clockid_t; +typedef int __kernel_timer_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +typedef __kernel_uid_t __kernel_uid32_t; +typedef __kernel_gid_t __kernel_gid32_t; + +typedef unsigned int __kernel_old_dev_t; + +/* Note this piece of asymmetry from the v9 ABI. */ +typedef int __kernel_suseconds_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { + int val[2]; +} __kernel_fsid_t; + +#if defined(__KERNEL__) + +#undef __FD_SET +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] |= (1UL<<_rem); +} + +#undef __FD_CLR +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); +} + +#undef __FD_ISSET +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; +} + +/* + * This will unroll the loop for the normal constant cases (8 or 32 longs, + * for 256 and 1024-bit fd_sets respectively) + */ +#undef __FD_ZERO +static inline void __FD_ZERO(__kernel_fd_set *p) +{ + unsigned long *tmp = p->fds_bits; + int i; + + if (__builtin_constant_p(__FDSET_LONGS)) { + switch (__FDSET_LONGS) { + case 32: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; + tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; + tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; + tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; + return; + case 16: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + return; + case 8: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + return; + case 4: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + return; + } + } + i = __FDSET_LONGS; + while (i) { + i--; + *tmp = 0; + tmp++; + } +} + +#endif /* defined(__KERNEL__) */ + +#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */ diff --git a/arch/sparc/include/asm/processor.h b/arch/sparc/include/asm/processor.h new file mode 100644 index 0000000000000000000000000000000000000000..9da9646bf6c6b326ee6d6f47b1d60bd4dd970453 --- /dev/null +++ b/arch/sparc/include/asm/processor.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PROCESSOR_H +#define ___ASM_SPARC_PROCESSOR_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/processor_32.h b/arch/sparc/include/asm/processor_32.h new file mode 100644 index 0000000000000000000000000000000000000000..2ae67a2e7f3a877c21644cbd83adac3e235ae522 --- /dev/null +++ b/arch/sparc/include/asm/processor_32.h @@ -0,0 +1,129 @@ +/* include/asm/processor.h + * + * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __ASM_SPARC_PROCESSOR_H +#define __ASM_SPARC_PROCESSOR_H + +/* + * Sparc32 implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) + +#include +#include +#include +#include +#include +#include + +/* + * The sparc has no problems with write protection + */ +#define wp_works_ok 1 +#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ + +/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... + * That one page is used to protect kernel from intruders, so that + * we can make our access_ok test faster + */ +#define TASK_SIZE PAGE_OFFSET +#ifdef __KERNEL__ +#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) +#define STACK_TOP_MAX STACK_TOP +#endif /* __KERNEL__ */ + +struct task_struct; + +#ifdef __KERNEL__ +struct fpq { + unsigned long *insn_addr; + unsigned long insn; +}; +#endif + +typedef struct { + int seg; +} mm_segment_t; + +/* The Sparc processor specific thread struct. */ +struct thread_struct { + struct pt_regs *kregs; + unsigned int _pad1; + + /* Special child fork kpsr/kwim values. */ + unsigned long fork_kpsr __attribute__ ((aligned (8))); + unsigned long fork_kwim; + + /* Floating point regs */ + unsigned long float_regs[32] __attribute__ ((aligned (8))); + unsigned long fsr; + unsigned long fpqdepth; + struct fpq fpqueue[16]; + unsigned long flags; + mm_segment_t current_ds; +}; + +#define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ +#define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ + +#define INIT_THREAD { \ + .flags = SPARC_FLAG_KTHREAD, \ + .current_ds = KERNEL_DS, \ +} + +/* Return saved PC of a blocked thread. */ +extern unsigned long thread_saved_pc(struct task_struct *t); + +/* Do necessary setup to start up a newly executed thread. */ +static inline void start_thread(struct pt_regs * regs, unsigned long pc, + unsigned long sp) +{ + register unsigned long zero asm("g1"); + + regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; + regs->pc = ((pc & (~3)) - 4); + regs->npc = regs->pc + 4; + regs->y = 0; + zero = 0; + __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" + "std\t%%g0, [%0 + %3 + 0x08]\n\t" + "std\t%%g0, [%0 + %3 + 0x10]\n\t" + "std\t%%g0, [%0 + %3 + 0x18]\n\t" + "std\t%%g0, [%0 + %3 + 0x20]\n\t" + "std\t%%g0, [%0 + %3 + 0x28]\n\t" + "std\t%%g0, [%0 + %3 + 0x30]\n\t" + "st\t%1, [%0 + %3 + 0x38]\n\t" + "st\t%%g0, [%0 + %3 + 0x3c]" + : /* no outputs */ + : "r" (regs), + "r" (sp - sizeof(struct reg_window)), + "r" (zero), + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) + : "memory"); +} + +/* Free all resources held by a thread. */ +#define release_thread(tsk) do { } while(0) +extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +/* Prepare to copy thread state - unlazy all lazy status */ +#define prepare_to_copy(tsk) do { } while (0) + +extern unsigned long get_wchan(struct task_struct *); + +#define task_pt_regs(tsk) ((tsk)->thread.kregs) +#define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) +#define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) + +#ifdef __KERNEL__ + +extern struct task_struct *last_task_used_math; + +#define cpu_relax() barrier() + +#endif + +#endif /* __ASM_SPARC_PROCESSOR_H */ diff --git a/arch/sparc/include/asm/processor_64.h b/arch/sparc/include/asm/processor_64.h new file mode 100644 index 0000000000000000000000000000000000000000..137a6bd72fc805f9ddfd4f4a12acd3fdf7199c78 --- /dev/null +++ b/arch/sparc/include/asm/processor_64.h @@ -0,0 +1,237 @@ +/* + * include/asm/processor.h + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __ASM_SPARC64_PROCESSOR_H +#define __ASM_SPARC64_PROCESSOR_H + +/* + * Sparc64 implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) + +#include +#include +#include +#include + +/* The sparc has no problems with write protection */ +#define wp_works_ok 1 +#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ + +/* + * User lives in his very own context, and cannot reference us. Note + * that TASK_SIZE is a misnomer, it really gives maximum user virtual + * address that the kernel will allocate out. + * + * XXX No longer using virtual page tables, kill this upper limit... + */ +#define VA_BITS 44 +#ifndef __ASSEMBLY__ +#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) +#else +#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) +#endif + +#define TASK_SIZE ((unsigned long)-VPTE_SIZE) +#define TASK_SIZE_OF(tsk) \ + (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ + (1UL << 32UL) : TASK_SIZE) +#ifdef __KERNEL__ + +#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) +#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) + +#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ + STACK_TOP32 : STACK_TOP64) + +#define STACK_TOP_MAX STACK_TOP64 + +#endif + +#ifndef __ASSEMBLY__ + +typedef struct { + unsigned char seg; +} mm_segment_t; + +/* The Sparc processor specific thread struct. */ +/* XXX This should die, everything can go into thread_info now. */ +struct thread_struct { +#ifdef CONFIG_DEBUG_SPINLOCK + /* How many spinlocks held by this thread. + * Used with spin lock debugging to catch tasks + * sleeping illegally with locks held. + */ + int smp_lock_count; + unsigned int smp_lock_pc; +#else + int dummy; /* f'in gcc bug... */ +#endif +}; + +#endif /* !(__ASSEMBLY__) */ + +#ifndef CONFIG_DEBUG_SPINLOCK +#define INIT_THREAD { \ + 0, \ +} +#else /* CONFIG_DEBUG_SPINLOCK */ +#define INIT_THREAD { \ +/* smp_lock_count, smp_lock_pc, */ \ + 0, 0, \ +} +#endif /* !(CONFIG_DEBUG_SPINLOCK) */ + +#ifndef __ASSEMBLY__ + +#include + +/* Return saved PC of a blocked thread. */ +struct task_struct; +extern unsigned long thread_saved_pc(struct task_struct *); + +/* On Uniprocessor, even in RMO processes see TSO semantics */ +#ifdef CONFIG_SMP +#define TSTATE_INITIAL_MM TSTATE_TSO +#else +#define TSTATE_INITIAL_MM TSTATE_RMO +#endif + +/* Do necessary setup to start up a newly executed thread. */ +#define start_thread(regs, pc, sp) \ +do { \ + unsigned long __asi = ASI_PNF; \ + regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ + regs->tpc = ((pc & (~3)) - 4); \ + regs->tnpc = regs->tpc + 4; \ + regs->y = 0; \ + set_thread_wstate(1 << 3); \ + if (current_thread_info()->utraps) { \ + if (*(current_thread_info()->utraps) < 2) \ + kfree(current_thread_info()->utraps); \ + else \ + (*(current_thread_info()->utraps))--; \ + current_thread_info()->utraps = NULL; \ + } \ + __asm__ __volatile__( \ + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ + "stx %1, [%0 + %2 + 0x70]\n\t" \ + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ + "wrpr %%g0, (1 << 3), %%wstate\n\t" \ + : \ + : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ +} while (0) + +#define start_thread32(regs, pc, sp) \ +do { \ + unsigned long __asi = ASI_PNF; \ + pc &= 0x00000000ffffffffUL; \ + sp &= 0x00000000ffffffffUL; \ + regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ + regs->tpc = ((pc & (~3)) - 4); \ + regs->tnpc = regs->tpc + 4; \ + regs->y = 0; \ + set_thread_wstate(2 << 3); \ + if (current_thread_info()->utraps) { \ + if (*(current_thread_info()->utraps) < 2) \ + kfree(current_thread_info()->utraps); \ + else \ + (*(current_thread_info()->utraps))--; \ + current_thread_info()->utraps = NULL; \ + } \ + __asm__ __volatile__( \ + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ + "stx %1, [%0 + %2 + 0x70]\n\t" \ + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ + "wrpr %%g0, (2 << 3), %%wstate\n\t" \ + : \ + : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ +} while (0) + +/* Free all resources held by a thread. */ +#define release_thread(tsk) do { } while (0) + +/* Prepare to copy thread state - unlazy all lazy status */ +#define prepare_to_copy(tsk) do { } while (0) + +extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +extern unsigned long get_wchan(struct task_struct *task); + +#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) + +#define cpu_relax() barrier() + +/* Prefetch support. This is tuned for UltraSPARC-III and later. + * UltraSPARC-I will treat these as nops, and UltraSPARC-II has + * a shallower prefetch queue than later chips. + */ +#define ARCH_HAS_PREFETCH +#define ARCH_HAS_PREFETCHW +#define ARCH_HAS_SPINLOCK_PREFETCH + +static inline void prefetch(const void *x) +{ + /* We do not use the read prefetch mnemonic because that + * prefetches into the prefetch-cache which only is accessible + * by floating point operations in UltraSPARC-III and later. + * By contrast, "#one_write" prefetches into the L2 cache + * in shared state. + */ + __asm__ __volatile__("prefetch [%0], #one_write" + : /* no outputs */ + : "r" (x)); +} + +static inline void prefetchw(const void *x) +{ + /* The most optimal prefetch to use for writes is + * "#n_writes". This brings the cacheline into the + * L2 cache in "owned" state. + */ + __asm__ __volatile__("prefetch [%0], #n_writes" + : /* no outputs */ + : "r" (x)); +} + +#define spin_lock_prefetch(x) prefetchw(x) + +#define HAVE_ARCH_PICK_MMAP_LAYOUT + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ diff --git a/include/asm-sparc/prom.h b/arch/sparc/include/asm/prom.h similarity index 100% rename from include/asm-sparc/prom.h rename to arch/sparc/include/asm/prom.h diff --git a/include/asm-sparc/psr.h b/arch/sparc/include/asm/psr.h similarity index 100% rename from include/asm-sparc/psr.h rename to arch/sparc/include/asm/psr.h diff --git a/include/asm-sparc64/psrcompat.h b/arch/sparc/include/asm/psrcompat.h similarity index 100% rename from include/asm-sparc64/psrcompat.h rename to arch/sparc/include/asm/psrcompat.h diff --git a/include/asm-sparc64/pstate.h b/arch/sparc/include/asm/pstate.h similarity index 100% rename from include/asm-sparc64/pstate.h rename to arch/sparc/include/asm/pstate.h diff --git a/arch/sparc/include/asm/ptrace.h b/arch/sparc/include/asm/ptrace.h new file mode 100644 index 0000000000000000000000000000000000000000..6dcbe2eed2e201a4c8bc980dcb15b868474fbcf3 --- /dev/null +++ b/arch/sparc/include/asm/ptrace.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_PTRACE_H +#define ___ASM_SPARC_PTRACE_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/ptrace_32.h b/arch/sparc/include/asm/ptrace_32.h new file mode 100644 index 0000000000000000000000000000000000000000..d43c88b86834d2fc08986b32e1191b4962bf0f9d --- /dev/null +++ b/arch/sparc/include/asm/ptrace_32.h @@ -0,0 +1,176 @@ +#ifndef _SPARC_PTRACE_H +#define _SPARC_PTRACE_H + +#include + +/* This struct defines the way the registers are stored on the + * stack during a system call and basically all traps. + */ + +#ifndef __ASSEMBLY__ + +#include + +struct pt_regs { + unsigned long psr; + unsigned long pc; + unsigned long npc; + unsigned long y; + unsigned long u_regs[16]; /* globals and ins */ +}; + +#define UREG_G0 0 +#define UREG_G1 1 +#define UREG_G2 2 +#define UREG_G3 3 +#define UREG_G4 4 +#define UREG_G5 5 +#define UREG_G6 6 +#define UREG_G7 7 +#define UREG_I0 8 +#define UREG_I1 9 +#define UREG_I2 10 +#define UREG_I3 11 +#define UREG_I4 12 +#define UREG_I5 13 +#define UREG_I6 14 +#define UREG_I7 15 +#define UREG_WIM UREG_G0 +#define UREG_FADDR UREG_G0 +#define UREG_FP UREG_I6 +#define UREG_RETPC UREG_I7 + +static inline bool pt_regs_is_syscall(struct pt_regs *regs) +{ + return (regs->psr & PSR_SYSCALL); +} + +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) +{ + return (regs->psr &= ~PSR_SYSCALL); +} + +/* A register window */ +struct reg_window { + unsigned long locals[8]; + unsigned long ins[8]; +}; + +/* A Sparc stack frame */ +struct sparc_stackf { + unsigned long locals[8]; + unsigned long ins[6]; + struct sparc_stackf *fp; + unsigned long callers_pc; + char *structptr; + unsigned long xargs[6]; + unsigned long xxargs[1]; +}; + +#define TRACEREG_SZ sizeof(struct pt_regs) +#define STACKFRAME_SZ sizeof(struct sparc_stackf) + +#ifdef __KERNEL__ + +#define user_mode(regs) (!((regs)->psr & PSR_PS)) +#define instruction_pointer(regs) ((regs)->pc) +#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) +unsigned long profile_pc(struct pt_regs *); +extern void show_regs(struct pt_regs *); +#endif + +#else /* __ASSEMBLY__ */ +/* For assembly code. */ +#define TRACEREG_SZ 0x50 +#define STACKFRAME_SZ 0x60 +#endif + +/* + * The asm-offsets.h is a generated file, so we cannot include it. + * It may be OK for glibc headers, but it's utterly pointless for C code. + * The assembly code using those offsets has to include it explicitly. + */ +/* #include */ + +/* These are for pt_regs. */ +#define PT_PSR 0x0 +#define PT_PC 0x4 +#define PT_NPC 0x8 +#define PT_Y 0xc +#define PT_G0 0x10 +#define PT_WIM PT_G0 +#define PT_G1 0x14 +#define PT_G2 0x18 +#define PT_G3 0x1c +#define PT_G4 0x20 +#define PT_G5 0x24 +#define PT_G6 0x28 +#define PT_G7 0x2c +#define PT_I0 0x30 +#define PT_I1 0x34 +#define PT_I2 0x38 +#define PT_I3 0x3c +#define PT_I4 0x40 +#define PT_I5 0x44 +#define PT_I6 0x48 +#define PT_FP PT_I6 +#define PT_I7 0x4c + +/* Reg_window offsets */ +#define RW_L0 0x00 +#define RW_L1 0x04 +#define RW_L2 0x08 +#define RW_L3 0x0c +#define RW_L4 0x10 +#define RW_L5 0x14 +#define RW_L6 0x18 +#define RW_L7 0x1c +#define RW_I0 0x20 +#define RW_I1 0x24 +#define RW_I2 0x28 +#define RW_I3 0x2c +#define RW_I4 0x30 +#define RW_I5 0x34 +#define RW_I6 0x38 +#define RW_I7 0x3c + +/* Stack_frame offsets */ +#define SF_L0 0x00 +#define SF_L1 0x04 +#define SF_L2 0x08 +#define SF_L3 0x0c +#define SF_L4 0x10 +#define SF_L5 0x14 +#define SF_L6 0x18 +#define SF_L7 0x1c +#define SF_I0 0x20 +#define SF_I1 0x24 +#define SF_I2 0x28 +#define SF_I3 0x2c +#define SF_I4 0x30 +#define SF_I5 0x34 +#define SF_FP 0x38 +#define SF_PC 0x3c +#define SF_RETP 0x40 +#define SF_XARG0 0x44 +#define SF_XARG1 0x48 +#define SF_XARG2 0x4c +#define SF_XARG3 0x50 +#define SF_XARG4 0x54 +#define SF_XARG5 0x58 +#define SF_XXARG 0x5c + +/* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_READDATA 16 +#define PTRACE_WRITEDATA 17 +#define PTRACE_READTEXT 18 +#define PTRACE_WRITETEXT 19 +#define PTRACE_GETFPAREGS 20 +#define PTRACE_SETFPAREGS 21 + +#endif /* !(_SPARC_PTRACE_H) */ diff --git a/arch/sparc/include/asm/ptrace_64.h b/arch/sparc/include/asm/ptrace_64.h new file mode 100644 index 0000000000000000000000000000000000000000..ec6d45c84cd0e4a0a0aa12cbc6e229b975d6f38e --- /dev/null +++ b/arch/sparc/include/asm/ptrace_64.h @@ -0,0 +1,347 @@ +#ifndef _SPARC64_PTRACE_H +#define _SPARC64_PTRACE_H + +#include + +/* This struct defines the way the registers are stored on the + * stack during a system call and basically all traps. + */ + +/* This magic value must have the low 9 bits clear, + * as that is where we encode the %tt value, see below. + */ +#define PT_REGS_MAGIC 0x57ac6c00 + +#ifndef __ASSEMBLY__ + +#include + +struct pt_regs { + unsigned long u_regs[16]; /* globals and ins */ + unsigned long tstate; + unsigned long tpc; + unsigned long tnpc; + unsigned int y; + + /* We encode a magic number, PT_REGS_MAGIC, along + * with the %tt (trap type) register value at trap + * entry time. The magic number allows us to identify + * accurately a trap stack frame in the stack + * unwinder, and the %tt value allows us to test + * things like "in a system call" etc. for an arbitray + * process. + * + * The PT_REGS_MAGIC is choosen such that it can be + * loaded completely using just a sethi instruction. + */ + unsigned int magic; +}; + +static inline int pt_regs_trap_type(struct pt_regs *regs) +{ + return regs->magic & 0x1ff; +} + +static inline bool pt_regs_is_syscall(struct pt_regs *regs) +{ + return (regs->tstate & TSTATE_SYSCALL); +} + +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) +{ + return (regs->tstate &= ~TSTATE_SYSCALL); +} + +struct pt_regs32 { + unsigned int psr; + unsigned int pc; + unsigned int npc; + unsigned int y; + unsigned int u_regs[16]; /* globals and ins */ +}; + +#define UREG_G0 0 +#define UREG_G1 1 +#define UREG_G2 2 +#define UREG_G3 3 +#define UREG_G4 4 +#define UREG_G5 5 +#define UREG_G6 6 +#define UREG_G7 7 +#define UREG_I0 8 +#define UREG_I1 9 +#define UREG_I2 10 +#define UREG_I3 11 +#define UREG_I4 12 +#define UREG_I5 13 +#define UREG_I6 14 +#define UREG_I7 15 +#define UREG_FP UREG_I6 +#define UREG_RETPC UREG_I7 + +/* A V9 register window */ +struct reg_window { + unsigned long locals[8]; + unsigned long ins[8]; +}; + +/* A 32-bit register window. */ +struct reg_window32 { + unsigned int locals[8]; + unsigned int ins[8]; +}; + +/* A V9 Sparc stack frame */ +struct sparc_stackf { + unsigned long locals[8]; + unsigned long ins[6]; + struct sparc_stackf *fp; + unsigned long callers_pc; + char *structptr; + unsigned long xargs[6]; + unsigned long xxargs[1]; +}; + +/* A 32-bit Sparc stack frame */ +struct sparc_stackf32 { + unsigned int locals[8]; + unsigned int ins[6]; + unsigned int fp; + unsigned int callers_pc; + unsigned int structptr; + unsigned int xargs[6]; + unsigned int xxargs[1]; +}; + +struct sparc_trapf { + unsigned long locals[8]; + unsigned long ins[8]; + unsigned long _unused; + struct pt_regs *regs; +}; + +#define TRACEREG_SZ sizeof(struct pt_regs) +#define STACKFRAME_SZ sizeof(struct sparc_stackf) + +#define TRACEREG32_SZ sizeof(struct pt_regs32) +#define STACKFRAME32_SZ sizeof(struct sparc_stackf32) + +#ifdef __KERNEL__ + +struct global_reg_snapshot { + unsigned long tstate; + unsigned long tpc; + unsigned long tnpc; + unsigned long o7; + unsigned long i7; + struct thread_info *thread; + unsigned long pad1; + unsigned long pad2; +}; + +#define __ARCH_WANT_COMPAT_SYS_PTRACE + +#define force_successful_syscall_return() \ +do { current_thread_info()->syscall_noerror = 1; \ +} while (0) +#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) +#define instruction_pointer(regs) ((regs)->tpc) +#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) +#define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) +#ifdef CONFIG_SMP +extern unsigned long profile_pc(struct pt_regs *); +#else +#define profile_pc(regs) instruction_pointer(regs) +#endif +extern void show_regs(struct pt_regs *); +extern void __show_regs(struct pt_regs *); +#endif + +#else /* __ASSEMBLY__ */ +/* For assembly code. */ +#define TRACEREG_SZ 0xa0 +#define STACKFRAME_SZ 0xc0 + +#define TRACEREG32_SZ 0x50 +#define STACKFRAME32_SZ 0x60 +#endif + +#ifdef __KERNEL__ +#define STACK_BIAS 2047 +#endif + +/* These are for pt_regs. */ +#define PT_V9_G0 0x00 +#define PT_V9_G1 0x08 +#define PT_V9_G2 0x10 +#define PT_V9_G3 0x18 +#define PT_V9_G4 0x20 +#define PT_V9_G5 0x28 +#define PT_V9_G6 0x30 +#define PT_V9_G7 0x38 +#define PT_V9_I0 0x40 +#define PT_V9_I1 0x48 +#define PT_V9_I2 0x50 +#define PT_V9_I3 0x58 +#define PT_V9_I4 0x60 +#define PT_V9_I5 0x68 +#define PT_V9_I6 0x70 +#define PT_V9_FP PT_V9_I6 +#define PT_V9_I7 0x78 +#define PT_V9_TSTATE 0x80 +#define PT_V9_TPC 0x88 +#define PT_V9_TNPC 0x90 +#define PT_V9_Y 0x98 +#define PT_V9_MAGIC 0x9c +#define PT_TSTATE PT_V9_TSTATE +#define PT_TPC PT_V9_TPC +#define PT_TNPC PT_V9_TNPC + +/* These for pt_regs32. */ +#define PT_PSR 0x0 +#define PT_PC 0x4 +#define PT_NPC 0x8 +#define PT_Y 0xc +#define PT_G0 0x10 +#define PT_WIM PT_G0 +#define PT_G1 0x14 +#define PT_G2 0x18 +#define PT_G3 0x1c +#define PT_G4 0x20 +#define PT_G5 0x24 +#define PT_G6 0x28 +#define PT_G7 0x2c +#define PT_I0 0x30 +#define PT_I1 0x34 +#define PT_I2 0x38 +#define PT_I3 0x3c +#define PT_I4 0x40 +#define PT_I5 0x44 +#define PT_I6 0x48 +#define PT_FP PT_I6 +#define PT_I7 0x4c + +/* Reg_window offsets */ +#define RW_V9_L0 0x00 +#define RW_V9_L1 0x08 +#define RW_V9_L2 0x10 +#define RW_V9_L3 0x18 +#define RW_V9_L4 0x20 +#define RW_V9_L5 0x28 +#define RW_V9_L6 0x30 +#define RW_V9_L7 0x38 +#define RW_V9_I0 0x40 +#define RW_V9_I1 0x48 +#define RW_V9_I2 0x50 +#define RW_V9_I3 0x58 +#define RW_V9_I4 0x60 +#define RW_V9_I5 0x68 +#define RW_V9_I6 0x70 +#define RW_V9_I7 0x78 + +#define RW_L0 0x00 +#define RW_L1 0x04 +#define RW_L2 0x08 +#define RW_L3 0x0c +#define RW_L4 0x10 +#define RW_L5 0x14 +#define RW_L6 0x18 +#define RW_L7 0x1c +#define RW_I0 0x20 +#define RW_I1 0x24 +#define RW_I2 0x28 +#define RW_I3 0x2c +#define RW_I4 0x30 +#define RW_I5 0x34 +#define RW_I6 0x38 +#define RW_I7 0x3c + +/* Stack_frame offsets */ +#define SF_V9_L0 0x00 +#define SF_V9_L1 0x08 +#define SF_V9_L2 0x10 +#define SF_V9_L3 0x18 +#define SF_V9_L4 0x20 +#define SF_V9_L5 0x28 +#define SF_V9_L6 0x30 +#define SF_V9_L7 0x38 +#define SF_V9_I0 0x40 +#define SF_V9_I1 0x48 +#define SF_V9_I2 0x50 +#define SF_V9_I3 0x58 +#define SF_V9_I4 0x60 +#define SF_V9_I5 0x68 +#define SF_V9_FP 0x70 +#define SF_V9_PC 0x78 +#define SF_V9_RETP 0x80 +#define SF_V9_XARG0 0x88 +#define SF_V9_XARG1 0x90 +#define SF_V9_XARG2 0x98 +#define SF_V9_XARG3 0xa0 +#define SF_V9_XARG4 0xa8 +#define SF_V9_XARG5 0xb0 +#define SF_V9_XXARG 0xb8 + +#define SF_L0 0x00 +#define SF_L1 0x04 +#define SF_L2 0x08 +#define SF_L3 0x0c +#define SF_L4 0x10 +#define SF_L5 0x14 +#define SF_L6 0x18 +#define SF_L7 0x1c +#define SF_I0 0x20 +#define SF_I1 0x24 +#define SF_I2 0x28 +#define SF_I3 0x2c +#define SF_I4 0x30 +#define SF_I5 0x34 +#define SF_FP 0x38 +#define SF_PC 0x3c +#define SF_RETP 0x40 +#define SF_XARG0 0x44 +#define SF_XARG1 0x48 +#define SF_XARG2 0x4c +#define SF_XARG3 0x50 +#define SF_XARG4 0x54 +#define SF_XARG5 0x58 +#define SF_XXARG 0x5c + +#ifdef __KERNEL__ + +/* global_reg_snapshot offsets */ +#define GR_SNAP_TSTATE 0x00 +#define GR_SNAP_TPC 0x08 +#define GR_SNAP_TNPC 0x10 +#define GR_SNAP_O7 0x18 +#define GR_SNAP_I7 0x20 +#define GR_SNAP_THREAD 0x28 +#define GR_SNAP_PAD1 0x30 +#define GR_SNAP_PAD2 0x38 + +#endif /* __KERNEL__ */ + +/* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_READDATA 16 +#define PTRACE_WRITEDATA 17 +#define PTRACE_READTEXT 18 +#define PTRACE_WRITETEXT 19 +#define PTRACE_GETFPAREGS 20 +#define PTRACE_SETFPAREGS 21 + +/* There are for debugging 64-bit processes, either from a 32 or 64 bit + * parent. Thus their complements are for debugging 32-bit processes only. + */ + +#define PTRACE_GETREGS64 22 +#define PTRACE_SETREGS64 23 +/* PTRACE_SYSCALL is 24 */ +#define PTRACE_GETFPREGS64 25 +#define PTRACE_SETFPREGS64 26 + +#endif /* !(_SPARC64_PTRACE_H) */ diff --git a/include/asm-sparc64/reboot.h b/arch/sparc/include/asm/reboot.h similarity index 100% rename from include/asm-sparc64/reboot.h rename to arch/sparc/include/asm/reboot.h diff --git a/arch/sparc/include/asm/reg.h b/arch/sparc/include/asm/reg.h new file mode 100644 index 0000000000000000000000000000000000000000..0c16e19cae4da870e1bee3a512009bb7943ebe9b --- /dev/null +++ b/arch/sparc/include/asm/reg.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_REG_H +#define ___ASM_SPARC_REG_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/reg_32.h b/arch/sparc/include/asm/reg_32.h new file mode 100644 index 0000000000000000000000000000000000000000..1efb056fb3d15994c96214ed77ad6348fb097fe4 --- /dev/null +++ b/arch/sparc/include/asm/reg_32.h @@ -0,0 +1,79 @@ +/* + * linux/include/asm/reg.h + * Layout of the registers as expected by gdb on the Sparc + * we should replace the user.h definitions with those in + * this file, we don't even use the other + * -miguel + * + * The names of the structures, constants and aliases in this file + * have the same names as the sunos ones, some programs rely on these + * names (gdb for example). + * + */ + +#ifndef __SPARC_REG_H +#define __SPARC_REG_H + +struct regs { + int r_psr; +#define r_ps r_psr + int r_pc; + int r_npc; + int r_y; + int r_g1; + int r_g2; + int r_g3; + int r_g4; + int r_g5; + int r_g6; + int r_g7; + int r_o0; + int r_o1; + int r_o2; + int r_o3; + int r_o4; + int r_o5; + int r_o6; + int r_o7; +}; + +struct fpq { + unsigned long *addr; + unsigned long instr; +}; + +struct fq { + union { + double whole; + struct fpq fpq; + } FQu; +}; + +#define FPU_REGS_TYPE unsigned int +#define FPU_FSR_TYPE unsigned + +struct fp_status { + union { + FPU_REGS_TYPE Fpu_regs[32]; + double Fpu_dregs[16]; + } fpu_fr; + FPU_FSR_TYPE Fpu_fsr; + unsigned Fpu_flags; + unsigned Fpu_extra; + unsigned Fpu_qcnt; + struct fq Fpu_q[16]; +}; + +#define fpu_regs f_fpstatus.fpu_fr.Fpu_regs +#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs +#define fpu_fsr f_fpstatus.Fpu_fsr +#define fpu_flags f_fpstatus.Fpu_flags +#define fpu_extra f_fpstatus.Fpu_extra +#define fpu_q f_fpstatus.Fpu_q +#define fpu_qcnt f_fpstatus.Fpu_qcnt + +struct fpu { + struct fp_status f_fpstatus; +}; + +#endif /* __SPARC_REG_H */ diff --git a/arch/sparc/include/asm/reg_64.h b/arch/sparc/include/asm/reg_64.h new file mode 100644 index 0000000000000000000000000000000000000000..6f277d7c7d88f6114d5d5f2859f78a1323997d00 --- /dev/null +++ b/arch/sparc/include/asm/reg_64.h @@ -0,0 +1,56 @@ +/* + * linux/asm/reg.h + * Layout of the registers as expected by gdb on the Sparc + * we should replace the user.h definitions with those in + * this file, we don't even use the other + * -miguel + * + * The names of the structures, constants and aliases in this file + * have the same names as the sunos ones, some programs rely on these + * names (gdb for example). + * + */ + +#ifndef __SPARC64_REG_H +#define __SPARC64_REG_H + +struct regs { + unsigned long r_g1; + unsigned long r_g2; + unsigned long r_g3; + unsigned long r_g4; + unsigned long r_g5; + unsigned long r_g6; + unsigned long r_g7; + unsigned long r_o0; + unsigned long r_o1; + unsigned long r_o2; + unsigned long r_o3; + unsigned long r_o4; + unsigned long r_o5; + unsigned long r_o6; + unsigned long r_o7; + unsigned long __pad; + unsigned long r_tstate; + unsigned long r_tpc; + unsigned long r_tnpc; + unsigned int r_y; + unsigned int r_fprs; +}; + +#define FPU_REGS_TYPE unsigned int +#define FPU_FSR_TYPE unsigned long + +struct fp_status { + unsigned long fpu_fr[32]; + unsigned long Fpu_fsr; +}; + +struct fpu { + struct fp_status f_fpstatus; +}; + +#define fpu_regs f_fpstatus.fpu_fr +#define fpu_fsr f_fpstatus.Fpu_fsr + +#endif /* __SPARC64_REG_H */ diff --git a/arch/sparc/include/asm/resource.h b/arch/sparc/include/asm/resource.h new file mode 100644 index 0000000000000000000000000000000000000000..fe163cafb4c7553ba6c8ec61b727e6c8673854df --- /dev/null +++ b/arch/sparc/include/asm/resource.h @@ -0,0 +1,30 @@ +/* + * resource.h: Resource definitions. + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_RESOURCE_H +#define _SPARC_RESOURCE_H + +/* + * These two resource limit IDs have a Sparc/Linux-specific ordering, + * the rest comes from the generic header: + */ +#define RLIMIT_NOFILE 6 /* max number of open files */ +#define RLIMIT_NPROC 7 /* max number of processes */ + +#if defined(__sparc__) && defined(__arch64__) +/* Use generic version */ +#else +/* + * SuS says limits have to be unsigned. + * We make this unsigned, but keep the + * old value for compatibility: + */ +#define RLIM_INFINITY 0x7fffffff +#endif + +#include + +#endif /* !(_SPARC_RESOURCE_H) */ diff --git a/include/asm-sparc/ross.h b/arch/sparc/include/asm/ross.h similarity index 100% rename from include/asm-sparc/ross.h rename to arch/sparc/include/asm/ross.h diff --git a/include/asm-sparc/rtc.h b/arch/sparc/include/asm/rtc.h similarity index 100% rename from include/asm-sparc/rtc.h rename to arch/sparc/include/asm/rtc.h diff --git a/include/asm-sparc64/rwsem-const.h b/arch/sparc/include/asm/rwsem-const.h similarity index 100% rename from include/asm-sparc64/rwsem-const.h rename to arch/sparc/include/asm/rwsem-const.h diff --git a/include/asm-sparc64/rwsem.h b/arch/sparc/include/asm/rwsem.h similarity index 100% rename from include/asm-sparc64/rwsem.h rename to arch/sparc/include/asm/rwsem.h diff --git a/include/asm-sparc/sbi.h b/arch/sparc/include/asm/sbi.h similarity index 100% rename from include/asm-sparc/sbi.h rename to arch/sparc/include/asm/sbi.h diff --git a/arch/sparc/include/asm/sbus.h b/arch/sparc/include/asm/sbus.h new file mode 100644 index 0000000000000000000000000000000000000000..f82481ab44db043cd27314ffa30bf4268ef39e7e --- /dev/null +++ b/arch/sparc/include/asm/sbus.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SBUS_H +#define ___ASM_SPARC_SBUS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/sbus_32.h b/arch/sparc/include/asm/sbus_32.h new file mode 100644 index 0000000000000000000000000000000000000000..77b5d3aadc994c29d79975a9ea854b2945de51f8 --- /dev/null +++ b/arch/sparc/include/asm/sbus_32.h @@ -0,0 +1,153 @@ +/* + * sbus.h: Defines for the Sun SBus. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_SBUS_H +#define _SPARC_SBUS_H + +#include +#include + +#include +#include +#include +#include + +/* We scan which devices are on the SBus using the PROM node device + * tree. SBus devices are described in two different ways. You can + * either get an absolute address at which to access the device, or + * you can get a SBus 'slot' number and an offset within that slot. + */ + +/* The base address at which to calculate device OBIO addresses. */ +#define SUN_SBUS_BVADDR 0xf8000000 +#define SBUS_OFF_MASK 0x01ffffff + +/* These routines are used to calculate device address from slot + * numbers + offsets, and vice versa. + */ + +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) +{ + return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); +} + +static inline int sbus_dev_slot(unsigned long dev_addr) +{ + return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); +} + +struct sbus_bus; + +/* Linux SBUS device tables */ +struct sbus_dev { + struct of_device ofdev; + struct sbus_bus *bus; + struct sbus_dev *next; + struct sbus_dev *child; + struct sbus_dev *parent; + int prom_node; + char prom_name[64]; + int slot; + + struct resource resource[PROMREG_MAX]; + + struct linux_prom_registers reg_addrs[PROMREG_MAX]; + int num_registers; + + struct linux_prom_ranges device_ranges[PROMREG_MAX]; + int num_device_ranges; + + unsigned int irqs[4]; + int num_irqs; +}; +#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) + +/* This struct describes the SBus(s) found on this machine. */ +struct sbus_bus { + struct of_device ofdev; + struct sbus_dev *devices; /* Link to devices on this SBus */ + struct sbus_bus *next; /* next SBus, if more than one SBus */ + int prom_node; /* PROM device tree node for this SBus */ + char prom_name[64]; /* Usually "sbus" or "sbi" */ + int clock_freq; + + struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; + int num_sbus_ranges; + + int devid; + int board; +}; +#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) + +extern struct sbus_bus *sbus_root; + +static inline int +sbus_is_slave(struct sbus_dev *dev) +{ + /* XXX Have to write this for sun4c's */ + return 0; +} + +/* Device probing routines could find these handy */ +#define for_each_sbus(bus) \ + for((bus) = sbus_root; (bus); (bus)=(bus)->next) + +#define for_each_sbusdev(device, bus) \ + for((device) = (bus)->devices; (device); (device)=(device)->next) + +#define for_all_sbusdev(device, bus) \ + for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ + for ((device) = (bus)->devices; (device); (device) = (device)->next) + +/* Driver DVMA interfaces. */ +#define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */ +#define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */ +extern void sbus_set_sbus64(struct sbus_dev *, int); +extern void sbus_fill_device_irq(struct sbus_dev *); + +/* These yield IOMMU mappings in consistent mode. */ +extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp); +extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32); +void prom_adjust_ranges(struct linux_prom_ranges *, int, + struct linux_prom_ranges *, int); + +#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL +#define SBUS_DMA_TODEVICE DMA_TO_DEVICE +#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE +#define SBUS_DMA_NONE DMA_NONE + +/* All the rest use streaming mode mappings. */ +extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); +extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); +extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); +extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); + +/* Finally, allow explicit synchronization of streamable mappings. */ +extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); +#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu +extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); +extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); +#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu +extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); + +/* Eric Brower (ebrower@usa.net) + * Translate SBus interrupt levels to ino values-- + * this is used when converting sbus "interrupts" OBP + * node values to "intr" node values, and is platform + * dependent. If only we could call OBP with + * "sbus-intr>cpu (sbint -- ino)" from kernel... + * See .../drivers/sbus/sbus.c for details. + */ +BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int) +#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint) + +extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); +extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); +extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); +extern int sbus_arch_preinit(void); +extern void sbus_arch_postinit(void); + +#endif /* !(_SPARC_SBUS_H) */ diff --git a/arch/sparc/include/asm/sbus_64.h b/arch/sparc/include/asm/sbus_64.h new file mode 100644 index 0000000000000000000000000000000000000000..0e16b6dd7e96f15c5500a9b21f14679e2d868d3f --- /dev/null +++ b/arch/sparc/include/asm/sbus_64.h @@ -0,0 +1,190 @@ +/* sbus.h: Defines for the Sun SBus. + * + * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_SBUS_H +#define _SPARC64_SBUS_H + +#include +#include + +#include +#include +#include +#include +#include + +/* We scan which devices are on the SBus using the PROM node device + * tree. SBus devices are described in two different ways. You can + * either get an absolute address at which to access the device, or + * you can get a SBus 'slot' number and an offset within that slot. + */ + +/* The base address at which to calculate device OBIO addresses. */ +#define SUN_SBUS_BVADDR 0x00000000 +#define SBUS_OFF_MASK 0x0fffffff + +/* These routines are used to calculate device address from slot + * numbers + offsets, and vice versa. + */ + +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) +{ + return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); +} + +static inline int sbus_dev_slot(unsigned long dev_addr) +{ + return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); +} + +struct sbus_bus; + +/* Linux SBUS device tables */ +struct sbus_dev { + struct of_device ofdev; + struct sbus_bus *bus; + struct sbus_dev *next; + struct sbus_dev *child; + struct sbus_dev *parent; + int prom_node; + char prom_name[64]; + int slot; + + struct resource resource[PROMREG_MAX]; + + struct linux_prom_registers reg_addrs[PROMREG_MAX]; + int num_registers; + + struct linux_prom_ranges device_ranges[PROMREG_MAX]; + int num_device_ranges; + + unsigned int irqs[4]; + int num_irqs; +}; +#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) + +/* This struct describes the SBus(s) found on this machine. */ +struct sbus_bus { + struct of_device ofdev; + struct sbus_dev *devices; /* Tree of SBUS devices */ + struct sbus_bus *next; /* Next SBUS in system */ + int prom_node; /* OBP node of SBUS */ + char prom_name[64]; /* Usually "sbus" or "sbi" */ + int clock_freq; + + struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; + int num_sbus_ranges; + + int portid; +}; +#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) + +extern struct sbus_bus *sbus_root; + +/* Device probing routines could find these handy */ +#define for_each_sbus(bus) \ + for((bus) = sbus_root; (bus); (bus)=(bus)->next) + +#define for_each_sbusdev(device, bus) \ + for((device) = (bus)->devices; (device); (device)=(device)->next) + +#define for_all_sbusdev(device, bus) \ + for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ + for ((device) = (bus)->devices; (device); (device) = (device)->next) + +/* Driver DVMA interfaces. */ +#define sbus_can_dma_64bit(sdev) (1) +#define sbus_can_burst64(sdev) (1) +extern void sbus_set_sbus64(struct sbus_dev *, int); +extern void sbus_fill_device_irq(struct sbus_dev *); + +static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size, + dma_addr_t *dma_handle) +{ + return dma_alloc_coherent(&sdev->ofdev.dev, size, + dma_handle, GFP_ATOMIC); +} + +static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle); +} + +#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL +#define SBUS_DMA_TODEVICE DMA_TO_DEVICE +#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE +#define SBUS_DMA_NONE DMA_NONE + +/* All the rest use streaming mode mappings. */ +static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, + size_t size, int direction) +{ + return dma_map_single(&sdev->ofdev.dev, ptr, size, + (enum dma_data_direction) direction); +} + +static inline void sbus_unmap_single(struct sbus_dev *sdev, + dma_addr_t dma_addr, size_t size, + int direction) +{ + dma_unmap_single(&sdev->ofdev.dev, dma_addr, size, + (enum dma_data_direction) direction); +} + +static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, + int nents, int direction) +{ + return dma_map_sg(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, + int nents, int direction) +{ + dma_unmap_sg(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} + +/* Finally, allow explicit synchronization of streamable mappings. */ +static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size, + (enum dma_data_direction) direction); +} +#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu + +static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, + struct scatterlist *sg, + int nents, int direction) +{ + dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} +#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu + +static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, + struct scatterlist *sg, + int nents, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); +extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); +extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); +extern int sbus_arch_preinit(void); +extern void sbus_arch_postinit(void); + +#endif /* !(_SPARC64_SBUS_H) */ diff --git a/arch/sparc/include/asm/scatterlist.h b/arch/sparc/include/asm/scatterlist.h new file mode 100644 index 0000000000000000000000000000000000000000..ec21a4517641b16b8414baab15f18a55a4363e27 --- /dev/null +++ b/arch/sparc/include/asm/scatterlist.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SCATTERLIST_H +#define ___ASM_SPARC_SCATTERLIST_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/scatterlist.h b/arch/sparc/include/asm/scatterlist_32.h similarity index 100% rename from include/asm-sparc/scatterlist.h rename to arch/sparc/include/asm/scatterlist_32.h diff --git a/include/asm-sparc64/scatterlist.h b/arch/sparc/include/asm/scatterlist_64.h similarity index 100% rename from include/asm-sparc64/scatterlist.h rename to arch/sparc/include/asm/scatterlist_64.h diff --git a/include/asm-sparc64/scratchpad.h b/arch/sparc/include/asm/scratchpad.h similarity index 100% rename from include/asm-sparc64/scratchpad.h rename to arch/sparc/include/asm/scratchpad.h diff --git a/include/asm-sparc64/seccomp.h b/arch/sparc/include/asm/seccomp.h similarity index 100% rename from include/asm-sparc64/seccomp.h rename to arch/sparc/include/asm/seccomp.h diff --git a/arch/sparc/include/asm/sections.h b/arch/sparc/include/asm/sections.h new file mode 100644 index 0000000000000000000000000000000000000000..c7c69b00967ffe4fa826dcdbece00d901c1fe270 --- /dev/null +++ b/arch/sparc/include/asm/sections.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SECTIONS_H +#define ___ASM_SPARC_SECTIONS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/sections.h b/arch/sparc/include/asm/sections_32.h similarity index 100% rename from include/asm-sparc/sections.h rename to arch/sparc/include/asm/sections_32.h diff --git a/include/asm-sparc64/sections.h b/arch/sparc/include/asm/sections_64.h similarity index 100% rename from include/asm-sparc64/sections.h rename to arch/sparc/include/asm/sections_64.h diff --git a/arch/sparc/include/asm/sembuf.h b/arch/sparc/include/asm/sembuf.h new file mode 100644 index 0000000000000000000000000000000000000000..faee1be08d67b223deef379a411df0ec40f51fbe --- /dev/null +++ b/arch/sparc/include/asm/sembuf.h @@ -0,0 +1,31 @@ +#ifndef _SPARC_SEMBUF_H +#define _SPARC_SEMBUF_H + +/* + * The semid64_ds structure for sparc architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ +#if defined(__sparc__) && defined(__arch64__) +# define PADDING(x) +#else +# define PADDING(x) unsigned int x; +#endif + +struct semid64_ds { + struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ + PADDING(__pad1) + __kernel_time_t sem_otime; /* last semop time */ + PADDING(__pad2) + __kernel_time_t sem_ctime; /* last change time */ + unsigned long sem_nsems; /* no. of semaphores in array */ + unsigned long __unused1; + unsigned long __unused2; +}; +#undef PADDING + +#endif /* _SPARC64_SEMBUF_H */ diff --git a/arch/sparc/include/asm/setup.h b/arch/sparc/include/asm/setup.h new file mode 100644 index 0000000000000000000000000000000000000000..2643c62f4ac0d6809797e2b851e98fe8ce5e8042 --- /dev/null +++ b/arch/sparc/include/asm/setup.h @@ -0,0 +1,14 @@ +/* + * Just a place holder. + */ + +#ifndef _SPARC_SETUP_H +#define _SPARC_SETUP_H + +#if defined(__sparc__) && defined(__arch64__) +# define COMMAND_LINE_SIZE 2048 +#else +# define COMMAND_LINE_SIZE 256 +#endif + +#endif /* _SPARC_SETUP_H */ diff --git a/include/asm-sparc64/sfafsr.h b/arch/sparc/include/asm/sfafsr.h similarity index 100% rename from include/asm-sparc64/sfafsr.h rename to arch/sparc/include/asm/sfafsr.h diff --git a/arch/sparc/include/asm/sfp-machine.h b/arch/sparc/include/asm/sfp-machine.h new file mode 100644 index 0000000000000000000000000000000000000000..4ebc3823ed4fec0a5fb66ad3324bedab98fe19a2 --- /dev/null +++ b/arch/sparc/include/asm/sfp-machine.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SFP_MACHINE_H +#define ___ASM_SPARC_SFP_MACHINE_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/sfp-machine_32.h b/arch/sparc/include/asm/sfp-machine_32.h new file mode 100644 index 0000000000000000000000000000000000000000..01d9c3b5a73b631d3087d1e6651142b7ddebed28 --- /dev/null +++ b/arch/sparc/include/asm/sfp-machine_32.h @@ -0,0 +1,212 @@ +/* Machine-dependent software floating-point definitions. + Sparc userland (_Q_*) version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz), + David S. Miller (davem@redhat.com) and + Peter Maydell (pmaydell@chiark.greenend.org.uk). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + + +#define _FP_W_TYPE_SIZE 32 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +/* For _Qp_* and _Q_*, this should prefer X, for + * CPU instruction emulation this should prefer Y. + * (see SPAMv9 B.2.2 section). + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + else \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +/* Some assembly to speed things up. */ +#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("addcc %r7,%8,%2\n\t" \ + "addxcc %r5,%6,%1\n\t" \ + "addx %r3,%4,%0\n" \ + : "=r" ((USItype)(r2)), \ + "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc") + +#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("subcc %r7,%8,%2\n\t" \ + "subxcc %r5,%6,%1\n\t" \ + "subx %r3,%4,%0\n" \ + : "=r" ((USItype)(r2)), \ + "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc") + +#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + do { \ + /* We need to fool gcc, as we need to pass more than 10 \ + input/outputs. */ \ + register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ + __asm__ __volatile__ ( \ + "addcc %r8,%9,%1\n\t" \ + "addxcc %r6,%7,%0\n\t" \ + "addxcc %r4,%5,%%g2\n\t" \ + "addx %r2,%3,%%g1\n\t" \ + : "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x3)), \ + "rI" ((USItype)(y3)), \ + "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc", "g1", "g2"); \ + __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ + r3 = _t1; r2 = _t2; \ + } while (0) + +#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + do { \ + /* We need to fool gcc, as we need to pass more than 10 \ + input/outputs. */ \ + register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ + __asm__ __volatile__ ( \ + "subcc %r8,%9,%1\n\t" \ + "subxcc %r6,%7,%0\n\t" \ + "subxcc %r4,%5,%%g2\n\t" \ + "subx %r2,%3,%%g1\n\t" \ + : "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x3)), \ + "rI" ((USItype)(y3)), \ + "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc", "g1", "g2"); \ + __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ + r3 = _t1; r2 = _t2; \ + } while (0) + +#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) + +#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0) + +#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ + __asm__ ("addcc %3,%4,%3\n\t" \ + "addxcc %2,%%g0,%2\n\t" \ + "addxcc %1,%%g0,%1\n\t" \ + "addx %0,%%g0,%0\n\t" \ + : "=&r" ((USItype)(x3)), \ + "=&r" ((USItype)(x2)), \ + "=&r" ((USItype)(x1)), \ + "=&r" ((USItype)(x0)) \ + : "rI" ((USItype)(i)), \ + "0" ((USItype)(x3)), \ + "1" ((USItype)(x2)), \ + "2" ((USItype)(x1)), \ + "3" ((USItype)(x0)) \ + : "cc") + +#ifndef CONFIG_SMP +extern struct task_struct *last_task_used_math; +#endif + +/* Obtain the current rounding mode. */ +#ifndef FP_ROUNDMODE +#ifdef CONFIG_SMP +#define FP_ROUNDMODE ((current->thread.fsr >> 30) & 0x3) +#else +#define FP_ROUNDMODE ((last_task_used_math->thread.fsr >> 30) & 0x3) +#endif +#endif + +/* Exception flags. */ +#define FP_EX_INVALID (1 << 4) +#define FP_EX_OVERFLOW (1 << 3) +#define FP_EX_UNDERFLOW (1 << 2) +#define FP_EX_DIVZERO (1 << 1) +#define FP_EX_INEXACT (1 << 0) + +#define FP_HANDLE_EXCEPTIONS return _fex + +#ifdef CONFIG_SMP +#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex) +#else +#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex) +#endif + +#ifdef CONFIG_SMP +#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f) +#else +#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f) +#endif + +#endif diff --git a/arch/sparc/include/asm/sfp-machine_64.h b/arch/sparc/include/asm/sfp-machine_64.h new file mode 100644 index 0000000000000000000000000000000000000000..ca913ef40bd5cb0f0ab3ad1660a4c4dead999095 --- /dev/null +++ b/arch/sparc/include/asm/sfp-machine_64.h @@ -0,0 +1,93 @@ +/* Machine-dependent software floating-point definitions. + Sparc64 kernel version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz) and + David S. Miller (davem@redhat.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + +#define _FP_W_TYPE_SIZE 64 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +/* For _Qp_* and _Q_*, this should prefer X, for + * CPU instruction emulation this should prefer Y. + * (see SPAMv9 B.2.2 section). + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + else \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +/* Obtain the current rounding mode. */ +#ifndef FP_ROUNDMODE +#define FP_ROUNDMODE ((current_thread_info()->xfsr[0] >> 30) & 0x3) +#endif + +/* Exception flags. */ +#define FP_EX_INVALID (1 << 4) +#define FP_EX_OVERFLOW (1 << 3) +#define FP_EX_UNDERFLOW (1 << 2) +#define FP_EX_DIVZERO (1 << 1) +#define FP_EX_INEXACT (1 << 0) + +#define FP_HANDLE_EXCEPTIONS return _fex + +#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex) + +#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f) + +#endif diff --git a/arch/sparc/include/asm/shmbuf.h b/arch/sparc/include/asm/shmbuf.h new file mode 100644 index 0000000000000000000000000000000000000000..83a16055363fc4b7498625d4f62e24e62cc31c73 --- /dev/null +++ b/arch/sparc/include/asm/shmbuf.h @@ -0,0 +1,50 @@ +#ifndef _SPARC_SHMBUF_H +#define _SPARC_SHMBUF_H + +/* + * The shmid64_ds structure for sparc architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 64-bit time_t to solve y2038 problem + * - 2 miscellaneous 32-bit values + */ + +#if defined(__sparc__) && defined(__arch64__) +# define PADDING(x) +#else +# define PADDING(x) unsigned int x; +#endif + +struct shmid64_ds { + struct ipc64_perm shm_perm; /* operation perms */ + PADDING(__pad1) + __kernel_time_t shm_atime; /* last attach time */ + PADDING(__pad2) + __kernel_time_t shm_dtime; /* last detach time */ + PADDING(__pad3) + __kernel_time_t shm_ctime; /* last change time */ + size_t shm_segsz; /* size of segment (bytes) */ + __kernel_pid_t shm_cpid; /* pid of creator */ + __kernel_pid_t shm_lpid; /* pid of last operator */ + unsigned long shm_nattch; /* no. of current attaches */ + unsigned long __unused1; + unsigned long __unused2; +}; + +struct shminfo64 { + unsigned long shmmax; + unsigned long shmmin; + unsigned long shmmni; + unsigned long shmseg; + unsigned long shmall; + unsigned long __unused1; + unsigned long __unused2; + unsigned long __unused3; + unsigned long __unused4; +}; + +#undef PADDING + +#endif /* _SPARC_SHMBUF_H */ diff --git a/arch/sparc/include/asm/shmparam.h b/arch/sparc/include/asm/shmparam.h new file mode 100644 index 0000000000000000000000000000000000000000..8bf0cfe0694f8951717b8a885c415c254b77949b --- /dev/null +++ b/arch/sparc/include/asm/shmparam.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SHMPARAM_H +#define ___ASM_SPARC_SHMPARAM_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/shmparam.h b/arch/sparc/include/asm/shmparam_32.h similarity index 100% rename from include/asm-sparc/shmparam.h rename to arch/sparc/include/asm/shmparam_32.h diff --git a/include/asm-sparc64/shmparam.h b/arch/sparc/include/asm/shmparam_64.h similarity index 100% rename from include/asm-sparc64/shmparam.h rename to arch/sparc/include/asm/shmparam_64.h diff --git a/arch/sparc/include/asm/sigcontext.h b/arch/sparc/include/asm/sigcontext.h new file mode 100644 index 0000000000000000000000000000000000000000..e92de7e286b54dceaf41b679bef2d50a854cdadc --- /dev/null +++ b/arch/sparc/include/asm/sigcontext.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SIGCONTEXT_H +#define ___ASM_SPARC_SIGCONTEXT_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/sigcontext.h b/arch/sparc/include/asm/sigcontext_32.h similarity index 100% rename from include/asm-sparc/sigcontext.h rename to arch/sparc/include/asm/sigcontext_32.h diff --git a/include/asm-sparc64/sigcontext.h b/arch/sparc/include/asm/sigcontext_64.h similarity index 100% rename from include/asm-sparc64/sigcontext.h rename to arch/sparc/include/asm/sigcontext_64.h diff --git a/arch/sparc/include/asm/siginfo.h b/arch/sparc/include/asm/siginfo.h new file mode 100644 index 0000000000000000000000000000000000000000..bd81f8d7f5ce5aff8b846f61daef596a7a342ffa --- /dev/null +++ b/arch/sparc/include/asm/siginfo.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SIGINFO_H +#define ___ASM_SPARC_SIGINFO_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/siginfo.h b/arch/sparc/include/asm/siginfo_32.h similarity index 100% rename from include/asm-sparc/siginfo.h rename to arch/sparc/include/asm/siginfo_32.h diff --git a/include/asm-sparc64/siginfo.h b/arch/sparc/include/asm/siginfo_64.h similarity index 100% rename from include/asm-sparc64/siginfo.h rename to arch/sparc/include/asm/siginfo_64.h diff --git a/arch/sparc/include/asm/signal.h b/arch/sparc/include/asm/signal.h new file mode 100644 index 0000000000000000000000000000000000000000..27ab05dc203e82bc838d7e9d999e7a2ea827a343 --- /dev/null +++ b/arch/sparc/include/asm/signal.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SIGNAL_H +#define ___ASM_SPARC_SIGNAL_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/signal_32.h b/arch/sparc/include/asm/signal_32.h new file mode 100644 index 0000000000000000000000000000000000000000..96a60ab03ca1f831c9cae4e27a5e37522ea95f9d --- /dev/null +++ b/arch/sparc/include/asm/signal_32.h @@ -0,0 +1,207 @@ +#ifndef _ASMSPARC_SIGNAL_H +#define _ASMSPARC_SIGNAL_H + +#include +#include + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +#include +#include +#endif +#endif + +/* On the Sparc the signal handlers get passed a 'sub-signal' code + * for certain signal types, which we document here. + */ +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SUBSIG_STACK 0 +#define SUBSIG_ILLINST 2 +#define SUBSIG_PRIVINST 3 +#define SUBSIG_BADTRAP(t) (0x80 + (t)) + +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 + +#define SIGEMT 7 +#define SUBSIG_TAG 10 + +#define SIGFPE 8 +#define SUBSIG_FPDISABLED 0x400 +#define SUBSIG_FPERROR 0x404 +#define SUBSIG_FPINTOVFL 0x001 +#define SUBSIG_FPSTSIG 0x002 +#define SUBSIG_IDIVZERO 0x014 +#define SUBSIG_FPINEXACT 0x0c4 +#define SUBSIG_FPDIVZERO 0x0c8 +#define SUBSIG_FPUNFLOW 0x0cc +#define SUBSIG_FPOPERROR 0x0d0 +#define SUBSIG_FPOVFLOW 0x0d4 + +#define SIGKILL 9 +#define SIGBUS 10 +#define SUBSIG_BUSTIMEOUT 1 +#define SUBSIG_ALIGNMENT 2 +#define SUBSIG_MISCERROR 5 + +#define SIGSEGV 11 +#define SUBSIG_NOMAPPING 3 +#define SUBSIG_PROTECTION 4 +#define SUBSIG_SEGERROR 5 + +#define SIGSYS 12 + +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGURG 16 + +/* SunOS values which deviate from the Linux/i386 ones */ +#define SIGSTOP 17 +#define SIGTSTP 18 +#define SIGCONT 19 +#define SIGCHLD 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGIO 23 +#define SIGPOLL SIGIO /* SysV name for SIGIO */ +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGLOST 29 +#define SIGPWR SIGLOST +#define SIGUSR1 30 +#define SIGUSR2 31 + +/* Most things should be clean enough to redefine this at will, if care + * is taken to make libc match. + */ + +#define __OLD_NSIG 32 +#define __NEW_NSIG 64 +#define _NSIG_BPW 32 +#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) + +#define SIGRTMIN 32 +#define SIGRTMAX __NEW_NSIG + +#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) +#define _NSIG __NEW_NSIG +#define __new_sigset_t sigset_t +#define __new_sigaction sigaction +#define __old_sigset_t old_sigset_t +#define __old_sigaction old_sigaction +#else +#define _NSIG __OLD_NSIG +#define __old_sigset_t sigset_t +#define __old_sigaction sigaction +#endif + +#ifndef __ASSEMBLY__ + +typedef unsigned long __old_sigset_t; + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} __new_sigset_t; + + +#ifdef __KERNEL__ +/* A SunOS sigstack */ +struct sigstack { + char *the_stack; + int cur_status; +}; +#endif + +/* Sigvec flags */ +#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ +#define _SV_INTR 2u /* Sig return should not restart system call */ +#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ +#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ + +/* + * sa_flags values: SA_STACK is not currently supported, but will allow the + * usage of signal stacks by using the (now obsolete) sa_restorer field in + * the sigaction structure as a stack pointer. This is now possible due to + * the changes in signal handling. LBT 010493. + * SA_RESTART flag to get restarting signals (which were the default long ago) + */ +#define SA_NOCLDSTOP _SV_IGNCHILD +#define SA_STACK _SV_SSTACK +#define SA_ONSTACK _SV_SSTACK +#define SA_RESTART _SV_INTR +#define SA_ONESHOT _SV_RESET +#define SA_NOMASK 0x20u +#define SA_NOCLDWAIT 0x100u +#define SA_SIGINFO 0x200u + +#define SIG_BLOCK 0x01 /* for blocking signals */ +#define SIG_UNBLOCK 0x02 /* for unblocking signals */ +#define SIG_SETMASK 0x04 /* for setting the signal mask */ + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 4096 +#define SIGSTKSZ 16384 + +#ifdef __KERNEL__ +/* + * DJHR + * SA_STATIC_ALLOC is used for the SPARC system to indicate that this + * interrupt handler's irq structure should be statically allocated + * by the request_irq routine. + * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge + * of interrupt usage and that sucks. Also without a flag like this + * it may be possible for the free_irq routine to attempt to free + * statically allocated data.. which is NOT GOOD. + * + */ +#define SA_STATIC_ALLOC 0x8000 +#endif + +#include + +#ifdef __KERNEL__ +struct __new_sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + void (*sa_restorer)(void); /* Not used by Linux/SPARC */ + __new_sigset_t sa_mask; +}; + +struct k_sigaction { + struct __new_sigaction sa; + void __user *ka_restorer; +}; + +struct __old_sigaction { + __sighandler_t sa_handler; + __old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer) (void); /* not used by Linux/SPARC */ +}; + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#define ptrace_signal_deliver(regs, cookie) do { } while (0) + +#endif /* !(__KERNEL__) */ + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_ASMSPARC_SIGNAL_H) */ diff --git a/arch/sparc/include/asm/signal_64.h b/arch/sparc/include/asm/signal_64.h new file mode 100644 index 0000000000000000000000000000000000000000..ab1509a101c5747d62eb30b84379b03ee35996ba --- /dev/null +++ b/arch/sparc/include/asm/signal_64.h @@ -0,0 +1,194 @@ +#ifndef _ASMSPARC64_SIGNAL_H +#define _ASMSPARC64_SIGNAL_H + +#include + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +#include +#include +#endif +#endif + +/* On the Sparc the signal handlers get passed a 'sub-signal' code + * for certain signal types, which we document here. + */ +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SUBSIG_STACK 0 +#define SUBSIG_ILLINST 2 +#define SUBSIG_PRIVINST 3 +#define SUBSIG_BADTRAP(t) (0x80 + (t)) + +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 + +#define SIGEMT 7 +#define SUBSIG_TAG 10 + +#define SIGFPE 8 +#define SUBSIG_FPDISABLED 0x400 +#define SUBSIG_FPERROR 0x404 +#define SUBSIG_FPINTOVFL 0x001 +#define SUBSIG_FPSTSIG 0x002 +#define SUBSIG_IDIVZERO 0x014 +#define SUBSIG_FPINEXACT 0x0c4 +#define SUBSIG_FPDIVZERO 0x0c8 +#define SUBSIG_FPUNFLOW 0x0cc +#define SUBSIG_FPOPERROR 0x0d0 +#define SUBSIG_FPOVFLOW 0x0d4 + +#define SIGKILL 9 +#define SIGBUS 10 +#define SUBSIG_BUSTIMEOUT 1 +#define SUBSIG_ALIGNMENT 2 +#define SUBSIG_MISCERROR 5 + +#define SIGSEGV 11 +#define SUBSIG_NOMAPPING 3 +#define SUBSIG_PROTECTION 4 +#define SUBSIG_SEGERROR 5 + +#define SIGSYS 12 + +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGURG 16 + +/* SunOS values which deviate from the Linux/i386 ones */ +#define SIGSTOP 17 +#define SIGTSTP 18 +#define SIGCONT 19 +#define SIGCHLD 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGIO 23 +#define SIGPOLL SIGIO /* SysV name for SIGIO */ +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGLOST 29 +#define SIGPWR SIGLOST +#define SIGUSR1 30 +#define SIGUSR2 31 + +/* Most things should be clean enough to redefine this at will, if care + is taken to make libc match. */ + +#define __OLD_NSIG 32 +#define __NEW_NSIG 64 +#define _NSIG_BPW 64 +#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) + +#define SIGRTMIN 32 +#define SIGRTMAX __NEW_NSIG + +#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) +#define _NSIG __NEW_NSIG +#define __new_sigset_t sigset_t +#define __new_sigaction sigaction +#define __new_sigaction32 sigaction32 +#define __old_sigset_t old_sigset_t +#define __old_sigaction old_sigaction +#define __old_sigaction32 old_sigaction32 +#else +#define _NSIG __OLD_NSIG +#define NSIG _NSIG +#define __old_sigset_t sigset_t +#define __old_sigaction sigaction +#define __old_sigaction32 sigaction32 +#endif + +#ifndef __ASSEMBLY__ + +typedef unsigned long __old_sigset_t; /* at least 32 bits */ + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} __new_sigset_t; + +/* A SunOS sigstack */ +struct sigstack { + /* XXX 32-bit pointers pinhead XXX */ + char *the_stack; + int cur_status; +}; + +/* Sigvec flags */ +#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ +#define _SV_INTR 2u /* Sig return should not restart system call */ +#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ +#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ + +/* + * sa_flags values: SA_STACK is not currently supported, but will allow the + * usage of signal stacks by using the (now obsolete) sa_restorer field in + * the sigaction structure as a stack pointer. This is now possible due to + * the changes in signal handling. LBT 010493. + * SA_RESTART flag to get restarting signals (which were the default long ago) + */ +#define SA_NOCLDSTOP _SV_IGNCHILD +#define SA_STACK _SV_SSTACK +#define SA_ONSTACK _SV_SSTACK +#define SA_RESTART _SV_INTR +#define SA_ONESHOT _SV_RESET +#define SA_NOMASK 0x20u +#define SA_NOCLDWAIT 0x100u +#define SA_SIGINFO 0x200u + + +#define SIG_BLOCK 0x01 /* for blocking signals */ +#define SIG_UNBLOCK 0x02 /* for unblocking signals */ +#define SIG_SETMASK 0x04 /* for setting the signal mask */ + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 4096 +#define SIGSTKSZ 16384 + +#include + +struct __new_sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + __sigrestore_t sa_restorer; /* not used by Linux/SPARC yet */ + __new_sigset_t sa_mask; +}; + +struct __old_sigaction { + __sighandler_t sa_handler; + __old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); /* not used by Linux/SPARC yet */ +}; + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#ifdef __KERNEL__ + +struct k_sigaction { + struct __new_sigaction sa; + void __user *ka_restorer; +}; + +#define ptrace_signal_deliver(regs, cookie) do { } while (0) + +#endif /* !(__KERNEL__) */ + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_ASMSPARC64_SIGNAL_H) */ diff --git a/arch/sparc/include/asm/smp.h b/arch/sparc/include/asm/smp.h new file mode 100644 index 0000000000000000000000000000000000000000..b59672d0e19b6dd988fda29ad2871040e833168d --- /dev/null +++ b/arch/sparc/include/asm/smp.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SMP_H +#define ___ASM_SPARC_SMP_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/smp_32.h b/arch/sparc/include/asm/smp_32.h new file mode 100644 index 0000000000000000000000000000000000000000..7201752cf93418fba65af3dbcdaef246f8a627a7 --- /dev/null +++ b/arch/sparc/include/asm/smp_32.h @@ -0,0 +1,173 @@ +/* smp.h: Sparc specific SMP stuff. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_SMP_H +#define _SPARC_SMP_H + +#include +#include +#include + +#ifndef __ASSEMBLY__ + +#include + +#endif /* __ASSEMBLY__ */ + +#ifdef CONFIG_SMP + +#ifndef __ASSEMBLY__ + +#include +#include +#include + +/* + * Private routines/data + */ + +extern unsigned char boot_cpu_id; +extern cpumask_t phys_cpu_present_map; +#define cpu_possible_map phys_cpu_present_map + +typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, + unsigned long, unsigned long); + +/* + * General functions that each host system must provide. + */ + +void sun4m_init_smp(void); +void sun4d_init_smp(void); + +void smp_callin(void); +void smp_boot_cpus(void); +void smp_store_cpu_info(int); + +struct seq_file; +void smp_bogo(struct seq_file *); +void smp_info(struct seq_file *); + +BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) +BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) +BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) +BTFIXUPDEF_BLACKBOX(load_current) + +#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) + +static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } +static inline void xc1(smpfunc_t func, unsigned long arg1) +{ smp_cross_call(func, arg1, 0, 0, 0, 0); } +static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) +{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } +static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3) +{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } +static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4) +{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } +static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4, unsigned long arg5) +{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } + +static inline int smp_call_function(void (*func)(void *info), void *info, int wait) +{ + xc1((smpfunc_t)func, (unsigned long)info); + return 0; +} + +static inline int cpu_logical_map(int cpu) +{ + return cpu; +} + +static inline int hard_smp4m_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("rd %%tbr, %0\n\t" + "srl %0, 12, %0\n\t" + "and %0, 3, %0\n\t" : + "=&r" (cpuid)); + return cpuid; +} + +static inline int hard_smp4d_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : + "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1)); + return cpuid; +} + +#ifndef MODULE +static inline int hard_smp_processor_id(void) +{ + int cpuid; + + /* Black box - sun4m + __asm__ __volatile__("rd %%tbr, %0\n\t" + "srl %0, 12, %0\n\t" + "and %0, 3, %0\n\t" : + "=&r" (cpuid)); + - sun4d + __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t" + "nop; nop" : + "=&r" (cpuid)); + See btfixup.h and btfixupprep.c to understand how a blackbox works. + */ + __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t" + "sethi %%hi(boot_cpu_id), %0\n\t" + "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" : + "=&r" (cpuid)); + return cpuid; +} +#else +static inline int hard_smp_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("mov %%o7, %%g1\n\t" + "call ___f___hard_smp_processor_id\n\t" + " nop\n\t" + "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2"); + return cpuid; +} +#endif + +#define raw_smp_processor_id() (current_thread_info()->cpu) + +#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier +#define prof_counter(__cpu) cpu_data(__cpu).counter + +void smp_setup_cpu_possible_map(void); + +#endif /* !(__ASSEMBLY__) */ + +/* Sparc specific messages. */ +#define MSG_CROSS_CALL 0x0005 /* run func on cpus */ + +/* Empirical PROM processor mailbox constants. If the per-cpu mailbox + * contains something other than one of these then the ipi is from + * Linux's active_kernel_processor. This facility exists so that + * the boot monitor can capture all the other cpus when one catches + * a watchdog reset or the user enters the monitor using L1-A keys. + */ +#define MBOX_STOPCPU 0xFB +#define MBOX_IDLECPU 0xFC +#define MBOX_IDLECPU2 0xFD +#define MBOX_STOPCPU2 0xFE + +#else /* SMP */ + +#define hard_smp_processor_id() 0 +#define smp_setup_cpu_possible_map() do { } while (0) + +#endif /* !(SMP) */ + +#define NO_PROC_ID 0xFF + +#endif /* !(_SPARC_SMP_H) */ diff --git a/arch/sparc/include/asm/smp_64.h b/arch/sparc/include/asm/smp_64.h new file mode 100644 index 0000000000000000000000000000000000000000..57224dd37b3a59967bdf5ee7e527f551ec700229 --- /dev/null +++ b/arch/sparc/include/asm/smp_64.h @@ -0,0 +1,67 @@ +/* smp.h: Sparc64 specific SMP stuff. + * + * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_SMP_H +#define _SPARC64_SMP_H + +#include +#include +#include +#include + +#ifndef __ASSEMBLY__ + +#include +#include + +#endif /* !(__ASSEMBLY__) */ + +#ifdef CONFIG_SMP + +#ifndef __ASSEMBLY__ + +/* + * Private routines/data + */ + +#include +#include +#include + +DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); +extern cpumask_t cpu_core_map[NR_CPUS]; +extern int sparc64_multi_core; + +extern void arch_send_call_function_single_ipi(int cpu); +extern void arch_send_call_function_ipi(cpumask_t mask); + +/* + * General functions that each host system must provide. + */ + +extern int hard_smp_processor_id(void); +#define raw_smp_processor_id() (current_thread_info()->cpu) + +extern void smp_fill_in_sib_core_maps(void); +extern void cpu_play_dead(void); + +extern void smp_fetch_global_regs(void); + +#ifdef CONFIG_HOTPLUG_CPU +extern int __cpu_disable(void); +extern void __cpu_die(unsigned int cpu); +#endif + +#endif /* !(__ASSEMBLY__) */ + +#else + +#define hard_smp_processor_id() 0 +#define smp_fill_in_sib_core_maps() do { } while (0) +#define smp_fetch_global_regs() do { } while (0) + +#endif /* !(CONFIG_SMP) */ + +#endif /* !(_SPARC64_SMP_H) */ diff --git a/include/asm-sparc/smpprim.h b/arch/sparc/include/asm/smpprim.h similarity index 100% rename from include/asm-sparc/smpprim.h rename to arch/sparc/include/asm/smpprim.h diff --git a/include/asm-sparc/socket.h b/arch/sparc/include/asm/socket.h similarity index 100% rename from include/asm-sparc/socket.h rename to arch/sparc/include/asm/socket.h diff --git a/include/asm-sparc/sockios.h b/arch/sparc/include/asm/sockios.h similarity index 100% rename from include/asm-sparc/sockios.h rename to arch/sparc/include/asm/sockios.h diff --git a/include/asm-sparc64/sparsemem.h b/arch/sparc/include/asm/sparsemem.h similarity index 100% rename from include/asm-sparc64/sparsemem.h rename to arch/sparc/include/asm/sparsemem.h diff --git a/arch/sparc/include/asm/spinlock.h b/arch/sparc/include/asm/spinlock.h new file mode 100644 index 0000000000000000000000000000000000000000..f276b0036b2c4d3d547d25a2a7ff5e9722eac7af --- /dev/null +++ b/arch/sparc/include/asm/spinlock.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SPINLOCK_H +#define ___ASM_SPARC_SPINLOCK_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/spinlock.h b/arch/sparc/include/asm/spinlock_32.h similarity index 100% rename from include/asm-sparc/spinlock.h rename to arch/sparc/include/asm/spinlock_32.h diff --git a/include/asm-sparc64/spinlock.h b/arch/sparc/include/asm/spinlock_64.h similarity index 100% rename from include/asm-sparc64/spinlock.h rename to arch/sparc/include/asm/spinlock_64.h diff --git a/arch/sparc/include/asm/spinlock_types.h b/arch/sparc/include/asm/spinlock_types.h new file mode 100644 index 0000000000000000000000000000000000000000..37cbe01c585b5c9e91bdab7c013946bf11b87e65 --- /dev/null +++ b/arch/sparc/include/asm/spinlock_types.h @@ -0,0 +1,20 @@ +#ifndef __SPARC_SPINLOCK_TYPES_H +#define __SPARC_SPINLOCK_TYPES_H + +#ifndef __LINUX_SPINLOCK_TYPES_H +# error "please don't include this file directly" +#endif + +typedef struct { + volatile unsigned char lock; +} raw_spinlock_t; + +#define __RAW_SPIN_LOCK_UNLOCKED { 0 } + +typedef struct { + volatile unsigned int lock; +} raw_rwlock_t; + +#define __RAW_RW_LOCK_UNLOCKED { 0 } + +#endif diff --git a/include/asm-sparc64/spitfire.h b/arch/sparc/include/asm/spitfire.h similarity index 100% rename from include/asm-sparc64/spitfire.h rename to arch/sparc/include/asm/spitfire.h diff --git a/include/asm-sparc64/sstate.h b/arch/sparc/include/asm/sstate.h similarity index 100% rename from include/asm-sparc64/sstate.h rename to arch/sparc/include/asm/sstate.h diff --git a/include/asm-sparc64/stacktrace.h b/arch/sparc/include/asm/stacktrace.h similarity index 100% rename from include/asm-sparc64/stacktrace.h rename to arch/sparc/include/asm/stacktrace.h diff --git a/include/asm-sparc64/starfire.h b/arch/sparc/include/asm/starfire.h similarity index 100% rename from include/asm-sparc64/starfire.h rename to arch/sparc/include/asm/starfire.h diff --git a/arch/sparc/include/asm/stat.h b/arch/sparc/include/asm/stat.h new file mode 100644 index 0000000000000000000000000000000000000000..d8153013df7270d134416ed0ce272db68ab80cb7 --- /dev/null +++ b/arch/sparc/include/asm/stat.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_STAT_H +#define ___ASM_SPARC_STAT_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/stat.h b/arch/sparc/include/asm/stat_32.h similarity index 100% rename from include/asm-sparc/stat.h rename to arch/sparc/include/asm/stat_32.h diff --git a/include/asm-sparc64/stat.h b/arch/sparc/include/asm/stat_64.h similarity index 100% rename from include/asm-sparc64/stat.h rename to arch/sparc/include/asm/stat_64.h diff --git a/arch/sparc/include/asm/statfs.h b/arch/sparc/include/asm/statfs.h new file mode 100644 index 0000000000000000000000000000000000000000..5e937a73743dd85d7b830db6be254be72ed01105 --- /dev/null +++ b/arch/sparc/include/asm/statfs.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_STATFS_H +#define ___ASM_SPARC_STATFS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/statfs.h b/arch/sparc/include/asm/statfs_32.h similarity index 100% rename from include/asm-sparc/statfs.h rename to arch/sparc/include/asm/statfs_32.h diff --git a/include/asm-sparc64/statfs.h b/arch/sparc/include/asm/statfs_64.h similarity index 100% rename from include/asm-sparc64/statfs.h rename to arch/sparc/include/asm/statfs_64.h diff --git a/arch/sparc/include/asm/string.h b/arch/sparc/include/asm/string.h new file mode 100644 index 0000000000000000000000000000000000000000..98b72a0c8e6e624d0ea6618e4f8ace5736369309 --- /dev/null +++ b/arch/sparc/include/asm/string.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_STRING_H +#define ___ASM_SPARC_STRING_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/string_32.h b/arch/sparc/include/asm/string_32.h new file mode 100644 index 0000000000000000000000000000000000000000..6c5fddb7e6b5b9c1c49fe447ae6e0f09832591f3 --- /dev/null +++ b/arch/sparc/include/asm/string_32.h @@ -0,0 +1,205 @@ +/* + * string.h: External definitions for optimized assembly string + * routines for the Linux Kernel. + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __SPARC_STRING_H__ +#define __SPARC_STRING_H__ + +#include + +/* Really, userland/ksyms should not see any of this stuff. */ + +#ifdef __KERNEL__ + +extern void __memmove(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memset(void *,int,__kernel_size_t); + +#ifndef EXPORT_SYMTAB_STROPS + +/* First the mem*() things. */ +#define __HAVE_ARCH_MEMMOVE +#undef memmove +#define memmove(_to, _from, _n) \ +({ \ + void *_t = (_to); \ + __memmove(_t, (_from), (_n)); \ + _t; \ +}) + +#define __HAVE_ARCH_MEMCPY + +static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) +{ + extern void __copy_1page(void *, const void *); + + if(n <= 32) { + __builtin_memcpy(to, from, n); + } else if (((unsigned int) to & 7) != 0) { + /* Destination is not aligned on the double-word boundary */ + __memcpy(to, from, n); + } else { + switch(n) { + case PAGE_SIZE: + __copy_1page(to, from); + break; + default: + __memcpy(to, from, n); + break; + } + } + return to; +} + +static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n) +{ + __memcpy(to, from, n); + return to; +} + +#undef memcpy +#define memcpy(t, f, n) \ +(__builtin_constant_p(n) ? \ + __constant_memcpy((t),(f),(n)) : \ + __nonconstant_memcpy((t),(f),(n))) + +#define __HAVE_ARCH_MEMSET + +static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) +{ + extern void bzero_1page(void *); + extern __kernel_size_t __bzero(void *, __kernel_size_t); + + if(!c) { + if(count == PAGE_SIZE) + bzero_1page(s); + else + __bzero(s, count); + } else { + __memset(s, c, count); + } + return s; +} + +static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) +{ + extern __kernel_size_t __bzero(void *, __kernel_size_t); + + if(!c) + __bzero(s, count); + else + __memset(s, c, count); + return s; +} + +static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) +{ + __memset(s, c, count); + return s; +} + +#undef memset +#define memset(s, c, count) \ +(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ + __constant_c_and_count_memset((s), (c), (count)) : \ + __constant_c_memset((s), (c), (count))) \ + : __nonconstant_memset((s), (c), (count))) + +#define __HAVE_ARCH_MEMSCAN + +#undef memscan +#define memscan(__arg0, __char, __arg2) \ +({ \ + extern void *__memscan_zero(void *, size_t); \ + extern void *__memscan_generic(void *, int, size_t); \ + void *__retval, *__addr = (__arg0); \ + size_t __size = (__arg2); \ + \ + if(__builtin_constant_p(__char) && !(__char)) \ + __retval = __memscan_zero(__addr, __size); \ + else \ + __retval = __memscan_generic(__addr, (__char), __size); \ + \ + __retval; \ +}) + +#define __HAVE_ARCH_MEMCMP +extern int memcmp(const void *,const void *,__kernel_size_t); + +/* Now the str*() stuff... */ +#define __HAVE_ARCH_STRLEN +extern __kernel_size_t strlen(const char *); + +#define __HAVE_ARCH_STRNCMP + +extern int __strncmp(const char *, const char *, __kernel_size_t); + +static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count) +{ + register int retval; + switch(count) { + case 0: return 0; + case 1: return (src[0] - dest[0]); + case 2: retval = (src[0] - dest[0]); + if(!retval && src[0]) + retval = (src[1] - dest[1]); + return retval; + case 3: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) + retval = (src[2] - dest[2]); + } + return retval; + case 4: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if (!retval && src[2]) + retval = (src[3] - dest[3]); + } + } + return retval; + case 5: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if (!retval && src[2]) { + retval = (src[3] - dest[3]); + if (!retval && src[3]) + retval = (src[4] - dest[4]); + } + } + } + return retval; + default: + retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if(!retval && src[2]) + retval = __strncmp(src+3,dest+3,count-3); + } + } + return retval; + } +} + +#undef strncmp +#define strncmp(__arg0, __arg1, __arg2) \ +(__builtin_constant_p(__arg2) ? \ + __constant_strncmp(__arg0, __arg1, __arg2) : \ + __strncmp(__arg0, __arg1, __arg2)) + +#endif /* !EXPORT_SYMTAB_STROPS */ + +#endif /* __KERNEL__ */ + +#endif /* !(__SPARC_STRING_H__) */ diff --git a/include/asm-sparc64/string.h b/arch/sparc/include/asm/string_64.h similarity index 100% rename from include/asm-sparc64/string.h rename to arch/sparc/include/asm/string_64.h diff --git a/include/asm-sparc/sun4paddr.h b/arch/sparc/include/asm/sun4paddr.h similarity index 100% rename from include/asm-sparc/sun4paddr.h rename to arch/sparc/include/asm/sun4paddr.h diff --git a/include/asm-sparc/sun4prom.h b/arch/sparc/include/asm/sun4prom.h similarity index 100% rename from include/asm-sparc/sun4prom.h rename to arch/sparc/include/asm/sun4prom.h diff --git a/arch/sparc/include/asm/sunbpp.h b/arch/sparc/include/asm/sunbpp.h new file mode 100644 index 0000000000000000000000000000000000000000..d81a02eaf78bfc392fb0431adf40fe3b82f39fd7 --- /dev/null +++ b/arch/sparc/include/asm/sunbpp.h @@ -0,0 +1,80 @@ +/* + * include/asm/sunbpp.h + */ + +#ifndef _ASM_SPARC_SUNBPP_H +#define _ASM_SPARC_SUNBPP_H + +struct bpp_regs { + /* DMA registers */ + __volatile__ __u32 p_csr; /* DMA Control/Status Register */ + __volatile__ __u32 p_addr; /* Address Register */ + __volatile__ __u32 p_bcnt; /* Byte Count Register */ + __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */ + /* Parallel Port registers */ + __volatile__ __u16 p_hcr; /* Hardware Configuration Register */ + __volatile__ __u16 p_ocr; /* Operation Configuration Register */ + __volatile__ __u8 p_dr; /* Parallel Data Register */ + __volatile__ __u8 p_tcr; /* Transfer Control Register */ + __volatile__ __u8 p_or; /* Output Register */ + __volatile__ __u8 p_ir; /* Input Register */ + __volatile__ __u16 p_icr; /* Interrupt Control Register */ +}; + +/* P_HCR. Time is in increments of SBus clock. */ +#define P_HCR_TEST 0x8000 /* Allows buried counters to be read */ +#define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */ +#define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */ + +/* P_OCR. */ +#define P_OCR_MEM_CLR 0x8000 +#define P_OCR_DATA_SRC 0x4000 /* ) */ +#define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */ +#define P_OCR_BUSY_DSEL 0x1000 /* ) selects */ +#define P_OCR_ACK_DSEL 0x0800 /* ) */ +#define P_OCR_EN_DIAG 0x0400 +#define P_OCR_BUSY_OP 0x0200 /* Busy operation */ +#define P_OCR_ACK_OP 0x0100 /* Ack operation */ +#define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */ +#define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */ +#define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */ +#define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */ + +/* P_TCR */ +#define P_TCR_DIR 0x08 +#define P_TCR_BUSY 0x04 +#define P_TCR_ACK 0x02 +#define P_TCR_DS 0x01 /* Strobe */ + +/* P_OR */ +#define P_OR_V3 0x20 /* ) */ +#define P_OR_V2 0x10 /* ) on Zebra only */ +#define P_OR_V1 0x08 /* ) */ +#define P_OR_INIT 0x04 +#define P_OR_AFXN 0x02 /* Auto Feed */ +#define P_OR_SLCT_IN 0x01 + +/* P_IR */ +#define P_IR_PE 0x04 +#define P_IR_SLCT 0x02 +#define P_IR_ERR 0x01 + +/* P_ICR */ +#define P_DS_IRQ 0x8000 /* RW1 */ +#define P_ACK_IRQ 0x4000 /* RW1 */ +#define P_BUSY_IRQ 0x2000 /* RW1 */ +#define P_PE_IRQ 0x1000 /* RW1 */ +#define P_SLCT_IRQ 0x0800 /* RW1 */ +#define P_ERR_IRQ 0x0400 /* RW1 */ +#define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */ +#define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */ +#define P_BUSY_IRP 0x0080 /* RW 1= rising edge */ +#define P_BUSY_IRQ_EN 0x0040 /* RW */ +#define P_PE_IRP 0x0020 /* RW 1= rising edge */ +#define P_PE_IRQ_EN 0x0010 /* RW */ +#define P_SLCT_IRP 0x0008 /* RW 1= rising edge */ +#define P_SLCT_IRQ_EN 0x0004 /* RW */ +#define P_ERR_IRP 0x0002 /* RW1 1= rising edge */ +#define P_ERR_IRQ_EN 0x0001 /* RW */ + +#endif /* !(_ASM_SPARC_SUNBPP_H) */ diff --git a/include/asm-sparc/swift.h b/arch/sparc/include/asm/swift.h similarity index 100% rename from include/asm-sparc/swift.h rename to arch/sparc/include/asm/swift.h diff --git a/arch/sparc/include/asm/syscall.h b/arch/sparc/include/asm/syscall.h new file mode 100644 index 0000000000000000000000000000000000000000..7486c605e23cb36832ec74019c4adad2a68ec0a9 --- /dev/null +++ b/arch/sparc/include/asm/syscall.h @@ -0,0 +1,120 @@ +#ifndef __ASM_SPARC_SYSCALL_H +#define __ASM_SPARC_SYSCALL_H + +#include +#include +#include + +/* The system call number is given by the user in %g1 */ +static inline long syscall_get_nr(struct task_struct *task, + struct pt_regs *regs) +{ + int syscall_p = pt_regs_is_syscall(regs); + + return (syscall_p ? regs->u_regs[UREG_G1] : -1L); +} + +static inline void syscall_rollback(struct task_struct *task, + struct pt_regs *regs) +{ + /* XXX This needs some thought. On Sparc we don't + * XXX save away the original %o0 value somewhere. + * XXX Instead we hold it in register %l5 at the top + * XXX level trap frame and pass this down to the signal + * XXX dispatch code which is the only place that value + * XXX ever was needed. + */ +} + +#ifdef CONFIG_SPARC32 +static inline bool syscall_has_error(struct pt_regs *regs) +{ + return (regs->psr & PSR_C) ? true : false; +} +static inline void syscall_set_error(struct pt_regs *regs) +{ + regs->psr |= PSR_C; +} +static inline void syscall_clear_error(struct pt_regs *regs) +{ + regs->psr &= ~PSR_C; +} +#else +static inline bool syscall_has_error(struct pt_regs *regs) +{ + return (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)) ? true : false; +} +static inline void syscall_set_error(struct pt_regs *regs) +{ + regs->tstate |= (TSTATE_XCARRY | TSTATE_ICARRY); +} +static inline void syscall_clear_error(struct pt_regs *regs) +{ + regs->tstate &= ~(TSTATE_XCARRY | TSTATE_ICARRY); +} +#endif + +static inline long syscall_get_error(struct task_struct *task, + struct pt_regs *regs) +{ + long val = regs->u_regs[UREG_I0]; + + return (syscall_has_error(regs) ? -val : 0); +} + +static inline long syscall_get_return_value(struct task_struct *task, + struct pt_regs *regs) +{ + long val = regs->u_regs[UREG_I0]; + + return val; +} + +static inline void syscall_set_return_value(struct task_struct *task, + struct pt_regs *regs, + int error, long val) +{ + if (error) { + syscall_set_error(regs); + regs->u_regs[UREG_I0] = -error; + } else { + syscall_clear_error(regs); + regs->u_regs[UREG_I0] = val; + } +} + +static inline void syscall_get_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned int i, unsigned int n, + unsigned long *args) +{ + int zero_extend = 0; + unsigned int j; + +#ifdef CONFIG_SPARC64 + if (test_tsk_thread_flag(task, TIF_32BIT)) + zero_extend = 1; +#endif + + for (j = 0; j < n; j++) { + unsigned long val = regs->u_regs[UREG_I0 + i + j]; + + if (zero_extend) + args[j] = (u32) val; + else + args[j] = val; + } +} + +static inline void syscall_set_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned int i, unsigned int n, + const unsigned long *args) +{ + unsigned int j; + + for (j = 0; j < n; j++) + regs->u_regs[UREG_I0 + i + j] = args[j]; +} + +#endif /* __ASM_SPARC_SYSCALL_H */ diff --git a/include/asm-sparc64/syscalls.h b/arch/sparc/include/asm/syscalls.h similarity index 100% rename from include/asm-sparc64/syscalls.h rename to arch/sparc/include/asm/syscalls.h diff --git a/include/asm-sparc/sysen.h b/arch/sparc/include/asm/sysen.h similarity index 100% rename from include/asm-sparc/sysen.h rename to arch/sparc/include/asm/sysen.h diff --git a/arch/sparc/include/asm/system.h b/arch/sparc/include/asm/system.h new file mode 100644 index 0000000000000000000000000000000000000000..7944a7cfc99636032c358bfa894332fb50c07c3a --- /dev/null +++ b/arch/sparc/include/asm/system.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_SYSTEM_H +#define ___ASM_SPARC_SYSTEM_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/system.h b/arch/sparc/include/asm/system_32.h similarity index 100% rename from include/asm-sparc/system.h rename to arch/sparc/include/asm/system_32.h diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h new file mode 100644 index 0000000000000000000000000000000000000000..db9e742a406ae6a9d08e8c322d2bef9eec9b3e61 --- /dev/null +++ b/arch/sparc/include/asm/system_64.h @@ -0,0 +1,355 @@ +#ifndef __SPARC64_SYSTEM_H +#define __SPARC64_SYSTEM_H + +#include +#include +#include + +#ifndef __ASSEMBLY__ + +#include +#include + +/* + * Sparc (general) CPU types + */ +enum sparc_cpu { + sun4 = 0x00, + sun4c = 0x01, + sun4m = 0x02, + sun4d = 0x03, + sun4e = 0x04, + sun4u = 0x05, /* V8 ploos ploos */ + sun_unknown = 0x06, + ap1000 = 0x07, /* almost a sun4m */ +}; + +#define sparc_cpu_model sun4u + +/* This cannot ever be a sun4c nor sun4 :) That's just history. */ +#define ARCH_SUN4C_SUN4 0 +#define ARCH_SUN4 0 + +extern char reboot_command[]; + +/* These are here in an effort to more fully work around Spitfire Errata + * #51. Essentially, if a memory barrier occurs soon after a mispredicted + * branch, the chip can stop executing instructions until a trap occurs. + * Therefore, if interrupts are disabled, the chip can hang forever. + * + * It used to be believed that the memory barrier had to be right in the + * delay slot, but a case has been traced recently wherein the memory barrier + * was one instruction after the branch delay slot and the chip still hung. + * The offending sequence was the following in sym_wakeup_done() of the + * sym53c8xx_2 driver: + * + * call sym_ccb_from_dsa, 0 + * movge %icc, 0, %l0 + * brz,pn %o0, .LL1303 + * mov %o0, %l2 + * membar #LoadLoad + * + * The branch has to be mispredicted for the bug to occur. Therefore, we put + * the memory barrier explicitly into a "branch always, predicted taken" + * delay slot to avoid the problem case. + */ +#define membar_safe(type) \ +do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ + " membar " type "\n" \ + "1:\n" \ + : : : "memory"); \ +} while (0) + +#define mb() \ + membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad") +#define rmb() \ + membar_safe("#LoadLoad") +#define wmb() \ + membar_safe("#StoreStore") +#define membar_storeload() \ + membar_safe("#StoreLoad") +#define membar_storeload_storestore() \ + membar_safe("#StoreLoad | #StoreStore") +#define membar_storeload_loadload() \ + membar_safe("#StoreLoad | #LoadLoad") +#define membar_storestore_loadstore() \ + membar_safe("#StoreStore | #LoadStore") + +#endif + +#define nop() __asm__ __volatile__ ("nop") + +#define read_barrier_depends() do { } while(0) +#define set_mb(__var, __value) \ + do { __var = __value; membar_storeload_storestore(); } while(0) + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#else +#define smp_mb() __asm__ __volatile__("":::"memory") +#define smp_rmb() __asm__ __volatile__("":::"memory") +#define smp_wmb() __asm__ __volatile__("":::"memory") +#define smp_read_barrier_depends() do { } while(0) +#endif + +#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory") + +#define flushw_all() __asm__ __volatile__("flushw") + +/* Performance counter register access. */ +#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p)) +#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p)) +#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p)) + +/* Blackbird errata workaround. See commentary in + * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt() + * for more information. + */ +#define reset_pic() \ + __asm__ __volatile__("ba,pt %xcc, 99f\n\t" \ + ".align 64\n" \ + "99:wr %g0, 0x0, %pic\n\t" \ + "rd %pic, %g0") + +#ifndef __ASSEMBLY__ + +extern void sun_do_break(void); +extern int stop_a_enabled; + +extern void fault_in_user_windows(void); +extern void synchronize_user_stack(void); + +extern void __flushw_user(void); +#define flushw_user() __flushw_user() + +#define flush_user_windows flushw_user +#define flush_register_windows flushw_all + +/* Don't hold the runqueue lock over context switch */ +#define __ARCH_WANT_UNLOCKED_CTXSW +#define prepare_arch_switch(next) \ +do { \ + flushw_all(); \ +} while (0) + + /* See what happens when you design the chip correctly? + * + * We tell gcc we clobber all non-fixed-usage registers except + * for l0/l1. It will use one for 'next' and the other to hold + * the output value of 'last'. 'next' is not referenced again + * past the invocation of switch_to in the scheduler, so we need + * not preserve it's value. Hairy, but it lets us remove 2 loads + * and 2 stores in this critical code path. -DaveM + */ +#define switch_to(prev, next, last) \ +do { if (test_thread_flag(TIF_PERFCTR)) { \ + unsigned long __tmp; \ + read_pcr(__tmp); \ + current_thread_info()->pcr_reg = __tmp; \ + read_pic(__tmp); \ + current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\ + current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \ + } \ + flush_tlb_pending(); \ + save_and_clear_fpu(); \ + /* If you are tempted to conditionalize the following */ \ + /* so that ASI is only written if it changes, think again. */ \ + __asm__ __volatile__("wr %%g0, %0, %%asi" \ + : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\ + trap_block[current_thread_info()->cpu].thread = \ + task_thread_info(next); \ + __asm__ __volatile__( \ + "mov %%g4, %%g7\n\t" \ + "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ + "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ + "rdpr %%wstate, %%o5\n\t" \ + "stx %%o6, [%%g6 + %6]\n\t" \ + "stb %%o5, [%%g6 + %5]\n\t" \ + "rdpr %%cwp, %%o5\n\t" \ + "stb %%o5, [%%g6 + %8]\n\t" \ + "mov %4, %%g6\n\t" \ + "ldub [%4 + %8], %%g1\n\t" \ + "wrpr %%g1, %%cwp\n\t" \ + "ldx [%%g6 + %6], %%o6\n\t" \ + "ldub [%%g6 + %5], %%o5\n\t" \ + "ldub [%%g6 + %7], %%o7\n\t" \ + "wrpr %%o5, 0x0, %%wstate\n\t" \ + "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ + "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ + "ldx [%%g6 + %9], %%g4\n\t" \ + "brz,pt %%o7, switch_to_pc\n\t" \ + " mov %%g7, %0\n\t" \ + "sethi %%hi(ret_from_syscall), %%g1\n\t" \ + "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ + " nop\n\t" \ + ".globl switch_to_pc\n\t" \ + "switch_to_pc:\n\t" \ + : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ + "=r" (__local_per_cpu_offset) \ + : "0" (task_thread_info(next)), \ + "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ + "i" (TI_CWP), "i" (TI_TASK) \ + : "cc", \ + "g1", "g2", "g3", "g7", \ + "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ + "i0", "i1", "i2", "i3", "i4", "i5", \ + "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ + /* If you fuck with this, update ret_from_syscall code too. */ \ + if (test_thread_flag(TIF_PERFCTR)) { \ + write_pcr(current_thread_info()->pcr_reg); \ + reset_pic(); \ + } \ +} while(0) + +static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" +" mov %0, %1\n" +"1: lduw [%4], %2\n" +" cas [%4], %2, %0\n" +" cmp %2, %0\n" +" bne,a,pn %%icc, 1b\n" +" mov %1, %0\n" +" membar #StoreLoad | #StoreStore\n" + : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) + : "0" (val), "r" (m) + : "cc", "memory"); + return val; +} + +static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" +" mov %0, %1\n" +"1: ldx [%4], %2\n" +" casx [%4], %2, %0\n" +" cmp %2, %0\n" +" bne,a,pn %%xcc, 1b\n" +" mov %1, %0\n" +" membar #StoreLoad | #StoreStore\n" + : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) + : "0" (val), "r" (m) + : "cc", "memory"); + return val; +} + +#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, + int size) +{ + switch (size) { + case 4: + return xchg32(ptr, x); + case 8: + return xchg64(ptr, x); + }; + __xchg_called_with_bad_pointer(); + return x; +} + +extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); + +/* + * Atomic compare and exchange. Compare OLD with MEM, if identical, + * store NEW in MEM. Return the initial value in MEM. Success is + * indicated by comparing RETURN with OLD. + */ + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long +__cmpxchg_u32(volatile int *m, int old, int new) +{ + __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" + "cas [%2], %3, %0\n\t" + "membar #StoreLoad | #StoreStore" + : "=&r" (new) + : "0" (new), "r" (m), "r" (old) + : "memory"); + + return new; +} + +static inline unsigned long +__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) +{ + __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" + "casx [%2], %3, %0\n\t" + "membar #StoreLoad | #StoreStore" + : "=&r" (new) + : "0" (new), "r" (m), "r" (old) + : "memory"); + + return new; +} + +/* This function doesn't exist, so you'll get a linker error + if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +static inline unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + case 8: + return __cmpxchg_u64(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +/* + * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make + * them available. + */ + +static inline unsigned long __cmpxchg_local(volatile void *ptr, + unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + case 8: return __cmpxchg(ptr, old, new, size); + default: + return __cmpxchg_local_generic(ptr, old, new, size); + } + + return old; +} + +#define cmpxchg_local(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr)))) +#define cmpxchg64_local(ptr, o, n) \ + ({ \ + BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ + cmpxchg_local((ptr), (o), (n)); \ + }) + +#endif /* !(__ASSEMBLY__) */ + +#define arch_align_stack(x) (x) + +#endif /* !(__SPARC64_SYSTEM_H) */ diff --git a/arch/sparc/include/asm/termbits.h b/arch/sparc/include/asm/termbits.h new file mode 100644 index 0000000000000000000000000000000000000000..d6ca3e2754f5f37e792f3a060fed8bfc68a76305 --- /dev/null +++ b/arch/sparc/include/asm/termbits.h @@ -0,0 +1,266 @@ +#ifndef _SPARC_TERMBITS_H +#define _SPARC_TERMBITS_H + +#include + +typedef unsigned char cc_t; +typedef unsigned int speed_t; + +#if defined(__sparc__) && defined(__arch64__) +typedef unsigned int tcflag_t; +#else +typedef unsigned long tcflag_t; +#endif + +#define NCC 8 +struct termio { + unsigned short c_iflag; /* input mode flags */ + unsigned short c_oflag; /* output mode flags */ + unsigned short c_cflag; /* control mode flags */ + unsigned short c_lflag; /* local mode flags */ + unsigned char c_line; /* line discipline */ + unsigned char c_cc[NCC]; /* control characters */ +}; + +#define NCCS 17 +struct termios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ +#ifdef __KERNEL__ +#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t)) + cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ +#endif +}; + +struct termios2 { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t _x_cc[2]; /* padding to match ktermios */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + +struct ktermios { + tcflag_t c_iflag; /* input mode flags */ + tcflag_t c_oflag; /* output mode flags */ + tcflag_t c_cflag; /* control mode flags */ + tcflag_t c_lflag; /* local mode flags */ + cc_t c_line; /* line discipline */ + cc_t c_cc[NCCS]; /* control characters */ + cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ + speed_t c_ispeed; /* input speed */ + speed_t c_ospeed; /* output speed */ +}; + +/* c_cc characters */ +#define VINTR 0 +#define VQUIT 1 +#define VERASE 2 +#define VKILL 3 +#define VEOF 4 +#define VEOL 5 +#define VEOL2 6 +#define VSWTC 7 +#define VSTART 8 +#define VSTOP 9 + + + +#define VSUSP 10 +#define VDSUSP 11 /* SunOS POSIX nicety I do believe... */ +#define VREPRINT 12 +#define VDISCARD 13 +#define VWERASE 14 +#define VLNEXT 15 + +/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is + * shared with eof/eol + */ +#ifdef __KERNEL__ +#define VMIN 16 +#define VTIME 17 +#else +#define VMIN VEOF +#define VTIME VEOL +#endif + +/* c_iflag bits */ +#define IGNBRK 0x00000001 +#define BRKINT 0x00000002 +#define IGNPAR 0x00000004 +#define PARMRK 0x00000008 +#define INPCK 0x00000010 +#define ISTRIP 0x00000020 +#define INLCR 0x00000040 +#define IGNCR 0x00000080 +#define ICRNL 0x00000100 +#define IUCLC 0x00000200 +#define IXON 0x00000400 +#define IXANY 0x00000800 +#define IXOFF 0x00001000 +#define IMAXBEL 0x00002000 +#define IUTF8 0x00004000 + +/* c_oflag bits */ +#define OPOST 0x00000001 +#define OLCUC 0x00000002 +#define ONLCR 0x00000004 +#define OCRNL 0x00000008 +#define ONOCR 0x00000010 +#define ONLRET 0x00000020 +#define OFILL 0x00000040 +#define OFDEL 0x00000080 +#define NLDLY 0x00000100 +#define NL0 0x00000000 +#define NL1 0x00000100 +#define CRDLY 0x00000600 +#define CR0 0x00000000 +#define CR1 0x00000200 +#define CR2 0x00000400 +#define CR3 0x00000600 +#define TABDLY 0x00001800 +#define TAB0 0x00000000 +#define TAB1 0x00000800 +#define TAB2 0x00001000 +#define TAB3 0x00001800 +#define XTABS 0x00001800 +#define BSDLY 0x00002000 +#define BS0 0x00000000 +#define BS1 0x00002000 +#define VTDLY 0x00004000 +#define VT0 0x00000000 +#define VT1 0x00004000 +#define FFDLY 0x00008000 +#define FF0 0x00000000 +#define FF1 0x00008000 +#define PAGEOUT 0x00010000 /* SUNOS specific */ +#define WRAP 0x00020000 /* SUNOS specific */ + +/* c_cflag bit meaning */ +#define CBAUD 0x0000100f +#define B0 0x00000000 /* hang up */ +#define B50 0x00000001 +#define B75 0x00000002 +#define B110 0x00000003 +#define B134 0x00000004 +#define B150 0x00000005 +#define B200 0x00000006 +#define B300 0x00000007 +#define B600 0x00000008 +#define B1200 0x00000009 +#define B1800 0x0000000a +#define B2400 0x0000000b +#define B4800 0x0000000c +#define B9600 0x0000000d +#define B19200 0x0000000e +#define B38400 0x0000000f +#define EXTA B19200 +#define EXTB B38400 +#define CSIZE 0x00000030 +#define CS5 0x00000000 +#define CS6 0x00000010 +#define CS7 0x00000020 +#define CS8 0x00000030 +#define CSTOPB 0x00000040 +#define CREAD 0x00000080 +#define PARENB 0x00000100 +#define PARODD 0x00000200 +#define HUPCL 0x00000400 +#define CLOCAL 0x00000800 +#define CBAUDEX 0x00001000 +/* We'll never see these speeds with the Zilogs, but for completeness... */ +#define BOTHER 0x00001000 +#define B57600 0x00001001 +#define B115200 0x00001002 +#define B230400 0x00001003 +#define B460800 0x00001004 +/* This is what we can do with the Zilogs. */ +#define B76800 0x00001005 +/* This is what we can do with the SAB82532. */ +#define B153600 0x00001006 +#define B307200 0x00001007 +#define B614400 0x00001008 +#define B921600 0x00001009 +/* And these are the rest... */ +#define B500000 0x0000100a +#define B576000 0x0000100b +#define B1000000 0x0000100c +#define B1152000 0x0000100d +#define B1500000 0x0000100e +#define B2000000 0x0000100f +/* These have totally bogus values and nobody uses them + so far. Later on we'd have to use say 0x10000x and + adjust CBAUD constant and drivers accordingly. +#define B2500000 0x00001010 +#define B3000000 0x00001011 +#define B3500000 0x00001012 +#define B4000000 0x00001013 */ +#define CIBAUD 0x100f0000 /* input baud rate (not used) */ +#define CMSPAR 0x40000000 /* mark or space (stick) parity */ +#define CRTSCTS 0x80000000 /* flow control */ + +#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ + +/* c_lflag bits */ +#define ISIG 0x00000001 +#define ICANON 0x00000002 +#define XCASE 0x00000004 +#define ECHO 0x00000008 +#define ECHOE 0x00000010 +#define ECHOK 0x00000020 +#define ECHONL 0x00000040 +#define NOFLSH 0x00000080 +#define TOSTOP 0x00000100 +#define ECHOCTL 0x00000200 +#define ECHOPRT 0x00000400 +#define ECHOKE 0x00000800 +#define DEFECHO 0x00001000 /* SUNOS thing, what is it? */ +#define FLUSHO 0x00002000 +#define PENDIN 0x00004000 +#define IEXTEN 0x00008000 + +/* modem lines */ +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x008 +#define TIOCM_SR 0x010 +#define TIOCM_CTS 0x020 +#define TIOCM_CAR 0x040 +#define TIOCM_RNG 0x080 +#define TIOCM_DSR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RI TIOCM_RNG +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 + +/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ +#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ + + +/* tcflow() and TCXONC use these */ +#define TCOOFF 0 +#define TCOON 1 +#define TCIOFF 2 +#define TCION 3 + +/* tcflush() and TCFLSH use these */ +#define TCIFLUSH 0 +#define TCOFLUSH 1 +#define TCIOFLUSH 2 + +/* tcsetattr uses these */ +#define TCSANOW 0 +#define TCSADRAIN 1 +#define TCSAFLUSH 2 + +#endif /* !(_SPARC_TERMBITS_H) */ diff --git a/arch/sparc/include/asm/termios.h b/arch/sparc/include/asm/termios.h new file mode 100644 index 0000000000000000000000000000000000000000..e8ba95399643399592e3699f756e374701f61518 --- /dev/null +++ b/arch/sparc/include/asm/termios.h @@ -0,0 +1,186 @@ +#ifndef _SPARC_TERMIOS_H +#define _SPARC_TERMIOS_H + +#include +#include + +#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS) +struct sgttyb { + char sg_ispeed; + char sg_ospeed; + char sg_erase; + char sg_kill; + short sg_flags; +}; + +struct tchars { + char t_intrc; + char t_quitc; + char t_startc; + char t_stopc; + char t_eofc; + char t_brkc; +}; + +struct ltchars { + char t_suspc; + char t_dsuspc; + char t_rprntc; + char t_flushc; + char t_werasc; + char t_lnextc; +}; +#endif /* __KERNEL__ */ + +struct winsize { + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +}; + +#ifdef __KERNEL__ +#include + +/* + * c_cc characters in the termio structure. Oh, how I love being + * backwardly compatible. Notice that character 4 and 5 are + * interpreted differently depending on whether ICANON is set in + * c_lflag. If it's set, they are used as _VEOF and _VEOL, otherwise + * as _VMIN and V_TIME. This is for compatibility with OSF/1 (which + * is compatible with sysV)... + */ +#define _VMIN 4 +#define _VTIME 5 + +/* intr=^C quit=^\ erase=del kill=^U + eof=^D eol=\0 eol2=\0 sxtc=\0 + start=^Q stop=^S susp=^Z dsusp=^Y + reprint=^R discard=^U werase=^W lnext=^V + vmin=\1 vtime=\0 +*/ +#define INIT_C_CC "\003\034\177\025\004\000\000\000\021\023\032\031\022\025\027\026\001" + +/* + * Translate a "termio" structure into a "termios". Ugh. + */ +#define user_termio_to_kernel_termios(termios, termio) \ +({ \ + unsigned short tmp; \ + int err; \ + err = get_user(tmp, &(termio)->c_iflag); \ + (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ + err |= get_user(tmp, &(termio)->c_oflag); \ + (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ + err |= get_user(tmp, &(termio)->c_cflag); \ + (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ + err |= get_user(tmp, &(termio)->c_lflag); \ + (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ + err |= copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ + err; \ +}) + +/* + * Translate a "termios" structure into a "termio". Ugh. + * + * Note the "fun" _VMIN overloading. + */ +#define kernel_termios_to_user_termio(termio, termios) \ +({ \ + int err; \ + err = put_user((termios)->c_iflag, &(termio)->c_iflag); \ + err |= put_user((termios)->c_oflag, &(termio)->c_oflag); \ + err |= put_user((termios)->c_cflag, &(termio)->c_cflag); \ + err |= put_user((termios)->c_lflag, &(termio)->c_lflag); \ + err |= put_user((termios)->c_line, &(termio)->c_line); \ + err |= copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ + if (!((termios)->c_lflag & ICANON)) { \ + err |= put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \ + err |= put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \ + } \ + err; \ +}) + +#define user_termios_to_kernel_termios(k, u) \ +({ \ + int err; \ + err = get_user((k)->c_iflag, &(u)->c_iflag); \ + err |= get_user((k)->c_oflag, &(u)->c_oflag); \ + err |= get_user((k)->c_cflag, &(u)->c_cflag); \ + err |= get_user((k)->c_lflag, &(u)->c_lflag); \ + err |= get_user((k)->c_line, &(u)->c_line); \ + err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ + if ((k)->c_lflag & ICANON) { \ + err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ + } else { \ + err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ + } \ + err |= get_user((k)->c_ispeed, &(u)->c_ispeed); \ + err |= get_user((k)->c_ospeed, &(u)->c_ospeed); \ + err; \ +}) + +#define kernel_termios_to_user_termios(u, k) \ +({ \ + int err; \ + err = put_user((k)->c_iflag, &(u)->c_iflag); \ + err |= put_user((k)->c_oflag, &(u)->c_oflag); \ + err |= put_user((k)->c_cflag, &(u)->c_cflag); \ + err |= put_user((k)->c_lflag, &(u)->c_lflag); \ + err |= put_user((k)->c_line, &(u)->c_line); \ + err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ + if (!((k)->c_lflag & ICANON)) { \ + err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ + } else { \ + err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ + } \ + err |= put_user((k)->c_ispeed, &(u)->c_ispeed); \ + err |= put_user((k)->c_ospeed, &(u)->c_ospeed); \ + err; \ +}) + +#define user_termios_to_kernel_termios_1(k, u) \ +({ \ + int err; \ + err = get_user((k)->c_iflag, &(u)->c_iflag); \ + err |= get_user((k)->c_oflag, &(u)->c_oflag); \ + err |= get_user((k)->c_cflag, &(u)->c_cflag); \ + err |= get_user((k)->c_lflag, &(u)->c_lflag); \ + err |= get_user((k)->c_line, &(u)->c_line); \ + err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ + if ((k)->c_lflag & ICANON) { \ + err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ + } else { \ + err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ + } \ + err; \ +}) + +#define kernel_termios_to_user_termios_1(u, k) \ +({ \ + int err; \ + err = put_user((k)->c_iflag, &(u)->c_iflag); \ + err |= put_user((k)->c_oflag, &(u)->c_oflag); \ + err |= put_user((k)->c_cflag, &(u)->c_cflag); \ + err |= put_user((k)->c_lflag, &(u)->c_lflag); \ + err |= put_user((k)->c_line, &(u)->c_line); \ + err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ + if (!((k)->c_lflag & ICANON)) { \ + err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ + err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ + } else { \ + err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ + err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ + } \ + err; \ +}) + +#endif /* __KERNEL__ */ + +#endif /* _SPARC_TERMIOS_H */ diff --git a/arch/sparc/include/asm/thread_info.h b/arch/sparc/include/asm/thread_info.h new file mode 100644 index 0000000000000000000000000000000000000000..122d7acc07e6b91519b756e9676e4dbe10c69ab9 --- /dev/null +++ b/arch/sparc/include/asm/thread_info.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_THREAD_INFO_H +#define ___ASM_SPARC_THREAD_INFO_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/thread_info_32.h b/arch/sparc/include/asm/thread_info_32.h new file mode 100644 index 0000000000000000000000000000000000000000..cbb892d0dff04b033ae371af6175cb443cb2c06e --- /dev/null +++ b/arch/sparc/include/asm/thread_info_32.h @@ -0,0 +1,158 @@ +/* + * thread_info.h: sparc low-level thread information + * adapted from the ppc version by Pete Zaitcev, which was + * adapted from the i386 version by Paul Mackerras + * + * Copyright (C) 2002 David Howells (dhowells@redhat.com) + * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) + * - Incorporating suggestions made by Linus Torvalds and Dave Miller + */ + +#ifndef _ASM_THREAD_INFO_H +#define _ASM_THREAD_INFO_H + +#ifdef __KERNEL__ + +#ifndef __ASSEMBLY__ + +#include +#include +#include + +/* + * Low level task data. + * + * If you change this, change the TI_* offsets below to match. + */ +#define NSWINS 8 +struct thread_info { + unsigned long uwinmask; + struct task_struct *task; /* main task structure */ + struct exec_domain *exec_domain; /* execution domain */ + unsigned long flags; /* low level flags */ + int cpu; /* cpu we're on */ + int preempt_count; /* 0 => preemptable, + <0 => BUG */ + int softirq_count; + int hardirq_count; + + /* Context switch saved kernel state. */ + unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ + unsigned long kpc; + unsigned long kpsr; + unsigned long kwim; + + /* A place to store user windows and stack pointers + * when the stack needs inspection. + */ + struct reg_window reg_window[NSWINS]; /* align for ldd! */ + unsigned long rwbuf_stkptrs[NSWINS]; + unsigned long w_saved; + + struct restart_block restart_block; +}; + +/* + * macros/functions for gaining access to the thread information structure + * + * preempt_count needs to be 1 initially, until the scheduler is functional. + */ +#define INIT_THREAD_INFO(tsk) \ +{ \ + .uwinmask = 0, \ + .task = &tsk, \ + .exec_domain = &default_exec_domain, \ + .flags = 0, \ + .cpu = 0, \ + .preempt_count = 1, \ + .restart_block = { \ + .fn = do_no_restart_syscall, \ + }, \ +} + +#define init_thread_info (init_thread_union.thread_info) +#define init_stack (init_thread_union.stack) + +/* how to get the thread information struct from C */ +register struct thread_info *current_thread_info_reg asm("g6"); +#define current_thread_info() (current_thread_info_reg) + +/* + * thread information allocation + */ +#if PAGE_SHIFT == 13 +#define THREAD_INFO_ORDER 0 +#else /* PAGE_SHIFT */ +#define THREAD_INFO_ORDER 1 +#endif + +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + +BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) +#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() + +BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) +#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) + +#endif /* __ASSEMBLY__ */ + +/* + * Size of kernel stack for each process. + * Observe the order of get_free_pages() in alloc_thread_info(). + * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. + */ +#define THREAD_SIZE 8192 + +/* + * Offsets in thread_info structure, used in assembly code + * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. + */ +#define TI_UWINMASK 0x00 /* uwinmask */ +#define TI_TASK 0x04 +#define TI_EXECDOMAIN 0x08 /* exec_domain */ +#define TI_FLAGS 0x0c +#define TI_CPU 0x10 +#define TI_PREEMPT 0x14 /* preempt_count */ +#define TI_SOFTIRQ 0x18 /* softirq_count */ +#define TI_HARDIRQ 0x1c /* hardirq_count */ +#define TI_KSP 0x20 /* ksp */ +#define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ +#define TI_KPSR 0x28 /* kpsr */ +#define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ +#define TI_REG_WINDOW 0x30 +#define TI_RWIN_SPTRS 0x230 +#define TI_W_SAVED 0x250 +/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ + +#define PREEMPT_ACTIVE 0x4000000 + +/* + * thread information flag bit numbers + */ +#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ +#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ +#define TIF_SIGPENDING 2 /* signal pending */ +#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ +#define TIF_USEDFPU 8 /* FPU was used by this task + * this quantum (SMP) */ +#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling + * TIF_NEED_RESCHED */ +#define TIF_MEMDIE 10 + +/* as above, but as bit values */ +#define _TIF_SYSCALL_TRACE (1< + +#ifndef __ASSEMBLY__ + +#include +#include + +struct task_struct; +struct exec_domain; + +struct thread_info { + /* D$ line 1 */ + struct task_struct *task; + unsigned long flags; + __u8 fpsaved[7]; + __u8 status; + unsigned long ksp; + + /* D$ line 2 */ + unsigned long fault_address; + struct pt_regs *kregs; + struct exec_domain *exec_domain; + int preempt_count; /* 0 => preemptable, <0 => BUG */ + __u8 new_child; + __u8 syscall_noerror; + __u16 cpu; + + unsigned long *utraps; + + struct reg_window reg_window[NSWINS]; + unsigned long rwbuf_stkptrs[NSWINS]; + + unsigned long gsr[7]; + unsigned long xfsr[7]; + + __u64 __user *user_cntd0; + __u64 __user *user_cntd1; + __u64 kernel_cntd0, kernel_cntd1; + __u64 pcr_reg; + + struct restart_block restart_block; + + struct pt_regs *kern_una_regs; + unsigned int kern_una_insn; + + unsigned long fpregs[0] __attribute__ ((aligned(64))); +}; + +#endif /* !(__ASSEMBLY__) */ + +/* offsets into the thread_info struct for assembly code access */ +#define TI_TASK 0x00000000 +#define TI_FLAGS 0x00000008 +#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) +#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) +#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) +#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) +#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) +#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) +#define TI_FPSAVED 0x00000010 +#define TI_KSP 0x00000018 +#define TI_FAULT_ADDR 0x00000020 +#define TI_KREGS 0x00000028 +#define TI_EXEC_DOMAIN 0x00000030 +#define TI_PRE_COUNT 0x00000038 +#define TI_NEW_CHILD 0x0000003c +#define TI_SYS_NOERROR 0x0000003d +#define TI_CPU 0x0000003e +#define TI_UTRAPS 0x00000040 +#define TI_REG_WINDOW 0x00000048 +#define TI_RWIN_SPTRS 0x000003c8 +#define TI_GSR 0x00000400 +#define TI_XFSR 0x00000438 +#define TI_USER_CNTD0 0x00000470 +#define TI_USER_CNTD1 0x00000478 +#define TI_KERN_CNTD0 0x00000480 +#define TI_KERN_CNTD1 0x00000488 +#define TI_PCR 0x00000490 +#define TI_RESTART_BLOCK 0x00000498 +#define TI_KUNA_REGS 0x000004c0 +#define TI_KUNA_INSN 0x000004c8 +#define TI_FPREGS 0x00000500 + +/* We embed this in the uppermost byte of thread_info->flags */ +#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ +#define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ +#define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ +#define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ +#define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ + +#if PAGE_SHIFT == 13 +#define THREAD_SIZE (2*PAGE_SIZE) +#define THREAD_SHIFT (PAGE_SHIFT + 1) +#else /* PAGE_SHIFT == 13 */ +#define THREAD_SIZE PAGE_SIZE +#define THREAD_SHIFT PAGE_SHIFT +#endif /* PAGE_SHIFT == 13 */ + +#define PREEMPT_ACTIVE 0x4000000 + +/* + * macros/functions for gaining access to the thread information structure + * + * preempt_count needs to be 1 initially, until the scheduler is functional. + */ +#ifndef __ASSEMBLY__ + +#define INIT_THREAD_INFO(tsk) \ +{ \ + .task = &tsk, \ + .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ + .exec_domain = &default_exec_domain, \ + .preempt_count = 1, \ + .restart_block = { \ + .fn = do_no_restart_syscall, \ + }, \ +} + +#define init_thread_info (init_thread_union.thread_info) +#define init_stack (init_thread_union.stack) + +/* how to get the thread information struct from C */ +register struct thread_info *current_thread_info_reg asm("g6"); +#define current_thread_info() (current_thread_info_reg) + +/* thread information allocation */ +#if PAGE_SHIFT == 13 +#define __THREAD_INFO_ORDER 1 +#else /* PAGE_SHIFT == 13 */ +#define __THREAD_INFO_ORDER 0 +#endif /* PAGE_SHIFT == 13 */ + +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(tsk) \ +({ \ + struct thread_info *ret; \ + \ + ret = (struct thread_info *) \ + __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ + if (ret) \ + memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ + ret; \ +}) +#else +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) +#endif + +#define free_thread_info(ti) \ + free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) + +#define __thread_flag_byte_ptr(ti) \ + ((unsigned char *)(&((ti)->flags))) +#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) + +#define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) +#define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) +#define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) +#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) +#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) +#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) +#define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) +#define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) +#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) +#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) +#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) +#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) + +#endif /* !(__ASSEMBLY__) */ + +/* + * Thread information flags, only 16 bits are available as we encode + * other values into the upper 6 bytes. + * + * On trap return we need to test several values: + * + * user: need_resched, notify_resume, sigpending, wsaved, perfctr + * kernel: fpdepth + * + * So to check for work in the kernel case we simply load the fpdepth + * byte out of the flags and test it. For the user case we encode the + * lower 3 bytes of flags as follows: + * ---------------------------------------- + * | wsaved | flags byte 1 | flags byte 2 | + * ---------------------------------------- + * This optimizes the user test into: + * ldx [%g6 + TI_FLAGS], REG1 + * sethi %hi(_TIF_USER_WORK_MASK), REG2 + * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 + * andcc REG1, REG2, %g0 + * be,pt no_work_to_do + * nop + */ +#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ +#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ +#define TIF_SIGPENDING 2 /* signal pending */ +#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_PERFCTR 4 /* performance counters active */ +#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ +/* flag bit 6 is available */ +#define TIF_32BIT 7 /* 32-bit binary */ +/* flag bit 8 is available */ +#define TIF_SECCOMP 9 /* secure computing */ +#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ +/* flag bit 11 is available */ +/* NOTE: Thread flags >= 12 should be ones we have no interest + * in using in assembly, else we can't use the mask as + * an immediate value in instructions such as andcc. + */ +#define TIF_ABI_PENDING 12 +#define TIF_MEMDIE 13 +#define TIF_POLLING_NRFLAG 14 + +#define _TIF_SYSCALL_TRACE (1<status |= TS_RESTORE_SIGMASK; + set_bit(TIF_SIGPENDING, &ti->flags); +} +#endif /* !__ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* _ASM_THREAD_INFO_H */ diff --git a/arch/sparc/include/asm/timer.h b/arch/sparc/include/asm/timer.h new file mode 100644 index 0000000000000000000000000000000000000000..612fd2779d9eaffe78dbf590194290e14fb05a98 --- /dev/null +++ b/arch/sparc/include/asm/timer.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_TIMER_H +#define ___ASM_SPARC_TIMER_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/timer_32.h b/arch/sparc/include/asm/timer_32.h new file mode 100644 index 0000000000000000000000000000000000000000..361e53898dd7b298e0fa2c41683437a671e15b9c --- /dev/null +++ b/arch/sparc/include/asm/timer_32.h @@ -0,0 +1,107 @@ +/* + * timer.h: Definitions for the timer chips on the Sparc. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + + +#ifndef _SPARC_TIMER_H +#define _SPARC_TIMER_H + +#include /* For SUN4M_NCPUS */ +#include +#include + +/* Timer structures. The interrupt timer has two properties which + * are the counter (which is handled in do_timer in sched.c) and the limit. + * This limit is where the timer's counter 'wraps' around. Oddly enough, + * the sun4c timer when it hits the limit wraps back to 1 and not zero + * thus when calculating the value at which it will fire a microsecond you + * must adjust by one. Thanks SUN for designing such great hardware ;( + */ + +/* Note that I am only going to use the timer that interrupts at + * Sparc IRQ 10. There is another one available that can fire at + * IRQ 14. Currently it is left untouched, we keep the PROM's limit + * register value and let the prom take these interrupts. This allows + * L1-A to work. + */ + +struct sun4c_timer_info { + __volatile__ unsigned int cur_count10; + __volatile__ unsigned int timer_limit10; + __volatile__ unsigned int cur_count14; + __volatile__ unsigned int timer_limit14; +}; + +#define SUN4C_TIMER_PHYSADDR 0xf3000000 +#ifdef CONFIG_SUN4 +#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR +#else +#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR +#endif + +/* A sun4m has two blocks of registers which are probably of the same + * structure. LSI Logic's L64851 is told to _decrement_ from the limit + * value. Aurora behaves similarly but its limit value is compacted in + * other fashion (it's wider). Documented fields are defined here. + */ + +/* As with the interrupt register, we have two classes of timer registers + * which are per-cpu and master. Per-cpu timers only hit that cpu and are + * only level 14 ticks, master timer hits all cpus and is level 10. + */ + +#define SUN4M_PRM_CNT_L 0x80000000 +#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 + +struct sun4m_timer_percpu_info { + __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ + __volatile__ unsigned int l14_cur_count; + + /* This register appears to be write only and/or inaccessible + * on Uni-Processor sun4m machines. + */ + __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ + + __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ + __volatile__ unsigned char space[PAGE_SIZE - 16]; +}; + +struct sun4m_timer_regs { + struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; + volatile unsigned int l10_timer_limit; + volatile unsigned int l10_cur_count; + + /* Again, this appears to be write only and/or inaccessible + * on uni-processor sun4m machines. + */ + volatile unsigned int l10_limit_noclear; + + /* This register too, it must be magic. */ + volatile unsigned int foobar; + + volatile unsigned int cfg; /* equals zero at boot time... */ +}; + +#define SUN4D_PRM_CNT_L 0x80000000 +#define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 + +struct sun4d_timer_regs { + volatile unsigned int l10_timer_limit; + volatile unsigned int l10_cur_countx; + volatile unsigned int l10_limit_noclear; + volatile unsigned int ctrl; + volatile unsigned int l10_cur_count; +}; + +extern struct sun4d_timer_regs *sun4d_timers; + +extern __volatile__ unsigned int *master_l10_counter; +extern __volatile__ unsigned int *master_l10_limit; + +/* FIXME: Make do_[gs]ettimeofday btfixup calls */ +BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) +#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) + +#endif /* !(_SPARC_TIMER_H) */ diff --git a/include/asm-sparc64/timer.h b/arch/sparc/include/asm/timer_64.h similarity index 100% rename from include/asm-sparc64/timer.h rename to arch/sparc/include/asm/timer_64.h diff --git a/arch/sparc/include/asm/timex.h b/arch/sparc/include/asm/timex.h new file mode 100644 index 0000000000000000000000000000000000000000..70cc37b73827bc2fe1a3a5045326a893da6c3844 --- /dev/null +++ b/arch/sparc/include/asm/timex.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_TIMEX_H +#define ___ASM_SPARC_TIMEX_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/timex_32.h b/arch/sparc/include/asm/timex_32.h new file mode 100644 index 0000000000000000000000000000000000000000..b6ccdb0d6f7de3fb23b8691c036be8acaa62e91f --- /dev/null +++ b/arch/sparc/include/asm/timex_32.h @@ -0,0 +1,15 @@ +/* + * linux/include/asm/timex.h + * + * sparc architecture timex specifications + */ +#ifndef _ASMsparc_TIMEX_H +#define _ASMsparc_TIMEX_H + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ + +/* XXX Maybe do something better at some point... -DaveM */ +typedef unsigned long cycles_t; +#define get_cycles() (0) + +#endif diff --git a/arch/sparc/include/asm/timex_64.h b/arch/sparc/include/asm/timex_64.h new file mode 100644 index 0000000000000000000000000000000000000000..18b30bc9823b4e132d381c5d3de985f7b20c38fc --- /dev/null +++ b/arch/sparc/include/asm/timex_64.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm/timex.h + * + * sparc64 architecture timex specifications + */ +#ifndef _ASMsparc64_TIMEX_H +#define _ASMsparc64_TIMEX_H + +#include + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ + +/* Getting on the cycle counter on sparc64. */ +typedef unsigned long cycles_t; +#define get_cycles() tick_ops->get_tick() + +#define ARCH_HAS_READ_CURRENT_TIMER + +#endif diff --git a/arch/sparc/include/asm/tlb.h b/arch/sparc/include/asm/tlb.h new file mode 100644 index 0000000000000000000000000000000000000000..92d0393bbcdc5d16b5a0ee9308171e79bc7469a2 --- /dev/null +++ b/arch/sparc/include/asm/tlb.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_TLB_H +#define ___ASM_SPARC_TLB_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/tlb.h b/arch/sparc/include/asm/tlb_32.h similarity index 100% rename from include/asm-sparc/tlb.h rename to arch/sparc/include/asm/tlb_32.h diff --git a/include/asm-sparc64/tlb.h b/arch/sparc/include/asm/tlb_64.h similarity index 100% rename from include/asm-sparc64/tlb.h rename to arch/sparc/include/asm/tlb_64.h diff --git a/arch/sparc/include/asm/tlbflush.h b/arch/sparc/include/asm/tlbflush.h new file mode 100644 index 0000000000000000000000000000000000000000..2c9629fad1e2c33c6d33106ac53318e8ca98d94d --- /dev/null +++ b/arch/sparc/include/asm/tlbflush.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_TLBFLUSH_H +#define ___ASM_SPARC_TLBFLUSH_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/tlbflush_32.h b/arch/sparc/include/asm/tlbflush_32.h new file mode 100644 index 0000000000000000000000000000000000000000..fe0a71abc9bb9fa6db47462da8376bbe6d31b2bb --- /dev/null +++ b/arch/sparc/include/asm/tlbflush_32.h @@ -0,0 +1,60 @@ +#ifndef _SPARC_TLBFLUSH_H +#define _SPARC_TLBFLUSH_H + +#include +// #include + +/* + * TLB flushing: + * + * - flush_tlb() flushes the current mm struct TLBs XXX Exists? + * - flush_tlb_all() flushes all processes TLBs + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(vma, start, end) flushes a range of pages + * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages + */ + +#ifdef CONFIG_SMP + +BTFIXUPDEF_CALL(void, local_flush_tlb_all, void) +BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long) + +#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)() +#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm) +#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end) +#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr) + +extern void smp_flush_tlb_all(void); +extern void smp_flush_tlb_mm(struct mm_struct *mm); +extern void smp_flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, + unsigned long end); +extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); + +#endif /* CONFIG_SMP */ + +BTFIXUPDEF_CALL(void, flush_tlb_all, void) +BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) + +#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() +#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) +#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) +#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr) + +// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */ + +/* + * This is a kludge, until I know better. --zaitcev XXX + */ +static inline void flush_tlb_kernel_range(unsigned long start, + unsigned long end) +{ + flush_tlb_all(); +} + +#endif /* _SPARC_TLBFLUSH_H */ diff --git a/include/asm-sparc64/tlbflush.h b/arch/sparc/include/asm/tlbflush_64.h similarity index 100% rename from include/asm-sparc64/tlbflush.h rename to arch/sparc/include/asm/tlbflush_64.h diff --git a/arch/sparc/include/asm/topology.h b/arch/sparc/include/asm/topology.h new file mode 100644 index 0000000000000000000000000000000000000000..ee4f191d394aa2789e48cdd98d8f51c2d3c8d45e --- /dev/null +++ b/arch/sparc/include/asm/topology.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_TOPOLOGY_H +#define ___ASM_SPARC_TOPOLOGY_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/topology.h b/arch/sparc/include/asm/topology_32.h similarity index 100% rename from include/asm-sparc/topology.h rename to arch/sparc/include/asm/topology_32.h diff --git a/include/asm-sparc64/topology.h b/arch/sparc/include/asm/topology_64.h similarity index 100% rename from include/asm-sparc64/topology.h rename to arch/sparc/include/asm/topology_64.h diff --git a/include/asm-sparc/traps.h b/arch/sparc/include/asm/traps.h similarity index 100% rename from include/asm-sparc/traps.h rename to arch/sparc/include/asm/traps.h diff --git a/include/asm-sparc64/tsb.h b/arch/sparc/include/asm/tsb.h similarity index 100% rename from include/asm-sparc64/tsb.h rename to arch/sparc/include/asm/tsb.h diff --git a/include/asm-sparc/tsunami.h b/arch/sparc/include/asm/tsunami.h similarity index 100% rename from include/asm-sparc/tsunami.h rename to arch/sparc/include/asm/tsunami.h diff --git a/include/asm-sparc64/ttable.h b/arch/sparc/include/asm/ttable.h similarity index 99% rename from include/asm-sparc64/ttable.h rename to arch/sparc/include/asm/ttable.h index 0ba199587e07ba649555ac747f4e19376ce3d2a0..5708ba2719fb07e666cef4a0cc1e1cccf597d14d 100644 --- a/include/asm-sparc64/ttable.h +++ b/arch/sparc/include/asm/ttable.h @@ -53,12 +53,12 @@ ba,pt %xcc, routine; \ nop; \ nop; nop; nop; nop; nop; nop; - + #define TRAP_NOSAVE_7INSNS(routine) \ ba,pt %xcc, routine; \ nop; \ nop; nop; nop; nop; nop; - + #define TRAPTL1(routine) \ sethi %hi(109f), %g7; \ ba,pt %xcc, etraptl1; \ @@ -68,7 +68,7 @@ ba,pt %xcc, rtrap; \ nop; \ nop; - + #define TRAP_ARG(routine, arg) \ sethi %hi(109f), %g7; \ ba,pt %xcc, etrap; \ @@ -78,7 +78,7 @@ mov arg, %o1; \ ba,pt %xcc, rtrap; \ nop; - + #define TRAPTL1_ARG(routine, arg) \ sethi %hi(109f), %g7; \ ba,pt %xcc, etraptl1; \ @@ -88,7 +88,7 @@ mov arg, %o1; \ ba,pt %xcc, rtrap; \ nop; - + #define SYSCALL_TRAP(routine, systbl) \ rdpr %pil, %g2; \ mov TSTATE_SYSCALL, %g3; \ @@ -98,7 +98,7 @@ sethi %hi(systbl), %l7; \ ba,pt %xcc, routine; \ or %l7, %lo(systbl), %l7; - + #define TRAP_UTRAP(handler,lvl) \ mov handler, %g3; \ ba,pt %xcc, utrap_trap; \ @@ -150,7 +150,7 @@ call routine; \ add %sp, PTREGS_OFF, %o1; \ ba,a,pt %xcc, rtrap_irq; - + #endif #define TRAP_IVEC TRAP_NOSAVE(do_ivec) @@ -168,7 +168,7 @@ stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \ ba,pt %xcc, rtrap; \ stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]; - + #ifdef CONFIG_KPROBES #define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl) #else @@ -636,7 +636,7 @@ user_rtt_fill_32bit: \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; \ ba,a,pt %xcc, user_rtt_fill_fixup; - + #define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP) #define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP) diff --git a/include/asm-sparc/turbosparc.h b/arch/sparc/include/asm/turbosparc.h similarity index 100% rename from include/asm-sparc/turbosparc.h rename to arch/sparc/include/asm/turbosparc.h diff --git a/arch/sparc/include/asm/types.h b/arch/sparc/include/asm/types.h new file mode 100644 index 0000000000000000000000000000000000000000..8c28fde5eaa2a794fd8b31fd4a95e9e00699f3f5 --- /dev/null +++ b/arch/sparc/include/asm/types.h @@ -0,0 +1,62 @@ +#ifndef _SPARC_TYPES_H +#define _SPARC_TYPES_H +/* + * This file is never included by application software unless + * explicitly requested (e.g., via linux/types.h) in which case the + * application is Linux specific so (user-) name space pollution is + * not a major issue. However, for interoperability, libraries still + * need to be careful to avoid a name clashes. + */ + +#if defined(__sparc__) && defined(__arch64__) + +/*** SPARC 64 bit ***/ +#include + +#ifndef __ASSEMBLY__ + +typedef unsigned short umode_t; + +#endif /* __ASSEMBLY__ */ + +#ifdef __KERNEL__ + +#define BITS_PER_LONG 64 + +#ifndef __ASSEMBLY__ + +/* Dma addresses come in generic and 64-bit flavours. */ + +typedef u32 dma_addr_t; +typedef u64 dma64_addr_t; + +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ +#else + +/*** SPARC 32 bit ***/ +#include + +#ifndef __ASSEMBLY__ + +typedef unsigned short umode_t; + +#endif /* __ASSEMBLY__ */ + +#ifdef __KERNEL__ + +#define BITS_PER_LONG 32 + +#ifndef __ASSEMBLY__ + +typedef u32 dma_addr_t; +typedef u32 dma64_addr_t; + +#endif /* __ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* defined(__sparc__) && defined(__arch64__) */ + +#endif /* defined(_SPARC_TYPES_H) */ diff --git a/arch/sparc/include/asm/uaccess.h b/arch/sparc/include/asm/uaccess.h new file mode 100644 index 0000000000000000000000000000000000000000..e88fbe5c0457a922cd7f761d81378ac91c562703 --- /dev/null +++ b/arch/sparc/include/asm/uaccess.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_UACCESS_H +#define ___ASM_SPARC_UACCESS_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/include/asm-sparc/uaccess.h b/arch/sparc/include/asm/uaccess_32.h similarity index 100% rename from include/asm-sparc/uaccess.h rename to arch/sparc/include/asm/uaccess_32.h diff --git a/arch/sparc/include/asm/uaccess_64.h b/arch/sparc/include/asm/uaccess_64.h new file mode 100644 index 0000000000000000000000000000000000000000..296ef30e05c80d4f89b0e2dea8cc806940a58bb8 --- /dev/null +++ b/arch/sparc/include/asm/uaccess_64.h @@ -0,0 +1,273 @@ +#ifndef _ASM_UACCESS_H +#define _ASM_UACCESS_H + +/* + * User space memory access functions + */ + +#ifdef __KERNEL__ +#include +#include +#include +#include +#include +#include +#include +#endif + +#ifndef __ASSEMBLY__ + +/* + * Sparc64 is segmented, though more like the M68K than the I386. + * We use the secondary ASI to address user memory, which references a + * completely different VM map, thus there is zero chance of the user + * doing something queer and tricking us into poking kernel memory. + * + * What is left here is basically what is needed for the other parts of + * the kernel that expect to be able to manipulate, erum, "segments". + * Or perhaps more properly, permissions. + * + * "For historical reasons, these macros are grossly misnamed." -Linus + */ + +#define KERNEL_DS ((mm_segment_t) { ASI_P }) +#define USER_DS ((mm_segment_t) { ASI_AIUS }) /* har har har */ + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +#define get_fs() ((mm_segment_t) { get_thread_current_ds() }) +#define get_ds() (KERNEL_DS) + +#define segment_eq(a,b) ((a).seg == (b).seg) + +#define set_fs(val) \ +do { \ + set_thread_current_ds((val).seg); \ + __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \ +} while(0) + +static inline int __access_ok(const void __user * addr, unsigned long size) +{ + return 1; +} + +static inline int access_ok(int type, const void __user * addr, unsigned long size) +{ + return 1; +} + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + +struct exception_table_entry { + unsigned int insn, fixup; +}; + +extern void __ret_efault(void); +extern void __retl_efault(void); + +/* Uh, these should become the main single-value transfer routines.. + * They automatically use the right size if we just have the right + * pointer type.. + * + * This gets kind of ugly. We want to return _two_ values in "get_user()" + * and yet we don't want to do any pointers, because that is too much + * of a performance impact. Thus we have a few rather ugly macros here, + * and hide all the ugliness from the user. + */ +#define put_user(x,ptr) ({ \ +unsigned long __pu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) + +#define get_user(x,ptr) ({ \ +unsigned long __gu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) + +#define __put_user(x,ptr) put_user(x,ptr) +#define __get_user(x,ptr) get_user(x,ptr) + +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) ((struct __large_struct *)(x)) + +#define __put_user_nocheck(data,addr,size) ({ \ +register int __pu_ret; \ +switch (size) { \ +case 1: __put_user_asm(data,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(data,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(data,w,addr,__pu_ret); break; \ +case 8: __put_user_asm(data,x,addr,__pu_ret); break; \ +default: __pu_ret = __put_user_bad(); break; \ +} __pu_ret; }) + +#define __put_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Put user asm, inline. */\n" \ +"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "sethi %%hi(2b), %0\n\t" \ + "jmpl %0 + %%lo(2b), %%g0\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\t" \ + ".previous\n\n\t" \ + : "=r" (ret) : "r" (x), "r" (__m(addr)), \ + "i" (-EFAULT)) + +extern int __put_user_bad(void); + +#define __get_user_nocheck(data,addr,size,type) ({ \ +register int __gu_ret; \ +register unsigned long __gu_val; \ +switch (size) { \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \ +case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ +} data = (type) __gu_val; __gu_ret; }) + +#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ +switch (size) { \ +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \ +case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} data = (type) __gu_val; }) + +#define __get_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Get user asm, inline. */\n" \ +"1:\t" "ld"#size "a [%2] %%asi, %1\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "sethi %%hi(2b), %0\n\t" \ + "clr %1\n\t" \ + "jmpl %0 + %%lo(2b), %%g0\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=r" (ret), "=r" (x) : "r" (__m(addr)), \ + "i" (-EFAULT)) + +#define __get_user_asm_ret(x,size,addr,retval) \ +if (__builtin_constant_p(retval) && retval == -EFAULT) \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b,__ret_efault\n\n\t" \ + ".previous\n\t" \ + : "=r" (x) : "r" (__m(addr))); \ +else \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "ret\n\t" \ + " restore %%g0, %2, %%o0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=r" (x) : "r" (__m(addr)), "i" (retval)) + +extern int __get_user_bad(void); + +extern unsigned long __must_check ___copy_from_user(void *to, + const void __user *from, + unsigned long size); +extern unsigned long copy_from_user_fixup(void *to, const void __user *from, + unsigned long size); +static inline unsigned long __must_check +copy_from_user(void *to, const void __user *from, unsigned long size) +{ + unsigned long ret = ___copy_from_user(to, from, size); + + if (unlikely(ret)) + ret = copy_from_user_fixup(to, from, size); + return ret; +} +#define __copy_from_user copy_from_user + +extern unsigned long __must_check ___copy_to_user(void __user *to, + const void *from, + unsigned long size); +extern unsigned long copy_to_user_fixup(void __user *to, const void *from, + unsigned long size); +static inline unsigned long __must_check +copy_to_user(void __user *to, const void *from, unsigned long size) +{ + unsigned long ret = ___copy_to_user(to, from, size); + + if (unlikely(ret)) + ret = copy_to_user_fixup(to, from, size); + return ret; +} +#define __copy_to_user copy_to_user + +extern unsigned long __must_check ___copy_in_user(void __user *to, + const void __user *from, + unsigned long size); +extern unsigned long copy_in_user_fixup(void __user *to, void __user *from, + unsigned long size); +static inline unsigned long __must_check +copy_in_user(void __user *to, void __user *from, unsigned long size) +{ + unsigned long ret = ___copy_in_user(to, from, size); + + if (unlikely(ret)) + ret = copy_in_user_fixup(to, from, size); + return ret; +} +#define __copy_in_user copy_in_user + +extern unsigned long __must_check __clear_user(void __user *, unsigned long); + +#define clear_user __clear_user + +extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count); + +#define strncpy_from_user __strncpy_from_user + +extern long __strlen_user(const char __user *); +extern long __strnlen_user(const char __user *, long len); + +#define strlen_user __strlen_user +#define strnlen_user __strnlen_user +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc64/uctx.h b/arch/sparc/include/asm/uctx.h similarity index 100% rename from include/asm-sparc64/uctx.h rename to arch/sparc/include/asm/uctx.h diff --git a/include/asm-sparc/unaligned.h b/arch/sparc/include/asm/unaligned.h similarity index 100% rename from include/asm-sparc/unaligned.h rename to arch/sparc/include/asm/unaligned.h diff --git a/arch/sparc/include/asm/unistd.h b/arch/sparc/include/asm/unistd.h new file mode 100644 index 0000000000000000000000000000000000000000..4207fb362da03e300ce2cff530ca68401560c7f7 --- /dev/null +++ b/arch/sparc/include/asm/unistd.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_UNISTD_H +#define ___ASM_SPARC_UNISTD_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/unistd_32.h b/arch/sparc/include/asm/unistd_32.h new file mode 100644 index 0000000000000000000000000000000000000000..648643a9f139b62930a6fd39ab6f4b614bd74c92 --- /dev/null +++ b/arch/sparc/include/asm/unistd_32.h @@ -0,0 +1,384 @@ +#ifndef _SPARC_UNISTD_H +#define _SPARC_UNISTD_H + +/* + * System calls under the Sparc. + * + * Don't be scared by the ugly clobbers, it is the only way I can + * think of right now to force the arguments into fixed registers + * before the trap into the system call with gcc 'asm' statements. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * + * SunOS compatibility based upon preliminary work which is: + * + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) + */ + +#define __NR_restart_syscall 0 /* Linux Specific */ +#define __NR_exit 1 /* Common */ +#define __NR_fork 2 /* Common */ +#define __NR_read 3 /* Common */ +#define __NR_write 4 /* Common */ +#define __NR_open 5 /* Common */ +#define __NR_close 6 /* Common */ +#define __NR_wait4 7 /* Common */ +#define __NR_creat 8 /* Common */ +#define __NR_link 9 /* Common */ +#define __NR_unlink 10 /* Common */ +#define __NR_execv 11 /* SunOS Specific */ +#define __NR_chdir 12 /* Common */ +#define __NR_chown 13 /* Common */ +#define __NR_mknod 14 /* Common */ +#define __NR_chmod 15 /* Common */ +#define __NR_lchown 16 /* Common */ +#define __NR_brk 17 /* Common */ +#define __NR_perfctr 18 /* Performance counter operations */ +#define __NR_lseek 19 /* Common */ +#define __NR_getpid 20 /* Common */ +#define __NR_capget 21 /* Linux Specific */ +#define __NR_capset 22 /* Linux Specific */ +#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ +#define __NR_getuid 24 /* Common */ +#define __NR_vmsplice 25 /* ENOSYS under SunOS */ +#define __NR_ptrace 26 /* Common */ +#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ +#define __NR_sigaltstack 28 /* Common */ +#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ +#define __NR_utime 30 /* Implemented via utimes() under SunOS */ +#define __NR_lchown32 31 /* Linux sparc32 specific */ +#define __NR_fchown32 32 /* Linux sparc32 specific */ +#define __NR_access 33 /* Common */ +#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ +#define __NR_chown32 35 /* Linux sparc32 specific */ +#define __NR_sync 36 /* Common */ +#define __NR_kill 37 /* Common */ +#define __NR_stat 38 /* Common */ +#define __NR_sendfile 39 /* Linux Specific */ +#define __NR_lstat 40 /* Common */ +#define __NR_dup 41 /* Common */ +#define __NR_pipe 42 /* Common */ +#define __NR_times 43 /* Implemented via getrusage() in SunOS */ +#define __NR_getuid32 44 /* Linux sparc32 specific */ +#define __NR_umount2 45 /* Linux Specific */ +#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ +#define __NR_getgid 47 /* Common */ +#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ +#define __NR_geteuid 49 /* SunOS calls getuid() */ +#define __NR_getegid 50 /* SunOS calls getgid() */ +#define __NR_acct 51 /* Common */ +/* #define __NR_memory_ordering 52 Linux sparc64 specific */ +#define __NR_getgid32 53 /* Linux sparc32 specific */ +#define __NR_ioctl 54 /* Common */ +#define __NR_reboot 55 /* Common */ +#define __NR_mmap2 56 /* Linux sparc32 Specific */ +#define __NR_symlink 57 /* Common */ +#define __NR_readlink 58 /* Common */ +#define __NR_execve 59 /* Common */ +#define __NR_umask 60 /* Common */ +#define __NR_chroot 61 /* Common */ +#define __NR_fstat 62 /* Common */ +#define __NR_fstat64 63 /* Linux Specific */ +#define __NR_getpagesize 64 /* Common */ +#define __NR_msync 65 /* Common in newer 1.3.x revs... */ +#define __NR_vfork 66 /* Common */ +#define __NR_pread64 67 /* Linux Specific */ +#define __NR_pwrite64 68 /* Linux Specific */ +#define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */ +#define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */ +#define __NR_mmap 71 /* Common */ +#define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */ +#define __NR_munmap 73 /* Common */ +#define __NR_mprotect 74 /* Common */ +#define __NR_madvise 75 /* Common */ +#define __NR_vhangup 76 /* Common */ +#define __NR_truncate64 77 /* Linux sparc32 Specific */ +#define __NR_mincore 78 /* Common */ +#define __NR_getgroups 79 /* Common */ +#define __NR_setgroups 80 /* Common */ +#define __NR_getpgrp 81 /* Common */ +#define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */ +#define __NR_setitimer 83 /* Common */ +#define __NR_ftruncate64 84 /* Linux sparc32 Specific */ +#define __NR_swapon 85 /* Common */ +#define __NR_getitimer 86 /* Common */ +#define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */ +#define __NR_sethostname 88 /* Common */ +#define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */ +#define __NR_dup2 90 /* Common */ +#define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */ +#define __NR_fcntl 92 /* Common */ +#define __NR_select 93 /* Common */ +#define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */ +#define __NR_fsync 95 /* Common */ +#define __NR_setpriority 96 /* Common */ +#define __NR_socket 97 /* Common */ +#define __NR_connect 98 /* Common */ +#define __NR_accept 99 /* Common */ +#define __NR_getpriority 100 /* Common */ +#define __NR_rt_sigreturn 101 /* Linux Specific */ +#define __NR_rt_sigaction 102 /* Linux Specific */ +#define __NR_rt_sigprocmask 103 /* Linux Specific */ +#define __NR_rt_sigpending 104 /* Linux Specific */ +#define __NR_rt_sigtimedwait 105 /* Linux Specific */ +#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ +#define __NR_rt_sigsuspend 107 /* Linux Specific */ +#define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */ +#define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */ +#define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */ +#define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */ +#define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */ +#define __NR_recvmsg 113 /* Common */ +#define __NR_sendmsg 114 /* Common */ +#define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */ +#define __NR_gettimeofday 116 /* Common */ +#define __NR_getrusage 117 /* Common */ +#define __NR_getsockopt 118 /* Common */ +#define __NR_getcwd 119 /* Linux Specific */ +#define __NR_readv 120 /* Common */ +#define __NR_writev 121 /* Common */ +#define __NR_settimeofday 122 /* Common */ +#define __NR_fchown 123 /* Common */ +#define __NR_fchmod 124 /* Common */ +#define __NR_recvfrom 125 /* Common */ +#define __NR_setreuid 126 /* Common */ +#define __NR_setregid 127 /* Common */ +#define __NR_rename 128 /* Common */ +#define __NR_truncate 129 /* Common */ +#define __NR_ftruncate 130 /* Common */ +#define __NR_flock 131 /* Common */ +#define __NR_lstat64 132 /* Linux Specific */ +#define __NR_sendto 133 /* Common */ +#define __NR_shutdown 134 /* Common */ +#define __NR_socketpair 135 /* Common */ +#define __NR_mkdir 136 /* Common */ +#define __NR_rmdir 137 /* Common */ +#define __NR_utimes 138 /* SunOS Specific */ +#define __NR_stat64 139 /* Linux Specific */ +#define __NR_sendfile64 140 /* adjtime under SunOS */ +#define __NR_getpeername 141 /* Common */ +#define __NR_futex 142 /* gethostid under SunOS */ +#define __NR_gettid 143 /* ENOSYS under SunOS */ +#define __NR_getrlimit 144 /* Common */ +#define __NR_setrlimit 145 /* Common */ +#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ +#define __NR_prctl 147 /* ENOSYS under SunOS */ +#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ +#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ +#define __NR_getsockname 150 /* Common */ +#define __NR_inotify_init 151 /* Linux specific */ +#define __NR_inotify_add_watch 152 /* Linux specific */ +#define __NR_poll 153 /* Common */ +#define __NR_getdents64 154 /* Linux specific */ +#define __NR_fcntl64 155 /* Linux sparc32 Specific */ +#define __NR_inotify_rm_watch 156 /* Linux specific */ +#define __NR_statfs 157 /* Common */ +#define __NR_fstatfs 158 /* Common */ +#define __NR_umount 159 /* Common */ +#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ +#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ +#define __NR_getdomainname 162 /* SunOS Specific */ +#define __NR_setdomainname 163 /* Common */ +/* #define __NR_utrap_install 164 Linux sparc64 specific */ +#define __NR_quotactl 165 /* Common */ +#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ +#define __NR_mount 167 /* Common */ +#define __NR_ustat 168 /* Common */ +#define __NR_setxattr 169 /* SunOS: semsys */ +#define __NR_lsetxattr 170 /* SunOS: msgsys */ +#define __NR_fsetxattr 171 /* SunOS: shmsys */ +#define __NR_getxattr 172 /* SunOS: auditsys */ +#define __NR_lgetxattr 173 /* SunOS: rfssys */ +#define __NR_getdents 174 /* Common */ +#define __NR_setsid 175 /* Common */ +#define __NR_fchdir 176 /* Common */ +#define __NR_fgetxattr 177 /* SunOS: fchroot */ +#define __NR_listxattr 178 /* SunOS: vpixsys */ +#define __NR_llistxattr 179 /* SunOS: aioread */ +#define __NR_flistxattr 180 /* SunOS: aiowrite */ +#define __NR_removexattr 181 /* SunOS: aiowait */ +#define __NR_lremovexattr 182 /* SunOS: aiocancel */ +#define __NR_sigpending 183 /* Common */ +#define __NR_query_module 184 /* Linux Specific */ +#define __NR_setpgid 185 /* Common */ +#define __NR_fremovexattr 186 /* SunOS: pathconf */ +#define __NR_tkill 187 /* SunOS: fpathconf */ +#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ +#define __NR_uname 189 /* Linux Specific */ +#define __NR_init_module 190 /* Linux Specific */ +#define __NR_personality 191 /* Linux Specific */ +#define __NR_remap_file_pages 192 /* Linux Specific */ +#define __NR_epoll_create 193 /* Linux Specific */ +#define __NR_epoll_ctl 194 /* Linux Specific */ +#define __NR_epoll_wait 195 /* Linux Specific */ +#define __NR_ioprio_set 196 /* Linux Specific */ +#define __NR_getppid 197 /* Linux Specific */ +#define __NR_sigaction 198 /* Linux Specific */ +#define __NR_sgetmask 199 /* Linux Specific */ +#define __NR_ssetmask 200 /* Linux Specific */ +#define __NR_sigsuspend 201 /* Linux Specific */ +#define __NR_oldlstat 202 /* Linux Specific */ +#define __NR_uselib 203 /* Linux Specific */ +#define __NR_readdir 204 /* Linux Specific */ +#define __NR_readahead 205 /* Linux Specific */ +#define __NR_socketcall 206 /* Linux Specific */ +#define __NR_syslog 207 /* Linux Specific */ +#define __NR_lookup_dcookie 208 /* Linux Specific */ +#define __NR_fadvise64 209 /* Linux Specific */ +#define __NR_fadvise64_64 210 /* Linux Specific */ +#define __NR_tgkill 211 /* Linux Specific */ +#define __NR_waitpid 212 /* Linux Specific */ +#define __NR_swapoff 213 /* Linux Specific */ +#define __NR_sysinfo 214 /* Linux Specific */ +#define __NR_ipc 215 /* Linux Specific */ +#define __NR_sigreturn 216 /* Linux Specific */ +#define __NR_clone 217 /* Linux Specific */ +#define __NR_ioprio_get 218 /* Linux Specific */ +#define __NR_adjtimex 219 /* Linux Specific */ +#define __NR_sigprocmask 220 /* Linux Specific */ +#define __NR_create_module 221 /* Linux Specific */ +#define __NR_delete_module 222 /* Linux Specific */ +#define __NR_get_kernel_syms 223 /* Linux Specific */ +#define __NR_getpgid 224 /* Linux Specific */ +#define __NR_bdflush 225 /* Linux Specific */ +#define __NR_sysfs 226 /* Linux Specific */ +#define __NR_afs_syscall 227 /* Linux Specific */ +#define __NR_setfsuid 228 /* Linux Specific */ +#define __NR_setfsgid 229 /* Linux Specific */ +#define __NR__newselect 230 /* Linux Specific */ +#define __NR_time 231 /* Linux Specific */ +#define __NR_splice 232 /* Linux Specific */ +#define __NR_stime 233 /* Linux Specific */ +#define __NR_statfs64 234 /* Linux Specific */ +#define __NR_fstatfs64 235 /* Linux Specific */ +#define __NR__llseek 236 /* Linux Specific */ +#define __NR_mlock 237 +#define __NR_munlock 238 +#define __NR_mlockall 239 +#define __NR_munlockall 240 +#define __NR_sched_setparam 241 +#define __NR_sched_getparam 242 +#define __NR_sched_setscheduler 243 +#define __NR_sched_getscheduler 244 +#define __NR_sched_yield 245 +#define __NR_sched_get_priority_max 246 +#define __NR_sched_get_priority_min 247 +#define __NR_sched_rr_get_interval 248 +#define __NR_nanosleep 249 +#define __NR_mremap 250 +#define __NR__sysctl 251 +#define __NR_getsid 252 +#define __NR_fdatasync 253 +#define __NR_nfsservctl 254 +#define __NR_sync_file_range 255 +#define __NR_clock_settime 256 +#define __NR_clock_gettime 257 +#define __NR_clock_getres 258 +#define __NR_clock_nanosleep 259 +#define __NR_sched_getaffinity 260 +#define __NR_sched_setaffinity 261 +#define __NR_timer_settime 262 +#define __NR_timer_gettime 263 +#define __NR_timer_getoverrun 264 +#define __NR_timer_delete 265 +#define __NR_timer_create 266 +/* #define __NR_vserver 267 Reserved for VSERVER */ +#define __NR_io_setup 268 +#define __NR_io_destroy 269 +#define __NR_io_submit 270 +#define __NR_io_cancel 271 +#define __NR_io_getevents 272 +#define __NR_mq_open 273 +#define __NR_mq_unlink 274 +#define __NR_mq_timedsend 275 +#define __NR_mq_timedreceive 276 +#define __NR_mq_notify 277 +#define __NR_mq_getsetattr 278 +#define __NR_waitid 279 +#define __NR_tee 280 +#define __NR_add_key 281 +#define __NR_request_key 282 +#define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_fstatat64 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 +#define __NR_unshare 299 +#define __NR_set_robust_list 300 +#define __NR_get_robust_list 301 +#define __NR_migrate_pages 302 +#define __NR_mbind 303 +#define __NR_get_mempolicy 304 +#define __NR_set_mempolicy 305 +#define __NR_kexec_load 306 +#define __NR_move_pages 307 +#define __NR_getcpu 308 +#define __NR_epoll_pwait 309 +#define __NR_utimensat 310 +#define __NR_signalfd 311 +#define __NR_timerfd_create 312 +#define __NR_eventfd 313 +#define __NR_fallocate 314 +#define __NR_timerfd_settime 315 +#define __NR_timerfd_gettime 316 +#define __NR_signalfd4 317 +#define __NR_eventfd2 318 +#define __NR_epoll_create1 319 +#define __NR_dup3 320 +#define __NR_pipe2 321 +#define __NR_inotify_init1 322 + +#define NR_SYSCALLS 323 + +/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, + * it never had the plain ones and there is no value to adding those + * old versions into the syscall table. + */ +#define __IGNORE_setresuid +#define __IGNORE_getresuid +#define __IGNORE_setresgid +#define __IGNORE_getresgid + +#ifdef __KERNEL__ +#define __ARCH_WANT_IPC_PARSE_VERSION +#define __ARCH_WANT_OLD_READDIR +#define __ARCH_WANT_STAT64 +#define __ARCH_WANT_SYS_ALARM +#define __ARCH_WANT_SYS_GETHOSTNAME +#define __ARCH_WANT_SYS_PAUSE +#define __ARCH_WANT_SYS_SGETMASK +#define __ARCH_WANT_SYS_SIGNAL +#define __ARCH_WANT_SYS_TIME +#define __ARCH_WANT_SYS_UTIME +#define __ARCH_WANT_SYS_WAITPID +#define __ARCH_WANT_SYS_SOCKETCALL +#define __ARCH_WANT_SYS_FADVISE64 +#define __ARCH_WANT_SYS_GETPGRP +#define __ARCH_WANT_SYS_LLSEEK +#define __ARCH_WANT_SYS_NICE +#define __ARCH_WANT_SYS_OLDUMOUNT +#define __ARCH_WANT_SYS_SIGPENDING +#define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND + +/* + * "Conditional" syscalls + * + * What we want is __attribute__((weak,alias("sys_ni_syscall"))), + * but it doesn't work on all toolchains, so we just do it by hand + */ +#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") + +#endif /* __KERNEL__ */ +#endif /* _SPARC_UNISTD_H */ diff --git a/arch/sparc/include/asm/unistd_64.h b/arch/sparc/include/asm/unistd_64.h new file mode 100644 index 0000000000000000000000000000000000000000..c5cc0e052321850157df1edaf92b6020b5fb22d0 --- /dev/null +++ b/arch/sparc/include/asm/unistd_64.h @@ -0,0 +1,379 @@ +#ifndef _SPARC64_UNISTD_H +#define _SPARC64_UNISTD_H + +/* + * System calls under the Sparc. + * + * Don't be scared by the ugly clobbers, it is the only way I can + * think of right now to force the arguments into fixed registers + * before the trap into the system call with gcc 'asm' statements. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * + * SunOS compatibility based upon preliminary work which is: + * + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) + */ + +#define __NR_restart_syscall 0 /* Linux Specific */ +#define __NR_exit 1 /* Common */ +#define __NR_fork 2 /* Common */ +#define __NR_read 3 /* Common */ +#define __NR_write 4 /* Common */ +#define __NR_open 5 /* Common */ +#define __NR_close 6 /* Common */ +#define __NR_wait4 7 /* Common */ +#define __NR_creat 8 /* Common */ +#define __NR_link 9 /* Common */ +#define __NR_unlink 10 /* Common */ +#define __NR_execv 11 /* SunOS Specific */ +#define __NR_chdir 12 /* Common */ +#define __NR_chown 13 /* Common */ +#define __NR_mknod 14 /* Common */ +#define __NR_chmod 15 /* Common */ +#define __NR_lchown 16 /* Common */ +#define __NR_brk 17 /* Common */ +#define __NR_perfctr 18 /* Performance counter operations */ +#define __NR_lseek 19 /* Common */ +#define __NR_getpid 20 /* Common */ +#define __NR_capget 21 /* Linux Specific */ +#define __NR_capset 22 /* Linux Specific */ +#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ +#define __NR_getuid 24 /* Common */ +#define __NR_vmsplice 25 /* ENOSYS under SunOS */ +#define __NR_ptrace 26 /* Common */ +#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ +#define __NR_sigaltstack 28 /* Common */ +#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ +#define __NR_utime 30 /* Implemented via utimes() under SunOS */ +/* #define __NR_lchown32 31 Linux sparc32 specific */ +/* #define __NR_fchown32 32 Linux sparc32 specific */ +#define __NR_access 33 /* Common */ +#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ +/* #define __NR_chown32 35 Linux sparc32 specific */ +#define __NR_sync 36 /* Common */ +#define __NR_kill 37 /* Common */ +#define __NR_stat 38 /* Common */ +#define __NR_sendfile 39 /* Linux Specific */ +#define __NR_lstat 40 /* Common */ +#define __NR_dup 41 /* Common */ +#define __NR_pipe 42 /* Common */ +#define __NR_times 43 /* Implemented via getrusage() in SunOS */ +/* #define __NR_getuid32 44 Linux sparc32 specific */ +#define __NR_umount2 45 /* Linux Specific */ +#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ +#define __NR_getgid 47 /* Common */ +#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ +#define __NR_geteuid 49 /* SunOS calls getuid() */ +#define __NR_getegid 50 /* SunOS calls getgid() */ +#define __NR_acct 51 /* Common */ +#define __NR_memory_ordering 52 /* Linux Specific */ +/* #define __NR_getgid32 53 Linux sparc32 specific */ +#define __NR_ioctl 54 /* Common */ +#define __NR_reboot 55 /* Common */ +/* #define __NR_mmap2 56 Linux sparc32 Specific */ +#define __NR_symlink 57 /* Common */ +#define __NR_readlink 58 /* Common */ +#define __NR_execve 59 /* Common */ +#define __NR_umask 60 /* Common */ +#define __NR_chroot 61 /* Common */ +#define __NR_fstat 62 /* Common */ +#define __NR_fstat64 63 /* Linux Specific */ +#define __NR_getpagesize 64 /* Common */ +#define __NR_msync 65 /* Common in newer 1.3.x revs... */ +#define __NR_vfork 66 /* Common */ +#define __NR_pread64 67 /* Linux Specific */ +#define __NR_pwrite64 68 /* Linux Specific */ +/* #define __NR_geteuid32 69 Linux sparc32, sbrk under SunOS */ +/* #define __NR_getegid32 70 Linux sparc32, sstk under SunOS */ +#define __NR_mmap 71 /* Common */ +/* #define __NR_setreuid32 72 Linux sparc32, vadvise under SunOS */ +#define __NR_munmap 73 /* Common */ +#define __NR_mprotect 74 /* Common */ +#define __NR_madvise 75 /* Common */ +#define __NR_vhangup 76 /* Common */ +/* #define __NR_truncate64 77 Linux sparc32 Specific */ +#define __NR_mincore 78 /* Common */ +#define __NR_getgroups 79 /* Common */ +#define __NR_setgroups 80 /* Common */ +#define __NR_getpgrp 81 /* Common */ +/* #define __NR_setgroups32 82 Linux sparc32, setpgrp under SunOS */ +#define __NR_setitimer 83 /* Common */ +/* #define __NR_ftruncate64 84 Linux sparc32 Specific */ +#define __NR_swapon 85 /* Common */ +#define __NR_getitimer 86 /* Common */ +/* #define __NR_setuid32 87 Linux sparc32, gethostname under SunOS */ +#define __NR_sethostname 88 /* Common */ +/* #define __NR_setgid32 89 Linux sparc32, getdtablesize under SunOS */ +#define __NR_dup2 90 /* Common */ +/* #define __NR_setfsuid32 91 Linux sparc32, getdopt under SunOS */ +#define __NR_fcntl 92 /* Common */ +#define __NR_select 93 /* Common */ +/* #define __NR_setfsgid32 94 Linux sparc32, setdopt under SunOS */ +#define __NR_fsync 95 /* Common */ +#define __NR_setpriority 96 /* Common */ +#define __NR_socket 97 /* Common */ +#define __NR_connect 98 /* Common */ +#define __NR_accept 99 /* Common */ +#define __NR_getpriority 100 /* Common */ +#define __NR_rt_sigreturn 101 /* Linux Specific */ +#define __NR_rt_sigaction 102 /* Linux Specific */ +#define __NR_rt_sigprocmask 103 /* Linux Specific */ +#define __NR_rt_sigpending 104 /* Linux Specific */ +#define __NR_rt_sigtimedwait 105 /* Linux Specific */ +#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ +#define __NR_rt_sigsuspend 107 /* Linux Specific */ +#define __NR_setresuid 108 /* Linux Specific, sigvec under SunOS */ +#define __NR_getresuid 109 /* Linux Specific, sigblock under SunOS */ +#define __NR_setresgid 110 /* Linux Specific, sigsetmask under SunOS */ +#define __NR_getresgid 111 /* Linux Specific, sigpause under SunOS */ +/* #define __NR_setregid32 75 Linux sparc32, sigstack under SunOS */ +#define __NR_recvmsg 113 /* Common */ +#define __NR_sendmsg 114 /* Common */ +/* #define __NR_getgroups32 115 Linux sparc32, vtrace under SunOS */ +#define __NR_gettimeofday 116 /* Common */ +#define __NR_getrusage 117 /* Common */ +#define __NR_getsockopt 118 /* Common */ +#define __NR_getcwd 119 /* Linux Specific */ +#define __NR_readv 120 /* Common */ +#define __NR_writev 121 /* Common */ +#define __NR_settimeofday 122 /* Common */ +#define __NR_fchown 123 /* Common */ +#define __NR_fchmod 124 /* Common */ +#define __NR_recvfrom 125 /* Common */ +#define __NR_setreuid 126 /* Common */ +#define __NR_setregid 127 /* Common */ +#define __NR_rename 128 /* Common */ +#define __NR_truncate 129 /* Common */ +#define __NR_ftruncate 130 /* Common */ +#define __NR_flock 131 /* Common */ +#define __NR_lstat64 132 /* Linux Specific */ +#define __NR_sendto 133 /* Common */ +#define __NR_shutdown 134 /* Common */ +#define __NR_socketpair 135 /* Common */ +#define __NR_mkdir 136 /* Common */ +#define __NR_rmdir 137 /* Common */ +#define __NR_utimes 138 /* SunOS Specific */ +#define __NR_stat64 139 /* Linux Specific */ +#define __NR_sendfile64 140 /* adjtime under SunOS */ +#define __NR_getpeername 141 /* Common */ +#define __NR_futex 142 /* gethostid under SunOS */ +#define __NR_gettid 143 /* ENOSYS under SunOS */ +#define __NR_getrlimit 144 /* Common */ +#define __NR_setrlimit 145 /* Common */ +#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ +#define __NR_prctl 147 /* ENOSYS under SunOS */ +#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ +#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ +#define __NR_getsockname 150 /* Common */ +#define __NR_inotify_init 151 /* Linux specific */ +#define __NR_inotify_add_watch 152 /* Linux specific */ +#define __NR_poll 153 /* Common */ +#define __NR_getdents64 154 /* Linux specific */ +/* #define __NR_fcntl64 155 Linux sparc32 Specific */ +#define __NR_inotify_rm_watch 156 /* Linux specific */ +#define __NR_statfs 157 /* Common */ +#define __NR_fstatfs 158 /* Common */ +#define __NR_umount 159 /* Common */ +#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ +#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ +#define __NR_getdomainname 162 /* SunOS Specific */ +#define __NR_setdomainname 163 /* Common */ +#define __NR_utrap_install 164 /* SYSV ABI/v9 required */ +#define __NR_quotactl 165 /* Common */ +#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ +#define __NR_mount 167 /* Common */ +#define __NR_ustat 168 /* Common */ +#define __NR_setxattr 169 /* SunOS: semsys */ +#define __NR_lsetxattr 170 /* SunOS: msgsys */ +#define __NR_fsetxattr 171 /* SunOS: shmsys */ +#define __NR_getxattr 172 /* SunOS: auditsys */ +#define __NR_lgetxattr 173 /* SunOS: rfssys */ +#define __NR_getdents 174 /* Common */ +#define __NR_setsid 175 /* Common */ +#define __NR_fchdir 176 /* Common */ +#define __NR_fgetxattr 177 /* SunOS: fchroot */ +#define __NR_listxattr 178 /* SunOS: vpixsys */ +#define __NR_llistxattr 179 /* SunOS: aioread */ +#define __NR_flistxattr 180 /* SunOS: aiowrite */ +#define __NR_removexattr 181 /* SunOS: aiowait */ +#define __NR_lremovexattr 182 /* SunOS: aiocancel */ +#define __NR_sigpending 183 /* Common */ +#define __NR_query_module 184 /* Linux Specific */ +#define __NR_setpgid 185 /* Common */ +#define __NR_fremovexattr 186 /* SunOS: pathconf */ +#define __NR_tkill 187 /* SunOS: fpathconf */ +#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ +#define __NR_uname 189 /* Linux Specific */ +#define __NR_init_module 190 /* Linux Specific */ +#define __NR_personality 191 /* Linux Specific */ +#define __NR_remap_file_pages 192 /* Linux Specific */ +#define __NR_epoll_create 193 /* Linux Specific */ +#define __NR_epoll_ctl 194 /* Linux Specific */ +#define __NR_epoll_wait 195 /* Linux Specific */ +#define __NR_ioprio_set 196 /* Linux Specific */ +#define __NR_getppid 197 /* Linux Specific */ +#define __NR_sigaction 198 /* Linux Specific */ +#define __NR_sgetmask 199 /* Linux Specific */ +#define __NR_ssetmask 200 /* Linux Specific */ +#define __NR_sigsuspend 201 /* Linux Specific */ +#define __NR_oldlstat 202 /* Linux Specific */ +#define __NR_uselib 203 /* Linux Specific */ +#define __NR_readdir 204 /* Linux Specific */ +#define __NR_readahead 205 /* Linux Specific */ +#define __NR_socketcall 206 /* Linux Specific */ +#define __NR_syslog 207 /* Linux Specific */ +#define __NR_lookup_dcookie 208 /* Linux Specific */ +#define __NR_fadvise64 209 /* Linux Specific */ +#define __NR_fadvise64_64 210 /* Linux Specific */ +#define __NR_tgkill 211 /* Linux Specific */ +#define __NR_waitpid 212 /* Linux Specific */ +#define __NR_swapoff 213 /* Linux Specific */ +#define __NR_sysinfo 214 /* Linux Specific */ +#define __NR_ipc 215 /* Linux Specific */ +#define __NR_sigreturn 216 /* Linux Specific */ +#define __NR_clone 217 /* Linux Specific */ +#define __NR_ioprio_get 218 /* Linux Specific */ +#define __NR_adjtimex 219 /* Linux Specific */ +#define __NR_sigprocmask 220 /* Linux Specific */ +#define __NR_create_module 221 /* Linux Specific */ +#define __NR_delete_module 222 /* Linux Specific */ +#define __NR_get_kernel_syms 223 /* Linux Specific */ +#define __NR_getpgid 224 /* Linux Specific */ +#define __NR_bdflush 225 /* Linux Specific */ +#define __NR_sysfs 226 /* Linux Specific */ +#define __NR_afs_syscall 227 /* Linux Specific */ +#define __NR_setfsuid 228 /* Linux Specific */ +#define __NR_setfsgid 229 /* Linux Specific */ +#define __NR__newselect 230 /* Linux Specific */ +#ifdef __KERNEL__ +#define __NR_time 231 /* Linux sparc32 */ +#endif +#define __NR_splice 232 /* Linux Specific */ +#define __NR_stime 233 /* Linux Specific */ +#define __NR_statfs64 234 /* Linux Specific */ +#define __NR_fstatfs64 235 /* Linux Specific */ +#define __NR__llseek 236 /* Linux Specific */ +#define __NR_mlock 237 +#define __NR_munlock 238 +#define __NR_mlockall 239 +#define __NR_munlockall 240 +#define __NR_sched_setparam 241 +#define __NR_sched_getparam 242 +#define __NR_sched_setscheduler 243 +#define __NR_sched_getscheduler 244 +#define __NR_sched_yield 245 +#define __NR_sched_get_priority_max 246 +#define __NR_sched_get_priority_min 247 +#define __NR_sched_rr_get_interval 248 +#define __NR_nanosleep 249 +#define __NR_mremap 250 +#define __NR__sysctl 251 +#define __NR_getsid 252 +#define __NR_fdatasync 253 +#define __NR_nfsservctl 254 +#define __NR_sync_file_range 255 +#define __NR_clock_settime 256 +#define __NR_clock_gettime 257 +#define __NR_clock_getres 258 +#define __NR_clock_nanosleep 259 +#define __NR_sched_getaffinity 260 +#define __NR_sched_setaffinity 261 +#define __NR_timer_settime 262 +#define __NR_timer_gettime 263 +#define __NR_timer_getoverrun 264 +#define __NR_timer_delete 265 +#define __NR_timer_create 266 +/* #define __NR_vserver 267 Reserved for VSERVER */ +#define __NR_io_setup 268 +#define __NR_io_destroy 269 +#define __NR_io_submit 270 +#define __NR_io_cancel 271 +#define __NR_io_getevents 272 +#define __NR_mq_open 273 +#define __NR_mq_unlink 274 +#define __NR_mq_timedsend 275 +#define __NR_mq_timedreceive 276 +#define __NR_mq_notify 277 +#define __NR_mq_getsetattr 278 +#define __NR_waitid 279 +#define __NR_tee 280 +#define __NR_add_key 281 +#define __NR_request_key 282 +#define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_fstatat64 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 +#define __NR_unshare 299 +#define __NR_set_robust_list 300 +#define __NR_get_robust_list 301 +#define __NR_migrate_pages 302 +#define __NR_mbind 303 +#define __NR_get_mempolicy 304 +#define __NR_set_mempolicy 305 +#define __NR_kexec_load 306 +#define __NR_move_pages 307 +#define __NR_getcpu 308 +#define __NR_epoll_pwait 309 +#define __NR_utimensat 310 +#define __NR_signalfd 311 +#define __NR_timerfd_create 312 +#define __NR_eventfd 313 +#define __NR_fallocate 314 +#define __NR_timerfd_settime 315 +#define __NR_timerfd_gettime 316 +#define __NR_signalfd4 317 +#define __NR_eventfd2 318 +#define __NR_epoll_create1 319 +#define __NR_dup3 320 +#define __NR_pipe2 321 +#define __NR_inotify_init1 322 + +#define NR_SYSCALLS 323 + +#ifdef __KERNEL__ +#define __ARCH_WANT_IPC_PARSE_VERSION +#define __ARCH_WANT_OLD_READDIR +#define __ARCH_WANT_STAT64 +#define __ARCH_WANT_SYS_ALARM +#define __ARCH_WANT_SYS_GETHOSTNAME +#define __ARCH_WANT_SYS_PAUSE +#define __ARCH_WANT_SYS_SGETMASK +#define __ARCH_WANT_SYS_SIGNAL +#define __ARCH_WANT_SYS_TIME +#define __ARCH_WANT_COMPAT_SYS_TIME +#define __ARCH_WANT_SYS_UTIME +#define __ARCH_WANT_SYS_WAITPID +#define __ARCH_WANT_SYS_SOCKETCALL +#define __ARCH_WANT_SYS_FADVISE64 +#define __ARCH_WANT_SYS_GETPGRP +#define __ARCH_WANT_SYS_LLSEEK +#define __ARCH_WANT_SYS_NICE +#define __ARCH_WANT_SYS_OLDUMOUNT +#define __ARCH_WANT_SYS_SIGPENDING +#define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND +#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND + +/* + * "Conditional" syscalls + * + * What we want is __attribute__((weak,alias("sys_ni_syscall"))), + * but it doesn't work on all toolchains, so we just do it by hand + */ +#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") + +#endif /* __KERNEL__ */ +#endif /* _SPARC64_UNISTD_H */ diff --git a/include/asm-sparc64/upa.h b/arch/sparc/include/asm/upa.h similarity index 100% rename from include/asm-sparc64/upa.h rename to arch/sparc/include/asm/upa.h diff --git a/include/asm-sparc/user.h b/arch/sparc/include/asm/user.h similarity index 100% rename from include/asm-sparc/user.h rename to arch/sparc/include/asm/user.h diff --git a/include/asm-sparc64/utrap.h b/arch/sparc/include/asm/utrap.h similarity index 96% rename from include/asm-sparc64/utrap.h rename to arch/sparc/include/asm/utrap.h index e49e5c46ad6862380fb2ba73a843d84bdb0e1d7e..b10e527c22d967b72d1e172c3d55acef4a7ba34f 100644 --- a/include/asm-sparc64/utrap.h +++ b/arch/sparc/include/asm/utrap.h @@ -1,5 +1,5 @@ /* - * include/asm-sparc64/utrap.h + * include/asm/utrap.h * * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ @@ -43,7 +43,7 @@ #define UTH_NOCHANGE (-1) -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLY__ typedef int utrap_entry_t; typedef void *utrap_handler_t; #endif /* __ASSEMBLY__ */ diff --git a/include/asm-sparc/vac-ops.h b/arch/sparc/include/asm/vac-ops.h similarity index 100% rename from include/asm-sparc/vac-ops.h rename to arch/sparc/include/asm/vac-ops.h diff --git a/include/asm-sparc/vaddrs.h b/arch/sparc/include/asm/vaddrs.h similarity index 91% rename from include/asm-sparc/vaddrs.h rename to arch/sparc/include/asm/vaddrs.h index f6ca4779056cc97402c0f10a5d328c6a71935aeb..541e13755cecb7159826de08cad615e4c091fbf8 100644 --- a/include/asm-sparc/vaddrs.h +++ b/arch/sparc/include/asm/vaddrs.h @@ -4,7 +4,7 @@ #include /* - * asm-sparc/vaddrs.h: Here we define the virtual addresses at + * asm/vaddrs.h: Here we define the virtual addresses at * which important things will be mapped. * * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) @@ -34,11 +34,6 @@ #define IOBASE_VADDR 0xfe000000 #define IOBASE_END 0xfe600000 -#define VMALLOC_START 0xfe600000 - -/* XXX Alter this when I get around to fixing sun4c - Anton */ -#define VMALLOC_END 0xffc00000 - /* * On the sun4/4c we need a place * to reliably map locked down kernel data. This includes the diff --git a/include/asm-sparc/vfc_ioctls.h b/arch/sparc/include/asm/vfc_ioctls.h similarity index 100% rename from include/asm-sparc/vfc_ioctls.h rename to arch/sparc/include/asm/vfc_ioctls.h diff --git a/include/asm-sparc/vga.h b/arch/sparc/include/asm/vga.h similarity index 100% rename from include/asm-sparc/vga.h rename to arch/sparc/include/asm/vga.h diff --git a/include/asm-sparc/viking.h b/arch/sparc/include/asm/viking.h similarity index 100% rename from include/asm-sparc/viking.h rename to arch/sparc/include/asm/viking.h diff --git a/include/asm-sparc64/vio.h b/arch/sparc/include/asm/vio.h similarity index 100% rename from include/asm-sparc64/vio.h rename to arch/sparc/include/asm/vio.h diff --git a/include/asm-sparc64/visasm.h b/arch/sparc/include/asm/visasm.h similarity index 98% rename from include/asm-sparc64/visasm.h rename to arch/sparc/include/asm/visasm.h index 34f2ec64933b1e25f7463e587e2070dc26d89175..de797b9bf5525a020dfdbb3a6cf3afbb42407811 100644 --- a/include/asm-sparc64/visasm.h +++ b/arch/sparc/include/asm/visasm.h @@ -5,7 +5,7 @@ * * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) */ - + #include #include @@ -42,7 +42,7 @@ #define VISExitHalf \ wr %o5, 0, %fprs; -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLY__ static inline void save_and_clear_fpu(void) { __asm__ __volatile__ ( " rd %%fprs, %%o5\n" diff --git a/include/asm-sparc64/watchdog.h b/arch/sparc/include/asm/watchdog.h similarity index 100% rename from include/asm-sparc64/watchdog.h rename to arch/sparc/include/asm/watchdog.h diff --git a/include/asm-sparc/winmacro.h b/arch/sparc/include/asm/winmacro.h similarity index 100% rename from include/asm-sparc/winmacro.h rename to arch/sparc/include/asm/winmacro.h diff --git a/arch/sparc/include/asm/xor.h b/arch/sparc/include/asm/xor.h new file mode 100644 index 0000000000000000000000000000000000000000..8ed591c7db2dc1ee7220e543759165895bcfa52c --- /dev/null +++ b/arch/sparc/include/asm/xor.h @@ -0,0 +1,8 @@ +#ifndef ___ASM_SPARC_XOR_H +#define ___ASM_SPARC_XOR_H +#if defined(__sparc__) && defined(__arch64__) +#include +#else +#include +#endif +#endif diff --git a/arch/sparc/include/asm/xor_32.h b/arch/sparc/include/asm/xor_32.h new file mode 100644 index 0000000000000000000000000000000000000000..44bfa0787f3ffeb244b63a044e189f6e88782e8d --- /dev/null +++ b/arch/sparc/include/asm/xor_32.h @@ -0,0 +1,269 @@ +/* + * include/asm/xor.h + * + * Optimized RAID-5 checksumming functions for 32-bit Sparc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * You should have received a copy of the GNU General Public License + * (for example /usr/src/linux/COPYING); if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * High speed xor_block operation for RAID4/5 utilizing the + * ldd/std SPARC instructions. + * + * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) + */ + +static void +sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + } while (--lines > 0); +} + +static void +sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + } while (--lines > 0); +} + +static void +sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%3 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%3 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%3 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%3 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3), "r" (p4) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + p4 += 8; + } while (--lines > 0); +} + +static void +sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4, unsigned long *p5) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%3 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%3 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%3 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%3 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%4 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%4 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%4 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%4 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + p4 += 8; + p5 += 8; + } while (--lines > 0); +} + +static struct xor_block_template xor_block_SPARC = { + .name = "SPARC", + .do_2 = sparc_2, + .do_3 = sparc_3, + .do_4 = sparc_4, + .do_5 = sparc_5, +}; + +/* For grins, also test the generic routines. */ +#include + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_8regs); \ + xor_speed(&xor_block_32regs); \ + xor_speed(&xor_block_SPARC); \ + } while (0) diff --git a/arch/sparc/include/asm/xor_64.h b/arch/sparc/include/asm/xor_64.h new file mode 100644 index 0000000000000000000000000000000000000000..bee4bf4be3af8cb4a41df1554252381eaddf952b --- /dev/null +++ b/arch/sparc/include/asm/xor_64.h @@ -0,0 +1,70 @@ +/* + * include/asm/xor.h + * + * High speed xor_block operation for RAID4/5 utilizing the + * UltraSparc Visual Instruction Set and Niagara block-init + * twin-load instructions. + * + * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) + * Copyright (C) 2006 David S. Miller + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * You should have received a copy of the GNU General Public License + * (for example /usr/src/linux/COPYING); if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include + +extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); +extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, + unsigned long *); +extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *); +extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *, unsigned long *); + +/* XXX Ugh, write cheetah versions... -DaveM */ + +static struct xor_block_template xor_block_VIS = { + .name = "VIS", + .do_2 = xor_vis_2, + .do_3 = xor_vis_3, + .do_4 = xor_vis_4, + .do_5 = xor_vis_5, +}; + +extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); +extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, + unsigned long *); +extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *); +extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *, unsigned long *); + +static struct xor_block_template xor_block_niagara = { + .name = "Niagara", + .do_2 = xor_niagara_2, + .do_3 = xor_niagara_3, + .do_4 = xor_niagara_4, + .do_5 = xor_niagara_5, +}; + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_VIS); \ + xor_speed(&xor_block_niagara); \ + } while (0) + +/* For VIS for everything except Niagara. */ +#define XOR_SELECT_TEMPLATE(FASTEST) \ + ((tlb_type == hypervisor && \ + (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ + &xor_block_niagara : \ + &xor_block_VIS) diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c index d06a405ca718eb6f0067c9d80ca16d606486d4a3..5267d48fb2c6a36e5a777f4b51041c58944d95bc 100644 --- a/arch/sparc/kernel/apc.c +++ b/arch/sparc/kernel/apc.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -55,7 +56,7 @@ __setup("apc=", apc_setup); * CPU idle callback function * See .../arch/sparc/kernel/process.c */ -void apc_swift_idle(void) +static void apc_swift_idle(void) { #ifdef APC_DEBUG_LED set_auxio(0x00, AUXIO_LED); @@ -75,6 +76,7 @@ static inline void apc_free(void) static int apc_open(struct inode *inode, struct file *f) { + cycle_kernel_lock(); return 0; } @@ -83,54 +85,70 @@ static int apc_release(struct inode *inode, struct file *f) return 0; } -static int apc_ioctl(struct inode *inode, struct file *f, - unsigned int cmd, unsigned long __arg) +static long apc_ioctl(struct file *f, unsigned int cmd, unsigned long __arg) { __u8 inarg, __user *arg; arg = (__u8 __user *) __arg; + + lock_kernel(); + switch (cmd) { case APCIOCGFANCTL: - if (put_user(apc_readb(APC_FANCTL_REG) & APC_REGMASK, arg)) - return -EFAULT; + if (put_user(apc_readb(APC_FANCTL_REG) & APC_REGMASK, arg)) { + unlock_kernel(); + return -EFAULT; + } break; case APCIOCGCPWR: - if (put_user(apc_readb(APC_CPOWER_REG) & APC_REGMASK, arg)) + if (put_user(apc_readb(APC_CPOWER_REG) & APC_REGMASK, arg)) { + unlock_kernel(); return -EFAULT; + } break; case APCIOCGBPORT: - if (put_user(apc_readb(APC_BPORT_REG) & APC_BPMASK, arg)) + if (put_user(apc_readb(APC_BPORT_REG) & APC_BPMASK, arg)) { + unlock_kernel(); return -EFAULT; + } break; case APCIOCSFANCTL: - if (get_user(inarg, arg)) + if (get_user(inarg, arg)) { + unlock_kernel(); return -EFAULT; + } apc_writeb(inarg & APC_REGMASK, APC_FANCTL_REG); break; case APCIOCSCPWR: - if (get_user(inarg, arg)) + if (get_user(inarg, arg)) { + unlock_kernel(); return -EFAULT; + } apc_writeb(inarg & APC_REGMASK, APC_CPOWER_REG); break; case APCIOCSBPORT: - if (get_user(inarg, arg)) + if (get_user(inarg, arg)) { + unlock_kernel(); return -EFAULT; + } apc_writeb(inarg & APC_BPMASK, APC_BPORT_REG); break; default: + unlock_kernel(); return -EINVAL; }; + unlock_kernel(); return 0; } static const struct file_operations apc_fops = { - .ioctl = apc_ioctl, - .open = apc_open, - .release = apc_release, + .unlocked_ioctl = apc_ioctl, + .open = apc_open, + .release = apc_release, }; static struct miscdevice apc_miscdev = { APC_MINOR, APC_DEVNAME, &apc_fops }; diff --git a/arch/sparc/kernel/asm-offsets.c b/arch/sparc/kernel/asm-offsets.c index cd3f7694e9b9240e20455a5cb3933c1a343b0f3b..b5bb99ed892cc459b5f38f919750c8e33e87bc13 100644 --- a/arch/sparc/kernel/asm-offsets.c +++ b/arch/sparc/kernel/asm-offsets.c @@ -18,18 +18,6 @@ int foo(void) { DEFINE(AOFF_task_thread, offsetof(struct task_struct, thread)); BLANK(); - /* XXX This is the stuff for sclow.S, kill it. */ - DEFINE(AOFF_task_pid, offsetof(struct task_struct, pid)); - DEFINE(AOFF_task_uid, offsetof(struct task_struct, uid)); - DEFINE(AOFF_task_gid, offsetof(struct task_struct, gid)); - DEFINE(AOFF_task_euid, offsetof(struct task_struct, euid)); - DEFINE(AOFF_task_egid, offsetof(struct task_struct, egid)); - /* DEFINE(THREAD_INFO, offsetof(struct task_struct, stack)); */ - DEFINE(ASIZ_task_uid, sizeof(current->uid)); - DEFINE(ASIZ_task_gid, sizeof(current->gid)); - DEFINE(ASIZ_task_euid, sizeof(current->euid)); - DEFINE(ASIZ_task_egid, sizeof(current->egid)); - BLANK(); DEFINE(AOFF_thread_fork_kpsr, offsetof(struct thread_struct, fork_kpsr)); BLANK(); diff --git a/arch/sparc/kernel/ebus.c b/arch/sparc/kernel/ebus.c index 92c6fc07e59c100ab96edb6f297f05facff12265..97294232259c764a7461a6d19cfdcbd45b7f9ab3 100644 --- a/arch/sparc/kernel/ebus.c +++ b/arch/sparc/kernel/ebus.c @@ -69,7 +69,7 @@ static inline unsigned long ebus_alloc(size_t size) /* */ -int __init ebus_blacklist_irq(const char *name) +static int __init ebus_blacklist_irq(const char *name) { struct ebus_device_irq *dp; @@ -83,8 +83,8 @@ int __init ebus_blacklist_irq(const char *name) return 0; } -void __init fill_ebus_child(struct device_node *dp, - struct linux_ebus_child *dev) +static void __init fill_ebus_child(struct device_node *dp, + struct linux_ebus_child *dev) { const int *regs; const int *irqs; @@ -144,7 +144,8 @@ void __init fill_ebus_child(struct device_node *dp, } } -void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_device *dev) +static void __init fill_ebus_device(struct device_node *dp, + struct linux_ebus_device *dev) { const struct linux_prom_registers *regs; struct linux_ebus_child *child; diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S index 4bcfe54f878d3250c98ed613cdc899770aaaa850..e8cdf715a546ccb0af9b0802d249368470a5a119 100644 --- a/arch/sparc/kernel/entry.S +++ b/arch/sparc/kernel/entry.S @@ -19,6 +19,7 @@ #include #include #include +#include #ifdef CONFIG_SUN4 #include #else @@ -1195,8 +1196,9 @@ sys_rt_sigreturn: be 1f nop + add %sp, STACKFRAME_SZ, %o0 call syscall_trace - nop + mov 1, %o1 1: /* We are returning to a signal handler. */ @@ -1286,8 +1288,12 @@ linux_fast_syscall: mov %i3, %o3 linux_syscall_trace: + add %sp, STACKFRAME_SZ, %o0 call syscall_trace - nop + mov 0, %o1 + cmp %o0, 0 + bne 3f + mov -ENOSYS, %o0 mov %i0, %o0 mov %i1, %o1 mov %i2, %o2 @@ -1317,7 +1323,6 @@ linux_sparc_syscall: bne linux_fast_syscall /* Just do first insn from SAVE_ALL in the delay slot */ - .globl syscall_is_too_hard syscall_is_too_hard: SAVE_ALL_HEAD rd %wim, %l3 @@ -1337,6 +1342,7 @@ syscall_is_too_hard: call %l7 mov %i5, %o5 +3: st %o0, [%sp + STACKFRAME_SZ + PT_I0] ret_sys_call: @@ -1374,6 +1380,8 @@ ret_sys_call: st %l2, [%sp + STACKFRAME_SZ + PT_NPC] linux_syscall_trace2: + add %sp, STACKFRAME_SZ, %o0 + mov 1, %o1 call syscall_trace add %l1, 0x4, %l2 /* npc = npc+4 */ st %l1, [%sp + STACKFRAME_SZ + PT_PC] @@ -1544,8 +1552,7 @@ kgdb_trap_low: #endif .align 4 - .globl __handle_exception, flush_patch_exception -__handle_exception: + .globl flush_patch_exception flush_patch_exception: FLUSH_ALL_KERNEL_WINDOWS; ldd [%o0], %o6 diff --git a/arch/sparc/kernel/etrap.S b/arch/sparc/kernel/etrap.S index f37d961d67a63160244611828f7232d7448b6273..e806fcdc46db7ba87ebae3c59af2ecf6b83fd6d8 100644 --- a/arch/sparc/kernel/etrap.S +++ b/arch/sparc/kernel/etrap.S @@ -228,7 +228,6 @@ tsetup_mmu_patchme: */ #define glob_tmp g1 - .globl tsetup_sun4c_stackchk tsetup_sun4c_stackchk: /* Done by caller: andcc %sp, 0x7, %g0 */ bne trap_setup_user_stack_is_bolixed diff --git a/arch/sparc/kernel/head.S b/arch/sparc/kernel/head.S index 3bfd6085a91d7c2b2b1771ac773b445bd75d08b8..50d9a16af795c5d675fefd40a3e17cab5f486840 100644 --- a/arch/sparc/kernel/head.S +++ b/arch/sparc/kernel/head.S @@ -32,7 +32,6 @@ */ .align 4 - .globl cputyp cputyp: .word 1 @@ -1280,7 +1279,6 @@ halt_me: * gets initialized in c-code so all routines can use it. */ - .globl prom_vector_p prom_vector_p: .word 0 diff --git a/arch/sparc/kernel/idprom.c b/arch/sparc/kernel/idprom.c index 7220562cdb3485573fa0962db1d46599c0a2b5e6..fc511f3c4c18a32bd1395447ba6b32c886b37db0 100644 --- a/arch/sparc/kernel/idprom.c +++ b/arch/sparc/kernel/idprom.c @@ -24,7 +24,7 @@ static struct idprom idprom_buffer; * of the Sparc CPU and have a meaningful IDPROM machtype value that we * know about. See asm-sparc/machines.h for empirical constants. */ -struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = { +static struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES] = { /* First, Sun4's */ { "Sun 4/100 Series", (SM_SUN4 | SM_4_110) }, { "Sun 4/200 Series", (SM_SUN4 | SM_4_260) }, diff --git a/arch/sparc/kernel/ioport.c b/arch/sparc/kernel/ioport.c index 7b17522f59bfbf680b808c41a41fbdf56511f060..487960919f1f404cf598cb5aa0b8ce8cb07b3f79 100644 --- a/arch/sparc/kernel/ioport.c +++ b/arch/sparc/kernel/ioport.c @@ -49,13 +49,16 @@ #define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */ -struct resource *_sparc_find_resource(struct resource *r, unsigned long); +static struct resource *_sparc_find_resource(struct resource *r, + unsigned long); static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz); static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys, unsigned long size, char *name); static void _sparc_free_io(struct resource *res); +static void register_proc_sparc_ioport(void); + /* This points to the next to use virtual memory for DVMA mappings */ static struct resource _sparc_dvma = { .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1 @@ -539,8 +542,6 @@ void __init sbus_setup_arch_props(struct sbus_bus *sbus, struct device_node *dp) int __init sbus_arch_preinit(void) { - extern void register_proc_sparc_ioport(void); - register_proc_sparc_ioport(); #ifdef CONFIG_SUN4 @@ -853,8 +854,8 @@ _sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof, * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case. * This probably warrants some sort of hashing. */ -struct resource * -_sparc_find_resource(struct resource *root, unsigned long hit) +static struct resource *_sparc_find_resource(struct resource *root, + unsigned long hit) { struct resource *tmp; @@ -865,7 +866,7 @@ _sparc_find_resource(struct resource *root, unsigned long hit) return NULL; } -void register_proc_sparc_ioport(void) +static void register_proc_sparc_ioport(void) { #ifdef CONFIG_PROC_FS create_proc_read_entry("io_map",0,NULL,_sparc_io_get_info,&sparc_iomap); diff --git a/arch/sparc/kernel/irq.c b/arch/sparc/kernel/irq.c index 087390b092b01854fad73270c382866185cd9d56..93e1d1c65290b8008aef53d02d4de1f0e24c250a 100644 --- a/arch/sparc/kernel/irq.c +++ b/arch/sparc/kernel/irq.c @@ -154,7 +154,7 @@ void (*sparc_init_timers)(irq_handler_t ) = struct irqaction static_irqaction[MAX_STATIC_ALLOC]; int static_irq_count; -struct { +static struct { struct irqaction *action; int flags; } sparc_irq[NR_IRQS]; diff --git a/arch/sparc/kernel/process.c b/arch/sparc/kernel/process.c index da48d248cc17d6d9da5f9cb4faf96d1cb41e17e2..4bb430940a61d3c353a7501bd86b6019e5253dc5 100644 --- a/arch/sparc/kernel/process.c +++ b/arch/sparc/kernel/process.c @@ -1,6 +1,6 @@ /* linux/arch/sparc/kernel/process.c * - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) + * Copyright (C) 1995, 2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) */ @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -177,6 +176,8 @@ void machine_power_off(void) machine_halt(); } +#if 0 + static DEFINE_SPINLOCK(sparc_backtrace_lock); void __show_backtrace(unsigned long fp) @@ -196,7 +197,7 @@ void __show_backtrace(unsigned long fp) rw->ins[4], rw->ins[5], rw->ins[6], rw->ins[7]); - print_symbol("%s\n", rw->ins[7]); + printk("%pS\n", (void *) rw->ins[7]); rw = (struct reg_window *) rw->ins[6]; } spin_unlock_irqrestore(&sparc_backtrace_lock, flags); @@ -228,7 +229,6 @@ void smp_show_backtrace_all_cpus(void) } #endif -#if 0 void show_stackframe(struct sparc_stackf *sf) { unsigned long size; @@ -264,14 +264,14 @@ void show_regs(struct pt_regs *r) printk("PSR: %08lx PC: %08lx NPC: %08lx Y: %08lx %s\n", r->psr, r->pc, r->npc, r->y, print_tainted()); - print_symbol("PC: <%s>\n", r->pc); + printk("PC: <%pS>\n", (void *) r->pc); printk("%%G: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", r->u_regs[0], r->u_regs[1], r->u_regs[2], r->u_regs[3], r->u_regs[4], r->u_regs[5], r->u_regs[6], r->u_regs[7]); printk("%%O: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", r->u_regs[8], r->u_regs[9], r->u_regs[10], r->u_regs[11], r->u_regs[12], r->u_regs[13], r->u_regs[14], r->u_regs[15]); - print_symbol("RPC: <%s>\n", r->u_regs[15]); + printk("RPC: <%pS>\n", (void *) r->u_regs[15]); printk("%%L: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", rw->locals[0], rw->locals[1], rw->locals[2], rw->locals[3], @@ -306,7 +306,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp) rw = (struct reg_window *) fp; pc = rw->ins[7]; printk("[%08lx : ", pc); - print_symbol("%s ] ", pc); + printk("%pS ] ", (void *) pc); fp = rw->ins[6]; } while (++count < 16); printk("\n"); diff --git a/arch/sparc/kernel/ptrace.c b/arch/sparc/kernel/ptrace.c index 81f3b929743f12c17ec44642acb58f6526d4319c..20699c701412dc85506770375e94e3ccbe79efc5 100644 --- a/arch/sparc/kernel/ptrace.c +++ b/arch/sparc/kernel/ptrace.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -450,21 +451,16 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -asmlinkage void syscall_trace(void) +asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p) { - if (!test_thread_flag(TIF_SYSCALL_TRACE)) - return; - if (!(current->ptrace & PT_PTRACED)) - return; - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig (current->exit_code, current, 1); - current->exit_code = 0; + int ret = 0; + + if (test_thread_flag(TIF_SYSCALL_TRACE)) { + if (syscall_exit_p) + tracehook_report_syscall_exit(regs, 0); + else + ret = tracehook_report_syscall_entry(regs); } + + return ret; } diff --git a/arch/sparc/kernel/rtrap.S b/arch/sparc/kernel/rtrap.S index ce30082ab266b7b2338f2eaa1a4d2c55b7feb901..4da2e1f6629091ea60e7bccd81fc95b495ae065d 100644 --- a/arch/sparc/kernel/rtrap.S +++ b/arch/sparc/kernel/rtrap.S @@ -69,12 +69,13 @@ ret_trap_lockless_ipi: ld [%curptr + TI_FLAGS], %g2 signal_p: - andcc %g2, (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK), %g0 + andcc %g2, _TIF_DO_NOTIFY_RESUME_MASK, %g0 bz,a ret_trap_continue ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr + mov %g2, %o2 mov %l5, %o1 - call do_signal + call do_notify_resume add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr /* Fall through. */ @@ -224,8 +225,6 @@ ret_trap_user_stack_is_bolixed: b signal_p ld [%curptr + TI_FLAGS], %g2 - - .globl sun4c_rett_stackchk sun4c_rett_stackchk: be 1f and %fp, 0xfff, %g1 ! delay slot diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index a0ea0bc6f4718dc8a89256958cbf89256b4c9d12..9e451b21202e927a4c3bf809490e4e5237e15354 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c @@ -67,7 +67,7 @@ struct screen_info screen_info = { extern unsigned long trapbase; /* Pretty sick eh? */ -void prom_sync_me(void) +static void prom_sync_me(void) { unsigned long prom_tbr, flags; @@ -97,7 +97,7 @@ void prom_sync_me(void) return; } -unsigned int boot_flags __initdata = 0; +static unsigned int boot_flags __initdata = 0; #define BOOTME_DEBUG 0x1 /* Exported for mm/init.c:paging_init. */ diff --git a/arch/sparc/kernel/signal.c b/arch/sparc/kernel/signal.c index 3fd1df9f9ba7e849609f5018d443378a301fb2e4..c94f91c8b6e0996dba7f057a815d0005376925d7 100644 --- a/arch/sparc/kernel/signal.c +++ b/arch/sparc/kernel/signal.c @@ -18,6 +18,7 @@ #include #include /* do_coredum */ #include +#include #include #include @@ -513,7 +514,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, * want to handle. Thus you cannot kill init even with a SIGKILL even by * mistake. */ -asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0) +static void do_signal(struct pt_regs *regs, unsigned long orig_i0) { struct k_sigaction ka; int restart_syscall; @@ -552,6 +553,8 @@ asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0) */ if (test_thread_flag(TIF_RESTORE_SIGMASK)) clear_thread_flag(TIF_RESTORE_SIGMASK); + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && @@ -579,6 +582,17 @@ asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0) } } +void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, + unsigned long thread_info_flags) +{ + if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) + do_signal(regs, orig_i0); + if (thread_info_flags & _TIF_NOTIFY_RESUME) { + clear_thread_flag(TIF_NOTIFY_RESUME); + tracehook_notify_resume(regs); + } +} + asmlinkage int do_sys_sigstack(struct sigstack __user *ssptr, struct sigstack __user *ossptr, unsigned long sp) diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c index 6724ab90f82bc6868f2c47eb81540d7909a2ade9..1619ec15c099493a85ba4f21c93e3ecbbe594576 100644 --- a/arch/sparc/kernel/smp.c +++ b/arch/sparc/kernel/smp.c @@ -35,13 +35,9 @@ #include "irq.h" -int smp_num_cpus = 1; volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,}; unsigned char boot_cpu_id = 0; unsigned char boot_cpu_id4 = 0; /* boot_cpu_id << 2 */ -int smp_activated = 0; -volatile int __cpu_number_map[NR_CPUS]; -volatile int __cpu_logical_map[NR_CPUS]; cpumask_t cpu_online_map = CPU_MASK_NONE; cpumask_t phys_cpu_present_map = CPU_MASK_NONE; @@ -55,9 +51,6 @@ cpumask_t smp_commenced_mask = CPU_MASK_NONE; * instruction which is much better... */ -/* Used to make bitops atomic */ -unsigned char bitops_spinlock = 0; - void __cpuinit smp_store_cpu_info(int id) { int cpu_node; diff --git a/arch/sparc/kernel/sun4c_irq.c b/arch/sparc/kernel/sun4c_irq.c index c6ac9fc525632d96548e84cb4750874c57f015dc..340fc395fe2dd7491cc8bf6e351525fc506f34cc 100644 --- a/arch/sparc/kernel/sun4c_irq.c +++ b/arch/sparc/kernel/sun4c_irq.c @@ -68,7 +68,8 @@ unsigned char *interrupt_enable = NULL; static int sun4c_pil_map[] = { 0, 1, 2, 3, 5, 7, 8, 9 }; -unsigned int sun4c_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint) +static unsigned int sun4c_sbint_to_irq(struct sbus_dev *sdev, + unsigned int sbint) { if (sbint >= sizeof(sun4c_pil_map)) { printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint); diff --git a/arch/sparc/kernel/sun4d_irq.c b/arch/sparc/kernel/sun4d_irq.c index 8ac5661cafff52215b2e94630c0fb43b3b689cfb..1290b5998f831ede12dd28416cf967e088ba267c 100644 --- a/arch/sparc/kernel/sun4d_irq.c +++ b/arch/sparc/kernel/sun4d_irq.c @@ -52,13 +52,13 @@ extern struct irqaction static_irqaction[MAX_STATIC_ALLOC]; extern int static_irq_count; unsigned char cpu_leds[32]; #ifdef CONFIG_SMP -unsigned char sbus_tid[32]; +static unsigned char sbus_tid[32]; #endif static struct irqaction *irq_action[NR_IRQS]; extern spinlock_t irq_action_lock; -struct sbus_action { +static struct sbus_action { struct irqaction *action; /* For SMP this needs to be extended */ } *sbus_actions; @@ -267,7 +267,8 @@ unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq) return irq; } -unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint) +static unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, + unsigned int sbint) { if (sbint >= sizeof(sbus_to_pil)) { printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint); diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index b92d6d2d5b04c8f0ea98a7b07baa0c7f27c02667..94e02de960ea8ca614ef8b408c882082abd97940 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -154,7 +154,8 @@ static unsigned long irq_mask[] = { static int sun4m_pil_map[] = { 0, 2, 3, 5, 7, 9, 11, 13 }; -unsigned int sun4m_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint) +static unsigned int sun4m_sbint_to_irq(struct sbus_dev *sdev, + unsigned int sbint) { if (sbint >= sizeof(sun4m_pil_map)) { printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint); @@ -163,7 +164,7 @@ unsigned int sun4m_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint) return sun4m_pil_map[sbint] | 0x30; } -inline unsigned long sun4m_get_irqmask(unsigned int irq) +static unsigned long sun4m_get_irqmask(unsigned int irq) { unsigned long mask; @@ -281,7 +282,7 @@ static void sun4m_set_udt(int cpu) #define TIMER_IRQ (OBIO_INTR | 10) #define PROFILE_IRQ (OBIO_INTR | 14) -struct sun4m_timer_regs *sun4m_timers; +static struct sun4m_timer_regs *sun4m_timers; unsigned int lvl14_resolution = (((1000000/HZ) + 1) << 10); static void sun4m_clear_clock_irq(void) diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index ffb875aacb7e4ccb14b5e4c9f248f24eb48a5844..406ac1abc83a8645f559b435690b5f12594f6e5a 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c @@ -244,8 +244,9 @@ static struct smp_funcall { static DEFINE_SPINLOCK(cross_call_lock); /* Cross calls must be serialized, at least currently. */ -void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, unsigned long arg5) +static void smp4m_cross_call(smpfunc_t func, unsigned long arg1, + unsigned long arg2, unsigned long arg3, + unsigned long arg4, unsigned long arg5) { register int ncpus = SUN4M_NCPUS; unsigned long flags; @@ -344,7 +345,7 @@ static void __init smp_setup_percpu_timer(void) enable_pil_irq(14); } -void __init smp4m_blackbox_id(unsigned *addr) +static void __init smp4m_blackbox_id(unsigned *addr) { int rd = *addr & 0x3e000000; int rs1 = rd >> 11; @@ -354,7 +355,7 @@ void __init smp4m_blackbox_id(unsigned *addr) addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */ } -void __init smp4m_blackbox_current(unsigned *addr) +static void __init smp4m_blackbox_current(unsigned *addr) { int rd = *addr & 0x3e000000; int rs1 = rd >> 11; diff --git a/arch/sparc/kernel/sys_sparc.c b/arch/sparc/kernel/sys_sparc.c index 3c6b49a53ae82f8e7a77dc67b4445eb753591f6f..4d73421559c3aa1c62c79b77210fdabc9f5497fb 100644 --- a/arch/sparc/kernel/sys_sparc.c +++ b/arch/sparc/kernel/sys_sparc.c @@ -97,7 +97,7 @@ asmlinkage int sparc_pipe(struct pt_regs *regs) int fd[2]; int error; - error = do_pipe(fd); + error = do_pipe_flags(fd, 0); if (error) goto out; regs->u_regs[UREG_I1] = fd[1]; diff --git a/arch/sparc/kernel/systbls.S b/arch/sparc/kernel/systbls.S index 5a7c4c8345c3193b144c087b6820bbb32c238729..e1b9233b90ab3133587481322f30d3a260fc6569 100644 --- a/arch/sparc/kernel/systbls.S +++ b/arch/sparc/kernel/systbls.S @@ -80,4 +80,5 @@ sys_call_table: /*300*/ .long sys_set_robust_list, sys_get_robust_list, sys_migrate_pages, sys_mbind, sys_get_mempolicy /*305*/ .long sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait /*310*/ .long sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate -/*315*/ .long sys_timerfd_settime, sys_timerfd_gettime +/*315*/ .long sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 +/*320*/ .long sys_dup3, sys_pipe2, sys_inotify_init1 diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c index 53caacbb3982e20c3feb464facdbe10352122dcf..ab3dd0b257d3337029f76a67d2cf1126ad02183c 100644 --- a/arch/sparc/kernel/time.c +++ b/arch/sparc/kernel/time.c @@ -46,7 +46,7 @@ #include "irq.h" DEFINE_SPINLOCK(rtc_lock); -enum sparc_clock_type sp_clock_typ; +static enum sparc_clock_type sp_clock_typ; DEFINE_SPINLOCK(mostek_lock); void __iomem *mstk48t02_regs = NULL; static struct mostek48t08 __iomem *mstk48t08_regs = NULL; @@ -366,7 +366,7 @@ static int __init clock_init(void) fs_initcall(clock_init); #endif /* !CONFIG_SUN4 */ -void __init sbus_time_init(void) +static void __init sbus_time_init(void) { BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM); diff --git a/arch/sparc/kernel/traps.c b/arch/sparc/kernel/traps.c index 978e9d85949eeab9424d654fc44795bc8445e6eb..5d45d5fd8c99a150d75a6e2f0f1b489181b9c3a2 100644 --- a/arch/sparc/kernel/traps.c +++ b/arch/sparc/kernel/traps.c @@ -1,7 +1,7 @@ /* * arch/sparc/kernel/traps.c * - * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright 1995, 2008 David S. Miller (davem@davemloft.net) * Copyright 2000 Jakub Jelinek (jakub@redhat.com) */ @@ -11,7 +11,6 @@ #include /* for jiffies */ #include -#include #include #include #include @@ -33,9 +32,6 @@ struct trap_trace_entry { unsigned long type; }; -int trap_curbuf = 0; -struct trap_trace_entry trapbuf[1024]; - void syscall_trace_entry(struct pt_regs *regs) { printk("%s[%d]: ", current->comm, task_pid_nr(current)); @@ -72,7 +68,7 @@ void sun4d_nmi(struct pt_regs *regs) prom_halt(); } -void instruction_dump (unsigned long *pc) +static void instruction_dump(unsigned long *pc) { int i; @@ -119,8 +115,8 @@ void die_if_kernel(char *str, struct pt_regs *regs) count++ < 30 && (((unsigned long) rw) >= PAGE_OFFSET) && !(((unsigned long) rw) & 0x7)) { - printk("Caller[%08lx]", rw->ins[7]); - print_symbol(": %s\n", rw->ins[7]); + printk("Caller[%08lx]: %pS\n", rw->ins[7], + (void *) rw->ins[7]); rw = (struct reg_window *)rw->ins[6]; } } @@ -479,10 +475,6 @@ void do_BUG(const char *file, int line) extern void sparc_cpu_startup(void); -int linux_smp_still_initting; -unsigned int thiscpus_tbr; -int thiscpus_mid; - void trap_init(void) { extern void thread_info_offsets_are_bolixed_pete(void); diff --git a/arch/sparc/kernel/wof.S b/arch/sparc/kernel/wof.S index 4bce38dfe3c5162dca0ed6cd92e346c3125bb438..3bbcd8dc9abf6622a26525fe5de2278ccd83edec 100644 --- a/arch/sparc/kernel/wof.S +++ b/arch/sparc/kernel/wof.S @@ -306,7 +306,6 @@ spwin_bad_ustack_from_kernel: * As noted above %curptr cannot be touched by this routine at all. */ - .globl spwin_sun4c_stackchk spwin_sun4c_stackchk: /* LOCATION: Window to be saved on the stack */ diff --git a/arch/sparc/kernel/wuf.S b/arch/sparc/kernel/wuf.S index 82e5145b0f775a111bcb08f31e0598e1cf5e5a4a..779ff750603d0c546454b9f0dafb763ee7cd4acc 100644 --- a/arch/sparc/kernel/wuf.S +++ b/arch/sparc/kernel/wuf.S @@ -243,7 +243,6 @@ fwin_user_finish_up: */ .align 4 - .globl sun4c_fwin_stackchk sun4c_fwin_stackchk: /* LOCATION: Window 'W' */ diff --git a/arch/sparc/mm/fault.c b/arch/sparc/mm/fault.c index 0a3cd8f6cfe4690d43817152ce8e4f67b1ea2e82..3604c2e86709800455e949d27beabac11fdea949 100644 --- a/arch/sparc/mm/fault.c +++ b/arch/sparc/mm/fault.c @@ -451,7 +451,7 @@ asmlinkage void do_sun4c_fault(struct pt_regs *regs, int text_fault, int write, } /* This always deals with user addresses. */ -inline void force_user_fault(unsigned long address, int write) +static void force_user_fault(unsigned long address, int write) { struct vm_area_struct *vma; struct task_struct *tsk = current; diff --git a/arch/sparc/mm/init.c b/arch/sparc/mm/init.c index 7794ecb896e32284c8c1d3225faa285e87d088fd..e103f1bb3777ebdb11e72aea72fa399e11c02ac1 100644 --- a/arch/sparc/mm/init.c +++ b/arch/sparc/mm/init.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -128,7 +129,7 @@ unsigned long calc_highpages(void) return nr; } -unsigned long calc_max_low_pfn(void) +static unsigned long calc_max_low_pfn(void) { int i; unsigned long tmp = pfn_base + (SRMMU_MAXMEM >> PAGE_SHIFT); @@ -292,7 +293,7 @@ unsigned long __init bootmem_init(unsigned long *pages_avail) * * We simply copy the 2.4 implementation for now. */ -int pgt_cache_water[2] = { 25, 50 }; +static int pgt_cache_water[2] = { 25, 50 }; void check_pgt_cache(void) { @@ -356,8 +357,6 @@ void __init paging_init(void) device_scan(); } -struct cache_palias *sparc_aliases; - static void __init taint_real_pages(void) { int i; @@ -375,7 +374,7 @@ static void __init taint_real_pages(void) } } -void map_high_region(unsigned long start_pfn, unsigned long end_pfn) +static void map_high_region(unsigned long start_pfn, unsigned long end_pfn) { unsigned long tmp; diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c index 23d3291a3e81e65736c862e03e3b24e3047ffa22..ee30462598fc72b763da88077b72438be730cbf4 100644 --- a/arch/sparc/mm/srmmu.c +++ b/arch/sparc/mm/srmmu.c @@ -50,7 +50,7 @@ #include enum mbus_module srmmu_modtype; -unsigned int hwbug_bitmask; +static unsigned int hwbug_bitmask; int vac_cache_size; int vac_line_size; @@ -60,7 +60,7 @@ extern unsigned long last_valid_pfn; extern unsigned long page_kernel; -pgd_t *srmmu_swapper_pg_dir; +static pgd_t *srmmu_swapper_pg_dir; #ifdef CONFIG_SMP #define FLUSH_BEGIN(mm) @@ -83,12 +83,12 @@ BTFIXUPDEF_CALL(void, local_flush_page_for_dma, unsigned long) char *srmmu_name; ctxd_t *srmmu_ctx_table_phys; -ctxd_t *srmmu_context_table; +static ctxd_t *srmmu_context_table; int viking_mxcc_present; static DEFINE_SPINLOCK(srmmu_context_spinlock); -int is_hypersparc; +static int is_hypersparc; /* * In general all page table modifications should use the V8 atomic @@ -112,11 +112,11 @@ static inline int srmmu_device_memory(unsigned long x) return ((x & 0xF0000000) != 0); } -int srmmu_cache_pagetables; +static int srmmu_cache_pagetables; /* these will be initialized in srmmu_nocache_calcsize() */ -unsigned long srmmu_nocache_size; -unsigned long srmmu_nocache_end; +static unsigned long srmmu_nocache_size; +static unsigned long srmmu_nocache_end; /* 1 bit <=> 256 bytes of nocache <=> 64 PTEs */ #define SRMMU_NOCACHE_BITMAP_SHIFT (PAGE_SHIFT - 4) @@ -324,7 +324,7 @@ static unsigned long __srmmu_get_nocache(int size, int align) return (SRMMU_NOCACHE_VADDR + (offset << SRMMU_NOCACHE_BITMAP_SHIFT)); } -unsigned inline long srmmu_get_nocache(int size, int align) +static unsigned long srmmu_get_nocache(int size, int align) { unsigned long tmp; @@ -336,7 +336,7 @@ unsigned inline long srmmu_get_nocache(int size, int align) return tmp; } -void srmmu_free_nocache(unsigned long vaddr, int size) +static void srmmu_free_nocache(unsigned long vaddr, int size) { int offset; @@ -369,7 +369,8 @@ void srmmu_free_nocache(unsigned long vaddr, int size) bit_map_clear(&srmmu_nocache_map, offset, size); } -void srmmu_early_allocate_ptable_skeleton(unsigned long start, unsigned long end); +static void srmmu_early_allocate_ptable_skeleton(unsigned long start, + unsigned long end); extern unsigned long probe_memory(void); /* in fault.c */ @@ -377,7 +378,7 @@ extern unsigned long probe_memory(void); /* in fault.c */ * Reserve nocache dynamically proportionally to the amount of * system RAM. -- Tomas Szepe , June 2002 */ -void srmmu_nocache_calcsize(void) +static void srmmu_nocache_calcsize(void) { unsigned long sysmemavail = probe_memory() / 1024; int srmmu_nocache_npages; @@ -398,7 +399,7 @@ void srmmu_nocache_calcsize(void) srmmu_nocache_end = SRMMU_NOCACHE_VADDR + srmmu_nocache_size; } -void __init srmmu_nocache_init(void) +static void __init srmmu_nocache_init(void) { unsigned int bitmap_bits; pgd_t *pgd; @@ -645,7 +646,7 @@ static void srmmu_unmapiorange(unsigned long virt_addr, unsigned int len) * mappings on the kernel stack without any special code as we did * need on the sun4c. */ -struct thread_info *srmmu_alloc_thread_info(void) +static struct thread_info *srmmu_alloc_thread_info(void) { struct thread_info *ret; @@ -1045,13 +1046,14 @@ extern void hypersparc_setup_blockops(void); * around 8mb mapped for us. */ -void __init early_pgtable_allocfail(char *type) +static void __init early_pgtable_allocfail(char *type) { prom_printf("inherit_prom_mappings: Cannot alloc kernel %s.\n", type); prom_halt(); } -void __init srmmu_early_allocate_ptable_skeleton(unsigned long start, unsigned long end) +static void __init srmmu_early_allocate_ptable_skeleton(unsigned long start, + unsigned long end) { pgd_t *pgdp; pmd_t *pmdp; @@ -1081,7 +1083,8 @@ void __init srmmu_early_allocate_ptable_skeleton(unsigned long start, unsigned l } } -void __init srmmu_allocate_ptable_skeleton(unsigned long start, unsigned long end) +static void __init srmmu_allocate_ptable_skeleton(unsigned long start, + unsigned long end) { pgd_t *pgdp; pmd_t *pmdp; @@ -1116,7 +1119,8 @@ void __init srmmu_allocate_ptable_skeleton(unsigned long start, unsigned long en * looking at the prom's page table directly which is what most * other OS's do. Yuck... this is much better. */ -void __init srmmu_inherit_prom_mappings(unsigned long start,unsigned long end) +static void __init srmmu_inherit_prom_mappings(unsigned long start, + unsigned long end) { pgd_t *pgdp; pmd_t *pmdp; @@ -1348,8 +1352,7 @@ void __init srmmu_paging_init(void) zones_size[ZONE_HIGHMEM] = npages; zholes_size[ZONE_HIGHMEM] = npages - calc_highpages(); - free_area_init_node(0, &contig_page_data, zones_size, - pfn_base, zholes_size); + free_area_init_node(0, zones_size, pfn_base, zholes_size); } } diff --git a/arch/sparc/mm/sun4c.c b/arch/sparc/mm/sun4c.c index 2375fe9dc3124346673dfb462d2a137b05374a92..d1782f6368beeadf9afbc9936b3b8e39da75db90 100644 --- a/arch/sparc/mm/sun4c.c +++ b/arch/sparc/mm/sun4c.c @@ -2123,8 +2123,7 @@ void __init sun4c_paging_init(void) zones_size[ZONE_HIGHMEM] = npages; zholes_size[ZONE_HIGHMEM] = npages - calc_highpages(); - free_area_init_node(0, &contig_page_data, zones_size, - pfn_base, zholes_size); + free_area_init_node(0, zones_size, pfn_base, zholes_size); } cnt = 0; diff --git a/arch/sparc/mm/tsunami.S b/arch/sparc/mm/tsunami.S index db0d6de33a87cdbff398ed8f0a90835a6811c226..4e55e8f76648a27da7ff666b0fae21590e182651 100644 --- a/arch/sparc/mm/tsunami.S +++ b/arch/sparc/mm/tsunami.S @@ -93,7 +93,6 @@ tsunami_flush_tlb_page_out: ldd [src + offset + 0x00], t2; \ std t2, [dst + offset + 0x00]; - .globl tsunami_copy_1page tsunami_copy_1page: /* NOTE: This routine has to be shorter than 70insns --jj */ or %g0, (PAGE_SIZE >> 8), %g1 diff --git a/arch/sparc64/Kconfig b/arch/sparc64/Kconfig index eb36f3b746b8ad280c7a26a07de046af25c01d3c..923a98959fa7349930efa343a4ab1febd4d5b05f 100644 --- a/arch/sparc64/Kconfig +++ b/arch/sparc64/Kconfig @@ -11,9 +11,13 @@ config SPARC config SPARC64 bool default y + select HAVE_DYNAMIC_FTRACE + select HAVE_FTRACE select HAVE_IDE select HAVE_LMB select HAVE_ARCH_KGDB + select USE_GENERIC_SMP_HELPERS if SMP + select HAVE_ARCH_TRACEHOOK config GENERIC_TIME bool @@ -79,6 +83,10 @@ config GENERIC_HARDIRQS_NO__DO_IRQ bool def_bool y +source "init/Kconfig" + +menu "Processor type and features" + choice prompt "Kernel page size" default SPARC64_PAGE_SIZE_8KB @@ -91,19 +99,11 @@ config SPARC64_PAGE_SIZE_8KB 8KB and 64KB work quite well, since SPARC ELF sections provide for up to 64KB alignment. - Therefore, 512KB and 4MB are for expert hackers only. - If you don't know what to do, choose 8KB. config SPARC64_PAGE_SIZE_64KB bool "64KB" -config SPARC64_PAGE_SIZE_512KB - bool "512KB" - -config SPARC64_PAGE_SIZE_4MB - bool "4MB" - endchoice config SECCOMP @@ -134,14 +134,10 @@ config HOTPLUG_CPU can be controlled through /sys/devices/system/cpu/cpu#. Say N if you want to disable CPU hotplug. -source "init/Kconfig" - config GENERIC_HARDIRQS bool default y -menu "General machine setup" - source "kernel/time/Kconfig" config SMP @@ -223,11 +219,10 @@ config HUGETLB_PAGE_SIZE_4MB bool "4MB" config HUGETLB_PAGE_SIZE_512K - depends on !SPARC64_PAGE_SIZE_4MB && !SPARC64_PAGE_SIZE_512KB bool "512K" config HUGETLB_PAGE_SIZE_64K - depends on !SPARC64_PAGE_SIZE_4MB && !SPARC64_PAGE_SIZE_512KB && !SPARC64_PAGE_SIZE_64KB + depends on !SPARC64_PAGE_SIZE_64KB bool "64K" endchoice diff --git a/arch/sparc64/Kconfig.debug b/arch/sparc64/Kconfig.debug index 6a4d28a4076d0df87e637a3292a21fefcd8bd07a..d6d32d178fc8af2533939225caf2b7e6d8fef2b8 100644 --- a/arch/sparc64/Kconfig.debug +++ b/arch/sparc64/Kconfig.debug @@ -33,7 +33,7 @@ config DEBUG_PAGEALLOC config MCOUNT bool - depends on STACK_DEBUG + depends on STACK_DEBUG || FTRACE default y config FRAME_POINTER diff --git a/arch/sparc64/Makefile b/arch/sparc64/Makefile index 4b8f2b084c21f35ee0932f08836a9c0f7cda5164..b785a395b12f1d1793be9127898866cb6285e289 100644 --- a/arch/sparc64/Makefile +++ b/arch/sparc64/Makefile @@ -9,7 +9,9 @@ CHECKFLAGS += -D__sparc__ -D__sparc_v9__ -m64 -CPPFLAGS_vmlinux.lds += -Usparc +# Undefine sparc when processing vmlinux.lds - it is used +# And teach CPP we are doing 64 bit builds (for this case) +CPPFLAGS_vmlinux.lds += -m64 -Usparc LDFLAGS := -m elf64_sparc diff --git a/arch/sparc64/defconfig b/arch/sparc64/defconfig index 76eb832527f29b093dd1d3232bcf420aa51ded8c..82cab5cc8070f013bb491d8c1ccd46a756d991f9 100644 --- a/arch/sparc64/defconfig +++ b/arch/sparc64/defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.26-rc2 -# Fri May 16 13:36:07 2008 +# Linux kernel version: 2.6.26 +# Fri Jul 18 00:47:07 2008 # CONFIG_SPARC=y CONFIG_SPARC64=y @@ -22,18 +22,6 @@ CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_ARCH_NO_VIRT_TO_BUS=y CONFIG_OF=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_SPARC64_PAGE_SIZE_8KB=y -# CONFIG_SPARC64_PAGE_SIZE_64KB is not set -# CONFIG_SPARC64_PAGE_SIZE_512KB is not set -# CONFIG_SPARC64_PAGE_SIZE_4MB is not set -CONFIG_SECCOMP=y -CONFIG_HZ_100=y -# CONFIG_HZ_250 is not set -# CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=100 -# CONFIG_SCHED_HRTICK is not set -CONFIG_HOTPLUG_CPU=y CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # @@ -105,6 +93,7 @@ CONFIG_KRETPROBES=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y # CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_USE_GENERIC_SMP_HELPERS=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y @@ -121,6 +110,7 @@ CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y CONFIG_BLK_DEV_IO_TRACE=y CONFIG_BLK_DEV_BSG=y +# CONFIG_BLK_DEV_INTEGRITY is not set CONFIG_BLOCK_COMPAT=y # @@ -136,11 +126,21 @@ CONFIG_DEFAULT_AS=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="anticipatory" CONFIG_CLASSIC_RCU=y -CONFIG_GENERIC_HARDIRQS=y # -# General machine setup +# Processor type and features # +CONFIG_SPARC64_PAGE_SIZE_8KB=y +# CONFIG_SPARC64_PAGE_SIZE_64KB is not set +CONFIG_SECCOMP=y +CONFIG_HZ_100=y +# CONFIG_HZ_250 is not set +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=100 +# CONFIG_SCHED_HRTICK is not set +CONFIG_HOTPLUG_CPU=y +CONFIG_GENERIC_HARDIRQS=y CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y @@ -342,6 +342,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y # CONFIG_PREVENT_FIRMWARE_BUILD is not set CONFIG_FW_LOADER=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set @@ -366,6 +368,7 @@ CONFIG_CDROM_PKTCDVD_BUFFERS=8 CONFIG_CDROM_PKTCDVD_WCACHE=y CONFIG_ATA_OVER_ETH=m CONFIG_SUNVDC=m +# CONFIG_BLK_DEV_HD is not set CONFIG_MISC_DEVICES=y # CONFIG_PHANTOM is not set # CONFIG_EEPROM_93CX6 is not set @@ -379,6 +382,7 @@ CONFIG_BLK_DEV_IDE=y # # Please see Documentation/ide/ide.txt for help/info on IDE drives # +CONFIG_IDE_TIMINGS=y # CONFIG_BLK_DEV_IDE_SATA is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set @@ -429,8 +433,6 @@ CONFIG_BLK_DEV_ALI15X3=y # CONFIG_BLK_DEV_VIA82CXXX is not set # CONFIG_BLK_DEV_TC86C001 is not set CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_BLK_DEV_HD_ONLY is not set -# CONFIG_BLK_DEV_HD is not set # # SCSI device support @@ -504,6 +506,7 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_DEBUG is not set # CONFIG_SCSI_SUNESP is not set # CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_DH is not set # CONFIG_ATA is not set CONFIG_MD=y CONFIG_BLK_DEV_MD=m @@ -529,6 +532,10 @@ CONFIG_DM_ZERO=m # # IEEE 1394 (FireWire) support # + +# +# Enable only one of the two stacks, unless you know what you are doing +# # CONFIG_FIREWIRE is not set # CONFIG_IEEE1394 is not set # CONFIG_I2O is not set @@ -745,7 +752,8 @@ CONFIG_SERIAL_CORE_CONSOLE=y CONFIG_UNIX98_PTYS=y # CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set +CONFIG_HW_RANDOM=m +CONFIG_HW_RANDOM_N2RNG=m # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -759,38 +767,58 @@ CONFIG_I2C_ALGOBIT=y # # I2C Hardware Bus support # + +# +# PC SMBus host controller drivers +# # CONFIG_I2C_ALI1535 is not set # CONFIG_I2C_ALI1563 is not set # CONFIG_I2C_ALI15X3 is not set # CONFIG_I2C_AMD756 is not set # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_I801 is not set -# CONFIG_I2C_I810 is not set +# CONFIG_I2C_ISCH is not set # CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PROSAVAGE is not set -# CONFIG_I2C_SAVAGE4 is not set -# CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_SIS5595 is not set # CONFIG_I2C_SIS630 is not set # CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_TINY_USB is not set # CONFIG_I2C_VIA is not set # CONFIG_I2C_VIAPRO is not set + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_SIMTEC is not set + +# +# External I2C/SMBus adapter drivers +# +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_TINY_USB is not set + +# +# Graphics adapter I2C/DDC channel drivers +# # CONFIG_I2C_VOODOO3 is not set + +# +# Other I2C/SMBus bus drivers +# # CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_STUB is not set # # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set +# CONFIG_AT24 is not set # CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_MAX6875 is not set # CONFIG_SENSORS_TSL2550 is not set @@ -856,6 +884,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_W83627EHF is not set # CONFIG_HWMON_DEBUG_CHIP is not set # CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set # @@ -985,15 +1014,7 @@ CONFIG_LOGO=y # CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set CONFIG_LOGO_SUN_CLUT224=y - -# -# Sound -# CONFIG_SOUND=m - -# -# Advanced Linux Sound Architecture -# CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -1010,21 +1031,17 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set - -# -# Generic devices -# +CONFIG_SND_VMASTER=y CONFIG_SND_MPU401_UART=m CONFIG_SND_AC97_CODEC=m +CONFIG_SND_DRIVERS=y CONFIG_SND_DUMMY=m CONFIG_SND_VIRMIDI=m CONFIG_SND_MTPAV=m # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set - -# -# PCI devices -# +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set # CONFIG_SND_ALS300 is not set CONFIG_SND_ALI5451=m @@ -1084,37 +1101,14 @@ CONFIG_SND_ALI5451=m # CONFIG_SND_VIRTUOSO is not set # CONFIG_SND_VX222 is not set # CONFIG_SND_YMFPCI is not set -# CONFIG_SND_AC97_POWER_SAVE is not set - -# -# USB devices -# +CONFIG_SND_USB=y # CONFIG_SND_USB_AUDIO is not set # CONFIG_SND_USB_CAIAQ is not set - -# -# ALSA Sparc devices -# +CONFIG_SND_SPARC=y # CONFIG_SND_SUN_AMD7930 is not set CONFIG_SND_SUN_CS4231=m # CONFIG_SND_SUN_DBRI is not set - -# -# System on Chip audio support -# # CONFIG_SND_SOC is not set - -# -# ALSA SoC audio for Freescale SOCs -# - -# -# SoC Audio for the Texas Instruments OMAP -# - -# -# Open Sound System -# # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m CONFIG_HID_SUPPORT=y @@ -1167,6 +1161,7 @@ CONFIG_USB_UHCI_HCD=m # # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set +# CONFIG_USB_WDM is not set # # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' @@ -1226,6 +1221,7 @@ CONFIG_USB_STORAGE=m # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_GADGET is not set # CONFIG_MMC is not set # CONFIG_MEMSTICK is not set @@ -1420,6 +1416,12 @@ CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set +# CONFIG_IRQSOFF_TRACER is not set +# CONFIG_SCHED_TRACER is not set +# CONFIG_CONTEXT_SWITCH_TRACER is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set @@ -1486,6 +1488,10 @@ CONFIG_CRYPTO_CRC32C=m CONFIG_CRYPTO_MD4=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=m +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m @@ -1527,6 +1533,7 @@ CONFIG_BITREVERSE=y # CONFIG_GENERIC_FIND_FIRST_BIT is not set CONFIG_CRC_CCITT=m CONFIG_CRC16=m +# CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set diff --git a/arch/sparc64/kernel/Makefile b/arch/sparc64/kernel/Makefile index ec4f5ebb1ca669e72048317fe623c12d30b281d2..418b5782096ec709eda315ceb79f5575d50059a6 100644 --- a/arch/sparc64/kernel/Makefile +++ b/arch/sparc64/kernel/Makefile @@ -14,6 +14,7 @@ obj-y := process.o setup.o cpu.o idprom.o \ power.o sbus.o sparc64_ksyms.o chmc.o \ visemul.o prom.o of_device.o hvapi.o sstate.o mdesc.o +obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_PCI) += ebus.o pci_common.o \ pci_psycho.o pci_sabre.o pci_schizo.o \ diff --git a/arch/sparc64/kernel/central.c b/arch/sparc64/kernel/central.c index b61b8dfb09cfc6db9581bb1533d90ff00e813809..f2e87d0d7e1d7ab2c17020443d39b09dc9de193c 100644 --- a/arch/sparc64/kernel/central.c +++ b/arch/sparc64/kernel/central.c @@ -16,8 +16,8 @@ #include #include -struct linux_central *central_bus = NULL; -struct linux_fhc *fhc_list = NULL; +static struct linux_central *central_bus = NULL; +static struct linux_fhc *fhc_list = NULL; #define IS_CENTRAL_FHC(__fhc) ((__fhc) == central_bus->child) @@ -79,9 +79,9 @@ static void adjust_regs(struct linux_prom_registers *regp, int nregs, } /* Apply probed fhc ranges to registers passed, if no ranges return. */ -void apply_fhc_ranges(struct linux_fhc *fhc, - struct linux_prom_registers *regs, - int nregs) +static void apply_fhc_ranges(struct linux_fhc *fhc, + struct linux_prom_registers *regs, + int nregs) { if (fhc->num_fhc_ranges) adjust_regs(regs, nregs, fhc->fhc_ranges, @@ -89,8 +89,8 @@ void apply_fhc_ranges(struct linux_fhc *fhc, } /* Apply probed central ranges to registers passed, if no ranges return. */ -void apply_central_ranges(struct linux_central *central, - struct linux_prom_registers *regs, int nregs) +static void apply_central_ranges(struct linux_central *central, + struct linux_prom_registers *regs, int nregs) { if (central->num_central_ranges) adjust_regs(regs, nregs, central->central_ranges, diff --git a/arch/sparc64/kernel/compat_audit.c b/arch/sparc64/kernel/compat_audit.c index c1979482aa929bbf85db4a97ca7138365b35bda6..c831b0a4e660b69d1221230a2d5460db62459fef 100644 --- a/arch/sparc64/kernel/compat_audit.c +++ b/arch/sparc64/kernel/compat_audit.c @@ -1,4 +1,4 @@ -#include +#include unsigned sparc32_dir_class[] = { #include diff --git a/arch/sparc64/kernel/ds.c b/arch/sparc64/kernel/ds.c index edb74f5a1186ebd82f973378e961de4a7e64d7fe..d0fa5aa389341cf3020b40180f86c696b22600fd 100644 --- a/arch/sparc64/kernel/ds.c +++ b/arch/sparc64/kernel/ds.c @@ -159,7 +159,7 @@ static void ds_var_data(struct ds_info *dp, struct ds_cap_state *cp, void *buf, int len); -struct ds_cap_state ds_states_template[] = { +static struct ds_cap_state ds_states_template[] = { { .service_id = "md-update", .data = md_update_data, diff --git a/arch/sparc64/kernel/ebus.c b/arch/sparc64/kernel/ebus.c index c49d0388b793852af4bf1ce99ac2d20868e6e3fc..4d58d7ce708dc87206d1f0602e334c54d72c6260 100644 --- a/arch/sparc64/kernel/ebus.c +++ b/arch/sparc64/kernel/ebus.c @@ -401,7 +401,7 @@ static void __init fill_ebus_device(struct device_node *dp, struct linux_ebus_de dev->ofdev.node = dp; dev->ofdev.dev.parent = &dev->bus->ofdev.dev; dev->ofdev.dev.bus = &ebus_bus_type; - sprintf(dev->ofdev.dev.bus_id, "ebus[%08x]", dp->node); + dev_set_name(&dev->ofdev.dev, "ebus[%08x]", dp->node); /* Register with core */ if (of_device_register(&dev->ofdev) != 0) @@ -501,7 +501,7 @@ void __init ebus_init(void) ebus->ofdev.node = dp; ebus->ofdev.dev.parent = &pdev->dev; ebus->ofdev.dev.bus = &ebus_bus_type; - sprintf(ebus->ofdev.dev.bus_id, "ebus%d", num_ebus); + dev_set_name(&ebus->ofdev.dev, "ebus%d", num_ebus); /* Register with core */ if (of_device_register(&ebus->ofdev) != 0) diff --git a/arch/sparc64/kernel/entry.h b/arch/sparc64/kernel/entry.h index 32fbab620852063dbe525bf3e9e32720af8b2323..fc294a292899ee383906e5040e2509907776527e 100644 --- a/arch/sparc64/kernel/entry.h +++ b/arch/sparc64/kernel/entry.h @@ -22,8 +22,7 @@ extern void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long thread_info_flags); -extern asmlinkage void syscall_trace(struct pt_regs *regs, - int syscall_exit_p); +extern asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p); extern void bad_trap_tl1(struct pt_regs *regs, long lvl); diff --git a/arch/sparc64/kernel/ftrace.c b/arch/sparc64/kernel/ftrace.c new file mode 100644 index 0000000000000000000000000000000000000000..4298d0aee7137caf896c6e20605620b1b58b0124 --- /dev/null +++ b/arch/sparc64/kernel/ftrace.c @@ -0,0 +1,94 @@ +#include +#include +#include +#include +#include +#include + +#include + +static const u32 ftrace_nop = 0x01000000; + +notrace unsigned char *ftrace_nop_replace(void) +{ + return (char *)&ftrace_nop; +} + +notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) +{ + static u32 call; + s32 off; + + off = ((s32)addr - (s32)ip); + call = 0x40000000 | ((u32)off >> 2); + + return (unsigned char *) &call; +} + +notrace int +ftrace_modify_code(unsigned long ip, unsigned char *old_code, + unsigned char *new_code) +{ + u32 old = *(u32 *)old_code; + u32 new = *(u32 *)new_code; + u32 replaced; + int faulted; + + __asm__ __volatile__( + "1: cas [%[ip]], %[old], %[new]\n" + " flush %[ip]\n" + " mov 0, %[faulted]\n" + "2:\n" + " .section .fixup,#alloc,#execinstr\n" + " .align 4\n" + "3: sethi %%hi(2b), %[faulted]\n" + " jmpl %[faulted] + %%lo(2b), %%g0\n" + " mov 1, %[faulted]\n" + " .previous\n" + " .section __ex_table,\"a\"\n" + " .align 4\n" + " .word 1b, 3b\n" + " .previous\n" + : "=r" (replaced), [faulted] "=r" (faulted) + : [new] "0" (new), [old] "r" (old), [ip] "r" (ip) + : "memory"); + + if (replaced != old && replaced != new) + faulted = 2; + + return faulted; +} + +notrace int ftrace_update_ftrace_func(ftrace_func_t func) +{ + unsigned long ip = (unsigned long)(&ftrace_call); + unsigned char old[MCOUNT_INSN_SIZE], *new; + + memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, (unsigned long)func); + return ftrace_modify_code(ip, old, new); +} + +notrace int ftrace_mcount_set(unsigned long *data) +{ + unsigned long ip = (long)(&mcount_call); + unsigned long *addr = data; + unsigned char old[MCOUNT_INSN_SIZE], *new; + + /* + * Replace the mcount stub with a pointer to the + * ip recorder function. + */ + memcpy(old, &mcount_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, *addr); + *addr = ftrace_modify_code(ip, old, new); + + return 0; +} + + +int __init ftrace_dyn_arch_init(void *data) +{ + ftrace_mcount_set(data); + return 0; +} diff --git a/arch/sparc64/kernel/hvapi.c b/arch/sparc64/kernel/hvapi.c index f34f5d6181eff1af2dbd4197cf5ad9eeaae11996..691760b5b0127e5143da2bfa4056ac63e86ba238 100644 --- a/arch/sparc64/kernel/hvapi.c +++ b/arch/sparc64/kernel/hvapi.c @@ -34,8 +34,12 @@ static struct api_info api_table[] = { { .group = HV_GRP_LDOM, }, { .group = HV_GRP_SVC_CHAN, .flags = FLAG_PRE_API }, { .group = HV_GRP_NCS, .flags = FLAG_PRE_API }, + { .group = HV_GRP_RNG, }, { .group = HV_GRP_NIAG_PERF, .flags = FLAG_PRE_API }, { .group = HV_GRP_FIRE_PERF, }, + { .group = HV_GRP_N2_CPU, }, + { .group = HV_GRP_NIU, }, + { .group = HV_GRP_VF_CPU, }, { .group = HV_GRP_DIAG, .flags = FLAG_PRE_API }, }; diff --git a/arch/sparc64/kernel/iommu_common.h b/arch/sparc64/kernel/iommu_common.h index f3575a614fa2e643dbcc5f93e3e2e03f26e77e2e..53b19c8231a931ee1ab2f1a863e62053026ac748 100644 --- a/arch/sparc64/kernel/iommu_common.h +++ b/arch/sparc64/kernel/iommu_common.h @@ -23,7 +23,7 @@ #define IO_PAGE_SHIFT 13 #define IO_PAGE_SIZE (1UL << IO_PAGE_SHIFT) #define IO_PAGE_MASK (~(IO_PAGE_SIZE-1)) -#define IO_PAGE_ALIGN(addr) (((addr)+IO_PAGE_SIZE-1)&IO_PAGE_MASK) +#define IO_PAGE_ALIGN(addr) ALIGN(addr, IO_PAGE_SIZE) #define IO_TSB_ENTRIES (128*1024) #define IO_TSB_SIZE (IO_TSB_ENTRIES * 8) diff --git a/arch/sparc64/kernel/irq.c b/arch/sparc64/kernel/irq.c index b441a26b73b03ab514aa772609c92e8a179d2e12..c481673d249cb485dc1ceca3c02a073ebfc2aacc 100644 --- a/arch/sparc64/kernel/irq.c +++ b/arch/sparc64/kernel/irq.c @@ -621,8 +621,9 @@ unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino) unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) { struct irq_handler_data *data; - struct ino_bucket *bucket; unsigned long hv_err, cookie; + struct ino_bucket *bucket; + struct irq_desc *desc; unsigned int virt_irq; bucket = kzalloc(sizeof(struct ino_bucket), GFP_ATOMIC); @@ -643,6 +644,13 @@ unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino) if (unlikely(!data)) return 0; + /* In order to make the LDC channel startup sequence easier, + * especially wrt. locking, we do not let request_irq() enable + * the interrupt. + */ + desc = irq_desc + virt_irq; + desc->status |= IRQ_NOAUTOEN; + set_irq_chip_data(virt_irq, data); /* Catch accidental accesses to these things. IMAP/ICLR handling diff --git a/arch/sparc64/kernel/kprobes.c b/arch/sparc64/kernel/kprobes.c index f43b5d7553545ab8dcf7ec3900f9ba9100602591..201a6e547e4aa0d256d062d251525c30ca49ea8f 100644 --- a/arch/sparc64/kernel/kprobes.c +++ b/arch/sparc64/kernel/kprobes.c @@ -478,9 +478,9 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) return 0; } -/* Called with kretprobe_lock held. The value stored in the return - * address register is actually 2 instructions before where the - * callee will return to. Sequences usually look something like this +/* The value stored in the return address register is actually 2 + * instructions before where the callee will return to. + * Sequences usually look something like this * * call some_function <--- return register points here * nop <--- call delay slot @@ -512,8 +512,7 @@ int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs) unsigned long trampoline_address =(unsigned long)&kretprobe_trampoline; INIT_HLIST_HEAD(&empty_rp); - spin_lock_irqsave(&kretprobe_lock, flags); - head = kretprobe_inst_table_head(current); + kretprobe_hash_lock(current, &head, &flags); /* * It is possible to have multiple instances associated with a given @@ -553,7 +552,7 @@ int __kprobes trampoline_probe_handler(struct kprobe *p, struct pt_regs *regs) regs->tnpc = orig_ret_address + 4; reset_current_kprobe(); - spin_unlock_irqrestore(&kretprobe_lock, flags); + kretprobe_hash_unlock(current, &flags); preempt_enable_no_resched(); hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { diff --git a/arch/sparc64/kernel/ldc.c b/arch/sparc64/kernel/ldc.c index 63969f6102847b75ca033f500ff3e277fa9488fd..d68982330f66f7ed2da259232b5134bd3da5531d 100644 --- a/arch/sparc64/kernel/ldc.c +++ b/arch/sparc64/kernel/ldc.c @@ -1,6 +1,6 @@ /* ldc.c: Logical Domain Channel link-layer protocol driver. * - * Copyright (C) 2007 David S. Miller + * Copyright (C) 2007, 2008 David S. Miller */ #include @@ -23,8 +23,8 @@ #define DRV_MODULE_NAME "ldc" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "1.0" -#define DRV_MODULE_RELDATE "June 25, 2007" +#define DRV_MODULE_VERSION "1.1" +#define DRV_MODULE_RELDATE "July 22, 2008" static char version[] __devinitdata = DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n"; @@ -1235,13 +1235,9 @@ int ldc_bind(struct ldc_channel *lp, const char *name) unsigned long hv_err, flags; int err = -EINVAL; - spin_lock_irqsave(&lp->lock, flags); - - if (!name) - goto out_err; - - if (lp->state != LDC_STATE_INIT) - goto out_err; + if (!name || + (lp->state != LDC_STATE_INIT)) + return -EINVAL; snprintf(lp->rx_irq_name, LDC_IRQ_NAME_MAX, "%s RX", name); snprintf(lp->tx_irq_name, LDC_IRQ_NAME_MAX, "%s TX", name); @@ -1250,25 +1246,32 @@ int ldc_bind(struct ldc_channel *lp, const char *name) IRQF_SAMPLE_RANDOM | IRQF_SHARED, lp->rx_irq_name, lp); if (err) - goto out_err; + return err; err = request_irq(lp->cfg.tx_irq, ldc_tx, IRQF_SAMPLE_RANDOM | IRQF_SHARED, lp->tx_irq_name, lp); - if (err) - goto out_free_rx_irq; + if (err) { + free_irq(lp->cfg.rx_irq, lp); + return err; + } + + spin_lock_irqsave(&lp->lock, flags); + + enable_irq(lp->cfg.rx_irq); + enable_irq(lp->cfg.tx_irq); lp->flags |= LDC_FLAG_REGISTERED_IRQS; err = -ENODEV; hv_err = sun4v_ldc_tx_qconf(lp->id, 0, 0); if (hv_err) - goto out_free_tx_irq; + goto out_free_irqs; hv_err = sun4v_ldc_tx_qconf(lp->id, lp->tx_ra, lp->tx_num_entries); if (hv_err) - goto out_free_tx_irq; + goto out_free_irqs; hv_err = sun4v_ldc_rx_qconf(lp->id, 0, 0); if (hv_err) @@ -1304,14 +1307,11 @@ out_unmap_rx: out_unmap_tx: sun4v_ldc_tx_qconf(lp->id, 0, 0); -out_free_tx_irq: +out_free_irqs: lp->flags &= ~LDC_FLAG_REGISTERED_IRQS; free_irq(lp->cfg.tx_irq, lp); - -out_free_rx_irq: free_irq(lp->cfg.rx_irq, lp); -out_err: spin_unlock_irqrestore(&lp->lock, flags); return err; diff --git a/arch/sparc64/kernel/of_device.c b/arch/sparc64/kernel/of_device.c index d569f60c24b87fd4fc23d6e749fc37d083bb22a3..4fd48ab7dda40bef2a290e08cb07558122b3be35 100644 --- a/arch/sparc64/kernel/of_device.c +++ b/arch/sparc64/kernel/of_device.c @@ -797,9 +797,9 @@ static struct of_device * __init scan_one_device(struct device_node *dp, op->dev.parent = parent; op->dev.bus = &of_platform_bus_type; if (!parent) - strcpy(op->dev.bus_id, "root"); + dev_set_name(&op->dev, "root"); else - sprintf(op->dev.bus_id, "%08x", dp->node); + dev_set_name(&op->dev, "%08x", dp->node); if (of_device_register(op)) { printk("%s: Could not register of device.\n", diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c index 112b09f16f367ffe788e2623a91debb118454c16..55096195458fa0d358364075c5c7f06617112a55 100644 --- a/arch/sparc64/kernel/pci.c +++ b/arch/sparc64/kernel/pci.c @@ -408,7 +408,7 @@ struct pci_dev *of_create_pci_dev(struct pci_pbm_info *pbm, dev->class = class >> 8; dev->revision = class & 0xff; - sprintf(pci_name(dev), "%04x:%02x:%02x.%d", pci_domain_nr(bus), + dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus), dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); if (ofpci_verbose) diff --git a/arch/sparc64/kernel/pci_msi.c b/arch/sparc64/kernel/pci_msi.c index db5e8fd8f6742281bea1a643f46eefb317551ae5..60c71e35021253fde9a38501e3e61b5de0b9f0d8 100644 --- a/arch/sparc64/kernel/pci_msi.c +++ b/arch/sparc64/kernel/pci_msi.c @@ -120,9 +120,9 @@ static struct irq_chip msi_irq = { /* XXX affinity XXX */ }; -int sparc64_setup_msi_irq(unsigned int *virt_irq_p, - struct pci_dev *pdev, - struct msi_desc *entry) +static int sparc64_setup_msi_irq(unsigned int *virt_irq_p, + struct pci_dev *pdev, + struct msi_desc *entry) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; const struct sparc64_msiq_ops *ops = pbm->msi_ops; @@ -179,8 +179,8 @@ out_err: return err; } -void sparc64_teardown_msi_irq(unsigned int virt_irq, - struct pci_dev *pdev) +static void sparc64_teardown_msi_irq(unsigned int virt_irq, + struct pci_dev *pdev) { struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller; const struct sparc64_msiq_ops *ops = pbm->msi_ops; diff --git a/arch/sparc64/kernel/pci_sun4v.c b/arch/sparc64/kernel/pci_sun4v.c index e2bb9790039c5b47f9e6b85a8bd35f387665d7ce..a104c80d319debf8a76c3d658b12fea47cd39d91 100644 --- a/arch/sparc64/kernel/pci_sun4v.c +++ b/arch/sparc64/kernel/pci_sun4v.c @@ -531,7 +531,7 @@ static void dma_4v_sync_sg_for_cpu(struct device *dev, /* Nothing to do... */ } -const struct dma_ops sun4v_dma_ops = { +static const struct dma_ops sun4v_dma_ops = { .alloc_coherent = dma_4v_alloc_coherent, .free_coherent = dma_4v_free_coherent, .map_single = dma_4v_map_single, diff --git a/arch/sparc64/kernel/process.c b/arch/sparc64/kernel/process.c index 2084f81a76e1d49319af047470f9348977d9968e..8a9cd3e165b9af46818a107b62470554ce8c80a7 100644 --- a/arch/sparc64/kernel/process.c +++ b/arch/sparc64/kernel/process.c @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -97,7 +96,7 @@ void cpu_idle(void) set_thread_flag(TIF_POLLING_NRFLAG); while(1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched() && !cpu_is_offline(cpu)) sparc64_yield(cpu); @@ -211,7 +210,7 @@ static void show_regwindow(struct pt_regs *regs) printk("i4: %016lx i5: %016lx i6: %016lx i7: %016lx\n", rwk->ins[4], rwk->ins[5], rwk->ins[6], rwk->ins[7]); if (regs->tstate & TSTATE_PRIV) - print_symbol("I7: <%s>\n", rwk->ins[7]); + printk("I7: <%pS>\n", (void *) rwk->ins[7]); } #ifdef CONFIG_SMP @@ -232,7 +231,7 @@ void __show_regs(struct pt_regs * regs) #endif printk("TSTATE: %016lx TPC: %016lx TNPC: %016lx Y: %08x %s\n", regs->tstate, regs->tpc, regs->tnpc, regs->y, print_tainted()); - print_symbol("TPC: <%s>\n", regs->tpc); + printk("TPC: <%pS>\n", (void *) regs->tpc); printk("g0: %016lx g1: %016lx g2: %016lx g3: %016lx\n", regs->u_regs[0], regs->u_regs[1], regs->u_regs[2], regs->u_regs[3]); @@ -245,7 +244,7 @@ void __show_regs(struct pt_regs * regs) printk("o4: %016lx o5: %016lx sp: %016lx ret_pc: %016lx\n", regs->u_regs[12], regs->u_regs[13], regs->u_regs[14], regs->u_regs[15]); - print_symbol("RPC: <%s>\n", regs->u_regs[15]); + printk("RPC: <%pS>\n", (void *) regs->u_regs[15]); show_regwindow(regs); #ifdef CONFIG_SMP spin_unlock(®dump_lock); @@ -346,9 +345,6 @@ static void sysrq_handle_globreg(int key, struct tty_struct *tty) { struct thread_info *tp = current_thread_info(); struct pt_regs *regs = get_irq_regs(); -#ifdef CONFIG_KALLSYMS - char buffer[KSYM_SYMBOL_LEN]; -#endif unsigned long flags; int this_cpu, cpu; @@ -377,17 +373,13 @@ static void sysrq_handle_globreg(int key, struct tty_struct *tty) gp->tstate, gp->tpc, gp->tnpc, ((tp && tp->task) ? tp->task->comm : "NULL"), ((tp && tp->task) ? tp->task->pid : -1)); -#ifdef CONFIG_KALLSYMS + if (gp->tstate & TSTATE_PRIV) { - sprint_symbol(buffer, gp->tpc); - printk(" TPC[%s] ", buffer); - sprint_symbol(buffer, gp->o7); - printk("O7[%s] ", buffer); - sprint_symbol(buffer, gp->i7); - printk("I7[%s]\n", buffer); - } else -#endif - { + printk(" TPC[%pS] O7[%pS] I7[%pS]\n", + (void *) gp->tpc, + (void *) gp->o7, + (void *) gp->i7); + } else { printk(" TPC[%lx] O7[%lx] I7[%lx]\n", gp->tpc, gp->o7, gp->i7); } @@ -691,9 +683,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp, ((unsigned long) child_sf) - STACK_BIAS; /* Special case, if we are spawning a kernel thread from - * a userspace task (via KMOD, NFS, or similar) we must - * disable performance counters in the child because the - * address space and protection realm are changing. + * a userspace task (usermode helper, NFS or similar), we + * must disable performance counters in the child because + * the address space and protection realm are changing. */ if (t->flags & _TIF_PERFCTR) { t->user_cntd0 = t->user_cntd1 = NULL; diff --git a/arch/sparc64/kernel/ptrace.c b/arch/sparc64/kernel/ptrace.c index f6c9fc92921d4405693f6f23ab2817bdee3993fa..bd578cc4856d6de60ed4e3ba54cec2874b32480c 100644 --- a/arch/sparc64/kernel/ptrace.c +++ b/arch/sparc64/kernel/ptrace.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -1049,8 +1050,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -asmlinkage void syscall_trace(struct pt_regs *regs, int syscall_exit_p) +asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p) { + int ret = 0; + /* do the secure computing check first */ secure_computing(regs->u_regs[UREG_G1]); @@ -1064,27 +1067,14 @@ asmlinkage void syscall_trace(struct pt_regs *regs, int syscall_exit_p) audit_syscall_exit(result, regs->u_regs[UREG_I0]); } - if (!(current->ptrace & PT_PTRACED)) - goto out; - - if (!test_thread_flag(TIF_SYSCALL_TRACE)) - goto out; - - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; + if (test_thread_flag(TIF_SYSCALL_TRACE)) { + if (syscall_exit_p) + tracehook_report_syscall_exit(regs, 0); + else + ret = tracehook_report_syscall_entry(regs); } -out: - if (unlikely(current->audit_context) && !syscall_exit_p) + if (unlikely(current->audit_context) && !syscall_exit_p && !ret) audit_syscall_entry((test_thread_flag(TIF_32BIT) ? AUDIT_ARCH_SPARC : AUDIT_ARCH_SPARC64), @@ -1093,4 +1083,6 @@ out: regs->u_regs[UREG_I1], regs->u_regs[UREG_I2], regs->u_regs[UREG_I3]); + + return ret; } diff --git a/arch/sparc64/kernel/rtrap.S b/arch/sparc64/kernel/rtrap.S index c6fc695fe1fe79fb7c695a3d2f51069e031c10b5..97a993c1f7f31bd62e7b310b08077b084622adff 100644 --- a/arch/sparc64/kernel/rtrap.S +++ b/arch/sparc64/kernel/rtrap.S @@ -46,7 +46,7 @@ __handle_user_windows: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate ldx [%g6 + TI_FLAGS], %l0 -1: andcc %l0, _TIF_SIGPENDING, %g0 +1: andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 be,pt %xcc, __handle_user_windows_continue nop mov %l5, %o1 @@ -86,7 +86,7 @@ __handle_perfctrs: wrpr %g0, RTRAP_PSTATE, %pstate wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate ldx [%g6 + TI_FLAGS], %l0 -1: andcc %l0, _TIF_SIGPENDING, %g0 +1: andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 be,pt %xcc, __handle_perfctrs_continue sethi %hi(TSTATE_PEF), %o0 @@ -195,7 +195,7 @@ __handle_preemption_continue: andcc %l1, %o0, %g0 andcc %l0, _TIF_NEED_RESCHED, %g0 bne,pn %xcc, __handle_preemption - andcc %l0, _TIF_SIGPENDING, %g0 + andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 bne,pn %xcc, __handle_signal __handle_signal_continue: ldub [%g6 + TI_WSAVED], %o2 diff --git a/arch/sparc64/kernel/signal.c b/arch/sparc64/kernel/signal.c index 9667e96fd5138ba3531f507d8292483e40242a80..d1b84456a9eef969d6be3013432ccf1583631971 100644 --- a/arch/sparc64/kernel/signal.c +++ b/arch/sparc64/kernel/signal.c @@ -17,11 +17,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include @@ -574,6 +576,8 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) * clear the TS_RESTORE_SIGMASK flag. */ current_thread_info()->status &= ~TS_RESTORE_SIGMASK; + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && @@ -605,4 +609,8 @@ void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, unsigned long { if (thread_info_flags & _TIF_SIGPENDING) do_signal(regs, orig_i0); + if (thread_info_flags & _TIF_NOTIFY_RESUME) { + clear_thread_flag(TIF_NOTIFY_RESUME); + tracehook_notify_resume(regs); + } } diff --git a/arch/sparc64/kernel/signal32.c b/arch/sparc64/kernel/signal32.c index 97cdd1bf4a100201a60a77de7f40ab37e5fb27e8..ba5b09ad6666397a953af76945205961868edb29 100644 --- a/arch/sparc64/kernel/signal32.c +++ b/arch/sparc64/kernel/signal32.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -794,6 +795,8 @@ void do_signal32(sigset_t *oldset, struct pt_regs * regs, * clear the TS_RESTORE_SIGMASK flag. */ current_thread_info()->status &= ~TS_RESTORE_SIGMASK; + + tracehook_signal_handler(signr, &info, &ka, regs, 0); return; } if (restart_syscall && diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index fa63c68a181941736a7809553d41538a1c5ab074..7cf72b4bb1089498348be341ee02a840161a1af3 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c @@ -788,92 +788,36 @@ static void smp_start_sync_tick_client(int cpu) 0, 0, 0, mask); } -/* Send cross call to all processors except self. */ -#define smp_cross_call(func, ctx, data1, data2) \ - smp_cross_call_masked(func, ctx, data1, data2, cpu_online_map) - -struct call_data_struct { - void (*func) (void *info); - void *info; - atomic_t finished; - int wait; -}; - -static struct call_data_struct *call_data; - extern unsigned long xcall_call_function; -/** - * smp_call_function(): Run a function on all other CPUs. - * @func: The function to run. This must be fast and non-blocking. - * @info: An arbitrary pointer to pass to the function. - * @nonatomic: currently unused. - * @wait: If true, wait (atomically) until function has completed on other CPUs. - * - * Returns 0 on success, else a negative status code. Does not return until - * remote CPUs are nearly ready to execute <> or are or have executed. - * - * You must not call this function with disabled interrupts or from a - * hardware interrupt handler or from a bottom half handler. - */ -static int smp_call_function_mask(void (*func)(void *info), void *info, - int nonatomic, int wait, cpumask_t mask) +void arch_send_call_function_ipi(cpumask_t mask) { - struct call_data_struct data; - int cpus; - - /* Can deadlock when called with interrupts disabled */ - WARN_ON(irqs_disabled()); - - data.func = func; - data.info = info; - atomic_set(&data.finished, 0); - data.wait = wait; - - spin_lock(&call_lock); - - cpu_clear(smp_processor_id(), mask); - cpus = cpus_weight(mask); - if (!cpus) - goto out_unlock; - - call_data = &data; - mb(); - smp_cross_call_masked(&xcall_call_function, 0, 0, 0, mask); +} - /* Wait for response */ - while (atomic_read(&data.finished) != cpus) - cpu_relax(); +extern unsigned long xcall_call_function_single; -out_unlock: - spin_unlock(&call_lock); +void arch_send_call_function_single_ipi(int cpu) +{ + cpumask_t mask = cpumask_of_cpu(cpu); - return 0; + smp_cross_call_masked(&xcall_call_function_single, 0, 0, 0, mask); } -int smp_call_function(void (*func)(void *info), void *info, - int nonatomic, int wait) -{ - return smp_call_function_mask(func, info, nonatomic, wait, - cpu_online_map); -} +/* Send cross call to all processors except self. */ +#define smp_cross_call(func, ctx, data1, data2) \ + smp_cross_call_masked(func, ctx, data1, data2, cpu_online_map) void smp_call_function_client(int irq, struct pt_regs *regs) { - void (*func) (void *info) = call_data->func; - void *info = call_data->info; + clear_softint(1 << irq); + generic_smp_call_function_interrupt(); +} +void smp_call_function_single_client(int irq, struct pt_regs *regs) +{ clear_softint(1 << irq); - if (call_data->wait) { - /* let initiator proceed only after completion */ - func(info); - atomic_inc(&call_data->finished); - } else { - /* let initiator proceed after getting data */ - atomic_inc(&call_data->finished); - func(info); - } + generic_smp_call_function_single_interrupt(); } static void tsb_sync(void *info) @@ -893,7 +837,7 @@ static void tsb_sync(void *info) void smp_tsb_sync(struct mm_struct *mm) { - smp_call_function_mask(tsb_sync, mm, 0, 1, mm->cpu_vm_mask); + smp_call_function_mask(mm->cpu_vm_mask, tsb_sync, mm, 1); } extern unsigned long xcall_flush_tlb_mm; diff --git a/arch/sparc64/kernel/sparc64_ksyms.c b/arch/sparc64/kernel/sparc64_ksyms.c index 8ac0b99f2c5563bad603edd5628794f1bdf5a898..504e678ee128e3998af12688e0678aa4568204a1 100644 --- a/arch/sparc64/kernel/sparc64_ksyms.c +++ b/arch/sparc64/kernel/sparc64_ksyms.c @@ -53,6 +53,7 @@ #include #include #include +#include struct poll { int fd; @@ -107,12 +108,9 @@ EXPORT_SYMBOL(__read_unlock); EXPORT_SYMBOL(__write_lock); EXPORT_SYMBOL(__write_unlock); EXPORT_SYMBOL(__write_trylock); - -EXPORT_SYMBOL(smp_call_function); #endif /* CONFIG_SMP */ -#if defined(CONFIG_MCOUNT) -extern void _mcount(void); +#ifdef CONFIG_MCOUNT EXPORT_SYMBOL(_mcount); #endif diff --git a/arch/sparc64/kernel/stacktrace.c b/arch/sparc64/kernel/stacktrace.c index c73ce3f4197e67097da288e381dc134203036ec0..b3e3737750d8bfb49701a862a6c57a821303fc18 100644 --- a/arch/sparc64/kernel/stacktrace.c +++ b/arch/sparc64/kernel/stacktrace.c @@ -1,6 +1,7 @@ #include #include #include +#include #include #include @@ -47,3 +48,4 @@ void save_stack_trace(struct stack_trace *trace) trace->entries[trace->nr_entries++] = pc; } while (trace->nr_entries < trace->max_entries); } +EXPORT_SYMBOL_GPL(save_stack_trace); diff --git a/arch/sparc64/kernel/sys_sparc.c b/arch/sparc64/kernel/sys_sparc.c index ac1bff58c1ac8319eb0178e0980eeda35dfb1a32..39749e32dc7e74ced52506ea3e90381c41d5f048 100644 --- a/arch/sparc64/kernel/sys_sparc.c +++ b/arch/sparc64/kernel/sys_sparc.c @@ -418,7 +418,7 @@ asmlinkage long sparc_pipe(struct pt_regs *regs) int fd[2]; int error; - error = do_pipe(fd); + error = do_pipe_flags(fd, 0); if (error) goto out; regs->u_regs[UREG_I1] = fd[1]; @@ -542,7 +542,7 @@ asmlinkage long sparc64_personality(unsigned long personality) return ret; } -int sparc64_mmap_check(unsigned long addr, unsigned long len) +int sparc_mmap_check(unsigned long addr, unsigned long len) { if (test_thread_flag(TIF_32BIT)) { if (len >= STACK_TOP32) @@ -614,9 +614,9 @@ asmlinkage unsigned long sys64_mremap(unsigned long addr, goto out; if (unlikely(new_len >= VA_EXCLUDE_START)) goto out; - if (unlikely(sparc64_mmap_check(addr, old_len))) + if (unlikely(sparc_mmap_check(addr, old_len))) goto out; - if (unlikely(sparc64_mmap_check(new_addr, new_len))) + if (unlikely(sparc_mmap_check(new_addr, new_len))) goto out; down_write(¤t->mm->mmap_sem); diff --git a/arch/sparc64/kernel/sys_sparc32.c b/arch/sparc64/kernel/sys_sparc32.c index ba5bd626b39e39a263a2aec0a1b6939ea0d70c94..97b77fb5c50e8d127750bfd4dd8c5c917f137c35 100644 --- a/arch/sparc64/kernel/sys_sparc32.c +++ b/arch/sparc64/kernel/sys_sparc32.c @@ -359,7 +359,8 @@ int cp_compat_stat(struct kstat *stat, struct compat_stat __user *statbuf) return err; } -int cp_compat_stat64(struct kstat *stat, struct compat_stat64 __user *statbuf) +static int cp_compat_stat64(struct kstat *stat, + struct compat_stat64 __user *statbuf) { int err; @@ -870,9 +871,9 @@ asmlinkage unsigned long sys32_mremap(unsigned long addr, unsigned long ret = -EINVAL; unsigned long new_addr = __new_addr; - if (unlikely(sparc64_mmap_check(addr, old_len))) + if (unlikely(sparc_mmap_check(addr, old_len))) goto out; - if (unlikely(sparc64_mmap_check(new_addr, new_len))) + if (unlikely(sparc_mmap_check(new_addr, new_len))) goto out; down_write(¤t->mm->mmap_sem); ret = do_mremap(addr, old_len, new_len, flags, new_addr); diff --git a/arch/sparc64/kernel/syscalls.S b/arch/sparc64/kernel/syscalls.S index db19ed67acf67fee9df800a5f82a763b47b9635a..a2f24270ed8af9f95b95ee0f685419b621244fa2 100644 --- a/arch/sparc64/kernel/syscalls.S +++ b/arch/sparc64/kernel/syscalls.S @@ -162,6 +162,8 @@ linux_syscall_trace32: add %sp, PTREGS_OFF, %o0 call syscall_trace clr %o1 + brnz,pn %o0, 3f + mov -ENOSYS, %o0 srl %i0, 0, %o0 srl %i4, 0, %o4 srl %i1, 0, %o1 @@ -173,6 +175,8 @@ linux_syscall_trace: add %sp, PTREGS_OFF, %o0 call syscall_trace clr %o1 + brnz,pn %o0, 3f + mov -ENOSYS, %o0 mov %i0, %o0 mov %i1, %o1 mov %i2, %o2 diff --git a/arch/sparc64/kernel/sysfs.c b/arch/sparc64/kernel/sysfs.c index e885034a6b73a865c049fa5ca62ca5dab3a88fc1..84e5ce146713383922f07f9e5b1c677874067344 100644 --- a/arch/sparc64/kernel/sysfs.c +++ b/arch/sparc64/kernel/sysfs.c @@ -14,7 +14,8 @@ static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64))); #define SHOW_MMUSTAT_ULONG(NAME) \ -static ssize_t show_##NAME(struct sys_device *dev, char *buf) \ +static ssize_t show_##NAME(struct sys_device *dev, \ + struct sysdev_attribute *attr, char *buf) \ { \ struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \ return sprintf(buf, "%lu\n", p->NAME); \ @@ -135,13 +136,16 @@ static unsigned long write_mmustat_enable(unsigned long val) return sun4v_mmustat_conf(ra, &orig_ra); } -static ssize_t show_mmustat_enable(struct sys_device *s, char *buf) +static ssize_t show_mmustat_enable(struct sys_device *s, + struct sysdev_attribute *attr, char *buf) { unsigned long val = run_on_cpu(s->id, read_mmustat_enable, 0); return sprintf(buf, "%lx\n", val); } -static ssize_t store_mmustat_enable(struct sys_device *s, const char *buf, size_t count) +static ssize_t store_mmustat_enable(struct sys_device *s, + struct sysdev_attribute *attr, const char *buf, + size_t count) { unsigned long val, err; int ret = sscanf(buf, "%ld", &val); @@ -179,14 +183,16 @@ static void unregister_mmu_stats(struct sys_device *s) #endif #define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \ -static ssize_t show_##NAME(struct sys_device *dev, char *buf) \ +static ssize_t show_##NAME(struct sys_device *dev, \ + struct sysdev_attribute *attr, char *buf) \ { \ cpuinfo_sparc *c = &cpu_data(dev->id); \ return sprintf(buf, "%lu\n", c->MEMBER); \ } #define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \ -static ssize_t show_##NAME(struct sys_device *dev, char *buf) \ +static ssize_t show_##NAME(struct sys_device *dev, \ + struct sysdev_attribute *attr, char *buf) \ { \ cpuinfo_sparc *c = &cpu_data(dev->id); \ return sprintf(buf, "%u\n", c->MEMBER); \ diff --git a/arch/sparc64/kernel/systbls.S b/arch/sparc64/kernel/systbls.S index 8b5282d433c44b6c1d04ebaf525cda6470b9a9f2..1095bf4c5100a90a3c79edf081f44861c74f083e 100644 --- a/arch/sparc64/kernel/systbls.S +++ b/arch/sparc64/kernel/systbls.S @@ -81,7 +81,8 @@ sys_call_table32: /*300*/ .word compat_sys_set_robust_list, compat_sys_get_robust_list, compat_sys_migrate_pages, compat_sys_mbind, compat_sys_get_mempolicy .word compat_sys_set_mempolicy, compat_sys_kexec_load, compat_sys_move_pages, sys_getcpu, compat_sys_epoll_pwait /*310*/ .word compat_sys_utimensat, compat_sys_signalfd, sys_timerfd_create, sys_eventfd, compat_sys_fallocate - .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime + .word compat_sys_timerfd_settime, compat_sys_timerfd_gettime, compat_sys_signalfd4, sys_eventfd2, sys_epoll_create1 +/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1 #endif /* CONFIG_COMPAT */ @@ -154,4 +155,5 @@ sys_call_table: /*300*/ .word sys_set_robust_list, sys_get_robust_list, sys_migrate_pages, sys_mbind, sys_get_mempolicy .word sys_set_mempolicy, sys_kexec_load, sys_move_pages, sys_getcpu, sys_epoll_pwait /*310*/ .word sys_utimensat, sys_signalfd, sys_timerfd_create, sys_eventfd, sys_fallocate - .word sys_timerfd_settime, sys_timerfd_gettime + .word sys_timerfd_settime, sys_timerfd_gettime, sys_signalfd4, sys_eventfd2, sys_epoll_create1 +/*320*/ .word sys_dup3, sys_pipe2, sys_inotify_init1 diff --git a/arch/sparc64/kernel/time.c b/arch/sparc64/kernel/time.c index e5d238970c7ec60e7d52a04495ffb7eb725340c5..a0c6a97eec6ee5883968a6fe313b0aa467fafb56 100644 --- a/arch/sparc64/kernel/time.c +++ b/arch/sparc64/kernel/time.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -883,6 +884,16 @@ static struct notifier_block sparc64_cpufreq_notifier_block = { .notifier_call = sparc64_cpufreq_notifier }; +static int __init register_sparc64_cpufreq_notifier(void) +{ + + cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, + CPUFREQ_TRANSITION_NOTIFIER); + return 0; +} + +core_initcall(register_sparc64_cpufreq_notifier); + #endif /* CONFIG_CPU_FREQ */ static int sparc64_next_event(unsigned long delta, @@ -1049,11 +1060,6 @@ void __init time_init(void) sparc64_clockevent.mult, sparc64_clockevent.shift); setup_sparc64_timer(); - -#ifdef CONFIG_CPU_FREQ - cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, - CPUFREQ_TRANSITION_NOTIFIER); -#endif } unsigned long long sched_clock(void) @@ -1659,10 +1665,14 @@ static int mini_rtc_ioctl(struct inode *inode, struct file *file, static int mini_rtc_open(struct inode *inode, struct file *file) { - if (mini_rtc_status & RTC_IS_OPEN) + lock_kernel(); + if (mini_rtc_status & RTC_IS_OPEN) { + unlock_kernel(); return -EBUSY; + } mini_rtc_status |= RTC_IS_OPEN; + unlock_kernel(); return 0; } diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c index 36974926265367824d5f7061badfef0d92d909b1..bd30ecba563010bfced1ad54950875e59f160418 100644 --- a/arch/sparc64/kernel/traps.c +++ b/arch/sparc64/kernel/traps.c @@ -1,6 +1,6 @@ /* arch/sparc64/kernel/traps.c * - * Copyright (C) 1995,1997 David S. Miller (davem@davemloft.net) + * Copyright (C) 1995,1997,2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1997,1999,2000 Jakub Jelinek (jakub@redhat.com) */ @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include @@ -37,9 +36,6 @@ #include #include #include -#ifdef CONFIG_KMOD -#include -#endif #include #include "entry.h" @@ -74,7 +70,7 @@ static void dump_tl1_traplog(struct tl1_traplog *p) i + 1, p->trapstack[i].tstate, p->trapstack[i].tpc, p->trapstack[i].tnpc, p->trapstack[i].tt); - print_symbol("TRAPLOG: TPC<%s>\n", p->trapstack[i].tpc); + printk("TRAPLOG: TPC<%pS>\n", (void *) p->trapstack[i].tpc); } } @@ -1081,7 +1077,7 @@ static void cheetah_log_errors(struct pt_regs *regs, struct cheetah_err_info *in regs->tpc, regs->tnpc, regs->u_regs[UREG_I7], regs->tstate); printk("%s" "ERROR(%d): ", (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id()); - print_symbol("TPC<%s>\n", regs->tpc); + printk("TPC<%pS>\n", (void *) regs->tpc); printk("%s" "ERROR(%d): M_SYND(%lx), E_SYND(%lx)%s%s\n", (recoverable ? KERN_WARNING : KERN_CRIT), smp_processor_id(), (afsr & CHAFSR_M_SYNDROME) >> CHAFSR_M_SYNDROME_SHIFT, @@ -1689,7 +1685,7 @@ void cheetah_plus_parity_error(int type, struct pt_regs *regs) smp_processor_id(), (type & 0x1) ? 'I' : 'D', regs->tpc); - print_symbol(KERN_EMERG "TPC<%s>\n", regs->tpc); + printk(KERN_EMERG "TPC<%pS>\n", (void *) regs->tpc); panic("Irrecoverable Cheetah+ parity error."); } @@ -1697,7 +1693,7 @@ void cheetah_plus_parity_error(int type, struct pt_regs *regs) smp_processor_id(), (type & 0x1) ? 'I' : 'D', regs->tpc); - print_symbol(KERN_WARNING "TPC<%s>\n", regs->tpc); + printk(KERN_WARNING "TPC<%pS>\n", (void *) regs->tpc); } struct sun4v_error_entry { @@ -1904,9 +1900,10 @@ void sun4v_itlb_error_report(struct pt_regs *regs, int tl) printk(KERN_EMERG "SUN4V-ITLB: Error at TPC[%lx], tl %d\n", regs->tpc, tl); - print_symbol(KERN_EMERG "SUN4V-ITLB: TPC<%s>\n", regs->tpc); + printk(KERN_EMERG "SUN4V-ITLB: TPC<%pS>\n", (void *) regs->tpc); printk(KERN_EMERG "SUN4V-ITLB: O7[%lx]\n", regs->u_regs[UREG_I7]); - print_symbol(KERN_EMERG "SUN4V-ITLB: O7<%s>\n", regs->u_regs[UREG_I7]); + printk(KERN_EMERG "SUN4V-ITLB: O7<%pS>\n", + (void *) regs->u_regs[UREG_I7]); printk(KERN_EMERG "SUN4V-ITLB: vaddr[%lx] ctx[%lx] " "pte[%lx] error[%lx]\n", sun4v_err_itlb_vaddr, sun4v_err_itlb_ctx, @@ -1927,9 +1924,10 @@ void sun4v_dtlb_error_report(struct pt_regs *regs, int tl) printk(KERN_EMERG "SUN4V-DTLB: Error at TPC[%lx], tl %d\n", regs->tpc, tl); - print_symbol(KERN_EMERG "SUN4V-DTLB: TPC<%s>\n", regs->tpc); + printk(KERN_EMERG "SUN4V-DTLB: TPC<%pS>\n", (void *) regs->tpc); printk(KERN_EMERG "SUN4V-DTLB: O7[%lx]\n", regs->u_regs[UREG_I7]); - print_symbol(KERN_EMERG "SUN4V-DTLB: O7<%s>\n", regs->u_regs[UREG_I7]); + printk(KERN_EMERG "SUN4V-DTLB: O7<%pS>\n", + (void *) regs->u_regs[UREG_I7]); printk(KERN_EMERG "SUN4V-DTLB: vaddr[%lx] ctx[%lx] " "pte[%lx] error[%lx]\n", sun4v_err_dtlb_vaddr, sun4v_err_dtlb_ctx, @@ -2111,10 +2109,7 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp) fp = ksp + STACK_BIAS; thread_base = (unsigned long) tp; - printk("Call Trace:"); -#ifdef CONFIG_KALLSYMS - printk("\n"); -#endif + printk("Call Trace:\n"); do { struct sparc_stackf *sf; struct pt_regs *regs; @@ -2137,12 +2132,8 @@ void show_stack(struct task_struct *tsk, unsigned long *_ksp) fp = (unsigned long)sf->fp + STACK_BIAS; } - printk(" [%016lx] ", pc); - print_symbol("%s\n", pc); + printk(" [%016lx] %pS\n", pc, (void *) pc); } while (++count < 16); -#ifndef CONFIG_KALLSYMS - printk("\n"); -#endif } void dump_stack(void) @@ -2211,9 +2202,8 @@ void die_if_kernel(char *str, struct pt_regs *regs) while (rw && count++ < 30&& is_kernel_stack(current, rw)) { - printk("Caller[%016lx]", rw->ins[7]); - print_symbol(": %s", rw->ins[7]); - printk("\n"); + printk("Caller[%016lx]: %pS\n", rw->ins[7], + (void *) rw->ins[7]); rw = kernel_stack_up(rw); } diff --git a/arch/sparc64/kernel/ttable.S b/arch/sparc64/kernel/ttable.S index 450053af039e48abd0d6c92faca49a69e6d2107f..1ade3d6fb7fc7d1bd748a7c47852c027328efa76 100644 --- a/arch/sparc64/kernel/ttable.S +++ b/arch/sparc64/kernel/ttable.S @@ -58,7 +58,12 @@ tl0_irq3: BTRAP(0x43) tl0_irq4: BTRAP(0x44) #endif tl0_irq5: TRAP_IRQ(handler_irq, 5) -tl0_irq6: BTRAP(0x46) BTRAP(0x47) BTRAP(0x48) BTRAP(0x49) +#ifdef CONFIG_SMP +tl0_irq6: TRAP_IRQ(smp_call_function_single_client, 6) +#else +tl0_irq6: BTRAP(0x46) +#endif +tl0_irq7: BTRAP(0x47) BTRAP(0x48) BTRAP(0x49) tl0_irq10: BTRAP(0x4a) BTRAP(0x4b) BTRAP(0x4c) BTRAP(0x4d) tl0_irq14: TRAP_IRQ(timer_interrupt, 14) tl0_irq15: TRAP_IRQ(handler_irq, 15) diff --git a/arch/sparc64/kernel/unaligned.c b/arch/sparc64/kernel/unaligned.c index afa7fc4f519373e5637cf6b936ea140c99c92758..203ddfad9f27f3c6067760916085624503eee9ff 100644 --- a/arch/sparc64/kernel/unaligned.c +++ b/arch/sparc64/kernel/unaligned.c @@ -2,7 +2,7 @@ * unaligned.c: Unaligned load/store trap handling with special * cases for the kernel to do them more quickly. * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) */ @@ -20,7 +20,6 @@ #include #include #include -#include #include /* #define DEBUG_MNA */ @@ -289,8 +288,8 @@ static void log_unaligned(struct pt_regs *regs) if (count < 5) { last_time = jiffies; count++; - printk("Kernel unaligned access at TPC[%lx] ", regs->tpc); - print_symbol("%s\n", regs->tpc); + printk("Kernel unaligned access at TPC[%lx] %pS\n", + regs->tpc, (void *) regs->tpc); } } diff --git a/arch/sparc64/kernel/vio.c b/arch/sparc64/kernel/vio.c index e78b3517940b6a252a13d36b544c371341f1aae0..a490077891a4c532e399e062830d3e932269af65 100644 --- a/arch/sparc64/kernel/vio.c +++ b/arch/sparc64/kernel/vio.c @@ -224,7 +224,7 @@ static struct vio_dev *vio_create_one(struct mdesc_handle *hp, u64 mp, if (!strcmp(type, "domain-services-port")) bus_id_name = "ds"; - if (strlen(bus_id_name) >= KOBJ_NAME_LEN - 4) { + if (strlen(bus_id_name) >= BUS_ID_SIZE - 4) { printk(KERN_ERR "VIO: bus_id_name [%s] is too long.\n", bus_id_name); return NULL; @@ -260,16 +260,14 @@ static struct vio_dev *vio_create_one(struct mdesc_handle *hp, u64 mp, vio_fill_channel_info(hp, mp, vdev); if (!id) { - snprintf(vdev->dev.bus_id, BUS_ID_SIZE, "%s", - bus_id_name); + dev_set_name(&vdev->dev, "%s", bus_id_name); vdev->dev_no = ~(u64)0; } else if (!cfg_handle) { - snprintf(vdev->dev.bus_id, BUS_ID_SIZE, "%s-%lu", - bus_id_name, *id); + dev_set_name(&vdev->dev, "%s-%lu", bus_id_name, *id); vdev->dev_no = *id; } else { - snprintf(vdev->dev.bus_id, BUS_ID_SIZE, "%s-%lu-%lu", - bus_id_name, *cfg_handle, *id); + dev_set_name(&vdev->dev, "%s-%lu-%lu", bus_id_name, + *cfg_handle, *id); vdev->dev_no = *cfg_handle; } @@ -292,12 +290,12 @@ static struct vio_dev *vio_create_one(struct mdesc_handle *hp, u64 mp, } vdev->dp = dp; - printk(KERN_INFO "VIO: Adding device %s\n", vdev->dev.bus_id); + printk(KERN_INFO "VIO: Adding device %s\n", dev_name(&vdev->dev)); err = device_register(&vdev->dev); if (err) { printk(KERN_ERR "VIO: Could not register device %s, err=%d\n", - vdev->dev.bus_id, err); + dev_name(&vdev->dev), err); kfree(vdev); return NULL; } @@ -330,7 +328,7 @@ static void vio_remove(struct mdesc_handle *hp, u64 node) dev = device_find_child(&root_vdev->dev, (void *) node, vio_md_node_match); if (dev) { - printk(KERN_INFO "VIO: Removing device %s\n", dev->bus_id); + printk(KERN_INFO "VIO: Removing device %s\n", dev_name(dev)); device_unregister(dev); } diff --git a/arch/sparc64/lib/copy_page.S b/arch/sparc64/lib/copy_page.S index 37460666a5c3250177742db6409e2f69714421d7..b243d3b606ba447106ea4ce756b1e31171b6aeb7 100644 --- a/arch/sparc64/lib/copy_page.S +++ b/arch/sparc64/lib/copy_page.S @@ -25,9 +25,9 @@ #define DCACHE_SIZE (PAGE_SIZE * 2) -#if (PAGE_SHIFT == 13) || (PAGE_SHIFT == 19) +#if (PAGE_SHIFT == 13) #define PAGE_SIZE_REM 0x80 -#elif (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22) +#elif (PAGE_SHIFT == 16) #define PAGE_SIZE_REM 0x100 #else #error Wrong PAGE_SHIFT specified @@ -198,7 +198,7 @@ cheetah_copy_page_insn: cmp %o2, PAGE_SIZE_REM bne,pt %xcc, 1b add %o0, 0x40, %o0 -#if (PAGE_SHIFT == 16) || (PAGE_SHIFT == 22) +#if (PAGE_SHIFT == 16) TOUCH(f0, f2, f4, f6, f8, f10, f12, f14) ldda [%o1] ASI_BLK_P, %f32 stda %f48, [%o0] %asi diff --git a/arch/sparc64/lib/mcount.S b/arch/sparc64/lib/mcount.S index 9e4534b485c7a578af04517adff245a413f7bfb9..7735a7a60533fa225256ad0bd2d94a00be26033a 100644 --- a/arch/sparc64/lib/mcount.S +++ b/arch/sparc64/lib/mcount.S @@ -28,10 +28,13 @@ ovstack: .skip OVSTACKSIZE #endif .text - .align 32 - .globl mcount, _mcount -mcount: + .align 32 + .globl _mcount + .type _mcount,#function + .globl mcount + .type mcount,#function _mcount: +mcount: #ifdef CONFIG_STACK_DEBUG /* * Check whether %sp is dangerously low. @@ -55,6 +58,53 @@ _mcount: or %g3, %lo(panicstring), %o0 call prom_halt nop +1: +#endif +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE + mov %o7, %o0 + .globl mcount_call +mcount_call: + call ftrace_stub + mov %o0, %o7 +#else + sethi %hi(ftrace_trace_function), %g1 + sethi %hi(ftrace_stub), %g2 + ldx [%g1 + %lo(ftrace_trace_function)], %g1 + or %g2, %lo(ftrace_stub), %g2 + cmp %g1, %g2 + be,pn %icc, 1f + mov %i7, %o1 + jmpl %g1, %g0 + mov %o7, %o0 + /* not reached */ +1: #endif -1: retl +#endif + retl nop + .size _mcount,.-_mcount + .size mcount,.-mcount + +#ifdef CONFIG_FTRACE + .globl ftrace_stub + .type ftrace_stub,#function +ftrace_stub: + retl + nop + .size ftrace_stub,.-ftrace_stub +#ifdef CONFIG_DYNAMIC_FTRACE + .globl ftrace_caller + .type ftrace_caller,#function +ftrace_caller: + mov %i7, %o1 + mov %o7, %o0 + .globl ftrace_call +ftrace_call: + call ftrace_stub + mov %o0, %o7 + retl + nop + .size ftrace_caller,.-ftrace_caller +#endif +#endif diff --git a/arch/sparc64/mm/fault.c b/arch/sparc64/mm/fault.c index 236f4d228d2bc962908af77a37b012ce9d1e8bc5..ea7d7ae76bc24d20f3e731507b478f032986f150 100644 --- a/arch/sparc64/mm/fault.c +++ b/arch/sparc64/mm/fault.c @@ -1,7 +1,7 @@ /* * arch/sparc64/mm/fault.c: Page fault handlers for the 64-bit Sparc. * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net) * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) */ @@ -18,7 +18,6 @@ #include #include #include -#include #include #include @@ -115,7 +114,7 @@ static void bad_kernel_pc(struct pt_regs *regs, unsigned long vaddr) printk(KERN_CRIT "OOPS: Bogus kernel PC [%016lx] in fault handler\n", regs->tpc); printk(KERN_CRIT "OOPS: RPC [%016lx]\n", regs->u_regs[15]); - print_symbol("RPC: <%s>\n", regs->u_regs[15]); + printk("OOPS: RPC <%pS>\n", (void *) regs->u_regs[15]); printk(KERN_CRIT "OOPS: Fault was to vaddr[%lx]\n", vaddr); dump_stack(); unhandled_fault(regs->tpc, current, regs); diff --git a/arch/sparc64/mm/hugetlbpage.c b/arch/sparc64/mm/hugetlbpage.c index 6cfab2e4d340945dd63445f71d3caa361b6701a9..f27d10369e0cdea561c78c7e3be4e0b326ffd8be 100644 --- a/arch/sparc64/mm/hugetlbpage.c +++ b/arch/sparc64/mm/hugetlbpage.c @@ -175,7 +175,7 @@ hugetlb_get_unmapped_area(struct file *file, unsigned long addr, return -ENOMEM; if (flags & MAP_FIXED) { - if (prepare_hugepage_range(addr, len)) + if (prepare_hugepage_range(file, addr, len)) return -EINVAL; return addr; } @@ -195,7 +195,8 @@ hugetlb_get_unmapped_area(struct file *file, unsigned long addr, pgoff, flags); } -pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr) +pte_t *huge_pte_alloc(struct mm_struct *mm, + unsigned long addr, unsigned long sz) { pgd_t *pgd; pud_t *pud; @@ -294,6 +295,11 @@ int pmd_huge(pmd_t pmd) return 0; } +int pud_huge(pud_t pud) +{ + return 0; +} + struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address, pmd_t *pmd, int write) { @@ -344,7 +350,7 @@ void hugetlb_prefault_arch_hook(struct mm_struct *mm) * also executing in this address space. */ mm->context.sparc64_ctx_val = ctx; - on_each_cpu(context_reload, mm, 0, 0); + on_each_cpu(context_reload, mm, 0); } spin_unlock(&ctx_alloc_lock); } diff --git a/arch/sparc64/mm/init.c b/arch/sparc64/mm/init.c index 84898c44dd4d81fa8dfa2f1ada68e492ad2da867..4e821b3ecb039faa71991809c0d4139354ee2a8d 100644 --- a/arch/sparc64/mm/init.c +++ b/arch/sparc64/mm/init.c @@ -392,51 +392,6 @@ void __kprobes flush_icache_range(unsigned long start, unsigned long end) } } -void show_mem(void) -{ - unsigned long total = 0, reserved = 0; - unsigned long shared = 0, cached = 0; - pg_data_t *pgdat; - - printk(KERN_INFO "Mem-info:\n"); - show_free_areas(); - printk(KERN_INFO "Free swap: %6ldkB\n", - nr_swap_pages << (PAGE_SHIFT-10)); - for_each_online_pgdat(pgdat) { - unsigned long i, flags; - - pgdat_resize_lock(pgdat, &flags); - for (i = 0; i < pgdat->node_spanned_pages; i++) { - struct page *page = pgdat_page_nr(pgdat, i); - total++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (page_count(page)) - shared += page_count(page) - 1; - } - pgdat_resize_unlock(pgdat, &flags); - } - - printk(KERN_INFO "%lu pages of RAM\n", total); - printk(KERN_INFO "%lu reserved pages\n", reserved); - printk(KERN_INFO "%lu pages shared\n", shared); - printk(KERN_INFO "%lu pages swap cached\n", cached); - - printk(KERN_INFO "%lu pages dirty\n", - global_page_state(NR_FILE_DIRTY)); - printk(KERN_INFO "%lu pages writeback\n", - global_page_state(NR_WRITEBACK)); - printk(KERN_INFO "%lu pages mapped\n", - global_page_state(NR_FILE_MAPPED)); - printk(KERN_INFO "%lu pages slab\n", - global_page_state(NR_SLAB_RECLAIMABLE) + - global_page_state(NR_SLAB_UNRECLAIMABLE)); - printk(KERN_INFO "%lu pages pagetables\n", - global_page_state(NR_PAGETABLE)); -} - void mmu_info(struct seq_file *m) { if (tlb_type == cheetah) @@ -788,7 +743,6 @@ int numa_cpu_lookup_table[NR_CPUS]; cpumask_t numa_cpumask_lookup_table[MAX_NUMNODES]; #ifdef CONFIG_NEED_MULTIPLE_NODES -static bootmem_data_t plat_node_bdata[MAX_NUMNODES]; struct mdesc_mblock { u64 base; @@ -871,7 +825,7 @@ static void __init allocate_node_data(int nid) NODE_DATA(nid) = __va(paddr); memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); - NODE_DATA(nid)->bdata = &plat_node_bdata[nid]; + NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; #endif p = NODE_DATA(nid); diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c index fe70c8a557b58ae1c96cb4312878797b8d881d49..3547937b17a2f2d43c5d9f667dcfca7e8ce0c1eb 100644 --- a/arch/sparc64/mm/tsb.c +++ b/arch/sparc64/mm/tsb.c @@ -96,12 +96,6 @@ void flush_tsb_user(struct mmu_gather *mp) #elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) #define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_64K #define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_64K -#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) -#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_512K -#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_512K -#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) -#define HV_PGSZ_IDX_BASE HV_PGSZ_IDX_4MB -#define HV_PGSZ_MASK_BASE HV_PGSZ_MASK_4MB #else #error Broken base page size setting... #endif diff --git a/arch/sparc64/mm/ultra.S b/arch/sparc64/mm/ultra.S index 9bb2d90a9df6ba948e566f6c7c11d92a0a437837..4c8ca131ffaf467ec329fc70753f32b076bff392 100644 --- a/arch/sparc64/mm/ultra.S +++ b/arch/sparc64/mm/ultra.S @@ -688,6 +688,11 @@ xcall_call_function: wr %g0, (1 << PIL_SMP_CALL_FUNC), %set_softint retry + .globl xcall_call_function_single +xcall_call_function_single: + wr %g0, (1 << PIL_SMP_CALL_FUNC_SNGL), %set_softint + retry + .globl xcall_receive_signal xcall_receive_signal: wr %g0, (1 << PIL_SMP_RECEIVE_SIGNAL), %set_softint diff --git a/arch/um/drivers/harddog_kern.c b/arch/um/drivers/harddog_kern.c index a9ad4bd6d953d2255d82e3776b816165e50a94aa..d332503fa1beae1f54a53fbbb62356ea2113cfb1 100644 --- a/arch/um/drivers/harddog_kern.c +++ b/arch/um/drivers/harddog_kern.c @@ -66,6 +66,7 @@ static int harddog_open(struct inode *inode, struct file *file) int err = -EBUSY; char *sock = NULL; + lock_kernel(); spin_lock(&lock); if(timer_alive) goto err; @@ -82,9 +83,11 @@ static int harddog_open(struct inode *inode, struct file *file) timer_alive = 1; spin_unlock(&lock); + unlock_kernel(); return nonseekable_open(inode, file); err: spin_unlock(&lock); + unlock_kernel(); return err; } diff --git a/arch/um/drivers/mmapper_kern.c b/arch/um/drivers/mmapper_kern.c index 67b2f55a602f6db174f95f4e0b843f4adda97d2e..eb240323c40ad6a52883b079f2324c57ae9eb09f 100644 --- a/arch/um/drivers/mmapper_kern.c +++ b/arch/um/drivers/mmapper_kern.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include "mem_user.h" @@ -77,6 +78,7 @@ out: static int mmapper_open(struct inode *inode, struct file *file) { + cycle_kernel_lock(); return 0; } diff --git a/arch/um/drivers/random.c b/arch/um/drivers/random.c index 4949044773ba78b93797d43701ab751b0a1bce23..6eabb7022a2d6c1c45a7f62327a50c4b1c88d734 100644 --- a/arch/um/drivers/random.c +++ b/arch/um/drivers/random.c @@ -7,6 +7,7 @@ * of the GNU General Public License, incorporated herein by reference. */ #include +#include #include #include #include @@ -33,6 +34,8 @@ static DECLARE_WAIT_QUEUE_HEAD(host_read_wait); static int rng_dev_open (struct inode *inode, struct file *filp) { + cycle_kernel_lock(); + /* enforce read-only access to this chrdev */ if ((filp->f_mode & FMODE_READ) == 0) return -EINVAL; diff --git a/arch/um/include/init.h b/arch/um/include/init.h index b00a95741d4115339db192cddf54a7ba1b977ab7..37dd097c16c07131282b8ddd484d52e1cb6fd369 100644 --- a/arch/um/include/init.h +++ b/arch/um/include/init.h @@ -45,12 +45,20 @@ typedef void (*exitcall_t)(void); # define __section(S) __attribute__ ((__section__(#S))) #endif +#if __GNUC__ == 3 + #if __GNUC_MINOR__ >= 3 # define __used __attribute__((__used__)) #else # define __used __attribute__((__unused__)) #endif +#else +#if __GNUC__ == 4 +# define __used __attribute__((__used__)) +#endif +#endif + #else #include #endif diff --git a/arch/um/include/irq_kern.h b/arch/um/include/irq_kern.h index 4f775597fd5fa3bed63890a8b752f8705f265367..fba3895274f9ba9e2834cdb063b76f1cf295f5e9 100644 --- a/arch/um/include/irq_kern.h +++ b/arch/um/include/irq_kern.h @@ -13,8 +13,6 @@ extern int um_request_irq(unsigned int irq, int fd, int type, irq_handler_t handler, unsigned long irqflags, const char * devname, void *dev_id); -extern int init_aio_irq(int irq, char *name, - irq_handler_t handler); #endif diff --git a/arch/um/include/irq_user.h b/arch/um/include/irq_user.h index e60b31873de135ebd949723ca2cdc283deab31d3..c6c784df2673a93e7ad0d794a9e1ff38824c0791 100644 --- a/arch/um/include/irq_user.h +++ b/arch/um/include/irq_user.h @@ -21,8 +21,6 @@ struct irq_fd { enum { IRQ_READ, IRQ_WRITE }; extern void sigio_handler(int sig, struct uml_pt_regs *regs); -extern int activate_fd(int irq, int fd, int type, void *dev_id); -extern void free_irq_by_irq_and_dev(unsigned int irq, void *dev_id); extern void free_irq_by_fd(int fd); extern void reactivate_fd(int fd, int irqnum); extern void deactivate_fd(int fd, int irqnum); diff --git a/arch/um/include/skas/skas.h b/arch/um/include/skas/skas.h index b073f8a86bd3b38dc340c5cd6bd539e6f164ebfc..64d2c74433060601c1c5a847fde0c64849178381 100644 --- a/arch/um/include/skas/skas.h +++ b/arch/um/include/skas/skas.h @@ -16,7 +16,6 @@ extern int user_thread(unsigned long stack, int flags); extern void new_thread_handler(void); extern void handle_syscall(struct uml_pt_regs *regs); extern int new_mm(unsigned long stack); -extern void get_skas_faultinfo(int pid, struct faultinfo * fi); extern long execute_syscall_skas(void *r); extern unsigned long current_stub_stack(void); diff --git a/arch/um/include/um_uaccess.h b/arch/um/include/um_uaccess.h index 2b6fc8e0f07137bdec6f6b5fcd166f9e79d4e0d6..45c04999d670d1129acb401eb94ed26974213623 100644 --- a/arch/um/include/um_uaccess.h +++ b/arch/um/include/um_uaccess.h @@ -34,7 +34,6 @@ extern int copy_to_user(void __user *to, const void *from, int n); extern int __do_copy_to_user(void *to, const void *from, int n, void **fault_addr, jmp_buf **fault_catcher); -extern void __do_copy(void *to, const void *from, int n); /* * strncpy_from_user: - Copy a NUL terminated string from userspace. diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c index 91587f8db34019a1045c81159f120eb1bd69c1ce..3d7aad09b171cfeca9fdc0a132ccf86f3d6a71f9 100644 --- a/arch/um/kernel/irq.c +++ b/arch/um/kernel/irq.c @@ -102,7 +102,7 @@ void sigio_handler(int sig, struct uml_pt_regs *regs) static DEFINE_SPINLOCK(irq_lock); -int activate_fd(int irq, int fd, int type, void *dev_id) +static int activate_fd(int irq, int fd, int type, void *dev_id) { struct pollfd *tmp_pfd; struct irq_fd *new_fd, *irq_fd; @@ -216,7 +216,7 @@ static int same_irq_and_dev(struct irq_fd *irq, void *d) return ((irq->irq == data->irq) && (irq->id == data->dev)); } -void free_irq_by_irq_and_dev(unsigned int irq, void *dev) +static void free_irq_by_irq_and_dev(unsigned int irq, void *dev) { struct irq_and_dev data = ((struct irq_and_dev) { .irq = irq, .dev = dev }); @@ -403,37 +403,6 @@ void __init init_IRQ(void) } } -int init_aio_irq(int irq, char *name, irq_handler_t handler) -{ - int fds[2], err; - - err = os_pipe(fds, 1, 1); - if (err) { - printk(KERN_ERR "init_aio_irq - os_pipe failed, err = %d\n", - -err); - goto out; - } - - err = um_request_irq(irq, fds[0], IRQ_READ, handler, - IRQF_DISABLED | IRQF_SAMPLE_RANDOM, name, - (void *) (long) fds[0]); - if (err) { - printk(KERN_ERR "init_aio_irq - : um_request_irq failed, " - "err = %d\n", - err); - goto out_close; - } - - err = fds[1]; - goto out; - - out_close: - os_close_file(fds[0]); - os_close_file(fds[1]); - out: - return err; -} - /* * IRQ stack entry and exit: * diff --git a/arch/um/kernel/ksyms.c b/arch/um/kernel/ksyms.c index ccc02a616c22d071d8bb9a0bae0331aa4b002e80..836fc9b9470717dcbe81bc8cabe0e1261892dd7b 100644 --- a/arch/um/kernel/ksyms.c +++ b/arch/um/kernel/ksyms.c @@ -18,7 +18,6 @@ EXPORT_SYMBOL(get_signals); EXPORT_SYMBOL(kernel_thread); EXPORT_SYMBOL(sys_waitpid); EXPORT_SYMBOL(flush_tlb_range); -EXPORT_SYMBOL(arch_validate); EXPORT_SYMBOL(high_physmem); EXPORT_SYMBOL(empty_zero_page); diff --git a/arch/um/kernel/mem.c b/arch/um/kernel/mem.c index b0ee64622ff70a91bc3a44d52965b402dfaa81c1..61d7e6138ff51ba8bcb10ca1ac12880aa197ccb5 100644 --- a/arch/um/kernel/mem.c +++ b/arch/um/kernel/mem.c @@ -21,7 +21,7 @@ /* allocated in paging_init, zeroed in mem_init, and unchanged thereafter */ unsigned long *empty_zero_page = NULL; /* allocated in paging_init and unchanged thereafter */ -unsigned long *empty_bad_page = NULL; +static unsigned long *empty_bad_page = NULL; /* * Initialized during boot, and readonly for initializing page tables @@ -240,37 +240,6 @@ void __init paging_init(void) #endif } -struct page *arch_validate(struct page *page, gfp_t mask, int order) -{ - unsigned long addr, zero = 0; - int i; - - again: - if (page == NULL) - return page; - if (PageHighMem(page)) - return page; - - addr = (unsigned long) page_address(page); - for (i = 0; i < (1 << order); i++) { - current->thread.fault_addr = (void *) addr; - if (__do_copy_to_user((void __user *) addr, &zero, - sizeof(zero), - ¤t->thread.fault_addr, - ¤t->thread.fault_catcher)) { - if (!(mask & __GFP_WAIT)) - return NULL; - else break; - } - addr += PAGE_SIZE; - } - - if (i == (1 << order)) - return page; - page = alloc_pages(mask, order); - goto again; -} - /* * This can't do anything because nothing in the kernel image can be freed * since it's not in kernel physical memory. @@ -295,37 +264,6 @@ void free_initrd_mem(unsigned long start, unsigned long end) } #endif -void show_mem(void) -{ - int pfn, total = 0, reserved = 0; - int shared = 0, cached = 0; - int high_mem = 0; - struct page *page; - - printk(KERN_INFO "Mem-info:\n"); - show_free_areas(); - printk(KERN_INFO "Free swap: %6ldkB\n", - nr_swap_pages<<(PAGE_SHIFT-10)); - pfn = max_mapnr; - while (pfn-- > 0) { - page = pfn_to_page(pfn); - total++; - if (PageHighMem(page)) - high_mem++; - if (PageReserved(page)) - reserved++; - else if (PageSwapCache(page)) - cached++; - else if (page_count(page)) - shared += page_count(page) - 1; - } - printk(KERN_INFO "%d pages of RAM\n", total); - printk(KERN_INFO "%d pages of HIGHMEM\n", high_mem); - printk(KERN_INFO "%d reserved pages\n", reserved); - printk(KERN_INFO "%d pages shared\n", shared); - printk(KERN_INFO "%d pages swap cached\n", cached); -} - /* Allocate and free page tables. */ pgd_t *pgd_alloc(struct mm_struct *mm) diff --git a/arch/um/kernel/physmem.c b/arch/um/kernel/physmem.c index 9757085a022097fe1804373bfd8e498bd38b4991..a1a9090254c29fdd07ad9f982a46d54dd29563ee 100644 --- a/arch/um/kernel/physmem.c +++ b/arch/um/kernel/physmem.c @@ -185,7 +185,7 @@ unsigned long find_iomem(char *driver, unsigned long *len_out) return 0; } -int setup_iomem(void) +static int setup_iomem(void) { struct iomem_region *region = iomem_regions; unsigned long iomem_start = high_physmem + PAGE_SIZE; diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c index 83603cfbde819ce736a034d414361ea71c24cca7..a1c6d07cac3e46b2f3460e04729cf6a2ca203571 100644 --- a/arch/um/kernel/process.c +++ b/arch/um/kernel/process.c @@ -243,7 +243,7 @@ void default_idle(void) if (need_resched()) schedule(); - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); nsecs = disable_timer(); idle_sleep(nsecs); tick_nohz_restart_sched_tick(); diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c index 47b57b497d5529e570591e97a0f041e0d55d842e..15e8b7c4de1383b57a01587b1634171f2a0f26a5 100644 --- a/arch/um/kernel/ptrace.c +++ b/arch/um/kernel/ptrace.c @@ -225,7 +225,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return ret; } -void send_sigtrap(struct task_struct *tsk, struct uml_pt_regs *regs, +static void send_sigtrap(struct task_struct *tsk, struct uml_pt_regs *regs, int error_code) { struct siginfo info; diff --git a/arch/um/kernel/smp.c b/arch/um/kernel/smp.c index e1062ec36d4072cc1cc3cfa34232c67c81b59133..be2d50c3aa95caf483377b8a54c2caf121ac8117 100644 --- a/arch/um/kernel/smp.c +++ b/arch/um/kernel/smp.c @@ -214,8 +214,7 @@ void smp_call_function_slave(int cpu) atomic_inc(&scf_finished); } -int smp_call_function(void (*_func)(void *info), void *_info, int nonatomic, - int wait) +int smp_call_function(void (*_func)(void *info), void *_info, int wait) { int cpus = num_online_cpus() - 1; int i; diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c index c3e2f369c33cae2af0c682eb5a9a32a03781e056..47f04f4a3464a918850b67573e1a67a7cf5c3dec 100644 --- a/arch/um/kernel/time.c +++ b/arch/um/kernel/time.c @@ -13,14 +13,6 @@ #include "kern_util.h" #include "os.h" -/* - * Scheduler clock - returns current time in nanosec units. - */ -unsigned long long sched_clock(void) -{ - return (unsigned long long)jiffies_64 * (NSEC_PER_SEC / HZ); -} - void timer_handler(int sig, struct uml_pt_regs *regs) { unsigned long flags; diff --git a/arch/um/kernel/uaccess.c b/arch/um/kernel/uaccess.c index f0f4b040d7c51cb1b17e44402ce5be1b03ec8f40..dd33f040c52631bb1c5b5dd1a0b659b8e9693f4b 100644 --- a/arch/um/kernel/uaccess.c +++ b/arch/um/kernel/uaccess.c @@ -12,7 +12,7 @@ #include #include "os.h" -void __do_copy(void *to, const void *from, int n) +static void __do_copy(void *to, const void *from, int n) { memcpy(to, from, n); } diff --git a/arch/um/os-Linux/sigio.c b/arch/um/os-Linux/sigio.c index eb8f2e4be1929c8f731b8349bbf161afea27c751..63d299df152bb266f614d576b47e9039df531cf4 100644 --- a/arch/um/os-Linux/sigio.c +++ b/arch/um/os-Linux/sigio.c @@ -530,7 +530,7 @@ static void tty_close(int master, int slave) printk(UM_KERN_CONT "No, enabling workaround\n"); } -void __init check_sigio(void) +static void __init check_sigio(void) { if ((access("/dev/ptmx", R_OK) < 0) && (access("/dev/ptyp0", R_OK) < 0)) { diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c index 5aade6027e40e71f78ae1c49d5253a2a79bcc534..6ae180703a6361bf9a8f0a7efd01b17e72e6da0f 100644 --- a/arch/um/os-Linux/signal.c +++ b/arch/um/os-Linux/signal.c @@ -126,7 +126,7 @@ void set_sigstack(void *sig_stack, int size) panic("enabling signal stack failed, errno = %d\n", errno); } -void (*handlers[_NSIG])(int sig, struct sigcontext *sc); +static void (*handlers[_NSIG])(int sig, struct sigcontext *sc); void handle_signal(int sig, struct sigcontext *sc) { diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c index 172ad8f72e12e71af5d2b1463a3ec3af272095ed..d6e0a2234b869267e7bfcdf15170716086a55154 100644 --- a/arch/um/os-Linux/skas/process.c +++ b/arch/um/os-Linux/skas/process.c @@ -96,7 +96,7 @@ bad_wait: extern unsigned long current_stub_stack(void); -void get_skas_faultinfo(int pid, struct faultinfo * fi) +static void get_skas_faultinfo(int pid, struct faultinfo *fi) { int err; diff --git a/arch/um/os-Linux/umid.c b/arch/um/os-Linux/umid.c index 106fa8641553664721bafd33ea8f9ee81d51e6e9..a27defb81884e294ddab6dca2260a3b3cc867c58 100644 --- a/arch/um/os-Linux/umid.c +++ b/arch/um/os-Linux/umid.c @@ -245,7 +245,7 @@ int __init set_umid(char *name) /* Changed in make_umid, which is called during early boot */ static int umid_setup = 0; -int __init make_umid(void) +static int __init make_umid(void) { int fd, err; char tmp[256]; diff --git a/arch/um/sys-i386/bugs.c b/arch/um/sys-i386/bugs.c index a74442d1376213bc5ad41bf3eb11772a743cdeaa..2c6d0d731c12c9bdcdf0e5a2521cec52ff1e7f25 100644 --- a/arch/um/sys-i386/bugs.c +++ b/arch/um/sys-i386/bugs.c @@ -12,7 +12,7 @@ #include "sysdep/ptrace.h" /* Set during early boot */ -int host_has_cmov = 1; +static int host_has_cmov = 1; static jmp_buf cmov_test_return; static void cmov_sigill_test_handler(int sig) diff --git a/arch/um/sys-i386/checksum.S b/arch/um/sys-i386/checksum.S index 62c7e564f22eb4719b8b10c54c290849be55f5f9..f058d2f82e189b0bea284da767766ed1ba20a781 100644 --- a/arch/um/sys-i386/checksum.S +++ b/arch/um/sys-i386/checksum.S @@ -243,13 +243,12 @@ unsigned int csum_partial_copy_generic (const char *src, char *dst, .previous .align 4 -.globl csum_partial_copy_generic_i386 - + #ifndef CONFIG_X86_USE_PPRO_CHECKSUM #define ARGBASE 16 #define FP 12 - + csum_partial_copy_generic_i386: subl $4,%esp pushl %edi diff --git a/arch/um/sys-i386/ldt.c b/arch/um/sys-i386/ldt.c index a34263e6b08d3cc2cedf5e87ed0083ef05288e0b..a4846a84a7be2ddae740675dfcec28e5a6a88328 100644 --- a/arch/um/sys-i386/ldt.c +++ b/arch/um/sys-i386/ldt.c @@ -14,8 +14,8 @@ extern int modify_ldt(int func, void *ptr, unsigned long bytecount); -long write_ldt_entry(struct mm_id * mm_idp, int func, struct user_desc * desc, - void **addr, int done) +static long write_ldt_entry(struct mm_id *mm_idp, int func, + struct user_desc *desc, void **addr, int done) { long res; diff --git a/arch/v850/Kconfig b/arch/v850/Kconfig deleted file mode 100644 index 4379f43505efafe27f1c50dca47b970f3fdad3df..0000000000000000000000000000000000000000 --- a/arch/v850/Kconfig +++ /dev/null @@ -1,353 +0,0 @@ -############################################################################# -# -# For a description of the syntax of this configuration file, -# see Documentation/kbuild/kconfig-language.txt. -# -############################################################################# - -mainmenu "uClinux/v850 (w/o MMU) Kernel Configuration" - -config MMU - bool - default n -config ZONE_DMA - bool - default y -config RWSEM_GENERIC_SPINLOCK - bool - default y -config RWSEM_XCHGADD_ALGORITHM - bool - default n -config GENERIC_FIND_NEXT_BIT - bool - default y -config GENERIC_HWEIGHT - bool - default y -config GENERIC_CALIBRATE_DELAY - bool - default y - -config GENERIC_HARDIRQS - bool - default y - -config GENERIC_IRQ_PROBE - bool - default y - -config GENERIC_TIME - bool - default y - -config TIME_LOW_RES - bool - default y - -config ARCH_HAS_ILOG2_U32 - bool - default n - -config ARCH_HAS_ILOG2_U64 - bool - default n - -config ARCH_SUPPORTS_AOUT - def_bool y - -# Turn off some random 386 crap that can affect device config -config ISA - bool - default n -config ISAPNP - bool - default n -config EISA - bool - default n -config MCA - bool - default n - - -############################################################################# -#### v850-specific config - -# Define the architecture -config V850 - bool - default y - select HAVE_IDE - -menu "Processor type and features" - - choice - prompt "Platform" - default GDB - config V850E_SIM - bool "GDB" - config RTE_CB_MA1 - bool "RTE-V850E/MA1-CB" - config RTE_CB_NB85E - bool "RTE-V850E/NB85E-CB" - config RTE_CB_ME2 - bool "RTE-V850E/ME2-CB" - config V850E_AS85EP1 - bool "AS85EP1" - config V850E2_SIM85E2C - bool "sim85e2c" - config V850E2_SIM85E2S - bool "sim85e2s" - config V850E2_FPGA85E2C - bool "NA85E2C-FPGA" - config V850E2_ANNA - bool "Anna" - endchoice - - #### V850E processor-specific config - - # All CPUs currently supported use the v850e architecture - config V850E - bool - default y - - # The RTE-V850E/MA1-CB is the only type of V850E/MA1 platform we - # currently support - config V850E_MA1 - bool - depends on RTE_CB_MA1 - default y - # Similarly for the RTE-V850E/NB85E-CB - V850E/TEG - config V850E_TEG - bool - depends on RTE_CB_NB85E - default y - # ... and the RTE-V850E/ME2-CB - V850E/ME2 - config V850E_ME2 - bool - depends on RTE_CB_ME2 - default y - - - #### sim85e2-specific config - - config V850E2_SIM85E2 - bool - depends on V850E2_SIM85E2C || V850E2_SIM85E2S - default y - - - #### V850E2 processor-specific config - - # V850E2 processors - config V850E2 - bool - depends on V850E2_SIM85E2 || V850E2_FPGA85E2C || V850E2_ANNA - default y - - - #### RTE-CB platform-specific config - - # Boards in the RTE-x-CB series - config RTE_CB - bool - depends on RTE_CB_MA1 || RTE_CB_NB85E || RTE_CB_ME2 - default y - - config RTE_CB_MULTI - bool - # RTE_CB_NB85E can either have multi ROM support or not, but - # other platforms (currently only RTE_CB_MA1) require it. - prompt "Multi monitor ROM support" if RTE_CB_NB85E - depends on RTE_CB_MA1 || RTE_CB_NB85E - default y - - config RTE_CB_MULTI_DBTRAP - bool "Pass illegal insn trap / dbtrap to kernel" - depends on RTE_CB_MULTI - default n - - config RTE_CB_MA1_KSRAM - bool "Kernel in SRAM (limits size of kernel)" - depends on RTE_CB_MA1 && RTE_CB_MULTI - default n - - config RTE_MB_A_PCI - bool "Mother-A PCI support" - depends on RTE_CB - default y - - # The GBUS is used to talk to the RTE-MOTHER-A board - config RTE_GBUS_INT - bool - depends on RTE_MB_A_PCI - default y - - # The only PCI bus we support is on the RTE-MOTHER-A board - config PCI - bool - default RTE_MB_A_PCI - - #### Some feature-specific configs - - # Everything except for the GDB simulator uses the same interrupt controller - config V850E_INTC - bool - default !V850E_SIM - - # Everything except for the various simulators uses the "Timer D" unit - config V850E_TIMER_D - bool - default !V850E_SIM && !V850E2_SIM85E2 - - # Cache control used on some v850e1 processors - config V850E_CACHE - bool - default V850E_TEG || V850E_ME2 - - # Cache control used on v850e2 processors; I think this should - # actually apply to more, but currently only the SIM85E2S uses it - config V850E2_CACHE - bool - default V850E2_SIM85E2S - - config NO_CACHE - bool - default !V850E_CACHE && !V850E2_CACHE - - # HZ depends on the platform - config HZ - int - default 24 if V850E_SIM || V850E2_SIM85E2 - default 122 if V850E2_FPGA85E2C - default 100 - - #### Misc config - - config ROM_KERNEL - bool "Kernel in ROM" - depends on V850E2_ANNA || V850E_AS85EP1 || RTE_CB_ME2 - - # Some platforms pre-zero memory, in which case the kernel doesn't need to - config ZERO_BSS - bool - depends on !V850E2_SIM85E2C - default y - - # The crappy-ass zone allocator requires that the start of allocatable - # memory be aligned to the largest possible allocation. - config FORCE_MAX_ZONEORDER - int - default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C - - config V850E_HIGHRES_TIMER - bool "High resolution timer support" - depends on V850E_TIMER_D - config TIME_BOOTUP - bool "Time bootup" - depends on V850E_HIGHRES_TIMER - - config RESET_GUARD - bool "Reset Guard" - -source "mm/Kconfig" - -endmenu - - -############################################################################# - -source init/Kconfig - -############################################################################# - -menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" - -# config PCI -# bool "PCI support" -# help -# Support for PCI bus. - -source "drivers/pci/Kconfig" - -source "drivers/pcmcia/Kconfig" - -source "drivers/pci/hotplug/Kconfig" - -endmenu - -menu "Executable file formats" - -source "fs/Kconfig.binfmt" - -endmenu - -source "net/Kconfig" - -############################################################################# - -source "drivers/base/Kconfig" - -source drivers/mtd/Kconfig - -source drivers/parport/Kconfig - -#source drivers/pnp/Kconfig - -source drivers/block/Kconfig - -############################################################################# - -menu "Disk device support" - -source "drivers/ide/Kconfig" - -source "drivers/scsi/Kconfig" - -endmenu - -############################################################################# - - -source "drivers/md/Kconfig" - -source "drivers/message/fusion/Kconfig" - -source "drivers/ieee1394/Kconfig" - -source "drivers/message/i2o/Kconfig" - -source "drivers/net/Kconfig" - -source "drivers/isdn/Kconfig" - -#source "drivers/telephony/Kconfig" - -# -# input before char - char/joystick depends on it. As does USB. -# -source "drivers/input/Kconfig" - -source "drivers/char/Kconfig" - -#source drivers/misc/Config.in -source "drivers/media/Kconfig" - -source "fs/Kconfig" - -source "drivers/video/Kconfig" - -source "sound/Kconfig" - -source "drivers/usb/Kconfig" - -source "arch/v850/Kconfig.debug" - -source "security/Kconfig" - -source "crypto/Kconfig" - -source "lib/Kconfig" - -############################################################################# diff --git a/arch/v850/Kconfig.debug b/arch/v850/Kconfig.debug deleted file mode 100644 index 4acfb9cca1ca6678f1cc6a2634661af35ed149e1..0000000000000000000000000000000000000000 --- a/arch/v850/Kconfig.debug +++ /dev/null @@ -1,10 +0,0 @@ -menu "Kernel hacking" - -source "lib/Kconfig.debug" - -config NO_KERNEL_MSG - bool "Suppress Kernel BUG Messages" - help - Do not output any debug BUG messages within the kernel. - -endmenu diff --git a/arch/v850/Makefile b/arch/v850/Makefile deleted file mode 100644 index 8b629df0029a79e48dc9b2b80c4c7e425067395b..0000000000000000000000000000000000000000 --- a/arch/v850/Makefile +++ /dev/null @@ -1,54 +0,0 @@ -# -# arch/v850/Makefile -# -# Copyright (C) 2001,02,03,05 NEC Corporation -# Copyright (C) 2001,02,03,05 Miles Bader -# -# This file is included by the global makefile so that you can add your own -# architecture-specific flags and dependencies. Remember to do have actions -# for "archclean" and "archdep" for cleaning up and making dependencies for -# this architecture -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# - -arch_dir = arch/v850 - -KBUILD_CFLAGS += -mv850e -# r16 is a fixed pointer to the current task -KBUILD_CFLAGS += -ffixed-r16 -mno-prolog-function -KBUILD_CFLAGS += -fno-builtin -KBUILD_CFLAGS += -D__linux__ -DUTS_SYSNAME=\"uClinux\" - -# By default, build a kernel that runs on the gdb v850 simulator. -KBUILD_DEFCONFIG := sim_defconfig - -# This prevents the linker from consolidating the .gnu.linkonce.this_module -# section into .text (which the v850 default linker script for -r does for -# some reason) -LDFLAGS_MODULE += --unique=.gnu.linkonce.this_module - -OBJCOPY_FLAGS_BLOB := -I binary -O elf32-little -B v850e - - -head-y := $(arch_dir)/kernel/head.o $(arch_dir)/kernel/init_task.o -core-y += $(arch_dir)/kernel/ -libs-y += $(arch_dir)/lib/ - - -# Deal with the initial contents of the root device -ifdef ROOT_FS_IMAGE -core-y += root_fs_image.o - -# Because the kernel build-system erases all explicit .o build rules, we -# have to use an intermediate target to fool it into building for us. -# This results in it being built anew each time, but that's alright. -root_fs_image.o: root_fs_image_force - -root_fs_image_force: $(ROOT_FS_IMAGE) - $(OBJCOPY) $(OBJCOPY_FLAGS_BLOB) --rename-section .data=.root,alloc,load,readonly,data,contents $< root_fs_image.o -endif - -CLEAN_FILES += root_fs_image.o diff --git a/arch/v850/README b/arch/v850/README deleted file mode 100644 index 12f7f7a665e0175473ee15ff82f3e3fec7dbc47d..0000000000000000000000000000000000000000 --- a/arch/v850/README +++ /dev/null @@ -1,44 +0,0 @@ -This port to the NEC V850E processor supports the following platforms: - - "sim" - The gdb v850e simulator (CONFIG_V850E_SIM). - - "rte-ma1-cb" - The Midas labs RTE-V850E/MA1-CB and RTE-V850E/NB85E-CB evaluation - boards (CONFIG_RTE_CB_MA1 and CONFIG_RTE_CB_NB85E). This support - has only been tested when running with the Multi-debugger monitor - ROM (for the Green Hills Multi debugger). The optional NEC - Solution Gear RTE-MOTHER-A motherboard is also supported, which - allows PCI boards to be used (CONFIG_RTE_MB_A_PCI). - - "rte-me2-cb" - The Midas labs RTE-V850E/ME2-CB evaluation board (CONFIG_RTE_CB_ME2). - This has only been tested using a kernel downloaded via an ICE - connection using the Multi debugger. Support for the RTE-MOTHER-A is - present, but hasn't been tested (unlike the other Midas labs cpu - boards, the RTE-V850E/ME2-CB includes an ethernet adaptor). - - "as85ep1" - The NEC AS85EP1 V850E evaluation chip/board (CONFIG_V850E_AS85EP1). - - "anna" - The NEC `Anna' (board/chip) implementation of the V850E2 processor - (CONFIG_V850E2_ANNA). - - "sim85e2c", "sim85e2s" - The sim85e2c and sim85e2s simulators, which are verilog simulations - of the V850E2 NA85E2C/NA85E2S cpu cores (CONFIG_V850E2_SIM85E2C and - CONFIG_V850E2_SIM85E2S). - - "fpga85e2c" - A FPGA implementation of the V850E2 NA85E2C cpu core - (CONFIG_V850E2_FPGA85E2C). - -To get a default kernel configuration for a particular platform, you can -use a _defconfig make target (e.g., "make rte-me2-cb_defconfig"); -to see which default configurations are possible, look in the directory -"arch/v850/configs". - -Porting to anything with a V850E/MA1 or MA2 processor should be simple. -See the file and the files it includes for an example of -how to add platform/chip-specific support. diff --git a/arch/v850/configs/rte-ma1-cb_defconfig b/arch/v850/configs/rte-ma1-cb_defconfig deleted file mode 100644 index 1a5beda36e29e91a8e9edad4633f80d00970abca..0000000000000000000000000000000000000000 --- a/arch/v850/configs/rte-ma1-cb_defconfig +++ /dev/null @@ -1,617 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-uc0 -# Fri Sep 2 13:54:27 2005 -# -# CONFIG_MMU is not set -# CONFIG_UID16 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_ISA is not set -# CONFIG_ISAPNP is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -CONFIG_V850=y - -# -# Processor type and features -# -# CONFIG_V850E_SIM is not set -CONFIG_RTE_CB_MA1=y -# CONFIG_RTE_CB_NB85E is not set -# CONFIG_RTE_CB_ME2 is not set -# CONFIG_V850E_AS85EP1 is not set -# CONFIG_V850E2_SIM85E2C is not set -# CONFIG_V850E2_SIM85E2S is not set -# CONFIG_V850E2_FPGA85E2C is not set -# CONFIG_V850E2_ANNA is not set -CONFIG_V850E=y -CONFIG_V850E_MA1=y -CONFIG_RTE_CB=y -CONFIG_RTE_CB_MULTI=y -CONFIG_RTE_CB_MULTI_DBTRAP=y -# CONFIG_RTE_CB_MA1_KSRAM is not set -CONFIG_RTE_MB_A_PCI=y -CONFIG_RTE_GBUS_INT=y -CONFIG_PCI=y -CONFIG_V850E_INTC=y -CONFIG_V850E_TIMER_D=y -# CONFIG_V850E_CACHE is not set -# CONFIG_V850E2_CACHE is not set -CONFIG_NO_CACHE=y -CONFIG_ZERO_BSS=y -# CONFIG_V850E_HIGHRES_TIMER is not set -# CONFIG_RESET_GUARD is not set -CONFIG_LARGE_ALLOCS=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -# CONFIG_AUDIT is not set -# CONFIG_HOTPLUG is not set -CONFIG_KOBJECT_UEVENT=y -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_BASE_FULL is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_BASE_SMALL=1 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) -# -# CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set -# CONFIG_PCI_DEBUG is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_FLAT=y -# CONFIG_BINFMT_ZFLAT is not set -# CONFIG_BINFMT_SHARED_FLAT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Networking -# -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -# CONFIG_UNIX is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_IP_TCPDIAG is not set -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_PARTITIONS is not set - -# -# User Modules And Translation Layers -# -# CONFIG_MTD_CHAR is not set -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -CONFIG_MTD_SLRAM=y -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_ATA_OVER_ETH is not set - -# -# Disk device support -# - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# -# CONFIG_IEEE1394 is not set - -# -# I2O device support -# -# CONFIG_I2O is not set - -# -# Network device support -# -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set - -# -# ARCnet devices -# -# CONFIG_ARCNET is not set - -# -# Ethernet (10 or 100Mbit) -# -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_NET_VENDOR_SMC is not set - -# -# Tulip family network device support -# -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_NE2000 is not set -CONFIG_NET_PCI=y -# CONFIG_PCNET32 is not set -# CONFIG_AMD8111_ETH is not set -# CONFIG_ADAPTEC_STARFIRE is not set -# CONFIG_DGRS is not set -CONFIG_EEPRO100=y -# CONFIG_E100 is not set -# CONFIG_FEALNX is not set -# CONFIG_NATSEMI is not set -# CONFIG_NE2K_PCI is not set -# CONFIG_8139TOO is not set -# CONFIG_SIS900 is not set -# CONFIG_EPIC100 is not set -# CONFIG_SUNDANCE is not set -# CONFIG_TLAN is not set -# CONFIG_VIA_RHINE is not set - -# -# Ethernet (1000 Mbit) -# -# CONFIG_ACENIC is not set -# CONFIG_DL2K is not set -# CONFIG_E1000 is not set -# CONFIG_NS83820 is not set -# CONFIG_HAMACHI is not set -# CONFIG_R8169 is not set -# CONFIG_SK98LIN is not set -# CONFIG_VIA_VELOCITY is not set -# CONFIG_TIGON3 is not set -# CONFIG_BNX2 is not set - -# -# Ethernet (10000 Mbit) -# -# CONFIG_IXGB is not set -# CONFIG_S2IO is not set - -# -# Token Ring devices -# -# CONFIG_TR is not set - -# -# Wireless LAN (non-hamradio) -# -# CONFIG_NET_RADIO is not set - -# -# Wan interfaces -# -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_V850E_UART=y -CONFIG_V850E_UART_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# -# CONFIG_DVB is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -CONFIG_ROMFS_FS=y -# CONFIG_MAGIC_ROM_PTR is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_SYSFS=y -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_HFSPLUS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_NO_KERNEL_MSG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set diff --git a/arch/v850/configs/rte-me2-cb_defconfig b/arch/v850/configs/rte-me2-cb_defconfig deleted file mode 100644 index 15e66647806129086517246af4450612ba6bd971..0000000000000000000000000000000000000000 --- a/arch/v850/configs/rte-me2-cb_defconfig +++ /dev/null @@ -1,462 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-uc0 -# Fri Sep 2 13:47:50 2005 -# -# CONFIG_MMU is not set -# CONFIG_UID16 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_ISA is not set -# CONFIG_ISAPNP is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -CONFIG_V850=y - -# -# Processor type and features -# -# CONFIG_V850E_SIM is not set -# CONFIG_RTE_CB_MA1 is not set -# CONFIG_RTE_CB_NB85E is not set -CONFIG_RTE_CB_ME2=y -# CONFIG_V850E_AS85EP1 is not set -# CONFIG_V850E2_SIM85E2C is not set -# CONFIG_V850E2_SIM85E2S is not set -# CONFIG_V850E2_FPGA85E2C is not set -# CONFIG_V850E2_ANNA is not set -CONFIG_V850E=y -CONFIG_V850E_ME2=y -CONFIG_RTE_CB=y -# CONFIG_RTE_MB_A_PCI is not set -# CONFIG_PCI is not set -CONFIG_V850E_INTC=y -CONFIG_V850E_TIMER_D=y -CONFIG_V850E_CACHE=y -# CONFIG_V850E2_CACHE is not set -# CONFIG_NO_CACHE is not set -# CONFIG_ROM_KERNEL is not set -CONFIG_ZERO_BSS=y -# CONFIG_V850E_HIGHRES_TIMER is not set -# CONFIG_RESET_GUARD is not set -CONFIG_LARGE_ALLOCS=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_BASE_FULL is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_BASE_SMALL=1 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) -# - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_FLAT=y -# CONFIG_BINFMT_ZFLAT is not set -# CONFIG_BINFMT_SHARED_FLAT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Networking -# -# CONFIG_NET is not set - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_PARTITIONS is not set - -# -# User Modules And Translation Layers -# -# CONFIG_MTD_CHAR is not set -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -CONFIG_MTD_SLRAM=y -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set - -# -# Disk device support -# - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_NR_UARTS=1 -# CONFIG_SERIAL_8250_EXTENDED is not set - -# -# Non-8250 serial port support -# -# CONFIG_V850E_UART is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -CONFIG_ROMFS_FS=y -# CONFIG_MAGIC_ROM_PTR is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_SYSFS=y -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_HFSPLUS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_NO_KERNEL_MSG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set diff --git a/arch/v850/configs/sim_defconfig b/arch/v850/configs/sim_defconfig deleted file mode 100644 index f31ba7398ad009f6499c389bab3be5dc0de23efc..0000000000000000000000000000000000000000 --- a/arch/v850/configs/sim_defconfig +++ /dev/null @@ -1,451 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-uc0 -# Fri Sep 2 13:36:43 2005 -# -# CONFIG_MMU is not set -# CONFIG_UID16 is not set -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y -# CONFIG_ISA is not set -# CONFIG_ISAPNP is not set -# CONFIG_EISA is not set -# CONFIG_MCA is not set -CONFIG_V850=y - -# -# Processor type and features -# -CONFIG_V850E_SIM=y -# CONFIG_RTE_CB_MA1 is not set -# CONFIG_RTE_CB_NB85E is not set -# CONFIG_RTE_CB_ME2 is not set -# CONFIG_V850E_AS85EP1 is not set -# CONFIG_V850E2_SIM85E2C is not set -# CONFIG_V850E2_SIM85E2S is not set -# CONFIG_V850E2_FPGA85E2C is not set -# CONFIG_V850E2_ANNA is not set -CONFIG_V850E=y -# CONFIG_PCI is not set -# CONFIG_V850E_INTC is not set -# CONFIG_V850E_TIMER_D is not set -# CONFIG_V850E_CACHE is not set -# CONFIG_V850E2_CACHE is not set -CONFIG_NO_CACHE=y -CONFIG_ZERO_BSS=y -# CONFIG_RESET_GUARD is not set -CONFIG_LARGE_ALLOCS=y -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y - -# -# Code maturity level options -# -# CONFIG_EXPERIMENTAL is not set -CONFIG_CLEAN_COMPILE=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# -CONFIG_LOCALVERSION="" -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_SYSCTL is not set -# CONFIG_HOTPLUG is not set -# CONFIG_IKCONFIG is not set -CONFIG_EMBEDDED=y -# CONFIG_KALLSYMS is not set -CONFIG_PRINTK=y -CONFIG_BUG=y -# CONFIG_BASE_FULL is not set -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CC_ALIGN_FUNCTIONS=0 -CONFIG_CC_ALIGN_LABELS=0 -CONFIG_CC_ALIGN_LOOPS=0 -CONFIG_CC_ALIGN_JUMPS=0 -CONFIG_BASE_SMALL=1 - -# -# Loadable module support -# -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -CONFIG_OBSOLETE_MODPARM=y -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y - -# -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) -# - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set - -# -# PCI Hotplug Support -# - -# -# Executable file formats -# -CONFIG_BINFMT_FLAT=y -# CONFIG_BINFMT_ZFLAT is not set -# CONFIG_BINFMT_SHARED_FLAT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Networking -# -# CONFIG_NET is not set - -# -# Generic Driver Options -# -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -# CONFIG_FW_LOADER is not set -# CONFIG_DEBUG_DRIVER is not set - -# -# Memory Technology Devices (MTD) -# -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -# CONFIG_MTD_PARTITIONS is not set - -# -# User Modules And Translation Layers -# -# CONFIG_MTD_CHAR is not set -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set - -# -# RAM/ROM/Flash chip drivers -# -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -CONFIG_MTD_SLRAM=y -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLKMTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set - -# -# NAND Flash Device Drivers -# -# CONFIG_MTD_NAND is not set - -# -# Parallel port support -# -# CONFIG_PARPORT is not set - -# -# Block devices -# -# CONFIG_BLK_DEV_FD is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_RAM is not set -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_CDROM_PKTCDVD is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set - -# -# Disk device support -# - -# -# ATA/ATAPI/MFM/RLL support -# -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_SCSI is not set - -# -# Multi-device support (RAID and LVM) -# -# CONFIG_MD is not set - -# -# Fusion MPT device support -# -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# I2O device support -# - -# -# Network device support -# -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set - -# -# ISDN subsystem -# - -# -# Input device support -# -CONFIG_INPUT=y - -# -# Userland interfaces -# -# CONFIG_INPUT_MOUSEDEV is not set -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -# CONFIG_UNIX98_PTYS is not set -# CONFIG_LEGACY_PTYS is not set - -# -# IPMI -# -# CONFIG_IPMI_HANDLER is not set - -# -# Watchdog Cards -# -# CONFIG_WATCHDOG is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set - -# -# Ftape, the floppy tape device driver -# -# CONFIG_RAW_DRIVER is not set - -# -# TPM devices -# - -# -# Multimedia devices -# -# CONFIG_VIDEO_DEV is not set - -# -# Digital Video Broadcasting Devices -# - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_JBD is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# -# CONFIG_XFS_FS is not set -# CONFIG_MINIX_FS is not set -CONFIG_ROMFS_FS=y -# CONFIG_MAGIC_ROM_PTR is not set -CONFIG_INOTIFY=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_SYSFS=y -# CONFIG_TMPFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_RAMFS=y - -# -# Miscellaneous filesystems -# -# CONFIG_HFSPLUS_FS is not set -# CONFIG_JFFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# -# CONFIG_NLS is not set - -# -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set - -# -# USB Gadget Support -# -# CONFIG_USB_GADGET is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_MAGIC_SYSRQ is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_SCHEDSTATS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_INFO=y -# CONFIG_DEBUG_FS is not set -# CONFIG_NO_KERNEL_MSG is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set - -# -# Cryptographic options -# -# CONFIG_CRYPTO is not set - -# -# Hardware crypto devices -# - -# -# Library routines -# -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC32 is not set -# CONFIG_LIBCRC32C is not set diff --git a/arch/v850/kernel/Makefile b/arch/v850/kernel/Makefile deleted file mode 100644 index da5889c535765a4413141d59d4ae21b5ec31ac5a..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/Makefile +++ /dev/null @@ -1,40 +0,0 @@ -# -# arch/v850/kernel/Makefile -# -# Copyright (C) 2001,02,03 NEC Electronics Corporation -# Copyright (C) 2001,02,03 Miles Bader -# -# This file is subject to the terms and conditions of the GNU General Public -# License. See the file "COPYING" in the main directory of this archive -# for more details. -# - -extra-y := head.o init_task.o vmlinux.lds - -obj-y += intv.o entry.o process.o syscalls.o time.o setup.o \ - signal.o irq.o mach.o ptrace.o bug.o -obj-$(CONFIG_MODULES) += module.o v850_ksyms.o -# chip-specific code -obj-$(CONFIG_V850E_MA1) += ma.o -obj-$(CONFIG_V850E_ME2) += me2.o -obj-$(CONFIG_V850E_TEG) += teg.o -obj-$(CONFIG_V850E_AS85EP1) += as85ep1.o -obj-$(CONFIG_V850E2_ANNA) += anna.o -# platform-specific code -obj-$(CONFIG_V850E_SIM) += sim.o simcons.o -obj-$(CONFIG_V850E2_SIM85E2) += sim85e2.o memcons.o -obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o memcons.o -obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o -obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o -obj-$(CONFIG_RTE_CB_ME2) += rte_me2_cb.o -obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o -obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o -obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o -obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o -# feature-specific code -obj-$(CONFIG_V850E_INTC) += v850e_intc.o -obj-$(CONFIG_V850E_TIMER_D) += v850e_timer_d.o v850e_utils.o -obj-$(CONFIG_V850E_CACHE) += v850e_cache.o -obj-$(CONFIG_V850E2_CACHE) += v850e2_cache.o -obj-$(CONFIG_V850E_HIGHRES_TIMER) += highres_timer.o -obj-$(CONFIG_PROC_FS) += procfs.o diff --git a/arch/v850/kernel/anna-rom.ld b/arch/v850/kernel/anna-rom.ld deleted file mode 100644 index 7c54e7e3f1b1ad95b11ad964fae37de317924c19..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/anna-rom.ld +++ /dev/null @@ -1,16 +0,0 @@ -/* Linker script for the Midas labs Anna V850E2 evaluation board - (CONFIG_V850E2_ANNA), with kernel in ROM (CONFIG_ROM_KERNEL). */ - -MEMORY { - /* 8MB of flash ROM. */ - ROM : ORIGIN = 0, LENGTH = 0x00800000 - - /* 1MB of static RAM. This memory is mirrored 64 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - /* 64MB of DRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - ROMK_SECTIONS(ROM, SRAM) -} diff --git a/arch/v850/kernel/anna.c b/arch/v850/kernel/anna.c deleted file mode 100644 index 5978a25170fb44aa7986be9202abe7527f39787b..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/anna.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * arch/v850/kernel/anna.c -- Anna V850E2 evaluation chip/board - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "mach.h" - - -/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see - mach_reserve_bootmem for details); use both as one big area. */ -#define RAM_START SRAM_ADDR -#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) - -/* The bits of this port are connected to an 8-LED bar-graph. */ -#define LEDS_PORT 0 - - -static void anna_led_tick (void); - - -void __init mach_early_init (void) -{ - ANNA_ILBEN = 0; - - V850E2_CSC(0) = 0x402F; - V850E2_CSC(1) = 0x4000; - V850E2_BPC = 0; - V850E2_BSC = 0xAAAA; - V850E2_BEC = 0; - -#if 0 - V850E2_BHC = 0xFFFF; /* icache all memory, dcache all */ -#else - V850E2_BHC = 0; /* cache no memory */ -#endif - V850E2_BCT(0) = 0xB088; - V850E2_BCT(1) = 0x0008; - V850E2_DWC(0) = 0x0027; - V850E2_DWC(1) = 0; - V850E2_BCC = 0x0006; - V850E2_ASC = 0; - V850E2_LBS = 0x0089; - V850E2_SCR(3) = 0x21A9; - V850E2_RFS(3) = 0x8121; - - v850e_intc_disable_irqs (); -} - -void __init mach_setup (char **cmdline) -{ - ANNA_PORT_PM (LEDS_PORT) = 0; /* Make all LED pins output pins. */ - mach_tick = anna_led_tick; -} - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - *ram_start = RAM_START; - *ram_len = RAM_END - RAM_START; -} - -void __init mach_reserve_bootmem () -{ - /* The space between SRAM and SDRAM is filled with duplicate - images of SRAM. Prevent the kernel from using them. */ - reserve_bootmem (SRAM_ADDR + SRAM_SIZE, - SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE), - BOOTMEM_DEFAULT); -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Start hardware timer. */ - v850e_timer_d_configure (0, HZ); - /* Install timer interrupt handler. */ - setup_irq (IRQ_INTCMD(0), timer_action); -} - -static struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, - { "PIN", IRQ_INTP(0), IRQ_INTP_NUM, 1, 4 }, - { "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 }, - { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, - { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 }, - { "DMXER", IRQ_INTDMXER,1, 1, 2 }, - { "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 }, - { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 }, - { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -void __init mach_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - -void machine_restart (char *__unused) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - asm ("jmp r0"); /* Jump to the reset vector. */ -} - -void machine_halt (void) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - local_irq_disable (); /* Ignore all interrupts. */ - ANNA_PORT_IO(LEDS_PORT) = 0xAA; /* Note that we halted. */ - for (;;) - asm ("halt; nop; nop; nop; nop; nop"); -} - -void machine_power_off (void) -{ - machine_halt (); -} - -/* Called before configuring an on-chip UART. */ -void anna_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) -{ - /* The Anna connects some general-purpose I/O pins on the CPU to - the RTS/CTS lines of UART 1's serial connection. I/O pins P07 - and P37 are RTS and CTS respectively. */ - if (chan == 1) { - ANNA_PORT_PM(0) &= ~0x80; /* P07 in output mode */ - ANNA_PORT_PM(3) |= 0x80; /* P37 in input mode */ - } -} - -/* Minimum and maximum bounds for the moving upper LED boundary in the - clock tick display. We can't use the last bit because it's used for - UART0's CTS output. */ -#define MIN_MAX_POS 0 -#define MAX_MAX_POS 6 - -/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if - we pick 6 and 0 as above, we get 49 cycles, which is when divided into - the standard 100 value for HZ, gives us an almost 1s total time. */ -#define TICKS_PER_FRAME \ - (HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS)) - -static void anna_led_tick () -{ - static unsigned counter = 0; - - if (++counter == TICKS_PER_FRAME) { - static int pos = 0, max_pos = MAX_MAX_POS, dir = 1; - - if (dir > 0 && pos == max_pos) { - dir = -1; - if (max_pos == MIN_MAX_POS) - max_pos = MAX_MAX_POS; - else - max_pos--; - } else { - if (dir < 0 && pos == 0) - dir = 1; - - if (pos + dir <= max_pos) { - /* Each bit of port 0 has a LED. */ - clear_bit (pos, &ANNA_PORT_IO(LEDS_PORT)); - pos += dir; - set_bit (pos, &ANNA_PORT_IO(LEDS_PORT)); - } - } - - counter = 0; - } -} diff --git a/arch/v850/kernel/anna.ld b/arch/v850/kernel/anna.ld deleted file mode 100644 index df7f80f2833d3e207884f8403f558096e6a33e50..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/anna.ld +++ /dev/null @@ -1,20 +0,0 @@ -/* Linker script for the Midas labs Anna V850E2 evaluation board - (CONFIG_V850E2_ANNA). */ - -MEMORY { - /* 256KB of internal memory (followed by one mirror). */ - iMEM0 : ORIGIN = 0, LENGTH = 0x00040000 - /* 256KB of internal memory (followed by one mirror). */ - iMEM1 : ORIGIN = 0x00040000, LENGTH = 0x00040000 - - /* 1MB of static RAM. This memory is mirrored 64 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - /* 64MB of DRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - .intv : { INTV_CONTENTS } > iMEM0 - .sram : { RAMK_KRAM_CONTENTS } > SRAM - .root : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/as85ep1-rom.ld b/arch/v850/kernel/as85ep1-rom.ld deleted file mode 100644 index fe2a9a3ab525adba004845735b5baf7213236d4a..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/as85ep1-rom.ld +++ /dev/null @@ -1,21 +0,0 @@ -/* Linker script for the NEC AS85EP1 V850E evaluation board - (CONFIG_V850E_AS85EP1), with kernel in ROM (CONFIG_ROM_KERNEL). */ - -MEMORY { - /* 4MB of flash ROM. */ - ROM : ORIGIN = 0, LENGTH = 0x00400000 - - /* 1MB of static RAM. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - - /* About 58MB of DRAM. This can actually be at one of two - positions, determined by jumper JP3; we have to use the first - position because the second is partially out of processor - instruction addressing range (though in the second position - there's actually 64MB available). */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - ROMK_SECTIONS(ROM, SRAM) -} diff --git a/arch/v850/kernel/as85ep1.c b/arch/v850/kernel/as85ep1.c deleted file mode 100644 index b525ecf3aea49c4cd6707f2a8c53e447caf81693..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/as85ep1.c +++ /dev/null @@ -1,234 +0,0 @@ -/* - * arch/v850/kernel/as85ep1.c -- AS85EP1 V850E evaluation chip/board - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "mach.h" - - -/* SRAM and SDRAM are vaguely contiguous (with a big hole in between; see - mach_reserve_bootmem for details); use both as one big area. */ -#define RAM_START SRAM_ADDR -#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) - -/* The bits of this port are connected to an 8-LED bar-graph. */ -#define LEDS_PORT 4 - - -static void as85ep1_led_tick (void); - -extern char _intv_copy_src_start, _intv_copy_src_end; -extern char _intv_copy_dst_start; - - -void __init mach_early_init (void) -{ -#ifndef CONFIG_ROM_KERNEL - const u32 *src; - register u32 *dst asm ("ep"); -#endif - - AS85EP1_CSC(0) = 0x0403; - AS85EP1_BCT(0) = 0xB8B8; - AS85EP1_DWC(0) = 0x0104; - AS85EP1_BCC = 0x0012; - AS85EP1_ASC = 0; - AS85EP1_LBS = 0x00A9; - - AS85EP1_PORT_PMC(6) = 0xFF; /* valid A0,A1,A20-A25 */ - AS85EP1_PORT_PMC(7) = 0x0E; /* valid CS1-CS3 */ - AS85EP1_PORT_PMC(9) = 0xFF; /* valid D16-D23 */ - AS85EP1_PORT_PMC(10) = 0xFF; /* valid D24-D31 */ - - AS85EP1_RFS(1) = 0x800c; - AS85EP1_RFS(3) = 0x800c; - AS85EP1_SCR(1) = 0x20A9; - AS85EP1_SCR(3) = 0x20A9; - -#ifndef CONFIG_ROM_KERNEL - /* The early chip we have is buggy, and writing the interrupt - vectors into low RAM may screw up, so for non-ROM kernels, we - only rely on the reset vector being downloaded, and copy the - rest of the interrupt vectors into place here. The specific bug - is that writing address N, where (N & 0x10) == 0x10, will _also_ - write to address (N - 0x10). We avoid this (effectively) by - writing in 16-byte chunks backwards from the end. */ - - AS85EP1_IRAMM = 0x3; /* "write-mode" for the internal instruction memory */ - - src = (u32 *)(((u32)&_intv_copy_src_end - 1) & ~0xF); - dst = (u32 *)&_intv_copy_dst_start - + (src - (u32 *)&_intv_copy_src_start); - do { - u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3]; - dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; - dst -= 4; - src -= 4; - } while (src > (u32 *)&_intv_copy_src_start); - - AS85EP1_IRAMM = 0x0; /* "read-mode" for the internal instruction memory */ -#endif /* !CONFIG_ROM_KERNEL */ - - v850e_intc_disable_irqs (); -} - -void __init mach_setup (char **cmdline) -{ - AS85EP1_PORT_PMC (LEDS_PORT) = 0; /* Make the LEDs port an I/O port. */ - AS85EP1_PORT_PM (LEDS_PORT) = 0; /* Make all the bits output pins. */ - mach_tick = as85ep1_led_tick; -} - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - *ram_start = RAM_START; - *ram_len = RAM_END - RAM_START; -} - -/* Convenience macros. */ -#define SRAM_END (SRAM_ADDR + SRAM_SIZE) -#define SDRAM_END (SDRAM_ADDR + SDRAM_SIZE) - -void __init mach_reserve_bootmem () -{ - if (SDRAM_ADDR < RAM_END && SDRAM_ADDR > RAM_START) - /* We can't use the space between SRAM and SDRAM, so - prevent the kernel from trying. */ - reserve_bootmem(SRAM_END, SDRAM_ADDR - SRAM_END, - BOOTMEM_DEFAULT); -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Start hardware timer. */ - v850e_timer_d_configure (0, HZ); - /* Install timer interrupt handler. */ - setup_irq (IRQ_INTCMD(0), timer_action); -} - -static struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, - { "CCC", IRQ_INTCCC(0), IRQ_INTCCC_NUM, 1, 5 }, - { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, - { "SRE", IRQ_INTSRE(0), IRQ_INTSRE_NUM, 3, 3 }, - { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 3, 4 }, - { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 3, 5 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -void __init mach_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - -void machine_restart (char *__unused) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - asm ("jmp r0"); /* Jump to the reset vector. */ -} - -void machine_halt (void) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - local_irq_disable (); /* Ignore all interrupts. */ - AS85EP1_PORT_IO (LEDS_PORT) = 0xAA; /* Note that we halted. */ - for (;;) - asm ("halt; nop; nop; nop; nop; nop"); -} - -void machine_power_off (void) -{ - machine_halt (); -} - -/* Called before configuring an on-chip UART. */ -void as85ep1_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) -{ - /* Make the shared uart/port pins be uart pins. */ - AS85EP1_PORT_PMC(3) |= (0x5 << chan); - - /* The AS85EP1 connects some general-purpose I/O pins on the CPU to - the RTS/CTS lines of UART 1's serial connection. I/O pins P53 - and P54 are RTS and CTS respectively. */ - if (chan == 1) { - /* Put P53 & P54 in I/O port mode. */ - AS85EP1_PORT_PMC(5) &= ~0x18; - /* Make P53 an output, and P54 an input. */ - AS85EP1_PORT_PM(5) |= 0x10; - } -} - -/* Minimum and maximum bounds for the moving upper LED boundary in the - clock tick display. */ -#define MIN_MAX_POS 0 -#define MAX_MAX_POS 7 - -/* There are MAX_MAX_POS^2 - MIN_MAX_POS^2 cycles in the animation, so if - we pick 6 and 0 as above, we get 49 cycles, which is when divided into - the standard 100 value for HZ, gives us an almost 1s total time. */ -#define TICKS_PER_FRAME \ - (HZ / (MAX_MAX_POS * MAX_MAX_POS - MIN_MAX_POS * MIN_MAX_POS)) - -static void as85ep1_led_tick () -{ - static unsigned counter = 0; - - if (++counter == TICKS_PER_FRAME) { - static int pos = 0, max_pos = MAX_MAX_POS, dir = 1; - - if (dir > 0 && pos == max_pos) { - dir = -1; - if (max_pos == MIN_MAX_POS) - max_pos = MAX_MAX_POS; - else - max_pos--; - } else { - if (dir < 0 && pos == 0) - dir = 1; - - if (pos + dir <= max_pos) { - /* Each bit of port 0 has a LED. */ - set_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT)); - pos += dir; - clear_bit (pos, &AS85EP1_PORT_IO(LEDS_PORT)); - } - } - - counter = 0; - } -} diff --git a/arch/v850/kernel/as85ep1.ld b/arch/v850/kernel/as85ep1.ld deleted file mode 100644 index ef2c4399063e0bd187bdff7a59e2fac6ea18eaa8..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/as85ep1.ld +++ /dev/null @@ -1,49 +0,0 @@ -/* Linker script for the NEC AS85EP1 V850E evaluation board - (CONFIG_V850E_AS85EP1). */ - -MEMORY { - /* 1MB of internal instruction memory. */ - iMEM0 : ORIGIN = 0, LENGTH = 0x00100000 - - /* 1MB of static RAM. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - - /* About 58MB of DRAM. This can actually be at one of two - positions, determined by jump JP3; we have to use the first - position because the second is partially out of processor - instruction addressing range (though in the second position - there's actually 64MB available). */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - .resetv : { - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - } > iMEM0 - - .sram : { - RAMK_KRAM_CONTENTS - - /* We stick most of the interrupt vectors here; they'll be - copied into the proper location by the early init code (we - can't put them directly in the right place because of - hardware bugs). The vectors shouldn't need to be - relocated, so we don't have to use `> ... AT> ...' to - split the load/vm addresses (and we can't because of - problems with the loader). */ - . = ALIGN (0x10) ; - __intv_copy_src_start = . ; - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - . = ALIGN (0x10) ; - __intv_copy_src_end = . ; - } > SRAM - - /* Where we end up putting the vectors. */ - __intv_copy_dst_start = 0x10 ; - __intv_copy_dst_end = __intv_copy_dst_start + (__intv_copy_src_end - __intv_copy_src_start) ; - __intv_end = __intv_copy_dst_end ; - - .root : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/asm-offsets.c b/arch/v850/kernel/asm-offsets.c deleted file mode 100644 index 581e6986a7767cc994b1a09e9a7f529a2c25ad01..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/asm-offsets.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This program is used to generate definitions needed by - * assembly language modules. - * - * We use the technique used in the OSF Mach kernel code: - * generate asm statements containing #defines, - * compile this file to assembler, and then extract the - * #defines from the assembly-language output. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -int main (void) -{ - /* offsets into the task struct */ - DEFINE (TASK_STATE, offsetof (struct task_struct, state)); - DEFINE (TASK_FLAGS, offsetof (struct task_struct, flags)); - DEFINE (TASK_PTRACE, offsetof (struct task_struct, ptrace)); - DEFINE (TASK_BLOCKED, offsetof (struct task_struct, blocked)); - DEFINE (TASK_THREAD, offsetof (struct task_struct, thread)); - DEFINE (TASK_THREAD_INFO, offsetof (struct task_struct, stack)); - DEFINE (TASK_MM, offsetof (struct task_struct, mm)); - DEFINE (TASK_ACTIVE_MM, offsetof (struct task_struct, active_mm)); - DEFINE (TASK_PID, offsetof (struct task_struct, pid)); - - /* offsets into the kernel_stat struct */ - DEFINE (STAT_IRQ, offsetof (struct kernel_stat, irqs)); - - - /* signal defines */ - DEFINE (SIGSEGV, SIGSEGV); - DEFINE (SEGV_MAPERR, SEGV_MAPERR); - DEFINE (SIGTRAP, SIGTRAP); - DEFINE (SIGCHLD, SIGCHLD); - DEFINE (SIGILL, SIGILL); - DEFINE (TRAP_TRACE, TRAP_TRACE); - - /* ptrace flag bits */ - DEFINE (PT_PTRACED, PT_PTRACED); - DEFINE (PT_DTRACE, PT_DTRACE); - - /* error values */ - DEFINE (ENOSYS, ENOSYS); - - /* clone flag bits */ - DEFINE (CLONE_VFORK, CLONE_VFORK); - DEFINE (CLONE_VM, CLONE_VM); - - return 0; -} diff --git a/arch/v850/kernel/bug.c b/arch/v850/kernel/bug.c deleted file mode 100644 index c78cf750915a8a378ee67334cc021b406ec9c7c9..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/bug.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * arch/v850/kernel/bug.c -- Bug reporting functions - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -/* We should use __builtin_return_address, but it doesn't work in gcc-2.90 - (which is currently our standard compiler on the v850). */ -#define ret_addr() ({ register u32 lp asm ("lp"); lp; }) -#define stack_addr() ({ register u32 sp asm ("sp"); sp; }) - -void __bug () -{ - printk (KERN_CRIT "kernel BUG at PC 0x%x (SP ~0x%x)!\n", - ret_addr() - 4, /* - 4 for `jarl' */ - stack_addr()); - machine_halt (); -} - -int bad_trap (int trap_num, struct pt_regs *regs) -{ - printk (KERN_CRIT - "unimplemented trap %d called at 0x%08lx, pid %d!\n", - trap_num, regs->pc, current->pid); - return -ENOSYS; -} - -#ifdef CONFIG_RESET_GUARD -void unexpected_reset (unsigned long ret_addr, unsigned long kmode, - struct task_struct *task, unsigned long sp) -{ - printk (KERN_CRIT - "unexpected reset in %s mode, pid %d" - " (ret_addr = 0x%lx, sp = 0x%lx)\n", - kmode ? "kernel" : "user", - task ? task->pid : -1, - ret_addr, sp); - - machine_halt (); -} -#endif /* CONFIG_RESET_GUARD */ - - - -struct spec_reg_name { - const char *name; - int gpr; -}; - -struct spec_reg_name spec_reg_names[] = { - { "sp", GPR_SP }, - { "gp", GPR_GP }, - { "tp", GPR_TP }, - { "ep", GPR_EP }, - { "lp", GPR_LP }, - { 0, 0 } -}; - -void show_regs (struct pt_regs *regs) -{ - int gpr_base, gpr_offs; - - printk (" pc 0x%08lx psw 0x%08lx kernel_mode %d\n", - regs->pc, regs->psw, regs->kernel_mode); - printk (" ctpc 0x%08lx ctpsw 0x%08lx ctbp 0x%08lx\n", - regs->ctpc, regs->ctpsw, regs->ctbp); - - for (gpr_base = 0; gpr_base < NUM_GPRS; gpr_base += 4) { - for (gpr_offs = 0; gpr_offs < 4; gpr_offs++) { - int gpr = gpr_base + gpr_offs; - long val = regs->gpr[gpr]; - struct spec_reg_name *srn; - - for (srn = spec_reg_names; srn->name; srn++) - if (srn->gpr == gpr) - break; - - if (srn->name) - printk ("%7s 0x%08lx", srn->name, val); - else - printk (" r%02d 0x%08lx", gpr, val); - } - - printk ("\n"); - } -} - -/* - * TASK is a pointer to the task whose backtrace we want to see (or NULL - * for current task), SP is the stack pointer of the first frame that - * should be shown in the back trace (or NULL if the entire call-chain of - * the task should be shown). - */ -void show_stack (struct task_struct *task, unsigned long *sp) -{ - unsigned long addr, end; - - if (sp) - addr = (unsigned long)sp; - else if (task) - addr = task_sp (task); - else - addr = stack_addr (); - - addr = addr & ~3; - end = (addr + THREAD_SIZE - 1) & THREAD_MASK; - - while (addr < end) { - printk ("%8lX: ", addr); - while (addr < end) { - printk (" %8lX", *(unsigned long *)addr); - addr += sizeof (unsigned long); - if (! (addr & 0xF)) - break; - } - printk ("\n"); - } -} - -void dump_stack () -{ - show_stack (0, 0); -} - -EXPORT_SYMBOL(dump_stack); diff --git a/arch/v850/kernel/entry.S b/arch/v850/kernel/entry.S deleted file mode 100644 index e4327a8d6bcd0eb28244097c24f14a98638239d5..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/entry.S +++ /dev/null @@ -1,1121 +0,0 @@ -/* - * arch/v850/kernel/entry.S -- Low-level system-call handling, trap handlers, - * and context-switching - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include - - -/* Make a slightly more convenient alias for C_SYMBOL_NAME. */ -#define CSYM C_SYMBOL_NAME - - -/* The offset of the struct pt_regs in a state-save-frame on the stack. */ -#define PTO STATE_SAVE_PT_OFFSET - - -/* Save argument registers to the state-save-frame pointed to by EP. */ -#define SAVE_ARG_REGS \ - sst.w r6, PTO+PT_GPR(6)[ep]; \ - sst.w r7, PTO+PT_GPR(7)[ep]; \ - sst.w r8, PTO+PT_GPR(8)[ep]; \ - sst.w r9, PTO+PT_GPR(9)[ep] -/* Restore argument registers from the state-save-frame pointed to by EP. */ -#define RESTORE_ARG_REGS \ - sld.w PTO+PT_GPR(6)[ep], r6; \ - sld.w PTO+PT_GPR(7)[ep], r7; \ - sld.w PTO+PT_GPR(8)[ep], r8; \ - sld.w PTO+PT_GPR(9)[ep], r9 - -/* Save value return registers to the state-save-frame pointed to by EP. */ -#define SAVE_RVAL_REGS \ - sst.w r10, PTO+PT_GPR(10)[ep]; \ - sst.w r11, PTO+PT_GPR(11)[ep] -/* Restore value return registers from the state-save-frame pointed to by EP. */ -#define RESTORE_RVAL_REGS \ - sld.w PTO+PT_GPR(10)[ep], r10; \ - sld.w PTO+PT_GPR(11)[ep], r11 - - -#define SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ - sst.w r1, PTO+PT_GPR(1)[ep]; \ - sst.w r5, PTO+PT_GPR(5)[ep] -#define SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL \ - sst.w r12, PTO+PT_GPR(12)[ep]; \ - sst.w r13, PTO+PT_GPR(13)[ep]; \ - sst.w r14, PTO+PT_GPR(14)[ep]; \ - sst.w r15, PTO+PT_GPR(15)[ep]; \ - sst.w r16, PTO+PT_GPR(16)[ep]; \ - sst.w r17, PTO+PT_GPR(17)[ep]; \ - sst.w r18, PTO+PT_GPR(18)[ep]; \ - sst.w r19, PTO+PT_GPR(19)[ep] -#define RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS \ - sld.w PTO+PT_GPR(1)[ep], r1; \ - sld.w PTO+PT_GPR(5)[ep], r5 -#define RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL \ - sld.w PTO+PT_GPR(12)[ep], r12; \ - sld.w PTO+PT_GPR(13)[ep], r13; \ - sld.w PTO+PT_GPR(14)[ep], r14; \ - sld.w PTO+PT_GPR(15)[ep], r15; \ - sld.w PTO+PT_GPR(16)[ep], r16; \ - sld.w PTO+PT_GPR(17)[ep], r17; \ - sld.w PTO+PT_GPR(18)[ep], r18; \ - sld.w PTO+PT_GPR(19)[ep], r19 - -/* Save `call clobbered' registers to the state-save-frame pointed to by EP. */ -#define SAVE_CALL_CLOBBERED_REGS \ - SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ - SAVE_ARG_REGS; \ - SAVE_RVAL_REGS; \ - SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL -/* Restore `call clobbered' registers from the state-save-frame pointed to - by EP. */ -#define RESTORE_CALL_CLOBBERED_REGS \ - RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ - RESTORE_ARG_REGS; \ - RESTORE_RVAL_REGS; \ - RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL - -/* Save `call clobbered' registers except for the return-value registers - to the state-save-frame pointed to by EP. */ -#define SAVE_CALL_CLOBBERED_REGS_NO_RVAL \ - SAVE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ - SAVE_ARG_REGS; \ - SAVE_CALL_CLOBBERED_REGS_AFTER_RVAL -/* Restore `call clobbered' registers except for the return-value registers - from the state-save-frame pointed to by EP. */ -#define RESTORE_CALL_CLOBBERED_REGS_NO_RVAL \ - RESTORE_CALL_CLOBBERED_REGS_BEFORE_ARGS; \ - RESTORE_ARG_REGS; \ - RESTORE_CALL_CLOBBERED_REGS_AFTER_RVAL - -/* Save `call saved' registers to the state-save-frame pointed to by EP. */ -#define SAVE_CALL_SAVED_REGS \ - sst.w r2, PTO+PT_GPR(2)[ep]; \ - sst.w r20, PTO+PT_GPR(20)[ep]; \ - sst.w r21, PTO+PT_GPR(21)[ep]; \ - sst.w r22, PTO+PT_GPR(22)[ep]; \ - sst.w r23, PTO+PT_GPR(23)[ep]; \ - sst.w r24, PTO+PT_GPR(24)[ep]; \ - sst.w r25, PTO+PT_GPR(25)[ep]; \ - sst.w r26, PTO+PT_GPR(26)[ep]; \ - sst.w r27, PTO+PT_GPR(27)[ep]; \ - sst.w r28, PTO+PT_GPR(28)[ep]; \ - sst.w r29, PTO+PT_GPR(29)[ep] -/* Restore `call saved' registers from the state-save-frame pointed to by EP. */ -#define RESTORE_CALL_SAVED_REGS \ - sld.w PTO+PT_GPR(2)[ep], r2; \ - sld.w PTO+PT_GPR(20)[ep], r20; \ - sld.w PTO+PT_GPR(21)[ep], r21; \ - sld.w PTO+PT_GPR(22)[ep], r22; \ - sld.w PTO+PT_GPR(23)[ep], r23; \ - sld.w PTO+PT_GPR(24)[ep], r24; \ - sld.w PTO+PT_GPR(25)[ep], r25; \ - sld.w PTO+PT_GPR(26)[ep], r26; \ - sld.w PTO+PT_GPR(27)[ep], r27; \ - sld.w PTO+PT_GPR(28)[ep], r28; \ - sld.w PTO+PT_GPR(29)[ep], r29 - - -/* Save the PC stored in the special register SAVEREG to the state-save-frame - pointed to by EP. r19 is clobbered. */ -#define SAVE_PC(savereg) \ - stsr SR_ ## savereg, r19; \ - sst.w r19, PTO+PT_PC[ep] -/* Restore the PC from the state-save-frame pointed to by EP, to the special - register SAVEREG. LP is clobbered (it is used as a scratch register - because the POP_STATE macro restores it, and this macro is usually used - inside POP_STATE). */ -#define RESTORE_PC(savereg) \ - sld.w PTO+PT_PC[ep], lp; \ - ldsr lp, SR_ ## savereg -/* Save the PSW register stored in the special register SAVREG to the - state-save-frame pointed to by EP. r19 is clobbered. */ -#define SAVE_PSW(savereg) \ - stsr SR_ ## savereg, r19; \ - sst.w r19, PTO+PT_PSW[ep] -/* Restore the PSW register from the state-save-frame pointed to by EP, to - the special register SAVEREG. LP is clobbered (it is used as a scratch - register because the POP_STATE macro restores it, and this macro is - usually used inside POP_STATE). */ -#define RESTORE_PSW(savereg) \ - sld.w PTO+PT_PSW[ep], lp; \ - ldsr lp, SR_ ## savereg - -/* Save CTPC/CTPSW/CTBP registers to the state-save-frame pointed to by REG. - r19 is clobbered. */ -#define SAVE_CT_REGS \ - stsr SR_CTPC, r19; \ - sst.w r19, PTO+PT_CTPC[ep]; \ - stsr SR_CTPSW, r19; \ - sst.w r19, PTO+PT_CTPSW[ep]; \ - stsr SR_CTBP, r19; \ - sst.w r19, PTO+PT_CTBP[ep] -/* Restore CTPC/CTPSW/CTBP registers from the state-save-frame pointed to by EP. - LP is clobbered (it is used as a scratch register because the POP_STATE - macro restores it, and this macro is usually used inside POP_STATE). */ -#define RESTORE_CT_REGS \ - sld.w PTO+PT_CTPC[ep], lp; \ - ldsr lp, SR_CTPC; \ - sld.w PTO+PT_CTPSW[ep], lp; \ - ldsr lp, SR_CTPSW; \ - sld.w PTO+PT_CTBP[ep], lp; \ - ldsr lp, SR_CTBP - - -/* Push register state, except for the stack pointer, on the stack in the - form of a state-save-frame (plus some extra padding), in preparation for - a system call. This macro makes sure that the EP, GP, and LP - registers are saved, and TYPE identifies the set of extra registers to - be saved as well. Also copies (the new value of) SP to EP. */ -#define PUSH_STATE(type) \ - addi -STATE_SAVE_SIZE, sp, sp; /* Make room on the stack. */ \ - st.w ep, PTO+PT_GPR(GPR_EP)[sp]; \ - mov sp, ep; \ - sst.w gp, PTO+PT_GPR(GPR_GP)[ep]; \ - sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \ - type ## _STATE_SAVER -/* Pop a register state pushed by PUSH_STATE, except for the stack pointer, - from the stack. */ -#define POP_STATE(type) \ - mov sp, ep; \ - type ## _STATE_RESTORER; \ - sld.w PTO+PT_GPR(GPR_GP)[ep], gp; \ - sld.w PTO+PT_GPR(GPR_LP)[ep], lp; \ - sld.w PTO+PT_GPR(GPR_EP)[ep], ep; \ - addi STATE_SAVE_SIZE, sp, sp /* Clean up our stack space. */ - - -/* Switch to the kernel stack if necessary, and push register state on the - stack in the form of a state-save-frame. Also load the current task - pointer if switching from user mode. The stack-pointer (r3) should have - already been saved to the memory location SP_SAVE_LOC (the reason for - this is that the interrupt vectors may be beyond a 22-bit signed offset - jump from the actual interrupt handler, and this allows them to save the - stack-pointer and use that register to do an indirect jump). This macro - makes sure that `special' registers, system registers, and the stack - pointer are saved; TYPE identifies the set of extra registers to be - saved as well. SYSCALL_NUM is the register in which the system-call - number this state is for is stored (r0 if this isn't a system call). - Interrupts should already be disabled when calling this. */ -#define SAVE_STATE(type, syscall_num, sp_save_loc) \ - tst1 0, KM; /* See if already in kernel mode. */ \ - bz 1f; \ - ld.w sp_save_loc, sp; /* ... yes, use saved SP. */ \ - br 2f; \ -1: ld.w KSP, sp; /* ... no, switch to kernel stack. */ \ -2: PUSH_STATE(type); \ - ld.b KM, r19; /* Remember old kernel-mode. */ \ - sst.w r19, PTO+PT_KERNEL_MODE[ep]; \ - ld.w sp_save_loc, r19; /* Remember old SP. */ \ - sst.w r19, PTO+PT_GPR(GPR_SP)[ep]; \ - mov 1, r19; /* Now definitely in kernel-mode. */ \ - st.b r19, KM; \ - GET_CURRENT_TASK(CURRENT_TASK); /* Fetch the current task pointer. */ \ - /* Save away the syscall number. */ \ - sst.w syscall_num, PTO+PT_CUR_SYSCALL[ep] - - -/* Save register state not normally saved by PUSH_STATE for TYPE, to the - state-save-frame on the stack; also copies SP to EP. r19 may be trashed. */ -#define SAVE_EXTRA_STATE(type) \ - mov sp, ep; \ - type ## _EXTRA_STATE_SAVER -/* Restore register state not normally restored by POP_STATE for TYPE, - from the state-save-frame on the stack; also copies SP to EP. - r19 may be trashed. */ -#define RESTORE_EXTRA_STATE(type) \ - mov sp, ep; \ - type ## _EXTRA_STATE_RESTORER - -/* Save any call-clobbered registers not normally saved by PUSH_STATE for - TYPE, to the state-save-frame on the stack. - EP may be trashed, but is not guaranteed to contain a copy of SP - (unlike after most SAVE_... macros). r19 may be trashed. */ -#define SAVE_EXTRA_STATE_FOR_SCHEDULE(type) \ - type ## _SCHEDULE_EXTRA_STATE_SAVER -/* Restore any call-clobbered registers not normally restored by - POP_STATE for TYPE, to the state-save-frame on the stack. - EP may be trashed, but is not guaranteed to contain a copy of SP - (unlike after most RESTORE_... macros). r19 may be trashed. */ -#define RESTORE_EXTRA_STATE_FOR_SCHEDULE(type) \ - type ## _SCHEDULE_EXTRA_STATE_RESTORER - - -/* These are extra_state_saver/restorer values for a user trap. Note - that we save the argument registers so that restarted syscalls will - function properly (otherwise it wouldn't be necessary), and we must - _not_ restore the return-value registers (so that traps can return a - value!), but call-clobbered registers are not saved at all, as the - caller of the syscall function should have saved them. */ - -#define TRAP_RET reti -/* Traps don't save call-clobbered registers (but do still save arg regs). - We preserve PSw to keep long-term state, namely interrupt status (for traps - from kernel-mode), and the single-step flag (for user traps). */ -#define TRAP_STATE_SAVER \ - SAVE_ARG_REGS; \ - SAVE_PC(EIPC); \ - SAVE_PSW(EIPSW) -/* When traps return, they just leave call-clobbered registers (except for arg - regs) with whatever value they have from the kernel. Traps don't preserve - the PSW, but we zero EIPSW to ensure it doesn't contain anything dangerous - (in particular, the single-step flag). */ -#define TRAP_STATE_RESTORER \ - RESTORE_ARG_REGS; \ - RESTORE_PC(EIPC); \ - RESTORE_PSW(EIPSW) -/* Save registers not normally saved by traps. We need to save r12, even - though it's nominally call-clobbered, because it's used when restarting - a system call (the signal-handling path uses SAVE_EXTRA_STATE, and - expects r12 to be restored when the trap returns). */ -#define TRAP_EXTRA_STATE_SAVER \ - SAVE_RVAL_REGS; \ - sst.w r12, PTO+PT_GPR(12)[ep]; \ - SAVE_CALL_SAVED_REGS; \ - SAVE_CT_REGS -#define TRAP_EXTRA_STATE_RESTORER \ - RESTORE_RVAL_REGS; \ - sld.w PTO+PT_GPR(12)[ep], r12; \ - RESTORE_CALL_SAVED_REGS; \ - RESTORE_CT_REGS -/* Save registers prior to calling scheduler (just before trap returns). - We have to save the return-value registers to preserve the trap's return - value. Note that ..._SCHEDULE_EXTRA_STATE_SAVER, unlike most ..._SAVER - macros, is required to setup EP itself if EP is needed (this is because - in many cases, the macro is empty). */ -#define TRAP_SCHEDULE_EXTRA_STATE_SAVER \ - mov sp, ep; \ - SAVE_RVAL_REGS -/* Note that ..._SCHEDULE_EXTRA_STATE_RESTORER, unlike most ..._RESTORER - macros, is required to setup EP itself if EP is needed (this is because - in many cases, the macro is empty). */ -#define TRAP_SCHEDULE_EXTRA_STATE_RESTORER \ - mov sp, ep; \ - RESTORE_RVAL_REGS - -/* Register saving/restoring for maskable interrupts. */ -#define IRQ_RET reti -#define IRQ_STATE_SAVER \ - SAVE_CALL_CLOBBERED_REGS; \ - SAVE_PC(EIPC); \ - SAVE_PSW(EIPSW) -#define IRQ_STATE_RESTORER \ - RESTORE_CALL_CLOBBERED_REGS; \ - RESTORE_PC(EIPC); \ - RESTORE_PSW(EIPSW) -#define IRQ_EXTRA_STATE_SAVER \ - SAVE_CALL_SAVED_REGS; \ - SAVE_CT_REGS -#define IRQ_EXTRA_STATE_RESTORER \ - RESTORE_CALL_SAVED_REGS; \ - RESTORE_CT_REGS -#define IRQ_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ -#define IRQ_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ - -/* Register saving/restoring for non-maskable interrupts. */ -#define NMI_RET reti -#define NMI_STATE_SAVER \ - SAVE_CALL_CLOBBERED_REGS; \ - SAVE_PC(FEPC); \ - SAVE_PSW(FEPSW); -#define NMI_STATE_RESTORER \ - RESTORE_CALL_CLOBBERED_REGS; \ - RESTORE_PC(FEPC); \ - RESTORE_PSW(FEPSW); -#define NMI_EXTRA_STATE_SAVER \ - SAVE_CALL_SAVED_REGS; \ - SAVE_CT_REGS -#define NMI_EXTRA_STATE_RESTORER \ - RESTORE_CALL_SAVED_REGS; \ - RESTORE_CT_REGS -#define NMI_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ -#define NMI_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ - -/* Register saving/restoring for debug traps. */ -#define DBTRAP_RET .long 0x014607E0 /* `dbret', but gas doesn't support it. */ -#define DBTRAP_STATE_SAVER \ - SAVE_CALL_CLOBBERED_REGS; \ - SAVE_PC(DBPC); \ - SAVE_PSW(DBPSW) -#define DBTRAP_STATE_RESTORER \ - RESTORE_CALL_CLOBBERED_REGS; \ - RESTORE_PC(DBPC); \ - RESTORE_PSW(DBPSW) -#define DBTRAP_EXTRA_STATE_SAVER \ - SAVE_CALL_SAVED_REGS; \ - SAVE_CT_REGS -#define DBTRAP_EXTRA_STATE_RESTORER \ - RESTORE_CALL_SAVED_REGS; \ - RESTORE_CT_REGS -#define DBTRAP_SCHEDULE_EXTRA_STATE_SAVER /* nothing */ -#define DBTRAP_SCHEDULE_EXTRA_STATE_RESTORER /* nothing */ - -/* Register saving/restoring for a context switch. We don't need to save - too many registers, because context-switching looks like a function call - (via the function `switch_thread'), so callers will save any - call-clobbered registers themselves. We do need to save the CT regs, as - they're normally not saved during kernel entry (the kernel doesn't use - them). We save PSW so that interrupt-status state will correctly follow - each thread (mostly NMI vs. normal-IRQ/trap), though for the most part - it doesn't matter since threads are always in almost exactly the same - processor state during a context switch. The stack pointer and return - value are handled by switch_thread itself. */ -#define SWITCH_STATE_SAVER \ - SAVE_CALL_SAVED_REGS; \ - SAVE_PSW(PSW); \ - SAVE_CT_REGS -#define SWITCH_STATE_RESTORER \ - RESTORE_CALL_SAVED_REGS; \ - RESTORE_PSW(PSW); \ - RESTORE_CT_REGS - - -/* Restore register state from the state-save-frame on the stack, switch back - to the user stack if necessary, and return from the trap/interrupt. - EXTRA_STATE_RESTORER is a sequence of assembly language statements to - restore anything not restored by this macro. Only registers not saved by - the C compiler are restored (that is, R3(sp), R4(gp), R31(lp), and - anything restored by EXTRA_STATE_RESTORER). */ -#define RETURN(type) \ - ld.b PTO+PT_KERNEL_MODE[sp], r19; \ - di; /* Disable interrupts */ \ - cmp r19, r0; /* See if returning to kernel mode, */\ - bne 2f; /* ... if so, skip resched &c. */ \ - \ - /* We're returning to user mode, so check for various conditions that \ - trigger rescheduling. */ \ - GET_CURRENT_THREAD(r18); \ - ld.w TI_FLAGS[r18], r19; \ - andi _TIF_NEED_RESCHED, r19, r0; \ - bnz 3f; /* Call the scheduler. */ \ -5: andi _TIF_SIGPENDING, r19, r18; \ - ld.w TASK_PTRACE[CURRENT_TASK], r19; /* ptrace flags */ \ - or r18, r19; /* see if either is non-zero */ \ - bnz 4f; /* if so, handle them */ \ - \ -/* Return to user state. */ \ -1: st.b r0, KM; /* Now officially in user state. */ \ - \ -/* Final return. The stack-pointer fiddling is not needed when returning \ - to kernel-mode, but they don't hurt, and this way we can share the \ - (sometimes rather lengthy) POP_STATE macro. */ \ -2: POP_STATE(type); \ - st.w sp, KSP; /* Save the kernel stack pointer. */ \ - ld.w PT_GPR(GPR_SP)-PT_SIZE[sp], sp; /* Restore stack pointer. */ \ - type ## _RET; /* Return from the trap/interrupt. */ \ - \ -/* Call the scheduler before returning from a syscall/trap. */ \ -3: SAVE_EXTRA_STATE_FOR_SCHEDULE(type); /* Prepare to call scheduler. */ \ - jarl call_scheduler, lp; /* Call scheduler */ \ - di; /* The scheduler enables interrupts */\ - RESTORE_EXTRA_STATE_FOR_SCHEDULE(type); \ - GET_CURRENT_THREAD(r18); \ - ld.w TI_FLAGS[r18], r19; \ - br 5b; /* Continue with return path. */ \ - \ -/* Handle a signal or ptraced process return. \ - r18 should be non-zero if there are pending signals. */ \ -4: /* Not all registers are saved by the normal trap/interrupt entry \ - points (for instance, call-saved registers (because the normal \ - C-compiler calling sequence in the kernel makes sure they're \ - preserved), and call-clobbered registers in the case of \ - traps), but signal handlers may want to examine or change the \ - complete register state. Here we save anything not saved by \ - the normal entry sequence, so that it may be safely restored \ - (in a possibly modified form) after do_signal returns. */ \ - SAVE_EXTRA_STATE(type); /* Save state not saved by entry. */ \ - jarl handle_signal_or_ptrace_return, lp; \ - RESTORE_EXTRA_STATE(type); /* Restore extra regs. */ \ - br 1b - - -/* Jump to the appropriate function for the system call number in r12 - (r12 is not preserved), or return an error if r12 is not valid. The - LP register should point to the location where the called function - should return. [note that MAKE_SYS_CALL uses label 1] */ -#define MAKE_SYS_CALL \ - /* Figure out which function to use for this system call. */ \ - shl 2, r12; \ - /* See if the system call number is valid. */ \ - addi lo(CSYM(sys_call_table) - sys_call_table_end), r12, r0; \ - bnh 1f; \ - mov hilo(CSYM(sys_call_table)), r19; \ - add r19, r12; \ - ld.w 0[r12], r12; \ - /* Make the system call. */ \ - jmp [r12]; \ - /* The syscall number is invalid, return an error. */ \ -1: addi -ENOSYS, r0, r10; \ - jmp [lp] - - - .text - -/* - * User trap. - * - * Trap 0 system calls are also handled here. - * - * The stack-pointer (r3) should have already been saved to the memory - * location ENTRY_SP (the reason for this is that the interrupt vectors may be - * beyond a 22-bit signed offset jump from the actual interrupt handler, and - * this allows them to save the stack-pointer and use that register to do an - * indirect jump). - * - * Syscall protocol: - * Syscall number in r12, args in r6-r9 - * Return value in r10 - */ -G_ENTRY(trap): - SAVE_STATE (TRAP, r12, ENTRY_SP) // Save registers. - stsr SR_ECR, r19 // Find out which trap it was. - ei // Enable interrupts. - mov hilo(ret_from_trap), lp // where the trap should return - - // The following two shifts (1) clear out extraneous NMI data in the - // upper 16-bits, (2) convert the 0x40 - 0x5f range of trap ECR - // numbers into the (0-31) << 2 range we want, (3) set the flags. - shl 27, r19 // chop off all high bits - shr 25, r19 // scale back down and then << 2 - bnz 2f // See if not trap 0. - - // Trap 0 is a `short' system call, skip general trap table. - MAKE_SYS_CALL // Jump to the syscall function. - -2: // For other traps, use a table lookup. - mov hilo(CSYM(trap_table)), r18 - add r19, r18 - ld.w 0[r18], r18 - jmp [r18] // Jump to the trap handler. -END(trap) - -/* This is just like ret_from_trap, but first restores extra registers - saved by some wrappers. */ -L_ENTRY(restore_extra_regs_and_ret_from_trap): - RESTORE_EXTRA_STATE(TRAP) - // fall through -END(restore_extra_regs_and_ret_from_trap) - -/* Entry point used to return from a syscall/trap. */ -L_ENTRY(ret_from_trap): - RETURN(TRAP) -END(ret_from_trap) - - -/* This the initial entry point for a new child thread, with an appropriate - stack in place that makes it look that the child is in the middle of an - syscall. This function is actually `returned to' from switch_thread - (copy_thread makes ret_from_fork the return address in each new thread's - saved context). */ -C_ENTRY(ret_from_fork): - mov r10, r6 // switch_thread returns the prev task. - jarl CSYM(schedule_tail), lp // ...which is schedule_tail's arg - mov r0, r10 // Child's fork call should return 0. - br ret_from_trap // Do normal trap return. -C_END(ret_from_fork) - - -/* - * Trap 1: `long' system calls - * `Long' syscall protocol: - * Syscall number in r12, args in r6-r9, r13-r14 - * Return value in r10 - */ -L_ENTRY(syscall_long): - // Push extra arguments on the stack. Note that by default, the trap - // handler reserves enough stack space for 6 arguments, so we don't - // have to make any additional room. - st.w r13, 16[sp] // arg 5 - st.w r14, 20[sp] // arg 6 - - // Make sure r13 and r14 are preserved, in case we have to restart a - // system call because of a signal (ep has already been set by caller). - st.w r13, PTO+PT_GPR(13)[sp] - st.w r14, PTO+PT_GPR(13)[sp] - mov hilo(ret_from_long_syscall), lp - - MAKE_SYS_CALL // Jump to the syscall function. -END(syscall_long) - -/* Entry point used to return from a long syscall. Only needed to restore - r13/r14 if the general trap mechanism doesnt' do so. */ -L_ENTRY(ret_from_long_syscall): - ld.w PTO+PT_GPR(13)[sp], r13 // Restore the extra registers - ld.w PTO+PT_GPR(13)[sp], r14 - br ret_from_trap // The rest is the same as other traps -END(ret_from_long_syscall) - - -/* These syscalls need access to the struct pt_regs on the stack, so we - implement them in assembly (they're basically all wrappers anyway). */ - -L_ENTRY(sys_fork_wrapper): -#ifdef CONFIG_MMU - addi SIGCHLD, r0, r6 // Arg 0: flags - ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) - movea PTO, sp, r8 // Arg 2: parent context - mov r0, r9 // Arg 3/4/5: 0 - st.w r0, 16[sp] - st.w r0, 20[sp] - mov hilo(CSYM(do_fork)), r18 // Where the real work gets done - br save_extra_state_tramp // Save state and go there -#else - // fork almost works, enough to trick you into looking elsewhere :-( - addi -EINVAL, r0, r10 - jmp [lp] -#endif -END(sys_fork_wrapper) - -L_ENTRY(sys_vfork_wrapper): - addi CLONE_VFORK | CLONE_VM | SIGCHLD, r0, r6 // Arg 0: flags - ld.w PTO+PT_GPR(GPR_SP)[sp], r7 // Arg 1: child SP (use parent's) - movea PTO, sp, r8 // Arg 2: parent context - mov r0, r9 // Arg 3/4/5: 0 - st.w r0, 16[sp] - st.w r0, 20[sp] - mov hilo(CSYM(do_fork)), r18 // Where the real work gets done - br save_extra_state_tramp // Save state and go there -END(sys_vfork_wrapper) - -L_ENTRY(sys_clone_wrapper): - ld.w PTO+PT_GPR(GPR_SP)[sp], r19// parent's stack pointer - cmp r7, r0 // See if child SP arg (arg 1) is 0. - cmov z, r19, r7, r7 // ... and use the parent's if so. - movea PTO, sp, r8 // Arg 2: parent context - mov r0, r9 // Arg 3/4/5: 0 - st.w r0, 16[sp] - st.w r0, 20[sp] - mov hilo(CSYM(do_fork)), r18 // Where the real work gets done - br save_extra_state_tramp // Save state and go there -END(sys_clone_wrapper) - - -L_ENTRY(sys_execve_wrapper): - movea PTO, sp, r9 // add user context as 4th arg - jr CSYM(sys_execve) // Do real work (tail-call). -END(sys_execve_wrapper) - - -L_ENTRY(sys_sigsuspend_wrapper): - movea PTO, sp, r7 // add user context as 2nd arg - mov hilo(CSYM(sys_sigsuspend)), r18 // syscall function - jarl save_extra_state_tramp, lp // Save state and do it - br restore_extra_regs_and_ret_from_trap -END(sys_sigsuspend_wrapper) -L_ENTRY(sys_rt_sigsuspend_wrapper): - movea PTO, sp, r8 // add user context as 3rd arg - mov hilo(CSYM(sys_rt_sigsuspend)), r18 // syscall function - jarl save_extra_state_tramp, lp // Save state and do it - br restore_extra_regs_and_ret_from_trap -END(sys_rt_sigsuspend_wrapper) - -L_ENTRY(sys_sigreturn_wrapper): - movea PTO, sp, r6 // add user context as 1st arg - mov hilo(CSYM(sys_sigreturn)), r18 // syscall function - jarl save_extra_state_tramp, lp // Save state and do it - br restore_extra_regs_and_ret_from_trap -END(sys_sigreturn_wrapper) -L_ENTRY(sys_rt_sigreturn_wrapper): - movea PTO, sp, r6 // add user context as 1st arg - mov hilo(CSYM(sys_rt_sigreturn)), r18// syscall function - jarl save_extra_state_tramp, lp // Save state and do it - br restore_extra_regs_and_ret_from_trap -END(sys_rt_sigreturn_wrapper) - - -/* Save any state not saved by SAVE_STATE(TRAP), and jump to r18. - It's main purpose is to share the rather lengthy code sequence that - SAVE_STATE expands into among the above wrapper functions. */ -L_ENTRY(save_extra_state_tramp): - SAVE_EXTRA_STATE(TRAP) // Save state not saved by entry. - jmp [r18] // Do the work the caller wants -END(save_extra_state_tramp) - - -/* - * Hardware maskable interrupts. - * - * The stack-pointer (r3) should have already been saved to the memory - * location ENTRY_SP (the reason for this is that the interrupt vectors may be - * beyond a 22-bit signed offset jump from the actual interrupt handler, and - * this allows them to save the stack-pointer and use that register to do an - * indirect jump). - */ -G_ENTRY(irq): - SAVE_STATE (IRQ, r0, ENTRY_SP) // Save registers. - - stsr SR_ECR, r6 // Find out which interrupt it was. - movea PTO, sp, r7 // User regs are arg2 - - // All v850 implementations I know about encode their interrupts as - // multiples of 0x10, starting at 0x80 (after NMIs and software - // interrupts). Convert this number into a simple IRQ index for the - // rest of the kernel. We also clear the upper 16 bits, which hold - // NMI info, and don't appear to be cleared when a NMI returns. - shl 16, r6 // clear upper 16 bits - shr 20, r6 // shift back, and remove lower nibble - add -8, r6 // remove bias for irqs - - // Call the high-level interrupt handling code. - jarl CSYM(handle_irq), lp - - RETURN(IRQ) -END(irq) - - -/* - * Debug trap / illegal-instruction exception - * - * The stack-pointer (r3) should have already been saved to the memory - * location ENTRY_SP (the reason for this is that the interrupt vectors may be - * beyond a 22-bit signed offset jump from the actual interrupt handler, and - * this allows them to save the stack-pointer and use that register to do an - * indirect jump). - */ -G_ENTRY(dbtrap): - SAVE_STATE (DBTRAP, r0, ENTRY_SP)// Save registers. - - /* First see if we came from kernel mode; if so, the dbtrap - instruction has a special meaning, to set the DIR (`debug - information register') register. This is because the DIR register - can _only_ be manipulated/read while in `debug mode,' and debug - mode is only active while we're inside the dbtrap handler. The - exact functionality is: { DIR = (DIR | r6) & ~r7; return DIR; }. */ - ld.b PTO+PT_KERNEL_MODE[sp], r19 - cmp r19, r0 - bz 1f - - stsr SR_DIR, r10 - or r6, r10 - not r7, r7 - and r7, r10 - ldsr r10, SR_DIR - stsr SR_DIR, r10 // Confirm the value we set - st.w r10, PTO+PT_GPR(10)[sp] // return it - br 3f - -1: ei // Enable interrupts. - - /* The default signal type we raise. */ - mov SIGTRAP, r6 - - /* See if it's a single-step trap. */ - stsr SR_DBPSW, r19 - andi 0x0800, r19, r19 - bnz 2f - - /* Look to see if the preceding instruction was is a dbtrap or not, - to decide which signal we should use. */ - stsr SR_DBPC, r19 // PC following trapping insn - ld.hu -2[r19], r19 - ori 0xf840, r0, r20 // DBTRAP insn - cmp r19, r20 // Was this trap caused by DBTRAP? - cmov ne, SIGILL, r6, r6 // Choose signal appropriately - - /* Raise the desired signal. */ -2: mov CURRENT_TASK, r7 // Arg 1: task - jarl CSYM(send_sig), lp // tail call - -3: RETURN(DBTRAP) -END(dbtrap) - - -/* - * Hardware non-maskable interrupts. - * - * The stack-pointer (r3) should have already been saved to the memory - * location ENTRY_SP (the reason for this is that the interrupt vectors may be - * beyond a 22-bit signed offset jump from the actual interrupt handler, and - * this allows them to save the stack-pointer and use that register to do an - * indirect jump). - */ -G_ENTRY(nmi): - SAVE_STATE (NMI, r0, NMI_ENTRY_SP); /* Save registers. */ - - stsr SR_ECR, r6; /* Find out which nmi it was. */ - shr 20, r6; /* Extract NMI code in bits 20-24. */ - movea PTO, sp, r7; /* User regs are arg2. */ - - /* Non-maskable interrupts always lie right after maskable interrupts. - Call the generic IRQ handler, with two arguments, the IRQ number, - and a pointer to the user registers, to handle the specifics. - (we subtract one because the first NMI has code 1). */ - addi FIRST_NMI - 1, r6, r6 - jarl CSYM(handle_irq), lp - - RETURN(NMI) -END(nmi) - - -/* - * Trap with no handler - */ -L_ENTRY(bad_trap_wrapper): - mov r19, r6 // Arg 0: trap number - movea PTO, sp, r7 // Arg 1: user regs - jr CSYM(bad_trap) // tail call handler -END(bad_trap_wrapper) - - -/* - * Invoke the scheduler, called from the trap/irq kernel exit path. - * - * This basically just calls `schedule', but also arranges for extra - * registers to be saved for ptrace'd processes, so ptrace can modify them. - */ -L_ENTRY(call_scheduler): - ld.w TASK_PTRACE[CURRENT_TASK], r19 // See if task is ptrace'd - cmp r19, r0 - bnz 1f // ... yes, do special stuff - jr CSYM(schedule) // ... no, just tail-call scheduler - - // Save extra regs for ptrace'd task. We want to save anything - // that would otherwise only be `implicitly' saved by the normal - // compiler calling-convention. -1: mov sp, ep // Setup EP for SAVE_CALL_SAVED_REGS - SAVE_CALL_SAVED_REGS // Save call-saved registers to stack - mov lp, r20 // Save LP in a callee-saved register - - jarl CSYM(schedule), lp // Call scheduler - - mov r20, lp - mov sp, ep // We can't rely on EP after return - RESTORE_CALL_SAVED_REGS // Restore (possibly modified) regs - jmp [lp] // Return to the return path -END(call_scheduler) - - -/* - * This is an out-of-line handler for two special cases during the kernel - * trap/irq exit sequence: - * - * (1) If r18 is non-zero then a signal needs to be handled, which is - * done, and then the caller returned to. - * - * (2) If r18 is non-zero then we're returning to a ptraced process, which - * has several special cases -- single-stepping and trap tracing, both - * of which require using the `dbret' instruction to exit the kernel - * instead of the normal `reti' (this is because the CPU not correctly - * single-step after a reti). In this case, of course, this handler - * never returns to the caller. - * - * In either case, all registers should have been saved to the current - * state-save-frame on the stack, except for callee-saved registers. - * - * [These two different cases are combined merely to avoid bloating the - * macro-inlined code, not because they really make much sense together!] - */ -L_ENTRY(handle_signal_or_ptrace_return): - cmp r18, r0 // See if handling a signal - bz 1f // ... nope, go do ptrace return - - // Handle a signal - mov lp, r20 // Save link-pointer - mov r10, r21 // Save return-values (for trap) - mov r11, r22 - - movea PTO, sp, r6 // Arg 1: struct pt_regs *regs - mov r0, r7 // Arg 2: sigset_t *oldset - jarl CSYM(do_signal), lp // Handle the signal - di // sig handling enables interrupts - - mov r20, lp // Restore link-pointer - mov r21, r10 // Restore return-values (for trap) - mov r22, r11 - ld.w TASK_PTRACE[CURRENT_TASK], r19 // check ptrace flags too - cmp r19, r0 - bnz 1f // ... some set, so look more -2: jmp [lp] // ... none set, so return normally - - // ptrace return -1: ld.w PTO+PT_PSW[sp], r19 // Look at user-processes's flags - andi 0x0800, r19, r19 // See if single-step flag is set - bz 2b // ... nope, return normally - - // Return as if from a dbtrap insn - st.b r0, KM // Now officially in user state. - POP_STATE(DBTRAP) // Restore regs - st.w sp, KSP // Save the kernel stack pointer. - ld.w PT_GPR(GPR_SP)-PT_SIZE[sp], sp // Restore user stack pointer. - DBTRAP_RET // Return from the trap/interrupt. -END(handle_signal_or_ptrace_return) - - -/* - * This is where we switch between two threads. The arguments are: - * r6 -- pointer to the struct thread for the `current' process - * r7 -- pointer to the struct thread for the `new' process. - * when this function returns, it will return to the new thread. - */ -C_ENTRY(switch_thread): - // Return the previous task (r10 is not clobbered by restore below) - mov CURRENT_TASK, r10 - // First, push the current processor state on the stack - PUSH_STATE(SWITCH) - // Now save the location of the kernel stack pointer for this thread; - // since we've pushed all other state on the stack, this is enough to - // restore it all later. - st.w sp, THREAD_KSP[r6] - // Now restore the stack pointer from the new process - ld.w THREAD_KSP[r7], sp - // ... and restore all state from that - POP_STATE(SWITCH) - // Update the current task pointer - GET_CURRENT_TASK(CURRENT_TASK) - // Now return into the new thread - jmp [lp] -C_END(switch_thread) - - - .data - - .align 4 -C_DATA(trap_table): - .long bad_trap_wrapper // trap 0, doesn't use trap table. - .long syscall_long // trap 1, `long' syscall. - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper - .long bad_trap_wrapper -C_END(trap_table) - - - .section .rodata - - .align 4 -C_DATA(sys_call_table): - .long CSYM(sys_restart_syscall) // 0 - .long CSYM(sys_exit) - .long sys_fork_wrapper - .long CSYM(sys_read) - .long CSYM(sys_write) - .long CSYM(sys_open) // 5 - .long CSYM(sys_close) - .long CSYM(sys_waitpid) - .long CSYM(sys_creat) - .long CSYM(sys_link) - .long CSYM(sys_unlink) // 10 - .long sys_execve_wrapper - .long CSYM(sys_chdir) - .long CSYM(sys_time) - .long CSYM(sys_mknod) - .long CSYM(sys_chmod) // 15 - .long CSYM(sys_chown) - .long CSYM(sys_ni_syscall) // was: break - .long CSYM(sys_ni_syscall) // was: oldstat (aka stat) - .long CSYM(sys_lseek) - .long CSYM(sys_getpid) // 20 - .long CSYM(sys_mount) - .long CSYM(sys_oldumount) - .long CSYM(sys_setuid) - .long CSYM(sys_getuid) - .long CSYM(sys_stime) // 25 - .long CSYM(sys_ptrace) - .long CSYM(sys_alarm) - .long CSYM(sys_ni_syscall) // was: oldfstat (aka fstat) - .long CSYM(sys_pause) - .long CSYM(sys_utime) // 30 - .long CSYM(sys_ni_syscall) // was: stty - .long CSYM(sys_ni_syscall) // was: gtty - .long CSYM(sys_access) - .long CSYM(sys_nice) - .long CSYM(sys_ni_syscall) // 35, was: ftime - .long CSYM(sys_sync) - .long CSYM(sys_kill) - .long CSYM(sys_rename) - .long CSYM(sys_mkdir) - .long CSYM(sys_rmdir) // 40 - .long CSYM(sys_dup) - .long CSYM(sys_pipe) - .long CSYM(sys_times) - .long CSYM(sys_ni_syscall) // was: prof - .long CSYM(sys_brk) // 45 - .long CSYM(sys_setgid) - .long CSYM(sys_getgid) - .long CSYM(sys_signal) - .long CSYM(sys_geteuid) - .long CSYM(sys_getegid) // 50 - .long CSYM(sys_acct) - .long CSYM(sys_umount) // recycled never used phys() - .long CSYM(sys_ni_syscall) // was: lock - .long CSYM(sys_ioctl) - .long CSYM(sys_fcntl) // 55 - .long CSYM(sys_ni_syscall) // was: mpx - .long CSYM(sys_setpgid) - .long CSYM(sys_ni_syscall) // was: ulimit - .long CSYM(sys_ni_syscall) - .long CSYM(sys_umask) // 60 - .long CSYM(sys_chroot) - .long CSYM(sys_ustat) - .long CSYM(sys_dup2) - .long CSYM(sys_getppid) - .long CSYM(sys_getpgrp) // 65 - .long CSYM(sys_setsid) - .long CSYM(sys_sigaction) - .long CSYM(sys_sgetmask) - .long CSYM(sys_ssetmask) - .long CSYM(sys_setreuid) // 70 - .long CSYM(sys_setregid) - .long sys_sigsuspend_wrapper - .long CSYM(sys_sigpending) - .long CSYM(sys_sethostname) - .long CSYM(sys_setrlimit) // 75 - .long CSYM(sys_getrlimit) - .long CSYM(sys_getrusage) - .long CSYM(sys_gettimeofday) - .long CSYM(sys_settimeofday) - .long CSYM(sys_getgroups) // 80 - .long CSYM(sys_setgroups) - .long CSYM(sys_select) - .long CSYM(sys_symlink) - .long CSYM(sys_ni_syscall) // was: oldlstat (aka lstat) - .long CSYM(sys_readlink) // 85 - .long CSYM(sys_uselib) - .long CSYM(sys_swapon) - .long CSYM(sys_reboot) - .long CSYM(old_readdir) - .long CSYM(sys_mmap) // 90 - .long CSYM(sys_munmap) - .long CSYM(sys_truncate) - .long CSYM(sys_ftruncate) - .long CSYM(sys_fchmod) - .long CSYM(sys_fchown) // 95 - .long CSYM(sys_getpriority) - .long CSYM(sys_setpriority) - .long CSYM(sys_ni_syscall) // was: profil - .long CSYM(sys_statfs) - .long CSYM(sys_fstatfs) // 100 - .long CSYM(sys_ni_syscall) // i386: ioperm - .long CSYM(sys_socketcall) - .long CSYM(sys_syslog) - .long CSYM(sys_setitimer) - .long CSYM(sys_getitimer) // 105 - .long CSYM(sys_newstat) - .long CSYM(sys_newlstat) - .long CSYM(sys_newfstat) - .long CSYM(sys_ni_syscall) // was: olduname (aka uname) - .long CSYM(sys_ni_syscall) // 110, i386: iopl - .long CSYM(sys_vhangup) - .long CSYM(sys_ni_syscall) // was: idle - .long CSYM(sys_ni_syscall) // i386: vm86old - .long CSYM(sys_wait4) - .long CSYM(sys_swapoff) // 115 - .long CSYM(sys_sysinfo) - .long CSYM(sys_ipc) - .long CSYM(sys_fsync) - .long sys_sigreturn_wrapper - .long sys_clone_wrapper // 120 - .long CSYM(sys_setdomainname) - .long CSYM(sys_newuname) - .long CSYM(sys_ni_syscall) // i386: modify_ldt, m68k: cacheflush - .long CSYM(sys_adjtimex) - .long CSYM(sys_ni_syscall) // 125 - sys_mprotect - .long CSYM(sys_sigprocmask) - .long CSYM(sys_ni_syscall) // sys_create_module - .long CSYM(sys_init_module) - .long CSYM(sys_delete_module) - .long CSYM(sys_ni_syscall) // 130 - sys_get_kernel_syms - .long CSYM(sys_quotactl) - .long CSYM(sys_getpgid) - .long CSYM(sys_fchdir) - .long CSYM(sys_bdflush) - .long CSYM(sys_sysfs) // 135 - .long CSYM(sys_personality) - .long CSYM(sys_ni_syscall) // for afs_syscall - .long CSYM(sys_setfsuid) - .long CSYM(sys_setfsgid) - .long CSYM(sys_llseek) // 140 - .long CSYM(sys_getdents) - .long CSYM(sys_select) // for backward compat; remove someday - .long CSYM(sys_flock) - .long CSYM(sys_ni_syscall) // sys_msync - .long CSYM(sys_readv) // 145 - .long CSYM(sys_writev) - .long CSYM(sys_getsid) - .long CSYM(sys_fdatasync) - .long CSYM(sys_sysctl) - .long CSYM(sys_ni_syscall) // 150 - sys_mlock - .long CSYM(sys_ni_syscall) // sys_munlock - .long CSYM(sys_ni_syscall) // sys_mlockall - .long CSYM(sys_ni_syscall) // sys_munlockall - .long CSYM(sys_sched_setparam) - .long CSYM(sys_sched_getparam) // 155 - .long CSYM(sys_sched_setscheduler) - .long CSYM(sys_sched_getscheduler) - .long CSYM(sys_sched_yield) - .long CSYM(sys_sched_get_priority_max) - .long CSYM(sys_sched_get_priority_min) // 160 - .long CSYM(sys_sched_rr_get_interval) - .long CSYM(sys_nanosleep) - .long CSYM(sys_ni_syscall) // sys_mremap - .long CSYM(sys_setresuid) - .long CSYM(sys_getresuid) // 165 - .long CSYM(sys_ni_syscall) // for vm86 - .long CSYM(sys_ni_syscall) // sys_query_module - .long CSYM(sys_poll) - .long CSYM(sys_nfsservctl) - .long CSYM(sys_setresgid) // 170 - .long CSYM(sys_getresgid) - .long CSYM(sys_prctl) - .long sys_rt_sigreturn_wrapper - .long CSYM(sys_rt_sigaction) - .long CSYM(sys_rt_sigprocmask) // 175 - .long CSYM(sys_rt_sigpending) - .long CSYM(sys_rt_sigtimedwait) - .long CSYM(sys_rt_sigqueueinfo) - .long sys_rt_sigsuspend_wrapper - .long CSYM(sys_pread64) // 180 - .long CSYM(sys_pwrite64) - .long CSYM(sys_lchown) - .long CSYM(sys_getcwd) - .long CSYM(sys_capget) - .long CSYM(sys_capset) // 185 - .long CSYM(sys_sigaltstack) - .long CSYM(sys_sendfile) - .long CSYM(sys_ni_syscall) // streams1 - .long CSYM(sys_ni_syscall) // streams2 - .long sys_vfork_wrapper // 190 - .long CSYM(sys_ni_syscall) - .long CSYM(sys_mmap2) - .long CSYM(sys_truncate64) - .long CSYM(sys_ftruncate64) - .long CSYM(sys_stat64) // 195 - .long CSYM(sys_lstat64) - .long CSYM(sys_fstat64) - .long CSYM(sys_fcntl64) - .long CSYM(sys_getdents64) - .long CSYM(sys_pivot_root) // 200 - .long CSYM(sys_gettid) - .long CSYM(sys_tkill) -sys_call_table_end: -C_END(sys_call_table) diff --git a/arch/v850/kernel/fpga85e2c.c b/arch/v850/kernel/fpga85e2c.c deleted file mode 100644 index ab9cf16a85c8778808f27d67bbcc1afe35638593..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/fpga85e2c.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - * arch/v850/kernel/fpga85e2c.h -- Machine-dependent defs for - * FPGA implementation of V850E2/NA85E2C - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "mach.h" - -extern void memcons_setup (void); - - -#define REG_DUMP_ADDR 0x220000 - - -extern struct irqaction reg_snap_action; /* fwd decl */ - - -void __init mach_early_init (void) -{ - int i; - const u32 *src; - register u32 *dst asm ("ep"); - extern u32 _intv_end, _intv_load_start; - - /* Set bus sizes: CS0 32-bit, CS1 16-bit, CS7 8-bit, - everything else 32-bit. */ - V850E2_BSC = 0x2AA6; - for (i = 2; i <= 6; i++) - CSDEV(i) = 0; /* 32 bit */ - - /* Ensure that the simulator halts on a panic, instead of going - into an infinite loop inside the panic function. */ - panic_timeout = -1; - - /* Move the interrupt vectors into their real location. Note that - any relocations there are relative to the real location, so we - don't have to fix anything up. We use a loop instead of calling - memcpy to keep this a leaf function (to avoid a function - prologue being generated). */ - dst = 0x10; /* &_intv_start + 0x10. */ - src = &_intv_load_start; - do { - u32 t0 = src[0], t1 = src[1], t2 = src[2], t3 = src[3]; - u32 t4 = src[4], t5 = src[5], t6 = src[6], t7 = src[7]; - dst[0] = t0; dst[1] = t1; dst[2] = t2; dst[3] = t3; - dst[4] = t4; dst[5] = t5; dst[6] = t6; dst[7] = t7; - dst += 8; - src += 8; - } while (dst < &_intv_end); -} - -void __init mach_setup (char **cmdline) -{ - memcons_setup (); - - /* Setup up NMI0 to copy the registers to a known memory location. - The FGPA board has a button that produces NMI0 when pressed, so - this allows us to push the button, and then look at memory to see - what's in the registers (there's no other way to easily do so). - We have to use `setup_irq' instead of `request_irq' because it's - still too early to do memory allocation. */ - setup_irq (IRQ_NMI (0), ®_snap_action); -} - -void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) -{ - *ram_start = ERAM_ADDR; - *ram_len = ERAM_SIZE; -} - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Setup up the timer interrupt. The FPGA peripheral control - registers _only_ work with single-bit writes (set1/clr1)! */ - __clear_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); - __clear_bit (RPU_GTMC_CLK_BIT, &RPU_GTMC); - __set_bit (RPU_GTMC_CE_BIT, &RPU_GTMC); - - /* We use the first RPU interrupt, which occurs every 8.192ms. */ - setup_irq (IRQ_RPU (0), timer_action); -} - - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -void machine_halt (void) __attribute__ ((noreturn)); -void machine_halt (void) -{ - for (;;) { - DWC(0) = 0x7777; - DWC(1) = 0x7777; - ASC = 0xffff; - FLGREG(0) = 1; /* Halt immediately. */ - asm ("di; halt; nop; nop; nop; nop; nop"); - } -} - -void machine_restart (char *__unused) -{ - machine_halt (); -} - -void machine_power_off (void) -{ - machine_halt (); -} - - -/* Interrupts */ - -struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, - { "RPU", IRQ_RPU(0), IRQ_RPU_NUM, 1, 6 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -/* Initialize interrupts. */ -void __init mach_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - - -/* An interrupt handler that copies the registers to a known memory location, - for debugging purposes. */ - -static void make_reg_snap (int irq, void *dummy, struct pt_regs *regs) -{ - (*(unsigned *)REG_DUMP_ADDR)++; - (*(struct pt_regs *)(REG_DUMP_ADDR + sizeof (unsigned))) = *regs; -} - -static int reg_snap_dev_id; -static struct irqaction reg_snap_action = { - .handler = make_reg_snap, - .mask = CPU_MASK_NONE, - .name = "reg_snap", - .dev_id = ®_snap_dev_id, -}; diff --git a/arch/v850/kernel/fpga85e2c.ld b/arch/v850/kernel/fpga85e2c.ld deleted file mode 100644 index b5d4578ae4112ef76845aafa367fff234d56982d..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/fpga85e2c.ld +++ /dev/null @@ -1,62 +0,0 @@ -/* Linker script for the FPGA implementation of the V850E2 NA85E2C cpu core - (CONFIG_V850E2_FPGA85E2C). */ - -MEMORY { - /* Reset vector. */ - RESET : ORIGIN = 0, LENGTH = 0x10 - /* Interrupt vectors. */ - INTV : ORIGIN = 0x10, LENGTH = 0x470 - /* The `window' in RAM were we're allowed to load stuff. */ - RAM_LOW : ORIGIN = 0x480, LENGTH = 0x0005FB80 - /* Some more ram above the window were we can put bss &c. */ - RAM_HIGH : ORIGIN = 0x00060000, LENGTH = 0x000A0000 - /* This is the area visible from the outside world (we can use - this only for uninitialized data). */ - VISIBLE : ORIGIN = 0x00200000, LENGTH = 0x00060000 -} - -SECTIONS { - .reset : { - __kram_start = . ; - __intv_start = . ; - *(.intv.reset) /* Reset vector */ - } > RESET - - .ram_low : { - __r0_ram = . ; /* Must be near address 0. */ - . = . + 32 ; - - TEXT_CONTENTS - DATA_CONTENTS - ROOT_FS_CONTENTS - RAMK_INIT_CONTENTS_NO_END - INITRAMFS_CONTENTS - } > RAM_LOW - - /* Where the interrupt vectors are initially loaded. */ - __intv_load_start = . ; - - .intv : { - *(.intv.common) /* Vectors common to all v850e proc. */ - *(.intv.mach) /* Machine-specific int. vectors. */ - __intv_end = . ; - } > INTV AT> RAM_LOW - - .ram_high : { - /* This is here so that when we free init memory the - load-time copy of the interrupt vectors and any empty - space at the end of the `RAM_LOW' area is freed too. */ - . = ALIGN (4096); - __init_end = . ; - - BSS_CONTENTS - __kram_end = . ; - BOOTMAP_CONTENTS - } > RAM_HIGH - - .visible : { - _memcons_output = . ; - . = . + 0x8000 ; - _memcons_output_end = . ; - } > VISIBLE -} diff --git a/arch/v850/kernel/gbus_int.c b/arch/v850/kernel/gbus_int.c deleted file mode 100644 index b2bcc251f65b8b1ec3c6c9a0d63845c25d99af69..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/gbus_int.c +++ /dev/null @@ -1,271 +0,0 @@ -/* - * arch/v850/kernel/gbus_int.c -- Midas labs GBUS interrupt support - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include - - -/* The number of shared GINT interrupts. */ -#define NUM_GINTS 4 - -/* For each GINT interrupt, how many GBUS interrupts are using it. */ -static unsigned gint_num_active_irqs[NUM_GINTS] = { 0 }; - -/* A table of GINTn interrupts we actually use. - Note that we don't use GINT0 because all the boards we support treat it - specially. */ -struct used_gint { - unsigned gint; - unsigned priority; -} used_gint[] = { - { 1, GBUS_INT_PRIORITY_HIGH }, - { 3, GBUS_INT_PRIORITY_LOW } -}; -#define NUM_USED_GINTS ARRAY_SIZE(used_gint) - -/* A table of which GINT is used by each GBUS interrupts (they are - assigned based on priority). */ -static unsigned char gbus_int_gint[IRQ_GBUS_INT_NUM]; - - -/* Interrupt enabling/disabling. */ - -/* Enable interrupt handling for interrupt IRQ. */ -void gbus_int_enable_irq (unsigned irq) -{ - unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; - GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) - |= GBUS_INT_IRQ_MASK (irq); -} - -/* Disable interrupt handling for interrupt IRQ. Note that any - interrupts received while disabled will be delivered once the - interrupt is enabled again, unless they are explicitly cleared using - `gbus_int_clear_pending_irq'. */ -void gbus_int_disable_irq (unsigned irq) -{ - unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; - GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) - &= ~GBUS_INT_IRQ_MASK (irq); -} - -/* Return true if interrupt handling for interrupt IRQ is enabled. */ -int gbus_int_irq_enabled (unsigned irq) -{ - unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; - return (GBUS_INT_ENABLE (GBUS_INT_IRQ_WORD(irq), gint) - & GBUS_INT_IRQ_MASK(irq)); -} - -/* Disable all GBUS irqs. */ -void gbus_int_disable_irqs () -{ - unsigned w, n; - for (w = 0; w < GBUS_INT_NUM_WORDS; w++) - for (n = 0; n < IRQ_GINT_NUM; n++) - GBUS_INT_ENABLE (w, n) = 0; -} - -/* Clear any pending interrupts for IRQ. */ -void gbus_int_clear_pending_irq (unsigned irq) -{ - GBUS_INT_CLEAR (GBUS_INT_IRQ_WORD(irq)) = GBUS_INT_IRQ_MASK (irq); -} - -/* Return true if interrupt IRQ is pending (but disabled). */ -int gbus_int_irq_pending (unsigned irq) -{ - return (GBUS_INT_STATUS (GBUS_INT_IRQ_WORD(irq)) - & GBUS_INT_IRQ_MASK(irq)); -} - - -/* Delegating interrupts. */ - -/* Handle a shared GINT interrupt by passing to the appropriate GBUS - interrupt handler. */ -static irqreturn_t gbus_int_handle_irq (int irq, void *dev_id, - struct pt_regs *regs) -{ - unsigned w; - irqreturn_t rval = IRQ_NONE; - unsigned gint = irq - IRQ_GINT (0); - - for (w = 0; w < GBUS_INT_NUM_WORDS; w++) { - unsigned status = GBUS_INT_STATUS (w); - unsigned enable = GBUS_INT_ENABLE (w, gint); - - /* Only pay attention to enabled interrupts. */ - status &= enable; - if (status) { - irq = IRQ_GBUS_INT (w * GBUS_INT_BITS_PER_WORD); - do { - /* There's an active interrupt in word - W, find out which one, and call its - handler. */ - - while (! (status & 0x1)) { - irq++; - status >>= 1; - } - status &= ~0x1; - - /* Recursively call handle_irq to handle it. */ - handle_irq (irq, regs); - rval = IRQ_HANDLED; - } while (status); - } - } - - /* Toggle the `all enable' bit back and forth, which should cause - another edge transition if there are any other interrupts - still pending, and so result in another CPU interrupt. */ - GBUS_INT_ENABLE (0, gint) &= ~0x1; - GBUS_INT_ENABLE (0, gint) |= 0x1; - - return rval; -} - - -/* Initialize GBUS interrupt sources. */ - -static void irq_nop (unsigned irq) { } - -static unsigned gbus_int_startup_irq (unsigned irq) -{ - unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; - - if (gint_num_active_irqs[gint] == 0) { - /* First enable the CPU interrupt. */ - int rval = - request_irq (IRQ_GINT(gint), gbus_int_handle_irq, - IRQF_DISABLED, - "gbus_int_handler", - &gint_num_active_irqs[gint]); - if (rval != 0) - return rval; - } - - gint_num_active_irqs[gint]++; - - gbus_int_clear_pending_irq (irq); - gbus_int_enable_irq (irq); - - return 0; -} - -static void gbus_int_shutdown_irq (unsigned irq) -{ - unsigned gint = gbus_int_gint[irq - GBUS_INT_BASE_IRQ]; - - gbus_int_disable_irq (irq); - - if (--gint_num_active_irqs[gint] == 0) - /* Disable the CPU interrupt. */ - free_irq (IRQ_GINT(gint), &gint_num_active_irqs[gint]); -} - -/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array - INITS (which is terminated by an entry with the name field == 0). */ -void __init gbus_int_init_irq_types (struct gbus_int_irq_init *inits, - struct hw_interrupt_type *hw_irq_types) -{ - struct gbus_int_irq_init *init; - for (init = inits; init->name; init++) { - unsigned i; - struct hw_interrupt_type *hwit = hw_irq_types++; - - hwit->typename = init->name; - - hwit->startup = gbus_int_startup_irq; - hwit->shutdown = gbus_int_shutdown_irq; - hwit->enable = gbus_int_enable_irq; - hwit->disable = gbus_int_disable_irq; - hwit->ack = irq_nop; - hwit->end = irq_nop; - - /* Initialize kernel IRQ infrastructure for this interrupt. */ - init_irq_handlers(init->base, init->num, init->interval, hwit); - - /* Set the interrupt priorities. */ - for (i = 0; i < init->num; i++) { - unsigned j; - for (j = 0; j < NUM_USED_GINTS; j++) - if (used_gint[j].priority > init->priority) - break; - /* Wherever we stopped looking is one past the - GINT we want. */ - gbus_int_gint[init->base + i * init->interval - - GBUS_INT_BASE_IRQ] - = used_gint[j > 0 ? j - 1 : 0].gint; - } - } -} - - -/* Initialize IRQS. */ - -/* Chip interrupts (GINTn) shared among GBUS interrupts. */ -static struct hw_interrupt_type gint_hw_itypes[NUM_USED_GINTS]; - - -/* GBUS interrupts themselves. */ - -struct gbus_int_irq_init gbus_irq_inits[] __initdata = { - /* First set defaults. */ - { "GBUS_INT", IRQ_GBUS_INT(0), IRQ_GBUS_INT_NUM, 1, 6}, - { 0 } -}; -#define NUM_GBUS_IRQ_INITS (ARRAY_SIZE(gbus_irq_inits) - 1) - -static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; - - -/* Initialize GBUS interrupts. */ -void __init gbus_int_init_irqs (void) -{ - unsigned i; - - /* First initialize the shared gint interrupts. */ - for (i = 0; i < NUM_USED_GINTS; i++) { - unsigned gint = used_gint[i].gint; - struct v850e_intc_irq_init gint_irq_init[2]; - - /* We initialize one GINT interrupt at a time. */ - gint_irq_init[0].name = "GINT"; - gint_irq_init[0].base = IRQ_GINT (gint); - gint_irq_init[0].num = 1; - gint_irq_init[0].interval = 1; - gint_irq_init[0].priority = used_gint[i].priority; - - gint_irq_init[1].name = 0; /* Terminate the vector. */ - - v850e_intc_init_irq_types (gint_irq_init, gint_hw_itypes); - } - - /* Then the GBUS interrupts. */ - gbus_int_disable_irqs (); - gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); - /* Turn on the `all enable' bits, which are ANDed with - individual interrupt enable bits; we only want to bother with - the latter. They are the first bit in the first word of each - interrupt-enable area. */ - for (i = 0; i < NUM_USED_GINTS; i++) - GBUS_INT_ENABLE (0, used_gint[i].gint) = 0x1; -} diff --git a/arch/v850/kernel/head.S b/arch/v850/kernel/head.S deleted file mode 100644 index c490b937ef141b059e9638e263465329003de2a6..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/head.S +++ /dev/null @@ -1,128 +0,0 @@ -/* - * arch/v850/kernel/head.S -- Lowest-level startup code - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include - - -/* Make a slightly more convenient alias for C_SYMBOL_NAME. */ -#define CSYM C_SYMBOL_NAME - - - .text - - // Define `mach_early_init' as a weak symbol - .global CSYM(mach_early_init) - .weak CSYM(mach_early_init) - -C_ENTRY(start): - // Make sure interrupts are turned off, just in case - di - -#ifdef CONFIG_RESET_GUARD - // See if we got here via an unexpected reset - ld.w RESET_GUARD, r19 // Check current value of reset guard - mov RESET_GUARD_ACTIVE, r20 - cmp r19, r20 - bne 1f // Guard was not active - - // If we get here, the reset guard was active. Load up some - // interesting values as arguments, and jump to the handler. - st.w r0, RESET_GUARD // Allow further resets to succeed - mov lp, r6 // Arg 0: return address - ld.b KM, r7 // Arg 1: kernel mode - mov sp, r9 // Arg 3: stack pointer - ld.w KSP, r19 // maybe switch to kernel stack - cmp r7, r0 // see if already in kernel mode - cmov z, r19, sp, sp // and switch to kernel stack if not - GET_CURRENT_TASK(r8) // Arg 2: task pointer - jr CSYM(unexpected_reset) - -1: st.w r20, RESET_GUARD // Turn on reset guard -#endif /* CONFIG_RESET_GUARD */ - - // Setup a temporary stack for doing pre-initialization function calls. - // - // We can't use the initial kernel stack, because (1) it may be - // located in memory we're not allowed to touch, and (2) since - // it's in the data segment, calling memcpy to initialize that - // area from ROM will overwrite memcpy's return address. - mov hilo(CSYM(_init_stack_end) - 4), sp - - // See if there's a platform-specific early-initialization routine - // defined; it's a weak symbol, so it will have an address of zero if - // there's not. - mov hilo(CSYM(mach_early_init)), r6 - cmp r6, r0 - bz 3f - - // There is one, so call it. If this function is written in C, it - // should be very careful -- the stack pointer is valid, but very - // little else is (e.g., bss is not zeroed yet, and initialized data - // hasn't been). - jarl 2f, lp // first figure out return address -2: add 3f - ., lp - jmp [r6] // do call -3: - -#ifdef CONFIG_ROM_KERNEL - // Copy the data area from ROM to RAM - mov hilo(CSYM(_rom_copy_dst_start)), r6 - mov hilo(CSYM(_rom_copy_src_start)), r7 - mov hilo(CSYM(_rom_copy_dst_end)), r8 - sub r6, r8 - jarl CSYM(memcpy), lp -#endif - - // Load the initial thread's stack, and current task pointer (in r16) - mov hilo(CSYM(init_thread_union)), r19 - movea THREAD_SIZE, r19, sp - ld.w TI_TASK[r19], CURRENT_TASK - -#ifdef CONFIG_TIME_BOOTUP - /* This stuff must come after mach_early_init, because interrupts may - not work until after its been called. */ - jarl CSYM(highres_timer_reset), lp - jarl CSYM(highres_timer_start), lp -#endif - - // Kernel stack pointer save location - st.w sp, KSP - - // Assert that we're in `kernel mode' - mov 1, r19 - st.w r19, KM - -#ifdef CONFIG_ZERO_BSS - // Zero bss area, since we can't rely upon any loader to do so - mov hilo(CSYM(_sbss)), r6 - mov r0, r7 - mov hilo(CSYM(_ebss)), r8 - sub r6, r8 - jarl CSYM(memset), lp -#endif - - // What happens if the main kernel function returns (it shouldn't) - mov hilo(CSYM(machine_halt)), lp - - // Start the linux kernel. We use an indirect jump to get extra - // range, because on some platforms this initial startup code - // (and the associated platform-specific code in mach_early_init) - // are located far away from the main kernel, e.g. so that they - // can initialize RAM first and copy the kernel or something. - mov hilo(CSYM(start_kernel)), r12 - jmp [r12] -C_END(start) diff --git a/arch/v850/kernel/highres_timer.c b/arch/v850/kernel/highres_timer.c deleted file mode 100644 index b16ad1eaf9664f43aa4ebd04111f8ed6ea753ecc..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/highres_timer.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * arch/v850/kernel/highres_timer.c -- High resolution timing routines - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include - -#define HIGHRES_TIMER_USEC_SHIFT 12 - -/* Pre-calculated constant used for converting ticks to real time - units. We initialize it to prevent it being put into BSS. */ -static u32 highres_timer_usec_prescale = 1; - -void highres_timer_slow_tick_irq (void) __attribute__ ((noreturn)); -void highres_timer_slow_tick_irq (void) -{ - /* This is an interrupt handler, so it must be very careful to - not to trash any registers. At this point, the stack-pointer - (r3) has been saved in the chip ram location ENTRY_SP by the - interrupt vector, so we can use it as a scratch register; we - must also restore it before returning. */ - asm ("ld.w %0[r0], sp;" - "add 1, sp;" - "st.w sp, %0[r0];" - "ld.w %1[r0], sp;" /* restore pre-irq stack-pointer */ - "reti" - :: - "i" (HIGHRES_TIMER_SLOW_TICKS_ADDR), - "i" (ENTRY_SP_ADDR) - : "memory"); -} - -void highres_timer_reset (void) -{ - V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT) = 0; - HIGHRES_TIMER_SLOW_TICKS = 0; -} - -void highres_timer_start (void) -{ - u32 fast_tick_rate; - - /* Start hardware timer. */ - v850e_timer_d_configure (HIGHRES_TIMER_TIMER_D_UNIT, - HIGHRES_TIMER_SLOW_TICK_RATE); - - fast_tick_rate = - (V850E_TIMER_D_BASE_FREQ - >> V850E_TIMER_D_DIVLOG2 (HIGHRES_TIMER_TIMER_D_UNIT)); - - /* The obvious way of calculating microseconds from fast ticks - is to do: - - usec = fast_ticks * 10^6 / fast_tick_rate - - However, divisions are much slower than multiplications, and - the above calculation can overflow, so we do this instead: - - usec = fast_ticks * (10^6 * 2^12 / fast_tick_rate) / 2^12 - - since we can pre-calculate (10^6 * (2^12 / fast_tick_rate)) - and use a shift for dividing by 2^12, this avoids division, - and is almost as accurate (it differs by about 2 microseconds - at the extreme value of the fast-tick counter's ranger). */ - highres_timer_usec_prescale = ((1000000 << HIGHRES_TIMER_USEC_SHIFT) - / fast_tick_rate); - - /* Enable the interrupt (which is hardwired to this use), and - give it the highest priority. */ - V850E_INTC_IC (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)) = 0; -} - -void highres_timer_stop (void) -{ - /* Stop the timer. */ - V850E_TIMER_D_TMCD (HIGHRES_TIMER_TIMER_D_UNIT) = - V850E_TIMER_D_TMCD_CAE; - /* Disable its interrupt, just in case. */ - v850e_intc_disable_irq (IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT)); -} - -inline void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks) -{ - int flags; - u32 fast_ticks_1, fast_ticks_2, _slow_ticks; - - local_irq_save (flags); - fast_ticks_1 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); - _slow_ticks = HIGHRES_TIMER_SLOW_TICKS; - fast_ticks_2 = V850E_TIMER_D_TMD (HIGHRES_TIMER_TIMER_D_UNIT); - local_irq_restore (flags); - - if (fast_ticks_2 < fast_ticks_1) - _slow_ticks++; - - *slow_ticks = _slow_ticks; - *fast_ticks = fast_ticks_2; -} - -inline void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks, - struct timeval *tv) -{ - unsigned long sec, sec_rem, usec; - - usec = ((fast_ticks * highres_timer_usec_prescale) - >> HIGHRES_TIMER_USEC_SHIFT); - - sec = slow_ticks / HIGHRES_TIMER_SLOW_TICK_RATE; - sec_rem = slow_ticks % HIGHRES_TIMER_SLOW_TICK_RATE; - - usec += sec_rem * (1000000 / HIGHRES_TIMER_SLOW_TICK_RATE); - - tv->tv_sec = sec; - tv->tv_usec = usec; -} - -void highres_timer_read (struct timeval *tv) -{ - u32 fast_ticks, slow_ticks; - highres_timer_read_ticks (&slow_ticks, &fast_ticks); - highres_timer_ticks_to_timeval (slow_ticks, fast_ticks, tv); -} diff --git a/arch/v850/kernel/init_task.c b/arch/v850/kernel/init_task.c deleted file mode 100644 index 44b274dff33fb043e5ec9763cdc03b1cdcd559fb..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/init_task.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * arch/v850/kernel/init_task.c -- Initial task/thread structures - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -static struct fs_struct init_fs = INIT_FS; -static struct signal_struct init_signals = INIT_SIGNALS (init_signals); -static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); -struct mm_struct init_mm = INIT_MM (init_mm); - -EXPORT_SYMBOL(init_mm); - -/* - * Initial task structure. - * - * All other task structs will be allocated on slabs in fork.c - */ -struct task_struct init_task = INIT_TASK (init_task); - -EXPORT_SYMBOL(init_task); - -/* - * Initial thread structure. - * - * We need to make sure that this is 8192-byte aligned due to the - * way process stacks are handled. This is done by having a special - * "init_task" linker map entry. - */ -union thread_union init_thread_union - __attribute__((__section__(".data.init_task"))) = - { INIT_THREAD_INFO(init_task) }; diff --git a/arch/v850/kernel/intv.S b/arch/v850/kernel/intv.S deleted file mode 100644 index 671e4c6150dd7f0393d39e176634a01272168f9a..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/intv.S +++ /dev/null @@ -1,87 +0,0 @@ -/* - * arch/v850/kernel/intv.S -- Interrupt vectors - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include - -#ifdef CONFIG_V850E_HIGHRES_TIMER -#include -#endif - -/* Jump to an interrupt/trap handler. These handlers (defined in entry.S) - expect the stack-pointer to be saved in ENTRY_SP, so we use sp to do an - indirect jump (which avoids problems when the handler is more than a signed - 22-bit offset away). */ -#define JUMP_TO_HANDLER(name, sp_save_loc) \ - st.w sp, sp_save_loc; \ - mov hilo(name), sp; \ - jmp [sp] - - - /* Reset vector. */ - .section .intv.reset, "ax" - .org 0x0 - mov hilo(C_SYMBOL_NAME(start)), r1; - jmp [r1] - - - /* Generic interrupt vectors. */ - .section .intv.common, "ax" - .balign 0x10 - JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x10 - NMI0 - .balign 0x10 - JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x20 - NMI1 - .balign 0x10 - JUMP_TO_HANDLER (nmi, NMI_ENTRY_SP) // 0x30 - NMI2 - - .balign 0x10 - JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x40 - TRAP0n - .balign 0x10 - JUMP_TO_HANDLER (trap, ENTRY_SP) // 0x50 - TRAP1n - - .balign 0x10 - JUMP_TO_HANDLER (dbtrap, ENTRY_SP) // 0x60 - Illegal op / DBTRAP insn - - - /* Hardware interrupt vectors. */ - .section .intv.mach, "ax" - .org 0x0 - -#if defined (CONFIG_V850E_HIGHRES_TIMER) && defined (IRQ_INTCMD) - - /* Interrupts before the highres timer interrupt. */ - .rept IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) - .balign 0x10 - JUMP_TO_HANDLER (irq, ENTRY_SP) - .endr - - /* The highres timer interrupt. */ - .balign 0x10 - JUMP_TO_HANDLER (C_SYMBOL_NAME (highres_timer_slow_tick_irq), ENTRY_SP) - - /* Interrupts after the highres timer interrupt. */ - .rept NUM_CPU_IRQS - IRQ_INTCMD (HIGHRES_TIMER_TIMER_D_UNIT) - 1 - .balign 0x10 - JUMP_TO_HANDLER (irq, ENTRY_SP) - .endr - -#else /* No highres timer */ - - .rept NUM_CPU_IRQS - .balign 0x10 - JUMP_TO_HANDLER (irq, ENTRY_SP) - .endr - -#endif /* Highres timer */ diff --git a/arch/v850/kernel/irq.c b/arch/v850/kernel/irq.c deleted file mode 100644 index 858c45819aabe496dd663eb27195ea3d835b4f1c..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/irq.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * arch/v850/kernel/irq.c -- High-level interrupt handling - * - * Copyright (C) 2001,02,03,04,05 NEC Electronics Corporation - * Copyright (C) 2001,02,03,04,05 Miles Bader - * Copyright (C) 1994-2000 Ralf Baechle - * Copyright (C) 1992 Linus Torvalds - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * This file was was derived from the mips version, arch/mips/kernel/irq.c - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -/* - * 'what should we do if we get a hw irq event on an illegal vector'. - * each architecture has to answer this themselves, it doesn't deserve - * a generic callback i think. - */ -void ack_bad_irq(unsigned int irq) -{ - printk("received IRQ %d with unknown interrupt type\n", irq); -} - -volatile unsigned long irq_err_count, spurious_count; - -/* - * Generic, controller-independent functions: - */ - -int show_interrupts(struct seq_file *p, void *v) -{ - int irq = *(loff_t *) v; - - if (irq == 0) { - int cpu; - seq_puts(p, " "); - for (cpu=0; cpu < 1 /*smp_num_cpus*/; cpu++) - seq_printf(p, "CPU%d ", cpu); - seq_putc(p, '\n'); - } - - if (irq < NR_IRQS) { - unsigned long flags; - struct irqaction *action; - - spin_lock_irqsave(&irq_desc[irq].lock, flags); - - action = irq_desc[irq].action; - if (action) { - int j; - int count = 0; - int num = -1; - const char *type_name = irq_desc[irq].chip->typename; - - for (j = 0; j < NR_IRQS; j++) - if (irq_desc[j].chip->typename == type_name){ - if (irq == j) - num = count; - count++; - } - - seq_printf(p, "%3d: ",irq); - seq_printf(p, "%10u ", kstat_irqs(irq)); - if (count > 1) { - int prec = (num >= 100 ? 3 : num >= 10 ? 2 : 1); - seq_printf(p, " %*s%d", 14 - prec, - type_name, num); - } else - seq_printf(p, " %14s", type_name); - - seq_printf(p, " %s", action->name); - for (action=action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - seq_putc(p, '\n'); - } - - spin_unlock_irqrestore(&irq_desc[irq].lock, flags); - } else if (irq == NR_IRQS) - seq_printf(p, "ERR: %10lu\n", irq_err_count); - - return 0; -} - -/* Handle interrupt IRQ. REGS are the registers at the time of ther - interrupt. */ -unsigned int handle_irq (int irq, struct pt_regs *regs) -{ - irq_enter(); - __do_IRQ(irq, regs); - irq_exit(); - return 1; -} - -/* Initialize irq handling for IRQs. - BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL - to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */ -void __init -init_irq_handlers (int base_irq, int num, int interval, - struct hw_interrupt_type *irq_type) -{ - while (num-- > 0) { - irq_desc[base_irq].status = IRQ_DISABLED; - irq_desc[base_irq].action = NULL; - irq_desc[base_irq].depth = 1; - irq_desc[base_irq].chip = irq_type; - base_irq += interval; - } -} diff --git a/arch/v850/kernel/ma.c b/arch/v850/kernel/ma.c deleted file mode 100644 index 143774de75e1a590ca83a82018f10706bfa09be5..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/ma.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * arch/v850/kernel/ma.c -- V850E/MA series of cpu chips - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mach.h" - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Start hardware timer. */ - v850e_timer_d_configure (0, HZ); - /* Install timer interrupt handler. */ - setup_irq (IRQ_INTCMD(0), timer_action); -} - -static struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, - { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, - { "DMA", IRQ_INTDMA(0), IRQ_INTDMA_NUM, 1, 2 }, - { "CSI", IRQ_INTCSI(0), IRQ_INTCSI_NUM, 4, 4 }, - { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 4, 3 }, - { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 4, 4 }, - { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 4, 5 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -/* Initialize MA chip interrupts. */ -void __init ma_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - -/* Called before configuring an on-chip UART. */ -void ma_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) -{ - /* We only know about the first two UART channels (though - specific chips may have more). */ - if (chan < 2) { - unsigned bits = 0x3 << (chan * 3); - /* Specify that the relevant pins on the chip should do - serial I/O, not direct I/O. */ - MA_PORT4_PMC |= bits; - /* Specify that we're using the UART, not the CSI device. */ - MA_PORT4_PFC |= bits; - } -} diff --git a/arch/v850/kernel/mach.c b/arch/v850/kernel/mach.c deleted file mode 100644 index b9db278d2b715583c17c83ed79b609c9dcc5bc65..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/mach.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/v850/kernel/mach.c -- Defaults for some things defined by "mach.h" - * - * Copyright (C) 2001 NEC Corporation - * Copyright (C) 2001 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include "mach.h" - -/* Called with each timer tick, if non-zero. */ -void (*mach_tick)(void) = 0; diff --git a/arch/v850/kernel/mach.h b/arch/v850/kernel/mach.h deleted file mode 100644 index 9e0e4816ec56f2f782cd7828d3ed79d51b1b8ac2..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/mach.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * arch/v850/kernel/mach.h -- Machine-dependent functions used by v850 port - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#ifndef __V850_MACH_H__ -#define __V850_MACH_H__ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -void mach_setup (char **cmdline); -void mach_gettimeofday (struct timespec *tv); -void mach_sched_init (struct irqaction *timer_action); -void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len); -void mach_init_irqs (void); - -/* If defined, is called very early in the kernel initialization. The - stack pointer is valid, but very little has been initialized (e.g., - bss is not zeroed yet) when this is called, so care must taken. */ -void mach_early_init (void); - -/* If defined, called after the bootmem allocator has been initialized, - to allow the platform-dependent code to reserve any areas of RAM that - the kernel shouldn't touch. */ -void mach_reserve_bootmem (void) __attribute__ ((__weak__)); - -/* Called with each timer tick, if non-zero. */ -extern void (*mach_tick) (void); - -/* The following establishes aliases for various mach_ functions to the - name by which the rest of the kernel calls them. These statements - should only have an effect in the file that defines the actual functions. */ -#define MACH_ALIAS(to, from) \ - asm (".global " macrology_stringify (C_SYMBOL_NAME (to)) ";" \ - macrology_stringify (C_SYMBOL_NAME (to)) \ - " = " macrology_stringify (C_SYMBOL_NAME (from))) -/* e.g.: MACH_ALIAS (kernel_name, arch_spec_name); */ - -#endif /* __V850_MACH_H__ */ diff --git a/arch/v850/kernel/me2.c b/arch/v850/kernel/me2.c deleted file mode 100644 index 007115dc9ce0e14d8fc380f29134ebc28a2c5e49..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/me2.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * arch/v850/kernel/me2.c -- V850E/ME2 chip-specific support - * - * Copyright (C) 2003 NEC Corporation - * Copyright (C) 2003 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mach.h" - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Start hardware timer. */ - v850e_timer_d_configure (0, HZ); - /* Install timer interrupt handler. */ - setup_irq (IRQ_INTCMD(0), timer_action); -} - -static struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_CPU_IRQS, 1, 7 }, - { "INTP", IRQ_INTP(0), IRQ_INTP_NUM, 1, 5 }, - { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 3 }, - { "UBTIRE", IRQ_INTUBTIRE(0), IRQ_INTUBTIRE_NUM, 5, 4 }, - { "UBTIR", IRQ_INTUBTIR(0), IRQ_INTUBTIR_NUM, 5, 4 }, - { "UBTIT", IRQ_INTUBTIT(0), IRQ_INTUBTIT_NUM, 5, 4 }, - { "UBTIF", IRQ_INTUBTIF(0), IRQ_INTUBTIF_NUM, 5, 4 }, - { "UBTITO", IRQ_INTUBTITO(0), IRQ_INTUBTITO_NUM, 5, 4 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -/* Initialize V850E/ME2 chip interrupts. */ -void __init me2_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - -/* Called before configuring an on-chip UART. */ -void me2_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) -{ - if (chan == 0) { - /* Specify that the relevant pins on the chip should do - serial I/O, not direct I/O. */ - ME2_PORT1_PMC |= 0xC; - /* Specify that we're using the UART, not the CSI device. */ - ME2_PORT1_PFC |= 0xC; - } else if (chan == 1) { - /* Specify that the relevant pins on the chip should do - serial I/O, not direct I/O. */ - ME2_PORT2_PMC |= 0x6; - /* Specify that we're using the UART, not the CSI device. */ - ME2_PORT2_PFC |= 0x6; - } -} diff --git a/arch/v850/kernel/memcons.c b/arch/v850/kernel/memcons.c deleted file mode 100644 index 92f514fdcc79fa608e98093e1d003d506ef0eaf1..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/memcons.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * arch/v850/kernel/memcons.c -- Console I/O to a memory buffer - * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include - -/* If this device is enabled, the linker map should define start and - end points for its buffer. */ -extern char memcons_output[], memcons_output_end; - -/* Current offset into the buffer. */ -static unsigned long memcons_offs = 0; - -/* Spinlock protecting memcons_offs. */ -static DEFINE_SPINLOCK(memcons_lock); - - -static size_t write (const char *buf, size_t len) -{ - unsigned long flags; - char *point; - - spin_lock_irqsave (memcons_lock, flags); - - point = memcons_output + memcons_offs; - if (point + len >= &memcons_output_end) { - len = &memcons_output_end - point; - memcons_offs = 0; - } else - memcons_offs += len; - - spin_unlock_irqrestore (memcons_lock, flags); - - memcpy (point, buf, len); - - return len; -} - - -/* Low-level console. */ - -static void memcons_write (struct console *co, const char *buf, unsigned len) -{ - while (len > 0) - len -= write (buf, len); -} - -static struct tty_driver *tty_driver; - -static struct tty_driver *memcons_device (struct console *co, int *index) -{ - *index = co->index; - return tty_driver; -} - -static struct console memcons = -{ - .name = "memcons", - .write = memcons_write, - .device = memcons_device, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -void memcons_setup (void) -{ - register_console (&memcons); - printk (KERN_INFO "Console: static memory buffer (memcons)\n"); -} - -/* Higher level TTY interface. */ - -int memcons_tty_open (struct tty_struct *tty, struct file *filp) -{ - return 0; -} - -int memcons_tty_write (struct tty_struct *tty, const unsigned char *buf, int len) -{ - return write (buf, len); -} - -int memcons_tty_write_room (struct tty_struct *tty) -{ - return &memcons_output_end - (memcons_output + memcons_offs); -} - -int memcons_tty_chars_in_buffer (struct tty_struct *tty) -{ - /* We have no buffer. */ - return 0; -} - -static const struct tty_operations ops = { - .open = memcons_tty_open, - .write = memcons_tty_write, - .write_room = memcons_tty_write_room, - .chars_in_buffer = memcons_tty_chars_in_buffer, -}; - -int __init memcons_tty_init (void) -{ - int err; - struct tty_driver *driver = alloc_tty_driver(1); - if (!driver) - return -ENOMEM; - - driver->name = "memcons"; - driver->major = TTY_MAJOR; - driver->minor_start = 64; - driver->type = TTY_DRIVER_TYPE_SYSCONS; - driver->init_termios = tty_std_termios; - tty_set_operations(driver, &ops); - err = tty_register_driver(driver); - if (err) { - put_tty_driver(driver); - return err; - } - tty_driver = driver; - return 0; -} -__initcall (memcons_tty_init); diff --git a/arch/v850/kernel/module.c b/arch/v850/kernel/module.c deleted file mode 100644 index 64aeb3e37c52716c1687eecbd46a509c2db27309..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/module.c +++ /dev/null @@ -1,237 +0,0 @@ -/* - * arch/v850/kernel/module.c -- Architecture-specific module functions - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * Copyright (C) 2001,03 Rusty Russell - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - * - * Derived in part from arch/ppc/kernel/module.c - */ - -#include -#include -#include -#include - -#if 0 -#define DEBUGP printk -#else -#define DEBUGP(fmt , ...) -#endif - -void *module_alloc (unsigned long size) -{ - return size == 0 ? 0 : vmalloc (size); -} - -void module_free (struct module *mod, void *module_region) -{ - vfree (module_region); - /* FIXME: If module_region == mod->init_region, trim exception - table entries. */ -} - -int module_finalize (const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, - struct module *mod) -{ - return 0; -} - -/* Count how many different relocations (different symbol, different - addend) */ -static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num) -{ - unsigned int i, j, ret = 0; - - /* Sure, this is order(n^2), but it's usually short, and not - time critical */ - for (i = 0; i < num; i++) { - for (j = 0; j < i; j++) { - /* If this addend appeared before, it's - already been counted */ - if (ELF32_R_SYM(rela[i].r_info) - == ELF32_R_SYM(rela[j].r_info) - && rela[i].r_addend == rela[j].r_addend) - break; - } - if (j == i) ret++; - } - return ret; -} - -/* Get the potential trampolines size required of the init and - non-init sections */ -static unsigned long get_plt_size(const Elf32_Ehdr *hdr, - const Elf32_Shdr *sechdrs, - const char *secstrings, - int is_init) -{ - unsigned long ret = 0; - unsigned i; - - /* Everything marked ALLOC (this includes the exported - symbols) */ - for (i = 1; i < hdr->e_shnum; i++) { - /* If it's called *.init*, and we're not init, we're - not interested */ - if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0) - != is_init) - continue; - - if (sechdrs[i].sh_type == SHT_RELA) { - DEBUGP("Found relocations in section %u\n", i); - DEBUGP("Ptr: %p. Number: %u\n", - (void *)hdr + sechdrs[i].sh_offset, - sechdrs[i].sh_size / sizeof(Elf32_Rela)); - ret += count_relocs((void *)hdr - + sechdrs[i].sh_offset, - sechdrs[i].sh_size - / sizeof(Elf32_Rela)) - * sizeof(struct v850_plt_entry); - } - } - - return ret; -} - -int module_frob_arch_sections(Elf32_Ehdr *hdr, - Elf32_Shdr *sechdrs, - char *secstrings, - struct module *me) -{ - unsigned int i; - - /* Find .plt and .pltinit sections */ - for (i = 0; i < hdr->e_shnum; i++) { - if (strcmp(secstrings + sechdrs[i].sh_name, ".init.plt") == 0) - me->arch.init_plt_section = i; - else if (strcmp(secstrings + sechdrs[i].sh_name, ".plt") == 0) - me->arch.core_plt_section = i; - } - if (!me->arch.core_plt_section || !me->arch.init_plt_section) { - printk("Module doesn't contain .plt or .plt.init sections.\n"); - return -ENOEXEC; - } - - /* Override their sizes */ - sechdrs[me->arch.core_plt_section].sh_size - = get_plt_size(hdr, sechdrs, secstrings, 0); - sechdrs[me->arch.init_plt_section].sh_size - = get_plt_size(hdr, sechdrs, secstrings, 1); - return 0; -} - -int apply_relocate (Elf32_Shdr *sechdrs, const char *strtab, - unsigned int symindex, unsigned int relsec, - struct module *mod) -{ - printk ("Barf\n"); - return -ENOEXEC; -} - -/* Set up a trampoline in the PLT to bounce us to the distant function */ -static uint32_t do_plt_call (void *location, Elf32_Addr val, - Elf32_Shdr *sechdrs, struct module *mod) -{ - struct v850_plt_entry *entry; - /* Instructions used to do the indirect jump. */ - uint32_t tramp[2]; - - /* We have to trash a register, so we assume that any control - transfer more than 21-bits away must be a function call - (so we can use a call-clobbered register). */ - tramp[0] = 0x0621 + ((val & 0xffff) << 16); /* mov sym, r1 ... */ - tramp[1] = ((val >> 16) & 0xffff) + 0x610000; /* ...; jmp r1 */ - - /* Init, or core PLT? */ - if (location >= mod->module_core - && location < mod->module_core + mod->core_size) - entry = (void *)sechdrs[mod->arch.core_plt_section].sh_addr; - else - entry = (void *)sechdrs[mod->arch.init_plt_section].sh_addr; - - /* Find this entry, or if that fails, the next avail. entry */ - while (entry->tramp[0]) - if (entry->tramp[0] == tramp[0] && entry->tramp[1] == tramp[1]) - return (uint32_t)entry; - else - entry++; - - entry->tramp[0] = tramp[0]; - entry->tramp[1] = tramp[1]; - - return (uint32_t)entry; -} - -int apply_relocate_add (Elf32_Shdr *sechdrs, const char *strtab, - unsigned int symindex, unsigned int relsec, - struct module *mod) -{ - unsigned int i; - Elf32_Rela *rela = (void *)sechdrs[relsec].sh_addr; - - DEBUGP ("Applying relocate section %u to %u\n", relsec, - sechdrs[relsec].sh_info); - - for (i = 0; i < sechdrs[relsec].sh_size / sizeof (*rela); i++) { - /* This is where to make the change */ - uint32_t *loc - = ((void *)sechdrs[sechdrs[relsec].sh_info].sh_addr - + rela[i].r_offset); - /* This is the symbol it is referring to. Note that all - undefined symbols have been resolved. */ - Elf32_Sym *sym - = ((Elf32_Sym *)sechdrs[symindex].sh_addr - + ELF32_R_SYM (rela[i].r_info)); - uint32_t val = sym->st_value + rela[i].r_addend; - - switch (ELF32_R_TYPE (rela[i].r_info)) { - case R_V850_32: - /* We write two shorts instead of a long because even - 32-bit insns only need half-word alignment, but - 32-bit data writes need to be long-word aligned. */ - val += ((uint16_t *)loc)[0]; - val += ((uint16_t *)loc)[1] << 16; - ((uint16_t *)loc)[0] = val & 0xffff; - ((uint16_t *)loc)[1] = (val >> 16) & 0xffff; - break; - - case R_V850_22_PCREL: - /* Maybe jump indirectly via a PLT table entry. */ - if ((int32_t)(val - (uint32_t)loc) > 0x1fffff - || (int32_t)(val - (uint32_t)loc) < -0x200000) - val = do_plt_call (loc, val, sechdrs, mod); - - val -= (uint32_t)loc; - - /* We write two shorts instead of a long because - even 32-bit insns only need half-word alignment, - but 32-bit data writes need to be long-word - aligned. */ - ((uint16_t *)loc)[0] = - (*(uint16_t *)loc & 0xffc0) /* opcode + reg */ - | ((val >> 16) & 0xffc03f); /* offs high */ - ((uint16_t *)loc)[1] = - (val & 0xffff); /* offs low */ - break; - - default: - printk (KERN_ERR "module %s: Unknown reloc: %u\n", - mod->name, ELF32_R_TYPE (rela[i].r_info)); - return -ENOEXEC; - } - } - - return 0; -} - -void -module_arch_cleanup(struct module *mod) -{ -} diff --git a/arch/v850/kernel/process.c b/arch/v850/kernel/process.c deleted file mode 100644 index e4a4b8e7d5a3e3b664e99f9b4034c22b09c6204a..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/process.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * arch/v850/kernel/process.c -- Arch-dependent process handling - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -void (*pm_power_off)(void) = NULL; -EXPORT_SYMBOL(pm_power_off); - -extern void ret_from_fork (void); - - -/* The idle loop. */ -static void default_idle (void) -{ - while (! need_resched ()) - asm ("halt; nop; nop; nop; nop; nop" ::: "cc"); -} - -void (*idle)(void) = default_idle; - -/* - * The idle thread. There's no useful work to be - * done, so just try to conserve power and have a - * low exit latency (ie sit in a loop waiting for - * somebody to say that they'd like to reschedule) - */ -void cpu_idle (void) -{ - /* endless idle loop with no priority at all */ - while (1) { - while (!need_resched()) - (*idle) (); - - preempt_enable_no_resched(); - schedule(); - preempt_disable(); - } -} - -/* - * This is the mechanism for creating a new kernel thread. - * - * NOTE! Only a kernel-only process (ie the swapper or direct descendants who - * haven't done an "execve()") should use this: it will work within a system - * call from a "real" process, but the process memory space will not be free'd - * until both the parent and the child have exited. - */ -int kernel_thread (int (*fn)(void *), void *arg, unsigned long flags) -{ - register mm_segment_t fs = get_fs (); - register unsigned long syscall asm (SYSCALL_NUM); - register unsigned long arg0 asm (SYSCALL_ARG0); - register unsigned long ret asm (SYSCALL_RET); - - set_fs (KERNEL_DS); - - /* Clone this thread. Note that we don't pass the clone syscall's - second argument -- it's ignored for calls from kernel mode (the - child's SP is always set to the top of the kernel stack). */ - arg0 = flags | CLONE_VM; - syscall = __NR_clone; - asm volatile ("trap " SYSCALL_SHORT_TRAP - : "=r" (ret), "=r" (syscall) - : "1" (syscall), "r" (arg0) - : SYSCALL_SHORT_CLOBBERS); - - if (ret == 0) { - /* In child thread, call FN and exit. */ - arg0 = (*fn) (arg); - syscall = __NR_exit; - asm volatile ("trap " SYSCALL_SHORT_TRAP - : "=r" (ret), "=r" (syscall) - : "1" (syscall), "r" (arg0) - : SYSCALL_SHORT_CLOBBERS); - } - - /* In parent. */ - set_fs (fs); - - return ret; -} - -void flush_thread (void) -{ - set_fs (USER_DS); -} - -int copy_thread (int nr, unsigned long clone_flags, - unsigned long stack_start, unsigned long stack_size, - struct task_struct *p, struct pt_regs *regs) -{ - /* Start pushing stuff from the top of the child's kernel stack. */ - unsigned long orig_ksp = task_tos(p); - unsigned long ksp = orig_ksp; - /* We push two `state save' stack fames (see entry.S) on the new - kernel stack: - 1) The innermost one is what switch_thread would have - pushed, and is used when we context switch to the child - thread for the first time. It's set up to return to - ret_from_fork in entry.S. - 2) The outermost one (nearest the top) is what a syscall - trap would have pushed, and is set up to return to the - same location as the parent thread, but with a return - value of 0. */ - struct pt_regs *child_switch_regs, *child_trap_regs; - - /* Trap frame. */ - ksp -= STATE_SAVE_SIZE; - child_trap_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); - /* Switch frame. */ - ksp -= STATE_SAVE_SIZE; - child_switch_regs = (struct pt_regs *)(ksp + STATE_SAVE_PT_OFFSET); - - /* First copy parent's register state to child. */ - *child_switch_regs = *regs; - *child_trap_regs = *regs; - - /* switch_thread returns to the restored value of the lp - register (r31), so we make that the place where we want to - jump when the child thread begins running. */ - child_switch_regs->gpr[GPR_LP] = (v850_reg_t)ret_from_fork; - - if (regs->kernel_mode) - /* Since we're returning to kernel-mode, make sure the child's - stored kernel stack pointer agrees with what the actual - stack pointer will be at that point (the trap return code - always restores the SP, even when returning to - kernel-mode). */ - child_trap_regs->gpr[GPR_SP] = orig_ksp; - else - /* Set the child's user-mode stack-pointer (the name - `stack_start' is a misnomer, it's just the initial SP - value). */ - child_trap_regs->gpr[GPR_SP] = stack_start; - - /* Thread state for the child (everything else is on the stack). */ - p->thread.ksp = ksp; - - return 0; -} - -/* - * sys_execve() executes a new program. - */ -int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs) -{ - char *filename = getname (name); - int error = PTR_ERR (filename); - - if (! IS_ERR (filename)) { - error = do_execve (filename, argv, envp, regs); - putname (filename); - } - - return error; -} - - -/* - * These bracket the sleeping functions.. - */ -#define first_sched ((unsigned long)__sched_text_start) -#define last_sched ((unsigned long)__sched_text_end) - -unsigned long get_wchan (struct task_struct *p) -{ -#if 0 /* Barf. Figure out the stack-layout later. XXX */ - unsigned long fp, pc; - int count = 0; - - if (!p || p == current || p->state == TASK_RUNNING) - return 0; - - pc = thread_saved_pc (p); - - /* This quite disgusting function walks up the stack, following - saved return address, until it something that's out of bounds - (as defined by `first_sched' and `last_sched'). It then - returns the last PC that was in-bounds. */ - do { - if (fp < stack_page + sizeof (struct task_struct) || - fp >= 8184+stack_page) - return 0; - pc = ((unsigned long *)fp)[1]; - if (pc < first_sched || pc >= last_sched) - return pc; - fp = *(unsigned long *) fp; - } while (count++ < 16); -#endif - - return 0; -} diff --git a/arch/v850/kernel/procfs.c b/arch/v850/kernel/procfs.c deleted file mode 100644 index e433cde789b4d24dba12582d20f501f71fd03dc7..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/procfs.c +++ /dev/null @@ -1,67 +0,0 @@ -/* - * arch/v850/kernel/procfs.c -- Introspection functions for /proc filesystem - * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include "mach.h" - -static int cpuinfo_print (struct seq_file *m, void *v) -{ - extern unsigned long loops_per_jiffy; - - seq_printf (m, "CPU-Family: v850\nCPU-Arch: %s\n", CPU_ARCH); - -#ifdef CPU_MODEL_LONG - seq_printf (m, "CPU-Model: %s (%s)\n", CPU_MODEL, CPU_MODEL_LONG); -#else - seq_printf (m, "CPU-Model: %s\n", CPU_MODEL); -#endif - -#ifdef CPU_CLOCK_FREQ - seq_printf (m, "CPU-Clock: %ld (%ld MHz)\n", - (long)CPU_CLOCK_FREQ, - (long)CPU_CLOCK_FREQ / 1000000); -#endif - - seq_printf (m, "BogoMips: %lu.%02lu\n", - loops_per_jiffy/(500000/HZ), - (loops_per_jiffy/(5000/HZ)) % 100); - -#ifdef PLATFORM_LONG - seq_printf (m, "Platform: %s (%s)\n", PLATFORM, PLATFORM_LONG); -#elif defined (PLATFORM) - seq_printf (m, "Platform: %s\n", PLATFORM); -#endif - - return 0; -} - -static void *cpuinfo_start (struct seq_file *m, loff_t *pos) -{ - return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL; -} - -static void *cpuinfo_next (struct seq_file *m, void *v, loff_t *pos) -{ - ++*pos; - return cpuinfo_start (m, pos); -} - -static void cpuinfo_stop (struct seq_file *m, void *v) -{ -} - -const struct seq_operations cpuinfo_op = { - .start = cpuinfo_start, - .next = cpuinfo_next, - .stop = cpuinfo_stop, - .show = cpuinfo_print -}; diff --git a/arch/v850/kernel/ptrace.c b/arch/v850/kernel/ptrace.c deleted file mode 100644 index a458ac941b25b8fb432e83dc99f4c40c18aba1f7..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/ptrace.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * arch/v850/kernel/ptrace.c -- `ptrace' system call - * - * Copyright (C) 2002,03,04 NEC Electronics Corporation - * Copyright (C) 2002,03,04 Miles Bader - * - * Derived from arch/mips/kernel/ptrace.c: - * - * Copyright (C) 1992 Ross Biro - * Copyright (C) Linus Torvalds - * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle - * Copyright (C) 1996 David S. Miller - * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999 MIPS Technologies, Inc. - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/* Returns the address where the register at REG_OFFS in P is stashed away. */ -static v850_reg_t *reg_save_addr (unsigned reg_offs, struct task_struct *t) -{ - struct pt_regs *regs; - - /* Three basic cases: - - (1) A register normally saved before calling the scheduler, is - available in the kernel entry pt_regs structure at the top - of the kernel stack. The kernel trap/irq exit path takes - care to save/restore almost all registers for ptrace'd - processes. - - (2) A call-clobbered register, where the process P entered the - kernel via [syscall] trap, is not stored anywhere; that's - OK, because such registers are not expected to be preserved - when the trap returns anyway (so we don't actually bother to - test for this case). - - (3) A few registers not used at all by the kernel, and so - normally never saved except by context-switches, are in the - context switch state. */ - - if (reg_offs == PT_CTPC || reg_offs == PT_CTPSW || reg_offs == PT_CTBP) - /* Register saved during context switch. */ - regs = thread_saved_regs (t); - else - /* Register saved during kernel entry (or not available). */ - regs = task_pt_regs (t); - - return (v850_reg_t *)((char *)regs + reg_offs); -} - -/* Set the bits SET and clear the bits CLEAR in the v850e DIR - (`debug information register'). Returns the new value of DIR. */ -static inline v850_reg_t set_dir (v850_reg_t set, v850_reg_t clear) -{ - register v850_reg_t rval asm ("r10"); - register v850_reg_t arg0 asm ("r6") = set; - register v850_reg_t arg1 asm ("r7") = clear; - - /* The dbtrap handler has exactly this functionality when called - from kernel mode. 0xf840 is a `dbtrap' insn. */ - asm (".short 0xf840" : "=r" (rval) : "r" (arg0), "r" (arg1)); - - return rval; -} - -/* Makes sure hardware single-stepping is (globally) enabled. - Returns true if successful. */ -static inline int enable_single_stepping (void) -{ - static int enabled = 0; /* Remember whether we already did it. */ - if (! enabled) { - /* Turn on the SE (`single-step enable') bit, 0x100, in the - DIR (`debug information register'). This may fail if a - processor doesn't support it or something. We also try - to clear bit 0x40 (`INI'), which is necessary to use the - debug stuff on the v850e2; on the v850e, clearing 0x40 - shouldn't cause any problem. */ - v850_reg_t dir = set_dir (0x100, 0x40); - /* Make sure it really got set. */ - if (dir & 0x100) - enabled = 1; - } - return enabled; -} - -/* Try to set CHILD's single-step flag to VAL. Returns true if successful. */ -static int set_single_step (struct task_struct *t, int val) -{ - v850_reg_t *psw_addr = reg_save_addr(PT_PSW, t); - if (val) { - /* Make sure single-stepping is enabled. */ - if (! enable_single_stepping ()) - return 0; - /* Set T's single-step flag. */ - *psw_addr |= 0x800; - } else - *psw_addr &= ~0x800; - return 1; -} - -long arch_ptrace(struct task_struct *child, long request, long addr, long data) -{ - int rval; - - switch (request) { - unsigned long val; - - case PTRACE_PEEKTEXT: /* read word at location addr. */ - case PTRACE_PEEKDATA: - rval = generic_ptrace_peekdata(child, addr, data); - goto out; - - case PTRACE_POKETEXT: /* write the word at location addr. */ - case PTRACE_POKEDATA: - rval = generic_ptrace_pokedata(child, addr, data); - goto out; - - /* Read/write the word at location ADDR in the registers. */ - case PTRACE_PEEKUSR: - case PTRACE_POKEUSR: - rval = 0; - if (addr >= PT_SIZE && request == PTRACE_PEEKUSR) { - /* Special requests that don't actually correspond - to offsets in struct pt_regs. */ - if (addr == PT_TEXT_ADDR) - val = child->mm->start_code; - else if (addr == PT_DATA_ADDR) - val = child->mm->start_data; - else if (addr == PT_TEXT_LEN) - val = child->mm->end_code - - child->mm->start_code; - else - rval = -EIO; - } else if (addr >= 0 && addr < PT_SIZE && (addr & 0x3) == 0) { - v850_reg_t *reg_addr = reg_save_addr(addr, child); - if (request == PTRACE_PEEKUSR) - val = *reg_addr; - else - *reg_addr = data; - } else - rval = -EIO; - - if (rval == 0 && request == PTRACE_PEEKUSR) - rval = put_user (val, (unsigned long *)data); - goto out; - - /* Continue and stop at next (return from) syscall */ - case PTRACE_SYSCALL: - /* Restart after a signal. */ - case PTRACE_CONT: - /* Execute a single instruction. */ - case PTRACE_SINGLESTEP: - rval = -EIO; - if (!valid_signal(data)) - break; - - /* Turn CHILD's single-step flag on or off. */ - if (! set_single_step (child, request == PTRACE_SINGLESTEP)) - break; - - if (request == PTRACE_SYSCALL) - set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - else - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - - child->exit_code = data; - wake_up_process(child); - rval = 0; - break; - - /* - * make the child exit. Best I can do is send it a sigkill. - * perhaps it should be put in the status that it wants to - * exit. - */ - case PTRACE_KILL: - rval = 0; - if (child->exit_state == EXIT_ZOMBIE) /* already dead */ - break; - child->exit_code = SIGKILL; - wake_up_process(child); - break; - - case PTRACE_DETACH: /* detach a process that was attached. */ - set_single_step (child, 0); /* Clear single-step flag */ - rval = ptrace_detach(child, data); - break; - - default: - rval = -EIO; - goto out; - } - out: - return rval; -} - -asmlinkage void syscall_trace(void) -{ - if (!test_thread_flag(TIF_SYSCALL_TRACE)) - return; - if (!(current->ptrace & PT_PTRACED)) - return; - /* The 0x80 provides a way for the tracing parent to distinguish - between a syscall stop and SIGTRAP delivery */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } -} - -void ptrace_disable (struct task_struct *child) -{ - /* nothing to do */ -} diff --git a/arch/v850/kernel/rte_cb.c b/arch/v850/kernel/rte_cb.c deleted file mode 100644 index 43018e1edebd13b6bf84558ef32628c13056c0af..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_cb.c +++ /dev/null @@ -1,193 +0,0 @@ -/* - * include/asm-v850/rte_cb.c -- Midas lab RTE-CB series of evaluation boards - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "mach.h" - -static void led_tick (void); - -/* LED access routines. */ -extern unsigned read_leds (int pos, char *buf, int len); -extern unsigned write_leds (int pos, const char *buf, int len); - -#ifdef CONFIG_RTE_CB_MULTI -extern void multi_init (void); -#endif - - -void __init rte_cb_early_init (void) -{ - v850e_intc_disable_irqs (); - -#ifdef CONFIG_RTE_CB_MULTI - multi_init (); -#endif -} - -void __init mach_setup (char **cmdline) -{ -#ifdef CONFIG_RTE_MB_A_PCI - /* Probe for Mother-A, and print a message if we find it. */ - *(volatile unsigned long *)MB_A_SRAM_ADDR = 0xDEADBEEF; - if (*(volatile unsigned long *)MB_A_SRAM_ADDR == 0xDEADBEEF) { - *(volatile unsigned long *)MB_A_SRAM_ADDR = 0x12345678; - if (*(volatile unsigned long *)MB_A_SRAM_ADDR == 0x12345678) - printk (KERN_INFO - " NEC SolutionGear/Midas lab" - " RTE-MOTHER-A motherboard\n"); - } -#endif /* CONFIG_RTE_MB_A_PCI */ - - mach_tick = led_tick; -} - -void machine_restart (char *__unused) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - asm ("jmp r0"); /* Jump to the reset vector. */ -} - -/* This says `HALt.' in LEDese. */ -static unsigned char halt_leds_msg[] = { 0x76, 0x77, 0x38, 0xF8 }; - -void machine_halt (void) -{ -#ifdef CONFIG_RESET_GUARD - disable_reset_guard (); -#endif - - /* Ignore all interrupts. */ - local_irq_disable (); - - /* Write a little message. */ - write_leds (0, halt_leds_msg, sizeof halt_leds_msg); - - /* Really halt. */ - for (;;) - asm ("halt; nop; nop; nop; nop; nop"); -} - -void machine_power_off (void) -{ - machine_halt (); -} - - -/* Animated LED display for timer tick. */ - -#define TICK_UPD_FREQ 6 -static int tick_frames[][10] = { - { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, -1 }, - { 0x63, 0x5c, -1 }, - { 0x5c, 0x00, -1 }, - { 0x63, 0x00, -1 }, - { -1 } -}; - -static void led_tick () -{ - static unsigned counter = 0; - - if (++counter == (HZ / TICK_UPD_FREQ)) { - /* Which frame we're currently displaying for each digit. */ - static unsigned frame_nums[LED_NUM_DIGITS] = { 0 }; - /* Display image. */ - static unsigned char image[LED_NUM_DIGITS] = { 0 }; - unsigned char prev_image[LED_NUM_DIGITS]; - int write_to_leds = 1; /* true if we should actually display */ - int digit; - - /* We check to see if the physical LEDs contains what we last - wrote to them; if not, we suppress display (this is so that - users can write to the LEDs, and not have their output - overwritten). As a special case, we start writing again if - all the LEDs are blank, or our display image is all zeros - (indicating that this is the initial update, when the actual - LEDs might contain random data). */ - read_leds (0, prev_image, LED_NUM_DIGITS); - for (digit = 0; digit < LED_NUM_DIGITS; digit++) - if (image[digit] != prev_image[digit] - && image[digit] && prev_image[digit]) - { - write_to_leds = 0; - break; - } - - /* Update display image. */ - for (digit = 0; - digit < LED_NUM_DIGITS && tick_frames[digit][0] >= 0; - digit++) - { - int frame = tick_frames[digit][frame_nums[digit]]; - if (frame < 0) { - image[digit] = tick_frames[digit][0]; - frame_nums[digit] = 1; - } else { - image[digit] = frame; - frame_nums[digit]++; - break; - } - } - - if (write_to_leds) - /* Write the display image to the physical LEDs. */ - write_leds (0, image, LED_NUM_DIGITS); - - counter = 0; - } -} - - -/* Mother-A interrupts. */ - -#ifdef CONFIG_RTE_GBUS_INT - -#define L GBUS_INT_PRIORITY_LOW -#define M GBUS_INT_PRIORITY_MEDIUM -#define H GBUS_INT_PRIORITY_HIGH - -static struct gbus_int_irq_init gbus_irq_inits[] = { -#ifdef CONFIG_RTE_MB_A_PCI - { "MB_A_LAN", IRQ_MB_A_LAN, 1, 1, L }, - { "MB_A_PCI1", IRQ_MB_A_PCI1(0), IRQ_MB_A_PCI1_NUM, 1, L }, - { "MB_A_PCI2", IRQ_MB_A_PCI2(0), IRQ_MB_A_PCI2_NUM, 1, L }, - { "MB_A_EXT", IRQ_MB_A_EXT(0), IRQ_MB_A_EXT_NUM, 1, L }, - { "MB_A_USB_OC",IRQ_MB_A_USB_OC(0), IRQ_MB_A_USB_OC_NUM, 1, L }, - { "MB_A_PCMCIA_OC",IRQ_MB_A_PCMCIA_OC, 1, 1, L }, -#endif - { 0 } -}; -#define NUM_GBUS_IRQ_INITS (ARRAY_SIZE(gbus_irq_inits) - 1) - -static struct hw_interrupt_type gbus_hw_itypes[NUM_GBUS_IRQ_INITS]; - -#endif /* CONFIG_RTE_GBUS_INT */ - - -void __init rte_cb_init_irqs (void) -{ -#ifdef CONFIG_RTE_GBUS_INT - gbus_int_init_irqs (); - gbus_int_init_irq_types (gbus_irq_inits, gbus_hw_itypes); -#endif /* CONFIG_RTE_GBUS_INT */ -} diff --git a/arch/v850/kernel/rte_cb_leds.c b/arch/v850/kernel/rte_cb_leds.c deleted file mode 100644 index aa47ab1dcd87a866cf8ecb54000aef614bf8e70d..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_cb_leds.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * include/asm-v850/rte_cb_leds.c -- Midas lab RTE-CB board LED device support - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include - -#include - -#define LEDS_MINOR 169 /* Minor device number, using misc major. */ - -/* The actual LED hardware is write-only, so we hold the contents here too. */ -static unsigned char leds_image[LED_NUM_DIGITS] = { 0 }; - -/* Spinlock protecting the above leds. */ -static DEFINE_SPINLOCK(leds_lock); - -/* Common body of LED read/write functions, checks POS and LEN for - correctness, declares a variable using IMG_DECL, initialized pointing at - the POS position in the LED image buffer, and and iterates COPY_EXPR - until BUF is equal to the last buffer position; finally, sets LEN to be - the amount actually copied. IMG should be a variable declaration - (without an initializer or a terminating semicolon); POS, BUF, and LEN - should all be simple variables. */ -#define DO_LED_COPY(img_decl, pos, buf, len, copy_expr) \ -do { \ - if (pos > LED_NUM_DIGITS) \ - len = 0; \ - else { \ - if (pos + len > LED_NUM_DIGITS) \ - len = LED_NUM_DIGITS - pos; \ - \ - if (len > 0) { \ - unsigned long _flags; \ - const char *_end = buf + len; \ - img_decl = &leds_image[pos]; \ - \ - spin_lock_irqsave (leds_lock, _flags); \ - do \ - (copy_expr); \ - while (buf != _end); \ - spin_unlock_irqrestore (leds_lock, _flags); \ - } \ - } \ -} while (0) - -/* Read LEN bytes from LEDs at position POS, into BUF. - Returns actual amount read. */ -unsigned read_leds (unsigned pos, char *buf, unsigned len) -{ - DO_LED_COPY (const char *img, pos, buf, len, *buf++ = *img++); - return len; -} - -/* Write LEN bytes to LEDs at position POS, from BUF. - Returns actual amount written. */ -unsigned write_leds (unsigned pos, const char *buf, unsigned len) -{ - /* We write the actual LED values backwards, because - increasing memory addresses reflect LEDs right-to-left. */ - volatile char *led = &LED (LED_NUM_DIGITS - pos - 1); - /* We invert the value written to the hardware, because 1 = off, - and 0 = on. */ - DO_LED_COPY (char *img, pos, buf, len, - *led-- = 0xFF ^ (*img++ = *buf++)); - return len; -} - - -/* Device functions. */ - -static ssize_t leds_dev_read (struct file *file, char *buf, size_t len, - loff_t *pos) -{ - char temp_buf[LED_NUM_DIGITS]; - len = read_leds (*pos, temp_buf, len); - if (copy_to_user (buf, temp_buf, len)) - return -EFAULT; - *pos += len; - return len; -} - -static ssize_t leds_dev_write (struct file *file, const char *buf, size_t len, - loff_t *pos) -{ - char temp_buf[LED_NUM_DIGITS]; - if (copy_from_user (temp_buf, buf, min_t(size_t, len, LED_NUM_DIGITS))) - return -EFAULT; - len = write_leds (*pos, temp_buf, len); - *pos += len; - return len; -} - -static loff_t leds_dev_lseek (struct file *file, loff_t offs, int whence) -{ - if (whence == 1) - offs += file->f_pos; /* relative */ - else if (whence == 2) - offs += LED_NUM_DIGITS; /* end-relative */ - - if (offs < 0 || offs > LED_NUM_DIGITS) - return -EINVAL; - - file->f_pos = offs; - - return 0; -} - -static const struct file_operations leds_fops = { - .read = leds_dev_read, - .write = leds_dev_write, - .llseek = leds_dev_lseek -}; - -static struct miscdevice leds_miscdev = { - .name = "leds", - .minor = LEDS_MINOR, - .fops = &leds_fops -}; - -int __init leds_dev_init (void) -{ - return misc_register (&leds_miscdev); -} - -__initcall (leds_dev_init); diff --git a/arch/v850/kernel/rte_cb_multi.c b/arch/v850/kernel/rte_cb_multi.c deleted file mode 100644 index 963d55ab34ccccd4adec1882cff3b90225641b8d..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_cb_multi.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * include/asm-v850/rte_multi.c -- Support for Multi debugger monitor ROM - * on Midas lab RTE-CB series of evaluation boards - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -#include - -#define IRQ_ADDR(irq) (0x80 + (irq) * 0x10) - -/* A table of which interrupt vectors to install, since blindly - installing all of them makes the debugger stop working. This is a - list of offsets in the interrupt vector area; each entry means to - copy that particular 16-byte vector. An entry less than zero ends - the table. */ -static long multi_intv_install_table[] = { - /* Trap vectors */ - 0x40, 0x50, - -#ifdef CONFIG_RTE_CB_MULTI_DBTRAP - /* Illegal insn / dbtrap. These are used by multi, so only handle - them if configured to do so. */ - 0x60, -#endif - - /* GINT1 - GINT3 (note, not GINT0!) */ - IRQ_ADDR (IRQ_GINT(1)), - IRQ_ADDR (IRQ_GINT(2)), - IRQ_ADDR (IRQ_GINT(3)), - - /* Timer D interrupts (up to 4 timers) */ - IRQ_ADDR (IRQ_INTCMD(0)), -#if IRQ_INTCMD_NUM > 1 - IRQ_ADDR (IRQ_INTCMD(1)), -#if IRQ_INTCMD_NUM > 2 - IRQ_ADDR (IRQ_INTCMD(2)), -#if IRQ_INTCMD_NUM > 3 - IRQ_ADDR (IRQ_INTCMD(3)), -#endif -#endif -#endif - - /* UART interrupts (up to 3 channels) */ - IRQ_ADDR (IRQ_INTSER (0)), /* err */ - IRQ_ADDR (IRQ_INTSR (0)), /* rx */ - IRQ_ADDR (IRQ_INTST (0)), /* tx */ -#if IRQ_INTSR_NUM > 1 - IRQ_ADDR (IRQ_INTSER (1)), /* err */ - IRQ_ADDR (IRQ_INTSR (1)), /* rx */ - IRQ_ADDR (IRQ_INTST (1)), /* tx */ -#if IRQ_INTSR_NUM > 2 - IRQ_ADDR (IRQ_INTSER (2)), /* err */ - IRQ_ADDR (IRQ_INTSR (2)), /* rx */ - IRQ_ADDR (IRQ_INTST (2)), /* tx */ -#endif -#endif - - -1 -}; - -/* Early initialization for kernel using Multi debugger ROM monitor. */ -void __init multi_init (void) -{ - /* We're using the Multi debugger monitor, so we have to install - the interrupt vectors. The monitor doesn't allow them to be - initially downloaded into their final destination because - it's in the monitor's scratch-RAM area. Unfortunately, Multi - also doesn't deal correctly with ELF sections where the LMA - and VMA differ -- it just ignores the LMA -- so we can't use - that feature to work around the problem. What we do instead - is just put the interrupt vectors into a normal section, and - do the necessary copying and relocation here. Since the - interrupt vector basically only contains `jr' instructions - and no-ops, it's not that hard. */ - extern unsigned long _intv_load_start, _intv_start; - register unsigned long *src = &_intv_load_start; - register unsigned long *dst = (unsigned long *)INTV_BASE; - register unsigned long jr_fixup = (char *)&_intv_start - (char *)dst; - register long *ii; - - /* Copy interrupt vectors as instructed by multi_intv_install_table. */ - for (ii = multi_intv_install_table; *ii >= 0; ii++) { - /* Copy 16-byte interrupt vector at offset *ii. */ - int boffs; - for (boffs = 0; boffs < 0x10; boffs += sizeof *src) { - /* Copy a single word, fixing up the jump offs - if it's a `jr' instruction. */ - int woffs = (*ii + boffs) / sizeof *src; - unsigned long word = src[woffs]; - - if ((word & 0xFC0) == 0x780) { - /* A `jr' insn, fix up its offset (and yes, the - weird half-word swapping is intentional). */ - unsigned short hi = word & 0xFFFF; - unsigned short lo = word >> 16; - unsigned long udisp22 - = lo + ((hi & 0x3F) << 16); - long disp22 = (long)(udisp22 << 10) >> 10; - - disp22 += jr_fixup; - - hi = ((disp22 >> 16) & 0x3F) | 0x780; - lo = disp22 & 0xFFFF; - - word = hi + (lo << 16); - } - - dst[woffs] = word; - } - } -} diff --git a/arch/v850/kernel/rte_ma1_cb-rom.ld b/arch/v850/kernel/rte_ma1_cb-rom.ld deleted file mode 100644 index 87b618f8253bd182a96bfc373f0a82c29614c16d..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_ma1_cb-rom.ld +++ /dev/null @@ -1,14 +0,0 @@ -/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board - (CONFIG_RTE_CB_MA1), with kernel in ROM. */ - -MEMORY { - ROM : ORIGIN = 0x00000000, LENGTH = 0x00100000 - /* 1MB of SRAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - ROMK_SECTIONS(ROM, SRAM) -} diff --git a/arch/v850/kernel/rte_ma1_cb.c b/arch/v850/kernel/rte_ma1_cb.c deleted file mode 100644 index 08abf3d5f8df1c33d84bcef6bf1719e4da9358df..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_ma1_cb.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * arch/v850/kernel/rte_ma1_cb.c -- Midas labs RTE-V850E/MA1-CB board - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "mach.h" - - -/* SRAM and SDRAM are almost contiguous (with a small hole in between; - see mach_reserve_bootmem for details), so just use both as one big area. */ -#define RAM_START SRAM_ADDR -#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) - - -void __init mach_early_init (void) -{ - rte_cb_early_init (); -} - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - *ram_start = RAM_START; - *ram_len = RAM_END - RAM_START; -} - -void __init mach_reserve_bootmem () -{ -#ifdef CONFIG_RTE_CB_MULTI - /* Prevent the kernel from touching the monitor's scratch RAM. */ - reserve_bootmem(MON_SCRATCH_ADDR, MON_SCRATCH_SIZE, - BOOTMEM_DEFAULT); -#endif - - /* The space between SRAM and SDRAM is filled with duplicate - images of SRAM. Prevent the kernel from using them. */ - reserve_bootmem (SRAM_ADDR + SRAM_SIZE, - SDRAM_ADDR - (SRAM_ADDR + SRAM_SIZE), - BOOTMEM_DEFAULT); -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -/* Called before configuring an on-chip UART. */ -void rte_ma1_cb_uart_pre_configure (unsigned chan, - unsigned cflags, unsigned baud) -{ - /* The RTE-MA1-CB connects some general-purpose I/O pins on the - CPU to the RTS/CTS lines of UART 0's serial connection. - I/O pins P42 and P43 are RTS and CTS respectively. */ - if (chan == 0) { - /* Put P42 & P43 in I/O port mode. */ - MA_PORT4_PMC &= ~0xC; - /* Make P42 an output, and P43 an input. */ - MA_PORT4_PM = (MA_PORT4_PM & ~0xC) | 0x8; - } - - /* Do pre-configuration for the actual UART. */ - ma_uart_pre_configure (chan, cflags, baud); -} - -void __init mach_init_irqs (void) -{ - unsigned tc; - - /* Initialize interrupts. */ - ma_init_irqs (); - rte_cb_init_irqs (); - - /* Use falling-edge-sensitivity for interrupts . */ - V850E_TIMER_C_SESC (0) &= ~0xC; - V850E_TIMER_C_SESC (1) &= ~0xF; - - /* INTP000-INTP011 are shared with `Timer C', so we have to set - up Timer C to pass them through as raw interrupts. */ - for (tc = 0; tc < 2; tc++) - /* Turn on the timer. */ - V850E_TIMER_C_TMCC0 (tc) |= V850E_TIMER_C_TMCC0_CAE; - - /* Make sure the relevant port0/port1 pins are assigned - interrupt duty. We used INTP001-INTP011 (don't screw with - INTP000 because the monitor uses it). */ - MA_PORT0_PMC |= 0x4; /* P02 (INTP001) in IRQ mode. */ - MA_PORT1_PMC |= 0x6; /* P11 (INTP010) & P12 (INTP011) in IRQ mode.*/ -} diff --git a/arch/v850/kernel/rte_ma1_cb.ld b/arch/v850/kernel/rte_ma1_cb.ld deleted file mode 100644 index c8e16d16be41c73f9ea2798e0e1c16e1e317faa6..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_ma1_cb.ld +++ /dev/null @@ -1,57 +0,0 @@ -/* Linker script for the Midas labs RTE-V850E/MA1-CB evaluation board - (CONFIG_RTE_CB_MA1), with kernel in SDRAM, under Multi debugger. */ - -MEMORY { - /* 1MB of SRAM; we can't use the last 32KB, because it's used by - the monitor scratch-RAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = (SRAM_SIZE - MON_SCRATCH_SIZE) - /* Monitor scratch RAM; only the interrupt vectors should go here. */ - MRAM : ORIGIN = MON_SCRATCH_ADDR, LENGTH = MON_SCRATCH_SIZE - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -#ifdef CONFIG_RTE_CB_MA1_KSRAM -# define KRAM SRAM -#else -# define KRAM SDRAM -#endif - -SECTIONS { - /* We can't use RAMK_KRAM_CONTENTS because that puts the whole - kernel in a single ELF segment, and the Multi debugger (which - we use to load the kernel) appears to have bizarre problems - dealing with it. */ - - .text : { - __kram_start = . ; - TEXT_CONTENTS - } > KRAM - - .data : { - DATA_CONTENTS - BSS_CONTENTS - RAMK_INIT_CONTENTS - __kram_end = . ; - BOOTMAP_CONTENTS - - /* The address at which the interrupt vectors are initially - loaded by the loader. We can't load the interrupt vectors - directly into their target location, because the monitor - ROM for the GHS Multi debugger barfs if we try. - Unfortunately, Multi also doesn't deal correctly with ELF - sections where the LMA and VMA differ (it just ignores the - LMA), so we can't use that feature to work around the - problem! What we do instead is just put the interrupt - vectors into a normal section, and have the - `mach_early_init' function for Midas boards do the - necessary copying and relocation at runtime (this section - basically only contains `jr' instructions, so it's not - that hard). */ - . = ALIGN (0x10) ; - __intv_load_start = . ; - INTV_CONTENTS - } > KRAM - - .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/rte_mb_a_pci.c b/arch/v850/kernel/rte_mb_a_pci.c deleted file mode 100644 index 687e367d8b64c81e39a99632e87d012e1c8015b5..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_mb_a_pci.c +++ /dev/null @@ -1,819 +0,0 @@ -/* - * arch/v850/kernel/mb_a_pci.c -- PCI support for Midas lab RTE-MOTHER-A board - * - * Copyright (C) 2001,02,03,05 NEC Electronics Corporation - * Copyright (C) 2001,02,03,05 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include - -/* __nomods_init is like __devinit, but is a no-op when modules are enabled. - This is used by some routines that can be called either during boot - or by a module. */ -#ifdef CONFIG_MODULES -#define __nomods_init /*nothing*/ -#else -#define __nomods_init __devinit -#endif - -/* PCI devices on the Mother-A board can only do DMA to/from the MB SRAM - (the RTE-V850E/MA1-CB cpu board doesn't support PCI access to - CPU-board memory), and since linux DMA buffers are allocated in - normal kernel memory, we basically have to copy DMA blocks around - (this is like a `bounce buffer'). When a DMA block is `mapped', we - allocate an identically sized block in MB SRAM, and if we're doing - output to the device, copy the CPU-memory block to the MB-SRAM block. - When an active block is `unmapped', we will copy the block back to - CPU memory if necessary, and then deallocate the MB SRAM block. - Ack. */ - -/* Where the motherboard SRAM is in the PCI-bus address space (the - first 512K of it is also mapped at PCI address 0). */ -#define PCI_MB_SRAM_ADDR 0x800000 - -/* Convert CPU-view MB SRAM address to/from PCI-view addresses of the - same memory. */ -#define MB_SRAM_TO_PCI(mb_sram_addr) \ - ((dma_addr_t)mb_sram_addr - MB_A_SRAM_ADDR + PCI_MB_SRAM_ADDR) -#define PCI_TO_MB_SRAM(pci_addr) \ - (void *)(pci_addr - PCI_MB_SRAM_ADDR + MB_A_SRAM_ADDR) - -static void pcibios_assign_resources (void); - -struct mb_pci_dev_irq { - unsigned dev; /* PCI device number */ - unsigned irq_base; /* First IRQ */ - unsigned query_pin; /* True if we should read the device's - Interrupt Pin info, and allocate - interrupt IRQ_BASE + PIN. */ -}; - -/* PCI interrupts are mapped statically to GBUS interrupts. */ -static struct mb_pci_dev_irq mb_pci_dev_irqs[] = { - /* Motherboard SB82558 ethernet controller */ - { 10, IRQ_MB_A_LAN, 0 }, - /* PCI slot 1 */ - { 8, IRQ_MB_A_PCI1(0), 1 }, - /* PCI slot 2 */ - { 9, IRQ_MB_A_PCI2(0), 1 } -}; -#define NUM_MB_PCI_DEV_IRQS ARRAY_SIZE(mb_pci_dev_irqs) - - -/* PCI configuration primitives. */ - -#define CONFIG_DMCFGA(bus, devfn, offs) \ - (0x80000000 \ - | ((offs) & ~0x3) \ - | ((devfn) << 8) \ - | ((bus)->number << 16)) - -static int -mb_pci_read (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 *rval) -{ - u32 addr; - int flags; - - local_irq_save (flags); - - MB_A_PCI_PCICR = 0x7; - MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); - - addr = MB_A_PCI_IO_ADDR + (offs & 0x3); - - switch (size) { - case 1: *rval = *(volatile u8 *)addr; break; - case 2: *rval = *(volatile u16 *)addr; break; - case 4: *rval = *(volatile u32 *)addr; break; - } - - if (MB_A_PCI_PCISR & 0x2000) { - MB_A_PCI_PCISR = 0x2000; - *rval = ~0; - } - - MB_A_PCI_DMCFGA = 0; - - local_irq_restore (flags); - - return PCIBIOS_SUCCESSFUL; -} - -static int -mb_pci_write (struct pci_bus *bus, unsigned devfn, int offs, int size, u32 val) -{ - u32 addr; - int flags; - - local_irq_save (flags); - - MB_A_PCI_PCICR = 0x7; - MB_A_PCI_DMCFGA = CONFIG_DMCFGA (bus, devfn, offs); - - addr = MB_A_PCI_IO_ADDR + (offs & 0x3); - - switch (size) { - case 1: *(volatile u8 *)addr = val; break; - case 2: *(volatile u16 *)addr = val; break; - case 4: *(volatile u32 *)addr = val; break; - } - - if (MB_A_PCI_PCISR & 0x2000) - MB_A_PCI_PCISR = 0x2000; - - MB_A_PCI_DMCFGA = 0; - - local_irq_restore (flags); - - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops mb_pci_config_ops = { - .read = mb_pci_read, - .write = mb_pci_write, -}; - - -/* PCI Initialization. */ - -static struct pci_bus *mb_pci_bus = 0; - -/* Do initial PCI setup. */ -static int __devinit pcibios_init (void) -{ - u32 id = MB_A_PCI_PCIHIDR; - u16 vendor = id & 0xFFFF; - u16 device = (id >> 16) & 0xFFFF; - - if (vendor == PCI_VENDOR_ID_PLX && device == PCI_DEVICE_ID_PLX_9080) { - printk (KERN_INFO - "PCI: PLX Technology PCI9080 HOST/PCI bridge\n"); - - MB_A_PCI_PCICR = 0x147; - - MB_A_PCI_PCIBAR0 = 0x007FFF00; - MB_A_PCI_PCIBAR1 = 0x0000FF00; - MB_A_PCI_PCIBAR2 = 0x00800000; - - MB_A_PCI_PCILTR = 0x20; - - MB_A_PCI_PCIPBAM |= 0x3; - - MB_A_PCI_PCISR = ~0; /* Clear errors. */ - - /* Reprogram the motherboard's IO/config address space, - as we don't support the GCS7 address space that the - default uses. */ - - /* Significant address bits used for decoding PCI GCS5 space - accesses. */ - MB_A_PCI_DMRR = ~(MB_A_PCI_MEM_SIZE - 1); - - /* I don't understand this, but the SolutionGear example code - uses such an offset, and it doesn't work without it. XXX */ -#if GCS5_SIZE == 0x00800000 -#define GCS5_CFG_OFFS 0x00800000 -#else -#define GCS5_CFG_OFFS 0 -#endif - - /* Address bit values for matching. Note that we have to give - the address from the motherboard's point of view, which is - different than the CPU's. */ - /* PCI memory space. */ - MB_A_PCI_DMLBAM = GCS5_CFG_OFFS + 0x0; - /* PCI I/O space. */ - MB_A_PCI_DMLBAI = - GCS5_CFG_OFFS + (MB_A_PCI_IO_ADDR - GCS5_ADDR); - - mb_pci_bus = pci_scan_bus (0, &mb_pci_config_ops, 0); - - pcibios_assign_resources (); - } else - printk (KERN_ERR "PCI: HOST/PCI bridge not found\n"); - - return 0; -} - -subsys_initcall (pcibios_init); - -char __devinit *pcibios_setup (char *option) -{ - /* Don't handle any options. */ - return option; -} - - -int __nomods_init pcibios_enable_device (struct pci_dev *dev, int mask) -{ - u16 cmd, old_cmd; - int idx; - struct resource *r; - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - old_cmd = cmd; - for (idx = 0; idx < 6; idx++) { - r = &dev->resource[idx]; - if (!r->start && r->end) { - printk(KERN_ERR "PCI: Device %s not available because " - "of resource collisions\n", pci_name(dev)); - return -EINVAL; - } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) - cmd |= PCI_COMMAND_MEMORY; - } - if (cmd != old_cmd) { - printk("PCI: Enabling device %s (%04x -> %04x)\n", - pci_name(dev), old_cmd, cmd); - pci_write_config_word(dev, PCI_COMMAND, cmd); - } - return 0; -} - - -/* Resource allocation. */ -static void __devinit pcibios_assign_resources (void) -{ - struct pci_dev *dev = NULL; - struct resource *r; - - for_each_pci_dev(dev) { - unsigned di_num; - unsigned class = dev->class >> 8; - - if (class && class != PCI_CLASS_BRIDGE_HOST) { - unsigned r_num; - for(r_num = 0; r_num < 6; r_num++) { - r = &dev->resource[r_num]; - if (!r->start && r->end) - pci_assign_resource (dev, r_num); - } - } - - /* Assign interrupts. */ - for (di_num = 0; di_num < NUM_MB_PCI_DEV_IRQS; di_num++) { - struct mb_pci_dev_irq *di = &mb_pci_dev_irqs[di_num]; - - if (di->dev == PCI_SLOT (dev->devfn)) { - unsigned irq = di->irq_base; - - if (di->query_pin) { - /* Find out which interrupt pin - this device uses (each PCI - slot has 4). */ - u8 irq_pin; - - pci_read_config_byte (dev, - PCI_INTERRUPT_PIN, - &irq_pin); - - if (irq_pin == 0) - /* Doesn't use interrupts. */ - continue; - else - irq += irq_pin - 1; - } - - pcibios_update_irq (dev, irq); - } - } - } -} - -void __devinit pcibios_update_irq (struct pci_dev *dev, int irq) -{ - dev->irq = irq; - pci_write_config_byte (dev, PCI_INTERRUPT_LINE, irq); -} - -void __devinit -pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, - struct resource *res) -{ - unsigned long offset = 0; - - if (res->flags & IORESOURCE_IO) { - offset = MB_A_PCI_IO_ADDR; - } else if (res->flags & IORESOURCE_MEM) { - offset = MB_A_PCI_MEM_ADDR; - } - - region->start = res->start - offset; - region->end = res->end - offset; -} - - -/* Stubs for things we don't use. */ - -/* Called after each bus is probed, but before its children are examined. */ -void pcibios_fixup_bus(struct pci_bus *b) -{ -} - -void -pcibios_align_resource (void *data, struct resource *res, - resource_size_t size, resource_size_t align) -{ -} - -void pcibios_set_master (struct pci_dev *dev) -{ -} - - -/* Mother-A SRAM memory allocation. This is a simple first-fit allocator. */ - -/* A memory free-list node. */ -struct mb_sram_free_area { - void *mem; - unsigned long size; - struct mb_sram_free_area *next; -}; - -/* The tail of the free-list, which starts out containing all the SRAM. */ -static struct mb_sram_free_area mb_sram_free_tail = { - (void *)MB_A_SRAM_ADDR, MB_A_SRAM_SIZE, 0 -}; - -/* The free-list. */ -static struct mb_sram_free_area *mb_sram_free_areas = &mb_sram_free_tail; - -/* The free-list of free free-list nodes. (:-) */ -static struct mb_sram_free_area *mb_sram_free_free_areas = 0; - -/* Spinlock protecting the above globals. */ -static DEFINE_SPINLOCK(mb_sram_lock); - -/* Allocate a memory block at least SIZE bytes long in the Mother-A SRAM - space. */ -static void *alloc_mb_sram (size_t size) -{ - struct mb_sram_free_area *prev, *fa; - unsigned long flags; - void *mem = 0; - - spin_lock_irqsave (mb_sram_lock, flags); - - /* Look for a free area that can contain SIZE bytes. */ - for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) - if (fa->size >= size) { - /* Found one! */ - mem = fa->mem; - - if (fa->size == size) { - /* In fact, it fits exactly, so remove - this node from the free-list. */ - if (prev) - prev->next = fa->next; - else - mb_sram_free_areas = fa->next; - /* Put it on the free-list-entry-free-list. */ - fa->next = mb_sram_free_free_areas; - mb_sram_free_free_areas = fa; - } else { - /* FA is bigger than SIZE, so just - reduce its size to account for this - allocation. */ - fa->mem += size; - fa->size -= size; - } - - break; - } - - spin_unlock_irqrestore (mb_sram_lock, flags); - - return mem; -} - -/* Return the memory area MEM of size SIZE to the MB SRAM free pool. */ -static void free_mb_sram (void *mem, size_t size) -{ - struct mb_sram_free_area *prev, *fa, *new_fa; - unsigned long flags; - void *end = mem + size; - - spin_lock_irqsave (mb_sram_lock, flags); - - retry: - /* Find an adjacent free-list entry. */ - for (prev = 0, fa = mb_sram_free_areas; fa; prev = fa, fa = fa->next) - if (fa->mem == end) { - /* FA is just after MEM, grow down to encompass it. */ - fa->mem = mem; - fa->size += size; - goto done; - } else if (fa->mem + fa->size == mem) { - struct mb_sram_free_area *next_fa = fa->next; - - /* FA is just before MEM, expand to encompass it. */ - fa->size += size; - - /* See if FA can now be merged with its successor. */ - if (next_fa && fa->mem + fa->size == next_fa->mem) { - /* Yup; merge NEXT_FA's info into FA. */ - fa->size += next_fa->size; - fa->next = next_fa->next; - /* Free NEXT_FA. */ - next_fa->next = mb_sram_free_free_areas; - mb_sram_free_free_areas = next_fa; - } - goto done; - } else if (fa->mem > mem) - /* We've reached the right spot in the free-list - without finding an adjacent free-area, so add - a new free area to hold mem. */ - break; - - /* Make a new free-list entry. */ - - /* First, get a free-list entry. */ - if (! mb_sram_free_free_areas) { - /* There are none, so make some. */ - void *block; - size_t block_size = sizeof (struct mb_sram_free_area) * 8; - - /* Don't hold the lock while calling kmalloc (I'm not - sure whether it would be a problem, since we use - GFP_ATOMIC, but it makes me nervous). */ - spin_unlock_irqrestore (mb_sram_lock, flags); - - block = kmalloc (block_size, GFP_ATOMIC); - if (! block) - panic ("free_mb_sram: can't allocate free-list entry"); - - /* Now get the lock back. */ - spin_lock_irqsave (mb_sram_lock, flags); - - /* Add the new free free-list entries. */ - while (block_size > 0) { - struct mb_sram_free_area *nfa = block; - nfa->next = mb_sram_free_free_areas; - mb_sram_free_free_areas = nfa; - block += sizeof *nfa; - block_size -= sizeof *nfa; - } - - /* Since we dropped the lock to call kmalloc, the - free-list could have changed, so retry from the - beginning. */ - goto retry; - } - - /* Remove NEW_FA from the free-list of free-list entries. */ - new_fa = mb_sram_free_free_areas; - mb_sram_free_free_areas = new_fa->next; - - /* NEW_FA initially holds only MEM. */ - new_fa->mem = mem; - new_fa->size = size; - - /* Insert NEW_FA in the free-list between PREV and FA. */ - new_fa->next = fa; - if (prev) - prev->next = new_fa; - else - mb_sram_free_areas = new_fa; - - done: - spin_unlock_irqrestore (mb_sram_lock, flags); -} - - -/* Maintainence of CPU -> Mother-A DMA mappings. */ - -struct dma_mapping { - void *cpu_addr; - void *mb_sram_addr; - size_t size; - struct dma_mapping *next; -}; - -/* A list of mappings from CPU addresses to MB SRAM addresses for active - DMA blocks (that have been `granted' to the PCI device). */ -static struct dma_mapping *active_dma_mappings = 0; - -/* A list of free mapping objects. */ -static struct dma_mapping *free_dma_mappings = 0; - -/* Spinlock protecting the above globals. */ -static DEFINE_SPINLOCK(dma_mappings_lock); - -static struct dma_mapping *new_dma_mapping (size_t size) -{ - unsigned long flags; - struct dma_mapping *mapping; - void *mb_sram_block = alloc_mb_sram (size); - - if (! mb_sram_block) - return 0; - - spin_lock_irqsave (dma_mappings_lock, flags); - - if (! free_dma_mappings) { - /* We're out of mapping structures, make more. */ - void *mblock; - size_t mblock_size = sizeof (struct dma_mapping) * 8; - - /* Don't hold the lock while calling kmalloc (I'm not - sure whether it would be a problem, since we use - GFP_ATOMIC, but it makes me nervous). */ - spin_unlock_irqrestore (dma_mappings_lock, flags); - - mblock = kmalloc (mblock_size, GFP_ATOMIC); - if (! mblock) { - free_mb_sram (mb_sram_block, size); - return 0; - } - - /* Get the lock back. */ - spin_lock_irqsave (dma_mappings_lock, flags); - - /* Add the new mapping structures to the free-list. */ - while (mblock_size > 0) { - struct dma_mapping *fm = mblock; - fm->next = free_dma_mappings; - free_dma_mappings = fm; - mblock += sizeof *fm; - mblock_size -= sizeof *fm; - } - } - - /* Get a mapping struct from the freelist. */ - mapping = free_dma_mappings; - free_dma_mappings = mapping->next; - - /* Initialize the mapping. Other fields should be filled in by - caller. */ - mapping->mb_sram_addr = mb_sram_block; - mapping->size = size; - - /* Add it to the list of active mappings. */ - mapping->next = active_dma_mappings; - active_dma_mappings = mapping; - - spin_unlock_irqrestore (dma_mappings_lock, flags); - - return mapping; -} - -static struct dma_mapping *find_dma_mapping (void *mb_sram_addr) -{ - unsigned long flags; - struct dma_mapping *mapping; - - spin_lock_irqsave (dma_mappings_lock, flags); - - for (mapping = active_dma_mappings; mapping; mapping = mapping->next) - if (mapping->mb_sram_addr == mb_sram_addr) { - spin_unlock_irqrestore (dma_mappings_lock, flags); - return mapping; - } - - panic ("find_dma_mapping: unmapped PCI DMA addr 0x%x", - MB_SRAM_TO_PCI (mb_sram_addr)); -} - -static struct dma_mapping *deactivate_dma_mapping (void *mb_sram_addr) -{ - unsigned long flags; - struct dma_mapping *mapping, *prev; - - spin_lock_irqsave (dma_mappings_lock, flags); - - for (prev = 0, mapping = active_dma_mappings; - mapping; - prev = mapping, mapping = mapping->next) - { - if (mapping->mb_sram_addr == mb_sram_addr) { - /* This is the MAPPING; deactivate it. */ - if (prev) - prev->next = mapping->next; - else - active_dma_mappings = mapping->next; - - spin_unlock_irqrestore (dma_mappings_lock, flags); - - return mapping; - } - } - - panic ("deactivate_dma_mapping: unmapped PCI DMA addr 0x%x", - MB_SRAM_TO_PCI (mb_sram_addr)); -} - -/* Return MAPPING to the freelist. */ -static inline void -free_dma_mapping (struct dma_mapping *mapping) -{ - unsigned long flags; - - free_mb_sram (mapping->mb_sram_addr, mapping->size); - - spin_lock_irqsave (dma_mappings_lock, flags); - - mapping->next = free_dma_mappings; - free_dma_mappings = mapping; - - spin_unlock_irqrestore (dma_mappings_lock, flags); -} - - -/* Single PCI DMA mappings. */ - -/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The - 32-bit PCI bus mastering address to use is returned. the device owns - this memory until either pci_unmap_single or pci_dma_sync_single is - performed. */ -dma_addr_t -pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir) -{ - struct dma_mapping *mapping = new_dma_mapping (size); - - if (! mapping) - return 0; - - mapping->cpu_addr = cpu_addr; - - if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_TODEVICE) - memcpy (mapping->mb_sram_addr, cpu_addr, size); - - return MB_SRAM_TO_PCI (mapping->mb_sram_addr); -} - -/* Return to the CPU the PCI DMA memory block previously `granted' to - PDEV, at DMA_ADDR. */ -void pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, - int dir) -{ - void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); - struct dma_mapping *mapping = deactivate_dma_mapping (mb_sram_addr); - - if (size != mapping->size) - panic ("pci_unmap_single: size (%d) doesn't match" - " size of mapping at PCI DMA addr 0x%x (%d)\n", - size, dma_addr, mapping->size); - - /* Copy back the DMA'd contents if necessary. */ - if (dir == PCI_DMA_BIDIRECTIONAL || dir == PCI_DMA_FROMDEVICE) - memcpy (mapping->cpu_addr, mb_sram_addr, size); - - /* Return mapping to the freelist. */ - free_dma_mapping (mapping); -} - -/* Make physical memory consistent for a single streaming mode DMA - translation after a transfer. - - If you perform a pci_map_single() but wish to interrogate the - buffer using the cpu, yet do not wish to teardown the PCI dma - mapping, you must call this function before doing so. At the next - point you give the PCI dma address back to the card, you must first - perform a pci_dma_sync_for_device, and then the device again owns - the buffer. */ -void -pci_dma_sync_single_for_cpu (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, - int dir) -{ - void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); - struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); - - /* Synchronize the DMA buffer with the CPU buffer if necessary. */ - if (dir == PCI_DMA_FROMDEVICE) - memcpy (mapping->cpu_addr, mb_sram_addr, size); - else if (dir == PCI_DMA_TODEVICE) - ; /* nothing to do */ - else - panic("pci_dma_sync_single: unsupported sync dir: %d", dir); -} - -void -pci_dma_sync_single_for_device (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size, - int dir) -{ - void *mb_sram_addr = PCI_TO_MB_SRAM (dma_addr); - struct dma_mapping *mapping = find_dma_mapping (mb_sram_addr); - - /* Synchronize the DMA buffer with the CPU buffer if necessary. */ - if (dir == PCI_DMA_FROMDEVICE) - ; /* nothing to do */ - else if (dir == PCI_DMA_TODEVICE) - memcpy (mb_sram_addr, mapping->cpu_addr, size); - else - panic("pci_dma_sync_single: unsupported sync dir: %d", dir); -} - - -/* Scatter-gather PCI DMA mappings. */ - -/* Do multiple DMA mappings at once. */ -int -pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir) -{ - BUG (); - return 0; -} - -/* Unmap multiple DMA mappings at once. */ -void -pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,int dir) -{ - BUG (); -} - -/* Make physical memory consistent for a set of streaming mode DMA - translations after a transfer. The same as pci_dma_sync_single_* but - for a scatter-gather list, same rules and usage. */ - -void -pci_dma_sync_sg_for_cpu (struct pci_dev *dev, - struct scatterlist *sg, int sg_len, - int dir) -{ - BUG (); -} - -void -pci_dma_sync_sg_for_device (struct pci_dev *dev, - struct scatterlist *sg, int sg_len, - int dir) -{ - BUG (); -} - - -/* PCI mem mapping. */ - -/* Allocate and map kernel buffer using consistent mode DMA for PCI - device. Returns non-NULL cpu-view pointer to the buffer if - successful and sets *DMA_ADDR to the pci side dma address as well, - else DMA_ADDR is undefined. */ -void * -pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr) -{ - void *mb_sram_mem = alloc_mb_sram (size); - if (mb_sram_mem) - *dma_addr = MB_SRAM_TO_PCI (mb_sram_mem); - return mb_sram_mem; -} - -/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must - be values that were returned from pci_alloc_consistent. SIZE must be - the same as what as passed into pci_alloc_consistent. References to - the memory and mappings associated with CPU_ADDR or DMA_ADDR past - this call are illegal. */ -void -pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr, - dma_addr_t dma_addr) -{ - void *mb_sram_mem = PCI_TO_MB_SRAM (dma_addr); - free_mb_sram (mb_sram_mem, size); -} - - -/* iomap/iomap */ - -void __iomem *pci_iomap (struct pci_dev *dev, int bar, unsigned long max) -{ - resource_size_t start = pci_resource_start (dev, bar); - resource_size_t len = pci_resource_len (dev, bar); - - if (!start || len == 0) - return 0; - - /* None of the ioremap functions actually do anything, other than - re-casting their argument, so don't bother differentiating them. */ - return ioremap (start, len); -} - -void pci_iounmap (struct pci_dev *dev, void __iomem *addr) -{ - /* nothing */ -} - - -/* symbol exports (for modules) */ - -EXPORT_SYMBOL (pci_map_single); -EXPORT_SYMBOL (pci_unmap_single); -EXPORT_SYMBOL (pci_alloc_consistent); -EXPORT_SYMBOL (pci_free_consistent); -EXPORT_SYMBOL (pci_dma_sync_single_for_cpu); -EXPORT_SYMBOL (pci_dma_sync_single_for_device); -EXPORT_SYMBOL (pci_iomap); -EXPORT_SYMBOL (pci_iounmap); diff --git a/arch/v850/kernel/rte_me2_cb.c b/arch/v850/kernel/rte_me2_cb.c deleted file mode 100644 index 46803d48dffe2e5a14aec1c12813e8b6598f2465..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_me2_cb.c +++ /dev/null @@ -1,298 +0,0 @@ -/* - * arch/v850/kernel/rte_me2_cb.c -- Midas labs RTE-V850E/ME2-CB board - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mach.h" - -extern unsigned long *_intv_start; -extern unsigned long *_intv_end; - -/* LED access routines. */ -extern unsigned read_leds (int pos, char *buf, int len); -extern unsigned write_leds (int pos, const char *buf, int len); - - -/* SDRAM are almost contiguous (with a small hole in between; - see mach_reserve_bootmem for details), so just use both as one big area. */ -#define RAM_START SDRAM_ADDR -#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) - - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - *ram_start = RAM_START; - *ram_len = RAM_END - RAM_START; -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -/* Called before configuring an on-chip UART. */ -void rte_me2_cb_uart_pre_configure (unsigned chan, - unsigned cflags, unsigned baud) -{ - /* The RTE-V850E/ME2-CB connects some general-purpose I/O - pins on the CPU to the RTS/CTS lines of UARTB channel 0's - serial connection. - I/O pins P21 and P22 are RTS and CTS respectively. */ - if (chan == 0) { - /* Put P21 & P22 in I/O port mode. */ - ME2_PORT2_PMC &= ~0x6; - /* Make P21 and output, and P22 an input. */ - ME2_PORT2_PM = (ME2_PORT2_PM & ~0xC) | 0x4; - } - - me2_uart_pre_configure (chan, cflags, baud); -} - -void __init mach_init_irqs (void) -{ - /* Initialize interrupts. */ - me2_init_irqs (); - rte_me2_cb_init_irqs (); -} - -#ifdef CONFIG_ROM_KERNEL -/* Initialization for kernel in ROM. */ -static inline rom_kernel_init (void) -{ - /* If the kernel is in ROM, we have to copy any initialized data - from ROM into RAM. */ - extern unsigned long _data_load_start, _sdata, _edata; - register unsigned long *src = &_data_load_start; - register unsigned long *dst = &_sdata, *end = &_edata; - - while (dst != end) - *dst++ = *src++; -} -#endif /* CONFIG_ROM_KERNEL */ - -static void install_interrupt_vectors (void) -{ - unsigned long *p1, *p2; - - ME2_IRAMM = 0x03; /* V850E/ME2 iRAM write mode */ - - /* vector copy to iRAM */ - p1 = (unsigned long *)0; /* v85x vector start */ - p2 = (unsigned long *)&_intv_start; - while (p2 < (unsigned long *)&_intv_end) - *p1++ = *p2++; - - ME2_IRAMM = 0x00; /* V850E/ME2 iRAM read mode */ -} - -/* CompactFlash */ - -static void cf_power_on (void) -{ - /* CF card detected? */ - if (CB_CF_STS0 & 0x0030) - return; - - CB_CF_REG0 = 0x0002; /* reest on */ - mdelay (10); - CB_CF_REG0 = 0x0003; /* power on */ - mdelay (10); - CB_CF_REG0 = 0x0001; /* reset off */ - mdelay (10); -} - -static void cf_power_off (void) -{ - CB_CF_REG0 = 0x0003; /* power on */ - mdelay (10); - CB_CF_REG0 = 0x0002; /* reest on */ - mdelay (10); -} - -void __init mach_early_init (void) -{ - install_interrupt_vectors (); - - /* CS1 SDRAM instruction cache enable */ - v850e_cache_enable (0x04, 0x03, 0); - - rte_cb_early_init (); - - /* CompactFlash power on */ - cf_power_on (); - -#if defined (CONFIG_ROM_KERNEL) - rom_kernel_init (); -#endif -} - - -/* RTE-V850E/ME2-CB Programmable Interrupt Controller. */ - -static struct cb_pic_irq_init cb_pic_irq_inits[] = { - { "CB_EXTTM0", IRQ_CB_EXTTM0, 1, 1, 6 }, - { "CB_EXTSIO", IRQ_CB_EXTSIO, 1, 1, 6 }, - { "CB_TOVER", IRQ_CB_TOVER, 1, 1, 6 }, - { "CB_GINT0", IRQ_CB_GINT0, 1, 1, 6 }, - { "CB_USB", IRQ_CB_USB, 1, 1, 6 }, - { "CB_LANC", IRQ_CB_LANC, 1, 1, 6 }, - { "CB_USB_VBUS_ON", IRQ_CB_USB_VBUS_ON, 1, 1, 6 }, - { "CB_USB_VBUS_OFF", IRQ_CB_USB_VBUS_OFF, 1, 1, 6 }, - { "CB_EXTTM1", IRQ_CB_EXTTM1, 1, 1, 6 }, - { "CB_EXTTM2", IRQ_CB_EXTTM2, 1, 1, 6 }, - { 0 } -}; -#define NUM_CB_PIC_IRQ_INITS (ARRAY_SIZE(cb_pic_irq_inits) - 1) - -static struct hw_interrupt_type cb_pic_hw_itypes[NUM_CB_PIC_IRQ_INITS]; -static unsigned char cb_pic_active_irqs = 0; - -void __init rte_me2_cb_init_irqs (void) -{ - cb_pic_init_irq_types (cb_pic_irq_inits, cb_pic_hw_itypes); - - /* Initalize on board PIC1 (not PIC0) enable */ - CB_PIC_INT0M = 0x0000; - CB_PIC_INT1M = 0x0000; - CB_PIC_INTR = 0x0000; - CB_PIC_INTEN |= CB_PIC_INT1EN; - - ME2_PORT2_PMC |= 0x08; /* INTP23/SCK1 mode */ - ME2_PORT2_PFC &= ~0x08; /* INTP23 mode */ - ME2_INTR(2) &= ~0x08; /* INTP23 falling-edge detect */ - ME2_INTF(2) &= ~0x08; /* " */ - - rte_cb_init_irqs (); /* gbus &c */ -} - - -/* Enable interrupt handling for interrupt IRQ. */ -void cb_pic_enable_irq (unsigned irq) -{ - CB_PIC_INT1M |= 1 << (irq - CB_PIC_BASE_IRQ); -} - -void cb_pic_disable_irq (unsigned irq) -{ - CB_PIC_INT1M &= ~(1 << (irq - CB_PIC_BASE_IRQ)); -} - -void cb_pic_shutdown_irq (unsigned irq) -{ - cb_pic_disable_irq (irq); - - if (--cb_pic_active_irqs == 0) - free_irq (IRQ_CB_PIC, 0); - - CB_PIC_INT1M &= ~(1 << (irq - CB_PIC_BASE_IRQ)); -} - -static irqreturn_t cb_pic_handle_irq (int irq, void *dev_id, - struct pt_regs *regs) -{ - irqreturn_t rval = IRQ_NONE; - unsigned status = CB_PIC_INTR; - unsigned enable = CB_PIC_INT1M; - - /* Only pay attention to enabled interrupts. */ - status &= enable; - - CB_PIC_INTEN &= ~CB_PIC_INT1EN; - - if (status) { - unsigned mask = 1; - - irq = CB_PIC_BASE_IRQ; - do { - /* There's an active interrupt, find out which one, - and call its handler. */ - while (! (status & mask)) { - irq++; - mask <<= 1; - } - status &= ~mask; - - CB_PIC_INTR = mask; - - /* Recursively call handle_irq to handle it. */ - handle_irq (irq, regs); - rval = IRQ_HANDLED; - } while (status); - } - - CB_PIC_INTEN |= CB_PIC_INT1EN; - - return rval; -} - - -static void irq_nop (unsigned irq) { } - -static unsigned cb_pic_startup_irq (unsigned irq) -{ - int rval; - - if (cb_pic_active_irqs == 0) { - rval = request_irq (IRQ_CB_PIC, cb_pic_handle_irq, - IRQF_DISABLED, "cb_pic_handler", 0); - if (rval != 0) - return rval; - } - - cb_pic_active_irqs++; - - cb_pic_enable_irq (irq); - - return 0; -} - -/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array - INITS (which is terminated by an entry with the name field == 0). */ -void __init cb_pic_init_irq_types (struct cb_pic_irq_init *inits, - struct hw_interrupt_type *hw_irq_types) -{ - struct cb_pic_irq_init *init; - for (init = inits; init->name; init++) { - struct hw_interrupt_type *hwit = hw_irq_types++; - - hwit->typename = init->name; - - hwit->startup = cb_pic_startup_irq; - hwit->shutdown = cb_pic_shutdown_irq; - hwit->enable = cb_pic_enable_irq; - hwit->disable = cb_pic_disable_irq; - hwit->ack = irq_nop; - hwit->end = irq_nop; - - /* Initialize kernel IRQ infrastructure for this interrupt. */ - init_irq_handlers(init->base, init->num, init->interval, hwit); - } -} diff --git a/arch/v850/kernel/rte_me2_cb.ld b/arch/v850/kernel/rte_me2_cb.ld deleted file mode 100644 index cf0766065ec67e1e092b4e35ec5e2bf34ca8df69..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_me2_cb.ld +++ /dev/null @@ -1,30 +0,0 @@ -/* Linker script for the Midas labs RTE-V850E/ME2-CB evaluation board - (CONFIG_RTE_CB_ME2), with kernel in SDRAM. */ - -MEMORY { - /* 128Kbyte of IRAM */ - IRAM : ORIGIN = 0x00000000, LENGTH = 0x00020000 - - /* 32MB of SDRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -#define KRAM SDRAM - -SECTIONS { - .text : { - __kram_start = . ; - TEXT_CONTENTS - INTV_CONTENTS /* copy to iRAM (0x0-0x620) */ - } > KRAM - - .data : { - DATA_CONTENTS - BSS_CONTENTS - RAMK_INIT_CONTENTS - __kram_end = . ; - BOOTMAP_CONTENTS - } > KRAM - - .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/rte_nb85e_cb-multi.ld b/arch/v850/kernel/rte_nb85e_cb-multi.ld deleted file mode 100644 index de347b4fffac9373a94fab32bf3b863465ced3b4..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_nb85e_cb-multi.ld +++ /dev/null @@ -1,57 +0,0 @@ -/* Linker script for the Midas labs RTE-NB85E-CB evaluation board - (CONFIG_RTE_CB_NB85E), with the Multi debugger ROM monitor . */ - -MEMORY { - /* 1MB of SRAM; we can't use the last 96KB, because it's used by - the monitor scratch-RAM. This memory is mirrored 4 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = (SRAM_SIZE - MON_SCRATCH_SIZE) - /* Monitor scratch RAM; only the interrupt vectors should go here. */ - MRAM : ORIGIN = MON_SCRATCH_ADDR, LENGTH = MON_SCRATCH_SIZE - /* 16MB of SDRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -#ifdef CONFIG_RTE_CB_NB85E_KSRAM -# define KRAM SRAM -#else -# define KRAM SDRAM -#endif - -SECTIONS { - /* We can't use RAMK_KRAM_CONTENTS because that puts the whole - kernel in a single ELF segment, and the Multi debugger (which - we use to load the kernel) appears to have bizarre problems - dealing with it. */ - - .text : { - __kram_start = . ; - TEXT_CONTENTS - } > KRAM - - .data : { - DATA_CONTENTS - BSS_CONTENTS - RAMK_INIT_CONTENTS - __kram_end = . ; - BOOTMAP_CONTENTS - - /* The address at which the interrupt vectors are initially - loaded by the loader. We can't load the interrupt vectors - directly into their target location, because the monitor - ROM for the GHS Multi debugger barfs if we try. - Unfortunately, Multi also doesn't deal correctly with ELF - sections where the LMA and VMA differ (it just ignores the - LMA), so we can't use that feature to work around the - problem! What we do instead is just put the interrupt - vectors into a normal section, and have the - `mach_early_init' function for Midas boards do the - necessary copying and relocation at runtime (this section - basically only contains `jr' instructions, so it's not - that hard). */ - . = ALIGN (0x10) ; - __intv_load_start = . ; - INTV_CONTENTS - } > KRAM - - .root ALIGN (4096) : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/rte_nb85e_cb.c b/arch/v850/kernel/rte_nb85e_cb.c deleted file mode 100644 index b4a045da5d70801c004afda74289cd3443aeaab1..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_nb85e_cb.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/v850/kernel/rte_nb85e_cb.c -- Midas labs RTE-V850E/NB85E-CB board - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mach.h" - -void __init mach_early_init (void) -{ - /* Configure caching; some possible settings: - - BHC = 0x0000, DCC = 0x0000 -- all caching disabled - BHC = 0x0040, DCC = 0x0000 -- SDRAM: icache only - BHC = 0x0080, DCC = 0x0C00 -- SDRAM: write-back dcache only - BHC = 0x00C0, DCC = 0x0C00 -- SDRAM: icache + write-back dcache - BHC = 0x00C0, DCC = 0x0800 -- SDRAM: icache + write-thru dcache - - We can only cache SDRAM (we can't use cache SRAM because it's in - the same memory region as the on-chip RAM and I/O space). - - Unfortunately, the dcache seems to be buggy, so we only use the - icache for now. */ - v850e_cache_enable (0x0040 /*BHC*/, 0x0003 /*ICC*/, 0x0000 /*DCC*/); - - rte_cb_early_init (); -} - -void __init mach_get_physical_ram (unsigned long *ram_start, - unsigned long *ram_len) -{ - /* We just use SDRAM here. */ - *ram_start = SDRAM_ADDR; - *ram_len = SDRAM_SIZE; -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -/* Called before configuring an on-chip UART. */ -void rte_nb85e_cb_uart_pre_configure (unsigned chan, - unsigned cflags, unsigned baud) -{ - /* The RTE-NB85E-CB connects some general-purpose I/O pins on the - CPU to the RTS/CTS lines the UART's serial connection, as follows: - P00 = CTS (in), P01 = DSR (in), P02 = RTS (out), P03 = DTR (out). */ - - TEG_PORT0_PM = 0x03; /* P00 and P01 inputs, P02 and P03 outputs */ - TEG_PORT0_IO = 0x03; /* Accept input */ - - /* Do pre-configuration for the actual UART. */ - teg_uart_pre_configure (chan, cflags, baud); -} - -void __init mach_init_irqs (void) -{ - teg_init_irqs (); - rte_cb_init_irqs (); -} diff --git a/arch/v850/kernel/rte_nb85e_cb.ld b/arch/v850/kernel/rte_nb85e_cb.ld deleted file mode 100644 index b672f484f08594c73370930639132bd22980521c..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/rte_nb85e_cb.ld +++ /dev/null @@ -1,22 +0,0 @@ -/* Linker script for the Midas labs RTE-NB85E-CB evaluation board - (CONFIG_RTE_CB_NB85E). */ - -MEMORY { - LOW : ORIGIN = 0x0, LENGTH = 0x00100000 - /* 1MB of SRAM This memory is mirrored 4 times. */ - SRAM : ORIGIN = SRAM_ADDR, LENGTH = SRAM_SIZE - /* 16MB of SDRAM. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -#ifdef CONFIG_RTE_CB_NB85E_KSRAM -# define KRAM SRAM -#else -# define KRAM SDRAM -#endif - -SECTIONS { - .intv : { INTV_CONTENTS } > LOW - .sram : { RAMK_KRAM_CONTENTS } > KRAM - .root : { ROOT_FS_CONTENTS } > SDRAM -} diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c deleted file mode 100644 index a0a8456a8430d6349deee2883ad5646ae65a0f70..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/setup.c +++ /dev/null @@ -1,330 +0,0 @@ -/* - * arch/v850/kernel/setup.c -- Arch-dependent initialization functions - * - * Copyright (C) 2001,02,03,05,06 NEC Electronics Corporation - * Copyright (C) 2001,02,03,05,06 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include /* we don't have swap, but for nr_free_pages */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "mach.h" - -/* These symbols are all defined in the linker map to delineate various - statically allocated regions of memory. */ - -extern char _intv_start, _intv_end; -/* `kram' is only used if the kernel uses part of normal user RAM. */ -extern char _kram_start __attribute__ ((__weak__)); -extern char _kram_end __attribute__ ((__weak__)); -extern char _init_start, _init_end; -extern char _bootmap; -extern char _stext, _etext, _sdata, _edata, _sbss, _ebss; -/* Many platforms use an embedded root image. */ -extern char _root_fs_image_start __attribute__ ((__weak__)); -extern char _root_fs_image_end __attribute__ ((__weak__)); - - -char __initdata command_line[COMMAND_LINE_SIZE]; - -/* Memory not used by the kernel. */ -static unsigned long total_ram_pages; - -/* System RAM. */ -static unsigned long ram_start = 0, ram_len = 0; - - -#define ADDR_TO_PAGE_UP(x) ((((unsigned long)x) + PAGE_SIZE-1) >> PAGE_SHIFT) -#define ADDR_TO_PAGE(x) (((unsigned long)x) >> PAGE_SHIFT) -#define PAGE_TO_ADDR(x) (((unsigned long)x) << PAGE_SHIFT) - -static void init_mem_alloc (unsigned long ram_start, unsigned long ram_len); - -void set_mem_root (void *addr, size_t len, char *cmd_line); - - -void __init setup_arch (char **cmdline) -{ - /* Keep a copy of command line */ - *cmdline = command_line; - memcpy (boot_command_line, command_line, COMMAND_LINE_SIZE); - boot_command_line[COMMAND_LINE_SIZE - 1] = '\0'; - - console_verbose (); - - init_mm.start_code = (unsigned long) &_stext; - init_mm.end_code = (unsigned long) &_etext; - init_mm.end_data = (unsigned long) &_edata; - init_mm.brk = (unsigned long) &_kram_end; - - /* Find out what mem this machine has. */ - mach_get_physical_ram (&ram_start, &ram_len); - /* ... and tell the kernel about it. */ - init_mem_alloc (ram_start, ram_len); - - printk (KERN_INFO "CPU: %s\nPlatform: %s\n", - CPU_MODEL_LONG, PLATFORM_LONG); - - /* do machine-specific setups. */ - mach_setup (cmdline); - -#ifdef CONFIG_MTD - if (!ROOT_DEV && &_root_fs_image_end > &_root_fs_image_start) - set_mem_root (&_root_fs_image_start, - &_root_fs_image_end - &_root_fs_image_start, - *cmdline); -#endif -} - -void __init trap_init (void) -{ -} - -#ifdef CONFIG_MTD - -/* From drivers/mtd/devices/slram.c */ -#define SLRAM_BLK_SZ 0x4000 - -/* Set the root filesystem to be the given memory region. - Some parameter may be appended to CMD_LINE. */ -void set_mem_root (void *addr, size_t len, char *cmd_line) -{ - /* Some sort of idiocy in MTD means we must supply a length that's - a multiple of SLRAM_BLK_SZ. We just round up the real length, - as the file system shouldn't attempt to access anything beyond - the end of the image anyway. */ - len = (((len - 1) + SLRAM_BLK_SZ) / SLRAM_BLK_SZ) * SLRAM_BLK_SZ; - - /* The only way to pass info to the MTD slram driver is via - the command line. */ - if (*cmd_line) { - cmd_line += strlen (cmd_line); - *cmd_line++ = ' '; - } - sprintf (cmd_line, "slram=root,0x%x,+0x%x", (u32)addr, (u32)len); - - ROOT_DEV = MKDEV (MTD_BLOCK_MAJOR, 0); -} -#endif - - -static void irq_nop (unsigned irq) { } -static unsigned irq_zero (unsigned irq) { return 0; } - -static void nmi_end (unsigned irq) -{ - if (irq != IRQ_NMI (0)) { - printk (KERN_CRIT "NMI %d is unrecoverable; restarting...", - irq - IRQ_NMI (0)); - machine_restart (0); - } -} - -static struct hw_interrupt_type nmi_irq_type = { - .typename = "NMI", - .startup = irq_zero, /* startup */ - .shutdown = irq_nop, /* shutdown */ - .enable = irq_nop, /* enable */ - .disable = irq_nop, /* disable */ - .ack = irq_nop, /* ack */ - .end = nmi_end, /* end */ -}; - -void __init init_IRQ (void) -{ - init_irq_handlers (0, NUM_MACH_IRQS, 1, 0); - init_irq_handlers (IRQ_NMI (0), NUM_NMIS, 1, &nmi_irq_type); - mach_init_irqs (); -} - - -void __init mem_init (void) -{ - max_mapnr = MAP_NR (ram_start + ram_len); - - num_physpages = ADDR_TO_PAGE (ram_len); - - total_ram_pages = free_all_bootmem (); - - printk (KERN_INFO - "Memory: %luK/%luK available" - " (%luK kernel code, %luK data)\n", - PAGE_TO_ADDR (nr_free_pages()) / 1024, - ram_len / 1024, - ((unsigned long)&_etext - (unsigned long)&_stext) / 1024, - ((unsigned long)&_ebss - (unsigned long)&_sdata) / 1024); -} - -void free_initmem (void) -{ - unsigned long ram_end = ram_start + ram_len; - unsigned long start = PAGE_ALIGN ((unsigned long)(&_init_start)); - - if (start >= ram_start && start < ram_end) { - unsigned long addr; - unsigned long end = PAGE_ALIGN ((unsigned long)(&_init_end)); - - if (end > ram_end) - end = ram_end; - - printk("Freeing unused kernel memory: %ldK freed\n", - (end - start) / 1024); - - for (addr = start; addr < end; addr += PAGE_SIZE) { - struct page *page = virt_to_page (addr); - ClearPageReserved (page); - init_page_count (page); - __free_page (page); - total_ram_pages++; - } - } -} - - -/* Initialize the `bootmem allocator'. RAM_START and RAM_LEN identify - what RAM may be used. */ -static void __init -init_bootmem_alloc (unsigned long ram_start, unsigned long ram_len) -{ - /* The part of the kernel that's in the same managed RAM space - used for general allocation. */ - unsigned long kram_start = (unsigned long)&_kram_start; - unsigned long kram_end = (unsigned long)&_kram_end; - /* End of the managed RAM space. */ - unsigned long ram_end = ram_start + ram_len; - /* Address range of the interrupt vector table. */ - unsigned long intv_start = (unsigned long)&_intv_start; - unsigned long intv_end = (unsigned long)&_intv_end; - /* True if the interrupt vectors are in the managed RAM area. */ - int intv_in_ram = (intv_end > ram_start && intv_start < ram_end); - /* True if the interrupt vectors are inside the kernel's RAM. */ - int intv_in_kram = (intv_end > kram_start && intv_start < kram_end); - /* A pointer to an optional function that reserves platform-specific - memory regions. We declare the pointer `volatile' to avoid gcc - turning the call into a static call (the problem is that since - it's a weak symbol, a static call may end up trying to reference - the location 0x0, which is not always reachable). */ - void (*volatile mrb) (void) = mach_reserve_bootmem; - /* The bootmem allocator's allocation bitmap. */ - unsigned long bootmap = (unsigned long)&_bootmap; - unsigned long bootmap_len; - - /* Round bootmap location up to next page. */ - bootmap = PAGE_TO_ADDR (ADDR_TO_PAGE_UP (bootmap)); - - /* Initialize bootmem allocator. */ - bootmap_len = init_bootmem_node (NODE_DATA (0), - ADDR_TO_PAGE (bootmap), - ADDR_TO_PAGE (PAGE_OFFSET), - ADDR_TO_PAGE (ram_end)); - - /* Now make the RAM actually allocatable (it starts out `reserved'). */ - free_bootmem (ram_start, ram_len); - - if (kram_end > kram_start) - /* Reserve the RAM part of the kernel's address space, so it - doesn't get allocated. */ - reserve_bootmem(kram_start, kram_end - kram_start, - BOOTMEM_DEFAULT); - - if (intv_in_ram && !intv_in_kram) - /* Reserve the interrupt vector space. */ - reserve_bootmem(intv_start, intv_end - intv_start, - BOOTMEM_DEFAULT); - - if (bootmap >= ram_start && bootmap < ram_end) - /* Reserve the bootmap space. */ - reserve_bootmem(bootmap, bootmap_len, - BOOTMEM_DEFAULT); - - /* Reserve the memory used by the root filesystem image if it's - in RAM. */ - if (&_root_fs_image_end > &_root_fs_image_start - && (unsigned long)&_root_fs_image_start >= ram_start - && (unsigned long)&_root_fs_image_start < ram_end) - reserve_bootmem ((unsigned long)&_root_fs_image_start, - &_root_fs_image_end - &_root_fs_image_start, - BOOTMEM_DEFAULT); - - /* Let the platform-dependent code reserve some too. */ - if (mrb) - (*mrb) (); -} - -/* Tell the kernel about what RAM it may use for memory allocation. */ -static void __init -init_mem_alloc (unsigned long ram_start, unsigned long ram_len) -{ - unsigned i; - unsigned long zones_size[MAX_NR_ZONES]; - - init_bootmem_alloc (ram_start, ram_len); - - for (i = 0; i < MAX_NR_ZONES; i++) - zones_size[i] = 0; - - /* We stuff all the memory into one area, which includes the - initial gap from PAGE_OFFSET to ram_start. */ - zones_size[ZONE_DMA] - = ADDR_TO_PAGE (ram_len + (ram_start - PAGE_OFFSET)); - - /* The allocator is very picky about the address of the first - allocatable page -- it must be at least as aligned as the - maximum allocation -- so try to detect cases where it will get - confused and signal them at compile time (this is a common - problem when porting to a new platform with ). There is a - similar runtime check in free_area_init_core. */ -#if ((PAGE_OFFSET >> PAGE_SHIFT) & ((1UL << (MAX_ORDER - 1)) - 1)) -#error MAX_ORDER is too large for given PAGE_OFFSET (use CONFIG_FORCE_MAX_ZONEORDER to change it) -#endif - NODE_DATA(0)->node_mem_map = NULL; - free_area_init_node (0, NODE_DATA(0), zones_size, - ADDR_TO_PAGE (PAGE_OFFSET), 0); -} - - - -/* Taken from m68knommu */ -void show_mem(void) -{ - unsigned long i; - int free = 0, total = 0, reserved = 0, shared = 0; - int cached = 0; - - printk(KERN_INFO "\nMem-info:\n"); - show_free_areas(); - i = max_mapnr; - while (i-- > 0) { - total++; - if (PageReserved(mem_map+i)) - reserved++; - else if (PageSwapCache(mem_map+i)) - cached++; - else if (!page_count(mem_map+i)) - free++; - else - shared += page_count(mem_map+i) - 1; - } - printk(KERN_INFO "%d pages of RAM\n",total); - printk(KERN_INFO "%d free pages\n",free); - printk(KERN_INFO "%d reserved pages\n",reserved); - printk(KERN_INFO "%d pages shared\n",shared); - printk(KERN_INFO "%d pages swap cached\n",cached); -} diff --git a/arch/v850/kernel/signal.c b/arch/v850/kernel/signal.c deleted file mode 100644 index bf166e7e762cf505793b8cf13b170e3ab30c3ac2..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/signal.c +++ /dev/null @@ -1,523 +0,0 @@ -/* - * arch/v850/kernel/signal.c -- Signal handling - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * Copyright (C) 1999,2000,2002 Niibe Yutaka & Kaz Kojima - * Copyright (C) 1991,1992 Linus Torvalds - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson - * - * This file was derived from the sh version, arch/sh/kernel/signal.c - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#define DEBUG_SIG 0 - -#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) - -asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); - -/* - * Atomically swap in the new signal mask, and wait for a signal. - */ -asmlinkage int -sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs) -{ - sigset_t saveset; - - mask &= _BLOCKABLE; - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - siginitset(¤t->blocked, mask); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - regs->gpr[GPR_RVAL] = -EINTR; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(regs, &saveset)) - return -EINTR; - } -} - -asmlinkage int -sys_rt_sigsuspend(sigset_t *unewset, size_t sigsetsize, - struct pt_regs *regs) -{ - sigset_t saveset, newset; - - /* XXX: Don't preclude handling different sized sigset_t's. */ - if (sigsetsize != sizeof(sigset_t)) - return -EINVAL; - - if (copy_from_user(&newset, unewset, sizeof(newset))) - return -EFAULT; - sigdelsetmask(&newset, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - current->blocked = newset; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - regs->gpr[GPR_RVAL] = -EINTR; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(regs, &saveset)) - return -EINTR; - } -} - -asmlinkage int -sys_sigaction(int sig, const struct old_sigaction *act, - struct old_sigaction *oact) -{ - struct k_sigaction new_ka, old_ka; - int ret; - - if (act) { - old_sigset_t mask; - if (!access_ok(VERIFY_READ, act, sizeof(*act)) || - __get_user(new_ka.sa.sa_handler, &act->sa_handler) || - __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) - return -EFAULT; - __get_user(new_ka.sa.sa_flags, &act->sa_flags); - __get_user(mask, &act->sa_mask); - siginitset(&new_ka.sa.sa_mask, mask); - } - - ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); - - if (!ret && oact) { - if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || - __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || - __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) - return -EFAULT; - __put_user(old_ka.sa.sa_flags, &oact->sa_flags); - __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); - } - - return ret; -} - -asmlinkage int -sys_sigaltstack(const stack_t *uss, stack_t *uoss, - struct pt_regs *regs) -{ - return do_sigaltstack(uss, uoss, regs->gpr[GPR_SP]); -} - - -/* - * Do a signal return; undo the signal stack. - */ - -struct sigframe -{ - struct sigcontext sc; - unsigned long extramask[_NSIG_WORDS-1]; - unsigned long tramp[2]; /* signal trampoline */ -}; - -struct rt_sigframe -{ - struct siginfo info; - struct ucontext uc; - unsigned long tramp[2]; /* signal trampoline */ -}; - -static int -restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc, int *rval_p) -{ - unsigned int err = 0; - -#define COPY(x) err |= __get_user(regs->x, &sc->regs.x) - COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); - COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); - COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); - COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); - COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); - COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); - COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); - COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); - COPY(pc); COPY(psw); - COPY(ctpc); COPY(ctpsw); COPY(ctbp); -#undef COPY - - return err; -} - -asmlinkage int sys_sigreturn(struct pt_regs *regs) -{ - struct sigframe *frame = (struct sigframe *)regs->gpr[GPR_SP]; - sigset_t set; - int rval; - - if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) - goto badframe; - - if (__get_user(set.sig[0], &frame->sc.oldmask) - || (_NSIG_WORDS > 1 - && __copy_from_user(&set.sig[1], &frame->extramask, - sizeof(frame->extramask)))) - goto badframe; - - sigdelsetmask(&set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - if (restore_sigcontext(regs, &frame->sc, &rval)) - goto badframe; - return rval; - -badframe: - force_sig(SIGSEGV, current); - return 0; -} - -asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) -{ - struct rt_sigframe *frame = (struct rt_sigframe *)regs->gpr[GPR_SP]; - sigset_t set; - stack_t st; - int rval; - - if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) - goto badframe; - - if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set))) - goto badframe; - - sigdelsetmask(&set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - if (restore_sigcontext(regs, &frame->uc.uc_mcontext, &rval)) - goto badframe; - - if (__copy_from_user(&st, &frame->uc.uc_stack, sizeof(st))) - goto badframe; - /* It is more difficult to avoid calling this function than to - call it and ignore errors. */ - do_sigaltstack(&st, NULL, regs->gpr[GPR_SP]); - - return rval; - -badframe: - force_sig(SIGSEGV, current); - return 0; -} - -/* - * Set up a signal frame. - */ - -static int -setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs, - unsigned long mask) -{ - int err = 0; - -#define COPY(x) err |= __put_user(regs->x, &sc->regs.x) - COPY(gpr[0]); COPY(gpr[1]); COPY(gpr[2]); COPY(gpr[3]); - COPY(gpr[4]); COPY(gpr[5]); COPY(gpr[6]); COPY(gpr[7]); - COPY(gpr[8]); COPY(gpr[9]); COPY(gpr[10]); COPY(gpr[11]); - COPY(gpr[12]); COPY(gpr[13]); COPY(gpr[14]); COPY(gpr[15]); - COPY(gpr[16]); COPY(gpr[17]); COPY(gpr[18]); COPY(gpr[19]); - COPY(gpr[20]); COPY(gpr[21]); COPY(gpr[22]); COPY(gpr[23]); - COPY(gpr[24]); COPY(gpr[25]); COPY(gpr[26]); COPY(gpr[27]); - COPY(gpr[28]); COPY(gpr[29]); COPY(gpr[30]); COPY(gpr[31]); - COPY(pc); COPY(psw); - COPY(ctpc); COPY(ctpsw); COPY(ctbp); -#undef COPY - - err |= __put_user(mask, &sc->oldmask); - - return err; -} - -/* - * Determine which stack to use.. - */ -static inline void * -get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) -{ - /* Default to using normal stack */ - unsigned long sp = regs->gpr[GPR_SP]; - - if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! sas_ss_flags(sp)) - sp = current->sas_ss_sp + current->sas_ss_size; - - return (void *)((sp - frame_size) & -8UL); -} - -static void setup_frame(int sig, struct k_sigaction *ka, - sigset_t *set, struct pt_regs *regs) -{ - struct sigframe *frame; - int err = 0; - int signal; - - frame = get_sigframe(ka, regs, sizeof(*frame)); - - if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) - goto give_sigsegv; - - signal = current_thread_info()->exec_domain - && current_thread_info()->exec_domain->signal_invmap - && sig < 32 - ? current_thread_info()->exec_domain->signal_invmap[sig] - : sig; - - err |= setup_sigcontext(&frame->sc, regs, set->sig[0]); - - if (_NSIG_WORDS > 1) { - err |= __copy_to_user(frame->extramask, &set->sig[1], - sizeof(frame->extramask)); - } - - /* Set up to return from userspace. If provided, use a stub - already in userspace. */ - if (ka->sa.sa_flags & SA_RESTORER) { - regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; - } else { - /* Note, these encodings are _little endian_! */ - - /* addi __NR_sigreturn, r0, r12 */ - err |= __put_user(0x6600 | (__NR_sigreturn << 16), - frame->tramp + 0); - /* trap 0 */ - err |= __put_user(0x010007e0, - frame->tramp + 1); - - regs->gpr[GPR_LP] = (unsigned long)frame->tramp; - - flush_cache_sigtramp (regs->gpr[GPR_LP]); - } - - if (err) - goto give_sigsegv; - - /* Set up registers for signal handler. */ - regs->pc = (v850_reg_t) ka->sa.sa_handler; - regs->gpr[GPR_SP] = (v850_reg_t)frame; - /* Signal handler args: */ - regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ - regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->sc;/* arg 1: sigcontext */ - - set_fs(USER_DS); - -#if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%08lx ra=%08lx\n", - current->comm, current->pid, frame, regs->pc, ); -#endif - - return; - -give_sigsegv: - force_sigsegv(sig, current); -} - -static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, - sigset_t *set, struct pt_regs *regs) -{ - struct rt_sigframe *frame; - int err = 0; - int signal; - - frame = get_sigframe(ka, regs, sizeof(*frame)); - - if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) - goto give_sigsegv; - - signal = current_thread_info()->exec_domain - && current_thread_info()->exec_domain->signal_invmap - && sig < 32 - ? current_thread_info()->exec_domain->signal_invmap[sig] - : sig; - - err |= copy_siginfo_to_user(&frame->info, info); - - /* Create the ucontext. */ - err |= __put_user(0, &frame->uc.uc_flags); - err |= __put_user(0, &frame->uc.uc_link); - err |= __put_user((void *)current->sas_ss_sp, - &frame->uc.uc_stack.ss_sp); - err |= __put_user(sas_ss_flags(regs->gpr[GPR_SP]), - &frame->uc.uc_stack.ss_flags); - err |= __put_user(current->sas_ss_size, &frame->uc.uc_stack.ss_size); - err |= setup_sigcontext(&frame->uc.uc_mcontext, - regs, set->sig[0]); - err |= __copy_to_user(&frame->uc.uc_sigmask, set, sizeof(*set)); - - /* Set up to return from userspace. If provided, use a stub - already in userspace. */ - if (ka->sa.sa_flags & SA_RESTORER) { - regs->gpr[GPR_LP] = (unsigned long) ka->sa.sa_restorer; - } else { - /* Note, these encodings are _little endian_! */ - - /* addi __NR_sigreturn, r0, r12 */ - err |= __put_user(0x6600 | (__NR_sigreturn << 16), - frame->tramp + 0); - /* trap 0 */ - err |= __put_user(0x010007e0, - frame->tramp + 1); - - regs->gpr[GPR_LP] = (unsigned long)frame->tramp; - - flush_cache_sigtramp (regs->gpr[GPR_LP]); - } - - if (err) - goto give_sigsegv; - - /* Set up registers for signal handler. */ - regs->pc = (v850_reg_t) ka->sa.sa_handler; - regs->gpr[GPR_SP] = (v850_reg_t)frame; - /* Signal handler args: */ - regs->gpr[GPR_ARG0] = signal; /* arg 0: signum */ - regs->gpr[GPR_ARG1] = (v850_reg_t)&frame->info; /* arg 1: siginfo */ - regs->gpr[GPR_ARG2] = (v850_reg_t)&frame->uc; /* arg 2: ucontext */ - - set_fs(USER_DS); - -#if DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", - current->comm, current->pid, frame, regs->pc, regs->pr); -#endif - - return; - -give_sigsegv: - force_sigsegv(sig, current); -} - -/* - * OK, we're invoking a handler - */ - -static void -handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka, - sigset_t *oldset, struct pt_regs * regs) -{ - /* Are we from a system call? */ - if (PT_REGS_SYSCALL (regs)) { - /* If so, check system call restarting.. */ - switch (regs->gpr[GPR_RVAL]) { - case -ERESTART_RESTARTBLOCK: - current_thread_info()->restart_block.fn = - do_no_restart_syscall; - /* fall through */ - case -ERESTARTNOHAND: - regs->gpr[GPR_RVAL] = -EINTR; - break; - - case -ERESTARTSYS: - if (!(ka->sa.sa_flags & SA_RESTART)) { - regs->gpr[GPR_RVAL] = -EINTR; - break; - } - /* fallthrough */ - case -ERESTARTNOINTR: - regs->gpr[12] = PT_REGS_SYSCALL (regs); - regs->pc -= 4; /* Size of `trap 0' insn. */ - } - - PT_REGS_SET_SYSCALL (regs, 0); - } - - /* Set up the stack frame */ - if (ka->sa.sa_flags & SA_SIGINFO) - setup_rt_frame(sig, ka, info, oldset, regs); - else - setup_frame(sig, ka, oldset, regs); - - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); - if (!(ka->sa.sa_flags & SA_NODEFER)) - sigaddset(¤t->blocked,sig); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); -} - -/* - * Note that 'init' is a special process: it doesn't get signals it doesn't - * want to handle. Thus you cannot kill init even with a SIGKILL even by - * mistake. - * - * Note that we go through the signals twice: once to check the signals that - * the kernel can handle, and then we build all the user-level signal handling - * stack-frames in one go after that. - */ -int do_signal(struct pt_regs *regs, sigset_t *oldset) -{ - siginfo_t info; - int signr; - struct k_sigaction ka; - - /* - * We want the common case to go fast, which - * is why we may in certain cases get here from - * kernel mode. Just return without doing anything - * if so. - */ - if (!user_mode(regs)) - return 1; - - if (!oldset) - oldset = ¤t->blocked; - - signr = get_signal_to_deliver(&info, &ka, regs, NULL); - if (signr > 0) { - /* Whee! Actually deliver the signal. */ - handle_signal(signr, &info, &ka, oldset, regs); - return 1; - } - - /* Did we come from a system call? */ - if (PT_REGS_SYSCALL (regs)) { - int rval = (int)regs->gpr[GPR_RVAL]; - /* Restart the system call - no handlers present */ - if (rval == -ERESTARTNOHAND - || rval == -ERESTARTSYS - || rval == -ERESTARTNOINTR) - { - regs->gpr[12] = PT_REGS_SYSCALL (regs); - regs->pc -= 4; /* Size of `trap 0' insn. */ - } - else if (rval == -ERESTART_RESTARTBLOCK) { - regs->gpr[12] = __NR_restart_syscall; - regs->pc -= 4; /* Size of `trap 0' insn. */ - } - } - return 0; -} diff --git a/arch/v850/kernel/sim.c b/arch/v850/kernel/sim.c deleted file mode 100644 index 467b4aa0acdd30e557613c6fed1c0dfb73508d8b..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/sim.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * arch/v850/kernel/sim.c -- Machine-specific stuff for GDB v850e simulator - * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mach.h" - -/* The name of a file containing the root filesystem. */ -#define ROOT_FS "rootfs.image" - -extern void simcons_setup (void); -extern void simcons_poll_ttys (void); -extern void set_mem_root (void *addr, size_t len, char *cmd_line); - -static int read_file (const char *name, - unsigned long *addr, unsigned long *len, - const char **err); - -void __init mach_setup (char **cmdline) -{ - const char *err; - unsigned long root_dev_addr, root_dev_len; - - simcons_setup (); - - printk (KERN_INFO "Reading root filesystem: %s", ROOT_FS); - - if (read_file (ROOT_FS, &root_dev_addr, &root_dev_len, &err)) { - printk (" (size %luK)\n", root_dev_len / 1024); - set_mem_root ((void *)root_dev_addr, (size_t)root_dev_len, - *cmdline); - } else - printk ("...%s failed!\n", err); -} - -void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) -{ - *ram_start = RAM_ADDR; - *ram_len = RAM_SIZE; -} - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* ...do magic timer initialization?... */ - mach_tick = simcons_poll_ttys; - setup_irq (0, timer_action); -} - - -static void irq_nop (unsigned irq) { } -static unsigned irq_zero (unsigned irq) { return 0; } - -static struct hw_interrupt_type sim_irq_type = { - .typename = "IRQ", - .startup = irq_zero, /* startup */ - .shutdown = irq_nop, /* shutdown */ - .enable = irq_nop, /* enable */ - .disable = irq_nop, /* disable */ - .ack = irq_nop, /* ack */ - .end = irq_nop, /* end */ -}; - -void __init mach_init_irqs (void) -{ - init_irq_handlers (0, NUM_MACH_IRQS, 1, &sim_irq_type); -} - - -void mach_gettimeofday (struct timespec *tv) -{ - long timeval[2], timezone[2]; - int rval = V850_SIM_SYSCALL (gettimeofday, timeval, timezone); - if (rval == 0) { - tv->tv_sec = timeval[0]; - tv->tv_nsec = timeval[1] * 1000; - } -} - -void machine_restart (char *__unused) -{ - V850_SIM_SYSCALL (write, 1, "RESTART\n", 8); - V850_SIM_SYSCALL (exit, 0); -} - -void machine_halt (void) -{ - V850_SIM_SYSCALL (write, 1, "HALT\n", 5); - V850_SIM_SYSCALL (exit, 0); -} - -void machine_power_off (void) -{ - V850_SIM_SYSCALL (write, 1, "POWER OFF\n", 10); - V850_SIM_SYSCALL (exit, 0); -} - - -/* Load data from a file called NAME into ram. The address and length - of the data image are returned in ADDR and LEN. */ -static int __init -read_file (const char *name, - unsigned long *addr, unsigned long *len, - const char **err) -{ - int rval, fd; - unsigned long cur, left; - /* Note this is not a normal stat buffer, it's an ad-hoc - structure defined by the simulator. */ - unsigned long stat_buf[10]; - - /* Stat the file to find out the length. */ - rval = V850_SIM_SYSCALL (stat, name, stat_buf); - if (rval < 0) { - if (err) *err = "stat"; - return 0; - } - *len = stat_buf[4]; - - /* Open the file; `0' is O_RDONLY. */ - fd = V850_SIM_SYSCALL (open, name, 0); - if (fd < 0) { - if (err) *err = "open"; - return 0; - } - - *addr = (unsigned long)alloc_bootmem(*len); - if (! *addr) { - V850_SIM_SYSCALL (close, fd); - if (err) *err = "alloc_bootmem"; - return 0; - } - - cur = *addr; - left = *len; - while (left > 0) { - int chunk = V850_SIM_SYSCALL (read, fd, cur, left); - if (chunk <= 0) - break; - cur += chunk; - left -= chunk; - } - V850_SIM_SYSCALL (close, fd); - if (left > 0) { - /* Some read failed. */ - free_bootmem (*addr, *len); - if (err) *err = "read"; - return 0; - } - - return 1; -} diff --git a/arch/v850/kernel/sim.ld b/arch/v850/kernel/sim.ld deleted file mode 100644 index 101885f3c9f08fde092adb204c29d7c5bdc7e25b..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/sim.ld +++ /dev/null @@ -1,13 +0,0 @@ -/* Linker script for the gdb v850e simulator (CONFIG_V850E_SIM). */ - -MEMORY { - /* Interrupt vectors. */ - INTV : ORIGIN = 0x0, LENGTH = 0xe0 - /* Main RAM. */ - RAM : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE -} - -SECTIONS { - .intv : { INTV_CONTENTS } > INTV - .ram : { RAMK_KRAM_CONTENTS } > RAM -} diff --git a/arch/v850/kernel/sim85e2.c b/arch/v850/kernel/sim85e2.c deleted file mode 100644 index 566dde5e6070f0a3cf16ecae73618ce2211e2dc9..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/sim85e2.c +++ /dev/null @@ -1,195 +0,0 @@ -/* - * arch/v850/kernel/sim85e2.c -- Machine-specific stuff for - * V850E2 RTL simulator - * - * Copyright (C) 2002,03 NEC Electronics Corporation - * Copyright (C) 2002,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "mach.h" - - -/* There are 4 possible areas we can use: - - IRAM (1MB) is fast for instruction fetches, but slow for data - DRAM (1020KB) is fast for data, but slow for instructions - ERAM is cached, so should be fast for both insns and data - SDRAM is external DRAM, similar to ERAM -*/ - -#define INIT_MEMC_FOR_SDRAM -#define USE_SDRAM_AREA -#define KERNEL_IN_SDRAM_AREA - -#define DCACHE_MODE V850E2_CACHE_BTSC_DCM_WT -/*#define DCACHE_MODE V850E2_CACHE_BTSC_DCM_WB_ALLOC*/ - -#ifdef USE_SDRAM_AREA -#define RAM_START SDRAM_ADDR -#define RAM_END (SDRAM_ADDR + SDRAM_SIZE) -#else -/* When we use DRAM, we need to account for the fact that the end of it is - used for R0_RAM. */ -#define RAM_START DRAM_ADDR -#define RAM_END R0_RAM_ADDR -#endif - - -extern void memcons_setup (void); - - -#ifdef KERNEL_IN_SDRAM_AREA -#define EARLY_INIT_SECTION_ATTR __attribute__ ((section (".early.text"))) -#else -#define EARLY_INIT_SECTION_ATTR __init -#endif - -void EARLY_INIT_SECTION_ATTR mach_early_init (void) -{ - /* The sim85e2 simulator tracks `undefined' values, so to make - debugging easier, we begin by zeroing out all otherwise - undefined registers. This is not strictly necessary. - - The registers we zero are: - Every GPR except: - stack-pointer (r3) - task-pointer (r16) - our return addr (r31) - Every system register (SPR) that we know about except for - the PSW (SPR 5), which we zero except for the - disable-interrupts bit. - */ - - /* GPRs */ - asm volatile (" mov r0, r1 ; mov r0, r2 "); - asm volatile ("mov r0, r4 ; mov r0, r5 ; mov r0, r6 ; mov r0, r7 "); - asm volatile ("mov r0, r8 ; mov r0, r9 ; mov r0, r10; mov r0, r11"); - asm volatile ("mov r0, r12; mov r0, r13; mov r0, r14; mov r0, r15"); - asm volatile (" mov r0, r17; mov r0, r18; mov r0, r19"); - asm volatile ("mov r0, r20; mov r0, r21; mov r0, r22; mov r0, r23"); - asm volatile ("mov r0, r24; mov r0, r25; mov r0, r26; mov r0, r27"); - asm volatile ("mov r0, r28; mov r0, r29; mov r0, r30"); - - /* SPRs */ - asm volatile ("ldsr r0, 0; ldsr r0, 1; ldsr r0, 2; ldsr r0, 3"); - asm volatile ("ldsr r0, 4"); - asm volatile ("addi 0x20, r0, r1; ldsr r1, 5"); /* PSW */ - asm volatile ("ldsr r0, 16; ldsr r0, 17; ldsr r0, 18; ldsr r0, 19"); - asm volatile ("ldsr r0, 20"); - - -#ifdef INIT_MEMC_FOR_SDRAM - /* Settings for SDRAM controller. */ - V850E2_VSWC = 0x0042; - V850E2_BSC = 0x9286; - V850E2_BCT(0) = 0xb000; /* was: 0 */ - V850E2_BCT(1) = 0x000b; - V850E2_ASC = 0; - V850E2_LBS = 0xa9aa; /* was: 0xaaaa */ - V850E2_LBC(0) = 0; - V850E2_LBC(1) = 0; /* was: 0x3 */ - V850E2_BCC = 0; - V850E2_RFS(4) = 0x800a; /* was: 0xf109 */ - V850E2_SCR(4) = 0x2091; /* was: 0x20a1 */ - V850E2_RFS(3) = 0x800c; - V850E2_SCR(3) = 0x20a1; - V850E2_DWC(0) = 0; - V850E2_DWC(1) = 0; -#endif - -#if 0 -#ifdef CONFIG_V850E2_SIM85E2S - /* Turn on the caches. */ - V850E2_CACHE_BTSC = V850E2_CACHE_BTSC_ICM | DCACHE_MODE; - V850E2_BHC = 0x1010; -#elif CONFIG_V850E2_SIM85E2C - V850E2_CACHE_BTSC |= (V850E2_CACHE_BTSC_ICM | V850E2_CACHE_BTSC_DCM0); - V850E2_BUSM_BHC = 0xFFFF; -#endif -#else - V850E2_BHC = 0; -#endif - - /* Don't stop the simulator at `halt' instructions. */ - SIM85E2_NOTHAL = 1; - - /* Ensure that the simulator halts on a panic, instead of going - into an infinite loop inside the panic function. */ - panic_timeout = -1; -} - -void __init mach_setup (char **cmdline) -{ - memcons_setup (); -} - -void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len) -{ - *ram_start = RAM_START; - *ram_len = RAM_END - RAM_START; -} - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* The simulator actually cycles through all interrupts - periodically. We just pay attention to IRQ0, which gives us - 1/64 the rate of the periodic interrupts. */ - setup_irq (0, timer_action); -} - -void mach_gettimeofday (struct timespec *tv) -{ - tv->tv_sec = 0; - tv->tv_nsec = 0; -} - -/* Interrupts */ - -struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_MACH_IRQS, 1, 7 }, - { 0 } -}; -struct hw_interrupt_type hw_itypes[1]; - -/* Initialize interrupts. */ -void __init mach_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - - -void machine_halt (void) __attribute__ ((noreturn)); -void machine_halt (void) -{ - SIM85E2_SIMFIN = 0; /* Halt immediately. */ - for (;;) {} -} - -void machine_restart (char *__unused) -{ - machine_halt (); -} - -void machine_power_off (void) -{ - machine_halt (); -} - diff --git a/arch/v850/kernel/sim85e2.ld b/arch/v850/kernel/sim85e2.ld deleted file mode 100644 index 7470fd2ffb5ba38afae1fa592bd4b3d4a1954247..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/sim85e2.ld +++ /dev/null @@ -1,36 +0,0 @@ -/* Linker script for the sim85e2c simulator, which is a verilog simulation of - the V850E2 NA85E2C cpu core (CONFIG_V850E2_SIM85E2C). */ - -MEMORY { - /* 1MB of `instruction RAM', starting at 0. - Instruction fetches are much faster from IRAM than from DRAM. */ - IRAM : ORIGIN = IRAM_ADDR, LENGTH = IRAM_SIZE - - /* 1MB of `data RAM', below and contiguous with the I/O space. - Data fetches are much faster from DRAM than from IRAM. */ - DRAM : ORIGIN = DRAM_ADDR, LENGTH = DRAM_SIZE - - /* `external ram' (CS1 area), comes after IRAM. */ - ERAM : ORIGIN = ERAM_ADDR, LENGTH = ERAM_SIZE - - /* Dynamic RAM; uses memory controller. */ - SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE -} - -SECTIONS { - .iram : { - INTV_CONTENTS - *arch/v850/kernel/head.o - *(.early.text) - } > IRAM - .dram : { - _memcons_output = . ; - . = . + 0x8000 ; - _memcons_output_end = . ; - } > DRAM - .sdram : { - /* We stick console output into a buffer here. */ - RAMK_KRAM_CONTENTS - ROOT_FS_CONTENTS - } > SDRAM -} diff --git a/arch/v850/kernel/simcons.c b/arch/v850/kernel/simcons.c deleted file mode 100644 index 9973596ae3044e7dffc937bf8fc074f06ae451c5..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/simcons.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * arch/v850/kernel/simcons.c -- Console I/O for GDB v850e simulator - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - - -/* Low-level console. */ - -static void simcons_write (struct console *co, const char *buf, unsigned len) -{ - V850_SIM_SYSCALL (write, 1, buf, len); -} - -static int simcons_read (struct console *co, char *buf, unsigned len) -{ - return V850_SIM_SYSCALL (read, 0, buf, len); -} - -static struct tty_driver *tty_driver; -static struct tty_driver *simcons_device (struct console *c, int *index) -{ - *index = c->index; - return tty_driver; -} - -static struct console simcons = -{ - .name = "simcons", - .write = simcons_write, - .read = simcons_read, - .device = simcons_device, - .flags = CON_PRINTBUFFER, - .index = -1, -}; - -/* Higher level TTY interface. */ - -int simcons_tty_open (struct tty_struct *tty, struct file *filp) -{ - return 0; -} - -int simcons_tty_write (struct tty_struct *tty, - const unsigned char *buf, int count) -{ - return V850_SIM_SYSCALL (write, 1, buf, count); -} - -int simcons_tty_write_room (struct tty_struct *tty) -{ - /* Completely arbitrary. */ - return 0x100000; -} - -int simcons_tty_chars_in_buffer (struct tty_struct *tty) -{ - /* We have no buffer. */ - return 0; -} - -static const struct tty_operations ops = { - .open = simcons_tty_open, - .write = simcons_tty_write, - .write_room = simcons_tty_write_room, - .chars_in_buffer = simcons_tty_chars_in_buffer, -}; - -int __init simcons_tty_init (void) -{ - struct tty_driver *driver = alloc_tty_driver(1); - int err; - if (!driver) - return -ENOMEM; - driver->name = "simcons"; - driver->major = TTY_MAJOR; - driver->minor_start = 64; - driver->type = TTY_DRIVER_TYPE_SYSCONS; - driver->init_termios = tty_std_termios; - tty_set_operations(driver, &ops); - err = tty_register_driver(driver); - if (err) { - put_tty_driver(driver); - return err; - } - tty_driver = driver; - return 0; -} -/* We use `late_initcall' instead of just `__initcall' as a workaround for - the fact that (1) simcons_tty_init can't be called before tty_init, - (2) tty_init is called via `module_init', (3) if statically linked, - module_init == device_init, and (4) there's no ordering of init lists. - We can do this easily because simcons is always statically linked, but - other tty drivers that depend on tty_init and which must use - `module_init' to declare their init routines are likely to be broken. */ -late_initcall(simcons_tty_init); - -/* Poll for input on the console, and if there's any, deliver it to the - tty driver. */ -void simcons_poll_tty (struct tty_struct *tty) -{ - char buf[32]; /* Not the nicest way to do it but I need it correct first */ - int flip = 0, send_break = 0; - struct pollfd pfd; - pfd.fd = 0; - pfd.events = POLLIN; - - if (V850_SIM_SYSCALL (poll, &pfd, 1, 0) > 0) { - if (pfd.revents & POLLIN) { - /* Real block hardware knows the transfer size before - transfer so the new tty buffering doesn't try to handle - this rather weird simulator specific case well */ - int rd = V850_SIM_SYSCALL (read, 0, buf, 32); - if (rd > 0) { - tty_insert_flip_string(tty, buf, rd); - flip = 1; - } else - send_break = 1; - } else if (pfd.revents & POLLERR) - send_break = 1; - } - - if (send_break) { - tty_insert_flip_char (tty, 0, TTY_BREAK); - flip = 1; - } - - if (flip) - tty_schedule_flip (tty); -} - -void simcons_poll_ttys (void) -{ - if (tty_driver && tty_driver->ttys[0]) - simcons_poll_tty (tty_driver->ttys[0]); -} - -void simcons_setup (void) -{ - V850_SIM_SYSCALL (make_raw, 0); - register_console (&simcons); - printk (KERN_INFO "Console: GDB V850E simulator stdio\n"); -} diff --git a/arch/v850/kernel/syscalls.c b/arch/v850/kernel/syscalls.c deleted file mode 100644 index 1a83daf8e24f069fb6873d963a0b4d6ac6d62352..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/syscalls.c +++ /dev/null @@ -1,196 +0,0 @@ -/* - * arch/v850/kernel/syscalls.c -- Various system-call definitions not - * defined in machine-independent code - * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * This file was derived the ppc version, arch/ppc/kernel/syscalls.c - * ... which was derived from "arch/i386/kernel/sys_i386.c" by Gary Thomas; - * modified by Cort Dougan (cort@cs.nmt.edu) - * and Paul Mackerras (paulus@cs.anu.edu.au). - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* - * sys_ipc() is the de-multiplexer for the SysV IPC calls.. - * - * This is really horribly ugly. - */ -int -sys_ipc (uint call, int first, int second, int third, void *ptr, long fifth) -{ - int version, ret; - - version = call >> 16; /* hack for backward compatibility */ - call &= 0xffff; - - ret = -EINVAL; - switch (call) { - case SEMOP: - ret = sys_semop (first, (struct sembuf *)ptr, second); - break; - case SEMGET: - ret = sys_semget (first, second, third); - break; - case SEMCTL: - { - union semun fourth; - - if (!ptr) - break; - if ((ret = access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT) - || (ret = get_user(fourth.__pad, (void **)ptr))) - break; - ret = sys_semctl (first, second, third, fourth); - break; - } - case MSGSND: - ret = sys_msgsnd (first, (struct msgbuf *) ptr, second, third); - break; - case MSGRCV: - switch (version) { - case 0: { - struct ipc_kludge tmp; - - if (!ptr) - break; - if ((ret = access_ok(VERIFY_READ, ptr, sizeof(tmp)) ? 0 : -EFAULT) - || (ret = copy_from_user(&tmp, - (struct ipc_kludge *) ptr, - sizeof (tmp)))) - break; - ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, - third); - break; - } - default: - ret = sys_msgrcv (first, (struct msgbuf *) ptr, - second, fifth, third); - break; - } - break; - case MSGGET: - ret = sys_msgget ((key_t) first, second); - break; - case MSGCTL: - ret = sys_msgctl (first, second, (struct msqid_ds *) ptr); - break; - case SHMAT: - switch (version) { - default: { - ulong raddr; - - if ((ret = access_ok(VERIFY_WRITE, (ulong*) third, - sizeof(ulong)) ? 0 : -EFAULT)) - break; - ret = do_shmat (first, (char *) ptr, second, &raddr); - if (ret) - break; - ret = put_user (raddr, (ulong *) third); - break; - } - case 1: /* iBCS2 emulator entry point */ - if (!segment_eq(get_fs(), get_ds())) - break; - ret = do_shmat (first, (char *) ptr, second, - (ulong *) third); - break; - } - break; - case SHMDT: - ret = sys_shmdt ((char *)ptr); - break; - case SHMGET: - ret = sys_shmget (first, second, third); - break; - case SHMCTL: - ret = sys_shmctl (first, second, (struct shmid_ds *) ptr); - break; - } - - return ret; -} - -static inline unsigned long -do_mmap2 (unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct file * file = NULL; - int ret = -EBADF; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (! (flags & MAP_ANONYMOUS)) { - if (!(file = fget (fd))) - goto out; - } - - down_write (¤t->mm->mmap_sem); - ret = do_mmap_pgoff (file, addr, len, prot, flags, pgoff); - up_write (¤t->mm->mmap_sem); - if (file) - fput (file); -out: - return ret; -} - -unsigned long sys_mmap2 (unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2 (addr, len, prot, flags, fd, pgoff); -} - -unsigned long sys_mmap (unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, off_t offset) -{ - int err = -EINVAL; - - if (offset & ~PAGE_MASK) - goto out; - - err = do_mmap2 (addr, len, prot, flags, fd, offset >> PAGE_SHIFT); -out: - return err; -} - -/* - * Do a system call from kernel instead of calling sys_execve so we - * end up with proper pt_regs. - */ -int kernel_execve(const char *filename, char *const argv[], char *const envp[]) -{ - register char *__a __asm__ ("r6") = filename; - register void *__b __asm__ ("r7") = argv; - register void *__c __asm__ ("r8") = envp; - register unsigned long __syscall __asm__ ("r12") = __NR_execve; - register unsigned long __ret __asm__ ("r10"); - __asm__ __volatile__ ("trap 0" - : "=r" (__ret), "=r" (__syscall) - : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c) - : "r1", "r5", "r11", "r13", "r14", - "r15", "r16", "r17", "r18", "r19"); - return __ret; -} diff --git a/arch/v850/kernel/teg.c b/arch/v850/kernel/teg.c deleted file mode 100644 index 699248f92aae104d2a9091384a1798b5bfd73a42..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/teg.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * arch/v850/kernel/teg.c -- NB85E-TEG cpu chip - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "mach.h" - -void __init mach_sched_init (struct irqaction *timer_action) -{ - /* Select timer interrupt instead of external pin. */ - TEG_ISS |= 0x1; - /* Start hardware timer. */ - v850e_timer_d_configure (0, HZ); - /* Install timer interrupt handler. */ - setup_irq (IRQ_INTCMD(0), timer_action); -} - -static struct v850e_intc_irq_init irq_inits[] = { - { "IRQ", 0, NUM_CPU_IRQS, 1, 7 }, - { "CMD", IRQ_INTCMD(0), IRQ_INTCMD_NUM, 1, 5 }, - { "SER", IRQ_INTSER(0), IRQ_INTSER_NUM, 1, 3 }, - { "SR", IRQ_INTSR(0), IRQ_INTSR_NUM, 1, 4 }, - { "ST", IRQ_INTST(0), IRQ_INTST_NUM, 1, 5 }, - { 0 } -}; -#define NUM_IRQ_INITS (ARRAY_SIZE(irq_inits) - 1) - -static struct hw_interrupt_type hw_itypes[NUM_IRQ_INITS]; - -/* Initialize MA chip interrupts. */ -void __init teg_init_irqs (void) -{ - v850e_intc_init_irq_types (irq_inits, hw_itypes); -} - -/* Called before configuring an on-chip UART. */ -void teg_uart_pre_configure (unsigned chan, unsigned cflags, unsigned baud) -{ - /* Enable UART I/O pins instead of external interrupt pins, and - UART interrupts instead of external pin interrupts. */ - TEG_ISS |= 0x4E; -} diff --git a/arch/v850/kernel/time.c b/arch/v850/kernel/time.c deleted file mode 100644 index d810c93fe66567b3c5166860fd2b815fc6dc5359..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/time.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * linux/arch/v850/kernel/time.c -- Arch-dependent timer functions - * - * Copyright (C) 1991, 1992, 1995, 2001, 2002 Linus Torvalds - * - * This file contains the v850-specific time handling details. - * Most of the stuff is located in the machine specific files. - * - * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 - * "A Kernel Model for Precision Timekeeping" by Dave Mills - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "mach.h" - -#define TICK_SIZE (tick_nsec / 1000) - -/* - * timer_interrupt() needs to keep up the real-time clock, - * as well as call the "do_timer()" routine every clocktick - */ -static irqreturn_t timer_interrupt (int irq, void *dummy, struct pt_regs *regs) -{ -#if 0 - /* last time the cmos clock got updated */ - static long last_rtc_update=0; -#endif - - /* may need to kick the hardware timer */ - if (mach_tick) - mach_tick (); - - do_timer (1); -#ifndef CONFIG_SMP - update_process_times(user_mode(regs)); -#endif - profile_tick(CPU_PROFILING, regs); -#if 0 - /* - * If we have an externally synchronized Linux clock, then update - * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be - * called as close as possible to 500 ms before the new second starts. - */ - if (ntp_synced() && - xtime.tv_sec > last_rtc_update + 660 && - (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && - (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { - if (set_rtc_mmss (xtime.tv_sec) == 0) - last_rtc_update = xtime.tv_sec; - else - last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ - } -#ifdef CONFIG_HEARTBEAT - /* use power LED as a heartbeat instead -- much more useful - for debugging -- based on the version for PReP by Cort */ - /* acts like an actual heart beat -- ie thump-thump-pause... */ - if (mach_heartbeat) { - static unsigned cnt = 0, period = 0, dist = 0; - - if (cnt == 0 || cnt == dist) - mach_heartbeat ( 1 ); - else if (cnt == 7 || cnt == dist+7) - mach_heartbeat ( 0 ); - - if (++cnt > period) { - cnt = 0; - /* The hyperbolic function below modifies the heartbeat period - * length in dependency of the current (5min) load. It goes - * through the points f(0)=126, f(1)=86, f(5)=51, - * f(inf)->30. */ - period = ((672< -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - - -extern void *trap_table; -EXPORT_SYMBOL (trap_table); - -/* platform dependent support */ -EXPORT_SYMBOL (kernel_thread); -EXPORT_SYMBOL (__bug); - -/* Networking helper routines. */ -EXPORT_SYMBOL (csum_partial_copy_nocheck); -EXPORT_SYMBOL (csum_partial_copy_from_user); -EXPORT_SYMBOL (ip_compute_csum); -EXPORT_SYMBOL (ip_fast_csum); - -/* string / mem functions */ -EXPORT_SYMBOL (memset); -EXPORT_SYMBOL (memcpy); -EXPORT_SYMBOL (memmove); - -/* - * libgcc functions - functions that are used internally by the - * compiler... (prototypes are not correct though, but that - * doesn't really matter since they're not versioned). - */ -extern void __ashldi3 (void); -extern void __ashrdi3 (void); -extern void __lshrdi3 (void); -extern void __muldi3 (void); -extern void __negdi2 (void); - -EXPORT_SYMBOL (__ashldi3); -EXPORT_SYMBOL (__ashrdi3); -EXPORT_SYMBOL (__lshrdi3); -EXPORT_SYMBOL (__muldi3); -EXPORT_SYMBOL (__negdi2); diff --git a/arch/v850/kernel/v850e2_cache.c b/arch/v850/kernel/v850e2_cache.c deleted file mode 100644 index 4570312c689cb44e95cd5ef82081297ff70c356b..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/v850e2_cache.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * arch/v850/kernel/v850e2_cache.c -- Cache control for V850E2 cache - * memories - * - * Copyright (C) 2003 NEC Electronics Corporation - * Copyright (C) 2003 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -#include - -/* Cache operations we can do. The encoding corresponds directly to the - value we need to write into the COPR register. */ -enum cache_op { - OP_SYNC_IF_DIRTY = V850E2_CACHE_COPR_CFC(0), /* 000 */ - OP_SYNC_IF_VALID = V850E2_CACHE_COPR_CFC(1), /* 001 */ - OP_SYNC_IF_VALID_AND_CLEAR = V850E2_CACHE_COPR_CFC(3), /* 011 */ - OP_WAY_CLEAR = V850E2_CACHE_COPR_CFC(4), /* 100 */ - OP_FILL = V850E2_CACHE_COPR_CFC(5), /* 101 */ - OP_CLEAR = V850E2_CACHE_COPR_CFC(6), /* 110 */ - OP_CREATE_DIRTY = V850E2_CACHE_COPR_CFC(7) /* 111 */ -}; - -/* Which cache to use. This encoding also corresponds directly to the - value we need to write into the COPR register. */ -enum cache { - ICACHE = 0, - DCACHE = V850E2_CACHE_COPR_LBSL -}; - -/* Returns ADDR rounded down to the beginning of its cache-line. */ -#define CACHE_LINE_ADDR(addr) \ - ((addr) & ~(V850E2_CACHE_LINE_SIZE - 1)) -/* Returns END_ADDR rounded up to the `limit' of its cache-line. */ -#define CACHE_LINE_END_ADDR(end_addr) \ - CACHE_LINE_ADDR(end_addr + (V850E2_CACHE_LINE_SIZE - 1)) - - -/* Low-level cache ops. */ - -/* Apply cache-op OP to all entries in CACHE. */ -static inline void cache_op_all (enum cache_op op, enum cache cache) -{ - int cmd = op | cache | V850E2_CACHE_COPR_WSLE | V850E2_CACHE_COPR_STRT; - - if (op != OP_WAY_CLEAR) { - /* The WAY_CLEAR operation does the whole way, but other - ops take begin-index and count params; we just indicate - the entire cache. */ - V850E2_CACHE_CADL = 0; - V850E2_CACHE_CADH = 0; - V850E2_CACHE_CCNT = V850E2_CACHE_WAY_SIZE - 1; - } - - V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(0); /* way 0 */ - V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(1); /* way 1 */ - V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(2); /* way 2 */ - V850E2_CACHE_COPR = cmd | V850E2_CACHE_COPR_WSL(3); /* way 3 */ -} - -/* Apply cache-op OP to all entries in CACHE covering addresses ADDR - through ADDR+LEN. */ -static inline void cache_op_range (enum cache_op op, u32 addr, u32 len, - enum cache cache) -{ - u32 start = CACHE_LINE_ADDR (addr); - u32 end = CACHE_LINE_END_ADDR (addr + len); - u32 num_lines = (end - start) >> V850E2_CACHE_LINE_SIZE_BITS; - - V850E2_CACHE_CADL = start & 0xFFFF; - V850E2_CACHE_CADH = start >> 16; - V850E2_CACHE_CCNT = num_lines - 1; - - V850E2_CACHE_COPR = op | cache | V850E2_CACHE_COPR_STRT; -} - - -/* High-level ops. */ - -static void cache_exec_after_store_all (void) -{ - cache_op_all (OP_SYNC_IF_DIRTY, DCACHE); - cache_op_all (OP_WAY_CLEAR, ICACHE); -} - -static void cache_exec_after_store_range (u32 start, u32 len) -{ - cache_op_range (OP_SYNC_IF_DIRTY, start, len, DCACHE); - cache_op_range (OP_CLEAR, start, len, ICACHE); -} - - -/* Exported functions. */ - -void flush_icache (void) -{ - cache_exec_after_store_all (); -} - -void flush_icache_range (unsigned long start, unsigned long end) -{ - cache_exec_after_store_range (start, end - start); -} - -void flush_icache_page (struct vm_area_struct *vma, struct page *page) -{ - cache_exec_after_store_range (page_to_virt (page), PAGE_SIZE); -} - -void flush_icache_user_range (struct vm_area_struct *vma, struct page *page, - unsigned long addr, int len) -{ - cache_exec_after_store_range (addr, len); -} - -void flush_cache_sigtramp (unsigned long addr) -{ - /* For the exact size, see signal.c, but 16 bytes should be enough. */ - cache_exec_after_store_range (addr, 16); -} diff --git a/arch/v850/kernel/v850e_cache.c b/arch/v850/kernel/v850e_cache.c deleted file mode 100644 index ea3e51cfb25985335be38d95c3458e2eba9e0eca..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/v850e_cache.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * arch/v850/kernel/v850e_cache.c -- Cache control for V850E cache memories - * - * Copyright (C) 2003 NEC Electronics Corporation - * Copyright (C) 2003 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -/* This file implements cache control for the rather simple cache used on - some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2 - CPU. V850E2 processors have their own (better) cache - implementation. */ - -#include -#include -#include - -#define WAIT_UNTIL_CLEAR(value) while (value) {} - -/* Set caching params via the BHC and DCC registers. */ -void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc) -{ - unsigned long *r0_ram = (unsigned long *)R0_RAM_ADDR; - register u16 bhc_val asm ("r6") = bhc; - - /* Read the instruction cache control register (ICC) and confirm - that bits 0 and 1 (TCLR0, TCLR1) are all cleared. */ - WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); - V850E_CACHE_ICC = icc; - -#ifdef V850E_CACHE_DCC - /* Configure data-cache. */ - V850E_CACHE_DCC = dcc; -#endif /* V850E_CACHE_DCC */ - - /* Configure caching for various memory regions by writing the BHC - register. The documentation says that an instruction _cannot_ - enable/disable caching for the memory region in which the - instruction itself exists; to work around this, we store - appropriate instructions into the on-chip RAM area (which is never - cached), and briefly jump there to do the work. */ -#ifdef V850E_CACHE_WRITE_IBS - *r0_ram++ = 0xf0720760; /* st.h r0, 0xfffff072[r0] */ -#endif - *r0_ram++ = 0xf06a3760; /* st.h r6, 0xfffff06a[r0] */ - *r0_ram = 0x5640006b; /* jmp [r11] */ - - asm ("mov hilo(1f), r11; jmp [%1]; 1:;" - :: "r" (bhc_val), "r" (R0_RAM_ADDR) : "r11"); -} - -static void clear_icache (void) -{ - /* 1. Read the instruction cache control register (ICC) and confirm - that bits 0 and 1 (TCLR0, TCLR1) are all cleared. */ - WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); - - /* 2. Read the ICC register and confirm that bit 12 (LOCK0) is - cleared. Bit 13 of the ICC register is always cleared. */ - WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x1000); - - /* 3. Set the TCLR0 and TCLR1 bits of the ICC register as follows, - when clearing way 0 and way 1 at the same time: - (a) Set the TCLR0 and TCLR1 bits. - (b) Read the TCLR0 and TCLR1 bits to confirm that these bits - are cleared. - (c) Perform (a) and (b) above again. */ - V850E_CACHE_ICC |= 0x3; - WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); - -#ifdef V850E_CACHE_REPEAT_ICC_WRITE - /* Do it again. */ - V850E_CACHE_ICC |= 0x3; - WAIT_UNTIL_CLEAR (V850E_CACHE_ICC & 0x3); -#endif -} - -#ifdef V850E_CACHE_DCC -/* Flush or clear (or both) the data cache, depending on the value of FLAGS; - the procedure is the same for both, just the control bits used differ (and - both may be performed simultaneously). */ -static void dcache_op (unsigned short flags) -{ - /* 1. Read the data cache control register (DCC) and confirm that bits - 0, 1, 4, and 5 (DC00, DC01, DC04, DC05) are all cleared. */ - WAIT_UNTIL_CLEAR (V850E_CACHE_DCC & 0x33); - - /* 2. Clear DCC register bit 12 (DC12), bit 13 (DC13), or both - depending on the way for which tags are to be cleared. */ - V850E_CACHE_DCC &= ~0xC000; - - /* 3. Set DCC register bit 0 (DC00), bit 1 (DC01) or both depending on - the way for which tags are to be cleared. - ... - Set DCC register bit 4 (DC04), bit 5 (DC05), or both depending - on the way to be data flushed. */ - V850E_CACHE_DCC |= flags; - - /* 4. Read DCC register bit DC00, DC01 [DC04, DC05], or both depending - on the way for which tags were cleared [flushed] and confirm - that that bit is cleared. */ - WAIT_UNTIL_CLEAR (V850E_CACHE_DCC & flags); -} -#endif /* V850E_CACHE_DCC */ - -/* Flushes the contents of the dcache to memory. */ -static inline void flush_dcache (void) -{ -#ifdef V850E_CACHE_DCC - /* We only need to do something if in write-back mode. */ - if (V850E_CACHE_DCC & 0x0400) - dcache_op (0x30); -#endif /* V850E_CACHE_DCC */ -} - -/* Flushes the contents of the dcache to memory, and then clears it. */ -static inline void clear_dcache (void) -{ -#ifdef V850E_CACHE_DCC - /* We only need to do something if the dcache is enabled. */ - if (V850E_CACHE_DCC & 0x0C00) - dcache_op (0x33); -#endif /* V850E_CACHE_DCC */ -} - -/* Clears the dcache without flushing to memory first. */ -static inline void clear_dcache_no_flush (void) -{ -#ifdef V850E_CACHE_DCC - /* We only need to do something if the dcache is enabled. */ - if (V850E_CACHE_DCC & 0x0C00) - dcache_op (0x3); -#endif /* V850E_CACHE_DCC */ -} - -static inline void cache_exec_after_store (void) -{ - flush_dcache (); - clear_icache (); -} - - -/* Exported functions. */ - -void flush_icache (void) -{ - cache_exec_after_store (); -} - -void flush_icache_range (unsigned long start, unsigned long end) -{ - cache_exec_after_store (); -} - -void flush_icache_page (struct vm_area_struct *vma, struct page *page) -{ - cache_exec_after_store (); -} - -void flush_icache_user_range (struct vm_area_struct *vma, struct page *page, - unsigned long adr, int len) -{ - cache_exec_after_store (); -} - -void flush_cache_sigtramp (unsigned long addr) -{ - cache_exec_after_store (); -} diff --git a/arch/v850/kernel/v850e_intc.c b/arch/v850/kernel/v850e_intc.c deleted file mode 100644 index 8d39a52ee6d1251dfc4c22ceada22263e8a62eae..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/v850e_intc.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * arch/v850/kernel/v850e_intc.c -- V850E interrupt controller (INTC) - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include -#include - -#include - -static void irq_nop (unsigned irq) { } - -static unsigned v850e_intc_irq_startup (unsigned irq) -{ - v850e_intc_clear_pending_irq (irq); - v850e_intc_enable_irq (irq); - return 0; -} - -static void v850e_intc_end_irq (unsigned irq) -{ - unsigned long psw, temp; - - /* Clear the highest-level bit in the In-service priority register - (ISPR), to allow this interrupt (or another of the same or - lesser priority) to happen again. - - The `reti' instruction normally does this automatically when the - PSW bits EP and NP are zero, but we can't always rely on reti - being used consistently to return after an interrupt (another - process can be scheduled, for instance, which can delay the - associated reti for a long time, or this process may be being - single-stepped, which uses the `dbret' instruction to return - from the kernel). - - We also set the PSW EP bit, which prevents reti from also - trying to modify the ISPR itself. */ - - /* Get PSW and disable interrupts. */ - asm volatile ("stsr psw, %0; di" : "=r" (psw)); - /* We don't want to do anything for NMIs (they don't use the ISPR). */ - if (! (psw & 0xC0)) { - /* Transition to `trap' state, so that an eventual real - reti instruction won't modify the ISPR. */ - psw |= 0x40; - /* Fake an interrupt return, which automatically clears the - appropriate bit in the ISPR. */ - asm volatile ("mov hilo(1f), %0;" - "ldsr %0, eipc; ldsr %1, eipsw;" - "reti;" - "1:" - : "=&r" (temp) : "r" (psw)); - } -} - -/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array - INITS (which is terminated by an entry with the name field == 0). */ -void __init v850e_intc_init_irq_types (struct v850e_intc_irq_init *inits, - struct hw_interrupt_type *hw_irq_types) -{ - struct v850e_intc_irq_init *init; - for (init = inits; init->name; init++) { - unsigned i; - struct hw_interrupt_type *hwit = hw_irq_types++; - - hwit->typename = init->name; - - hwit->startup = v850e_intc_irq_startup; - hwit->shutdown = v850e_intc_disable_irq; - hwit->enable = v850e_intc_enable_irq; - hwit->disable = v850e_intc_disable_irq; - hwit->ack = irq_nop; - hwit->end = v850e_intc_end_irq; - - /* Initialize kernel IRQ infrastructure for this interrupt. */ - init_irq_handlers(init->base, init->num, init->interval, hwit); - - /* Set the interrupt priorities. */ - for (i = 0; i < init->num; i++) { - unsigned irq = init->base + i * init->interval; - - /* If the interrupt is currently enabled (all - interrupts are initially disabled), then - assume whoever enabled it has set things up - properly, and avoid messing with it. */ - if (! v850e_intc_irq_enabled (irq)) - /* This write also (1) disables the - interrupt, and (2) clears any pending - interrupts. */ - V850E_INTC_IC (irq) - = (V850E_INTC_IC_PR (init->priority) - | V850E_INTC_IC_MK); - } - } -} diff --git a/arch/v850/kernel/v850e_timer_d.c b/arch/v850/kernel/v850e_timer_d.c deleted file mode 100644 index d2a4ece2574c5acccf2c175242a7dca8a2dff50c..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/v850e_timer_d.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * include/asm-v850/v850e_timer_d.c -- `Timer D' component often used - * with V850E CPUs - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -#include -#include - -/* Start interval timer TIMER (0-3). The timer will issue the - corresponding INTCMD interrupt RATE times per second. - This function does not enable the interrupt. */ -void v850e_timer_d_configure (unsigned timer, unsigned rate) -{ - unsigned divlog2, count; - - /* Calculate params for timer. */ - if (! calc_counter_params ( - V850E_TIMER_D_BASE_FREQ, rate, - V850E_TIMER_D_TMCD_CS_MIN, V850E_TIMER_D_TMCD_CS_MAX, 16, - &divlog2, &count)) - printk (KERN_WARNING - "Cannot find interval timer %d setting suitable" - " for rate of %dHz.\n" - "Using rate of %dHz instead.\n", - timer, rate, - (V850E_TIMER_D_BASE_FREQ >> divlog2) >> 16); - - /* Do the actual hardware timer initialization: */ - - /* Enable timer. */ - V850E_TIMER_D_TMCD(timer) = V850E_TIMER_D_TMCD_CAE; - /* Set clock divider. */ - V850E_TIMER_D_TMCD(timer) - = V850E_TIMER_D_TMCD_CAE - | V850E_TIMER_D_TMCD_CS(divlog2); - /* Set timer compare register. */ - V850E_TIMER_D_CMD(timer) = count; - /* Start counting. */ - V850E_TIMER_D_TMCD(timer) - = V850E_TIMER_D_TMCD_CAE - | V850E_TIMER_D_TMCD_CS(divlog2) - | V850E_TIMER_D_TMCD_CE; -} diff --git a/arch/v850/kernel/v850e_utils.c b/arch/v850/kernel/v850e_utils.c deleted file mode 100644 index e6807ef8dee6db33a44788bc9fb6730711fd246e..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/v850e_utils.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * include/asm-v850/v850e_utils.h -- Utility functions associated with - * V850E CPUs - * - * Copyright (C) 2001,02,03 NEC Electronics Corporation - * Copyright (C) 2001,02,03 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -/* Calculate counter clock-divider and count values to attain the - desired frequency RATE from the base frequency BASE_FREQ. The - counter is expected to have a clock-divider, which can divide the - system cpu clock by a power of two value from MIN_DIVLOG2 to - MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter - counts up and resets whenever it's equal to the compare register, - generating an interrupt or whatever when it does so). The returned - values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT - -- the counter compare value to use. Returns true if it was possible - to find a reasonable value, otherwise false (and the other return - values will be set to be as good as possible). */ -int calc_counter_params (unsigned long base_freq, - unsigned long rate, - unsigned min_divlog2, unsigned max_divlog2, - unsigned counter_size, - unsigned *divlog2, unsigned *count) -{ - unsigned _divlog2; - int ok = 0; - - /* Find the lowest clock divider setting that can represent RATE. */ - for (_divlog2 = min_divlog2; _divlog2 <= max_divlog2; _divlog2++) { - /* Minimum interrupt rate possible using this divider. */ - unsigned min_int_rate - = (base_freq >> _divlog2) >> counter_size; - - if (min_int_rate <= rate) { - /* This setting is the highest resolution - setting that's slow enough enough to attain - RATE interrupts per second, so use it. */ - ok = 1; - break; - } - } - - if (_divlog2 > max_divlog2) - /* Can't find correct setting. */ - _divlog2 = max_divlog2; - - if (divlog2) - *divlog2 = _divlog2; - if (count) - *count = ((base_freq >> _divlog2) + rate/2) / rate; - - return ok; -} diff --git a/arch/v850/kernel/vmlinux.lds.S b/arch/v850/kernel/vmlinux.lds.S deleted file mode 100644 index d08cd1d27f27a77cfdf5375bd14d54534acf27ea..0000000000000000000000000000000000000000 --- a/arch/v850/kernel/vmlinux.lds.S +++ /dev/null @@ -1,306 +0,0 @@ -/* - * arch/v850/vmlinux.lds.S -- kernel linker script for v850 platforms - * - * Copyright (C) 2002,03,04,05 NEC Electronics Corporation - * Copyright (C) 2002,03,04,05 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - - -#define VMLINUX_SYMBOL(_sym_) _##_sym_ -#include - -/* For most platforms, this will define useful things like RAM addr/size. */ -#include - - -/* The following macros contain the usual definitions for various data areas. - The prefix `RAMK_' is used to indicate macros suitable for kernels loaded - into RAM, and similarly `ROMK_' for ROM-resident kernels. Note that all - symbols are prefixed with an extra `_' for compatibility with the v850 - toolchain. */ - - -/* Interrupt vectors. */ -#define INTV_CONTENTS \ - . = ALIGN (0x10) ; \ - __intv_start = . ; \ - *(.intv.reset) /* Reset vector */ \ - . = __intv_start + 0x10 ; \ - *(.intv.common) /* Vectors common to all v850e proc */\ - . = __intv_start + 0x80 ; \ - *(.intv.mach) /* Machine-specific int. vectors. */ \ - __intv_end = . ; - -#define RODATA_CONTENTS \ - . = ALIGN (16) ; \ - *(.rodata) *(.rodata.*) \ - *(__vermagic) /* Kernel version magic */ \ - *(.rodata1) \ - /* PCI quirks */ \ - ___start_pci_fixups_early = . ; \ - *(.pci_fixup_early) \ - ___end_pci_fixups_early = . ; \ - ___start_pci_fixups_header = . ; \ - *(.pci_fixup_header) \ - ___end_pci_fixups_header = . ; \ - ___start_pci_fixups_final = . ; \ - *(.pci_fixup_final) \ - ___end_pci_fixups_final = . ; \ - ___start_pci_fixups_enable = . ; \ - *(.pci_fixup_enable) \ - ___end_pci_fixups_enable = . ; \ - /* Kernel symbol table: Normal symbols */ \ - ___start___ksymtab = .; \ - *(__ksymtab) \ - ___stop___ksymtab = .; \ - /* Kernel symbol table: GPL-only symbols */ \ - ___start___ksymtab_gpl = .; \ - *(__ksymtab_gpl) \ - ___stop___ksymtab_gpl = .; \ - /* Kernel symbol table: GPL-future symbols */ \ - ___start___ksymtab_gpl_future = .; \ - *(__ksymtab_gpl_future) \ - ___stop___ksymtab_gpl_future = .; \ - /* Kernel symbol table: strings */ \ - *(__ksymtab_strings) \ - /* Kernel symbol table: Normal symbols */ \ - ___start___kcrctab = .; \ - *(__kcrctab) \ - ___stop___kcrctab = .; \ - /* Kernel symbol table: GPL-only symbols */ \ - ___start___kcrctab_gpl = .; \ - *(__kcrctab_gpl) \ - ___stop___kcrctab_gpl = .; \ - /* Kernel symbol table: GPL-future symbols */ \ - ___start___kcrctab_gpl_future = .; \ - *(__kcrctab_gpl_future) \ - ___stop___kcrctab_gpl_future = .; \ - /* Built-in module parameters */ \ - . = ALIGN (4) ; \ - ___start___param = .; \ - *(__param) \ - ___stop___param = .; - - -/* Kernel text segment, and some constant data areas. */ -#define TEXT_CONTENTS \ - _text = .; \ - __stext = . ; \ - TEXT_TEXT \ - SCHED_TEXT \ - *(.exit.text) /* 2.5 convention */ \ - *(.text.exit) /* 2.4 convention */ \ - *(.text.lock) \ - *(.exitcall.exit) \ - __real_etext = . ; /* There may be data after here. */ \ - RODATA_CONTENTS \ - . = ALIGN (4) ; \ - *(.call_table_data) \ - *(.call_table_text) \ - . = ALIGN (16) ; /* Exception table. */ \ - ___start___ex_table = . ; \ - *(__ex_table) \ - ___stop___ex_table = . ; \ - . = ALIGN (4) ; \ - __etext = . ; - -/* Kernel data segment. */ -#define DATA_CONTENTS \ - __sdata = . ; \ - DATA_DATA \ - EXIT_DATA /* 2.5 convention */ \ - *(.data.exit) /* 2.4 convention */ \ - . = ALIGN (16) ; \ - *(.data.cacheline_aligned) \ - . = ALIGN (0x2000) ; \ - *(.data.init_task) \ - . = ALIGN (0x2000) ; \ - __edata = . ; - -/* Kernel BSS segment. */ -#define BSS_CONTENTS \ - __sbss = . ; \ - *(.bss) \ - *(COMMON) \ - . = ALIGN (4) ; \ - __init_stack_end = . ; \ - __ebss = . ; - -/* `initcall' tables. */ -#define INITCALL_CONTENTS \ - . = ALIGN (16) ; \ - ___setup_start = . ; \ - *(.init.setup) /* 2.5 convention */ \ - *(.setup.init) /* 2.4 convention */ \ - ___setup_end = . ; \ - ___initcall_start = . ; \ - *(.initcall.init) \ - INITCALLS \ - . = ALIGN (4) ; \ - ___initcall_end = . ; \ - ___con_initcall_start = .; \ - *(.con_initcall.init) \ - ___con_initcall_end = .; - -/* Contents of `init' section for a kernel that's loaded into RAM. */ -#define RAMK_INIT_CONTENTS \ - RAMK_INIT_CONTENTS_NO_END \ - __init_end = . ; -/* Same as RAMK_INIT_CONTENTS, but doesn't define the `__init_end' symbol. */ -#define RAMK_INIT_CONTENTS_NO_END \ - . = ALIGN (4096) ; \ - __init_start = . ; \ - __sinittext = .; \ - INIT_TEXT /* 2.5 convention */ \ - __einittext = .; \ - INIT_DATA \ - *(.text.init) /* 2.4 convention */ \ - *(.data.init) \ - INITCALL_CONTENTS \ - INITRAMFS_CONTENTS - -/* The contents of `init' section for a ROM-resident kernel which - should go into RAM. */ -#define ROMK_INIT_RAM_CONTENTS \ - . = ALIGN (4096) ; \ - __init_start = . ; \ - INIT_DATA /* 2.5 convention */ \ - *(.data.init) /* 2.4 convention */ \ - __init_end = . ; \ - . = ALIGN (4096) ; - -/* The contents of `init' section for a ROM-resident kernel which - should go into ROM. */ -#define ROMK_INIT_ROM_CONTENTS \ - _sinittext = .; \ - INIT_TEXT /* 2.5 convention */ \ - _einittext = .; \ - *(.text.init) /* 2.4 convention */ \ - INITCALL_CONTENTS \ - INITRAMFS_CONTENTS - -/* A root filesystem image, for kernels with an embedded root filesystem. */ -#define ROOT_FS_CONTENTS \ - __root_fs_image_start = . ; \ - *(.root) \ - __root_fs_image_end = . ; - -#ifdef CONFIG_BLK_DEV_INITRD -/* The initramfs archive. */ -#define INITRAMFS_CONTENTS \ - . = ALIGN (4) ; \ - ___initramfs_start = . ; \ - *(.init.ramfs) \ - ___initramfs_end = . ; -#endif - -/* Where the initial bootmap (bitmap for the boot-time memory allocator) - should be place. */ -#define BOOTMAP_CONTENTS \ - . = ALIGN (4096) ; \ - __bootmap = . ; \ - . = . + 4096 ; /* enough for 128MB. */ - -/* The contents of a `typical' kram area for a kernel in RAM. */ -#define RAMK_KRAM_CONTENTS \ - __kram_start = . ; \ - TEXT_CONTENTS \ - DATA_CONTENTS \ - BSS_CONTENTS \ - RAMK_INIT_CONTENTS \ - __kram_end = . ; \ - BOOTMAP_CONTENTS - - -/* Define output sections normally used for a ROM-resident kernel. - ROM and RAM should be appropriate memory areas to use for kernel - ROM and RAM data. This assumes that ROM starts at 0 (and thus can - hold the interrupt vectors). */ -#define ROMK_SECTIONS(ROM, RAM) \ - .rom : { \ - INTV_CONTENTS \ - TEXT_CONTENTS \ - ROMK_INIT_ROM_CONTENTS \ - ROOT_FS_CONTENTS \ - } > ROM \ - \ - __rom_copy_src_start = . ; \ - \ - .data : { \ - __kram_start = . ; \ - __rom_copy_dst_start = . ; \ - DATA_CONTENTS \ - ROMK_INIT_RAM_CONTENTS \ - __rom_copy_dst_end = . ; \ - } > RAM AT> ROM \ - \ - .bss ALIGN (4) : { \ - BSS_CONTENTS \ - __kram_end = . ; \ - BOOTMAP_CONTENTS \ - } > RAM - - -/* The 32-bit variable `jiffies' is just the lower 32-bits of `jiffies_64'. */ -_jiffies = _jiffies_64 ; - - -/* Include an appropriate platform-dependent linker-script (which - usually should use the above macros to do most of the work). */ - -#ifdef CONFIG_V850E_SIM -# include "sim.ld" -#endif - -#ifdef CONFIG_V850E2_SIM85E2 -# include "sim85e2.ld" -#endif - -#ifdef CONFIG_V850E2_FPGA85E2C -# include "fpga85e2c.ld" -#endif - -#ifdef CONFIG_V850E2_ANNA -# ifdef CONFIG_ROM_KERNEL -# include "anna-rom.ld" -# else -# include "anna.ld" -# endif -#endif - -#ifdef CONFIG_V850E_AS85EP1 -# ifdef CONFIG_ROM_KERNEL -# include "as85ep1-rom.ld" -# else -# include "as85ep1.ld" -# endif -#endif - -#ifdef CONFIG_RTE_CB_MA1 -# ifdef CONFIG_ROM_KERNEL -# include "rte_ma1_cb-rom.ld" -# else -# include "rte_ma1_cb.ld" -# endif -#endif - -#ifdef CONFIG_RTE_CB_NB85E -# ifdef CONFIG_ROM_KERNEL -# include "rte_nb85e_cb-rom.ld" -# elif defined(CONFIG_RTE_CB_MULTI) -# include "rte_nb85e_cb-multi.ld" -# else -# include "rte_nb85e_cb.ld" -# endif -#endif - -#ifdef CONFIG_RTE_CB_ME2 -# include "rte_me2_cb.ld" -#endif - diff --git a/arch/v850/lib/Makefile b/arch/v850/lib/Makefile deleted file mode 100644 index 1c78b728a1178aa54d1e6dc91c4b082f541e420c..0000000000000000000000000000000000000000 --- a/arch/v850/lib/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# -# arch/v850/lib/Makefile -# - -lib-y = ashrdi3.o ashldi3.o lshrdi3.o muldi3.o negdi2.o \ - checksum.o memcpy.o memset.o diff --git a/arch/v850/lib/ashldi3.c b/arch/v850/lib/ashldi3.c deleted file mode 100644 index 9e792d53f0e4f2288f97004ad91db1b9bbf676fb..0000000000000000000000000000000000000000 --- a/arch/v850/lib/ashldi3.c +++ /dev/null @@ -1,62 +0,0 @@ -/* ashldi3.c extracted from gcc-2.95.2/libgcc2.c which is: */ -/* Copyright (C) 1989, 92-98, 1999 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define BITS_PER_UNIT 8 - -typedef int SItype __attribute__ ((mode (SI))); -typedef unsigned int USItype __attribute__ ((mode (SI))); -typedef int DItype __attribute__ ((mode (DI))); -typedef int word_type __attribute__ ((mode (__word__))); - -struct DIstruct {SItype high, low;}; - -typedef union -{ - struct DIstruct s; - DItype ll; -} DIunion; - -DItype -__ashldi3 (DItype u, word_type b) -{ - DIunion w; - word_type bm; - DIunion uu; - - if (b == 0) - return u; - - uu.ll = u; - - bm = (sizeof (SItype) * BITS_PER_UNIT) - b; - if (bm <= 0) - { - w.s.low = 0; - w.s.high = (USItype)uu.s.low << -bm; - } - else - { - USItype carries = (USItype)uu.s.low >> bm; - w.s.low = (USItype)uu.s.low << b; - w.s.high = ((USItype)uu.s.high << b) | carries; - } - - return w.ll; -} diff --git a/arch/v850/lib/ashrdi3.c b/arch/v850/lib/ashrdi3.c deleted file mode 100644 index 78efb65e315a94bfe5009f45498febd5a6f7ce33..0000000000000000000000000000000000000000 --- a/arch/v850/lib/ashrdi3.c +++ /dev/null @@ -1,63 +0,0 @@ -/* ashrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ -/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define BITS_PER_UNIT 8 - -typedef int SItype __attribute__ ((mode (SI))); -typedef unsigned int USItype __attribute__ ((mode (SI))); -typedef int DItype __attribute__ ((mode (DI))); -typedef int word_type __attribute__ ((mode (__word__))); - -struct DIstruct {SItype high, low;}; - -typedef union -{ - struct DIstruct s; - DItype ll; -} DIunion; - -DItype -__ashrdi3 (DItype u, word_type b) -{ - DIunion w; - word_type bm; - DIunion uu; - - if (b == 0) - return u; - - uu.ll = u; - - bm = (sizeof (SItype) * BITS_PER_UNIT) - b; - if (bm <= 0) - { - /* w.s.high = 1..1 or 0..0 */ - w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1); - w.s.low = uu.s.high >> -bm; - } - else - { - USItype carries = (USItype)uu.s.high << bm; - w.s.high = uu.s.high >> b; - w.s.low = ((USItype)uu.s.low >> b) | carries; - } - - return w.ll; -} diff --git a/arch/v850/lib/checksum.c b/arch/v850/lib/checksum.c deleted file mode 100644 index 042158dfe17a59e6cab17d8ec5fb59634d80e54b..0000000000000000000000000000000000000000 --- a/arch/v850/lib/checksum.c +++ /dev/null @@ -1,155 +0,0 @@ -/* - * INET An implementation of the TCP/IP protocol suite for the LINUX - * operating system. INET is implemented using the BSD Socket - * interface as the means of communication with the user level. - * - * MIPS specific IP/TCP/UDP checksumming routines - * - * Authors: Ralf Baechle, - * Lots of code moved from tcp.c and ip.c; see those files - * for more names. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * $Id: checksum.c,v 1.1 2002/09/28 14:58:40 gerg Exp $ - */ -#include -#include -#include -#include -#include -#include - -static inline unsigned short from32to16 (unsigned long sum) -{ - unsigned int result; - /* - %0 %1 - hsw %1, %0 H L L H - add %1, %0 H L H+L+C H+L - */ - asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum)); - return result >> 16; -} - -static inline unsigned int do_csum(const unsigned char * buff, int len) -{ - int odd, count; - unsigned int result = 0; - - if (len <= 0) - goto out; - odd = 1 & (unsigned long) buff; - if (odd) { - result = be16_to_cpu(*buff); - len--; - buff++; - } - count = len >> 1; /* nr of 16-bit words.. */ - if (count) { - if (2 & (unsigned long) buff) { - result += *(unsigned short *) buff; - count--; - len -= 2; - buff += 2; - } - count >>= 1; /* nr of 32-bit words.. */ - if (count) { - unsigned int carry = 0; - do { - unsigned int w = *(unsigned int *) buff; - count--; - buff += 4; - result += carry; - result += w; - carry = (w > result); - } while (count); - result += carry; - result = (result & 0xffff) + (result >> 16); - } - if (len & 2) { - result += *(unsigned short *) buff; - buff += 2; - } - } - if (len & 1) - result += le16_to_cpu(*buff); - result = from32to16(result); - if (odd) - result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); -out: - return result; -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -__sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - return (__force __sum16)~do_csum(iph,ihl*4); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -__sum16 ip_compute_csum(const void *buff, int len) -{ - return (__force __sum16)~do_csum(buff,len); -} - -/* - * computes a partial checksum, e.g. for TCP/UDP fragments - */ -__wsum csum_partial(const void *buff, int len, __wsum sum) -{ - unsigned int result = do_csum(buff, len); - - /* add in old sum, and carry.. */ - result += (__force u32)sum; - if ((__force u32)sum > result) - result += 1; - return (__force __wsum)result; -} - -EXPORT_SYMBOL(csum_partial); - -/* - * copy while checksumming, otherwise like csum_partial - */ -__wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum) -{ - /* - * It's 2:30 am and I don't feel like doing it real ... - * This is lots slower than the real thing (tm) - */ - sum = csum_partial(src, len, sum); - memcpy(dst, src, len); - - return sum; -} - -/* - * Copy from userspace and compute checksum. If we catch an exception - * then zero the rest of the buffer. - */ -__wsum csum_partial_copy_from_user (const void *src, - void *dst, - int len, __wsum sum, - int *err_ptr) -{ - int missing; - - missing = copy_from_user(dst, src, len); - if (missing) { - memset(dst + len - missing, 0, missing); - *err_ptr = -EFAULT; - } - - return csum_partial(dst, len, sum); -} diff --git a/arch/v850/lib/lshrdi3.c b/arch/v850/lib/lshrdi3.c deleted file mode 100644 index 93b1cb6fdee8990140f2e6b7562eec3871c15130..0000000000000000000000000000000000000000 --- a/arch/v850/lib/lshrdi3.c +++ /dev/null @@ -1,62 +0,0 @@ -/* lshrdi3.c extracted from gcc-2.7.2/libgcc2.c which is: */ -/* Copyright (C) 1989, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define BITS_PER_UNIT 8 - -typedef int SItype __attribute__ ((mode (SI))); -typedef unsigned int USItype __attribute__ ((mode (SI))); -typedef int DItype __attribute__ ((mode (DI))); -typedef int word_type __attribute__ ((mode (__word__))); - -struct DIstruct {SItype high, low;}; - -typedef union -{ - struct DIstruct s; - DItype ll; -} DIunion; - -DItype -__lshrdi3 (DItype u, word_type b) -{ - DIunion w; - word_type bm; - DIunion uu; - - if (b == 0) - return u; - - uu.ll = u; - - bm = (sizeof (SItype) * BITS_PER_UNIT) - b; - if (bm <= 0) - { - w.s.high = 0; - w.s.low = (USItype)uu.s.high >> -bm; - } - else - { - USItype carries = (USItype)uu.s.high << bm; - w.s.high = (USItype)uu.s.high >> b; - w.s.low = ((USItype)uu.s.low >> b) | carries; - } - - return w.ll; -} diff --git a/arch/v850/lib/memcpy.c b/arch/v850/lib/memcpy.c deleted file mode 100644 index 492847b3e61214b0d56034923a7ba866e22645c6..0000000000000000000000000000000000000000 --- a/arch/v850/lib/memcpy.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - * arch/v850/lib/memcpy.c -- Memory copying - * - * Copyright (C) 2001,02 NEC Corporation - * Copyright (C) 2001,02 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include -#include - -#define CHUNK_SIZE 32 /* bytes */ -#define CHUNK_ALIGNED(addr) (((unsigned long)addr & 0x3) == 0) - -/* Note that this macro uses 8 call-clobbered registers (not including - R1), which are few enough so that the following functions don't need - to spill anything to memory. It also uses R1, which is nominally - reserved for the assembler, but here it should be OK. */ -#define COPY_CHUNK(src, dst) \ - asm ("mov %0, ep;" \ - "sld.w 0[ep], r1; sld.w 4[ep], r12;" \ - "sld.w 8[ep], r13; sld.w 12[ep], r14;" \ - "sld.w 16[ep], r15; sld.w 20[ep], r17;" \ - "sld.w 24[ep], r18; sld.w 28[ep], r19;" \ - "mov %1, ep;" \ - "sst.w r1, 0[ep]; sst.w r12, 4[ep];" \ - "sst.w r13, 8[ep]; sst.w r14, 12[ep];" \ - "sst.w r15, 16[ep]; sst.w r17, 20[ep];" \ - "sst.w r18, 24[ep]; sst.w r19, 28[ep]" \ - :: "r" (src), "r" (dst) \ - : "r1", "r12", "r13", "r14", "r15", \ - "r17", "r18", "r19", "ep", "memory"); - -void *memcpy (void *dst, const void *src, __kernel_size_t size) -{ - char *_dst = dst; - const char *_src = src; - - if (size >= CHUNK_SIZE && CHUNK_ALIGNED(_src) && CHUNK_ALIGNED(_dst)) { - /* Copy large blocks efficiently. */ - unsigned count; - for (count = size / CHUNK_SIZE; count; count--) { - COPY_CHUNK (_src, _dst); - _src += CHUNK_SIZE; - _dst += CHUNK_SIZE; - } - size %= CHUNK_SIZE; - } - - if (size > 0) - do - *_dst++ = *_src++; - while (--size); - - return dst; -} - -void *memmove (void *dst, const void *src, __kernel_size_t size) -{ - if ((unsigned long)dst < (unsigned long)src - || (unsigned long)src + size < (unsigned long)dst) - return memcpy (dst, src, size); - else { - char *_dst = dst + size; - const char *_src = src + size; - - if (size >= CHUNK_SIZE - && CHUNK_ALIGNED (_src) && CHUNK_ALIGNED (_dst)) - { - /* Copy large blocks efficiently. */ - unsigned count; - for (count = size / CHUNK_SIZE; count; count--) { - _src -= CHUNK_SIZE; - _dst -= CHUNK_SIZE; - COPY_CHUNK (_src, _dst); - } - size %= CHUNK_SIZE; - } - - if (size > 0) - do - *--_dst = *--_src; - while (--size); - - return _dst; - } -} diff --git a/arch/v850/lib/memset.c b/arch/v850/lib/memset.c deleted file mode 100644 index d1b2ad821b15a9ec335d90679d5ee35d7927fab0..0000000000000000000000000000000000000000 --- a/arch/v850/lib/memset.c +++ /dev/null @@ -1,68 +0,0 @@ -/* - * arch/v850/lib/memset.c -- Memory initialization - * - * Copyright (C) 2001,02,04 NEC Corporation - * Copyright (C) 2001,02,04 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -#include - -void *memset (void *dst, int val, __kernel_size_t count) -{ - if (count) { - register unsigned loop; - register void *ptr asm ("ep") = dst; - - /* replicate VAL into a long. */ - val &= 0xff; - val |= val << 8; - val |= val << 16; - - /* copy initial unaligned bytes. */ - if ((long)ptr & 1) { - *(char *)ptr = val; - ptr = (void *)((char *)ptr + 1); - count--; - } - if (count > 2 && ((long)ptr & 2)) { - *(short *)ptr = val; - ptr = (void *)((short *)ptr + 1); - count -= 2; - } - - /* 32-byte copying loop. */ - for (loop = count / 32; loop; loop--) { - asm ("sst.w %0, 0[ep]; sst.w %0, 4[ep];" - "sst.w %0, 8[ep]; sst.w %0, 12[ep];" - "sst.w %0, 16[ep]; sst.w %0, 20[ep];" - "sst.w %0, 24[ep]; sst.w %0, 28[ep]" - :: "r" (val) : "memory"); - ptr += 32; - } - count %= 32; - - /* long copying loop. */ - for (loop = count / 4; loop; loop--) { - *(long *)ptr = val; - ptr = (void *)((long *)ptr + 1); - } - count %= 4; - - /* finish up with any trailing bytes. */ - if (count & 2) { - *(short *)ptr = val; - ptr = (void *)((short *)ptr + 1); - } - if (count & 1) { - *(char *)ptr = val; - } - } - - return dst; -} diff --git a/arch/v850/lib/muldi3.c b/arch/v850/lib/muldi3.c deleted file mode 100644 index 277ca25c82c8dc096a63800a8aca9cc1f7c71d72..0000000000000000000000000000000000000000 --- a/arch/v850/lib/muldi3.c +++ /dev/null @@ -1,61 +0,0 @@ -/* muldi3.c extracted from gcc-2.7.2.3/libgcc2.c and - gcc-2.7.2.3/longlong.h which is: */ -/* Copyright (C) 1989, 1992, 1993, 1994, 1995, 2001 Free Software Foundation, Inc. - -This file is part of GNU CC. - -GNU CC is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GNU CC is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GNU CC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -#define umul_ppmm(w1, w0, u, v) \ - __asm__ ("mulu %3, %0, %1" \ - : "=r" ((USItype)(w0)), \ - "=r" ((USItype)(w1)) \ - : "%0" ((USItype)(u)), \ - "r" ((USItype)(v))) - -#define __umulsidi3(u, v) \ - ({DIunion __w; \ - umul_ppmm (__w.s.high, __w.s.low, u, v); \ - __w.ll; }) - -typedef int SItype __attribute__ ((mode (SI))); -typedef unsigned int USItype __attribute__ ((mode (SI))); -typedef int DItype __attribute__ ((mode (DI))); -typedef int word_type __attribute__ ((mode (__word__))); - -struct DIstruct {SItype high, low;}; - -typedef union -{ - struct DIstruct s; - DItype ll; -} DIunion; - -DItype -__muldi3 (DItype u, DItype v) -{ - DIunion w; - DIunion uu, vv; - - uu.ll = u, - vv.ll = v; - - w.ll = __umulsidi3 (uu.s.low, vv.s.low); - w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high - + (USItype) uu.s.high * (USItype) vv.s.low); - - return w.ll; -} diff --git a/arch/v850/lib/negdi2.c b/arch/v850/lib/negdi2.c deleted file mode 100644 index 571e04fc619a6b75379bb4702aed8c104ffece69..0000000000000000000000000000000000000000 --- a/arch/v850/lib/negdi2.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * arch/v850/lib/negdi2.c -- 64-bit negation - * - * Copyright (C) 2001 NEC Corporation - * Copyright (C) 2001 Miles Bader - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file COPYING in the main directory of this - * archive for more details. - * - * Written by Miles Bader - */ - -typedef int DItype __attribute__ ((mode (DI))); - -DItype __negdi2 (DItype x) -{ - __asm__ __volatile__ - ("not r6, r10;" - "add 1, r10;" - "setf c, r6;" - "not r7, r11;" - "add r6, r11" - ::: "r6", "r7", "r10", "r11"); -} diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index bf07b6f50fa178268f9d81388a615a7a8abff32b..608a12ff483ac2a9066f39560d0fdab336ebf449 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -21,10 +21,17 @@ config X86 select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE + select HAVE_IOREMAP_PROT + select HAVE_GET_USER_PAGES_FAST select HAVE_KPROBES + select ARCH_WANT_OPTIONAL_GPIOLIB select HAVE_KRETPROBES + select HAVE_DYNAMIC_FTRACE + select HAVE_FTRACE select HAVE_KVM if ((X86_32 && !X86_VOYAGER && !X86_VISWS && !X86_NUMAQ) || X86_64) select HAVE_ARCH_KGDB if !X86_VOYAGER + select HAVE_GENERIC_DMA_COHERENT if X86_32 + select HAVE_EFFICIENT_UNALIGNED_ACCESS config ARCH_DEFCONFIG string @@ -121,7 +128,7 @@ config ARCH_HAS_CACHE_LINE_SIZE def_bool y config HAVE_SETUP_PER_CPU_AREA - def_bool X86_64 || (X86_SMP && !X86_VOYAGER) + def_bool X86_64_SMP || (X86_SMP && !X86_VOYAGER) config HAVE_CPUMASK_OF_CPU_MAP def_bool X86_64_SMP @@ -168,6 +175,7 @@ config GENERIC_PENDING_IRQ config X86_SMP bool depends on SMP && ((X86_32 && !X86_VOYAGER) || X86_64) + select USE_GENERIC_SMP_HELPERS default y config X86_32_SMP @@ -181,12 +189,12 @@ config X86_64_SMP config X86_HT bool depends on SMP - depends on (X86_32 && !(X86_VISWS || X86_VOYAGER)) || X86_64 + depends on (X86_32 && !X86_VOYAGER) || X86_64 default y config X86_BIOS_REBOOT bool - depends on !X86_VISWS && !X86_VOYAGER + depends on !X86_VOYAGER default y config X86_TRAMPOLINE @@ -230,6 +238,26 @@ config SMP If you don't know what to do here, say N. +config X86_FIND_SMP_CONFIG + def_bool y + depends on X86_MPPARSE || X86_VOYAGER + +if ACPI +config X86_MPPARSE + def_bool y + bool "Enable MPS table" + depends on X86_LOCAL_APIC + help + For old smp systems that do not have proper acpi support. Newer systems + (esp with 64bit cpus) with acpi support, MADT and DSDT will override it +endif + +if !ACPI +config X86_MPPARSE + def_bool y + depends on X86_LOCAL_APIC +endif + choice prompt "Subarchitecture Type" default X86_PC @@ -251,7 +279,7 @@ config X86_ELAN config X86_VOYAGER bool "Voyager (NCR)" - depends on X86_32 && (SMP || BROKEN) + depends on X86_32 && (SMP || BROKEN) && !PCI help Voyager is an MCA-based 32-way capable SMP architecture proprietary to NCR Corp. Machine classes 345x/35xx/4100/51xx are Voyager-based. @@ -261,16 +289,27 @@ config X86_VOYAGER If you do not specifically know you have a Voyager based machine, say N here, otherwise the kernel you build will not be bootable. +config X86_GENERICARCH + bool "Generic architecture" + depends on X86_32 + help + This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default + subarchitectures. It is intended for a generic binary kernel. + if you select them all, kernel will probe it one by one. and will + fallback to default. + +if X86_GENERICARCH + config X86_NUMAQ bool "NUMAQ (IBM/Sequent)" - depends on SMP && X86_32 + depends on SMP && X86_32 && PCI && X86_MPPARSE select NUMA help - This option is used for getting Linux to run on a (IBM/Sequent) NUMA - multiquad box. This changes the way that processors are bootstrapped, - and uses Clustered Logical APIC addressing mode instead of Flat Logical. - You will need a new lynxer.elf file to flash your firmware with - send - email to . + This option is used for getting Linux to run on a NUMAQ (IBM/Sequent) + NUMA multiquad box. This changes the way that processors are + bootstrapped, and uses Clustered Logical APIC addressing mode instead + of Flat Logical. You will need a new lynxer.elf file to flash your + firmware with - send email to . config X86_SUMMIT bool "Summit/EXA (IBM x440)" @@ -279,72 +318,55 @@ config X86_SUMMIT This option is needed for IBM systems that use the Summit/EXA chipset. In particular, it is needed for the x440. - If you don't have one of these computers, you should say N here. - If you want to build a NUMA kernel, you must select ACPI. +config X86_ES7000 + bool "Support for Unisys ES7000 IA32 series" + depends on X86_32 && SMP + help + Support for Unisys ES7000 systems. Say 'Y' here if this kernel is + supposed to run on an IA32-based Unisys ES7000 system. config X86_BIGSMP - bool "Support for other sub-arch SMP systems with more than 8 CPUs" + bool "Support for big SMP systems with more than 8 CPUs" depends on X86_32 && SMP help This option is needed for the systems that have more than 8 CPUs and if the system is not of any sub-arch type above. - If you don't have such a system, you should say N here. +endif + +config X86_VSMP + bool "Support for ScaleMP vSMP" + select PARAVIRT + depends on X86_64 && PCI + help + Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is + supposed to run on these EM64T-based machines. Only choose this option + if you have one of these machines. + +endchoice config X86_VISWS bool "SGI 320/540 (Visual Workstation)" - depends on X86_32 + depends on X86_32 && PCI && !X86_VOYAGER && X86_MPPARSE && PCI_GODIRECT help The SGI Visual Workstation series is an IA32-based workstation based on SGI systems chips with some legacy PC hardware attached. Say Y here to create a kernel to run on the SGI 320 or 540. - A kernel compiled for the Visual Workstation will not run on PCs - and vice versa. See for details. - -config X86_GENERICARCH - bool "Generic architecture (Summit, bigsmp, ES7000, default)" - depends on X86_32 - help - This option compiles in the Summit, bigsmp, ES7000, default subarchitectures. - It is intended for a generic binary kernel. - If you want a NUMA kernel, select ACPI. We need SRAT for NUMA. - -config X86_ES7000 - bool "Support for Unisys ES7000 IA32 series" - depends on X86_32 && SMP - help - Support for Unisys ES7000 systems. Say 'Y' here if this kernel is - supposed to run on an IA32-based Unisys ES7000 system. - Only choose this option if you have such a system, otherwise you - should say N here. + A kernel compiled for the Visual Workstation will run on general + PCs as well. See for details. config X86_RDC321X bool "RDC R-321x SoC" depends on X86_32 select M486 select X86_REBOOTFIXUPS - select GENERIC_GPIO - select LEDS_CLASS - select LEDS_GPIO - select NEW_LEDS help This option is needed for RDC R-321x system-on-chip, also known as R-8610-(G). If you don't have one of these chips, you should say N here. -config X86_VSMP - bool "Support for ScaleMP vSMP" - select PARAVIRT - depends on X86_64 - help - Support for ScaleMP vSMP systems. Say 'Y' here if this kernel is - supposed to run on these EM64T-based machines. Only choose this option - if you have one of these machines. - -endchoice - config SCHED_NO_NO_OMIT_FRAME_POINTER def_bool y prompt "Single-depth WCHAN output" @@ -373,7 +395,7 @@ config VMI bool "VMI Guest support" select PARAVIRT depends on X86_32 - depends on !(X86_VISWS || X86_VOYAGER) + depends on !X86_VOYAGER help VMI provides a paravirtualized interface to the VMware ESX server (it could be used by other hypervisors in theory too, but is not @@ -384,7 +406,7 @@ config KVM_CLOCK bool "KVM paravirtualized clock" select PARAVIRT select PARAVIRT_CLOCK - depends on !(X86_VISWS || X86_VOYAGER) + depends on !X86_VOYAGER help Turning on this option will allow you to run a paravirtualized clock when running over the KVM hypervisor. Instead of relying on a PIT @@ -395,7 +417,7 @@ config KVM_CLOCK config KVM_GUEST bool "KVM Guest support" select PARAVIRT - depends on !(X86_VISWS || X86_VOYAGER) + depends on !X86_VOYAGER help This option enables various optimizations for running under the KVM hypervisor. @@ -404,7 +426,7 @@ source "arch/x86/lguest/Kconfig" config PARAVIRT bool "Enable paravirtualization code" - depends on !(X86_VISWS || X86_VOYAGER) + depends on !X86_VOYAGER help This changes the kernel so it can modify itself when it is run under a hypervisor, potentially improving performance significantly @@ -417,51 +439,31 @@ config PARAVIRT_CLOCK endif -config MEMTEST_BOOTPARAM - bool "Memtest boot parameter" - depends on X86_64 - default y - help - This option adds a kernel parameter 'memtest', which allows memtest - to be disabled at boot. If this option is selected, memtest - functionality can be disabled with memtest=0 on the kernel - command line. The purpose of this option is to allow a single - kernel image to be distributed with memtest built in, but not - necessarily enabled. - - If you are unsure how to answer this question, answer Y. +config PARAVIRT_DEBUG + bool "paravirt-ops debugging" + depends on PARAVIRT && DEBUG_KERNEL + help + Enable to debug paravirt_ops internals. Specifically, BUG if + a paravirt_op is missing when it is called. -config MEMTEST_BOOTPARAM_VALUE - int "Memtest boot parameter default value (0-4)" - depends on MEMTEST_BOOTPARAM - range 0 4 - default 0 +config MEMTEST + bool "Memtest" help - This option sets the default value for the kernel parameter - 'memtest', which allows memtest to be disabled at boot. If this - option is set to 0 (zero), the memtest kernel parameter will - default to 0, disabling memtest at bootup. If this option is - set to 4, the memtest kernel parameter will default to 4, - enabling memtest at bootup, and use that as pattern number. - - If you are unsure how to answer this question, answer 0. - -config ACPI_SRAT - def_bool y - depends on X86_32 && ACPI && NUMA && (X86_SUMMIT || X86_GENERICARCH) - select ACPI_NUMA - -config HAVE_ARCH_PARSE_SRAT - def_bool y - depends on ACPI_SRAT + This option adds a kernel parameter 'memtest', which allows memtest + to be set. + memtest=0, mean disabled; -- default + memtest=1, mean do 1 test pattern; + ... + memtest=4, mean do 4 test patterns. + If you are unsure how to answer this question, answer N. config X86_SUMMIT_NUMA def_bool y - depends on X86_32 && NUMA && (X86_SUMMIT || X86_GENERICARCH) + depends on X86_32 && NUMA && X86_GENERICARCH config X86_CYCLONE_TIMER def_bool y - depends on X86_32 && X86_SUMMIT || X86_GENERICARCH + depends on X86_GENERICARCH config ES7000_CLUSTERED_APIC def_bool y @@ -549,6 +551,21 @@ config CALGARY_IOMMU_ENABLED_BY_DEFAULT Calgary anyway, pass 'iommu=calgary' on the kernel command line. If unsure, say Y. +config AMD_IOMMU + bool "AMD IOMMU support" + select SWIOTLB + depends on X86_64 && PCI && ACPI + help + With this option you can enable support for AMD IOMMU hardware in + your system. An IOMMU is a hardware component which provides + remapping of DMA memory accesses from devices. With an AMD IOMMU you + can isolate the the DMA memory of different devices and protect the + system from misbehaving device drivers or hardware. + + You can find out if your system has an AMD IOMMU if you look into + your BIOS for an option to enable it or if you have an IVRS ACPI + table. + # need this always selected by IOMMU for the VIA workaround config SWIOTLB bool @@ -560,21 +577,36 @@ config SWIOTLB 3 GB of memory. If unsure, say Y. config IOMMU_HELPER - def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB) + def_bool (CALGARY_IOMMU || GART_IOMMU || SWIOTLB || AMD_IOMMU) +config MAXSMP + bool "Configure Maximum number of SMP Processors and NUMA Nodes" + depends on X86_64 && SMP + default n + help + Configure maximum number of CPUS and NUMA Nodes for this architecture. + If unsure, say N. + +if MAXSMP +config NR_CPUS + int + default "4096" +endif +if !MAXSMP config NR_CPUS - int "Maximum number of CPUs (2-255)" - range 2 255 + int "Maximum number of CPUs (2-4096)" + range 2 4096 depends on SMP default "32" if X86_NUMAQ || X86_SUMMIT || X86_BIGSMP || X86_ES7000 default "8" help This allows you to specify the maximum number of CPUs which this - kernel will support. The maximum supported value is 255 and the + kernel will support. The maximum supported value is 4096 and the minimum value which makes sense is 2. This is purely to save memory - each supported CPU adds approximately eight kilobytes to the kernel image. +endif config SCHED_SMT bool "SMT (Hyperthreading) scheduler support" @@ -598,7 +630,7 @@ source "kernel/Kconfig.preempt" config X86_UP_APIC bool "Local APIC support on uniprocessors" - depends on X86_32 && !SMP && !(X86_VISWS || X86_VOYAGER || X86_GENERICARCH) + depends on X86_32 && !SMP && !(X86_VOYAGER || X86_GENERICARCH) help A local APIC (Advanced Programmable Interrupt Controller) is an integrated interrupt controller in the CPU. If you have a single-CPU @@ -623,11 +655,11 @@ config X86_UP_IOAPIC config X86_LOCAL_APIC def_bool y - depends on X86_64 || (X86_32 && (X86_UP_APIC || ((X86_VISWS || SMP) && !X86_VOYAGER) || X86_GENERICARCH)) + depends on X86_64 || (X86_32 && (X86_UP_APIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) config X86_IO_APIC def_bool y - depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !(X86_VISWS || X86_VOYAGER)) || X86_GENERICARCH)) + depends on X86_64 || (X86_32 && (X86_UP_IOAPIC || (SMP && !X86_VOYAGER) || X86_GENERICARCH)) config X86_VISWS_APIC def_bool y @@ -681,7 +713,7 @@ config X86_MCE_NONFATAL config X86_MCE_P4THERMAL bool "check for P4 thermal throttling interrupt." - depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) && !X86_VISWS + depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) help Enabling this feature will cause a message to be printed when the P4 enters thermal throttling. @@ -911,9 +943,9 @@ config X86_PAE config NUMA bool "Numa Memory Allocation and Scheduler Support (EXPERIMENTAL)" depends on SMP - depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || (X86_SUMMIT || X86_GENERICARCH) && ACPI) && EXPERIMENTAL) + depends on X86_64 || (X86_32 && HIGHMEM64G && (X86_NUMAQ || X86_BIGSMP || X86_SUMMIT && ACPI) && EXPERIMENTAL) default n if X86_PC - default y if (X86_NUMAQ || X86_SUMMIT) + default y if (X86_NUMAQ || X86_SUMMIT || X86_BIGSMP) help Enable NUMA (Non Uniform Memory Access) support. The kernel will try to allocate memory used by a CPU on the @@ -965,13 +997,25 @@ config NUMA_EMU into virtual nodes when booted with "numa=fake=N", where N is the number of nodes. This is only useful for debugging. +if MAXSMP + +config NODES_SHIFT + int + default "9" +endif + +if !MAXSMP config NODES_SHIFT - int "Max num nodes shift(1-9)" - range 1 9 if X86_64 + int "Maximum NUMA Nodes (as a power of 2)" + range 1 9 if X86_64 default "6" if X86_64 default "4" if X86_NUMAQ default "3" depends on NEED_MULTIPLE_NODES + help + Specify the maximum number of NUMA Nodes available on the target + system. Increases memory reserved to accomodate various tables. +endif config HAVE_ARCH_BOOTMEM_NODE def_bool y @@ -1090,6 +1134,37 @@ config MTRR See for more information. +config MTRR_SANITIZER + bool + prompt "MTRR cleanup support" + depends on MTRR + help + Convert MTRR layout from continuous to discrete, so X drivers can + add writeback entries. + + Can be disabled with disable_mtrr_cleanup on the kernel command line. + The largest mtrr entry size for a continous block can be set with + mtrr_chunk_size. + + If unsure, say N. + +config MTRR_SANITIZER_ENABLE_DEFAULT + int "MTRR cleanup enable value (0-1)" + range 0 1 + default "0" + depends on MTRR_SANITIZER + help + Enable mtrr cleanup default value + +config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT + int "MTRR cleanup spare reg num (0-7)" + range 0 7 + default "1" + depends on MTRR_SANITIZER + help + mtrr cleanup spare entries default, it can be changed via + mtrr_spare_reg_nr=N on the kernel command line. + config X86_PAT bool prompt "x86 PAT support" @@ -1190,7 +1265,6 @@ config KEXEC config CRASH_DUMP bool "kernel crash dumps (EXPERIMENTAL)" - depends on EXPERIMENTAL depends on X86_64 || (X86_32 && HIGHMEM) help Generate crash dump after being started by kexec. @@ -1203,6 +1277,14 @@ config CRASH_DUMP (CONFIG_RELOCATABLE=y). For more details see Documentation/kdump/kdump.txt +config KEXEC_JUMP + bool "kexec jump (EXPERIMENTAL)" + depends on EXPERIMENTAL + depends on KEXEC && HIBERNATION && X86_32 + help + Jump between original kernel and kexeced kernel and invoke + code in physical address mode via KEXEC + config PHYSICAL_START hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP) default "0x1000000" if X86_NUMAQ @@ -1339,7 +1421,7 @@ config X86_APM_BOOT menuconfig APM tristate "APM (Advanced Power Management) BIOS support" - depends on X86_32 && PM_SLEEP && !X86_VISWS + depends on X86_32 && PM_SLEEP ---help--- APM is a BIOS specification for saving power using several different techniques. This is mostly useful for battery powered laptops with @@ -1475,8 +1557,7 @@ endmenu menu "Bus options (PCI etc.)" config PCI - bool "PCI support" if !X86_VISWS && !X86_VSMP - depends on !X86_VOYAGER + bool "PCI support" default y select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) help @@ -1487,7 +1568,7 @@ config PCI choice prompt "PCI access mode" - depends on X86_32 && PCI && !X86_VISWS + depends on X86_32 && PCI default PCI_GOANY ---help--- On PCI systems, the BIOS can be used to detect the PCI devices and @@ -1524,12 +1605,12 @@ endchoice config PCI_BIOS def_bool y - depends on X86_32 && !X86_VISWS && PCI && (PCI_GOBIOS || PCI_GOANY) + depends on X86_32 && PCI && (PCI_GOBIOS || PCI_GOANY) # x86-64 doesn't support PCI BIOS access from long mode so always go direct. config PCI_DIRECT def_bool y - depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC) || X86_VISWS) + depends on PCI && (X86_64 || (PCI_GODIRECT || PCI_GOANY || PCI_GOOLPC)) config PCI_MMCONFIG def_bool y @@ -1577,6 +1658,14 @@ config DMAR_FLOPPY_WA workaround will setup a 1:1 mapping for the first 16M to make floppy (an ISA device) work. +config INTR_REMAP + bool "Support for Interrupt Remapping (EXPERIMENTAL)" + depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL + help + Supports Interrupt remapping for IO-APIC and MSI devices. + To use x2apic mode in the CPU's which support x2APIC enhancements or + to support platforms with CPU's having > 8 bit APIC ID, say Y. + source "drivers/pci/pcie/Kconfig" source "drivers/pci/Kconfig" @@ -1589,7 +1678,7 @@ if X86_32 config ISA bool "ISA support" - depends on !(X86_VOYAGER || X86_VISWS) + depends on !X86_VOYAGER help Find out whether you have ISA slots on your motherboard. ISA is the name of a bus system, i.e. the way the CPU talks to the other stuff @@ -1616,7 +1705,7 @@ config EISA source "drivers/eisa/Kconfig" config MCA - bool "MCA support" if !(X86_VISWS || X86_VOYAGER) + bool "MCA support" if !X86_VOYAGER default y if X86_VOYAGER help MicroChannel Architecture is found in some IBM PS/2 machines and diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu index 2ad6301849a1ba68ec78c9ea3c5f39232484c645..2c518fbc52ece13221e587ee71f11c81a4d5cec7 100644 --- a/arch/x86/Kconfig.cpu +++ b/arch/x86/Kconfig.cpu @@ -344,7 +344,7 @@ config X86_F00F_BUG config X86_WP_WORKS_OK def_bool y - depends on X86_32 && !M386 + depends on !M386 config X86_INVLPG def_bool y @@ -362,10 +362,6 @@ config X86_ALIGNMENT_16 def_bool y depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1 -config X86_GOOD_APIC - def_bool y - depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7 || X86_64 - config X86_INTEL_USERCOPY def_bool y depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 @@ -399,6 +395,10 @@ config X86_TSC def_bool y depends on ((MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64 +config X86_CMPXCHG64 + def_bool y + depends on X86_PAE || X86_64 + # this should be set for all -march=.. options where the compiler # generates cmov. config X86_CMOV @@ -414,4 +414,4 @@ config X86_MINIMUM_CPU_FAMILY config X86_DEBUGCTLMSR def_bool y - depends on !(M586MMX || M586TSC || M586 || M486 || M386) + depends on !(MK6 || MWINCHIPC6 || MWINCHIP2 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug index 18363374d51a9a57b39b6fb8d3f87a054b4b4aa5..092f019e033a7a42d65b9d9297c02435c45347d0 100644 --- a/arch/x86/Kconfig.debug +++ b/arch/x86/Kconfig.debug @@ -5,13 +5,15 @@ config TRACE_IRQFLAGS_SUPPORT source "lib/Kconfig.debug" -config NONPROMISC_DEVMEM +config STRICT_DEVMEM bool "Filter access to /dev/mem" help - If this option is left off, you allow userspace access to all + If this option is disabled, you allow userspace (root) access to all of memory, including kernel and userspace memory. Accidental access to this is obviously disastrous, but specific access can - be used by people debugging the kernel. + be used by people debugging the kernel. Note that with PAT support + enabled, even in this case there are restrictions on /dev/mem + use due to the cache aliasing requirements. If this option is switched on, the /dev/mem file only allows userspace access to PCI space and the BIOS code and data regions. @@ -20,6 +22,14 @@ config NONPROMISC_DEVMEM If in doubt, say Y. +config X86_VERBOSE_BOOTUP + bool "Enable verbose x86 bootup info messages" + default y + help + Enables the informational output from the decompression stage + (e.g. bzImage) of the boot. If you disable this you will still + see errors. Disable this if you want silent bootup. + config EARLY_PRINTK bool "Early printk" if EMBEDDED default y @@ -60,7 +70,7 @@ config DEBUG_PAGEALLOC config DEBUG_PER_CPU_MAPS bool "Debug access to per_cpu maps" depends on DEBUG_KERNEL - depends on X86_64_SMP + depends on X86_SMP default n help Say Y to verify that the per_cpu map being accessed has @@ -129,15 +139,6 @@ config 4KSTACKS on the VM subsystem for higher order allocations. This option will also use IRQ stacks to compensate for the reduced stackspace. -config X86_FIND_SMP_CONFIG - def_bool y - depends on X86_LOCAL_APIC || X86_VOYAGER - depends on X86_32 - -config X86_MPPARSE - def_bool y - depends on (X86_32 && (X86_LOCAL_APIC && !X86_VISWS)) || X86_64 - config DOUBLEFAULT default y bool "Enable doublefault exception handler" if EMBEDDED @@ -172,6 +173,33 @@ config IOMMU_LEAK Add a simple leak tracer to the IOMMU code. This is useful when you are debugging a buggy device driver that leaks IOMMU mappings. +config MMIOTRACE_HOOKS + bool + +config MMIOTRACE + bool "Memory mapped IO tracing" + depends on DEBUG_KERNEL && PCI + select TRACING + select MMIOTRACE_HOOKS + help + Mmiotrace traces Memory Mapped I/O access and is meant for + debugging and reverse engineering. It is called from the ioremap + implementation and works via page faults. Tracing is disabled by + default and can be enabled at run-time. + + See Documentation/tracers/mmiotrace.txt. + If you are not helping to develop drivers, say N. + +config MMIOTRACE_TEST + tristate "Test module for mmiotrace" + depends on MMIOTRACE && m + help + This is a dumb module for testing mmiotrace. It is very dangerous + as it will write garbage to IO memory starting at a given address. + However, it should be safe to use on e.g. unused portion of VRAM. + + Say N, unless you absolutely know what you are doing. + # # IO delay types: # @@ -261,7 +289,6 @@ config CPA_DEBUG config OPTIMIZE_INLINING bool "Allow gcc to uninline functions marked 'inline'" - depends on BROKEN help This option determines if the kernel forces gcc to inline the functions developers have marked 'inline'. Doing so takes away freedom from gcc to @@ -272,5 +299,7 @@ config OPTIMIZE_INLINING become the default in the future, until then this option is there to test gcc for this. + If unsure, say N. + endmenu diff --git a/arch/x86/Makefile b/arch/x86/Makefile index 3cff3c894cf3c0cd80161d1f61a959cbb80f7106..f5631da585b69ac1722891bc0bee1e63a1ec652c 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile @@ -113,38 +113,11 @@ mcore-y := arch/x86/mach-default/ mflags-$(CONFIG_X86_VOYAGER) := -Iinclude/asm-x86/mach-voyager mcore-$(CONFIG_X86_VOYAGER) := arch/x86/mach-voyager/ -# VISWS subarch support -mflags-$(CONFIG_X86_VISWS) := -Iinclude/asm-x86/mach-visws -mcore-$(CONFIG_X86_VISWS) := arch/x86/mach-visws/ - -# NUMAQ subarch support -mflags-$(CONFIG_X86_NUMAQ) := -Iinclude/asm-x86/mach-numaq -mcore-$(CONFIG_X86_NUMAQ) := arch/x86/mach-default/ - -# BIGSMP subarch support -mflags-$(CONFIG_X86_BIGSMP) := -Iinclude/asm-x86/mach-bigsmp -mcore-$(CONFIG_X86_BIGSMP) := arch/x86/mach-default/ - -#Summit subarch support -mflags-$(CONFIG_X86_SUMMIT) := -Iinclude/asm-x86/mach-summit -mcore-$(CONFIG_X86_SUMMIT) := arch/x86/mach-default/ - # generic subarchitecture mflags-$(CONFIG_X86_GENERICARCH):= -Iinclude/asm-x86/mach-generic fcore-$(CONFIG_X86_GENERICARCH) += arch/x86/mach-generic/ mcore-$(CONFIG_X86_GENERICARCH) := arch/x86/mach-default/ - -# ES7000 subarch support -mflags-$(CONFIG_X86_ES7000) := -Iinclude/asm-x86/mach-es7000 -fcore-$(CONFIG_X86_ES7000) := arch/x86/mach-es7000/ -mcore-$(CONFIG_X86_ES7000) := arch/x86/mach-default/ - -# RDC R-321x subarch support -mflags-$(CONFIG_X86_RDC321X) := -Iinclude/asm-x86/mach-rdc321x -mcore-$(CONFIG_X86_RDC321X) := arch/x86/mach-default/ -core-$(CONFIG_X86_RDC321X) += arch/x86/mach-rdc321x/ - # default subarch .h files mflags-y += -Iinclude/asm-x86/mach-default @@ -160,6 +133,7 @@ KBUILD_AFLAGS += $(mflags-y) head-y := arch/x86/kernel/head_$(BITS).o head-y += arch/x86/kernel/head$(BITS).o +head-y += arch/x86/kernel/head.o head-y += arch/x86/kernel/init_task.o libs-y += arch/x86/lib/ @@ -210,12 +184,12 @@ all: bzImage # KBUILD_IMAGE specify target image being built KBUILD_IMAGE := $(boot)/bzImage -zImage zlilo zdisk: KBUILD_IMAGE := arch/x86/boot/zImage +zImage zlilo zdisk: KBUILD_IMAGE := $(boot)/zImage zImage bzImage: vmlinux $(Q)$(MAKE) $(build)=$(boot) $(KBUILD_IMAGE) $(Q)mkdir -p $(objtree)/arch/$(UTS_MACHINE)/boot - $(Q)ln -fsn ../../x86/boot/bzImage $(objtree)/arch/$(UTS_MACHINE)/boot/bzImage + $(Q)ln -fsn ../../x86/boot/bzImage $(objtree)/arch/$(UTS_MACHINE)/boot/$@ compressed: zImage diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c index e01aafd03bdec42086147d4cb00e18a342a237eb..4063d630deff23cf2974e9839bc714de42b01f4c 100644 --- a/arch/x86/boot/a20.c +++ b/arch/x86/boot/a20.c @@ -1,7 +1,7 @@ /* -*- linux-c -*- ------------------------------------------------------- * * * Copyright (C) 1991, 1992 Linus Torvalds - * Copyright 2007 rPath, Inc. - All Rights Reserved + * Copyright 2007-2008 rPath, Inc. - All Rights Reserved * * This file is part of the Linux kernel, and is made available under * the terms of the GNU General Public License version 2. @@ -95,6 +95,9 @@ static void enable_a20_kbc(void) outb(0xdf, 0x60); /* A20 on */ empty_8042(); + + outb(0xff, 0x64); /* Null command, but UHCI wants it */ + empty_8042(); } static void enable_a20_fast(void) diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S index d8819efac81dc4488ff59163172448710311cce0..1d5dff4123e15a3cebf9c59f6edaa9575c58dc70 100644 --- a/arch/x86/boot/compressed/head_64.S +++ b/arch/x86/boot/compressed/head_64.S @@ -30,6 +30,7 @@ #include #include #include +#include #include .section ".text.head" @@ -109,7 +110,7 @@ startup_32: /* Enable PAE mode */ xorl %eax, %eax - orl $(1 << 5), %eax + orl $(X86_CR4_PAE), %eax movl %eax, %cr4 /* @@ -170,7 +171,7 @@ startup_32: pushl %eax /* Enter paged protected Mode, activating Long Mode */ - movl $0x80000001, %eax /* Enable Paging and Protected mode */ + movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */ movl %eax, %cr0 /* Jump from 32bit compatibility mode into 64bit mode. */ diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c index 90456cee47c337b226a8874582440377c428a91e..aaf5a2131efceca569d6de7f88556ad13a661b2c 100644 --- a/arch/x86/boot/compressed/misc.c +++ b/arch/x86/boot/compressed/misc.c @@ -16,7 +16,7 @@ */ #undef CONFIG_PARAVIRT #ifdef CONFIG_X86_32 -#define _ASM_DESC_H_ 1 +#define ASM_X86__DESC_H 1 #endif #ifdef CONFIG_X86_64 @@ -30,6 +30,7 @@ #include #include #include +#include /* WARNING!! * This code is compiled with -fPIC and it is relocated dynamically @@ -181,32 +182,23 @@ static unsigned outcnt; static int fill_inbuf(void); static void flush_window(void); static void error(char *m); -static void gzip_mark(void **); -static void gzip_release(void **); /* * This is set up by the setup-routine at boot-time */ -static unsigned char *real_mode; /* Pointer to real-mode data */ - -#define RM_EXT_MEM_K (*(unsigned short *)(real_mode + 0x2)) -#ifndef STANDARD_MEMORY_BIOS_CALL -#define RM_ALT_MEM_K (*(unsigned long *)(real_mode + 0x1e0)) -#endif -#define RM_SCREEN_INFO (*(struct screen_info *)(real_mode+0)) +static struct boot_params *real_mode; /* Pointer to real-mode data */ +static int quiet; extern unsigned char input_data[]; extern int input_len; static long bytes_out; -static void *malloc(int size); -static void free(void *where); - static void *memset(void *s, int c, unsigned n); static void *memcpy(void *dest, const void *src, unsigned n); -static void putstr(const char *); +static void __putstr(int, const char *); +#define putstr(__x) __putstr(0, __x) #ifdef CONFIG_X86_64 #define memptr long @@ -221,46 +213,8 @@ static char *vidmem; static int vidport; static int lines, cols; -#ifdef CONFIG_X86_NUMAQ -void *xquad_portio; -#endif - #include "../../../../lib/inflate.c" -static void *malloc(int size) -{ - void *p; - - if (size < 0) - error("Malloc error"); - if (free_mem_ptr <= 0) - error("Memory error"); - - free_mem_ptr = (free_mem_ptr + 3) & ~3; /* Align */ - - p = (void *)free_mem_ptr; - free_mem_ptr += size; - - if (free_mem_ptr >= free_mem_end_ptr) - error("Out of memory"); - - return p; -} - -static void free(void *where) -{ /* Don't care */ -} - -static void gzip_mark(void **ptr) -{ - *ptr = (void *) free_mem_ptr; -} - -static void gzip_release(void **ptr) -{ - free_mem_ptr = (memptr) *ptr; -} - static void scroll(void) { int i; @@ -270,18 +224,24 @@ static void scroll(void) vidmem[i] = ' '; } -static void putstr(const char *s) +static void __putstr(int error, const char *s) { int x, y, pos; char c; +#ifndef CONFIG_X86_VERBOSE_BOOTUP + if (!error) + return; +#endif + #ifdef CONFIG_X86_32 - if (RM_SCREEN_INFO.orig_video_mode == 0 && lines == 0 && cols == 0) + if (real_mode->screen_info.orig_video_mode == 0 && + lines == 0 && cols == 0) return; #endif - x = RM_SCREEN_INFO.orig_x; - y = RM_SCREEN_INFO.orig_y; + x = real_mode->screen_info.orig_x; + y = real_mode->screen_info.orig_y; while ((c = *s++) != '\0') { if (c == '\n') { @@ -302,8 +262,8 @@ static void putstr(const char *s) } } - RM_SCREEN_INFO.orig_x = x; - RM_SCREEN_INFO.orig_y = y; + real_mode->screen_info.orig_x = x; + real_mode->screen_info.orig_y = y; pos = (x + cols * y) * 2; /* Update cursor position */ outb(14, vidport); @@ -366,9 +326,9 @@ static void flush_window(void) static void error(char *x) { - putstr("\n\n"); - putstr(x); - putstr("\n\n -- System halted"); + __putstr(1, "\n\n"); + __putstr(1, x); + __putstr(1, "\n\n -- System halted"); while (1) asm("hlt"); @@ -395,7 +355,8 @@ static void parse_elf(void *output) return; } - putstr("Parsing ELF... "); + if (!quiet) + putstr("Parsing ELF... "); phdrs = malloc(sizeof(*phdrs) * ehdr.e_phnum); if (!phdrs) @@ -430,7 +391,10 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, { real_mode = rmode; - if (RM_SCREEN_INFO.orig_video_mode == 7) { + if (real_mode->hdr.loadflags & QUIET_FLAG) + quiet = 1; + + if (real_mode->screen_info.orig_video_mode == 7) { vidmem = (char *) 0xb0000; vidport = 0x3b4; } else { @@ -438,8 +402,8 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, vidport = 0x3d4; } - lines = RM_SCREEN_INFO.orig_video_lines; - cols = RM_SCREEN_INFO.orig_video_cols; + lines = real_mode->screen_info.orig_video_lines; + cols = real_mode->screen_info.orig_video_cols; window = output; /* Output buffer (Normally at 1M) */ free_mem_ptr = heap; /* Heap */ @@ -465,9 +429,11 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap, #endif makecrc(); - putstr("\nDecompressing Linux... "); + if (!quiet) + putstr("\nDecompressing Linux... "); gunzip(); parse_elf(output); - putstr("done.\nBooting the kernel.\n"); + if (!quiet) + putstr("done.\nBooting the kernel.\n"); return; } diff --git a/arch/x86/boot/compressed/relocs.c b/arch/x86/boot/compressed/relocs.c index edaadea90aafcf9876256bcac9db5d68823874ea..a1310c52fc0c6ac6bf97feb276700e9f0662793e 100644 --- a/arch/x86/boot/compressed/relocs.c +++ b/arch/x86/boot/compressed/relocs.c @@ -10,16 +10,20 @@ #define USE_BSD #include -#define MAX_SHDRS 100 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) static Elf32_Ehdr ehdr; -static Elf32_Shdr shdr[MAX_SHDRS]; -static Elf32_Sym *symtab[MAX_SHDRS]; -static Elf32_Rel *reltab[MAX_SHDRS]; -static char *strtab[MAX_SHDRS]; static unsigned long reloc_count, reloc_idx; static unsigned long *relocs; +struct section { + Elf32_Shdr shdr; + struct section *link; + Elf32_Sym *symtab; + Elf32_Rel *reltab; + char *strtab; +}; +static struct section *secs; + /* * Following symbols have been audited. There values are constant and do * not change if bzImage is loaded at a different physical address than @@ -35,7 +39,7 @@ static int is_safe_abs_reloc(const char* sym_name) { int i; - for(i = 0; i < ARRAY_SIZE(safe_abs_relocs); i++) { + for (i = 0; i < ARRAY_SIZE(safe_abs_relocs); i++) { if (!strcmp(sym_name, safe_abs_relocs[i])) /* Match found */ return 1; @@ -137,10 +141,10 @@ static const char *sec_name(unsigned shndx) { const char *sec_strtab; const char *name; - sec_strtab = strtab[ehdr.e_shstrndx]; + sec_strtab = secs[ehdr.e_shstrndx].strtab; name = ""; if (shndx < ehdr.e_shnum) { - name = sec_strtab + shdr[shndx].sh_name; + name = sec_strtab + secs[shndx].shdr.sh_name; } else if (shndx == SHN_ABS) { name = "ABSOLUTE"; @@ -159,7 +163,7 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym) name = sym_strtab + sym->st_name; } else { - name = sec_name(shdr[sym->st_shndx].sh_name); + name = sec_name(secs[sym->st_shndx].shdr.sh_name); } return name; } @@ -244,29 +248,34 @@ static void read_ehdr(FILE *fp) static void read_shdrs(FILE *fp) { int i; - if (ehdr.e_shnum > MAX_SHDRS) { - die("%d section headers supported: %d\n", - ehdr.e_shnum, MAX_SHDRS); + Elf32_Shdr shdr; + + secs = calloc(ehdr.e_shnum, sizeof(struct section)); + if (!secs) { + die("Unable to allocate %d section headers\n", + ehdr.e_shnum); } if (fseek(fp, ehdr.e_shoff, SEEK_SET) < 0) { die("Seek to %d failed: %s\n", ehdr.e_shoff, strerror(errno)); } - if (fread(&shdr, sizeof(shdr[0]), ehdr.e_shnum, fp) != ehdr.e_shnum) { - die("Cannot read ELF section headers: %s\n", - strerror(errno)); - } - for(i = 0; i < ehdr.e_shnum; i++) { - shdr[i].sh_name = elf32_to_cpu(shdr[i].sh_name); - shdr[i].sh_type = elf32_to_cpu(shdr[i].sh_type); - shdr[i].sh_flags = elf32_to_cpu(shdr[i].sh_flags); - shdr[i].sh_addr = elf32_to_cpu(shdr[i].sh_addr); - shdr[i].sh_offset = elf32_to_cpu(shdr[i].sh_offset); - shdr[i].sh_size = elf32_to_cpu(shdr[i].sh_size); - shdr[i].sh_link = elf32_to_cpu(shdr[i].sh_link); - shdr[i].sh_info = elf32_to_cpu(shdr[i].sh_info); - shdr[i].sh_addralign = elf32_to_cpu(shdr[i].sh_addralign); - shdr[i].sh_entsize = elf32_to_cpu(shdr[i].sh_entsize); + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; + if (fread(&shdr, sizeof shdr, 1, fp) != 1) + die("Cannot read ELF section headers %d/%d: %s\n", + i, ehdr.e_shnum, strerror(errno)); + sec->shdr.sh_name = elf32_to_cpu(shdr.sh_name); + sec->shdr.sh_type = elf32_to_cpu(shdr.sh_type); + sec->shdr.sh_flags = elf32_to_cpu(shdr.sh_flags); + sec->shdr.sh_addr = elf32_to_cpu(shdr.sh_addr); + sec->shdr.sh_offset = elf32_to_cpu(shdr.sh_offset); + sec->shdr.sh_size = elf32_to_cpu(shdr.sh_size); + sec->shdr.sh_link = elf32_to_cpu(shdr.sh_link); + sec->shdr.sh_info = elf32_to_cpu(shdr.sh_info); + sec->shdr.sh_addralign = elf32_to_cpu(shdr.sh_addralign); + sec->shdr.sh_entsize = elf32_to_cpu(shdr.sh_entsize); + if (sec->shdr.sh_link < ehdr.e_shnum) + sec->link = &secs[sec->shdr.sh_link]; } } @@ -274,20 +283,22 @@ static void read_shdrs(FILE *fp) static void read_strtabs(FILE *fp) { int i; - for(i = 0; i < ehdr.e_shnum; i++) { - if (shdr[i].sh_type != SHT_STRTAB) { + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; + if (sec->shdr.sh_type != SHT_STRTAB) { continue; } - strtab[i] = malloc(shdr[i].sh_size); - if (!strtab[i]) { + sec->strtab = malloc(sec->shdr.sh_size); + if (!sec->strtab) { die("malloc of %d bytes for strtab failed\n", - shdr[i].sh_size); + sec->shdr.sh_size); } - if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { + if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) { die("Seek to %d failed: %s\n", - shdr[i].sh_offset, strerror(errno)); + sec->shdr.sh_offset, strerror(errno)); } - if (fread(strtab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { + if (fread(sec->strtab, 1, sec->shdr.sh_size, fp) + != sec->shdr.sh_size) { die("Cannot read symbol table: %s\n", strerror(errno)); } @@ -297,28 +308,31 @@ static void read_strtabs(FILE *fp) static void read_symtabs(FILE *fp) { int i,j; - for(i = 0; i < ehdr.e_shnum; i++) { - if (shdr[i].sh_type != SHT_SYMTAB) { + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; + if (sec->shdr.sh_type != SHT_SYMTAB) { continue; } - symtab[i] = malloc(shdr[i].sh_size); - if (!symtab[i]) { + sec->symtab = malloc(sec->shdr.sh_size); + if (!sec->symtab) { die("malloc of %d bytes for symtab failed\n", - shdr[i].sh_size); + sec->shdr.sh_size); } - if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { + if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) { die("Seek to %d failed: %s\n", - shdr[i].sh_offset, strerror(errno)); + sec->shdr.sh_offset, strerror(errno)); } - if (fread(symtab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { + if (fread(sec->symtab, 1, sec->shdr.sh_size, fp) + != sec->shdr.sh_size) { die("Cannot read symbol table: %s\n", strerror(errno)); } - for(j = 0; j < shdr[i].sh_size/sizeof(symtab[i][0]); j++) { - symtab[i][j].st_name = elf32_to_cpu(symtab[i][j].st_name); - symtab[i][j].st_value = elf32_to_cpu(symtab[i][j].st_value); - symtab[i][j].st_size = elf32_to_cpu(symtab[i][j].st_size); - symtab[i][j].st_shndx = elf16_to_cpu(symtab[i][j].st_shndx); + for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) { + Elf32_Sym *sym = &sec->symtab[j]; + sym->st_name = elf32_to_cpu(sym->st_name); + sym->st_value = elf32_to_cpu(sym->st_value); + sym->st_size = elf32_to_cpu(sym->st_size); + sym->st_shndx = elf16_to_cpu(sym->st_shndx); } } } @@ -327,26 +341,29 @@ static void read_symtabs(FILE *fp) static void read_relocs(FILE *fp) { int i,j; - for(i = 0; i < ehdr.e_shnum; i++) { - if (shdr[i].sh_type != SHT_REL) { + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; + if (sec->shdr.sh_type != SHT_REL) { continue; } - reltab[i] = malloc(shdr[i].sh_size); - if (!reltab[i]) { + sec->reltab = malloc(sec->shdr.sh_size); + if (!sec->reltab) { die("malloc of %d bytes for relocs failed\n", - shdr[i].sh_size); + sec->shdr.sh_size); } - if (fseek(fp, shdr[i].sh_offset, SEEK_SET) < 0) { + if (fseek(fp, sec->shdr.sh_offset, SEEK_SET) < 0) { die("Seek to %d failed: %s\n", - shdr[i].sh_offset, strerror(errno)); + sec->shdr.sh_offset, strerror(errno)); } - if (fread(reltab[i], 1, shdr[i].sh_size, fp) != shdr[i].sh_size) { + if (fread(sec->reltab, 1, sec->shdr.sh_size, fp) + != sec->shdr.sh_size) { die("Cannot read symbol table: %s\n", strerror(errno)); } - for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { - reltab[i][j].r_offset = elf32_to_cpu(reltab[i][j].r_offset); - reltab[i][j].r_info = elf32_to_cpu(reltab[i][j].r_info); + for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) { + Elf32_Rel *rel = &sec->reltab[j]; + rel->r_offset = elf32_to_cpu(rel->r_offset); + rel->r_info = elf32_to_cpu(rel->r_info); } } } @@ -357,19 +374,21 @@ static void print_absolute_symbols(void) int i; printf("Absolute symbols\n"); printf(" Num: Value Size Type Bind Visibility Name\n"); - for(i = 0; i < ehdr.e_shnum; i++) { + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; char *sym_strtab; Elf32_Sym *sh_symtab; int j; - if (shdr[i].sh_type != SHT_SYMTAB) { + + if (sec->shdr.sh_type != SHT_SYMTAB) { continue; } - sh_symtab = symtab[i]; - sym_strtab = strtab[shdr[i].sh_link]; - for(j = 0; j < shdr[i].sh_size/sizeof(symtab[0][0]); j++) { + sh_symtab = sec->symtab; + sym_strtab = sec->link->strtab; + for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Sym); j++) { Elf32_Sym *sym; const char *name; - sym = &symtab[i][j]; + sym = &sec->symtab[j]; name = sym_name(sym_strtab, sym); if (sym->st_shndx != SHN_ABS) { continue; @@ -389,26 +408,27 @@ static void print_absolute_relocs(void) { int i, printed = 0; - for(i = 0; i < ehdr.e_shnum; i++) { + for (i = 0; i < ehdr.e_shnum; i++) { + struct section *sec = &secs[i]; + struct section *sec_applies, *sec_symtab; char *sym_strtab; Elf32_Sym *sh_symtab; - unsigned sec_applies, sec_symtab; int j; - if (shdr[i].sh_type != SHT_REL) { + if (sec->shdr.sh_type != SHT_REL) { continue; } - sec_symtab = shdr[i].sh_link; - sec_applies = shdr[i].sh_info; - if (!(shdr[sec_applies].sh_flags & SHF_ALLOC)) { + sec_symtab = sec->link; + sec_applies = &secs[sec->shdr.sh_info]; + if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) { continue; } - sh_symtab = symtab[sec_symtab]; - sym_strtab = strtab[shdr[sec_symtab].sh_link]; - for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { + sh_symtab = sec_symtab->symtab; + sym_strtab = sec_symtab->link->strtab; + for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) { Elf32_Rel *rel; Elf32_Sym *sym; const char *name; - rel = &reltab[i][j]; + rel = &sec->reltab[j]; sym = &sh_symtab[ELF32_R_SYM(rel->r_info)]; name = sym_name(sym_strtab, sym); if (sym->st_shndx != SHN_ABS) { @@ -456,26 +476,28 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym)) { int i; /* Walk through the relocations */ - for(i = 0; i < ehdr.e_shnum; i++) { + for (i = 0; i < ehdr.e_shnum; i++) { char *sym_strtab; Elf32_Sym *sh_symtab; - unsigned sec_applies, sec_symtab; + struct section *sec_applies, *sec_symtab; int j; - if (shdr[i].sh_type != SHT_REL) { + struct section *sec = &secs[i]; + + if (sec->shdr.sh_type != SHT_REL) { continue; } - sec_symtab = shdr[i].sh_link; - sec_applies = shdr[i].sh_info; - if (!(shdr[sec_applies].sh_flags & SHF_ALLOC)) { + sec_symtab = sec->link; + sec_applies = &secs[sec->shdr.sh_info]; + if (!(sec_applies->shdr.sh_flags & SHF_ALLOC)) { continue; } - sh_symtab = symtab[sec_symtab]; - sym_strtab = strtab[shdr[sec_symtab].sh_link]; - for(j = 0; j < shdr[i].sh_size/sizeof(reltab[0][0]); j++) { + sh_symtab = sec_symtab->symtab; + sym_strtab = sec->link->strtab; + for (j = 0; j < sec->shdr.sh_size/sizeof(Elf32_Rel); j++) { Elf32_Rel *rel; Elf32_Sym *sym; unsigned r_type; - rel = &reltab[i][j]; + rel = &sec->reltab[j]; sym = &sh_symtab[ELF32_R_SYM(rel->r_info)]; r_type = ELF32_R_TYPE(rel->r_info); /* Don't visit relocations to absolute symbols */ @@ -539,7 +561,7 @@ static void emit_relocs(int as_text) */ printf(".section \".data.reloc\",\"a\"\n"); printf(".balign 4\n"); - for(i = 0; i < reloc_count; i++) { + for (i = 0; i < reloc_count; i++) { printf("\t .long 0x%08lx\n", relocs[i]); } printf("\n"); @@ -550,7 +572,7 @@ static void emit_relocs(int as_text) /* Print a stop */ printf("%c%c%c%c", buf[0], buf[1], buf[2], buf[3]); /* Now print each relocation */ - for(i = 0; i < reloc_count; i++) { + for (i = 0; i < reloc_count; i++) { buf[0] = (relocs[i] >> 0) & 0xff; buf[1] = (relocs[i] >> 8) & 0xff; buf[2] = (relocs[i] >> 16) & 0xff; @@ -577,7 +599,7 @@ int main(int argc, char **argv) show_absolute_relocs = 0; as_text = 0; fname = NULL; - for(i = 1; i < argc; i++) { + for (i = 1; i < argc; i++) { char *arg = argv[i]; if (*arg == '-') { if (strcmp(argv[1], "--abs-syms") == 0) { diff --git a/arch/x86/boot/cpu.c b/arch/x86/boot/cpu.c index 00e19edd852c60d8cc32a2b009a604938747dd77..92d6fd73dc7dff60681d6ab7dee1362fba783d70 100644 --- a/arch/x86/boot/cpu.c +++ b/arch/x86/boot/cpu.c @@ -28,6 +28,8 @@ static char *cpu_name(int level) if (level == 64) { return "x86-64"; } else { + if (level == 15) + level = 6; sprintf(buf, "i%d86", level); return buf; } diff --git a/arch/x86/boot/edd.c b/arch/x86/boot/edd.c index 03399d64013b21459f63942c06bc6c33b803f425..d93cbc6464d0f8aa8aed3479b1b88a66993afa67 100644 --- a/arch/x86/boot/edd.c +++ b/arch/x86/boot/edd.c @@ -167,9 +167,8 @@ void query_edd(void) * Scan the BIOS-supported hard disks and query EDD * information... */ - get_edd_info(devno, &ei); - - if (boot_params.eddbuf_entries < EDDMAXNR) { + if (!get_edd_info(devno, &ei) + && boot_params.eddbuf_entries < EDDMAXNR) { memcpy(edp, &ei, sizeof ei); edp++; boot_params.eddbuf_entries++; diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c index 77569a4a3be114aaca948d04b060ebd28c80c1a9..2296164b54d2abc3ad8edc343af2b76c830d6693 100644 --- a/arch/x86/boot/main.c +++ b/arch/x86/boot/main.c @@ -165,6 +165,10 @@ void main(void) /* Set the video mode */ set_video(); + /* Parse command line for 'quiet' and pass it to decompressor. */ + if (cmdline_find_option_bool("quiet")) + boot_params.hdr.loadflags |= QUIET_FLAG; + /* Do the last things and invoke protected mode */ go_to_protected_mode(); } diff --git a/arch/x86/boot/memory.c b/arch/x86/boot/memory.c index acad32eb4290861b1539553c1e8eb49f7ec82e92..53165c97336b21406f49307cb4932c87468d32d9 100644 --- a/arch/x86/boot/memory.c +++ b/arch/x86/boot/memory.c @@ -13,6 +13,7 @@ */ #include "boot.h" +#include #define SMAP 0x534d4150 /* ASCII "SMAP" */ @@ -53,7 +54,7 @@ static int detect_memory_e820(void) count++; desc++; - } while (next && count < E820MAX); + } while (next && count < ARRAY_SIZE(boot_params.e820_map)); return boot_params.e820_entries = count; } diff --git a/arch/x86/boot/pm.c b/arch/x86/boot/pm.c index 328956fdb59e79dc354e96f47e98c5cb5dff4a6b..85a1cd8a8ff8a4daee99ee11d86176bd7a97c166 100644 --- a/arch/x86/boot/pm.c +++ b/arch/x86/boot/pm.c @@ -98,12 +98,6 @@ static void reset_coprocessor(void) /* * Set up the GDT */ -#define GDT_ENTRY(flags, base, limit) \ - (((u64)(base & 0xff000000) << 32) | \ - ((u64)flags << 40) | \ - ((u64)(limit & 0x00ff0000) << 32) | \ - ((u64)(base & 0x00ffffff) << 16) | \ - ((u64)(limit & 0x0000ffff))) struct gdt_ptr { u16 len; diff --git a/arch/x86/boot/pmjump.S b/arch/x86/boot/pmjump.S index ab049d40a884d7ef44d32fb63e30c44ed6aedabf..141b6e20ed3124dc102104991367de8b4779be68 100644 --- a/arch/x86/boot/pmjump.S +++ b/arch/x86/boot/pmjump.S @@ -33,6 +33,8 @@ protected_mode_jump: movw %cs, %bx shll $4, %ebx addl %ebx, 2f + jmp 1f # Short jump to serialize on 386/486 +1: movw $__BOOT_DS, %cx movw $__BOOT_TSS, %di @@ -40,8 +42,6 @@ protected_mode_jump: movl %cr0, %edx orb $X86_CR0_PE, %dl # Protected mode movl %edx, %cr0 - jmp 1f # Short jump to serialize on 386/486 -1: # Transition to 32-bit mode .byte 0x66, 0xea # ljmpl opcode diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c index 40ecb8d7688c3d5c8a7587aa8fce8bb7ea06d76b..b939cb476decf7d4d3089f6210c4fe3ecfb5f5be 100644 --- a/arch/x86/boot/video-vga.c +++ b/arch/x86/boot/video-vga.c @@ -259,8 +259,7 @@ static int vga_probe(void) return mode_count[adapter]; } -__videocard video_vga = -{ +__videocard video_vga = { .card_name = "VGA", .probe = vga_probe, .set_mode = vga_set_mode, diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig index ad7ddaaff588aaa619010fabe29af2ee2559d54d..4d73f53287b6acf795c5cdf1ae5197b37f04bfab 100644 --- a/arch/x86/configs/i386_defconfig +++ b/arch/x86/configs/i386_defconfig @@ -1,54 +1,103 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22-git14 -# Fri Jul 20 09:53:15 2007 +# Linux kernel version: 2.6.26-rc1 +# Sun May 4 19:59:02 2008 # +# CONFIG_64BIT is not set CONFIG_X86_32=y +# CONFIG_X86_64 is not set +CONFIG_X86=y +CONFIG_DEFCONFIG_LIST="arch/x86/configs/i386_defconfig" +# CONFIG_GENERIC_LOCKBREAK is not set CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y -CONFIG_SEMAPHORE_SLEEPERS=y -CONFIG_X86=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_FAST_CMPXCHG_LOCAL=y CONFIG_MMU=y CONFIG_ZONE_DMA=y -CONFIG_QUICKLIST=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_HWEIGHT=y +# CONFIG_GENERIC_GPIO is not set CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_DMI=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +# CONFIG_RWSEM_GENERIC_SPINLOCK is not set +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +# CONFIG_GENERIC_TIME_VSYSCALL is not set +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ZONE_DMA32 is not set +CONFIG_ARCH_POPULATES_NODE_MAP=y +# CONFIG_AUDIT_ARCH is not set +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_X86_SMP=y +CONFIG_X86_32_SMP=y +CONFIG_X86_HT=y +CONFIG_X86_BIOS_REBOOT=y +CONFIG_X86_TRAMPOLINE=y +CONFIG_KTIME_SCALAR=y # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y +# CONFIG_LOCALVERSION_AUTO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=18 -# CONFIG_CPUSETS is not set -CONFIG_SYSFS_DEPRECATED=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_NS=y +# CONFIG_CGROUP_DEVICE is not set +CONFIG_CPUSETS=y +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_CGROUP_MEM_RES_CTLR is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_PROC_PID_CPUSET=y CONFIG_RELAY=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_CC_OPTIMIZE_FOR_SIZE=y @@ -56,13 +105,15 @@ CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_ANON_INODES=y @@ -76,6 +127,17 @@ CONFIG_SLUB_DEBUG=y # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_MARKERS=y +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 @@ -87,10 +149,10 @@ CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_KMOD is not set CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y -CONFIG_LBD=y -# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LBD is not set +CONFIG_BLK_DEV_IO_TRACE=y # CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_DEV_BSG=y # # IO Schedulers @@ -103,7 +165,8 @@ CONFIG_IOSCHED_CFQ=y # CONFIG_DEFAULT_DEADLINE is not set CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y # # Processor type and features @@ -111,18 +174,21 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" CONFIG_TICK_ONESHOT=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_SMP=y -# CONFIG_X86_PC is not set +CONFIG_X86_PC=y # CONFIG_X86_ELAN is not set # CONFIG_X86_VOYAGER is not set # CONFIG_X86_NUMAQ is not set # CONFIG_X86_SUMMIT is not set # CONFIG_X86_BIGSMP is not set # CONFIG_X86_VISWS is not set -CONFIG_X86_GENERICARCH=y +# CONFIG_X86_GENERICARCH is not set # CONFIG_X86_ES7000 is not set -# CONFIG_PARAVIRT is not set -CONFIG_X86_CYCLONE_TIMER=y +# CONFIG_X86_RDC321X is not set +# CONFIG_X86_VSMP is not set +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +# CONFIG_PARAVIRT_GUEST is not set # CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set @@ -130,9 +196,8 @@ CONFIG_X86_CYCLONE_TIMER=y # CONFIG_M586MMX is not set # CONFIG_M686 is not set # CONFIG_MPENTIUMII is not set -CONFIG_MPENTIUMIII=y +# CONFIG_MPENTIUMIII is not set # CONFIG_MPENTIUMM is not set -# CONFIG_MCORE2 is not set # CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set @@ -147,14 +212,14 @@ CONFIG_MPENTIUMIII=y # CONFIG_MCYRIXIII is not set # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set -CONFIG_X86_GENERIC=y +# CONFIG_MPSC is not set +CONFIG_MCORE2=y +# CONFIG_GENERIC_CPU is not set +# CONFIG_X86_GENERIC is not set +CONFIG_X86_CPU=y CONFIG_X86_CMPXCHG=y -CONFIG_X86_L1_CACHE_SHIFT=7 +CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_XADD=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_CALIBRATE_DELAY=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INVLPG=y CONFIG_X86_BSWAP=y @@ -162,106 +227,120 @@ CONFIG_X86_POPAD_OK=y CONFIG_X86_GOOD_APIC=y CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_USE_PPRO_CHECKSUM=y +CONFIG_X86_P6_NOP=y CONFIG_X86_TSC=y -CONFIG_X86_CMOV=y -CONFIG_X86_MINIMUM_CPU_FAMILY=4 +CONFIG_X86_MINIMUM_CPU_FAMILY=6 +CONFIG_X86_DEBUGCTLMSR=y CONFIG_HPET_TIMER=y CONFIG_HPET_EMULATE_RTC=y -CONFIG_NR_CPUS=32 -CONFIG_SCHED_SMT=y +CONFIG_DMI=y +# CONFIG_IOMMU_HELPER is not set +CONFIG_NR_CPUS=4 +# CONFIG_SCHED_SMT is not set CONFIG_SCHED_MC=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set -CONFIG_PREEMPT_BKL=y CONFIG_X86_LOCAL_APIC=y CONFIG_X86_IO_APIC=y -CONFIG_X86_MCE=y -CONFIG_X86_MCE_NONFATAL=y -CONFIG_X86_MCE_P4THERMAL=y +# CONFIG_X86_MCE is not set CONFIG_VM86=y # CONFIG_TOSHIBA is not set # CONFIG_I8K is not set # CONFIG_X86_REBOOTFIXUPS is not set -CONFIG_MICROCODE=y -CONFIG_MICROCODE_OLD_INTERFACE=y +# CONFIG_MICROCODE is not set CONFIG_X86_MSR=y CONFIG_X86_CPUID=y - -# -# Firmware Drivers -# -# CONFIG_EDD is not set -# CONFIG_DELL_RBU is not set -# CONFIG_DCDBAS is not set -CONFIG_DMIID=y # CONFIG_NOHIGHMEM is not set CONFIG_HIGHMEM4G=y # CONFIG_HIGHMEM64G is not set CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_HIGHMEM=y -CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_NEED_NODE_MEMMAP_SIZE=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y +# CONFIG_FLATMEM_MANUAL is not set # CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_SPARSEMEM_STATIC=y +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set + +# +# Memory hotplug is currently incompatible with Software Suspend +# +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y -CONFIG_NR_QUICK=1 CONFIG_VIRT_TO_BUS=y # CONFIG_HIGHPTE is not set # CONFIG_MATH_EMULATION is not set CONFIG_MTRR=y -# CONFIG_EFI is not set +# CONFIG_X86_PAT is not set +CONFIG_EFI=y # CONFIG_IRQBALANCE is not set CONFIG_SECCOMP=y # CONFIG_HZ_100 is not set -CONFIG_HZ_250=y +# CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -# CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set -CONFIG_PHYSICAL_START=0x100000 -# CONFIG_RELOCATABLE is not set -CONFIG_PHYSICAL_ALIGN=0x100000 -# CONFIG_HOTPLUG_CPU is not set -CONFIG_COMPAT_VDSO=y +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +CONFIG_CRASH_DUMP=y +CONFIG_PHYSICAL_START=0x1000000 +CONFIG_RELOCATABLE=y +CONFIG_PHYSICAL_ALIGN=0x200000 +CONFIG_HOTPLUG_CPU=y +# CONFIG_COMPAT_VDSO is not set CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y # -# Power management options (ACPI, APM) +# Power management options # CONFIG_PM=y -CONFIG_PM_LEGACY=y -# CONFIG_PM_DEBUG is not set - -# -# ACPI (Advanced Configuration and Power Interface) Support -# +CONFIG_PM_DEBUG=y +# CONFIG_PM_VERBOSE is not set +CONFIG_CAN_PM_TRACE=y +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" CONFIG_ACPI=y +CONFIG_ACPI_SLEEP=y CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_SYSFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y -# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_DOCK=y +# CONFIG_ACPI_BAY is not set CONFIG_ACPI_PROCESSOR=y +CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_THERMAL=y +# CONFIG_ACPI_WMI is not set # CONFIG_ACPI_ASUS is not set # CONFIG_ACPI_TOSHIBA is not set -CONFIG_ACPI_BLACKLIST_YEAR=2001 -CONFIG_ACPI_DEBUG=y +# CONFIG_ACPI_CUSTOM_DSDT is not set +CONFIG_ACPI_BLACKLIST_YEAR=0 +# CONFIG_ACPI_DEBUG is not set CONFIG_ACPI_EC=y CONFIG_ACPI_POWER=y CONFIG_ACPI_SYSTEM=y CONFIG_X86_PM_TIMER=y -# CONFIG_ACPI_CONTAINER is not set +CONFIG_ACPI_CONTAINER=y # CONFIG_ACPI_SBS is not set # CONFIG_APM is not set @@ -271,15 +350,17 @@ CONFIG_X86_PM_TIMER=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_STAT is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set # # CPUFreq processor drivers @@ -287,8 +368,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_X86_ACPI_CPUFREQ=y # CONFIG_X86_POWERNOW_K6 is not set # CONFIG_X86_POWERNOW_K7 is not set -CONFIG_X86_POWERNOW_K8=y -CONFIG_X86_POWERNOW_K8_ACPI=y +# CONFIG_X86_POWERNOW_K8 is not set # CONFIG_X86_GX_SUSPMOD is not set # CONFIG_X86_SPEEDSTEP_CENTRINO is not set # CONFIG_X86_SPEEDSTEP_ICH is not set @@ -302,43 +382,72 @@ CONFIG_X86_POWERNOW_K8_ACPI=y # # shared options # -CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y +# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set # CONFIG_X86_SPEEDSTEP_LIB is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y # -# Bus options (PCI, PCMCIA, EISA, MCA, ISA) +# Bus options (PCI etc.) # CONFIG_PCI=y # CONFIG_PCI_GOBIOS is not set # CONFIG_PCI_GOMMCONFIG is not set # CONFIG_PCI_GODIRECT is not set CONFIG_PCI_GOANY=y +# CONFIG_PCI_GOOLPC is not set CONFIG_PCI_BIOS=y CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y -# CONFIG_PCIEPORTBUS is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCIEPORTBUS=y +# CONFIG_HOTPLUG_PCI_PCIE is not set +CONFIG_PCIEAER=y +# CONFIG_PCIEASPM is not set CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_PCI_MSI=y +# CONFIG_PCI_LEGACY is not set # CONFIG_PCI_DEBUG is not set -# CONFIG_HT_IRQ is not set +CONFIG_HT_IRQ=y CONFIG_ISA_DMA_API=y # CONFIG_ISA is not set # CONFIG_MCA is not set # CONFIG_SCx200 is not set +# CONFIG_OLPC is not set CONFIG_K8_NB=y - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +# CONFIG_PD6729 is not set +# CONFIG_I82092 is not set +CONFIG_PCCARD_NONSTATIC=y +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_IBM is not set +# CONFIG_HOTPLUG_PCI_ACPI is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set + +# +# Executable file formats / Emulations # CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set +CONFIG_BINFMT_MISC=y # # Networking @@ -349,59 +458,142 @@ CONFIG_NET=y # Networking options # CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set +CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set +CONFIG_XFRM_USER=y # CONFIG_XFRM_SUB_POLICY is not set # CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y # CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set +CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set CONFIG_INET_TUNNEL=y -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_INET_LRO=y +# CONFIG_INET_DIAG is not set +CONFIG_TCP_CONG_ADVANCED=y +# CONFIG_TCP_CONG_BIC is not set CONFIG_TCP_CONG_CUBIC=y +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +# CONFIG_TCP_CONG_HSTCP is not set +# CONFIG_TCP_CONG_HYBLA is not set +# CONFIG_TCP_CONG_VEGAS is not set +# CONFIG_TCP_CONG_SCALABLE is not set +# CONFIG_TCP_CONG_LP is not set +# CONFIG_TCP_CONG_VENO is not set +# CONFIG_TCP_CONG_YEAH is not set +# CONFIG_TCP_CONG_ILLINOIS is not set +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set +CONFIG_TCP_MD5SIG=y +# CONFIG_IP_VS is not set CONFIG_IPV6=y # CONFIG_IPV6_PRIVACY is not set # CONFIG_IPV6_ROUTER_PREF is not set # CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y # CONFIG_INET6_IPCOMP is not set # CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set CONFIG_INET6_XFRM_MODE_TRANSPORT=y CONFIG_INET6_XFRM_MODE_TUNNEL=y -# CONFIG_INET6_XFRM_MODE_BEET is not set +CONFIG_INET6_XFRM_MODE_BEET=y # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set CONFIG_IPV6_SIT=y +CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set # CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set +# CONFIG_IPV6_MROUTE is not set +CONFIG_NETLABEL=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +# CONFIG_NETFILTER_ADVANCED is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_STATE=y + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_IP_NF_TARGET_ULOG=y +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=y +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_NF_NAT_SIP=y +CONFIG_IP_NF_MANGLE=y + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_IPV6HEADER=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_LOG=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_TIPC is not set @@ -409,6 +601,7 @@ CONFIG_IPV6_SIT=y # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set +CONFIG_LLC=y # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set @@ -416,28 +609,99 @@ CONFIG_IPV6_SIT=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_RR is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_INGRESS is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +# CONFIG_NET_EMATCH_CMP is not set +# CONFIG_NET_EMATCH_NBYTE is not set +# CONFIG_NET_EMATCH_U32 is not set +# CONFIG_NET_EMATCH_META is not set +# CONFIG_NET_EMATCH_TEXT is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +# CONFIG_NET_ACT_GACT is not set +# CONFIG_NET_ACT_MIRRED is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +CONFIG_NET_SCH_FIFO=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_NET_TCPPROBE is not set -# CONFIG_HAMRADIO is not set +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +# CONFIG_AX25 is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y # # Wireless # -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_NONE is not set + +# +# Selecting 'y' for an algorithm will +# + +# +# build the algorithm into mac80211. +# +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_RC_PID=y +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set +# CONFIG_MAC80211_DEBUG is not set # CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -449,13 +713,15 @@ CONFIG_IPV6_SIT=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y # CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set +CONFIG_DEBUG_DEVRES=y # CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set # CONFIG_PARPORT is not set CONFIG_PNP=y @@ -466,7 +732,7 @@ CONFIG_PNP=y # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y -CONFIG_BLK_DEV_FD=y +# CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set @@ -479,8 +745,8 @@ CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_MISC_DEVICES=y @@ -489,73 +755,17 @@ CONFIG_MISC_DEVICES=y # CONFIG_EEPROM_93CX6 is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set +# CONFIG_ACER_WMI is not set +# CONFIG_ASUS_LAPTOP is not set +# CONFIG_FUJITSU_LAPTOP is not set +# CONFIG_TC1100_WMI is not set +# CONFIG_MSI_LAPTOP is not set # CONFIG_SONY_LAPTOP is not set # CONFIG_THINKPAD_ACPI is not set -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -# CONFIG_BLK_DEV_HD_IDE is not set -CONFIG_BLK_DEV_IDEDISK=y -CONFIG_IDEDISK_MULTI_MODE=y -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -CONFIG_BLK_DEV_IDEACPI=y -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_IDEPNP is not set -CONFIG_BLK_DEV_IDEPCI=y -# CONFIG_IDEPCI_SHARE_IRQ is not set -CONFIG_IDEPCI_PCIBUS_ORDER=y -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_RZ1000 is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -# CONFIG_IDEDMA_ONLYDISK is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -CONFIG_BLK_DEV_AMD74XX=y -# CONFIG_BLK_DEV_ATIIXP is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_CS5535 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_SC1200 is not set -CONFIG_BLK_DEV_PIIX=y -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_TC86C001 is not set -# CONFIG_IDE_ARM is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -# CONFIG_BLK_DEV_HD is not set +# CONFIG_INTEL_MENLOW is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support @@ -564,8 +774,8 @@ CONFIG_BLK_DEV_IDEDMA=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set -CONFIG_SCSI_NETLINK=y -# CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) @@ -574,7 +784,7 @@ CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set @@ -582,7 +792,7 @@ CONFIG_CHR_DEV_SG=y # Some SCSI devices (e.g. CD jukebox) support multiple LUNs # # CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set +CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set # CONFIG_SCSI_SCAN_ASYNC is not set CONFIG_SCSI_WAIT_SCAN=m @@ -591,81 +801,37 @@ CONFIG_SCSI_WAIT_SCAN=m # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=y -CONFIG_SCSI_FC_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -CONFIG_BLK_DEV_3W_XXXX_RAID=y -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -CONFIG_SCSI_AIC7XXX=y -CONFIG_AIC7XXX_CMDS_PER_DEVICE=32 -CONFIG_AIC7XXX_RESET_DELAY_MS=5000 -CONFIG_AIC7XXX_DEBUG_ENABLE=y -CONFIG_AIC7XXX_DEBUG_MASK=0 -CONFIG_AIC7XXX_REG_PRETTY_PRINT=y -# CONFIG_SCSI_AIC7XXX_OLD is not set -CONFIG_SCSI_AIC79XX=y -CONFIG_AIC79XX_CMDS_PER_DEVICE=32 -CONFIG_AIC79XX_RESET_DELAY_MS=4000 -# CONFIG_AIC79XX_DEBUG_ENABLE is not set -CONFIG_AIC79XX_DEBUG_MASK=0 -# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_NSP32 is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set CONFIG_ATA_ACPI=y +CONFIG_SATA_PMP=y CONFIG_SATA_AHCI=y -CONFIG_SATA_SVW=y +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set CONFIG_ATA_PIIX=y # CONFIG_SATA_MV is not set -CONFIG_SATA_NV=y +# CONFIG_SATA_NV is not set # CONFIG_PDC_ADMA is not set # CONFIG_SATA_QSTOR is not set # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SX4 is not set -CONFIG_SATA_SIL=y -# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIL is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_ULI is not set -CONFIG_SATA_VIA=y +# CONFIG_SATA_VIA is not set # CONFIG_SATA_VITESSE is not set # CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ACPI is not set # CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set +CONFIG_PATA_AMD=y # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_CMD640_PCI is not set @@ -673,6 +839,7 @@ CONFIG_SATA_VIA=y # CONFIG_PATA_CS5520 is not set # CONFIG_PATA_CS5530 is not set # CONFIG_PATA_CS5535 is not set +# CONFIG_PATA_CS5536 is not set # CONFIG_PATA_CYPRESS is not set # CONFIG_PATA_EFAR is not set # CONFIG_ATA_GENERIC is not set @@ -686,11 +853,14 @@ CONFIG_SATA_VIA=y # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_MPIIX is not set -# CONFIG_PATA_OLDPIIX is not set +CONFIG_PATA_OLDPIIX=y # CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set # CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PCMCIA is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RZ1000 is not set @@ -702,65 +872,42 @@ CONFIG_SATA_VIA=y # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_MD=y +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set CONFIG_BLK_DEV_DM=y # CONFIG_DM_DEBUG is not set # CONFIG_DM_CRYPT is not set # CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_ZERO is not set +CONFIG_DM_MIRROR=y +CONFIG_DM_ZERO=y # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# -CONFIG_FUSION=y -CONFIG_FUSION_SPI=y -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set -CONFIG_FUSION_MAX_SGE=128 -# CONFIG_FUSION_CTL is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set -CONFIG_IEEE1394=y - -# -# Subsystem Options -# -# CONFIG_IEEE1394_VERBOSEDEBUG is not set - -# -# Controllers -# - -# -# Texas Instruments PCILynx requires I2C -# -CONFIG_IEEE1394_OHCI1394=y - -# -# Protocols -# -# CONFIG_IEEE1394_VIDEO1394 is not set -# CONFIG_IEEE1394_SBP2 is not set -# CONFIG_IEEE1394_ETH1394_ROM_ENTRY is not set -# CONFIG_IEEE1394_ETH1394 is not set -# CONFIG_IEEE1394_DV1394 is not set -CONFIG_IEEE1394_RAWIO=y +# CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_MACINTOSH_DRIVERS=y -# CONFIG_MAC_EMUMOUSEBTN is not set +CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y -CONFIG_NETDEVICES_MULTIQUEUE=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_IFB is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set +# CONFIG_VETH is not set # CONFIG_NET_SB1000 is not set # CONFIG_ARCNET is not set # CONFIG_PHYLIB is not set @@ -770,38 +917,40 @@ CONFIG_MII=y # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set CONFIG_NET_VENDOR_3COM=y -CONFIG_VORTEX=y +# CONFIG_VORTEX is not set # CONFIG_TYPHOON is not set CONFIG_NET_TULIP=y # CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set +# CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_WINBOND_840 is not set # CONFIG_DM9102 is not set # CONFIG_ULI526X is not set +# CONFIG_PCMCIA_XIRCOM is not set # CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set -CONFIG_B44=y +# CONFIG_B44 is not set CONFIG_FORCEDETH=y # CONFIG_FORCEDETH_NAPI is not set -# CONFIG_DGRS is not set # CONFIG_EEPRO100 is not set CONFIG_E100=y # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set -CONFIG_8139CP=y +# CONFIG_8139CP is not set CONFIG_8139TOO=y -# CONFIG_8139TOO_PIO is not set +CONFIG_8139TOO_PIO=y # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set @@ -814,34 +963,75 @@ CONFIG_NETDEV_1000=y CONFIG_E1000=y # CONFIG_E1000_NAPI is not set # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set -CONFIG_R8169=y -# CONFIG_R8169_NAPI is not set +# CONFIG_R8169 is not set # CONFIG_SIS190 is not set # CONFIG_SKGE is not set CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set # CONFIG_VIA_VELOCITY is not set CONFIG_TIGON3=y -CONFIG_BNX2=y +# CONFIG_BNX2 is not set # CONFIG_QLA3XXX is not set # CONFIG_ATL1 is not set CONFIG_NETDEV_10000=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set # CONFIG_MYRI10GE is not set # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set # CONFIG_MLX4_CORE is not set -# CONFIG_TR is not set +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_SFC is not set +CONFIG_TR=y +# CONFIG_IBMOL is not set +# CONFIG_IBMLS is not set +# CONFIG_3C359 is not set +# CONFIG_TMS380TR is not set # # Wireless LAN # # CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set +CONFIG_WLAN_80211=y +# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_AIRO is not set +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_P54_COMMON is not set +CONFIG_ATH5K=y +# CONFIG_ATH5K_DEBUG is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWLCORE is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_HOSTAP is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set # # USB Network Adapters @@ -850,16 +1040,27 @@ CONFIG_NETDEV_10000=y # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set # CONFIG_USB_USBNET is not set +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +# CONFIG_PCMCIA_PCNET is not set +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set +# CONFIG_PCMCIA_IBMTR is not set # CONFIG_WAN is not set -# CONFIG_FDDI is not set +CONFIG_FDDI=y +# CONFIG_DEFXX is not set +# CONFIG_SKFP is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set CONFIG_NETCONSOLE=y +# CONFIG_NETCONSOLE_DYNAMIC is not set CONFIG_NETPOLL=y # CONFIG_NETPOLL_TRAP is not set CONFIG_NET_POLL_CONTROLLER=y @@ -870,18 +1071,17 @@ CONFIG_NET_POLL_CONTROLLER=y # Input device support # CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set @@ -906,17 +1106,63 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_APPLETOUCH is not set # CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +# CONFIG_JOYSTICK_IFORCE is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +# CONFIG_JOYSTICK_XPAD is not set +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_USB_WACOM is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_APANEL is not set +# CONFIG_INPUT_WISTRON_BTNS is not set +# CONFIG_INPUT_ATLAS_BTNS is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_UINPUT is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_SERIO_I8042=y -# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y @@ -929,8 +1175,26 @@ CONFIG_SERIO_LIBPS2=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +# CONFIG_NOZOMI is not set # # Serial drivers @@ -940,9 +1204,14 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_PNP=y -CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_CS is not set +CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y # # Non-8250 serial port support @@ -951,89 +1220,275 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_INTEL=y -CONFIG_HW_RANDOM_AMD=y +# CONFIG_HW_RANDOM_INTEL is not set +# CONFIG_HW_RANDOM_AMD is not set CONFIG_HW_RANDOM_GEODE=y CONFIG_HW_RANDOM_VIA=y -# CONFIG_NVRAM is not set -CONFIG_RTC=y +CONFIG_NVRAM=y # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_SONYPI is not set -CONFIG_AGP=y -# CONFIG_AGP_ALI is not set -# CONFIG_AGP_ATI is not set -# CONFIG_AGP_AMD is not set -CONFIG_AGP_AMD64=y -CONFIG_AGP_INTEL=y -# CONFIG_AGP_NVIDIA is not set -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_SWORKS is not set -# CONFIG_AGP_VIA is not set -# CONFIG_AGP_EFFICEON is not set -# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set # CONFIG_MWAVE is not set # CONFIG_PC8736x_GPIO is not set # CONFIG_NSC_GPIO is not set # CONFIG_CS5535_GPIO is not set -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=256 +# CONFIG_RAW_DRIVER is not set CONFIG_HPET=y # CONFIG_HPET_RTC_IRQ is not set -CONFIG_HPET_MMAP=y +# CONFIG_HPET_MMAP is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set CONFIG_DEVPORT=y -# CONFIG_I2C is not set - -# -# SPI support -# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +CONFIG_I2C_I801=y +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set # CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_SC520_WDT is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_WAFER_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_ITCO_WDT is not set +# CONFIG_IT8712F_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_60XX_WDT is not set +# CONFIG_SBC8360_WDT is not set +# CONFIG_SBC7240_WDT is not set +# CONFIG_CPU5_WDT is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_W83627HF_WDT is not set +# CONFIG_W83697HF_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_W83977F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # # Multifunction device drivers # # CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set + +# +# Multimedia drivers +# CONFIG_DAB=y # CONFIG_USB_DABUSB is not set # # Graphics support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +CONFIG_AGP=y +# CONFIG_AGP_ALI is not set +# CONFIG_AGP_ATI is not set +# CONFIG_AGP_AMD is not set +CONFIG_AGP_AMD64=y +CONFIG_AGP_INTEL=y +# CONFIG_AGP_NVIDIA is not set +# CONFIG_AGP_SIS is not set +# CONFIG_AGP_SWORKS is not set +# CONFIG_AGP_VIA is not set +# CONFIG_AGP_EFFICEON is not set +CONFIG_DRM=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_I810 is not set +# CONFIG_DRM_I830 is not set +CONFIG_DRM_I915=y +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_SIS is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VESA is not set +CONFIG_FB_EFI=y +# CONFIG_FB_IMAC is not set +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I810 is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_INTEL is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_CYBLA is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_GEODE is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +# CONFIG_BACKLIGHT_PROGEAR is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -# CONFIG_FB is not set # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=128 +CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIDEO_SELECT=y CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y # # Sound @@ -1043,33 +1498,167 @@ CONFIG_SOUND=y # # Advanced Linux Sound Architecture # -# CONFIG_SND is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y + +# +# Generic devices +# +# CONFIG_SND_PCSP is not set +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5530 is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +CONFIG_SND_HDA_INTEL=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_GENERIC=y +# CONFIG_SND_HDA_POWER_SAVE is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SIS7019 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# # # Open Sound System # -CONFIG_SOUND_PRIME=y -# CONFIG_SOUND_TRIDENT is not set -# CONFIG_SOUND_MSNDCLAS is not set -# CONFIG_SOUND_MSNDPIN is not set -# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_PRIME is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y -# CONFIG_HID_DEBUG is not set +CONFIG_HID_DEBUG=y +CONFIG_HIDRAW=y # # USB Input Devices # CONFIG_USB_HID=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set +CONFIG_USB_HIDINPUT_POWERBOOK=y +CONFIG_HID_FF=y +CONFIG_HID_PID=y +CONFIG_LOGITECH_FF=y +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_PANTHERLORD_FF=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_ZEROPLUS_FF=y +CONFIG_USB_HIDDEV=y CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB=y -# CONFIG_USB_DEBUG is not set +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options @@ -1077,18 +1666,18 @@ CONFIG_USB=y CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set # CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_PERSIST is not set +CONFIG_USB_SUSPEND=y # CONFIG_USB_OTG is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_SPLIT_ISO is not set # CONFIG_USB_EHCI_ROOT_HUB_TT is not set # CONFIG_USB_EHCI_TT_NEWSCHED is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set @@ -1121,8 +1710,10 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set # CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_LIBUSUAL=y # # USB Imaging devices @@ -1134,10 +1725,6 @@ CONFIG_USB_MON=y # # USB port drivers # - -# -# USB Serial Converter support -# # CONFIG_USB_SERIAL is not set # @@ -1163,90 +1750,125 @@ CONFIG_USB_MON=y # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y # -# USB DSL modem support +# LED drivers # +# CONFIG_LEDS_CLEVO_MAIL is not set # -# USB Gadget Support +# LED Triggers # -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC=y # -# LED devices +# Reporting subsystems # -# CONFIG_NEW_LEDS is not set +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_MM_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set # -# LED drivers +# RTC interfaces # +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # -# LED Triggers +# I2C RTC drivers # -# CONFIG_INFINIBAND is not set -# CONFIG_EDAC is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set # -# Real Time Clock +# SPI RTC drivers # -# CONFIG_RTC_CLASS is not set # -# DMA Engine support +# Platform RTC drivers # -# CONFIG_DMA_ENGINE is not set +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set # -# DMA Clients +# on-CPU RTC drivers # +CONFIG_DMADEVICES=y # # DMA Devices # -CONFIG_VIRTUALIZATION=y -# CONFIG_KVM is not set +# CONFIG_INTEL_IOATDMA is not set +# CONFIG_UIO is not set # -# Userspace I/O +# Firmware Drivers # -# CONFIG_UIO is not set +# CONFIG_EDD is not set +CONFIG_EFI_VARS=y +# CONFIG_DELL_RBU is not set +# CONFIG_DCDBAS is not set +CONFIG_DMIID=y +# CONFIG_ISCSI_IBFT_FIND is not set # # File systems # -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -# CONFIG_EXT2_FS_SECURITY is not set -# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT2_FS is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y -# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT3_FS_SECURITY=y # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=y -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -# CONFIG_REISERFS_FS_SECURITY is not set +# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y # CONFIG_AUTOFS_FS is not set CONFIG_AUTOFS4_FS=y # CONFIG_FUSE_FS is not set @@ -1256,8 +1878,8 @@ CONFIG_GENERIC_ACL=y # CD-ROM/DVD Filesystems # CONFIG_ISO9660_FS=y -# CONFIG_JOLIET is not set -# CONFIG_ZISOFS is not set +CONFIG_JOLIET=y +CONFIG_ZISOFS=y # CONFIG_UDF_FS is not set # @@ -1275,13 +1897,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -1289,6 +1911,7 @@ CONFIG_RAMFS=y # # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set @@ -1296,33 +1919,15 @@ CONFIG_RAMFS=y # CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_NFSD_TCP=y -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_NETWORK_FILESYSTEMS=y +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set @@ -1332,14 +1937,26 @@ CONFIG_SUNRPC=y # # Partition Types # -# CONFIG_PARTITION_ADVANCED is not set +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +CONFIG_SGI_PARTITION=y +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set @@ -1374,37 +1991,33 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set -CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_UTF8=y - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set -CONFIG_INSTRUMENTATION=y -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_KPROBES=y # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y -CONFIG_UNUSED_SYMBOLS=y -# CONFIG_DEBUG_FS is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set +CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set # CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set @@ -1419,48 +2032,174 @@ CONFIG_TIMER_STATS=y CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_LIST is not set -# CONFIG_FRAME_POINTER is not set -CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +CONFIG_PROVIDE_OHCI1394_DMA_INIT=y +# CONFIG_SAMPLES is not set +# CONFIG_KGDB is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_STRICT_DEVMEM is not set CONFIG_EARLY_PRINTK=y CONFIG_DEBUG_STACKOVERFLOW=y -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_RODATA is not set +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_X86_PTDUMP is not set +CONFIG_DEBUG_RODATA=y +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_DEBUG_NX_TEST=m # CONFIG_4KSTACKS is not set CONFIG_X86_FIND_SMP_CONFIG=y CONFIG_X86_MPPARSE=y CONFIG_DOUBLEFAULT=y +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=0 +CONFIG_DEBUG_BOOT_PARAMS=y +# CONFIG_CPA_DEBUG is not set # # Security options # -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_CRYPTO is not set +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_CAPABILITIES=y +CONFIG_SECURITY_FILE_CAPABILITIES=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +# CONFIG_SECURITY_SMACK is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_586 is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SALSA20_586 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_TWOFISH_586 is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_PADLOCK is not set +# CONFIG_CRYPTO_DEV_GEODE is not set +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_HAVE_KVM=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_LGUEST is not set +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_BALLOON is not set # # Library routines # CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set +CONFIG_AUDIT_GENERIC=y CONFIG_ZLIB_INFLATE=y CONFIG_PLIST=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT=y CONFIG_HAS_DMA=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_X86_SMP=y -CONFIG_X86_HT=y -CONFIG_X86_BIOS_REBOOT=y -CONFIG_X86_TRAMPOLINE=y -CONFIG_KTIME_SCALAR=y diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig index 2d6f5b2809d2f4644e82ccfd323acbe587693bf5..a4045242962552c3c39558c32a68dddfbf867210 100644 --- a/arch/x86/configs/x86_64_defconfig +++ b/arch/x86/configs/x86_64_defconfig @@ -1,64 +1,103 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22-git14 -# Fri Jul 20 09:53:15 2007 +# Linux kernel version: 2.6.26-rc1 +# Sun May 4 19:59:57 2008 # -CONFIG_X86_64=y CONFIG_64BIT=y +# CONFIG_X86_32 is not set +CONFIG_X86_64=y CONFIG_X86=y +CONFIG_DEFCONFIG_LIST="arch/x86/configs/x86_64_defconfig" +# CONFIG_GENERIC_LOCKBREAK is not set CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_ZONE_DMA32=y +CONFIG_CLOCKSOURCE_WATCHDOG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y -CONFIG_SEMAPHORE_SLEEPERS=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_FAST_CMPXCHG_LOCAL=y CONFIG_MMU=y CONFIG_ZONE_DMA=y -CONFIG_QUICKLIST=y -CONFIG_NR_QUICK=2 -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_X86_CMPXCHG=y -CONFIG_EARLY_PRINTK=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_IOMAP=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_DMI=y -CONFIG_AUDIT_ARCH=y CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_HWEIGHT=y +# CONFIG_GENERIC_GPIO is not set +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_ARCH_HAS_CPU_RELAX=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ZONE_DMA32=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_AUDIT_ARCH=y +CONFIG_ARCH_SUPPORTS_AOUT=y +CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_X86_SMP=y +CONFIG_X86_64_SMP=y +CONFIG_X86_HT=y +CONFIG_X86_BIOS_REBOOT=y +CONFIG_X86_TRAMPOLINE=y +# CONFIG_KTIME_SCALAR is not set # -# Code maturity level options +# General setup # CONFIG_EXPERIMENTAL=y CONFIG_LOCK_KERNEL=y CONFIG_INIT_ENV_ARG_LIMIT=32 - -# -# General setup -# CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y +# CONFIG_LOCALVERSION_AUTO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_USER_NS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=18 -# CONFIG_CPUSETS is not set -CONFIG_SYSFS_DEPRECATED=y +CONFIG_BSD_PROCESS_ACCT=y +# CONFIG_BSD_PROCESS_ACCT_V3 is not set +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_AUDIT=y +CONFIG_AUDITSYSCALL=y +CONFIG_AUDIT_TREE=y +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_CGROUPS=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_NS=y +# CONFIG_CGROUP_DEVICE is not set +CONFIG_CPUSETS=y +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +# CONFIG_RT_GROUP_SCHED is not set +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_CGROUP_MEM_RES_CTLR is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +CONFIG_PROC_PID_CPUSET=y CONFIG_RELAY=y +CONFIG_NAMESPACES=y +CONFIG_UTS_NS=y +CONFIG_IPC_NS=y +CONFIG_USER_NS=y +CONFIG_PID_NS=y CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_CC_OPTIMIZE_FOR_SIZE=y @@ -66,13 +105,15 @@ CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set CONFIG_UID16=y CONFIG_SYSCTL_SYSCALL=y +CONFIG_SYSCTL_SYSCALL_CHECK=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y +# CONFIG_COMPAT_BRK is not set CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_ANON_INODES=y @@ -82,9 +123,21 @@ CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLAB is not set +CONFIG_SLUB=y # CONFIG_SLOB is not set +CONFIG_PROFILING=y +CONFIG_MARKERS=y +# CONFIG_OPROFILE is not set +CONFIG_HAVE_OPROFILE=y +CONFIG_KPROBES=y +CONFIG_KRETPROBES=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_DMA_ATTRS is not set +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 @@ -96,14 +149,15 @@ CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_KMOD is not set CONFIG_STOP_MACHINE=y CONFIG_BLOCK=y -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_BSG is not set +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLOCK_COMPAT=y # # IO Schedulers # CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set +CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y # CONFIG_DEFAULT_AS is not set @@ -111,107 +165,177 @@ CONFIG_IOSCHED_CFQ=y CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y # # Processor type and features # +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_SMP=y CONFIG_X86_PC=y +# CONFIG_X86_ELAN is not set +# CONFIG_X86_VOYAGER is not set +# CONFIG_X86_NUMAQ is not set +# CONFIG_X86_SUMMIT is not set +# CONFIG_X86_BIGSMP is not set +# CONFIG_X86_VISWS is not set +# CONFIG_X86_GENERICARCH is not set +# CONFIG_X86_ES7000 is not set +# CONFIG_X86_RDC321X is not set # CONFIG_X86_VSMP is not set +# CONFIG_PARAVIRT_GUEST is not set +CONFIG_MEMTEST_BOOTPARAM=y +CONFIG_MEMTEST_BOOTPARAM_VALUE=0 +# CONFIG_M386 is not set +# CONFIG_M486 is not set +# CONFIG_M586 is not set +# CONFIG_M586TSC is not set +# CONFIG_M586MMX is not set +# CONFIG_M686 is not set +# CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set +# CONFIG_MPENTIUMM is not set +# CONFIG_MPENTIUM4 is not set +# CONFIG_MK6 is not set +# CONFIG_MK7 is not set # CONFIG_MK8 is not set +# CONFIG_MCRUSOE is not set +# CONFIG_MEFFICEON is not set +# CONFIG_MWINCHIPC6 is not set +# CONFIG_MWINCHIP2 is not set +# CONFIG_MWINCHIP3D is not set +# CONFIG_MGEODEGX1 is not set +# CONFIG_MGEODE_LX is not set +# CONFIG_MCYRIXIII is not set +# CONFIG_MVIAC3_2 is not set +# CONFIG_MVIAC7 is not set # CONFIG_MPSC is not set -# CONFIG_MCORE2 is not set -CONFIG_GENERIC_CPU=y -CONFIG_X86_L1_CACHE_BYTES=128 -CONFIG_X86_L1_CACHE_SHIFT=7 -CONFIG_X86_INTERNODE_CACHE_BYTES=128 -CONFIG_X86_TSC=y +CONFIG_MCORE2=y +# CONFIG_GENERIC_CPU is not set +CONFIG_X86_CPU=y +CONFIG_X86_L1_CACHE_BYTES=64 +CONFIG_X86_INTERNODE_CACHE_BYTES=64 +CONFIG_X86_CMPXCHG=y +CONFIG_X86_L1_CACHE_SHIFT=6 CONFIG_X86_GOOD_APIC=y -# CONFIG_MICROCODE is not set -CONFIG_X86_MSR=y -CONFIG_X86_CPUID=y -CONFIG_X86_HT=y -CONFIG_X86_IO_APIC=y -CONFIG_X86_LOCAL_APIC=y -CONFIG_MTRR=y -CONFIG_SMP=y -CONFIG_SCHED_SMT=y +CONFIG_X86_INTEL_USERCOPY=y +CONFIG_X86_USE_PPRO_CHECKSUM=y +CONFIG_X86_P6_NOP=y +CONFIG_X86_TSC=y +CONFIG_X86_CMOV=y +CONFIG_X86_MINIMUM_CPU_FAMILY=64 +CONFIG_X86_DEBUGCTLMSR=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_DMI=y +CONFIG_GART_IOMMU=y +CONFIG_CALGARY_IOMMU=y +CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y +CONFIG_SWIOTLB=y +CONFIG_IOMMU_HELPER=y +CONFIG_NR_CPUS=4 +# CONFIG_SCHED_SMT is not set CONFIG_SCHED_MC=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_VOLUNTARY=y # CONFIG_PREEMPT is not set -CONFIG_PREEMPT_BKL=y +CONFIG_X86_LOCAL_APIC=y +CONFIG_X86_IO_APIC=y +# CONFIG_X86_MCE is not set +# CONFIG_I8K is not set +# CONFIG_MICROCODE is not set +CONFIG_X86_MSR=y +CONFIG_X86_CPUID=y CONFIG_NUMA=y CONFIG_K8_NUMA=y -CONFIG_NODES_SHIFT=6 CONFIG_X86_64_ACPI_NUMA=y -CONFIG_NUMA_EMU=y +CONFIG_NODES_SPAN_OTHER_NODES=y +# CONFIG_NUMA_EMU is not set +CONFIG_NODES_SHIFT=6 +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_SELECT_MEMORY_MODEL=y +# CONFIG_FLATMEM_MANUAL is not set +# CONFIG_DISCONTIGMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_HAVE_MEMORY_PRESENT=y # CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSEMEM_VMEMMAP=y + +# +# Memory hotplug is currently incompatible with Software Suspend +# +CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_MIGRATION=y CONFIG_RESOURCES_64BIT=y CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y -CONFIG_OUT_OF_LINE_PFN_TO_PAGE=y -CONFIG_NR_CPUS=32 -CONFIG_PHYSICAL_ALIGN=0x200000 -CONFIG_HOTPLUG_CPU=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_HPET_TIMER=y -CONFIG_HPET_EMULATE_RTC=y -CONFIG_GART_IOMMU=y -# CONFIG_CALGARY_IOMMU is not set -CONFIG_SWIOTLB=y -CONFIG_X86_MCE=y -CONFIG_X86_MCE_INTEL=y -CONFIG_X86_MCE_AMD=y -# CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set -# CONFIG_RELOCATABLE is not set -CONFIG_PHYSICAL_START=0x200000 +CONFIG_MTRR=y +# CONFIG_X86_PAT is not set +CONFIG_EFI=y CONFIG_SECCOMP=y -# CONFIG_CC_STACKPROTECTOR is not set # CONFIG_HZ_100 is not set -CONFIG_HZ_250=y +# CONFIG_HZ_250 is not set # CONFIG_HZ_300 is not set -# CONFIG_HZ_1000 is not set -CONFIG_HZ=250 -CONFIG_K8_NB=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_ISA_DMA_API=y -CONFIG_GENERIC_PENDING_IRQ=y +CONFIG_HZ_1000=y +CONFIG_HZ=1000 +CONFIG_SCHED_HRTICK=y +CONFIG_KEXEC=y +CONFIG_CRASH_DUMP=y +CONFIG_PHYSICAL_START=0x1000000 +CONFIG_RELOCATABLE=y +CONFIG_PHYSICAL_ALIGN=0x200000 +CONFIG_HOTPLUG_CPU=y +# CONFIG_COMPAT_VDSO is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y # # Power management options # +CONFIG_ARCH_HIBERNATION_HEADER=y CONFIG_PM=y -# CONFIG_PM_LEGACY is not set -# CONFIG_PM_DEBUG is not set +CONFIG_PM_DEBUG=y +# CONFIG_PM_VERBOSE is not set +CONFIG_CAN_PM_TRACE=y +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" - -# -# ACPI (Advanced Configuration and Power Interface) Support -# CONFIG_ACPI=y CONFIG_ACPI_SLEEP=y -CONFIG_ACPI_SLEEP_PROC_FS=y -CONFIG_ACPI_SLEEP_PROC_SLEEP=y CONFIG_ACPI_PROCFS=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_SYSFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y CONFIG_ACPI_AC=y CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y CONFIG_ACPI_FAN=y -# CONFIG_ACPI_DOCK is not set +CONFIG_ACPI_DOCK=y +# CONFIG_ACPI_BAY is not set CONFIG_ACPI_PROCESSOR=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_THERMAL=y CONFIG_ACPI_NUMA=y +# CONFIG_ACPI_WMI is not set # CONFIG_ACPI_ASUS is not set # CONFIG_ACPI_TOSHIBA is not set +# CONFIG_ACPI_CUSTOM_DSDT is not set CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DEBUG is not set CONFIG_ACPI_EC=y @@ -227,29 +351,34 @@ CONFIG_ACPI_CONTAINER=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y CONFIG_CPU_FREQ_DEBUG=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_STAT is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set # # CPUFreq processor drivers # -CONFIG_X86_POWERNOW_K8=y -CONFIG_X86_POWERNOW_K8_ACPI=y -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set CONFIG_X86_ACPI_CPUFREQ=y +# CONFIG_X86_POWERNOW_K8 is not set +# CONFIG_X86_SPEEDSTEP_CENTRINO is not set +# CONFIG_X86_P4_CLOCKMOD is not set # # shared options # -CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y +# CONFIG_X86_ACPI_CPUFREQ_PROC_INTF is not set # CONFIG_X86_SPEEDSTEP_LIB is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y # # Bus options (PCI etc.) @@ -257,27 +386,56 @@ CONFIG_X86_ACPI_CPUFREQ_PROC_INTF=y CONFIG_PCI=y CONFIG_PCI_DIRECT=y CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_DOMAINS=y +CONFIG_DMAR=y +CONFIG_DMAR_GFX_WA=y +CONFIG_DMAR_FLOPPY_WA=y CONFIG_PCIEPORTBUS=y +# CONFIG_HOTPLUG_PCI_PCIE is not set CONFIG_PCIEAER=y +# CONFIG_PCIEASPM is not set CONFIG_ARCH_SUPPORTS_MSI=y CONFIG_PCI_MSI=y +# CONFIG_PCI_LEGACY is not set # CONFIG_PCI_DEBUG is not set -# CONFIG_HT_IRQ is not set - -# -# PCCARD (PCMCIA/CardBus) support -# -# CONFIG_PCCARD is not set -# CONFIG_HOTPLUG_PCI is not set +CONFIG_HT_IRQ=y +CONFIG_ISA_DMA_API=y +CONFIG_K8_NB=y +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y +CONFIG_CARDBUS=y + +# +# PC-card bridges +# +CONFIG_YENTA=y +CONFIG_YENTA_O2=y +CONFIG_YENTA_RICOH=y +CONFIG_YENTA_TI=y +CONFIG_YENTA_ENE_TUNE=y +CONFIG_YENTA_TOSHIBA=y +# CONFIG_PD6729 is not set +# CONFIG_I82092 is not set +CONFIG_PCCARD_NONSTATIC=y +CONFIG_HOTPLUG_PCI=y +# CONFIG_HOTPLUG_PCI_FAKE is not set +# CONFIG_HOTPLUG_PCI_ACPI is not set +# CONFIG_HOTPLUG_PCI_CPCI is not set +# CONFIG_HOTPLUG_PCI_SHPC is not set # # Executable file formats / Emulations # CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y CONFIG_IA32_EMULATION=y -CONFIG_IA32_AOUT=y +# CONFIG_IA32_AOUT is not set CONFIG_COMPAT=y +CONFIG_COMPAT_FOR_U64_ALIGNMENT=y CONFIG_SYSVIPC_COMPAT=y # @@ -289,22 +447,31 @@ CONFIG_NET=y # Networking options # CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set +CONFIG_PACKET_MMAP=y CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=y +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set # CONFIG_NET_KEY is not set CONFIG_INET=y CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +# CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set +CONFIG_IP_MROUTE=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y # CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set +CONFIG_SYN_COOKIES=y # CONFIG_INET_AH is not set # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set @@ -313,31 +480,109 @@ CONFIG_INET_TUNNEL=y # CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_BEET is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_INET_LRO=y +# CONFIG_INET_DIAG is not set +CONFIG_TCP_CONG_ADVANCED=y +# CONFIG_TCP_CONG_BIC is not set CONFIG_TCP_CONG_CUBIC=y +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +# CONFIG_TCP_CONG_HSTCP is not set +# CONFIG_TCP_CONG_HYBLA is not set +# CONFIG_TCP_CONG_VEGAS is not set +# CONFIG_TCP_CONG_SCALABLE is not set +# CONFIG_TCP_CONG_LP is not set +# CONFIG_TCP_CONG_VENO is not set +# CONFIG_TCP_CONG_YEAH is not set +# CONFIG_TCP_CONG_ILLINOIS is not set +# CONFIG_DEFAULT_BIC is not set +CONFIG_DEFAULT_CUBIC=y +# CONFIG_DEFAULT_HTCP is not set +# CONFIG_DEFAULT_VEGAS is not set +# CONFIG_DEFAULT_WESTWOOD is not set +# CONFIG_DEFAULT_RENO is not set CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set +CONFIG_TCP_MD5SIG=y +# CONFIG_IP_VS is not set CONFIG_IPV6=y # CONFIG_IPV6_PRIVACY is not set # CONFIG_IPV6_ROUTER_PREF is not set # CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y # CONFIG_INET6_IPCOMP is not set # CONFIG_IPV6_MIP6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET6_XFRM_MODE_TUNNEL is not set -# CONFIG_INET6_XFRM_MODE_BEET is not set +CONFIG_INET6_XFRM_MODE_TRANSPORT=y +CONFIG_INET6_XFRM_MODE_TUNNEL=y +CONFIG_INET6_XFRM_MODE_BEET=y # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set CONFIG_IPV6_SIT=y +CONFIG_IPV6_NDISC_NODETYPE=y # CONFIG_IPV6_TUNNEL is not set # CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set +# CONFIG_IPV6_MROUTE is not set +CONFIG_NETLABEL=y +CONFIG_NETWORK_SECMARK=y +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set +# CONFIG_NETFILTER_ADVANCED is not set + +# +# Core Netfilter Configuration +# +CONFIG_NETFILTER_NETLINK=y +CONFIG_NETFILTER_NETLINK_LOG=y +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_XTABLES=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_SECMARK=y +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=y +CONFIG_NETFILTER_XT_TARGET_TCPMSS=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_STATE=y + +# +# IP: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_NF_CONNTRACK_PROC_COMPAT=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_IP_NF_TARGET_ULOG=y +CONFIG_NF_NAT=y +CONFIG_NF_NAT_NEEDED=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_NF_NAT_FTP=y +CONFIG_NF_NAT_IRC=y +# CONFIG_NF_NAT_TFTP is not set +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_H323 is not set +CONFIG_NF_NAT_SIP=y +CONFIG_IP_NF_MANGLE=y + +# +# IPv6: Netfilter Configuration +# +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_MATCH_IPV6HEADER=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_LOG=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_MANGLE=y # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_TIPC is not set @@ -345,6 +590,7 @@ CONFIG_IPV6_SIT=y # CONFIG_BRIDGE is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set +CONFIG_LLC=y # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set @@ -352,28 +598,99 @@ CONFIG_IPV6_SIT=y # CONFIG_LAPB is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set - -# -# QoS and/or fair queueing -# -# CONFIG_NET_SCHED is not set +CONFIG_NET_SCHED=y + +# +# Queueing/Scheduling +# +# CONFIG_NET_SCH_CBQ is not set +# CONFIG_NET_SCH_HTB is not set +# CONFIG_NET_SCH_HFSC is not set +# CONFIG_NET_SCH_PRIO is not set +# CONFIG_NET_SCH_RR is not set +# CONFIG_NET_SCH_RED is not set +# CONFIG_NET_SCH_SFQ is not set +# CONFIG_NET_SCH_TEQL is not set +# CONFIG_NET_SCH_TBF is not set +# CONFIG_NET_SCH_GRED is not set +# CONFIG_NET_SCH_DSMARK is not set +# CONFIG_NET_SCH_NETEM is not set +# CONFIG_NET_SCH_INGRESS is not set + +# +# Classification +# +CONFIG_NET_CLS=y +# CONFIG_NET_CLS_BASIC is not set +# CONFIG_NET_CLS_TCINDEX is not set +# CONFIG_NET_CLS_ROUTE4 is not set +# CONFIG_NET_CLS_FW is not set +# CONFIG_NET_CLS_U32 is not set +# CONFIG_NET_CLS_RSVP is not set +# CONFIG_NET_CLS_RSVP6 is not set +# CONFIG_NET_CLS_FLOW is not set +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_STACK=32 +# CONFIG_NET_EMATCH_CMP is not set +# CONFIG_NET_EMATCH_NBYTE is not set +# CONFIG_NET_EMATCH_U32 is not set +# CONFIG_NET_EMATCH_META is not set +# CONFIG_NET_EMATCH_TEXT is not set +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_ACT_POLICE is not set +# CONFIG_NET_ACT_GACT is not set +# CONFIG_NET_ACT_MIRRED is not set +# CONFIG_NET_ACT_IPT is not set +# CONFIG_NET_ACT_NAT is not set +# CONFIG_NET_ACT_PEDIT is not set +# CONFIG_NET_ACT_SIMP is not set +CONFIG_NET_SCH_FIFO=y # # Network testing # # CONFIG_NET_PKTGEN is not set # CONFIG_NET_TCPPROBE is not set -# CONFIG_HAMRADIO is not set +CONFIG_HAMRADIO=y + +# +# Packet Radio protocols +# +# CONFIG_AX25 is not set +# CONFIG_CAN is not set # CONFIG_IRDA is not set # CONFIG_BT is not set # CONFIG_AF_RXRPC is not set +CONFIG_FIB_RULES=y # # Wireless # -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set +CONFIG_CFG80211=y +CONFIG_NL80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_MAC80211=y + +# +# Rate control algorithm selection +# +CONFIG_MAC80211_RC_DEFAULT_PID=y +# CONFIG_MAC80211_RC_DEFAULT_NONE is not set + +# +# Selecting 'y' for an algorithm will +# + +# +# build the algorithm into mac80211. +# +CONFIG_MAC80211_RC_DEFAULT="pid" +CONFIG_MAC80211_RC_PID=y +# CONFIG_MAC80211_MESH is not set +CONFIG_MAC80211_LEDS=y +# CONFIG_MAC80211_DEBUGFS is not set +# CONFIG_MAC80211_DEBUG_PACKET_ALIGNMENT is not set +# CONFIG_MAC80211_DEBUG is not set # CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -385,13 +702,15 @@ CONFIG_IPV6_SIT=y # # Generic Driver Options # +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y # CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set +CONFIG_DEBUG_DEVRES=y # CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set +CONFIG_CONNECTOR=y +CONFIG_PROC_EVENTS=y # CONFIG_MTD is not set # CONFIG_PARPORT is not set CONFIG_PNP=y @@ -402,7 +721,7 @@ CONFIG_PNP=y # CONFIG_PNPACPI=y CONFIG_BLK_DEV=y -CONFIG_BLK_DEV_FD=y +# CONFIG_BLK_DEV_FD is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set @@ -415,8 +734,8 @@ CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_RAM_SIZE=16384 +# CONFIG_BLK_DEV_XIP is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set CONFIG_MISC_DEVICES=y @@ -425,72 +744,16 @@ CONFIG_MISC_DEVICES=y # CONFIG_EEPROM_93CX6 is not set # CONFIG_SGI_IOC4 is not set # CONFIG_TIFM_CORE is not set +# CONFIG_ACER_WMI is not set +# CONFIG_ASUS_LAPTOP is not set +# CONFIG_FUJITSU_LAPTOP is not set +# CONFIG_MSI_LAPTOP is not set # CONFIG_SONY_LAPTOP is not set # CONFIG_THINKPAD_ACPI is not set -CONFIG_IDE=y -CONFIG_BLK_DEV_IDE=y - -# -# Please see Documentation/ide.txt for help/info on IDE drives -# -# CONFIG_BLK_DEV_IDE_SATA is not set -# CONFIG_BLK_DEV_HD_IDE is not set -CONFIG_BLK_DEV_IDEDISK=y -CONFIG_IDEDISK_MULTI_MODE=y -CONFIG_BLK_DEV_IDECD=y -# CONFIG_BLK_DEV_IDETAPE is not set -# CONFIG_BLK_DEV_IDEFLOPPY is not set -# CONFIG_BLK_DEV_IDESCSI is not set -CONFIG_BLK_DEV_IDEACPI=y -# CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y - -# -# IDE chipset support/bugfixes -# -CONFIG_IDE_GENERIC=y -# CONFIG_BLK_DEV_CMD640 is not set -# CONFIG_BLK_DEV_IDEPNP is not set -CONFIG_BLK_DEV_IDEPCI=y -# CONFIG_IDEPCI_SHARE_IRQ is not set -CONFIG_IDEPCI_PCIBUS_ORDER=y -# CONFIG_BLK_DEV_OFFBOARD is not set -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_RZ1000 is not set -CONFIG_BLK_DEV_IDEDMA_PCI=y -# CONFIG_BLK_DEV_IDEDMA_FORCED is not set -# CONFIG_IDEDMA_ONLYDISK is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -CONFIG_BLK_DEV_AMD74XX=y -CONFIG_BLK_DEV_ATIIXP=y -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CY82C693 is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT34X is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_SC1200 is not set -CONFIG_BLK_DEV_PIIX=y -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -CONFIG_BLK_DEV_PDC202XX_NEW=y -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SIS5513 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_TC86C001 is not set -# CONFIG_IDE_ARM is not set -CONFIG_BLK_DEV_IDEDMA=y -# CONFIG_IDEDMA_IVB is not set -# CONFIG_BLK_DEV_HD is not set +# CONFIG_INTEL_MENLOW is not set +# CONFIG_ENCLOSURE_SERVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support @@ -499,8 +762,8 @@ CONFIG_BLK_DEV_IDEDMA=y CONFIG_SCSI=y CONFIG_SCSI_DMA=y # CONFIG_SCSI_TGT is not set -CONFIG_SCSI_NETLINK=y -# CONFIG_SCSI_PROC_FS is not set +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) @@ -509,7 +772,7 @@ CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set CONFIG_BLK_DEV_SR=y -# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BLK_DEV_SR_VENDOR=y CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set @@ -526,73 +789,37 @@ CONFIG_SCSI_WAIT_SCAN=m # SCSI Transports # CONFIG_SCSI_SPI_ATTRS=y -CONFIG_SCSI_FC_ATTRS=y +# CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -CONFIG_SCSI_SAS_ATTRS=y +# CONFIG_SCSI_SAS_ATTRS is not set # CONFIG_SCSI_SAS_LIBSAS is not set - -# -# SCSI low-level drivers -# -# CONFIG_ISCSI_TCP is not set -# CONFIG_BLK_DEV_3W_XXXX_RAID is not set -# CONFIG_SCSI_3W_9XXX is not set -# CONFIG_SCSI_ACARD is not set -# CONFIG_SCSI_AACRAID is not set -# CONFIG_SCSI_AIC7XXX is not set -# CONFIG_SCSI_AIC7XXX_OLD is not set -CONFIG_SCSI_AIC79XX=y -CONFIG_AIC79XX_CMDS_PER_DEVICE=32 -CONFIG_AIC79XX_RESET_DELAY_MS=4000 -# CONFIG_AIC79XX_DEBUG_ENABLE is not set -CONFIG_AIC79XX_DEBUG_MASK=0 -# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set -# CONFIG_SCSI_AIC94XX is not set -# CONFIG_SCSI_ARCMSR is not set -# CONFIG_MEGARAID_NEWGEN is not set -# CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_HPTIOP is not set -# CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_SCSI_DMX3191D is not set -# CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_FUTURE_DOMAIN is not set -# CONFIG_SCSI_GDTH is not set -# CONFIG_SCSI_IPS is not set -# CONFIG_SCSI_INITIO is not set -# CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_STEX is not set -# CONFIG_SCSI_SYM53C8XX_2 is not set -# CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set -# CONFIG_SCSI_LPFC is not set -# CONFIG_SCSI_DC395x is not set -# CONFIG_SCSI_DC390T is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_SRP is not set +# CONFIG_SCSI_SRP_ATTRS is not set +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set CONFIG_ATA=y # CONFIG_ATA_NONSTANDARD is not set CONFIG_ATA_ACPI=y +CONFIG_SATA_PMP=y CONFIG_SATA_AHCI=y -CONFIG_SATA_SVW=y +# CONFIG_SATA_SIL24 is not set +CONFIG_ATA_SFF=y +# CONFIG_SATA_SVW is not set CONFIG_ATA_PIIX=y # CONFIG_SATA_MV is not set -CONFIG_SATA_NV=y +# CONFIG_SATA_NV is not set # CONFIG_PDC_ADMA is not set # CONFIG_SATA_QSTOR is not set # CONFIG_SATA_PROMISE is not set # CONFIG_SATA_SX4 is not set -CONFIG_SATA_SIL=y -# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIL is not set # CONFIG_SATA_SIS is not set # CONFIG_SATA_ULI is not set -CONFIG_SATA_VIA=y +# CONFIG_SATA_VIA is not set # CONFIG_SATA_VITESSE is not set # CONFIG_SATA_INIC162X is not set +# CONFIG_PATA_ACPI is not set # CONFIG_PATA_ALI is not set -# CONFIG_PATA_AMD is not set +CONFIG_PATA_AMD=y # CONFIG_PATA_ARTOP is not set # CONFIG_PATA_ATIIXP is not set # CONFIG_PATA_CMD640_PCI is not set @@ -612,11 +839,14 @@ CONFIG_SATA_VIA=y # CONFIG_PATA_TRIFLEX is not set # CONFIG_PATA_MARVELL is not set # CONFIG_PATA_MPIIX is not set -# CONFIG_PATA_OLDPIIX is not set +CONFIG_PATA_OLDPIIX=y # CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set # CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_NS87415 is not set # CONFIG_PATA_OPTI is not set # CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PCMCIA is not set # CONFIG_PATA_PDC_OLD is not set # CONFIG_PATA_RADISYS is not set # CONFIG_PATA_RZ1000 is not set @@ -628,65 +858,42 @@ CONFIG_SATA_VIA=y # CONFIG_PATA_VIA is not set # CONFIG_PATA_WINBOND is not set CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_MD=y +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_RAID0 is not set +# CONFIG_MD_RAID1 is not set +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +# CONFIG_MD_MULTIPATH is not set +# CONFIG_MD_FAULTY is not set CONFIG_BLK_DEV_DM=y # CONFIG_DM_DEBUG is not set # CONFIG_DM_CRYPT is not set # CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_ZERO is not set +CONFIG_DM_MIRROR=y +CONFIG_DM_ZERO=y # CONFIG_DM_MULTIPATH is not set # CONFIG_DM_DELAY is not set - -# -# Fusion MPT device support -# -CONFIG_FUSION=y -CONFIG_FUSION_SPI=y -# CONFIG_FUSION_FC is not set -# CONFIG_FUSION_SAS is not set -CONFIG_FUSION_MAX_SGE=128 -# CONFIG_FUSION_CTL is not set +# CONFIG_DM_UEVENT is not set +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # # CONFIG_FIREWIRE is not set -CONFIG_IEEE1394=y - -# -# Subsystem Options -# -# CONFIG_IEEE1394_VERBOSEDEBUG is not set - -# -# Controllers -# - -# -# Texas Instruments PCILynx requires I2C -# -CONFIG_IEEE1394_OHCI1394=y - -# -# Protocols -# -# CONFIG_IEEE1394_VIDEO1394 is not set -# CONFIG_IEEE1394_SBP2 is not set -# CONFIG_IEEE1394_ETH1394_ROM_ENTRY is not set -# CONFIG_IEEE1394_ETH1394 is not set -# CONFIG_IEEE1394_DV1394 is not set -CONFIG_IEEE1394_RAWIO=y +# CONFIG_IEEE1394 is not set # CONFIG_I2O is not set CONFIG_MACINTOSH_DRIVERS=y -# CONFIG_MAC_EMUMOUSEBTN is not set +CONFIG_MAC_EMUMOUSEBTN=y CONFIG_NETDEVICES=y -CONFIG_NETDEVICES_MULTIQUEUE=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set +# CONFIG_IFB is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set -CONFIG_TUN=y +# CONFIG_TUN is not set +# CONFIG_VETH is not set # CONFIG_NET_SB1000 is not set # CONFIG_ARCNET is not set # CONFIG_PHYLIB is not set @@ -696,39 +903,40 @@ CONFIG_MII=y # CONFIG_SUNGEM is not set # CONFIG_CASSINI is not set CONFIG_NET_VENDOR_3COM=y -CONFIG_VORTEX=y +# CONFIG_VORTEX is not set # CONFIG_TYPHOON is not set CONFIG_NET_TULIP=y # CONFIG_DE2104X is not set -CONFIG_TULIP=y -# CONFIG_TULIP_MWI is not set -# CONFIG_TULIP_MMIO is not set -# CONFIG_TULIP_NAPI is not set +# CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_WINBOND_840 is not set # CONFIG_DM9102 is not set # CONFIG_ULI526X is not set +# CONFIG_PCMCIA_XIRCOM is not set # CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set -CONFIG_AMD8111_ETH=y -# CONFIG_AMD8111E_NAPI is not set +# CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set -CONFIG_B44=y +# CONFIG_B44 is not set CONFIG_FORCEDETH=y # CONFIG_FORCEDETH_NAPI is not set -# CONFIG_DGRS is not set # CONFIG_EEPRO100 is not set CONFIG_E100=y # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set -CONFIG_8139CP=y +# CONFIG_8139CP is not set CONFIG_8139TOO=y -# CONFIG_8139TOO_PIO is not set +CONFIG_8139TOO_PIO=y # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_8139_OLD_RX_RESET is not set +# CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set @@ -740,34 +948,74 @@ CONFIG_NETDEV_1000=y CONFIG_E1000=y # CONFIG_E1000_NAPI is not set # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set +# CONFIG_E1000E is not set +# CONFIG_E1000E_ENABLED is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set # CONFIG_SIS190 is not set # CONFIG_SKGE is not set -# CONFIG_SKY2 is not set +CONFIG_SKY2=y +# CONFIG_SKY2_DEBUG is not set # CONFIG_VIA_VELOCITY is not set CONFIG_TIGON3=y -CONFIG_BNX2=y +# CONFIG_BNX2 is not set # CONFIG_QLA3XXX is not set # CONFIG_ATL1 is not set CONFIG_NETDEV_10000=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +# CONFIG_IXGBE is not set # CONFIG_IXGB is not set -CONFIG_S2IO=m -# CONFIG_S2IO_NAPI is not set +# CONFIG_S2IO is not set # CONFIG_MYRI10GE is not set # CONFIG_NETXEN_NIC is not set +# CONFIG_NIU is not set # CONFIG_MLX4_CORE is not set -# CONFIG_TR is not set +# CONFIG_TEHUTI is not set +# CONFIG_BNX2X is not set +# CONFIG_SFC is not set +CONFIG_TR=y +# CONFIG_IBMOL is not set +# CONFIG_3C359 is not set +# CONFIG_TMS380TR is not set # # Wireless LAN # # CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set +CONFIG_WLAN_80211=y +# CONFIG_PCMCIA_RAYCS is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_LIBERTAS is not set +# CONFIG_AIRO is not set +# CONFIG_HERMES is not set +# CONFIG_ATMEL is not set +# CONFIG_AIRO_CS is not set +# CONFIG_PCMCIA_WL3501 is not set +# CONFIG_PRISM54 is not set +# CONFIG_USB_ZD1201 is not set +# CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set +# CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set +# CONFIG_P54_COMMON is not set +CONFIG_ATH5K=y +# CONFIG_ATH5K_DEBUG is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWLCORE is not set +# CONFIG_IWLWIFI_LEDS is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set +# CONFIG_HOSTAP is not set +# CONFIG_B43 is not set +# CONFIG_B43LEGACY is not set +# CONFIG_ZD1211RW is not set +# CONFIG_RT2X00 is not set # # USB Network Adapters @@ -776,16 +1024,26 @@ CONFIG_S2IO=m # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET_MII is not set # CONFIG_USB_USBNET is not set +CONFIG_NET_PCMCIA=y +# CONFIG_PCMCIA_3C589 is not set +# CONFIG_PCMCIA_3C574 is not set +# CONFIG_PCMCIA_FMVJ18X is not set +# CONFIG_PCMCIA_PCNET is not set +# CONFIG_PCMCIA_NMCLAN is not set +# CONFIG_PCMCIA_SMC91C92 is not set +# CONFIG_PCMCIA_XIRC2PS is not set +# CONFIG_PCMCIA_AXNET is not set # CONFIG_WAN is not set -# CONFIG_FDDI is not set +CONFIG_FDDI=y +# CONFIG_DEFXX is not set +# CONFIG_SKFP is not set # CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set -# CONFIG_SHAPER is not set CONFIG_NETCONSOLE=y +# CONFIG_NETCONSOLE_DYNAMIC is not set CONFIG_NETPOLL=y # CONFIG_NETPOLL_TRAP is not set CONFIG_NET_POLL_CONTROLLER=y @@ -796,18 +1054,17 @@ CONFIG_NET_POLL_CONTROLLER=y # Input device support # CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set +CONFIG_INPUT_FF_MEMLESS=y +CONFIG_INPUT_POLLDEV=y # # Userland interfaces # CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set CONFIG_INPUT_EVDEV=y # CONFIG_INPUT_EVBUG is not set @@ -832,17 +1089,62 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_APPLETOUCH is not set # CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set +CONFIG_INPUT_JOYSTICK=y +# CONFIG_JOYSTICK_ANALOG is not set +# CONFIG_JOYSTICK_A3D is not set +# CONFIG_JOYSTICK_ADI is not set +# CONFIG_JOYSTICK_COBRA is not set +# CONFIG_JOYSTICK_GF2K is not set +# CONFIG_JOYSTICK_GRIP is not set +# CONFIG_JOYSTICK_GRIP_MP is not set +# CONFIG_JOYSTICK_GUILLEMOT is not set +# CONFIG_JOYSTICK_INTERACT is not set +# CONFIG_JOYSTICK_SIDEWINDER is not set +# CONFIG_JOYSTICK_TMDC is not set +# CONFIG_JOYSTICK_IFORCE is not set +# CONFIG_JOYSTICK_WARRIOR is not set +# CONFIG_JOYSTICK_MAGELLAN is not set +# CONFIG_JOYSTICK_SPACEORB is not set +# CONFIG_JOYSTICK_SPACEBALL is not set +# CONFIG_JOYSTICK_STINGER is not set +# CONFIG_JOYSTICK_TWIDJOY is not set +# CONFIG_JOYSTICK_ZHENHUA is not set +# CONFIG_JOYSTICK_JOYDUMP is not set +# CONFIG_JOYSTICK_XPAD is not set +CONFIG_INPUT_TABLET=y +# CONFIG_TABLET_USB_ACECAD is not set +# CONFIG_TABLET_USB_AIPTEK is not set +# CONFIG_TABLET_USB_GTCO is not set +# CONFIG_TABLET_USB_KBTAB is not set +# CONFIG_TABLET_USB_WACOM is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_UCB1400 is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_INPUT_MISC=y +# CONFIG_INPUT_PCSPKR is not set +# CONFIG_INPUT_APANEL is not set +# CONFIG_INPUT_ATLAS_BTNS is not set +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_UINPUT is not set # # Hardware I/O ports # CONFIG_SERIO=y CONFIG_SERIO_I8042=y -# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_SERPORT=y # CONFIG_SERIO_CT82C710 is not set # CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y @@ -855,8 +1157,26 @@ CONFIG_SERIO_LIBPS2=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_SERIAL_NONSTANDARD is not set +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DEVKMEM=y +CONFIG_SERIAL_NONSTANDARD=y +# CONFIG_COMPUTONE is not set +# CONFIG_ROCKETPORT is not set +# CONFIG_CYCLADES is not set +# CONFIG_DIGIEPCA is not set +# CONFIG_MOXA_INTELLIO is not set +# CONFIG_MOXA_SMARTIO is not set +# CONFIG_ISI is not set +# CONFIG_SYNCLINK is not set +# CONFIG_SYNCLINKMP is not set +# CONFIG_SYNCLINK_GT is not set +# CONFIG_N_HDLC is not set +# CONFIG_RISCOM8 is not set +# CONFIG_SPECIALIX is not set +# CONFIG_SX is not set +# CONFIG_RIO is not set +# CONFIG_STALDRV is not set +# CONFIG_NOZOMI is not set # # Serial drivers @@ -866,9 +1186,14 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_PNP=y -CONFIG_SERIAL_8250_NR_UARTS=4 +# CONFIG_SERIAL_8250_CS is not set +CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y # # Non-8250 serial port support @@ -877,78 +1202,260 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_INTEL=y -CONFIG_HW_RANDOM_AMD=y -# CONFIG_NVRAM is not set -CONFIG_RTC=y +# CONFIG_HW_RANDOM_INTEL is not set +# CONFIG_HW_RANDOM_AMD is not set +CONFIG_NVRAM=y # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set -CONFIG_AGP=y -CONFIG_AGP_AMD64=y -CONFIG_AGP_INTEL=y -# CONFIG_AGP_SIS is not set -# CONFIG_AGP_VIA is not set -# CONFIG_DRM is not set + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_IPWIRELESS is not set # CONFIG_MWAVE is not set # CONFIG_PC8736x_GPIO is not set -CONFIG_RAW_DRIVER=y -CONFIG_MAX_RAW_DEVS=256 +# CONFIG_RAW_DRIVER is not set CONFIG_HPET=y # CONFIG_HPET_RTC_IRQ is not set -CONFIG_HPET_MMAP=y +# CONFIG_HPET_MMAP is not set # CONFIG_HANGCHECK_TIMER is not set # CONFIG_TCG_TPM is not set # CONFIG_TELCLOCK is not set CONFIG_DEVPORT=y -# CONFIG_I2C is not set - -# -# SPI support -# +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_CHARDEV is not set + +# +# I2C Hardware Bus support +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +CONFIG_I2C_I801=y +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set +# CONFIG_I2C_TINY_USB is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set +# CONFIG_I2C_PCA_PLATFORM is not set + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_PCF8575 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set # CONFIG_SPI is not set -# CONFIG_SPI_MASTER is not set # CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set # CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +# CONFIG_ACQUIRE_WDT is not set +# CONFIG_ADVANTECH_WDT is not set +# CONFIG_ALIM1535_WDT is not set +# CONFIG_ALIM7101_WDT is not set +# CONFIG_SC520_WDT is not set +# CONFIG_EUROTECH_WDT is not set +# CONFIG_IB700_WDT is not set +# CONFIG_IBMASR is not set +# CONFIG_WAFER_WDT is not set +# CONFIG_I6300ESB_WDT is not set +# CONFIG_ITCO_WDT is not set +# CONFIG_IT8712F_WDT is not set +# CONFIG_HP_WATCHDOG is not set +# CONFIG_SC1200_WDT is not set +# CONFIG_PC87413_WDT is not set +# CONFIG_60XX_WDT is not set +# CONFIG_SBC8360_WDT is not set +# CONFIG_CPU5_WDT is not set +# CONFIG_SMSC37B787_WDT is not set +# CONFIG_W83627HF_WDT is not set +# CONFIG_W83697HF_WDT is not set +# CONFIG_W83877F_WDT is not set +# CONFIG_W83977F_WDT is not set +# CONFIG_MACHZ_WDT is not set +# CONFIG_SBC_EPX_C3_WATCHDOG is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set + +# +# USB-based Watchdog Cards +# +# CONFIG_USBPCWATCHDOG is not set + +# +# Sonics Silicon Backplane +# +CONFIG_SSB_POSSIBLE=y +# CONFIG_SSB is not set # # Multifunction device drivers # # CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set # # Multimedia devices # + +# +# Multimedia core support +# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set + +# +# Multimedia drivers +# CONFIG_DAB=y # CONFIG_USB_DABUSB is not set # # Graphics support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set +CONFIG_AGP=y +CONFIG_AGP_AMD64=y +CONFIG_AGP_INTEL=y +# CONFIG_AGP_SIS is not set +# CONFIG_AGP_VIA is not set +CONFIG_DRM=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_I810 is not set +# CONFIG_DRM_I830 is not set +CONFIG_DRM_I915=y +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_SIS is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_TILEBLITTING=y + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VESA is not set +CONFIG_FB_EFI=y +# CONFIG_FB_IMAC is not set +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_INTEL is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_GEODE is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_CORGI is not set +# CONFIG_BACKLIGHT_PROGEAR is not set # # Display device support # # CONFIG_DISPLAY_SUPPORT is not set -# CONFIG_VGASTATE is not set -# CONFIG_FB is not set # # Console display driver support # CONFIG_VGA_CONSOLE=y CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 +CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIDEO_SELECT=y CONFIG_DUMMY_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y # # Sound @@ -958,33 +1465,165 @@ CONFIG_SOUND=y # # Advanced Linux Sound Architecture # -# CONFIG_SND is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_HWDEP=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +CONFIG_SND_VMASTER=y + +# +# Generic devices +# +# CONFIG_SND_PCSP is not set +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_VIRMIDI is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# PCI devices +# +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALS4000 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5530 is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +CONFIG_SND_HDA_INTEL=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_ATIHDMI=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_HDA_GENERIC=y +# CONFIG_SND_HDA_POWER_SAVE is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_USX2Y is not set +# CONFIG_SND_USB_CAIAQ is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# System on Chip audio support +# +# CONFIG_SND_SOC is not set + +# +# ALSA SoC audio for Freescale SOCs +# + +# +# SoC Audio for the Texas Instruments OMAP +# # # Open Sound System # -CONFIG_SOUND_PRIME=y -# CONFIG_SOUND_TRIDENT is not set -# CONFIG_SOUND_MSNDCLAS is not set -# CONFIG_SOUND_MSNDPIN is not set -# CONFIG_SOUND_OSS is not set +# CONFIG_SOUND_PRIME is not set CONFIG_HID_SUPPORT=y CONFIG_HID=y -# CONFIG_HID_DEBUG is not set +CONFIG_HID_DEBUG=y +CONFIG_HIDRAW=y # # USB Input Devices # CONFIG_USB_HID=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set +CONFIG_USB_HIDINPUT_POWERBOOK=y +CONFIG_HID_FF=y +CONFIG_HID_PID=y +CONFIG_LOGITECH_FF=y +# CONFIG_LOGIRUMBLEPAD2_FF is not set +CONFIG_PANTHERLORD_FF=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_ZEROPLUS_FF=y +CONFIG_USB_HIDDEV=y CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y CONFIG_USB=y -# CONFIG_USB_DEBUG is not set +CONFIG_USB_DEBUG=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y # # Miscellaneous USB options @@ -992,18 +1631,18 @@ CONFIG_USB=y CONFIG_USB_DEVICEFS=y # CONFIG_USB_DEVICE_CLASS is not set # CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_PERSIST is not set +CONFIG_USB_SUSPEND=y # CONFIG_USB_OTG is not set # # USB Host Controller Drivers # +# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_SPLIT_ISO is not set # CONFIG_USB_EHCI_ROOT_HUB_TT is not set # CONFIG_USB_EHCI_TT_NEWSCHED is not set # CONFIG_USB_ISP116X_HCD is not set +# CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set @@ -1036,8 +1675,10 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_ONETOUCH is not set # CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_LIBUSUAL is not set +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set +CONFIG_USB_LIBUSUAL=y # # USB Imaging devices @@ -1049,10 +1690,6 @@ CONFIG_USB_MON=y # # USB port drivers # - -# -# USB Serial Converter support -# # CONFIG_USB_SERIAL is not set # @@ -1078,98 +1715,126 @@ CONFIG_USB_MON=y # CONFIG_USB_TRANCEVIBRATOR is not set # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set +# CONFIG_USB_GADGET is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y # -# USB DSL modem support +# LED drivers # +# CONFIG_LEDS_CLEVO_MAIL is not set # -# USB Gadget Support +# LED Triggers # -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set +CONFIG_LEDS_TRIGGERS=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_EDAC=y # -# LED devices +# Reporting subsystems # -# CONFIG_NEW_LEDS is not set +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_MM_EDAC is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set # -# LED drivers +# RTC interfaces # +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set # -# LED Triggers +# I2C RTC drivers # -# CONFIG_INFINIBAND is not set -# CONFIG_EDAC is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set # -# Real Time Clock +# SPI RTC drivers # -# CONFIG_RTC_CLASS is not set # -# DMA Engine support +# Platform RTC drivers # -# CONFIG_DMA_ENGINE is not set +CONFIG_RTC_DRV_CMOS=y +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set # -# DMA Clients +# on-CPU RTC drivers # +CONFIG_DMADEVICES=y # # DMA Devices # -CONFIG_VIRTUALIZATION=y -# CONFIG_KVM is not set - -# -# Userspace I/O -# +# CONFIG_INTEL_IOATDMA is not set # CONFIG_UIO is not set # # Firmware Drivers # # CONFIG_EDD is not set +CONFIG_EFI_VARS=y # CONFIG_DELL_RBU is not set # CONFIG_DCDBAS is not set CONFIG_DMIID=y +# CONFIG_ISCSI_IBFT_FIND is not set # # File systems # -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT2_FS_POSIX_ACL=y -# CONFIG_EXT2_FS_SECURITY is not set -# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT2_FS is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y -# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT3_FS_SECURITY=y # CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y -CONFIG_REISERFS_FS=y -# CONFIG_REISERFS_CHECK is not set -# CONFIG_REISERFS_PROC_INFO is not set -CONFIG_REISERFS_FS_XATTR=y -CONFIG_REISERFS_FS_POSIX_ACL=y -# CONFIG_REISERFS_FS_SECURITY is not set +# CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set # CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_ROMFS_FS is not set +CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -CONFIG_DNOTIFY=y +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +# CONFIG_QFMT_V1 is not set +CONFIG_QFMT_V2=y +CONFIG_QUOTACTL=y # CONFIG_AUTOFS_FS is not set CONFIG_AUTOFS4_FS=y # CONFIG_FUSE_FS is not set @@ -1180,7 +1845,7 @@ CONFIG_GENERIC_ACL=y # CONFIG_ISO9660_FS=y CONFIG_JOLIET=y -# CONFIG_ZISOFS is not set +CONFIG_ZISOFS=y # CONFIG_UDF_FS is not set # @@ -1198,13 +1863,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE=y CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_HUGETLBFS=y CONFIG_HUGETLB_PAGE=y -CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set # @@ -1212,6 +1877,7 @@ CONFIG_RAMFS=y # # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set @@ -1219,33 +1885,15 @@ CONFIG_RAMFS=y # CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set - -# -# Network File Systems -# -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -# CONFIG_NFS_DIRECTIO is not set -CONFIG_NFSD=y -CONFIG_NFSD_V3=y -# CONFIG_NFSD_V3_ACL is not set -# CONFIG_NFSD_V4 is not set -CONFIG_NFSD_TCP=y -CONFIG_ROOT_NFS=y -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_BIND34 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set +CONFIG_NETWORK_FILESYSTEMS=y +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set @@ -1255,14 +1903,26 @@ CONFIG_SUNRPC=y # # Partition Types # -# CONFIG_PARTITION_ADVANCED is not set +CONFIG_PARTITION_ADVANCED=y +# CONFIG_ACORN_PARTITION is not set +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +# CONFIG_ATARI_PARTITION is not set +CONFIG_MAC_PARTITION=y CONFIG_MSDOS_PARTITION=y - -# -# Native Language Support -# +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +# CONFIG_LDM_PARTITION is not set +CONFIG_SGI_PARTITION=y +# CONFIG_ULTRIX_PARTITION is not set +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_EFI_PARTITION=y +# CONFIG_SYSV68_PARTITION is not set CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y # CONFIG_NLS_CODEPAGE_737 is not set # CONFIG_NLS_CODEPAGE_775 is not set @@ -1297,40 +1957,33 @@ CONFIG_NLS_ISO8859_1=y # CONFIG_NLS_ISO8859_9 is not set # CONFIG_NLS_ISO8859_13 is not set # CONFIG_NLS_ISO8859_14 is not set -CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_ISO8859_15 is not set # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_UTF8=y - -# -# Distributed Lock Manager -# # CONFIG_DLM is not set -# -# Instrumentation Support -# -CONFIG_PROFILING=y -CONFIG_OPROFILE=y -CONFIG_KPROBES=y - # # Kernel hacking # CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_PRINTK_TIME is not set +# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=2048 CONFIG_MAGIC_SYSRQ=y -CONFIG_UNUSED_SYMBOLS=y +# CONFIG_UNUSED_SYMBOLS is not set CONFIG_DEBUG_FS=y # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_DETECT_SOFTLOCKUP is not set # CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set +CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set @@ -1344,28 +1997,162 @@ CONFIG_TIMER_STATS=y CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set # CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set # CONFIG_DEBUG_LIST is not set -# CONFIG_FRAME_POINTER is not set -CONFIG_OPTIMIZE_INLINING=y +# CONFIG_DEBUG_SG is not set +CONFIG_FRAME_POINTER=y +# CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_KPROBES_SANITY_TEST is not set +# CONFIG_BACKTRACE_SELF_TEST is not set # CONFIG_LKDTM is not set # CONFIG_FAULT_INJECTION is not set -# CONFIG_DEBUG_RODATA is not set -# CONFIG_IOMMU_DEBUG is not set +# CONFIG_LATENCYTOP is not set +CONFIG_PROVIDE_OHCI1394_DMA_INIT=y +# CONFIG_SAMPLES is not set +# CONFIG_KGDB is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_STRICT_DEVMEM is not set +CONFIG_EARLY_PRINTK=y CONFIG_DEBUG_STACKOVERFLOW=y -# CONFIG_DEBUG_STACK_USAGE is not set +CONFIG_DEBUG_STACK_USAGE=y +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_PER_CPU_MAPS is not set +# CONFIG_X86_PTDUMP is not set +CONFIG_DEBUG_RODATA=y +# CONFIG_DIRECT_GBPAGES is not set +# CONFIG_DEBUG_RODATA_TEST is not set +CONFIG_DEBUG_NX_TEST=m +CONFIG_X86_MPPARSE=y +# CONFIG_IOMMU_DEBUG is not set +CONFIG_IO_DELAY_TYPE_0X80=0 +CONFIG_IO_DELAY_TYPE_0XED=1 +CONFIG_IO_DELAY_TYPE_UDELAY=2 +CONFIG_IO_DELAY_TYPE_NONE=3 +CONFIG_IO_DELAY_0X80=y +# CONFIG_IO_DELAY_0XED is not set +# CONFIG_IO_DELAY_UDELAY is not set +# CONFIG_IO_DELAY_NONE is not set +CONFIG_DEFAULT_IO_DELAY_TYPE=0 +CONFIG_DEBUG_BOOT_PARAMS=y +# CONFIG_CPA_DEBUG is not set # # Security options # -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_CRYPTO is not set +CONFIG_KEYS=y +CONFIG_KEYS_DEBUG_PROC_KEYS=y +CONFIG_SECURITY=y +CONFIG_SECURITY_NETWORK=y +# CONFIG_SECURITY_NETWORK_XFRM is not set +CONFIG_SECURITY_CAPABILITIES=y +CONFIG_SECURITY_FILE_CAPABILITIES=y +# CONFIG_SECURITY_ROOTPLUG is not set +CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 +CONFIG_SECURITY_SELINUX_DISABLE=y +CONFIG_SECURITY_SELINUX_DEVELOP=y +CONFIG_SECURITY_SELINUX_AVC_STATS=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set +# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set +# CONFIG_SECURITY_SMACK is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_MANAGER=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +CONFIG_CRYPTO_AUTHENC=y +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES_X86_64 is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SALSA20_X86_64 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_TWOFISH_X86_64 is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set +CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set +CONFIG_HAVE_KVM=y +CONFIG_VIRTUALIZATION=y +# CONFIG_KVM is not set +# CONFIG_VIRTIO_PCI is not set +# CONFIG_VIRTIO_BALLOON is not set # # Library routines # CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_FIND_NEXT_BIT=y # CONFIG_CRC_CCITT is not set # CONFIG_CRC16 is not set # CONFIG_CRC_ITU_T is not set diff --git a/arch/x86/es7000/Makefile b/arch/x86/es7000/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..3ef8b43b62fc9e3195904e57d45fd4f2031874d4 --- /dev/null +++ b/arch/x86/es7000/Makefile @@ -0,0 +1,5 @@ +# +# Makefile for the linux kernel. +# + +obj-$(CONFIG_X86_ES7000) := es7000plat.o diff --git a/arch/x86/mach-es7000/es7000.h b/arch/x86/es7000/es7000.h similarity index 89% rename from arch/x86/mach-es7000/es7000.h rename to arch/x86/es7000/es7000.h index c8d5aa132fa078d9f21cd52d550432766f0e8aa6..4e62f6fa95b8999979e47c084320093b4ac4223d 100644 --- a/arch/x86/mach-es7000/es7000.h +++ b/arch/x86/es7000/es7000.h @@ -1,7 +1,7 @@ /* * Written by: Garry Forsgren, Unisys Corporation * Natalie Protasevich, Unisys Corporation - * This file contains the code to configure and interface + * This file contains the code to configure and interface * with Unisys ES7000 series hardware system manager. * * Copyright (c) 2003 Unisys Corporation. All Rights Reserved. @@ -18,7 +18,7 @@ * with this program; if not, write the Free Software Foundation, Inc., 59 * Temple Place - Suite 330, Boston MA 02111-1307, USA. * - * Contact information: Unisys Corporation, Township Line & Union Meeting + * Contact information: Unisys Corporation, Township Line & Union Meeting * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: * * http://www.unisys.com @@ -41,7 +41,7 @@ #define MIP_VALID 0x0100000000000000ULL #define MIP_PORT(VALUE) ((VALUE >> 32) & 0xffff) -#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff) +#define MIP_RD_LO(VALUE) (VALUE & 0xffffffff) struct mip_reg_info { unsigned long long mip_info; @@ -51,11 +51,11 @@ struct mip_reg_info { }; struct part_info { - unsigned char type; + unsigned char type; unsigned char length; unsigned char part_id; unsigned char apic_mode; - unsigned long snum; + unsigned long snum; char ptype[16]; char sname[64]; char pname[64]; @@ -68,11 +68,11 @@ struct psai { }; struct es7000_mem_info { - unsigned char type; + unsigned char type; unsigned char length; unsigned char resv[6]; - unsigned long long start; - unsigned long long size; + unsigned long long start; + unsigned long long size; }; struct es7000_oem_table { @@ -106,7 +106,7 @@ struct mip_reg { }; #define MIP_SW_APIC 0x1020b -#define MIP_FUNC(VALUE) (VALUE & 0xff) +#define MIP_FUNC(VALUE) (VALUE & 0xff) extern int parse_unisys_oem (char *oemptr); extern void setup_unisys(void); diff --git a/arch/x86/mach-es7000/es7000plat.c b/arch/x86/es7000/es7000plat.c similarity index 81% rename from arch/x86/mach-es7000/es7000plat.c rename to arch/x86/es7000/es7000plat.c index f5d6f7d8b86ec2ed6d218a2dd0aca3e36115e841..7789fde13c3fc21a07eb63437c7c16f2b0c87d08 100644 --- a/arch/x86/mach-es7000/es7000plat.c +++ b/arch/x86/es7000/es7000plat.c @@ -52,6 +52,8 @@ static struct mip_reg *host_reg; static int mip_port; static unsigned long mip_addr, host_addr; +int es7000_plat; + /* * GSI override for ES7000 platforms. */ @@ -70,7 +72,7 @@ es7000_rename_gsi(int ioapic, int gsi) base += nr_ioapic_registers[i]; } - if (!ioapic && (gsi < 16)) + if (!ioapic && (gsi < 16)) gsi += base; return gsi; } @@ -128,10 +130,10 @@ parse_unisys_oem (char *oemptr) mip_addr = val; mip = (struct mip_reg *)val; mip_reg = __va(mip); - Dprintk("es7000_mipcfg: host_reg = 0x%lx \n", - (unsigned long)host_reg); - Dprintk("es7000_mipcfg: mip_reg = 0x%lx \n", - (unsigned long)mip_reg); + pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", + (unsigned long)host_reg); + pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", + (unsigned long)mip_reg); success++; break; case MIP_PSAI_REG: @@ -175,53 +177,6 @@ find_unisys_acpi_oem_table(unsigned long *oem_addr) } #endif -/* - * This file also gets compiled if CONFIG_X86_GENERICARCH is set. Generic - * arch already has got following function definitions (asm-generic/es7000.c) - * hence no need to define these for that case. - */ -#ifndef CONFIG_X86_GENERICARCH -void es7000_sw_apic(void); -void __init enable_apic_mode(void) -{ - es7000_sw_apic(); - return; -} - -__init int mps_oem_check(struct mp_config_table *mpc, char *oem, - char *productid) -{ - if (mpc->mpc_oemptr) { - struct mp_config_oemtable *oem_table = - (struct mp_config_oemtable *)mpc->mpc_oemptr; - if (!strncmp(oem, "UNISYS", 6)) - return parse_unisys_oem((char *)oem_table); - } - return 0; -} -#ifdef CONFIG_ACPI -/* Hook from generic ACPI tables.c */ -int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) -{ - unsigned long oem_addr; - if (!find_unisys_acpi_oem_table(&oem_addr)) { - if (es7000_check_dsdt()) - return parse_unisys_oem((char *)oem_addr); - else { - setup_unisys(); - return 1; - } - } - return 0; -} -#else -int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) -{ - return 0; -} -#endif -#endif /* COFIG_X86_GENERICARCH */ - static void es7000_spin(int n) { diff --git a/arch/x86/ia32/ia32_aout.c b/arch/x86/ia32/ia32_aout.c index 58cccb6483b0580d28d935b4692f62b2675f7d02..a0e1dbe67dc145cd437661ea2f472c9865e08578 100644 --- a/arch/x86/ia32/ia32_aout.c +++ b/arch/x86/ia32/ia32_aout.c @@ -441,12 +441,6 @@ beyond_if: regs->r8 = regs->r9 = regs->r10 = regs->r11 = regs->r12 = regs->r13 = regs->r14 = regs->r15 = 0; set_fs(USER_DS); - if (unlikely(current->ptrace & PT_PTRACED)) { - if (current->ptrace & PT_TRACE_EXEC) - ptrace_notify((PTRACE_EVENT_EXEC << 8) | SIGTRAP); - else - send_sig(SIGTRAP, current, 0); - } return 0; } diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c index cb3856a18c8544e1ffe722d33a7713439043829d..20af4c79579a88ce1da6860e774c7440bc793b56 100644 --- a/arch/x86/ia32/ia32_signal.c +++ b/arch/x86/ia32/ia32_signal.c @@ -36,6 +36,11 @@ #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) +#define FIX_EFLAGS (X86_EFLAGS_AC | X86_EFLAGS_OF | \ + X86_EFLAGS_DF | X86_EFLAGS_TF | X86_EFLAGS_SF | \ + X86_EFLAGS_ZF | X86_EFLAGS_AF | X86_EFLAGS_PF | \ + X86_EFLAGS_CF) + asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset); void signal_fault(struct pt_regs *regs, void __user *frame, char *where); @@ -248,7 +253,7 @@ static int ia32_restore_sigcontext(struct pt_regs *regs, regs->ss |= 3; err |= __get_user(tmpflags, &sc->flags); - regs->flags = (regs->flags & ~0x40DD5) | (tmpflags & 0x40DD5); + regs->flags = (regs->flags & ~FIX_EFLAGS) | (tmpflags & FIX_EFLAGS); /* disable syscall checks */ regs->orig_ax = -1; @@ -515,7 +520,6 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, compat_sigset_t *set, struct pt_regs *regs) { struct rt_sigframe __user *frame; - struct exec_domain *ed = current_thread_info()->exec_domain; void __user *restorer; int err = 0; @@ -538,8 +542,7 @@ int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, if (!access_ok(VERIFY_WRITE, frame, sizeof(*frame))) goto give_sigsegv; - err |= __put_user((ed && ed->signal_invmap && sig < 32 - ? ed->signal_invmap[sig] : sig), &frame->sig); + err |= __put_user(sig, &frame->sig); err |= __put_user(ptr_to_compat(&frame->info), &frame->pinfo); err |= __put_user(ptr_to_compat(&frame->uc), &frame->puc); err |= copy_siginfo_to_user32(&frame->info, info); diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S index b5e329da166cfa2a48a74339a47539739ec939ac..ffc1bb4fed7d1ade2ed385597fd05464fea55528 100644 --- a/arch/x86/ia32/ia32entry.S +++ b/arch/x86/ia32/ia32entry.S @@ -15,6 +15,16 @@ #include #include +/* Avoid __ASSEMBLER__'ifying just for this. */ +#include +#define AUDIT_ARCH_I386 (EM_386|__AUDIT_ARCH_LE) +#define __AUDIT_ARCH_LE 0x40000000 + +#ifndef CONFIG_AUDITSYSCALL +#define sysexit_audit int_ret_from_sys_call +#define sysretl_audit int_ret_from_sys_call +#endif + #define IA32_NR_syscalls ((ia32_syscall_end - ia32_sys_call_table)/8) .macro IA32_ARG_FIXUP noebp=0 @@ -37,6 +47,11 @@ movq %rax,R8(%rsp) .endm + /* + * Reload arg registers from stack in case ptrace changed them. + * We don't reload %eax because syscall_trace_enter() returned + * the value it wants us to use in the table lookup. + */ .macro LOAD_ARGS32 offset movl \offset(%rsp),%r11d movl \offset+8(%rsp),%r10d @@ -46,7 +61,6 @@ movl \offset+48(%rsp),%edx movl \offset+56(%rsp),%esi movl \offset+64(%rsp),%edi - movl \offset+72(%rsp),%eax .endm .macro CFI_STARTPROC32 simple @@ -61,6 +75,19 @@ CFI_UNDEFINED r15 .endm +#ifdef CONFIG_PARAVIRT +ENTRY(native_usergs_sysret32) + swapgs + sysretl +ENDPROC(native_usergs_sysret32) + +ENTRY(native_irq_enable_sysexit) + swapgs + sti + sysexit +ENDPROC(native_irq_enable_sysexit) +#endif + /* * 32bit SYSENTER instruction entry. * @@ -85,14 +112,14 @@ ENTRY(ia32_sysenter_target) CFI_SIGNAL_FRAME CFI_DEF_CFA rsp,0 CFI_REGISTER rsp,rbp - swapgs + SWAPGS_UNSAFE_STACK movq %gs:pda_kernelstack, %rsp addq $(PDA_STACKOFFSET),%rsp /* * No need to follow this irqs on/off section: the syscall * disabled irqs, here we enable it straight after entry: */ - sti + ENABLE_INTERRUPTS(CLBR_NONE) movl %ebp,%ebp /* zero extension */ pushq $__USER32_DS CFI_ADJUST_CFA_OFFSET 8 @@ -103,7 +130,7 @@ ENTRY(ia32_sysenter_target) pushfq CFI_ADJUST_CFA_OFFSET 8 /*CFI_REL_OFFSET rflags,0*/ - movl 8*3-THREAD_SIZE+threadinfo_sysenter_return(%rsp), %r10d + movl 8*3-THREAD_SIZE+TI_sysenter_return(%rsp), %r10d CFI_REGISTER rip,r10 pushq $__USER32_CS CFI_ADJUST_CFA_OFFSET 8 @@ -123,22 +150,24 @@ ENTRY(ia32_sysenter_target) .quad 1b,ia32_badarg .previous GET_THREAD_INFO(%r10) - orl $TS_COMPAT,threadinfo_status(%r10) - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),threadinfo_flags(%r10) + orl $TS_COMPAT,TI_status(%r10) + testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) CFI_REMEMBER_STATE jnz sysenter_tracesys -sysenter_do_call: cmpl $(IA32_NR_syscalls-1),%eax ja ia32_badsys +sysenter_do_call: IA32_ARG_FIXUP 1 +sysenter_dispatch: call *ia32_sys_call_table(,%rax,8) movq %rax,RAX-ARGOFFSET(%rsp) GET_THREAD_INFO(%r10) - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF - testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) - jnz int_ret_from_sys_call - andl $~TS_COMPAT,threadinfo_status(%r10) + testl $_TIF_ALLWORK_MASK,TI_flags(%r10) + jnz sysexit_audit +sysexit_from_sys_call: + andl $~TS_COMPAT,TI_status(%r10) /* clear IF, that popfq doesn't enable interrupts early */ andl $~0x200,EFLAGS-R11(%rsp) movl RIP-R11(%rsp),%edx /* User %eip */ @@ -151,14 +180,65 @@ sysenter_do_call: CFI_ADJUST_CFA_OFFSET -8 CFI_REGISTER rsp,rcx TRACE_IRQS_ON - swapgs - sti /* sti only takes effect after the next instruction */ - /* sysexit */ - .byte 0xf, 0x35 + ENABLE_INTERRUPTS_SYSEXIT32 -sysenter_tracesys: +#ifdef CONFIG_AUDITSYSCALL + .macro auditsys_entry_common + movl %esi,%r9d /* 6th arg: 4th syscall arg */ + movl %edx,%r8d /* 5th arg: 3rd syscall arg */ + /* (already in %ecx) 4th arg: 2nd syscall arg */ + movl %ebx,%edx /* 3rd arg: 1st syscall arg */ + movl %eax,%esi /* 2nd arg: syscall number */ + movl $AUDIT_ARCH_I386,%edi /* 1st arg: audit arch */ + call audit_syscall_entry + movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall number */ + cmpl $(IA32_NR_syscalls-1),%eax + ja ia32_badsys + movl %ebx,%edi /* reload 1st syscall arg */ + movl RCX-ARGOFFSET(%rsp),%esi /* reload 2nd syscall arg */ + movl RDX-ARGOFFSET(%rsp),%edx /* reload 3rd syscall arg */ + movl RSI-ARGOFFSET(%rsp),%ecx /* reload 4th syscall arg */ + movl RDI-ARGOFFSET(%rsp),%r8d /* reload 5th syscall arg */ + .endm + + .macro auditsys_exit exit,ebpsave=RBP + testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) + jnz int_ret_from_sys_call + TRACE_IRQS_ON + sti + movl %eax,%esi /* second arg, syscall return value */ + cmpl $0,%eax /* is it < 0? */ + setl %al /* 1 if so, 0 if not */ + movzbl %al,%edi /* zero-extend that into %edi */ + inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ + call audit_syscall_exit + GET_THREAD_INFO(%r10) + movl RAX-ARGOFFSET(%rsp),%eax /* reload syscall return value */ + movl \ebpsave-ARGOFFSET(%rsp),%ebp /* reload user register value */ + movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi + cli + TRACE_IRQS_OFF + testl %edi,TI_flags(%r10) + jnz int_with_check + jmp \exit + .endm + +sysenter_auditsys: CFI_RESTORE_STATE + auditsys_entry_common + movl %ebp,%r9d /* reload 6th syscall arg */ + jmp sysenter_dispatch + +sysexit_audit: + auditsys_exit sysexit_from_sys_call +#endif + +sysenter_tracesys: xchgl %r9d,%ebp +#ifdef CONFIG_AUDITSYSCALL + testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) + jz sysenter_auditsys +#endif SAVE_REST CLEAR_RREGS movq %r9,R9(%rsp) @@ -200,7 +280,7 @@ ENTRY(ia32_cstar_target) CFI_DEF_CFA rsp,PDA_STACKOFFSET CFI_REGISTER rip,rcx /*CFI_REGISTER rflags,r11*/ - swapgs + SWAPGS_UNSAFE_STACK movl %esp,%r8d CFI_REGISTER rsp,r8 movq %gs:pda_kernelstack,%rsp @@ -208,7 +288,7 @@ ENTRY(ia32_cstar_target) * No need to follow this irqs on/off section: the syscall * disabled irqs and here we enable it straight after entry: */ - sti + ENABLE_INTERRUPTS(CLBR_NONE) SAVE_ARGS 8,1,1 movl %eax,%eax /* zero extension */ movq %rax,ORIG_RAX-ARGOFFSET(%rsp) @@ -230,22 +310,24 @@ ENTRY(ia32_cstar_target) .quad 1b,ia32_badarg .previous GET_THREAD_INFO(%r10) - orl $TS_COMPAT,threadinfo_status(%r10) - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),threadinfo_flags(%r10) + orl $TS_COMPAT,TI_status(%r10) + testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) CFI_REMEMBER_STATE jnz cstar_tracesys cstar_do_call: cmpl $IA32_NR_syscalls-1,%eax ja ia32_badsys IA32_ARG_FIXUP 1 +cstar_dispatch: call *ia32_sys_call_table(,%rax,8) movq %rax,RAX-ARGOFFSET(%rsp) GET_THREAD_INFO(%r10) - cli + DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF - testl $_TIF_ALLWORK_MASK,threadinfo_flags(%r10) - jnz int_ret_from_sys_call - andl $~TS_COMPAT,threadinfo_status(%r10) + testl $_TIF_ALLWORK_MASK,TI_flags(%r10) + jnz sysretl_audit +sysretl_from_sys_call: + andl $~TS_COMPAT,TI_status(%r10) RESTORE_ARGS 1,-ARG_SKIP,1,1,1 movl RIP-ARGOFFSET(%rsp),%ecx CFI_REGISTER rip,rcx @@ -254,11 +336,25 @@ cstar_do_call: TRACE_IRQS_ON movl RSP-ARGOFFSET(%rsp),%esp CFI_RESTORE rsp - swapgs - sysretl + USERGS_SYSRET32 -cstar_tracesys: +#ifdef CONFIG_AUDITSYSCALL +cstar_auditsys: CFI_RESTORE_STATE + movl %r9d,R9-ARGOFFSET(%rsp) /* register to be clobbered by call */ + auditsys_entry_common + movl R9-ARGOFFSET(%rsp),%r9d /* reload 6th syscall arg */ + jmp cstar_dispatch + +sysretl_audit: + auditsys_exit sysretl_from_sys_call, RCX /* user %ebp in RCX slot */ +#endif + +cstar_tracesys: +#ifdef CONFIG_AUDITSYSCALL + testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%r10) + jz cstar_auditsys +#endif xchgl %r9d,%ebp SAVE_REST CLEAR_RREGS @@ -310,12 +406,13 @@ ENTRY(ia32_syscall) /*CFI_REL_OFFSET rflags,EFLAGS-RIP*/ /*CFI_REL_OFFSET cs,CS-RIP*/ CFI_REL_OFFSET rip,RIP-RIP - swapgs + PARAVIRT_ADJUST_EXCEPTION_FRAME + SWAPGS /* * No need to follow this irqs on/off section: the syscall * disabled irqs and here we enable it straight after entry: */ - sti + ENABLE_INTERRUPTS(CLBR_NONE) movl %eax,%eax pushq %rax CFI_ADJUST_CFA_OFFSET 8 @@ -324,8 +421,8 @@ ENTRY(ia32_syscall) this could be a problem. */ SAVE_ARGS 0,0,1 GET_THREAD_INFO(%r10) - orl $TS_COMPAT,threadinfo_status(%r10) - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),threadinfo_flags(%r10) + orl $TS_COMPAT,TI_status(%r10) + testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%r10) jnz ia32_tracesys ia32_do_syscall: cmpl $(IA32_NR_syscalls-1),%eax @@ -370,13 +467,11 @@ quiet_ni_syscall: PTREGSCALL stub32_rt_sigreturn, sys32_rt_sigreturn, %rdi PTREGSCALL stub32_sigreturn, sys32_sigreturn, %rdi PTREGSCALL stub32_sigaltstack, sys32_sigaltstack, %rdx - PTREGSCALL stub32_sigsuspend, sys32_sigsuspend, %rcx PTREGSCALL stub32_execve, sys32_execve, %rcx PTREGSCALL stub32_fork, sys_fork, %rdi PTREGSCALL stub32_clone, sys32_clone, %rdx PTREGSCALL stub32_vfork, sys_vfork, %rdi PTREGSCALL stub32_iopl, sys_iopl, %rsi - PTREGSCALL stub32_rt_sigsuspend, sys_rt_sigsuspend, %rdx ENTRY(ia32_ptregs_common) popq %r11 @@ -476,7 +571,7 @@ ia32_sys_call_table: .quad sys_ssetmask .quad sys_setreuid16 /* 70 */ .quad sys_setregid16 - .quad stub32_sigsuspend + .quad sys32_sigsuspend .quad compat_sys_sigpending .quad sys_sethostname .quad compat_sys_setrlimit /* 75 */ @@ -583,7 +678,7 @@ ia32_sys_call_table: .quad sys32_rt_sigpending .quad compat_sys_rt_sigtimedwait .quad sys32_rt_sigqueueinfo - .quad stub32_rt_sigsuspend + .quad sys_rt_sigsuspend .quad sys32_pread /* 180 */ .quad sys32_pwrite .quad sys_chown16 @@ -731,4 +826,10 @@ ia32_sys_call_table: .quad sys32_fallocate .quad compat_sys_timerfd_settime /* 325 */ .quad compat_sys_timerfd_gettime + .quad compat_sys_signalfd4 + .quad sys_eventfd2 + .quad sys_epoll_create1 + .quad sys_dup3 /* 330 */ + .quad sys_pipe2 + .quad sys_inotify_init1 ia32_syscall_end: diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c index f00afdf61e6735bbee01085fa24dc42ea529bed7..d3c64088b981f02fe5614ec53c3539b5bd3b703a 100644 --- a/arch/x86/ia32/sys_ia32.c +++ b/arch/x86/ia32/sys_ia32.c @@ -238,7 +238,7 @@ asmlinkage long sys32_pipe(int __user *fd) int retval; int fds[2]; - retval = do_pipe(fds); + retval = do_pipe_flags(fds, 0); if (retval) goto out; if (copy_to_user(fd, fds, sizeof(fds))) diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 77807d4769c99c455237a810fe0edd0f996fb31f..a07ec14f33122c5531586d15a7e48251f31f9464 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile @@ -2,10 +2,17 @@ # Makefile for the linux kernel. # -extra-y := head_$(BITS).o head$(BITS).o init_task.o vmlinux.lds +extra-y := head_$(BITS).o head$(BITS).o head.o init_task.o vmlinux.lds CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE) +ifdef CONFIG_FTRACE +# Do not profile debug and lowlevel utilities +CFLAGS_REMOVE_tsc.o = -pg +CFLAGS_REMOVE_rtc.o = -pg +CFLAGS_REMOVE_paravirt.o = -pg +endif + # # vsyscalls (which work on the user stack) should have # no stack-protector checks: @@ -13,20 +20,21 @@ CPPFLAGS_vmlinux.lds += -U$(UTS_MACHINE) nostackp := $(call cc-option, -fno-stack-protector) CFLAGS_vsyscall_64.o := $(PROFILING) -g0 $(nostackp) CFLAGS_hpet.o := $(nostackp) -CFLAGS_tsc_64.o := $(nostackp) +CFLAGS_tsc.o := $(nostackp) obj-y := process_$(BITS).o signal_$(BITS).o entry_$(BITS).o obj-y += traps_$(BITS).o irq_$(BITS).o obj-y += time_$(BITS).o ioport.o ldt.o -obj-y += setup_$(BITS).o i8259_$(BITS).o setup.o +obj-y += setup.o i8259.o irqinit_$(BITS).o setup_percpu.o +obj-$(CONFIG_X86_VISWS) += visws_quirks.o +obj-$(CONFIG_X86_32) += probe_roms_32.o obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o -obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o setup64.o -obj-y += bootflag.o e820_$(BITS).o +obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o +obj-y += bootflag.o e820.o obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o obj-y += alternative.o i8253.o pci-nommu.o -obj-$(CONFIG_X86_64) += bugs_64.o -obj-y += tsc_$(BITS).o io_delay.o rtc.o +obj-y += tsc.o io_delay.o rtc.o obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o obj-y += process.o @@ -53,9 +61,10 @@ obj-$(CONFIG_X86_32_SMP) += smpcommon.o obj-$(CONFIG_X86_64_SMP) += tsc_sync.o smpcommon.o obj-$(CONFIG_X86_TRAMPOLINE) += trampoline_$(BITS).o obj-$(CONFIG_X86_MPPARSE) += mpparse.o -obj-$(CONFIG_X86_LOCAL_APIC) += apic_$(BITS).o nmi_$(BITS).o +obj-$(CONFIG_X86_LOCAL_APIC) += apic_$(BITS).o nmi.o obj-$(CONFIG_X86_IO_APIC) += io_apic_$(BITS).o obj-$(CONFIG_X86_REBOOTFIXUPS) += reboot_fixups_32.o +obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_KEXEC) += machine_kexec_$(BITS).o obj-$(CONFIG_KEXEC) += relocate_kernel_$(BITS).o crash.o obj-$(CONFIG_CRASH_DUMP) += crash_dump_$(BITS).o @@ -64,7 +73,6 @@ obj-$(CONFIG_X86_SUMMIT_NUMA) += summit_32.o obj-y += vsmp_64.o obj-$(CONFIG_KPROBES) += kprobes.o obj-$(CONFIG_MODULES) += module_$(BITS).o -obj-$(CONFIG_ACPI_SRAT) += srat_32.o obj-$(CONFIG_EFI) += efi.o efi_$(BITS).o efi_stub_$(BITS).o obj-$(CONFIG_DOUBLEFAULT) += doublefault_32.o obj-$(CONFIG_KGDB) += kgdb.o @@ -94,12 +102,16 @@ obj-$(CONFIG_OLPC) += olpc.o ### # 64 bit specific files ifeq ($(CONFIG_X86_64),y) - obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o + obj-y += genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o + obj-y += bios_uv.o + obj-y += genx2apic_cluster.o + obj-y += genx2apic_phys.o obj-$(CONFIG_X86_PM_TIMER) += pmtimer_64.o obj-$(CONFIG_AUDIT) += audit_64.o obj-$(CONFIG_GART_IOMMU) += pci-gart_64.o aperture_64.o obj-$(CONFIG_CALGARY_IOMMU) += pci-calgary_64.o tce_64.o + obj-$(CONFIG_AMD_IOMMU) += amd_iommu_init.o amd_iommu.o obj-$(CONFIG_SWIOTLB) += pci-swiotlb_64.o obj-$(CONFIG_PCI_MMCONFIG) += mmconf-fam10h_64.o diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 33c5216fd3e1f5137b0b8c52fa8178ac328d630a..12e260e8fb2a9c35a2434bf13d156187191fc257 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include #include @@ -106,21 +107,6 @@ static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; */ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; -#ifdef CONFIG_X86_64 - -/* rely on all ACPI tables being in the direct mapping */ -char *__init __acpi_map_table(unsigned long phys_addr, unsigned long size) -{ - if (!phys_addr || !size) - return NULL; - - if (phys_addr+size <= (max_pfn_mapped << PAGE_SHIFT) + PAGE_SIZE) - return __va(phys_addr); - - return NULL; -} - -#else /* * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, @@ -139,11 +125,15 @@ char *__init __acpi_map_table(unsigned long phys, unsigned long size) unsigned long base, offset, mapped_size; int idx; - if (phys + size < 8 * 1024 * 1024) + if (!phys || !size) + return NULL; + + if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) return __va(phys); offset = phys & (PAGE_SIZE - 1); mapped_size = PAGE_SIZE - offset; + clear_fixmap(FIX_ACPI_END); set_fixmap(FIX_ACPI_END, phys); base = fix_to_virt(FIX_ACPI_END); @@ -155,13 +145,13 @@ char *__init __acpi_map_table(unsigned long phys, unsigned long size) if (--idx < FIX_ACPI_BEGIN) return NULL; /* cannot handle this */ phys += PAGE_SIZE; + clear_fixmap(idx); set_fixmap(idx, phys); mapped_size += PAGE_SIZE; } return ((unsigned char *)base + offset); } -#endif #ifdef CONFIG_PCI_MMCONFIG /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ @@ -338,8 +328,6 @@ acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long e #ifdef CONFIG_X86_IO_APIC -struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS]; - static int __init acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) { @@ -514,8 +502,6 @@ int acpi_register_gsi(u32 gsi, int triggering, int polarity) * Make sure all (legacy) PCI IRQs are set as level-triggered. */ if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { - extern void eisa_set_level_irq(unsigned int irq); - if (triggering == ACPI_LEVEL_SENSITIVE) eisa_set_level_irq(gsi); } @@ -775,7 +761,7 @@ static void __init acpi_register_lapic_address(unsigned long address) set_fixmap_nocache(FIX_APIC_BASE, address); if (boot_cpu_physical_apicid == -1U) { - boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); + boot_cpu_physical_apicid = read_apic_id(); #ifdef CONFIG_X86_32 apic_version[boot_cpu_physical_apicid] = GET_APIC_VERSION(apic_read(APIC_LVR)); @@ -860,6 +846,364 @@ static int __init acpi_parse_madt_lapic_entries(void) #endif /* CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_IO_APIC +#define MP_ISA_BUS 0 + +#ifdef CONFIG_X86_ES7000 +extern int es7000_plat; +#endif + +static struct { + int apic_id; + int gsi_base; + int gsi_end; + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); +} mp_ioapic_routing[MAX_IO_APICS]; + +static int mp_find_ioapic(int gsi) +{ + int i = 0; + + /* Find the IOAPIC that manages this GSI. */ + for (i = 0; i < nr_ioapics; i++) { + if ((gsi >= mp_ioapic_routing[i].gsi_base) + && (gsi <= mp_ioapic_routing[i].gsi_end)) + return i; + } + + printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); + return -1; +} + +static u8 __init uniq_ioapic_id(u8 id) +{ +#ifdef CONFIG_X86_32 + if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && + !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) + return io_apic_get_unique_id(nr_ioapics, id); + else + return id; +#else + int i; + DECLARE_BITMAP(used, 256); + bitmap_zero(used, 256); + for (i = 0; i < nr_ioapics; i++) { + struct mp_config_ioapic *ia = &mp_ioapics[i]; + __set_bit(ia->mp_apicid, used); + } + if (!test_bit(id, used)) + return id; + return find_first_zero_bit(used, 256); +#endif +} + +static int bad_ioapic(unsigned long address) +{ + if (nr_ioapics >= MAX_IO_APICS) { + printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " + "(found %d)\n", MAX_IO_APICS, nr_ioapics); + panic("Recompile kernel with bigger MAX_IO_APICS!\n"); + } + if (!address) { + printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" + " found in table, skipping!\n"); + return 1; + } + return 0; +} + +void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) +{ + int idx = 0; + + if (bad_ioapic(address)) + return; + + idx = nr_ioapics; + + mp_ioapics[idx].mp_type = MP_IOAPIC; + mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; + mp_ioapics[idx].mp_apicaddr = address; + + set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); + mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); +#ifdef CONFIG_X86_32 + mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); +#else + mp_ioapics[idx].mp_apicver = 0; +#endif + /* + * Build basic GSI lookup table to facilitate gsi->io_apic lookups + * and to prevent reprogramming of IOAPIC pins (PCI GSIs). + */ + mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; + mp_ioapic_routing[idx].gsi_base = gsi_base; + mp_ioapic_routing[idx].gsi_end = gsi_base + + io_apic_get_redir_entries(idx); + + printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " + "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, + mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, + mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); + + nr_ioapics++; +} + +static void assign_to_mp_irq(struct mp_config_intsrc *m, + struct mp_config_intsrc *mp_irq) +{ + memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); +} + +static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, + struct mp_config_intsrc *m) +{ + return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); +} + +static void save_mp_irq(struct mp_config_intsrc *m) +{ + int i; + + for (i = 0; i < mp_irq_entries; i++) { + if (!mp_irq_cmp(&mp_irqs[i], m)) + return; + } + + assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); + if (++mp_irq_entries == MAX_IRQ_SOURCES) + panic("Max # of irq sources exceeded!!\n"); +} + +void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) +{ + int ioapic; + int pin; + struct mp_config_intsrc mp_irq; + + /* + * Convert 'gsi' to 'ioapic.pin'. + */ + ioapic = mp_find_ioapic(gsi); + if (ioapic < 0) + return; + pin = gsi - mp_ioapic_routing[ioapic].gsi_base; + + /* + * TBD: This check is for faulty timer entries, where the override + * erroneously sets the trigger to level, resulting in a HUGE + * increase of timer interrupts! + */ + if ((bus_irq == 0) && (trigger == 3)) + trigger = 1; + + mp_irq.mp_type = MP_INTSRC; + mp_irq.mp_irqtype = mp_INT; + mp_irq.mp_irqflag = (trigger << 2) | polarity; + mp_irq.mp_srcbus = MP_ISA_BUS; + mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ + mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ + mp_irq.mp_dstirq = pin; /* INTIN# */ + + save_mp_irq(&mp_irq); +} + +void __init mp_config_acpi_legacy_irqs(void) +{ + int i; + int ioapic; + unsigned int dstapic; + struct mp_config_intsrc mp_irq; + +#if defined (CONFIG_MCA) || defined (CONFIG_EISA) + /* + * Fabricate the legacy ISA bus (bus #31). + */ + mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; +#endif + set_bit(MP_ISA_BUS, mp_bus_not_pci); + pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); + +#ifdef CONFIG_X86_ES7000 + /* + * Older generations of ES7000 have no legacy identity mappings + */ + if (es7000_plat == 1) + return; +#endif + + /* + * Locate the IOAPIC that manages the ISA IRQs (0-15). + */ + ioapic = mp_find_ioapic(0); + if (ioapic < 0) + return; + dstapic = mp_ioapics[ioapic].mp_apicid; + + /* + * Use the default configuration for the IRQs 0-15. Unless + * overridden by (MADT) interrupt source override entries. + */ + for (i = 0; i < 16; i++) { + int idx; + + for (idx = 0; idx < mp_irq_entries; idx++) { + struct mp_config_intsrc *irq = mp_irqs + idx; + + /* Do we already have a mapping for this ISA IRQ? */ + if (irq->mp_srcbus == MP_ISA_BUS + && irq->mp_srcbusirq == i) + break; + + /* Do we already have a mapping for this IOAPIC pin */ + if (irq->mp_dstapic == dstapic && + irq->mp_dstirq == i) + break; + } + + if (idx != mp_irq_entries) { + printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); + continue; /* IRQ already used */ + } + + mp_irq.mp_type = MP_INTSRC; + mp_irq.mp_irqflag = 0; /* Conforming */ + mp_irq.mp_srcbus = MP_ISA_BUS; + mp_irq.mp_dstapic = dstapic; + mp_irq.mp_irqtype = mp_INT; + mp_irq.mp_srcbusirq = i; /* Identity mapped */ + mp_irq.mp_dstirq = i; + + save_mp_irq(&mp_irq); + } +} + +int mp_register_gsi(u32 gsi, int triggering, int polarity) +{ + int ioapic; + int ioapic_pin; +#ifdef CONFIG_X86_32 +#define MAX_GSI_NUM 4096 +#define IRQ_COMPRESSION_START 64 + + static int pci_irq = IRQ_COMPRESSION_START; + /* + * Mapping between Global System Interrupts, which + * represent all possible interrupts, and IRQs + * assigned to actual devices. + */ + static int gsi_to_irq[MAX_GSI_NUM]; +#else + + if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) + return gsi; +#endif + + /* Don't set up the ACPI SCI because it's already set up */ + if (acpi_gbl_FADT.sci_interrupt == gsi) + return gsi; + + ioapic = mp_find_ioapic(gsi); + if (ioapic < 0) { + printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); + return gsi; + } + + ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; + +#ifdef CONFIG_X86_32 + if (ioapic_renumber_irq) + gsi = ioapic_renumber_irq(ioapic, gsi); +#endif + + /* + * Avoid pin reprogramming. PRTs typically include entries + * with redundant pin->gsi mappings (but unique PCI devices); + * we only program the IOAPIC on the first. + */ + if (ioapic_pin > MP_MAX_IOAPIC_PIN) { + printk(KERN_ERR "Invalid reference to IOAPIC pin " + "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, + ioapic_pin); + return gsi; + } + if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { + pr_debug(KERN_DEBUG "Pin %d-%d already programmed\n", + mp_ioapic_routing[ioapic].apic_id, ioapic_pin); +#ifdef CONFIG_X86_32 + return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); +#else + return gsi; +#endif + } + + set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); +#ifdef CONFIG_X86_32 + /* + * For GSI >= 64, use IRQ compression + */ + if ((gsi >= IRQ_COMPRESSION_START) + && (triggering == ACPI_LEVEL_SENSITIVE)) { + /* + * For PCI devices assign IRQs in order, avoiding gaps + * due to unused I/O APIC pins. + */ + int irq = gsi; + if (gsi < MAX_GSI_NUM) { + /* + * Retain the VIA chipset work-around (gsi > 15), but + * avoid a problem where the 8254 timer (IRQ0) is setup + * via an override (so it's not on pin 0 of the ioapic), + * and at the same time, the pin 0 interrupt is a PCI + * type. The gsi > 15 test could cause these two pins + * to be shared as IRQ0, and they are not shareable. + * So test for this condition, and if necessary, avoid + * the pin collision. + */ + gsi = pci_irq++; + /* + * Don't assign IRQ used by ACPI SCI + */ + if (gsi == acpi_gbl_FADT.sci_interrupt) + gsi = pci_irq++; + gsi_to_irq[irq] = gsi; + } else { + printk(KERN_ERR "GSI %u is too high\n", gsi); + return gsi; + } + } +#endif + io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, + triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, + polarity == ACPI_ACTIVE_HIGH ? 0 : 1); + return gsi; +} + +int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, + u32 gsi, int triggering, int polarity) +{ +#ifdef CONFIG_X86_MPPARSE + struct mp_config_intsrc mp_irq; + int ioapic; + + if (!acpi_ioapic) + return 0; + + /* print the entry should happen on mptable identically */ + mp_irq.mp_type = MP_INTSRC; + mp_irq.mp_irqtype = mp_INT; + mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | + (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); + mp_irq.mp_srcbus = number; + mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); + ioapic = mp_find_ioapic(gsi); + mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; + mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; + + save_mp_irq(&mp_irq); +#endif + return 0; +} + /* * Parse IOAPIC related entries in MADT * returns 0 on success, < 0 on error @@ -993,7 +1337,9 @@ static void __init acpi_process_madt(void) acpi_ioapic = 1; smp_found_config = 1; +#ifdef CONFIG_X86_32 setup_apic_routing(); +#endif } } if (error == -EINVAL) { @@ -1009,8 +1355,6 @@ static void __init acpi_process_madt(void) return; } -#ifdef __i386__ - static int __init disable_acpi_irq(const struct dmi_system_id *d) { if (!acpi_force) { @@ -1060,6 +1404,16 @@ static int __init force_acpi_ht(const struct dmi_system_id *d) return 0; } +/* + * Force ignoring BIOS IRQ0 pin2 override + */ +static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) +{ + pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident); + acpi_skip_timer_override = 1; + return 0; +} + /* * If your system is blacklisted here, but you find that acpi=force * works for you, please contact acpi-devel@sourceforge.net @@ -1227,11 +1581,35 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), }, }, + /* + * HP laptops which use a DSDT reporting as HP/SB400/10000, + * which includes some code which overrides all temperature + * trip points to 16C if the INTIN2 input of the I/O APIC + * is enabled. This input is incorrectly designated the + * ISA IRQ 0 via an interrupt source override even though + * it is wired to the output of the master 8259A and INTIN0 + * is not connected at all. Force ignoring BIOS IRQ0 pin2 + * override in that cases. + */ + { + .callback = dmi_ignore_irq0_timer_override, + .ident = "HP NX6125 laptop", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), + }, + }, + { + .callback = dmi_ignore_irq0_timer_override, + .ident = "HP NX6325 laptop", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), + DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), + }, + }, {} }; -#endif /* __i386__ */ - /* * acpi_boot_table_init() and acpi_boot_init() * called from setup_arch(), always. @@ -1259,9 +1637,7 @@ int __init acpi_boot_table_init(void) { int error; -#ifdef __i386__ dmi_check_system(acpi_dmi_table); -#endif /* * If acpi_disabled, bail out @@ -1386,6 +1762,20 @@ static int __init parse_pci(char *arg) } early_param("pci", parse_pci); +int __init acpi_mps_check(void) +{ +#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) +/* mptable code is not built-in*/ + if (acpi_disabled || acpi_noirq) { + printk(KERN_WARNING "MPS support code is not built-in.\n" + "Using acpi=off or acpi=noirq or pci=noacpi " + "may have problem\n"); + return 1; + } +#endif + return 0; +} + #ifdef CONFIG_X86_IO_APIC static int __init parse_acpi_skip_timer_override(char *arg) { diff --git a/arch/x86/kernel/acpi/processor.c b/arch/x86/kernel/acpi/processor.c index de2d2e4ebad97217be93de05b32886cfa09d0526..7c074eec39fb56ebff16c26f3351b6eae79cca50 100644 --- a/arch/x86/kernel/acpi/processor.c +++ b/arch/x86/kernel/acpi/processor.c @@ -56,6 +56,12 @@ static void init_intel_pdc(struct acpi_processor *pr, struct cpuinfo_x86 *c) if (cpu_has(c, X86_FEATURE_ACPI)) buf[2] |= ACPI_PDC_T_FFH; + /* + * If mwait/monitor is unsupported, C2/C3_FFH will be disabled + */ + if (!cpu_has(c, X86_FEATURE_MWAIT)) + buf[2] &= ~(ACPI_PDC_C_C2C3_FFH); + obj->type = ACPI_TYPE_BUFFER; obj->buffer.length = 12; obj->buffer.pointer = (u8 *) buf; diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c index 36af01f029eddbfe7b2bdc05a0f2b59ab5c3666a..fa2161d5003b78ad6e7b021523efd7b761894602 100644 --- a/arch/x86/kernel/acpi/sleep.c +++ b/arch/x86/kernel/acpi/sleep.c @@ -9,6 +9,7 @@ #include #include #include +#include #include "realmode/wakeup.h" #include "sleep.h" @@ -51,18 +52,27 @@ int acpi_save_state_mem(void) header->video_mode = saved_video_mode; header->wakeup_jmp_seg = acpi_wakeup_address >> 4; + + /* + * Set up the wakeup GDT. We set these up as Big Real Mode, + * that is, with limits set to 4 GB. At least the Lenovo + * Thinkpad X61 is known to need this for the video BIOS + * initialization quirk to work; this is likely to also + * be the case for other laptops or integrated video devices. + */ + /* GDT[0]: GDT self-pointer */ header->wakeup_gdt[0] = (u64)(sizeof(header->wakeup_gdt) - 1) + ((u64)(acpi_wakeup_address + ((char *)&header->wakeup_gdt - (char *)acpi_realmode)) << 16); - /* GDT[1]: real-mode-like code segment */ - header->wakeup_gdt[1] = (0x009bULL << 40) + - ((u64)acpi_wakeup_address << 16) + 0xffff; - /* GDT[2]: real-mode-like data segment */ - header->wakeup_gdt[2] = (0x0093ULL << 40) + - ((u64)acpi_wakeup_address << 16) + 0xffff; + /* GDT[1]: big real mode-like code segment */ + header->wakeup_gdt[1] = + GDT_ENTRY(0x809b, acpi_wakeup_address, 0xfffff); + /* GDT[2]: big real mode-like data segment */ + header->wakeup_gdt[2] = + GDT_ENTRY(0x8093, acpi_wakeup_address, 0xfffff); #ifndef CONFIG_64BIT store_gdt((struct desc_ptr *)&header->pmode_gdt); @@ -86,7 +96,9 @@ int acpi_save_state_mem(void) saved_magic = 0x12345678; #else /* CONFIG_64BIT */ header->trampoline_segment = setup_trampoline() >> 4; - init_rsp = (unsigned long)temp_stack + 4096; +#ifdef CONFIG_SMP + stack_start.sp = temp_stack + 4096; +#endif initial_code = (unsigned long)wakeup_long64; saved_magic = 0x123456789abcdef0; #endif /* CONFIG_64BIT */ @@ -138,6 +150,12 @@ static int __init acpi_sleep_setup(char *str) acpi_realmode_flags |= 2; if (strncmp(str, "s3_beep", 7) == 0) acpi_realmode_flags |= 4; +#ifdef CONFIG_HIBERNATION + if (strncmp(str, "s4_nohwsig", 10) == 0) + acpi_no_s4_hw_signature(); +#endif + if (strncmp(str, "old_ordering", 12) == 0) + acpi_old_suspend_ordering(); str = strchr(str, ','); if (str != NULL) str += strspn(str, ", \t"); diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index 65c7857a90ddfc6ff084c6817baba045ced0ad71..2763cb37b553e5780c9dc080311022e3b4339092 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c @@ -1,6 +1,6 @@ #include #include -#include +#include #include #include #include @@ -143,7 +143,7 @@ static const unsigned char *const p6_nops[ASM_NOP_MAX+1] = { #ifdef CONFIG_X86_64 extern char __vsyscall_0; -static inline const unsigned char*const * find_nop_table(void) +const unsigned char *const *find_nop_table(void) { return boot_cpu_data.x86_vendor != X86_VENDOR_INTEL || boot_cpu_data.x86 < 6 ? k8_nops : p6_nops; @@ -162,7 +162,7 @@ static const struct nop { { -1, NULL } }; -static const unsigned char*const * find_nop_table(void) +const unsigned char *const *find_nop_table(void) { const unsigned char *const *noptable = intel_nops; int i; @@ -279,7 +279,7 @@ struct smp_alt_module { struct list_head next; }; static LIST_HEAD(smp_alt_modules); -static DEFINE_SPINLOCK(smp_alt); +static DEFINE_MUTEX(smp_alt); static int smp_mode = 1; /* protected by smp_alt */ void alternatives_smp_module_add(struct module *mod, char *name, @@ -312,12 +312,12 @@ void alternatives_smp_module_add(struct module *mod, char *name, __func__, smp->locks, smp->locks_end, smp->text, smp->text_end, smp->name); - spin_lock(&smp_alt); + mutex_lock(&smp_alt); list_add_tail(&smp->next, &smp_alt_modules); if (boot_cpu_has(X86_FEATURE_UP)) alternatives_smp_unlock(smp->locks, smp->locks_end, smp->text, smp->text_end); - spin_unlock(&smp_alt); + mutex_unlock(&smp_alt); } void alternatives_smp_module_del(struct module *mod) @@ -327,17 +327,17 @@ void alternatives_smp_module_del(struct module *mod) if (smp_alt_once || noreplace_smp) return; - spin_lock(&smp_alt); + mutex_lock(&smp_alt); list_for_each_entry(item, &smp_alt_modules, next) { if (mod != item->mod) continue; list_del(&item->next); - spin_unlock(&smp_alt); + mutex_unlock(&smp_alt); DPRINTK("%s: %s\n", __func__, item->name); kfree(item); return; } - spin_unlock(&smp_alt); + mutex_unlock(&smp_alt); } void alternatives_smp_switch(int smp) @@ -359,7 +359,7 @@ void alternatives_smp_switch(int smp) return; BUG_ON(!smp && (num_online_cpus() > 1)); - spin_lock(&smp_alt); + mutex_lock(&smp_alt); /* * Avoid unnecessary switches because it forces JIT based VMs to @@ -383,7 +383,7 @@ void alternatives_smp_switch(int smp) mod->text, mod->text_end); } smp_mode = smp; - spin_unlock(&smp_alt); + mutex_unlock(&smp_alt); } #endif diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c new file mode 100644 index 0000000000000000000000000000000000000000..22d7d050905dd1f6b6192707b2697e38a2fd38bd --- /dev/null +++ b/arch/x86/kernel/amd_iommu.c @@ -0,0 +1,1164 @@ +/* + * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. + * Author: Joerg Roedel + * Leo Duran + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) + +#define EXIT_LOOP_COUNT 10000000 + +static DEFINE_RWLOCK(amd_iommu_devtable_lock); + +/* + * general struct to manage commands send to an IOMMU + */ +struct iommu_cmd { + u32 data[4]; +}; + +static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, + struct unity_map_entry *e); + +/* returns !0 if the IOMMU is caching non-present entries in its TLB */ +static int iommu_has_npcache(struct amd_iommu *iommu) +{ + return iommu->cap & IOMMU_CAP_NPCACHE; +} + +/**************************************************************************** + * + * IOMMU command queuing functions + * + ****************************************************************************/ + +/* + * Writes the command to the IOMMUs command buffer and informs the + * hardware about the new command. Must be called with iommu->lock held. + */ +static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) +{ + u32 tail, head; + u8 *target; + + tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); + target = (iommu->cmd_buf + tail); + memcpy_toio(target, cmd, sizeof(*cmd)); + tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; + head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); + if (tail == head) + return -ENOMEM; + writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); + + return 0; +} + +/* + * General queuing function for commands. Takes iommu->lock and calls + * __iommu_queue_command(). + */ +static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) +{ + unsigned long flags; + int ret; + + spin_lock_irqsave(&iommu->lock, flags); + ret = __iommu_queue_command(iommu, cmd); + spin_unlock_irqrestore(&iommu->lock, flags); + + return ret; +} + +/* + * This function is called whenever we need to ensure that the IOMMU has + * completed execution of all commands we sent. It sends a + * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs + * us about that by writing a value to a physical address we pass with + * the command. + */ +static int iommu_completion_wait(struct amd_iommu *iommu) +{ + int ret; + struct iommu_cmd cmd; + volatile u64 ready = 0; + unsigned long ready_phys = virt_to_phys(&ready); + unsigned long i = 0; + + memset(&cmd, 0, sizeof(cmd)); + cmd.data[0] = LOW_U32(ready_phys) | CMD_COMPL_WAIT_STORE_MASK; + cmd.data[1] = upper_32_bits(ready_phys); + cmd.data[2] = 1; /* value written to 'ready' */ + CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); + + iommu->need_sync = 0; + + ret = iommu_queue_command(iommu, &cmd); + + if (ret) + return ret; + + while (!ready && (i < EXIT_LOOP_COUNT)) { + ++i; + cpu_relax(); + } + + if (unlikely((i == EXIT_LOOP_COUNT) && printk_ratelimit())) + printk(KERN_WARNING "AMD IOMMU: Completion wait loop failed\n"); + + return 0; +} + +/* + * Command send function for invalidating a device table entry + */ +static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) +{ + struct iommu_cmd cmd; + + BUG_ON(iommu == NULL); + + memset(&cmd, 0, sizeof(cmd)); + CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY); + cmd.data[0] = devid; + + iommu->need_sync = 1; + + return iommu_queue_command(iommu, &cmd); +} + +/* + * Generic command send function for invalidaing TLB entries + */ +static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, + u64 address, u16 domid, int pde, int s) +{ + struct iommu_cmd cmd; + + memset(&cmd, 0, sizeof(cmd)); + address &= PAGE_MASK; + CMD_SET_TYPE(&cmd, CMD_INV_IOMMU_PAGES); + cmd.data[1] |= domid; + cmd.data[2] = LOW_U32(address); + cmd.data[3] = upper_32_bits(address); + if (s) /* size bit - we flush more than one 4kb page */ + cmd.data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; + if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ + cmd.data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; + + iommu->need_sync = 1; + + return iommu_queue_command(iommu, &cmd); +} + +/* + * TLB invalidation function which is called from the mapping functions. + * It invalidates a single PTE if the range to flush is within a single + * page. Otherwise it flushes the whole TLB of the IOMMU. + */ +static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, + u64 address, size_t size) +{ + int s = 0; + unsigned pages = iommu_num_pages(address, size); + + address &= PAGE_MASK; + + if (pages > 1) { + /* + * If we have to flush more than one page, flush all + * TLB entries for this domain + */ + address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; + s = 1; + } + + iommu_queue_inv_iommu_pages(iommu, address, domid, 0, s); + + return 0; +} + +/**************************************************************************** + * + * The functions below are used the create the page table mappings for + * unity mapped regions. + * + ****************************************************************************/ + +/* + * Generic mapping functions. It maps a physical address into a DMA + * address space. It allocates the page table pages if necessary. + * In the future it can be extended to a generic mapping function + * supporting all features of AMD IOMMU page tables like level skipping + * and full 64 bit address spaces. + */ +static int iommu_map(struct protection_domain *dom, + unsigned long bus_addr, + unsigned long phys_addr, + int prot) +{ + u64 __pte, *pte, *page; + + bus_addr = PAGE_ALIGN(bus_addr); + phys_addr = PAGE_ALIGN(bus_addr); + + /* only support 512GB address spaces for now */ + if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) + return -EINVAL; + + pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; + + if (!IOMMU_PTE_PRESENT(*pte)) { + page = (u64 *)get_zeroed_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + *pte = IOMMU_L2_PDE(virt_to_phys(page)); + } + + pte = IOMMU_PTE_PAGE(*pte); + pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; + + if (!IOMMU_PTE_PRESENT(*pte)) { + page = (u64 *)get_zeroed_page(GFP_KERNEL); + if (!page) + return -ENOMEM; + *pte = IOMMU_L1_PDE(virt_to_phys(page)); + } + + pte = IOMMU_PTE_PAGE(*pte); + pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)]; + + if (IOMMU_PTE_PRESENT(*pte)) + return -EBUSY; + + __pte = phys_addr | IOMMU_PTE_P; + if (prot & IOMMU_PROT_IR) + __pte |= IOMMU_PTE_IR; + if (prot & IOMMU_PROT_IW) + __pte |= IOMMU_PTE_IW; + + *pte = __pte; + + return 0; +} + +/* + * This function checks if a specific unity mapping entry is needed for + * this specific IOMMU. + */ +static int iommu_for_unity_map(struct amd_iommu *iommu, + struct unity_map_entry *entry) +{ + u16 bdf, i; + + for (i = entry->devid_start; i <= entry->devid_end; ++i) { + bdf = amd_iommu_alias_table[i]; + if (amd_iommu_rlookup_table[bdf] == iommu) + return 1; + } + + return 0; +} + +/* + * Init the unity mappings for a specific IOMMU in the system + * + * Basically iterates over all unity mapping entries and applies them to + * the default domain DMA of that IOMMU if necessary. + */ +static int iommu_init_unity_mappings(struct amd_iommu *iommu) +{ + struct unity_map_entry *entry; + int ret; + + list_for_each_entry(entry, &amd_iommu_unity_map, list) { + if (!iommu_for_unity_map(iommu, entry)) + continue; + ret = dma_ops_unity_map(iommu->default_dom, entry); + if (ret) + return ret; + } + + return 0; +} + +/* + * This function actually applies the mapping to the page table of the + * dma_ops domain. + */ +static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, + struct unity_map_entry *e) +{ + u64 addr; + int ret; + + for (addr = e->address_start; addr < e->address_end; + addr += PAGE_SIZE) { + ret = iommu_map(&dma_dom->domain, addr, addr, e->prot); + if (ret) + return ret; + /* + * if unity mapping is in aperture range mark the page + * as allocated in the aperture + */ + if (addr < dma_dom->aperture_size) + __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap); + } + + return 0; +} + +/* + * Inits the unity mappings required for a specific device + */ +static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, + u16 devid) +{ + struct unity_map_entry *e; + int ret; + + list_for_each_entry(e, &amd_iommu_unity_map, list) { + if (!(devid >= e->devid_start && devid <= e->devid_end)) + continue; + ret = dma_ops_unity_map(dma_dom, e); + if (ret) + return ret; + } + + return 0; +} + +/**************************************************************************** + * + * The next functions belong to the address allocator for the dma_ops + * interface functions. They work like the allocators in the other IOMMU + * drivers. Its basically a bitmap which marks the allocated pages in + * the aperture. Maybe it could be enhanced in the future to a more + * efficient allocator. + * + ****************************************************************************/ +static unsigned long dma_mask_to_pages(unsigned long mask) +{ + return (mask >> PAGE_SHIFT) + + (PAGE_ALIGN(mask & ~PAGE_MASK) >> PAGE_SHIFT); +} + +/* + * The address allocator core function. + * + * called with domain->lock held + */ +static unsigned long dma_ops_alloc_addresses(struct device *dev, + struct dma_ops_domain *dom, + unsigned int pages) +{ + unsigned long limit = dma_mask_to_pages(*dev->dma_mask); + unsigned long address; + unsigned long size = dom->aperture_size >> PAGE_SHIFT; + unsigned long boundary_size; + + boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, + PAGE_SIZE) >> PAGE_SHIFT; + limit = limit < size ? limit : size; + + if (dom->next_bit >= limit) + dom->next_bit = 0; + + address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages, + 0 , boundary_size, 0); + if (address == -1) + address = iommu_area_alloc(dom->bitmap, limit, 0, pages, + 0, boundary_size, 0); + + if (likely(address != -1)) { + dom->next_bit = address + pages; + address <<= PAGE_SHIFT; + } else + address = bad_dma_address; + + WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); + + return address; +} + +/* + * The address free function. + * + * called with domain->lock held + */ +static void dma_ops_free_addresses(struct dma_ops_domain *dom, + unsigned long address, + unsigned int pages) +{ + address >>= PAGE_SHIFT; + iommu_area_free(dom->bitmap, address, pages); +} + +/**************************************************************************** + * + * The next functions belong to the domain allocation. A domain is + * allocated for every IOMMU as the default domain. If device isolation + * is enabled, every device get its own domain. The most important thing + * about domains is the page table mapping the DMA address space they + * contain. + * + ****************************************************************************/ + +static u16 domain_id_alloc(void) +{ + unsigned long flags; + int id; + + write_lock_irqsave(&amd_iommu_devtable_lock, flags); + id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); + BUG_ON(id == 0); + if (id > 0 && id < MAX_DOMAIN_ID) + __set_bit(id, amd_iommu_pd_alloc_bitmap); + else + id = 0; + write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); + + return id; +} + +/* + * Used to reserve address ranges in the aperture (e.g. for exclusion + * ranges. + */ +static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, + unsigned long start_page, + unsigned int pages) +{ + unsigned int last_page = dom->aperture_size >> PAGE_SHIFT; + + if (start_page + pages > last_page) + pages = last_page - start_page; + + set_bit_string(dom->bitmap, start_page, pages); +} + +static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom) +{ + int i, j; + u64 *p1, *p2, *p3; + + p1 = dma_dom->domain.pt_root; + + if (!p1) + return; + + for (i = 0; i < 512; ++i) { + if (!IOMMU_PTE_PRESENT(p1[i])) + continue; + + p2 = IOMMU_PTE_PAGE(p1[i]); + for (j = 0; j < 512; ++i) { + if (!IOMMU_PTE_PRESENT(p2[j])) + continue; + p3 = IOMMU_PTE_PAGE(p2[j]); + free_page((unsigned long)p3); + } + + free_page((unsigned long)p2); + } + + free_page((unsigned long)p1); +} + +/* + * Free a domain, only used if something went wrong in the + * allocation path and we need to free an already allocated page table + */ +static void dma_ops_domain_free(struct dma_ops_domain *dom) +{ + if (!dom) + return; + + dma_ops_free_pagetable(dom); + + kfree(dom->pte_pages); + + kfree(dom->bitmap); + + kfree(dom); +} + +/* + * Allocates a new protection domain usable for the dma_ops functions. + * It also intializes the page table and the address allocator data + * structures required for the dma_ops interface + */ +static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, + unsigned order) +{ + struct dma_ops_domain *dma_dom; + unsigned i, num_pte_pages; + u64 *l2_pde; + u64 address; + + /* + * Currently the DMA aperture must be between 32 MB and 1GB in size + */ + if ((order < 25) || (order > 30)) + return NULL; + + dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); + if (!dma_dom) + return NULL; + + spin_lock_init(&dma_dom->domain.lock); + + dma_dom->domain.id = domain_id_alloc(); + if (dma_dom->domain.id == 0) + goto free_dma_dom; + dma_dom->domain.mode = PAGE_MODE_3_LEVEL; + dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); + dma_dom->domain.priv = dma_dom; + if (!dma_dom->domain.pt_root) + goto free_dma_dom; + dma_dom->aperture_size = (1ULL << order); + dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8), + GFP_KERNEL); + if (!dma_dom->bitmap) + goto free_dma_dom; + /* + * mark the first page as allocated so we never return 0 as + * a valid dma-address. So we can use 0 as error value + */ + dma_dom->bitmap[0] = 1; + dma_dom->next_bit = 0; + + /* Intialize the exclusion range if necessary */ + if (iommu->exclusion_start && + iommu->exclusion_start < dma_dom->aperture_size) { + unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; + int pages = iommu_num_pages(iommu->exclusion_start, + iommu->exclusion_length); + dma_ops_reserve_addresses(dma_dom, startpage, pages); + } + + /* + * At the last step, build the page tables so we don't need to + * allocate page table pages in the dma_ops mapping/unmapping + * path. + */ + num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); + dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), + GFP_KERNEL); + if (!dma_dom->pte_pages) + goto free_dma_dom; + + l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL); + if (l2_pde == NULL) + goto free_dma_dom; + + dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde)); + + for (i = 0; i < num_pte_pages; ++i) { + dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL); + if (!dma_dom->pte_pages[i]) + goto free_dma_dom; + address = virt_to_phys(dma_dom->pte_pages[i]); + l2_pde[i] = IOMMU_L1_PDE(address); + } + + return dma_dom; + +free_dma_dom: + dma_ops_domain_free(dma_dom); + + return NULL; +} + +/* + * Find out the protection domain structure for a given PCI device. This + * will give us the pointer to the page table root for example. + */ +static struct protection_domain *domain_for_device(u16 devid) +{ + struct protection_domain *dom; + unsigned long flags; + + read_lock_irqsave(&amd_iommu_devtable_lock, flags); + dom = amd_iommu_pd_table[devid]; + read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); + + return dom; +} + +/* + * If a device is not yet associated with a domain, this function does + * assigns it visible for the hardware + */ +static void set_device_domain(struct amd_iommu *iommu, + struct protection_domain *domain, + u16 devid) +{ + unsigned long flags; + + u64 pte_root = virt_to_phys(domain->pt_root); + + pte_root |= (domain->mode & 0x07) << 9; + pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | 2; + + write_lock_irqsave(&amd_iommu_devtable_lock, flags); + amd_iommu_dev_table[devid].data[0] = pte_root; + amd_iommu_dev_table[devid].data[1] = pte_root >> 32; + amd_iommu_dev_table[devid].data[2] = domain->id; + + amd_iommu_pd_table[devid] = domain; + write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); + + iommu_queue_inv_dev_entry(iommu, devid); + + iommu->need_sync = 1; +} + +/***************************************************************************** + * + * The next functions belong to the dma_ops mapping/unmapping code. + * + *****************************************************************************/ + +/* + * In the dma_ops path we only have the struct device. This function + * finds the corresponding IOMMU, the protection domain and the + * requestor id for a given device. + * If the device is not yet associated with a domain this is also done + * in this function. + */ +static int get_device_resources(struct device *dev, + struct amd_iommu **iommu, + struct protection_domain **domain, + u16 *bdf) +{ + struct dma_ops_domain *dma_dom; + struct pci_dev *pcidev; + u16 _bdf; + + BUG_ON(!dev || dev->bus != &pci_bus_type || !dev->dma_mask); + + pcidev = to_pci_dev(dev); + _bdf = calc_devid(pcidev->bus->number, pcidev->devfn); + + /* device not translated by any IOMMU in the system? */ + if (_bdf > amd_iommu_last_bdf) { + *iommu = NULL; + *domain = NULL; + *bdf = 0xffff; + return 0; + } + + *bdf = amd_iommu_alias_table[_bdf]; + + *iommu = amd_iommu_rlookup_table[*bdf]; + if (*iommu == NULL) + return 0; + dma_dom = (*iommu)->default_dom; + *domain = domain_for_device(*bdf); + if (*domain == NULL) { + *domain = &dma_dom->domain; + set_device_domain(*iommu, *domain, *bdf); + printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " + "device ", (*domain)->id); + print_devid(_bdf, 1); + } + + return 1; +} + +/* + * This is the generic map function. It maps one 4kb page at paddr to + * the given address in the DMA address space for the domain. + */ +static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, + struct dma_ops_domain *dom, + unsigned long address, + phys_addr_t paddr, + int direction) +{ + u64 *pte, __pte; + + WARN_ON(address > dom->aperture_size); + + paddr &= PAGE_MASK; + + pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; + pte += IOMMU_PTE_L0_INDEX(address); + + __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; + + if (direction == DMA_TO_DEVICE) + __pte |= IOMMU_PTE_IR; + else if (direction == DMA_FROM_DEVICE) + __pte |= IOMMU_PTE_IW; + else if (direction == DMA_BIDIRECTIONAL) + __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; + + WARN_ON(*pte); + + *pte = __pte; + + return (dma_addr_t)address; +} + +/* + * The generic unmapping function for on page in the DMA address space. + */ +static void dma_ops_domain_unmap(struct amd_iommu *iommu, + struct dma_ops_domain *dom, + unsigned long address) +{ + u64 *pte; + + if (address >= dom->aperture_size) + return; + + WARN_ON(address & 0xfffULL || address > dom->aperture_size); + + pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; + pte += IOMMU_PTE_L0_INDEX(address); + + WARN_ON(!*pte); + + *pte = 0ULL; +} + +/* + * This function contains common code for mapping of a physically + * contiguous memory region into DMA address space. It is uses by all + * mapping functions provided by this IOMMU driver. + * Must be called with the domain lock held. + */ +static dma_addr_t __map_single(struct device *dev, + struct amd_iommu *iommu, + struct dma_ops_domain *dma_dom, + phys_addr_t paddr, + size_t size, + int dir) +{ + dma_addr_t offset = paddr & ~PAGE_MASK; + dma_addr_t address, start; + unsigned int pages; + int i; + + pages = iommu_num_pages(paddr, size); + paddr &= PAGE_MASK; + + address = dma_ops_alloc_addresses(dev, dma_dom, pages); + if (unlikely(address == bad_dma_address)) + goto out; + + start = address; + for (i = 0; i < pages; ++i) { + dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); + paddr += PAGE_SIZE; + start += PAGE_SIZE; + } + address += offset; + +out: + return address; +} + +/* + * Does the reverse of the __map_single function. Must be called with + * the domain lock held too + */ +static void __unmap_single(struct amd_iommu *iommu, + struct dma_ops_domain *dma_dom, + dma_addr_t dma_addr, + size_t size, + int dir) +{ + dma_addr_t i, start; + unsigned int pages; + + if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size)) + return; + + pages = iommu_num_pages(dma_addr, size); + dma_addr &= PAGE_MASK; + start = dma_addr; + + for (i = 0; i < pages; ++i) { + dma_ops_domain_unmap(iommu, dma_dom, start); + start += PAGE_SIZE; + } + + dma_ops_free_addresses(dma_dom, dma_addr, pages); +} + +/* + * The exported map_single function for dma_ops. + */ +static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, + size_t size, int dir) +{ + unsigned long flags; + struct amd_iommu *iommu; + struct protection_domain *domain; + u16 devid; + dma_addr_t addr; + + get_device_resources(dev, &iommu, &domain, &devid); + + if (iommu == NULL || domain == NULL) + /* device not handled by any AMD IOMMU */ + return (dma_addr_t)paddr; + + spin_lock_irqsave(&domain->lock, flags); + addr = __map_single(dev, iommu, domain->priv, paddr, size, dir); + if (addr == bad_dma_address) + goto out; + + if (iommu_has_npcache(iommu)) + iommu_flush_pages(iommu, domain->id, addr, size); + + if (iommu->need_sync) + iommu_completion_wait(iommu); + +out: + spin_unlock_irqrestore(&domain->lock, flags); + + return addr; +} + +/* + * The exported unmap_single function for dma_ops. + */ +static void unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, int dir) +{ + unsigned long flags; + struct amd_iommu *iommu; + struct protection_domain *domain; + u16 devid; + + if (!get_device_resources(dev, &iommu, &domain, &devid)) + /* device not handled by any AMD IOMMU */ + return; + + spin_lock_irqsave(&domain->lock, flags); + + __unmap_single(iommu, domain->priv, dma_addr, size, dir); + + iommu_flush_pages(iommu, domain->id, dma_addr, size); + + if (iommu->need_sync) + iommu_completion_wait(iommu); + + spin_unlock_irqrestore(&domain->lock, flags); +} + +/* + * This is a special map_sg function which is used if we should map a + * device which is not handled by an AMD IOMMU in the system. + */ +static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, + int nelems, int dir) +{ + struct scatterlist *s; + int i; + + for_each_sg(sglist, s, nelems, i) { + s->dma_address = (dma_addr_t)sg_phys(s); + s->dma_length = s->length; + } + + return nelems; +} + +/* + * The exported map_sg function for dma_ops (handles scatter-gather + * lists). + */ +static int map_sg(struct device *dev, struct scatterlist *sglist, + int nelems, int dir) +{ + unsigned long flags; + struct amd_iommu *iommu; + struct protection_domain *domain; + u16 devid; + int i; + struct scatterlist *s; + phys_addr_t paddr; + int mapped_elems = 0; + + get_device_resources(dev, &iommu, &domain, &devid); + + if (!iommu || !domain) + return map_sg_no_iommu(dev, sglist, nelems, dir); + + spin_lock_irqsave(&domain->lock, flags); + + for_each_sg(sglist, s, nelems, i) { + paddr = sg_phys(s); + + s->dma_address = __map_single(dev, iommu, domain->priv, + paddr, s->length, dir); + + if (s->dma_address) { + s->dma_length = s->length; + mapped_elems++; + } else + goto unmap; + if (iommu_has_npcache(iommu)) + iommu_flush_pages(iommu, domain->id, s->dma_address, + s->dma_length); + } + + if (iommu->need_sync) + iommu_completion_wait(iommu); + +out: + spin_unlock_irqrestore(&domain->lock, flags); + + return mapped_elems; +unmap: + for_each_sg(sglist, s, mapped_elems, i) { + if (s->dma_address) + __unmap_single(iommu, domain->priv, s->dma_address, + s->dma_length, dir); + s->dma_address = s->dma_length = 0; + } + + mapped_elems = 0; + + goto out; +} + +/* + * The exported map_sg function for dma_ops (handles scatter-gather + * lists). + */ +static void unmap_sg(struct device *dev, struct scatterlist *sglist, + int nelems, int dir) +{ + unsigned long flags; + struct amd_iommu *iommu; + struct protection_domain *domain; + struct scatterlist *s; + u16 devid; + int i; + + if (!get_device_resources(dev, &iommu, &domain, &devid)) + return; + + spin_lock_irqsave(&domain->lock, flags); + + for_each_sg(sglist, s, nelems, i) { + __unmap_single(iommu, domain->priv, s->dma_address, + s->dma_length, dir); + iommu_flush_pages(iommu, domain->id, s->dma_address, + s->dma_length); + s->dma_address = s->dma_length = 0; + } + + if (iommu->need_sync) + iommu_completion_wait(iommu); + + spin_unlock_irqrestore(&domain->lock, flags); +} + +/* + * The exported alloc_coherent function for dma_ops. + */ +static void *alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_addr, gfp_t flag) +{ + unsigned long flags; + void *virt_addr; + struct amd_iommu *iommu; + struct protection_domain *domain; + u16 devid; + phys_addr_t paddr; + + virt_addr = (void *)__get_free_pages(flag, get_order(size)); + if (!virt_addr) + return 0; + + memset(virt_addr, 0, size); + paddr = virt_to_phys(virt_addr); + + get_device_resources(dev, &iommu, &domain, &devid); + + if (!iommu || !domain) { + *dma_addr = (dma_addr_t)paddr; + return virt_addr; + } + + spin_lock_irqsave(&domain->lock, flags); + + *dma_addr = __map_single(dev, iommu, domain->priv, paddr, + size, DMA_BIDIRECTIONAL); + + if (*dma_addr == bad_dma_address) { + free_pages((unsigned long)virt_addr, get_order(size)); + virt_addr = NULL; + goto out; + } + + if (iommu_has_npcache(iommu)) + iommu_flush_pages(iommu, domain->id, *dma_addr, size); + + if (iommu->need_sync) + iommu_completion_wait(iommu); + +out: + spin_unlock_irqrestore(&domain->lock, flags); + + return virt_addr; +} + +/* + * The exported free_coherent function for dma_ops. + * FIXME: fix the generic x86 DMA layer so that it actually calls that + * function. + */ +static void free_coherent(struct device *dev, size_t size, + void *virt_addr, dma_addr_t dma_addr) +{ + unsigned long flags; + struct amd_iommu *iommu; + struct protection_domain *domain; + u16 devid; + + get_device_resources(dev, &iommu, &domain, &devid); + + if (!iommu || !domain) + goto free_mem; + + spin_lock_irqsave(&domain->lock, flags); + + __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); + iommu_flush_pages(iommu, domain->id, dma_addr, size); + + if (iommu->need_sync) + iommu_completion_wait(iommu); + + spin_unlock_irqrestore(&domain->lock, flags); + +free_mem: + free_pages((unsigned long)virt_addr, get_order(size)); +} + +/* + * The function for pre-allocating protection domains. + * + * If the driver core informs the DMA layer if a driver grabs a device + * we don't need to preallocate the protection domains anymore. + * For now we have to. + */ +void prealloc_protection_domains(void) +{ + struct pci_dev *dev = NULL; + struct dma_ops_domain *dma_dom; + struct amd_iommu *iommu; + int order = amd_iommu_aperture_order; + u16 devid; + + while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { + devid = (dev->bus->number << 8) | dev->devfn; + if (devid > amd_iommu_last_bdf) + continue; + devid = amd_iommu_alias_table[devid]; + if (domain_for_device(devid)) + continue; + iommu = amd_iommu_rlookup_table[devid]; + if (!iommu) + continue; + dma_dom = dma_ops_domain_alloc(iommu, order); + if (!dma_dom) + continue; + init_unity_mappings_for_device(dma_dom, devid); + set_device_domain(iommu, &dma_dom->domain, devid); + printk(KERN_INFO "AMD IOMMU: Allocated domain %d for device ", + dma_dom->domain.id); + print_devid(devid, 1); + } +} + +static struct dma_mapping_ops amd_iommu_dma_ops = { + .alloc_coherent = alloc_coherent, + .free_coherent = free_coherent, + .map_single = map_single, + .unmap_single = unmap_single, + .map_sg = map_sg, + .unmap_sg = unmap_sg, +}; + +/* + * The function which clues the AMD IOMMU driver into dma_ops. + */ +int __init amd_iommu_init_dma_ops(void) +{ + struct amd_iommu *iommu; + int order = amd_iommu_aperture_order; + int ret; + + /* + * first allocate a default protection domain for every IOMMU we + * found in the system. Devices not assigned to any other + * protection domain will be assigned to the default one. + */ + list_for_each_entry(iommu, &amd_iommu_list, list) { + iommu->default_dom = dma_ops_domain_alloc(iommu, order); + if (iommu->default_dom == NULL) + return -ENOMEM; + ret = iommu_init_unity_mappings(iommu); + if (ret) + goto free_domains; + } + + /* + * If device isolation is enabled, pre-allocate the protection + * domains for each device. + */ + if (amd_iommu_isolate) + prealloc_protection_domains(); + + iommu_detected = 1; + force_iommu = 1; + bad_dma_address = 0; +#ifdef CONFIG_GART_IOMMU + gart_iommu_aperture_disabled = 1; + gart_iommu_aperture = 0; +#endif + + /* Make the driver finally visible to the drivers */ + dma_ops = &amd_iommu_dma_ops; + + return 0; + +free_domains: + + list_for_each_entry(iommu, &amd_iommu_list, list) { + if (iommu->default_dom) + dma_ops_domain_free(iommu->default_dom); + } + + return ret; +} diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c new file mode 100644 index 0000000000000000000000000000000000000000..d9a9da597e796cbcda869180879a7804888e70ea --- /dev/null +++ b/arch/x86/kernel/amd_iommu_init.c @@ -0,0 +1,1060 @@ +/* + * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. + * Author: Joerg Roedel + * Leo Duran + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * definitions for the ACPI scanning code + */ +#define PCI_BUS(x) (((x) >> 8) & 0xff) +#define IVRS_HEADER_LENGTH 48 + +#define ACPI_IVHD_TYPE 0x10 +#define ACPI_IVMD_TYPE_ALL 0x20 +#define ACPI_IVMD_TYPE 0x21 +#define ACPI_IVMD_TYPE_RANGE 0x22 + +#define IVHD_DEV_ALL 0x01 +#define IVHD_DEV_SELECT 0x02 +#define IVHD_DEV_SELECT_RANGE_START 0x03 +#define IVHD_DEV_RANGE_END 0x04 +#define IVHD_DEV_ALIAS 0x42 +#define IVHD_DEV_ALIAS_RANGE 0x43 +#define IVHD_DEV_EXT_SELECT 0x46 +#define IVHD_DEV_EXT_SELECT_RANGE 0x47 + +#define IVHD_FLAG_HT_TUN_EN 0x00 +#define IVHD_FLAG_PASSPW_EN 0x01 +#define IVHD_FLAG_RESPASSPW_EN 0x02 +#define IVHD_FLAG_ISOC_EN 0x03 + +#define IVMD_FLAG_EXCL_RANGE 0x08 +#define IVMD_FLAG_UNITY_MAP 0x01 + +#define ACPI_DEVFLAG_INITPASS 0x01 +#define ACPI_DEVFLAG_EXTINT 0x02 +#define ACPI_DEVFLAG_NMI 0x04 +#define ACPI_DEVFLAG_SYSMGT1 0x10 +#define ACPI_DEVFLAG_SYSMGT2 0x20 +#define ACPI_DEVFLAG_LINT0 0x40 +#define ACPI_DEVFLAG_LINT1 0x80 +#define ACPI_DEVFLAG_ATSDIS 0x10000000 + +/* + * ACPI table definitions + * + * These data structures are laid over the table to parse the important values + * out of it. + */ + +/* + * structure describing one IOMMU in the ACPI table. Typically followed by one + * or more ivhd_entrys. + */ +struct ivhd_header { + u8 type; + u8 flags; + u16 length; + u16 devid; + u16 cap_ptr; + u64 mmio_phys; + u16 pci_seg; + u16 info; + u32 reserved; +} __attribute__((packed)); + +/* + * A device entry describing which devices a specific IOMMU translates and + * which requestor ids they use. + */ +struct ivhd_entry { + u8 type; + u16 devid; + u8 flags; + u32 ext; +} __attribute__((packed)); + +/* + * An AMD IOMMU memory definition structure. It defines things like exclusion + * ranges for devices and regions that should be unity mapped. + */ +struct ivmd_header { + u8 type; + u8 flags; + u16 length; + u16 devid; + u16 aux; + u64 resv; + u64 range_start; + u64 range_length; +} __attribute__((packed)); + +static int __initdata amd_iommu_detected; + +u16 amd_iommu_last_bdf; /* largest PCI device id we have + to handle */ +LIST_HEAD(amd_iommu_unity_map); /* a list of required unity mappings + we find in ACPI */ +unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */ +int amd_iommu_isolate; /* if 1, device isolation is enabled */ + +LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the + system */ + +/* + * Pointer to the device table which is shared by all AMD IOMMUs + * it is indexed by the PCI device id or the HT unit id and contains + * information about the domain the device belongs to as well as the + * page table root pointer. + */ +struct dev_table_entry *amd_iommu_dev_table; + +/* + * The alias table is a driver specific data structure which contains the + * mappings of the PCI device ids to the actual requestor ids on the IOMMU. + * More than one device can share the same requestor id. + */ +u16 *amd_iommu_alias_table; + +/* + * The rlookup table is used to find the IOMMU which is responsible + * for a specific device. It is also indexed by the PCI device id. + */ +struct amd_iommu **amd_iommu_rlookup_table; + +/* + * The pd table (protection domain table) is used to find the protection domain + * data structure a device belongs to. Indexed with the PCI device id too. + */ +struct protection_domain **amd_iommu_pd_table; + +/* + * AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap + * to know which ones are already in use. + */ +unsigned long *amd_iommu_pd_alloc_bitmap; + +static u32 dev_table_size; /* size of the device table */ +static u32 alias_table_size; /* size of the alias table */ +static u32 rlookup_table_size; /* size if the rlookup table */ + +static inline void update_last_devid(u16 devid) +{ + if (devid > amd_iommu_last_bdf) + amd_iommu_last_bdf = devid; +} + +static inline unsigned long tbl_size(int entry_size) +{ + unsigned shift = PAGE_SHIFT + + get_order(amd_iommu_last_bdf * entry_size); + + return 1UL << shift; +} + +/**************************************************************************** + * + * AMD IOMMU MMIO register space handling functions + * + * These functions are used to program the IOMMU device registers in + * MMIO space required for that driver. + * + ****************************************************************************/ + +/* + * This function set the exclusion range in the IOMMU. DMA accesses to the + * exclusion range are passed through untranslated + */ +static void __init iommu_set_exclusion_range(struct amd_iommu *iommu) +{ + u64 start = iommu->exclusion_start & PAGE_MASK; + u64 limit = (start + iommu->exclusion_length) & PAGE_MASK; + u64 entry; + + if (!iommu->exclusion_start) + return; + + entry = start | MMIO_EXCL_ENABLE_MASK; + memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, + &entry, sizeof(entry)); + + entry = limit; + memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, + &entry, sizeof(entry)); +} + +/* Programs the physical address of the device table into the IOMMU hardware */ +static void __init iommu_set_device_table(struct amd_iommu *iommu) +{ + u32 entry; + + BUG_ON(iommu->mmio_base == NULL); + + entry = virt_to_phys(amd_iommu_dev_table); + entry |= (dev_table_size >> 12) - 1; + memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, + &entry, sizeof(entry)); +} + +/* Generic functions to enable/disable certain features of the IOMMU. */ +static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit) +{ + u32 ctrl; + + ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); + ctrl |= (1 << bit); + writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); +} + +static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit) +{ + u32 ctrl; + + ctrl = (u64)readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); + ctrl &= ~(1 << bit); + writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); +} + +/* Function to enable the hardware */ +void __init iommu_enable(struct amd_iommu *iommu) +{ + printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at "); + print_devid(iommu->devid, 0); + printk(" cap 0x%hx\n", iommu->cap_ptr); + + iommu_feature_enable(iommu, CONTROL_IOMMU_EN); +} + +/* + * mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in + * the system has one. + */ +static u8 * __init iommu_map_mmio_space(u64 address) +{ + u8 *ret; + + if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) + return NULL; + + ret = ioremap_nocache(address, MMIO_REGION_LENGTH); + if (ret != NULL) + return ret; + + release_mem_region(address, MMIO_REGION_LENGTH); + + return NULL; +} + +static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu) +{ + if (iommu->mmio_base) + iounmap(iommu->mmio_base); + release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH); +} + +/**************************************************************************** + * + * The functions below belong to the first pass of AMD IOMMU ACPI table + * parsing. In this pass we try to find out the highest device id this + * code has to handle. Upon this information the size of the shared data + * structures is determined later. + * + ****************************************************************************/ + +/* + * This function reads the last device id the IOMMU has to handle from the PCI + * capability header for this IOMMU + */ +static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr) +{ + u32 cap; + + cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); + update_last_devid(calc_devid(MMIO_GET_BUS(cap), MMIO_GET_LD(cap))); + + return 0; +} + +/* + * After reading the highest device id from the IOMMU PCI capability header + * this function looks if there is a higher device id defined in the ACPI table + */ +static int __init find_last_devid_from_ivhd(struct ivhd_header *h) +{ + u8 *p = (void *)h, *end = (void *)h; + struct ivhd_entry *dev; + + p += sizeof(*h); + end += h->length; + + find_last_devid_on_pci(PCI_BUS(h->devid), + PCI_SLOT(h->devid), + PCI_FUNC(h->devid), + h->cap_ptr); + + while (p < end) { + dev = (struct ivhd_entry *)p; + switch (dev->type) { + case IVHD_DEV_SELECT: + case IVHD_DEV_RANGE_END: + case IVHD_DEV_ALIAS: + case IVHD_DEV_EXT_SELECT: + /* all the above subfield types refer to device ids */ + update_last_devid(dev->devid); + break; + default: + break; + } + p += 0x04 << (*p >> 6); + } + + WARN_ON(p != end); + + return 0; +} + +/* + * Iterate over all IVHD entries in the ACPI table and find the highest device + * id which we need to handle. This is the first of three functions which parse + * the ACPI table. So we check the checksum here. + */ +static int __init find_last_devid_acpi(struct acpi_table_header *table) +{ + int i; + u8 checksum = 0, *p = (u8 *)table, *end = (u8 *)table; + struct ivhd_header *h; + + /* + * Validate checksum here so we don't need to do it when + * we actually parse the table + */ + for (i = 0; i < table->length; ++i) + checksum += p[i]; + if (checksum != 0) + /* ACPI table corrupt */ + return -ENODEV; + + p += IVRS_HEADER_LENGTH; + + end += table->length; + while (p < end) { + h = (struct ivhd_header *)p; + switch (h->type) { + case ACPI_IVHD_TYPE: + find_last_devid_from_ivhd(h); + break; + default: + break; + } + p += h->length; + } + WARN_ON(p != end); + + return 0; +} + +/**************************************************************************** + * + * The following functions belong the the code path which parses the ACPI table + * the second time. In this ACPI parsing iteration we allocate IOMMU specific + * data structures, initialize the device/alias/rlookup table and also + * basically initialize the hardware. + * + ****************************************************************************/ + +/* + * Allocates the command buffer. This buffer is per AMD IOMMU. We can + * write commands to that buffer later and the IOMMU will execute them + * asynchronously + */ +static u8 * __init alloc_command_buffer(struct amd_iommu *iommu) +{ + u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, + get_order(CMD_BUFFER_SIZE)); + u64 entry; + + if (cmd_buf == NULL) + return NULL; + + iommu->cmd_buf_size = CMD_BUFFER_SIZE; + + entry = (u64)virt_to_phys(cmd_buf); + entry |= MMIO_CMD_SIZE_512; + memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET, + &entry, sizeof(entry)); + + iommu_feature_enable(iommu, CONTROL_CMDBUF_EN); + + return cmd_buf; +} + +static void __init free_command_buffer(struct amd_iommu *iommu) +{ + free_pages((unsigned long)iommu->cmd_buf, get_order(CMD_BUFFER_SIZE)); +} + +/* sets a specific bit in the device table entry. */ +static void set_dev_entry_bit(u16 devid, u8 bit) +{ + int i = (bit >> 5) & 0x07; + int _bit = bit & 0x1f; + + amd_iommu_dev_table[devid].data[i] |= (1 << _bit); +} + +/* Writes the specific IOMMU for a device into the rlookup table */ +static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid) +{ + amd_iommu_rlookup_table[devid] = iommu; +} + +/* + * This function takes the device specific flags read from the ACPI + * table and sets up the device table entry with that information + */ +static void __init set_dev_entry_from_acpi(struct amd_iommu *iommu, + u16 devid, u32 flags, u32 ext_flags) +{ + if (flags & ACPI_DEVFLAG_INITPASS) + set_dev_entry_bit(devid, DEV_ENTRY_INIT_PASS); + if (flags & ACPI_DEVFLAG_EXTINT) + set_dev_entry_bit(devid, DEV_ENTRY_EINT_PASS); + if (flags & ACPI_DEVFLAG_NMI) + set_dev_entry_bit(devid, DEV_ENTRY_NMI_PASS); + if (flags & ACPI_DEVFLAG_SYSMGT1) + set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT1); + if (flags & ACPI_DEVFLAG_SYSMGT2) + set_dev_entry_bit(devid, DEV_ENTRY_SYSMGT2); + if (flags & ACPI_DEVFLAG_LINT0) + set_dev_entry_bit(devid, DEV_ENTRY_LINT0_PASS); + if (flags & ACPI_DEVFLAG_LINT1) + set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS); + + set_iommu_for_device(iommu, devid); +} + +/* + * Reads the device exclusion range from ACPI and initialize IOMMU with + * it + */ +static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) +{ + struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; + + if (!(m->flags & IVMD_FLAG_EXCL_RANGE)) + return; + + if (iommu) { + /* + * We only can configure exclusion ranges per IOMMU, not + * per device. But we can enable the exclusion range per + * device. This is done here + */ + set_dev_entry_bit(m->devid, DEV_ENTRY_EX); + iommu->exclusion_start = m->range_start; + iommu->exclusion_length = m->range_length; + } +} + +/* + * This function reads some important data from the IOMMU PCI space and + * initializes the driver data structure with it. It reads the hardware + * capabilities and the first/last device entries + */ +static void __init init_iommu_from_pci(struct amd_iommu *iommu) +{ + int bus = PCI_BUS(iommu->devid); + int dev = PCI_SLOT(iommu->devid); + int fn = PCI_FUNC(iommu->devid); + int cap_ptr = iommu->cap_ptr; + u32 range; + + iommu->cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_CAP_HDR_OFFSET); + + range = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET); + iommu->first_device = calc_devid(MMIO_GET_BUS(range), + MMIO_GET_FD(range)); + iommu->last_device = calc_devid(MMIO_GET_BUS(range), + MMIO_GET_LD(range)); +} + +/* + * Takes a pointer to an AMD IOMMU entry in the ACPI table and + * initializes the hardware and our data structures with it. + */ +static void __init init_iommu_from_acpi(struct amd_iommu *iommu, + struct ivhd_header *h) +{ + u8 *p = (u8 *)h; + u8 *end = p, flags = 0; + u16 dev_i, devid = 0, devid_start = 0, devid_to = 0; + u32 ext_flags = 0; + bool alias = false; + struct ivhd_entry *e; + + /* + * First set the recommended feature enable bits from ACPI + * into the IOMMU control registers + */ + h->flags & IVHD_FLAG_HT_TUN_EN ? + iommu_feature_enable(iommu, CONTROL_HT_TUN_EN) : + iommu_feature_disable(iommu, CONTROL_HT_TUN_EN); + + h->flags & IVHD_FLAG_PASSPW_EN ? + iommu_feature_enable(iommu, CONTROL_PASSPW_EN) : + iommu_feature_disable(iommu, CONTROL_PASSPW_EN); + + h->flags & IVHD_FLAG_RESPASSPW_EN ? + iommu_feature_enable(iommu, CONTROL_RESPASSPW_EN) : + iommu_feature_disable(iommu, CONTROL_RESPASSPW_EN); + + h->flags & IVHD_FLAG_ISOC_EN ? + iommu_feature_enable(iommu, CONTROL_ISOC_EN) : + iommu_feature_disable(iommu, CONTROL_ISOC_EN); + + /* + * make IOMMU memory accesses cache coherent + */ + iommu_feature_enable(iommu, CONTROL_COHERENT_EN); + + /* + * Done. Now parse the device entries + */ + p += sizeof(struct ivhd_header); + end += h->length; + + while (p < end) { + e = (struct ivhd_entry *)p; + switch (e->type) { + case IVHD_DEV_ALL: + for (dev_i = iommu->first_device; + dev_i <= iommu->last_device; ++dev_i) + set_dev_entry_from_acpi(iommu, dev_i, + e->flags, 0); + break; + case IVHD_DEV_SELECT: + devid = e->devid; + set_dev_entry_from_acpi(iommu, devid, e->flags, 0); + break; + case IVHD_DEV_SELECT_RANGE_START: + devid_start = e->devid; + flags = e->flags; + ext_flags = 0; + alias = false; + break; + case IVHD_DEV_ALIAS: + devid = e->devid; + devid_to = e->ext >> 8; + set_dev_entry_from_acpi(iommu, devid, e->flags, 0); + amd_iommu_alias_table[devid] = devid_to; + break; + case IVHD_DEV_ALIAS_RANGE: + devid_start = e->devid; + flags = e->flags; + devid_to = e->ext >> 8; + ext_flags = 0; + alias = true; + break; + case IVHD_DEV_EXT_SELECT: + devid = e->devid; + set_dev_entry_from_acpi(iommu, devid, e->flags, + e->ext); + break; + case IVHD_DEV_EXT_SELECT_RANGE: + devid_start = e->devid; + flags = e->flags; + ext_flags = e->ext; + alias = false; + break; + case IVHD_DEV_RANGE_END: + devid = e->devid; + for (dev_i = devid_start; dev_i <= devid; ++dev_i) { + if (alias) + amd_iommu_alias_table[dev_i] = devid_to; + set_dev_entry_from_acpi(iommu, + amd_iommu_alias_table[dev_i], + flags, ext_flags); + } + break; + default: + break; + } + + p += 0x04 << (e->type >> 6); + } +} + +/* Initializes the device->iommu mapping for the driver */ +static int __init init_iommu_devices(struct amd_iommu *iommu) +{ + u16 i; + + for (i = iommu->first_device; i <= iommu->last_device; ++i) + set_iommu_for_device(iommu, i); + + return 0; +} + +static void __init free_iommu_one(struct amd_iommu *iommu) +{ + free_command_buffer(iommu); + iommu_unmap_mmio_space(iommu); +} + +static void __init free_iommu_all(void) +{ + struct amd_iommu *iommu, *next; + + list_for_each_entry_safe(iommu, next, &amd_iommu_list, list) { + list_del(&iommu->list); + free_iommu_one(iommu); + kfree(iommu); + } +} + +/* + * This function clues the initialization function for one IOMMU + * together and also allocates the command buffer and programs the + * hardware. It does NOT enable the IOMMU. This is done afterwards. + */ +static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h) +{ + spin_lock_init(&iommu->lock); + list_add_tail(&iommu->list, &amd_iommu_list); + + /* + * Copy data from ACPI table entry to the iommu struct + */ + iommu->devid = h->devid; + iommu->cap_ptr = h->cap_ptr; + iommu->mmio_phys = h->mmio_phys; + iommu->mmio_base = iommu_map_mmio_space(h->mmio_phys); + if (!iommu->mmio_base) + return -ENOMEM; + + iommu_set_device_table(iommu); + iommu->cmd_buf = alloc_command_buffer(iommu); + if (!iommu->cmd_buf) + return -ENOMEM; + + init_iommu_from_pci(iommu); + init_iommu_from_acpi(iommu, h); + init_iommu_devices(iommu); + + return 0; +} + +/* + * Iterates over all IOMMU entries in the ACPI table, allocates the + * IOMMU structure and initializes it with init_iommu_one() + */ +static int __init init_iommu_all(struct acpi_table_header *table) +{ + u8 *p = (u8 *)table, *end = (u8 *)table; + struct ivhd_header *h; + struct amd_iommu *iommu; + int ret; + + end += table->length; + p += IVRS_HEADER_LENGTH; + + while (p < end) { + h = (struct ivhd_header *)p; + switch (*p) { + case ACPI_IVHD_TYPE: + iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL); + if (iommu == NULL) + return -ENOMEM; + ret = init_iommu_one(iommu, h); + if (ret) + return ret; + break; + default: + break; + } + p += h->length; + + } + WARN_ON(p != end); + + return 0; +} + +/**************************************************************************** + * + * The next functions belong to the third pass of parsing the ACPI + * table. In this last pass the memory mapping requirements are + * gathered (like exclusion and unity mapping reanges). + * + ****************************************************************************/ + +static void __init free_unity_maps(void) +{ + struct unity_map_entry *entry, *next; + + list_for_each_entry_safe(entry, next, &amd_iommu_unity_map, list) { + list_del(&entry->list); + kfree(entry); + } +} + +/* called when we find an exclusion range definition in ACPI */ +static int __init init_exclusion_range(struct ivmd_header *m) +{ + int i; + + switch (m->type) { + case ACPI_IVMD_TYPE: + set_device_exclusion_range(m->devid, m); + break; + case ACPI_IVMD_TYPE_ALL: + for (i = 0; i <= amd_iommu_last_bdf; ++i) + set_device_exclusion_range(i, m); + break; + case ACPI_IVMD_TYPE_RANGE: + for (i = m->devid; i <= m->aux; ++i) + set_device_exclusion_range(i, m); + break; + default: + break; + } + + return 0; +} + +/* called for unity map ACPI definition */ +static int __init init_unity_map_range(struct ivmd_header *m) +{ + struct unity_map_entry *e = 0; + + e = kzalloc(sizeof(*e), GFP_KERNEL); + if (e == NULL) + return -ENOMEM; + + switch (m->type) { + default: + case ACPI_IVMD_TYPE: + e->devid_start = e->devid_end = m->devid; + break; + case ACPI_IVMD_TYPE_ALL: + e->devid_start = 0; + e->devid_end = amd_iommu_last_bdf; + break; + case ACPI_IVMD_TYPE_RANGE: + e->devid_start = m->devid; + e->devid_end = m->aux; + break; + } + e->address_start = PAGE_ALIGN(m->range_start); + e->address_end = e->address_start + PAGE_ALIGN(m->range_length); + e->prot = m->flags >> 1; + + list_add_tail(&e->list, &amd_iommu_unity_map); + + return 0; +} + +/* iterates over all memory definitions we find in the ACPI table */ +static int __init init_memory_definitions(struct acpi_table_header *table) +{ + u8 *p = (u8 *)table, *end = (u8 *)table; + struct ivmd_header *m; + + end += table->length; + p += IVRS_HEADER_LENGTH; + + while (p < end) { + m = (struct ivmd_header *)p; + if (m->flags & IVMD_FLAG_EXCL_RANGE) + init_exclusion_range(m); + else if (m->flags & IVMD_FLAG_UNITY_MAP) + init_unity_map_range(m); + + p += m->length; + } + + return 0; +} + +/* + * This function finally enables all IOMMUs found in the system after + * they have been initialized + */ +static void __init enable_iommus(void) +{ + struct amd_iommu *iommu; + + list_for_each_entry(iommu, &amd_iommu_list, list) { + iommu_set_exclusion_range(iommu); + iommu_enable(iommu); + } +} + +/* + * Suspend/Resume support + * disable suspend until real resume implemented + */ + +static int amd_iommu_resume(struct sys_device *dev) +{ + return 0; +} + +static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state) +{ + return -EINVAL; +} + +static struct sysdev_class amd_iommu_sysdev_class = { + .name = "amd_iommu", + .suspend = amd_iommu_suspend, + .resume = amd_iommu_resume, +}; + +static struct sys_device device_amd_iommu = { + .id = 0, + .cls = &amd_iommu_sysdev_class, +}; + +/* + * This is the core init function for AMD IOMMU hardware in the system. + * This function is called from the generic x86 DMA layer initialization + * code. + * + * This function basically parses the ACPI table for AMD IOMMU (IVRS) + * three times: + * + * 1 pass) Find the highest PCI device id the driver has to handle. + * Upon this information the size of the data structures is + * determined that needs to be allocated. + * + * 2 pass) Initialize the data structures just allocated with the + * information in the ACPI table about available AMD IOMMUs + * in the system. It also maps the PCI devices in the + * system to specific IOMMUs + * + * 3 pass) After the basic data structures are allocated and + * initialized we update them with information about memory + * remapping requirements parsed out of the ACPI table in + * this last pass. + * + * After that the hardware is initialized and ready to go. In the last + * step we do some Linux specific things like registering the driver in + * the dma_ops interface and initializing the suspend/resume support + * functions. Finally it prints some information about AMD IOMMUs and + * the driver state and enables the hardware. + */ +int __init amd_iommu_init(void) +{ + int i, ret = 0; + + + if (no_iommu) { + printk(KERN_INFO "AMD IOMMU disabled by kernel command line\n"); + return 0; + } + + if (!amd_iommu_detected) + return -ENODEV; + + /* + * First parse ACPI tables to find the largest Bus/Dev/Func + * we need to handle. Upon this information the shared data + * structures for the IOMMUs in the system will be allocated + */ + if (acpi_table_parse("IVRS", find_last_devid_acpi) != 0) + return -ENODEV; + + dev_table_size = tbl_size(DEV_TABLE_ENTRY_SIZE); + alias_table_size = tbl_size(ALIAS_TABLE_ENTRY_SIZE); + rlookup_table_size = tbl_size(RLOOKUP_TABLE_ENTRY_SIZE); + + ret = -ENOMEM; + + /* Device table - directly used by all IOMMUs */ + amd_iommu_dev_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, + get_order(dev_table_size)); + if (amd_iommu_dev_table == NULL) + goto out; + + /* + * Alias table - map PCI Bus/Dev/Func to Bus/Dev/Func the + * IOMMU see for that device + */ + amd_iommu_alias_table = (void *)__get_free_pages(GFP_KERNEL, + get_order(alias_table_size)); + if (amd_iommu_alias_table == NULL) + goto free; + + /* IOMMU rlookup table - find the IOMMU for a specific device */ + amd_iommu_rlookup_table = (void *)__get_free_pages(GFP_KERNEL, + get_order(rlookup_table_size)); + if (amd_iommu_rlookup_table == NULL) + goto free; + + /* + * Protection Domain table - maps devices to protection domains + * This table has the same size as the rlookup_table + */ + amd_iommu_pd_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, + get_order(rlookup_table_size)); + if (amd_iommu_pd_table == NULL) + goto free; + + amd_iommu_pd_alloc_bitmap = (void *)__get_free_pages( + GFP_KERNEL | __GFP_ZERO, + get_order(MAX_DOMAIN_ID/8)); + if (amd_iommu_pd_alloc_bitmap == NULL) + goto free; + + /* + * let all alias entries point to itself + */ + for (i = 0; i <= amd_iommu_last_bdf; ++i) + amd_iommu_alias_table[i] = i; + + /* + * never allocate domain 0 because its used as the non-allocated and + * error value placeholder + */ + amd_iommu_pd_alloc_bitmap[0] = 1; + + /* + * now the data structures are allocated and basically initialized + * start the real acpi table scan + */ + ret = -ENODEV; + if (acpi_table_parse("IVRS", init_iommu_all) != 0) + goto free; + + if (acpi_table_parse("IVRS", init_memory_definitions) != 0) + goto free; + + ret = amd_iommu_init_dma_ops(); + if (ret) + goto free; + + ret = sysdev_class_register(&amd_iommu_sysdev_class); + if (ret) + goto free; + + ret = sysdev_register(&device_amd_iommu); + if (ret) + goto free; + + enable_iommus(); + + printk(KERN_INFO "AMD IOMMU: aperture size is %d MB\n", + (1 << (amd_iommu_aperture_order-20))); + + printk(KERN_INFO "AMD IOMMU: device isolation "); + if (amd_iommu_isolate) + printk("enabled\n"); + else + printk("disabled\n"); + +out: + return ret; + +free: + free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, 1); + + free_pages((unsigned long)amd_iommu_pd_table, + get_order(rlookup_table_size)); + + free_pages((unsigned long)amd_iommu_rlookup_table, + get_order(rlookup_table_size)); + + free_pages((unsigned long)amd_iommu_alias_table, + get_order(alias_table_size)); + + free_pages((unsigned long)amd_iommu_dev_table, + get_order(dev_table_size)); + + free_iommu_all(); + + free_unity_maps(); + + goto out; +} + +/**************************************************************************** + * + * Early detect code. This code runs at IOMMU detection time in the DMA + * layer. It just looks if there is an IVRS ACPI table to detect AMD + * IOMMUs + * + ****************************************************************************/ +static int __init early_amd_iommu_detect(struct acpi_table_header *table) +{ + return 0; +} + +void __init amd_iommu_detect(void) +{ + if (swiotlb || no_iommu || (iommu_detected && !gart_iommu_aperture)) + return; + + if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) { + iommu_detected = 1; + amd_iommu_detected = 1; +#ifdef CONFIG_GART_IOMMU + gart_iommu_aperture_disabled = 1; + gart_iommu_aperture = 0; +#endif + } +} + +/**************************************************************************** + * + * Parsing functions for the AMD IOMMU specific kernel command line + * options. + * + ****************************************************************************/ + +static int __init parse_amd_iommu_options(char *str) +{ + for (; *str; ++str) { + if (strcmp(str, "isolate") == 0) + amd_iommu_isolate = 1; + } + + return 1; +} + +static int __init parse_amd_iommu_size_options(char *str) +{ + unsigned order = PAGE_SHIFT + get_order(memparse(str, &str)); + + if ((order > 24) && (order < 31)) + amd_iommu_aperture_order = order; + + return 1; +} + +__setup("amd_iommu=", parse_amd_iommu_options); +__setup("amd_iommu_size=", parse_amd_iommu_size_options); diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c index 479926d9e0048d242023def47b3f596550a13344..44e21826db1145a00659c89c5c45232ff3e70d2a 100644 --- a/arch/x86/kernel/aperture_64.c +++ b/arch/x86/kernel/aperture_64.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,18 @@ int fallback_aper_force __initdata; int fix_aperture __initdata = 1; +struct bus_dev_range { + int bus; + int dev_base; + int dev_limit; +}; + +static struct bus_dev_range bus_dev_ranges[] __initdata = { + { 0x00, 0x18, 0x20}, + { 0xff, 0x00, 0x20}, + { 0xfe, 0x00, 0x20} +}; + static struct resource gart_resource = { .name = "GART", .flags = IORESOURCE_MEM, @@ -55,8 +68,9 @@ static u32 __init allocate_aperture(void) u32 aper_size; void *p; - if (fallback_aper_order > 7) - fallback_aper_order = 7; + /* aper_size should <= 1G */ + if (fallback_aper_order > 5) + fallback_aper_order = 5; aper_size = (32 * 1024 * 1024) << fallback_aper_order; /* @@ -65,7 +79,20 @@ static u32 __init allocate_aperture(void) * memory. Unfortunately we cannot move it up because that would * make the IOMMU useless. */ - p = __alloc_bootmem_nopanic(aper_size, aper_size, 0); + /* + * using 512M as goal, in case kexec will load kernel_big + * that will do the on position decompress, and could overlap with + * that positon with gart that is used. + * sequende: + * kernel_small + * ==> kexec (with kdump trigger path or previous doesn't shutdown gart) + * ==> kernel_small(gart area become e820_reserved) + * ==> kexec (with kdump trigger path or previous doesn't shutdown gart) + * ==> kerne_big (uncompressed size will be big than 64M or 128M) + * so don't use 512M below as gart iommu, leave the space for kernel + * code for safe + */ + p = __alloc_bootmem_nopanic(aper_size, aper_size, 512ULL<<20); if (!p || __pa(p)+aper_size > 0xffffffff) { printk(KERN_ERR "Cannot allocate aperture memory hole (%p,%uK)\n", @@ -83,69 +110,53 @@ static u32 __init allocate_aperture(void) return (u32)__pa(p); } -static int __init aperture_valid(u64 aper_base, u32 aper_size) -{ - if (!aper_base) - return 0; - - if (aper_base + aper_size > 0x100000000UL) { - printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); - return 0; - } - if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { - printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); - return 0; - } - if (aper_size < 64*1024*1024) { - printk(KERN_ERR "Aperture too small (%d MB)\n", aper_size>>20); - return 0; - } - - return 1; -} /* Find a PCI capability */ -static __u32 __init find_cap(int num, int slot, int func, int cap) +static u32 __init find_cap(int bus, int slot, int func, int cap) { int bytes; u8 pos; - if (!(read_pci_config_16(num, slot, func, PCI_STATUS) & + if (!(read_pci_config_16(bus, slot, func, PCI_STATUS) & PCI_STATUS_CAP_LIST)) return 0; - pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST); + pos = read_pci_config_byte(bus, slot, func, PCI_CAPABILITY_LIST); for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) { u8 id; pos &= ~3; - id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID); + id = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_ID); if (id == 0xff) break; if (id == cap) return pos; - pos = read_pci_config_byte(num, slot, func, + pos = read_pci_config_byte(bus, slot, func, pos+PCI_CAP_LIST_NEXT); } return 0; } /* Read a standard AGPv3 bridge header */ -static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order) +static u32 __init read_agp(int bus, int slot, int func, int cap, u32 *order) { u32 apsize; u32 apsizereg; int nbits; u32 aper_low, aper_hi; u64 aper; + u32 old_order; - printk(KERN_INFO "AGP bridge at %02x:%02x:%02x\n", num, slot, func); - apsizereg = read_pci_config_16(num, slot, func, cap + 0x14); + printk(KERN_INFO "AGP bridge at %02x:%02x:%02x\n", bus, slot, func); + apsizereg = read_pci_config_16(bus, slot, func, cap + 0x14); if (apsizereg == 0xffffffff) { printk(KERN_ERR "APSIZE in AGP bridge unreadable\n"); return 0; } + /* old_order could be the value from NB gart setting */ + old_order = *order; + apsize = apsizereg & 0xfff; /* Some BIOS use weird encodings not in the AGPv3 table. */ if (apsize & 0xff) @@ -155,14 +166,26 @@ static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order) if ((int)*order < 0) /* < 32MB */ *order = 0; - aper_low = read_pci_config(num, slot, func, 0x10); - aper_hi = read_pci_config(num, slot, func, 0x14); + aper_low = read_pci_config(bus, slot, func, 0x10); + aper_hi = read_pci_config(bus, slot, func, 0x14); aper = (aper_low & ~((1<<22)-1)) | ((u64)aper_hi << 32); + /* + * On some sick chips, APSIZE is 0. It means it wants 4G + * so let double check that order, and lets trust AMD NB settings: + */ + printk(KERN_INFO "Aperture from AGP @ %Lx old size %u MB\n", + aper, 32 << old_order); + if (aper + (32ULL<<(20 + *order)) > 0x100000000ULL) { + printk(KERN_INFO "Aperture size %u MB (APSIZE %x) is not right, using settings from NB\n", + 32 << *order, apsizereg); + *order = old_order; + } + printk(KERN_INFO "Aperture from AGP @ %Lx size %u MB (APSIZE %x)\n", aper, 32 << *order, apsizereg); - if (!aperture_valid(aper, (32*1024*1024) << *order)) + if (!aperture_valid(aper, (32*1024*1024) << *order, 32<<20)) return 0; return (u32)aper; } @@ -180,17 +203,17 @@ static __u32 __init read_agp(int num, int slot, int func, int cap, u32 *order) * the AGP bridges should be always an own bus on the HT hierarchy, * but do it here for future safety. */ -static __u32 __init search_agp_bridge(u32 *order, int *valid_agp) +static u32 __init search_agp_bridge(u32 *order, int *valid_agp) { - int num, slot, func; + int bus, slot, func; /* Poor man's PCI discovery */ - for (num = 0; num < 256; num++) { + for (bus = 0; bus < 256; bus++) { for (slot = 0; slot < 32; slot++) { for (func = 0; func < 8; func++) { u32 class, cap; u8 type; - class = read_pci_config(num, slot, func, + class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION); if (class == 0xffffffff) break; @@ -199,17 +222,17 @@ static __u32 __init search_agp_bridge(u32 *order, int *valid_agp) case PCI_CLASS_BRIDGE_HOST: case PCI_CLASS_BRIDGE_OTHER: /* needed? */ /* AGP bridge? */ - cap = find_cap(num, slot, func, + cap = find_cap(bus, slot, func, PCI_CAP_ID_AGP); if (!cap) break; *valid_agp = 1; - return read_agp(num, slot, func, cap, + return read_agp(bus, slot, func, cap, order); } /* No multi-function device? */ - type = read_pci_config_byte(num, slot, func, + type = read_pci_config_byte(bus, slot, func, PCI_HEADER_TYPE); if (!(type & 0x80)) break; @@ -249,36 +272,50 @@ void __init early_gart_iommu_check(void) * or BIOS forget to put that in reserved. * try to update e820 to make that region as reserved. */ - int fix, num; + int i, fix, slot; u32 ctl; u32 aper_size = 0, aper_order = 0, last_aper_order = 0; u64 aper_base = 0, last_aper_base = 0; - int aper_enabled = 0, last_aper_enabled = 0; + int aper_enabled = 0, last_aper_enabled = 0, last_valid = 0; if (!early_pci_allowed()) return; + /* This is mostly duplicate of iommu_hole_init */ fix = 0; - for (num = 24; num < 32; num++) { - if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) - continue; - - ctl = read_pci_config(0, num, 3, 0x90); - aper_enabled = ctl & 1; - aper_order = (ctl >> 1) & 7; - aper_size = (32 * 1024 * 1024) << aper_order; - aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff; - aper_base <<= 25; - - if ((last_aper_order && aper_order != last_aper_order) || - (last_aper_base && aper_base != last_aper_base) || - (last_aper_enabled && aper_enabled != last_aper_enabled)) { - fix = 1; - break; + for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { + int bus; + int dev_base, dev_limit; + + bus = bus_dev_ranges[i].bus; + dev_base = bus_dev_ranges[i].dev_base; + dev_limit = bus_dev_ranges[i].dev_limit; + + for (slot = dev_base; slot < dev_limit; slot++) { + if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00))) + continue; + + ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); + aper_enabled = ctl & AMD64_GARTEN; + aper_order = (ctl >> 1) & 7; + aper_size = (32 * 1024 * 1024) << aper_order; + aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; + aper_base <<= 25; + + if (last_valid) { + if ((aper_order != last_aper_order) || + (aper_base != last_aper_base) || + (aper_enabled != last_aper_enabled)) { + fix = 1; + break; + } + } + + last_aper_order = aper_order; + last_aper_base = aper_base; + last_aper_enabled = aper_enabled; + last_valid = 1; } - last_aper_order = aper_order; - last_aper_base = aper_base; - last_aper_enabled = aper_enabled; } if (!fix && !aper_enabled) @@ -290,32 +327,46 @@ void __init early_gart_iommu_check(void) if (gart_fix_e820 && !fix && aper_enabled) { if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { - /* reserved it, so we can resuse it in second kernel */ + /* reserve it, so we can reuse it in second kernel */ printk(KERN_INFO "update e820 for GART\n"); - add_memory_region(aper_base, aper_size, E820_RESERVED); + e820_add_region(aper_base, aper_size, E820_RESERVED); update_e820(); } - return; } + if (!fix) + return; + /* different nodes have different setting, disable them all at first*/ - for (num = 24; num < 32; num++) { - if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) - continue; + for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { + int bus; + int dev_base, dev_limit; + + bus = bus_dev_ranges[i].bus; + dev_base = bus_dev_ranges[i].dev_base; + dev_limit = bus_dev_ranges[i].dev_limit; + + for (slot = dev_base; slot < dev_limit; slot++) { + if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00))) + continue; - ctl = read_pci_config(0, num, 3, 0x90); - ctl &= ~1; - write_pci_config(0, num, 3, 0x90, ctl); + ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL); + ctl &= ~AMD64_GARTEN; + write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl); + } } } +static int __initdata printed_gart_size_msg; + void __init gart_iommu_hole_init(void) { + u32 agp_aper_base = 0, agp_aper_order = 0; u32 aper_size, aper_alloc = 0, aper_order = 0, last_aper_order = 0; u64 aper_base, last_aper_base = 0; - int fix, num, valid_agp = 0; - int node; + int fix, slot, valid_agp = 0; + int i, node; if (gart_iommu_aperture_disabled || !fix_aperture || !early_pci_allowed()) @@ -323,38 +374,65 @@ void __init gart_iommu_hole_init(void) printk(KERN_INFO "Checking aperture...\n"); + if (!fallback_aper_force) + agp_aper_base = search_agp_bridge(&agp_aper_order, &valid_agp); + fix = 0; node = 0; - for (num = 24; num < 32; num++) { - if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) - continue; - - iommu_detected = 1; - gart_iommu_aperture = 1; - - aper_order = (read_pci_config(0, num, 3, 0x90) >> 1) & 7; - aper_size = (32 * 1024 * 1024) << aper_order; - aper_base = read_pci_config(0, num, 3, 0x94) & 0x7fff; - aper_base <<= 25; - - printk(KERN_INFO "Node %d: aperture @ %Lx size %u MB\n", - node, aper_base, aper_size >> 20); - node++; - - if (!aperture_valid(aper_base, aper_size)) { - fix = 1; - break; - } + for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { + int bus; + int dev_base, dev_limit; + + bus = bus_dev_ranges[i].bus; + dev_base = bus_dev_ranges[i].dev_base; + dev_limit = bus_dev_ranges[i].dev_limit; + + for (slot = dev_base; slot < dev_limit; slot++) { + if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00))) + continue; + + iommu_detected = 1; + gart_iommu_aperture = 1; + + aper_order = (read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL) >> 1) & 7; + aper_size = (32 * 1024 * 1024) << aper_order; + aper_base = read_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE) & 0x7fff; + aper_base <<= 25; + + printk(KERN_INFO "Node %d: aperture @ %Lx size %u MB\n", + node, aper_base, aper_size >> 20); + node++; + + if (!aperture_valid(aper_base, aper_size, 64<<20)) { + if (valid_agp && agp_aper_base && + agp_aper_base == aper_base && + agp_aper_order == aper_order) { + /* the same between two setting from NB and agp */ + if (!no_iommu && + max_pfn > MAX_DMA32_PFN && + !printed_gart_size_msg) { + printk(KERN_ERR "you are using iommu with agp, but GART size is less than 64M\n"); + printk(KERN_ERR "please increase GART size in your BIOS setup\n"); + printk(KERN_ERR "if BIOS doesn't have that option, contact your HW vendor!\n"); + printed_gart_size_msg = 1; + } + } else { + fix = 1; + goto out; + } + } - if ((last_aper_order && aper_order != last_aper_order) || - (last_aper_base && aper_base != last_aper_base)) { - fix = 1; - break; + if ((last_aper_order && aper_order != last_aper_order) || + (last_aper_base && aper_base != last_aper_base)) { + fix = 1; + goto out; + } + last_aper_order = aper_order; + last_aper_base = aper_base; } - last_aper_order = aper_order; - last_aper_base = aper_base; } +out: if (!fix && !fallback_aper_force) { if (last_aper_base) { unsigned long n = (32 * 1024 * 1024) << last_aper_order; @@ -364,14 +442,16 @@ void __init gart_iommu_hole_init(void) return; } - if (!fallback_aper_force) - aper_alloc = search_agp_bridge(&aper_order, &valid_agp); + if (!fallback_aper_force) { + aper_alloc = agp_aper_base; + aper_order = agp_aper_order; + } if (aper_alloc) { /* Got the aperture from the AGP bridge */ } else if (swiotlb && !valid_agp) { /* Do nothing */ - } else if ((!no_iommu && end_pfn > MAX_DMA32_PFN) || + } else if ((!no_iommu && max_pfn > MAX_DMA32_PFN) || force_iommu || valid_agp || fallback_aper_force) { @@ -401,16 +481,24 @@ void __init gart_iommu_hole_init(void) } /* Fix up the north bridges */ - for (num = 24; num < 32; num++) { - if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00))) - continue; - - /* - * Don't enable translation yet. That is done later. - * Assume this BIOS didn't initialise the GART so - * just overwrite all previous bits - */ - write_pci_config(0, num, 3, 0x90, aper_order<<1); - write_pci_config(0, num, 3, 0x94, aper_alloc>>25); + for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { + int bus; + int dev_base, dev_limit; + + bus = bus_dev_ranges[i].bus; + dev_base = bus_dev_ranges[i].dev_base; + dev_limit = bus_dev_ranges[i].dev_limit; + for (slot = dev_base; slot < dev_limit; slot++) { + if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00))) + continue; + + /* Don't enable translation yet. That is done later. + Assume this BIOS didn't initialise the GART so + just overwrite all previous bits */ + write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, aper_order << 1); + write_pci_config(bus, slot, 3, AMD64_GARTAPERTUREBASE, aper_alloc >> 25); + } } + + set_up_gart_resume(aper_order, aper_alloc); } diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c index 4b99b1bdeb6cbb090e5868138922b259da7d98fe..f93c18f5b79dc2e5741fd932a391112eadedf07c 100644 --- a/arch/x86/kernel/apic_32.c +++ b/arch/x86/kernel/apic_32.c @@ -52,29 +52,40 @@ unsigned long mp_lapic_addr; -DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; -EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); - /* * Knob to control our willingness to enable the local APIC. * - * -1=force-disable, +1=force-enable + * +1=force-enable */ -static int enable_local_apic __initdata; +static int force_enable_local_apic; +int disable_apic; /* Local APIC timer verification ok */ static int local_apic_timer_verify_ok; -/* Disable local APIC timer from the kernel commandline or via dmi quirk - or using CPU MSR check */ -int local_apic_timer_disabled; +/* Disable local APIC timer from the kernel commandline or via dmi quirk */ +static int local_apic_timer_disabled; /* Local APIC timer works in C2 */ int local_apic_timer_c2_ok; EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok); +int first_system_vector = 0xfe; + +char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE}; + /* * Debug level, exported for io_apic.c */ -int apic_verbosity; +unsigned int apic_verbosity; + +int pic_mode; + +/* Have we found an MP table */ +int smp_found_config; + +static struct resource lapic_resource = { + .name = "Local APIC", + .flags = IORESOURCE_MEM | IORESOURCE_BUSY, +}; static unsigned int calibration_result; @@ -134,13 +145,18 @@ static int modern_apic(void) return lapic_get_version() >= 0x14; } -void apic_wait_icr_idle(void) +/* + * Paravirt kernels also might be using these below ops. So we still + * use generic apic_read()/apic_write(), which might be pointing to different + * ops in PARAVIRT case. + */ +void xapic_wait_icr_idle(void) { while (apic_read(APIC_ICR) & APIC_ICR_BUSY) cpu_relax(); } -u32 safe_apic_wait_icr_idle(void) +u32 safe_xapic_wait_icr_idle(void) { u32 send_status; int timeout; @@ -156,6 +172,34 @@ u32 safe_apic_wait_icr_idle(void) return send_status; } +void xapic_icr_write(u32 low, u32 id) +{ + apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); + apic_write(APIC_ICR, low); +} + +u64 xapic_icr_read(void) +{ + u32 icr1, icr2; + + icr2 = apic_read(APIC_ICR2); + icr1 = apic_read(APIC_ICR); + + return icr1 | ((u64)icr2 << 32); +} + +static struct apic_ops xapic_ops = { + .read = native_apic_mem_read, + .write = native_apic_mem_write, + .icr_read = xapic_icr_read, + .icr_write = xapic_icr_write, + .wait_icr_idle = xapic_wait_icr_idle, + .safe_wait_icr_idle = safe_xapic_wait_icr_idle, +}; + +struct apic_ops __read_mostly *apic_ops = &xapic_ops; +EXPORT_SYMBOL_GPL(apic_ops); + /** * enable_NMI_through_LVT0 - enable NMI through local vector table 0 */ @@ -166,7 +210,7 @@ void __cpuinit enable_NMI_through_LVT0(void) /* Level triggered for 82489DX */ if (!lapic_is_integrated()) v |= APIC_LVT_LEVEL_TRIGGER; - apic_write_around(APIC_LVT0, v); + apic_write(APIC_LVT0, v); } /** @@ -201,9 +245,6 @@ int lapic_get_maxlvt(void) * this function twice on the boot CPU, once with a bogus timeout * value, second time for real. The other (noncalibrating) CPUs * call this function only once, with the real, calibrated value. - * - * We do reads before writes even if unnecessary, to get around the - * P5 APIC double write bug. */ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) { @@ -218,18 +259,18 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) if (!irqen) lvtt_value |= APIC_LVT_MASKED; - apic_write_around(APIC_LVTT, lvtt_value); + apic_write(APIC_LVTT, lvtt_value); /* * Divide PICLK by 16 */ tmp_value = apic_read(APIC_TDCR); - apic_write_around(APIC_TDCR, (tmp_value - & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) - | APIC_TDR_DIV_16); + apic_write(APIC_TDCR, + (tmp_value & ~(APIC_TDR_DIV_1 | APIC_TDR_DIV_TMBASE)) | + APIC_TDR_DIV_16); if (!oneshot) - apic_write_around(APIC_TMICT, clocks/APIC_DIVISOR); + apic_write(APIC_TMICT, clocks / APIC_DIVISOR); } /* @@ -238,7 +279,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) static int lapic_next_event(unsigned long delta, struct clock_event_device *evt) { - apic_write_around(APIC_TMICT, delta); + apic_write(APIC_TMICT, delta); return 0; } @@ -267,7 +308,7 @@ static void lapic_timer_setup(enum clock_event_mode mode, case CLOCK_EVT_MODE_SHUTDOWN: v = apic_read(APIC_LVTT); v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); - apic_write_around(APIC_LVTT, v); + apic_write(APIC_LVTT, v); break; case CLOCK_EVT_MODE_RESUME: /* Nothing to do here */ @@ -361,12 +402,7 @@ static void __init lapic_cal_handler(struct clock_event_device *dev) } } -/* - * Setup the boot APIC - * - * Calibrate and verify the result. - */ -void __init setup_boot_APIC_clock(void) +static int __init calibrate_APIC_clock(void) { struct clock_event_device *levt = &__get_cpu_var(lapic_events); const long pm_100ms = PMTMR_TICKS_PER_SEC/10; @@ -376,24 +412,6 @@ void __init setup_boot_APIC_clock(void) long delta, deltapm; int pm_referenced = 0; - /* - * The local apic timer can be disabled via the kernel - * commandline or from the CPU detection code. Register the lapic - * timer as a dummy clock event source on SMP systems, so the - * broadcast mechanism is used. On UP systems simply ignore it. - */ - if (local_apic_timer_disabled) { - /* No broadcast on UP ! */ - if (num_possible_cpus() > 1) { - lapic_clockevent.mult = 1; - setup_APIC_timer(); - } - return; - } - - apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" - "calibrating APIC timer ...\n"); - local_irq_disable(); /* Replace the global interrupt handler */ @@ -478,8 +496,6 @@ void __init setup_boot_APIC_clock(void) calibration_result / (1000000 / HZ), calibration_result % (1000000 / HZ)); - local_apic_timer_verify_ok = 1; - /* * Do a sanity check on the APIC calibration result */ @@ -487,12 +503,11 @@ void __init setup_boot_APIC_clock(void) local_irq_enable(); printk(KERN_WARNING "APIC frequency too slow, disabling apic timer\n"); - /* No broadcast on UP ! */ - if (num_possible_cpus() > 1) - setup_APIC_timer(); - return; + return -1; } + local_apic_timer_verify_ok = 1; + /* We trust the pm timer based calibration */ if (!pm_referenced) { apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); @@ -532,22 +547,55 @@ void __init setup_boot_APIC_clock(void) if (!local_apic_timer_verify_ok) { printk(KERN_WARNING "APIC timer disabled due to verification failure.\n"); + return -1; + } + + return 0; +} + +/* + * Setup the boot APIC + * + * Calibrate and verify the result. + */ +void __init setup_boot_APIC_clock(void) +{ + /* + * The local apic timer can be disabled via the kernel + * commandline or from the CPU detection code. Register the lapic + * timer as a dummy clock event source on SMP systems, so the + * broadcast mechanism is used. On UP systems simply ignore it. + */ + if (local_apic_timer_disabled) { /* No broadcast on UP ! */ - if (num_possible_cpus() == 1) - return; - } else { - /* - * If nmi_watchdog is set to IO_APIC, we need the - * PIT/HPET going. Otherwise register lapic as a dummy - * device. - */ - if (nmi_watchdog != NMI_IO_APIC) - lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; - else - printk(KERN_WARNING "APIC timer registered as dummy," - " due to nmi_watchdog=1!\n"); + if (num_possible_cpus() > 1) { + lapic_clockevent.mult = 1; + setup_APIC_timer(); + } + return; } + apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" + "calibrating APIC timer ...\n"); + + if (calibrate_APIC_clock()) { + /* No broadcast on UP ! */ + if (num_possible_cpus() > 1) + setup_APIC_timer(); + return; + } + + /* + * If nmi_watchdog is set to IO_APIC, we need the + * PIT/HPET going. Otherwise register lapic as a dummy + * device. + */ + if (nmi_watchdog != NMI_IO_APIC) + lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; + else + printk(KERN_WARNING "APIC timer registered as dummy," + " due to nmi_watchdog=%d!\n", nmi_watchdog); + /* Setup the lapic or request the broadcast */ setup_APIC_timer(); } @@ -682,44 +730,44 @@ void clear_local_APIC(void) */ if (maxlvt >= 3) { v = ERROR_APIC_VECTOR; /* any non-zero vector will do */ - apic_write_around(APIC_LVTERR, v | APIC_LVT_MASKED); + apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); } /* * Careful: we have to set masks only first to deassert * any level-triggered sources. */ v = apic_read(APIC_LVTT); - apic_write_around(APIC_LVTT, v | APIC_LVT_MASKED); + apic_write(APIC_LVTT, v | APIC_LVT_MASKED); v = apic_read(APIC_LVT0); - apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); + apic_write(APIC_LVT0, v | APIC_LVT_MASKED); v = apic_read(APIC_LVT1); - apic_write_around(APIC_LVT1, v | APIC_LVT_MASKED); + apic_write(APIC_LVT1, v | APIC_LVT_MASKED); if (maxlvt >= 4) { v = apic_read(APIC_LVTPC); - apic_write_around(APIC_LVTPC, v | APIC_LVT_MASKED); + apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); } /* lets not touch this if we didn't frob it */ #ifdef CONFIG_X86_MCE_P4THERMAL if (maxlvt >= 5) { v = apic_read(APIC_LVTTHMR); - apic_write_around(APIC_LVTTHMR, v | APIC_LVT_MASKED); + apic_write(APIC_LVTTHMR, v | APIC_LVT_MASKED); } #endif /* * Clean APIC state for other OSs: */ - apic_write_around(APIC_LVTT, APIC_LVT_MASKED); - apic_write_around(APIC_LVT0, APIC_LVT_MASKED); - apic_write_around(APIC_LVT1, APIC_LVT_MASKED); + apic_write(APIC_LVTT, APIC_LVT_MASKED); + apic_write(APIC_LVT0, APIC_LVT_MASKED); + apic_write(APIC_LVT1, APIC_LVT_MASKED); if (maxlvt >= 3) - apic_write_around(APIC_LVTERR, APIC_LVT_MASKED); + apic_write(APIC_LVTERR, APIC_LVT_MASKED); if (maxlvt >= 4) - apic_write_around(APIC_LVTPC, APIC_LVT_MASKED); + apic_write(APIC_LVTPC, APIC_LVT_MASKED); #ifdef CONFIG_X86_MCE_P4THERMAL if (maxlvt >= 5) - apic_write_around(APIC_LVTTHMR, APIC_LVT_MASKED); + apic_write(APIC_LVTTHMR, APIC_LVT_MASKED); #endif /* Integrated APIC (!82489DX) ? */ if (lapic_is_integrated()) { @@ -745,7 +793,7 @@ void disable_local_APIC(void) */ value = apic_read(APIC_SPIV); value &= ~APIC_SPIV_APIC_ENABLED; - apic_write_around(APIC_SPIV, value); + apic_write(APIC_SPIV, value); /* * When LAPIC was disabled by the BIOS and enabled by the kernel, @@ -854,8 +902,8 @@ void __init sync_Arb_IDs(void) apic_wait_icr_idle(); apic_printk(APIC_DEBUG, "Synchronizing Arb IDs.\n"); - apic_write_around(APIC_ICR, APIC_DEST_ALLINC | APIC_INT_LEVELTRIG - | APIC_DM_INIT); + apic_write(APIC_ICR, + APIC_DEST_ALLINC | APIC_INT_LEVELTRIG | APIC_DM_INIT); } /* @@ -891,16 +939,16 @@ void __init init_bsp_APIC(void) else value |= APIC_SPIV_FOCUS_DISABLED; value |= SPURIOUS_APIC_VECTOR; - apic_write_around(APIC_SPIV, value); + apic_write(APIC_SPIV, value); /* * Set up the virtual wire mode. */ - apic_write_around(APIC_LVT0, APIC_DM_EXTINT); + apic_write(APIC_LVT0, APIC_DM_EXTINT); value = APIC_DM_NMI; if (!lapic_is_integrated()) /* 82489DX */ value |= APIC_LVT_LEVEL_TRIGGER; - apic_write_around(APIC_LVT1, value); + apic_write(APIC_LVT1, value); } static void __cpuinit lapic_setup_esr(void) @@ -915,7 +963,7 @@ static void __cpuinit lapic_setup_esr(void) /* enables sending errors */ value = ERROR_APIC_VECTOR; - apic_write_around(APIC_LVTERR, value); + apic_write(APIC_LVTERR, value); /* * spec says clear errors after enabling vector. */ @@ -963,7 +1011,7 @@ void __cpuinit setup_local_APIC(void) * Double-check whether this APIC is really registered. */ if (!apic_id_registered()) - BUG(); + WARN_ON_ONCE(1); /* * Intel recommends to set DFR, LDR and TPR before enabling @@ -978,7 +1026,7 @@ void __cpuinit setup_local_APIC(void) */ value = apic_read(APIC_TASKPRI); value &= ~APIC_TPRI_MASK; - apic_write_around(APIC_TASKPRI, value); + apic_write(APIC_TASKPRI, value); /* * After a crash, we no longer service the interrupts and a pending @@ -1036,7 +1084,7 @@ void __cpuinit setup_local_APIC(void) * Set spurious IRQ vector */ value |= SPURIOUS_APIC_VECTOR; - apic_write_around(APIC_SPIV, value); + apic_write(APIC_SPIV, value); /* * Set up LVT0, LVT1: @@ -1058,7 +1106,7 @@ void __cpuinit setup_local_APIC(void) apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", smp_processor_id()); } - apic_write_around(APIC_LVT0, value); + apic_write(APIC_LVT0, value); /* * only the BP should see the LINT1 NMI signal, obviously. @@ -1069,7 +1117,7 @@ void __cpuinit setup_local_APIC(void) value = APIC_DM_NMI | APIC_LVT_MASKED; if (!integrated) /* 82489DX */ value |= APIC_LVT_LEVEL_TRIGGER; - apic_write_around(APIC_LVT1, value); + apic_write(APIC_LVT1, value); } void __cpuinit end_local_APIC_setup(void) @@ -1080,7 +1128,7 @@ void __cpuinit end_local_APIC_setup(void) /* Disable the local apic timer */ value = apic_read(APIC_LVTT); value |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR); - apic_write_around(APIC_LVTT, value); + apic_write(APIC_LVTT, value); setup_apic_nmi_watchdog(NULL); apic_pm_activate(); @@ -1094,7 +1142,7 @@ static int __init detect_init_APIC(void) u32 h, l, features; /* Disabled by kernel option? */ - if (enable_local_apic < 0) + if (disable_apic) return -1; switch (boot_cpu_data.x86_vendor) { @@ -1117,7 +1165,7 @@ static int __init detect_init_APIC(void) * Over-ride BIOS and try to enable the local APIC only if * "lapic" specified. */ - if (enable_local_apic <= 0) { + if (!force_enable_local_apic) { printk(KERN_INFO "Local APIC disabled by BIOS -- " "you can enable it with \"lapic\"\n"); return -1; @@ -1154,9 +1202,6 @@ static int __init detect_init_APIC(void) if (l & MSR_IA32_APICBASE_ENABLE) mp_lapic_addr = l & MSR_IA32_APICBASE_BASE; - if (nmi_watchdog != NMI_NONE && nmi_watchdog != NMI_DISABLED) - nmi_watchdog = NMI_LOCAL_APIC; - printk(KERN_INFO "Found and enabled local APIC!\n"); apic_pm_activate(); @@ -1193,38 +1238,8 @@ void __init init_apic_mappings(void) * default configuration (or the MP table is broken). */ if (boot_cpu_physical_apicid == -1U) - boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); + boot_cpu_physical_apicid = read_apic_id(); -#ifdef CONFIG_X86_IO_APIC - { - unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; - int i; - - for (i = 0; i < nr_ioapics; i++) { - if (smp_found_config) { - ioapic_phys = mp_ioapics[i].mpc_apicaddr; - if (!ioapic_phys) { - printk(KERN_ERR - "WARNING: bogus zero IO-APIC " - "address found in MPTABLE, " - "disabling IO/APIC support!\n"); - smp_found_config = 0; - skip_ioapic_setup = 1; - goto fake_ioapic_page; - } - } else { -fake_ioapic_page: - ioapic_phys = (unsigned long) - alloc_bootmem_pages(PAGE_SIZE); - ioapic_phys = __pa(ioapic_phys); - } - set_fixmap_nocache(idx, ioapic_phys); - printk(KERN_DEBUG "mapped IOAPIC to %08lx (%08lx)\n", - __fix_to_virt(idx), ioapic_phys); - idx++; - } - } -#endif } /* @@ -1236,9 +1251,6 @@ int apic_version[MAX_APICS]; int __init APIC_init_uniprocessor(void) { - if (enable_local_apic < 0) - clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); - if (!smp_found_config && !cpu_has_apic) return -1; @@ -1263,12 +1275,16 @@ int __init APIC_init_uniprocessor(void) * might be zero if read from MP tables. Get it from LAPIC. */ #ifdef CONFIG_CRASH_DUMP - boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); + boot_cpu_physical_apicid = read_apic_id(); #endif - phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid); + physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); setup_local_APIC(); +#ifdef CONFIG_X86_IO_APIC + if (!smp_found_config || skip_ioapic_setup || !nr_ioapics) +#endif + localise_nmi_watchdog(); end_local_APIC_setup(); #ifdef CONFIG_X86_IO_APIC if (smp_found_config) @@ -1351,13 +1367,17 @@ void __init smp_intr_init(void) * The reschedule interrupt is a CPU-to-CPU reschedule-helper * IPI, driven by wakeup. */ - set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); + alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); /* IPI for invalidation */ - set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); + alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt); /* IPI for generic function call */ - set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); + alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); + + /* IPI for single call function */ + set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, + call_function_single_interrupt); } #endif @@ -1370,15 +1390,15 @@ void __init apic_intr_init(void) smp_intr_init(); #endif /* self generated IPI for local APIC timer */ - set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); + alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); /* IPI vectors for APIC spurious and error interrupts */ - set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); - set_intr_gate(ERROR_APIC_VECTOR, error_interrupt); + alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); + alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); /* thermal monitor LVT interrupt */ #ifdef CONFIG_X86_MCE_P4THERMAL - set_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); + alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); #endif } @@ -1433,7 +1453,7 @@ void disconnect_bsp_APIC(int virt_wire_setup) value &= ~APIC_VECTOR_MASK; value |= APIC_SPIV_APIC_ENABLED; value |= 0xf; - apic_write_around(APIC_SPIV, value); + apic_write(APIC_SPIV, value); if (!virt_wire_setup) { /* @@ -1446,10 +1466,10 @@ void disconnect_bsp_APIC(int virt_wire_setup) APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED); value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_EXTINT); - apic_write_around(APIC_LVT0, value); + apic_write(APIC_LVT0, value); } else { /* Disable LVT0 */ - apic_write_around(APIC_LVT0, APIC_LVT_MASKED); + apic_write(APIC_LVT0, APIC_LVT_MASKED); } /* @@ -1463,7 +1483,7 @@ void disconnect_bsp_APIC(int virt_wire_setup) APIC_LVT_LEVEL_TRIGGER | APIC_LVT_MASKED); value |= APIC_LVT_REMOTE_IRR | APIC_SEND_PENDING; value = SET_APIC_DELIVERY_MODE(value, APIC_MODE_NMI); - apic_write_around(APIC_LVT1, value); + apic_write(APIC_LVT1, value); } } @@ -1513,6 +1533,9 @@ void __cpuinit generic_processor_info(int apicid, int version) */ cpu = 0; + if (apicid > max_physical_apicid) + max_physical_apicid = apicid; + /* * Would be preferable to switch to bigsmp when CONFIG_HOTPLUG_CPU=y * but we need to work other dependencies like SMP_SUSPEND etc @@ -1520,7 +1543,7 @@ void __cpuinit generic_processor_info(int apicid, int version) * if (CPU_HOTPLUG_ENABLED || num_processors > 8) * - Ashok Raj */ - if (num_processors > 8) { + if (max_physical_apicid >= 8) { switch (boot_cpu_data.x86_vendor) { case X86_VENDOR_INTEL: if (!APIC_XAPIC(version)) { @@ -1534,9 +1557,9 @@ void __cpuinit generic_processor_info(int apicid, int version) } #ifdef CONFIG_SMP /* are we being called early in kernel startup? */ - if (x86_cpu_to_apicid_early_ptr) { - u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr; - u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; + if (early_per_cpu_ptr(x86_cpu_to_apicid)) { + u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid); + u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); cpu_to_apicid[cpu] = apicid; bios_cpu_apicid[cpu] = apicid; @@ -1703,15 +1726,15 @@ static void apic_pm_activate(void) { } */ static int __init parse_lapic(char *arg) { - enable_local_apic = 1; + force_enable_local_apic = 1; return 0; } early_param("lapic", parse_lapic); static int __init parse_nolapic(char *arg) { - enable_local_apic = -1; - clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); + disable_apic = 1; + setup_clear_cpu_cap(X86_FEATURE_APIC); return 0; } early_param("nolapic", parse_nolapic); @@ -1740,3 +1763,21 @@ static int __init apic_set_verbosity(char *str) } __setup("apic=", apic_set_verbosity); +static int __init lapic_insert_resource(void) +{ + if (!apic_phys) + return -1; + + /* Put local APIC into the resource map. */ + lapic_resource.start = apic_phys; + lapic_resource.end = lapic_resource.start + PAGE_SIZE - 1; + insert_resource(&iomem_resource, &lapic_resource); + + return 0; +} + +/* + * need call insert after e820_reserve_resources() + * that is using request_resource + */ +late_initcall(lapic_insert_resource); diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c index 0633cfd0dc291a1310f0632e1012cf663b5e89a9..cd63c0bc61802a5415a3f8917af5e02bffd459ed 100644 --- a/arch/x86/kernel/apic_64.c +++ b/arch/x86/kernel/apic_64.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -39,13 +40,19 @@ #include #include #include +#include #include #include -int disable_apic_timer __cpuinitdata; +static int disable_apic_timer __cpuinitdata; static int apic_calibrate_pmtmr __initdata; int disable_apic; +int disable_x2apic; +int x2apic; + +/* x2apic enabled before OS handover */ +int x2apic_preenabled; /* Local APIC timer works in C2 */ int local_apic_timer_c2_ok; @@ -54,7 +61,10 @@ EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok); /* * Debug level, exported for io_apic.c */ -int apic_verbosity; +unsigned int apic_verbosity; + +/* Have we found an MP table */ +int smp_found_config; static struct resource lapic_resource = { .name = "Local APIC", @@ -87,9 +97,6 @@ static unsigned long apic_phys; unsigned long mp_lapic_addr; -DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID; -EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid); - unsigned int __cpuinitdata maxcpus = NR_CPUS; /* * Get the LAPIC version @@ -119,13 +126,13 @@ static int modern_apic(void) return lapic_get_version() >= 0x14; } -void apic_wait_icr_idle(void) +void xapic_wait_icr_idle(void) { while (apic_read(APIC_ICR) & APIC_ICR_BUSY) cpu_relax(); } -u32 safe_apic_wait_icr_idle(void) +u32 safe_xapic_wait_icr_idle(void) { u32 send_status; int timeout; @@ -141,6 +148,69 @@ u32 safe_apic_wait_icr_idle(void) return send_status; } +void xapic_icr_write(u32 low, u32 id) +{ + apic_write(APIC_ICR2, id << 24); + apic_write(APIC_ICR, low); +} + +u64 xapic_icr_read(void) +{ + u32 icr1, icr2; + + icr2 = apic_read(APIC_ICR2); + icr1 = apic_read(APIC_ICR); + + return (icr1 | ((u64)icr2 << 32)); +} + +static struct apic_ops xapic_ops = { + .read = native_apic_mem_read, + .write = native_apic_mem_write, + .icr_read = xapic_icr_read, + .icr_write = xapic_icr_write, + .wait_icr_idle = xapic_wait_icr_idle, + .safe_wait_icr_idle = safe_xapic_wait_icr_idle, +}; + +struct apic_ops __read_mostly *apic_ops = &xapic_ops; + +EXPORT_SYMBOL_GPL(apic_ops); + +static void x2apic_wait_icr_idle(void) +{ + /* no need to wait for icr idle in x2apic */ + return; +} + +static u32 safe_x2apic_wait_icr_idle(void) +{ + /* no need to wait for icr idle in x2apic */ + return 0; +} + +void x2apic_icr_write(u32 low, u32 id) +{ + wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); +} + +u64 x2apic_icr_read(void) +{ + unsigned long val; + + rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); + return val; +} + +static struct apic_ops x2apic_ops = { + .read = native_apic_msr_read, + .write = native_apic_msr_write, + .icr_read = x2apic_icr_read, + .icr_write = x2apic_icr_write, + .wait_icr_idle = x2apic_wait_icr_idle, + .safe_wait_icr_idle = safe_x2apic_wait_icr_idle, +}; + /** * enable_NMI_through_LVT0 - enable NMI through local vector table 0 */ @@ -314,7 +384,7 @@ static void setup_APIC_timer(void) #define TICK_COUNT 100000000 -static void __init calibrate_APIC_clock(void) +static int __init calibrate_APIC_clock(void) { unsigned apic, apic_start; unsigned long tsc, tsc_start; @@ -368,6 +438,17 @@ static void __init calibrate_APIC_clock(void) clockevent_delta2ns(0xF, &lapic_clockevent); calibration_result = result / HZ; + + /* + * Do a sanity check on the APIC calibration result + */ + if (calibration_result < (1000000 / HZ)) { + printk(KERN_WARNING + "APIC frequency too slow, disabling apic timer\n"); + return -1; + } + + return 0; } /* @@ -394,14 +475,7 @@ void __init setup_boot_APIC_clock(void) } printk(KERN_INFO "Using local APIC timer interrupts.\n"); - calibrate_APIC_clock(); - - /* - * Do a sanity check on the APIC calibration result - */ - if (calibration_result < (1000000 / HZ)) { - printk(KERN_WARNING - "APIC frequency too slow, disabling apic timer\n"); + if (calibrate_APIC_clock()) { /* No broadcast on UP ! */ if (num_possible_cpus() > 1) setup_APIC_timer(); @@ -417,37 +491,13 @@ void __init setup_boot_APIC_clock(void) lapic_clockevent.features &= ~CLOCK_EVT_FEAT_DUMMY; else printk(KERN_WARNING "APIC timer registered as dummy," - " due to nmi_watchdog=1!\n"); + " due to nmi_watchdog=%d!\n", nmi_watchdog); setup_APIC_timer(); } -/* - * AMD C1E enabled CPUs have a real nasty problem: Some BIOSes set the - * C1E flag only in the secondary CPU, so when we detect the wreckage - * we already have enabled the boot CPU local apic timer. Check, if - * disable_apic_timer is set and the DUMMY flag is cleared. If yes, - * set the DUMMY flag again and force the broadcast mode in the - * clockevents layer. - */ -static void __cpuinit check_boot_apic_timer_broadcast(void) -{ - if (!disable_apic_timer || - (lapic_clockevent.features & CLOCK_EVT_FEAT_DUMMY)) - return; - - printk(KERN_INFO "AMD C1E detected late. Force timer broadcast.\n"); - lapic_clockevent.features |= CLOCK_EVT_FEAT_DUMMY; - - local_irq_enable(); - clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, - &boot_cpu_physical_apicid); - local_irq_disable(); -} - void __cpuinit setup_secondary_APIC_clock(void) { - check_boot_apic_timer_broadcast(); setup_APIC_timer(); } @@ -650,10 +700,10 @@ int __init verify_local_APIC(void) /* * The ID register is read/write in a real APIC. */ - reg0 = read_apic_id(); + reg0 = apic_read(APIC_ID); apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg0); apic_write(APIC_ID, reg0 ^ APIC_ID_MASK); - reg1 = read_apic_id(); + reg1 = apic_read(APIC_ID); apic_printk(APIC_DEBUG, "Getting ID: %x\n", reg1); apic_write(APIC_ID, reg0); if (reg1 != (reg0 ^ APIC_ID_MASK)) @@ -850,11 +900,129 @@ static void __cpuinit lapic_setup_esr(void) void __cpuinit end_local_APIC_setup(void) { lapic_setup_esr(); - nmi_watchdog_default(); setup_apic_nmi_watchdog(NULL); apic_pm_activate(); } +void check_x2apic(void) +{ + int msr, msr2; + + rdmsr(MSR_IA32_APICBASE, msr, msr2); + + if (msr & X2APIC_ENABLE) { + printk("x2apic enabled by BIOS, switching to x2apic ops\n"); + x2apic_preenabled = x2apic = 1; + apic_ops = &x2apic_ops; + } +} + +void enable_x2apic(void) +{ + int msr, msr2; + + rdmsr(MSR_IA32_APICBASE, msr, msr2); + if (!(msr & X2APIC_ENABLE)) { + printk("Enabling x2apic\n"); + wrmsr(MSR_IA32_APICBASE, msr | X2APIC_ENABLE, 0); + } +} + +void enable_IR_x2apic(void) +{ +#ifdef CONFIG_INTR_REMAP + int ret; + unsigned long flags; + + if (!cpu_has_x2apic) + return; + + if (!x2apic_preenabled && disable_x2apic) { + printk(KERN_INFO + "Skipped enabling x2apic and Interrupt-remapping " + "because of nox2apic\n"); + return; + } + + if (x2apic_preenabled && disable_x2apic) + panic("Bios already enabled x2apic, can't enforce nox2apic"); + + if (!x2apic_preenabled && skip_ioapic_setup) { + printk(KERN_INFO + "Skipped enabling x2apic and Interrupt-remapping " + "because of skipping io-apic setup\n"); + return; + } + + ret = dmar_table_init(); + if (ret) { + printk(KERN_INFO + "dmar_table_init() failed with %d:\n", ret); + + if (x2apic_preenabled) + panic("x2apic enabled by bios. But IR enabling failed"); + else + printk(KERN_INFO + "Not enabling x2apic,Intr-remapping\n"); + return; + } + + local_irq_save(flags); + mask_8259A(); + save_mask_IO_APIC_setup(); + + ret = enable_intr_remapping(1); + + if (ret && x2apic_preenabled) { + local_irq_restore(flags); + panic("x2apic enabled by bios. But IR enabling failed"); + } + + if (ret) + goto end; + + if (!x2apic) { + x2apic = 1; + apic_ops = &x2apic_ops; + enable_x2apic(); + } +end: + if (ret) + /* + * IR enabling failed + */ + restore_IO_APIC_setup(); + else + reinit_intr_remapped_IO_APIC(x2apic_preenabled); + + unmask_8259A(); + local_irq_restore(flags); + + if (!ret) { + if (!x2apic_preenabled) + printk(KERN_INFO + "Enabled x2apic and interrupt-remapping\n"); + else + printk(KERN_INFO + "Enabled Interrupt-remapping\n"); + } else + printk(KERN_ERR + "Failed to enable Interrupt-remapping and x2apic\n"); +#else + if (!cpu_has_x2apic) + return; + + if (x2apic_preenabled) + panic("x2apic enabled prior OS handover," + " enable CONFIG_INTR_REMAP"); + + printk(KERN_INFO "Enable CONFIG_INTR_REMAP for enabling intr-remapping " + " and x2apic\n"); +#endif + + return; +} + /* * Detect and enable local APICs on non-SMP boards. * Original code written by Keir Fraser. @@ -875,7 +1043,7 @@ static int __init detect_init_APIC(void) void __init early_init_lapic_mapping(void) { - unsigned long apic_phys; + unsigned long phys_addr; /* * If no local APIC can be found then go out @@ -884,17 +1052,17 @@ void __init early_init_lapic_mapping(void) if (!smp_found_config) return; - apic_phys = mp_lapic_addr; + phys_addr = mp_lapic_addr; - set_fixmap_nocache(FIX_APIC_BASE, apic_phys); + set_fixmap_nocache(FIX_APIC_BASE, phys_addr); apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", - APIC_BASE, apic_phys); + APIC_BASE, phys_addr); /* * Fetch the APIC ID of the BSP in case we have a * default configuration (or the MP table is broken). */ - boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); + boot_cpu_physical_apicid = read_apic_id(); } /** @@ -902,6 +1070,11 @@ void __init early_init_lapic_mapping(void) */ void __init init_apic_mappings(void) { + if (x2apic) { + boot_cpu_physical_apicid = read_apic_id(); + return; + } + /* * If no local APIC can be found then set up a fake all * zeroes page to simulate the local APIC and another @@ -921,7 +1094,7 @@ void __init init_apic_mappings(void) * Fetch the APIC ID of the BSP in case we have a * default configuration (or the MP table is broken). */ - boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); + boot_cpu_physical_apicid = read_apic_id(); } /* @@ -940,9 +1113,14 @@ int __init APIC_init_uniprocessor(void) return -1; } + enable_IR_x2apic(); + setup_apic_routing(); + verify_local_APIC(); - phys_cpu_present_map = physid_mask_of_physid(boot_cpu_physical_apicid); + connect_bsp_APIC(); + + physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map); apic_write(APIC_ID, SET_APIC_ID(boot_cpu_physical_apicid)); setup_local_APIC(); @@ -954,6 +1132,8 @@ int __init APIC_init_uniprocessor(void) if (!skip_ioapic_setup && nr_ioapics) enable_IO_APIC(); + if (!smp_found_config || skip_ioapic_setup || !nr_ioapics) + localise_nmi_watchdog(); end_local_APIC_setup(); if (smp_found_config && !skip_ioapic_setup && nr_ioapics) @@ -1021,6 +1201,14 @@ asmlinkage void smp_error_interrupt(void) irq_exit(); } +/** + * * connect_bsp_APIC - attach the APIC to the interrupt system + * */ +void __init connect_bsp_APIC(void) +{ + enable_apic_mode(); +} + void disconnect_bsp_APIC(int virt_wire_setup) { /* Go back to Virtual Wire compatibility mode */ @@ -1090,10 +1278,13 @@ void __cpuinit generic_processor_info(int apicid, int version) */ cpu = 0; } + if (apicid > max_physical_apicid) + max_physical_apicid = apicid; + /* are we being called early in kernel startup? */ - if (x86_cpu_to_apicid_early_ptr) { - u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr; - u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; + if (early_per_cpu_ptr(x86_cpu_to_apicid)) { + u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid); + u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); cpu_to_apicid[cpu] = apicid; bios_cpu_apicid[cpu] = apicid; @@ -1106,6 +1297,11 @@ void __cpuinit generic_processor_info(int apicid, int version) cpu_set(cpu, cpu_present_map); } +int hard_smp_processor_id(void) +{ + return read_apic_id(); +} + /* * Power management */ @@ -1142,7 +1338,7 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state) maxlvt = lapic_get_maxlvt(); - apic_pm_state.apic_id = read_apic_id(); + apic_pm_state.apic_id = apic_read(APIC_ID); apic_pm_state.apic_taskpri = apic_read(APIC_TASKPRI); apic_pm_state.apic_ldr = apic_read(APIC_LDR); apic_pm_state.apic_dfr = apic_read(APIC_DFR); @@ -1177,10 +1373,14 @@ static int lapic_resume(struct sys_device *dev) maxlvt = lapic_get_maxlvt(); local_irq_save(flags); - rdmsr(MSR_IA32_APICBASE, l, h); - l &= ~MSR_IA32_APICBASE_BASE; - l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; - wrmsr(MSR_IA32_APICBASE, l, h); + if (!x2apic) { + rdmsr(MSR_IA32_APICBASE, l, h); + l &= ~MSR_IA32_APICBASE_BASE; + l |= MSR_IA32_APICBASE_ENABLE | mp_lapic_addr; + wrmsr(MSR_IA32_APICBASE, l, h); + } else + enable_x2apic(); + apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED); apic_write(APIC_ID, apic_pm_state.apic_id); apic_write(APIC_DFR, apic_pm_state.apic_dfr); @@ -1269,7 +1469,7 @@ __cpuinit int apic_is_clustered_box(void) if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && !is_vsmp_box()) return 0; - bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr; + bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid); bitmap_zero(clustermap, NUM_APIC_CLUSTERS); for (i = 0; i < NR_CPUS; i++) { @@ -1320,6 +1520,15 @@ __cpuinit int apic_is_clustered_box(void) return (clusters > 2); } +static __init int setup_nox2apic(char *str) +{ + disable_x2apic = 1; + clear_cpu_cap(&boot_cpu_data, X86_FEATURE_X2APIC); + return 0; +} +early_param("nox2apic", setup_nox2apic); + + /* * APIC command line parameters */ @@ -1347,7 +1556,7 @@ early_param("apic", apic_set_verbosity); static __init int setup_disableapic(char *str) { disable_apic = 1; - clear_cpu_cap(&boot_cpu_data, X86_FEATURE_APIC); + setup_clear_cpu_cap(X86_FEATURE_APIC); return 0; } early_param("disableapic", setup_disableapic); diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c index bf9290e290136a36d6006d032c1ca4fe392f84bd..9ee24e6bc4b0e5a661c4ac3dd669c60bf1f82a45 100644 --- a/arch/x86/kernel/apm_32.c +++ b/arch/x86/kernel/apm_32.c @@ -204,6 +204,7 @@ #include #include +#include #include #include #include @@ -218,7 +219,6 @@ #include #include #include -#include #include #include #include @@ -228,6 +228,7 @@ #include #include #include +#include #include #include @@ -1149,7 +1150,7 @@ static void queue_event(apm_event_t event, struct apm_user *sender) as->event_tail = 0; } as->events[as->event_head] = event; - if ((!as->suser) || (!as->writer)) + if (!as->suser || !as->writer) continue; switch (event) { case APM_SYS_SUSPEND: @@ -1211,9 +1212,9 @@ static int suspend(int vetoable) if (err != APM_SUCCESS) apm_error("suspend", err); err = (err == APM_SUCCESS) ? 0 : -EIO; - device_power_up(); + device_power_up(PMSG_RESUME); local_irq_enable(); - device_resume(); + device_resume(PMSG_RESUME); queue_event(APM_NORMAL_RESUME, NULL); spin_lock(&user_list_lock); for (as = user_list; as != NULL; as = as->next) { @@ -1238,7 +1239,7 @@ static void standby(void) apm_error("standby", err); local_irq_disable(); - device_power_up(); + device_power_up(PMSG_RESUME); local_irq_enable(); } @@ -1324,7 +1325,7 @@ static void check_events(void) ignore_bounce = 1; if ((event != APM_NORMAL_RESUME) || (ignore_normal_resume == 0)) { - device_resume(); + device_resume(PMSG_RESUME); queue_event(event, NULL); } ignore_normal_resume = 0; @@ -1396,7 +1397,7 @@ static void apm_mainloop(void) static int check_apm_user(struct apm_user *as, const char *func) { - if ((as == NULL) || (as->magic != APM_BIOS_MAGIC)) { + if (as == NULL || as->magic != APM_BIOS_MAGIC) { printk(KERN_ERR "apm: %s passed bad filp\n", func); return 1; } @@ -1459,18 +1460,19 @@ static unsigned int do_poll(struct file *fp, poll_table *wait) return 0; } -static int do_ioctl(struct inode *inode, struct file *filp, - u_int cmd, u_long arg) +static long do_ioctl(struct file *filp, u_int cmd, u_long arg) { struct apm_user *as; + int ret; as = filp->private_data; if (check_apm_user(as, "ioctl")) return -EIO; - if ((!as->suser) || (!as->writer)) + if (!as->suser || !as->writer) return -EPERM; switch (cmd) { case APM_IOC_STANDBY: + lock_kernel(); if (as->standbys_read > 0) { as->standbys_read--; as->standbys_pending--; @@ -1479,8 +1481,10 @@ static int do_ioctl(struct inode *inode, struct file *filp, queue_event(APM_USER_STANDBY, as); if (standbys_pending <= 0) standby(); + unlock_kernel(); break; case APM_IOC_SUSPEND: + lock_kernel(); if (as->suspends_read > 0) { as->suspends_read--; as->suspends_pending--; @@ -1488,16 +1492,17 @@ static int do_ioctl(struct inode *inode, struct file *filp, } else queue_event(APM_USER_SUSPEND, as); if (suspends_pending <= 0) { - return suspend(1); + ret = suspend(1); } else { as->suspend_wait = 1; wait_event_interruptible(apm_suspend_waitqueue, as->suspend_wait == 0); - return as->suspend_result; + ret = as->suspend_result; } - break; + unlock_kernel(); + return ret; default: - return -EINVAL; + return -ENOTTY; } return 0; } @@ -1544,10 +1549,12 @@ static int do_open(struct inode *inode, struct file *filp) { struct apm_user *as; + lock_kernel(); as = kmalloc(sizeof(*as), GFP_KERNEL); if (as == NULL) { printk(KERN_ERR "apm: cannot allocate struct of size %d bytes\n", sizeof(*as)); + unlock_kernel(); return -ENOMEM; } as->magic = APM_BIOS_MAGIC; @@ -1569,6 +1576,7 @@ static int do_open(struct inode *inode, struct file *filp) user_list = as; spin_unlock(&user_list_lock); filp->private_data = as; + unlock_kernel(); return 0; } @@ -1860,7 +1868,7 @@ static const struct file_operations apm_bios_fops = { .owner = THIS_MODULE, .read = do_read, .poll = do_poll, - .ioctl = do_ioctl, + .unlocked_ioctl = do_ioctl, .open = do_open, .release = do_release, }; diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c index 92588083950f8106bd08aafb081ebe46ce3023fd..6649d09ad88f8830df49427c7d8763196eb0a0f6 100644 --- a/arch/x86/kernel/asm-offsets_32.c +++ b/arch/x86/kernel/asm-offsets_32.c @@ -111,7 +111,7 @@ void foo(void) OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); OFFSET(PV_CPU_iret, pv_cpu_ops, iret); - OFFSET(PV_CPU_irq_enable_syscall_ret, pv_cpu_ops, irq_enable_syscall_ret); + OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0); #endif diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c index f126c05d6170a17e8fdd880b5973324eb8ebb7d0..505543a75a561f1cfc207d4f88dffbd2718bc724 100644 --- a/arch/x86/kernel/asm-offsets_64.c +++ b/arch/x86/kernel/asm-offsets_64.c @@ -18,9 +18,11 @@ #include #include +#include + #define __NO_STUBS 1 #undef __SYSCALL -#undef _ASM_X86_64_UNISTD_H_ +#undef ASM_X86__UNISTD_64_H #define __SYSCALL(nr, sym) [nr] = 1, static char syscalls[] = { #include @@ -34,7 +36,7 @@ int main(void) ENTRY(pid); BLANK(); #undef ENTRY -#define ENTRY(entry) DEFINE(threadinfo_ ## entry, offsetof(struct thread_info, entry)) +#define ENTRY(entry) DEFINE(TI_ ## entry, offsetof(struct thread_info, entry)) ENTRY(flags); ENTRY(addr_limit); ENTRY(preempt_count); @@ -61,8 +63,11 @@ int main(void) OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); + OFFSET(PV_IRQ_adjust_exception_frame, pv_irq_ops, adjust_exception_frame); OFFSET(PV_CPU_iret, pv_cpu_ops, iret); - OFFSET(PV_CPU_irq_enable_syscall_ret, pv_cpu_ops, irq_enable_syscall_ret); + OFFSET(PV_CPU_usergs_sysret32, pv_cpu_ops, usergs_sysret32); + OFFSET(PV_CPU_usergs_sysret64, pv_cpu_ops, usergs_sysret64); + OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); OFFSET(PV_CPU_swapgs, pv_cpu_ops, swapgs); OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2); #endif @@ -128,5 +133,14 @@ int main(void) OFFSET(BP_loadflags, boot_params, hdr.loadflags); OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); OFFSET(BP_version, boot_params, hdr.version); + + BLANK(); + DEFINE(PAGE_SIZE_asm, PAGE_SIZE); +#ifdef CONFIG_XEN + BLANK(); + OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); + OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); +#undef ENTRY +#endif return 0; } diff --git a/arch/x86/kernel/bios_uv.c b/arch/x86/kernel/bios_uv.c new file mode 100644 index 0000000000000000000000000000000000000000..c639bd55391cc1e8b679e2be8ee1373e5c093e2f --- /dev/null +++ b/arch/x86/kernel/bios_uv.c @@ -0,0 +1,48 @@ +/* + * BIOS run time interface routines. + * + * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include + +const char * +x86_bios_strerror(long status) +{ + const char *str; + switch (status) { + case 0: str = "Call completed without error"; break; + case -1: str = "Not implemented"; break; + case -2: str = "Invalid argument"; break; + case -3: str = "Call completed with error"; break; + default: str = "Unknown BIOS status code"; break; + } + return str; +} + +long +x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second, + unsigned long *drift_info) +{ + struct uv_bios_retval isrv; + + BIOS_CALL(isrv, BIOS_FREQ_BASE, which, 0, 0, 0, 0, 0, 0); + *ticks_per_second = isrv.v0; + *drift_info = isrv.v1; + return isrv.status; +} +EXPORT_SYMBOL_GPL(x86_bios_freq_base); diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile index a0c6f8190887f4220b4b76e531e57ad471fc1acb..ee76eaad300135f92c87973e80f2365a821efe27 100644 --- a/arch/x86/kernel/cpu/Makefile +++ b/arch/x86/kernel/cpu/Makefile @@ -6,11 +6,15 @@ obj-y := intel_cacheinfo.o addon_cpuid_features.o obj-y += proc.o feature_names.o obj-$(CONFIG_X86_32) += common.o bugs.o +obj-$(CONFIG_X86_64) += common_64.o bugs_64.o obj-$(CONFIG_X86_32) += amd.o +obj-$(CONFIG_X86_64) += amd_64.o obj-$(CONFIG_X86_32) += cyrix.o obj-$(CONFIG_X86_32) += centaur.o +obj-$(CONFIG_X86_64) += centaur_64.o obj-$(CONFIG_X86_32) += transmeta.o obj-$(CONFIG_X86_32) += intel.o +obj-$(CONFIG_X86_64) += intel_64.o obj-$(CONFIG_X86_32) += umc.o obj-$(CONFIG_X86_MCE) += mcheck/ diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c index c2e1ce33c7cb0e9a9bdab5d16c204c9a83447f7a..84a8220a6072c0425b9da95fbb28b5a309cbfda1 100644 --- a/arch/x86/kernel/cpu/addon_cpuid_features.c +++ b/arch/x86/kernel/cpu/addon_cpuid_features.c @@ -1,9 +1,7 @@ - /* * Routines to indentify additional cpu features that are scattered in * cpuid space. */ - #include #include @@ -53,19 +51,20 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c) #ifdef CONFIG_X86_PAT void __cpuinit validate_pat_support(struct cpuinfo_x86 *c) { + if (!cpu_has_pat) + pat_disable("PAT not supported by CPU."); + switch (c->x86_vendor) { - case X86_VENDOR_AMD: - if (c->x86 >= 0xf && c->x86 <= 0x11) - return; - break; case X86_VENDOR_INTEL: if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15)) return; break; + case X86_VENDOR_AMD: + case X86_VENDOR_CENTAUR: + case X86_VENDOR_TRANSMETA: + return; } - pat_disable(cpu_has_pat ? - "PAT disabled. Not yet verified on this CPU type." : - "PAT not supported by CPU."); + pat_disable("PAT disabled. Not yet verified on this CPU type."); } #endif diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 245866828294c6be3fcf369d0ea76a0a3eed59cb..cae9cabc3031f1e3a2a3d6f8085d20b557026ac3 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -24,45 +24,6 @@ extern void vide(void); __asm__(".align 4\nvide: ret"); -#ifdef CONFIG_X86_LOCAL_APIC -#define ENABLE_C1E_MASK 0x18000000 -#define CPUID_PROCESSOR_SIGNATURE 1 -#define CPUID_XFAM 0x0ff00000 -#define CPUID_XFAM_K8 0x00000000 -#define CPUID_XFAM_10H 0x00100000 -#define CPUID_XFAM_11H 0x00200000 -#define CPUID_XMOD 0x000f0000 -#define CPUID_XMOD_REV_F 0x00040000 - -/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */ -static __cpuinit int amd_apic_timer_broken(void) -{ - u32 lo, hi; - u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); - switch (eax & CPUID_XFAM) { - case CPUID_XFAM_K8: - if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F) - break; - case CPUID_XFAM_10H: - case CPUID_XFAM_11H: - rdmsr(MSR_K8_ENABLE_C1E, lo, hi); - if (lo & ENABLE_C1E_MASK) { - if (smp_processor_id() != boot_cpu_physical_apicid) - printk(KERN_INFO "AMD C1E detected late. " - " Force timer broadcast.\n"); - return 1; - } - break; - default: - /* err on the side of caution */ - return 1; - } - return 0; -} -#endif - -int force_mwait __cpuinitdata; - static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) { if (cpuid_eax(0x80000000) >= 0x80000007) { @@ -297,11 +258,6 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) num_cache_leaves = 3; } -#ifdef CONFIG_X86_LOCAL_APIC - if (amd_apic_timer_broken()) - local_apic_timer_disabled = 1; -#endif - /* K6s reports MCEs but don't actually have all the MSRs */ if (c->x86 < 6) clear_cpu_cap(c, X86_FEATURE_MCE); diff --git a/arch/x86/kernel/cpu/amd_64.c b/arch/x86/kernel/cpu/amd_64.c new file mode 100644 index 0000000000000000000000000000000000000000..d1692b2a41ffac4bf6b9423d38af42741a847b36 --- /dev/null +++ b/arch/x86/kernel/cpu/amd_64.c @@ -0,0 +1,224 @@ +#include +#include + +#include +#include +#include + +#include + +#include "cpu.h" + +int force_mwait __cpuinitdata; + +#ifdef CONFIG_NUMA +static int __cpuinit nearby_node(int apicid) +{ + int i, node; + + for (i = apicid - 1; i >= 0; i--) { + node = apicid_to_node[i]; + if (node != NUMA_NO_NODE && node_online(node)) + return node; + } + for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) { + node = apicid_to_node[i]; + if (node != NUMA_NO_NODE && node_online(node)) + return node; + } + return first_node(node_online_map); /* Shouldn't happen */ +} +#endif + +/* + * On a AMD dual core setup the lower bits of the APIC id distingush the cores. + * Assumes number of cores is a power of two. + */ +static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c) +{ +#ifdef CONFIG_SMP + unsigned bits; +#ifdef CONFIG_NUMA + int cpu = smp_processor_id(); + int node = 0; + unsigned apicid = hard_smp_processor_id(); +#endif + bits = c->x86_coreid_bits; + + /* Low order bits define the core id (index of core in socket) */ + c->cpu_core_id = c->initial_apicid & ((1 << bits)-1); + /* Convert the initial APIC ID into the socket ID */ + c->phys_proc_id = c->initial_apicid >> bits; + +#ifdef CONFIG_NUMA + node = c->phys_proc_id; + if (apicid_to_node[apicid] != NUMA_NO_NODE) + node = apicid_to_node[apicid]; + if (!node_online(node)) { + /* Two possibilities here: + - The CPU is missing memory and no node was created. + In that case try picking one from a nearby CPU + - The APIC IDs differ from the HyperTransport node IDs + which the K8 northbridge parsing fills in. + Assume they are all increased by a constant offset, + but in the same order as the HT nodeids. + If that doesn't result in a usable node fall back to the + path for the previous case. */ + + int ht_nodeid = c->initial_apicid; + + if (ht_nodeid >= 0 && + apicid_to_node[ht_nodeid] != NUMA_NO_NODE) + node = apicid_to_node[ht_nodeid]; + /* Pick a nearby node */ + if (!node_online(node)) + node = nearby_node(apicid); + } + numa_set_node(cpu, node); + + printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node); +#endif +#endif +} + +static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c) +{ +#ifdef CONFIG_SMP + unsigned bits, ecx; + + /* Multi core CPU? */ + if (c->extended_cpuid_level < 0x80000008) + return; + + ecx = cpuid_ecx(0x80000008); + + c->x86_max_cores = (ecx & 0xff) + 1; + + /* CPU telling us the core id bits shift? */ + bits = (ecx >> 12) & 0xF; + + /* Otherwise recompute */ + if (bits == 0) { + while ((1 << bits) < c->x86_max_cores) + bits++; + } + + c->x86_coreid_bits = bits; + +#endif +} + +static void __cpuinit early_init_amd(struct cpuinfo_x86 *c) +{ + early_init_amd_mc(c); + + /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */ + if (c->x86_power & (1<<8)) + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + + set_cpu_cap(c, X86_FEATURE_SYSCALL32); +} + +static void __cpuinit init_amd(struct cpuinfo_x86 *c) +{ + unsigned level; + +#ifdef CONFIG_SMP + unsigned long value; + + /* + * Disable TLB flush filter by setting HWCR.FFDIS on K8 + * bit 6 of msr C001_0015 + * + * Errata 63 for SH-B3 steppings + * Errata 122 for all steppings (F+ have it disabled by default) + */ + if (c->x86 == 0xf) { + rdmsrl(MSR_K8_HWCR, value); + value |= 1 << 6; + wrmsrl(MSR_K8_HWCR, value); + } +#endif + + /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; + 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */ + clear_cpu_cap(c, 0*32+31); + + /* On C+ stepping K8 rep microcode works well for copy/memset */ + if (c->x86 == 0xf) { + level = cpuid_eax(1); + if((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58) + set_cpu_cap(c, X86_FEATURE_REP_GOOD); + } + if (c->x86 == 0x10 || c->x86 == 0x11) + set_cpu_cap(c, X86_FEATURE_REP_GOOD); + + /* Enable workaround for FXSAVE leak */ + if (c->x86 >= 6) + set_cpu_cap(c, X86_FEATURE_FXSAVE_LEAK); + + level = get_model_name(c); + if (!level) { + switch (c->x86) { + case 0xf: + /* Should distinguish Models here, but this is only + a fallback anyways. */ + strcpy(c->x86_model_id, "Hammer"); + break; + } + } + display_cacheinfo(c); + + /* Multi core CPU? */ + if (c->extended_cpuid_level >= 0x80000008) + amd_detect_cmp(c); + + if (c->extended_cpuid_level >= 0x80000006 && + (cpuid_edx(0x80000006) & 0xf000)) + num_cache_leaves = 4; + else + num_cache_leaves = 3; + + if (c->x86 >= 0xf && c->x86 <= 0x11) + set_cpu_cap(c, X86_FEATURE_K8); + + /* MFENCE stops RDTSC speculation */ + set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); + + if (c->x86 == 0x10) { + /* do this for boot cpu */ + if (c == &boot_cpu_data) + check_enable_amd_mmconf_dmi(); + + fam10h_check_enable_mmcfg(); + } + + if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) { + unsigned long long tseg; + + /* + * Split up direct mapping around the TSEG SMM area. + * Don't do it for gbpages because there seems very little + * benefit in doing so. + */ + if (!rdmsrl_safe(MSR_K8_TSEG_ADDR, &tseg)) { + printk(KERN_DEBUG "tseg: %010llx\n", tseg); + if ((tseg>>PMD_SHIFT) < + (max_low_pfn_mapped>>(PMD_SHIFT-PAGE_SHIFT)) || + ((tseg>>PMD_SHIFT) < + (max_pfn_mapped>>(PMD_SHIFT-PAGE_SHIFT)) && + (tseg>>PMD_SHIFT) >= (1ULL<<(32 - PMD_SHIFT)))) + set_memory_4k((unsigned long)__va(tseg), 1); + } + } +} + +static struct cpu_dev amd_cpu_dev __cpuinitdata = { + .c_vendor = "AMD", + .c_ident = { "AuthenticAMD" }, + .c_early_init = early_init_amd, + .c_init = init_amd, +}; + +cpu_vendor_dev_register(X86_VENDOR_AMD, &amd_cpu_dev); + diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c index 170d2f5523b2c6e04f4c28aa423077388bb3abce..c9b58a806e852d3d4a2ff96e0f48c0e737cff80f 100644 --- a/arch/x86/kernel/cpu/bugs.c +++ b/arch/x86/kernel/cpu/bugs.c @@ -59,8 +59,12 @@ static void __init check_fpu(void) return; } -/* trap_init() enabled FXSR and company _before_ testing for FP problems here. */ - /* Test for the divl bug.. */ + /* + * trap_init() enabled FXSR and company _before_ testing for FP + * problems here. + * + * Test for the divl bug.. + */ __asm__("fninit\n\t" "fldl %1\n\t" "fdivl %2\n\t" @@ -108,10 +112,15 @@ static void __init check_popad(void) "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx " : "=&a" (res) : "d" (inp) - : "ecx", "edi" ); - /* If this fails, it means that any user program may lock the CPU hard. Too bad. */ - if (res != 12345678) printk( "Buggy.\n" ); - else printk( "OK.\n" ); + : "ecx", "edi"); + /* + * If this fails, it means that any user program may lock the + * CPU hard. Too bad. + */ + if (res != 12345678) + printk("Buggy.\n"); + else + printk("OK.\n"); #endif } @@ -122,13 +131,7 @@ static void __init check_popad(void) * (for due to lack of "invlpg" and working WP on a i386) * - In order to run on anything without a TSC, we need to be * compiled for a i486. - * - In order to support the local APIC on a buggy Pentium machine, - * we need to be compiled with CONFIG_X86_GOOD_APIC disabled, - * which happens implicitly if compiled for a Pentium or lower - * (unless an advanced selection of CPU features is used) as an - * otherwise config implies a properly working local APIC without - * the need to do extra reads from the APIC. -*/ + */ static void __init check_config(void) { @@ -137,25 +140,11 @@ static void __init check_config(void) * i486+ only features! (WP works in supervisor mode and the * new "invlpg" and "bswap" instructions) */ -#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP) +#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || \ + defined(CONFIG_X86_BSWAP) if (boot_cpu_data.x86 == 3) panic("Kernel requires i486+ for 'invlpg' and other features"); #endif - -/* - * If we were told we had a good local APIC, check for buggy Pentia, - * i.e. all B steppings and the C2 stepping of P54C when using their - * integrated APIC (see 11AP erratum in "Pentium Processor - * Specification Update"). - */ -#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC) - if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL - && cpu_has_apic - && boot_cpu_data.x86 == 5 - && boot_cpu_data.x86_model == 2 - && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11)) - panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!"); -#endif } @@ -170,6 +159,7 @@ void __init check_bugs(void) check_fpu(); check_hlt(); check_popad(); - init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); + init_utsname()->machine[1] = + '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); alternative_instructions(); } diff --git a/arch/x86/kernel/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c similarity index 100% rename from arch/x86/kernel/bugs_64.c rename to arch/x86/kernel/cpu/bugs_64.c diff --git a/arch/x86/kernel/cpu/centaur_64.c b/arch/x86/kernel/cpu/centaur_64.c new file mode 100644 index 0000000000000000000000000000000000000000..1d181c40e2e155c2ddcd62a388d2b78738e4e8e3 --- /dev/null +++ b/arch/x86/kernel/cpu/centaur_64.c @@ -0,0 +1,35 @@ +#include +#include + +#include +#include + +#include "cpu.h" + +static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c) +{ + if (c->x86 == 0x6 && c->x86_model >= 0xf) + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + + set_cpu_cap(c, X86_FEATURE_SYSENTER32); +} + +static void __cpuinit init_centaur(struct cpuinfo_x86 *c) +{ + if (c->x86 == 0x6 && c->x86_model >= 0xf) { + c->x86_cache_alignment = c->x86_clflush_size * 2; + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + set_cpu_cap(c, X86_FEATURE_REP_GOOD); + } + set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); +} + +static struct cpu_dev centaur_cpu_dev __cpuinitdata = { + .c_vendor = "Centaur", + .c_ident = { "CentaurHauls" }, + .c_early_init = early_init_centaur, + .c_init = init_centaur, +}; + +cpu_vendor_dev_register(X86_VENDOR_CENTAUR, ¢aur_cpu_dev); + diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index d0463a9462477716bd065b5c822cd34e96812282..80ab20d4fa39913ce2a7b4ea5676883bb6f9d96f 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -427,7 +427,7 @@ __setup("serialnumber", x86_serial_nr_setup); /* * This does the hard work of actually picking apart the CPU stuff... */ -void __cpuinit identify_cpu(struct cpuinfo_x86 *c) +static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) { int i; diff --git a/arch/x86/kernel/cpu/common_64.c b/arch/x86/kernel/cpu/common_64.c new file mode 100644 index 0000000000000000000000000000000000000000..6f9b8924bdc088d5ff4811767683532e608a28cb --- /dev/null +++ b/arch/x86/kernel/cpu/common_64.c @@ -0,0 +1,672 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_X86_LOCAL_APIC +#include +#include +#include +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cpu.h" + +/* We need valid kernel segments for data and code in long mode too + * IRET will check the segment types kkeil 2000/10/28 + * Also sysret mandates a special GDT layout + */ +/* The TLS descriptors are currently at a different place compared to i386. + Hopefully nobody expects them at a fixed place (Wine?) */ +DEFINE_PER_CPU(struct gdt_page, gdt_page) = { .gdt = { + [GDT_ENTRY_KERNEL32_CS] = { { { 0x0000ffff, 0x00cf9b00 } } }, + [GDT_ENTRY_KERNEL_CS] = { { { 0x0000ffff, 0x00af9b00 } } }, + [GDT_ENTRY_KERNEL_DS] = { { { 0x0000ffff, 0x00cf9300 } } }, + [GDT_ENTRY_DEFAULT_USER32_CS] = { { { 0x0000ffff, 0x00cffb00 } } }, + [GDT_ENTRY_DEFAULT_USER_DS] = { { { 0x0000ffff, 0x00cff300 } } }, + [GDT_ENTRY_DEFAULT_USER_CS] = { { { 0x0000ffff, 0x00affb00 } } }, +} }; +EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); + +__u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata; + +/* Current gdt points %fs at the "master" per-cpu area: after this, + * it's on the real one. */ +void switch_to_new_gdt(void) +{ + struct desc_ptr gdt_descr; + + gdt_descr.address = (long)get_cpu_gdt_table(smp_processor_id()); + gdt_descr.size = GDT_SIZE - 1; + load_gdt(&gdt_descr); +} + +struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; + +static void __cpuinit default_init(struct cpuinfo_x86 *c) +{ + display_cacheinfo(c); +} + +static struct cpu_dev __cpuinitdata default_cpu = { + .c_init = default_init, + .c_vendor = "Unknown", +}; +static struct cpu_dev *this_cpu __cpuinitdata = &default_cpu; + +int __cpuinit get_model_name(struct cpuinfo_x86 *c) +{ + unsigned int *v; + + if (c->extended_cpuid_level < 0x80000004) + return 0; + + v = (unsigned int *) c->x86_model_id; + cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); + cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); + cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); + c->x86_model_id[48] = 0; + return 1; +} + + +void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c) +{ + unsigned int n, dummy, ebx, ecx, edx; + + n = c->extended_cpuid_level; + + if (n >= 0x80000005) { + cpuid(0x80000005, &dummy, &ebx, &ecx, &edx); + printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), " + "D cache %dK (%d bytes/line)\n", + edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); + c->x86_cache_size = (ecx>>24) + (edx>>24); + /* On K8 L1 TLB is inclusive, so don't count it */ + c->x86_tlbsize = 0; + } + + if (n >= 0x80000006) { + cpuid(0x80000006, &dummy, &ebx, &ecx, &edx); + ecx = cpuid_ecx(0x80000006); + c->x86_cache_size = ecx >> 16; + c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff); + + printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n", + c->x86_cache_size, ecx & 0xFF); + } +} + +void __cpuinit detect_ht(struct cpuinfo_x86 *c) +{ +#ifdef CONFIG_SMP + u32 eax, ebx, ecx, edx; + int index_msb, core_bits; + + cpuid(1, &eax, &ebx, &ecx, &edx); + + + if (!cpu_has(c, X86_FEATURE_HT)) + return; + if (cpu_has(c, X86_FEATURE_CMP_LEGACY)) + goto out; + + smp_num_siblings = (ebx & 0xff0000) >> 16; + + if (smp_num_siblings == 1) { + printk(KERN_INFO "CPU: Hyper-Threading is disabled\n"); + } else if (smp_num_siblings > 1) { + + if (smp_num_siblings > NR_CPUS) { + printk(KERN_WARNING "CPU: Unsupported number of " + "siblings %d", smp_num_siblings); + smp_num_siblings = 1; + return; + } + + index_msb = get_count_order(smp_num_siblings); + c->phys_proc_id = phys_pkg_id(index_msb); + + smp_num_siblings = smp_num_siblings / c->x86_max_cores; + + index_msb = get_count_order(smp_num_siblings); + + core_bits = get_count_order(c->x86_max_cores); + + c->cpu_core_id = phys_pkg_id(index_msb) & + ((1 << core_bits) - 1); + } +out: + if ((c->x86_max_cores * smp_num_siblings) > 1) { + printk(KERN_INFO "CPU: Physical Processor ID: %d\n", + c->phys_proc_id); + printk(KERN_INFO "CPU: Processor Core ID: %d\n", + c->cpu_core_id); + } + +#endif +} + +static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c) +{ + char *v = c->x86_vendor_id; + int i; + static int printed; + + for (i = 0; i < X86_VENDOR_NUM; i++) { + if (cpu_devs[i]) { + if (!strcmp(v, cpu_devs[i]->c_ident[0]) || + (cpu_devs[i]->c_ident[1] && + !strcmp(v, cpu_devs[i]->c_ident[1]))) { + c->x86_vendor = i; + this_cpu = cpu_devs[i]; + return; + } + } + } + if (!printed) { + printed++; + printk(KERN_ERR "CPU: Vendor unknown, using generic init.\n"); + printk(KERN_ERR "CPU: Your system may be unstable.\n"); + } + c->x86_vendor = X86_VENDOR_UNKNOWN; +} + +static void __init early_cpu_support_print(void) +{ + int i,j; + struct cpu_dev *cpu_devx; + + printk("KERNEL supported cpus:\n"); + for (i = 0; i < X86_VENDOR_NUM; i++) { + cpu_devx = cpu_devs[i]; + if (!cpu_devx) + continue; + for (j = 0; j < 2; j++) { + if (!cpu_devx->c_ident[j]) + continue; + printk(" %s %s\n", cpu_devx->c_vendor, + cpu_devx->c_ident[j]); + } + } +} + +static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c); + +void __init early_cpu_init(void) +{ + struct cpu_vendor_dev *cvdev; + + for (cvdev = __x86cpuvendor_start ; + cvdev < __x86cpuvendor_end ; + cvdev++) + cpu_devs[cvdev->vendor] = cvdev->cpu_dev; + early_cpu_support_print(); + early_identify_cpu(&boot_cpu_data); +} + +/* Do some early cpuid on the boot CPU to get some parameter that are + needed before check_bugs. Everything advanced is in identify_cpu + below. */ +static void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c) +{ + u32 tfms, xlvl; + + c->loops_per_jiffy = loops_per_jiffy; + c->x86_cache_size = -1; + c->x86_vendor = X86_VENDOR_UNKNOWN; + c->x86_model = c->x86_mask = 0; /* So far unknown... */ + c->x86_vendor_id[0] = '\0'; /* Unset */ + c->x86_model_id[0] = '\0'; /* Unset */ + c->x86_clflush_size = 64; + c->x86_cache_alignment = c->x86_clflush_size; + c->x86_max_cores = 1; + c->x86_coreid_bits = 0; + c->extended_cpuid_level = 0; + memset(&c->x86_capability, 0, sizeof c->x86_capability); + + /* Get vendor name */ + cpuid(0x00000000, (unsigned int *)&c->cpuid_level, + (unsigned int *)&c->x86_vendor_id[0], + (unsigned int *)&c->x86_vendor_id[8], + (unsigned int *)&c->x86_vendor_id[4]); + + get_cpu_vendor(c); + + /* Initialize the standard set of capabilities */ + /* Note that the vendor-specific code below might override */ + + /* Intel-defined flags: level 0x00000001 */ + if (c->cpuid_level >= 0x00000001) { + __u32 misc; + cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4], + &c->x86_capability[0]); + c->x86 = (tfms >> 8) & 0xf; + c->x86_model = (tfms >> 4) & 0xf; + c->x86_mask = tfms & 0xf; + if (c->x86 == 0xf) + c->x86 += (tfms >> 20) & 0xff; + if (c->x86 >= 0x6) + c->x86_model += ((tfms >> 16) & 0xF) << 4; + if (test_cpu_cap(c, X86_FEATURE_CLFLSH)) + c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; + } else { + /* Have CPUID level 0 only - unheard of */ + c->x86 = 4; + } + + c->initial_apicid = (cpuid_ebx(1) >> 24) & 0xff; +#ifdef CONFIG_SMP + c->phys_proc_id = c->initial_apicid; +#endif + /* AMD-defined flags: level 0x80000001 */ + xlvl = cpuid_eax(0x80000000); + c->extended_cpuid_level = xlvl; + if ((xlvl & 0xffff0000) == 0x80000000) { + if (xlvl >= 0x80000001) { + c->x86_capability[1] = cpuid_edx(0x80000001); + c->x86_capability[6] = cpuid_ecx(0x80000001); + } + if (xlvl >= 0x80000004) + get_model_name(c); /* Default name */ + } + + /* Transmeta-defined flags: level 0x80860001 */ + xlvl = cpuid_eax(0x80860000); + if ((xlvl & 0xffff0000) == 0x80860000) { + /* Don't set x86_cpuid_level here for now to not confuse. */ + if (xlvl >= 0x80860001) + c->x86_capability[2] = cpuid_edx(0x80860001); + } + + if (c->extended_cpuid_level >= 0x80000007) + c->x86_power = cpuid_edx(0x80000007); + + if (c->extended_cpuid_level >= 0x80000008) { + u32 eax = cpuid_eax(0x80000008); + + c->x86_virt_bits = (eax >> 8) & 0xff; + c->x86_phys_bits = eax & 0xff; + } + + if (c->x86_vendor != X86_VENDOR_UNKNOWN && + cpu_devs[c->x86_vendor]->c_early_init) + cpu_devs[c->x86_vendor]->c_early_init(c); + + validate_pat_support(c); +} + +/* + * This does the hard work of actually picking apart the CPU stuff... + */ +static void __cpuinit identify_cpu(struct cpuinfo_x86 *c) +{ + int i; + + early_identify_cpu(c); + + init_scattered_cpuid_features(c); + + c->apicid = phys_pkg_id(0); + + /* + * Vendor-specific initialization. In this section we + * canonicalize the feature flags, meaning if there are + * features a certain CPU supports which CPUID doesn't + * tell us, CPUID claiming incorrect flags, or other bugs, + * we handle them here. + * + * At the end of this section, c->x86_capability better + * indicate the features this CPU genuinely supports! + */ + if (this_cpu->c_init) + this_cpu->c_init(c); + + detect_ht(c); + + /* + * On SMP, boot_cpu_data holds the common feature set between + * all CPUs; so make sure that we indicate which features are + * common between the CPUs. The first time this routine gets + * executed, c == &boot_cpu_data. + */ + if (c != &boot_cpu_data) { + /* AND the already accumulated flags with these */ + for (i = 0; i < NCAPINTS; i++) + boot_cpu_data.x86_capability[i] &= c->x86_capability[i]; + } + + /* Clear all flags overriden by options */ + for (i = 0; i < NCAPINTS; i++) + c->x86_capability[i] &= ~cleared_cpu_caps[i]; + +#ifdef CONFIG_X86_MCE + mcheck_init(c); +#endif + select_idle_routine(c); + +#ifdef CONFIG_NUMA + numa_add_cpu(smp_processor_id()); +#endif + +} + +void __cpuinit identify_boot_cpu(void) +{ + identify_cpu(&boot_cpu_data); +} + +void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c) +{ + BUG_ON(c == &boot_cpu_data); + identify_cpu(c); + mtrr_ap_init(); +} + +static __init int setup_noclflush(char *arg) +{ + setup_clear_cpu_cap(X86_FEATURE_CLFLSH); + return 1; +} +__setup("noclflush", setup_noclflush); + +void __cpuinit print_cpu_info(struct cpuinfo_x86 *c) +{ + if (c->x86_model_id[0]) + printk(KERN_CONT "%s", c->x86_model_id); + + if (c->x86_mask || c->cpuid_level >= 0) + printk(KERN_CONT " stepping %02x\n", c->x86_mask); + else + printk(KERN_CONT "\n"); +} + +static __init int setup_disablecpuid(char *arg) +{ + int bit; + if (get_option(&arg, &bit) && bit < NCAPINTS*32) + setup_clear_cpu_cap(bit); + else + return 0; + return 1; +} +__setup("clearcpuid=", setup_disablecpuid); + +cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE; + +struct x8664_pda **_cpu_pda __read_mostly; +EXPORT_SYMBOL(_cpu_pda); + +struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table }; + +char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss; + +unsigned long __supported_pte_mask __read_mostly = ~0UL; +EXPORT_SYMBOL_GPL(__supported_pte_mask); + +static int do_not_nx __cpuinitdata; + +/* noexec=on|off +Control non executable mappings for 64bit processes. + +on Enable(default) +off Disable +*/ +static int __init nonx_setup(char *str) +{ + if (!str) + return -EINVAL; + if (!strncmp(str, "on", 2)) { + __supported_pte_mask |= _PAGE_NX; + do_not_nx = 0; + } else if (!strncmp(str, "off", 3)) { + do_not_nx = 1; + __supported_pte_mask &= ~_PAGE_NX; + } + return 0; +} +early_param("noexec", nonx_setup); + +int force_personality32; + +/* noexec32=on|off +Control non executable heap for 32bit processes. +To control the stack too use noexec=off + +on PROT_READ does not imply PROT_EXEC for 32bit processes (default) +off PROT_READ implies PROT_EXEC +*/ +static int __init nonx32_setup(char *str) +{ + if (!strcmp(str, "on")) + force_personality32 &= ~READ_IMPLIES_EXEC; + else if (!strcmp(str, "off")) + force_personality32 |= READ_IMPLIES_EXEC; + return 1; +} +__setup("noexec32=", nonx32_setup); + +void pda_init(int cpu) +{ + struct x8664_pda *pda = cpu_pda(cpu); + + /* Setup up data that may be needed in __get_free_pages early */ + loadsegment(fs, 0); + loadsegment(gs, 0); + /* Memory clobbers used to order PDA accessed */ + mb(); + wrmsrl(MSR_GS_BASE, pda); + mb(); + + pda->cpunumber = cpu; + pda->irqcount = -1; + pda->kernelstack = (unsigned long)stack_thread_info() - + PDA_STACKOFFSET + THREAD_SIZE; + pda->active_mm = &init_mm; + pda->mmu_state = 0; + + if (cpu == 0) { + /* others are initialized in smpboot.c */ + pda->pcurrent = &init_task; + pda->irqstackptr = boot_cpu_stack; + } else { + pda->irqstackptr = (char *) + __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER); + if (!pda->irqstackptr) + panic("cannot allocate irqstack for cpu %d", cpu); + + if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE) + pda->nodenumber = cpu_to_node(cpu); + } + + pda->irqstackptr += IRQSTACKSIZE-64; +} + +char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + + DEBUG_STKSZ] __page_aligned_bss; + +extern asmlinkage void ignore_sysret(void); + +/* May not be marked __init: used by software suspend */ +void syscall_init(void) +{ + /* + * LSTAR and STAR live in a bit strange symbiosis. + * They both write to the same internal register. STAR allows to + * set CS/DS but only a 32bit target. LSTAR sets the 64bit rip. + */ + wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32); + wrmsrl(MSR_LSTAR, system_call); + wrmsrl(MSR_CSTAR, ignore_sysret); + +#ifdef CONFIG_IA32_EMULATION + syscall32_cpu_init(); +#endif + + /* Flags to clear on syscall */ + wrmsrl(MSR_SYSCALL_MASK, + X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL); +} + +void __cpuinit check_efer(void) +{ + unsigned long efer; + + rdmsrl(MSR_EFER, efer); + if (!(efer & EFER_NX) || do_not_nx) + __supported_pte_mask &= ~_PAGE_NX; +} + +unsigned long kernel_eflags; + +/* + * Copies of the original ist values from the tss are only accessed during + * debugging, no special alignment required. + */ +DEFINE_PER_CPU(struct orig_ist, orig_ist); + +/* + * cpu_init() initializes state that is per-CPU. Some data is already + * initialized (naturally) in the bootstrap process, such as the GDT + * and IDT. We reload them nevertheless, this function acts as a + * 'CPU state barrier', nothing should get across. + * A lot of state is already set up in PDA init. + */ +void __cpuinit cpu_init(void) +{ + int cpu = stack_smp_processor_id(); + struct tss_struct *t = &per_cpu(init_tss, cpu); + struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); + unsigned long v; + char *estacks = NULL; + struct task_struct *me; + int i; + + /* CPU 0 is initialised in head64.c */ + if (cpu != 0) + pda_init(cpu); + else + estacks = boot_exception_stacks; + + me = current; + + if (cpu_test_and_set(cpu, cpu_initialized)) + panic("CPU#%d already initialized!\n", cpu); + + printk(KERN_INFO "Initializing CPU#%d\n", cpu); + + clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE); + + /* + * Initialize the per-CPU GDT with the boot GDT, + * and set up the GDT descriptor: + */ + + switch_to_new_gdt(); + load_idt((const struct desc_ptr *)&idt_descr); + + memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8); + syscall_init(); + + wrmsrl(MSR_FS_BASE, 0); + wrmsrl(MSR_KERNEL_GS_BASE, 0); + barrier(); + + check_efer(); + if (cpu != 0 && x2apic) + enable_x2apic(); + + /* + * set up and load the per-CPU TSS + */ + for (v = 0; v < N_EXCEPTION_STACKS; v++) { + static const unsigned int order[N_EXCEPTION_STACKS] = { + [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER, + [DEBUG_STACK - 1] = DEBUG_STACK_ORDER + }; + if (cpu) { + estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]); + if (!estacks) + panic("Cannot allocate exception stack %ld %d\n", + v, cpu); + } + estacks += PAGE_SIZE << order[v]; + orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks; + } + + t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap); + /* + * <= is required because the CPU will access up to + * 8 bits beyond the end of the IO permission bitmap. + */ + for (i = 0; i <= IO_BITMAP_LONGS; i++) + t->io_bitmap[i] = ~0UL; + + atomic_inc(&init_mm.mm_count); + me->active_mm = &init_mm; + if (me->mm) + BUG(); + enter_lazy_tlb(&init_mm, me); + + load_sp0(t, ¤t->thread); + set_tss_desc(cpu, t); + load_TR_desc(); + load_LDT(&init_mm.context); + +#ifdef CONFIG_KGDB + /* + * If the kgdb is connected no debug regs should be altered. This + * is only applicable when KGDB and a KGDB I/O module are built + * into the kernel and you are using early debugging with + * kgdbwait. KGDB will control the kernel HW breakpoint registers. + */ + if (kgdb_connected && arch_kgdb_ops.correct_hw_break) + arch_kgdb_ops.correct_hw_break(); + else { +#endif + /* + * Clear all 6 debug registers: + */ + + set_debugreg(0UL, 0); + set_debugreg(0UL, 1); + set_debugreg(0UL, 2); + set_debugreg(0UL, 3); + set_debugreg(0UL, 6); + set_debugreg(0UL, 7); +#ifdef CONFIG_KGDB + /* If the kgdb is connected no debug regs should be altered. */ + } +#endif + + fpu_init(); + + raw_local_save_flags(kernel_eflags); + + if (is_uv_system()) + uv_cpu_init(); +} diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h index 783691b2a7381648bbc03ccf98842b0fcad6df22..4d894e8565feb6ad22b103f9c87ae51641ca0eda 100644 --- a/arch/x86/kernel/cpu/cpu.h +++ b/arch/x86/kernel/cpu/cpu.h @@ -1,3 +1,6 @@ +#ifndef ARCH_X86_CPU_H + +#define ARCH_X86_CPU_H struct cpu_model_info { int vendor; @@ -36,3 +39,5 @@ extern struct cpu_vendor_dev __x86cpuvendor_start[], __x86cpuvendor_end[]; extern int get_model_name(struct cpuinfo_x86 *c); extern void display_cacheinfo(struct cpuinfo_x86 *c); + +#endif diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c index b0c8208df9fa17363b5a3ed5ce35bdec8c52ad25..dd097b835839dd73d4139d807c23e8fca1648344 100644 --- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c @@ -202,7 +202,7 @@ static void drv_write(struct drv_cmd *cmd) cpumask_t saved_mask = current->cpus_allowed; unsigned int i; - for_each_cpu_mask(i, cmd->mask) { + for_each_cpu_mask_nr(i, cmd->mask) { set_cpus_allowed_ptr(current, &cpumask_of_cpu(i)); do_drv_write(cmd); } @@ -451,7 +451,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy, freqs.old = perf->states[perf->state].core_frequency * 1000; freqs.new = data->freq_table[next_state].frequency; - for_each_cpu_mask(i, cmd.mask) { + for_each_cpu_mask_nr(i, cmd.mask) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } @@ -466,7 +466,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy, } } - for_each_cpu_mask(i, cmd.mask) { + for_each_cpu_mask_nr(i, cmd.mask) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c index f03e9153618e52d68f2730f7e7a07e3d9fd71c2b..965ea52767ac65f5059673a3448764103a0e8543 100644 --- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c +++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c @@ -26,9 +26,10 @@ #define NFORCE2_SAFE_DISTANCE 50 /* Delay in ms between FSB changes */ -//#define NFORCE2_DELAY 10 +/* #define NFORCE2_DELAY 10 */ -/* nforce2_chipset: +/* + * nforce2_chipset: * FSB is changed using the chipset */ static struct pci_dev *nforce2_chipset_dev; @@ -36,13 +37,13 @@ static struct pci_dev *nforce2_chipset_dev; /* fid: * multiplier * 10 */ -static int fid = 0; +static int fid; /* min_fsb, max_fsb: * minimum and maximum FSB (= FSB at boot time) */ -static int min_fsb = 0; -static int max_fsb = 0; +static int min_fsb; +static int max_fsb; MODULE_AUTHOR("Sebastian Witt "); MODULE_DESCRIPTION("nForce2 FSB changing cpufreq driver"); @@ -53,7 +54,7 @@ module_param(min_fsb, int, 0444); MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)"); MODULE_PARM_DESC(min_fsb, - "Minimum FSB to use, if not defined: current FSB - 50"); + "Minimum FSB to use, if not defined: current FSB - 50"); #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg) @@ -139,7 +140,7 @@ static unsigned int nforce2_fsb_read(int bootfsb) /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */ nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, - 0x01EF,PCI_ANY_ID,PCI_ANY_ID,NULL); + 0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL); if (!nforce2_sub5) return 0; @@ -147,13 +148,13 @@ static unsigned int nforce2_fsb_read(int bootfsb) fsb /= 1000000; /* Check if PLL register is already set */ - pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp); + pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); - if(bootfsb || !temp) + if (bootfsb || !temp) return fsb; - + /* Use PLL register FSB value */ - pci_read_config_dword(nforce2_chipset_dev,NFORCE2_PLLREG, &temp); + pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp); fsb = nforce2_calc_fsb(temp); return fsb; @@ -184,7 +185,7 @@ static int nforce2_set_fsb(unsigned int fsb) } /* First write? Then set actual value */ - pci_read_config_byte(nforce2_chipset_dev,NFORCE2_PLLENABLE, (u8 *)&temp); + pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp); if (!temp) { pll = nforce2_calc_pll(tfsb); @@ -210,7 +211,8 @@ static int nforce2_set_fsb(unsigned int fsb) tfsb--; /* Calculate the PLL reg. value */ - if ((pll = nforce2_calc_pll(tfsb)) == -1) + pll = nforce2_calc_pll(tfsb); + if (pll == -1) return -EINVAL; nforce2_write_pll(pll); @@ -249,7 +251,7 @@ static unsigned int nforce2_get(unsigned int cpu) static int nforce2_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { -// unsigned long flags; +/* unsigned long flags; */ struct cpufreq_freqs freqs; unsigned int target_fsb; @@ -271,17 +273,17 @@ static int nforce2_target(struct cpufreq_policy *policy, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); /* Disable IRQs */ - //local_irq_save(flags); + /* local_irq_save(flags); */ if (nforce2_set_fsb(target_fsb) < 0) printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n", - target_fsb); + target_fsb); else dprintk("Changed FSB successfully to %d\n", - target_fsb); + target_fsb); /* Enable IRQs */ - //local_irq_restore(flags); + /* local_irq_restore(flags); */ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); @@ -302,8 +304,8 @@ static int nforce2_verify(struct cpufreq_policy *policy) policy->max = (fsb_pol_max + 1) * fid * 100; cpufreq_verify_within_limits(policy, - policy->cpuinfo.min_freq, - policy->cpuinfo.max_freq); + policy->cpuinfo.min_freq, + policy->cpuinfo.max_freq); return 0; } @@ -347,7 +349,7 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy) /* Set maximum FSB to FSB at boot time */ max_fsb = nforce2_fsb_read(1); - if(!max_fsb) + if (!max_fsb) return -EIO; if (!min_fsb) diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c index 199e4e05e5dc1c7cb82cbe417864377cb399d2d8..f1685fb91fbd313058b92af93ee055af160a2447 100644 --- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c +++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c @@ -122,7 +122,7 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy, return 0; /* notifiers */ - for_each_cpu_mask(i, policy->cpus) { + for_each_cpu_mask_nr(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } @@ -130,11 +130,11 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy, /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software * Developer's Manual, Volume 3 */ - for_each_cpu_mask(i, policy->cpus) + for_each_cpu_mask_nr(i, policy->cpus) cpufreq_p4_setdc(i, p4clockmod_table[newstate].index); /* notifiers */ - for_each_cpu_mask(i, policy->cpus) { + for_each_cpu_mask_nr(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.h b/arch/x86/kernel/cpu/cpufreq/powernow-k7.h index f8a63b3664e3ac649de72783db4ed7d388a70a94..35fb4eaf6e1cfe9b83f1ddc37b08416e7a097de5 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.h +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.h @@ -1,5 +1,4 @@ /* - * $Id: powernow-k7.h,v 1.2 2003/02/10 18:26:01 davej Exp $ * (C) 2003 Dave Jones. * * Licensed under the terms of the GNU GPL License version 2. diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index 206791eb46e3da04f61f70c2af2eb55d384bd606..c45ca6d4dce101fbe7e5044420410edab5ad8b42 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c @@ -966,7 +966,7 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i freqs.old = find_khz_freq_from_fid(data->currfid); freqs.new = find_khz_freq_from_fid(fid); - for_each_cpu_mask(i, *(data->available_cores)) { + for_each_cpu_mask_nr(i, *(data->available_cores)) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } @@ -974,7 +974,7 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i res = transition_fid_vid(data, fid, vid); freqs.new = find_khz_freq_from_fid(data->currfid); - for_each_cpu_mask(i, *(data->available_cores)) { + for_each_cpu_mask_nr(i, *(data->available_cores)) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } @@ -997,7 +997,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate); freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); - for_each_cpu_mask(i, *(data->available_cores)) { + for_each_cpu_mask_nr(i, *(data->available_cores)) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } @@ -1005,7 +1005,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i res = transition_pstate(data, pstate); freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); - for_each_cpu_mask(i, *(data->available_cores)) { + for_each_cpu_mask_nr(i, *(data->available_cores)) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c index 908dd347c67ec3dc29aa5ab8b3dcbae9a12e5e37..15e13c01cc3621ce3d4d610ab34225437eb8f413 100644 --- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c @@ -28,7 +28,8 @@ #define PFX "speedstep-centrino: " #define MAINTAINER "cpufreq@lists.linux.org.uk" -#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg) +#define dprintk(msg...) \ + cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg) #define INTEL_MSR_RANGE (0xffff) @@ -66,11 +67,12 @@ struct cpu_model struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */ }; -static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x); +static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, + const struct cpu_id *x); /* Operating points for current CPU */ -static struct cpu_model *centrino_model[NR_CPUS]; -static const struct cpu_id *centrino_cpu[NR_CPUS]; +static DEFINE_PER_CPU(struct cpu_model *, centrino_model); +static DEFINE_PER_CPU(const struct cpu_id *, centrino_cpu); static struct cpufreq_driver centrino_driver; @@ -255,7 +257,7 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy) return -ENOENT; } - centrino_model[policy->cpu] = model; + per_cpu(centrino_model, policy->cpu) = model; dprintk("found \"%s\": max frequency: %dkHz\n", model->model_name, model->max_freq); @@ -264,10 +266,14 @@ static int centrino_cpu_init_table(struct cpufreq_policy *policy) } #else -static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) { return -ENODEV; } +static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) +{ + return -ENODEV; +} #endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */ -static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x) +static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, + const struct cpu_id *x) { if ((c->x86 == x->x86) && (c->x86_model == x->x86_model) && @@ -286,23 +292,28 @@ static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe) * for centrino, as some DSDTs are buggy. * Ideally, this can be done using the acpi_data structure. */ - if ((centrino_cpu[cpu] == &cpu_ids[CPU_BANIAS]) || - (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_A1]) || - (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_B0])) { + if ((per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_BANIAS]) || + (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_A1]) || + (per_cpu(centrino_cpu, cpu) == &cpu_ids[CPU_DOTHAN_B0])) { msr = (msr >> 8) & 0xff; return msr * 100000; } - if ((!centrino_model[cpu]) || (!centrino_model[cpu]->op_points)) + if ((!per_cpu(centrino_model, cpu)) || + (!per_cpu(centrino_model, cpu)->op_points)) return 0; msr &= 0xffff; - for (i=0;centrino_model[cpu]->op_points[i].frequency != CPUFREQ_TABLE_END; i++) { - if (msr == centrino_model[cpu]->op_points[i].index) - return centrino_model[cpu]->op_points[i].frequency; + for (i = 0; + per_cpu(centrino_model, cpu)->op_points[i].frequency + != CPUFREQ_TABLE_END; + i++) { + if (msr == per_cpu(centrino_model, cpu)->op_points[i].index) + return per_cpu(centrino_model, cpu)-> + op_points[i].frequency; } if (failsafe) - return centrino_model[cpu]->op_points[i-1].frequency; + return per_cpu(centrino_model, cpu)->op_points[i-1].frequency; else return 0; } @@ -347,7 +358,8 @@ static int centrino_cpu_init(struct cpufreq_policy *policy) int i; /* Only Intel makes Enhanced Speedstep-capable CPUs */ - if (cpu->x86_vendor != X86_VENDOR_INTEL || !cpu_has(cpu, X86_FEATURE_EST)) + if (cpu->x86_vendor != X86_VENDOR_INTEL || + !cpu_has(cpu, X86_FEATURE_EST)) return -ENODEV; if (cpu_has(cpu, X86_FEATURE_CONSTANT_TSC)) @@ -361,9 +373,9 @@ static int centrino_cpu_init(struct cpufreq_policy *policy) break; if (i != N_IDS) - centrino_cpu[policy->cpu] = &cpu_ids[i]; + per_cpu(centrino_cpu, policy->cpu) = &cpu_ids[i]; - if (!centrino_cpu[policy->cpu]) { + if (!per_cpu(centrino_cpu, policy->cpu)) { dprintk("found unsupported CPU with " "Enhanced SpeedStep: send /proc/cpuinfo to " MAINTAINER "\n"); @@ -386,23 +398,26 @@ static int centrino_cpu_init(struct cpufreq_policy *policy) /* check to see if it stuck */ rdmsr(MSR_IA32_MISC_ENABLE, l, h); if (!(l & (1<<16))) { - printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n"); + printk(KERN_INFO PFX + "couldn't enable Enhanced SpeedStep\n"); return -ENODEV; } } freq = get_cur_freq(policy->cpu); - - policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */ + policy->cpuinfo.transition_latency = 10000; + /* 10uS transition latency */ policy->cur = freq; dprintk("centrino_cpu_init: cur=%dkHz\n", policy->cur); - ret = cpufreq_frequency_table_cpuinfo(policy, centrino_model[policy->cpu]->op_points); + ret = cpufreq_frequency_table_cpuinfo(policy, + per_cpu(centrino_model, policy->cpu)->op_points); if (ret) return (ret); - cpufreq_frequency_table_get_attr(centrino_model[policy->cpu]->op_points, policy->cpu); + cpufreq_frequency_table_get_attr( + per_cpu(centrino_model, policy->cpu)->op_points, policy->cpu); return 0; } @@ -411,12 +426,12 @@ static int centrino_cpu_exit(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; - if (!centrino_model[cpu]) + if (!per_cpu(centrino_model, cpu)) return -ENODEV; cpufreq_frequency_table_put_attr(cpu); - centrino_model[cpu] = NULL; + per_cpu(centrino_model, cpu) = NULL; return 0; } @@ -430,17 +445,26 @@ static int centrino_cpu_exit(struct cpufreq_policy *policy) */ static int centrino_verify (struct cpufreq_policy *policy) { - return cpufreq_frequency_table_verify(policy, centrino_model[policy->cpu]->op_points); + return cpufreq_frequency_table_verify(policy, + per_cpu(centrino_model, policy->cpu)->op_points); } /** * centrino_setpolicy - set a new CPUFreq policy * @policy: new policy * @target_freq: the target frequency - * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) + * @relation: how that frequency relates to achieved frequency + * (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H) * * Sets a new CPUFreq policy. */ +struct allmasks { + cpumask_t online_policy_cpus; + cpumask_t saved_mask; + cpumask_t set_mask; + cpumask_t covered_cpus; +}; + static int centrino_target (struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) @@ -448,48 +472,55 @@ static int centrino_target (struct cpufreq_policy *policy, unsigned int newstate = 0; unsigned int msr, oldmsr = 0, h = 0, cpu = policy->cpu; struct cpufreq_freqs freqs; - cpumask_t online_policy_cpus; - cpumask_t saved_mask; - cpumask_t set_mask; - cpumask_t covered_cpus; int retval = 0; unsigned int j, k, first_cpu, tmp; - - if (unlikely(centrino_model[cpu] == NULL)) - return -ENODEV; + CPUMASK_ALLOC(allmasks); + CPUMASK_PTR(online_policy_cpus, allmasks); + CPUMASK_PTR(saved_mask, allmasks); + CPUMASK_PTR(set_mask, allmasks); + CPUMASK_PTR(covered_cpus, allmasks); + + if (unlikely(allmasks == NULL)) + return -ENOMEM; + + if (unlikely(per_cpu(centrino_model, cpu) == NULL)) { + retval = -ENODEV; + goto out; + } if (unlikely(cpufreq_frequency_table_target(policy, - centrino_model[cpu]->op_points, + per_cpu(centrino_model, cpu)->op_points, target_freq, relation, &newstate))) { - return -EINVAL; + retval = -EINVAL; + goto out; } #ifdef CONFIG_HOTPLUG_CPU /* cpufreq holds the hotplug lock, so we are safe from here on */ - cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); + cpus_and(*online_policy_cpus, cpu_online_map, policy->cpus); #else - online_policy_cpus = policy->cpus; + *online_policy_cpus = policy->cpus; #endif - saved_mask = current->cpus_allowed; + *saved_mask = current->cpus_allowed; first_cpu = 1; - cpus_clear(covered_cpus); - for_each_cpu_mask(j, online_policy_cpus) { + cpus_clear(*covered_cpus); + for_each_cpu_mask_nr(j, *online_policy_cpus) { /* * Support for SMP systems. * Make sure we are running on CPU that wants to change freq */ - cpus_clear(set_mask); + cpus_clear(*set_mask); if (policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) - cpus_or(set_mask, set_mask, online_policy_cpus); + cpus_or(*set_mask, *set_mask, *online_policy_cpus); else - cpu_set(j, set_mask); + cpu_set(j, *set_mask); - set_cpus_allowed_ptr(current, &set_mask); + set_cpus_allowed_ptr(current, set_mask); preempt_disable(); - if (unlikely(!cpu_isset(smp_processor_id(), set_mask))) { + if (unlikely(!cpu_isset(smp_processor_id(), *set_mask))) { dprintk("couldn't limit to CPUs in this domain\n"); retval = -EAGAIN; if (first_cpu) { @@ -500,7 +531,7 @@ static int centrino_target (struct cpufreq_policy *policy, break; } - msr = centrino_model[cpu]->op_points[newstate].index; + msr = per_cpu(centrino_model, cpu)->op_points[newstate].index; if (first_cpu) { rdmsr(MSR_IA32_PERF_CTL, oldmsr, h); @@ -517,7 +548,7 @@ static int centrino_target (struct cpufreq_policy *policy, dprintk("target=%dkHz old=%d new=%d msr=%04x\n", target_freq, freqs.old, freqs.new, msr); - for_each_cpu_mask(k, online_policy_cpus) { + for_each_cpu_mask_nr(k, *online_policy_cpus) { freqs.cpu = k; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); @@ -536,11 +567,11 @@ static int centrino_target (struct cpufreq_policy *policy, break; } - cpu_set(j, covered_cpus); + cpu_set(j, *covered_cpus); preempt_enable(); } - for_each_cpu_mask(k, online_policy_cpus) { + for_each_cpu_mask_nr(k, *online_policy_cpus) { freqs.cpu = k; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } @@ -553,30 +584,32 @@ static int centrino_target (struct cpufreq_policy *policy, * Best effort undo.. */ - if (!cpus_empty(covered_cpus)) { - for_each_cpu_mask(j, covered_cpus) { + if (!cpus_empty(*covered_cpus)) + for_each_cpu_mask_nr(j, *covered_cpus) { set_cpus_allowed_ptr(current, &cpumask_of_cpu(j)); wrmsr(MSR_IA32_PERF_CTL, oldmsr, h); } - } tmp = freqs.new; freqs.new = freqs.old; freqs.old = tmp; - for_each_cpu_mask(j, online_policy_cpus) { + for_each_cpu_mask_nr(j, *online_policy_cpus) { freqs.cpu = j; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } } - set_cpus_allowed_ptr(current, &saved_mask); - return 0; + set_cpus_allowed_ptr(current, saved_mask); + retval = 0; + goto out; migrate_end: preempt_enable(); - set_cpus_allowed_ptr(current, &saved_mask); - return 0; + set_cpus_allowed_ptr(current, saved_mask); +out: + CPUMASK_FREE(allmasks); + return retval; } static struct freq_attr* centrino_attr[] = { diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c index 1b50244b1fdfd892e016d015e922fc12130992e2..191f7263c61dce1b42864cd4709e249773339243 100644 --- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c +++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c @@ -279,7 +279,7 @@ static int speedstep_target (struct cpufreq_policy *policy, cpus_allowed = current->cpus_allowed; - for_each_cpu_mask(i, policy->cpus) { + for_each_cpu_mask_nr(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } @@ -292,7 +292,7 @@ static int speedstep_target (struct cpufreq_policy *policy, /* allow to be run on all CPUs */ set_cpus_allowed_ptr(current, &cpus_allowed); - for_each_cpu_mask(i, policy->cpus) { + for_each_cpu_mask_nr(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } diff --git a/arch/x86/kernel/cpu/feature_names.c b/arch/x86/kernel/cpu/feature_names.c index e43ad4ad4cbae8b75561f67ec1da51628c568491..0bf4d37a04833e5b5532fa497453eb6410938130 100644 --- a/arch/x86/kernel/cpu/feature_names.c +++ b/arch/x86/kernel/cpu/feature_names.c @@ -45,7 +45,7 @@ const char * const x86_cap_flags[NCAPINTS*32] = { /* Intel-defined (#2) */ "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est", "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, - NULL, NULL, "dca", "sse4_1", "sse4_2", NULL, NULL, "popcnt", + NULL, NULL, "dca", "sse4_1", "sse4_2", "x2apic", NULL, "popcnt", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, /* VIA/Cyrix/Centaur-defined */ diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index fe9224c51d37ee1ca4cd36d6e7265e8124059012..b75f2569b8f8ba1940d55ce3616f25a91c7c6d75 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -226,6 +226,20 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c) if (cpu_has_bts) ds_init_intel(c); + + /* + * See if we have a good local APIC by checking for buggy Pentia, + * i.e. all B steppings and the C2 stepping of P54C when using their + * integrated APIC (see 11AP erratum in "Pentium Processor + * Specification Update"). + */ + if (cpu_has_apic && (c->x86<<8 | c->x86_model<<4) == 0x520 && + (c->x86_mask < 0x6 || c->x86_mask == 0xb)) + set_cpu_cap(c, X86_FEATURE_11AP); + +#ifdef CONFIG_X86_NUMAQ + numaq_tsc_disable(); +#endif } static unsigned int __cpuinit intel_size_cache(struct cpuinfo_x86 *c, unsigned int size) diff --git a/arch/x86/kernel/cpu/intel_64.c b/arch/x86/kernel/cpu/intel_64.c new file mode 100644 index 0000000000000000000000000000000000000000..1019c58d39f08b8ca440deb16e1eda1e780efb14 --- /dev/null +++ b/arch/x86/kernel/cpu/intel_64.c @@ -0,0 +1,95 @@ +#include +#include +#include +#include +#include +#include + +#include "cpu.h" + +static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) +{ + if ((c->x86 == 0xf && c->x86_model >= 0x03) || + (c->x86 == 0x6 && c->x86_model >= 0x0e)) + set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); + + set_cpu_cap(c, X86_FEATURE_SYSENTER32); +} + +/* + * find out the number of processor cores on the die + */ +static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c) +{ + unsigned int eax, t; + + if (c->cpuid_level < 4) + return 1; + + cpuid_count(4, 0, &eax, &t, &t, &t); + + if (eax & 0x1f) + return ((eax >> 26) + 1); + else + return 1; +} + +static void __cpuinit srat_detect_node(void) +{ +#ifdef CONFIG_NUMA + unsigned node; + int cpu = smp_processor_id(); + int apicid = hard_smp_processor_id(); + + /* Don't do the funky fallback heuristics the AMD version employs + for now. */ + node = apicid_to_node[apicid]; + if (node == NUMA_NO_NODE || !node_online(node)) + node = first_node(node_online_map); + numa_set_node(cpu, node); + + printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node); +#endif +} + +static void __cpuinit init_intel(struct cpuinfo_x86 *c) +{ + init_intel_cacheinfo(c); + if (c->cpuid_level > 9) { + unsigned eax = cpuid_eax(10); + /* Check for version and the number of counters */ + if ((eax & 0xff) && (((eax>>8) & 0xff) > 1)) + set_cpu_cap(c, X86_FEATURE_ARCH_PERFMON); + } + + if (cpu_has_ds) { + unsigned int l1, l2; + rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); + if (!(l1 & (1<<11))) + set_cpu_cap(c, X86_FEATURE_BTS); + if (!(l1 & (1<<12))) + set_cpu_cap(c, X86_FEATURE_PEBS); + } + + + if (cpu_has_bts) + ds_init_intel(c); + + if (c->x86 == 15) + c->x86_cache_alignment = c->x86_clflush_size * 2; + if (c->x86 == 6) + set_cpu_cap(c, X86_FEATURE_REP_GOOD); + set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC); + c->x86_max_cores = intel_num_cpu_cores(c); + + srat_detect_node(); +} + +static struct cpu_dev intel_cpu_dev __cpuinitdata = { + .c_vendor = "Intel", + .c_ident = { "GenuineIntel" }, + .c_early_init = early_init_intel, + .c_init = init_intel, +}; +cpu_vendor_dev_register(X86_VENDOR_INTEL, &intel_cpu_dev); + diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c index 26d615dcb1498ed7664b2483e3a68e74abc5ee71..6b0a10b002f184406dac952f1370ac5c4eeb34e7 100644 --- a/arch/x86/kernel/cpu/intel_cacheinfo.c +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c @@ -62,6 +62,7 @@ static struct _cache_table cache_table[] __cpuinitdata = { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */ { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */ { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */ + { 0x4e, LVL_2, 6144 }, /* 24-way set assoc, 64 byte line size */ { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */ { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */ { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */ @@ -488,7 +489,7 @@ static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index) int sibling; this_leaf = CPUID4_INFO_IDX(cpu, index); - for_each_cpu_mask(sibling, this_leaf->shared_cpu_map) { + for_each_cpu_mask_nr(sibling, this_leaf->shared_cpu_map) { sibling_leaf = CPUID4_INFO_IDX(sibling, index); cpu_clear(cpu, sibling_leaf->shared_cpu_map); } @@ -779,15 +780,14 @@ static int __cpuinit cache_add_dev(struct sys_device * sys_dev) } kobject_put(per_cpu(cache_kobject, cpu)); cpuid4_cache_sysfs_exit(cpu); - break; + return retval; } kobject_uevent(&(this_object->kobj), KOBJ_ADD); } - if (!retval) - cpu_set(cpu, cache_dev_map); + cpu_set(cpu, cache_dev_map); kobject_uevent(per_cpu(cache_kobject, cpu), KOBJ_ADD); - return retval; + return 0; } static void __cpuinit cache_remove_dev(struct sys_device * sys_dev) diff --git a/arch/x86/kernel/cpu/mcheck/k7.c b/arch/x86/kernel/cpu/mcheck/k7.c index e633c9c2b764c3ec7829420b06b6ece9c459d455..f390c9f66351ae850ca169b5e399b32d555bd266 100644 --- a/arch/x86/kernel/cpu/mcheck/k7.c +++ b/arch/x86/kernel/cpu/mcheck/k7.c @@ -9,23 +9,23 @@ #include #include -#include +#include #include #include #include "mce.h" /* Machine Check Handler For AMD Athlon/Duron */ -static void k7_machine_check(struct pt_regs * regs, long error_code) +static void k7_machine_check(struct pt_regs *regs, long error_code) { - int recover=1; + int recover = 1; u32 alow, ahigh, high, low; u32 mcgstl, mcgsth; int i; - rdmsr (MSR_IA32_MCG_STATUS, mcgstl, mcgsth); + rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth); if (mcgstl & (1<<0)) /* Recoverable ? */ - recover=0; + recover = 0; printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", smp_processor_id(), mcgsth, mcgstl); @@ -60,12 +60,12 @@ static void k7_machine_check(struct pt_regs * regs, long error_code) } if (recover&2) - panic ("CPU context corrupt"); + panic("CPU context corrupt"); if (recover&1) - panic ("Unable to continue"); - printk (KERN_EMERG "Attempting to continue.\n"); + panic("Unable to continue"); + printk(KERN_EMERG "Attempting to continue.\n"); mcgstl &= ~(1<<2); - wrmsr (MSR_IA32_MCG_STATUS,mcgstl, mcgsth); + wrmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth); } @@ -81,25 +81,25 @@ void amd_mcheck_init(struct cpuinfo_x86 *c) machine_check_vector = k7_machine_check; wmb(); - printk (KERN_INFO "Intel machine check architecture supported.\n"); - rdmsr (MSR_IA32_MCG_CAP, l, h); + printk(KERN_INFO "Intel machine check architecture supported.\n"); + rdmsr(MSR_IA32_MCG_CAP, l, h); if (l & (1<<8)) /* Control register present ? */ - wrmsr (MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); + wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); nr_mce_banks = l & 0xff; /* Clear status for MC index 0 separately, we don't touch CTL, * as some K7 Athlons cause spurious MCEs when its enabled. */ if (boot_cpu_data.x86 == 6) { - wrmsr (MSR_IA32_MC0_STATUS, 0x0, 0x0); + wrmsr(MSR_IA32_MC0_STATUS, 0x0, 0x0); i = 1; } else i = 0; - for (; i #include #include +#include #include #include #include @@ -31,7 +32,7 @@ #include #define MISC_MCELOG_MINOR 227 -#define NR_BANKS 6 +#define NR_SYSFS_BANKS 6 atomic_t mce_entry; @@ -46,7 +47,7 @@ static int mce_dont_init; */ static int tolerant = 1; static int banks; -static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL }; +static unsigned long bank[NR_SYSFS_BANKS] = { [0 ... NR_SYSFS_BANKS-1] = ~0UL }; static unsigned long notify_user; static int rip_msr; static int mce_bootlog = -1; @@ -209,7 +210,7 @@ void do_machine_check(struct pt_regs * regs, long error_code) barrier(); for (i = 0; i < banks; i++) { - if (!bank[i]) + if (i < NR_SYSFS_BANKS && !bank[i]) continue; m.misc = 0; @@ -363,7 +364,7 @@ static void mcheck_check_cpu(void *info) static void mcheck_timer(struct work_struct *work) { - on_each_cpu(mcheck_check_cpu, NULL, 1, 1); + on_each_cpu(mcheck_check_cpu, NULL, 1); /* * Alert userspace if needed. If we logged an MCE, reduce the @@ -444,9 +445,10 @@ static void mce_init(void *dummy) rdmsrl(MSR_IA32_MCG_CAP, cap); banks = cap & 0xff; - if (banks > NR_BANKS) { - printk(KERN_INFO "MCE: warning: using only %d banks\n", banks); - banks = NR_BANKS; + if (banks > MCE_EXTENDED_BANK) { + banks = MCE_EXTENDED_BANK; + printk(KERN_INFO "MCE: warning: using only %d banks\n", + MCE_EXTENDED_BANK); } /* Use accurate RIP reporting if available. */ if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9) @@ -462,7 +464,11 @@ static void mce_init(void *dummy) wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff); for (i = 0; i < banks; i++) { - wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); + if (i < NR_SYSFS_BANKS) + wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]); + else + wrmsrl(MSR_IA32_MC0_CTL+4*i, ~0UL); + wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0); } } @@ -527,10 +533,12 @@ static int open_exclu; /* already open exclusive? */ static int mce_open(struct inode *inode, struct file *file) { + lock_kernel(); spin_lock(&mce_state_lock); if (open_exclu || (open_count && (file->f_flags & O_EXCL))) { spin_unlock(&mce_state_lock); + unlock_kernel(); return -EBUSY; } @@ -539,6 +547,7 @@ static int mce_open(struct inode *inode, struct file *file) open_count++; spin_unlock(&mce_state_lock); + unlock_kernel(); return nonseekable_open(inode, file); } @@ -571,7 +580,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, char __user *buf = ubuf; int i, err; - cpu_tsc = kmalloc(NR_CPUS * sizeof(long), GFP_KERNEL); + cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL); if (!cpu_tsc) return -ENOMEM; @@ -612,7 +621,7 @@ static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, * Collect entries that were still getting written before the * synchronize. */ - on_each_cpu(collect_tscs, cpu_tsc, 1, 1); + on_each_cpu(collect_tscs, cpu_tsc, 1); for (i = next; i < MCE_LOG_LEN; i++) { if (mcelog.entry[i].finished && mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) { @@ -737,7 +746,7 @@ static void mce_restart(void) if (next_interval) cancel_delayed_work(&mcheck_work); /* Timer race is harmless here */ - on_each_cpu(mce_init, NULL, 1, 1); + on_each_cpu(mce_init, NULL, 1); next_interval = check_interval * HZ; if (next_interval) schedule_delayed_work(&mcheck_work, @@ -753,10 +762,14 @@ DEFINE_PER_CPU(struct sys_device, device_mce); /* Why are there no generic functions for this? */ #define ACCESSOR(name, var, start) \ - static ssize_t show_ ## name(struct sys_device *s, char *buf) { \ + static ssize_t show_ ## name(struct sys_device *s, \ + struct sysdev_attribute *attr, \ + char *buf) { \ return sprintf(buf, "%lx\n", (unsigned long)var); \ } \ - static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \ + static ssize_t set_ ## name(struct sys_device *s, \ + struct sysdev_attribute *attr, \ + const char *buf, size_t siz) { \ char *end; \ unsigned long new = simple_strtoul(buf, &end, 0); \ if (end == buf) return -EINVAL; \ @@ -766,7 +779,10 @@ DEFINE_PER_CPU(struct sys_device, device_mce); } \ static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name); -/* TBD should generate these dynamically based on number of available banks */ +/* + * TBD should generate these dynamically based on number of available banks. + * Have only 6 contol banks in /sysfs until then. + */ ACCESSOR(bank0ctl,bank[0],mce_restart()) ACCESSOR(bank1ctl,bank[1],mce_restart()) ACCESSOR(bank2ctl,bank[2],mce_restart()) @@ -774,14 +790,16 @@ ACCESSOR(bank3ctl,bank[3],mce_restart()) ACCESSOR(bank4ctl,bank[4],mce_restart()) ACCESSOR(bank5ctl,bank[5],mce_restart()) -static ssize_t show_trigger(struct sys_device *s, char *buf) +static ssize_t show_trigger(struct sys_device *s, struct sysdev_attribute *attr, + char *buf) { strcpy(buf, trigger); strcat(buf, "\n"); return strlen(trigger) + 1; } -static ssize_t set_trigger(struct sys_device *s,const char *buf,size_t siz) +static ssize_t set_trigger(struct sys_device *s, struct sysdev_attribute *attr, + const char *buf,size_t siz) { char *p; int len; @@ -794,12 +812,12 @@ static ssize_t set_trigger(struct sys_device *s,const char *buf,size_t siz) } static SYSDEV_ATTR(trigger, 0644, show_trigger, set_trigger); -ACCESSOR(tolerant,tolerant,) +static SYSDEV_INT_ATTR(tolerant, 0644, tolerant); ACCESSOR(check_interval,check_interval,mce_restart()) static struct sysdev_attribute *mce_attributes[] = { &attr_bank0ctl, &attr_bank1ctl, &attr_bank2ctl, &attr_bank3ctl, &attr_bank4ctl, &attr_bank5ctl, - &attr_tolerant, &attr_check_interval, &attr_trigger, + &attr_tolerant.attr, &attr_check_interval, &attr_trigger, NULL }; diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c index 7c9a813e11939b7e7fa583549d4c9affdde26476..88736cadbaa62d02e5e36671b06cfa512df7e683 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd_64.c @@ -527,7 +527,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank) if (err) goto out_free; - for_each_cpu_mask(i, b->cpus) { + for_each_cpu_mask_nr(i, b->cpus) { if (i == cpu) continue; @@ -617,7 +617,7 @@ static void threshold_remove_bank(unsigned int cpu, int bank) #endif /* remove all sibling symlinks before unregistering */ - for_each_cpu_mask(i, b->cpus) { + for_each_cpu_mask_nr(i, b->cpus) { if (i == cpu) continue; diff --git a/arch/x86/kernel/cpu/mcheck/non-fatal.c b/arch/x86/kernel/cpu/mcheck/non-fatal.c index 00ccb6c14ec21b8ca167a7989c8617014fe8c4db..cc1fccdd31e08ce56b6538692004475a7f44bf66 100644 --- a/arch/x86/kernel/cpu/mcheck/non-fatal.c +++ b/arch/x86/kernel/cpu/mcheck/non-fatal.c @@ -59,7 +59,7 @@ static DECLARE_DELAYED_WORK(mce_work, mce_work_fn); static void mce_work_fn(struct work_struct *work) { - on_each_cpu(mce_checkregs, NULL, 1, 1); + on_each_cpu(mce_checkregs, NULL, 1); schedule_delayed_work(&mce_work, round_jiffies_relative(MCE_RATE)); } diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c index cb03345554a5cfe0153ea8ad6ef0d739fc8b1583..9b60fce09f758d5af0520bccb61445a99aaad693 100644 --- a/arch/x86/kernel/cpu/mcheck/p4.c +++ b/arch/x86/kernel/cpu/mcheck/p4.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include #include @@ -32,12 +32,12 @@ struct intel_mce_extended_msrs { /* u32 *reserved[]; */ }; -static int mce_num_extended_msrs = 0; +static int mce_num_extended_msrs; #ifdef CONFIG_X86_MCE_P4THERMAL static void unexpected_thermal_interrupt(struct pt_regs *regs) -{ +{ printk(KERN_ERR "CPU%d: Unexpected LVT TMR interrupt!\n", smp_processor_id()); add_taint(TAINT_MACHINE_CHECK); @@ -83,7 +83,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) * be some SMM goo which handles it, so we can't even put a handler * since it might be delivered via SMI already -zwanem. */ - rdmsr (MSR_IA32_MISC_ENABLE, l, h); + rdmsr(MSR_IA32_MISC_ENABLE, l, h); h = apic_read(APIC_LVTTHMR); if ((l & (1<<3)) && (h & APIC_DM_SMI)) { printk(KERN_DEBUG "CPU%d: Thermal monitoring handled by SMI\n", @@ -91,7 +91,7 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) return; /* -EBUSY */ } - /* check whether a vector already exists, temporarily masked? */ + /* check whether a vector already exists, temporarily masked? */ if (h & APIC_VECTOR_MASK) { printk(KERN_DEBUG "CPU%d: Thermal LVT vector (%#x) already " "installed\n", @@ -102,20 +102,20 @@ static void intel_init_thermal(struct cpuinfo_x86 *c) /* The temperature transition interrupt handler setup */ h = THERMAL_APIC_VECTOR; /* our delivery vector */ h |= (APIC_DM_FIXED | APIC_LVT_MASKED); /* we'll mask till we're ready */ - apic_write_around(APIC_LVTTHMR, h); + apic_write(APIC_LVTTHMR, h); - rdmsr (MSR_IA32_THERM_INTERRUPT, l, h); - wrmsr (MSR_IA32_THERM_INTERRUPT, l | 0x03 , h); + rdmsr(MSR_IA32_THERM_INTERRUPT, l, h); + wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03 , h); /* ok we're good to go... */ vendor_thermal_interrupt = intel_thermal_interrupt; - - rdmsr (MSR_IA32_MISC_ENABLE, l, h); - wrmsr (MSR_IA32_MISC_ENABLE, l | (1<<3), h); - l = apic_read (APIC_LVTTHMR); - apic_write_around (APIC_LVTTHMR, l & ~APIC_LVT_MASKED); - printk (KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu); + rdmsr(MSR_IA32_MISC_ENABLE, l, h); + wrmsr(MSR_IA32_MISC_ENABLE, l | (1<<3), h); + + l = apic_read(APIC_LVTTHMR); + apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); + printk(KERN_INFO "CPU%d: Thermal monitoring enabled\n", cpu); /* enable thermal throttle processing */ atomic_set(&therm_throt_en, 1); @@ -129,28 +129,28 @@ static inline void intel_get_extended_msrs(struct intel_mce_extended_msrs *r) { u32 h; - rdmsr (MSR_IA32_MCG_EAX, r->eax, h); - rdmsr (MSR_IA32_MCG_EBX, r->ebx, h); - rdmsr (MSR_IA32_MCG_ECX, r->ecx, h); - rdmsr (MSR_IA32_MCG_EDX, r->edx, h); - rdmsr (MSR_IA32_MCG_ESI, r->esi, h); - rdmsr (MSR_IA32_MCG_EDI, r->edi, h); - rdmsr (MSR_IA32_MCG_EBP, r->ebp, h); - rdmsr (MSR_IA32_MCG_ESP, r->esp, h); - rdmsr (MSR_IA32_MCG_EFLAGS, r->eflags, h); - rdmsr (MSR_IA32_MCG_EIP, r->eip, h); + rdmsr(MSR_IA32_MCG_EAX, r->eax, h); + rdmsr(MSR_IA32_MCG_EBX, r->ebx, h); + rdmsr(MSR_IA32_MCG_ECX, r->ecx, h); + rdmsr(MSR_IA32_MCG_EDX, r->edx, h); + rdmsr(MSR_IA32_MCG_ESI, r->esi, h); + rdmsr(MSR_IA32_MCG_EDI, r->edi, h); + rdmsr(MSR_IA32_MCG_EBP, r->ebp, h); + rdmsr(MSR_IA32_MCG_ESP, r->esp, h); + rdmsr(MSR_IA32_MCG_EFLAGS, r->eflags, h); + rdmsr(MSR_IA32_MCG_EIP, r->eip, h); } -static void intel_machine_check(struct pt_regs * regs, long error_code) +static void intel_machine_check(struct pt_regs *regs, long error_code) { - int recover=1; + int recover = 1; u32 alow, ahigh, high, low; u32 mcgstl, mcgsth; int i; - rdmsr (MSR_IA32_MCG_STATUS, mcgstl, mcgsth); + rdmsr(MSR_IA32_MCG_STATUS, mcgstl, mcgsth); if (mcgstl & (1<<0)) /* Recoverable ? */ - recover=0; + recover = 0; printk(KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n", smp_processor_id(), mcgsth, mcgstl); @@ -191,20 +191,20 @@ static void intel_machine_check(struct pt_regs * regs, long error_code) } if (recover & 2) - panic ("CPU context corrupt"); + panic("CPU context corrupt"); if (recover & 1) - panic ("Unable to continue"); + panic("Unable to continue"); printk(KERN_EMERG "Attempting to continue.\n"); - /* - * Do not clear the MSR_IA32_MCi_STATUS if the error is not + /* + * Do not clear the MSR_IA32_MCi_STATUS if the error is not * recoverable/continuable.This will allow BIOS to look at the MSRs * for errors if the OS could not log the error. */ - for (i=0; i> 16) & 0xff; - printk (KERN_INFO "CPU%d: Intel P4/Xeon Extended MCE MSRs (%d)" + printk(KERN_INFO "CPU%d: Intel P4/Xeon Extended MCE MSRs (%d)" " available\n", smp_processor_id(), mce_num_extended_msrs); diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c index 1f4cc48c14c633be4e0a1ca62b1502616337b048..d5ae2243f0b959bf26839c476850faec8a6a4476 100644 --- a/arch/x86/kernel/cpu/mcheck/therm_throt.c +++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c @@ -35,6 +35,7 @@ atomic_t therm_throt_en = ATOMIC_INIT(0); #define define_therm_throt_sysdev_show_func(name) \ static ssize_t therm_throt_sysdev_show_##name(struct sys_device *dev, \ + struct sysdev_attribute *attr, \ char *buf) \ { \ unsigned int cpu = dev->id; \ diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c index 5d241ce94a44f4f5b0fceb7a7a8292e08b6d9b08..509bd3d9eacd28da737ade7a365f1a17acf71a11 100644 --- a/arch/x86/kernel/cpu/mtrr/generic.c +++ b/arch/x86/kernel/cpu/mtrr/generic.c @@ -37,7 +37,7 @@ static struct fixed_range_block fixed_range_blocks[] = { static unsigned long smp_changes_mask; static struct mtrr_state mtrr_state = {}; static int mtrr_state_set; -static u64 tom2; +u64 mtrr_tom2; #undef MODULE_PARAM_PREFIX #define MODULE_PARAM_PREFIX "mtrr." @@ -139,8 +139,8 @@ u8 mtrr_type_lookup(u64 start, u64 end) } } - if (tom2) { - if (start >= (1ULL<<32) && (end < tom2)) + if (mtrr_tom2) { + if (start >= (1ULL<<32) && (end < mtrr_tom2)) return MTRR_TYPE_WRBACK; } @@ -158,6 +158,20 @@ get_mtrr_var_range(unsigned int index, struct mtrr_var_range *vr) rdmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); } +/* fill the MSR pair relating to a var range */ +void fill_mtrr_var_range(unsigned int index, + u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi) +{ + struct mtrr_var_range *vr; + + vr = mtrr_state.var_ranges; + + vr[index].base_lo = base_lo; + vr[index].base_hi = base_hi; + vr[index].mask_lo = mask_lo; + vr[index].mask_hi = mask_hi; +} + static void get_fixed_ranges(mtrr_type * frs) { @@ -213,13 +227,13 @@ void __init get_mtrr_state(void) mtrr_state.enabled = (lo & 0xc00) >> 10; if (amd_special_default_mtrr()) { - unsigned lo, hi; + unsigned low, high; /* TOP_MEM2 */ - rdmsr(MSR_K8_TOP_MEM2, lo, hi); - tom2 = hi; - tom2 <<= 32; - tom2 |= lo; - tom2 &= 0xffffff8000000ULL; + rdmsr(MSR_K8_TOP_MEM2, low, high); + mtrr_tom2 = high; + mtrr_tom2 <<= 32; + mtrr_tom2 |= low; + mtrr_tom2 &= 0xffffff800000ULL; } if (mtrr_show) { int high_width; @@ -251,9 +265,9 @@ void __init get_mtrr_state(void) else printk(KERN_INFO "MTRR %u disabled\n", i); } - if (tom2) { + if (mtrr_tom2) { printk(KERN_INFO "TOM2: %016llx aka %lldM\n", - tom2, tom2>>20); + mtrr_tom2, mtrr_tom2>>20); } } mtrr_state_set = 1; @@ -328,7 +342,7 @@ static void set_fixed_range(int msr, bool *changed, unsigned int *msrwords) if (lo != msrwords[0] || hi != msrwords[1]) { if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD && - boot_cpu_data.x86 == 15 && + (boot_cpu_data.x86 >= 0x0f && boot_cpu_data.x86 <= 0x11) && ((msrwords[0] | msrwords[1]) & K8_MTRR_RDMEM_WRMEM_MASK)) k8_enable_fixed_iorrs(); mtrr_wrmsr(msr, msrwords[0], msrwords[1]); diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c index 6a1e278d93230de4da44549cf537a33b5b3ff441..6f23969c8fafe4f1dd2b4304a910c11483833f2d 100644 --- a/arch/x86/kernel/cpu/mtrr/main.c +++ b/arch/x86/kernel/cpu/mtrr/main.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -222,7 +223,7 @@ static void set_mtrr(unsigned int reg, unsigned long base, atomic_set(&data.gate,0); /* Start the ball rolling on other CPUs */ - if (smp_call_function(ipi_handler, &data, 1, 0) != 0) + if (smp_call_function(ipi_handler, &data, 0) != 0) panic("mtrr: timed out waiting for other CPUs\n"); local_irq_save(flags); @@ -609,6 +610,787 @@ static struct sysdev_driver mtrr_sysdev_driver = { .resume = mtrr_restore, }; +/* should be related to MTRR_VAR_RANGES nums */ +#define RANGE_NUM 256 + +struct res_range { + unsigned long start; + unsigned long end; +}; + +static int __init +add_range(struct res_range *range, int nr_range, unsigned long start, + unsigned long end) +{ + /* out of slots */ + if (nr_range >= RANGE_NUM) + return nr_range; + + range[nr_range].start = start; + range[nr_range].end = end; + + nr_range++; + + return nr_range; +} + +static int __init +add_range_with_merge(struct res_range *range, int nr_range, unsigned long start, + unsigned long end) +{ + int i; + + /* try to merge it with old one */ + for (i = 0; i < nr_range; i++) { + unsigned long final_start, final_end; + unsigned long common_start, common_end; + + if (!range[i].end) + continue; + + common_start = max(range[i].start, start); + common_end = min(range[i].end, end); + if (common_start > common_end + 1) + continue; + + final_start = min(range[i].start, start); + final_end = max(range[i].end, end); + + range[i].start = final_start; + range[i].end = final_end; + return nr_range; + } + + /* need to add that */ + return add_range(range, nr_range, start, end); +} + +static void __init +subtract_range(struct res_range *range, unsigned long start, unsigned long end) +{ + int i, j; + + for (j = 0; j < RANGE_NUM; j++) { + if (!range[j].end) + continue; + + if (start <= range[j].start && end >= range[j].end) { + range[j].start = 0; + range[j].end = 0; + continue; + } + + if (start <= range[j].start && end < range[j].end && + range[j].start < end + 1) { + range[j].start = end + 1; + continue; + } + + + if (start > range[j].start && end >= range[j].end && + range[j].end > start - 1) { + range[j].end = start - 1; + continue; + } + + if (start > range[j].start && end < range[j].end) { + /* find the new spare */ + for (i = 0; i < RANGE_NUM; i++) { + if (range[i].end == 0) + break; + } + if (i < RANGE_NUM) { + range[i].end = range[j].end; + range[i].start = end + 1; + } else { + printk(KERN_ERR "run of slot in ranges\n"); + } + range[j].end = start - 1; + continue; + } + } +} + +static int __init cmp_range(const void *x1, const void *x2) +{ + const struct res_range *r1 = x1; + const struct res_range *r2 = x2; + long start1, start2; + + start1 = r1->start; + start2 = r2->start; + + return start1 - start2; +} + +struct var_mtrr_range_state { + unsigned long base_pfn; + unsigned long size_pfn; + mtrr_type type; +}; + +struct var_mtrr_range_state __initdata range_state[RANGE_NUM]; +static int __initdata debug_print; + +static int __init +x86_get_mtrr_mem_range(struct res_range *range, int nr_range, + unsigned long extra_remove_base, + unsigned long extra_remove_size) +{ + unsigned long i, base, size; + mtrr_type type; + + for (i = 0; i < num_var_ranges; i++) { + type = range_state[i].type; + if (type != MTRR_TYPE_WRBACK) + continue; + base = range_state[i].base_pfn; + size = range_state[i].size_pfn; + nr_range = add_range_with_merge(range, nr_range, base, + base + size - 1); + } + if (debug_print) { + printk(KERN_DEBUG "After WB checking\n"); + for (i = 0; i < nr_range; i++) + printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n", + range[i].start, range[i].end + 1); + } + + /* take out UC ranges */ + for (i = 0; i < num_var_ranges; i++) { + type = range_state[i].type; + if (type != MTRR_TYPE_UNCACHABLE) + continue; + size = range_state[i].size_pfn; + if (!size) + continue; + base = range_state[i].base_pfn; + subtract_range(range, base, base + size - 1); + } + if (extra_remove_size) + subtract_range(range, extra_remove_base, + extra_remove_base + extra_remove_size - 1); + + /* get new range num */ + nr_range = 0; + for (i = 0; i < RANGE_NUM; i++) { + if (!range[i].end) + continue; + nr_range++; + } + if (debug_print) { + printk(KERN_DEBUG "After UC checking\n"); + for (i = 0; i < nr_range; i++) + printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n", + range[i].start, range[i].end + 1); + } + + /* sort the ranges */ + sort(range, nr_range, sizeof(struct res_range), cmp_range, NULL); + if (debug_print) { + printk(KERN_DEBUG "After sorting\n"); + for (i = 0; i < nr_range; i++) + printk(KERN_DEBUG "MTRR MAP PFN: %016lx - %016lx\n", + range[i].start, range[i].end + 1); + } + + /* clear those is not used */ + for (i = nr_range; i < RANGE_NUM; i++) + memset(&range[i], 0, sizeof(range[i])); + + return nr_range; +} + +static struct res_range __initdata range[RANGE_NUM]; + +#ifdef CONFIG_MTRR_SANITIZER + +static unsigned long __init sum_ranges(struct res_range *range, int nr_range) +{ + unsigned long sum; + int i; + + sum = 0; + for (i = 0; i < nr_range; i++) + sum += range[i].end + 1 - range[i].start; + + return sum; +} + +static int enable_mtrr_cleanup __initdata = + CONFIG_MTRR_SANITIZER_ENABLE_DEFAULT; + +static int __init disable_mtrr_cleanup_setup(char *str) +{ + if (enable_mtrr_cleanup != -1) + enable_mtrr_cleanup = 0; + return 0; +} +early_param("disable_mtrr_cleanup", disable_mtrr_cleanup_setup); + +static int __init enable_mtrr_cleanup_setup(char *str) +{ + if (enable_mtrr_cleanup != -1) + enable_mtrr_cleanup = 1; + return 0; +} +early_param("enble_mtrr_cleanup", enable_mtrr_cleanup_setup); + +struct var_mtrr_state { + unsigned long range_startk; + unsigned long range_sizek; + unsigned long chunk_sizek; + unsigned long gran_sizek; + unsigned int reg; +}; + +static void __init +set_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek, + unsigned char type, unsigned int address_bits) +{ + u32 base_lo, base_hi, mask_lo, mask_hi; + u64 base, mask; + + if (!sizek) { + fill_mtrr_var_range(reg, 0, 0, 0, 0); + return; + } + + mask = (1ULL << address_bits) - 1; + mask &= ~((((u64)sizek) << 10) - 1); + + base = ((u64)basek) << 10; + + base |= type; + mask |= 0x800; + + base_lo = base & ((1ULL<<32) - 1); + base_hi = base >> 32; + + mask_lo = mask & ((1ULL<<32) - 1); + mask_hi = mask >> 32; + + fill_mtrr_var_range(reg, base_lo, base_hi, mask_lo, mask_hi); +} + +static void __init +save_var_mtrr(unsigned int reg, unsigned long basek, unsigned long sizek, + unsigned char type) +{ + range_state[reg].base_pfn = basek >> (PAGE_SHIFT - 10); + range_state[reg].size_pfn = sizek >> (PAGE_SHIFT - 10); + range_state[reg].type = type; +} + +static void __init +set_var_mtrr_all(unsigned int address_bits) +{ + unsigned long basek, sizek; + unsigned char type; + unsigned int reg; + + for (reg = 0; reg < num_var_ranges; reg++) { + basek = range_state[reg].base_pfn << (PAGE_SHIFT - 10); + sizek = range_state[reg].size_pfn << (PAGE_SHIFT - 10); + type = range_state[reg].type; + + set_var_mtrr(reg, basek, sizek, type, address_bits); + } +} + +static unsigned int __init +range_to_mtrr(unsigned int reg, unsigned long range_startk, + unsigned long range_sizek, unsigned char type) +{ + if (!range_sizek || (reg >= num_var_ranges)) + return reg; + + while (range_sizek) { + unsigned long max_align, align; + unsigned long sizek; + + /* Compute the maximum size I can make a range */ + if (range_startk) + max_align = ffs(range_startk) - 1; + else + max_align = 32; + align = fls(range_sizek) - 1; + if (align > max_align) + align = max_align; + + sizek = 1 << align; + if (debug_print) + printk(KERN_DEBUG "Setting variable MTRR %d, " + "base: %ldMB, range: %ldMB, type %s\n", + reg, range_startk >> 10, sizek >> 10, + (type == MTRR_TYPE_UNCACHABLE)?"UC": + ((type == MTRR_TYPE_WRBACK)?"WB":"Other") + ); + save_var_mtrr(reg++, range_startk, sizek, type); + range_startk += sizek; + range_sizek -= sizek; + if (reg >= num_var_ranges) + break; + } + return reg; +} + +static unsigned __init +range_to_mtrr_with_hole(struct var_mtrr_state *state, unsigned long basek, + unsigned long sizek) +{ + unsigned long hole_basek, hole_sizek; + unsigned long second_basek, second_sizek; + unsigned long range0_basek, range0_sizek; + unsigned long range_basek, range_sizek; + unsigned long chunk_sizek; + unsigned long gran_sizek; + + hole_basek = 0; + hole_sizek = 0; + second_basek = 0; + second_sizek = 0; + chunk_sizek = state->chunk_sizek; + gran_sizek = state->gran_sizek; + + /* align with gran size, prevent small block used up MTRRs */ + range_basek = ALIGN(state->range_startk, gran_sizek); + if ((range_basek > basek) && basek) + return second_sizek; + state->range_sizek -= (range_basek - state->range_startk); + range_sizek = ALIGN(state->range_sizek, gran_sizek); + + while (range_sizek > state->range_sizek) { + range_sizek -= gran_sizek; + if (!range_sizek) + return 0; + } + state->range_sizek = range_sizek; + + /* try to append some small hole */ + range0_basek = state->range_startk; + range0_sizek = ALIGN(state->range_sizek, chunk_sizek); + if (range0_sizek == state->range_sizek) { + if (debug_print) + printk(KERN_DEBUG "rangeX: %016lx - %016lx\n", + range0_basek<<10, + (range0_basek + state->range_sizek)<<10); + state->reg = range_to_mtrr(state->reg, range0_basek, + state->range_sizek, MTRR_TYPE_WRBACK); + return 0; + } + + range0_sizek -= chunk_sizek; + if (range0_sizek && sizek) { + while (range0_basek + range0_sizek > (basek + sizek)) { + range0_sizek -= chunk_sizek; + if (!range0_sizek) + break; + } + } + + if (range0_sizek) { + if (debug_print) + printk(KERN_DEBUG "range0: %016lx - %016lx\n", + range0_basek<<10, + (range0_basek + range0_sizek)<<10); + state->reg = range_to_mtrr(state->reg, range0_basek, + range0_sizek, MTRR_TYPE_WRBACK); + + } + + range_basek = range0_basek + range0_sizek; + range_sizek = chunk_sizek; + + if (range_basek + range_sizek > basek && + range_basek + range_sizek <= (basek + sizek)) { + /* one hole */ + second_basek = basek; + second_sizek = range_basek + range_sizek - basek; + } + + /* if last piece, only could one hole near end */ + if ((second_basek || !basek) && + range_sizek - (state->range_sizek - range0_sizek) - second_sizek < + (chunk_sizek >> 1)) { + /* + * one hole in middle (second_sizek is 0) or at end + * (second_sizek is 0 ) + */ + hole_sizek = range_sizek - (state->range_sizek - range0_sizek) + - second_sizek; + hole_basek = range_basek + range_sizek - hole_sizek + - second_sizek; + } else { + /* fallback for big hole, or several holes */ + range_sizek = state->range_sizek - range0_sizek; + second_basek = 0; + second_sizek = 0; + } + + if (debug_print) + printk(KERN_DEBUG "range: %016lx - %016lx\n", range_basek<<10, + (range_basek + range_sizek)<<10); + state->reg = range_to_mtrr(state->reg, range_basek, range_sizek, + MTRR_TYPE_WRBACK); + if (hole_sizek) { + if (debug_print) + printk(KERN_DEBUG "hole: %016lx - %016lx\n", + hole_basek<<10, (hole_basek + hole_sizek)<<10); + state->reg = range_to_mtrr(state->reg, hole_basek, hole_sizek, + MTRR_TYPE_UNCACHABLE); + + } + + return second_sizek; +} + +static void __init +set_var_mtrr_range(struct var_mtrr_state *state, unsigned long base_pfn, + unsigned long size_pfn) +{ + unsigned long basek, sizek; + unsigned long second_sizek = 0; + + if (state->reg >= num_var_ranges) + return; + + basek = base_pfn << (PAGE_SHIFT - 10); + sizek = size_pfn << (PAGE_SHIFT - 10); + + /* See if I can merge with the last range */ + if ((basek <= 1024) || + (state->range_startk + state->range_sizek == basek)) { + unsigned long endk = basek + sizek; + state->range_sizek = endk - state->range_startk; + return; + } + /* Write the range mtrrs */ + if (state->range_sizek != 0) + second_sizek = range_to_mtrr_with_hole(state, basek, sizek); + + /* Allocate an msr */ + state->range_startk = basek + second_sizek; + state->range_sizek = sizek - second_sizek; +} + +/* mininum size of mtrr block that can take hole */ +static u64 mtrr_chunk_size __initdata = (256ULL<<20); + +static int __init parse_mtrr_chunk_size_opt(char *p) +{ + if (!p) + return -EINVAL; + mtrr_chunk_size = memparse(p, &p); + return 0; +} +early_param("mtrr_chunk_size", parse_mtrr_chunk_size_opt); + +/* granity of mtrr of block */ +static u64 mtrr_gran_size __initdata; + +static int __init parse_mtrr_gran_size_opt(char *p) +{ + if (!p) + return -EINVAL; + mtrr_gran_size = memparse(p, &p); + return 0; +} +early_param("mtrr_gran_size", parse_mtrr_gran_size_opt); + +static int nr_mtrr_spare_reg __initdata = + CONFIG_MTRR_SANITIZER_SPARE_REG_NR_DEFAULT; + +static int __init parse_mtrr_spare_reg(char *arg) +{ + if (arg) + nr_mtrr_spare_reg = simple_strtoul(arg, NULL, 0); + return 0; +} + +early_param("mtrr_spare_reg_nr", parse_mtrr_spare_reg); + +static int __init +x86_setup_var_mtrrs(struct res_range *range, int nr_range, + u64 chunk_size, u64 gran_size) +{ + struct var_mtrr_state var_state; + int i; + int num_reg; + + var_state.range_startk = 0; + var_state.range_sizek = 0; + var_state.reg = 0; + var_state.chunk_sizek = chunk_size >> 10; + var_state.gran_sizek = gran_size >> 10; + + memset(range_state, 0, sizeof(range_state)); + + /* Write the range etc */ + for (i = 0; i < nr_range; i++) + set_var_mtrr_range(&var_state, range[i].start, + range[i].end - range[i].start + 1); + + /* Write the last range */ + if (var_state.range_sizek != 0) + range_to_mtrr_with_hole(&var_state, 0, 0); + + num_reg = var_state.reg; + /* Clear out the extra MTRR's */ + while (var_state.reg < num_var_ranges) { + save_var_mtrr(var_state.reg, 0, 0, 0); + var_state.reg++; + } + + return num_reg; +} + +struct mtrr_cleanup_result { + unsigned long gran_sizek; + unsigned long chunk_sizek; + unsigned long lose_cover_sizek; + unsigned int num_reg; + int bad; +}; + +/* + * gran_size: 1M, 2M, ..., 2G + * chunk size: gran_size, ..., 4G + * so we need (2+13)*6 + */ +#define NUM_RESULT 90 +#define PSHIFT (PAGE_SHIFT - 10) + +static struct mtrr_cleanup_result __initdata result[NUM_RESULT]; +static struct res_range __initdata range_new[RANGE_NUM]; +static unsigned long __initdata min_loss_pfn[RANGE_NUM]; + +static int __init mtrr_cleanup(unsigned address_bits) +{ + unsigned long extra_remove_base, extra_remove_size; + unsigned long i, base, size, def, dummy; + mtrr_type type; + int nr_range, nr_range_new; + u64 chunk_size, gran_size; + unsigned long range_sums, range_sums_new; + int index_good; + int num_reg_good; + + /* extra one for all 0 */ + int num[MTRR_NUM_TYPES + 1]; + + if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1) + return 0; + rdmsr(MTRRdefType_MSR, def, dummy); + def &= 0xff; + if (def != MTRR_TYPE_UNCACHABLE) + return 0; + + /* get it and store it aside */ + memset(range_state, 0, sizeof(range_state)); + for (i = 0; i < num_var_ranges; i++) { + mtrr_if->get(i, &base, &size, &type); + range_state[i].base_pfn = base; + range_state[i].size_pfn = size; + range_state[i].type = type; + } + + /* check entries number */ + memset(num, 0, sizeof(num)); + for (i = 0; i < num_var_ranges; i++) { + type = range_state[i].type; + size = range_state[i].size_pfn; + if (type >= MTRR_NUM_TYPES) + continue; + if (!size) + type = MTRR_NUM_TYPES; + num[type]++; + } + + /* check if we got UC entries */ + if (!num[MTRR_TYPE_UNCACHABLE]) + return 0; + + /* check if we only had WB and UC */ + if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] != + num_var_ranges - num[MTRR_NUM_TYPES]) + return 0; + + memset(range, 0, sizeof(range)); + extra_remove_size = 0; + if (mtrr_tom2) { + extra_remove_base = 1 << (32 - PAGE_SHIFT); + extra_remove_size = + (mtrr_tom2 >> PAGE_SHIFT) - extra_remove_base; + } + nr_range = x86_get_mtrr_mem_range(range, 0, extra_remove_base, + extra_remove_size); + range_sums = sum_ranges(range, nr_range); + printk(KERN_INFO "total RAM coverred: %ldM\n", + range_sums >> (20 - PAGE_SHIFT)); + + if (mtrr_chunk_size && mtrr_gran_size) { + int num_reg; + + debug_print = 1; + /* convert ranges to var ranges state */ + num_reg = x86_setup_var_mtrrs(range, nr_range, mtrr_chunk_size, + mtrr_gran_size); + + /* we got new setting in range_state, check it */ + memset(range_new, 0, sizeof(range_new)); + nr_range_new = x86_get_mtrr_mem_range(range_new, 0, + extra_remove_base, + extra_remove_size); + range_sums_new = sum_ranges(range_new, nr_range_new); + + i = 0; + result[i].chunk_sizek = mtrr_chunk_size >> 10; + result[i].gran_sizek = mtrr_gran_size >> 10; + result[i].num_reg = num_reg; + if (range_sums < range_sums_new) { + result[i].lose_cover_sizek = + (range_sums_new - range_sums) << PSHIFT; + result[i].bad = 1; + } else + result[i].lose_cover_sizek = + (range_sums - range_sums_new) << PSHIFT; + + printk(KERN_INFO "%sgran_size: %ldM \tchunk_size: %ldM \t", + result[i].bad?"*BAD*":" ", result[i].gran_sizek >> 10, + result[i].chunk_sizek >> 10); + printk(KERN_CONT "num_reg: %d \tlose cover RAM: %s%ldM \n", + result[i].num_reg, result[i].bad?"-":"", + result[i].lose_cover_sizek >> 10); + if (!result[i].bad) { + set_var_mtrr_all(address_bits); + return 1; + } + printk(KERN_INFO "invalid mtrr_gran_size or mtrr_chunk_size, " + "will find optimal one\n"); + debug_print = 0; + memset(result, 0, sizeof(result[0])); + } + + i = 0; + memset(min_loss_pfn, 0xff, sizeof(min_loss_pfn)); + memset(result, 0, sizeof(result)); + for (gran_size = (1ULL<<20); gran_size < (1ULL<<32); gran_size <<= 1) { + for (chunk_size = gran_size; chunk_size < (1ULL<<33); + chunk_size <<= 1) { + int num_reg; + + if (debug_print) + printk(KERN_INFO + "\ngran_size: %lldM chunk_size_size: %lldM\n", + gran_size >> 20, chunk_size >> 20); + if (i >= NUM_RESULT) + continue; + + /* convert ranges to var ranges state */ + num_reg = x86_setup_var_mtrrs(range, nr_range, + chunk_size, gran_size); + + /* we got new setting in range_state, check it */ + memset(range_new, 0, sizeof(range_new)); + nr_range_new = x86_get_mtrr_mem_range(range_new, 0, + extra_remove_base, extra_remove_size); + range_sums_new = sum_ranges(range_new, nr_range_new); + + result[i].chunk_sizek = chunk_size >> 10; + result[i].gran_sizek = gran_size >> 10; + result[i].num_reg = num_reg; + if (range_sums < range_sums_new) { + result[i].lose_cover_sizek = + (range_sums_new - range_sums) << PSHIFT; + result[i].bad = 1; + } else + result[i].lose_cover_sizek = + (range_sums - range_sums_new) << PSHIFT; + + /* double check it */ + if (!result[i].bad && !result[i].lose_cover_sizek) { + if (nr_range_new != nr_range || + memcmp(range, range_new, sizeof(range))) + result[i].bad = 1; + } + + if (!result[i].bad && (range_sums - range_sums_new < + min_loss_pfn[num_reg])) { + min_loss_pfn[num_reg] = + range_sums - range_sums_new; + } + i++; + } + } + + /* print out all */ + for (i = 0; i < NUM_RESULT; i++) { + printk(KERN_INFO "%sgran_size: %ldM \tchunk_size: %ldM \t", + result[i].bad?"*BAD* ":" ", result[i].gran_sizek >> 10, + result[i].chunk_sizek >> 10); + printk(KERN_CONT "num_reg: %d \tlose RAM: %s%ldM\n", + result[i].num_reg, result[i].bad?"-":"", + result[i].lose_cover_sizek >> 10); + } + + /* try to find the optimal index */ + if (nr_mtrr_spare_reg >= num_var_ranges) + nr_mtrr_spare_reg = num_var_ranges - 1; + num_reg_good = -1; + for (i = num_var_ranges - nr_mtrr_spare_reg; i > 0; i--) { + if (!min_loss_pfn[i]) { + num_reg_good = i; + break; + } + } + + index_good = -1; + if (num_reg_good != -1) { + for (i = 0; i < NUM_RESULT; i++) { + if (!result[i].bad && + result[i].num_reg == num_reg_good && + !result[i].lose_cover_sizek) { + index_good = i; + break; + } + } + } + + if (index_good != -1) { + printk(KERN_INFO "Found optimal setting for mtrr clean up\n"); + i = index_good; + printk(KERN_INFO "gran_size: %ldM \tchunk_size: %ldM \t", + result[i].gran_sizek >> 10, + result[i].chunk_sizek >> 10); + printk(KERN_CONT "num_reg: %d \tlose RAM: %ldM\n", + result[i].num_reg, + result[i].lose_cover_sizek >> 10); + /* convert ranges to var ranges state */ + chunk_size = result[i].chunk_sizek; + chunk_size <<= 10; + gran_size = result[i].gran_sizek; + gran_size <<= 10; + debug_print = 1; + x86_setup_var_mtrrs(range, nr_range, chunk_size, gran_size); + set_var_mtrr_all(address_bits); + return 1; + } + + printk(KERN_INFO "mtrr_cleanup: can not find optimal value\n"); + printk(KERN_INFO "please specify mtrr_gran_size/mtrr_chunk_size\n"); + + return 0; +} +#else +static int __init mtrr_cleanup(unsigned address_bits) +{ + return 0; +} +#endif + +static int __initdata changed_by_mtrr_cleanup; + static int disable_mtrr_trim; static int __init disable_mtrr_trim_setup(char *str) @@ -648,6 +1430,19 @@ int __init amd_special_default_mtrr(void) return 0; } +static u64 __init real_trim_memory(unsigned long start_pfn, + unsigned long limit_pfn) +{ + u64 trim_start, trim_size; + trim_start = start_pfn; + trim_start <<= PAGE_SHIFT; + trim_size = limit_pfn; + trim_size <<= PAGE_SHIFT; + trim_size -= trim_start; + + return e820_update_range(trim_start, trim_size, E820_RAM, + E820_RESERVED); +} /** * mtrr_trim_uncached_memory - trim RAM not covered by MTRRs * @end_pfn: ending page frame number @@ -663,8 +1458,11 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) { unsigned long i, base, size, highest_pfn = 0, def, dummy; mtrr_type type; - u64 trim_start, trim_size; + int nr_range; + u64 total_trim_size; + /* extra one for all 0 */ + int num[MTRR_NUM_TYPES + 1]; /* * Make sure we only trim uncachable memory on machines that * support the Intel MTRR architecture: @@ -676,14 +1474,22 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) if (def != MTRR_TYPE_UNCACHABLE) return 0; - if (amd_special_default_mtrr()) - return 0; + /* get it and store it aside */ + memset(range_state, 0, sizeof(range_state)); + for (i = 0; i < num_var_ranges; i++) { + mtrr_if->get(i, &base, &size, &type); + range_state[i].base_pfn = base; + range_state[i].size_pfn = size; + range_state[i].type = type; + } /* Find highest cached pfn */ for (i = 0; i < num_var_ranges; i++) { - mtrr_if->get(i, &base, &size, &type); + type = range_state[i].type; if (type != MTRR_TYPE_WRBACK) continue; + base = range_state[i].base_pfn; + size = range_state[i].size_pfn; if (highest_pfn < base + size) highest_pfn = base + size; } @@ -698,22 +1504,65 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) return 0; } - if (highest_pfn < end_pfn) { + /* check entries number */ + memset(num, 0, sizeof(num)); + for (i = 0; i < num_var_ranges; i++) { + type = range_state[i].type; + if (type >= MTRR_NUM_TYPES) + continue; + size = range_state[i].size_pfn; + if (!size) + type = MTRR_NUM_TYPES; + num[type]++; + } + + /* no entry for WB? */ + if (!num[MTRR_TYPE_WRBACK]) + return 0; + + /* check if we only had WB and UC */ + if (num[MTRR_TYPE_WRBACK] + num[MTRR_TYPE_UNCACHABLE] != + num_var_ranges - num[MTRR_NUM_TYPES]) + return 0; + + memset(range, 0, sizeof(range)); + nr_range = 0; + if (mtrr_tom2) { + range[nr_range].start = (1ULL<<(32 - PAGE_SHIFT)); + range[nr_range].end = (mtrr_tom2 >> PAGE_SHIFT) - 1; + if (highest_pfn < range[nr_range].end + 1) + highest_pfn = range[nr_range].end + 1; + nr_range++; + } + nr_range = x86_get_mtrr_mem_range(range, nr_range, 0, 0); + + total_trim_size = 0; + /* check the head */ + if (range[0].start) + total_trim_size += real_trim_memory(0, range[0].start); + /* check the holes */ + for (i = 0; i < nr_range - 1; i++) { + if (range[i].end + 1 < range[i+1].start) + total_trim_size += real_trim_memory(range[i].end + 1, + range[i+1].start); + } + /* check the top */ + i = nr_range - 1; + if (range[i].end + 1 < end_pfn) + total_trim_size += real_trim_memory(range[i].end + 1, + end_pfn); + + if (total_trim_size) { printk(KERN_WARNING "WARNING: BIOS bug: CPU MTRRs don't cover" - " all of memory, losing %luMB of RAM.\n", - (end_pfn - highest_pfn) >> (20 - PAGE_SHIFT)); + " all of memory, losing %lluMB of RAM.\n", + total_trim_size >> 20); - WARN_ON(1); + if (!changed_by_mtrr_cleanup) + WARN_ON(1); printk(KERN_INFO "update e820 for mtrr\n"); - trim_start = highest_pfn; - trim_start <<= PAGE_SHIFT; - trim_size = end_pfn; - trim_size <<= PAGE_SHIFT; - trim_size -= trim_start; - update_memory_range(trim_start, trim_size, E820_RAM, - E820_RESERVED); update_e820(); + return 1; } @@ -729,18 +1578,21 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn) */ void __init mtrr_bp_init(void) { + u32 phys_addr; init_ifs(); + phys_addr = 32; + if (cpu_has_mtrr) { mtrr_if = &generic_mtrr_ops; size_or_mask = 0xff000000; /* 36 bits */ size_and_mask = 0x00f00000; + phys_addr = 36; /* This is an AMD specific MSR, but we assume(hope?) that Intel will implement it to when they extend the address bus of the Xeon. */ if (cpuid_eax(0x80000000) >= 0x80000008) { - u32 phys_addr; phys_addr = cpuid_eax(0x80000008) & 0xff; /* CPUID workaround for Intel 0F33/0F34 CPU */ if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && @@ -758,6 +1610,7 @@ void __init mtrr_bp_init(void) don't support PAE */ size_or_mask = 0xfff00000; /* 32 bits */ size_and_mask = 0; + phys_addr = 32; } } else { switch (boot_cpu_data.x86_vendor) { @@ -791,8 +1644,15 @@ void __init mtrr_bp_init(void) if (mtrr_if) { set_num_var_ranges(); init_table(); - if (use_intel()) + if (use_intel()) { get_mtrr_state(); + + if (mtrr_cleanup(phys_addr)) { + changed_by_mtrr_cleanup = 1; + mtrr_if->set_all(); + } + + } } } @@ -822,16 +1682,17 @@ void mtrr_ap_init(void) */ void mtrr_save_state(void) { - smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1, 1); + smp_call_function_single(0, mtrr_save_fixed_ranges, NULL, 1); } static int __init mtrr_init_finialize(void) { if (!mtrr_if) return 0; - if (use_intel()) - mtrr_state_warn(); - else { + if (use_intel()) { + if (!changed_by_mtrr_cleanup) + mtrr_state_warn(); + } else { /* The CPUs haven't MTRR and seem to not support SMP. They have * specific drivers, we use a tricky method to support * suspend/resume for them. diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h index 2cc77eb6fea36967f7defdbae74359ebaac14ebb..2dc4ec656b23c22c9d3806cd57746d4c834b5166 100644 --- a/arch/x86/kernel/cpu/mtrr/mtrr.h +++ b/arch/x86/kernel/cpu/mtrr/mtrr.h @@ -81,6 +81,8 @@ void set_mtrr_done(struct set_mtrr_context *ctxt); void set_mtrr_cache_disable(struct set_mtrr_context *ctxt); void set_mtrr_prepare_save(struct set_mtrr_context *ctxt); +void fill_mtrr_var_range(unsigned int index, + u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi); void get_mtrr_state(void); extern void set_mtrr_ops(struct mtrr_ops * ops); @@ -92,6 +94,7 @@ extern struct mtrr_ops * mtrr_if; #define use_intel() (mtrr_if && mtrr_if->use_intel_if == 1) extern unsigned int num_var_ranges; +extern u64 mtrr_tom2; void mtrr_state_warn(void); const char *mtrr_attrib_to_str(int x); diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c index f9ae93adffe5a58619b2c687e39cfbb43e00d987..de7439f82b9230d7a65fa8a12af027bc7a578660 100644 --- a/arch/x86/kernel/cpu/perfctr-watchdog.c +++ b/arch/x86/kernel/cpu/perfctr-watchdog.c @@ -1,11 +1,15 @@ -/* local apic based NMI watchdog for various CPUs. - This file also handles reservation of performance counters for coordination - with other users (like oprofile). - - Note that these events normally don't tick when the CPU idles. This means - the frequency varies with CPU load. - - Original code for K7/P6 written by Keith Owens */ +/* + * local apic based NMI watchdog for various CPUs. + * + * This file also handles reservation of performance counters for coordination + * with other users (like oprofile). + * + * Note that these events normally don't tick when the CPU idles. This means + * the frequency varies with CPU load. + * + * Original code for K7/P6 written by Keith Owens + * + */ #include #include @@ -36,12 +40,16 @@ struct wd_ops { static const struct wd_ops *wd_ops; -/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's - * offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now) +/* + * this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's + * offset from MSR_P4_BSU_ESCR0. + * + * It will be the max for all platforms (for now) */ #define NMI_MAX_COUNTER_BITS 66 -/* perfctr_nmi_owner tracks the ownership of the perfctr registers: +/* + * perfctr_nmi_owner tracks the ownership of the perfctr registers: * evtsel_nmi_owner tracks the ownership of the event selection * - different performance counters/ event selection may be reserved for * different subsystems this reservation system just tries to coordinate @@ -73,8 +81,10 @@ static inline unsigned int nmi_perfctr_msr_to_bit(unsigned int msr) return 0; } -/* converts an msr to an appropriate reservation bit */ -/* returns the bit offset of the event selection register */ +/* + * converts an msr to an appropriate reservation bit + * returns the bit offset of the event selection register + */ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr) { /* returns the bit offset of the event selection register */ @@ -114,6 +124,7 @@ int avail_to_resrv_perfctr_nmi(unsigned int msr) return (!test_bit(counter, perfctr_nmi_owner)); } +EXPORT_SYMBOL(avail_to_resrv_perfctr_nmi_bit); int reserve_perfctr_nmi(unsigned int msr) { @@ -128,6 +139,7 @@ int reserve_perfctr_nmi(unsigned int msr) return 1; return 0; } +EXPORT_SYMBOL(reserve_perfctr_nmi); void release_perfctr_nmi(unsigned int msr) { @@ -140,6 +152,7 @@ void release_perfctr_nmi(unsigned int msr) clear_bit(counter, perfctr_nmi_owner); } +EXPORT_SYMBOL(release_perfctr_nmi); int reserve_evntsel_nmi(unsigned int msr) { @@ -154,6 +167,7 @@ int reserve_evntsel_nmi(unsigned int msr) return 1; return 0; } +EXPORT_SYMBOL(reserve_evntsel_nmi); void release_evntsel_nmi(unsigned int msr) { @@ -166,11 +180,6 @@ void release_evntsel_nmi(unsigned int msr) clear_bit(counter, evntsel_nmi_owner); } - -EXPORT_SYMBOL(avail_to_resrv_perfctr_nmi_bit); -EXPORT_SYMBOL(reserve_perfctr_nmi); -EXPORT_SYMBOL(release_perfctr_nmi); -EXPORT_SYMBOL(reserve_evntsel_nmi); EXPORT_SYMBOL(release_evntsel_nmi); void disable_lapic_nmi_watchdog(void) @@ -180,8 +189,10 @@ void disable_lapic_nmi_watchdog(void) if (atomic_read(&nmi_active) <= 0) return; - on_each_cpu(stop_apic_nmi_watchdog, NULL, 0, 1); - wd_ops->unreserve(); + on_each_cpu(stop_apic_nmi_watchdog, NULL, 1); + + if (wd_ops) + wd_ops->unreserve(); BUG_ON(atomic_read(&nmi_active) != 0); } @@ -202,7 +213,7 @@ void enable_lapic_nmi_watchdog(void) return; } - on_each_cpu(setup_apic_nmi_watchdog, NULL, 0, 1); + on_each_cpu(setup_apic_nmi_watchdog, NULL, 1); touch_nmi_watchdog(); } @@ -232,31 +243,32 @@ static unsigned int adjust_for_32bit_ctr(unsigned int hz) return retval; } -static void -write_watchdog_counter(unsigned int perfctr_msr, const char *descr, unsigned nmi_hz) +static void write_watchdog_counter(unsigned int perfctr_msr, + const char *descr, unsigned nmi_hz) { u64 count = (u64)cpu_khz * 1000; do_div(count, nmi_hz); if(descr) - Dprintk("setting %s to -0x%08Lx\n", descr, count); + pr_debug("setting %s to -0x%08Lx\n", descr, count); wrmsrl(perfctr_msr, 0 - count); } static void write_watchdog_counter32(unsigned int perfctr_msr, - const char *descr, unsigned nmi_hz) + const char *descr, unsigned nmi_hz) { u64 count = (u64)cpu_khz * 1000; do_div(count, nmi_hz); if(descr) - Dprintk("setting %s to -0x%08Lx\n", descr, count); + pr_debug("setting %s to -0x%08Lx\n", descr, count); wrmsr(perfctr_msr, (u32)(-count), 0); } -/* AMD K7/K8/Family10h/Family11h support. AMD keeps this interface - nicely stable so there is not much variety */ - +/* + * AMD K7/K8/Family10h/Family11h support. + * AMD keeps this interface nicely stable so there is not much variety + */ #define K7_EVNTSEL_ENABLE (1 << 22) #define K7_EVNTSEL_INT (1 << 20) #define K7_EVNTSEL_OS (1 << 17) @@ -289,7 +301,7 @@ static int setup_k7_watchdog(unsigned nmi_hz) wd->perfctr_msr = perfctr_msr; wd->evntsel_msr = evntsel_msr; - wd->cccr_msr = 0; //unused + wd->cccr_msr = 0; /* unused */ return 1; } @@ -325,18 +337,19 @@ static void single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz) } static const struct wd_ops k7_wd_ops = { - .reserve = single_msr_reserve, - .unreserve = single_msr_unreserve, - .setup = setup_k7_watchdog, - .rearm = single_msr_rearm, - .stop = single_msr_stop_watchdog, - .perfctr = MSR_K7_PERFCTR0, - .evntsel = MSR_K7_EVNTSEL0, - .checkbit = 1ULL<<47, + .reserve = single_msr_reserve, + .unreserve = single_msr_unreserve, + .setup = setup_k7_watchdog, + .rearm = single_msr_rearm, + .stop = single_msr_stop_watchdog, + .perfctr = MSR_K7_PERFCTR0, + .evntsel = MSR_K7_EVNTSEL0, + .checkbit = 1ULL << 47, }; -/* Intel Model 6 (PPro+,P2,P3,P-M,Core1) */ - +/* + * Intel Model 6 (PPro+,P2,P3,P-M,Core1) + */ #define P6_EVNTSEL0_ENABLE (1 << 22) #define P6_EVNTSEL_INT (1 << 20) #define P6_EVNTSEL_OS (1 << 17) @@ -372,52 +385,58 @@ static int setup_p6_watchdog(unsigned nmi_hz) wd->perfctr_msr = perfctr_msr; wd->evntsel_msr = evntsel_msr; - wd->cccr_msr = 0; //unused + wd->cccr_msr = 0; /* unused */ return 1; } static void p6_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz) { - /* P6 based Pentium M need to re-unmask + /* + * P6 based Pentium M need to re-unmask * the apic vector but it doesn't hurt * other P6 variant. - * ArchPerfom/Core Duo also needs this */ + * ArchPerfom/Core Duo also needs this + */ apic_write(APIC_LVTPC, APIC_DM_NMI); + /* P6/ARCH_PERFMON has 32 bit counter write */ write_watchdog_counter32(wd->perfctr_msr, NULL,nmi_hz); } static const struct wd_ops p6_wd_ops = { - .reserve = single_msr_reserve, - .unreserve = single_msr_unreserve, - .setup = setup_p6_watchdog, - .rearm = p6_rearm, - .stop = single_msr_stop_watchdog, - .perfctr = MSR_P6_PERFCTR0, - .evntsel = MSR_P6_EVNTSEL0, - .checkbit = 1ULL<<39, + .reserve = single_msr_reserve, + .unreserve = single_msr_unreserve, + .setup = setup_p6_watchdog, + .rearm = p6_rearm, + .stop = single_msr_stop_watchdog, + .perfctr = MSR_P6_PERFCTR0, + .evntsel = MSR_P6_EVNTSEL0, + .checkbit = 1ULL << 39, }; -/* Intel P4 performance counters. By far the most complicated of all. */ - -#define MSR_P4_MISC_ENABLE_PERF_AVAIL (1<<7) -#define P4_ESCR_EVENT_SELECT(N) ((N)<<25) -#define P4_ESCR_OS (1<<3) -#define P4_ESCR_USR (1<<2) -#define P4_CCCR_OVF_PMI0 (1<<26) -#define P4_CCCR_OVF_PMI1 (1<<27) -#define P4_CCCR_THRESHOLD(N) ((N)<<20) -#define P4_CCCR_COMPLEMENT (1<<19) -#define P4_CCCR_COMPARE (1<<18) -#define P4_CCCR_REQUIRED (3<<16) -#define P4_CCCR_ESCR_SELECT(N) ((N)<<13) -#define P4_CCCR_ENABLE (1<<12) -#define P4_CCCR_OVF (1<<31) - -/* Set up IQ_COUNTER0 to behave like a clock, by having IQ_CCCR0 filter - CRU_ESCR0 (with any non-null event selector) through a complemented - max threshold. [IA32-Vol3, Section 14.9.9] */ +/* + * Intel P4 performance counters. + * By far the most complicated of all. + */ +#define MSR_P4_MISC_ENABLE_PERF_AVAIL (1 << 7) +#define P4_ESCR_EVENT_SELECT(N) ((N) << 25) +#define P4_ESCR_OS (1 << 3) +#define P4_ESCR_USR (1 << 2) +#define P4_CCCR_OVF_PMI0 (1 << 26) +#define P4_CCCR_OVF_PMI1 (1 << 27) +#define P4_CCCR_THRESHOLD(N) ((N) << 20) +#define P4_CCCR_COMPLEMENT (1 << 19) +#define P4_CCCR_COMPARE (1 << 18) +#define P4_CCCR_REQUIRED (3 << 16) +#define P4_CCCR_ESCR_SELECT(N) ((N) << 13) +#define P4_CCCR_ENABLE (1 << 12) +#define P4_CCCR_OVF (1 << 31) +/* + * Set up IQ_COUNTER0 to behave like a clock, by having IQ_CCCR0 filter + * CRU_ESCR0 (with any non-null event selector) through a complemented + * max threshold. [IA32-Vol3, Section 14.9.9] + */ static int setup_p4_watchdog(unsigned nmi_hz) { unsigned int perfctr_msr, evntsel_msr, cccr_msr; @@ -442,7 +461,8 @@ static int setup_p4_watchdog(unsigned nmi_hz) #endif ht_num = 0; - /* performance counters are shared resources + /* + * performance counters are shared resources * assign each hyperthread its own set * (re-use the ESCR0 register, seems safe * and keeps the cccr_val the same) @@ -540,20 +560,21 @@ static void p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz) } static const struct wd_ops p4_wd_ops = { - .reserve = p4_reserve, - .unreserve = p4_unreserve, - .setup = setup_p4_watchdog, - .rearm = p4_rearm, - .stop = stop_p4_watchdog, + .reserve = p4_reserve, + .unreserve = p4_unreserve, + .setup = setup_p4_watchdog, + .rearm = p4_rearm, + .stop = stop_p4_watchdog, /* RED-PEN this is wrong for the other sibling */ - .perfctr = MSR_P4_BPU_PERFCTR0, - .evntsel = MSR_P4_BSU_ESCR0, - .checkbit = 1ULL<<39, + .perfctr = MSR_P4_BPU_PERFCTR0, + .evntsel = MSR_P4_BSU_ESCR0, + .checkbit = 1ULL << 39, }; -/* Watchdog using the Intel architected PerfMon. Used for Core2 and hopefully - all future Intel CPUs. */ - +/* + * Watchdog using the Intel architected PerfMon. + * Used for Core2 and hopefully all future Intel CPUs. + */ #define ARCH_PERFMON_NMI_EVENT_SEL ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL #define ARCH_PERFMON_NMI_EVENT_UMASK ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK @@ -599,19 +620,19 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz) wd->perfctr_msr = perfctr_msr; wd->evntsel_msr = evntsel_msr; - wd->cccr_msr = 0; //unused + wd->cccr_msr = 0; /* unused */ intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1); return 1; } static struct wd_ops intel_arch_wd_ops __read_mostly = { - .reserve = single_msr_reserve, - .unreserve = single_msr_unreserve, - .setup = setup_intel_arch_watchdog, - .rearm = p6_rearm, - .stop = single_msr_stop_watchdog, - .perfctr = MSR_ARCH_PERFMON_PERFCTR1, - .evntsel = MSR_ARCH_PERFMON_EVENTSEL1, + .reserve = single_msr_reserve, + .unreserve = single_msr_unreserve, + .setup = setup_intel_arch_watchdog, + .rearm = p6_rearm, + .stop = single_msr_stop_watchdog, + .perfctr = MSR_ARCH_PERFMON_PERFCTR1, + .evntsel = MSR_ARCH_PERFMON_EVENTSEL1, }; static void probe_nmi_watchdog(void) @@ -624,8 +645,10 @@ static void probe_nmi_watchdog(void) wd_ops = &k7_wd_ops; break; case X86_VENDOR_INTEL: - /* Work around Core Duo (Yonah) errata AE49 where perfctr1 - doesn't have a working enable bit. */ + /* + * Work around Core Duo (Yonah) errata AE49 where perfctr1 + * doesn't have a working enable bit. + */ if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 14) { intel_arch_wd_ops.perfctr = MSR_ARCH_PERFMON_PERFCTR0; intel_arch_wd_ops.evntsel = MSR_ARCH_PERFMON_EVENTSEL0; @@ -636,7 +659,7 @@ static void probe_nmi_watchdog(void) } switch (boot_cpu_data.x86) { case 6: - if (boot_cpu_data.x86_model > 0xd) + if (boot_cpu_data.x86_model > 13) return; wd_ops = &p6_wd_ops; @@ -697,10 +720,11 @@ int lapic_wd_event(unsigned nmi_hz) { struct nmi_watchdog_ctlblk *wd = &__get_cpu_var(nmi_watchdog_ctlblk); u64 ctr; + rdmsrl(wd->perfctr_msr, ctr); - if (ctr & wd_ops->checkbit) { /* perfctr still running? */ + if (ctr & wd_ops->checkbit) /* perfctr still running? */ return 0; - } + wd_ops->rearm(wd, nmi_hz); return 1; } diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c index 0d0d9057e7c0b63b36591385d89397ff7322bd99..a26c480b94915a2b460c0963bf38f9693c911641 100644 --- a/arch/x86/kernel/cpu/proc.c +++ b/arch/x86/kernel/cpu/proc.c @@ -160,7 +160,7 @@ static void *c_start(struct seq_file *m, loff_t *pos) { if (*pos == 0) /* just in case, cpu 0 is not the first */ *pos = first_cpu(cpu_online_map); - if ((*pos) < NR_CPUS && cpu_online(*pos)) + if ((*pos) < nr_cpu_ids && cpu_online(*pos)) return &cpu_data(*pos); return NULL; } diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index daff52a6224857f79985d20c96b0661922c88504..14b11b3be31ca64d600cb7281edb93f5228809b9 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -95,7 +96,7 @@ static ssize_t cpuid_read(struct file *file, char __user *buf, for (; count; count -= 16) { cmd.eax = pos; cmd.ecx = pos >> 32; - smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1, 1); + smp_call_function_single(cpu, cpuid_smp_cpuid, &cmd, 1); if (copy_to_user(tmp, &cmd, 16)) return -EFAULT; tmp += 16; @@ -107,15 +108,23 @@ static ssize_t cpuid_read(struct file *file, char __user *buf, static int cpuid_open(struct inode *inode, struct file *file) { - unsigned int cpu = iminor(file->f_path.dentry->d_inode); - struct cpuinfo_x86 *c = &cpu_data(cpu); - - if (cpu >= NR_CPUS || !cpu_online(cpu)) - return -ENXIO; /* No such CPU */ + unsigned int cpu; + struct cpuinfo_x86 *c; + int ret = 0; + + lock_kernel(); + + cpu = iminor(file->f_path.dentry->d_inode); + if (cpu >= NR_CPUS || !cpu_online(cpu)) { + ret = -ENXIO; /* No such CPU */ + goto out; + } + c = &cpu_data(cpu); if (c->cpuid_level < 0) - return -EIO; /* CPUID not supported */ - - return 0; + ret = -EIO; /* CPUID not supported */ +out: + unlock_kernel(); + return ret; } /* @@ -132,8 +141,8 @@ static __cpuinit int cpuid_device_create(int cpu) { struct device *dev; - dev = device_create(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), - "cpu%d", cpu); + dev = device_create_drvdata(cpuid_class, NULL, MKDEV(CPUID_MAJOR, cpu), + NULL, "cpu%d", cpu); return IS_ERR(dev) ? PTR_ERR(dev) : 0; } diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c new file mode 100644 index 0000000000000000000000000000000000000000..9af89078f7bb0cb2b6ce7ed958c9483b24d4402e --- /dev/null +++ b/arch/x86/kernel/e820.c @@ -0,0 +1,1365 @@ +/* + * Handle the memory map. + * The functions here do the job until bootmem takes over. + * + * Getting sanitize_e820_map() in sync with i386 version by applying change: + * - Provisions for empty E820 memory regions (reported by certain BIOSes). + * Alex Achenbach , December 2002. + * Venkatesh Pallipadi + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +/* + * The e820 map is the map that gets modified e.g. with command line parameters + * and that is also registered with modifications in the kernel resource tree + * with the iomem_resource as parent. + * + * The e820_saved is directly saved after the BIOS-provided memory map is + * copied. It doesn't get modified afterwards. It's registered for the + * /sys/firmware/memmap interface. + * + * That memory map is not modified and is used as base for kexec. The kexec'd + * kernel should get the same memory map as the firmware provides. Then the + * user can e.g. boot the original kernel with mem=1G while still booting the + * next kernel with full memory. + */ +struct e820map e820; +struct e820map e820_saved; + +/* For PCI or other memory-mapped resources */ +unsigned long pci_mem_start = 0xaeedbabe; +#ifdef CONFIG_PCI +EXPORT_SYMBOL(pci_mem_start); +#endif + +/* + * This function checks if any part of the range is mapped + * with type. + */ +int +e820_any_mapped(u64 start, u64 end, unsigned type) +{ + int i; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + + if (type && ei->type != type) + continue; + if (ei->addr >= end || ei->addr + ei->size <= start) + continue; + return 1; + } + return 0; +} +EXPORT_SYMBOL_GPL(e820_any_mapped); + +/* + * This function checks if the entire range is mapped with type. + * + * Note: this function only works correct if the e820 table is sorted and + * not-overlapping, which is the case + */ +int __init e820_all_mapped(u64 start, u64 end, unsigned type) +{ + int i; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + + if (type && ei->type != type) + continue; + /* is the region (part) in overlap with the current region ?*/ + if (ei->addr >= end || ei->addr + ei->size <= start) + continue; + + /* if the region is at the beginning of we move + * start to the end of the region since it's ok until there + */ + if (ei->addr <= start) + start = ei->addr + ei->size; + /* + * if start is now at or beyond end, we're done, full + * coverage + */ + if (start >= end) + return 1; + } + return 0; +} + +/* + * Add a memory region to the kernel e820 map. + */ +void __init e820_add_region(u64 start, u64 size, int type) +{ + int x = e820.nr_map; + + if (x == ARRAY_SIZE(e820.map)) { + printk(KERN_ERR "Ooops! Too many entries in the memory map!\n"); + return; + } + + e820.map[x].addr = start; + e820.map[x].size = size; + e820.map[x].type = type; + e820.nr_map++; +} + +void __init e820_print_map(char *who) +{ + int i; + + for (i = 0; i < e820.nr_map; i++) { + printk(KERN_INFO " %s: %016Lx - %016Lx ", who, + (unsigned long long) e820.map[i].addr, + (unsigned long long) + (e820.map[i].addr + e820.map[i].size)); + switch (e820.map[i].type) { + case E820_RAM: + case E820_RESERVED_KERN: + printk(KERN_CONT "(usable)\n"); + break; + case E820_RESERVED: + printk(KERN_CONT "(reserved)\n"); + break; + case E820_ACPI: + printk(KERN_CONT "(ACPI data)\n"); + break; + case E820_NVS: + printk(KERN_CONT "(ACPI NVS)\n"); + break; + default: + printk(KERN_CONT "type %u\n", e820.map[i].type); + break; + } + } +} + +/* + * Sanitize the BIOS e820 map. + * + * Some e820 responses include overlapping entries. The following + * replaces the original e820 map with a new one, removing overlaps, + * and resolving conflicting memory types in favor of highest + * numbered type. + * + * The input parameter biosmap points to an array of 'struct + * e820entry' which on entry has elements in the range [0, *pnr_map) + * valid, and which has space for up to max_nr_map entries. + * On return, the resulting sanitized e820 map entries will be in + * overwritten in the same location, starting at biosmap. + * + * The integer pointed to by pnr_map must be valid on entry (the + * current number of valid entries located at biosmap) and will + * be updated on return, with the new number of valid entries + * (something no more than max_nr_map.) + * + * The return value from sanitize_e820_map() is zero if it + * successfully 'sanitized' the map entries passed in, and is -1 + * if it did nothing, which can happen if either of (1) it was + * only passed one map entry, or (2) any of the input map entries + * were invalid (start + size < start, meaning that the size was + * so big the described memory range wrapped around through zero.) + * + * Visually we're performing the following + * (1,2,3,4 = memory types)... + * + * Sample memory map (w/overlaps): + * ____22__________________ + * ______________________4_ + * ____1111________________ + * _44_____________________ + * 11111111________________ + * ____________________33__ + * ___________44___________ + * __________33333_________ + * ______________22________ + * ___________________2222_ + * _________111111111______ + * _____________________11_ + * _________________4______ + * + * Sanitized equivalent (no overlap): + * 1_______________________ + * _44_____________________ + * ___1____________________ + * ____22__________________ + * ______11________________ + * _________1______________ + * __________3_____________ + * ___________44___________ + * _____________33_________ + * _______________2________ + * ________________1_______ + * _________________4______ + * ___________________2____ + * ____________________33__ + * ______________________4_ + */ + +int __init sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, + int *pnr_map) +{ + struct change_member { + struct e820entry *pbios; /* pointer to original bios entry */ + unsigned long long addr; /* address for this change point */ + }; + static struct change_member change_point_list[2*E820_X_MAX] __initdata; + static struct change_member *change_point[2*E820_X_MAX] __initdata; + static struct e820entry *overlap_list[E820_X_MAX] __initdata; + static struct e820entry new_bios[E820_X_MAX] __initdata; + struct change_member *change_tmp; + unsigned long current_type, last_type; + unsigned long long last_addr; + int chgidx, still_changing; + int overlap_entries; + int new_bios_entry; + int old_nr, new_nr, chg_nr; + int i; + + /* if there's only one memory region, don't bother */ + if (*pnr_map < 2) + return -1; + + old_nr = *pnr_map; + BUG_ON(old_nr > max_nr_map); + + /* bail out if we find any unreasonable addresses in bios map */ + for (i = 0; i < old_nr; i++) + if (biosmap[i].addr + biosmap[i].size < biosmap[i].addr) + return -1; + + /* create pointers for initial change-point information (for sorting) */ + for (i = 0; i < 2 * old_nr; i++) + change_point[i] = &change_point_list[i]; + + /* record all known change-points (starting and ending addresses), + omitting those that are for empty memory regions */ + chgidx = 0; + for (i = 0; i < old_nr; i++) { + if (biosmap[i].size != 0) { + change_point[chgidx]->addr = biosmap[i].addr; + change_point[chgidx++]->pbios = &biosmap[i]; + change_point[chgidx]->addr = biosmap[i].addr + + biosmap[i].size; + change_point[chgidx++]->pbios = &biosmap[i]; + } + } + chg_nr = chgidx; + + /* sort change-point list by memory addresses (low -> high) */ + still_changing = 1; + while (still_changing) { + still_changing = 0; + for (i = 1; i < chg_nr; i++) { + unsigned long long curaddr, lastaddr; + unsigned long long curpbaddr, lastpbaddr; + + curaddr = change_point[i]->addr; + lastaddr = change_point[i - 1]->addr; + curpbaddr = change_point[i]->pbios->addr; + lastpbaddr = change_point[i - 1]->pbios->addr; + + /* + * swap entries, when: + * + * curaddr > lastaddr or + * curaddr == lastaddr and curaddr == curpbaddr and + * lastaddr != lastpbaddr + */ + if (curaddr < lastaddr || + (curaddr == lastaddr && curaddr == curpbaddr && + lastaddr != lastpbaddr)) { + change_tmp = change_point[i]; + change_point[i] = change_point[i-1]; + change_point[i-1] = change_tmp; + still_changing = 1; + } + } + } + + /* create a new bios memory map, removing overlaps */ + overlap_entries = 0; /* number of entries in the overlap table */ + new_bios_entry = 0; /* index for creating new bios map entries */ + last_type = 0; /* start with undefined memory type */ + last_addr = 0; /* start with 0 as last starting address */ + + /* loop through change-points, determining affect on the new bios map */ + for (chgidx = 0; chgidx < chg_nr; chgidx++) { + /* keep track of all overlapping bios entries */ + if (change_point[chgidx]->addr == + change_point[chgidx]->pbios->addr) { + /* + * add map entry to overlap list (> 1 entry + * implies an overlap) + */ + overlap_list[overlap_entries++] = + change_point[chgidx]->pbios; + } else { + /* + * remove entry from list (order independent, + * so swap with last) + */ + for (i = 0; i < overlap_entries; i++) { + if (overlap_list[i] == + change_point[chgidx]->pbios) + overlap_list[i] = + overlap_list[overlap_entries-1]; + } + overlap_entries--; + } + /* + * if there are overlapping entries, decide which + * "type" to use (larger value takes precedence -- + * 1=usable, 2,3,4,4+=unusable) + */ + current_type = 0; + for (i = 0; i < overlap_entries; i++) + if (overlap_list[i]->type > current_type) + current_type = overlap_list[i]->type; + /* + * continue building up new bios map based on this + * information + */ + if (current_type != last_type) { + if (last_type != 0) { + new_bios[new_bios_entry].size = + change_point[chgidx]->addr - last_addr; + /* + * move forward only if the new size + * was non-zero + */ + if (new_bios[new_bios_entry].size != 0) + /* + * no more space left for new + * bios entries ? + */ + if (++new_bios_entry >= max_nr_map) + break; + } + if (current_type != 0) { + new_bios[new_bios_entry].addr = + change_point[chgidx]->addr; + new_bios[new_bios_entry].type = current_type; + last_addr = change_point[chgidx]->addr; + } + last_type = current_type; + } + } + /* retain count for new bios entries */ + new_nr = new_bios_entry; + + /* copy new bios mapping into original location */ + memcpy(biosmap, new_bios, new_nr * sizeof(struct e820entry)); + *pnr_map = new_nr; + + return 0; +} + +static int __init __append_e820_map(struct e820entry *biosmap, int nr_map) +{ + while (nr_map) { + u64 start = biosmap->addr; + u64 size = biosmap->size; + u64 end = start + size; + u32 type = biosmap->type; + + /* Overflow in 64 bits? Ignore the memory map. */ + if (start > end) + return -1; + + e820_add_region(start, size, type); + + biosmap++; + nr_map--; + } + return 0; +} + +/* + * Copy the BIOS e820 map into a safe place. + * + * Sanity-check it while we're at it.. + * + * If we're lucky and live on a modern system, the setup code + * will have given us a memory map that we can use to properly + * set up memory. If we aren't, we'll fake a memory map. + */ +static int __init append_e820_map(struct e820entry *biosmap, int nr_map) +{ + /* Only one memory region (or negative)? Ignore it */ + if (nr_map < 2) + return -1; + + return __append_e820_map(biosmap, nr_map); +} + +static u64 __init e820_update_range_map(struct e820map *e820x, u64 start, + u64 size, unsigned old_type, + unsigned new_type) +{ + int i; + u64 real_updated_size = 0; + + BUG_ON(old_type == new_type); + + if (size > (ULLONG_MAX - start)) + size = ULLONG_MAX - start; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820x->map[i]; + u64 final_start, final_end; + if (ei->type != old_type) + continue; + /* totally covered? */ + if (ei->addr >= start && + (ei->addr + ei->size) <= (start + size)) { + ei->type = new_type; + real_updated_size += ei->size; + continue; + } + /* partially covered */ + final_start = max(start, ei->addr); + final_end = min(start + size, ei->addr + ei->size); + if (final_start >= final_end) + continue; + e820_add_region(final_start, final_end - final_start, + new_type); + real_updated_size += final_end - final_start; + + ei->size -= final_end - final_start; + if (ei->addr < final_start) + continue; + ei->addr = final_end; + } + return real_updated_size; +} + +u64 __init e820_update_range(u64 start, u64 size, unsigned old_type, + unsigned new_type) +{ + return e820_update_range_map(&e820, start, size, old_type, new_type); +} + +static u64 __init e820_update_range_saved(u64 start, u64 size, + unsigned old_type, unsigned new_type) +{ + return e820_update_range_map(&e820_saved, start, size, old_type, + new_type); +} + +/* make e820 not cover the range */ +u64 __init e820_remove_range(u64 start, u64 size, unsigned old_type, + int checktype) +{ + int i; + u64 real_removed_size = 0; + + if (size > (ULLONG_MAX - start)) + size = ULLONG_MAX - start; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + u64 final_start, final_end; + + if (checktype && ei->type != old_type) + continue; + /* totally covered? */ + if (ei->addr >= start && + (ei->addr + ei->size) <= (start + size)) { + real_removed_size += ei->size; + memset(ei, 0, sizeof(struct e820entry)); + continue; + } + /* partially covered */ + final_start = max(start, ei->addr); + final_end = min(start + size, ei->addr + ei->size); + if (final_start >= final_end) + continue; + real_removed_size += final_end - final_start; + + ei->size -= final_end - final_start; + if (ei->addr < final_start) + continue; + ei->addr = final_end; + } + return real_removed_size; +} + +void __init update_e820(void) +{ + int nr_map; + + nr_map = e820.nr_map; + if (sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &nr_map)) + return; + e820.nr_map = nr_map; + printk(KERN_INFO "modified physical RAM map:\n"); + e820_print_map("modified"); +} +static void __init update_e820_saved(void) +{ + int nr_map; + + nr_map = e820_saved.nr_map; + if (sanitize_e820_map(e820_saved.map, ARRAY_SIZE(e820_saved.map), &nr_map)) + return; + e820_saved.nr_map = nr_map; +} +#define MAX_GAP_END 0x100000000ull +/* + * Search for a gap in the e820 memory space from start_addr to end_addr. + */ +__init int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize, + unsigned long start_addr, unsigned long long end_addr) +{ + unsigned long long last; + int i = e820.nr_map; + int found = 0; + + last = (end_addr && end_addr < MAX_GAP_END) ? end_addr : MAX_GAP_END; + + while (--i >= 0) { + unsigned long long start = e820.map[i].addr; + unsigned long long end = start + e820.map[i].size; + + if (end < start_addr) + continue; + + /* + * Since "last" is at most 4GB, we know we'll + * fit in 32 bits if this condition is true + */ + if (last > end) { + unsigned long gap = last - end; + + if (gap >= *gapsize) { + *gapsize = gap; + *gapstart = end; + found = 1; + } + } + if (start < last) + last = start; + } + return found; +} + +/* + * Search for the biggest gap in the low 32 bits of the e820 + * memory space. We pass this space to PCI to assign MMIO resources + * for hotplug or unconfigured devices in. + * Hopefully the BIOS let enough space left. + */ +__init void e820_setup_gap(void) +{ + unsigned long gapstart, gapsize, round; + int found; + + gapstart = 0x10000000; + gapsize = 0x400000; + found = e820_search_gap(&gapstart, &gapsize, 0, MAX_GAP_END); + +#ifdef CONFIG_X86_64 + if (!found) { + gapstart = (max_pfn << PAGE_SHIFT) + 1024*1024; + printk(KERN_ERR "PCI: Warning: Cannot find a gap in the 32bit " + "address range\n" + KERN_ERR "PCI: Unassigned devices with 32bit resource " + "registers may break!\n"); + } +#endif + + /* + * See how much we want to round up: start off with + * rounding to the next 1MB area. + */ + round = 0x100000; + while ((gapsize >> 4) > round) + round += round; + /* Fun with two's complement */ + pci_mem_start = (gapstart + round) & -round; + + printk(KERN_INFO + "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n", + pci_mem_start, gapstart, gapsize); +} + +/** + * Because of the size limitation of struct boot_params, only first + * 128 E820 memory entries are passed to kernel via + * boot_params.e820_map, others are passed via SETUP_E820_EXT node of + * linked list of struct setup_data, which is parsed here. + */ +void __init parse_e820_ext(struct setup_data *sdata, unsigned long pa_data) +{ + u32 map_len; + int entries; + struct e820entry *extmap; + + entries = sdata->len / sizeof(struct e820entry); + map_len = sdata->len + sizeof(struct setup_data); + if (map_len > PAGE_SIZE) + sdata = early_ioremap(pa_data, map_len); + extmap = (struct e820entry *)(sdata->data); + __append_e820_map(extmap, entries); + sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); + if (map_len > PAGE_SIZE) + early_iounmap(sdata, map_len); + printk(KERN_INFO "extended physical RAM map:\n"); + e820_print_map("extended"); +} + +#if defined(CONFIG_X86_64) || \ + (defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION)) +/** + * Find the ranges of physical addresses that do not correspond to + * e820 RAM areas and mark the corresponding pages as nosave for + * hibernation (32 bit) or software suspend and suspend to RAM (64 bit). + * + * This function requires the e820 map to be sorted and without any + * overlapping entries and assumes the first e820 area to be RAM. + */ +void __init e820_mark_nosave_regions(unsigned long limit_pfn) +{ + int i; + unsigned long pfn; + + pfn = PFN_DOWN(e820.map[0].addr + e820.map[0].size); + for (i = 1; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + + if (pfn < PFN_UP(ei->addr)) + register_nosave_region(pfn, PFN_UP(ei->addr)); + + pfn = PFN_DOWN(ei->addr + ei->size); + if (ei->type != E820_RAM && ei->type != E820_RESERVED_KERN) + register_nosave_region(PFN_UP(ei->addr), pfn); + + if (pfn >= limit_pfn) + break; + } +} +#endif + +/* + * Early reserved memory areas. + */ +#define MAX_EARLY_RES 20 + +struct early_res { + u64 start, end; + char name[16]; + char overlap_ok; +}; +static struct early_res early_res[MAX_EARLY_RES] __initdata = { + { 0, PAGE_SIZE, "BIOS data page" }, /* BIOS data page */ +#if defined(CONFIG_X86_64) && defined(CONFIG_X86_TRAMPOLINE) + { TRAMPOLINE_BASE, TRAMPOLINE_BASE + 2 * PAGE_SIZE, "TRAMPOLINE" }, +#endif +#if defined(CONFIG_X86_32) && defined(CONFIG_SMP) + /* + * But first pinch a few for the stack/trampoline stuff + * FIXME: Don't need the extra page at 4K, but need to fix + * trampoline before removing it. (see the GDT stuff) + */ + { PAGE_SIZE, PAGE_SIZE + PAGE_SIZE, "EX TRAMPOLINE" }, + /* + * Has to be in very low memory so we can execute + * real-mode AP code. + */ + { TRAMPOLINE_BASE, TRAMPOLINE_BASE + PAGE_SIZE, "TRAMPOLINE" }, +#endif + {} +}; + +static int __init find_overlapped_early(u64 start, u64 end) +{ + int i; + struct early_res *r; + + for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { + r = &early_res[i]; + if (end > r->start && start < r->end) + break; + } + + return i; +} + +/* + * Drop the i-th range from the early reservation map, + * by copying any higher ranges down one over it, and + * clearing what had been the last slot. + */ +static void __init drop_range(int i) +{ + int j; + + for (j = i + 1; j < MAX_EARLY_RES && early_res[j].end; j++) + ; + + memmove(&early_res[i], &early_res[i + 1], + (j - 1 - i) * sizeof(struct early_res)); + + early_res[j - 1].end = 0; +} + +/* + * Split any existing ranges that: + * 1) are marked 'overlap_ok', and + * 2) overlap with the stated range [start, end) + * into whatever portion (if any) of the existing range is entirely + * below or entirely above the stated range. Drop the portion + * of the existing range that overlaps with the stated range, + * which will allow the caller of this routine to then add that + * stated range without conflicting with any existing range. + */ +static void __init drop_overlaps_that_are_ok(u64 start, u64 end) +{ + int i; + struct early_res *r; + u64 lower_start, lower_end; + u64 upper_start, upper_end; + char name[16]; + + for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { + r = &early_res[i]; + + /* Continue past non-overlapping ranges */ + if (end <= r->start || start >= r->end) + continue; + + /* + * Leave non-ok overlaps as is; let caller + * panic "Overlapping early reservations" + * when it hits this overlap. + */ + if (!r->overlap_ok) + return; + + /* + * We have an ok overlap. We will drop it from the early + * reservation map, and add back in any non-overlapping + * portions (lower or upper) as separate, overlap_ok, + * non-overlapping ranges. + */ + + /* 1. Note any non-overlapping (lower or upper) ranges. */ + strncpy(name, r->name, sizeof(name) - 1); + + lower_start = lower_end = 0; + upper_start = upper_end = 0; + if (r->start < start) { + lower_start = r->start; + lower_end = start; + } + if (r->end > end) { + upper_start = end; + upper_end = r->end; + } + + /* 2. Drop the original ok overlapping range */ + drop_range(i); + + i--; /* resume for-loop on copied down entry */ + + /* 3. Add back in any non-overlapping ranges. */ + if (lower_end) + reserve_early_overlap_ok(lower_start, lower_end, name); + if (upper_end) + reserve_early_overlap_ok(upper_start, upper_end, name); + } +} + +static void __init __reserve_early(u64 start, u64 end, char *name, + int overlap_ok) +{ + int i; + struct early_res *r; + + i = find_overlapped_early(start, end); + if (i >= MAX_EARLY_RES) + panic("Too many early reservations"); + r = &early_res[i]; + if (r->end) + panic("Overlapping early reservations " + "%llx-%llx %s to %llx-%llx %s\n", + start, end - 1, name?name:"", r->start, + r->end - 1, r->name); + r->start = start; + r->end = end; + r->overlap_ok = overlap_ok; + if (name) + strncpy(r->name, name, sizeof(r->name) - 1); +} + +/* + * A few early reservtations come here. + * + * The 'overlap_ok' in the name of this routine does -not- mean it + * is ok for these reservations to overlap an earlier reservation. + * Rather it means that it is ok for subsequent reservations to + * overlap this one. + * + * Use this entry point to reserve early ranges when you are doing + * so out of "Paranoia", reserving perhaps more memory than you need, + * just in case, and don't mind a subsequent overlapping reservation + * that is known to be needed. + * + * The drop_overlaps_that_are_ok() call here isn't really needed. + * It would be needed if we had two colliding 'overlap_ok' + * reservations, so that the second such would not panic on the + * overlap with the first. We don't have any such as of this + * writing, but might as well tolerate such if it happens in + * the future. + */ +void __init reserve_early_overlap_ok(u64 start, u64 end, char *name) +{ + drop_overlaps_that_are_ok(start, end); + __reserve_early(start, end, name, 1); +} + +/* + * Most early reservations come here. + * + * We first have drop_overlaps_that_are_ok() drop any pre-existing + * 'overlap_ok' ranges, so that we can then reserve this memory + * range without risk of panic'ing on an overlapping overlap_ok + * early reservation. + */ +void __init reserve_early(u64 start, u64 end, char *name) +{ + drop_overlaps_that_are_ok(start, end); + __reserve_early(start, end, name, 0); +} + +void __init free_early(u64 start, u64 end) +{ + struct early_res *r; + int i; + + i = find_overlapped_early(start, end); + r = &early_res[i]; + if (i >= MAX_EARLY_RES || r->end != end || r->start != start) + panic("free_early on not reserved area: %llx-%llx!", + start, end - 1); + + drop_range(i); +} + +void __init early_res_to_bootmem(u64 start, u64 end) +{ + int i, count; + u64 final_start, final_end; + + count = 0; + for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) + count++; + + printk(KERN_INFO "(%d early reservations) ==> bootmem [%010llx - %010llx]\n", + count, start, end); + for (i = 0; i < count; i++) { + struct early_res *r = &early_res[i]; + printk(KERN_INFO " #%d [%010llx - %010llx] %16s", i, + r->start, r->end, r->name); + final_start = max(start, r->start); + final_end = min(end, r->end); + if (final_start >= final_end) { + printk(KERN_CONT "\n"); + continue; + } + printk(KERN_CONT " ==> [%010llx - %010llx]\n", + final_start, final_end); + reserve_bootmem_generic(final_start, final_end - final_start, + BOOTMEM_DEFAULT); + } +} + +/* Check for already reserved areas */ +static inline int __init bad_addr(u64 *addrp, u64 size, u64 align) +{ + int i; + u64 addr = *addrp; + int changed = 0; + struct early_res *r; +again: + i = find_overlapped_early(addr, addr + size); + r = &early_res[i]; + if (i < MAX_EARLY_RES && r->end) { + *addrp = addr = round_up(r->end, align); + changed = 1; + goto again; + } + return changed; +} + +/* Check for already reserved areas */ +static inline int __init bad_addr_size(u64 *addrp, u64 *sizep, u64 align) +{ + int i; + u64 addr = *addrp, last; + u64 size = *sizep; + int changed = 0; +again: + last = addr + size; + for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { + struct early_res *r = &early_res[i]; + if (last > r->start && addr < r->start) { + size = r->start - addr; + changed = 1; + goto again; + } + if (last > r->end && addr < r->end) { + addr = round_up(r->end, align); + size = last - addr; + changed = 1; + goto again; + } + if (last <= r->end && addr >= r->start) { + (*sizep)++; + return 0; + } + } + if (changed) { + *addrp = addr; + *sizep = size; + } + return changed; +} + +/* + * Find a free area with specified alignment in a specific range. + */ +u64 __init find_e820_area(u64 start, u64 end, u64 size, u64 align) +{ + int i; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + u64 addr, last; + u64 ei_last; + + if (ei->type != E820_RAM) + continue; + addr = round_up(ei->addr, align); + ei_last = ei->addr + ei->size; + if (addr < start) + addr = round_up(start, align); + if (addr >= ei_last) + continue; + while (bad_addr(&addr, size, align) && addr+size <= ei_last) + ; + last = addr + size; + if (last > ei_last) + continue; + if (last > end) + continue; + return addr; + } + return -1ULL; +} + +/* + * Find next free range after *start + */ +u64 __init find_e820_area_size(u64 start, u64 *sizep, u64 align) +{ + int i; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + u64 addr, last; + u64 ei_last; + + if (ei->type != E820_RAM) + continue; + addr = round_up(ei->addr, align); + ei_last = ei->addr + ei->size; + if (addr < start) + addr = round_up(start, align); + if (addr >= ei_last) + continue; + *sizep = ei_last - addr; + while (bad_addr_size(&addr, sizep, align) && + addr + *sizep <= ei_last) + ; + last = addr + *sizep; + if (last > ei_last) + continue; + return addr; + } + return -1UL; + +} + +/* + * pre allocated 4k and reserved it in e820 + */ +u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align) +{ + u64 size = 0; + u64 addr; + u64 start; + + start = startt; + while (size < sizet) + start = find_e820_area_size(start, &size, align); + + if (size < sizet) + return 0; + + addr = round_down(start + size - sizet, align); + e820_update_range(addr, sizet, E820_RAM, E820_RESERVED); + e820_update_range_saved(addr, sizet, E820_RAM, E820_RESERVED); + printk(KERN_INFO "update e820 for early_reserve_e820\n"); + update_e820(); + update_e820_saved(); + + return addr; +} + +#ifdef CONFIG_X86_32 +# ifdef CONFIG_X86_PAE +# define MAX_ARCH_PFN (1ULL<<(36-PAGE_SHIFT)) +# else +# define MAX_ARCH_PFN (1ULL<<(32-PAGE_SHIFT)) +# endif +#else /* CONFIG_X86_32 */ +# define MAX_ARCH_PFN MAXMEM>>PAGE_SHIFT +#endif + +/* + * Find the highest page frame number we have available + */ +static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type) +{ + int i; + unsigned long last_pfn = 0; + unsigned long max_arch_pfn = MAX_ARCH_PFN; + + for (i = 0; i < e820.nr_map; i++) { + struct e820entry *ei = &e820.map[i]; + unsigned long start_pfn; + unsigned long end_pfn; + + if (ei->type != type) + continue; + + start_pfn = ei->addr >> PAGE_SHIFT; + end_pfn = (ei->addr + ei->size) >> PAGE_SHIFT; + + if (start_pfn >= limit_pfn) + continue; + if (end_pfn > limit_pfn) { + last_pfn = limit_pfn; + break; + } + if (end_pfn > last_pfn) + last_pfn = end_pfn; + } + + if (last_pfn > max_arch_pfn) + last_pfn = max_arch_pfn; + + printk(KERN_INFO "last_pfn = %#lx max_arch_pfn = %#lx\n", + last_pfn, max_arch_pfn); + return last_pfn; +} +unsigned long __init e820_end_of_ram_pfn(void) +{ + return e820_end_pfn(MAX_ARCH_PFN, E820_RAM); +} + +unsigned long __init e820_end_of_low_ram_pfn(void) +{ + return e820_end_pfn(1UL<<(32 - PAGE_SHIFT), E820_RAM); +} +/* + * Finds an active region in the address range from start_pfn to last_pfn and + * returns its range in ei_startpfn and ei_endpfn for the e820 entry. + */ +int __init e820_find_active_region(const struct e820entry *ei, + unsigned long start_pfn, + unsigned long last_pfn, + unsigned long *ei_startpfn, + unsigned long *ei_endpfn) +{ + u64 align = PAGE_SIZE; + + *ei_startpfn = round_up(ei->addr, align) >> PAGE_SHIFT; + *ei_endpfn = round_down(ei->addr + ei->size, align) >> PAGE_SHIFT; + + /* Skip map entries smaller than a page */ + if (*ei_startpfn >= *ei_endpfn) + return 0; + + /* Skip if map is outside the node */ + if (ei->type != E820_RAM || *ei_endpfn <= start_pfn || + *ei_startpfn >= last_pfn) + return 0; + + /* Check for overlaps */ + if (*ei_startpfn < start_pfn) + *ei_startpfn = start_pfn; + if (*ei_endpfn > last_pfn) + *ei_endpfn = last_pfn; + + return 1; +} + +/* Walk the e820 map and register active regions within a node */ +void __init e820_register_active_regions(int nid, unsigned long start_pfn, + unsigned long last_pfn) +{ + unsigned long ei_startpfn; + unsigned long ei_endpfn; + int i; + + for (i = 0; i < e820.nr_map; i++) + if (e820_find_active_region(&e820.map[i], + start_pfn, last_pfn, + &ei_startpfn, &ei_endpfn)) + add_active_range(nid, ei_startpfn, ei_endpfn); +} + +/* + * Find the hole size (in bytes) in the memory range. + * @start: starting address of the memory range to scan + * @end: ending address of the memory range to scan + */ +u64 __init e820_hole_size(u64 start, u64 end) +{ + unsigned long start_pfn = start >> PAGE_SHIFT; + unsigned long last_pfn = end >> PAGE_SHIFT; + unsigned long ei_startpfn, ei_endpfn, ram = 0; + int i; + + for (i = 0; i < e820.nr_map; i++) { + if (e820_find_active_region(&e820.map[i], + start_pfn, last_pfn, + &ei_startpfn, &ei_endpfn)) + ram += ei_endpfn - ei_startpfn; + } + return end - start - ((u64)ram << PAGE_SHIFT); +} + +static void early_panic(char *msg) +{ + early_printk(msg); + panic(msg); +} + +static int userdef __initdata; + +/* "mem=nopentium" disables the 4MB page tables. */ +static int __init parse_memopt(char *p) +{ + u64 mem_size; + + if (!p) + return -EINVAL; + +#ifdef CONFIG_X86_32 + if (!strcmp(p, "nopentium")) { + setup_clear_cpu_cap(X86_FEATURE_PSE); + return 0; + } +#endif + + userdef = 1; + mem_size = memparse(p, &p); + e820_remove_range(mem_size, ULLONG_MAX - mem_size, E820_RAM, 1); + + return 0; +} +early_param("mem", parse_memopt); + +static int __init parse_memmap_opt(char *p) +{ + char *oldp; + u64 start_at, mem_size; + + if (!p) + return -EINVAL; + + if (!strcmp(p, "exactmap")) { +#ifdef CONFIG_CRASH_DUMP + /* + * If we are doing a crash dump, we still need to know + * the real mem size before original memory map is + * reset. + */ + saved_max_pfn = e820_end_of_ram_pfn(); +#endif + e820.nr_map = 0; + userdef = 1; + return 0; + } + + oldp = p; + mem_size = memparse(p, &p); + if (p == oldp) + return -EINVAL; + + userdef = 1; + if (*p == '@') { + start_at = memparse(p+1, &p); + e820_add_region(start_at, mem_size, E820_RAM); + } else if (*p == '#') { + start_at = memparse(p+1, &p); + e820_add_region(start_at, mem_size, E820_ACPI); + } else if (*p == '$') { + start_at = memparse(p+1, &p); + e820_add_region(start_at, mem_size, E820_RESERVED); + } else + e820_remove_range(mem_size, ULLONG_MAX - mem_size, E820_RAM, 1); + + return *p == '\0' ? 0 : -EINVAL; +} +early_param("memmap", parse_memmap_opt); + +void __init finish_e820_parsing(void) +{ + if (userdef) { + int nr = e820.nr_map; + + if (sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &nr) < 0) + early_panic("Invalid user supplied memory map"); + e820.nr_map = nr; + + printk(KERN_INFO "user-defined physical RAM map:\n"); + e820_print_map("user"); + } +} + +static inline const char *e820_type_to_string(int e820_type) +{ + switch (e820_type) { + case E820_RESERVED_KERN: + case E820_RAM: return "System RAM"; + case E820_ACPI: return "ACPI Tables"; + case E820_NVS: return "ACPI Non-volatile Storage"; + default: return "reserved"; + } +} + +/* + * Mark e820 reserved areas as busy for the resource manager. + */ +void __init e820_reserve_resources(void) +{ + int i; + struct resource *res; + u64 end; + + res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map); + for (i = 0; i < e820.nr_map; i++) { + end = e820.map[i].addr + e820.map[i].size - 1; +#ifndef CONFIG_RESOURCES_64BIT + if (end > 0x100000000ULL) { + res++; + continue; + } +#endif + res->name = e820_type_to_string(e820.map[i].type); + res->start = e820.map[i].addr; + res->end = end; + + res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; + insert_resource(&iomem_resource, res); + res++; + } + + for (i = 0; i < e820_saved.nr_map; i++) { + struct e820entry *entry = &e820_saved.map[i]; + firmware_map_add_early(entry->addr, + entry->addr + entry->size - 1, + e820_type_to_string(entry->type)); + } +} + +char *__init default_machine_specific_memory_setup(void) +{ + char *who = "BIOS-e820"; + int new_nr; + /* + * Try to copy the BIOS-supplied E820-map. + * + * Otherwise fake a memory map; one section from 0k->640k, + * the next section from 1mb->appropriate_mem_k + */ + new_nr = boot_params.e820_entries; + sanitize_e820_map(boot_params.e820_map, + ARRAY_SIZE(boot_params.e820_map), + &new_nr); + boot_params.e820_entries = new_nr; + if (append_e820_map(boot_params.e820_map, boot_params.e820_entries) + < 0) { + u64 mem_size; + + /* compare results from other methods and take the greater */ + if (boot_params.alt_mem_k + < boot_params.screen_info.ext_mem_k) { + mem_size = boot_params.screen_info.ext_mem_k; + who = "BIOS-88"; + } else { + mem_size = boot_params.alt_mem_k; + who = "BIOS-e801"; + } + + e820.nr_map = 0; + e820_add_region(0, LOWMEMSIZE(), E820_RAM); + e820_add_region(HIGH_MEMORY, mem_size << 10, E820_RAM); + } + + /* In case someone cares... */ + return who; +} + +char *__init __attribute__((weak)) machine_specific_memory_setup(void) +{ + if (x86_quirks->arch_memory_setup) { + char *who = x86_quirks->arch_memory_setup(); + + if (who) + return who; + } + return default_machine_specific_memory_setup(); +} + +/* Overridden in paravirt.c if CONFIG_PARAVIRT */ +char * __init __attribute__((weak)) memory_setup(void) +{ + return machine_specific_memory_setup(); +} + +void __init setup_memory_map(void) +{ + char *who; + + who = memory_setup(); + memcpy(&e820_saved, &e820, sizeof(struct e820map)); + printk(KERN_INFO "BIOS-provided physical RAM map:\n"); + e820_print_map(who); +} diff --git a/arch/x86/kernel/e820_32.c b/arch/x86/kernel/e820_32.c deleted file mode 100644 index ed733e7cf4e611c454f9ea622c9322919aa624b4..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/e820_32.c +++ /dev/null @@ -1,775 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -struct e820map e820; -struct change_member { - struct e820entry *pbios; /* pointer to original bios entry */ - unsigned long long addr; /* address for this change point */ -}; -static struct change_member change_point_list[2*E820MAX] __initdata; -static struct change_member *change_point[2*E820MAX] __initdata; -static struct e820entry *overlap_list[E820MAX] __initdata; -static struct e820entry new_bios[E820MAX] __initdata; -/* For PCI or other memory-mapped resources */ -unsigned long pci_mem_start = 0x10000000; -#ifdef CONFIG_PCI -EXPORT_SYMBOL(pci_mem_start); -#endif -extern int user_defined_memmap; - -static struct resource system_rom_resource = { - .name = "System ROM", - .start = 0xf0000, - .end = 0xfffff, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}; - -static struct resource extension_rom_resource = { - .name = "Extension ROM", - .start = 0xe0000, - .end = 0xeffff, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}; - -static struct resource adapter_rom_resources[] = { { - .name = "Adapter ROM", - .start = 0xc8000, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}, { - .name = "Adapter ROM", - .start = 0, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}, { - .name = "Adapter ROM", - .start = 0, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}, { - .name = "Adapter ROM", - .start = 0, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}, { - .name = "Adapter ROM", - .start = 0, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}, { - .name = "Adapter ROM", - .start = 0, - .end = 0, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -} }; - -static struct resource video_rom_resource = { - .name = "Video ROM", - .start = 0xc0000, - .end = 0xc7fff, - .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM -}; - -#define ROMSIGNATURE 0xaa55 - -static int __init romsignature(const unsigned char *rom) -{ - const unsigned short * const ptr = (const unsigned short *)rom; - unsigned short sig; - - return probe_kernel_address(ptr, sig) == 0 && sig == ROMSIGNATURE; -} - -static int __init romchecksum(const unsigned char *rom, unsigned long length) -{ - unsigned char sum, c; - - for (sum = 0; length && probe_kernel_address(rom++, c) == 0; length--) - sum += c; - return !length && !sum; -} - -static void __init probe_roms(void) -{ - const unsigned char *rom; - unsigned long start, length, upper; - unsigned char c; - int i; - - /* video rom */ - upper = adapter_rom_resources[0].start; - for (start = video_rom_resource.start; start < upper; start += 2048) { - rom = isa_bus_to_virt(start); - if (!romsignature(rom)) - continue; - - video_rom_resource.start = start; - - if (probe_kernel_address(rom + 2, c) != 0) - continue; - - /* 0 < length <= 0x7f * 512, historically */ - length = c * 512; - - /* if checksum okay, trust length byte */ - if (length && romchecksum(rom, length)) - video_rom_resource.end = start + length - 1; - - request_resource(&iomem_resource, &video_rom_resource); - break; - } - - start = (video_rom_resource.end + 1 + 2047) & ~2047UL; - if (start < upper) - start = upper; - - /* system rom */ - request_resource(&iomem_resource, &system_rom_resource); - upper = system_rom_resource.start; - - /* check for extension rom (ignore length byte!) */ - rom = isa_bus_to_virt(extension_rom_resource.start); - if (romsignature(rom)) { - length = extension_rom_resource.end - extension_rom_resource.start + 1; - if (romchecksum(rom, length)) { - request_resource(&iomem_resource, &extension_rom_resource); - upper = extension_rom_resource.start; - } - } - - /* check for adapter roms on 2k boundaries */ - for (i = 0; i < ARRAY_SIZE(adapter_rom_resources) && start < upper; start += 2048) { - rom = isa_bus_to_virt(start); - if (!romsignature(rom)) - continue; - - if (probe_kernel_address(rom + 2, c) != 0) - continue; - - /* 0 < length <= 0x7f * 512, historically */ - length = c * 512; - - /* but accept any length that fits if checksum okay */ - if (!length || start + length > upper || !romchecksum(rom, length)) - continue; - - adapter_rom_resources[i].start = start; - adapter_rom_resources[i].end = start + length - 1; - request_resource(&iomem_resource, &adapter_rom_resources[i]); - - start = adapter_rom_resources[i++].end & ~2047UL; - } -} - -/* - * Request address space for all standard RAM and ROM resources - * and also for regions reported as reserved by the e820. - */ -void __init init_iomem_resources(struct resource *code_resource, - struct resource *data_resource, - struct resource *bss_resource) -{ - int i; - - probe_roms(); - for (i = 0; i < e820.nr_map; i++) { - struct resource *res; -#ifndef CONFIG_RESOURCES_64BIT - if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL) - continue; -#endif - res = kzalloc(sizeof(struct resource), GFP_ATOMIC); - switch (e820.map[i].type) { - case E820_RAM: res->name = "System RAM"; break; - case E820_ACPI: res->name = "ACPI Tables"; break; - case E820_NVS: res->name = "ACPI Non-volatile Storage"; break; - default: res->name = "reserved"; - } - res->start = e820.map[i].addr; - res->end = res->start + e820.map[i].size - 1; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; - if (request_resource(&iomem_resource, res)) { - kfree(res); - continue; - } - if (e820.map[i].type == E820_RAM) { - /* - * We don't know which RAM region contains kernel data, - * so we try it repeatedly and let the resource manager - * test it. - */ - request_resource(res, code_resource); - request_resource(res, data_resource); - request_resource(res, bss_resource); -#ifdef CONFIG_KEXEC - if (crashk_res.start != crashk_res.end) - request_resource(res, &crashk_res); -#endif - } - } -} - -#if defined(CONFIG_PM) && defined(CONFIG_HIBERNATION) -/** - * e820_mark_nosave_regions - Find the ranges of physical addresses that do not - * correspond to e820 RAM areas and mark the corresponding pages as nosave for - * hibernation. - * - * This function requires the e820 map to be sorted and without any - * overlapping entries and assumes the first e820 area to be RAM. - */ -void __init e820_mark_nosave_regions(void) -{ - int i; - unsigned long pfn; - - pfn = PFN_DOWN(e820.map[0].addr + e820.map[0].size); - for (i = 1; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - - if (pfn < PFN_UP(ei->addr)) - register_nosave_region(pfn, PFN_UP(ei->addr)); - - pfn = PFN_DOWN(ei->addr + ei->size); - if (ei->type != E820_RAM) - register_nosave_region(PFN_UP(ei->addr), pfn); - - if (pfn >= max_low_pfn) - break; - } -} -#endif - -void __init add_memory_region(unsigned long long start, - unsigned long long size, int type) -{ - int x; - - x = e820.nr_map; - - if (x == E820MAX) { - printk(KERN_ERR "Ooops! Too many entries in the memory map!\n"); - return; - } - - e820.map[x].addr = start; - e820.map[x].size = size; - e820.map[x].type = type; - e820.nr_map++; -} /* add_memory_region */ - -/* - * Sanitize the BIOS e820 map. - * - * Some e820 responses include overlapping entries. The following - * replaces the original e820 map with a new one, removing overlaps. - * - */ -int __init sanitize_e820_map(struct e820entry * biosmap, char * pnr_map) -{ - struct change_member *change_tmp; - unsigned long current_type, last_type; - unsigned long long last_addr; - int chgidx, still_changing; - int overlap_entries; - int new_bios_entry; - int old_nr, new_nr, chg_nr; - int i; - - /* - Visually we're performing the following (1,2,3,4 = memory types)... - - Sample memory map (w/overlaps): - ____22__________________ - ______________________4_ - ____1111________________ - _44_____________________ - 11111111________________ - ____________________33__ - ___________44___________ - __________33333_________ - ______________22________ - ___________________2222_ - _________111111111______ - _____________________11_ - _________________4______ - - Sanitized equivalent (no overlap): - 1_______________________ - _44_____________________ - ___1____________________ - ____22__________________ - ______11________________ - _________1______________ - __________3_____________ - ___________44___________ - _____________33_________ - _______________2________ - ________________1_______ - _________________4______ - ___________________2____ - ____________________33__ - ______________________4_ - */ - /* if there's only one memory region, don't bother */ - if (*pnr_map < 2) { - return -1; - } - - old_nr = *pnr_map; - - /* bail out if we find any unreasonable addresses in bios map */ - for (i=0; iaddr = biosmap[i].addr; - change_point[chgidx++]->pbios = &biosmap[i]; - change_point[chgidx]->addr = biosmap[i].addr + biosmap[i].size; - change_point[chgidx++]->pbios = &biosmap[i]; - } - } - chg_nr = chgidx; /* true number of change-points */ - - /* sort change-point list by memory addresses (low -> high) */ - still_changing = 1; - while (still_changing) { - still_changing = 0; - for (i=1; i < chg_nr; i++) { - /* if > , swap */ - /* or, if current= & last=, swap */ - if ((change_point[i]->addr < change_point[i-1]->addr) || - ((change_point[i]->addr == change_point[i-1]->addr) && - (change_point[i]->addr == change_point[i]->pbios->addr) && - (change_point[i-1]->addr != change_point[i-1]->pbios->addr)) - ) - { - change_tmp = change_point[i]; - change_point[i] = change_point[i-1]; - change_point[i-1] = change_tmp; - still_changing=1; - } - } - } - - /* create a new bios memory map, removing overlaps */ - overlap_entries=0; /* number of entries in the overlap table */ - new_bios_entry=0; /* index for creating new bios map entries */ - last_type = 0; /* start with undefined memory type */ - last_addr = 0; /* start with 0 as last starting address */ - /* loop through change-points, determining affect on the new bios map */ - for (chgidx=0; chgidx < chg_nr; chgidx++) - { - /* keep track of all overlapping bios entries */ - if (change_point[chgidx]->addr == change_point[chgidx]->pbios->addr) - { - /* add map entry to overlap list (> 1 entry implies an overlap) */ - overlap_list[overlap_entries++]=change_point[chgidx]->pbios; - } - else - { - /* remove entry from list (order independent, so swap with last) */ - for (i=0; ipbios) - overlap_list[i] = overlap_list[overlap_entries-1]; - } - overlap_entries--; - } - /* if there are overlapping entries, decide which "type" to use */ - /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */ - current_type = 0; - for (i=0; itype > current_type) - current_type = overlap_list[i]->type; - /* continue building up new bios map based on this information */ - if (current_type != last_type) { - if (last_type != 0) { - new_bios[new_bios_entry].size = - change_point[chgidx]->addr - last_addr; - /* move forward only if the new size was non-zero */ - if (new_bios[new_bios_entry].size != 0) - if (++new_bios_entry >= E820MAX) - break; /* no more space left for new bios entries */ - } - if (current_type != 0) { - new_bios[new_bios_entry].addr = change_point[chgidx]->addr; - new_bios[new_bios_entry].type = current_type; - last_addr=change_point[chgidx]->addr; - } - last_type = current_type; - } - } - new_nr = new_bios_entry; /* retain count for new bios entries */ - - /* copy new bios mapping into original location */ - memcpy(biosmap, new_bios, new_nr*sizeof(struct e820entry)); - *pnr_map = new_nr; - - return 0; -} - -/* - * Copy the BIOS e820 map into a safe place. - * - * Sanity-check it while we're at it.. - * - * If we're lucky and live on a modern system, the setup code - * will have given us a memory map that we can use to properly - * set up memory. If we aren't, we'll fake a memory map. - * - * We check to see that the memory map contains at least 2 elements - * before we'll use it, because the detection code in setup.S may - * not be perfect and most every PC known to man has two memory - * regions: one from 0 to 640k, and one from 1mb up. (The IBM - * thinkpad 560x, for example, does not cooperate with the memory - * detection code.) - */ -int __init copy_e820_map(struct e820entry *biosmap, int nr_map) -{ - /* Only one memory region (or negative)? Ignore it */ - if (nr_map < 2) - return -1; - - do { - u64 start = biosmap->addr; - u64 size = biosmap->size; - u64 end = start + size; - u32 type = biosmap->type; - - /* Overflow in 64 bits? Ignore the memory map. */ - if (start > end) - return -1; - - add_memory_region(start, size, type); - } while (biosmap++, --nr_map); - - return 0; -} - -/* - * Find the highest page frame number we have available - */ -void __init propagate_e820_map(void) -{ - int i; - - max_pfn = 0; - - for (i = 0; i < e820.nr_map; i++) { - unsigned long start, end; - /* RAM? */ - if (e820.map[i].type != E820_RAM) - continue; - start = PFN_UP(e820.map[i].addr); - end = PFN_DOWN(e820.map[i].addr + e820.map[i].size); - if (start >= end) - continue; - if (end > max_pfn) - max_pfn = end; - memory_present(0, start, end); - } -} - -/* - * Register fully available low RAM pages with the bootmem allocator. - */ -void __init register_bootmem_low_pages(unsigned long max_low_pfn) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - unsigned long curr_pfn, last_pfn, size; - /* - * Reserve usable low memory - */ - if (e820.map[i].type != E820_RAM) - continue; - /* - * We are rounding up the start address of usable memory: - */ - curr_pfn = PFN_UP(e820.map[i].addr); - if (curr_pfn >= max_low_pfn) - continue; - /* - * ... and at the end of the usable range downwards: - */ - last_pfn = PFN_DOWN(e820.map[i].addr + e820.map[i].size); - - if (last_pfn > max_low_pfn) - last_pfn = max_low_pfn; - - /* - * .. finally, did all the rounding and playing - * around just make the area go away? - */ - if (last_pfn <= curr_pfn) - continue; - - size = last_pfn - curr_pfn; - free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size)); - } -} - -void __init e820_register_memory(void) -{ - unsigned long gapstart, gapsize, round; - unsigned long long last; - int i; - - /* - * Search for the biggest gap in the low 32 bits of the e820 - * memory space. - */ - last = 0x100000000ull; - gapstart = 0x10000000; - gapsize = 0x400000; - i = e820.nr_map; - while (--i >= 0) { - unsigned long long start = e820.map[i].addr; - unsigned long long end = start + e820.map[i].size; - - /* - * Since "last" is at most 4GB, we know we'll - * fit in 32 bits if this condition is true - */ - if (last > end) { - unsigned long gap = last - end; - - if (gap > gapsize) { - gapsize = gap; - gapstart = end; - } - } - if (start < last) - last = start; - } - - /* - * See how much we want to round up: start off with - * rounding to the next 1MB area. - */ - round = 0x100000; - while ((gapsize >> 4) > round) - round += round; - /* Fun with two's complement */ - pci_mem_start = (gapstart + round) & -round; - - printk("Allocating PCI resources starting at %08lx (gap: %08lx:%08lx)\n", - pci_mem_start, gapstart, gapsize); -} - -void __init print_memory_map(char *who) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - printk(" %s: %016Lx - %016Lx ", who, - e820.map[i].addr, - e820.map[i].addr + e820.map[i].size); - switch (e820.map[i].type) { - case E820_RAM: printk("(usable)\n"); - break; - case E820_RESERVED: - printk("(reserved)\n"); - break; - case E820_ACPI: - printk("(ACPI data)\n"); - break; - case E820_NVS: - printk("(ACPI NVS)\n"); - break; - default: printk("type %u\n", e820.map[i].type); - break; - } - } -} - -void __init limit_regions(unsigned long long size) -{ - unsigned long long current_addr; - int i; - - print_memory_map("limit_regions start"); - for (i = 0; i < e820.nr_map; i++) { - current_addr = e820.map[i].addr + e820.map[i].size; - if (current_addr < size) - continue; - - if (e820.map[i].type != E820_RAM) - continue; - - if (e820.map[i].addr >= size) { - /* - * This region starts past the end of the - * requested size, skip it completely. - */ - e820.nr_map = i; - } else { - e820.nr_map = i + 1; - e820.map[i].size -= current_addr - size; - } - print_memory_map("limit_regions endfor"); - return; - } - print_memory_map("limit_regions endfunc"); -} - -/* - * This function checks if any part of the range is mapped - * with type. - */ -int -e820_any_mapped(u64 start, u64 end, unsigned type) -{ - int i; - for (i = 0; i < e820.nr_map; i++) { - const struct e820entry *ei = &e820.map[i]; - if (type && ei->type != type) - continue; - if (ei->addr >= end || ei->addr + ei->size <= start) - continue; - return 1; - } - return 0; -} -EXPORT_SYMBOL_GPL(e820_any_mapped); - - /* - * This function checks if the entire range is mapped with type. - * - * Note: this function only works correct if the e820 table is sorted and - * not-overlapping, which is the case - */ -int __init -e820_all_mapped(unsigned long s, unsigned long e, unsigned type) -{ - u64 start = s; - u64 end = e; - int i; - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - if (type && ei->type != type) - continue; - /* is the region (part) in overlap with the current region ?*/ - if (ei->addr >= end || ei->addr + ei->size <= start) - continue; - /* if the region is at the beginning of we move - * start to the end of the region since it's ok until there - */ - if (ei->addr <= start) - start = ei->addr + ei->size; - /* if start is now at or beyond end, we're done, full - * coverage */ - if (start >= end) - return 1; /* we're done */ - } - return 0; -} - -static int __init parse_memmap(char *arg) -{ - if (!arg) - return -EINVAL; - - if (strcmp(arg, "exactmap") == 0) { -#ifdef CONFIG_CRASH_DUMP - /* If we are doing a crash dump, we - * still need to know the real mem - * size before original memory map is - * reset. - */ - propagate_e820_map(); - saved_max_pfn = max_pfn; -#endif - e820.nr_map = 0; - user_defined_memmap = 1; - } else { - /* If the user specifies memory size, we - * limit the BIOS-provided memory map to - * that size. exactmap can be used to specify - * the exact map. mem=number can be used to - * trim the existing memory map. - */ - unsigned long long start_at, mem_size; - - mem_size = memparse(arg, &arg); - if (*arg == '@') { - start_at = memparse(arg+1, &arg); - add_memory_region(start_at, mem_size, E820_RAM); - } else if (*arg == '#') { - start_at = memparse(arg+1, &arg); - add_memory_region(start_at, mem_size, E820_ACPI); - } else if (*arg == '$') { - start_at = memparse(arg+1, &arg); - add_memory_region(start_at, mem_size, E820_RESERVED); - } else { - limit_regions(mem_size); - user_defined_memmap = 1; - } - } - return 0; -} -early_param("memmap", parse_memmap); -void __init update_memory_range(u64 start, u64 size, unsigned old_type, - unsigned new_type) -{ - int i; - - BUG_ON(old_type == new_type); - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - u64 final_start, final_end; - if (ei->type != old_type) - continue; - /* totally covered? */ - if (ei->addr >= start && ei->size <= size) { - ei->type = new_type; - continue; - } - /* partially covered */ - final_start = max(start, ei->addr); - final_end = min(start + size, ei->addr + ei->size); - if (final_start >= final_end) - continue; - add_memory_region(final_start, final_end - final_start, - new_type); - } -} -void __init update_e820(void) -{ - u8 nr_map; - - nr_map = e820.nr_map; - if (sanitize_e820_map(e820.map, &nr_map)) - return; - e820.nr_map = nr_map; - printk(KERN_INFO "modified physical RAM map:\n"); - print_memory_map("modified"); -} diff --git a/arch/x86/kernel/e820_64.c b/arch/x86/kernel/e820_64.c deleted file mode 100644 index 124480c0008dd2a5e348cd2db7b928ff13d3aa41..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/e820_64.c +++ /dev/null @@ -1,952 +0,0 @@ -/* - * Handle the memory map. - * The functions here do the job until bootmem takes over. - * - * Getting sanitize_e820_map() in sync with i386 version by applying change: - * - Provisions for empty E820 memory regions (reported by certain BIOSes). - * Alex Achenbach , December 2002. - * Venkatesh Pallipadi - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -struct e820map e820; - -/* - * PFN of last memory page. - */ -unsigned long end_pfn; - -/* - * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries. - * The direct mapping extends to max_pfn_mapped, so that we can directly access - * apertures, ACPI and other tables without having to play with fixmaps. - */ -unsigned long max_pfn_mapped; - -/* - * Last pfn which the user wants to use. - */ -static unsigned long __initdata end_user_pfn = MAXMEM>>PAGE_SHIFT; - -/* - * Early reserved memory areas. - */ -#define MAX_EARLY_RES 20 - -struct early_res { - unsigned long start, end; - char name[16]; -}; -static struct early_res early_res[MAX_EARLY_RES] __initdata = { - { 0, PAGE_SIZE, "BIOS data page" }, /* BIOS data page */ -#ifdef CONFIG_X86_TRAMPOLINE - { TRAMPOLINE_BASE, TRAMPOLINE_BASE + 2 * PAGE_SIZE, "TRAMPOLINE" }, -#endif - {} -}; - -void __init reserve_early(unsigned long start, unsigned long end, char *name) -{ - int i; - struct early_res *r; - for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { - r = &early_res[i]; - if (end > r->start && start < r->end) - panic("Overlapping early reservations %lx-%lx %s to %lx-%lx %s\n", - start, end - 1, name?name:"", r->start, r->end - 1, r->name); - } - if (i >= MAX_EARLY_RES) - panic("Too many early reservations"); - r = &early_res[i]; - r->start = start; - r->end = end; - if (name) - strncpy(r->name, name, sizeof(r->name) - 1); -} - -void __init free_early(unsigned long start, unsigned long end) -{ - struct early_res *r; - int i, j; - - for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { - r = &early_res[i]; - if (start == r->start && end == r->end) - break; - } - if (i >= MAX_EARLY_RES || !early_res[i].end) - panic("free_early on not reserved area: %lx-%lx!", start, end); - - for (j = i + 1; j < MAX_EARLY_RES && early_res[j].end; j++) - ; - - memmove(&early_res[i], &early_res[i + 1], - (j - 1 - i) * sizeof(struct early_res)); - - early_res[j - 1].end = 0; -} - -void __init early_res_to_bootmem(unsigned long start, unsigned long end) -{ - int i; - unsigned long final_start, final_end; - for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { - struct early_res *r = &early_res[i]; - final_start = max(start, r->start); - final_end = min(end, r->end); - if (final_start >= final_end) - continue; - printk(KERN_INFO " early res: %d [%lx-%lx] %s\n", i, - final_start, final_end - 1, r->name); - reserve_bootmem_generic(final_start, final_end - final_start); - } -} - -/* Check for already reserved areas */ -static inline int __init -bad_addr(unsigned long *addrp, unsigned long size, unsigned long align) -{ - int i; - unsigned long addr = *addrp, last; - int changed = 0; -again: - last = addr + size; - for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { - struct early_res *r = &early_res[i]; - if (last >= r->start && addr < r->end) { - *addrp = addr = round_up(r->end, align); - changed = 1; - goto again; - } - } - return changed; -} - -/* Check for already reserved areas */ -static inline int __init -bad_addr_size(unsigned long *addrp, unsigned long *sizep, unsigned long align) -{ - int i; - unsigned long addr = *addrp, last; - unsigned long size = *sizep; - int changed = 0; -again: - last = addr + size; - for (i = 0; i < MAX_EARLY_RES && early_res[i].end; i++) { - struct early_res *r = &early_res[i]; - if (last > r->start && addr < r->start) { - size = r->start - addr; - changed = 1; - goto again; - } - if (last > r->end && addr < r->end) { - addr = round_up(r->end, align); - size = last - addr; - changed = 1; - goto again; - } - if (last <= r->end && addr >= r->start) { - (*sizep)++; - return 0; - } - } - if (changed) { - *addrp = addr; - *sizep = size; - } - return changed; -} -/* - * This function checks if any part of the range is mapped - * with type. - */ -int -e820_any_mapped(unsigned long start, unsigned long end, unsigned type) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - - if (type && ei->type != type) - continue; - if (ei->addr >= end || ei->addr + ei->size <= start) - continue; - return 1; - } - return 0; -} -EXPORT_SYMBOL_GPL(e820_any_mapped); - -/* - * This function checks if the entire range is mapped with type. - * - * Note: this function only works correct if the e820 table is sorted and - * not-overlapping, which is the case - */ -int __init e820_all_mapped(unsigned long start, unsigned long end, - unsigned type) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - - if (type && ei->type != type) - continue; - /* is the region (part) in overlap with the current region ?*/ - if (ei->addr >= end || ei->addr + ei->size <= start) - continue; - - /* if the region is at the beginning of we move - * start to the end of the region since it's ok until there - */ - if (ei->addr <= start) - start = ei->addr + ei->size; - /* - * if start is now at or beyond end, we're done, full - * coverage - */ - if (start >= end) - return 1; - } - return 0; -} - -/* - * Find a free area with specified alignment in a specific range. - */ -unsigned long __init find_e820_area(unsigned long start, unsigned long end, - unsigned long size, unsigned long align) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - unsigned long addr, last; - unsigned long ei_last; - - if (ei->type != E820_RAM) - continue; - addr = round_up(ei->addr, align); - ei_last = ei->addr + ei->size; - if (addr < start) - addr = round_up(start, align); - if (addr >= ei_last) - continue; - while (bad_addr(&addr, size, align) && addr+size <= ei_last) - ; - last = addr + size; - if (last > ei_last) - continue; - if (last > end) - continue; - return addr; - } - return -1UL; -} - -/* - * Find next free range after *start - */ -unsigned long __init find_e820_area_size(unsigned long start, - unsigned long *sizep, - unsigned long align) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - unsigned long addr, last; - unsigned long ei_last; - - if (ei->type != E820_RAM) - continue; - addr = round_up(ei->addr, align); - ei_last = ei->addr + ei->size; - if (addr < start) - addr = round_up(start, align); - if (addr >= ei_last) - continue; - *sizep = ei_last - addr; - while (bad_addr_size(&addr, sizep, align) && - addr + *sizep <= ei_last) - ; - last = addr + *sizep; - if (last > ei_last) - continue; - return addr; - } - return -1UL; - -} -/* - * Find the highest page frame number we have available - */ -unsigned long __init e820_end_of_ram(void) -{ - unsigned long end_pfn; - - end_pfn = find_max_pfn_with_active_regions(); - - if (end_pfn > max_pfn_mapped) - max_pfn_mapped = end_pfn; - if (max_pfn_mapped > MAXMEM>>PAGE_SHIFT) - max_pfn_mapped = MAXMEM>>PAGE_SHIFT; - if (end_pfn > end_user_pfn) - end_pfn = end_user_pfn; - if (end_pfn > max_pfn_mapped) - end_pfn = max_pfn_mapped; - - printk(KERN_INFO "max_pfn_mapped = %lu\n", max_pfn_mapped); - return end_pfn; -} - -/* - * Mark e820 reserved areas as busy for the resource manager. - */ -void __init e820_reserve_resources(void) -{ - int i; - struct resource *res; - - res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map); - for (i = 0; i < e820.nr_map; i++) { - switch (e820.map[i].type) { - case E820_RAM: res->name = "System RAM"; break; - case E820_ACPI: res->name = "ACPI Tables"; break; - case E820_NVS: res->name = "ACPI Non-volatile Storage"; break; - default: res->name = "reserved"; - } - res->start = e820.map[i].addr; - res->end = res->start + e820.map[i].size - 1; - res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; - insert_resource(&iomem_resource, res); - res++; - } -} - -/* - * Find the ranges of physical addresses that do not correspond to - * e820 RAM areas and mark the corresponding pages as nosave for software - * suspend and suspend to RAM. - * - * This function requires the e820 map to be sorted and without any - * overlapping entries and assumes the first e820 area to be RAM. - */ -void __init e820_mark_nosave_regions(void) -{ - int i; - unsigned long paddr; - - paddr = round_down(e820.map[0].addr + e820.map[0].size, PAGE_SIZE); - for (i = 1; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - - if (paddr < ei->addr) - register_nosave_region(PFN_DOWN(paddr), - PFN_UP(ei->addr)); - - paddr = round_down(ei->addr + ei->size, PAGE_SIZE); - if (ei->type != E820_RAM) - register_nosave_region(PFN_UP(ei->addr), - PFN_DOWN(paddr)); - - if (paddr >= (end_pfn << PAGE_SHIFT)) - break; - } -} - -/* - * Finds an active region in the address range from start_pfn to end_pfn and - * returns its range in ei_startpfn and ei_endpfn for the e820 entry. - */ -static int __init e820_find_active_region(const struct e820entry *ei, - unsigned long start_pfn, - unsigned long end_pfn, - unsigned long *ei_startpfn, - unsigned long *ei_endpfn) -{ - *ei_startpfn = round_up(ei->addr, PAGE_SIZE) >> PAGE_SHIFT; - *ei_endpfn = round_down(ei->addr + ei->size, PAGE_SIZE) >> PAGE_SHIFT; - - /* Skip map entries smaller than a page */ - if (*ei_startpfn >= *ei_endpfn) - return 0; - - /* Check if max_pfn_mapped should be updated */ - if (ei->type != E820_RAM && *ei_endpfn > max_pfn_mapped) - max_pfn_mapped = *ei_endpfn; - - /* Skip if map is outside the node */ - if (ei->type != E820_RAM || *ei_endpfn <= start_pfn || - *ei_startpfn >= end_pfn) - return 0; - - /* Check for overlaps */ - if (*ei_startpfn < start_pfn) - *ei_startpfn = start_pfn; - if (*ei_endpfn > end_pfn) - *ei_endpfn = end_pfn; - - /* Obey end_user_pfn to save on memmap */ - if (*ei_startpfn >= end_user_pfn) - return 0; - if (*ei_endpfn > end_user_pfn) - *ei_endpfn = end_user_pfn; - - return 1; -} - -/* Walk the e820 map and register active regions within a node */ -void __init -e820_register_active_regions(int nid, unsigned long start_pfn, - unsigned long end_pfn) -{ - unsigned long ei_startpfn; - unsigned long ei_endpfn; - int i; - - for (i = 0; i < e820.nr_map; i++) - if (e820_find_active_region(&e820.map[i], - start_pfn, end_pfn, - &ei_startpfn, &ei_endpfn)) - add_active_range(nid, ei_startpfn, ei_endpfn); -} - -/* - * Add a memory region to the kernel e820 map. - */ -void __init add_memory_region(unsigned long start, unsigned long size, int type) -{ - int x = e820.nr_map; - - if (x == E820MAX) { - printk(KERN_ERR "Ooops! Too many entries in the memory map!\n"); - return; - } - - e820.map[x].addr = start; - e820.map[x].size = size; - e820.map[x].type = type; - e820.nr_map++; -} - -/* - * Find the hole size (in bytes) in the memory range. - * @start: starting address of the memory range to scan - * @end: ending address of the memory range to scan - */ -unsigned long __init e820_hole_size(unsigned long start, unsigned long end) -{ - unsigned long start_pfn = start >> PAGE_SHIFT; - unsigned long end_pfn = end >> PAGE_SHIFT; - unsigned long ei_startpfn, ei_endpfn, ram = 0; - int i; - - for (i = 0; i < e820.nr_map; i++) { - if (e820_find_active_region(&e820.map[i], - start_pfn, end_pfn, - &ei_startpfn, &ei_endpfn)) - ram += ei_endpfn - ei_startpfn; - } - return end - start - (ram << PAGE_SHIFT); -} - -static void __init e820_print_map(char *who) -{ - int i; - - for (i = 0; i < e820.nr_map; i++) { - printk(KERN_INFO " %s: %016Lx - %016Lx ", who, - (unsigned long long) e820.map[i].addr, - (unsigned long long) - (e820.map[i].addr + e820.map[i].size)); - switch (e820.map[i].type) { - case E820_RAM: - printk(KERN_CONT "(usable)\n"); - break; - case E820_RESERVED: - printk(KERN_CONT "(reserved)\n"); - break; - case E820_ACPI: - printk(KERN_CONT "(ACPI data)\n"); - break; - case E820_NVS: - printk(KERN_CONT "(ACPI NVS)\n"); - break; - default: - printk(KERN_CONT "type %u\n", e820.map[i].type); - break; - } - } -} - -/* - * Sanitize the BIOS e820 map. - * - * Some e820 responses include overlapping entries. The following - * replaces the original e820 map with a new one, removing overlaps. - * - */ -static int __init sanitize_e820_map(struct e820entry *biosmap, char *pnr_map) -{ - struct change_member { - struct e820entry *pbios; /* pointer to original bios entry */ - unsigned long long addr; /* address for this change point */ - }; - static struct change_member change_point_list[2*E820MAX] __initdata; - static struct change_member *change_point[2*E820MAX] __initdata; - static struct e820entry *overlap_list[E820MAX] __initdata; - static struct e820entry new_bios[E820MAX] __initdata; - struct change_member *change_tmp; - unsigned long current_type, last_type; - unsigned long long last_addr; - int chgidx, still_changing; - int overlap_entries; - int new_bios_entry; - int old_nr, new_nr, chg_nr; - int i; - - /* - Visually we're performing the following - (1,2,3,4 = memory types)... - - Sample memory map (w/overlaps): - ____22__________________ - ______________________4_ - ____1111________________ - _44_____________________ - 11111111________________ - ____________________33__ - ___________44___________ - __________33333_________ - ______________22________ - ___________________2222_ - _________111111111______ - _____________________11_ - _________________4______ - - Sanitized equivalent (no overlap): - 1_______________________ - _44_____________________ - ___1____________________ - ____22__________________ - ______11________________ - _________1______________ - __________3_____________ - ___________44___________ - _____________33_________ - _______________2________ - ________________1_______ - _________________4______ - ___________________2____ - ____________________33__ - ______________________4_ - */ - - /* if there's only one memory region, don't bother */ - if (*pnr_map < 2) - return -1; - - old_nr = *pnr_map; - - /* bail out if we find any unreasonable addresses in bios map */ - for (i = 0; i < old_nr; i++) - if (biosmap[i].addr + biosmap[i].size < biosmap[i].addr) - return -1; - - /* create pointers for initial change-point information (for sorting) */ - for (i = 0; i < 2 * old_nr; i++) - change_point[i] = &change_point_list[i]; - - /* record all known change-points (starting and ending addresses), - omitting those that are for empty memory regions */ - chgidx = 0; - for (i = 0; i < old_nr; i++) { - if (biosmap[i].size != 0) { - change_point[chgidx]->addr = biosmap[i].addr; - change_point[chgidx++]->pbios = &biosmap[i]; - change_point[chgidx]->addr = biosmap[i].addr + - biosmap[i].size; - change_point[chgidx++]->pbios = &biosmap[i]; - } - } - chg_nr = chgidx; - - /* sort change-point list by memory addresses (low -> high) */ - still_changing = 1; - while (still_changing) { - still_changing = 0; - for (i = 1; i < chg_nr; i++) { - unsigned long long curaddr, lastaddr; - unsigned long long curpbaddr, lastpbaddr; - - curaddr = change_point[i]->addr; - lastaddr = change_point[i - 1]->addr; - curpbaddr = change_point[i]->pbios->addr; - lastpbaddr = change_point[i - 1]->pbios->addr; - - /* - * swap entries, when: - * - * curaddr > lastaddr or - * curaddr == lastaddr and curaddr == curpbaddr and - * lastaddr != lastpbaddr - */ - if (curaddr < lastaddr || - (curaddr == lastaddr && curaddr == curpbaddr && - lastaddr != lastpbaddr)) { - change_tmp = change_point[i]; - change_point[i] = change_point[i-1]; - change_point[i-1] = change_tmp; - still_changing = 1; - } - } - } - - /* create a new bios memory map, removing overlaps */ - overlap_entries = 0; /* number of entries in the overlap table */ - new_bios_entry = 0; /* index for creating new bios map entries */ - last_type = 0; /* start with undefined memory type */ - last_addr = 0; /* start with 0 as last starting address */ - - /* loop through change-points, determining affect on the new bios map */ - for (chgidx = 0; chgidx < chg_nr; chgidx++) { - /* keep track of all overlapping bios entries */ - if (change_point[chgidx]->addr == - change_point[chgidx]->pbios->addr) { - /* - * add map entry to overlap list (> 1 entry - * implies an overlap) - */ - overlap_list[overlap_entries++] = - change_point[chgidx]->pbios; - } else { - /* - * remove entry from list (order independent, - * so swap with last) - */ - for (i = 0; i < overlap_entries; i++) { - if (overlap_list[i] == - change_point[chgidx]->pbios) - overlap_list[i] = - overlap_list[overlap_entries-1]; - } - overlap_entries--; - } - /* - * if there are overlapping entries, decide which - * "type" to use (larger value takes precedence -- - * 1=usable, 2,3,4,4+=unusable) - */ - current_type = 0; - for (i = 0; i < overlap_entries; i++) - if (overlap_list[i]->type > current_type) - current_type = overlap_list[i]->type; - /* - * continue building up new bios map based on this - * information - */ - if (current_type != last_type) { - if (last_type != 0) { - new_bios[new_bios_entry].size = - change_point[chgidx]->addr - last_addr; - /* - * move forward only if the new size - * was non-zero - */ - if (new_bios[new_bios_entry].size != 0) - /* - * no more space left for new - * bios entries ? - */ - if (++new_bios_entry >= E820MAX) - break; - } - if (current_type != 0) { - new_bios[new_bios_entry].addr = - change_point[chgidx]->addr; - new_bios[new_bios_entry].type = current_type; - last_addr = change_point[chgidx]->addr; - } - last_type = current_type; - } - } - /* retain count for new bios entries */ - new_nr = new_bios_entry; - - /* copy new bios mapping into original location */ - memcpy(biosmap, new_bios, new_nr * sizeof(struct e820entry)); - *pnr_map = new_nr; - - return 0; -} - -/* - * Copy the BIOS e820 map into a safe place. - * - * Sanity-check it while we're at it.. - * - * If we're lucky and live on a modern system, the setup code - * will have given us a memory map that we can use to properly - * set up memory. If we aren't, we'll fake a memory map. - */ -static int __init copy_e820_map(struct e820entry *biosmap, int nr_map) -{ - /* Only one memory region (or negative)? Ignore it */ - if (nr_map < 2) - return -1; - - do { - u64 start = biosmap->addr; - u64 size = biosmap->size; - u64 end = start + size; - u32 type = biosmap->type; - - /* Overflow in 64 bits? Ignore the memory map. */ - if (start > end) - return -1; - - add_memory_region(start, size, type); - } while (biosmap++, --nr_map); - return 0; -} - -static void early_panic(char *msg) -{ - early_printk(msg); - panic(msg); -} - -/* We're not void only for x86 32-bit compat */ -char * __init machine_specific_memory_setup(void) -{ - char *who = "BIOS-e820"; - /* - * Try to copy the BIOS-supplied E820-map. - * - * Otherwise fake a memory map; one section from 0k->640k, - * the next section from 1mb->appropriate_mem_k - */ - sanitize_e820_map(boot_params.e820_map, &boot_params.e820_entries); - if (copy_e820_map(boot_params.e820_map, boot_params.e820_entries) < 0) - early_panic("Cannot find a valid memory map"); - printk(KERN_INFO "BIOS-provided physical RAM map:\n"); - e820_print_map(who); - - /* In case someone cares... */ - return who; -} - -static int __init parse_memopt(char *p) -{ - if (!p) - return -EINVAL; - end_user_pfn = memparse(p, &p); - end_user_pfn >>= PAGE_SHIFT; - return 0; -} -early_param("mem", parse_memopt); - -static int userdef __initdata; - -static int __init parse_memmap_opt(char *p) -{ - char *oldp; - unsigned long long start_at, mem_size; - - if (!strcmp(p, "exactmap")) { -#ifdef CONFIG_CRASH_DUMP - /* - * If we are doing a crash dump, we still need to know - * the real mem size before original memory map is - * reset. - */ - e820_register_active_regions(0, 0, -1UL); - saved_max_pfn = e820_end_of_ram(); - remove_all_active_ranges(); -#endif - max_pfn_mapped = 0; - e820.nr_map = 0; - userdef = 1; - return 0; - } - - oldp = p; - mem_size = memparse(p, &p); - if (p == oldp) - return -EINVAL; - - userdef = 1; - if (*p == '@') { - start_at = memparse(p+1, &p); - add_memory_region(start_at, mem_size, E820_RAM); - } else if (*p == '#') { - start_at = memparse(p+1, &p); - add_memory_region(start_at, mem_size, E820_ACPI); - } else if (*p == '$') { - start_at = memparse(p+1, &p); - add_memory_region(start_at, mem_size, E820_RESERVED); - } else { - end_user_pfn = (mem_size >> PAGE_SHIFT); - } - return *p == '\0' ? 0 : -EINVAL; -} -early_param("memmap", parse_memmap_opt); - -void __init finish_e820_parsing(void) -{ - if (userdef) { - char nr = e820.nr_map; - - if (sanitize_e820_map(e820.map, &nr) < 0) - early_panic("Invalid user supplied memory map"); - e820.nr_map = nr; - - printk(KERN_INFO "user-defined physical RAM map:\n"); - e820_print_map("user"); - } -} - -void __init update_memory_range(u64 start, u64 size, unsigned old_type, - unsigned new_type) -{ - int i; - - BUG_ON(old_type == new_type); - - for (i = 0; i < e820.nr_map; i++) { - struct e820entry *ei = &e820.map[i]; - u64 final_start, final_end; - if (ei->type != old_type) - continue; - /* totally covered? */ - if (ei->addr >= start && ei->size <= size) { - ei->type = new_type; - continue; - } - /* partially covered */ - final_start = max(start, ei->addr); - final_end = min(start + size, ei->addr + ei->size); - if (final_start >= final_end) - continue; - add_memory_region(final_start, final_end - final_start, - new_type); - } -} - -void __init update_e820(void) -{ - u8 nr_map; - - nr_map = e820.nr_map; - if (sanitize_e820_map(e820.map, &nr_map)) - return; - e820.nr_map = nr_map; - printk(KERN_INFO "modified physical RAM map:\n"); - e820_print_map("modified"); -} - -unsigned long pci_mem_start = 0xaeedbabe; -EXPORT_SYMBOL(pci_mem_start); - -/* - * Search for the biggest gap in the low 32 bits of the e820 - * memory space. We pass this space to PCI to assign MMIO resources - * for hotplug or unconfigured devices in. - * Hopefully the BIOS let enough space left. - */ -__init void e820_setup_gap(void) -{ - unsigned long gapstart, gapsize, round; - unsigned long last; - int i; - int found = 0; - - last = 0x100000000ull; - gapstart = 0x10000000; - gapsize = 0x400000; - i = e820.nr_map; - while (--i >= 0) { - unsigned long long start = e820.map[i].addr; - unsigned long long end = start + e820.map[i].size; - - /* - * Since "last" is at most 4GB, we know we'll - * fit in 32 bits if this condition is true - */ - if (last > end) { - unsigned long gap = last - end; - - if (gap > gapsize) { - gapsize = gap; - gapstart = end; - found = 1; - } - } - if (start < last) - last = start; - } - - if (!found) { - gapstart = (end_pfn << PAGE_SHIFT) + 1024*1024; - printk(KERN_ERR "PCI: Warning: Cannot find a gap in the 32bit " - "address range\n" - KERN_ERR "PCI: Unassigned devices with 32bit resource " - "registers may break!\n"); - } - - /* - * See how much we want to round up: start off with - * rounding to the next 1MB area. - */ - round = 0x100000; - while ((gapsize >> 4) > round) - round += round; - /* Fun with two's complement */ - pci_mem_start = (gapstart + round) & -round; - - printk(KERN_INFO - "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n", - pci_mem_start, gapstart, gapsize); -} - -int __init arch_get_ram_range(int slot, u64 *addr, u64 *size) -{ - int i; - - if (slot < 0 || slot >= e820.nr_map) - return -1; - for (i = slot; i < e820.nr_map; i++) { - if (e820.map[i].type != E820_RAM) - continue; - break; - } - if (i == e820.nr_map || e820.map[i].addr > (max_pfn << PAGE_SHIFT)) - return -1; - *addr = e820.map[i].addr; - *size = min_t(u64, e820.map[i].size + e820.map[i].addr, - max_pfn << PAGE_SHIFT) - *addr; - return i + 1; -} diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 9f51e1ea9e8225e919ccb69ad6b4bc315c6f38cc..4353cf5e6fac8b4d329e18def887dadd3f55bbb8 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -16,10 +16,7 @@ #include #include #include - -#ifdef CONFIG_GART_IOMMU -#include -#endif +#include static void __init fix_hypertransport_config(int num, int slot, int func) { @@ -50,7 +47,7 @@ static void __init fix_hypertransport_config(int num, int slot, int func) static void __init via_bugs(int num, int slot, int func) { #ifdef CONFIG_GART_IOMMU - if ((end_pfn > MAX_DMA32_PFN || force_iommu) && + if ((max_pfn > MAX_DMA32_PFN || force_iommu) && !gart_iommu_aperture_allowed) { printk(KERN_INFO "Looks like a VIA chipset. Disabling IOMMU." @@ -98,17 +95,6 @@ static void __init nvidia_bugs(int num, int slot, int func) } -static void __init ati_bugs(int num, int slot, int func) -{ -#ifdef CONFIG_X86_IO_APIC - if (timer_over_8254 == 1) { - timer_over_8254 = 0; - printk(KERN_INFO - "ATI board detected. Disabling timer routing over 8254.\n"); - } -#endif -} - #define QFLAG_APPLY_ONCE 0x1 #define QFLAG_APPLIED 0x2 #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) @@ -126,14 +112,23 @@ static struct chipset early_qrk[] __initdata = { PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs }, { PCI_VENDOR_ID_VIA, PCI_ANY_ID, PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs }, - { PCI_VENDOR_ID_ATI, PCI_ANY_ID, - PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, ati_bugs }, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config }, {} }; -static void __init check_dev_quirk(int num, int slot, int func) +/** + * check_dev_quirk - apply early quirks to a given PCI device + * @num: bus number + * @slot: slot number + * @func: PCI function + * + * Check the vendor & device ID against the early quirks table. + * + * If the device is single function, let early_quirks() know so we don't + * poke at this device again. + */ +static int __init check_dev_quirk(int num, int slot, int func) { u16 class; u16 vendor; @@ -144,7 +139,7 @@ static void __init check_dev_quirk(int num, int slot, int func) class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE); if (class == 0xffff) - return; + return -1; /* no class, treat as single function */ vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID); @@ -167,7 +162,9 @@ static void __init check_dev_quirk(int num, int slot, int func) type = read_pci_config_byte(num, slot, func, PCI_HEADER_TYPE); if (!(type & 0x80)) - return; + return -1; + + return 0; } void __init early_quirks(void) @@ -180,6 +177,9 @@ void __init early_quirks(void) /* Poor man's PCI discovery */ for (num = 0; num < 32; num++) for (slot = 0; slot < 32; slot++) - for (func = 0; func < 8; func++) - check_dev_quirk(num, slot, func); + for (func = 0; func < 8; func++) { + /* Only probe function 0 on single fn devices */ + if (check_dev_quirk(num, slot, func)) + break; + } } diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c index 643fd861b724dd07659a66052e0f358704a425b8..ff9e7350da5484747e1fd86014a51fc3faa84654 100644 --- a/arch/x86/kernel/early_printk.c +++ b/arch/x86/kernel/early_printk.c @@ -196,7 +196,7 @@ static struct console simnow_console = { static struct console *early_console = &early_vga_console; static int early_console_initialized; -void early_printk(const char *fmt, ...) +asmlinkage void early_printk(const char *fmt, ...) { char buf[512]; int n; diff --git a/arch/x86/kernel/efi.c b/arch/x86/kernel/efi.c index 77d424cf68b38e6b919f55b6fd895436e887fd74..06cc8d4254b180f622a33c879bca97f2c05b1643 100644 --- a/arch/x86/kernel/efi.c +++ b/arch/x86/kernel/efi.c @@ -64,6 +64,17 @@ static int __init setup_noefi(char *arg) } early_param("noefi", setup_noefi); +int add_efi_memmap; +EXPORT_SYMBOL(add_efi_memmap); + +static int __init setup_add_efi_memmap(char *arg) +{ + add_efi_memmap = 1; + return 0; +} +early_param("add_efi_memmap", setup_add_efi_memmap); + + static efi_status_t virt_efi_get_time(efi_time_t *tm, efi_time_cap_t *tc) { return efi_call_virt2(get_time, tm, tc); @@ -213,6 +224,50 @@ unsigned long efi_get_time(void) eft.minute, eft.second); } +/* + * Tell the kernel about the EFI memory map. This might include + * more than the max 128 entries that can fit in the e820 legacy + * (zeropage) memory map. + */ + +static void __init do_add_efi_memmap(void) +{ + void *p; + + for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { + efi_memory_desc_t *md = p; + unsigned long long start = md->phys_addr; + unsigned long long size = md->num_pages << EFI_PAGE_SHIFT; + int e820_type; + + if (md->attribute & EFI_MEMORY_WB) + e820_type = E820_RAM; + else + e820_type = E820_RESERVED; + e820_add_region(start, size, e820_type); + } + sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); +} + +void __init efi_reserve_early(void) +{ + unsigned long pmap; + +#ifdef CONFIG_X86_32 + pmap = boot_params.efi_info.efi_memmap; +#else + pmap = (boot_params.efi_info.efi_memmap | + ((__u64)boot_params.efi_info.efi_memmap_hi<<32)); +#endif + memmap.phys_map = (void *)pmap; + memmap.nr_map = boot_params.efi_info.efi_memmap_size / + boot_params.efi_info.efi_memdesc_size; + memmap.desc_version = boot_params.efi_info.efi_memdesc_version; + memmap.desc_size = boot_params.efi_info.efi_memdesc_size; + reserve_early(pmap, pmap + memmap.nr_map * memmap.desc_size, + "EFI memmap"); +} + #if EFI_DEBUG static void __init print_efi_memmap(void) { @@ -244,19 +299,11 @@ void __init efi_init(void) #ifdef CONFIG_X86_32 efi_phys.systab = (efi_system_table_t *)boot_params.efi_info.efi_systab; - memmap.phys_map = (void *)boot_params.efi_info.efi_memmap; #else efi_phys.systab = (efi_system_table_t *) (boot_params.efi_info.efi_systab | ((__u64)boot_params.efi_info.efi_systab_hi<<32)); - memmap.phys_map = (void *) - (boot_params.efi_info.efi_memmap | - ((__u64)boot_params.efi_info.efi_memmap_hi<<32)); #endif - memmap.nr_map = boot_params.efi_info.efi_memmap_size / - boot_params.efi_info.efi_memdesc_size; - memmap.desc_version = boot_params.efi_info.efi_memdesc_version; - memmap.desc_size = boot_params.efi_info.efi_memdesc_size; efi.systab = early_ioremap((unsigned long)efi_phys.systab, sizeof(efi_system_table_t)); @@ -370,6 +417,8 @@ void __init efi_init(void) if (memmap.desc_size != sizeof(efi_memory_desc_t)) printk(KERN_WARNING "Kernel-defined memdesc" "doesn't match the one from EFI!\n"); + if (add_efi_memmap) + do_add_efi_memmap(); /* Setup for EFI runtime service */ reboot_type = BOOT_EFI; @@ -424,7 +473,7 @@ void __init efi_enter_virtual_mode(void) size = md->num_pages << EFI_PAGE_SHIFT; end = md->phys_addr + size; - if (PFN_UP(end) <= max_pfn_mapped) + if (PFN_UP(end) <= max_low_pfn_mapped) va = __va(md->phys_addr); else va = efi_ioremap(md->phys_addr, size); diff --git a/arch/x86/kernel/efi_64.c b/arch/x86/kernel/efi_64.c index d0060fdcccac1658968db527f4c05d791b056e6b..652c5287215fdb9500e4013794d559cfc4ace801 100644 --- a/arch/x86/kernel/efi_64.c +++ b/arch/x86/kernel/efi_64.c @@ -97,13 +97,7 @@ void __init efi_call_phys_epilog(void) early_runtime_code_mapping_set_exec(0); } -void __init efi_reserve_bootmem(void) -{ - reserve_bootmem_generic((unsigned long)memmap.phys_map, - memmap.nr_map * memmap.desc_size); -} - -void __iomem * __init efi_ioremap(unsigned long phys_addr, unsigned long size) +void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size) { static unsigned pages_mapped __initdata; unsigned i, pages; diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S index c778e4fa55a2eacc79d34954c2fdcef1367d5732..109792bc7cfa178e50e07e81ae33dc9e6700a597 100644 --- a/arch/x86/kernel/entry_32.S +++ b/arch/x86/kernel/entry_32.S @@ -51,14 +51,25 @@ #include #include #include -#include "irq_vectors.h" +#include +#include + +/* Avoid __ASSEMBLER__'ifying just for this. */ +#include +#define AUDIT_ARCH_I386 (EM_386|__AUDIT_ARCH_LE) +#define __AUDIT_ARCH_LE 0x40000000 + +#ifndef CONFIG_AUDITSYSCALL +#define sysenter_audit syscall_trace_entry +#define sysexit_audit syscall_exit_work +#endif /* * We use macros for low-level operations which need to be overridden * for paravirtualization. The following will never clobber any registers: * INTERRUPT_RETURN (aka. "iret") * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") - * ENABLE_INTERRUPTS_SYSCALL_RET (aka "sti; sysexit"). + * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). * * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). @@ -331,8 +342,9 @@ sysenter_past_esp: GET_THREAD_INFO(%ebp) /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */ - testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp) - jnz syscall_trace_entry + testw $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp) + jnz sysenter_audit +sysenter_do_call: cmpl $(nr_syscalls), %eax jae syscall_badsys call *sys_call_table(,%eax,4) @@ -342,14 +354,54 @@ sysenter_past_esp: TRACE_IRQS_OFF movl TI_flags(%ebp), %ecx testw $_TIF_ALLWORK_MASK, %cx - jne syscall_exit_work + jne sysexit_audit +sysenter_exit: /* if something modifies registers it must also disable sysexit */ movl PT_EIP(%esp), %edx movl PT_OLDESP(%esp), %ecx xorl %ebp,%ebp TRACE_IRQS_ON 1: mov PT_FS(%esp), %fs - ENABLE_INTERRUPTS_SYSCALL_RET + ENABLE_INTERRUPTS_SYSEXIT + +#ifdef CONFIG_AUDITSYSCALL +sysenter_audit: + testw $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%ebp) + jnz syscall_trace_entry + addl $4,%esp + CFI_ADJUST_CFA_OFFSET -4 + /* %esi already in 8(%esp) 6th arg: 4th syscall arg */ + /* %edx already in 4(%esp) 5th arg: 3rd syscall arg */ + /* %ecx already in 0(%esp) 4th arg: 2nd syscall arg */ + movl %ebx,%ecx /* 3rd arg: 1st syscall arg */ + movl %eax,%edx /* 2nd arg: syscall number */ + movl $AUDIT_ARCH_I386,%eax /* 1st arg: audit arch */ + call audit_syscall_entry + pushl %ebx + CFI_ADJUST_CFA_OFFSET 4 + movl PT_EAX(%esp),%eax /* reload syscall number */ + jmp sysenter_do_call + +sysexit_audit: + testw $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %cx + jne syscall_exit_work + TRACE_IRQS_ON + ENABLE_INTERRUPTS(CLBR_ANY) + movl %eax,%edx /* second arg, syscall return value */ + cmpl $0,%eax /* is it < 0? */ + setl %al /* 1 if so, 0 if not */ + movzbl %al,%eax /* zero-extend that */ + inc %eax /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ + call audit_syscall_exit + DISABLE_INTERRUPTS(CLBR_ANY) + TRACE_IRQS_OFF + movl TI_flags(%ebp), %ecx + testw $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT), %cx + jne syscall_exit_work + movl PT_EAX(%esp),%eax /* reload syscall return value */ + jmp sysenter_exit +#endif + CFI_ENDPROC .pushsection .fixup,"ax" 2: movl $0,PT_FS(%esp) @@ -369,7 +421,7 @@ ENTRY(system_call) GET_THREAD_INFO(%ebp) # system call tracing in operation / emulation /* Note, _TIF_SECCOMP is bit number 8, and so it needs testw and not testb */ - testw $(_TIF_SYSCALL_EMU|_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT),TI_flags(%ebp) + testw $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%ebp) jnz syscall_trace_entry cmpl $(nr_syscalls), %eax jae syscall_badsys @@ -382,10 +434,6 @@ syscall_exit: # setting need_resched or sigpending # between sampling and the iret TRACE_IRQS_OFF - testl $X86_EFLAGS_TF,PT_EFLAGS(%esp) # If tracing set singlestep flag on exit - jz no_singlestep - orl $_TIF_SINGLESTEP,TI_flags(%ebp) -no_singlestep: movl TI_flags(%ebp), %ecx testw $_TIF_ALLWORK_MASK, %cx # current->work jne syscall_exit_work @@ -513,12 +561,8 @@ END(work_pending) syscall_trace_entry: movl $-ENOSYS,PT_EAX(%esp) movl %esp, %eax - xorl %edx,%edx - call do_syscall_trace - cmpl $0, %eax - jne resume_userspace # ret != 0 -> running under PTRACE_SYSEMU, - # so must skip actual syscall - movl PT_ORIG_EAX(%esp), %eax + call syscall_trace_enter + /* What it returned is what we'll actually use. */ cmpl $(nr_syscalls), %eax jnae syscall_call jmp syscall_exit @@ -527,14 +571,13 @@ END(syscall_trace_entry) # perform syscall exit tracing ALIGN syscall_exit_work: - testb $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP), %cl + testb $_TIF_WORK_SYSCALL_EXIT, %cl jz work_pending TRACE_IRQS_ON - ENABLE_INTERRUPTS(CLBR_ANY) # could let do_syscall_trace() call + ENABLE_INTERRUPTS(CLBR_ANY) # could let syscall_trace_leave() call # schedule() instead movl %esp, %eax - movl $1, %edx - call do_syscall_trace + call syscall_trace_leave jmp resume_userspace END(syscall_exit_work) CFI_ENDPROC @@ -874,10 +917,10 @@ ENTRY(native_iret) .previous END(native_iret) -ENTRY(native_irq_enable_syscall_ret) +ENTRY(native_irq_enable_sysexit) sti sysexit -END(native_irq_enable_syscall_ret) +END(native_irq_enable_sysexit) #endif KPROBE_ENTRY(int3) @@ -1023,7 +1066,9 @@ ENDPROC(kernel_thread_helper) ENTRY(xen_sysenter_target) RING0_INT_FRAME addl $5*4, %esp /* remove xen-provided frame */ + CFI_ADJUST_CFA_OFFSET -5*4 jmp sysenter_past_esp + CFI_ENDPROC ENTRY(xen_hypervisor_callback) CFI_STARTPROC @@ -1110,6 +1155,77 @@ ENDPROC(xen_failsafe_callback) #endif /* CONFIG_XEN */ +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE + +ENTRY(mcount) + pushl %eax + pushl %ecx + pushl %edx + movl 0xc(%esp), %eax + subl $MCOUNT_INSN_SIZE, %eax + +.globl mcount_call +mcount_call: + call ftrace_stub + + popl %edx + popl %ecx + popl %eax + + ret +END(mcount) + +ENTRY(ftrace_caller) + pushl %eax + pushl %ecx + pushl %edx + movl 0xc(%esp), %eax + movl 0x4(%ebp), %edx + subl $MCOUNT_INSN_SIZE, %eax + +.globl ftrace_call +ftrace_call: + call ftrace_stub + + popl %edx + popl %ecx + popl %eax + +.globl ftrace_stub +ftrace_stub: + ret +END(ftrace_caller) + +#else /* ! CONFIG_DYNAMIC_FTRACE */ + +ENTRY(mcount) + cmpl $ftrace_stub, ftrace_trace_function + jnz trace +.globl ftrace_stub +ftrace_stub: + ret + + /* taken from glibc */ +trace: + pushl %eax + pushl %ecx + pushl %edx + movl 0xc(%esp), %eax + movl 0x4(%ebp), %edx + subl $MCOUNT_INSN_SIZE, %eax + + call *ftrace_trace_function + + popl %edx + popl %ecx + popl %eax + + jmp ftrace_stub +END(mcount) +#endif /* CONFIG_DYNAMIC_FTRACE */ +#endif /* CONFIG_FTRACE */ + .section .rodata,"a" #include "syscall_table_32.S" diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index 556a8df522a7adcf9583164be4cad60e29b00a97..89434d439605484b48a7b26ba31c55e82c9821c5 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S @@ -51,16 +51,127 @@ #include #include #include +#include + +/* Avoid __ASSEMBLER__'ifying just for this. */ +#include +#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) +#define __AUDIT_ARCH_64BIT 0x80000000 +#define __AUDIT_ARCH_LE 0x40000000 .code64 +#ifdef CONFIG_FTRACE +#ifdef CONFIG_DYNAMIC_FTRACE +ENTRY(mcount) + + subq $0x38, %rsp + movq %rax, (%rsp) + movq %rcx, 8(%rsp) + movq %rdx, 16(%rsp) + movq %rsi, 24(%rsp) + movq %rdi, 32(%rsp) + movq %r8, 40(%rsp) + movq %r9, 48(%rsp) + + movq 0x38(%rsp), %rdi + subq $MCOUNT_INSN_SIZE, %rdi + +.globl mcount_call +mcount_call: + call ftrace_stub + + movq 48(%rsp), %r9 + movq 40(%rsp), %r8 + movq 32(%rsp), %rdi + movq 24(%rsp), %rsi + movq 16(%rsp), %rdx + movq 8(%rsp), %rcx + movq (%rsp), %rax + addq $0x38, %rsp + + retq +END(mcount) + +ENTRY(ftrace_caller) + + /* taken from glibc */ + subq $0x38, %rsp + movq %rax, (%rsp) + movq %rcx, 8(%rsp) + movq %rdx, 16(%rsp) + movq %rsi, 24(%rsp) + movq %rdi, 32(%rsp) + movq %r8, 40(%rsp) + movq %r9, 48(%rsp) + + movq 0x38(%rsp), %rdi + movq 8(%rbp), %rsi + subq $MCOUNT_INSN_SIZE, %rdi + +.globl ftrace_call +ftrace_call: + call ftrace_stub + + movq 48(%rsp), %r9 + movq 40(%rsp), %r8 + movq 32(%rsp), %rdi + movq 24(%rsp), %rsi + movq 16(%rsp), %rdx + movq 8(%rsp), %rcx + movq (%rsp), %rax + addq $0x38, %rsp + +.globl ftrace_stub +ftrace_stub: + retq +END(ftrace_caller) + +#else /* ! CONFIG_DYNAMIC_FTRACE */ +ENTRY(mcount) + cmpq $ftrace_stub, ftrace_trace_function + jnz trace +.globl ftrace_stub +ftrace_stub: + retq + +trace: + /* taken from glibc */ + subq $0x38, %rsp + movq %rax, (%rsp) + movq %rcx, 8(%rsp) + movq %rdx, 16(%rsp) + movq %rsi, 24(%rsp) + movq %rdi, 32(%rsp) + movq %r8, 40(%rsp) + movq %r9, 48(%rsp) + + movq 0x38(%rsp), %rdi + movq 8(%rbp), %rsi + subq $MCOUNT_INSN_SIZE, %rdi + + call *ftrace_trace_function + + movq 48(%rsp), %r9 + movq 40(%rsp), %r8 + movq 32(%rsp), %rdi + movq 24(%rsp), %rsi + movq 16(%rsp), %rdx + movq 8(%rsp), %rcx + movq (%rsp), %rax + addq $0x38, %rsp + + jmp ftrace_stub +END(mcount) +#endif /* CONFIG_DYNAMIC_FTRACE */ +#endif /* CONFIG_FTRACE */ + #ifndef CONFIG_PREEMPT #define retint_kernel retint_restore_args #endif #ifdef CONFIG_PARAVIRT -ENTRY(native_irq_enable_syscall_ret) - movq %gs:pda_oldrsp,%rsp +ENTRY(native_usergs_sysret64) swapgs sysretq #endif /* CONFIG_PARAVIRT */ @@ -104,7 +215,7 @@ ENTRY(native_irq_enable_syscall_ret) .macro FAKE_STACK_FRAME child_rip /* push in order ss, rsp, eflags, cs, rip */ xorl %eax, %eax - pushq %rax /* ss */ + pushq $__KERNEL_DS /* ss */ CFI_ADJUST_CFA_OFFSET 8 /*CFI_REL_OFFSET ss,0*/ pushq %rax /* rsp */ @@ -169,13 +280,13 @@ ENTRY(ret_from_fork) CFI_ADJUST_CFA_OFFSET -4 call schedule_tail GET_THREAD_INFO(%rcx) - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),threadinfo_flags(%rcx) + testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT),TI_flags(%rcx) jnz rff_trace rff_action: RESTORE_REST testl $3,CS-ARGOFFSET(%rsp) # from kernel_thread? je int_ret_from_sys_call - testl $_TIF_IA32,threadinfo_flags(%rcx) + testl $_TIF_IA32,TI_flags(%rcx) jnz int_ret_from_sys_call RESTORE_TOP_OF_STACK %rdi,ARGOFFSET jmp ret_from_sys_call @@ -244,8 +355,9 @@ ENTRY(system_call_after_swapgs) movq %rcx,RIP-ARGOFFSET(%rsp) CFI_REL_OFFSET rip,RIP-ARGOFFSET GET_THREAD_INFO(%rcx) - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP),threadinfo_flags(%rcx) + testl $_TIF_WORK_SYSCALL_ENTRY,TI_flags(%rcx) jnz tracesys +system_call_fastpath: cmpq $__NR_syscall_max,%rax ja badsys movq %r10,%rcx @@ -263,7 +375,7 @@ sysret_check: GET_THREAD_INFO(%rcx) DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF - movl threadinfo_flags(%rcx),%edx + movl TI_flags(%rcx),%edx andl %edi,%edx jnz sysret_careful CFI_REMEMBER_STATE @@ -275,7 +387,8 @@ sysret_check: CFI_REGISTER rip,rcx RESTORE_ARGS 0,-ARG_SKIP,1 /*CFI_REGISTER rflags,r11*/ - ENABLE_INTERRUPTS_SYSCALL_RET + movq %gs:pda_oldrsp, %rsp + USERGS_SYSRET64 CFI_RESTORE_STATE /* Handle reschedules */ @@ -296,16 +409,16 @@ sysret_careful: sysret_signal: TRACE_IRQS_ON ENABLE_INTERRUPTS(CLBR_NONE) - testl $_TIF_DO_NOTIFY_MASK,%edx - jz 1f - - /* Really a signal */ +#ifdef CONFIG_AUDITSYSCALL + bt $TIF_SYSCALL_AUDIT,%edx + jc sysret_audit +#endif /* edx: work flags (arg3) */ leaq do_notify_resume(%rip),%rax leaq -ARGOFFSET(%rsp),%rdi # &pt_regs -> arg1 xorl %esi,%esi # oldset -> arg2 call ptregscall_common -1: movl $_TIF_NEED_RESCHED,%edi + movl $_TIF_WORK_MASK,%edi /* Use IRET because user could have changed frame. This works because ptregscall_common has called FIXUP_TOP_OF_STACK. */ DISABLE_INTERRUPTS(CLBR_NONE) @@ -316,14 +429,56 @@ badsys: movq $-ENOSYS,RAX-ARGOFFSET(%rsp) jmp ret_from_sys_call +#ifdef CONFIG_AUDITSYSCALL + /* + * Fast path for syscall audit without full syscall trace. + * We just call audit_syscall_entry() directly, and then + * jump back to the normal fast path. + */ +auditsys: + movq %r10,%r9 /* 6th arg: 4th syscall arg */ + movq %rdx,%r8 /* 5th arg: 3rd syscall arg */ + movq %rsi,%rcx /* 4th arg: 2nd syscall arg */ + movq %rdi,%rdx /* 3rd arg: 1st syscall arg */ + movq %rax,%rsi /* 2nd arg: syscall number */ + movl $AUDIT_ARCH_X86_64,%edi /* 1st arg: audit arch */ + call audit_syscall_entry + LOAD_ARGS 0 /* reload call-clobbered registers */ + jmp system_call_fastpath + + /* + * Return fast path for syscall audit. Call audit_syscall_exit() + * directly and then jump back to the fast path with TIF_SYSCALL_AUDIT + * masked off. + */ +sysret_audit: + movq %rax,%rsi /* second arg, syscall return value */ + cmpq $0,%rax /* is it < 0? */ + setl %al /* 1 if so, 0 if not */ + movzbl %al,%edi /* zero-extend that into %edi */ + inc %edi /* first arg, 0->1(AUDITSC_SUCCESS), 1->2(AUDITSC_FAILURE) */ + call audit_syscall_exit + movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi + jmp sysret_check +#endif /* CONFIG_AUDITSYSCALL */ + /* Do syscall tracing */ tracesys: +#ifdef CONFIG_AUDITSYSCALL + testl $(_TIF_WORK_SYSCALL_ENTRY & ~_TIF_SYSCALL_AUDIT),TI_flags(%rcx) + jz auditsys +#endif SAVE_REST movq $-ENOSYS,RAX(%rsp) /* ptrace can change this for a bad syscall */ FIXUP_TOP_OF_STACK %rdi movq %rsp,%rdi call syscall_trace_enter - LOAD_ARGS ARGOFFSET /* reload args from stack in case ptrace changed it */ + /* + * Reload arg registers from stack in case ptrace changed them. + * We don't reload %rax because syscall_trace_enter() returned + * the value it wants us to use in the table lookup. + */ + LOAD_ARGS ARGOFFSET, 1 RESTORE_REST cmpq $__NR_syscall_max,%rax ja int_ret_from_sys_call /* RAX(%rsp) set to -ENOSYS above */ @@ -337,6 +492,7 @@ tracesys: * Has correct top of stack, but partial stack frame. */ .globl int_ret_from_sys_call + .globl int_with_check int_ret_from_sys_call: DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF @@ -347,10 +503,10 @@ int_ret_from_sys_call: int_with_check: LOCKDEP_SYS_EXIT_IRQ GET_THREAD_INFO(%rcx) - movl threadinfo_flags(%rcx),%edx + movl TI_flags(%rcx),%edx andl %edi,%edx jnz int_careful - andl $~TS_COMPAT,threadinfo_status(%rcx) + andl $~TS_COMPAT,TI_status(%rcx) jmp retint_swapgs /* Either reschedule or signal or syscall exit tracking needed. */ @@ -376,7 +532,7 @@ int_very_careful: ENABLE_INTERRUPTS(CLBR_NONE) SAVE_REST /* Check for syscall exit trace */ - testl $(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edx + testl $_TIF_WORK_SYSCALL_EXIT,%edx jz int_signal pushq %rdi CFI_ADJUST_CFA_OFFSET 8 @@ -384,7 +540,7 @@ int_very_careful: call syscall_trace_leave popq %rdi CFI_ADJUST_CFA_OFFSET -8 - andl $~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP),%edi + andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi jmp int_restore_rest int_signal: @@ -393,7 +549,7 @@ int_signal: movq %rsp,%rdi # &ptregs -> arg1 xorl %esi,%esi # oldset -> arg2 call do_notify_resume -1: movl $_TIF_NEED_RESCHED,%edi +1: movl $_TIF_WORK_MASK,%edi int_restore_rest: RESTORE_REST DISABLE_INTERRUPTS(CLBR_NONE) @@ -420,7 +576,6 @@ END(\label) PTREGSCALL stub_clone, sys_clone, %r8 PTREGSCALL stub_fork, sys_fork, %rdi PTREGSCALL stub_vfork, sys_vfork, %rdi - PTREGSCALL stub_rt_sigsuspend, sys_rt_sigsuspend, %rdx PTREGSCALL stub_sigaltstack, sys_sigaltstack, %rdx PTREGSCALL stub_iopl, sys_iopl, %rsi @@ -559,7 +714,7 @@ retint_with_reschedule: movl $_TIF_WORK_MASK,%edi retint_check: LOCKDEP_SYS_EXIT_IRQ - movl threadinfo_flags(%rcx),%edx + movl TI_flags(%rcx),%edx andl %edi,%edx CFI_REMEMBER_STATE jnz retint_careful @@ -647,17 +802,16 @@ retint_signal: RESTORE_REST DISABLE_INTERRUPTS(CLBR_NONE) TRACE_IRQS_OFF - movl $_TIF_NEED_RESCHED,%edi GET_THREAD_INFO(%rcx) - jmp retint_check + jmp retint_with_reschedule #ifdef CONFIG_PREEMPT /* Returning to kernel space. Check if we need preemption */ /* rcx: threadinfo. interrupts off. */ ENTRY(retint_kernel) - cmpl $0,threadinfo_preempt_count(%rcx) + cmpl $0,TI_preempt_count(%rcx) jnz retint_restore_args - bt $TIF_NEED_RESCHED,threadinfo_flags(%rcx) + bt $TIF_NEED_RESCHED,TI_flags(%rcx) jnc retint_restore_args bt $9,EFLAGS-ARGOFFSET(%rsp) /* interrupts off? */ jnc retint_restore_args @@ -711,6 +865,9 @@ END(invalidate_interrupt\num) ENTRY(call_function_interrupt) apicinterrupt CALL_FUNCTION_VECTOR,smp_call_function_interrupt END(call_function_interrupt) +ENTRY(call_function_single_interrupt) + apicinterrupt CALL_FUNCTION_SINGLE_VECTOR,smp_call_function_single_interrupt +END(call_function_single_interrupt) ENTRY(irq_move_cleanup_interrupt) apicinterrupt IRQ_MOVE_CLEANUP_VECTOR,smp_irq_move_cleanup_interrupt END(irq_move_cleanup_interrupt) @@ -720,6 +877,10 @@ ENTRY(apic_timer_interrupt) apicinterrupt LOCAL_TIMER_VECTOR,smp_apic_timer_interrupt END(apic_timer_interrupt) +ENTRY(uv_bau_message_intr1) + apicinterrupt 220,uv_bau_message_interrupt +END(uv_bau_message_intr1) + ENTRY(error_interrupt) apicinterrupt ERROR_APIC_VECTOR,smp_error_interrupt END(error_interrupt) @@ -733,6 +894,7 @@ END(spurious_interrupt) */ .macro zeroentry sym INTR_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq $0 /* push error code/oldrax */ CFI_ADJUST_CFA_OFFSET 8 pushq %rax /* push real oldrax to the rdi slot */ @@ -745,6 +907,7 @@ END(spurious_interrupt) .macro errorentry sym XCPT_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq %rax CFI_ADJUST_CFA_OFFSET 8 CFI_REL_OFFSET rax,0 @@ -814,7 +977,7 @@ paranoid_restore\trace: jmp irq_return paranoid_userspace\trace: GET_THREAD_INFO(%rcx) - movl threadinfo_flags(%rcx),%ebx + movl TI_flags(%rcx),%ebx andl $_TIF_WORK_MASK,%ebx jz paranoid_swapgs\trace movq %rsp,%rdi /* &pt_regs */ @@ -912,7 +1075,7 @@ error_exit: testl %eax,%eax jne retint_kernel LOCKDEP_SYS_EXIT_IRQ - movl threadinfo_flags(%rcx),%edx + movl TI_flags(%rcx),%edx movl $_TIF_WORK_MASK,%edi andl %edi,%edx jnz retint_careful @@ -926,11 +1089,11 @@ error_kernelspace: iret run with kernel gs again, so don't set the user space flag. B stepping K8s sometimes report an truncated RIP for IRET exceptions returning to compat mode. Check for these here too. */ - leaq irq_return(%rip),%rbp - cmpq %rbp,RIP(%rsp) + leaq irq_return(%rip),%rcx + cmpq %rcx,RIP(%rsp) je error_swapgs - movl %ebp,%ebp /* zero extend */ - cmpq %rbp,RIP(%rsp) + movl %ecx,%ecx /* zero extend */ + cmpq %rcx,RIP(%rsp) je error_swapgs cmpq $gs_change,RIP(%rsp) je error_swapgs @@ -939,7 +1102,7 @@ KPROBE_END(error_entry) /* Reload gs selector with exception handling */ /* edi: new selector */ -ENTRY(load_gs_index) +ENTRY(native_load_gs_index) CFI_STARTPROC pushf CFI_ADJUST_CFA_OFFSET 8 @@ -953,7 +1116,7 @@ gs_change: CFI_ADJUST_CFA_OFFSET -8 ret CFI_ENDPROC -ENDPROC(load_gs_index) +ENDPROC(native_load_gs_index) .section __ex_table,"a" .align 8 @@ -1075,6 +1238,7 @@ END(device_not_available) /* runs on exception stack */ KPROBE_ENTRY(debug) INTR_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq $0 CFI_ADJUST_CFA_OFFSET 8 paranoidentry do_debug, DEBUG_STACK @@ -1084,6 +1248,7 @@ KPROBE_END(debug) /* runs on exception stack */ KPROBE_ENTRY(nmi) INTR_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq $-1 CFI_ADJUST_CFA_OFFSET 8 paranoidentry do_nmi, 0, 0 @@ -1097,6 +1262,7 @@ KPROBE_END(nmi) KPROBE_ENTRY(int3) INTR_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq $0 CFI_ADJUST_CFA_OFFSET 8 paranoidentry do_int3, DEBUG_STACK @@ -1120,13 +1286,10 @@ ENTRY(coprocessor_segment_overrun) zeroentry do_coprocessor_segment_overrun END(coprocessor_segment_overrun) -ENTRY(reserved) - zeroentry do_reserved -END(reserved) - /* runs on exception stack */ ENTRY(double_fault) XCPT_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME paranoidentry do_double_fault jmp paranoid_exit1 CFI_ENDPROC @@ -1143,6 +1306,7 @@ END(segment_not_present) /* runs on exception stack */ ENTRY(stack_segment) XCPT_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME paranoidentry do_stack_segment jmp paranoid_exit1 CFI_ENDPROC @@ -1168,6 +1332,7 @@ END(spurious_interrupt_bug) /* runs on exception stack */ ENTRY(machine_check) INTR_FRAME + PARAVIRT_ADJUST_EXCEPTION_FRAME pushq $0 CFI_ADJUST_CFA_OFFSET 8 paranoidentry do_machine_check @@ -1202,3 +1367,103 @@ KPROBE_ENTRY(ignore_sysret) sysret CFI_ENDPROC ENDPROC(ignore_sysret) + +#ifdef CONFIG_XEN +ENTRY(xen_hypervisor_callback) + zeroentry xen_do_hypervisor_callback +END(xen_hypervisor_callback) + +/* +# A note on the "critical region" in our callback handler. +# We want to avoid stacking callback handlers due to events occurring +# during handling of the last event. To do this, we keep events disabled +# until we've done all processing. HOWEVER, we must enable events before +# popping the stack frame (can't be done atomically) and so it would still +# be possible to get enough handler activations to overflow the stack. +# Although unlikely, bugs of that kind are hard to track down, so we'd +# like to avoid the possibility. +# So, on entry to the handler we detect whether we interrupted an +# existing activation in its critical region -- if so, we pop the current +# activation and restart the handler using the previous one. +*/ +ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs) + CFI_STARTPROC +/* Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will + see the correct pointer to the pt_regs */ + movq %rdi, %rsp # we don't return, adjust the stack frame + CFI_ENDPROC + CFI_DEFAULT_STACK +11: incl %gs:pda_irqcount + movq %rsp,%rbp + CFI_DEF_CFA_REGISTER rbp + cmovzq %gs:pda_irqstackptr,%rsp + pushq %rbp # backlink for old unwinder + call xen_evtchn_do_upcall + popq %rsp + CFI_DEF_CFA_REGISTER rsp + decl %gs:pda_irqcount + jmp error_exit + CFI_ENDPROC +END(do_hypervisor_callback) + +/* +# Hypervisor uses this for application faults while it executes. +# We get here for two reasons: +# 1. Fault while reloading DS, ES, FS or GS +# 2. Fault while executing IRET +# Category 1 we do not need to fix up as Xen has already reloaded all segment +# registers that could be reloaded and zeroed the others. +# Category 2 we fix up by killing the current process. We cannot use the +# normal Linux return path in this case because if we use the IRET hypercall +# to pop the stack frame we end up in an infinite loop of failsafe callbacks. +# We distinguish between categories by comparing each saved segment register +# with its current contents: any discrepancy means we in category 1. +*/ +ENTRY(xen_failsafe_callback) + framesz = (RIP-0x30) /* workaround buggy gas */ + _frame framesz + CFI_REL_OFFSET rcx, 0 + CFI_REL_OFFSET r11, 8 + movw %ds,%cx + cmpw %cx,0x10(%rsp) + CFI_REMEMBER_STATE + jne 1f + movw %es,%cx + cmpw %cx,0x18(%rsp) + jne 1f + movw %fs,%cx + cmpw %cx,0x20(%rsp) + jne 1f + movw %gs,%cx + cmpw %cx,0x28(%rsp) + jne 1f + /* All segments match their saved values => Category 2 (Bad IRET). */ + movq (%rsp),%rcx + CFI_RESTORE rcx + movq 8(%rsp),%r11 + CFI_RESTORE r11 + addq $0x30,%rsp + CFI_ADJUST_CFA_OFFSET -0x30 + pushq $0 + CFI_ADJUST_CFA_OFFSET 8 + pushq %r11 + CFI_ADJUST_CFA_OFFSET 8 + pushq %rcx + CFI_ADJUST_CFA_OFFSET 8 + jmp general_protection + CFI_RESTORE_STATE +1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */ + movq (%rsp),%rcx + CFI_RESTORE rcx + movq 8(%rsp),%r11 + CFI_RESTORE r11 + addq $0x30,%rsp + CFI_ADJUST_CFA_OFFSET -0x30 + pushq $0 + CFI_ADJUST_CFA_OFFSET 8 + SAVE_ALL + jmp error_exit + CFI_ENDPROC +END(xen_failsafe_callback) + +#endif /* CONFIG_XEN */ diff --git a/arch/x86/kernel/ftrace.c b/arch/x86/kernel/ftrace.c new file mode 100644 index 0000000000000000000000000000000000000000..ab115cd15fdfbb2cc06182385b4a60b8521f617c --- /dev/null +++ b/arch/x86/kernel/ftrace.c @@ -0,0 +1,141 @@ +/* + * Code for replacing ftrace calls with jumps. + * + * Copyright (C) 2007-2008 Steven Rostedt + * + * Thanks goes to Ingo Molnar, for suggesting the idea. + * Mathieu Desnoyers, for suggesting postponing the modifications. + * Arjan van de Ven, for keeping me straight, and explaining to me + * the dangers of modifying code on the run. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + + +/* Long is fine, even if it is only 4 bytes ;-) */ +static long *ftrace_nop; + +union ftrace_code_union { + char code[MCOUNT_INSN_SIZE]; + struct { + char e8; + int offset; + } __attribute__((packed)); +}; + + +static int notrace ftrace_calc_offset(long ip, long addr) +{ + return (int)(addr - ip); +} + +notrace unsigned char *ftrace_nop_replace(void) +{ + return (char *)ftrace_nop; +} + +notrace unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) +{ + static union ftrace_code_union calc; + + calc.e8 = 0xe8; + calc.offset = ftrace_calc_offset(ip + MCOUNT_INSN_SIZE, addr); + + /* + * No locking needed, this must be called via kstop_machine + * which in essence is like running on a uniprocessor machine. + */ + return calc.code; +} + +notrace int +ftrace_modify_code(unsigned long ip, unsigned char *old_code, + unsigned char *new_code) +{ + unsigned replaced; + unsigned old = *(unsigned *)old_code; /* 4 bytes */ + unsigned new = *(unsigned *)new_code; /* 4 bytes */ + unsigned char newch = new_code[4]; + int faulted = 0; + + /* + * Note: Due to modules and __init, code can + * disappear and change, we need to protect against faulting + * as well as code changing. + * + * No real locking needed, this code is run through + * kstop_machine. + */ + asm volatile ( + "1: lock\n" + " cmpxchg %3, (%2)\n" + " jnz 2f\n" + " movb %b4, 4(%2)\n" + "2:\n" + ".section .fixup, \"ax\"\n" + "3: movl $1, %0\n" + " jmp 2b\n" + ".previous\n" + _ASM_EXTABLE(1b, 3b) + : "=r"(faulted), "=a"(replaced) + : "r"(ip), "r"(new), "c"(newch), + "0"(faulted), "a"(old) + : "memory"); + sync_core(); + + if (replaced != old && replaced != new) + faulted = 2; + + return faulted; +} + +notrace int ftrace_update_ftrace_func(ftrace_func_t func) +{ + unsigned long ip = (unsigned long)(&ftrace_call); + unsigned char old[MCOUNT_INSN_SIZE], *new; + int ret; + + memcpy(old, &ftrace_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, (unsigned long)func); + ret = ftrace_modify_code(ip, old, new); + + return ret; +} + +notrace int ftrace_mcount_set(unsigned long *data) +{ + unsigned long ip = (long)(&mcount_call); + unsigned long *addr = data; + unsigned char old[MCOUNT_INSN_SIZE], *new; + + /* + * Replace the mcount stub with a pointer to the + * ip recorder function. + */ + memcpy(old, &mcount_call, MCOUNT_INSN_SIZE); + new = ftrace_call_replace(ip, *addr); + *addr = ftrace_modify_code(ip, old, new); + + return 0; +} + +int __init ftrace_dyn_arch_init(void *data) +{ + const unsigned char *const *noptable = find_nop_table(); + + /* This is running in kstop_machine */ + + ftrace_mcount_set(data); + + ftrace_nop = (unsigned long *)noptable[MCOUNT_INSN_SIZE]; + + return 0; +} diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c index cbaaf69bedb29c92055e2272a12efba7f49f9ee1..6c9bfc9e1e95cbc5f8aa2273bd06f9eb75c2ca11 100644 --- a/arch/x86/kernel/genapic_64.c +++ b/arch/x86/kernel/genapic_64.c @@ -16,86 +16,63 @@ #include #include #include +#include #include #include #include -#ifdef CONFIG_ACPI -#include -#endif - -DEFINE_PER_CPU(int, x2apic_extra_bits); +extern struct genapic apic_flat; +extern struct genapic apic_physflat; +extern struct genapic apic_x2xpic_uv_x; +extern struct genapic apic_x2apic_phys; +extern struct genapic apic_x2apic_cluster; struct genapic __read_mostly *genapic = &apic_flat; -static enum uv_system_type uv_system_type; +static struct genapic *apic_probe[] __initdata = { + &apic_x2apic_uv_x, + &apic_x2apic_phys, + &apic_x2apic_cluster, + &apic_physflat, + NULL, +}; /* * Check the APIC IDs in bios_cpu_apicid and choose the APIC mode. */ void __init setup_apic_routing(void) { - if (uv_system_type == UV_NON_UNIQUE_APIC) - genapic = &apic_x2apic_uv_x; - else -#ifdef CONFIG_ACPI - /* - * Quirk: some x86_64 machines can only use physical APIC mode - * regardless of how many processors are present (x86_64 ES7000 - * is an example). - */ - if (acpi_gbl_FADT.header.revision > FADT2_REVISION_ID && - (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) - genapic = &apic_physflat; - else -#endif - - if (num_possible_cpus() <= 8) - genapic = &apic_flat; - else - genapic = &apic_physflat; + if (genapic == &apic_x2apic_phys || genapic == &apic_x2apic_cluster) { + if (!intr_remapping_enabled) + genapic = &apic_flat; + } - printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name); + if (genapic == &apic_flat) { + if (max_physical_apicid >= 8) + genapic = &apic_physflat; + printk(KERN_INFO "Setting APIC routing to %s\n", genapic->name); + } } /* Same for both flat and physical. */ -void send_IPI_self(int vector) +void apic_send_IPI_self(int vector) { __send_IPI_shortcut(APIC_DEST_SELF, vector, APIC_DEST_PHYSICAL); } int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) { - if (!strcmp(oem_id, "SGI")) { - if (!strcmp(oem_table_id, "UVL")) - uv_system_type = UV_LEGACY_APIC; - else if (!strcmp(oem_table_id, "UVX")) - uv_system_type = UV_X2APIC; - else if (!strcmp(oem_table_id, "UVH")) - uv_system_type = UV_NON_UNIQUE_APIC; + int i; + + for (i = 0; apic_probe[i]; ++i) { + if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { + genapic = apic_probe[i]; + printk(KERN_INFO "Setting APIC routing to %s.\n", + genapic->name); + return 1; + } } return 0; } - -unsigned int read_apic_id(void) -{ - unsigned int id; - - WARN_ON(preemptible() && num_online_cpus() > 1); - id = apic_read(APIC_ID); - if (uv_system_type >= UV_X2APIC) - id |= __get_cpu_var(x2apic_extra_bits); - return id; -} - -enum uv_system_type get_uv_system_type(void) -{ - return uv_system_type; -} - -int is_uv_system(void) -{ - return uv_system_type != UV_NONE; -} diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c index 1a9c68845ee8c8538e6b6e6f1c04d5d4a19fb9be..9eca5ba7a6b1dcfe543fc644ab049e40b9139a9f 100644 --- a/arch/x86/kernel/genapic_flat_64.c +++ b/arch/x86/kernel/genapic_flat_64.c @@ -15,9 +15,20 @@ #include #include #include +#include #include #include #include +#include + +#ifdef CONFIG_ACPI +#include +#endif + +static int __init flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +{ + return 1; +} static cpumask_t flat_target_cpus(void) { @@ -95,9 +106,33 @@ static void flat_send_IPI_all(int vector) __send_IPI_shortcut(APIC_DEST_ALLINC, vector, APIC_DEST_LOGICAL); } +static unsigned int get_apic_id(unsigned long x) +{ + unsigned int id; + + id = (((x)>>24) & 0xFFu); + return id; +} + +static unsigned long set_apic_id(unsigned int id) +{ + unsigned long x; + + x = ((id & 0xFFu)<<24); + return x; +} + +static unsigned int read_xapic_id(void) +{ + unsigned int id; + + id = get_apic_id(apic_read(APIC_ID)); + return id; +} + static int flat_apic_id_registered(void) { - return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map); + return physid_isset(read_xapic_id(), phys_cpu_present_map); } static unsigned int flat_cpu_mask_to_apicid(cpumask_t cpumask) @@ -112,6 +147,7 @@ static unsigned int phys_pkg_id(int index_msb) struct genapic apic_flat = { .name = "flat", + .acpi_madt_oem_check = flat_acpi_madt_oem_check, .int_delivery_mode = dest_LowestPrio, .int_dest_mode = (APIC_DEST_LOGICAL != 0), .target_cpus = flat_target_cpus, @@ -121,8 +157,12 @@ struct genapic apic_flat = { .send_IPI_all = flat_send_IPI_all, .send_IPI_allbutself = flat_send_IPI_allbutself, .send_IPI_mask = flat_send_IPI_mask, + .send_IPI_self = apic_send_IPI_self, .cpu_mask_to_apicid = flat_cpu_mask_to_apicid, .phys_pkg_id = phys_pkg_id, + .get_apic_id = get_apic_id, + .set_apic_id = set_apic_id, + .apic_id_mask = (0xFFu<<24), }; /* @@ -130,6 +170,21 @@ struct genapic apic_flat = { * We cannot use logical delivery in this case because the mask * overflows, so use physical mode. */ +static int __init physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +{ +#ifdef CONFIG_ACPI + /* + * Quirk: some x86_64 machines can only use physical APIC mode + * regardless of how many processors are present (x86_64 ES7000 + * is an example). + */ + if (acpi_gbl_FADT.header.revision > FADT2_REVISION_ID && + (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) + return 1; +#endif + + return 0; +} static cpumask_t physflat_target_cpus(void) { @@ -168,7 +223,7 @@ static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask) * May as well be the first. */ cpu = first_cpu(cpumask); - if ((unsigned)cpu < NR_CPUS) + if ((unsigned)cpu < nr_cpu_ids) return per_cpu(x86_cpu_to_apicid, cpu); else return BAD_APICID; @@ -176,6 +231,7 @@ static unsigned int physflat_cpu_mask_to_apicid(cpumask_t cpumask) struct genapic apic_physflat = { .name = "physical flat", + .acpi_madt_oem_check = physflat_acpi_madt_oem_check, .int_delivery_mode = dest_Fixed, .int_dest_mode = (APIC_DEST_PHYSICAL != 0), .target_cpus = physflat_target_cpus, @@ -185,6 +241,10 @@ struct genapic apic_physflat = { .send_IPI_all = physflat_send_IPI_all, .send_IPI_allbutself = physflat_send_IPI_allbutself, .send_IPI_mask = physflat_send_IPI_mask, + .send_IPI_self = apic_send_IPI_self, .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid, .phys_pkg_id = phys_pkg_id, + .get_apic_id = get_apic_id, + .set_apic_id = set_apic_id, + .apic_id_mask = (0xFFu<<24), }; diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c new file mode 100644 index 0000000000000000000000000000000000000000..fed9f68efd665bd823378a9d1ebf9624959f5536 --- /dev/null +++ b/arch/x86/kernel/genx2apic_cluster.c @@ -0,0 +1,164 @@ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid); + +static int __init x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +{ + if (cpu_has_x2apic) + return 1; + + return 0; +} + +/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ + +static cpumask_t x2apic_target_cpus(void) +{ + return cpumask_of_cpu(0); +} + +/* + * for now each logical cpu is in its own vector allocation domain. + */ +static cpumask_t x2apic_vector_allocation_domain(int cpu) +{ + cpumask_t domain = CPU_MASK_NONE; + cpu_set(cpu, domain); + return domain; +} + +static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, + unsigned int dest) +{ + unsigned long cfg; + + cfg = __prepare_ICR(0, vector, dest); + + /* + * send the IPI. + */ + x2apic_icr_write(cfg, apicid); +} + +/* + * for now, we send the IPI's one by one in the cpumask. + * TBD: Based on the cpu mask, we can send the IPI's to the cluster group + * at once. We have 16 cpu's in a cluster. This will minimize IPI register + * writes. + */ +static void x2apic_send_IPI_mask(cpumask_t mask, int vector) +{ + unsigned long flags; + unsigned long query_cpu; + + local_irq_save(flags); + for_each_cpu_mask(query_cpu, mask) { + __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_logical_apicid, query_cpu), + vector, APIC_DEST_LOGICAL); + } + local_irq_restore(flags); +} + +static void x2apic_send_IPI_allbutself(int vector) +{ + cpumask_t mask = cpu_online_map; + + cpu_clear(smp_processor_id(), mask); + + if (!cpus_empty(mask)) + x2apic_send_IPI_mask(mask, vector); +} + +static void x2apic_send_IPI_all(int vector) +{ + x2apic_send_IPI_mask(cpu_online_map, vector); +} + +static int x2apic_apic_id_registered(void) +{ + return 1; +} + +static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask) +{ + int cpu; + + /* + * We're using fixed IRQ delivery, can only return one phys APIC ID. + * May as well be the first. + */ + cpu = first_cpu(cpumask); + if ((unsigned)cpu < NR_CPUS) + return per_cpu(x86_cpu_to_logical_apicid, cpu); + else + return BAD_APICID; +} + +static unsigned int get_apic_id(unsigned long x) +{ + unsigned int id; + + id = x; + return id; +} + +static unsigned long set_apic_id(unsigned int id) +{ + unsigned long x; + + x = id; + return x; +} + +static unsigned int x2apic_read_id(void) +{ + return apic_read(APIC_ID); +} + +static unsigned int phys_pkg_id(int index_msb) +{ + return x2apic_read_id() >> index_msb; +} + +static void x2apic_send_IPI_self(int vector) +{ + apic_write(APIC_SELF_IPI, vector); +} + +static void init_x2apic_ldr(void) +{ + int cpu = smp_processor_id(); + + per_cpu(x86_cpu_to_logical_apicid, cpu) = apic_read(APIC_LDR); + return; +} + +struct genapic apic_x2apic_cluster = { + .name = "cluster x2apic", + .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, + .int_delivery_mode = dest_LowestPrio, + .int_dest_mode = (APIC_DEST_LOGICAL != 0), + .target_cpus = x2apic_target_cpus, + .vector_allocation_domain = x2apic_vector_allocation_domain, + .apic_id_registered = x2apic_apic_id_registered, + .init_apic_ldr = init_x2apic_ldr, + .send_IPI_all = x2apic_send_IPI_all, + .send_IPI_allbutself = x2apic_send_IPI_allbutself, + .send_IPI_mask = x2apic_send_IPI_mask, + .send_IPI_self = x2apic_send_IPI_self, + .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, + .phys_pkg_id = phys_pkg_id, + .get_apic_id = get_apic_id, + .set_apic_id = set_apic_id, + .apic_id_mask = (0xFFFFFFFFu), +}; diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c new file mode 100644 index 0000000000000000000000000000000000000000..958d537b4cc978789b2221d6e0e93dc8267ea04f --- /dev/null +++ b/arch/x86/kernel/genx2apic_phys.c @@ -0,0 +1,159 @@ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static int x2apic_phys; + +static int set_x2apic_phys_mode(char *arg) +{ + x2apic_phys = 1; + return 0; +} +early_param("x2apic_phys", set_x2apic_phys_mode); + +static int __init x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +{ + if (cpu_has_x2apic && x2apic_phys) + return 1; + + return 0; +} + +/* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ + +static cpumask_t x2apic_target_cpus(void) +{ + return cpumask_of_cpu(0); +} + +static cpumask_t x2apic_vector_allocation_domain(int cpu) +{ + cpumask_t domain = CPU_MASK_NONE; + cpu_set(cpu, domain); + return domain; +} + +static void __x2apic_send_IPI_dest(unsigned int apicid, int vector, + unsigned int dest) +{ + unsigned long cfg; + + cfg = __prepare_ICR(0, vector, dest); + + /* + * send the IPI. + */ + x2apic_icr_write(cfg, apicid); +} + +static void x2apic_send_IPI_mask(cpumask_t mask, int vector) +{ + unsigned long flags; + unsigned long query_cpu; + + local_irq_save(flags); + for_each_cpu_mask(query_cpu, mask) { + __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), + vector, APIC_DEST_PHYSICAL); + } + local_irq_restore(flags); +} + +static void x2apic_send_IPI_allbutself(int vector) +{ + cpumask_t mask = cpu_online_map; + + cpu_clear(smp_processor_id(), mask); + + if (!cpus_empty(mask)) + x2apic_send_IPI_mask(mask, vector); +} + +static void x2apic_send_IPI_all(int vector) +{ + x2apic_send_IPI_mask(cpu_online_map, vector); +} + +static int x2apic_apic_id_registered(void) +{ + return 1; +} + +static unsigned int x2apic_cpu_mask_to_apicid(cpumask_t cpumask) +{ + int cpu; + + /* + * We're using fixed IRQ delivery, can only return one phys APIC ID. + * May as well be the first. + */ + cpu = first_cpu(cpumask); + if ((unsigned)cpu < NR_CPUS) + return per_cpu(x86_cpu_to_apicid, cpu); + else + return BAD_APICID; +} + +static unsigned int get_apic_id(unsigned long x) +{ + unsigned int id; + + id = x; + return id; +} + +static unsigned long set_apic_id(unsigned int id) +{ + unsigned long x; + + x = id; + return x; +} + +static unsigned int x2apic_read_id(void) +{ + return apic_read(APIC_ID); +} + +static unsigned int phys_pkg_id(int index_msb) +{ + return x2apic_read_id() >> index_msb; +} + +void x2apic_send_IPI_self(int vector) +{ + apic_write(APIC_SELF_IPI, vector); +} + +void init_x2apic_ldr(void) +{ + return; +} + +struct genapic apic_x2apic_phys = { + .name = "physical x2apic", + .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, + .int_delivery_mode = dest_Fixed, + .int_dest_mode = (APIC_DEST_PHYSICAL != 0), + .target_cpus = x2apic_target_cpus, + .vector_allocation_domain = x2apic_vector_allocation_domain, + .apic_id_registered = x2apic_apic_id_registered, + .init_apic_ldr = init_x2apic_ldr, + .send_IPI_all = x2apic_send_IPI_all, + .send_IPI_allbutself = x2apic_send_IPI_allbutself, + .send_IPI_mask = x2apic_send_IPI_mask, + .send_IPI_self = x2apic_send_IPI_self, + .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid, + .phys_pkg_id = phys_pkg_id, + .get_apic_id = get_apic_id, + .set_apic_id = set_apic_id, + .apic_id_mask = (0xFFFFFFFFu), +}; diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c index ebf13908a743b6cd8cbdc231d0758f2388b92243..3fe472223a993b88ed95a8bea114466cdc488e62 100644 --- a/arch/x86/kernel/genx2apic_uv_x.c +++ b/arch/x86/kernel/genx2apic_uv_x.c @@ -5,23 +5,55 @@ * * SGI UV APIC functions (note: not an Intel compatible APIC) * - * Copyright (C) 2007 Silicon Graphics, Inc. All rights reserved. + * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. */ +#include #include #include #include -#include #include #include #include #include #include +#include #include #include #include +#include #include #include +#include + +DEFINE_PER_CPU(int, x2apic_extra_bits); + +static enum uv_system_type uv_system_type; + +static int __init uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) +{ + if (!strcmp(oem_id, "SGI")) { + if (!strcmp(oem_table_id, "UVL")) + uv_system_type = UV_LEGACY_APIC; + else if (!strcmp(oem_table_id, "UVX")) + uv_system_type = UV_X2APIC; + else if (!strcmp(oem_table_id, "UVH")) { + uv_system_type = UV_NON_UNIQUE_APIC; + return 1; + } + } + return 0; +} + +enum uv_system_type get_uv_system_type(void) +{ + return uv_system_type; +} + +int is_uv_system(void) +{ + return uv_system_type != UV_NONE; +} DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info); @@ -38,6 +70,9 @@ EXPORT_SYMBOL_GPL(uv_cpu_to_blade); short uv_possible_blades; EXPORT_SYMBOL_GPL(uv_possible_blades); +unsigned long sn_rtc_cycles_per_second; +EXPORT_SYMBOL(sn_rtc_cycles_per_second); + /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */ static cpumask_t uv_target_cpus(void) @@ -55,44 +90,44 @@ static cpumask_t uv_vector_allocation_domain(int cpu) int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip) { unsigned long val; - int nasid; + int pnode; - nasid = uv_apicid_to_nasid(phys_apicid); + pnode = uv_apicid_to_pnode(phys_apicid); val = (1UL << UVH_IPI_INT_SEND_SHFT) | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | APIC_DM_INIT; - uv_write_global_mmr64(nasid, UVH_IPI_INT, val); + uv_write_global_mmr64(pnode, UVH_IPI_INT, val); mdelay(10); val = (1UL << UVH_IPI_INT_SEND_SHFT) | (phys_apicid << UVH_IPI_INT_APIC_ID_SHFT) | (((long)start_rip << UVH_IPI_INT_VECTOR_SHFT) >> 12) | APIC_DM_STARTUP; - uv_write_global_mmr64(nasid, UVH_IPI_INT, val); + uv_write_global_mmr64(pnode, UVH_IPI_INT, val); return 0; } static void uv_send_IPI_one(int cpu, int vector) { unsigned long val, apicid, lapicid; - int nasid; + int pnode; apicid = per_cpu(x86_cpu_to_apicid, cpu); /* ZZZ - cache node-local ? */ lapicid = apicid & 0x3f; /* ZZZ macro needed */ - nasid = uv_apicid_to_nasid(apicid); + pnode = uv_apicid_to_pnode(apicid); val = (1UL << UVH_IPI_INT_SEND_SHFT) | (lapicid << UVH_IPI_INT_APIC_ID_SHFT) | (vector << UVH_IPI_INT_VECTOR_SHFT); - uv_write_global_mmr64(nasid, UVH_IPI_INT, val); + uv_write_global_mmr64(pnode, UVH_IPI_INT, val); } static void uv_send_IPI_mask(cpumask_t mask, int vector) { unsigned int cpu; - for (cpu = 0; cpu < NR_CPUS; ++cpu) + for_each_possible_cpu(cpu) if (cpu_isset(cpu, mask)) uv_send_IPI_one(cpu, vector); } @@ -117,6 +152,10 @@ static int uv_apic_id_registered(void) return 1; } +static void uv_init_apic_ldr(void) +{ +} + static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask) { int cpu; @@ -126,15 +165,40 @@ static unsigned int uv_cpu_mask_to_apicid(cpumask_t cpumask) * May as well be the first. */ cpu = first_cpu(cpumask); - if ((unsigned)cpu < NR_CPUS) + if ((unsigned)cpu < nr_cpu_ids) return per_cpu(x86_cpu_to_apicid, cpu); else return BAD_APICID; } +static unsigned int get_apic_id(unsigned long x) +{ + unsigned int id; + + WARN_ON(preemptible() && num_online_cpus() > 1); + id = x | __get_cpu_var(x2apic_extra_bits); + + return id; +} + +static unsigned long set_apic_id(unsigned int id) +{ + unsigned long x; + + /* maskout x2apic_extra_bits ? */ + x = id; + return x; +} + +static unsigned int uv_read_apic_id(void) +{ + + return get_apic_id(apic_read(APIC_ID)); +} + static unsigned int phys_pkg_id(int index_msb) { - return GET_APIC_ID(read_apic_id()) >> index_msb; + return uv_read_apic_id() >> index_msb; } #ifdef ZZZ /* Needs x2apic patch */ @@ -146,52 +210,181 @@ static void uv_send_IPI_self(int vector) struct genapic apic_x2apic_uv_x = { .name = "UV large system", + .acpi_madt_oem_check = uv_acpi_madt_oem_check, .int_delivery_mode = dest_Fixed, .int_dest_mode = (APIC_DEST_PHYSICAL != 0), .target_cpus = uv_target_cpus, .vector_allocation_domain = uv_vector_allocation_domain,/* Fixme ZZZ */ .apic_id_registered = uv_apic_id_registered, + .init_apic_ldr = uv_init_apic_ldr, .send_IPI_all = uv_send_IPI_all, .send_IPI_allbutself = uv_send_IPI_allbutself, .send_IPI_mask = uv_send_IPI_mask, /* ZZZ.send_IPI_self = uv_send_IPI_self, */ .cpu_mask_to_apicid = uv_cpu_mask_to_apicid, .phys_pkg_id = phys_pkg_id, /* Fixme ZZZ */ + .get_apic_id = get_apic_id, + .set_apic_id = set_apic_id, + .apic_id_mask = (0xFFFFFFFFu), }; -static __cpuinit void set_x2apic_extra_bits(int nasid) +static __cpuinit void set_x2apic_extra_bits(int pnode) { - __get_cpu_var(x2apic_extra_bits) = ((nasid >> 1) << 6); + __get_cpu_var(x2apic_extra_bits) = (pnode << 6); } /* * Called on boot cpu. */ +static __init int boot_pnode_to_blade(int pnode) +{ + int blade; + + for (blade = 0; blade < uv_num_possible_blades(); blade++) + if (pnode == uv_blade_info[blade].pnode) + return blade; + BUG(); +} + +struct redir_addr { + unsigned long redirect; + unsigned long alias; +}; + +#define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT + +static __initdata struct redir_addr redir_addrs[] = { + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG}, + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG}, + {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG}, +}; + +static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size) +{ + union uvh_si_alias0_overlay_config_u alias; + union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect; + int i; + + for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) { + alias.v = uv_read_local_mmr(redir_addrs[i].alias); + if (alias.s.base == 0) { + *size = (1UL << alias.s.m_alias); + redirect.v = uv_read_local_mmr(redir_addrs[i].redirect); + *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT; + return; + } + } + BUG(); +} + +static __init void map_low_mmrs(void) +{ + init_extra_mapping_uc(UV_GLOBAL_MMR32_BASE, UV_GLOBAL_MMR32_SIZE); + init_extra_mapping_uc(UV_LOCAL_MMR_BASE, UV_LOCAL_MMR_SIZE); +} + +enum map_type {map_wb, map_uc}; + +static void map_high(char *id, unsigned long base, int shift, enum map_type map_type) +{ + unsigned long bytes, paddr; + + paddr = base << shift; + bytes = (1UL << shift); + printk(KERN_INFO "UV: Map %s_HI 0x%lx - 0x%lx\n", id, paddr, + paddr + bytes); + if (map_type == map_uc) + init_extra_mapping_uc(paddr, bytes); + else + init_extra_mapping_wb(paddr, bytes); + +} +static __init void map_gru_high(int max_pnode) +{ + union uvh_rh_gam_gru_overlay_config_mmr_u gru; + int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; + + gru.v = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR); + if (gru.s.enable) + map_high("GRU", gru.s.base, shift, map_wb); +} + +static __init void map_config_high(int max_pnode) +{ + union uvh_rh_gam_cfg_overlay_config_mmr_u cfg; + int shift = UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_SHFT; + + cfg.v = uv_read_local_mmr(UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR); + if (cfg.s.enable) + map_high("CONFIG", cfg.s.base, shift, map_uc); +} + +static __init void map_mmr_high(int max_pnode) +{ + union uvh_rh_gam_mmr_overlay_config_mmr_u mmr; + int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT; + + mmr.v = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR); + if (mmr.s.enable) + map_high("MMR", mmr.s.base, shift, map_uc); +} + +static __init void map_mmioh_high(int max_pnode) +{ + union uvh_rh_gam_mmioh_overlay_config_mmr_u mmioh; + int shift = UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT; + + mmioh.v = uv_read_local_mmr(UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR); + if (mmioh.s.enable) + map_high("MMIOH", mmioh.s.base, shift, map_uc); +} + +static __init void uv_rtc_init(void) +{ + long status, ticks_per_sec, drift; + + status = + x86_bios_freq_base(BIOS_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec, + &drift); + if (status != 0 || ticks_per_sec < 100000) { + printk(KERN_WARNING + "unable to determine platform RTC clock frequency, " + "guessing.\n"); + /* BIOS gives wrong value for clock freq. so guess */ + sn_rtc_cycles_per_second = 1000000000000UL / 30000UL; + } else + sn_rtc_cycles_per_second = ticks_per_sec; +} + static __init void uv_system_init(void) { union uvh_si_addr_map_config_u m_n_config; - int bytes, nid, cpu, lcpu, nasid, last_nasid, blade; - unsigned long mmr_base; + union uvh_node_id_u node_id; + unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size; + int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val; + int max_pnode = 0; + unsigned long mmr_base, present; + + map_low_mmrs(); m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG); + m_val = m_n_config.s.m_skt; + n_val = m_n_config.s.n_skt; mmr_base = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) & ~UV_MMR_ENABLE; printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base); - last_nasid = -1; - for_each_possible_cpu(cpu) { - nid = cpu_to_node(cpu); - nasid = uv_apicid_to_nasid(per_cpu(x86_cpu_to_apicid, cpu)); - if (nasid != last_nasid) - uv_possible_blades++; - last_nasid = nasid; - } + for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) + uv_possible_blades += + hweight64(uv_read_local_mmr( UVH_NODE_PRESENT_TABLE + i * 8)); printk(KERN_DEBUG "UV: Found %d blades\n", uv_num_possible_blades()); bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades(); uv_blade_info = alloc_bootmem_pages(bytes); + get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size); + bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes(); uv_node_to_blade = alloc_bootmem_pages(bytes); memset(uv_node_to_blade, 255, bytes); @@ -200,43 +393,64 @@ static __init void uv_system_init(void) uv_cpu_to_blade = alloc_bootmem_pages(bytes); memset(uv_cpu_to_blade, 255, bytes); - last_nasid = -1; - blade = -1; - lcpu = -1; - for_each_possible_cpu(cpu) { - nid = cpu_to_node(cpu); - nasid = uv_apicid_to_nasid(per_cpu(x86_cpu_to_apicid, cpu)); - if (nasid != last_nasid) { - blade++; - lcpu = -1; - uv_blade_info[blade].nr_posible_cpus = 0; + blade = 0; + for (i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++) { + present = uv_read_local_mmr(UVH_NODE_PRESENT_TABLE + i * 8); + for (j = 0; j < 64; j++) { + if (!test_bit(j, &present)) + continue; + uv_blade_info[blade].pnode = (i * 64 + j); + uv_blade_info[blade].nr_possible_cpus = 0; uv_blade_info[blade].nr_online_cpus = 0; + blade++; } - last_nasid = nasid; - lcpu++; + } + + node_id.v = uv_read_local_mmr(UVH_NODE_ID); + gnode_upper = (((unsigned long)node_id.s.node_id) & + ~((1 << n_val) - 1)) << m_val; - uv_cpu_hub_info(cpu)->m_val = m_n_config.s.m_skt; - uv_cpu_hub_info(cpu)->n_val = m_n_config.s.n_skt; + uv_rtc_init(); + + for_each_present_cpu(cpu) { + nid = cpu_to_node(cpu); + pnode = uv_apicid_to_pnode(per_cpu(x86_cpu_to_apicid, cpu)); + blade = boot_pnode_to_blade(pnode); + lcpu = uv_blade_info[blade].nr_possible_cpus; + uv_blade_info[blade].nr_possible_cpus++; + + uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base; + uv_cpu_hub_info(cpu)->lowmem_remap_top = + lowmem_redir_base + lowmem_redir_size; + uv_cpu_hub_info(cpu)->m_val = m_val; + uv_cpu_hub_info(cpu)->n_val = m_val; uv_cpu_hub_info(cpu)->numa_blade_id = blade; uv_cpu_hub_info(cpu)->blade_processor_id = lcpu; - uv_cpu_hub_info(cpu)->local_nasid = nasid; - uv_cpu_hub_info(cpu)->gnode_upper = - nasid & ~((1 << uv_hub_info->n_val) - 1); + uv_cpu_hub_info(cpu)->pnode = pnode; + uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) - 1; + uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1; + uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper; uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */ - uv_blade_info[blade].nasid = nasid; - uv_blade_info[blade].nr_posible_cpus++; uv_node_to_blade[nid] = blade; uv_cpu_to_blade[cpu] = blade; + max_pnode = max(pnode, max_pnode); - printk(KERN_DEBUG "UV cpu %d, apicid 0x%x, nasid %d, nid %d\n", - cpu, per_cpu(x86_cpu_to_apicid, cpu), nasid, nid); - printk(KERN_DEBUG "UV lcpu %d, blade %d\n", lcpu, blade); + printk(KERN_DEBUG "UV: cpu %d, apicid 0x%x, pnode %d, nid %d, " + "lcpu %d, blade %d\n", + cpu, per_cpu(x86_cpu_to_apicid, cpu), pnode, nid, + lcpu, blade); } + + map_gru_high(max_pnode); + map_mmr_high(max_pnode); + map_config_high(max_pnode); + map_mmioh_high(max_pnode); } /* * Called on each cpu to initialize the per_cpu UV data area. + * ZZZ hotplug not supported yet */ void __cpuinit uv_cpu_init(void) { @@ -246,5 +460,7 @@ void __cpuinit uv_cpu_init(void) uv_blade_info[uv_numa_blade_id()].nr_online_cpus++; if (get_uv_system_type() == UV_NON_UNIQUE_APIC) - set_x2apic_extra_bits(uv_hub_info->local_nasid); + set_x2apic_extra_bits(uv_hub_info->pnode); } + + diff --git a/arch/x86/kernel/head.c b/arch/x86/kernel/head.c new file mode 100644 index 0000000000000000000000000000000000000000..3e66bd364a9db3cf8f3fb624f96eeb7075364d78 --- /dev/null +++ b/arch/x86/kernel/head.c @@ -0,0 +1,55 @@ +#include +#include + +#include +#include + +#define BIOS_LOWMEM_KILOBYTES 0x413 + +/* + * The BIOS places the EBDA/XBDA at the top of conventional + * memory, and usually decreases the reported amount of + * conventional memory (int 0x12) too. This also contains a + * workaround for Dell systems that neglect to reserve EBDA. + * The same workaround also avoids a problem with the AMD768MPX + * chipset: reserve a page before VGA to prevent PCI prefetch + * into it (errata #56). Usually the page is reserved anyways, + * unless you have no PS/2 mouse plugged in. + */ +void __init reserve_ebda_region(void) +{ + unsigned int lowmem, ebda_addr; + + /* To determine the position of the EBDA and the */ + /* end of conventional memory, we need to look at */ + /* the BIOS data area. In a paravirtual environment */ + /* that area is absent. We'll just have to assume */ + /* that the paravirt case can handle memory setup */ + /* correctly, without our help. */ + if (paravirt_enabled()) + return; + + /* end of low (conventional) memory */ + lowmem = *(unsigned short *)__va(BIOS_LOWMEM_KILOBYTES); + lowmem <<= 10; + + /* start of EBDA area */ + ebda_addr = get_bios_ebda(); + + /* Fixup: bios puts an EBDA in the top 64K segment */ + /* of conventional memory, but does not adjust lowmem. */ + if ((lowmem - ebda_addr) <= 0x10000) + lowmem = ebda_addr; + + /* Fixup: bios does not report an EBDA at all. */ + /* Some old Dells seem to need 4k anyhow (bugzilla 2990) */ + if ((ebda_addr == 0) && (lowmem >= 0x9f000)) + lowmem = 0x9f000; + + /* Paranoia: should never happen, but... */ + if ((lowmem == 0) || (lowmem >= 0x100000)) + lowmem = 0x9f000; + + /* reserve all memory between lowmem and the 1MB mark */ + reserve_early_overlap_ok(lowmem, 0x100000, "BIOS reserved"); +} diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c index 3db0590589276e5ecbc1d74dd1331264bc414f11..fa1d25dd83e3fa18cc2a445841c61e1e1b8b571c 100644 --- a/arch/x86/kernel/head32.c +++ b/arch/x86/kernel/head32.c @@ -8,7 +8,34 @@ #include #include +#include +#include +#include +#include + void __init i386_start_kernel(void) { + reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS"); + +#ifdef CONFIG_BLK_DEV_INITRD + /* Reserve INITRD */ + if (boot_params.hdr.type_of_loader && boot_params.hdr.ramdisk_image) { + u64 ramdisk_image = boot_params.hdr.ramdisk_image; + u64 ramdisk_size = boot_params.hdr.ramdisk_size; + u64 ramdisk_end = ramdisk_image + ramdisk_size; + reserve_early(ramdisk_image, ramdisk_end, "RAMDISK"); + } +#endif + reserve_early(init_pg_tables_start, init_pg_tables_end, + "INIT_PG_TABLE"); + + reserve_ebda_region(); + + /* + * At this point everything still needed from the boot loader + * or BIOS or kernel text should be early reserved or marked not + * RAM in e820. All other memory is free game. + */ + start_kernel(); } diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index e25c57b8aa844937742f246288e9ffa2e2be5229..1b318e903bf63f14bd4f514ad8fd5916289bb979 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -25,6 +25,27 @@ #include #include +/* boot cpu pda */ +static struct x8664_pda _boot_cpu_pda __read_mostly; + +#ifdef CONFIG_SMP +/* + * We install an empty cpu_pda pointer table to indicate to early users + * (numa_set_node) that the cpu_pda pointer table for cpus other than + * the boot cpu is not yet setup. + */ +static struct x8664_pda *__cpu_pda[NR_CPUS] __initdata; +#else +static struct x8664_pda *__cpu_pda[NR_CPUS] __read_mostly; +#endif + +void __init x86_64_init_pda(void) +{ + _cpu_pda = __cpu_pda; + cpu_pda(0) = &_boot_cpu_pda; + pda_init(0); +} + static void __init zap_identity_mappings(void) { pgd_t *pgd = pgd_offset_k(0UL); @@ -51,74 +72,6 @@ static void __init copy_bootdata(char *real_mode_data) } } -#define BIOS_LOWMEM_KILOBYTES 0x413 - -/* - * The BIOS places the EBDA/XBDA at the top of conventional - * memory, and usually decreases the reported amount of - * conventional memory (int 0x12) too. This also contains a - * workaround for Dell systems that neglect to reserve EBDA. - * The same workaround also avoids a problem with the AMD768MPX - * chipset: reserve a page before VGA to prevent PCI prefetch - * into it (errata #56). Usually the page is reserved anyways, - * unless you have no PS/2 mouse plugged in. - */ -static void __init reserve_ebda_region(void) -{ - unsigned int lowmem, ebda_addr; - - /* To determine the position of the EBDA and the */ - /* end of conventional memory, we need to look at */ - /* the BIOS data area. In a paravirtual environment */ - /* that area is absent. We'll just have to assume */ - /* that the paravirt case can handle memory setup */ - /* correctly, without our help. */ - if (paravirt_enabled()) - return; - - /* end of low (conventional) memory */ - lowmem = *(unsigned short *)__va(BIOS_LOWMEM_KILOBYTES); - lowmem <<= 10; - - /* start of EBDA area */ - ebda_addr = get_bios_ebda(); - - /* Fixup: bios puts an EBDA in the top 64K segment */ - /* of conventional memory, but does not adjust lowmem. */ - if ((lowmem - ebda_addr) <= 0x10000) - lowmem = ebda_addr; - - /* Fixup: bios does not report an EBDA at all. */ - /* Some old Dells seem to need 4k anyhow (bugzilla 2990) */ - if ((ebda_addr == 0) && (lowmem >= 0x9f000)) - lowmem = 0x9f000; - - /* Paranoia: should never happen, but... */ - if ((lowmem == 0) || (lowmem >= 0x100000)) - lowmem = 0x9f000; - - /* reserve all memory between lowmem and the 1MB mark */ - reserve_early(lowmem, 0x100000, "BIOS reserved"); -} - -static void __init reserve_setup_data(void) -{ - struct setup_data *data; - unsigned long pa_data; - char buf[32]; - - if (boot_params.hdr.version < 0x0209) - return; - pa_data = boot_params.hdr.setup_data; - while (pa_data) { - data = early_ioremap(pa_data, sizeof(*data)); - sprintf(buf, "setup data %x", data->type); - reserve_early(pa_data, pa_data+sizeof(*data)+data->len, buf); - pa_data = data->next; - early_iounmap(data, sizeof(*data)); - } -} - void __init x86_64_start_kernel(char * real_mode_data) { int i; @@ -156,10 +109,15 @@ void __init x86_64_start_kernel(char * real_mode_data) early_printk("Kernel alive\n"); - for (i = 0; i < NR_CPUS; i++) - cpu_pda(i) = &boot_cpu_pda[i]; + x86_64_init_pda(); - pda_init(0); + early_printk("Kernel really alive\n"); + + x86_64_start_reservations(real_mode_data); +} + +void __init x86_64_start_reservations(char *real_mode_data) +{ copy_bootdata(__va(real_mode_data)); reserve_early(__pa_symbol(&_text), __pa_symbol(&_end), "TEXT DATA BSS"); @@ -175,7 +133,6 @@ void __init x86_64_start_kernel(char * real_mode_data) #endif reserve_ebda_region(); - reserve_setup_data(); /* * At this point everything still needed from the boot loader diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S index f7357cc0162c2f1c4786b3208e8524b51837fef8..a7010c3a377a436f29552e3b26a2b9a0b7a35084 100644 --- a/arch/x86/kernel/head_32.S +++ b/arch/x86/kernel/head_32.S @@ -194,6 +194,7 @@ default_entry: xorl %ebx,%ebx /* %ebx is kept at zero */ movl $pa(pg0), %edi + movl %edi, pa(init_pg_tables_start) movl $pa(swapper_pg_pmd), %edx movl $PTE_ATTR, %eax 10: @@ -219,6 +220,8 @@ default_entry: jb 10b 1: movl %edi,pa(init_pg_tables_end) + shrl $12, %eax + movl %eax, pa(max_pfn_mapped) /* Do early initialization of the fixmap area */ movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax @@ -228,6 +231,7 @@ default_entry: page_pde_offset = (__PAGE_OFFSET >> 20); movl $pa(pg0), %edi + movl %edi, pa(init_pg_tables_start) movl $pa(swapper_pg_dir), %edx movl $PTE_ATTR, %eax 10: @@ -249,6 +253,8 @@ page_pde_offset = (__PAGE_OFFSET >> 20); cmpl %ebp,%eax jb 10b movl %edi,pa(init_pg_tables_end) + shrl $12, %eax + movl %eax, pa(max_pfn_mapped) /* Do early initialization of the fixmap area */ movl $pa(swapper_pg_fixmap)+PDE_ATTR,%eax @@ -446,10 +452,10 @@ is386: movl $2,%ecx # set MP je 1f movl $(__KERNEL_PERCPU), %eax movl %eax,%fs # set this cpu's percpu - jmp initialize_secondary # all other CPUs call initialize_secondary + movl (stack_start), %esp 1: #endif /* CONFIG_SMP */ - jmp i386_start_kernel + jmp *(initial_code) /* * We depend on ET to be correct. This checks for 287/387. @@ -592,6 +598,11 @@ ignore_int: #endif iret +.section .cpuinit.data,"wa" +.align 4 +ENTRY(initial_code) + .long i386_start_kernel + .section .text /* * Real beginning of normal "text" segment diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index b817974ef9420bba5702327a1089156dcb5d72c3..db3280afe886f1b97a9f2c383afc4ac80993a060 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -18,6 +18,7 @@ #include #include #include +#include #ifdef CONFIG_PARAVIRT #include @@ -31,6 +32,13 @@ * */ +#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) + +L4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET) +L3_PAGE_OFFSET = pud_index(__PAGE_OFFSET) +L4_START_KERNEL = pgd_index(__START_KERNEL_map) +L3_START_KERNEL = pud_index(__START_KERNEL_map) + .text .section .text.head .code64 @@ -76,8 +84,8 @@ startup_64: /* Fixup the physical addresses in the page table */ addq %rbp, init_level4_pgt + 0(%rip) - addq %rbp, init_level4_pgt + (258*8)(%rip) - addq %rbp, init_level4_pgt + (511*8)(%rip) + addq %rbp, init_level4_pgt + (L4_PAGE_OFFSET*8)(%rip) + addq %rbp, init_level4_pgt + (L4_START_KERNEL*8)(%rip) addq %rbp, level3_ident_pgt + 0(%rip) @@ -154,9 +162,7 @@ ENTRY(secondary_startup_64) */ /* Enable PAE mode and PGE */ - xorq %rax, %rax - btsq $5, %rax - btsq $7, %rax + movl $(X86_CR4_PAE | X86_CR4_PGE), %eax movq %rax, %cr4 /* Setup early boot stage 4 level pagetables. */ @@ -184,19 +190,15 @@ ENTRY(secondary_startup_64) 1: wrmsr /* Make changes effective */ /* Setup cr0 */ -#define CR0_PM 1 /* protected mode */ -#define CR0_MP (1<<1) -#define CR0_ET (1<<4) -#define CR0_NE (1<<5) -#define CR0_WP (1<<16) -#define CR0_AM (1<<18) -#define CR0_PAGING (1<<31) - movl $CR0_PM|CR0_MP|CR0_ET|CR0_NE|CR0_WP|CR0_AM|CR0_PAGING,%eax +#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \ + X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \ + X86_CR0_PG) + movl $CR0_STATE, %eax /* Make changes effective */ movq %rax, %cr0 /* Setup a boot time stack */ - movq init_rsp(%rip),%rsp + movq stack_start(%rip),%rsp /* zero EFLAGS after setting rsp */ pushq $0 @@ -208,7 +210,7 @@ ENTRY(secondary_startup_64) * addresses where we're currently running on. We have to do that here * because in 32bit we couldn't load a 64bit linear address. */ - lgdt cpu_gdt_descr(%rip) + lgdt early_gdt_descr(%rip) /* set up data segments. actually 0 would do too */ movl $__KERNEL_DS,%eax @@ -257,8 +259,9 @@ ENTRY(secondary_startup_64) .quad x86_64_start_kernel __FINITDATA - ENTRY(init_rsp) + ENTRY(stack_start) .quad init_thread_union+THREAD_SIZE-8 + .word 0 bad_address: jmp bad_address @@ -327,11 +330,11 @@ early_idt_ripmsg: ENTRY(name) /* Automate the creation of 1 to 1 mapping pmd entries */ -#define PMDS(START, PERM, COUNT) \ - i = 0 ; \ - .rept (COUNT) ; \ - .quad (START) + (i << 21) + (PERM) ; \ - i = i + 1 ; \ +#define PMDS(START, PERM, COUNT) \ + i = 0 ; \ + .rept (COUNT) ; \ + .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ + i = i + 1 ; \ .endr /* @@ -342,9 +345,9 @@ ENTRY(name) */ NEXT_PAGE(init_level4_pgt) .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE - .fill 257,8,0 + .org init_level4_pgt + L4_PAGE_OFFSET*8, 0 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE - .fill 252,8,0 + .org init_level4_pgt + L4_START_KERNEL*8, 0 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */ .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE @@ -353,7 +356,7 @@ NEXT_PAGE(level3_ident_pgt) .fill 511,8,0 NEXT_PAGE(level3_kernel_pgt) - .fill 510,8,0 + .fill L3_START_KERNEL,8,0 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */ .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE @@ -384,7 +387,7 @@ NEXT_PAGE(level2_kernel_pgt) * If you want to increase this then increase MODULES_VADDR * too.) */ - PMDS(0, __PAGE_KERNEL_LARGE_EXEC|_PAGE_GLOBAL, + PMDS(0, __PAGE_KERNEL_LARGE_EXEC, KERNEL_IMAGE_SIZE/PMD_SIZE) NEXT_PAGE(level2_spare_pgt) @@ -395,54 +398,17 @@ NEXT_PAGE(level2_spare_pgt) .data .align 16 - .globl cpu_gdt_descr -cpu_gdt_descr: - .word gdt_end-cpu_gdt_table-1 -gdt: - .quad cpu_gdt_table -#ifdef CONFIG_SMP - .rept NR_CPUS-1 - .word 0 - .quad 0 - .endr -#endif + .globl early_gdt_descr +early_gdt_descr: + .word GDT_ENTRIES*8-1 + .quad per_cpu__gdt_page ENTRY(phys_base) /* This must match the first entry in level2_kernel_pgt */ .quad 0x0000000000000000 -/* We need valid kernel segments for data and code in long mode too - * IRET will check the segment types kkeil 2000/10/28 - * Also sysret mandates a special GDT layout - */ - - .section .data.page_aligned, "aw" - .align PAGE_SIZE - -/* The TLS descriptors are currently at a different place compared to i386. - Hopefully nobody expects them at a fixed place (Wine?) */ +#include "../../x86/xen/xen-head.S" -ENTRY(cpu_gdt_table) - .quad 0x0000000000000000 /* NULL descriptor */ - .quad 0x00cf9b000000ffff /* __KERNEL32_CS */ - .quad 0x00af9b000000ffff /* __KERNEL_CS */ - .quad 0x00cf93000000ffff /* __KERNEL_DS */ - .quad 0x00cffb000000ffff /* __USER32_CS */ - .quad 0x00cff3000000ffff /* __USER_DS, __USER32_DS */ - .quad 0x00affb000000ffff /* __USER_CS */ - .quad 0x0 /* unused */ - .quad 0,0 /* TSS */ - .quad 0,0 /* LDT */ - .quad 0,0,0 /* three TLS descriptors */ - .quad 0x0000f40000000000 /* node/CPU stored in limit */ -gdt_end: - /* asm/segment.h:GDT_ENTRIES must match this */ - /* This should be a multiple of the cache line size */ - /* GDTs of other CPUs are now dynamically allocated */ - - /* zero the remaining page */ - .fill PAGE_SIZE / 8 - GDT_ENTRIES,8,0 - .section .bss, "aw", @nobits .align L1_CACHE_BYTES ENTRY(idt_table) diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index 9b5cfcdfc426cc194365020c061c6c0b46e54083..ad2b15a1334d919419b9040b52c2062dd5d3666d 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c @@ -17,7 +17,7 @@ /* FSEC = 10^-15 NSEC = 10^-9 */ -#define FSEC_PER_NSEC 1000000 +#define FSEC_PER_NSEC 1000000L /* * HPET address is set in acpi/boot.c, when an ACPI entry exists @@ -36,26 +36,15 @@ static inline void hpet_writel(unsigned long d, unsigned long a) } #ifdef CONFIG_X86_64 - #include - -static inline void hpet_set_mapping(void) -{ - set_fixmap_nocache(FIX_HPET_BASE, hpet_address); - __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE); - hpet_virt_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE); -} - -static inline void hpet_clear_mapping(void) -{ - hpet_virt_address = NULL; -} - -#else +#endif static inline void hpet_set_mapping(void) { hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE); +#ifdef CONFIG_X86_64 + __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE); +#endif } static inline void hpet_clear_mapping(void) @@ -63,7 +52,6 @@ static inline void hpet_clear_mapping(void) iounmap(hpet_virt_address); hpet_virt_address = NULL; } -#endif /* * HPET command line enable / disable @@ -206,20 +194,19 @@ static void hpet_enable_legacy_int(void) static void hpet_legacy_clockevent_register(void) { - uint64_t hpet_freq; - /* Start HPET legacy interrupts */ hpet_enable_legacy_int(); /* - * The period is a femto seconds value. We need to calculate the - * scaled math multiplication factor for nanosecond to hpet tick - * conversion. + * The mult factor is defined as (include/linux/clockchips.h) + * mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h) + * hpet_period is in units of femtoseconds (per cycle), so + * mult/2^shift = cyc/ns = 10^6/hpet_period + * mult = (10^6 * 2^shift)/hpet_period + * mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period */ - hpet_freq = 1000000000000000ULL; - do_div(hpet_freq, hpet_period); - hpet_clockevent.mult = div_sc((unsigned long) hpet_freq, - NSEC_PER_SEC, hpet_clockevent.shift); + hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC, + hpet_period, hpet_clockevent.shift); /* Calculate the min / max delta */ hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, &hpet_clockevent); @@ -324,7 +311,7 @@ static struct clocksource clocksource_hpet = { static int hpet_clocksource_register(void) { - u64 tmp, start, now; + u64 start, now; cycle_t t1; /* Start the counter */ @@ -351,21 +338,15 @@ static int hpet_clocksource_register(void) return -ENODEV; } - /* Initialize and register HPET clocksource - * - * hpet period is in femto seconds per cycle - * so we need to convert this to ns/cyc units - * approximated by mult/2^shift - * - * fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift - * fsec/cyc * 1ns/1000000fsec * 2^shift = mult - * fsec/cyc * 2^shift * 1nsec/1000000fsec = mult - * (fsec/cyc << shift)/1000000 = mult - * (hpet_period << shift)/FSEC_PER_NSEC = mult + /* + * The definition of mult is (include/linux/clocksource.h) + * mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc + * so we first need to convert hpet_period to ns/cyc units: + * mult/2^shift = ns/cyc = hpet_period/10^6 + * mult = (hpet_period * 2^shift)/10^6 + * mult = (hpet_period << shift)/FSEC_PER_NSEC */ - tmp = (u64)hpet_period << HPET_SHIFT; - do_div(tmp, FSEC_PER_NSEC); - clocksource_hpet.mult = (u32)tmp; + clocksource_hpet.mult = div_sc(hpet_period, FSEC_PER_NSEC, HPET_SHIFT); clocksource_register(&clocksource_hpet); @@ -487,7 +468,7 @@ void hpet_disable(void) #define RTC_NUM_INTS 1 static unsigned long hpet_rtc_flags; -static unsigned long hpet_prev_update_sec; +static int hpet_prev_update_sec; static struct rtc_time hpet_alarm_time; static unsigned long hpet_pie_count; static unsigned long hpet_t1_cmp; @@ -594,6 +575,9 @@ int hpet_set_rtc_irq_bit(unsigned long bit_mask) hpet_rtc_flags |= bit_mask; + if ((bit_mask & RTC_UIE) && !(oldbits & RTC_UIE)) + hpet_prev_update_sec = -1; + if (!oldbits) hpet_rtc_timer_init(); @@ -671,7 +655,7 @@ static void hpet_rtc_timer_reinit(void) if (hpet_rtc_flags & RTC_PIE) hpet_pie_count += lost_ints; if (printk_ratelimit()) - printk(KERN_WARNING "rtc: lost %d interrupts\n", + printk(KERN_WARNING "hpet1: lost %d rtc interrupts\n", lost_ints); } } @@ -689,7 +673,8 @@ irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id) if (hpet_rtc_flags & RTC_UIE && curr_time.tm_sec != hpet_prev_update_sec) { - rtc_int_flag = RTC_UF; + if (hpet_prev_update_sec >= 0) + rtc_int_flag = RTC_UF; hpet_prev_update_sec = curr_time.tm_sec; } diff --git a/arch/x86/kernel/i386_ksyms_32.c b/arch/x86/kernel/i386_ksyms_32.c index deb43785e923d09a8ba7215222e84363ad682742..dd7ebee446afaab244041868b67d89833b8d00c5 100644 --- a/arch/x86/kernel/i386_ksyms_32.c +++ b/arch/x86/kernel/i386_ksyms_32.c @@ -1,7 +1,14 @@ #include + #include -#include #include +#include +#include + +#ifdef CONFIG_FTRACE +/* mcount is defined in assembly */ +EXPORT_SYMBOL(mcount); +#endif /* Networking helper routines. */ EXPORT_SYMBOL(csum_partial_copy_generic); diff --git a/arch/x86/kernel/i387.c b/arch/x86/kernel/i387.c index 95e80e5033c3b5c36fb66fd5ac7be4d99f04d421..eb9ddd8efb828175e7be0efcc0616257c67c5943 100644 --- a/arch/x86/kernel/i387.c +++ b/arch/x86/kernel/i387.c @@ -162,7 +162,7 @@ int xfpregs_get(struct task_struct *target, const struct user_regset *regset, int ret; if (!cpu_has_fxsr) - return -EIO; + return -ENODEV; ret = init_fpu(target); if (ret) @@ -179,7 +179,7 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset, int ret; if (!cpu_has_fxsr) - return -EIO; + return -ENODEV; ret = init_fpu(target); if (ret) diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c new file mode 100644 index 0000000000000000000000000000000000000000..4b8a53d841f7a1c71e75eb85a9fe4ecacb17d4b3 --- /dev/null +++ b/arch/x86/kernel/i8259.c @@ -0,0 +1,361 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * This is the 'legacy' 8259A Programmable Interrupt Controller, + * present in the majority of PC/AT boxes. + * plus some generic x86 specific things if generic specifics makes + * any sense at all. + */ + +static int i8259A_auto_eoi; +DEFINE_SPINLOCK(i8259A_lock); +static void mask_and_ack_8259A(unsigned int); + +struct irq_chip i8259A_chip = { + .name = "XT-PIC", + .mask = disable_8259A_irq, + .disable = disable_8259A_irq, + .unmask = enable_8259A_irq, + .mask_ack = mask_and_ack_8259A, +}; + +/* + * 8259A PIC functions to handle ISA devices: + */ + +/* + * This contains the irq mask for both 8259A irq controllers, + */ +unsigned int cached_irq_mask = 0xffff; + +/* + * Not all IRQs can be routed through the IO-APIC, eg. on certain (older) + * boards the timer interrupt is not really connected to any IO-APIC pin, + * it's fed to the master 8259A's IR0 line only. + * + * Any '1' bit in this mask means the IRQ is routed through the IO-APIC. + * this 'mixed mode' IRQ handling costs nothing because it's only used + * at IRQ setup time. + */ +unsigned long io_apic_irqs; + +void disable_8259A_irq(unsigned int irq) +{ + unsigned int mask = 1 << irq; + unsigned long flags; + + spin_lock_irqsave(&i8259A_lock, flags); + cached_irq_mask |= mask; + if (irq & 8) + outb(cached_slave_mask, PIC_SLAVE_IMR); + else + outb(cached_master_mask, PIC_MASTER_IMR); + spin_unlock_irqrestore(&i8259A_lock, flags); +} + +void enable_8259A_irq(unsigned int irq) +{ + unsigned int mask = ~(1 << irq); + unsigned long flags; + + spin_lock_irqsave(&i8259A_lock, flags); + cached_irq_mask &= mask; + if (irq & 8) + outb(cached_slave_mask, PIC_SLAVE_IMR); + else + outb(cached_master_mask, PIC_MASTER_IMR); + spin_unlock_irqrestore(&i8259A_lock, flags); +} + +int i8259A_irq_pending(unsigned int irq) +{ + unsigned int mask = 1<> 8); + spin_unlock_irqrestore(&i8259A_lock, flags); + + return ret; +} + +void make_8259A_irq(unsigned int irq) +{ + disable_irq_nosync(irq); + io_apic_irqs &= ~(1<> 8); + outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */ + return value; +} + +/* + * Careful! The 8259A is a fragile beast, it pretty + * much _has_ to be done exactly like this (mask it + * first, _then_ send the EOI, and the order of EOI + * to the two 8259s is important! + */ +static void mask_and_ack_8259A(unsigned int irq) +{ + unsigned int irqmask = 1 << irq; + unsigned long flags; + + spin_lock_irqsave(&i8259A_lock, flags); + /* + * Lightweight spurious IRQ detection. We do not want + * to overdo spurious IRQ handling - it's usually a sign + * of hardware problems, so we only do the checks we can + * do without slowing down good hardware unnecessarily. + * + * Note that IRQ7 and IRQ15 (the two spurious IRQs + * usually resulting from the 8259A-1|2 PICs) occur + * even if the IRQ is masked in the 8259A. Thus we + * can check spurious 8259A IRQs without doing the + * quite slow i8259A_irq_real() call for every IRQ. + * This does not cover 100% of spurious interrupts, + * but should be enough to warn the user that there + * is something bad going on ... + */ + if (cached_irq_mask & irqmask) + goto spurious_8259A_irq; + cached_irq_mask |= irqmask; + +handle_real_irq: + if (irq & 8) { + inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ + outb(cached_slave_mask, PIC_SLAVE_IMR); + /* 'Specific EOI' to slave */ + outb(0x60+(irq&7), PIC_SLAVE_CMD); + /* 'Specific EOI' to master-IRQ2 */ + outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); + } else { + inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ + outb(cached_master_mask, PIC_MASTER_IMR); + outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ + } + spin_unlock_irqrestore(&i8259A_lock, flags); + return; + +spurious_8259A_irq: + /* + * this is the slow path - should happen rarely. + */ + if (i8259A_irq_real(irq)) + /* + * oops, the IRQ _is_ in service according to the + * 8259A - not spurious, go handle it. + */ + goto handle_real_irq; + + { + static int spurious_irq_mask; + /* + * At this point we can be sure the IRQ is spurious, + * lets ACK and report it. [once per IRQ] + */ + if (!(spurious_irq_mask & irqmask)) { + printk(KERN_DEBUG + "spurious 8259A interrupt: IRQ%d.\n", irq); + spurious_irq_mask |= irqmask; + } + atomic_inc(&irq_err_count); + /* + * Theoretically we do not have to handle this IRQ, + * but in Linux this does not cause problems and is + * simpler for us. + */ + goto handle_real_irq; + } +} + +static char irq_trigger[2]; +/** + * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ + */ +static void restore_ELCR(char *trigger) +{ + outb(trigger[0], 0x4d0); + outb(trigger[1], 0x4d1); +} + +static void save_ELCR(char *trigger) +{ + /* IRQ 0,1,2,8,13 are marked as reserved */ + trigger[0] = inb(0x4d0) & 0xF8; + trigger[1] = inb(0x4d1) & 0xDE; +} + +static int i8259A_resume(struct sys_device *dev) +{ + init_8259A(i8259A_auto_eoi); + restore_ELCR(irq_trigger); + return 0; +} + +static int i8259A_suspend(struct sys_device *dev, pm_message_t state) +{ + save_ELCR(irq_trigger); + return 0; +} + +static int i8259A_shutdown(struct sys_device *dev) +{ + /* Put the i8259A into a quiescent state that + * the kernel initialization code can get it + * out of. + */ + outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ + outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ + return 0; +} + +static struct sysdev_class i8259_sysdev_class = { + .name = "i8259", + .suspend = i8259A_suspend, + .resume = i8259A_resume, + .shutdown = i8259A_shutdown, +}; + +static struct sys_device device_i8259A = { + .id = 0, + .cls = &i8259_sysdev_class, +}; + +static int __init i8259A_init_sysfs(void) +{ + int error = sysdev_class_register(&i8259_sysdev_class); + if (!error) + error = sysdev_register(&device_i8259A); + return error; +} + +device_initcall(i8259A_init_sysfs); + +void mask_8259A(void) +{ + unsigned long flags; + + spin_lock_irqsave(&i8259A_lock, flags); + + outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ + outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ + + spin_unlock_irqrestore(&i8259A_lock, flags); +} + +void unmask_8259A(void) +{ + unsigned long flags; + + spin_lock_irqsave(&i8259A_lock, flags); + + outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ + outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ + + spin_unlock_irqrestore(&i8259A_lock, flags); +} + +void init_8259A(int auto_eoi) +{ + unsigned long flags; + + i8259A_auto_eoi = auto_eoi; + + spin_lock_irqsave(&i8259A_lock, flags); + + outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ + outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ + + /* + * outb_pic - this has to work on a wide range of PC hardware. + */ + outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ + + /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 on x86-64, + to 0x20-0x27 on i386 */ + outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR); + + /* 8259A-1 (the master) has a slave on IR2 */ + outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); + + if (auto_eoi) /* master does Auto EOI */ + outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR); + else /* master expects normal EOI */ + outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR); + + outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */ + + /* ICW2: 8259A-2 IR0-7 mapped to IRQ8_VECTOR */ + outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR); + /* 8259A-2 is a slave on master's IR2 */ + outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR); + /* (slave's support for AEOI in flat mode is to be investigated) */ + outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); + + if (auto_eoi) + /* + * In AEOI mode we just have to mask the interrupt + * when acking. + */ + i8259A_chip.mask_ack = disable_8259A_irq; + else + i8259A_chip.mask_ack = mask_and_ack_8259A; + + udelay(100); /* wait for 8259A to initialize */ + + outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ + outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ + + spin_unlock_irqrestore(&i8259A_lock, flags); +} diff --git a/arch/x86/kernel/i8259_32.c b/arch/x86/kernel/i8259_32.c deleted file mode 100644 index fe631967d6255e3f27a675346f23359153a95299..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/i8259_32.c +++ /dev/null @@ -1,409 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * This is the 'legacy' 8259A Programmable Interrupt Controller, - * present in the majority of PC/AT boxes. - * plus some generic x86 specific things if generic specifics makes - * any sense at all. - */ - -static int i8259A_auto_eoi; -DEFINE_SPINLOCK(i8259A_lock); -static void mask_and_ack_8259A(unsigned int); - -static struct irq_chip i8259A_chip = { - .name = "XT-PIC", - .mask = disable_8259A_irq, - .disable = disable_8259A_irq, - .unmask = enable_8259A_irq, - .mask_ack = mask_and_ack_8259A, -}; - -/* - * 8259A PIC functions to handle ISA devices: - */ - -/* - * This contains the irq mask for both 8259A irq controllers, - */ -unsigned int cached_irq_mask = 0xffff; - -/* - * Not all IRQs can be routed through the IO-APIC, eg. on certain (older) - * boards the timer interrupt is not really connected to any IO-APIC pin, - * it's fed to the master 8259A's IR0 line only. - * - * Any '1' bit in this mask means the IRQ is routed through the IO-APIC. - * this 'mixed mode' IRQ handling costs nothing because it's only used - * at IRQ setup time. - */ -unsigned long io_apic_irqs; - -void disable_8259A_irq(unsigned int irq) -{ - unsigned int mask = 1 << irq; - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - cached_irq_mask |= mask; - if (irq & 8) - outb(cached_slave_mask, PIC_SLAVE_IMR); - else - outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); -} - -void enable_8259A_irq(unsigned int irq) -{ - unsigned int mask = ~(1 << irq); - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - cached_irq_mask &= mask; - if (irq & 8) - outb(cached_slave_mask, PIC_SLAVE_IMR); - else - outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); -} - -int i8259A_irq_pending(unsigned int irq) -{ - unsigned int mask = 1<> 8); - spin_unlock_irqrestore(&i8259A_lock, flags); - - return ret; -} - -void make_8259A_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - io_apic_irqs &= ~(1<> 8); - outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */ - return value; -} - -/* - * Careful! The 8259A is a fragile beast, it pretty - * much _has_ to be done exactly like this (mask it - * first, _then_ send the EOI, and the order of EOI - * to the two 8259s is important! - */ -static void mask_and_ack_8259A(unsigned int irq) -{ - unsigned int irqmask = 1 << irq; - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - /* - * Lightweight spurious IRQ detection. We do not want - * to overdo spurious IRQ handling - it's usually a sign - * of hardware problems, so we only do the checks we can - * do without slowing down good hardware unnecessarily. - * - * Note that IRQ7 and IRQ15 (the two spurious IRQs - * usually resulting from the 8259A-1|2 PICs) occur - * even if the IRQ is masked in the 8259A. Thus we - * can check spurious 8259A IRQs without doing the - * quite slow i8259A_irq_real() call for every IRQ. - * This does not cover 100% of spurious interrupts, - * but should be enough to warn the user that there - * is something bad going on ... - */ - if (cached_irq_mask & irqmask) - goto spurious_8259A_irq; - cached_irq_mask |= irqmask; - -handle_real_irq: - if (irq & 8) { - inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ - outb(cached_slave_mask, PIC_SLAVE_IMR); - outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ - outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ - } else { - inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ - outb(cached_master_mask, PIC_MASTER_IMR); - outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ - } - spin_unlock_irqrestore(&i8259A_lock, flags); - return; - -spurious_8259A_irq: - /* - * this is the slow path - should happen rarely. - */ - if (i8259A_irq_real(irq)) - /* - * oops, the IRQ _is_ in service according to the - * 8259A - not spurious, go handle it. - */ - goto handle_real_irq; - - { - static int spurious_irq_mask; - /* - * At this point we can be sure the IRQ is spurious, - * lets ACK and report it. [once per IRQ] - */ - if (!(spurious_irq_mask & irqmask)) { - printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq); - spurious_irq_mask |= irqmask; - } - atomic_inc(&irq_err_count); - /* - * Theoretically we do not have to handle this IRQ, - * but in Linux this does not cause problems and is - * simpler for us. - */ - goto handle_real_irq; - } -} - -static char irq_trigger[2]; -/** - * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ - */ -static void restore_ELCR(char *trigger) -{ - outb(trigger[0], 0x4d0); - outb(trigger[1], 0x4d1); -} - -static void save_ELCR(char *trigger) -{ - /* IRQ 0,1,2,8,13 are marked as reserved */ - trigger[0] = inb(0x4d0) & 0xF8; - trigger[1] = inb(0x4d1) & 0xDE; -} - -static int i8259A_resume(struct sys_device *dev) -{ - init_8259A(i8259A_auto_eoi); - restore_ELCR(irq_trigger); - return 0; -} - -static int i8259A_suspend(struct sys_device *dev, pm_message_t state) -{ - save_ELCR(irq_trigger); - return 0; -} - -static int i8259A_shutdown(struct sys_device *dev) -{ - /* Put the i8259A into a quiescent state that - * the kernel initialization code can get it - * out of. - */ - outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ - outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ - return 0; -} - -static struct sysdev_class i8259_sysdev_class = { - .name = "i8259", - .suspend = i8259A_suspend, - .resume = i8259A_resume, - .shutdown = i8259A_shutdown, -}; - -static struct sys_device device_i8259A = { - .id = 0, - .cls = &i8259_sysdev_class, -}; - -static int __init i8259A_init_sysfs(void) -{ - int error = sysdev_class_register(&i8259_sysdev_class); - if (!error) - error = sysdev_register(&device_i8259A); - return error; -} - -device_initcall(i8259A_init_sysfs); - -void init_8259A(int auto_eoi) -{ - unsigned long flags; - - i8259A_auto_eoi = auto_eoi; - - spin_lock_irqsave(&i8259A_lock, flags); - - outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ - outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ - - /* - * outb_pic - this has to work on a wide range of PC hardware. - */ - outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ - outb_pic(0x20 + 0, PIC_MASTER_IMR); /* ICW2: 8259A-1 IR0-7 mapped to 0x20-0x27 */ - outb_pic(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); /* 8259A-1 (the master) has a slave on IR2 */ - if (auto_eoi) /* master does Auto EOI */ - outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR); - else /* master expects normal EOI */ - outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR); - - outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */ - outb_pic(0x20 + 8, PIC_SLAVE_IMR); /* ICW2: 8259A-2 IR0-7 mapped to 0x28-0x2f */ - outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR); /* 8259A-2 is a slave on master's IR2 */ - outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */ - if (auto_eoi) - /* - * In AEOI mode we just have to mask the interrupt - * when acking. - */ - i8259A_chip.mask_ack = disable_8259A_irq; - else - i8259A_chip.mask_ack = mask_and_ack_8259A; - - udelay(100); /* wait for 8259A to initialize */ - - outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ - outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ - - spin_unlock_irqrestore(&i8259A_lock, flags); -} - -/* - * Note that on a 486, we don't want to do a SIGFPE on an irq13 - * as the irq is unreliable, and exception 16 works correctly - * (ie as explained in the intel literature). On a 386, you - * can't use exception 16 due to bad IBM design, so we have to - * rely on the less exact irq13. - * - * Careful.. Not only is IRQ13 unreliable, but it is also - * leads to races. IBM designers who came up with it should - * be shot. - */ - - -static irqreturn_t math_error_irq(int cpl, void *dev_id) -{ - extern void math_error(void __user *); - outb(0,0xF0); - if (ignore_fpu_irq || !boot_cpu_data.hard_math) - return IRQ_NONE; - math_error((void __user *)get_irq_regs()->ip); - return IRQ_HANDLED; -} - -/* - * New motherboards sometimes make IRQ 13 be a PCI interrupt, - * so allow interrupt sharing. - */ -static struct irqaction fpu_irq = { - .handler = math_error_irq, - .mask = CPU_MASK_NONE, - .name = "fpu", -}; - -void __init init_ISA_irqs (void) -{ - int i; - -#ifdef CONFIG_X86_LOCAL_APIC - init_bsp_APIC(); -#endif - init_8259A(0); - - /* - * 16 old-style INTA-cycle interrupts: - */ - for (i = 0; i < 16; i++) { - set_irq_chip_and_handler_name(i, &i8259A_chip, - handle_level_irq, "XT"); - } -} - -/* Overridden in paravirt.c */ -void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); - -void __init native_init_IRQ(void) -{ - int i; - - /* all the set up before the call gates are initialised */ - pre_intr_init_hook(); - - /* - * Cover the whole vector space, no vector can escape - * us. (some of these will be overridden and become - * 'special' SMP interrupts) - */ - for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { - int vector = FIRST_EXTERNAL_VECTOR + i; - if (i >= NR_IRQS) - break; - /* SYSCALL_VECTOR was reserved in trap_init. */ - if (!test_bit(vector, used_vectors)) - set_intr_gate(vector, interrupt[i]); - } - - /* setup after call gates are initialised (usually add in - * the architecture specific gates) - */ - intr_init_hook(); - - /* - * External FPU? Set up irq13 if so, for - * original braindamaged IBM FERR coupling. - */ - if (boot_cpu_data.hard_math && !cpu_has_fpu) - setup_irq(FPU_IRQ, &fpu_irq); - - irq_ctx_init(smp_processor_id()); -} diff --git a/arch/x86/kernel/i8259_64.c b/arch/x86/kernel/i8259_64.c deleted file mode 100644 index fa57a15685082294e7b2d33c5d0bb450b2348d56..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/i8259_64.c +++ /dev/null @@ -1,512 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Common place to define all x86 IRQ vectors - * - * This builds up the IRQ handler stubs using some ugly macros in irq.h - * - * These macros create the low-level assembly IRQ routines that save - * register context and call do_IRQ(). do_IRQ() then does all the - * operations that are needed to keep the AT (or SMP IOAPIC) - * interrupt-controller happy. - */ - -#define BI(x,y) \ - BUILD_IRQ(x##y) - -#define BUILD_16_IRQS(x) \ - BI(x,0) BI(x,1) BI(x,2) BI(x,3) \ - BI(x,4) BI(x,5) BI(x,6) BI(x,7) \ - BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ - BI(x,c) BI(x,d) BI(x,e) BI(x,f) - -/* - * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: - * (these are usually mapped to vectors 0x30-0x3f) - */ - -/* - * The IO-APIC gives us many more interrupt sources. Most of these - * are unused but an SMP system is supposed to have enough memory ... - * sometimes (mostly wrt. hw bugs) we get corrupted vectors all - * across the spectrum, so we really want to be prepared to get all - * of these. Plus, more powerful systems might have more than 64 - * IO-APIC registers. - * - * (these are usually mapped into the 0x30-0xff vector range) - */ - BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3) -BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7) -BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb) -BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf) - -#undef BUILD_16_IRQS -#undef BI - - -#define IRQ(x,y) \ - IRQ##x##y##_interrupt - -#define IRQLIST_16(x) \ - IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \ - IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \ - IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ - IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f) - -/* for the irq vectors */ -static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = { - IRQLIST_16(0x2), IRQLIST_16(0x3), - IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7), - IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb), - IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf) -}; - -#undef IRQ -#undef IRQLIST_16 - -/* - * This is the 'legacy' 8259A Programmable Interrupt Controller, - * present in the majority of PC/AT boxes. - * plus some generic x86 specific things if generic specifics makes - * any sense at all. - * this file should become arch/i386/kernel/irq.c when the old irq.c - * moves to arch independent land - */ - -static int i8259A_auto_eoi; -DEFINE_SPINLOCK(i8259A_lock); -static void mask_and_ack_8259A(unsigned int); - -static struct irq_chip i8259A_chip = { - .name = "XT-PIC", - .mask = disable_8259A_irq, - .disable = disable_8259A_irq, - .unmask = enable_8259A_irq, - .mask_ack = mask_and_ack_8259A, -}; - -/* - * 8259A PIC functions to handle ISA devices: - */ - -/* - * This contains the irq mask for both 8259A irq controllers, - */ -unsigned int cached_irq_mask = 0xffff; - -/* - * Not all IRQs can be routed through the IO-APIC, eg. on certain (older) - * boards the timer interrupt is not really connected to any IO-APIC pin, - * it's fed to the master 8259A's IR0 line only. - * - * Any '1' bit in this mask means the IRQ is routed through the IO-APIC. - * this 'mixed mode' IRQ handling costs nothing because it's only used - * at IRQ setup time. - */ -unsigned long io_apic_irqs; - -void disable_8259A_irq(unsigned int irq) -{ - unsigned int mask = 1 << irq; - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - cached_irq_mask |= mask; - if (irq & 8) - outb(cached_slave_mask, PIC_SLAVE_IMR); - else - outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); -} - -void enable_8259A_irq(unsigned int irq) -{ - unsigned int mask = ~(1 << irq); - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - cached_irq_mask &= mask; - if (irq & 8) - outb(cached_slave_mask, PIC_SLAVE_IMR); - else - outb(cached_master_mask, PIC_MASTER_IMR); - spin_unlock_irqrestore(&i8259A_lock, flags); -} - -int i8259A_irq_pending(unsigned int irq) -{ - unsigned int mask = 1<> 8); - spin_unlock_irqrestore(&i8259A_lock, flags); - - return ret; -} - -void make_8259A_irq(unsigned int irq) -{ - disable_irq_nosync(irq); - io_apic_irqs &= ~(1<> 8); - outb(0x0A,PIC_SLAVE_CMD); /* back to the IRR register */ - return value; -} - -/* - * Careful! The 8259A is a fragile beast, it pretty - * much _has_ to be done exactly like this (mask it - * first, _then_ send the EOI, and the order of EOI - * to the two 8259s is important! - */ -static void mask_and_ack_8259A(unsigned int irq) -{ - unsigned int irqmask = 1 << irq; - unsigned long flags; - - spin_lock_irqsave(&i8259A_lock, flags); - /* - * Lightweight spurious IRQ detection. We do not want - * to overdo spurious IRQ handling - it's usually a sign - * of hardware problems, so we only do the checks we can - * do without slowing down good hardware unnecessarily. - * - * Note that IRQ7 and IRQ15 (the two spurious IRQs - * usually resulting from the 8259A-1|2 PICs) occur - * even if the IRQ is masked in the 8259A. Thus we - * can check spurious 8259A IRQs without doing the - * quite slow i8259A_irq_real() call for every IRQ. - * This does not cover 100% of spurious interrupts, - * but should be enough to warn the user that there - * is something bad going on ... - */ - if (cached_irq_mask & irqmask) - goto spurious_8259A_irq; - cached_irq_mask |= irqmask; - -handle_real_irq: - if (irq & 8) { - inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */ - outb(cached_slave_mask, PIC_SLAVE_IMR); - /* 'Specific EOI' to slave */ - outb(0x60+(irq&7),PIC_SLAVE_CMD); - /* 'Specific EOI' to master-IRQ2 */ - outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); - } else { - inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */ - outb(cached_master_mask, PIC_MASTER_IMR); - /* 'Specific EOI' to master */ - outb(0x60+irq,PIC_MASTER_CMD); - } - spin_unlock_irqrestore(&i8259A_lock, flags); - return; - -spurious_8259A_irq: - /* - * this is the slow path - should happen rarely. - */ - if (i8259A_irq_real(irq)) - /* - * oops, the IRQ _is_ in service according to the - * 8259A - not spurious, go handle it. - */ - goto handle_real_irq; - - { - static int spurious_irq_mask; - /* - * At this point we can be sure the IRQ is spurious, - * lets ACK and report it. [once per IRQ] - */ - if (!(spurious_irq_mask & irqmask)) { - printk(KERN_DEBUG - "spurious 8259A interrupt: IRQ%d.\n", irq); - spurious_irq_mask |= irqmask; - } - atomic_inc(&irq_err_count); - /* - * Theoretically we do not have to handle this IRQ, - * but in Linux this does not cause problems and is - * simpler for us. - */ - goto handle_real_irq; - } -} - -static char irq_trigger[2]; -/** - * ELCR registers (0x4d0, 0x4d1) control edge/level of IRQ - */ -static void restore_ELCR(char *trigger) -{ - outb(trigger[0], 0x4d0); - outb(trigger[1], 0x4d1); -} - -static void save_ELCR(char *trigger) -{ - /* IRQ 0,1,2,8,13 are marked as reserved */ - trigger[0] = inb(0x4d0) & 0xF8; - trigger[1] = inb(0x4d1) & 0xDE; -} - -static int i8259A_resume(struct sys_device *dev) -{ - init_8259A(i8259A_auto_eoi); - restore_ELCR(irq_trigger); - return 0; -} - -static int i8259A_suspend(struct sys_device *dev, pm_message_t state) -{ - save_ELCR(irq_trigger); - return 0; -} - -static int i8259A_shutdown(struct sys_device *dev) -{ - /* Put the i8259A into a quiescent state that - * the kernel initialization code can get it - * out of. - */ - outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ - outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-1 */ - return 0; -} - -static struct sysdev_class i8259_sysdev_class = { - .name = "i8259", - .suspend = i8259A_suspend, - .resume = i8259A_resume, - .shutdown = i8259A_shutdown, -}; - -static struct sys_device device_i8259A = { - .id = 0, - .cls = &i8259_sysdev_class, -}; - -static int __init i8259A_init_sysfs(void) -{ - int error = sysdev_class_register(&i8259_sysdev_class); - if (!error) - error = sysdev_register(&device_i8259A); - return error; -} - -device_initcall(i8259A_init_sysfs); - -void init_8259A(int auto_eoi) -{ - unsigned long flags; - - i8259A_auto_eoi = auto_eoi; - - spin_lock_irqsave(&i8259A_lock, flags); - - outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */ - outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */ - - /* - * outb_pic - this has to work on a wide range of PC hardware. - */ - outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ - /* ICW2: 8259A-1 IR0-7 mapped to 0x30-0x37 */ - outb_pic(IRQ0_VECTOR, PIC_MASTER_IMR); - /* 8259A-1 (the master) has a slave on IR2 */ - outb_pic(0x04, PIC_MASTER_IMR); - if (auto_eoi) /* master does Auto EOI */ - outb_pic(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR); - else /* master expects normal EOI */ - outb_pic(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR); - - outb_pic(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */ - /* ICW2: 8259A-2 IR0-7 mapped to 0x38-0x3f */ - outb_pic(IRQ8_VECTOR, PIC_SLAVE_IMR); - /* 8259A-2 is a slave on master's IR2 */ - outb_pic(PIC_CASCADE_IR, PIC_SLAVE_IMR); - /* (slave's support for AEOI in flat mode is to be investigated) */ - outb_pic(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); - - if (auto_eoi) - /* - * In AEOI mode we just have to mask the interrupt - * when acking. - */ - i8259A_chip.mask_ack = disable_8259A_irq; - else - i8259A_chip.mask_ack = mask_and_ack_8259A; - - udelay(100); /* wait for 8259A to initialize */ - - outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */ - outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */ - - spin_unlock_irqrestore(&i8259A_lock, flags); -} - - - - -/* - * IRQ2 is cascade interrupt to second interrupt controller - */ - -static struct irqaction irq2 = { - .handler = no_action, - .mask = CPU_MASK_NONE, - .name = "cascade", -}; -DEFINE_PER_CPU(vector_irq_t, vector_irq) = { - [0 ... IRQ0_VECTOR - 1] = -1, - [IRQ0_VECTOR] = 0, - [IRQ1_VECTOR] = 1, - [IRQ2_VECTOR] = 2, - [IRQ3_VECTOR] = 3, - [IRQ4_VECTOR] = 4, - [IRQ5_VECTOR] = 5, - [IRQ6_VECTOR] = 6, - [IRQ7_VECTOR] = 7, - [IRQ8_VECTOR] = 8, - [IRQ9_VECTOR] = 9, - [IRQ10_VECTOR] = 10, - [IRQ11_VECTOR] = 11, - [IRQ12_VECTOR] = 12, - [IRQ13_VECTOR] = 13, - [IRQ14_VECTOR] = 14, - [IRQ15_VECTOR] = 15, - [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 -}; - -void __init init_ISA_irqs (void) -{ - int i; - - init_bsp_APIC(); - init_8259A(0); - - for (i = 0; i < NR_IRQS; i++) { - irq_desc[i].status = IRQ_DISABLED; - irq_desc[i].action = NULL; - irq_desc[i].depth = 1; - - if (i < 16) { - /* - * 16 old-style INTA-cycle interrupts: - */ - set_irq_chip_and_handler_name(i, &i8259A_chip, - handle_level_irq, "XT"); - } else { - /* - * 'high' PCI IRQs filled in on demand - */ - irq_desc[i].chip = &no_irq_chip; - } - } -} - -void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); - -void __init native_init_IRQ(void) -{ - int i; - - init_ISA_irqs(); - /* - * Cover the whole vector space, no vector can escape - * us. (some of these will be overridden and become - * 'special' SMP interrupts) - */ - for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { - int vector = FIRST_EXTERNAL_VECTOR + i; - if (vector != IA32_SYSCALL_VECTOR) - set_intr_gate(vector, interrupt[i]); - } - -#ifdef CONFIG_SMP - /* - * The reschedule interrupt is a CPU-to-CPU reschedule-helper - * IPI, driven by wakeup. - */ - set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); - - /* IPIs for invalidation */ - set_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6); - set_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7); - - /* IPI for generic function call */ - set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); - - /* Low priority IPI to cleanup after moving an irq */ - set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); -#endif - set_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); - set_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt); - - /* self generated IPI for local APIC timer */ - set_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); - - /* IPI vectors for APIC spurious and error interrupts */ - set_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); - set_intr_gate(ERROR_APIC_VECTOR, error_interrupt); - - if (!acpi_ioapic) - setup_irq(2, &irq2); -} diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c index 4dc8600d9d2072ed5ed79ee3884f70afd2281636..72ba06314c7b2ee2911d5a35fda07e99a891c097 100644 --- a/arch/x86/kernel/io_apic_32.c +++ b/arch/x86/kernel/io_apic_32.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -45,6 +46,7 @@ #include #include #include +#include #include #include @@ -58,7 +60,7 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; static DEFINE_SPINLOCK(ioapic_lock); static DEFINE_SPINLOCK(vector_lock); -int timer_over_8254 __initdata = 1; +int timer_through_8259 __initdata; /* * Is the SiS APIC rmw bug present ? @@ -72,15 +74,21 @@ int sis_apic_bug = -1; int nr_ioapic_registers[MAX_IO_APICS]; /* I/O APIC entries */ -struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS]; +struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; int nr_ioapics; /* MP IRQ source entries */ -struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; +struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* # of MP IRQ source entries */ int mp_irq_entries; +#if defined (CONFIG_MCA) || defined (CONFIG_EISA) +int mp_bus_id_to_type[MAX_MP_BUSSES]; +#endif + +DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); + static int disable_timer_pin_1 __initdata; /* @@ -110,7 +118,7 @@ struct io_apic { static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) { return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) - + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK); + + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); } static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) @@ -239,7 +247,7 @@ static void __init replace_pin_at_irq(unsigned int irq, } } -static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsigned long disable) +static void __modify_IO_APIC_irq(unsigned int irq, unsigned long enable, unsigned long disable) { struct irq_pin_list *entry = irq_2_pin + irq; unsigned int pin, reg; @@ -259,30 +267,32 @@ static void __modify_IO_APIC_irq (unsigned int irq, unsigned long enable, unsign } /* mask = 1 */ -static void __mask_IO_APIC_irq (unsigned int irq) +static void __mask_IO_APIC_irq(unsigned int irq) { - __modify_IO_APIC_irq(irq, 0x00010000, 0); + __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED, 0); } /* mask = 0 */ -static void __unmask_IO_APIC_irq (unsigned int irq) +static void __unmask_IO_APIC_irq(unsigned int irq) { - __modify_IO_APIC_irq(irq, 0, 0x00010000); + __modify_IO_APIC_irq(irq, 0, IO_APIC_REDIR_MASKED); } /* mask = 1, trigger = 0 */ -static void __mask_and_edge_IO_APIC_irq (unsigned int irq) +static void __mask_and_edge_IO_APIC_irq(unsigned int irq) { - __modify_IO_APIC_irq(irq, 0x00010000, 0x00008000); + __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED, + IO_APIC_REDIR_LEVEL_TRIGGER); } /* mask = 0, trigger = 1 */ -static void __unmask_and_level_IO_APIC_irq (unsigned int irq) +static void __unmask_and_level_IO_APIC_irq(unsigned int irq) { - __modify_IO_APIC_irq(irq, 0x00008000, 0x00010000); + __modify_IO_APIC_irq(irq, IO_APIC_REDIR_LEVEL_TRIGGER, + IO_APIC_REDIR_MASKED); } -static void mask_IO_APIC_irq (unsigned int irq) +static void mask_IO_APIC_irq(unsigned int irq) { unsigned long flags; @@ -291,7 +301,7 @@ static void mask_IO_APIC_irq (unsigned int irq) spin_unlock_irqrestore(&ioapic_lock, flags); } -static void unmask_IO_APIC_irq (unsigned int irq) +static void unmask_IO_APIC_irq(unsigned int irq) { unsigned long flags; @@ -303,7 +313,7 @@ static void unmask_IO_APIC_irq (unsigned int irq) static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) { struct IO_APIC_route_entry entry; - + /* Check delivery_mode to be sure we're not clearing an SMI pin */ entry = ioapic_read_entry(apic, pin); if (entry.delivery_mode == dest_SMI) @@ -315,7 +325,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) ioapic_mask_entry(apic, pin); } -static void clear_IO_APIC (void) +static void clear_IO_APIC(void) { int apic, pin; @@ -332,7 +342,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask) struct irq_pin_list *entry = irq_2_pin + irq; unsigned int apicid_value; cpumask_t tmp; - + cpus_and(tmp, cpumask, cpu_online_map); if (cpus_empty(tmp)) tmp = TARGET_CPUS; @@ -361,7 +371,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask) # include /* kstat */ # include /* kmalloc() */ # include - + #define IRQBALANCE_CHECK_ARCH -999 #define MAX_BALANCED_IRQ_INTERVAL (5*HZ) #define MIN_BALANCED_IRQ_INTERVAL (HZ/2) @@ -373,14 +383,14 @@ static int physical_balance __read_mostly; static long balanced_irq_interval __read_mostly = MAX_BALANCED_IRQ_INTERVAL; static struct irq_cpu_info { - unsigned long * last_irq; - unsigned long * irq_delta; + unsigned long *last_irq; + unsigned long *irq_delta; unsigned long irq; } irq_cpu_data[NR_CPUS]; #define CPU_IRQ(cpu) (irq_cpu_data[cpu].irq) -#define LAST_CPU_IRQ(cpu,irq) (irq_cpu_data[cpu].last_irq[irq]) -#define IRQ_DELTA(cpu,irq) (irq_cpu_data[cpu].irq_delta[irq]) +#define LAST_CPU_IRQ(cpu, irq) (irq_cpu_data[cpu].last_irq[irq]) +#define IRQ_DELTA(cpu, irq) (irq_cpu_data[cpu].irq_delta[irq]) #define IDLE_ENOUGH(cpu,now) \ (idle_cpu(cpu) && ((now) - per_cpu(irq_stat, (cpu)).idle_timestamp > 1)) @@ -419,8 +429,8 @@ inside: if (cpu == -1) cpu = NR_CPUS-1; } - } while (!cpu_online(cpu) || !IRQ_ALLOWED(cpu,allowed_mask) || - (search_idle && !IDLE_ENOUGH(cpu,now))); + } while (!cpu_online(cpu) || !IRQ_ALLOWED(cpu, allowed_mask) || + (search_idle && !IDLE_ENOUGH(cpu, now))); return cpu; } @@ -430,15 +440,14 @@ static inline void balance_irq(int cpu, int irq) unsigned long now = jiffies; cpumask_t allowed_mask; unsigned int new_cpu; - + if (irqbalance_disabled) - return; + return; cpus_and(allowed_mask, cpu_online_map, balance_irq_affinity[irq]); new_cpu = move(cpu, allowed_mask, now, 1); - if (cpu != new_cpu) { + if (cpu != new_cpu) set_pending_irq(irq, cpumask_of_cpu(new_cpu)); - } } static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold) @@ -450,14 +459,14 @@ static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold) if (!irq_desc[j].action) continue; /* Is it a significant load ? */ - if (IRQ_DELTA(CPU_TO_PACKAGEINDEX(i),j) < + if (IRQ_DELTA(CPU_TO_PACKAGEINDEX(i), j) < useful_load_threshold) continue; balance_irq(i, j); } } balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL, - balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); + balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); return; } @@ -486,22 +495,22 @@ static void do_irq_balance(void) /* Is this an active IRQ or balancing disabled ? */ if (!irq_desc[j].action || irq_balancing_disabled(j)) continue; - if ( package_index == i ) - IRQ_DELTA(package_index,j) = 0; + if (package_index == i) + IRQ_DELTA(package_index, j) = 0; /* Determine the total count per processor per IRQ */ value_now = (unsigned long) kstat_cpu(i).irqs[j]; /* Determine the activity per processor per IRQ */ - delta = value_now - LAST_CPU_IRQ(i,j); + delta = value_now - LAST_CPU_IRQ(i, j); /* Update last_cpu_irq[][] for the next time */ - LAST_CPU_IRQ(i,j) = value_now; + LAST_CPU_IRQ(i, j) = value_now; /* Ignore IRQs whose rate is less than the clock */ if (delta < useful_load_threshold) continue; /* update the load for the processor or package total */ - IRQ_DELTA(package_index,j) += delta; + IRQ_DELTA(package_index, j) += delta; /* Keep track of the higher numbered sibling as well */ if (i != package_index) @@ -527,7 +536,8 @@ static void do_irq_balance(void) max_cpu_irq = ULONG_MAX; tryanothercpu: - /* Look for heaviest loaded processor. + /* + * Look for heaviest loaded processor. * We may come back to get the next heaviest loaded processor. * Skip processors with trivial loads. */ @@ -536,7 +546,7 @@ tryanothercpu: for_each_online_cpu(i) { if (i != CPU_TO_PACKAGEINDEX(i)) continue; - if (max_cpu_irq <= CPU_IRQ(i)) + if (max_cpu_irq <= CPU_IRQ(i)) continue; if (tmp_cpu_irq < CPU_IRQ(i)) { tmp_cpu_irq = CPU_IRQ(i); @@ -545,8 +555,9 @@ tryanothercpu: } if (tmp_loaded == -1) { - /* In the case of small number of heavy interrupt sources, - * loading some of the cpus too much. We use Ingo's original + /* + * In the case of small number of heavy interrupt sources, + * loading some of the cpus too much. We use Ingo's original * approach to rotate them around. */ if (!first_attempt && imbalance >= useful_load_threshold) { @@ -555,13 +566,14 @@ tryanothercpu: } goto not_worth_the_effort; } - + first_attempt = 0; /* heaviest search */ max_cpu_irq = tmp_cpu_irq; /* load */ max_loaded = tmp_loaded; /* processor */ imbalance = (max_cpu_irq - min_cpu_irq) / 2; - - /* if imbalance is less than approx 10% of max load, then + + /* + * if imbalance is less than approx 10% of max load, then * observe diminishing returns action. - quit */ if (imbalance < (max_cpu_irq >> 3)) @@ -577,26 +589,25 @@ tryanotherirq: /* Is this an active IRQ? */ if (!irq_desc[j].action) continue; - if (imbalance <= IRQ_DELTA(max_loaded,j)) + if (imbalance <= IRQ_DELTA(max_loaded, j)) continue; /* Try to find the IRQ that is closest to the imbalance * without going over. */ - if (move_this_load < IRQ_DELTA(max_loaded,j)) { - move_this_load = IRQ_DELTA(max_loaded,j); + if (move_this_load < IRQ_DELTA(max_loaded, j)) { + move_this_load = IRQ_DELTA(max_loaded, j); selected_irq = j; } } - if (selected_irq == -1) { + if (selected_irq == -1) goto tryanothercpu; - } imbalance = move_this_load; - + /* For physical_balance case, we accumulated both load * values in the one of the siblings cpu_irq[], * to use the same code for physical and logical processors - * as much as possible. + * as much as possible. * * NOTE: the cpu_irq[] array holds the sum of the load for * sibling A and sibling B in the slot for the lowest numbered @@ -625,11 +636,11 @@ tryanotherirq: /* mark for change destination */ set_pending_irq(selected_irq, cpumask_of_cpu(min_loaded)); - /* Since we made a change, come back sooner to + /* Since we made a change, come back sooner to * check for more variation. */ balanced_irq_interval = max((long)MIN_BALANCED_IRQ_INTERVAL, - balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); + balanced_irq_interval - BALANCED_IRQ_LESS_DELTA); return; } goto tryanotherirq; @@ -640,7 +651,7 @@ not_worth_the_effort: * upward */ balanced_irq_interval = min((long)MAX_BALANCED_IRQ_INTERVAL, - balanced_irq_interval + BALANCED_IRQ_MORE_DELTA); + balanced_irq_interval + BALANCED_IRQ_MORE_DELTA); return; } @@ -679,13 +690,13 @@ static int __init balanced_irq_init(void) cpumask_t tmp; cpus_shift_right(tmp, cpu_online_map, 2); - c = &boot_cpu_data; + c = &boot_cpu_data; /* When not overwritten by the command line ask subarchitecture. */ if (irqbalance_disabled == IRQBALANCE_CHECK_ARCH) irqbalance_disabled = NO_BALANCE_IRQ; if (irqbalance_disabled) return 0; - + /* disable irqbalance completely if there is only one processor online */ if (num_online_cpus() < 2) { irqbalance_disabled = 1; @@ -699,16 +710,14 @@ static int __init balanced_irq_init(void) physical_balance = 1; for_each_online_cpu(i) { - irq_cpu_data[i].irq_delta = kmalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); - irq_cpu_data[i].last_irq = kmalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); + irq_cpu_data[i].irq_delta = kzalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); + irq_cpu_data[i].last_irq = kzalloc(sizeof(unsigned long) * NR_IRQS, GFP_KERNEL); if (irq_cpu_data[i].irq_delta == NULL || irq_cpu_data[i].last_irq == NULL) { printk(KERN_ERR "balanced_irq_init: out of memory"); goto failed; } - memset(irq_cpu_data[i].irq_delta,0,sizeof(unsigned long) * NR_IRQS); - memset(irq_cpu_data[i].last_irq,0,sizeof(unsigned long) * NR_IRQS); } - + printk(KERN_INFO "Starting balanced_irq\n"); if (!IS_ERR(kthread_run(balanced_irq, NULL, "kirqd"))) return 0; @@ -748,7 +757,7 @@ void send_IPI_self(int vector) /* * Send the IPI. The write to APIC_ICR fires this off. */ - apic_write_around(APIC_ICR, cfg); + apic_write(APIC_ICR, cfg); } #endif /* !CONFIG_SMP */ @@ -801,10 +810,10 @@ static int find_irq_entry(int apic, int pin, int type) int i; for (i = 0; i < mp_irq_entries; i++) - if (mp_irqs[i].mpc_irqtype == type && - (mp_irqs[i].mpc_dstapic == mp_ioapics[apic].mpc_apicid || - mp_irqs[i].mpc_dstapic == MP_APIC_ALL) && - mp_irqs[i].mpc_dstirq == pin) + if (mp_irqs[i].mp_irqtype == type && + (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || + mp_irqs[i].mp_dstapic == MP_APIC_ALL) && + mp_irqs[i].mp_dstirq == pin) return i; return -1; @@ -818,13 +827,13 @@ static int __init find_isa_irq_pin(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; if (test_bit(lbus, mp_bus_not_pci) && - (mp_irqs[i].mpc_irqtype == type) && - (mp_irqs[i].mpc_srcbusirq == irq)) + (mp_irqs[i].mp_irqtype == type) && + (mp_irqs[i].mp_srcbusirq == irq)) - return mp_irqs[i].mpc_dstirq; + return mp_irqs[i].mp_dstirq; } return -1; } @@ -834,17 +843,17 @@ static int __init find_isa_irq_apic(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; if (test_bit(lbus, mp_bus_not_pci) && - (mp_irqs[i].mpc_irqtype == type) && - (mp_irqs[i].mpc_srcbusirq == irq)) + (mp_irqs[i].mp_irqtype == type) && + (mp_irqs[i].mp_srcbusirq == irq)) break; } if (i < mp_irq_entries) { int apic; - for(apic = 0; apic < nr_ioapics; apic++) { - if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic) + for (apic = 0; apic < nr_ioapics; apic++) { + if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) return apic; } } @@ -864,28 +873,28 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, " "slot:%d, pin:%d.\n", bus, slot, pin); - if (mp_bus_id_to_pci_bus[bus] == -1) { + if (test_bit(bus, mp_bus_not_pci)) { printk(KERN_WARNING "PCI BIOS passed nonexistent PCI bus %d!\n", bus); return -1; } for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; for (apic = 0; apic < nr_ioapics; apic++) - if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic || - mp_irqs[i].mpc_dstapic == MP_APIC_ALL) + if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || + mp_irqs[i].mp_dstapic == MP_APIC_ALL) break; if (!test_bit(lbus, mp_bus_not_pci) && - !mp_irqs[i].mpc_irqtype && + !mp_irqs[i].mp_irqtype && (bus == lbus) && - (slot == ((mp_irqs[i].mpc_srcbusirq >> 2) & 0x1f))) { - int irq = pin_2_irq(i,apic,mp_irqs[i].mpc_dstirq); + (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { + int irq = pin_2_irq(i, apic, mp_irqs[i].mp_dstirq); if (!(apic || IO_APIC_IRQ(irq))) continue; - if (pin == (mp_irqs[i].mpc_srcbusirq & 3)) + if (pin == (mp_irqs[i].mp_srcbusirq & 3)) return irq; /* * Use the first all-but-pin matching entry as a @@ -900,7 +909,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); /* - * This function currently is only a helper for the i386 smp boot process where + * This function currently is only a helper for the i386 smp boot process where * we need to reprogram the ioredtbls to cater for the cpus which have come online * so mask in all cases should simply be TARGET_CPUS */ @@ -952,7 +961,7 @@ static int EISA_ELCR(unsigned int irq) * EISA conforming in the MP table, that means its trigger type must * be read in from the ELCR */ -#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mpc_srcbusirq)) +#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) #define default_EISA_polarity(idx) default_ISA_polarity(idx) /* PCI interrupts are always polarity one level triggered, @@ -969,118 +978,115 @@ static int EISA_ELCR(unsigned int irq) static int MPBIOS_polarity(int idx) { - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; int polarity; /* * Determine IRQ line polarity (high active or low active): */ - switch (mp_irqs[idx].mpc_irqflag & 3) + switch (mp_irqs[idx].mp_irqflag & 3) { + case 0: /* conforms, ie. bus-type dependent polarity */ { - case 0: /* conforms, ie. bus-type dependent polarity */ - { - polarity = test_bit(bus, mp_bus_not_pci)? - default_ISA_polarity(idx): - default_PCI_polarity(idx); - break; - } - case 1: /* high active */ - { - polarity = 0; - break; - } - case 2: /* reserved */ - { - printk(KERN_WARNING "broken BIOS!!\n"); - polarity = 1; - break; - } - case 3: /* low active */ - { - polarity = 1; - break; - } - default: /* invalid */ - { - printk(KERN_WARNING "broken BIOS!!\n"); - polarity = 1; - break; - } + polarity = test_bit(bus, mp_bus_not_pci)? + default_ISA_polarity(idx): + default_PCI_polarity(idx); + break; + } + case 1: /* high active */ + { + polarity = 0; + break; + } + case 2: /* reserved */ + { + printk(KERN_WARNING "broken BIOS!!\n"); + polarity = 1; + break; + } + case 3: /* low active */ + { + polarity = 1; + break; + } + default: /* invalid */ + { + printk(KERN_WARNING "broken BIOS!!\n"); + polarity = 1; + break; + } } return polarity; } static int MPBIOS_trigger(int idx) { - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; int trigger; /* * Determine IRQ trigger mode (edge or level sensitive): */ - switch ((mp_irqs[idx].mpc_irqflag>>2) & 3) + switch ((mp_irqs[idx].mp_irqflag>>2) & 3) { + case 0: /* conforms, ie. bus-type dependent */ { - case 0: /* conforms, ie. bus-type dependent */ - { - trigger = test_bit(bus, mp_bus_not_pci)? - default_ISA_trigger(idx): - default_PCI_trigger(idx); + trigger = test_bit(bus, mp_bus_not_pci)? + default_ISA_trigger(idx): + default_PCI_trigger(idx); #if defined(CONFIG_EISA) || defined(CONFIG_MCA) - switch (mp_bus_id_to_type[bus]) - { - case MP_BUS_ISA: /* ISA pin */ - { - /* set before the switch */ - break; - } - case MP_BUS_EISA: /* EISA pin */ - { - trigger = default_EISA_trigger(idx); - break; - } - case MP_BUS_PCI: /* PCI pin */ - { - /* set before the switch */ - break; - } - case MP_BUS_MCA: /* MCA pin */ - { - trigger = default_MCA_trigger(idx); - break; - } - default: - { - printk(KERN_WARNING "broken BIOS!!\n"); - trigger = 1; - break; - } - } -#endif + switch (mp_bus_id_to_type[bus]) { + case MP_BUS_ISA: /* ISA pin */ + { + /* set before the switch */ break; } - case 1: /* edge */ + case MP_BUS_EISA: /* EISA pin */ { - trigger = 0; + trigger = default_EISA_trigger(idx); break; } - case 2: /* reserved */ + case MP_BUS_PCI: /* PCI pin */ { - printk(KERN_WARNING "broken BIOS!!\n"); - trigger = 1; + /* set before the switch */ break; } - case 3: /* level */ + case MP_BUS_MCA: /* MCA pin */ { - trigger = 1; + trigger = default_MCA_trigger(idx); break; } - default: /* invalid */ + default: { printk(KERN_WARNING "broken BIOS!!\n"); - trigger = 0; + trigger = 1; break; } } +#endif + break; + } + case 1: /* edge */ + { + trigger = 0; + break; + } + case 2: /* reserved */ + { + printk(KERN_WARNING "broken BIOS!!\n"); + trigger = 1; + break; + } + case 3: /* level */ + { + trigger = 1; + break; + } + default: /* invalid */ + { + printk(KERN_WARNING "broken BIOS!!\n"); + trigger = 0; + break; + } + } return trigger; } @@ -1097,16 +1103,16 @@ static inline int irq_trigger(int idx) static int pin_2_irq(int idx, int apic, int pin) { int irq, i; - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; /* * Debugging check, we are in big trouble if this message pops up! */ - if (mp_irqs[idx].mpc_dstirq != pin) + if (mp_irqs[idx].mp_dstirq != pin) printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); if (test_bit(bus, mp_bus_not_pci)) - irq = mp_irqs[idx].mpc_srcbusirq; + irq = mp_irqs[idx].mp_srcbusirq; else { /* * PCI IRQs are mapped in order @@ -1148,8 +1154,8 @@ static inline int IO_APIC_irq_trigger(int irq) for (apic = 0; apic < nr_ioapics; apic++) { for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { - idx = find_irq_entry(apic,pin,mp_INT); - if ((idx != -1) && (irq == pin_2_irq(idx,apic,pin))) + idx = find_irq_entry(apic, pin, mp_INT); + if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) return irq_trigger(idx); } } @@ -1164,7 +1170,7 @@ static u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 } static int __assign_irq_vector(int irq) { - static int current_vector = FIRST_DEVICE_VECTOR, current_offset = 0; + static int current_vector = FIRST_DEVICE_VECTOR, current_offset; int vector, offset; BUG_ON((unsigned)irq >= NR_IRQ_VECTORS); @@ -1176,7 +1182,7 @@ static int __assign_irq_vector(int irq) offset = current_offset; next: vector += 8; - if (vector >= FIRST_SYSTEM_VECTOR) { + if (vector >= first_system_vector) { offset = (offset + 1) % 8; vector = FIRST_DEVICE_VECTOR + offset; } @@ -1203,6 +1209,11 @@ static int assign_irq_vector(int irq) return vector; } + +void setup_vector_irq(int cpu) +{ +} + static struct irq_chip ioapic_chip; #define IOAPIC_AUTO -1 @@ -1237,25 +1248,25 @@ static void __init setup_IO_APIC_irqs(void) /* * add it to the IO-APIC irq-routing table: */ - memset(&entry,0,sizeof(entry)); + memset(&entry, 0, sizeof(entry)); entry.delivery_mode = INT_DELIVERY_MODE; entry.dest_mode = INT_DEST_MODE; entry.mask = 0; /* enable IRQ */ - entry.dest.logical.logical_dest = + entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); - idx = find_irq_entry(apic,pin,mp_INT); + idx = find_irq_entry(apic, pin, mp_INT); if (idx == -1) { if (first_notcon) { apic_printk(APIC_VERBOSE, KERN_DEBUG " IO-APIC (apicid-pin) %d-%d", - mp_ioapics[apic].mpc_apicid, + mp_ioapics[apic].mp_apicid, pin); first_notcon = 0; } else apic_printk(APIC_VERBOSE, ", %d-%d", - mp_ioapics[apic].mpc_apicid, pin); + mp_ioapics[apic].mp_apicid, pin); continue; } @@ -1289,7 +1300,7 @@ static void __init setup_IO_APIC_irqs(void) vector = assign_irq_vector(irq); entry.vector = vector; ioapic_register_intr(irq, vector, IOAPIC_AUTO); - + if (!apic && (irq < 16)) disable_8259A_irq(irq); } @@ -1302,25 +1313,21 @@ static void __init setup_IO_APIC_irqs(void) } /* - * Set up the 8259A-master output pin: + * Set up the timer pin, possibly with the 8259A-master behind. */ -static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector) +static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, + int vector) { struct IO_APIC_route_entry entry; - memset(&entry,0,sizeof(entry)); - - disable_8259A_irq(0); - - /* mask LVT0 */ - apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); + memset(&entry, 0, sizeof(entry)); /* * We use logical delivery to get the timer IRQ * to the first CPU. */ entry.dest_mode = INT_DEST_MODE; - entry.mask = 0; /* unmask IRQ now */ + entry.mask = 1; /* mask IRQ now */ entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); entry.delivery_mode = INT_DELIVERY_MODE; entry.polarity = 0; @@ -1329,17 +1336,14 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in /* * The timer IRQ doesn't have to know that behind the - * scene we have a 8259A-master in AEOI mode ... + * scene we may have a 8259A-master in AEOI mode ... */ - irq_desc[0].chip = &ioapic_chip; - set_irq_handler(0, handle_edge_irq); + ioapic_register_intr(0, vector, IOAPIC_EDGE); /* * Add it to the IO-APIC irq-routing table: */ ioapic_write_entry(apic, pin, entry); - - enable_8259A_irq(0); } void __init print_IO_APIC(void) @@ -1354,10 +1358,10 @@ void __init print_IO_APIC(void) if (apic_verbosity == APIC_QUIET) return; - printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); + printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); for (i = 0; i < nr_ioapics; i++) printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", - mp_ioapics[i].mpc_apicid, nr_ioapic_registers[i]); + mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); /* * We are a bit conservative about what we expect. We have to @@ -1376,7 +1380,7 @@ void __init print_IO_APIC(void) reg_03.raw = io_apic_read(apic, 3); spin_unlock_irqrestore(&ioapic_lock, flags); - printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mpc_apicid); + printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); @@ -1459,7 +1463,7 @@ void __init print_IO_APIC(void) #if 0 -static void print_APIC_bitfield (int base) +static void print_APIC_bitfield(int base) { unsigned int v; int i, j; @@ -1480,7 +1484,7 @@ static void print_APIC_bitfield (int base) } } -void /*__init*/ print_local_APIC(void * dummy) +void /*__init*/ print_local_APIC(void *dummy) { unsigned int v, ver, maxlvt; @@ -1489,8 +1493,9 @@ void /*__init*/ print_local_APIC(void * dummy) printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", smp_processor_id(), hard_smp_processor_id()); + v = apic_read(APIC_ID); printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, - GET_APIC_ID(read_apic_id())); + GET_APIC_ID(v)); v = apic_read(APIC_LVR); printk(KERN_INFO "... APIC VERSION: %08x\n", v); ver = GET_APIC_VERSION(v); @@ -1563,9 +1568,9 @@ void /*__init*/ print_local_APIC(void * dummy) printk("\n"); } -void print_all_local_APICs (void) +void print_all_local_APICs(void) { - on_each_cpu(print_local_APIC, NULL, 1, 1); + on_each_cpu(print_local_APIC, NULL, 1); } void /*__init*/ print_PIC(void) @@ -1586,11 +1591,11 @@ void /*__init*/ print_PIC(void) v = inb(0xa0) << 8 | inb(0x20); printk(KERN_DEBUG "... PIC IRR: %04x\n", v); - outb(0x0b,0xa0); - outb(0x0b,0x20); + outb(0x0b, 0xa0); + outb(0x0b, 0x20); v = inb(0xa0) << 8 | inb(0x20); - outb(0x0a,0xa0); - outb(0x0a,0x20); + outb(0x0a, 0xa0); + outb(0x0a, 0x20); spin_unlock_irqrestore(&i8259A_lock, flags); @@ -1626,7 +1631,7 @@ static void __init enable_IO_APIC(void) spin_unlock_irqrestore(&ioapic_lock, flags); nr_ioapic_registers[apic] = reg_01.bits.entries+1; } - for(apic = 0; apic < nr_ioapics; apic++) { + for (apic = 0; apic < nr_ioapics; apic++) { int pin; /* See if any of the pins is in ExtINT mode */ for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { @@ -1698,8 +1703,7 @@ void disable_IO_APIC(void) entry.dest_mode = 0; /* Physical */ entry.delivery_mode = dest_ExtINT; /* ExtInt */ entry.vector = 0; - entry.dest.physical.physical_dest = - GET_APIC_ID(read_apic_id()); + entry.dest.physical.physical_dest = read_apic_id(); /* * Add it to the IO-APIC irq-routing table: @@ -1716,7 +1720,6 @@ void disable_IO_APIC(void) * by Matt Domsch Tue Dec 21 12:25:05 CST 1999 */ -#ifndef CONFIG_X86_NUMAQ static void __init setup_ioapic_ids_from_mpc(void) { union IO_APIC_reg_00 reg_00; @@ -1726,6 +1729,9 @@ static void __init setup_ioapic_ids_from_mpc(void) unsigned char old_id; unsigned long flags; + if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) + return; + /* * Don't check I/O APIC IDs for xAPIC systems. They have * no meaning without the serial APIC bus. @@ -1748,15 +1754,15 @@ static void __init setup_ioapic_ids_from_mpc(void) spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(apic, 0); spin_unlock_irqrestore(&ioapic_lock, flags); - - old_id = mp_ioapics[apic].mpc_apicid; - if (mp_ioapics[apic].mpc_apicid >= get_physical_broadcast()) { + old_id = mp_ioapics[apic].mp_apicid; + + if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", - apic, mp_ioapics[apic].mpc_apicid); + apic, mp_ioapics[apic].mp_apicid); printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", reg_00.bits.ID); - mp_ioapics[apic].mpc_apicid = reg_00.bits.ID; + mp_ioapics[apic].mp_apicid = reg_00.bits.ID; } /* @@ -1765,9 +1771,9 @@ static void __init setup_ioapic_ids_from_mpc(void) * 'stuck on smp_invalidate_needed IPI wait' messages. */ if (check_apicid_used(phys_id_present_map, - mp_ioapics[apic].mpc_apicid)) { + mp_ioapics[apic].mp_apicid)) { printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", - apic, mp_ioapics[apic].mpc_apicid); + apic, mp_ioapics[apic].mp_apicid); for (i = 0; i < get_physical_broadcast(); i++) if (!physid_isset(i, phys_id_present_map)) break; @@ -1776,13 +1782,13 @@ static void __init setup_ioapic_ids_from_mpc(void) printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", i); physid_set(i, phys_id_present_map); - mp_ioapics[apic].mpc_apicid = i; + mp_ioapics[apic].mp_apicid = i; } else { physid_mask_t tmp; - tmp = apicid_to_cpu_present(mp_ioapics[apic].mpc_apicid); + tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid); apic_printk(APIC_VERBOSE, "Setting %d in the " "phys_id_present_map\n", - mp_ioapics[apic].mpc_apicid); + mp_ioapics[apic].mp_apicid); physids_or(phys_id_present_map, phys_id_present_map, tmp); } @@ -1791,21 +1797,21 @@ static void __init setup_ioapic_ids_from_mpc(void) * We need to adjust the IRQ routing table * if the ID changed. */ - if (old_id != mp_ioapics[apic].mpc_apicid) + if (old_id != mp_ioapics[apic].mp_apicid) for (i = 0; i < mp_irq_entries; i++) - if (mp_irqs[i].mpc_dstapic == old_id) - mp_irqs[i].mpc_dstapic - = mp_ioapics[apic].mpc_apicid; + if (mp_irqs[i].mp_dstapic == old_id) + mp_irqs[i].mp_dstapic + = mp_ioapics[apic].mp_apicid; /* * Read the right value from the MPC table and * write it into the ID register. - */ + */ apic_printk(APIC_VERBOSE, KERN_INFO "...changing IO-APIC physical APIC ID to %d ...", - mp_ioapics[apic].mpc_apicid); + mp_ioapics[apic].mp_apicid); - reg_00.bits.ID = mp_ioapics[apic].mpc_apicid; + reg_00.bits.ID = mp_ioapics[apic].mp_apicid; spin_lock_irqsave(&ioapic_lock, flags); io_apic_write(apic, 0, reg_00.raw); spin_unlock_irqrestore(&ioapic_lock, flags); @@ -1816,15 +1822,12 @@ static void __init setup_ioapic_ids_from_mpc(void) spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(apic, 0); spin_unlock_irqrestore(&ioapic_lock, flags); - if (reg_00.bits.ID != mp_ioapics[apic].mpc_apicid) + if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid) printk("could not set ID!\n"); else apic_printk(APIC_VERBOSE, " ok.\n"); } } -#else -static void __init setup_ioapic_ids_from_mpc(void) { } -#endif int no_timer_check __initdata; @@ -2015,45 +2018,53 @@ static inline void init_IO_APIC_traps(void) * The local APIC irq-chip implementation: */ -static void ack_apic(unsigned int irq) +static void ack_lapic_irq(unsigned int irq) { ack_APIC_irq(); } -static void mask_lapic_irq (unsigned int irq) +static void mask_lapic_irq(unsigned int irq) { unsigned long v; v = apic_read(APIC_LVT0); - apic_write_around(APIC_LVT0, v | APIC_LVT_MASKED); + apic_write(APIC_LVT0, v | APIC_LVT_MASKED); } -static void unmask_lapic_irq (unsigned int irq) +static void unmask_lapic_irq(unsigned int irq) { unsigned long v; v = apic_read(APIC_LVT0); - apic_write_around(APIC_LVT0, v & ~APIC_LVT_MASKED); + apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); } static struct irq_chip lapic_chip __read_mostly = { - .name = "local-APIC-edge", + .name = "local-APIC", .mask = mask_lapic_irq, .unmask = unmask_lapic_irq, - .eoi = ack_apic, + .ack = ack_lapic_irq, }; +static void lapic_register_intr(int irq, int vector) +{ + irq_desc[irq].status &= ~IRQ_LEVEL; + set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, + "edge"); + set_intr_gate(vector, interrupt[irq]); +} + static void __init setup_nmi(void) { /* - * Dirty trick to enable the NMI watchdog ... + * Dirty trick to enable the NMI watchdog ... * We put the 8259A master into AEOI mode and * unmask on all local APICs LVT0 as NMI. * * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') * is from Maciej W. Rozycki - so we do not have to EOI from * the NMI handler or the timer interrupt. - */ + */ apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); enable_NMI_through_LVT0(); @@ -2129,11 +2140,16 @@ static inline void __init unlock_ExtINT_logic(void) static inline void __init check_timer(void) { int apic1, pin1, apic2, pin2; + int no_pin1 = 0; int vector; + unsigned int ver; unsigned long flags; local_irq_save(flags); + ver = apic_read(APIC_LVR); + ver = GET_APIC_VERSION(ver); + /* * get/set the timer IRQ vector: */ @@ -2142,34 +2158,54 @@ static inline void __init check_timer(void) set_intr_gate(vector, interrupt[0]); /* - * Subtle, code in do_timer_interrupt() expects an AEOI - * mode for the 8259A whenever interrupts are routed - * through I/O APICs. Also IRQ0 has to be enabled in - * the 8259A which implies the virtual wire has to be - * disabled in the local APIC. + * As IRQ0 is to be enabled in the 8259A, the virtual + * wire has to be disabled in the local APIC. Also + * timer interrupts need to be acknowledged manually in + * the 8259A for the i82489DX when using the NMI + * watchdog as that APIC treats NMIs as level-triggered. + * The AEOI mode will finish them in the 8259A + * automatically. */ - apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); + apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); init_8259A(1); - timer_ack = 1; - if (timer_over_8254 > 0) - enable_8259A_irq(0); + timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); pin1 = find_isa_irq_pin(0, mp_INT); apic1 = find_isa_irq_apic(0, mp_INT); pin2 = ioapic_i8259.pin; apic2 = ioapic_i8259.apic; - printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", - vector, apic1, pin1, apic2, pin2); + apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " + "apic1=%d pin1=%d apic2=%d pin2=%d\n", + vector, apic1, pin1, apic2, pin2); + + /* + * Some BIOS writers are clueless and report the ExtINTA + * I/O APIC input from the cascaded 8259A as the timer + * interrupt input. So just in case, if only one pin + * was found above, try it both directly and through the + * 8259A. + */ + if (pin1 == -1) { + pin1 = pin2; + apic1 = apic2; + no_pin1 = 1; + } else if (pin2 == -1) { + pin2 = pin1; + apic2 = apic1; + } if (pin1 != -1) { /* * Ok, does IRQ0 through the IOAPIC work? */ + if (no_pin1) { + add_pin_to_irq(0, apic1, pin1); + setup_timer_IRQ0_pin(apic1, pin1, vector); + } unmask_IO_APIC_irq(0); if (timer_irq_works()) { if (nmi_watchdog == NMI_IO_APIC) { - disable_8259A_irq(0); setup_nmi(); enable_8259A_irq(0); } @@ -2178,81 +2214,97 @@ static inline void __init check_timer(void) goto out; } clear_IO_APIC_pin(apic1, pin1); - printk(KERN_ERR "..MP-BIOS bug: 8254 timer not connected to " - "IO-APIC\n"); - } - - printk(KERN_INFO "...trying to set up timer (IRQ0) through the 8259A ... "); - if (pin2 != -1) { - printk("\n..... (found pin %d) ...", pin2); + if (!no_pin1) + apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " + "8254 timer not connected to IO-APIC\n"); + + apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " + "(IRQ0) through the 8259A ...\n"); + apic_printk(APIC_QUIET, KERN_INFO + "..... (found apic %d pin %d) ...\n", apic2, pin2); /* * legacy devices should be connected to IO APIC #0 */ - setup_ExtINT_IRQ0_pin(apic2, pin2, vector); + replace_pin_at_irq(0, apic1, pin1, apic2, pin2); + setup_timer_IRQ0_pin(apic2, pin2, vector); + unmask_IO_APIC_irq(0); + enable_8259A_irq(0); if (timer_irq_works()) { - printk("works.\n"); - if (pin1 != -1) - replace_pin_at_irq(0, apic1, pin1, apic2, pin2); - else - add_pin_to_irq(0, apic2, pin2); + apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); + timer_through_8259 = 1; if (nmi_watchdog == NMI_IO_APIC) { + disable_8259A_irq(0); setup_nmi(); + enable_8259A_irq(0); } goto out; } /* * Cleanup, just in case ... */ + disable_8259A_irq(0); clear_IO_APIC_pin(apic2, pin2); + apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); } - printk(" failed.\n"); if (nmi_watchdog == NMI_IO_APIC) { - printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); - nmi_watchdog = 0; + apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " + "through the IO-APIC - disabling NMI Watchdog!\n"); + nmi_watchdog = NMI_NONE; } + timer_ack = 0; - printk(KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); + apic_printk(APIC_QUIET, KERN_INFO + "...trying to set up timer as Virtual Wire IRQ...\n"); - disable_8259A_irq(0); - set_irq_chip_and_handler_name(0, &lapic_chip, handle_fasteoi_irq, - "fasteoi"); - apic_write_around(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ + lapic_register_intr(0, vector); + apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ enable_8259A_irq(0); if (timer_irq_works()) { - printk(" works.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); goto out; } - apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector); - printk(" failed.\n"); + disable_8259A_irq(0); + apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector); + apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); - printk(KERN_INFO "...trying to set up timer as ExtINT IRQ..."); + apic_printk(APIC_QUIET, KERN_INFO + "...trying to set up timer as ExtINT IRQ...\n"); - timer_ack = 0; init_8259A(0); make_8259A_irq(0); - apic_write_around(APIC_LVT0, APIC_DM_EXTINT); + apic_write(APIC_LVT0, APIC_DM_EXTINT); unlock_ExtINT_logic(); if (timer_irq_works()) { - printk(" works.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); goto out; } - printk(" failed :(.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " - "report. Then try booting with the 'noapic' option"); + "report. Then try booting with the 'noapic' option.\n"); out: local_irq_restore(flags); } /* - * - * IRQ's that are handled by the PIC in the MPS IOAPIC case. - * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. - * Linux doesn't really care, as it's not actually used - * for any interrupt handling anyway. + * Traditionally ISA IRQ2 is the cascade IRQ, and is not available + * to devices. However there may be an I/O APIC pin available for + * this interrupt regardless. The pin may be left unconnected, but + * typically it will be reused as an ExtINT cascade interrupt for + * the master 8259A. In the MPS case such a pin will normally be + * reported as an ExtINT interrupt in the MP table. With ACPI + * there is no provision for ExtINT interrupts, and in the absence + * of an override it would be treated as an ordinary ISA I/O APIC + * interrupt, that is edge-triggered and unmasked by default. We + * used to do this, but it caused problems on some systems because + * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using + * the same ExtINT cascade interrupt to drive the local APIC of the + * bootstrap processor. Therefore we refrain from routing IRQ2 to + * the I/O APIC in all cases now. No actual device should request + * it anyway. --macro */ #define PIC_IRQS (1 << PIC_CASCADE_IR) @@ -2261,15 +2313,12 @@ void __init setup_IO_APIC(void) int i; /* Reserve all the system vectors. */ - for (i = FIRST_SYSTEM_VECTOR; i < NR_VECTORS; i++) + for (i = first_system_vector; i < NR_VECTORS; i++) set_bit(i, used_vectors); enable_IO_APIC(); - if (acpi_ioapic) - io_apic_irqs = ~0; /* all IRQs go through IOAPIC */ - else - io_apic_irqs = ~PIC_IRQS; + io_apic_irqs = ~PIC_IRQS; printk("ENABLING IO-APIC IRQs\n"); @@ -2286,28 +2335,14 @@ void __init setup_IO_APIC(void) print_IO_APIC(); } -static int __init setup_disable_8254_timer(char *s) -{ - timer_over_8254 = -1; - return 1; -} -static int __init setup_enable_8254_timer(char *s) -{ - timer_over_8254 = 2; - return 1; -} - -__setup("disable_8254_timer", setup_disable_8254_timer); -__setup("enable_8254_timer", setup_enable_8254_timer); - /* * Called after all the initialization is done. If we didnt find any * APIC bugs then we can allow the modify fast path */ - + static int __init io_apic_bug_finalize(void) { - if(sis_apic_bug == -1) + if (sis_apic_bug == -1) sis_apic_bug = 0; return 0; } @@ -2318,17 +2353,17 @@ struct sysfs_ioapic_data { struct sys_device dev; struct IO_APIC_route_entry entry[0]; }; -static struct sysfs_ioapic_data * mp_ioapic_data[MAX_IO_APICS]; +static struct sysfs_ioapic_data *mp_ioapic_data[MAX_IO_APICS]; static int ioapic_suspend(struct sys_device *dev, pm_message_t state) { struct IO_APIC_route_entry *entry; struct sysfs_ioapic_data *data; int i; - + data = container_of(dev, struct sysfs_ioapic_data, dev); entry = data->entry; - for (i = 0; i < nr_ioapic_registers[dev->id]; i ++) + for (i = 0; i < nr_ioapic_registers[dev->id]; i++) entry[i] = ioapic_read_entry(dev->id, i); return 0; @@ -2341,18 +2376,18 @@ static int ioapic_resume(struct sys_device *dev) unsigned long flags; union IO_APIC_reg_00 reg_00; int i; - + data = container_of(dev, struct sysfs_ioapic_data, dev); entry = data->entry; spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(dev->id, 0); - if (reg_00.bits.ID != mp_ioapics[dev->id].mpc_apicid) { - reg_00.bits.ID = mp_ioapics[dev->id].mpc_apicid; + if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { + reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; io_apic_write(dev->id, 0, reg_00.raw); } spin_unlock_irqrestore(&ioapic_lock, flags); - for (i = 0; i < nr_ioapic_registers[dev->id]; i ++) + for (i = 0; i < nr_ioapic_registers[dev->id]; i++) ioapic_write_entry(dev->id, i, entry[i]); return 0; @@ -2366,24 +2401,23 @@ static struct sysdev_class ioapic_sysdev_class = { static int __init ioapic_init_sysfs(void) { - struct sys_device * dev; + struct sys_device *dev; int i, size, error = 0; error = sysdev_class_register(&ioapic_sysdev_class); if (error) return error; - for (i = 0; i < nr_ioapics; i++ ) { - size = sizeof(struct sys_device) + nr_ioapic_registers[i] + for (i = 0; i < nr_ioapics; i++) { + size = sizeof(struct sys_device) + nr_ioapic_registers[i] * sizeof(struct IO_APIC_route_entry); - mp_ioapic_data[i] = kmalloc(size, GFP_KERNEL); + mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); if (!mp_ioapic_data[i]) { printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); continue; } - memset(mp_ioapic_data[i], 0, size); dev = &mp_ioapic_data[i]->dev; - dev->id = i; + dev->id = i; dev->cls = &ioapic_sysdev_class; error = sysdev_register(dev); if (error) { @@ -2458,7 +2492,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms msg->address_lo = MSI_ADDR_BASE_LO | ((INT_DEST_MODE == 0) ? - MSI_ADDR_DEST_MODE_PHYSICAL: +MSI_ADDR_DEST_MODE_PHYSICAL: MSI_ADDR_DEST_MODE_LOGICAL) | ((INT_DELIVERY_MODE != dest_LowestPrio) ? MSI_ADDR_REDIRECTION_CPU: @@ -2469,7 +2503,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms MSI_DATA_TRIGGER_EDGE | MSI_DATA_LEVEL_ASSERT | ((INT_DELIVERY_MODE != dest_LowestPrio) ? - MSI_DATA_DELIVERY_FIXED: +MSI_DATA_DELIVERY_FIXED: MSI_DATA_DELIVERY_LOWPRI) | MSI_DATA_VECTOR(vector); } @@ -2640,12 +2674,12 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) #endif /* CONFIG_HT_IRQ */ /* -------------------------------------------------------------------------- - ACPI-based IOAPIC Configuration + ACPI-based IOAPIC Configuration -------------------------------------------------------------------------- */ #ifdef CONFIG_ACPI -int __init io_apic_get_unique_id (int ioapic, int apic_id) +int __init io_apic_get_unique_id(int ioapic, int apic_id) { union IO_APIC_reg_00 reg_00; static physid_mask_t apic_id_map = PHYSID_MASK_NONE; @@ -2654,10 +2688,10 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id) int i = 0; /* - * The P4 platform supports up to 256 APIC IDs on two separate APIC - * buses (one for LAPICs, one for IOAPICs), where predecessors only + * The P4 platform supports up to 256 APIC IDs on two separate APIC + * buses (one for LAPICs, one for IOAPICs), where predecessors only * supports up to 16 on one shared APIC bus. - * + * * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full * advantage of new APIC bus architecture. */ @@ -2676,7 +2710,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id) } /* - * Every APIC in a system must have a unique ID or we get lots of nice + * Every APIC in a system must have a unique ID or we get lots of nice * 'stuck on smp_invalidate_needed IPI wait' messages. */ if (check_apicid_used(apic_id_map, apic_id)) { @@ -2693,7 +2727,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id) "trying %d\n", ioapic, apic_id, i); apic_id = i; - } + } tmp = apicid_to_cpu_present(apic_id); physids_or(apic_id_map, apic_id_map, tmp); @@ -2720,7 +2754,7 @@ int __init io_apic_get_unique_id (int ioapic, int apic_id) } -int __init io_apic_get_version (int ioapic) +int __init io_apic_get_version(int ioapic) { union IO_APIC_reg_01 reg_01; unsigned long flags; @@ -2733,7 +2767,7 @@ int __init io_apic_get_version (int ioapic) } -int __init io_apic_get_redir_entries (int ioapic) +int __init io_apic_get_redir_entries(int ioapic) { union IO_APIC_reg_01 reg_01; unsigned long flags; @@ -2746,7 +2780,7 @@ int __init io_apic_get_redir_entries (int ioapic) } -int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int active_high_low) +int io_apic_set_pci_routing(int ioapic, int pin, int irq, int edge_level, int active_high_low) { struct IO_APIC_route_entry entry; @@ -2762,7 +2796,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a * corresponding device driver registers for this IRQ. */ - memset(&entry,0,sizeof(entry)); + memset(&entry, 0, sizeof(entry)); entry.delivery_mode = INT_DELIVERY_MODE; entry.dest_mode = INT_DEST_MODE; @@ -2781,7 +2815,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a apic_printk(APIC_DEBUG, KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry " "(%d-%d -> 0x%x -> IRQ %d Mode:%i Active:%i)\n", ioapic, - mp_ioapics[ioapic].mpc_apicid, pin, entry.vector, irq, + mp_ioapics[ioapic].mp_apicid, pin, entry.vector, irq, edge_level, active_high_low); ioapic_register_intr(irq, entry.vector, edge_level); @@ -2802,8 +2836,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) return -1; for (i = 0; i < mp_irq_entries; i++) - if (mp_irqs[i].mpc_irqtype == mp_INT && - mp_irqs[i].mpc_srcbusirq == bus_irq) + if (mp_irqs[i].mp_irqtype == mp_INT && + mp_irqs[i].mp_srcbusirq == bus_irq) break; if (i >= mp_irq_entries) return -1; @@ -2836,3 +2870,34 @@ static int __init parse_noapic(char *arg) return 0; } early_param("noapic", parse_noapic); + +void __init ioapic_init_mappings(void) +{ + unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; + int i; + + for (i = 0; i < nr_ioapics; i++) { + if (smp_found_config) { + ioapic_phys = mp_ioapics[i].mp_apicaddr; + if (!ioapic_phys) { + printk(KERN_ERR + "WARNING: bogus zero IO-APIC " + "address found in MPTABLE, " + "disabling IO/APIC support!\n"); + smp_found_config = 0; + skip_ioapic_setup = 1; + goto fake_ioapic_page; + } + } else { +fake_ioapic_page: + ioapic_phys = (unsigned long) + alloc_bootmem_pages(PAGE_SIZE); + ioapic_phys = __pa(ioapic_phys); + } + set_fixmap_nocache(idx, ioapic_phys); + printk(KERN_DEBUG "mapped IOAPIC to %08lx (%08lx)\n", + __fix_to_virt(idx), ioapic_phys); + idx++; + } +} + diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c index ef1a8dfcc529a36643bdbe34f835eb1819c5f265..b9950dae59b7f7ddc961c3d36669ae50af33eaf2 100644 --- a/arch/x86/kernel/io_apic_64.c +++ b/arch/x86/kernel/io_apic_64.c @@ -37,6 +37,7 @@ #include #endif #include +#include #include #include @@ -45,9 +46,11 @@ #include #include #include +#include #include #include #include +#include #include #include @@ -61,7 +64,7 @@ struct irq_cfg { }; /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ -struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { +static struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, @@ -82,6 +85,10 @@ struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { static int assign_irq_vector(int irq, cpumask_t mask); +int first_system_vector = 0xfe; + +char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE}; + #define __apicdebuginit __init int sis_apic_bug; /* not actually supported, dummy for compile */ @@ -90,7 +97,7 @@ static int no_timer_check; static int disable_timer_pin_1 __initdata; -int timer_over_8254 __initdata = 1; +int timer_through_8259 __initdata; /* Where if anywhere is the i8259 connect in external int mode */ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; @@ -103,16 +110,21 @@ DEFINE_SPINLOCK(vector_lock); */ int nr_ioapic_registers[MAX_IO_APICS]; +/* I/O APIC RTE contents at the OS boot up */ +struct IO_APIC_route_entry *early_ioapic_entries[MAX_IO_APICS]; + /* I/O APIC entries */ -struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS]; +struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; int nr_ioapics; /* MP IRQ source entries */ -struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; +struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; /* # of MP IRQ source entries */ int mp_irq_entries; +DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); + /* * Rough estimation of how many shared IRQs there are, can * be changed anytime. @@ -140,7 +152,7 @@ struct io_apic { static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) { return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) - + (mp_ioapics[idx].mpc_apicaddr & ~PAGE_MASK); + + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); } static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) @@ -183,7 +195,7 @@ static bool io_apic_level_ack_pending(unsigned int irq) break; reg = io_apic_read(entry->apic, 0x10 + pin*2); /* Is the remote IRR bit set? */ - if ((reg >> 14) & 1) { + if (reg & IO_APIC_REDIR_REMOTE_IRR) { spin_unlock_irqrestore(&ioapic_lock, flags); return true; } @@ -296,9 +308,14 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, u8 vector) pin = entry->pin; if (pin == -1) break; - io_apic_write(apic, 0x11 + pin*2, dest); + /* + * With interrupt-remapping, destination information comes + * from interrupt-remapping table entry. + */ + if (!irq_remapped(irq)) + io_apic_write(apic, 0x11 + pin*2, dest); reg = io_apic_read(apic, 0x10 + pin*2); - reg &= ~0x000000ff; + reg &= ~IO_APIC_REDIR_VECTOR_MASK; reg |= vector; io_apic_modify(apic, reg); if (!entry->next) @@ -360,16 +377,37 @@ static void add_pin_to_irq(unsigned int irq, int apic, int pin) entry->pin = pin; } +/* + * Reroute an IRQ to a different pin. + */ +static void __init replace_pin_at_irq(unsigned int irq, + int oldapic, int oldpin, + int newapic, int newpin) +{ + struct irq_pin_list *entry = irq_2_pin + irq; + + while (1) { + if (entry->apic == oldapic && entry->pin == oldpin) { + entry->apic = newapic; + entry->pin = newpin; + } + if (!entry->next) + break; + entry = irq_2_pin + entry->next; + } +} + #define DO_ACTION(name,R,ACTION, FINAL) \ \ static void name##_IO_APIC_irq (unsigned int irq) \ __DO_ACTION(R, ACTION, FINAL) -DO_ACTION( __mask, 0, |= 0x00010000, io_apic_sync(entry->apic) ) - /* mask = 1 */ -DO_ACTION( __unmask, 0, &= 0xfffeffff, ) - /* mask = 0 */ +/* mask = 1 */ +DO_ACTION(__mask, 0, |= IO_APIC_REDIR_MASKED, io_apic_sync(entry->apic)) + +/* mask = 0 */ +DO_ACTION(__unmask, 0, &= ~IO_APIC_REDIR_MASKED, ) static void mask_IO_APIC_irq (unsigned int irq) { @@ -412,6 +450,69 @@ static void clear_IO_APIC (void) clear_IO_APIC_pin(apic, pin); } +/* + * Saves and masks all the unmasked IO-APIC RTE's + */ +int save_mask_IO_APIC_setup(void) +{ + union IO_APIC_reg_01 reg_01; + unsigned long flags; + int apic, pin; + + /* + * The number of IO-APIC IRQ registers (== #pins): + */ + for (apic = 0; apic < nr_ioapics; apic++) { + spin_lock_irqsave(&ioapic_lock, flags); + reg_01.raw = io_apic_read(apic, 1); + spin_unlock_irqrestore(&ioapic_lock, flags); + nr_ioapic_registers[apic] = reg_01.bits.entries+1; + } + + for (apic = 0; apic < nr_ioapics; apic++) { + early_ioapic_entries[apic] = + kzalloc(sizeof(struct IO_APIC_route_entry) * + nr_ioapic_registers[apic], GFP_KERNEL); + if (!early_ioapic_entries[apic]) + return -ENOMEM; + } + + for (apic = 0; apic < nr_ioapics; apic++) + for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { + struct IO_APIC_route_entry entry; + + entry = early_ioapic_entries[apic][pin] = + ioapic_read_entry(apic, pin); + if (!entry.mask) { + entry.mask = 1; + ioapic_write_entry(apic, pin, entry); + } + } + return 0; +} + +void restore_IO_APIC_setup(void) +{ + int apic, pin; + + for (apic = 0; apic < nr_ioapics; apic++) + for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) + ioapic_write_entry(apic, pin, + early_ioapic_entries[apic][pin]); +} + +void reinit_intr_remapped_IO_APIC(int intr_remapping) +{ + /* + * for now plain restore of previous settings. + * TBD: In the case of OS enabling interrupt-remapping, + * IO-APIC RTE's need to be setup to point to interrupt-remapping + * table entries. for now, do a plain restore, and wait for + * the setup_IO_APIC_irqs() to do proper initialization. + */ + restore_IO_APIC_setup(); +} + int skip_ioapic_setup; int ioapic_force; @@ -430,20 +531,6 @@ static int __init disable_timer_pin_setup(char *arg) } __setup("disable_timer_pin_1", disable_timer_pin_setup); -static int __init setup_disable_8254_timer(char *s) -{ - timer_over_8254 = -1; - return 1; -} -static int __init setup_enable_8254_timer(char *s) -{ - timer_over_8254 = 2; - return 1; -} - -__setup("disable_8254_timer", setup_disable_8254_timer); -__setup("enable_8254_timer", setup_enable_8254_timer); - /* * Find the IRQ entry number of a certain pin. @@ -453,10 +540,10 @@ static int find_irq_entry(int apic, int pin, int type) int i; for (i = 0; i < mp_irq_entries; i++) - if (mp_irqs[i].mpc_irqtype == type && - (mp_irqs[i].mpc_dstapic == mp_ioapics[apic].mpc_apicid || - mp_irqs[i].mpc_dstapic == MP_APIC_ALL) && - mp_irqs[i].mpc_dstirq == pin) + if (mp_irqs[i].mp_irqtype == type && + (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || + mp_irqs[i].mp_dstapic == MP_APIC_ALL) && + mp_irqs[i].mp_dstirq == pin) return i; return -1; @@ -470,13 +557,13 @@ static int __init find_isa_irq_pin(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; if (test_bit(lbus, mp_bus_not_pci) && - (mp_irqs[i].mpc_irqtype == type) && - (mp_irqs[i].mpc_srcbusirq == irq)) + (mp_irqs[i].mp_irqtype == type) && + (mp_irqs[i].mp_srcbusirq == irq)) - return mp_irqs[i].mpc_dstirq; + return mp_irqs[i].mp_dstirq; } return -1; } @@ -486,17 +573,17 @@ static int __init find_isa_irq_apic(int irq, int type) int i; for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; if (test_bit(lbus, mp_bus_not_pci) && - (mp_irqs[i].mpc_irqtype == type) && - (mp_irqs[i].mpc_srcbusirq == irq)) + (mp_irqs[i].mp_irqtype == type) && + (mp_irqs[i].mp_srcbusirq == irq)) break; } if (i < mp_irq_entries) { int apic; for(apic = 0; apic < nr_ioapics; apic++) { - if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic) + if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) return apic; } } @@ -516,28 +603,28 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n", bus, slot, pin); - if (mp_bus_id_to_pci_bus[bus] == -1) { + if (test_bit(bus, mp_bus_not_pci)) { apic_printk(APIC_VERBOSE, "PCI BIOS passed nonexistent PCI bus %d!\n", bus); return -1; } for (i = 0; i < mp_irq_entries; i++) { - int lbus = mp_irqs[i].mpc_srcbus; + int lbus = mp_irqs[i].mp_srcbus; for (apic = 0; apic < nr_ioapics; apic++) - if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic || - mp_irqs[i].mpc_dstapic == MP_APIC_ALL) + if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || + mp_irqs[i].mp_dstapic == MP_APIC_ALL) break; if (!test_bit(lbus, mp_bus_not_pci) && - !mp_irqs[i].mpc_irqtype && + !mp_irqs[i].mp_irqtype && (bus == lbus) && - (slot == ((mp_irqs[i].mpc_srcbusirq >> 2) & 0x1f))) { - int irq = pin_2_irq(i,apic,mp_irqs[i].mpc_dstirq); + (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { + int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq); if (!(apic || IO_APIC_IRQ(irq))) continue; - if (pin == (mp_irqs[i].mpc_srcbusirq & 3)) + if (pin == (mp_irqs[i].mp_srcbusirq & 3)) return irq; /* * Use the first all-but-pin matching entry as a @@ -565,13 +652,13 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) static int MPBIOS_polarity(int idx) { - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; int polarity; /* * Determine IRQ line polarity (high active or low active): */ - switch (mp_irqs[idx].mpc_irqflag & 3) + switch (mp_irqs[idx].mp_irqflag & 3) { case 0: /* conforms, ie. bus-type dependent polarity */ if (test_bit(bus, mp_bus_not_pci)) @@ -607,13 +694,13 @@ static int MPBIOS_polarity(int idx) static int MPBIOS_trigger(int idx) { - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; int trigger; /* * Determine IRQ trigger mode (edge or level sensitive): */ - switch ((mp_irqs[idx].mpc_irqflag>>2) & 3) + switch ((mp_irqs[idx].mp_irqflag>>2) & 3) { case 0: /* conforms, ie. bus-type dependent */ if (test_bit(bus, mp_bus_not_pci)) @@ -660,16 +747,16 @@ static inline int irq_trigger(int idx) static int pin_2_irq(int idx, int apic, int pin) { int irq, i; - int bus = mp_irqs[idx].mpc_srcbus; + int bus = mp_irqs[idx].mp_srcbus; /* * Debugging check, we are in big trouble if this message pops up! */ - if (mp_irqs[idx].mpc_dstirq != pin) + if (mp_irqs[idx].mp_dstirq != pin) printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); if (test_bit(bus, mp_bus_not_pci)) { - irq = mp_irqs[idx].mpc_srcbusirq; + irq = mp_irqs[idx].mp_srcbusirq; } else { /* * PCI IRQs are mapped in order @@ -718,7 +805,7 @@ static int __assign_irq_vector(int irq, cpumask_t mask) return 0; } - for_each_cpu_mask(cpu, mask) { + for_each_cpu_mask_nr(cpu, mask) { cpumask_t domain, new_mask; int new_cpu; int vector, offset; @@ -730,7 +817,7 @@ static int __assign_irq_vector(int irq, cpumask_t mask) offset = current_offset; next: vector += 8; - if (vector >= FIRST_SYSTEM_VECTOR) { + if (vector >= first_system_vector) { /* If we run out of vectors on large boxen, must share them. */ offset = (offset + 1) % 8; vector = FIRST_DEVICE_VECTOR + offset; @@ -739,7 +826,7 @@ next: continue; if (vector == IA32_SYSCALL_VECTOR) goto next; - for_each_cpu_mask(new_cpu, new_mask) + for_each_cpu_mask_nr(new_cpu, new_mask) if (per_cpu(vector_irq, new_cpu)[vector] != -1) goto next; /* Found one! */ @@ -749,7 +836,7 @@ next: cfg->move_in_progress = 1; cfg->old_domain = cfg->domain; } - for_each_cpu_mask(new_cpu, new_mask) + for_each_cpu_mask_nr(new_cpu, new_mask) per_cpu(vector_irq, new_cpu)[vector] = irq; cfg->vector = vector; cfg->domain = domain; @@ -781,14 +868,14 @@ static void __clear_irq_vector(int irq) vector = cfg->vector; cpus_and(mask, cfg->domain, cpu_online_map); - for_each_cpu_mask(cpu, mask) + for_each_cpu_mask_nr(cpu, mask) per_cpu(vector_irq, cpu)[vector] = -1; cfg->vector = 0; cpus_clear(cfg->domain); } -void __setup_vector_irq(int cpu) +static void __setup_vector_irq(int cpu) { /* Initialize vector_irq on a new cpu */ /* This function must be called with vector_lock held */ @@ -811,20 +898,107 @@ void __setup_vector_irq(int cpu) } } +void setup_vector_irq(int cpu) +{ + spin_lock(&vector_lock); + __setup_vector_irq(smp_processor_id()); + spin_unlock(&vector_lock); +} + static struct irq_chip ioapic_chip; +#ifdef CONFIG_INTR_REMAP +static struct irq_chip ir_ioapic_chip; +#endif static void ioapic_register_intr(int irq, unsigned long trigger) { - if (trigger) { + if (trigger) irq_desc[irq].status |= IRQ_LEVEL; - set_irq_chip_and_handler_name(irq, &ioapic_chip, - handle_fasteoi_irq, "fasteoi"); - } else { + else irq_desc[irq].status &= ~IRQ_LEVEL; + +#ifdef CONFIG_INTR_REMAP + if (irq_remapped(irq)) { + irq_desc[irq].status |= IRQ_MOVE_PCNTXT; + if (trigger) + set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, + handle_fasteoi_irq, + "fasteoi"); + else + set_irq_chip_and_handler_name(irq, &ir_ioapic_chip, + handle_edge_irq, "edge"); + return; + } +#endif + if (trigger) + set_irq_chip_and_handler_name(irq, &ioapic_chip, + handle_fasteoi_irq, + "fasteoi"); + else set_irq_chip_and_handler_name(irq, &ioapic_chip, handle_edge_irq, "edge"); +} + +static int setup_ioapic_entry(int apic, int irq, + struct IO_APIC_route_entry *entry, + unsigned int destination, int trigger, + int polarity, int vector) +{ + /* + * add it to the IO-APIC irq-routing table: + */ + memset(entry,0,sizeof(*entry)); + +#ifdef CONFIG_INTR_REMAP + if (intr_remapping_enabled) { + struct intel_iommu *iommu = map_ioapic_to_ir(apic); + struct irte irte; + struct IR_IO_APIC_route_entry *ir_entry = + (struct IR_IO_APIC_route_entry *) entry; + int index; + + if (!iommu) + panic("No mapping iommu for ioapic %d\n", apic); + + index = alloc_irte(iommu, irq, 1); + if (index < 0) + panic("Failed to allocate IRTE for ioapic %d\n", apic); + + memset(&irte, 0, sizeof(irte)); + + irte.present = 1; + irte.dst_mode = INT_DEST_MODE; + irte.trigger_mode = trigger; + irte.dlvry_mode = INT_DELIVERY_MODE; + irte.vector = vector; + irte.dest_id = IRTE_DEST(destination); + + modify_irte(irq, &irte); + + ir_entry->index2 = (index >> 15) & 0x1; + ir_entry->zero = 0; + ir_entry->format = 1; + ir_entry->index = (index & 0x7fff); + } else +#endif + { + entry->delivery_mode = INT_DELIVERY_MODE; + entry->dest_mode = INT_DEST_MODE; + entry->dest = destination; } + + entry->mask = 0; /* enable IRQ */ + entry->trigger = trigger; + entry->polarity = polarity; + entry->vector = vector; + + /* Mask level triggered irqs. + * Use IRQ_DELAYED_DISABLE for edge triggered irqs. + */ + if (trigger) + entry->mask = 1; + return 0; } static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, @@ -846,27 +1020,18 @@ static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq, apic_printk(APIC_VERBOSE,KERN_DEBUG "IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> " "IRQ %d Mode:%i Active:%i)\n", - apic, mp_ioapics[apic].mpc_apicid, pin, cfg->vector, + apic, mp_ioapics[apic].mp_apicid, pin, cfg->vector, irq, trigger, polarity); - /* - * add it to the IO-APIC irq-routing table: - */ - memset(&entry,0,sizeof(entry)); - entry.delivery_mode = INT_DELIVERY_MODE; - entry.dest_mode = INT_DEST_MODE; - entry.dest = cpu_mask_to_apicid(mask); - entry.mask = 0; /* enable IRQ */ - entry.trigger = trigger; - entry.polarity = polarity; - entry.vector = cfg->vector; - - /* Mask level triggered irqs. - * Use IRQ_DELAYED_DISABLE for edge triggered irqs. - */ - if (trigger) - entry.mask = 1; + if (setup_ioapic_entry(mp_ioapics[apic].mp_apicid, irq, &entry, + cpu_mask_to_apicid(mask), trigger, polarity, + cfg->vector)) { + printk("Failed to setup ioapic entry for ioapic %d, pin %d\n", + mp_ioapics[apic].mp_apicid, pin); + __clear_irq_vector(irq); + return; + } ioapic_register_intr(irq, trigger); if (irq < 16) @@ -887,10 +1052,10 @@ static void __init setup_IO_APIC_irqs(void) idx = find_irq_entry(apic,pin,mp_INT); if (idx == -1) { if (first_notcon) { - apic_printk(APIC_VERBOSE, KERN_DEBUG " IO-APIC (apicid-pin) %d-%d", mp_ioapics[apic].mpc_apicid, pin); + apic_printk(APIC_VERBOSE, KERN_DEBUG " IO-APIC (apicid-pin) %d-%d", mp_ioapics[apic].mp_apicid, pin); first_notcon = 0; } else - apic_printk(APIC_VERBOSE, ", %d-%d", mp_ioapics[apic].mpc_apicid, pin); + apic_printk(APIC_VERBOSE, ", %d-%d", mp_ioapics[apic].mp_apicid, pin); continue; } if (!first_notcon) { @@ -911,26 +1076,24 @@ static void __init setup_IO_APIC_irqs(void) } /* - * Set up the 8259A-master output pin as broadcast to all - * CPUs. + * Set up the timer pin, possibly with the 8259A-master behind. */ -static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, int vector) +static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, + int vector) { struct IO_APIC_route_entry entry; - memset(&entry, 0, sizeof(entry)); - - disable_8259A_irq(0); + if (intr_remapping_enabled) + return; - /* mask LVT0 */ - apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); + memset(&entry, 0, sizeof(entry)); /* * We use logical delivery to get the timer IRQ * to the first CPU. */ entry.dest_mode = INT_DEST_MODE; - entry.mask = 0; /* unmask IRQ now */ + entry.mask = 1; /* mask IRQ now */ entry.dest = cpu_mask_to_apicid(TARGET_CPUS); entry.delivery_mode = INT_DELIVERY_MODE; entry.polarity = 0; @@ -939,7 +1102,7 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in /* * The timer IRQ doesn't have to know that behind the - * scene we have a 8259A-master in AEOI mode ... + * scene we may have a 8259A-master in AEOI mode ... */ set_irq_chip_and_handler_name(0, &ioapic_chip, handle_edge_irq, "edge"); @@ -947,8 +1110,6 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned int apic, unsigned int pin, in * Add it to the IO-APIC irq-routing table: */ ioapic_write_entry(apic, pin, entry); - - enable_8259A_irq(0); } void __apicdebuginit print_IO_APIC(void) @@ -965,7 +1126,7 @@ void __apicdebuginit print_IO_APIC(void) printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); for (i = 0; i < nr_ioapics; i++) printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", - mp_ioapics[i].mpc_apicid, nr_ioapic_registers[i]); + mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); /* * We are a bit conservative about what we expect. We have to @@ -983,7 +1144,7 @@ void __apicdebuginit print_IO_APIC(void) spin_unlock_irqrestore(&ioapic_lock, flags); printk("\n"); - printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mpc_apicid); + printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); @@ -1071,13 +1232,15 @@ static __apicdebuginit void print_APIC_bitfield (int base) void __apicdebuginit print_local_APIC(void * dummy) { unsigned int v, ver, maxlvt; + unsigned long icr; if (apic_verbosity == APIC_QUIET) return; printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", smp_processor_id(), hard_smp_processor_id()); - printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, GET_APIC_ID(read_apic_id())); + v = apic_read(APIC_ID); + printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, read_apic_id()); v = apic_read(APIC_LVR); printk(KERN_INFO "... APIC VERSION: %08x\n", v); ver = GET_APIC_VERSION(v); @@ -1113,10 +1276,9 @@ void __apicdebuginit print_local_APIC(void * dummy) v = apic_read(APIC_ESR); printk(KERN_DEBUG "... APIC ESR: %08x\n", v); - v = apic_read(APIC_ICR); - printk(KERN_DEBUG "... APIC ICR: %08x\n", v); - v = apic_read(APIC_ICR2); - printk(KERN_DEBUG "... APIC ICR2: %08x\n", v); + icr = apic_icr_read(); + printk(KERN_DEBUG "... APIC ICR: %08x\n", icr); + printk(KERN_DEBUG "... APIC ICR2: %08x\n", icr >> 32); v = apic_read(APIC_LVTT); printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); @@ -1146,7 +1308,7 @@ void __apicdebuginit print_local_APIC(void * dummy) void print_all_local_APICs (void) { - on_each_cpu(print_local_APIC, NULL, 1, 1); + on_each_cpu(print_local_APIC, NULL, 1); } void __apicdebuginit print_PIC(void) @@ -1271,7 +1433,7 @@ void disable_IO_APIC(void) entry.dest_mode = 0; /* Physical */ entry.delivery_mode = dest_ExtINT; /* ExtInt */ entry.vector = 0; - entry.dest = GET_APIC_ID(read_apic_id()); + entry.dest = read_apic_id(); /* * Add it to the IO-APIC irq-routing table: @@ -1358,12 +1520,10 @@ static unsigned int startup_ioapic_irq(unsigned int irq) static int ioapic_retrigger_irq(unsigned int irq) { struct irq_cfg *cfg = &irq_cfg[irq]; - cpumask_t mask; unsigned long flags; spin_lock_irqsave(&vector_lock, flags); - mask = cpumask_of_cpu(first_cpu(cfg->domain)); - send_IPI_mask(mask, cfg->vector); + send_IPI_mask(cpumask_of_cpu(first_cpu(cfg->domain)), cfg->vector); spin_unlock_irqrestore(&vector_lock, flags); return 1; @@ -1379,6 +1539,147 @@ static int ioapic_retrigger_irq(unsigned int irq) */ #ifdef CONFIG_SMP + +#ifdef CONFIG_INTR_REMAP +static void ir_irq_migration(struct work_struct *work); + +static DECLARE_DELAYED_WORK(ir_migration_work, ir_irq_migration); + +/* + * Migrate the IO-APIC irq in the presence of intr-remapping. + * + * For edge triggered, irq migration is a simple atomic update(of vector + * and cpu destination) of IRTE and flush the hardware cache. + * + * For level triggered, we need to modify the io-apic RTE aswell with the update + * vector information, along with modifying IRTE with vector and destination. + * So irq migration for level triggered is little bit more complex compared to + * edge triggered migration. But the good news is, we use the same algorithm + * for level triggered migration as we have today, only difference being, + * we now initiate the irq migration from process context instead of the + * interrupt context. + * + * In future, when we do a directed EOI (combined with cpu EOI broadcast + * suppression) to the IO-APIC, level triggered irq migration will also be + * as simple as edge triggered migration and we can do the irq migration + * with a simple atomic update to IO-APIC RTE. + */ +static void migrate_ioapic_irq(int irq, cpumask_t mask) +{ + struct irq_cfg *cfg = irq_cfg + irq; + struct irq_desc *desc = irq_desc + irq; + cpumask_t tmp, cleanup_mask; + struct irte irte; + int modify_ioapic_rte = desc->status & IRQ_LEVEL; + unsigned int dest; + unsigned long flags; + + cpus_and(tmp, mask, cpu_online_map); + if (cpus_empty(tmp)) + return; + + if (get_irte(irq, &irte)) + return; + + if (assign_irq_vector(irq, mask)) + return; + + cpus_and(tmp, cfg->domain, mask); + dest = cpu_mask_to_apicid(tmp); + + if (modify_ioapic_rte) { + spin_lock_irqsave(&ioapic_lock, flags); + __target_IO_APIC_irq(irq, dest, cfg->vector); + spin_unlock_irqrestore(&ioapic_lock, flags); + } + + irte.vector = cfg->vector; + irte.dest_id = IRTE_DEST(dest); + + /* + * Modified the IRTE and flushes the Interrupt entry cache. + */ + modify_irte(irq, &irte); + + if (cfg->move_in_progress) { + cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); + cfg->move_cleanup_count = cpus_weight(cleanup_mask); + send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); + cfg->move_in_progress = 0; + } + + irq_desc[irq].affinity = mask; +} + +static int migrate_irq_remapped_level(int irq) +{ + int ret = -1; + + mask_IO_APIC_irq(irq); + + if (io_apic_level_ack_pending(irq)) { + /* + * Interrupt in progress. Migrating irq now will change the + * vector information in the IO-APIC RTE and that will confuse + * the EOI broadcast performed by cpu. + * So, delay the irq migration to the next instance. + */ + schedule_delayed_work(&ir_migration_work, 1); + goto unmask; + } + + /* everthing is clear. we have right of way */ + migrate_ioapic_irq(irq, irq_desc[irq].pending_mask); + + ret = 0; + irq_desc[irq].status &= ~IRQ_MOVE_PENDING; + cpus_clear(irq_desc[irq].pending_mask); + +unmask: + unmask_IO_APIC_irq(irq); + return ret; +} + +static void ir_irq_migration(struct work_struct *work) +{ + int irq; + + for (irq = 0; irq < NR_IRQS; irq++) { + struct irq_desc *desc = irq_desc + irq; + if (desc->status & IRQ_MOVE_PENDING) { + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + if (!desc->chip->set_affinity || + !(desc->status & IRQ_MOVE_PENDING)) { + desc->status &= ~IRQ_MOVE_PENDING; + spin_unlock_irqrestore(&desc->lock, flags); + continue; + } + + desc->chip->set_affinity(irq, + irq_desc[irq].pending_mask); + spin_unlock_irqrestore(&desc->lock, flags); + } + } +} + +/* + * Migrates the IRQ destination in the process context. + */ +static void set_ir_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) +{ + if (irq_desc[irq].status & IRQ_LEVEL) { + irq_desc[irq].status |= IRQ_MOVE_PENDING; + irq_desc[irq].pending_mask = mask; + migrate_irq_remapped_level(irq); + return; + } + + migrate_ioapic_irq(irq, mask); +} +#endif + asmlinkage void smp_irq_move_cleanup_interrupt(void) { unsigned vector, me; @@ -1435,6 +1736,17 @@ static void irq_complete_move(unsigned int irq) #else static inline void irq_complete_move(unsigned int irq) {} #endif +#ifdef CONFIG_INTR_REMAP +static void ack_x2apic_level(unsigned int irq) +{ + ack_x2APIC_irq(); +} + +static void ack_x2apic_edge(unsigned int irq) +{ + ack_x2APIC_irq(); +} +#endif static void ack_apic_edge(unsigned int irq) { @@ -1509,6 +1821,21 @@ static struct irq_chip ioapic_chip __read_mostly = { .retrigger = ioapic_retrigger_irq, }; +#ifdef CONFIG_INTR_REMAP +static struct irq_chip ir_ioapic_chip __read_mostly = { + .name = "IR-IO-APIC", + .startup = startup_ioapic_irq, + .mask = mask_IO_APIC_irq, + .unmask = unmask_IO_APIC_irq, + .ack = ack_x2apic_edge, + .eoi = ack_x2apic_level, +#ifdef CONFIG_SMP + .set_affinity = set_ir_ioapic_affinity_irq, +#endif + .retrigger = ioapic_retrigger_irq, +}; +#endif + static inline void init_IO_APIC_traps(void) { int irq; @@ -1540,7 +1867,7 @@ static inline void init_IO_APIC_traps(void) } } -static void enable_lapic_irq (unsigned int irq) +static void unmask_lapic_irq(unsigned int irq) { unsigned long v; @@ -1548,7 +1875,7 @@ static void enable_lapic_irq (unsigned int irq) apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); } -static void disable_lapic_irq (unsigned int irq) +static void mask_lapic_irq(unsigned int irq) { unsigned long v; @@ -1561,19 +1888,20 @@ static void ack_lapic_irq (unsigned int irq) ack_APIC_irq(); } -static void end_lapic_irq (unsigned int i) { /* nothing */ } - -static struct hw_interrupt_type lapic_irq_type __read_mostly = { - .name = "local-APIC", - .typename = "local-APIC-edge", - .startup = NULL, /* startup_irq() not used for IRQ0 */ - .shutdown = NULL, /* shutdown_irq() not used for IRQ0 */ - .enable = enable_lapic_irq, - .disable = disable_lapic_irq, - .ack = ack_lapic_irq, - .end = end_lapic_irq, +static struct irq_chip lapic_chip __read_mostly = { + .name = "local-APIC", + .mask = mask_lapic_irq, + .unmask = unmask_lapic_irq, + .ack = ack_lapic_irq, }; +static void lapic_register_intr(int irq) +{ + irq_desc[irq].status &= ~IRQ_LEVEL; + set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, + "edge"); +} + static void __init setup_nmi(void) { /* @@ -1659,6 +1987,7 @@ static inline void __init check_timer(void) struct irq_cfg *cfg = irq_cfg + 0; int apic1, pin1, apic2, pin2; unsigned long flags; + int no_pin1 = 0; local_irq_save(flags); @@ -1669,34 +1998,50 @@ static inline void __init check_timer(void) assign_irq_vector(0, TARGET_CPUS); /* - * Subtle, code in do_timer_interrupt() expects an AEOI - * mode for the 8259A whenever interrupts are routed - * through I/O APICs. Also IRQ0 has to be enabled in - * the 8259A which implies the virtual wire has to be - * disabled in the local APIC. + * As IRQ0 is to be enabled in the 8259A, the virtual + * wire has to be disabled in the local APIC. */ apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); init_8259A(1); - if (timer_over_8254 > 0) - enable_8259A_irq(0); pin1 = find_isa_irq_pin(0, mp_INT); apic1 = find_isa_irq_apic(0, mp_INT); pin2 = ioapic_i8259.pin; apic2 = ioapic_i8259.apic; - apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", - cfg->vector, apic1, pin1, apic2, pin2); + apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " + "apic1=%d pin1=%d apic2=%d pin2=%d\n", + cfg->vector, apic1, pin1, apic2, pin2); + + /* + * Some BIOS writers are clueless and report the ExtINTA + * I/O APIC input from the cascaded 8259A as the timer + * interrupt input. So just in case, if only one pin + * was found above, try it both directly and through the + * 8259A. + */ + if (pin1 == -1) { + if (intr_remapping_enabled) + panic("BIOS bug: timer not connected to IO-APIC"); + pin1 = pin2; + apic1 = apic2; + no_pin1 = 1; + } else if (pin2 == -1) { + pin2 = pin1; + apic2 = apic1; + } if (pin1 != -1) { /* * Ok, does IRQ0 through the IOAPIC work? */ + if (no_pin1) { + add_pin_to_irq(0, apic1, pin1); + setup_timer_IRQ0_pin(apic1, pin1, cfg->vector); + } unmask_IO_APIC_irq(0); if (!no_timer_check && timer_irq_works()) { - nmi_watchdog_default(); if (nmi_watchdog == NMI_IO_APIC) { - disable_8259A_irq(0); setup_nmi(); enable_8259A_irq(0); } @@ -1704,55 +2049,65 @@ static inline void __init check_timer(void) clear_IO_APIC_pin(0, pin1); goto out; } + if (intr_remapping_enabled) + panic("timer doesn't work through Interrupt-remapped IO-APIC"); clear_IO_APIC_pin(apic1, pin1); - apic_printk(APIC_QUIET,KERN_ERR "..MP-BIOS bug: 8254 timer not " - "connected to IO-APIC\n"); - } - - apic_printk(APIC_VERBOSE,KERN_INFO "...trying to set up timer (IRQ0) " - "through the 8259A ... "); - if (pin2 != -1) { - apic_printk(APIC_VERBOSE,"\n..... (found apic %d pin %d) ...", - apic2, pin2); + if (!no_pin1) + apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " + "8254 timer not connected to IO-APIC\n"); + + apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " + "(IRQ0) through the 8259A ...\n"); + apic_printk(APIC_QUIET, KERN_INFO + "..... (found apic %d pin %d) ...\n", apic2, pin2); /* * legacy devices should be connected to IO APIC #0 */ - setup_ExtINT_IRQ0_pin(apic2, pin2, cfg->vector); + replace_pin_at_irq(0, apic1, pin1, apic2, pin2); + setup_timer_IRQ0_pin(apic2, pin2, cfg->vector); + unmask_IO_APIC_irq(0); + enable_8259A_irq(0); if (timer_irq_works()) { - apic_printk(APIC_VERBOSE," works.\n"); - nmi_watchdog_default(); + apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); + timer_through_8259 = 1; if (nmi_watchdog == NMI_IO_APIC) { + disable_8259A_irq(0); setup_nmi(); + enable_8259A_irq(0); } goto out; } /* * Cleanup, just in case ... */ + disable_8259A_irq(0); clear_IO_APIC_pin(apic2, pin2); + apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); } - apic_printk(APIC_VERBOSE," failed.\n"); if (nmi_watchdog == NMI_IO_APIC) { - printk(KERN_WARNING "timer doesn't work through the IO-APIC - disabling NMI Watchdog!\n"); - nmi_watchdog = 0; + apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " + "through the IO-APIC - disabling NMI Watchdog!\n"); + nmi_watchdog = NMI_NONE; } - apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as Virtual Wire IRQ..."); + apic_printk(APIC_QUIET, KERN_INFO + "...trying to set up timer as Virtual Wire IRQ...\n"); - disable_8259A_irq(0); - irq_desc[0].chip = &lapic_irq_type; + lapic_register_intr(0); apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ enable_8259A_irq(0); if (timer_irq_works()) { - apic_printk(APIC_VERBOSE," works.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); goto out; } + disable_8259A_irq(0); apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); - apic_printk(APIC_VERBOSE," failed.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); - apic_printk(APIC_VERBOSE, KERN_INFO "...trying to set up timer as ExtINT IRQ..."); + apic_printk(APIC_QUIET, KERN_INFO + "...trying to set up timer as ExtINT IRQ...\n"); init_8259A(0); make_8259A_irq(0); @@ -1761,11 +2116,12 @@ static inline void __init check_timer(void) unlock_ExtINT_logic(); if (timer_irq_works()) { - apic_printk(APIC_VERBOSE," works.\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); goto out; } - apic_printk(APIC_VERBOSE," failed :(.\n"); - panic("IO-APIC + timer doesn't work! Try using the 'noapic' kernel parameter\n"); + apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); + panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " + "report. Then try booting with the 'noapic' option.\n"); out: local_irq_restore(flags); } @@ -1778,11 +2134,21 @@ static int __init notimercheck(char *s) __setup("no_timer_check", notimercheck); /* - * - * IRQs that are handled by the PIC in the MPS IOAPIC case. - * - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ. - * Linux doesn't really care, as it's not actually used - * for any interrupt handling anyway. + * Traditionally ISA IRQ2 is the cascade IRQ, and is not available + * to devices. However there may be an I/O APIC pin available for + * this interrupt regardless. The pin may be left unconnected, but + * typically it will be reused as an ExtINT cascade interrupt for + * the master 8259A. In the MPS case such a pin will normally be + * reported as an ExtINT interrupt in the MP table. With ACPI + * there is no provision for ExtINT interrupts, and in the absence + * of an override it would be treated as an ordinary ISA I/O APIC + * interrupt, that is edge-triggered and unmasked by default. We + * used to do this, but it caused problems on some systems because + * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using + * the same ExtINT cascade interrupt to drive the local APIC of the + * bootstrap processor. Therefore we refrain from routing IRQ2 to + * the I/O APIC in all cases now. No actual device should request + * it anyway. --macro */ #define PIC_IRQS (1<<2) @@ -1793,10 +2159,7 @@ void __init setup_IO_APIC(void) * calling enable_IO_APIC() is moved to setup_local_APIC for BP */ - if (acpi_ioapic) - io_apic_irqs = ~0; /* all IRQs go through IOAPIC */ - else - io_apic_irqs = ~PIC_IRQS; + io_apic_irqs = ~PIC_IRQS; apic_printk(APIC_VERBOSE, "ENABLING IO-APIC IRQs\n"); @@ -1841,8 +2204,8 @@ static int ioapic_resume(struct sys_device *dev) spin_lock_irqsave(&ioapic_lock, flags); reg_00.raw = io_apic_read(dev->id, 0); - if (reg_00.bits.ID != mp_ioapics[dev->id].mpc_apicid) { - reg_00.bits.ID = mp_ioapics[dev->id].mpc_apicid; + if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { + reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; io_apic_write(dev->id, 0, reg_00.raw); } spin_unlock_irqrestore(&ioapic_lock, flags); @@ -1927,6 +2290,9 @@ void destroy_irq(unsigned int irq) dynamic_irq_cleanup(irq); +#ifdef CONFIG_INTR_REMAP + free_irte(irq); +#endif spin_lock_irqsave(&vector_lock, flags); __clear_irq_vector(irq); spin_unlock_irqrestore(&vector_lock, flags); @@ -1945,10 +2311,41 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms tmp = TARGET_CPUS; err = assign_irq_vector(irq, tmp); - if (!err) { - cpus_and(tmp, cfg->domain, tmp); - dest = cpu_mask_to_apicid(tmp); + if (err) + return err; + + cpus_and(tmp, cfg->domain, tmp); + dest = cpu_mask_to_apicid(tmp); + +#ifdef CONFIG_INTR_REMAP + if (irq_remapped(irq)) { + struct irte irte; + int ir_index; + u16 sub_handle; + + ir_index = map_irq_to_irte_handle(irq, &sub_handle); + BUG_ON(ir_index == -1); + + memset (&irte, 0, sizeof(irte)); + + irte.present = 1; + irte.dst_mode = INT_DEST_MODE; + irte.trigger_mode = 0; /* edge */ + irte.dlvry_mode = INT_DELIVERY_MODE; + irte.vector = cfg->vector; + irte.dest_id = IRTE_DEST(dest); + + modify_irte(irq, &irte); + msg->address_hi = MSI_ADDR_BASE_HI; + msg->data = sub_handle; + msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | + MSI_ADDR_IR_SHV | + MSI_ADDR_IR_INDEX1(ir_index) | + MSI_ADDR_IR_INDEX2(ir_index); + } else +#endif + { msg->address_hi = MSI_ADDR_BASE_HI; msg->address_lo = MSI_ADDR_BASE_LO | @@ -1999,6 +2396,55 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask) write_msi_msg(irq, &msg); irq_desc[irq].affinity = mask; } + +#ifdef CONFIG_INTR_REMAP +/* + * Migrate the MSI irq to another cpumask. This migration is + * done in the process context using interrupt-remapping hardware. + */ +static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask) +{ + struct irq_cfg *cfg = irq_cfg + irq; + unsigned int dest; + cpumask_t tmp, cleanup_mask; + struct irte irte; + + cpus_and(tmp, mask, cpu_online_map); + if (cpus_empty(tmp)) + return; + + if (get_irte(irq, &irte)) + return; + + if (assign_irq_vector(irq, mask)) + return; + + cpus_and(tmp, cfg->domain, mask); + dest = cpu_mask_to_apicid(tmp); + + irte.vector = cfg->vector; + irte.dest_id = IRTE_DEST(dest); + + /* + * atomically update the IRTE with the new destination and vector. + */ + modify_irte(irq, &irte); + + /* + * After this point, all the interrupts will start arriving + * at the new destination. So, time to cleanup the previous + * vector allocation. + */ + if (cfg->move_in_progress) { + cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map); + cfg->move_cleanup_count = cpus_weight(cleanup_mask); + send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR); + cfg->move_in_progress = 0; + } + + irq_desc[irq].affinity = mask; +} +#endif #endif /* CONFIG_SMP */ /* @@ -2016,26 +2462,157 @@ static struct irq_chip msi_chip = { .retrigger = ioapic_retrigger_irq, }; -int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) +#ifdef CONFIG_INTR_REMAP +static struct irq_chip msi_ir_chip = { + .name = "IR-PCI-MSI", + .unmask = unmask_msi_irq, + .mask = mask_msi_irq, + .ack = ack_x2apic_edge, +#ifdef CONFIG_SMP + .set_affinity = ir_set_msi_irq_affinity, +#endif + .retrigger = ioapic_retrigger_irq, +}; + +/* + * Map the PCI dev to the corresponding remapping hardware unit + * and allocate 'nvec' consecutive interrupt-remapping table entries + * in it. + */ +static int msi_alloc_irte(struct pci_dev *dev, int irq, int nvec) { + struct intel_iommu *iommu; + int index; + + iommu = map_dev_to_ir(dev); + if (!iommu) { + printk(KERN_ERR + "Unable to map PCI %s to iommu\n", pci_name(dev)); + return -ENOENT; + } + + index = alloc_irte(iommu, irq, nvec); + if (index < 0) { + printk(KERN_ERR + "Unable to allocate %d IRTE for PCI %s\n", nvec, + pci_name(dev)); + return -ENOSPC; + } + return index; +} +#endif + +static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc, int irq) +{ + int ret; struct msi_msg msg; + + ret = msi_compose_msg(dev, irq, &msg); + if (ret < 0) + return ret; + + set_irq_msi(irq, desc); + write_msi_msg(irq, &msg); + +#ifdef CONFIG_INTR_REMAP + if (irq_remapped(irq)) { + struct irq_desc *desc = irq_desc + irq; + /* + * irq migration in process context + */ + desc->status |= IRQ_MOVE_PCNTXT; + set_irq_chip_and_handler_name(irq, &msi_ir_chip, handle_edge_irq, "edge"); + } else +#endif + set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); + + return 0; +} + +int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) +{ int irq, ret; + irq = create_irq(); if (irq < 0) return irq; - ret = msi_compose_msg(dev, irq, &msg); +#ifdef CONFIG_INTR_REMAP + if (!intr_remapping_enabled) + goto no_ir; + + ret = msi_alloc_irte(dev, irq, 1); + if (ret < 0) + goto error; +no_ir: +#endif + ret = setup_msi_irq(dev, desc, irq); if (ret < 0) { destroy_irq(irq); return ret; } + return 0; - set_irq_msi(irq, desc); - write_msi_msg(irq, &msg); +#ifdef CONFIG_INTR_REMAP +error: + destroy_irq(irq); + return ret; +#endif +} - set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, "edge"); +int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) +{ + int irq, ret, sub_handle; + struct msi_desc *desc; +#ifdef CONFIG_INTR_REMAP + struct intel_iommu *iommu = 0; + int index = 0; +#endif + sub_handle = 0; + list_for_each_entry(desc, &dev->msi_list, list) { + irq = create_irq(); + if (irq < 0) + return irq; +#ifdef CONFIG_INTR_REMAP + if (!intr_remapping_enabled) + goto no_ir; + + if (!sub_handle) { + /* + * allocate the consecutive block of IRTE's + * for 'nvec' + */ + index = msi_alloc_irte(dev, irq, nvec); + if (index < 0) { + ret = index; + goto error; + } + } else { + iommu = map_dev_to_ir(dev); + if (!iommu) { + ret = -ENOENT; + goto error; + } + /* + * setup the mapping between the irq and the IRTE + * base index, the sub_handle pointing to the + * appropriate interrupt remap table entry. + */ + set_irte_irq(irq, iommu, index, sub_handle); + } +no_ir: +#endif + ret = setup_msi_irq(dev, desc, irq); + if (ret < 0) + goto error; + sub_handle++; + } return 0; + +error: + destroy_irq(irq); + return ret; } void arch_teardown_msi_irq(unsigned int irq) @@ -2242,8 +2819,8 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) return -1; for (i = 0; i < mp_irq_entries; i++) - if (mp_irqs[i].mpc_irqtype == mp_INT && - mp_irqs[i].mpc_srcbusirq == bus_irq) + if (mp_irqs[i].mp_irqtype == mp_INT && + mp_irqs[i].mp_srcbusirq == bus_irq) break; if (i >= mp_irq_entries) return -1; @@ -2283,6 +2860,10 @@ void __init setup_ioapic_dest(void) setup_IO_APIC_irq(ioapic, pin, irq, irq_trigger(irq_entry), irq_polarity(irq_entry)); +#ifdef CONFIG_INTR_REMAP + else if (intr_remapping_enabled) + set_ir_ioapic_affinity_irq(irq, TARGET_CPUS); +#endif else set_ioapic_affinity_irq(irq, TARGET_CPUS); } @@ -2336,7 +2917,7 @@ void __init ioapic_init_mappings(void) ioapic_res = ioapic_setup_resources(); for (i = 0; i < nr_ioapics; i++) { if (smp_found_config) { - ioapic_phys = mp_ioapics[i].mpc_apicaddr; + ioapic_phys = mp_ioapics[i].mp_apicaddr; } else { ioapic_phys = (unsigned long) alloc_bootmem_pages(PAGE_SIZE); diff --git a/arch/x86/kernel/io_delay.c b/arch/x86/kernel/io_delay.c index 5921e5f0a64027745fa2ac3e5f695ceaca9ddeae..1c3a66a67f83d3bb6d7eec2d5e4cfb1560660720 100644 --- a/arch/x86/kernel/io_delay.c +++ b/arch/x86/kernel/io_delay.c @@ -103,6 +103,9 @@ void __init io_delay_init(void) static int __init io_delay_param(char *s) { + if (!s) + return -EINVAL; + if (!strcmp(s, "0x80")) io_delay_type = CONFIG_IO_DELAY_TYPE_0X80; else if (!strcmp(s, "0xed")) diff --git a/arch/x86/kernel/ipi.c b/arch/x86/kernel/ipi.c index c0df7b89ca230d83e2f3b0f65dfd900a813d69e8..3f7537b669d312e08a6d92e92787feb0ae903549 100644 --- a/arch/x86/kernel/ipi.c +++ b/arch/x86/kernel/ipi.c @@ -8,7 +8,6 @@ #include #include #include -#include #include #include @@ -71,7 +70,7 @@ void __send_IPI_shortcut(unsigned int shortcut, int vector) /* * Send the IPI. The write to APIC_ICR fires this off. */ - apic_write_around(APIC_ICR, cfg); + apic_write(APIC_ICR, cfg); } void send_IPI_self(int vector) @@ -99,7 +98,7 @@ static inline void __send_IPI_dest_field(unsigned long mask, int vector) * prepare target chip field */ cfg = __prepare_ICR2(mask); - apic_write_around(APIC_ICR2, cfg); + apic_write(APIC_ICR2, cfg); /* * program the ICR @@ -109,7 +108,7 @@ static inline void __send_IPI_dest_field(unsigned long mask, int vector) /* * Send the IPI. The write to APIC_ICR fires this off. */ - apic_write_around(APIC_ICR, cfg); + apic_write(APIC_ICR, cfg); } /* diff --git a/arch/x86/kernel/irq_32.c b/arch/x86/kernel/irq_32.c index 147352df28b9c74146a102f6c8b22b17e2b11d6d..1cf8c1fcc0889c5a066ddb2b7e150ece69dc1729 100644 --- a/arch/x86/kernel/irq_32.c +++ b/arch/x86/kernel/irq_32.c @@ -48,6 +48,29 @@ void ack_bad_irq(unsigned int irq) #endif } +#ifdef CONFIG_DEBUG_STACKOVERFLOW +/* Debugging check for stack overflow: is there less than 1KB free? */ +static int check_stack_overflow(void) +{ + long sp; + + __asm__ __volatile__("andl %%esp,%0" : + "=r" (sp) : "0" (THREAD_SIZE - 1)); + + return sp < (sizeof(struct thread_info) + STACK_WARN); +} + +static void print_stack_overflow(void) +{ + printk(KERN_WARNING "low stack detected by irq handler\n"); + dump_stack(); +} + +#else +static inline int check_stack_overflow(void) { return 0; } +static inline void print_stack_overflow(void) { } +#endif + #ifdef CONFIG_4KSTACKS /* * per-CPU IRQ handling contexts (thread information and stack) @@ -59,48 +82,26 @@ union irq_ctx { static union irq_ctx *hardirq_ctx[NR_CPUS] __read_mostly; static union irq_ctx *softirq_ctx[NR_CPUS] __read_mostly; -#endif - -/* - * do_IRQ handles all normal device IRQ's (the special - * SMP cross-CPU interrupts have their own specific - * handlers). - */ -unsigned int do_IRQ(struct pt_regs *regs) -{ - struct pt_regs *old_regs; - /* high bit used in ret_from_ code */ - int irq = ~regs->orig_ax; - struct irq_desc *desc = irq_desc + irq; -#ifdef CONFIG_4KSTACKS - union irq_ctx *curctx, *irqctx; - u32 *isp; -#endif - if (unlikely((unsigned)irq >= NR_IRQS)) { - printk(KERN_EMERG "%s: cannot handle IRQ %d\n", - __func__, irq); - BUG(); - } +static char softirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; +static char hardirq_stack[NR_CPUS * THREAD_SIZE] __page_aligned_bss; - old_regs = set_irq_regs(regs); - irq_enter(); -#ifdef CONFIG_DEBUG_STACKOVERFLOW - /* Debugging check for stack overflow: is there less than 1KB free? */ - { - long sp; - - __asm__ __volatile__("andl %%esp,%0" : - "=r" (sp) : "0" (THREAD_SIZE - 1)); - if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) { - printk("do_IRQ: stack overflow: %ld\n", - sp - sizeof(struct thread_info)); - dump_stack(); - } - } -#endif +static void call_on_stack(void *func, void *stack) +{ + asm volatile("xchgl %%ebx,%%esp \n" + "call *%%edi \n" + "movl %%ebx,%%esp \n" + : "=b" (stack) + : "0" (stack), + "D"(func) + : "memory", "cc", "edx", "ecx", "eax"); +} -#ifdef CONFIG_4KSTACKS +static inline int +execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) +{ + union irq_ctx *curctx, *irqctx; + u32 *isp, arg1, arg2; curctx = (union irq_ctx *) current_thread_info(); irqctx = hardirq_ctx[smp_processor_id()]; @@ -111,52 +112,39 @@ unsigned int do_IRQ(struct pt_regs *regs) * handler) we can't do that and just have to keep using the * current stack (which is the irq stack already after all) */ - if (curctx != irqctx) { - int arg1, arg2, bx; - - /* build the stack frame on the IRQ stack */ - isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); - irqctx->tinfo.task = curctx->tinfo.task; - irqctx->tinfo.previous_esp = current_stack_pointer; + if (unlikely(curctx == irqctx)) + return 0; - /* - * Copy the softirq bits in preempt_count so that the - * softirq checks work in the hardirq context. - */ - irqctx->tinfo.preempt_count = - (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) | - (curctx->tinfo.preempt_count & SOFTIRQ_MASK); - - asm volatile( - " xchgl %%ebx,%%esp \n" - " call *%%edi \n" - " movl %%ebx,%%esp \n" - : "=a" (arg1), "=d" (arg2), "=b" (bx) - : "0" (irq), "1" (desc), "2" (isp), - "D" (desc->handle_irq) - : "memory", "cc", "ecx" - ); - } else -#endif - desc->handle_irq(irq, desc); + /* build the stack frame on the IRQ stack */ + isp = (u32 *) ((char*)irqctx + sizeof(*irqctx)); + irqctx->tinfo.task = curctx->tinfo.task; + irqctx->tinfo.previous_esp = current_stack_pointer; - irq_exit(); - set_irq_regs(old_regs); + /* + * Copy the softirq bits in preempt_count so that the + * softirq checks work in the hardirq context. + */ + irqctx->tinfo.preempt_count = + (irqctx->tinfo.preempt_count & ~SOFTIRQ_MASK) | + (curctx->tinfo.preempt_count & SOFTIRQ_MASK); + + if (unlikely(overflow)) + call_on_stack(print_stack_overflow, isp); + + asm volatile("xchgl %%ebx,%%esp \n" + "call *%%edi \n" + "movl %%ebx,%%esp \n" + : "=a" (arg1), "=d" (arg2), "=b" (isp) + : "0" (irq), "1" (desc), "2" (isp), + "D" (desc->handle_irq) + : "memory", "cc", "ecx"); return 1; } -#ifdef CONFIG_4KSTACKS - -static char softirq_stack[NR_CPUS * THREAD_SIZE] - __attribute__((__section__(".bss.page_aligned"))); - -static char hardirq_stack[NR_CPUS * THREAD_SIZE] - __attribute__((__section__(".bss.page_aligned"))); - /* * allocate per-cpu stacks for hardirq and for softirq processing */ -void irq_ctx_init(int cpu) +void __cpuinit irq_ctx_init(int cpu) { union irq_ctx *irqctx; @@ -164,25 +152,25 @@ void irq_ctx_init(int cpu) return; irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE]; - irqctx->tinfo.task = NULL; - irqctx->tinfo.exec_domain = NULL; - irqctx->tinfo.cpu = cpu; - irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; - irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); + irqctx->tinfo.task = NULL; + irqctx->tinfo.exec_domain = NULL; + irqctx->tinfo.cpu = cpu; + irqctx->tinfo.preempt_count = HARDIRQ_OFFSET; + irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); hardirq_ctx[cpu] = irqctx; irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE]; - irqctx->tinfo.task = NULL; - irqctx->tinfo.exec_domain = NULL; - irqctx->tinfo.cpu = cpu; - irqctx->tinfo.preempt_count = 0; - irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); + irqctx->tinfo.task = NULL; + irqctx->tinfo.exec_domain = NULL; + irqctx->tinfo.cpu = cpu; + irqctx->tinfo.preempt_count = 0; + irqctx->tinfo.addr_limit = MAKE_MM_SEG(0); softirq_ctx[cpu] = irqctx; - printk("CPU %u irqstacks, hard=%p soft=%p\n", - cpu,hardirq_ctx[cpu],softirq_ctx[cpu]); + printk(KERN_DEBUG "CPU %u irqstacks, hard=%p soft=%p\n", + cpu,hardirq_ctx[cpu],softirq_ctx[cpu]); } void irq_ctx_exit(int cpu) @@ -211,24 +199,55 @@ asmlinkage void do_softirq(void) /* build the stack frame on the softirq stack */ isp = (u32*) ((char*)irqctx + sizeof(*irqctx)); - asm volatile( - " xchgl %%ebx,%%esp \n" - " call __do_softirq \n" - " movl %%ebx,%%esp \n" - : "=b"(isp) - : "0"(isp) - : "memory", "cc", "edx", "ecx", "eax" - ); + call_on_stack(__do_softirq, isp); /* * Shouldnt happen, we returned above if in_interrupt(): - */ + */ WARN_ON_ONCE(softirq_count()); } local_irq_restore(flags); } + +#else +static inline int +execute_on_irq_stack(int overflow, struct irq_desc *desc, int irq) { return 0; } #endif +/* + * do_IRQ handles all normal device IRQ's (the special + * SMP cross-CPU interrupts have their own specific + * handlers). + */ +unsigned int do_IRQ(struct pt_regs *regs) +{ + struct pt_regs *old_regs; + /* high bit used in ret_from_ code */ + int overflow, irq = ~regs->orig_ax; + struct irq_desc *desc = irq_desc + irq; + + if (unlikely((unsigned)irq >= NR_IRQS)) { + printk(KERN_EMERG "%s: cannot handle IRQ %d\n", + __func__, irq); + BUG(); + } + + old_regs = set_irq_regs(regs); + irq_enter(); + + overflow = check_stack_overflow(); + + if (!execute_on_irq_stack(overflow, desc, irq)) { + if (unlikely(overflow)) + print_stack_overflow(); + desc->handle_irq(irq, desc); + } + + irq_exit(); + set_irq_regs(old_regs); + return 1; +} + /* * Interrupt statistics: */ @@ -313,16 +332,20 @@ skip: per_cpu(irq_stat,j).irq_tlb_count); seq_printf(p, " TLB shootdowns\n"); #endif +#ifdef CONFIG_X86_MCE seq_printf(p, "TRM: "); for_each_online_cpu(j) seq_printf(p, "%10u ", per_cpu(irq_stat,j).irq_thermal_count); seq_printf(p, " Thermal event interrupts\n"); +#endif +#ifdef CONFIG_X86_LOCAL_APIC seq_printf(p, "SPU: "); for_each_online_cpu(j) seq_printf(p, "%10u ", per_cpu(irq_stat,j).irq_spurious_count); seq_printf(p, " Spurious interrupts\n"); +#endif seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); #if defined(CONFIG_X86_IO_APIC) seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count)); @@ -331,6 +354,40 @@ skip: return 0; } +/* + * /proc/stat helpers + */ +u64 arch_irq_stat_cpu(unsigned int cpu) +{ + u64 sum = nmi_count(cpu); + +#ifdef CONFIG_X86_LOCAL_APIC + sum += per_cpu(irq_stat, cpu).apic_timer_irqs; +#endif +#ifdef CONFIG_SMP + sum += per_cpu(irq_stat, cpu).irq_resched_count; + sum += per_cpu(irq_stat, cpu).irq_call_count; + sum += per_cpu(irq_stat, cpu).irq_tlb_count; +#endif +#ifdef CONFIG_X86_MCE + sum += per_cpu(irq_stat, cpu).irq_thermal_count; +#endif +#ifdef CONFIG_X86_LOCAL_APIC + sum += per_cpu(irq_stat, cpu).irq_spurious_count; +#endif + return sum; +} + +u64 arch_irq_stat(void) +{ + u64 sum = atomic_read(&irq_err_count); + +#ifdef CONFIG_X86_IO_APIC + sum += atomic_read(&irq_mis_count); +#endif + return sum; +} + #ifdef CONFIG_HOTPLUG_CPU #include diff --git a/arch/x86/kernel/irq_64.c b/arch/x86/kernel/irq_64.c index 3aac15466a91f951df85fdcaccdc7e0dd2196d8b..1f78b238d8d2cc8778520e048fe69d36a97209b2 100644 --- a/arch/x86/kernel/irq_64.c +++ b/arch/x86/kernel/irq_64.c @@ -135,6 +135,7 @@ skip: seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count); seq_printf(p, " TLB shootdowns\n"); #endif +#ifdef CONFIG_X86_MCE seq_printf(p, "TRM: "); for_each_online_cpu(j) seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count); @@ -143,6 +144,7 @@ skip: for_each_online_cpu(j) seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count); seq_printf(p, " Threshold APIC interrupts\n"); +#endif seq_printf(p, "SPU: "); for_each_online_cpu(j) seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count); @@ -152,6 +154,32 @@ skip: return 0; } +/* + * /proc/stat helpers + */ +u64 arch_irq_stat_cpu(unsigned int cpu) +{ + u64 sum = cpu_pda(cpu)->__nmi_count; + + sum += cpu_pda(cpu)->apic_timer_irqs; +#ifdef CONFIG_SMP + sum += cpu_pda(cpu)->irq_resched_count; + sum += cpu_pda(cpu)->irq_call_count; + sum += cpu_pda(cpu)->irq_tlb_count; +#endif +#ifdef CONFIG_X86_MCE + sum += cpu_pda(cpu)->irq_thermal_count; + sum += cpu_pda(cpu)->irq_threshold_count; +#endif + sum += cpu_pda(cpu)->irq_spurious_count; + return sum; +} + +u64 arch_irq_stat(void) +{ + return atomic_read(&irq_err_count); +} + /* * do_IRQ handles all normal device IRQ's (the special * SMP cross-CPU interrupts have their own specific diff --git a/arch/x86/kernel/irqinit_32.c b/arch/x86/kernel/irqinit_32.c new file mode 100644 index 0000000000000000000000000000000000000000..d66914287ee12f95659d823daccdfe4b7378da01 --- /dev/null +++ b/arch/x86/kernel/irqinit_32.c @@ -0,0 +1,114 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + + +/* + * Note that on a 486, we don't want to do a SIGFPE on an irq13 + * as the irq is unreliable, and exception 16 works correctly + * (ie as explained in the intel literature). On a 386, you + * can't use exception 16 due to bad IBM design, so we have to + * rely on the less exact irq13. + * + * Careful.. Not only is IRQ13 unreliable, but it is also + * leads to races. IBM designers who came up with it should + * be shot. + */ + + +static irqreturn_t math_error_irq(int cpl, void *dev_id) +{ + extern void math_error(void __user *); + outb(0,0xF0); + if (ignore_fpu_irq || !boot_cpu_data.hard_math) + return IRQ_NONE; + math_error((void __user *)get_irq_regs()->ip); + return IRQ_HANDLED; +} + +/* + * New motherboards sometimes make IRQ 13 be a PCI interrupt, + * so allow interrupt sharing. + */ +static struct irqaction fpu_irq = { + .handler = math_error_irq, + .mask = CPU_MASK_NONE, + .name = "fpu", +}; + +void __init init_ISA_irqs (void) +{ + int i; + +#ifdef CONFIG_X86_LOCAL_APIC + init_bsp_APIC(); +#endif + init_8259A(0); + + /* + * 16 old-style INTA-cycle interrupts: + */ + for (i = 0; i < 16; i++) { + set_irq_chip_and_handler_name(i, &i8259A_chip, + handle_level_irq, "XT"); + } +} + +/* Overridden in paravirt.c */ +void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); + +void __init native_init_IRQ(void) +{ + int i; + + /* all the set up before the call gates are initialised */ + pre_intr_init_hook(); + + /* + * Cover the whole vector space, no vector can escape + * us. (some of these will be overridden and become + * 'special' SMP interrupts) + */ + for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { + int vector = FIRST_EXTERNAL_VECTOR + i; + if (i >= NR_IRQS) + break; + /* SYSCALL_VECTOR was reserved in trap_init. */ + if (!test_bit(vector, used_vectors)) + set_intr_gate(vector, interrupt[i]); + } + + /* setup after call gates are initialised (usually add in + * the architecture specific gates) + */ + intr_init_hook(); + + /* + * External FPU? Set up irq13 if so, for + * original braindamaged IBM FERR coupling. + */ + if (boot_cpu_data.hard_math && !cpu_has_fpu) + setup_irq(FPU_IRQ, &fpu_irq); + + irq_ctx_init(smp_processor_id()); +} diff --git a/arch/x86/kernel/irqinit_64.c b/arch/x86/kernel/irqinit_64.c new file mode 100644 index 0000000000000000000000000000000000000000..1f26fd9ec4f4ea101c69ee030ac4142f4458d5ae --- /dev/null +++ b/arch/x86/kernel/irqinit_64.c @@ -0,0 +1,222 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Common place to define all x86 IRQ vectors + * + * This builds up the IRQ handler stubs using some ugly macros in irq.h + * + * These macros create the low-level assembly IRQ routines that save + * register context and call do_IRQ(). do_IRQ() then does all the + * operations that are needed to keep the AT (or SMP IOAPIC) + * interrupt-controller happy. + */ + +#define IRQ_NAME2(nr) nr##_interrupt(void) +#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) + +/* + * SMP has a few special interrupts for IPI messages + */ + +#define BUILD_IRQ(nr) \ + asmlinkage void IRQ_NAME(nr); \ + asm("\n.text\n.p2align\n" \ + "IRQ" #nr "_interrupt:\n\t" \ + "push $~(" #nr ") ; " \ + "jmp common_interrupt\n" \ + ".previous"); + +#define BI(x,y) \ + BUILD_IRQ(x##y) + +#define BUILD_16_IRQS(x) \ + BI(x,0) BI(x,1) BI(x,2) BI(x,3) \ + BI(x,4) BI(x,5) BI(x,6) BI(x,7) \ + BI(x,8) BI(x,9) BI(x,a) BI(x,b) \ + BI(x,c) BI(x,d) BI(x,e) BI(x,f) + +/* + * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts: + * (these are usually mapped to vectors 0x30-0x3f) + */ + +/* + * The IO-APIC gives us many more interrupt sources. Most of these + * are unused but an SMP system is supposed to have enough memory ... + * sometimes (mostly wrt. hw bugs) we get corrupted vectors all + * across the spectrum, so we really want to be prepared to get all + * of these. Plus, more powerful systems might have more than 64 + * IO-APIC registers. + * + * (these are usually mapped into the 0x30-0xff vector range) + */ + BUILD_16_IRQS(0x2) BUILD_16_IRQS(0x3) +BUILD_16_IRQS(0x4) BUILD_16_IRQS(0x5) BUILD_16_IRQS(0x6) BUILD_16_IRQS(0x7) +BUILD_16_IRQS(0x8) BUILD_16_IRQS(0x9) BUILD_16_IRQS(0xa) BUILD_16_IRQS(0xb) +BUILD_16_IRQS(0xc) BUILD_16_IRQS(0xd) BUILD_16_IRQS(0xe) BUILD_16_IRQS(0xf) + +#undef BUILD_16_IRQS +#undef BI + + +#define IRQ(x,y) \ + IRQ##x##y##_interrupt + +#define IRQLIST_16(x) \ + IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \ + IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \ + IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \ + IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f) + +/* for the irq vectors */ +static void (*__initdata interrupt[NR_VECTORS - FIRST_EXTERNAL_VECTOR])(void) = { + IRQLIST_16(0x2), IRQLIST_16(0x3), + IRQLIST_16(0x4), IRQLIST_16(0x5), IRQLIST_16(0x6), IRQLIST_16(0x7), + IRQLIST_16(0x8), IRQLIST_16(0x9), IRQLIST_16(0xa), IRQLIST_16(0xb), + IRQLIST_16(0xc), IRQLIST_16(0xd), IRQLIST_16(0xe), IRQLIST_16(0xf) +}; + +#undef IRQ +#undef IRQLIST_16 + + + + +/* + * IRQ2 is cascade interrupt to second interrupt controller + */ + +static struct irqaction irq2 = { + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", +}; +DEFINE_PER_CPU(vector_irq_t, vector_irq) = { + [0 ... IRQ0_VECTOR - 1] = -1, + [IRQ0_VECTOR] = 0, + [IRQ1_VECTOR] = 1, + [IRQ2_VECTOR] = 2, + [IRQ3_VECTOR] = 3, + [IRQ4_VECTOR] = 4, + [IRQ5_VECTOR] = 5, + [IRQ6_VECTOR] = 6, + [IRQ7_VECTOR] = 7, + [IRQ8_VECTOR] = 8, + [IRQ9_VECTOR] = 9, + [IRQ10_VECTOR] = 10, + [IRQ11_VECTOR] = 11, + [IRQ12_VECTOR] = 12, + [IRQ13_VECTOR] = 13, + [IRQ14_VECTOR] = 14, + [IRQ15_VECTOR] = 15, + [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1 +}; + +static void __init init_ISA_irqs (void) +{ + int i; + + init_bsp_APIC(); + init_8259A(0); + + for (i = 0; i < NR_IRQS; i++) { + irq_desc[i].status = IRQ_DISABLED; + irq_desc[i].action = NULL; + irq_desc[i].depth = 1; + + if (i < 16) { + /* + * 16 old-style INTA-cycle interrupts: + */ + set_irq_chip_and_handler_name(i, &i8259A_chip, + handle_level_irq, "XT"); + } else { + /* + * 'high' PCI IRQs filled in on demand + */ + irq_desc[i].chip = &no_irq_chip; + } + } +} + +void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ"))); + +void __init native_init_IRQ(void) +{ + int i; + + init_ISA_irqs(); + /* + * Cover the whole vector space, no vector can escape + * us. (some of these will be overridden and become + * 'special' SMP interrupts) + */ + for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) { + int vector = FIRST_EXTERNAL_VECTOR + i; + if (vector != IA32_SYSCALL_VECTOR) + set_intr_gate(vector, interrupt[i]); + } + +#ifdef CONFIG_SMP + /* + * The reschedule interrupt is a CPU-to-CPU reschedule-helper + * IPI, driven by wakeup. + */ + alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt); + + /* IPIs for invalidation */ + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+0, invalidate_interrupt0); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+1, invalidate_interrupt1); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+2, invalidate_interrupt2); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+3, invalidate_interrupt3); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+4, invalidate_interrupt4); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+5, invalidate_interrupt5); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+6, invalidate_interrupt6); + alloc_intr_gate(INVALIDATE_TLB_VECTOR_START+7, invalidate_interrupt7); + + /* IPI for generic function call */ + alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt); + + /* IPI for generic single function call */ + alloc_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, + call_function_single_interrupt); + + /* Low priority IPI to cleanup after moving an irq */ + set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt); +#endif + alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt); + alloc_intr_gate(THRESHOLD_APIC_VECTOR, threshold_interrupt); + + /* self generated IPI for local APIC timer */ + alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt); + + /* IPI vectors for APIC spurious and error interrupts */ + alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt); + alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt); + + if (!acpi_ioapic) + setup_irq(2, &irq2); +} diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c index c03205991718b30da8adfed31d915f7f325b2aa0..f2d43bc7551488a61390c27cd429a9721fefbc26 100644 --- a/arch/x86/kernel/kdebugfs.c +++ b/arch/x86/kernel/kdebugfs.c @@ -12,9 +12,13 @@ #include #include #include +#include #include +struct dentry *arch_debugfs_dir; +EXPORT_SYMBOL(arch_debugfs_dir); + #ifdef CONFIG_DEBUG_BOOT_PARAMS struct setup_data_node { u64 paddr; @@ -209,6 +213,10 @@ static int __init arch_kdebugfs_init(void) { int error = 0; + arch_debugfs_dir = debugfs_create_dir("x86", NULL); + if (!arch_debugfs_dir) + return -ENOMEM; + #ifdef CONFIG_DEBUG_BOOT_PARAMS error = boot_params_kdebugfs_init(); #endif diff --git a/arch/x86/kernel/kprobes.c b/arch/x86/kernel/kprobes.c index b8c6743a13daddad0446d686d3f36436b3ac7531..6c27679ec6aa1753be87e05b6c72a10553f69574 100644 --- a/arch/x86/kernel/kprobes.c +++ b/arch/x86/kernel/kprobes.c @@ -431,7 +431,6 @@ static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) regs->ip = (unsigned long)p->ainsn.insn; } -/* Called with kretprobe_lock held */ void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, struct pt_regs *regs) { @@ -682,8 +681,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs) unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; INIT_HLIST_HEAD(&empty_rp); - spin_lock_irqsave(&kretprobe_lock, flags); - head = kretprobe_inst_table_head(current); + kretprobe_hash_lock(current, &head, &flags); /* fixup registers */ #ifdef CONFIG_X86_64 regs->cs = __KERNEL_CS; @@ -732,7 +730,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs) kretprobe_assert(ri, orig_ret_address, trampoline_address); - spin_unlock_irqrestore(&kretprobe_lock, flags); + kretprobe_hash_unlock(current, &flags); hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { hlist_del(&ri->hlist); @@ -860,7 +858,6 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs) resume_execution(cur, regs, kcb); regs->flags |= kcb->kprobe_saved_flags; - trace_hardirqs_fixup_flags(regs->flags); if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) { kcb->kprobe_status = KPROBE_HIT_SSDONE; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 87edf1ceb1df32c3afd62d1de44801c286922f7e..d02def06ca91540dd174f219eee8fe6eee6f095c 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -113,7 +113,7 @@ static void kvm_setup_secondary_clock(void) #endif #ifdef CONFIG_SMP -void __init kvm_smp_prepare_boot_cpu(void) +static void __init kvm_smp_prepare_boot_cpu(void) { WARN_ON(kvm_register_clock("primary cpu clock")); native_smp_prepare_boot_cpu(); diff --git a/arch/x86/kernel/ldt.c b/arch/x86/kernel/ldt.c index 0224c3637c73e68b4566124dd5d825034bc8c07a..b68e21f06f4f84615baf2fbc47179fd437bea321 100644 --- a/arch/x86/kernel/ldt.c +++ b/arch/x86/kernel/ldt.c @@ -20,9 +20,9 @@ #include #ifdef CONFIG_SMP -static void flush_ldt(void *null) +static void flush_ldt(void *current_mm) { - if (current->active_mm) + if (current->active_mm == current_mm) load_LDT(¤t->active_mm->context); } #endif @@ -62,13 +62,11 @@ static int alloc_ldt(mm_context_t *pc, int mincount, int reload) if (reload) { #ifdef CONFIG_SMP - cpumask_t mask; - preempt_disable(); load_LDT(pc); - mask = cpumask_of_cpu(smp_processor_id()); - if (!cpus_equal(current->mm->cpu_vm_mask, mask)) - smp_call_function(flush_ldt, NULL, 1, 1); + if (!cpus_equal(current->mm->cpu_vm_mask, + cpumask_of_cpu(smp_processor_id()))) + smp_call_function(flush_ldt, current->mm, 1); preempt_enable(); #else load_LDT(pc); diff --git a/arch/x86/kernel/machine_kexec_32.c b/arch/x86/kernel/machine_kexec_32.c index d0b234c9fc318ac0f11a127f9aac87ce7de55dc6..9fe478d984068fea53488d4405db4066863df39c 100644 --- a/arch/x86/kernel/machine_kexec_32.c +++ b/arch/x86/kernel/machine_kexec_32.c @@ -11,6 +11,8 @@ #include #include #include +#include + #include #include #include @@ -20,6 +22,7 @@ #include #include #include +#include #define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE))) static u32 kexec_pgd[1024] PAGE_ALIGNED; @@ -39,7 +42,7 @@ static void set_idt(void *newidt, __u16 limit) curidt.address = (unsigned long)newidt; load_idt(&curidt); -}; +} static void set_gdt(void *newgdt, __u16 limit) @@ -51,7 +54,7 @@ static void set_gdt(void *newgdt, __u16 limit) curgdt.address = (unsigned long)newgdt; load_gdt(&curgdt); -}; +} static void load_segments(void) { @@ -83,10 +86,12 @@ static void load_segments(void) * reboot code buffer to allow us to avoid allocations * later. * - * Currently nothing. + * Make control page executable. */ int machine_kexec_prepare(struct kimage *image) { + if (nx_enabled) + set_pages_x(image->control_code_page, 1); return 0; } @@ -96,25 +101,48 @@ int machine_kexec_prepare(struct kimage *image) */ void machine_kexec_cleanup(struct kimage *image) { + if (nx_enabled) + set_pages_nx(image->control_code_page, 1); } /* * Do not allocate memory (or fail in any way) in machine_kexec(). * We are past the point of no return, committed to rebooting now. */ -NORET_TYPE void machine_kexec(struct kimage *image) +void machine_kexec(struct kimage *image) { unsigned long page_list[PAGES_NR]; void *control_page; + asmlinkage unsigned long + (*relocate_kernel_ptr)(unsigned long indirection_page, + unsigned long control_page, + unsigned long start_address, + unsigned int has_pae, + unsigned int preserve_context); + + tracer_disable(); /* Interrupts aren't acceptable while we reboot */ local_irq_disable(); + if (image->preserve_context) { +#ifdef CONFIG_X86_IO_APIC + /* We need to put APICs in legacy mode so that we can + * get timer interrupts in second kernel. kexec/kdump + * paths already have calls to disable_IO_APIC() in + * one form or other. kexec jump path also need + * one. + */ + disable_IO_APIC(); +#endif + } + control_page = page_address(image->control_code_page); - memcpy(control_page, relocate_kernel, PAGE_SIZE); + memcpy(control_page, relocate_kernel, PAGE_SIZE/2); + relocate_kernel_ptr = control_page; page_list[PA_CONTROL_PAGE] = __pa(control_page); - page_list[VA_CONTROL_PAGE] = (unsigned long)relocate_kernel; + page_list[VA_CONTROL_PAGE] = (unsigned long)control_page; page_list[PA_PGD] = __pa(kexec_pgd); page_list[VA_PGD] = (unsigned long)kexec_pgd; #ifdef CONFIG_X86_PAE @@ -127,6 +155,7 @@ NORET_TYPE void machine_kexec(struct kimage *image) page_list[VA_PTE_0] = (unsigned long)kexec_pte0; page_list[PA_PTE_1] = __pa(kexec_pte1); page_list[VA_PTE_1] = (unsigned long)kexec_pte1; + page_list[PA_SWAP_PAGE] = (page_to_pfn(image->swap_page) << PAGE_SHIFT); /* The segment registers are funny things, they have both a * visible and an invisible part. Whenever the visible part is @@ -145,8 +174,10 @@ NORET_TYPE void machine_kexec(struct kimage *image) set_idt(phys_to_virt(0),0); /* now call it */ - relocate_kernel((unsigned long)image->head, (unsigned long)page_list, - image->start, cpu_has_pae); + image->start = relocate_kernel_ptr((unsigned long)image->head, + (unsigned long)page_list, + image->start, cpu_has_pae, + image->preserve_context); } void arch_crash_save_vmcoreinfo(void) diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c index 576a03db45112cd710cb17e268bf226d76d36012..c43caa3a91f349ecd527da1ec936872785815092 100644 --- a/arch/x86/kernel/machine_kexec_64.c +++ b/arch/x86/kernel/machine_kexec_64.c @@ -11,6 +11,8 @@ #include #include #include +#include + #include #include #include @@ -110,7 +112,7 @@ static int init_pgtable(struct kimage *image, unsigned long start_pgtable) { pgd_t *level4p; level4p = (pgd_t *)__va(start_pgtable); - return init_level4_page(image, level4p, 0, end_pfn << PAGE_SHIFT); + return init_level4_page(image, level4p, 0, max_pfn << PAGE_SHIFT); } static void set_idt(void *newidt, u16 limit) @@ -179,11 +181,13 @@ void machine_kexec_cleanup(struct kimage *image) * Do not allocate memory (or fail in any way) in machine_kexec(). * We are past the point of no return, committed to rebooting now. */ -NORET_TYPE void machine_kexec(struct kimage *image) +void machine_kexec(struct kimage *image) { unsigned long page_list[PAGES_NR]; void *control_page; + tracer_disable(); + /* Interrupts aren't acceptable while we reboot */ local_irq_disable(); diff --git a/arch/x86/kernel/microcode.c b/arch/x86/kernel/microcode.c index 69729e38b78a2d83e7f7e799bd2ea37730305d18..652fa5c38ebe34c0846fc56f0a8e0eb89e5f3c6a 100644 --- a/arch/x86/kernel/microcode.c +++ b/arch/x86/kernel/microcode.c @@ -5,13 +5,14 @@ * 2006 Shaohua Li * * This driver allows to upgrade microcode on Intel processors - * belonging to IA-32 family - PentiumPro, Pentium II, + * belonging to IA-32 family - PentiumPro, Pentium II, * Pentium III, Xeon, Pentium 4, etc. * - * Reference: Section 8.10 of Volume III, Intel Pentium 4 Manual, - * Order Number 245472 or free download from: - * - * http://developer.intel.com/design/pentium4/manuals/245472.htm + * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture + * Software Developer's Manual + * Order Number 253668 or free download from: + * + * http://developer.intel.com/design/pentium4/manuals/253668.htm * * For more information, go to http://www.urbanmyth.org/microcode * @@ -58,12 +59,12 @@ * nature of implementation. * 1.11 22 Mar 2002 Tigran Aivazian * Fix the panic when writing zero-length microcode chunk. - * 1.12 29 Sep 2003 Nitin Kamble , + * 1.12 29 Sep 2003 Nitin Kamble , * Jun Nakajima * Support for the microcode updates in the new format. * 1.13 10 Oct 2003 Tigran Aivazian * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl - * because we no longer hold a copy of applied microcode + * because we no longer hold a copy of applied microcode * in kernel memory. * 1.14 25 Jun 2004 Tigran Aivazian * Fix sigmatch() macro to handle old CPUs with pf == 0. @@ -75,6 +76,7 @@ #include #include #include +#include #include #include #include @@ -320,11 +322,11 @@ static void apply_microcode(int cpu) return; /* serialize access to the physical write to MSR 0x79 */ - spin_lock_irqsave(µcode_update_lock, flags); + spin_lock_irqsave(µcode_update_lock, flags); /* write microcode via MSR 0x79 */ wrmsr(MSR_IA32_UCODE_WRITE, - (unsigned long) uci->mc->bits, + (unsigned long) uci->mc->bits, (unsigned long) uci->mc->bits >> 16 >> 16); wrmsr(MSR_IA32_UCODE_REV, 0, 0); @@ -341,7 +343,7 @@ static void apply_microcode(int cpu) return; } printk(KERN_INFO "microcode: CPU%d updated from revision " - "0x%x to 0x%x, date = %08x \n", + "0x%x to 0x%x, date = %08x \n", cpu_num, uci->rev, val[1], uci->mc->hdr.date); uci->rev = val[1]; } @@ -422,6 +424,7 @@ out: static int microcode_open (struct inode *unused1, struct file *unused2) { + cycle_kernel_lock(); return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; } @@ -488,7 +491,7 @@ MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); #define microcode_dev_exit() do { } while(0) #endif -static long get_next_ucode_from_buffer(void **mc, void *buf, +static long get_next_ucode_from_buffer(void **mc, const u8 *buf, unsigned long size, long offset) { microcode_header_t *mc_header; @@ -522,7 +525,7 @@ static int cpu_request_microcode(int cpu) char name[30]; struct cpuinfo_x86 *c = &cpu_data(cpu); const struct firmware *firmware; - void *buf; + const u8 *buf; unsigned long size; long offset = 0; int error; @@ -534,7 +537,7 @@ static int cpu_request_microcode(int cpu) c->x86, c->x86_model, c->x86_mask); error = request_firmware(&firmware, name, µcode_pdev->dev); if (error) { - pr_debug("microcode: ucode data file %s load failed\n", name); + pr_debug("microcode: data file %s load failed\n", name); return error; } buf = firmware->data; @@ -641,7 +644,9 @@ static void microcode_fini_cpu(int cpu) mutex_unlock(µcode_mutex); } -static ssize_t reload_store(struct sys_device *dev, const char *buf, size_t sz) +static ssize_t reload_store(struct sys_device *dev, + struct sysdev_attribute *attr, + const char *buf, size_t sz) { struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; char *end; @@ -652,9 +657,7 @@ static ssize_t reload_store(struct sys_device *dev, const char *buf, size_t sz) if (end == buf) return -EINVAL; if (val == 1) { - cpumask_t old; - - old = current->cpus_allowed; + cpumask_t old = current->cpus_allowed; get_online_cpus(); set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); @@ -671,14 +674,16 @@ static ssize_t reload_store(struct sys_device *dev, const char *buf, size_t sz) return sz; } -static ssize_t version_show(struct sys_device *dev, char *buf) +static ssize_t version_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; return sprintf(buf, "0x%x\n", uci->rev); } -static ssize_t pf_show(struct sys_device *dev, char *buf) +static ssize_t pf_show(struct sys_device *dev, + struct sysdev_attribute *attr, char *buf) { struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; @@ -805,6 +810,9 @@ static int __init microcode_init (void) { int error; + printk(KERN_INFO + "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " \n"); + error = microcode_dev_init(); if (error) return error; @@ -825,9 +833,6 @@ static int __init microcode_init (void) } register_hotcpu_notifier(&mc_cpu_notifier); - - printk(KERN_INFO - "IA-32 Microcode Update Driver: v" MICROCODE_VERSION " \n"); return 0; } diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index edc5fbfe85c06eb1e2eff8aebdbcf3740b074a63..fdfdc550b366043045a34a4c476c61d6ff67b5d7 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "../pci/pci.h" diff --git a/arch/x86/kernel/module_64.c b/arch/x86/kernel/module_64.c index a888e67f5874dad3415220cc9fd0c9f962c4661c..6ba87830d4b130e6aac27eef6aa5442c2e1d1e40 100644 --- a/arch/x86/kernel/module_64.c +++ b/arch/x86/kernel/module_64.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -150,7 +151,8 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *me) { - const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL; + const Elf_Shdr *s, *text = NULL, *alt = NULL, *locks = NULL, + *para = NULL; char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset; for (s = sechdrs; s < sechdrs + hdr->e_shnum; s++) { @@ -160,6 +162,8 @@ int module_finalize(const Elf_Ehdr *hdr, alt = s; if (!strcmp(".smp_locks", secstrings + s->sh_name)) locks= s; + if (!strcmp(".parainstructions", secstrings + s->sh_name)) + para = s; } if (alt) { @@ -175,6 +179,11 @@ int module_finalize(const Elf_Ehdr *hdr, tseg, tseg + text->sh_size); } + if (para) { + void *pseg = (void *)para->sh_addr; + apply_paravirt(pseg, pseg + para->sh_size); + } + return module_bug_finalize(hdr, sechdrs, me); } diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 404683b94e79592c69e04930ed385056f8f5861c..e362c6ab4d3596038e3ab30d30253a47168f487e 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -25,6 +25,9 @@ #include #include #include +#include +#include +#include #include #ifdef CONFIG_X86_32 @@ -32,28 +35,6 @@ #include #endif -/* Have we found an MP table */ -int smp_found_config; - -/* - * Various Linux-internal data structures created from the - * MP-table. - */ -#if defined (CONFIG_MCA) || defined (CONFIG_EISA) -int mp_bus_id_to_type[MAX_MP_BUSSES]; -#endif - -DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); -int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 }; - -static int mp_current_pci_id; - -int pic_mode; - -/* - * Intel MP BIOS table parsing routines: - */ - /* * Checksum an MP configuration block. */ @@ -68,18 +49,6 @@ static int __init mpf_checksum(unsigned char *mp, int len) return sum & 0xFF; } -#ifdef CONFIG_X86_NUMAQ -/* - * Have to match translation table entries to main table entries by counter - * hence the mpc_record variable .... can't see a less disgusting way of - * doing this .... - */ - -static int mpc_record; -static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] - __cpuinitdata; -#endif - static void __cpuinit MP_processor_info(struct mpc_config_processor *m) { int apicid; @@ -89,11 +58,12 @@ static void __cpuinit MP_processor_info(struct mpc_config_processor *m) disabled_cpus++; return; } -#ifdef CONFIG_X86_NUMAQ - apicid = mpc_apic_id(m, translation_table[mpc_record]); -#else - apicid = m->mpc_apicid; -#endif + + if (x86_quirks->mpc_apic_id) + apicid = x86_quirks->mpc_apic_id(m); + else + apicid = m->mpc_apicid; + if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) { bootup_cpu = " (Bootup-CPU)"; boot_cpu_physical_apicid = m->mpc_apicid; @@ -103,18 +73,17 @@ static void __cpuinit MP_processor_info(struct mpc_config_processor *m) generic_processor_info(apicid, m->mpc_apicver); } +#ifdef CONFIG_X86_IO_APIC static void __init MP_bus_info(struct mpc_config_bus *m) { char str[7]; - memcpy(str, m->mpc_bustype, 6); str[6] = 0; -#ifdef CONFIG_X86_NUMAQ - mpc_oem_bus_info(m, str, translation_table[mpc_record]); -#else - Dprintk("Bus #%d is %s\n", m->mpc_busid, str); -#endif + if (x86_quirks->mpc_oem_bus_info) + x86_quirks->mpc_oem_bus_info(m, str); + else + printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str); #if MAX_MP_BUSSES < 256 if (m->mpc_busid >= MAX_MP_BUSSES) { @@ -131,12 +100,10 @@ static void __init MP_bus_info(struct mpc_config_bus *m) mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA; #endif } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) { -#ifdef CONFIG_X86_NUMAQ - mpc_oem_pci_bus(m, translation_table[mpc_record]); -#endif + if (x86_quirks->mpc_oem_pci_bus) + x86_quirks->mpc_oem_pci_bus(m); + clear_bit(m->mpc_busid, mp_bus_not_pci); - mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id; - mp_current_pci_id++; #if defined(CONFIG_EISA) || defined (CONFIG_MCA) mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI; } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) { @@ -147,6 +114,7 @@ static void __init MP_bus_info(struct mpc_config_bus *m) } else printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str); } +#endif #ifdef CONFIG_X86_IO_APIC @@ -176,117 +144,111 @@ static void __init MP_ioapic_info(struct mpc_config_ioapic *m) if (bad_ioapic(m->mpc_apicaddr)) return; - mp_ioapics[nr_ioapics] = *m; + mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr; + mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid; + mp_ioapics[nr_ioapics].mp_type = m->mpc_type; + mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver; + mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags; nr_ioapics++; } -static void __init MP_intsrc_info(struct mpc_config_intsrc *m) +static void print_MP_intsrc_info(struct mpc_config_intsrc *m) { - mp_irqs[mp_irq_entries] = *m; - Dprintk("Int: type %d, pol %d, trig %d, bus %d," + printk(KERN_CONT "Int: type %d, pol %d, trig %d, bus %02x," " IRQ %02x, APIC ID %x, APIC INT %02x\n", m->mpc_irqtype, m->mpc_irqflag & 3, (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus, m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq); - if (++mp_irq_entries == MAX_IRQ_SOURCES) - panic("Max # of irq sources exceeded!!\n"); } -#endif - -static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m) +static void __init print_mp_irq_info(struct mp_config_intsrc *mp_irq) { - Dprintk("Lint: type %d, pol %d, trig %d, bus %d," - " IRQ %02x, APIC ID %x, APIC LINT %02x\n", - m->mpc_irqtype, m->mpc_irqflag & 3, - (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid, - m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint); + printk(KERN_CONT "Int: type %d, pol %d, trig %d, bus %02x," + " IRQ %02x, APIC ID %x, APIC INT %02x\n", + mp_irq->mp_irqtype, mp_irq->mp_irqflag & 3, + (mp_irq->mp_irqflag >> 2) & 3, mp_irq->mp_srcbus, + mp_irq->mp_srcbusirq, mp_irq->mp_dstapic, mp_irq->mp_dstirq); } -#ifdef CONFIG_X86_NUMAQ -static void __init MP_translation_info(struct mpc_config_translation *m) +static void __init assign_to_mp_irq(struct mpc_config_intsrc *m, + struct mp_config_intsrc *mp_irq) { - printk(KERN_INFO - "Translation: record %d, type %d, quad %d, global %d, local %d\n", - mpc_record, m->trans_type, m->trans_quad, m->trans_global, - m->trans_local); + mp_irq->mp_dstapic = m->mpc_dstapic; + mp_irq->mp_type = m->mpc_type; + mp_irq->mp_irqtype = m->mpc_irqtype; + mp_irq->mp_irqflag = m->mpc_irqflag; + mp_irq->mp_srcbus = m->mpc_srcbus; + mp_irq->mp_srcbusirq = m->mpc_srcbusirq; + mp_irq->mp_dstirq = m->mpc_dstirq; +} - if (mpc_record >= MAX_MPC_ENTRY) - printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n"); - else - translation_table[mpc_record] = m; /* stash this for later */ - if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad)) - node_set_online(m->trans_quad); +static void __init assign_to_mpc_intsrc(struct mp_config_intsrc *mp_irq, + struct mpc_config_intsrc *m) +{ + m->mpc_dstapic = mp_irq->mp_dstapic; + m->mpc_type = mp_irq->mp_type; + m->mpc_irqtype = mp_irq->mp_irqtype; + m->mpc_irqflag = mp_irq->mp_irqflag; + m->mpc_srcbus = mp_irq->mp_srcbus; + m->mpc_srcbusirq = mp_irq->mp_srcbusirq; + m->mpc_dstirq = mp_irq->mp_dstirq; } -/* - * Read/parse the MPC oem tables - */ +static int __init mp_irq_mpc_intsrc_cmp(struct mp_config_intsrc *mp_irq, + struct mpc_config_intsrc *m) +{ + if (mp_irq->mp_dstapic != m->mpc_dstapic) + return 1; + if (mp_irq->mp_type != m->mpc_type) + return 2; + if (mp_irq->mp_irqtype != m->mpc_irqtype) + return 3; + if (mp_irq->mp_irqflag != m->mpc_irqflag) + return 4; + if (mp_irq->mp_srcbus != m->mpc_srcbus) + return 5; + if (mp_irq->mp_srcbusirq != m->mpc_srcbusirq) + return 6; + if (mp_irq->mp_dstirq != m->mpc_dstirq) + return 7; + + return 0; +} -static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable, - unsigned short oemsize) +static void __init MP_intsrc_info(struct mpc_config_intsrc *m) { - int count = sizeof(*oemtable); /* the header size */ - unsigned char *oemptr = ((unsigned char *)oemtable) + count; - - mpc_record = 0; - printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n", - oemtable); - if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) { - printk(KERN_WARNING - "SMP mpc oemtable: bad signature [%c%c%c%c]!\n", - oemtable->oem_signature[0], oemtable->oem_signature[1], - oemtable->oem_signature[2], oemtable->oem_signature[3]); - return; - } - if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) { - printk(KERN_WARNING "SMP oem mptable: checksum error!\n"); - return; - } - while (count < oemtable->oem_length) { - switch (*oemptr) { - case MP_TRANSLATION: - { - struct mpc_config_translation *m = - (struct mpc_config_translation *)oemptr; - MP_translation_info(m); - oemptr += sizeof(*m); - count += sizeof(*m); - ++mpc_record; - break; - } - default: - { - printk(KERN_WARNING - "Unrecognised OEM table entry type! - %d\n", - (int)*oemptr); - return; - } - } + int i; + + print_MP_intsrc_info(m); + + for (i = 0; i < mp_irq_entries; i++) { + if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m)) + return; } + + assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); + if (++mp_irq_entries == MAX_IRQ_SOURCES) + panic("Max # of irq sources exceeded!!\n"); } -static inline void mps_oem_check(struct mp_config_table *mpc, char *oem, - char *productid) +#endif + +static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m) { - if (strncmp(oem, "IBM NUMA", 8)) - printk("Warning! May not be a NUMA-Q system!\n"); - if (mpc->mpc_oemptr) - smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr, - mpc->mpc_oemsize); + printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x," + " IRQ %02x, APIC ID %x, APIC LINT %02x\n", + m->mpc_irqtype, m->mpc_irqflag & 3, + (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid, + m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint); } -#endif /* CONFIG_X86_NUMAQ */ /* * Read/parse the MPC */ -static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) +static int __init smp_check_mpc(struct mp_config_table *mpc, char *oem, + char *str) { - char str[16]; - char oem[10]; - int count = sizeof(*mpc); - unsigned char *mpt = ((unsigned char *)mpc) + count; if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) { printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n", @@ -309,19 +271,41 @@ static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) } memcpy(oem, mpc->mpc_oem, 8); oem[8] = 0; - printk(KERN_INFO "MPTABLE: OEM ID: %s ", oem); + printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem); memcpy(str, mpc->mpc_productid, 12); str[12] = 0; - printk("Product ID: %s ", str); -#ifdef CONFIG_X86_32 - mps_oem_check(mpc, oem, str); -#endif - printk(KERN_INFO "MPTABLE: Product ID: %s ", str); + printk(KERN_INFO "MPTABLE: Product ID: %s\n", str); printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic); + return 1; +} + +static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) +{ + char str[16]; + char oem[10]; + + int count = sizeof(*mpc); + unsigned char *mpt = ((unsigned char *)mpc) + count; + + if (!smp_check_mpc(mpc, oem, str)) + return 0; + +#ifdef CONFIG_X86_32 + /* + * need to make sure summit and es7000's mps_oem_check is safe to be + * called early via genericarch 's mps_oem_check + */ + if (early) { +#ifdef CONFIG_X86_NUMAQ + numaq_mps_oem_check(mpc, oem, str); +#endif + } else + mps_oem_check(mpc, oem, str); +#endif /* save the local APIC address, it might be non-default */ if (!acpi_lapic) mp_lapic_addr = mpc->mpc_lapic; @@ -329,12 +313,17 @@ static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) if (early) return 1; + if (mpc->mpc_oemptr && x86_quirks->smp_read_mpc_oem) { + struct mp_config_oemtable *oem_table = (struct mp_config_oemtable *)(unsigned long)mpc->mpc_oemptr; + x86_quirks->smp_read_mpc_oem(oem_table, mpc->mpc_oemsize); + } + /* * Now process the configuration blocks. */ -#ifdef CONFIG_X86_NUMAQ - mpc_record = 0; -#endif + if (x86_quirks->mpc_record) + *x86_quirks->mpc_record = 0; + while (count < mpc->mpc_length) { switch (*mpt) { case MP_PROCESSOR: @@ -352,7 +341,9 @@ static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) { struct mpc_config_bus *m = (struct mpc_config_bus *)mpt; +#ifdef CONFIG_X86_IO_APIC MP_bus_info(m); +#endif mpt += sizeof(*m); count += sizeof(*m); break; @@ -398,11 +389,17 @@ static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early) count = mpc->mpc_length; break; } -#ifdef CONFIG_X86_NUMAQ - ++mpc_record; -#endif + if (x86_quirks->mpc_record) + (*x86_quirks->mpc_record)++; } + +#ifdef CONFIG_X86_GENERICARCH + generic_bigsmp_probe(); +#endif + +#ifdef CONFIG_X86_32 setup_apic_routing(); +#endif if (!num_processors) printk(KERN_ERR "MPTABLE: no processors registered!\n"); return num_processors; @@ -427,7 +424,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) intsrc.mpc_type = MP_INTSRC; intsrc.mpc_irqflag = 0; /* conforming */ intsrc.mpc_srcbus = 0; - intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid; + intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid; intsrc.mpc_irqtype = mp_INT; @@ -488,40 +485,11 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) MP_intsrc_info(&intsrc); } -#endif -static inline void __init construct_default_ISA_mptable(int mpc_default_type) +static void construct_ioapic_table(int mpc_default_type) { - struct mpc_config_processor processor; - struct mpc_config_bus bus; -#ifdef CONFIG_X86_IO_APIC struct mpc_config_ioapic ioapic; -#endif - struct mpc_config_lintsrc lintsrc; - int linttypes[2] = { mp_ExtINT, mp_NMI }; - int i; - - /* - * local APIC has default address - */ - mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; - - /* - * 2 CPUs, numbered 0 & 1. - */ - processor.mpc_type = MP_PROCESSOR; - /* Either an integrated APIC or a discrete 82489DX. */ - processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01; - processor.mpc_cpuflag = CPU_ENABLED; - processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) | - (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; - processor.mpc_featureflag = boot_cpu_data.x86_capability[0]; - processor.mpc_reserved[0] = 0; - processor.mpc_reserved[1] = 0; - for (i = 0; i < 2; i++) { - processor.mpc_apicid = i; - MP_processor_info(&processor); - } + struct mpc_config_bus bus; bus.mpc_type = MP_BUS; bus.mpc_busid = 0; @@ -550,7 +518,6 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type) MP_bus_info(&bus); } -#ifdef CONFIG_X86_IO_APIC ioapic.mpc_type = MP_IOAPIC; ioapic.mpc_apicid = 2; ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01; @@ -562,7 +529,42 @@ static inline void __init construct_default_ISA_mptable(int mpc_default_type) * We set up most of the low 16 IO-APIC pins according to MPS rules. */ construct_default_ioirq_mptable(mpc_default_type); +} +#else +static inline void construct_ioapic_table(int mpc_default_type) { } #endif + +static inline void __init construct_default_ISA_mptable(int mpc_default_type) +{ + struct mpc_config_processor processor; + struct mpc_config_lintsrc lintsrc; + int linttypes[2] = { mp_ExtINT, mp_NMI }; + int i; + + /* + * local APIC has default address + */ + mp_lapic_addr = APIC_DEFAULT_PHYS_BASE; + + /* + * 2 CPUs, numbered 0 & 1. + */ + processor.mpc_type = MP_PROCESSOR; + /* Either an integrated APIC or a discrete 82489DX. */ + processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01; + processor.mpc_cpuflag = CPU_ENABLED; + processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) | + (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask; + processor.mpc_featureflag = boot_cpu_data.x86_capability[0]; + processor.mpc_reserved[0] = 0; + processor.mpc_reserved[1] = 0; + for (i = 0; i < 2; i++) { + processor.mpc_apicid = i; + MP_processor_info(&processor); + } + + construct_ioapic_table(mpc_default_type); + lintsrc.mpc_type = MP_LINTSRC; lintsrc.mpc_irqflag = 0; /* conforming */ lintsrc.mpc_srcbusid = 0; @@ -580,10 +582,14 @@ static struct intel_mp_floating *mpf_found; /* * Scan the memory blocks for an SMP configuration block. */ -static void __init __get_smp_config(unsigned early) +static void __init __get_smp_config(unsigned int early) { struct intel_mp_floating *mpf = mpf_found; + if (x86_quirks->mach_get_smp_config) { + if (x86_quirks->mach_get_smp_config(early)) + return; + } if (acpi_lapic && early) return; /* @@ -600,7 +606,7 @@ static void __init __get_smp_config(unsigned early) printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification); -#ifdef CONFIG_X86_32 +#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) if (mpf->mpf_feature2 & (1 << 7)) { printk(KERN_INFO " IMCR and PIC compatibility mode.\n"); pic_mode = 1; @@ -632,7 +638,9 @@ static void __init __get_smp_config(unsigned early) * override the defaults. */ if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) { +#ifdef CONFIG_X86_LOCAL_APIC smp_found_config = 0; +#endif printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"); printk(KERN_ERR "... disabling SMP support. " @@ -689,7 +697,7 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, unsigned int *bp = phys_to_virt(base); struct intel_mp_floating *mpf; - Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length); + printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length); BUILD_BUG_ON(sizeof(*mpf) != 16); while (length > 0) { @@ -699,15 +707,21 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, !mpf_checksum((unsigned char *)bp, 16) && ((mpf->mpf_specification == 1) || (mpf->mpf_specification == 4))) { - +#ifdef CONFIG_X86_LOCAL_APIC smp_found_config = 1; +#endif mpf_found = mpf; -#ifdef CONFIG_X86_32 + printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n", mpf, virt_to_phys(mpf)); - reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE, + + if (!reserve) + return 1; + reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE, BOOTMEM_DEFAULT); if (mpf->mpf_physptr) { + unsigned long size = PAGE_SIZE; +#ifdef CONFIG_X86_32 /* * We cannot access to MPC table to compute * table size yet, as only few megabytes from @@ -717,24 +731,15 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, * PAGE_SIZE from mpg->mpf_physptr yields BUG() * in reserve_bootmem. */ - unsigned long size = PAGE_SIZE; unsigned long end = max_low_pfn * PAGE_SIZE; if (mpf->mpf_physptr + size > end) size = end - mpf->mpf_physptr; - reserve_bootmem(mpf->mpf_physptr, size, +#endif + reserve_bootmem_generic(mpf->mpf_physptr, size, BOOTMEM_DEFAULT); } -#else - if (!reserve) - return 1; - - reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE); - if (mpf->mpf_physptr) - reserve_bootmem_generic(mpf->mpf_physptr, - PAGE_SIZE); -#endif - return 1; + return 1; } bp += 4; length -= 16; @@ -742,10 +747,14 @@ static int __init smp_scan_config(unsigned long base, unsigned long length, return 0; } -static void __init __find_smp_config(unsigned reserve) +static void __init __find_smp_config(unsigned int reserve) { unsigned int address; + if (x86_quirks->mach_find_smp_config) { + if (x86_quirks->mach_find_smp_config(reserve)) + return; + } /* * FIXME: Linux assumes you have 640K of base ram.. * this continues the error... @@ -790,298 +799,294 @@ void __init find_smp_config(void) __find_smp_config(1); } -/* -------------------------------------------------------------------------- - ACPI-based MP Configuration - -------------------------------------------------------------------------- */ +#ifdef CONFIG_X86_IO_APIC +static u8 __initdata irq_used[MAX_IRQ_SOURCES]; -/* - * Keep this outside and initialized to 0, for !CONFIG_ACPI builds: - */ -int es7000_plat; +static int __init get_MP_intsrc_index(struct mpc_config_intsrc *m) +{ + int i; -#ifdef CONFIG_ACPI + if (m->mpc_irqtype != mp_INT) + return 0; -#ifdef CONFIG_X86_IO_APIC + if (m->mpc_irqflag != 0x0f) + return 0; -#define MP_ISA_BUS 0 + /* not legacy */ -extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS]; + for (i = 0; i < mp_irq_entries; i++) { + if (mp_irqs[i].mp_irqtype != mp_INT) + continue; -static int mp_find_ioapic(int gsi) -{ - int i = 0; + if (mp_irqs[i].mp_irqflag != 0x0f) + continue; - /* Find the IOAPIC that manages this GSI. */ - for (i = 0; i < nr_ioapics; i++) { - if ((gsi >= mp_ioapic_routing[i].gsi_base) - && (gsi <= mp_ioapic_routing[i].gsi_end)) - return i; + if (mp_irqs[i].mp_srcbus != m->mpc_srcbus) + continue; + if (mp_irqs[i].mp_srcbusirq != m->mpc_srcbusirq) + continue; + if (irq_used[i]) { + /* already claimed */ + return -2; + } + irq_used[i] = 1; + return i; } - printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); + /* not found */ return -1; } -static u8 __init uniq_ioapic_id(u8 id) -{ -#ifdef CONFIG_X86_32 - if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && - !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) - return io_apic_get_unique_id(nr_ioapics, id); - else - return id; -#else - int i; - DECLARE_BITMAP(used, 256); - bitmap_zero(used, 256); - for (i = 0; i < nr_ioapics; i++) { - struct mpc_config_ioapic *ia = &mp_ioapics[i]; - __set_bit(ia->mpc_apicid, used); - } - if (!test_bit(id, used)) - return id; - return find_first_zero_bit(used, 256); +#define SPARE_SLOT_NUM 20 + +static struct mpc_config_intsrc __initdata *m_spare[SPARE_SLOT_NUM]; #endif -} -void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) +static int __init replace_intsrc_all(struct mp_config_table *mpc, + unsigned long mpc_new_phys, + unsigned long mpc_new_length) { - int idx = 0; - - if (bad_ioapic(address)) - return; +#ifdef CONFIG_X86_IO_APIC + int i; + int nr_m_spare = 0; +#endif - idx = nr_ioapics; + int count = sizeof(*mpc); + unsigned char *mpt = ((unsigned char *)mpc) + count; - mp_ioapics[idx].mpc_type = MP_IOAPIC; - mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE; - mp_ioapics[idx].mpc_apicaddr = address; + printk(KERN_INFO "mpc_length %x\n", mpc->mpc_length); + while (count < mpc->mpc_length) { + switch (*mpt) { + case MP_PROCESSOR: + { + struct mpc_config_processor *m = + (struct mpc_config_processor *)mpt; + mpt += sizeof(*m); + count += sizeof(*m); + break; + } + case MP_BUS: + { + struct mpc_config_bus *m = + (struct mpc_config_bus *)mpt; + mpt += sizeof(*m); + count += sizeof(*m); + break; + } + case MP_IOAPIC: + { + mpt += sizeof(struct mpc_config_ioapic); + count += sizeof(struct mpc_config_ioapic); + break; + } + case MP_INTSRC: + { +#ifdef CONFIG_X86_IO_APIC + struct mpc_config_intsrc *m = + (struct mpc_config_intsrc *)mpt; - set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); - mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id); -#ifdef CONFIG_X86_32 - mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx); -#else - mp_ioapics[idx].mpc_apicver = 0; + printk(KERN_INFO "OLD "); + print_MP_intsrc_info(m); + i = get_MP_intsrc_index(m); + if (i > 0) { + assign_to_mpc_intsrc(&mp_irqs[i], m); + printk(KERN_INFO "NEW "); + print_mp_irq_info(&mp_irqs[i]); + } else if (!i) { + /* legacy, do nothing */ + } else if (nr_m_spare < SPARE_SLOT_NUM) { + /* + * not found (-1), or duplicated (-2) + * are invalid entries, + * we need to use the slot later + */ + m_spare[nr_m_spare] = m; + nr_m_spare++; + } #endif - /* - * Build basic GSI lookup table to facilitate gsi->io_apic lookups - * and to prevent reprogramming of IOAPIC pins (PCI GSIs). - */ - mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid; - mp_ioapic_routing[idx].gsi_base = gsi_base; - mp_ioapic_routing[idx].gsi_end = gsi_base + - io_apic_get_redir_entries(idx); - - printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " - "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid, - mp_ioapics[idx].mpc_apicver, mp_ioapics[idx].mpc_apicaddr, - mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); - - nr_ioapics++; -} + mpt += sizeof(struct mpc_config_intsrc); + count += sizeof(struct mpc_config_intsrc); + break; + } + case MP_LINTSRC: + { + struct mpc_config_lintsrc *m = + (struct mpc_config_lintsrc *)mpt; + mpt += sizeof(*m); + count += sizeof(*m); + break; + } + default: + /* wrong mptable */ + printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"); + printk(KERN_ERR "type %x\n", *mpt); + print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16, + 1, mpc, mpc->mpc_length, 1); + goto out; + } + } -void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) -{ - struct mpc_config_intsrc intsrc; - int ioapic = -1; - int pin = -1; +#ifdef CONFIG_X86_IO_APIC + for (i = 0; i < mp_irq_entries; i++) { + if (irq_used[i]) + continue; - /* - * Convert 'gsi' to 'ioapic.pin'. - */ - ioapic = mp_find_ioapic(gsi); - if (ioapic < 0) - return; - pin = gsi - mp_ioapic_routing[ioapic].gsi_base; + if (mp_irqs[i].mp_irqtype != mp_INT) + continue; - /* - * TBD: This check is for faulty timer entries, where the override - * erroneously sets the trigger to level, resulting in a HUGE - * increase of timer interrupts! - */ - if ((bus_irq == 0) && (trigger == 3)) - trigger = 1; + if (mp_irqs[i].mp_irqflag != 0x0f) + continue; - intsrc.mpc_type = MP_INTSRC; - intsrc.mpc_irqtype = mp_INT; - intsrc.mpc_irqflag = (trigger << 2) | polarity; - intsrc.mpc_srcbus = MP_ISA_BUS; - intsrc.mpc_srcbusirq = bus_irq; /* IRQ */ - intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */ - intsrc.mpc_dstirq = pin; /* INTIN# */ + if (nr_m_spare > 0) { + printk(KERN_INFO "*NEW* found "); + nr_m_spare--; + assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]); + m_spare[nr_m_spare] = NULL; + } else { + struct mpc_config_intsrc *m = + (struct mpc_config_intsrc *)mpt; + count += sizeof(struct mpc_config_intsrc); + if (!mpc_new_phys) { + printk(KERN_INFO "No spare slots, try to append...take your risk, new mpc_length %x\n", count); + } else { + if (count <= mpc_new_length) + printk(KERN_INFO "No spare slots, try to append..., new mpc_length %x\n", count); + else { + printk(KERN_ERR "mpc_new_length %lx is too small\n", mpc_new_length); + goto out; + } + } + assign_to_mpc_intsrc(&mp_irqs[i], m); + mpc->mpc_length = count; + mpt += sizeof(struct mpc_config_intsrc); + } + print_mp_irq_info(&mp_irqs[i]); + } +#endif +out: + /* update checksum */ + mpc->mpc_checksum = 0; + mpc->mpc_checksum -= mpf_checksum((unsigned char *)mpc, + mpc->mpc_length); - MP_intsrc_info(&intsrc); + return 0; } -void __init mp_config_acpi_legacy_irqs(void) -{ - struct mpc_config_intsrc intsrc; - int i = 0; - int ioapic = -1; +static int __initdata enable_update_mptable; -#if defined (CONFIG_MCA) || defined (CONFIG_EISA) - /* - * Fabricate the legacy ISA bus (bus #31). - */ - mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; -#endif - set_bit(MP_ISA_BUS, mp_bus_not_pci); - Dprintk("Bus #%d is ISA\n", MP_ISA_BUS); +static int __init update_mptable_setup(char *str) +{ + enable_update_mptable = 1; + return 0; +} +early_param("update_mptable", update_mptable_setup); - /* - * Older generations of ES7000 have no legacy identity mappings - */ - if (es7000_plat == 1) - return; +static unsigned long __initdata mpc_new_phys; +static unsigned long mpc_new_length __initdata = 4096; - /* - * Locate the IOAPIC that manages the ISA IRQs (0-15). - */ - ioapic = mp_find_ioapic(0); - if (ioapic < 0) - return; +/* alloc_mptable or alloc_mptable=4k */ +static int __initdata alloc_mptable; +static int __init parse_alloc_mptable_opt(char *p) +{ + enable_update_mptable = 1; + alloc_mptable = 1; + if (!p) + return 0; + mpc_new_length = memparse(p, &p); + return 0; +} +early_param("alloc_mptable", parse_alloc_mptable_opt); - intsrc.mpc_type = MP_INTSRC; - intsrc.mpc_irqflag = 0; /* Conforming */ - intsrc.mpc_srcbus = MP_ISA_BUS; -#ifdef CONFIG_X86_IO_APIC - intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; +void __init early_reserve_e820_mpc_new(void) +{ + if (enable_update_mptable && alloc_mptable) { + u64 startt = 0; +#ifdef CONFIG_X86_TRAMPOLINE + startt = TRAMPOLINE_BASE; #endif - /* - * Use the default configuration for the IRQs 0-15. Unless - * overridden by (MADT) interrupt source override entries. - */ - for (i = 0; i < 16; i++) { - int idx; - - for (idx = 0; idx < mp_irq_entries; idx++) { - struct mpc_config_intsrc *irq = mp_irqs + idx; - - /* Do we already have a mapping for this ISA IRQ? */ - if (irq->mpc_srcbus == MP_ISA_BUS - && irq->mpc_srcbusirq == i) - break; - - /* Do we already have a mapping for this IOAPIC pin */ - if ((irq->mpc_dstapic == intsrc.mpc_dstapic) && - (irq->mpc_dstirq == i)) - break; - } - - if (idx != mp_irq_entries) { - printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); - continue; /* IRQ already used */ - } - - intsrc.mpc_irqtype = mp_INT; - intsrc.mpc_srcbusirq = i; /* Identity mapped */ - intsrc.mpc_dstirq = i; - - MP_intsrc_info(&intsrc); + mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4); } } -int mp_register_gsi(u32 gsi, int triggering, int polarity) +static int __init update_mp_table(void) { - int ioapic; - int ioapic_pin; -#ifdef CONFIG_X86_32 -#define MAX_GSI_NUM 4096 -#define IRQ_COMPRESSION_START 64 + char str[16]; + char oem[10]; + struct intel_mp_floating *mpf; + struct mp_config_table *mpc; + struct mp_config_table *mpc_new; + + if (!enable_update_mptable) + return 0; + + mpf = mpf_found; + if (!mpf) + return 0; - static int pci_irq = IRQ_COMPRESSION_START; /* - * Mapping between Global System Interrupts, which - * represent all possible interrupts, and IRQs - * assigned to actual devices. + * Now see if we need to go further. */ - static int gsi_to_irq[MAX_GSI_NUM]; -#else + if (mpf->mpf_feature1 != 0) + return 0; - if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) - return gsi; -#endif + if (!mpf->mpf_physptr) + return 0; - /* Don't set up the ACPI SCI because it's already set up */ - if (acpi_gbl_FADT.sci_interrupt == gsi) - return gsi; + mpc = phys_to_virt(mpf->mpf_physptr); - ioapic = mp_find_ioapic(gsi); - if (ioapic < 0) { - printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); - return gsi; - } + if (!smp_check_mpc(mpc, oem, str)) + return 0; - ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; + printk(KERN_INFO "mpf: %lx\n", virt_to_phys(mpf)); + printk(KERN_INFO "mpf_physptr: %x\n", mpf->mpf_physptr); -#ifdef CONFIG_X86_32 - if (ioapic_renumber_irq) - gsi = ioapic_renumber_irq(ioapic, gsi); -#endif - - /* - * Avoid pin reprogramming. PRTs typically include entries - * with redundant pin->gsi mappings (but unique PCI devices); - * we only program the IOAPIC on the first. - */ - if (ioapic_pin > MP_MAX_IOAPIC_PIN) { - printk(KERN_ERR "Invalid reference to IOAPIC pin " - "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, - ioapic_pin); - return gsi; + if (mpc_new_phys && mpc->mpc_length > mpc_new_length) { + mpc_new_phys = 0; + printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n", + mpc_new_length); } - if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { - Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", - mp_ioapic_routing[ioapic].apic_id, ioapic_pin); -#ifdef CONFIG_X86_32 - return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); -#else - return gsi; -#endif + + if (!mpc_new_phys) { + unsigned char old, new; + /* check if we can change the postion */ + mpc->mpc_checksum = 0; + old = mpf_checksum((unsigned char *)mpc, mpc->mpc_length); + mpc->mpc_checksum = 0xff; + new = mpf_checksum((unsigned char *)mpc, mpc->mpc_length); + if (old == new) { + printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n"); + return 0; + } + printk(KERN_INFO "use in-positon replacing\n"); + } else { + mpf->mpf_physptr = mpc_new_phys; + mpc_new = phys_to_virt(mpc_new_phys); + memcpy(mpc_new, mpc, mpc->mpc_length); + mpc = mpc_new; + /* check if we can modify that */ + if (mpc_new_phys - mpf->mpf_physptr) { + struct intel_mp_floating *mpf_new; + /* steal 16 bytes from [0, 1k) */ + printk(KERN_INFO "mpf new: %x\n", 0x400 - 16); + mpf_new = phys_to_virt(0x400 - 16); + memcpy(mpf_new, mpf, 16); + mpf = mpf_new; + mpf->mpf_physptr = mpc_new_phys; + } + mpf->mpf_checksum = 0; + mpf->mpf_checksum -= mpf_checksum((unsigned char *)mpf, 16); + printk(KERN_INFO "mpf_physptr new: %x\n", mpf->mpf_physptr); } - set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); -#ifdef CONFIG_X86_32 /* - * For GSI >= 64, use IRQ compression + * only replace the one with mp_INT and + * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, + * already in mp_irqs , stored by ... and mp_config_acpi_gsi, + * may need pci=routeirq for all coverage */ - if ((gsi >= IRQ_COMPRESSION_START) - && (triggering == ACPI_LEVEL_SENSITIVE)) { - /* - * For PCI devices assign IRQs in order, avoiding gaps - * due to unused I/O APIC pins. - */ - int irq = gsi; - if (gsi < MAX_GSI_NUM) { - /* - * Retain the VIA chipset work-around (gsi > 15), but - * avoid a problem where the 8254 timer (IRQ0) is setup - * via an override (so it's not on pin 0 of the ioapic), - * and at the same time, the pin 0 interrupt is a PCI - * type. The gsi > 15 test could cause these two pins - * to be shared as IRQ0, and they are not shareable. - * So test for this condition, and if necessary, avoid - * the pin collision. - */ - gsi = pci_irq++; - /* - * Don't assign IRQ used by ACPI SCI - */ - if (gsi == acpi_gbl_FADT.sci_interrupt) - gsi = pci_irq++; - gsi_to_irq[irq] = gsi; - } else { - printk(KERN_ERR "GSI %u is too high\n", gsi); - return gsi; - } - } -#endif - io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, - triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, - polarity == ACPI_ACTIVE_HIGH ? 0 : 1); - return gsi; + replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length); + + return 0; } -#endif /* CONFIG_X86_IO_APIC */ -#endif /* CONFIG_ACPI */ +late_initcall(update_mp_table); diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 1f3abe048e93ea3dd0aaa06225deb8a577904fc6..9fd8095524474aa7ef0a999c2746c92c8a166565 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c @@ -117,12 +117,20 @@ static int msr_open(struct inode *inode, struct file *file) { unsigned int cpu = iminor(file->f_path.dentry->d_inode); struct cpuinfo_x86 *c = &cpu_data(cpu); + int ret = 0; - if (cpu >= NR_CPUS || !cpu_online(cpu)) - return -ENXIO; /* No such CPU */ - if (!cpu_has(c, X86_FEATURE_MSR)) - return -EIO; /* MSR not supported */ + lock_kernel(); + cpu = iminor(file->f_path.dentry->d_inode); + if (cpu >= NR_CPUS || !cpu_online(cpu)) { + ret = -ENXIO; /* No such CPU */ + goto out; + } + c = &cpu_data(cpu); + if (!cpu_has(c, X86_FEATURE_MSR)) + ret = -EIO; /* MSR not supported */ +out: + unlock_kernel(); return 0; } @@ -141,8 +149,8 @@ static int __cpuinit msr_device_create(int cpu) { struct device *dev; - dev = device_create(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), - "msr%d", cpu); + dev = device_create_drvdata(msr_class, NULL, MKDEV(MSR_MAJOR, cpu), + NULL, "msr%d", cpu); return IS_ERR(dev) ? PTR_ERR(dev) : 0; } diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c new file mode 100644 index 0000000000000000000000000000000000000000..ac6d51222e7d3562abb1e7b5e8bd4a16a1c1c1f4 --- /dev/null +++ b/arch/x86/kernel/nmi.c @@ -0,0 +1,523 @@ +/* + * NMI watchdog support on APIC systems + * + * Started by Ingo Molnar + * + * Fixes: + * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. + * Mikael Pettersson : Power Management for local APIC NMI watchdog. + * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog. + * Pavel Machek and + * Mikael Pettersson : PM converted to driver model. Disable/enable API. + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include + +int unknown_nmi_panic; +int nmi_watchdog_enabled; + +static cpumask_t backtrace_mask = CPU_MASK_NONE; + +/* nmi_active: + * >0: the lapic NMI watchdog is active, but can be disabled + * <0: the lapic NMI watchdog has not been set up, and cannot + * be enabled + * 0: the lapic NMI watchdog is disabled, but can be enabled + */ +atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ +EXPORT_SYMBOL(nmi_active); + +unsigned int nmi_watchdog = NMI_NONE; +EXPORT_SYMBOL(nmi_watchdog); + +static int panic_on_timeout; + +static unsigned int nmi_hz = HZ; +static DEFINE_PER_CPU(short, wd_enabled); +static int endflag __initdata; + +static inline unsigned int get_nmi_count(int cpu) +{ +#ifdef CONFIG_X86_64 + return cpu_pda(cpu)->__nmi_count; +#else + return nmi_count(cpu); +#endif +} + +static inline int mce_in_progress(void) +{ +#if defined(CONFIG_X86_64) && defined(CONFIG_X86_MCE) + return atomic_read(&mce_entry) > 0; +#endif + return 0; +} + +/* + * Take the local apic timer and PIT/HPET into account. We don't + * know which one is active, when we have highres/dyntick on + */ +static inline unsigned int get_timer_irqs(int cpu) +{ +#ifdef CONFIG_X86_64 + return read_pda(apic_timer_irqs) + read_pda(irq0_irqs); +#else + return per_cpu(irq_stat, cpu).apic_timer_irqs + + per_cpu(irq_stat, cpu).irq0_irqs; +#endif +} + +#ifdef CONFIG_SMP +/* + * The performance counters used by NMI_LOCAL_APIC don't trigger when + * the CPU is idle. To make sure the NMI watchdog really ticks on all + * CPUs during the test make them busy. + */ +static __init void nmi_cpu_busy(void *data) +{ + local_irq_enable_in_hardirq(); + /* + * Intentionally don't use cpu_relax here. This is + * to make sure that the performance counter really ticks, + * even if there is a simulator or similar that catches the + * pause instruction. On a real HT machine this is fine because + * all other CPUs are busy with "useless" delay loops and don't + * care if they get somewhat less cycles. + */ + while (endflag == 0) + mb(); +} +#endif + +int __init check_nmi_watchdog(void) +{ + unsigned int *prev_nmi_count; + int cpu; + + if (!nmi_watchdog_active() || !atomic_read(&nmi_active)) + return 0; + + prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL); + if (!prev_nmi_count) + goto error; + + printk(KERN_INFO "Testing NMI watchdog ... "); + +#ifdef CONFIG_SMP + if (nmi_watchdog == NMI_LOCAL_APIC) + smp_call_function(nmi_cpu_busy, (void *)&endflag, 0); +#endif + + for_each_possible_cpu(cpu) + prev_nmi_count[cpu] = get_nmi_count(cpu); + local_irq_enable(); + mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ + + for_each_online_cpu(cpu) { + if (!per_cpu(wd_enabled, cpu)) + continue; + if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) { + printk(KERN_WARNING "WARNING: CPU#%d: NMI " + "appears to be stuck (%d->%d)!\n", + cpu, + prev_nmi_count[cpu], + get_nmi_count(cpu)); + per_cpu(wd_enabled, cpu) = 0; + atomic_dec(&nmi_active); + } + } + endflag = 1; + if (!atomic_read(&nmi_active)) { + kfree(prev_nmi_count); + atomic_set(&nmi_active, -1); + goto error; + } + printk("OK.\n"); + + /* + * now that we know it works we can reduce NMI frequency to + * something more reasonable; makes a difference in some configs + */ + if (nmi_watchdog == NMI_LOCAL_APIC) + nmi_hz = lapic_adjust_nmi_hz(1); + + kfree(prev_nmi_count); + return 0; +error: + if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259) + disable_8259A_irq(0); +#ifdef CONFIG_X86_32 + timer_ack = 0; +#endif + return -1; +} + +static int __init setup_nmi_watchdog(char *str) +{ + unsigned int nmi; + + if (!strncmp(str, "panic", 5)) { + panic_on_timeout = 1; + str = strchr(str, ','); + if (!str) + return 1; + ++str; + } + + get_option(&str, &nmi); + + if (nmi >= NMI_INVALID) + return 0; + + nmi_watchdog = nmi; + return 1; +} +__setup("nmi_watchdog=", setup_nmi_watchdog); + +/* + * Suspend/resume support + */ +#ifdef CONFIG_PM + +static int nmi_pm_active; /* nmi_active before suspend */ + +static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) +{ + /* only CPU0 goes here, other CPUs should be offline */ + nmi_pm_active = atomic_read(&nmi_active); + stop_apic_nmi_watchdog(NULL); + BUG_ON(atomic_read(&nmi_active) != 0); + return 0; +} + +static int lapic_nmi_resume(struct sys_device *dev) +{ + /* only CPU0 goes here, other CPUs should be offline */ + if (nmi_pm_active > 0) { + setup_apic_nmi_watchdog(NULL); + touch_nmi_watchdog(); + } + return 0; +} + +static struct sysdev_class nmi_sysclass = { + .name = "lapic_nmi", + .resume = lapic_nmi_resume, + .suspend = lapic_nmi_suspend, +}; + +static struct sys_device device_lapic_nmi = { + .id = 0, + .cls = &nmi_sysclass, +}; + +static int __init init_lapic_nmi_sysfs(void) +{ + int error; + + /* + * should really be a BUG_ON but b/c this is an + * init call, it just doesn't work. -dcz + */ + if (nmi_watchdog != NMI_LOCAL_APIC) + return 0; + + if (atomic_read(&nmi_active) < 0) + return 0; + + error = sysdev_class_register(&nmi_sysclass); + if (!error) + error = sysdev_register(&device_lapic_nmi); + return error; +} + +/* must come after the local APIC's device_initcall() */ +late_initcall(init_lapic_nmi_sysfs); + +#endif /* CONFIG_PM */ + +static void __acpi_nmi_enable(void *__unused) +{ + apic_write(APIC_LVT0, APIC_DM_NMI); +} + +/* + * Enable timer based NMIs on all CPUs: + */ +void acpi_nmi_enable(void) +{ + if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) + on_each_cpu(__acpi_nmi_enable, NULL, 1); +} + +static void __acpi_nmi_disable(void *__unused) +{ + apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); +} + +/* + * Disable timer based NMIs on all CPUs: + */ +void acpi_nmi_disable(void) +{ + if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) + on_each_cpu(__acpi_nmi_disable, NULL, 1); +} + +void setup_apic_nmi_watchdog(void *unused) +{ + if (__get_cpu_var(wd_enabled)) + return; + + /* cheap hack to support suspend/resume */ + /* if cpu0 is not active neither should the other cpus */ + if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0) + return; + + switch (nmi_watchdog) { + case NMI_LOCAL_APIC: + /* enable it before to avoid race with handler */ + __get_cpu_var(wd_enabled) = 1; + if (lapic_watchdog_init(nmi_hz) < 0) { + __get_cpu_var(wd_enabled) = 0; + return; + } + /* FALL THROUGH */ + case NMI_IO_APIC: + __get_cpu_var(wd_enabled) = 1; + atomic_inc(&nmi_active); + } +} + +void stop_apic_nmi_watchdog(void *unused) +{ + /* only support LOCAL and IO APICs for now */ + if (!nmi_watchdog_active()) + return; + if (__get_cpu_var(wd_enabled) == 0) + return; + if (nmi_watchdog == NMI_LOCAL_APIC) + lapic_watchdog_stop(); + __get_cpu_var(wd_enabled) = 0; + atomic_dec(&nmi_active); +} + +/* + * the best way to detect whether a CPU has a 'hard lockup' problem + * is to check it's local APIC timer IRQ counts. If they are not + * changing then that CPU has some problem. + * + * as these watchdog NMI IRQs are generated on every CPU, we only + * have to check the current processor. + * + * since NMIs don't listen to _any_ locks, we have to be extremely + * careful not to rely on unsafe variables. The printk might lock + * up though, so we have to break up any console locks first ... + * [when there will be more tty-related locks, break them up here too!] + */ + +static DEFINE_PER_CPU(unsigned, last_irq_sum); +static DEFINE_PER_CPU(local_t, alert_counter); +static DEFINE_PER_CPU(int, nmi_touch); + +void touch_nmi_watchdog(void) +{ + if (nmi_watchdog_active()) { + unsigned cpu; + + /* + * Tell other CPUs to reset their alert counters. We cannot + * do it ourselves because the alert count increase is not + * atomic. + */ + for_each_present_cpu(cpu) { + if (per_cpu(nmi_touch, cpu) != 1) + per_cpu(nmi_touch, cpu) = 1; + } + } + + /* + * Tickle the softlockup detector too: + */ + touch_softlockup_watchdog(); +} +EXPORT_SYMBOL(touch_nmi_watchdog); + +notrace __kprobes int +nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) +{ + /* + * Since current_thread_info()-> is always on the stack, and we + * always switch the stack NMI-atomically, it's safe to use + * smp_processor_id(). + */ + unsigned int sum; + int touched = 0; + int cpu = smp_processor_id(); + int rc = 0; + + /* check for other users first */ + if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) + == NOTIFY_STOP) { + rc = 1; + touched = 1; + } + + sum = get_timer_irqs(cpu); + + if (__get_cpu_var(nmi_touch)) { + __get_cpu_var(nmi_touch) = 0; + touched = 1; + } + + if (cpu_isset(cpu, backtrace_mask)) { + static DEFINE_SPINLOCK(lock); /* Serialise the printks */ + + spin_lock(&lock); + printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu); + dump_stack(); + spin_unlock(&lock); + cpu_clear(cpu, backtrace_mask); + } + + /* Could check oops_in_progress here too, but it's safer not to */ + if (mce_in_progress()) + touched = 1; + + /* if the none of the timers isn't firing, this cpu isn't doing much */ + if (!touched && __get_cpu_var(last_irq_sum) == sum) { + /* + * Ayiee, looks like this CPU is stuck ... + * wait a few IRQs (5 seconds) before doing the oops ... + */ + local_inc(&__get_cpu_var(alert_counter)); + if (local_read(&__get_cpu_var(alert_counter)) == 5 * nmi_hz) + /* + * die_nmi will return ONLY if NOTIFY_STOP happens.. + */ + die_nmi("BUG: NMI Watchdog detected LOCKUP", + regs, panic_on_timeout); + } else { + __get_cpu_var(last_irq_sum) = sum; + local_set(&__get_cpu_var(alert_counter), 0); + } + + /* see if the nmi watchdog went off */ + if (!__get_cpu_var(wd_enabled)) + return rc; + switch (nmi_watchdog) { + case NMI_LOCAL_APIC: + rc |= lapic_wd_event(nmi_hz); + break; + case NMI_IO_APIC: + /* + * don't know how to accurately check for this. + * just assume it was a watchdog timer interrupt + * This matches the old behaviour. + */ + rc = 1; + break; + } + return rc; +} + +#ifdef CONFIG_SYSCTL + +static int __init setup_unknown_nmi_panic(char *str) +{ + unknown_nmi_panic = 1; + return 1; +} +__setup("unknown_nmi_panic", setup_unknown_nmi_panic); + +static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) +{ + unsigned char reason = get_nmi_reason(); + char buf[64]; + + sprintf(buf, "NMI received for unknown reason %02x\n", reason); + die_nmi(buf, regs, 1); /* Always panic here */ + return 0; +} + +/* + * proc handler for /proc/sys/kernel/nmi + */ +int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, + void __user *buffer, size_t *length, loff_t *ppos) +{ + int old_state; + + nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; + old_state = nmi_watchdog_enabled; + proc_dointvec(table, write, file, buffer, length, ppos); + if (!!old_state == !!nmi_watchdog_enabled) + return 0; + + if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) { + printk(KERN_WARNING + "NMI watchdog is permanently disabled\n"); + return -EIO; + } + + if (nmi_watchdog == NMI_LOCAL_APIC) { + if (nmi_watchdog_enabled) + enable_lapic_nmi_watchdog(); + else + disable_lapic_nmi_watchdog(); + } else { + printk(KERN_WARNING + "NMI watchdog doesn't know what hardware to touch\n"); + return -EIO; + } + return 0; +} + +#endif /* CONFIG_SYSCTL */ + +int do_nmi_callback(struct pt_regs *regs, int cpu) +{ +#ifdef CONFIG_SYSCTL + if (unknown_nmi_panic) + return unknown_nmi_panic_callback(regs, cpu); +#endif + return 0; +} + +void __trigger_all_cpu_backtrace(void) +{ + int i; + + backtrace_mask = cpu_online_map; + /* Wait for up to 10 seconds for all CPUs to do the backtrace */ + for (i = 0; i < 10 * 1000; i++) { + if (cpus_empty(backtrace_mask)) + break; + mdelay(1); + } +} diff --git a/arch/x86/kernel/nmi_32.c b/arch/x86/kernel/nmi_32.c deleted file mode 100644 index 84160f74eeb0abadbb9bcbffaef9e19ba58164a6..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/nmi_32.c +++ /dev/null @@ -1,467 +0,0 @@ -/* - * NMI watchdog support on APIC systems - * - * Started by Ingo Molnar - * - * Fixes: - * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. - * Mikael Pettersson : Power Management for local APIC NMI watchdog. - * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog. - * Pavel Machek and - * Mikael Pettersson : PM converted to driver model. Disable/enable API. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "mach_traps.h" - -int unknown_nmi_panic; -int nmi_watchdog_enabled; - -static cpumask_t backtrace_mask = CPU_MASK_NONE; - -/* nmi_active: - * >0: the lapic NMI watchdog is active, but can be disabled - * <0: the lapic NMI watchdog has not been set up, and cannot - * be enabled - * 0: the lapic NMI watchdog is disabled, but can be enabled - */ -atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ - -unsigned int nmi_watchdog = NMI_DEFAULT; -static unsigned int nmi_hz = HZ; - -static DEFINE_PER_CPU(short, wd_enabled); - -static int endflag __initdata = 0; - -#ifdef CONFIG_SMP -/* The performance counters used by NMI_LOCAL_APIC don't trigger when - * the CPU is idle. To make sure the NMI watchdog really ticks on all - * CPUs during the test make them busy. - */ -static __init void nmi_cpu_busy(void *data) -{ - local_irq_enable_in_hardirq(); - /* Intentionally don't use cpu_relax here. This is - to make sure that the performance counter really ticks, - even if there is a simulator or similar that catches the - pause instruction. On a real HT machine this is fine because - all other CPUs are busy with "useless" delay loops and don't - care if they get somewhat less cycles. */ - while (endflag == 0) - mb(); -} -#endif - -int __init check_nmi_watchdog(void) -{ - unsigned int *prev_nmi_count; - int cpu; - - if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED)) - return 0; - - if (!atomic_read(&nmi_active)) - return 0; - - prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); - if (!prev_nmi_count) - return -1; - - printk(KERN_INFO "Testing NMI watchdog ... "); - -#ifdef CONFIG_SMP - if (nmi_watchdog == NMI_LOCAL_APIC) - smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0); -#endif - - for_each_possible_cpu(cpu) - prev_nmi_count[cpu] = nmi_count(cpu); - local_irq_enable(); - mdelay((20*1000)/nmi_hz); // wait 20 ticks - - for_each_possible_cpu(cpu) { -#ifdef CONFIG_SMP - /* Check cpu_callin_map here because that is set - after the timer is started. */ - if (!cpu_isset(cpu, cpu_callin_map)) - continue; -#endif - if (!per_cpu(wd_enabled, cpu)) - continue; - if (nmi_count(cpu) - prev_nmi_count[cpu] <= 5) { - printk(KERN_WARNING "WARNING: CPU#%d: NMI " - "appears to be stuck (%d->%d)!\n", - cpu, - prev_nmi_count[cpu], - nmi_count(cpu)); - per_cpu(wd_enabled, cpu) = 0; - atomic_dec(&nmi_active); - } - } - endflag = 1; - if (!atomic_read(&nmi_active)) { - kfree(prev_nmi_count); - atomic_set(&nmi_active, -1); - return -1; - } - printk("OK.\n"); - - /* now that we know it works we can reduce NMI frequency to - something more reasonable; makes a difference in some configs */ - if (nmi_watchdog == NMI_LOCAL_APIC) - nmi_hz = lapic_adjust_nmi_hz(1); - - kfree(prev_nmi_count); - return 0; -} - -static int __init setup_nmi_watchdog(char *str) -{ - int nmi; - - get_option(&str, &nmi); - - if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE)) - return 0; - - nmi_watchdog = nmi; - return 1; -} - -__setup("nmi_watchdog=", setup_nmi_watchdog); - - -/* Suspend/resume support */ - -#ifdef CONFIG_PM - -static int nmi_pm_active; /* nmi_active before suspend */ - -static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) -{ - /* only CPU0 goes here, other CPUs should be offline */ - nmi_pm_active = atomic_read(&nmi_active); - stop_apic_nmi_watchdog(NULL); - BUG_ON(atomic_read(&nmi_active) != 0); - return 0; -} - -static int lapic_nmi_resume(struct sys_device *dev) -{ - /* only CPU0 goes here, other CPUs should be offline */ - if (nmi_pm_active > 0) { - setup_apic_nmi_watchdog(NULL); - touch_nmi_watchdog(); - } - return 0; -} - - -static struct sysdev_class nmi_sysclass = { - .name = "lapic_nmi", - .resume = lapic_nmi_resume, - .suspend = lapic_nmi_suspend, -}; - -static struct sys_device device_lapic_nmi = { - .id = 0, - .cls = &nmi_sysclass, -}; - -static int __init init_lapic_nmi_sysfs(void) -{ - int error; - - /* should really be a BUG_ON but b/c this is an - * init call, it just doesn't work. -dcz - */ - if (nmi_watchdog != NMI_LOCAL_APIC) - return 0; - - if (atomic_read(&nmi_active) < 0) - return 0; - - error = sysdev_class_register(&nmi_sysclass); - if (!error) - error = sysdev_register(&device_lapic_nmi); - return error; -} -/* must come after the local APIC's device_initcall() */ -late_initcall(init_lapic_nmi_sysfs); - -#endif /* CONFIG_PM */ - -static void __acpi_nmi_enable(void *__unused) -{ - apic_write_around(APIC_LVT0, APIC_DM_NMI); -} - -/* - * Enable timer based NMIs on all CPUs: - */ -void acpi_nmi_enable(void) -{ - if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) - on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); -} - -static void __acpi_nmi_disable(void *__unused) -{ - apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); -} - -/* - * Disable timer based NMIs on all CPUs: - */ -void acpi_nmi_disable(void) -{ - if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) - on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); -} - -void setup_apic_nmi_watchdog(void *unused) -{ - if (__get_cpu_var(wd_enabled)) - return; - - /* cheap hack to support suspend/resume */ - /* if cpu0 is not active neither should the other cpus */ - if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0)) - return; - - switch (nmi_watchdog) { - case NMI_LOCAL_APIC: - __get_cpu_var(wd_enabled) = 1; /* enable it before to avoid race with handler */ - if (lapic_watchdog_init(nmi_hz) < 0) { - __get_cpu_var(wd_enabled) = 0; - return; - } - /* FALL THROUGH */ - case NMI_IO_APIC: - __get_cpu_var(wd_enabled) = 1; - atomic_inc(&nmi_active); - } -} - -void stop_apic_nmi_watchdog(void *unused) -{ - /* only support LOCAL and IO APICs for now */ - if ((nmi_watchdog != NMI_LOCAL_APIC) && - (nmi_watchdog != NMI_IO_APIC)) - return; - if (__get_cpu_var(wd_enabled) == 0) - return; - if (nmi_watchdog == NMI_LOCAL_APIC) - lapic_watchdog_stop(); - __get_cpu_var(wd_enabled) = 0; - atomic_dec(&nmi_active); -} - -/* - * the best way to detect whether a CPU has a 'hard lockup' problem - * is to check it's local APIC timer IRQ counts. If they are not - * changing then that CPU has some problem. - * - * as these watchdog NMI IRQs are generated on every CPU, we only - * have to check the current processor. - * - * since NMIs don't listen to _any_ locks, we have to be extremely - * careful not to rely on unsafe variables. The printk might lock - * up though, so we have to break up any console locks first ... - * [when there will be more tty-related locks, break them up - * here too!] - */ - -static unsigned int - last_irq_sums [NR_CPUS], - alert_counter [NR_CPUS]; - -void touch_nmi_watchdog(void) -{ - if (nmi_watchdog > 0) { - unsigned cpu; - - /* - * Just reset the alert counters, (other CPUs might be - * spinning on locks we hold): - */ - for_each_present_cpu(cpu) { - if (alert_counter[cpu]) - alert_counter[cpu] = 0; - } - } - - /* - * Tickle the softlockup detector too: - */ - touch_softlockup_watchdog(); -} -EXPORT_SYMBOL(touch_nmi_watchdog); - -extern void die_nmi(struct pt_regs *, const char *msg); - -notrace __kprobes int -nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) -{ - - /* - * Since current_thread_info()-> is always on the stack, and we - * always switch the stack NMI-atomically, it's safe to use - * smp_processor_id(). - */ - unsigned int sum; - int touched = 0; - int cpu = smp_processor_id(); - int rc = 0; - - /* check for other users first */ - if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) - == NOTIFY_STOP) { - rc = 1; - touched = 1; - } - - if (cpu_isset(cpu, backtrace_mask)) { - static DEFINE_SPINLOCK(lock); /* Serialise the printks */ - - spin_lock(&lock); - printk("NMI backtrace for cpu %d\n", cpu); - dump_stack(); - spin_unlock(&lock); - cpu_clear(cpu, backtrace_mask); - } - - /* - * Take the local apic timer and PIT/HPET into account. We don't - * know which one is active, when we have highres/dyntick on - */ - sum = per_cpu(irq_stat, cpu).apic_timer_irqs + - per_cpu(irq_stat, cpu).irq0_irqs; - - /* if the none of the timers isn't firing, this cpu isn't doing much */ - if (!touched && last_irq_sums[cpu] == sum) { - /* - * Ayiee, looks like this CPU is stuck ... - * wait a few IRQs (5 seconds) before doing the oops ... - */ - alert_counter[cpu]++; - if (alert_counter[cpu] == 5*nmi_hz) - /* - * die_nmi will return ONLY if NOTIFY_STOP happens.. - */ - die_nmi(regs, "BUG: NMI Watchdog detected LOCKUP"); - } else { - last_irq_sums[cpu] = sum; - alert_counter[cpu] = 0; - } - /* see if the nmi watchdog went off */ - if (!__get_cpu_var(wd_enabled)) - return rc; - switch (nmi_watchdog) { - case NMI_LOCAL_APIC: - rc |= lapic_wd_event(nmi_hz); - break; - case NMI_IO_APIC: - /* don't know how to accurately check for this. - * just assume it was a watchdog timer interrupt - * This matches the old behaviour. - */ - rc = 1; - break; - } - return rc; -} - -#ifdef CONFIG_SYSCTL - -static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) -{ - unsigned char reason = get_nmi_reason(); - char buf[64]; - - sprintf(buf, "NMI received for unknown reason %02x\n", reason); - die_nmi(regs, buf); - return 0; -} - -/* - * proc handler for /proc/sys/kernel/nmi - */ -int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, - void __user *buffer, size_t *length, loff_t *ppos) -{ - int old_state; - - nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; - old_state = nmi_watchdog_enabled; - proc_dointvec(table, write, file, buffer, length, ppos); - if (!!old_state == !!nmi_watchdog_enabled) - return 0; - - if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) { - printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); - return -EIO; - } - - if (nmi_watchdog == NMI_DEFAULT) { - if (lapic_watchdog_ok()) - nmi_watchdog = NMI_LOCAL_APIC; - else - nmi_watchdog = NMI_IO_APIC; - } - - if (nmi_watchdog == NMI_LOCAL_APIC) { - if (nmi_watchdog_enabled) - enable_lapic_nmi_watchdog(); - else - disable_lapic_nmi_watchdog(); - } else { - printk( KERN_WARNING - "NMI watchdog doesn't know what hardware to touch\n"); - return -EIO; - } - return 0; -} - -#endif - -int do_nmi_callback(struct pt_regs *regs, int cpu) -{ -#ifdef CONFIG_SYSCTL - if (unknown_nmi_panic) - return unknown_nmi_panic_callback(regs, cpu); -#endif - return 0; -} - -void __trigger_all_cpu_backtrace(void) -{ - int i; - - backtrace_mask = cpu_online_map; - /* Wait for up to 10 seconds for all CPUs to do the backtrace */ - for (i = 0; i < 10 * 1000; i++) { - if (cpus_empty(backtrace_mask)) - break; - mdelay(1); - } -} - -EXPORT_SYMBOL(nmi_active); -EXPORT_SYMBOL(nmi_watchdog); diff --git a/arch/x86/kernel/nmi_64.c b/arch/x86/kernel/nmi_64.c deleted file mode 100644 index 5a29ded994fa345fb67f92cc19b9fa9dd5606cf8..0000000000000000000000000000000000000000 --- a/arch/x86/kernel/nmi_64.c +++ /dev/null @@ -1,482 +0,0 @@ -/* - * NMI watchdog support on APIC systems - * - * Started by Ingo Molnar - * - * Fixes: - * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. - * Mikael Pettersson : Power Management for local APIC NMI watchdog. - * Pavel Machek and - * Mikael Pettersson : PM converted to driver model. Disable/enable API. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -int unknown_nmi_panic; -int nmi_watchdog_enabled; -int panic_on_unrecovered_nmi; - -static cpumask_t backtrace_mask = CPU_MASK_NONE; - -/* nmi_active: - * >0: the lapic NMI watchdog is active, but can be disabled - * <0: the lapic NMI watchdog has not been set up, and cannot - * be enabled - * 0: the lapic NMI watchdog is disabled, but can be enabled - */ -atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ -static int panic_on_timeout; - -unsigned int nmi_watchdog = NMI_DEFAULT; -static unsigned int nmi_hz = HZ; - -static DEFINE_PER_CPU(short, wd_enabled); - -/* Run after command line and cpu_init init, but before all other checks */ -void nmi_watchdog_default(void) -{ - if (nmi_watchdog != NMI_DEFAULT) - return; - nmi_watchdog = NMI_NONE; -} - -static int endflag __initdata = 0; - -#ifdef CONFIG_SMP -/* The performance counters used by NMI_LOCAL_APIC don't trigger when - * the CPU is idle. To make sure the NMI watchdog really ticks on all - * CPUs during the test make them busy. - */ -static __init void nmi_cpu_busy(void *data) -{ - local_irq_enable_in_hardirq(); - /* Intentionally don't use cpu_relax here. This is - to make sure that the performance counter really ticks, - even if there is a simulator or similar that catches the - pause instruction. On a real HT machine this is fine because - all other CPUs are busy with "useless" delay loops and don't - care if they get somewhat less cycles. */ - while (endflag == 0) - mb(); -} -#endif - -int __init check_nmi_watchdog(void) -{ - int *prev_nmi_count; - int cpu; - - if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DISABLED)) - return 0; - - if (!atomic_read(&nmi_active)) - return 0; - - prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL); - if (!prev_nmi_count) - return -1; - - printk(KERN_INFO "Testing NMI watchdog ... "); - -#ifdef CONFIG_SMP - if (nmi_watchdog == NMI_LOCAL_APIC) - smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0); -#endif - - for (cpu = 0; cpu < NR_CPUS; cpu++) - prev_nmi_count[cpu] = cpu_pda(cpu)->__nmi_count; - local_irq_enable(); - mdelay((20*1000)/nmi_hz); // wait 20 ticks - - for_each_online_cpu(cpu) { - if (!per_cpu(wd_enabled, cpu)) - continue; - if (cpu_pda(cpu)->__nmi_count - prev_nmi_count[cpu] <= 5) { - printk(KERN_WARNING "WARNING: CPU#%d: NMI " - "appears to be stuck (%d->%d)!\n", - cpu, - prev_nmi_count[cpu], - cpu_pda(cpu)->__nmi_count); - per_cpu(wd_enabled, cpu) = 0; - atomic_dec(&nmi_active); - } - } - endflag = 1; - if (!atomic_read(&nmi_active)) { - kfree(prev_nmi_count); - atomic_set(&nmi_active, -1); - return -1; - } - printk("OK.\n"); - - /* now that we know it works we can reduce NMI frequency to - something more reasonable; makes a difference in some configs */ - if (nmi_watchdog == NMI_LOCAL_APIC) - nmi_hz = lapic_adjust_nmi_hz(1); - - kfree(prev_nmi_count); - return 0; -} - -static int __init setup_nmi_watchdog(char *str) -{ - int nmi; - - if (!strncmp(str,"panic",5)) { - panic_on_timeout = 1; - str = strchr(str, ','); - if (!str) - return 1; - ++str; - } - - get_option(&str, &nmi); - - if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE)) - return 0; - - nmi_watchdog = nmi; - return 1; -} - -__setup("nmi_watchdog=", setup_nmi_watchdog); - -#ifdef CONFIG_PM - -static int nmi_pm_active; /* nmi_active before suspend */ - -static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) -{ - /* only CPU0 goes here, other CPUs should be offline */ - nmi_pm_active = atomic_read(&nmi_active); - stop_apic_nmi_watchdog(NULL); - BUG_ON(atomic_read(&nmi_active) != 0); - return 0; -} - -static int lapic_nmi_resume(struct sys_device *dev) -{ - /* only CPU0 goes here, other CPUs should be offline */ - if (nmi_pm_active > 0) { - setup_apic_nmi_watchdog(NULL); - touch_nmi_watchdog(); - } - return 0; -} - -static struct sysdev_class nmi_sysclass = { - .name = "lapic_nmi", - .resume = lapic_nmi_resume, - .suspend = lapic_nmi_suspend, -}; - -static struct sys_device device_lapic_nmi = { - .id = 0, - .cls = &nmi_sysclass, -}; - -static int __init init_lapic_nmi_sysfs(void) -{ - int error; - - /* should really be a BUG_ON but b/c this is an - * init call, it just doesn't work. -dcz - */ - if (nmi_watchdog != NMI_LOCAL_APIC) - return 0; - - if (atomic_read(&nmi_active) < 0) - return 0; - - error = sysdev_class_register(&nmi_sysclass); - if (!error) - error = sysdev_register(&device_lapic_nmi); - return error; -} -/* must come after the local APIC's device_initcall() */ -late_initcall(init_lapic_nmi_sysfs); - -#endif /* CONFIG_PM */ - -static void __acpi_nmi_enable(void *__unused) -{ - apic_write(APIC_LVT0, APIC_DM_NMI); -} - -/* - * Enable timer based NMIs on all CPUs: - */ -void acpi_nmi_enable(void) -{ - if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) - on_each_cpu(__acpi_nmi_enable, NULL, 0, 1); -} - -static void __acpi_nmi_disable(void *__unused) -{ - apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); -} - -/* - * Disable timer based NMIs on all CPUs: - */ -void acpi_nmi_disable(void) -{ - if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) - on_each_cpu(__acpi_nmi_disable, NULL, 0, 1); -} - -void setup_apic_nmi_watchdog(void *unused) -{ - if (__get_cpu_var(wd_enabled)) - return; - - /* cheap hack to support suspend/resume */ - /* if cpu0 is not active neither should the other cpus */ - if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0)) - return; - - switch (nmi_watchdog) { - case NMI_LOCAL_APIC: - __get_cpu_var(wd_enabled) = 1; - if (lapic_watchdog_init(nmi_hz) < 0) { - __get_cpu_var(wd_enabled) = 0; - return; - } - /* FALL THROUGH */ - case NMI_IO_APIC: - __get_cpu_var(wd_enabled) = 1; - atomic_inc(&nmi_active); - } -} - -void stop_apic_nmi_watchdog(void *unused) -{ - /* only support LOCAL and IO APICs for now */ - if ((nmi_watchdog != NMI_LOCAL_APIC) && - (nmi_watchdog != NMI_IO_APIC)) - return; - if (__get_cpu_var(wd_enabled) == 0) - return; - if (nmi_watchdog == NMI_LOCAL_APIC) - lapic_watchdog_stop(); - __get_cpu_var(wd_enabled) = 0; - atomic_dec(&nmi_active); -} - -/* - * the best way to detect whether a CPU has a 'hard lockup' problem - * is to check it's local APIC timer IRQ counts. If they are not - * changing then that CPU has some problem. - * - * as these watchdog NMI IRQs are generated on every CPU, we only - * have to check the current processor. - */ - -static DEFINE_PER_CPU(unsigned, last_irq_sum); -static DEFINE_PER_CPU(local_t, alert_counter); -static DEFINE_PER_CPU(int, nmi_touch); - -void touch_nmi_watchdog(void) -{ - if (nmi_watchdog > 0) { - unsigned cpu; - - /* - * Tell other CPUs to reset their alert counters. We cannot - * do it ourselves because the alert count increase is not - * atomic. - */ - for_each_present_cpu(cpu) { - if (per_cpu(nmi_touch, cpu) != 1) - per_cpu(nmi_touch, cpu) = 1; - } - } - - touch_softlockup_watchdog(); -} -EXPORT_SYMBOL(touch_nmi_watchdog); - -notrace __kprobes int -nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) -{ - int sum; - int touched = 0; - int cpu = smp_processor_id(); - int rc = 0; - - /* check for other users first */ - if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) - == NOTIFY_STOP) { - rc = 1; - touched = 1; - } - - sum = read_pda(apic_timer_irqs) + read_pda(irq0_irqs); - if (__get_cpu_var(nmi_touch)) { - __get_cpu_var(nmi_touch) = 0; - touched = 1; - } - - if (cpu_isset(cpu, backtrace_mask)) { - static DEFINE_SPINLOCK(lock); /* Serialise the printks */ - - spin_lock(&lock); - printk("NMI backtrace for cpu %d\n", cpu); - dump_stack(); - spin_unlock(&lock); - cpu_clear(cpu, backtrace_mask); - } - -#ifdef CONFIG_X86_MCE - /* Could check oops_in_progress here too, but it's safer - not too */ - if (atomic_read(&mce_entry) > 0) - touched = 1; -#endif - /* if the apic timer isn't firing, this cpu isn't doing much */ - if (!touched && __get_cpu_var(last_irq_sum) == sum) { - /* - * Ayiee, looks like this CPU is stuck ... - * wait a few IRQs (5 seconds) before doing the oops ... - */ - local_inc(&__get_cpu_var(alert_counter)); - if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz) - die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs, - panic_on_timeout); - } else { - __get_cpu_var(last_irq_sum) = sum; - local_set(&__get_cpu_var(alert_counter), 0); - } - - /* see if the nmi watchdog went off */ - if (!__get_cpu_var(wd_enabled)) - return rc; - switch (nmi_watchdog) { - case NMI_LOCAL_APIC: - rc |= lapic_wd_event(nmi_hz); - break; - case NMI_IO_APIC: - /* don't know how to accurately check for this. - * just assume it was a watchdog timer interrupt - * This matches the old behaviour. - */ - rc = 1; - break; - } - return rc; -} - -static unsigned ignore_nmis; - -asmlinkage notrace __kprobes void -do_nmi(struct pt_regs *regs, long error_code) -{ - nmi_enter(); - add_pda(__nmi_count,1); - if (!ignore_nmis) - default_do_nmi(regs); - nmi_exit(); -} - -void stop_nmi(void) -{ - acpi_nmi_disable(); - ignore_nmis++; -} - -void restart_nmi(void) -{ - ignore_nmis--; - acpi_nmi_enable(); -} - -#ifdef CONFIG_SYSCTL - -static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) -{ - unsigned char reason = get_nmi_reason(); - char buf[64]; - - sprintf(buf, "NMI received for unknown reason %02x\n", reason); - die_nmi(buf, regs, 1); /* Always panic here */ - return 0; -} - -/* - * proc handler for /proc/sys/kernel/nmi - */ -int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file, - void __user *buffer, size_t *length, loff_t *ppos) -{ - int old_state; - - nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; - old_state = nmi_watchdog_enabled; - proc_dointvec(table, write, file, buffer, length, ppos); - if (!!old_state == !!nmi_watchdog_enabled) - return 0; - - if (atomic_read(&nmi_active) < 0 || nmi_watchdog == NMI_DISABLED) { - printk( KERN_WARNING "NMI watchdog is permanently disabled\n"); - return -EIO; - } - - /* if nmi_watchdog is not set yet, then set it */ - nmi_watchdog_default(); - - if (nmi_watchdog == NMI_LOCAL_APIC) { - if (nmi_watchdog_enabled) - enable_lapic_nmi_watchdog(); - else - disable_lapic_nmi_watchdog(); - } else { - printk( KERN_WARNING - "NMI watchdog doesn't know what hardware to touch\n"); - return -EIO; - } - return 0; -} - -#endif - -int do_nmi_callback(struct pt_regs *regs, int cpu) -{ -#ifdef CONFIG_SYSCTL - if (unknown_nmi_panic) - return unknown_nmi_panic_callback(regs, cpu); -#endif - return 0; -} - -void __trigger_all_cpu_backtrace(void) -{ - int i; - - backtrace_mask = cpu_online_map; - /* Wait for up to 10 seconds for all CPUs to do the backtrace */ - for (i = 0; i < 10 * 1000; i++) { - if (cpus_empty(backtrace_mask)) - break; - mdelay(1); - } -} - -EXPORT_SYMBOL(nmi_active); -EXPORT_SYMBOL(nmi_watchdog); diff --git a/arch/x86/kernel/numaq_32.c b/arch/x86/kernel/numaq_32.c index e65281b1634b790bd151c479fc96f3846febe87d..2434467ddf72a9722553e880917361d699b4c1be 100644 --- a/arch/x86/kernel/numaq_32.c +++ b/arch/x86/kernel/numaq_32.c @@ -31,6 +31,9 @@ #include #include #include +#include +#include +#include #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT)) @@ -58,6 +61,8 @@ static void __init smp_dump_qct(void) node_end_pfn[node] = MB_TO_PAGES( eq->hi_shrd_mem_start + eq->hi_shrd_mem_size); + e820_register_active_regions(node, node_start_pfn[node], + node_end_pfn[node]); memory_present(node, node_start_pfn[node], node_end_pfn[node]); node_remap_size[node] = node_memmap_size_bytes(node, @@ -67,23 +72,216 @@ static void __init smp_dump_qct(void) } } -/* - * Unlike Summit, we don't really care to let the NUMA-Q - * fall back to flat mode. Don't compile for NUMA-Q - * unless you really need it! - */ -int __init get_memcfg_numaq(void) -{ - smp_dump_qct(); - return 1; -} -static int __init numaq_tsc_disable(void) +void __init numaq_tsc_disable(void) { + if (!found_numaq) + return; + if (num_online_nodes() > 1) { printk(KERN_DEBUG "NUMAQ: disabling TSC\n"); setup_clear_cpu_cap(X86_FEATURE_TSC); } +} + +static int __init numaq_pre_time_init(void) +{ + numaq_tsc_disable(); return 0; } -arch_initcall(numaq_tsc_disable); + +int found_numaq; +/* + * Have to match translation table entries to main table entries by counter + * hence the mpc_record variable .... can't see a less disgusting way of + * doing this .... + */ +struct mpc_config_translation { + unsigned char mpc_type; + unsigned char trans_len; + unsigned char trans_type; + unsigned char trans_quad; + unsigned char trans_global; + unsigned char trans_local; + unsigned short trans_reserved; +}; + +/* x86_quirks member */ +static int mpc_record; +static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY] + __cpuinitdata; + +static inline int generate_logical_apicid(int quad, int phys_apicid) +{ + return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1); +} + +/* x86_quirks member */ +static int mpc_apic_id(struct mpc_config_processor *m) +{ + int quad = translation_table[mpc_record]->trans_quad; + int logical_apicid = generate_logical_apicid(quad, m->mpc_apicid); + + printk(KERN_DEBUG "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n", + m->mpc_apicid, + (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, + (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, + m->mpc_apicver, quad, logical_apicid); + return logical_apicid; +} + +int mp_bus_id_to_node[MAX_MP_BUSSES]; + +int mp_bus_id_to_local[MAX_MP_BUSSES]; + +/* x86_quirks member */ +static void mpc_oem_bus_info(struct mpc_config_bus *m, char *name) +{ + int quad = translation_table[mpc_record]->trans_quad; + int local = translation_table[mpc_record]->trans_local; + + mp_bus_id_to_node[m->mpc_busid] = quad; + mp_bus_id_to_local[m->mpc_busid] = local; + printk(KERN_INFO "Bus #%d is %s (node %d)\n", + m->mpc_busid, name, quad); +} + +int quad_local_to_mp_bus_id [NR_CPUS/4][4]; + +/* x86_quirks member */ +static void mpc_oem_pci_bus(struct mpc_config_bus *m) +{ + int quad = translation_table[mpc_record]->trans_quad; + int local = translation_table[mpc_record]->trans_local; + + quad_local_to_mp_bus_id[quad][local] = m->mpc_busid; +} + +static void __init MP_translation_info(struct mpc_config_translation *m) +{ + printk(KERN_INFO + "Translation: record %d, type %d, quad %d, global %d, local %d\n", + mpc_record, m->trans_type, m->trans_quad, m->trans_global, + m->trans_local); + + if (mpc_record >= MAX_MPC_ENTRY) + printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n"); + else + translation_table[mpc_record] = m; /* stash this for later */ + if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad)) + node_set_online(m->trans_quad); +} + +static int __init mpf_checksum(unsigned char *mp, int len) +{ + int sum = 0; + + while (len--) + sum += *mp++; + + return sum & 0xFF; +} + +/* + * Read/parse the MPC oem tables + */ + +static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable, + unsigned short oemsize) +{ + int count = sizeof(*oemtable); /* the header size */ + unsigned char *oemptr = ((unsigned char *)oemtable) + count; + + mpc_record = 0; + printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n", + oemtable); + if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) { + printk(KERN_WARNING + "SMP mpc oemtable: bad signature [%c%c%c%c]!\n", + oemtable->oem_signature[0], oemtable->oem_signature[1], + oemtable->oem_signature[2], oemtable->oem_signature[3]); + return; + } + if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) { + printk(KERN_WARNING "SMP oem mptable: checksum error!\n"); + return; + } + while (count < oemtable->oem_length) { + switch (*oemptr) { + case MP_TRANSLATION: + { + struct mpc_config_translation *m = + (struct mpc_config_translation *)oemptr; + MP_translation_info(m); + oemptr += sizeof(*m); + count += sizeof(*m); + ++mpc_record; + break; + } + default: + { + printk(KERN_WARNING + "Unrecognised OEM table entry type! - %d\n", + (int)*oemptr); + return; + } + } + } +} + +static int __init numaq_setup_ioapic_ids(void) +{ + /* so can skip it */ + return 1; +} + +static struct x86_quirks numaq_x86_quirks __initdata = { + .arch_pre_time_init = numaq_pre_time_init, + .arch_time_init = NULL, + .arch_pre_intr_init = NULL, + .arch_memory_setup = NULL, + .arch_intr_init = NULL, + .arch_trap_init = NULL, + .mach_get_smp_config = NULL, + .mach_find_smp_config = NULL, + .mpc_record = &mpc_record, + .mpc_apic_id = mpc_apic_id, + .mpc_oem_bus_info = mpc_oem_bus_info, + .mpc_oem_pci_bus = mpc_oem_pci_bus, + .smp_read_mpc_oem = smp_read_mpc_oem, + .setup_ioapic_ids = numaq_setup_ioapic_ids, +}; + +void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem, + char *productid) +{ + if (strncmp(oem, "IBM NUMA", 8)) + printk("Warning! Not a NUMA-Q system!\n"); + else + found_numaq = 1; +} + +static __init void early_check_numaq(void) +{ + /* + * Find possible boot-time SMP configuration: + */ + early_find_smp_config(); + /* + * get boot-time SMP configuration: + */ + if (smp_found_config) + early_get_smp_config(); + + if (found_numaq) + x86_quirks = &numaq_x86_quirks; +} + +int __init get_memcfg_numaq(void) +{ + early_check_numaq(); + if (!found_numaq) + return 0; + smp_dump_qct(); + return 1; +} diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 74f0c5ea2a0388af848faa058804cd9df86f4391..5744789a78f45ce852a28ae38e1e968e0b3727cf 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -29,7 +29,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -122,6 +124,7 @@ static void *get_call_destination(u8 type) .pv_irq_ops = pv_irq_ops, .pv_apic_ops = pv_apic_ops, .pv_mmu_ops = pv_mmu_ops, + .pv_lock_ops = pv_lock_ops, }; return *((void **)&tmpl + type); } @@ -139,7 +142,9 @@ unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, /* If the operation is a nop, then nop the callsite */ ret = paravirt_patch_nop(); else if (type == PARAVIRT_PATCH(pv_cpu_ops.iret) || - type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_syscall_ret)) + type == PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit) || + type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret32) || + type == PARAVIRT_PATCH(pv_cpu_ops.usergs_sysret64)) /* If operation requires a jmp, then jmp */ ret = paravirt_patch_jmp(insnbuf, opfunc, addr, len); else @@ -190,7 +195,9 @@ static void native_flush_tlb_single(unsigned long addr) /* These are in entry.S */ extern void native_iret(void); -extern void native_irq_enable_syscall_ret(void); +extern void native_irq_enable_sysexit(void); +extern void native_usergs_sysret32(void); +extern void native_usergs_sysret64(void); static int __init print_banner(void) { @@ -261,6 +268,17 @@ enum paravirt_lazy_mode paravirt_get_lazy_mode(void) return __get_cpu_var(paravirt_lazy_mode); } +void __init paravirt_use_bytelocks(void) +{ +#ifdef CONFIG_SMP + pv_lock_ops.spin_is_locked = __byte_spin_is_locked; + pv_lock_ops.spin_is_contended = __byte_spin_is_contended; + pv_lock_ops.spin_lock = __byte_spin_lock; + pv_lock_ops.spin_trylock = __byte_spin_trylock; + pv_lock_ops.spin_unlock = __byte_spin_unlock; +#endif +} + struct pv_info pv_info = { .name = "bare hardware", .paravirt_enabled = 0, @@ -280,7 +298,7 @@ struct pv_time_ops pv_time_ops = { .get_wallclock = native_get_wallclock, .set_wallclock = native_set_wallclock, .sched_clock = native_sched_clock, - .get_cpu_khz = native_calculate_cpu_khz, + .get_tsc_khz = native_calibrate_tsc, }; struct pv_irq_ops pv_irq_ops = { @@ -291,6 +309,9 @@ struct pv_irq_ops pv_irq_ops = { .irq_enable = native_irq_enable, .safe_halt = native_safe_halt, .halt = native_halt, +#ifdef CONFIG_X86_64 + .adjust_exception_frame = paravirt_nop, +#endif }; struct pv_cpu_ops pv_cpu_ops = { @@ -321,12 +342,23 @@ struct pv_cpu_ops pv_cpu_ops = { .store_idt = native_store_idt, .store_tr = native_store_tr, .load_tls = native_load_tls, +#ifdef CONFIG_X86_64 + .load_gs_index = native_load_gs_index, +#endif .write_ldt_entry = native_write_ldt_entry, .write_gdt_entry = native_write_gdt_entry, .write_idt_entry = native_write_idt_entry, .load_sp0 = native_load_sp0, - .irq_enable_syscall_ret = native_irq_enable_syscall_ret, +#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) + .irq_enable_sysexit = native_irq_enable_sysexit, +#endif +#ifdef CONFIG_X86_64 +#ifdef CONFIG_IA32_EMULATION + .usergs_sysret32 = native_usergs_sysret32, +#endif + .usergs_sysret64 = native_usergs_sysret64, +#endif .iret = native_iret, .swapgs = native_swapgs, @@ -341,9 +373,6 @@ struct pv_cpu_ops pv_cpu_ops = { struct pv_apic_ops pv_apic_ops = { #ifdef CONFIG_X86_LOCAL_APIC - .apic_write = native_apic_write, - .apic_write_atomic = native_apic_write_atomic, - .apic_read = native_apic_read, .setup_boot_clock = setup_boot_APIC_clock, .setup_secondary_clock = setup_secondary_APIC_clock, .startup_ipi_hook = paravirt_nop, @@ -354,6 +383,9 @@ struct pv_mmu_ops pv_mmu_ops = { #ifndef CONFIG_X86_64 .pagetable_setup_start = native_pagetable_setup_start, .pagetable_setup_done = native_pagetable_setup_done, +#else + .pagetable_setup_start = paravirt_nop, + .pagetable_setup_done = paravirt_nop, #endif .read_cr2 = native_read_cr2, @@ -366,6 +398,9 @@ struct pv_mmu_ops pv_mmu_ops = { .flush_tlb_single = native_flush_tlb_single, .flush_tlb_others = native_flush_tlb_others, + .pgd_alloc = __paravirt_pgd_alloc, + .pgd_free = paravirt_nop, + .alloc_pte = paravirt_nop, .alloc_pmd = paravirt_nop, .alloc_pmd_clone = paravirt_nop, @@ -380,6 +415,9 @@ struct pv_mmu_ops pv_mmu_ops = { .pte_update = paravirt_nop, .pte_update_defer = paravirt_nop, + .ptep_modify_prot_start = __ptep_modify_prot_start, + .ptep_modify_prot_commit = __ptep_modify_prot_commit, + #ifdef CONFIG_HIGHPTE .kmap_atomic_pte = kmap_atomic, #endif @@ -403,6 +441,7 @@ struct pv_mmu_ops pv_mmu_ops = { #endif /* PAGETABLE_LEVELS >= 3 */ .pte_val = native_pte_val, + .pte_flags = native_pte_flags, .pgd_val = native_pgd_val, .make_pte = native_make_pte, @@ -416,7 +455,21 @@ struct pv_mmu_ops pv_mmu_ops = { .enter = paravirt_nop, .leave = paravirt_nop, }, + + .set_fixmap = native_set_fixmap, +}; + +struct pv_lock_ops pv_lock_ops = { +#ifdef CONFIG_SMP + .spin_is_locked = __ticket_spin_is_locked, + .spin_is_contended = __ticket_spin_is_contended, + + .spin_lock = __ticket_spin_lock, + .spin_trylock = __ticket_spin_trylock, + .spin_unlock = __ticket_spin_unlock, +#endif }; +EXPORT_SYMBOL_GPL(pv_lock_ops); EXPORT_SYMBOL_GPL(pv_time_ops); EXPORT_SYMBOL (pv_cpu_ops); diff --git a/arch/x86/kernel/paravirt_patch_32.c b/arch/x86/kernel/paravirt_patch_32.c index 82fc5fcab4f4eb7cba501db2e7d6a9a89d027020..58262218781bd3582b1b99f7d42986170e49e23c 100644 --- a/arch/x86/kernel/paravirt_patch_32.c +++ b/arch/x86/kernel/paravirt_patch_32.c @@ -5,7 +5,7 @@ DEF_NATIVE(pv_irq_ops, irq_enable, "sti"); DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf"); DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax"); DEF_NATIVE(pv_cpu_ops, iret, "iret"); -DEF_NATIVE(pv_cpu_ops, irq_enable_syscall_ret, "sti; sysexit"); +DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "sti; sysexit"); DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax"); DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3"); DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax"); @@ -29,7 +29,7 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf, PATCH_SITE(pv_irq_ops, restore_fl); PATCH_SITE(pv_irq_ops, save_fl); PATCH_SITE(pv_cpu_ops, iret); - PATCH_SITE(pv_cpu_ops, irq_enable_syscall_ret); + PATCH_SITE(pv_cpu_ops, irq_enable_sysexit); PATCH_SITE(pv_mmu_ops, read_cr2); PATCH_SITE(pv_mmu_ops, read_cr3); PATCH_SITE(pv_mmu_ops, write_cr3); diff --git a/arch/x86/kernel/paravirt_patch_64.c b/arch/x86/kernel/paravirt_patch_64.c index 7d904e138d7e482cc9bb83e67db1b9718273a576..061d01df9ae6aa0ff09ff17d43eab28e61d21b10 100644 --- a/arch/x86/kernel/paravirt_patch_64.c +++ b/arch/x86/kernel/paravirt_patch_64.c @@ -14,8 +14,9 @@ DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)"); DEF_NATIVE(pv_cpu_ops, clts, "clts"); DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd"); -/* the three commands give us more control to how to return from a syscall */ -DEF_NATIVE(pv_cpu_ops, irq_enable_syscall_ret, "movq %gs:" __stringify(pda_oldrsp) ", %rsp; swapgs; sysretq;"); +DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "swapgs; sti; sysexit"); +DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq"); +DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl"); DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs"); unsigned native_patch(u8 type, u16 clobbers, void *ibuf, @@ -35,7 +36,9 @@ unsigned native_patch(u8 type, u16 clobbers, void *ibuf, PATCH_SITE(pv_irq_ops, irq_enable); PATCH_SITE(pv_irq_ops, irq_disable); PATCH_SITE(pv_cpu_ops, iret); - PATCH_SITE(pv_cpu_ops, irq_enable_syscall_ret); + PATCH_SITE(pv_cpu_ops, irq_enable_sysexit); + PATCH_SITE(pv_cpu_ops, usergs_sysret32); + PATCH_SITE(pv_cpu_ops, usergs_sysret64); PATCH_SITE(pv_cpu_ops, swapgs); PATCH_SITE(pv_mmu_ops, read_cr2); PATCH_SITE(pv_mmu_ops, read_cr3); diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c index e28ec497e142f49cc4847f833ff5a5f8f96833f6..b67a4b1d4eaefd1399ae3996932b061a12357fc7 100644 --- a/arch/x86/kernel/pci-calgary_64.c +++ b/arch/x86/kernel/pci-calgary_64.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -36,7 +37,8 @@ #include #include #include -#include + +#include #include #include #include @@ -167,6 +169,8 @@ static void calgary_dump_error_regs(struct iommu_table *tbl); static void calioc2_handle_quirks(struct iommu_table *tbl, struct pci_dev *dev); static void calioc2_tce_cache_blast(struct iommu_table *tbl); static void calioc2_dump_error_regs(struct iommu_table *tbl); +static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl); +static void get_tce_space_from_tar(void); static struct cal_chipset_ops calgary_chip_ops = { .handle_quirks = calgary_handle_quirks, @@ -410,22 +414,6 @@ static void calgary_unmap_sg(struct device *dev, } } -static int calgary_nontranslate_map_sg(struct device* dev, - struct scatterlist *sg, int nelems, int direction) -{ - struct scatterlist *s; - int i; - - for_each_sg(sg, s, nelems, i) { - struct page *p = sg_page(s); - - BUG_ON(!p); - s->dma_address = virt_to_bus(sg_virt(s)); - s->dma_length = s->length; - } - return nelems; -} - static int calgary_map_sg(struct device *dev, struct scatterlist *sg, int nelems, int direction) { @@ -436,9 +424,6 @@ static int calgary_map_sg(struct device *dev, struct scatterlist *sg, unsigned long entry; int i; - if (!translation_enabled(tbl)) - return calgary_nontranslate_map_sg(dev, sg, nelems, direction); - for_each_sg(sg, s, nelems, i) { BUG_ON(!sg_page(s)); @@ -474,7 +459,6 @@ error: static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr, size_t size, int direction) { - dma_addr_t dma_handle = bad_dma_address; void *vaddr = phys_to_virt(paddr); unsigned long uaddr; unsigned int npages; @@ -483,12 +467,7 @@ static dma_addr_t calgary_map_single(struct device *dev, phys_addr_t paddr, uaddr = (unsigned long)vaddr; npages = num_dma_pages(uaddr, size); - if (translation_enabled(tbl)) - dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction); - else - dma_handle = virt_to_bus(vaddr); - - return dma_handle; + return iommu_alloc(dev, tbl, vaddr, npages, direction); } static void calgary_unmap_single(struct device *dev, dma_addr_t dma_handle, @@ -497,9 +476,6 @@ static void calgary_unmap_single(struct device *dev, dma_addr_t dma_handle, struct iommu_table *tbl = find_iommu_table(dev); unsigned int npages; - if (!translation_enabled(tbl)) - return; - npages = num_dma_pages(dma_handle, size); iommu_free(tbl, dma_handle, npages); } @@ -522,18 +498,12 @@ static void* calgary_alloc_coherent(struct device *dev, size_t size, goto error; memset(ret, 0, size); - if (translation_enabled(tbl)) { - /* set up tces to cover the allocated range */ - mapping = iommu_alloc(dev, tbl, ret, npages, DMA_BIDIRECTIONAL); - if (mapping == bad_dma_address) - goto free; - - *dma_handle = mapping; - } else /* non translated slot */ - *dma_handle = virt_to_bus(ret); - + /* set up tces to cover the allocated range */ + mapping = iommu_alloc(dev, tbl, ret, npages, DMA_BIDIRECTIONAL); + if (mapping == bad_dma_address) + goto free; + *dma_handle = mapping; return ret; - free: free_pages((unsigned long)ret, get_order(size)); ret = NULL; @@ -541,7 +511,7 @@ error: return ret; } -static const struct dma_mapping_ops calgary_dma_ops = { +static struct dma_mapping_ops calgary_dma_ops = { .alloc_coherent = calgary_alloc_coherent, .map_single = calgary_map_single, .unmap_single = calgary_unmap_single, @@ -830,7 +800,11 @@ static int __init calgary_setup_tar(struct pci_dev *dev, void __iomem *bbar) tbl = pci_iommu(dev->bus); tbl->it_base = (unsigned long)bus_info[dev->bus->number].tce_space; - tce_free(tbl, 0, tbl->it_size); + + if (is_kdump_kernel()) + calgary_init_bitmap_from_tce_table(tbl); + else + tce_free(tbl, 0, tbl->it_size); if (is_calgary(dev->device)) tbl->chip_ops = &calgary_chip_ops; @@ -1209,6 +1183,10 @@ static int __init calgary_init(void) if (ret) return ret; + /* Purely for kdump kernel case */ + if (is_kdump_kernel()) + get_tce_space_from_tar(); + do { dev = pci_get_device(PCI_VENDOR_ID_IBM, PCI_ANY_ID, dev); if (!dev) @@ -1230,6 +1208,16 @@ static int __init calgary_init(void) goto error; } while (1); + dev = NULL; + for_each_pci_dev(dev) { + struct iommu_table *tbl; + + tbl = find_iommu_table(&dev->dev); + + if (translation_enabled(tbl)) + dev->dev.archdata.dma_ops = &calgary_dma_ops; + } + return ret; error: @@ -1251,6 +1239,7 @@ error: calgary_disable_translation(dev); calgary_free_bus(dev); pci_dev_put(dev); /* Undo calgary_init_one()'s pci_dev_get() */ + dev->dev.archdata.dma_ops = NULL; } while (1); return ret; @@ -1339,6 +1328,61 @@ static int __init calgary_bus_has_devices(int bus, unsigned short pci_dev) return (val != 0xffffffff); } +/* + * calgary_init_bitmap_from_tce_table(): + * Funtion for kdump case. In the second/kdump kernel initialize + * the bitmap based on the tce table entries obtained from first kernel + */ +static void calgary_init_bitmap_from_tce_table(struct iommu_table *tbl) +{ + u64 *tp; + unsigned int index; + tp = ((u64 *)tbl->it_base); + for (index = 0 ; index < tbl->it_size; index++) { + if (*tp != 0x0) + set_bit(index, tbl->it_map); + tp++; + } +} + +/* + * get_tce_space_from_tar(): + * Function for kdump case. Get the tce tables from first kernel + * by reading the contents of the base adress register of calgary iommu + */ +static void get_tce_space_from_tar() +{ + int bus; + void __iomem *target; + unsigned long tce_space; + + for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) { + struct calgary_bus_info *info = &bus_info[bus]; + unsigned short pci_device; + u32 val; + + val = read_pci_config(bus, 0, 0, 0); + pci_device = (val & 0xFFFF0000) >> 16; + + if (!is_cal_pci_dev(pci_device)) + continue; + if (info->translation_disabled) + continue; + + if (calgary_bus_has_devices(bus, pci_device) || + translate_empty_slots) { + target = calgary_reg(bus_info[bus].bbar, + tar_offset(bus)); + tce_space = be64_to_cpu(readq(target)); + tce_space = tce_space & TAR_SW_BITS; + + tce_space = tce_space & (~specified_table_size); + info->tce_space = (u64 *)__va(tce_space); + } + } + return; +} + void __init detect_calgary(void) { int bus; @@ -1394,7 +1438,8 @@ void __init detect_calgary(void) return; } - specified_table_size = determine_tce_table_size(end_pfn * PAGE_SIZE); + specified_table_size = determine_tce_table_size((is_kdump_kernel() ? + saved_max_pfn : max_pfn) * PAGE_SIZE); for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) { struct calgary_bus_info *info = &bus_info[bus]; @@ -1412,10 +1457,16 @@ void __init detect_calgary(void) if (calgary_bus_has_devices(bus, pci_device) || translate_empty_slots) { - tbl = alloc_tce_table(); - if (!tbl) - goto cleanup; - info->tce_space = tbl; + /* + * If it is kdump kernel, find and use tce tables + * from first kernel, else allocate tce tables here + */ + if (!is_kdump_kernel()) { + tbl = alloc_tce_table(); + if (!tbl) + goto cleanup; + info->tce_space = tbl; + } calgary_found = 1; } } @@ -1430,6 +1481,10 @@ void __init detect_calgary(void) printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d, " "CONFIG_IOMMU_DEBUG is %s.\n", specified_table_size, debugging ? "enabled" : "disabled"); + + /* swiotlb for devices that aren't behind the Calgary. */ + if (max_pfn > MAX_DMA32_PFN) + swiotlb = 1; } return; @@ -1446,7 +1501,7 @@ int __init calgary_iommu_init(void) { int ret; - if (no_iommu || swiotlb) + if (no_iommu || (swiotlb && !calgary_detected)) return -ENODEV; if (!calgary_detected) @@ -1459,15 +1514,14 @@ int __init calgary_iommu_init(void) if (ret) { printk(KERN_ERR "PCI-DMA: Calgary init failed %d, " "falling back to no_iommu\n", ret); - if (end_pfn > MAX_DMA32_PFN) - printk(KERN_ERR "WARNING more than 4GB of memory, " - "32bit PCI may malfunction.\n"); return ret; } force_iommu = 1; bad_dma_address = 0x0; - dma_ops = &calgary_dma_ops; + /* dma_ops is set to swiotlb or nommu */ + if (!dma_ops) + dma_ops = &nommu_dma_ops; return 0; } diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index dc00a1331acef73c204ed0979d8527450af5246f..8dbffb846de9b66c5a1aec5cc542dc959acfa924 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c @@ -5,13 +5,13 @@ #include #include -#include +#include #include +#include -int forbid_dac __read_mostly; -EXPORT_SYMBOL(forbid_dac); +static int forbid_dac __read_mostly; -const struct dma_mapping_ops *dma_ops; +struct dma_mapping_ops *dma_ops; EXPORT_SYMBOL(dma_ops); static int iommu_sac_force __read_mostly; @@ -74,13 +74,17 @@ early_param("dma32_size", parse_dma32_size_opt); void __init dma32_reserve_bootmem(void) { unsigned long size, align; - if (end_pfn <= MAX_DMA32_PFN) + if (max_pfn <= MAX_DMA32_PFN) return; + /* + * check aperture_64.c allocate_aperture() for reason about + * using 512M as goal + */ align = 64ULL<<20; size = round_up(dma32_bootmem_size, align); dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align, - __pa(MAX_DMA_ADDRESS)); + 512ULL<<20); if (dma32_bootmem_ptr) dma32_bootmem_size = size; else @@ -88,17 +92,14 @@ void __init dma32_reserve_bootmem(void) } static void __init dma32_free_bootmem(void) { - int node; - if (end_pfn <= MAX_DMA32_PFN) + if (max_pfn <= MAX_DMA32_PFN) return; if (!dma32_bootmem_ptr) return; - for_each_online_node(node) - free_bootmem_node(NODE_DATA(node), __pa(dma32_bootmem_ptr), - dma32_bootmem_size); + free_bootmem(__pa(dma32_bootmem_ptr), dma32_bootmem_size); dma32_bootmem_ptr = NULL; dma32_bootmem_size = 0; @@ -112,19 +113,15 @@ void __init pci_iommu_alloc(void) * The order of these functions is important for * fall-back/fail-over reasons */ -#ifdef CONFIG_GART_IOMMU gart_iommu_hole_init(); -#endif -#ifdef CONFIG_CALGARY_IOMMU detect_calgary(); -#endif detect_intel_iommu(); -#ifdef CONFIG_SWIOTLB + amd_iommu_detect(); + pci_swiotlb_init(); -#endif } #endif @@ -180,9 +177,7 @@ static __init int iommu_setup(char *p) swiotlb = 1; #endif -#ifdef CONFIG_GART_IOMMU gart_parse_options(p); -#endif #ifdef CONFIG_CALGARY_IOMMU if (!strncmp(p, "calgary", 7)) @@ -197,136 +192,19 @@ static __init int iommu_setup(char *p) } early_param("iommu", iommu_setup); -#ifdef CONFIG_X86_32 -int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, - dma_addr_t device_addr, size_t size, int flags) -{ - void __iomem *mem_base = NULL; - int pages = size >> PAGE_SHIFT; - int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long); - - if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0) - goto out; - if (!size) - goto out; - if (dev->dma_mem) - goto out; - - /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */ - - mem_base = ioremap(bus_addr, size); - if (!mem_base) - goto out; - - dev->dma_mem = kzalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL); - if (!dev->dma_mem) - goto out; - dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL); - if (!dev->dma_mem->bitmap) - goto free1_out; - - dev->dma_mem->virt_base = mem_base; - dev->dma_mem->device_base = device_addr; - dev->dma_mem->size = pages; - dev->dma_mem->flags = flags; - - if (flags & DMA_MEMORY_MAP) - return DMA_MEMORY_MAP; - - return DMA_MEMORY_IO; - - free1_out: - kfree(dev->dma_mem); - out: - if (mem_base) - iounmap(mem_base); - return 0; -} -EXPORT_SYMBOL(dma_declare_coherent_memory); - -void dma_release_declared_memory(struct device *dev) -{ - struct dma_coherent_mem *mem = dev->dma_mem; - - if (!mem) - return; - dev->dma_mem = NULL; - iounmap(mem->virt_base); - kfree(mem->bitmap); - kfree(mem); -} -EXPORT_SYMBOL(dma_release_declared_memory); - -void *dma_mark_declared_memory_occupied(struct device *dev, - dma_addr_t device_addr, size_t size) -{ - struct dma_coherent_mem *mem = dev->dma_mem; - int pos, err; - int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1); - - pages >>= PAGE_SHIFT; - - if (!mem) - return ERR_PTR(-EINVAL); - - pos = (device_addr - mem->device_base) >> PAGE_SHIFT; - err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages)); - if (err != 0) - return ERR_PTR(err); - return mem->virt_base + (pos << PAGE_SHIFT); -} -EXPORT_SYMBOL(dma_mark_declared_memory_occupied); - -static int dma_alloc_from_coherent_mem(struct device *dev, ssize_t size, - dma_addr_t *dma_handle, void **ret) -{ - struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; - int order = get_order(size); - - if (mem) { - int page = bitmap_find_free_region(mem->bitmap, mem->size, - order); - if (page >= 0) { - *dma_handle = mem->device_base + (page << PAGE_SHIFT); - *ret = mem->virt_base + (page << PAGE_SHIFT); - memset(*ret, 0, size); - } - if (mem->flags & DMA_MEMORY_EXCLUSIVE) - *ret = NULL; - } - return (mem != NULL); -} - -static int dma_release_coherent(struct device *dev, int order, void *vaddr) -{ - struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL; - - if (mem && vaddr >= mem->virt_base && vaddr < - (mem->virt_base + (mem->size << PAGE_SHIFT))) { - int page = (vaddr - mem->virt_base) >> PAGE_SHIFT; - - bitmap_release_region(mem->bitmap, page, order); - return 1; - } - return 0; -} -#else -#define dma_alloc_from_coherent_mem(dev, size, handle, ret) (0) -#define dma_release_coherent(dev, order, vaddr) (0) -#endif /* CONFIG_X86_32 */ - int dma_supported(struct device *dev, u64 mask) { + struct dma_mapping_ops *ops = get_dma_ops(dev); + #ifdef CONFIG_PCI if (mask > 0xffffffff && forbid_dac > 0) { - printk(KERN_INFO "PCI: Disallowing DAC for device %s\n", - dev->bus_id); + dev_info(dev, "PCI: Disallowing DAC for device\n"); return 0; } #endif - if (dma_ops->dma_supported) - return dma_ops->dma_supported(dev, mask); + if (ops->dma_supported) + return ops->dma_supported(dev, mask); /* Copied from i386. Doesn't make much sense, because it will only work for pci_alloc_coherent. @@ -347,8 +225,7 @@ int dma_supported(struct device *dev, u64 mask) type. Normally this doesn't make any difference, but gives more gentle handling of IOMMU overflow. */ if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) { - printk(KERN_INFO "%s: Force SAC with mask %Lx\n", - dev->bus_id, mask); + dev_info(dev, "Force SAC with mask %Lx\n", mask); return 0; } @@ -357,7 +234,7 @@ int dma_supported(struct device *dev, u64 mask) EXPORT_SYMBOL(dma_supported); /* Allocate DMA memory on node near device */ -noinline struct page * +static noinline struct page * dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order) { int node; @@ -374,6 +251,7 @@ void * dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) { + struct dma_mapping_ops *ops = get_dma_ops(dev); void *memory = NULL; struct page *page; unsigned long dma_mask = 0; @@ -383,7 +261,7 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, /* ignore region specifiers */ gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); - if (dma_alloc_from_coherent_mem(dev, size, dma_handle, &memory)) + if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) return memory; if (!dev) { @@ -442,8 +320,8 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, /* Let low level make its own zone decisions */ gfp &= ~(GFP_DMA32|GFP_DMA); - if (dma_ops->alloc_coherent) - return dma_ops->alloc_coherent(dev, size, + if (ops->alloc_coherent) + return ops->alloc_coherent(dev, size, dma_handle, gfp); return NULL; } @@ -455,14 +333,14 @@ dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, } } - if (dma_ops->alloc_coherent) { + if (ops->alloc_coherent) { free_pages((unsigned long)memory, get_order(size)); gfp &= ~(GFP_DMA|GFP_DMA32); - return dma_ops->alloc_coherent(dev, size, dma_handle, gfp); + return ops->alloc_coherent(dev, size, dma_handle, gfp); } - if (dma_ops->map_simple) { - *dma_handle = dma_ops->map_simple(dev, virt_to_phys(memory), + if (ops->map_simple) { + *dma_handle = ops->map_simple(dev, virt_to_phys(memory), size, PCI_DMA_BIDIRECTIONAL); if (*dma_handle != bad_dma_address) @@ -484,27 +362,27 @@ EXPORT_SYMBOL(dma_alloc_coherent); void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t bus) { + struct dma_mapping_ops *ops = get_dma_ops(dev); + int order = get_order(size); WARN_ON(irqs_disabled()); /* for portability */ - if (dma_release_coherent(dev, order, vaddr)) + if (dma_release_from_coherent(dev, order, vaddr)) return; - if (dma_ops->unmap_single) - dma_ops->unmap_single(dev, bus, size, 0); + if (ops->unmap_single) + ops->unmap_single(dev, bus, size, 0); free_pages((unsigned long)vaddr, order); } EXPORT_SYMBOL(dma_free_coherent); static int __init pci_iommu_init(void) { -#ifdef CONFIG_CALGARY_IOMMU calgary_iommu_init(); -#endif intel_iommu_init(); -#ifdef CONFIG_GART_IOMMU + amd_iommu_init(); + gart_iommu_init(); -#endif no_iommu_init(); return 0; diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c index aa8ec928caa85ff43d4da3a0fe3e7d570b57f08a..49285f8fd4d54005d5efb9a9fad6bc498420e6d6 100644 --- a/arch/x86/kernel/pci-gart_64.c +++ b/arch/x86/kernel/pci-gart_64.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -66,9 +67,6 @@ static u32 gart_unmapped_entry; (((x) & 0xfffff000) | (((x) >> 32) << 4) | GPTE_VALID | GPTE_COHERENT) #define GPTE_DECODE(x) (((x) & 0xfffff000) | (((u64)(x) & 0xff0) << 28)) -#define to_pages(addr, size) \ - (round_up(((addr) & ~PAGE_MASK) + (size), PAGE_SIZE) >> PAGE_SHIFT) - #define EMERGENCY_PAGES 32 /* = 128KB */ #ifdef CONFIG_AGP @@ -104,7 +102,6 @@ static unsigned long alloc_iommu(struct device *dev, int size) size, base_index, boundary_size, 0); } if (offset != -1) { - set_bit_string(iommu_gart_bitmap, offset, size); next_bit = offset+size; if (next_bit >= iommu_pages) { next_bit = 0; @@ -198,9 +195,7 @@ static void iommu_full(struct device *dev, size_t size, int dir) * out. Hopefully no network devices use single mappings that big. */ - printk(KERN_ERR - "PCI-DMA: Out of IOMMU space for %lu bytes at device %s\n", - size, dev->bus_id); + dev_err(dev, "PCI-DMA: Out of IOMMU space for %lu bytes\n", size); if (size > PAGE_SIZE*EMERGENCY_PAGES) { if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL) @@ -243,7 +238,7 @@ nonforced_iommu(struct device *dev, unsigned long addr, size_t size) static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem, size_t size, int dir) { - unsigned long npages = to_pages(phys_mem, size); + unsigned long npages = iommu_num_pages(phys_mem, size); unsigned long iommu_page = alloc_iommu(dev, npages); int i; @@ -306,7 +301,7 @@ static void gart_unmap_single(struct device *dev, dma_addr_t dma_addr, return; iommu_page = (dma_addr - iommu_bus_base)>>PAGE_SHIFT; - npages = to_pages(dma_addr, size); + npages = iommu_num_pages(dma_addr, size); for (i = 0; i < npages; i++) { iommu_gatt_base[iommu_page + i] = gart_unmapped_entry; CLEAR_LEAK(iommu_page + i); @@ -389,7 +384,7 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start, } addr = phys_addr; - pages = to_pages(s->offset, s->length); + pages = iommu_num_pages(s->offset, s->length); while (pages--) { iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr); SET_LEAK(iommu_page); @@ -472,7 +467,7 @@ gart_map_sg(struct device *dev, struct scatterlist *sg, int nents, int dir) seg_size += s->length; need = nextneed; - pages += to_pages(s->offset, s->length); + pages += iommu_num_pages(s->offset, s->length); ps = s; } if (dma_map_cont(dev, start_sg, i - start, sgmap, pages, need) < 0) @@ -534,8 +529,8 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size) unsigned aper_size = 0, aper_base_32, aper_order; u64 aper_base; - pci_read_config_dword(dev, 0x94, &aper_base_32); - pci_read_config_dword(dev, 0x90, &aper_order); + pci_read_config_dword(dev, AMD64_GARTAPERTUREBASE, &aper_base_32); + pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &aper_order); aper_order = (aper_order >> 1) & 7; aper_base = aper_base_32 & 0x7fff; @@ -549,14 +544,63 @@ static __init unsigned read_aperture(struct pci_dev *dev, u32 *size) return aper_base; } +static void enable_gart_translations(void) +{ + int i; + + for (i = 0; i < num_k8_northbridges; i++) { + struct pci_dev *dev = k8_northbridges[i]; + + enable_gart_translation(dev, __pa(agp_gatt_table)); + } +} + +/* + * If fix_up_north_bridges is set, the north bridges have to be fixed up on + * resume in the same way as they are handled in gart_iommu_hole_init(). + */ +static bool fix_up_north_bridges; +static u32 aperture_order; +static u32 aperture_alloc; + +void set_up_gart_resume(u32 aper_order, u32 aper_alloc) +{ + fix_up_north_bridges = true; + aperture_order = aper_order; + aperture_alloc = aper_alloc; +} + static int gart_resume(struct sys_device *dev) { + printk(KERN_INFO "PCI-DMA: Resuming GART IOMMU\n"); + + if (fix_up_north_bridges) { + int i; + + printk(KERN_INFO "PCI-DMA: Restoring GART aperture settings\n"); + + for (i = 0; i < num_k8_northbridges; i++) { + struct pci_dev *dev = k8_northbridges[i]; + + /* + * Don't enable translations just yet. That is the next + * step. Restore the pre-suspend aperture settings. + */ + pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, + aperture_order << 1); + pci_write_config_dword(dev, AMD64_GARTAPERTUREBASE, + aperture_alloc >> 25); + } + } + + enable_gart_translations(); + return 0; } static int gart_suspend(struct sys_device *dev, pm_message_t state) { - return -EINVAL; + return 0; } static struct sysdev_class gart_sysdev_class = { @@ -582,6 +626,7 @@ static __init int init_k8_gatt(struct agp_kern_info *info) struct pci_dev *dev; void *gatt; int i, error; + unsigned long start_pfn, end_pfn; printk(KERN_INFO "PCI-DMA: Disabling AGP.\n"); aper_size = aper_base = info->aper_size = 0; @@ -614,31 +659,25 @@ static __init int init_k8_gatt(struct agp_kern_info *info) memset(gatt, 0, gatt_size); agp_gatt_table = gatt; - for (i = 0; i < num_k8_northbridges; i++) { - u32 gatt_reg; - u32 ctl; - - dev = k8_northbridges[i]; - gatt_reg = __pa(gatt) >> 12; - gatt_reg <<= 4; - pci_write_config_dword(dev, 0x98, gatt_reg); - pci_read_config_dword(dev, 0x90, &ctl); - - ctl |= 1; - ctl &= ~((1<<4) | (1<<5)); - - pci_write_config_dword(dev, 0x90, ctl); - } + enable_gart_translations(); error = sysdev_class_register(&gart_sysdev_class); if (!error) error = sysdev_register(&device_gart); if (error) panic("Could not register gart_sysdev -- would corrupt data on next suspend"); + flush_gart(); printk(KERN_INFO "PCI-DMA: aperture base @ %x size %u KB\n", aper_base, aper_size>>10); + + /* need to map that range */ + end_pfn = (aper_base>>PAGE_SHIFT) + (aper_size>>PAGE_SHIFT); + if (end_pfn > max_low_pfn_mapped) { + start_pfn = (aper_base>>PAGE_SHIFT); + init_memory_mapping(start_pfn< MAX_DMA32_PFN) { + if (max_pfn > MAX_DMA32_PFN) { printk(KERN_WARNING "More than 4GB of memory " "but GART IOMMU not available.\n" KERN_WARNING "falling back to iommu=soft.\n"); @@ -788,10 +826,10 @@ void __init gart_iommu_init(void) wbinvd(); /* - * Try to workaround a bug (thanks to BenH) + * Try to workaround a bug (thanks to BenH): * Set unmapped entries to a scratch page instead of 0. * Any prefetches that hit unmapped entries won't get an bus abort - * then. + * then. (P2P bridge may be prefetching on DMA reads). */ scratch = get_zeroed_page(GFP_KERNEL); if (!scratch) diff --git a/arch/x86/kernel/pci-nommu.c b/arch/x86/kernel/pci-nommu.c index aec43d56f49c57cedffaefad7205fbbfe9b984c2..3f91f71cdc3eac766be0891511afd738001c6918 100644 --- a/arch/x86/kernel/pci-nommu.c +++ b/arch/x86/kernel/pci-nommu.c @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include @@ -72,21 +72,9 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg, return nents; } -/* Make sure we keep the same behaviour */ -static int nommu_mapping_error(dma_addr_t dma_addr) -{ -#ifdef CONFIG_X86_32 - return 0; -#else - return (dma_addr == bad_dma_address); -#endif -} - - -const struct dma_mapping_ops nommu_dma_ops = { +struct dma_mapping_ops nommu_dma_ops = { .map_single = nommu_map_single, .map_sg = nommu_map_sg, - .mapping_error = nommu_mapping_error, .is_phys = 1, }; diff --git a/arch/x86/kernel/pci-swiotlb_64.c b/arch/x86/kernel/pci-swiotlb_64.c index 490da7f4b8d0dd8e29abf7ddd2e11b01fe19f196..c4ce0332759ee08413e78e6623b5a023f6404fc7 100644 --- a/arch/x86/kernel/pci-swiotlb_64.c +++ b/arch/x86/kernel/pci-swiotlb_64.c @@ -5,7 +5,7 @@ #include #include -#include +#include #include #include @@ -18,7 +18,7 @@ swiotlb_map_single_phys(struct device *hwdev, phys_addr_t paddr, size_t size, return swiotlb_map_single(hwdev, phys_to_virt(paddr), size, direction); } -const struct dma_mapping_ops swiotlb_dma_ops = { +struct dma_mapping_ops swiotlb_dma_ops = { .mapping_error = swiotlb_dma_mapping_error, .alloc_coherent = swiotlb_alloc_coherent, .free_coherent = swiotlb_free_coherent, @@ -38,7 +38,7 @@ const struct dma_mapping_ops swiotlb_dma_ops = { void __init pci_swiotlb_init(void) { /* don't initialize swiotlb if iommu=off (no_iommu=1) */ - if (!iommu_detected && !no_iommu && end_pfn > MAX_DMA32_PFN) + if (!iommu_detected && !no_iommu && max_pfn > MAX_DMA32_PFN) swiotlb = 1; if (swiotlb_force) swiotlb = 1; diff --git a/arch/x86/kernel/probe_roms_32.c b/arch/x86/kernel/probe_roms_32.c new file mode 100644 index 0000000000000000000000000000000000000000..675a48c404a5abde75e35a655ea8ed56b938bc89 --- /dev/null +++ b/arch/x86/kernel/probe_roms_32.c @@ -0,0 +1,166 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include +#include +#include +#include + +static struct resource system_rom_resource = { + .name = "System ROM", + .start = 0xf0000, + .end = 0xfffff, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}; + +static struct resource extension_rom_resource = { + .name = "Extension ROM", + .start = 0xe0000, + .end = 0xeffff, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}; + +static struct resource adapter_rom_resources[] = { { + .name = "Adapter ROM", + .start = 0xc8000, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}, { + .name = "Adapter ROM", + .start = 0, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}, { + .name = "Adapter ROM", + .start = 0, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}, { + .name = "Adapter ROM", + .start = 0, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}, { + .name = "Adapter ROM", + .start = 0, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}, { + .name = "Adapter ROM", + .start = 0, + .end = 0, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +} }; + +static struct resource video_rom_resource = { + .name = "Video ROM", + .start = 0xc0000, + .end = 0xc7fff, + .flags = IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM +}; + +#define ROMSIGNATURE 0xaa55 + +static int __init romsignature(const unsigned char *rom) +{ + const unsigned short * const ptr = (const unsigned short *)rom; + unsigned short sig; + + return probe_kernel_address(ptr, sig) == 0 && sig == ROMSIGNATURE; +} + +static int __init romchecksum(const unsigned char *rom, unsigned long length) +{ + unsigned char sum, c; + + for (sum = 0; length && probe_kernel_address(rom++, c) == 0; length--) + sum += c; + return !length && !sum; +} + +void __init probe_roms(void) +{ + const unsigned char *rom; + unsigned long start, length, upper; + unsigned char c; + int i; + + /* video rom */ + upper = adapter_rom_resources[0].start; + for (start = video_rom_resource.start; start < upper; start += 2048) { + rom = isa_bus_to_virt(start); + if (!romsignature(rom)) + continue; + + video_rom_resource.start = start; + + if (probe_kernel_address(rom + 2, c) != 0) + continue; + + /* 0 < length <= 0x7f * 512, historically */ + length = c * 512; + + /* if checksum okay, trust length byte */ + if (length && romchecksum(rom, length)) + video_rom_resource.end = start + length - 1; + + request_resource(&iomem_resource, &video_rom_resource); + break; + } + + start = (video_rom_resource.end + 1 + 2047) & ~2047UL; + if (start < upper) + start = upper; + + /* system rom */ + request_resource(&iomem_resource, &system_rom_resource); + upper = system_rom_resource.start; + + /* check for extension rom (ignore length byte!) */ + rom = isa_bus_to_virt(extension_rom_resource.start); + if (romsignature(rom)) { + length = extension_rom_resource.end - extension_rom_resource.start + 1; + if (romchecksum(rom, length)) { + request_resource(&iomem_resource, &extension_rom_resource); + upper = extension_rom_resource.start; + } + } + + /* check for adapter roms on 2k boundaries */ + for (i = 0; i < ARRAY_SIZE(adapter_rom_resources) && start < upper; start += 2048) { + rom = isa_bus_to_virt(start); + if (!romsignature(rom)) + continue; + + if (probe_kernel_address(rom + 2, c) != 0) + continue; + + /* 0 < length <= 0x7f * 512, historically */ + length = c * 512; + + /* but accept any length that fits if checksum okay */ + if (!length || start + length > upper || !romchecksum(rom, length)) + continue; + + adapter_rom_resources[i].start = start; + adapter_rom_resources[i].end = start + length - 1; + request_resource(&iomem_resource, &adapter_rom_resources[i]); + + start = adapter_rom_resources[i++].end & ~2047UL; + } +} + diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index ba370dc8685bf8f9bf31e9100f78c4e800ea755e..7fc4d5b0a6a0f99a4d1d9c4df685a5a4d3a135bb 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c @@ -6,8 +6,16 @@ #include #include #include +#include +#include + +unsigned long idle_halt; +EXPORT_SYMBOL(idle_halt); +unsigned long idle_nomwait; +EXPORT_SYMBOL(idle_nomwait); struct kmem_cache *task_xstate_cachep; +static int force_mwait __cpuinitdata; int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) { @@ -45,6 +53,76 @@ void arch_task_cache_init(void) SLAB_PANIC, NULL); } +/* + * Idle related variables and functions + */ +unsigned long boot_option_idle_override = 0; +EXPORT_SYMBOL(boot_option_idle_override); + +/* + * Powermanagement idle function, if any.. + */ +void (*pm_idle)(void); +EXPORT_SYMBOL(pm_idle); + +#ifdef CONFIG_X86_32 +/* + * This halt magic was a workaround for ancient floppy DMA + * wreckage. It should be safe to remove. + */ +static int hlt_counter; +void disable_hlt(void) +{ + hlt_counter++; +} +EXPORT_SYMBOL(disable_hlt); + +void enable_hlt(void) +{ + hlt_counter--; +} +EXPORT_SYMBOL(enable_hlt); + +static inline int hlt_use_halt(void) +{ + return (!hlt_counter && boot_cpu_data.hlt_works_ok); +} +#else +static inline int hlt_use_halt(void) +{ + return 1; +} +#endif + +/* + * We use this if we don't have any better + * idle routine.. + */ +void default_idle(void) +{ + if (hlt_use_halt()) { + current_thread_info()->status &= ~TS_POLLING; + /* + * TS_POLLING-cleared state must be visible before we + * test NEED_RESCHED: + */ + smp_mb(); + + if (!need_resched()) + safe_halt(); /* enables interrupts racelessly */ + else + local_irq_enable(); + current_thread_info()->status |= TS_POLLING; + } else { + local_irq_enable(); + /* loop is done by the caller */ + cpu_relax(); + } +} +#ifdef CONFIG_APM_MODULE +EXPORT_SYMBOL(default_idle); +#endif + static void do_nothing(void *unused) { } @@ -61,7 +139,7 @@ void cpu_idle_wait(void) { smp_mb(); /* kick all the CPUs so that they exit out of pm_idle */ - smp_call_function(do_nothing, NULL, 0, 1); + smp_call_function(do_nothing, NULL, 1); } EXPORT_SYMBOL_GPL(cpu_idle_wait); @@ -122,54 +200,163 @@ static void poll_idle(void) * * idle=mwait overrides this decision and forces the usage of mwait. */ +static int __cpuinitdata force_mwait; + +#define MWAIT_INFO 0x05 +#define MWAIT_ECX_EXTENDED_INFO 0x01 +#define MWAIT_EDX_C1 0xf0 + static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) { + u32 eax, ebx, ecx, edx; + if (force_mwait) return 1; - if (c->x86_vendor == X86_VENDOR_AMD) { - switch(c->x86) { - case 0x10: - case 0x11: - return 0; - } - } + if (c->cpuid_level < MWAIT_INFO) + return 0; + + cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx); + /* Check, whether EDX has extended info about MWAIT */ + if (!(ecx & MWAIT_ECX_EXTENDED_INFO)) + return 1; + + /* + * edx enumeratios MONITOR/MWAIT extensions. Check, whether + * C1 supports MWAIT + */ + return (edx & MWAIT_EDX_C1); +} + +/* + * Check for AMD CPUs, which have potentially C1E support + */ +static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) +{ + if (c->x86_vendor != X86_VENDOR_AMD) + return 0; + + if (c->x86 < 0x0F) + return 0; + + /* Family 0x0f models < rev F do not have C1E */ + if (c->x86 == 0x0f && c->x86_model < 0x40) + return 0; + return 1; } -void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) +/* + * C1E aware idle routine. We check for C1E active in the interrupt + * pending message MSR. If we detect C1E, then we handle it the same + * way as C3 power states (local apic timer and TSC stop) + */ +static void c1e_idle(void) { - static int selected; + static cpumask_t c1e_mask = CPU_MASK_NONE; + static int c1e_detected; - if (selected) + if (need_resched()) return; + + if (!c1e_detected) { + u32 lo, hi; + + rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi); + if (lo & K8_INTP_C1E_ACTIVE_MASK) { + c1e_detected = 1; + mark_tsc_unstable("TSC halt in C1E"); + printk(KERN_INFO "System has C1E enabled\n"); + } + } + + if (c1e_detected) { + int cpu = smp_processor_id(); + + if (!cpu_isset(cpu, c1e_mask)) { + cpu_set(cpu, c1e_mask); + /* + * Force broadcast so ACPI can not interfere. Needs + * to run with interrupts enabled as it uses + * smp_function_call. + */ + local_irq_enable(); + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE, + &cpu); + printk(KERN_INFO "Switch to broadcast mode on CPU%d\n", + cpu); + local_irq_disable(); + } + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu); + + default_idle(); + + /* + * The switch back from broadcast mode needs to be + * called with interrupts disabled. + */ + local_irq_disable(); + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu); + local_irq_enable(); + } else + default_idle(); +} + +void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) +{ #ifdef CONFIG_X86_SMP if (pm_idle == poll_idle && smp_num_siblings > 1) { printk(KERN_WARNING "WARNING: polling idle and HT enabled," " performance may degrade.\n"); } #endif + if (pm_idle) + return; + if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) { /* - * Skip, if setup has overridden idle. * One CPU supports mwait => All CPUs supports mwait */ - if (!pm_idle) { - printk(KERN_INFO "using mwait in idle threads.\n"); - pm_idle = mwait_idle; - } - } - selected = 1; + printk(KERN_INFO "using mwait in idle threads.\n"); + pm_idle = mwait_idle; + } else if (check_c1e_idle(c)) { + printk(KERN_INFO "using C1E aware idle routine\n"); + pm_idle = c1e_idle; + } else + pm_idle = default_idle; } static int __init idle_setup(char *str) { + if (!str) + return -EINVAL; + if (!strcmp(str, "poll")) { printk("using polling idle threads.\n"); pm_idle = poll_idle; } else if (!strcmp(str, "mwait")) force_mwait = 1; - else + else if (!strcmp(str, "halt")) { + /* + * When the boot option of idle=halt is added, halt is + * forced to be used for CPU idle. In such case CPU C2/C3 + * won't be used again. + * To continue to load the CPU idle driver, don't touch + * the boot_option_idle_override. + */ + pm_idle = default_idle; + idle_halt = 1; + return 0; + } else if (!strcmp(str, "nomwait")) { + /* + * If the boot option of "idle=nomwait" is added, + * it means that mwait will be disabled for CPU C2/C3 + * states. In such case it won't touch the variable + * of boot_option_idle_override. + */ + idle_nomwait = 1; + return 0; + } else return -1; boot_option_idle_override = 1; diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c index e2db9ac5c61c2b6d6de1f0b13f71b6d834eaeca2..53bc653ed5ca52bab902dde3d9efbc0e1630eb6c 100644 --- a/arch/x86/kernel/process_32.c +++ b/arch/x86/kernel/process_32.c @@ -58,11 +58,6 @@ asmlinkage void ret_from_fork(void) __asm__("ret_from_fork"); -static int hlt_counter; - -unsigned long boot_option_idle_override = 0; -EXPORT_SYMBOL(boot_option_idle_override); - DEFINE_PER_CPU(struct task_struct *, current_task) = &init_task; EXPORT_PER_CPU_SYMBOL(current_task); @@ -77,57 +72,24 @@ unsigned long thread_saved_pc(struct task_struct *tsk) return ((unsigned long *)tsk->thread.sp)[3]; } -/* - * Powermanagement idle function, if any.. - */ -void (*pm_idle)(void); -EXPORT_SYMBOL(pm_idle); +#ifdef CONFIG_HOTPLUG_CPU +#include -void disable_hlt(void) +static void cpu_exit_clear(void) { - hlt_counter++; -} + int cpu = raw_smp_processor_id(); -EXPORT_SYMBOL(disable_hlt); + idle_task_exit(); -void enable_hlt(void) -{ - hlt_counter--; -} + cpu_uninit(); + irq_ctx_exit(cpu); -EXPORT_SYMBOL(enable_hlt); - -/* - * We use this if we don't have any better - * idle routine.. - */ -void default_idle(void) -{ - if (!hlt_counter && boot_cpu_data.hlt_works_ok) { - current_thread_info()->status &= ~TS_POLLING; - /* - * TS_POLLING-cleared state must be visible before we - * test NEED_RESCHED: - */ - smp_mb(); + cpu_clear(cpu, cpu_callout_map); + cpu_clear(cpu, cpu_callin_map); - if (!need_resched()) - safe_halt(); /* enables interrupts racelessly */ - else - local_irq_enable(); - current_thread_info()->status |= TS_POLLING; - } else { - local_irq_enable(); - /* loop is done by the caller */ - cpu_relax(); - } + numa_remove_cpu(cpu); } -#ifdef CONFIG_APM_MODULE -EXPORT_SYMBOL(default_idle); -#endif -#ifdef CONFIG_HOTPLUG_CPU -#include /* We don't actually take CPU down, just spin without interrupts. */ static inline void play_dead(void) { @@ -166,26 +128,24 @@ void cpu_idle(void) /* endless idle loop with no priority at all */ while (1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched()) { - void (*idle)(void); check_pgt_cache(); rmb(); - idle = pm_idle; if (rcu_pending(cpu)) rcu_check_callbacks(cpu, 0); - if (!idle) - idle = default_idle; - if (cpu_is_offline(cpu)) play_dead(); local_irq_disable(); __get_cpu_var(irq_stat).idle_timestamp = jiffies; - idle(); + /* Don't trace irqs off for idle */ + stop_critical_timings(); + pm_idle(); + start_critical_timings(); } tick_nohz_restart_sched_tick(); preempt_enable_no_resched(); diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index c6eb5c91e5f607f7fb70758ed65eee667c7d1401..3fb62a7d9a16250092a9827a66af062be4824513 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -56,15 +56,6 @@ asmlinkage extern void ret_from_fork(void); unsigned long kernel_thread_flags = CLONE_VM | CLONE_UNTRACED; -unsigned long boot_option_idle_override = 0; -EXPORT_SYMBOL(boot_option_idle_override); - -/* - * Powermanagement idle function, if any.. - */ -void (*pm_idle)(void); -EXPORT_SYMBOL(pm_idle); - static ATOMIC_NOTIFIER_HEAD(idle_notifier); void idle_notifier_register(struct notifier_block *n) @@ -94,25 +85,6 @@ void exit_idle(void) __exit_idle(); } -/* - * We use this if we don't have any better - * idle routine.. - */ -void default_idle(void) -{ - current_thread_info()->status &= ~TS_POLLING; - /* - * TS_POLLING-cleared state must be visible before we - * test NEED_RESCHED: - */ - smp_mb(); - if (!need_resched()) - safe_halt(); /* enables interrupts racelessly */ - else - local_irq_enable(); - current_thread_info()->status |= TS_POLLING; -} - #ifdef CONFIG_HOTPLUG_CPU DECLARE_PER_CPU(int, cpu_state); @@ -148,14 +120,11 @@ void cpu_idle(void) current_thread_info()->status |= TS_POLLING; /* endless idle loop with no priority at all */ while (1) { - tick_nohz_stop_sched_tick(); + tick_nohz_stop_sched_tick(1); while (!need_resched()) { - void (*idle)(void); rmb(); - idle = pm_idle; - if (!idle) - idle = default_idle; + if (cpu_is_offline(smp_processor_id())) play_dead(); /* @@ -165,7 +134,10 @@ void cpu_idle(void) */ local_irq_disable(); enter_idle(); - idle(); + /* Don't trace irqs off for idle */ + stop_critical_timings(); + pm_idle(); + start_critical_timings(); /* In many cases the interrupt that ended idle has already called exit_idle. But some idle loops can be woken up without interrupt. */ @@ -366,10 +338,10 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long sp, p->thread.fs = me->thread.fs; p->thread.gs = me->thread.gs; - asm("mov %%gs,%0" : "=m" (p->thread.gsindex)); - asm("mov %%fs,%0" : "=m" (p->thread.fsindex)); - asm("mov %%es,%0" : "=m" (p->thread.es)); - asm("mov %%ds,%0" : "=m" (p->thread.ds)); + savesegment(gs, p->thread.gsindex); + savesegment(fs, p->thread.fsindex); + savesegment(es, p->thread.es); + savesegment(ds, p->thread.ds); if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) { p->thread.io_bitmap_ptr = kmalloc(IO_BITMAP_BYTES, GFP_KERNEL); @@ -408,7 +380,9 @@ out: void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp) { - asm volatile("movl %0, %%fs; movl %0, %%es; movl %0, %%ds" :: "r"(0)); + loadsegment(fs, 0); + loadsegment(es, 0); + loadsegment(ds, 0); load_gs_index(0); regs->ip = new_ip; regs->sp = new_sp; @@ -563,10 +537,11 @@ static inline void __switch_to_xtra(struct task_struct *prev_p, struct task_struct * __switch_to(struct task_struct *prev_p, struct task_struct *next_p) { - struct thread_struct *prev = &prev_p->thread, - *next = &next_p->thread; + struct thread_struct *prev = &prev_p->thread; + struct thread_struct *next = &next_p->thread; int cpu = smp_processor_id(); struct tss_struct *tss = &per_cpu(init_tss, cpu); + unsigned fsindex, gsindex; /* we're going to use this soon, after a few expensive things */ if (next_p->fpu_counter>5) @@ -581,52 +556,64 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) * Switch DS and ES. * This won't pick up thread selector changes, but I guess that is ok. */ - asm volatile("mov %%es,%0" : "=m" (prev->es)); + savesegment(es, prev->es); if (unlikely(next->es | prev->es)) loadsegment(es, next->es); - - asm volatile ("mov %%ds,%0" : "=m" (prev->ds)); + + savesegment(ds, prev->ds); if (unlikely(next->ds | prev->ds)) loadsegment(ds, next->ds); + + /* We must save %fs and %gs before load_TLS() because + * %fs and %gs may be cleared by load_TLS(). + * + * (e.g. xen_load_tls()) + */ + savesegment(fs, fsindex); + savesegment(gs, gsindex); + load_TLS(next, cpu); + /* + * Leave lazy mode, flushing any hypercalls made here. + * This must be done before restoring TLS segments so + * the GDT and LDT are properly updated, and must be + * done before math_state_restore, so the TS bit is up + * to date. + */ + arch_leave_lazy_cpu_mode(); + /* * Switch FS and GS. + * + * Segment register != 0 always requires a reload. Also + * reload when it has changed. When prev process used 64bit + * base always reload to avoid an information leak. */ - { - unsigned fsindex; - asm volatile("movl %%fs,%0" : "=r" (fsindex)); - /* segment register != 0 always requires a reload. - also reload when it has changed. - when prev process used 64bit base always reload - to avoid an information leak. */ - if (unlikely(fsindex | next->fsindex | prev->fs)) { - loadsegment(fs, next->fsindex); - /* check if the user used a selector != 0 - * if yes clear 64bit base, since overloaded base - * is always mapped to the Null selector - */ - if (fsindex) + if (unlikely(fsindex | next->fsindex | prev->fs)) { + loadsegment(fs, next->fsindex); + /* + * Check if the user used a selector != 0; if yes + * clear 64bit base, since overloaded base is always + * mapped to the Null selector + */ + if (fsindex) prev->fs = 0; - } - /* when next process has a 64bit base use it */ - if (next->fs) - wrmsrl(MSR_FS_BASE, next->fs); - prev->fsindex = fsindex; } - { - unsigned gsindex; - asm volatile("movl %%gs,%0" : "=r" (gsindex)); - if (unlikely(gsindex | next->gsindex | prev->gs)) { - load_gs_index(next->gsindex); - if (gsindex) + /* when next process has a 64bit base use it */ + if (next->fs) + wrmsrl(MSR_FS_BASE, next->fs); + prev->fsindex = fsindex; + + if (unlikely(gsindex | next->gsindex | prev->gs)) { + load_gs_index(next->gsindex); + if (gsindex) prev->gs = 0; - } - if (next->gs) - wrmsrl(MSR_KERNEL_GS_BASE, next->gs); - prev->gsindex = gsindex; } + if (next->gs) + wrmsrl(MSR_KERNEL_GS_BASE, next->gs); + prev->gsindex = gsindex; /* Must be after DS reload */ unlazy_fpu(prev_p); @@ -639,7 +626,8 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p) write_pda(pcurrent, next_p); write_pda(kernelstack, - (unsigned long)task_stack_page(next_p) + THREAD_SIZE - PDA_STACKOFFSET); + (unsigned long)task_stack_page(next_p) + + THREAD_SIZE - PDA_STACKOFFSET); #ifdef CONFIG_CC_STACKPROTECTOR write_pda(stack_canary, next_p->stack_canary); /* @@ -798,7 +786,7 @@ long do_arch_prctl(struct task_struct *task, int code, unsigned long addr) set_32bit_tls(task, FS_TLS, addr); if (doit) { load_TLS(&task->thread, cpu); - asm volatile("movl %0,%%fs" :: "r"(FS_TLS_SEL)); + loadsegment(fs, FS_TLS_SEL); } task->thread.fsindex = FS_TLS_SEL; task->thread.fs = 0; @@ -808,7 +796,7 @@ long do_arch_prctl(struct task_struct *task, int code, unsigned long addr) if (doit) { /* set the selector to 0 to not confuse __switch_to */ - asm volatile("movl %0,%%fs" :: "r" (0)); + loadsegment(fs, 0); ret = checking_wrmsrl(MSR_FS_BASE, addr); } } @@ -831,7 +819,7 @@ long do_arch_prctl(struct task_struct *task, int code, unsigned long addr) if (task->thread.gsindex == GS_TLS_SEL) base = read_32bit_tls(task, GS_TLS); else if (doit) { - asm("movl %%gs,%0" : "=r" (gsindex)); + savesegment(gs, gsindex); if (gsindex) rdmsrl(MSR_KERNEL_GS_BASE, base); else diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index a7835f2829361bcd964f85118839751fba24b12b..e37dccce85db5e15922602b833a3821b78ca4ffd 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -943,13 +943,13 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) return copy_regset_to_user(child, &user_x86_32_view, REGSET_XFP, 0, sizeof(struct user_fxsr_struct), - datap); + datap) ? -EIO : 0; case PTRACE_SETFPXREGS: /* Set the child extended FPU state. */ return copy_regset_from_user(child, &user_x86_32_view, REGSET_XFP, 0, sizeof(struct user_fxsr_struct), - datap); + datap) ? -EIO : 0; #endif #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION @@ -1357,8 +1357,6 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) #endif } -#ifdef CONFIG_X86_32 - void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code) { struct siginfo info; @@ -1377,89 +1375,10 @@ void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code) force_sig_info(SIGTRAP, &info, tsk); } -/* notification of system call entry/exit - * - triggered by current->work.syscall_trace - */ -int do_syscall_trace(struct pt_regs *regs, int entryexit) -{ - int is_sysemu = test_thread_flag(TIF_SYSCALL_EMU); - /* - * With TIF_SYSCALL_EMU set we want to ignore TIF_SINGLESTEP for syscall - * interception - */ - int is_singlestep = !is_sysemu && test_thread_flag(TIF_SINGLESTEP); - int ret = 0; - - /* do the secure computing check first */ - if (!entryexit) - secure_computing(regs->orig_ax); - - if (unlikely(current->audit_context)) { - if (entryexit) - audit_syscall_exit(AUDITSC_RESULT(regs->ax), - regs->ax); - /* Debug traps, when using PTRACE_SINGLESTEP, must be sent only - * on the syscall exit path. Normally, when TIF_SYSCALL_AUDIT is - * not used, entry.S will call us only on syscall exit, not - * entry; so when TIF_SYSCALL_AUDIT is used we must avoid - * calling send_sigtrap() on syscall entry. - * - * Note that when PTRACE_SYSEMU_SINGLESTEP is used, - * is_singlestep is false, despite his name, so we will still do - * the correct thing. - */ - else if (is_singlestep) - goto out; - } - - if (!(current->ptrace & PT_PTRACED)) - goto out; - - /* If a process stops on the 1st tracepoint with SYSCALL_TRACE - * and then is resumed with SYSEMU_SINGLESTEP, it will come in - * here. We have to check this and return */ - if (is_sysemu && entryexit) - return 0; - - /* Fake a debug trap */ - if (is_singlestep) - send_sigtrap(current, regs, 0); - - if (!test_thread_flag(TIF_SYSCALL_TRACE) && !is_sysemu) - goto out; - - /* the 0x80 provides a way for the tracing parent to distinguish - between a syscall stop and SIGTRAP delivery */ - /* Note that the debugger could change the result of test_thread_flag!*/ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ? 0x80:0)); - - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } - ret = is_sysemu; -out: - if (unlikely(current->audit_context) && !entryexit) - audit_syscall_entry(AUDIT_ARCH_I386, regs->orig_ax, - regs->bx, regs->cx, regs->dx, regs->si); - if (ret == 0) - return 0; - - regs->orig_ax = -1; /* force skip of syscall restarting */ - if (unlikely(current->audit_context)) - audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax); - return 1; -} - -#else /* CONFIG_X86_64 */ - static void syscall_trace(struct pt_regs *regs) { + if (!(current->ptrace & PT_PTRACED)) + return; #if 0 printk("trace %s ip %lx sp %lx ax %d origrax %d caller %lx tiflags %x ptrace %x\n", @@ -1481,39 +1400,81 @@ static void syscall_trace(struct pt_regs *regs) } } -asmlinkage void syscall_trace_enter(struct pt_regs *regs) +#ifdef CONFIG_X86_32 +# define IS_IA32 1 +#elif defined CONFIG_IA32_EMULATION +# define IS_IA32 test_thread_flag(TIF_IA32) +#else +# define IS_IA32 0 +#endif + +/* + * We must return the syscall number to actually look up in the table. + * This can be -1L to skip running any syscall at all. + */ +asmregparm long syscall_trace_enter(struct pt_regs *regs) { + long ret = 0; + + /* + * If we stepped into a sysenter/syscall insn, it trapped in + * kernel mode; do_debug() cleared TF and set TIF_SINGLESTEP. + * If user-mode had set TF itself, then it's still clear from + * do_debug() and we need to set it again to restore the user + * state. If we entered on the slow path, TF was already set. + */ + if (test_thread_flag(TIF_SINGLESTEP)) + regs->flags |= X86_EFLAGS_TF; + /* do the secure computing check first */ secure_computing(regs->orig_ax); - if (test_thread_flag(TIF_SYSCALL_TRACE) - && (current->ptrace & PT_PTRACED)) + if (unlikely(test_thread_flag(TIF_SYSCALL_EMU))) + ret = -1L; + + if (ret || test_thread_flag(TIF_SYSCALL_TRACE)) syscall_trace(regs); if (unlikely(current->audit_context)) { - if (test_thread_flag(TIF_IA32)) { + if (IS_IA32) audit_syscall_entry(AUDIT_ARCH_I386, regs->orig_ax, regs->bx, regs->cx, regs->dx, regs->si); - } else { +#ifdef CONFIG_X86_64 + else audit_syscall_entry(AUDIT_ARCH_X86_64, regs->orig_ax, regs->di, regs->si, regs->dx, regs->r10); - } +#endif } + + return ret ?: regs->orig_ax; } -asmlinkage void syscall_trace_leave(struct pt_regs *regs) +asmregparm void syscall_trace_leave(struct pt_regs *regs) { if (unlikely(current->audit_context)) audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax); - if ((test_thread_flag(TIF_SYSCALL_TRACE) - || test_thread_flag(TIF_SINGLESTEP)) - && (current->ptrace & PT_PTRACED)) + if (test_thread_flag(TIF_SYSCALL_TRACE)) syscall_trace(regs); -} -#endif /* CONFIG_X86_32 */ + /* + * If TIF_SYSCALL_EMU is set, we only get here because of + * TIF_SINGLESTEP (i.e. this is PTRACE_SYSEMU_SINGLESTEP). + * We already reported this syscall instruction in + * syscall_trace_enter(), so don't do any more now. + */ + if (unlikely(test_thread_flag(TIF_SYSCALL_EMU))) + return; + + /* + * If we are single-stepping, synthesize a trap to follow the + * system call instruction. + */ + if (test_thread_flag(TIF_SINGLESTEP) && + (current->ptrace & PT_PTRACED)) + send_sigtrap(current, regs, 0); +} diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index d89a648fe7109a5121673e08a6c978e5ef62a65d..d13858818100e6f35cb328bab4394dc00885d712 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c @@ -65,6 +65,7 @@ static enum { ICH_FORCE_HPET_RESUME, VT8237_FORCE_HPET_RESUME, NVIDIA_FORCE_HPET_RESUME, + ATI_FORCE_HPET_RESUME, } force_hpet_resume_type; static void __iomem *rcba_base; @@ -158,6 +159,8 @@ static void ich_force_enable_hpet(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_0, ich_force_enable_hpet); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, + ich_force_enable_hpet); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, ich_force_enable_hpet); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, @@ -174,6 +177,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7, static struct pci_dev *cached_dev; +static void hpet_print_force_info(void) +{ + printk(KERN_INFO "HPET not enabled in BIOS. " + "You might try hpet=force boot option\n"); +} + static void old_ich_force_hpet_resume(void) { u32 val; @@ -253,8 +262,12 @@ static void old_ich_force_enable_hpet_user(struct pci_dev *dev) { if (hpet_force_user) old_ich_force_enable_hpet(dev); + else + hpet_print_force_info(); } +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, + old_ich_force_enable_hpet_user); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_0, old_ich_force_enable_hpet_user); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12, @@ -290,9 +303,14 @@ static void vt8237_force_enable_hpet(struct pci_dev *dev) { u32 uninitialized_var(val); - if (!hpet_force_user || hpet_address || force_hpet_address) + if (hpet_address || force_hpet_address) return; + if (!hpet_force_user) { + hpet_print_force_info(); + return; + } + pci_read_config_dword(dev, 0x68, &val); /* * Bit 7 is HPET enable bit. @@ -330,6 +348,36 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, vt8237_force_enable_hpet); +static void ati_force_hpet_resume(void) +{ + pci_write_config_dword(cached_dev, 0x14, 0xfed00000); + printk(KERN_DEBUG "Force enabled HPET at resume\n"); +} + +static void ati_force_enable_hpet(struct pci_dev *dev) +{ + u32 uninitialized_var(val); + + if (hpet_address || force_hpet_address) + return; + + if (!hpet_force_user) { + hpet_print_force_info(); + return; + } + + pci_write_config_dword(dev, 0x14, 0xfed00000); + pci_read_config_dword(dev, 0x14, &val); + force_hpet_address = val; + force_hpet_resume_type = ATI_FORCE_HPET_RESUME; + dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n", + force_hpet_address); + cached_dev = dev; + return; +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS, + ati_force_enable_hpet); + /* * Undocumented chipset feature taken from LinuxBIOS. */ @@ -343,8 +391,13 @@ static void nvidia_force_enable_hpet(struct pci_dev *dev) { u32 uninitialized_var(val); - if (!hpet_force_user || hpet_address || force_hpet_address) + if (hpet_address || force_hpet_address) + return; + + if (!hpet_force_user) { + hpet_print_force_info(); return; + } pci_write_config_dword(dev, 0x44, 0xfed00001); pci_read_config_dword(dev, 0x44, &val); @@ -397,6 +450,9 @@ void force_hpet_resume(void) case NVIDIA_FORCE_HPET_RESUME: nvidia_force_hpet_resume(); return; + case ATI_FORCE_HPET_RESUME: + ati_force_hpet_resume(); + return; default: break; } diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index f6be7d5f82f81d726bf3545732c1d78ad778b0f3..724adfc63cb9a7b60d6ee5c82efd919fe237f69c 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -27,7 +27,7 @@ void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); -static long no_idt[3]; +static const struct desc_ptr no_idt = {}; static int reboot_mode; enum reboot_type reboot_type = BOOT_KBD; int reboot_force; @@ -177,6 +177,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"), }, }, + { /* Handle problems with rebooting on Dell T5400's */ + .callback = set_bios_reboot, + .ident = "Dell Precision T5400", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"), + }, + }, { /* Handle problems with rebooting on HP laptops */ .callback = set_bios_reboot, .ident = "HP Compaq Laptop", @@ -201,15 +209,15 @@ core_initcall(reboot_init); controller to pulse the CPU reset line, which is more thorough, but doesn't work with at least one type of 486 motherboard. It is easy to stop this code working; hence the copious comments. */ -static unsigned long long +static const unsigned long long real_mode_gdt_entries [3] = { 0x0000000000000000ULL, /* Null descriptor */ - 0x00009a000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ - 0x000092000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ + 0x00009b000000ffffULL, /* 16-bit real-mode 64k code at 0x00000000 */ + 0x000093000100ffffULL /* 16-bit real-mode 64k data at 0x00000100 */ }; -static struct desc_ptr +static const struct desc_ptr real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries }, real_mode_idt = { 0x3ff, 0 }; @@ -231,7 +239,7 @@ real_mode_idt = { 0x3ff, 0 }; More could be done here to set up the registers as if a CPU reset had occurred; hopefully real BIOSs don't assume much. */ -static unsigned char real_mode_switch [] = +static const unsigned char real_mode_switch [] = { 0x66, 0x0f, 0x20, 0xc0, /* movl %cr0,%eax */ 0x66, 0x83, 0xe0, 0x11, /* andl $0x00000011,%eax */ @@ -245,7 +253,7 @@ static unsigned char real_mode_switch [] = 0x24, 0x10, /* f: andb $0x10,al */ 0x66, 0x0f, 0x22, 0xc0 /* movl %eax,%cr0 */ }; -static unsigned char jump_to_bios [] = +static const unsigned char jump_to_bios [] = { 0xea, 0x00, 0x00, 0xff, 0xff /* ljmp $0xffff,$0x0000 */ }; @@ -255,7 +263,7 @@ static unsigned char jump_to_bios [] = * specified by the code and length parameters. * We assume that length will aways be less that 100! */ -void machine_real_restart(unsigned char *code, int length) +void machine_real_restart(const unsigned char *code, int length) { local_irq_disable(); @@ -368,7 +376,7 @@ static void native_machine_emergency_restart(void) } case BOOT_TRIPLE: - load_idt((const struct desc_ptr *)&no_idt); + load_idt(&no_idt); __asm__ __volatile__("int3"); reboot_type = BOOT_KBD; @@ -403,10 +411,9 @@ void native_machine_shutdown(void) { /* Stop the cpus and apics */ #ifdef CONFIG_SMP - int reboot_cpu_id; /* The boot cpu is always logical cpu 0 */ - reboot_cpu_id = 0; + int reboot_cpu_id = 0; #ifdef CONFIG_X86_32 /* See if there has been given a command line override */ diff --git a/arch/x86/kernel/reboot_fixups_32.c b/arch/x86/kernel/reboot_fixups_32.c index dec0b5ec25c2fb18000af506d5493a623c40ad8a..61a837743fe5b7f91284bdfc97826ee802917132 100644 --- a/arch/x86/kernel/reboot_fixups_32.c +++ b/arch/x86/kernel/reboot_fixups_32.c @@ -49,7 +49,7 @@ struct device_fixup { void (*reboot_fixup)(struct pci_dev *); }; -static struct device_fixup fixups_table[] = { +static const struct device_fixup fixups_table[] = { { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset }, { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset }, { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE, cs5530a_warm_reset }, @@ -64,7 +64,7 @@ static struct device_fixup fixups_table[] = { */ void mach_reboot_fixups(void) { - struct device_fixup *cur; + const struct device_fixup *cur; struct pci_dev *dev; int i; diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S index c30fe25d470d8ff63cd0abe40353f6577c12fab4..703310a990239d686516fbcccfc5ede3d05c0cda 100644 --- a/arch/x86/kernel/relocate_kernel_32.S +++ b/arch/x86/kernel/relocate_kernel_32.S @@ -20,11 +20,44 @@ #define PAGE_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY) #define PAE_PGD_ATTR (_PAGE_PRESENT) +/* control_page + PAGE_SIZE/2 ~ control_page + PAGE_SIZE * 3/4 are + * used to save some data for jumping back + */ +#define DATA(offset) (PAGE_SIZE/2+(offset)) + +/* Minimal CPU state */ +#define ESP DATA(0x0) +#define CR0 DATA(0x4) +#define CR3 DATA(0x8) +#define CR4 DATA(0xc) + +/* other data */ +#define CP_VA_CONTROL_PAGE DATA(0x10) +#define CP_PA_PGD DATA(0x14) +#define CP_PA_SWAP_PAGE DATA(0x18) +#define CP_PA_BACKUP_PAGES_MAP DATA(0x1c) + .text .align PAGE_SIZE .globl relocate_kernel relocate_kernel: - movl 8(%esp), %ebp /* list of pages */ + /* Save the CPU context, used for jumping back */ + + pushl %ebx + pushl %esi + pushl %edi + pushl %ebp + pushf + + movl 20+8(%esp), %ebp /* list of pages */ + movl PTR(VA_CONTROL_PAGE)(%ebp), %edi + movl %esp, ESP(%edi) + movl %cr0, %eax + movl %eax, CR0(%edi) + movl %cr3, %eax + movl %eax, CR3(%edi) + movl %cr4, %eax + movl %eax, CR4(%edi) #ifdef CONFIG_X86_PAE /* map the control page at its virtual address */ @@ -138,15 +171,25 @@ relocate_kernel: relocate_new_kernel: /* read the arguments and say goodbye to the stack */ - movl 4(%esp), %ebx /* page_list */ - movl 8(%esp), %ebp /* list of pages */ - movl 12(%esp), %edx /* start address */ - movl 16(%esp), %ecx /* cpu_has_pae */ + movl 20+4(%esp), %ebx /* page_list */ + movl 20+8(%esp), %ebp /* list of pages */ + movl 20+12(%esp), %edx /* start address */ + movl 20+16(%esp), %ecx /* cpu_has_pae */ + movl 20+20(%esp), %esi /* preserve_context */ /* zero out flags, and disable interrupts */ pushl $0 popfl + /* save some information for jumping back */ + movl PTR(VA_CONTROL_PAGE)(%ebp), %edi + movl %edi, CP_VA_CONTROL_PAGE(%edi) + movl PTR(PA_PGD)(%ebp), %eax + movl %eax, CP_PA_PGD(%edi) + movl PTR(PA_SWAP_PAGE)(%ebp), %eax + movl %eax, CP_PA_SWAP_PAGE(%edi) + movl %ebx, CP_PA_BACKUP_PAGES_MAP(%edi) + /* get physical address of control page now */ /* this is impossible after page table switch */ movl PTR(PA_CONTROL_PAGE)(%ebp), %edi @@ -197,8 +240,90 @@ identity_mapped: xorl %eax, %eax movl %eax, %cr3 + movl CP_PA_SWAP_PAGE(%edi), %eax + pushl %eax + pushl %ebx + call swap_pages + addl $8, %esp + + /* To be certain of avoiding problems with self-modifying code + * I need to execute a serializing instruction here. + * So I flush the TLB, it's handy, and not processor dependent. + */ + xorl %eax, %eax + movl %eax, %cr3 + + /* set all of the registers to known values */ + /* leave %esp alone */ + + testl %esi, %esi + jnz 1f + xorl %edi, %edi + xorl %eax, %eax + xorl %ebx, %ebx + xorl %ecx, %ecx + xorl %edx, %edx + xorl %esi, %esi + xorl %ebp, %ebp + ret +1: + popl %edx + movl CP_PA_SWAP_PAGE(%edi), %esp + addl $PAGE_SIZE, %esp +2: + call *%edx + + /* get the re-entry point of the peer system */ + movl 0(%esp), %ebp + call 1f +1: + popl %ebx + subl $(1b - relocate_kernel), %ebx + movl CP_VA_CONTROL_PAGE(%ebx), %edi + lea PAGE_SIZE(%ebx), %esp + movl CP_PA_SWAP_PAGE(%ebx), %eax + movl CP_PA_BACKUP_PAGES_MAP(%ebx), %edx + pushl %eax + pushl %edx + call swap_pages + addl $8, %esp + movl CP_PA_PGD(%ebx), %eax + movl %eax, %cr3 + movl %cr0, %eax + orl $(1<<31), %eax + movl %eax, %cr0 + lea PAGE_SIZE(%edi), %esp + movl %edi, %eax + addl $(virtual_mapped - relocate_kernel), %eax + pushl %eax + ret + +virtual_mapped: + movl CR4(%edi), %eax + movl %eax, %cr4 + movl CR3(%edi), %eax + movl %eax, %cr3 + movl CR0(%edi), %eax + movl %eax, %cr0 + movl ESP(%edi), %esp + movl %ebp, %eax + + popf + popl %ebp + popl %edi + popl %esi + popl %ebx + ret + /* Do the copies */ - movl %ebx, %ecx +swap_pages: + movl 8(%esp), %edx + movl 4(%esp), %ecx + pushl %ebp + pushl %ebx + pushl %edi + pushl %esi + movl %ecx, %ebx jmp 1f 0: /* top, read another word from the indirection page */ @@ -226,27 +351,28 @@ identity_mapped: movl %ecx, %esi /* For every source page do a copy */ andl $0xfffff000, %esi + movl %edi, %eax + movl %esi, %ebp + + movl %edx, %edi movl $1024, %ecx rep ; movsl - jmp 0b -3: - - /* To be certain of avoiding problems with self-modifying code - * I need to execute a serializing instruction here. - * So I flush the TLB, it's handy, and not processor dependent. - */ - xorl %eax, %eax - movl %eax, %cr3 + movl %ebp, %edi + movl %eax, %esi + movl $1024, %ecx + rep ; movsl - /* set all of the registers to known values */ - /* leave %esp alone */ + movl %eax, %edi + movl %edx, %esi + movl $1024, %ecx + rep ; movsl - xorl %eax, %eax - xorl %ebx, %ebx - xorl %ecx, %ecx - xorl %edx, %edx - xorl %esi, %esi - xorl %edi, %edi - xorl %ebp, %ebp + lea PAGE_SIZE(%ebp), %esi + jmp 0b +3: + popl %esi + popl %edi + popl %ebx + popl %ebp ret diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 6f80b852a1961a6b496bc2404c5194769557d97a..792b87853a7691b59f9767d743ad204a451e6850 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -1,139 +1,887 @@ -#include +/* + * Copyright (C) 1995 Linus Torvalds + * + * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 + * + * Memory region support + * David Parsons , July-August 1999 + * + * Added E820 sanitization routine (removes overlapping memory regions); + * Brian Moyle , February 2001 + * + * Moved CPU detection code to cpu/${cpu}.c + * Patrick Mochel , March 2002 + * + * Provisions for empty E820 memory regions (reported by certain BIOSes). + * Alex Achenbach , December 2002. + * + */ + +/* + * This file handles the architecture-dependent parts of initialization + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include +#include #include -#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + #include -#include -#include +#include + +#include